Boot log: acer-cb317-1h-c3z6-dedede
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 03:41:25.638650 lava-dispatcher, installed at version: 2024.01
2 03:41:25.638868 start: 0 validate
3 03:41:25.639007 Start time: 2024-03-05 03:41:25.638999+00:00 (UTC)
4 03:41:25.639125 Using caching service: 'http://localhost/cache/?uri=%s'
5 03:41:25.639254 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 03:41:25.907124 Using caching service: 'http://localhost/cache/?uri=%s'
7 03:41:25.907310 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2244-g20d1c7153f15%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 03:41:26.164459 Using caching service: 'http://localhost/cache/?uri=%s'
9 03:41:26.164641 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2244-g20d1c7153f15%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 03:41:28.751322 validate duration: 3.11
12 03:41:28.751650 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 03:41:28.751782 start: 1.1 download-retry (timeout 00:10:00) [common]
14 03:41:28.751908 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 03:41:28.752051 Not decompressing ramdisk as can be used compressed.
16 03:41:28.752174 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 03:41:28.752274 saving as /var/lib/lava/dispatcher/tmp/12940459/tftp-deploy-tn9bhqvx/ramdisk/rootfs.cpio.gz
18 03:41:28.752379 total size: 8418130 (8 MB)
19 03:41:29.280386 progress 0 % (0 MB)
20 03:41:29.283104 progress 5 % (0 MB)
21 03:41:29.285595 progress 10 % (0 MB)
22 03:41:29.288054 progress 15 % (1 MB)
23 03:41:29.290557 progress 20 % (1 MB)
24 03:41:29.293034 progress 25 % (2 MB)
25 03:41:29.295563 progress 30 % (2 MB)
26 03:41:29.297930 progress 35 % (2 MB)
27 03:41:29.300445 progress 40 % (3 MB)
28 03:41:29.302990 progress 45 % (3 MB)
29 03:41:29.305618 progress 50 % (4 MB)
30 03:41:29.307999 progress 55 % (4 MB)
31 03:41:29.310468 progress 60 % (4 MB)
32 03:41:29.312668 progress 65 % (5 MB)
33 03:41:29.315065 progress 70 % (5 MB)
34 03:41:29.317446 progress 75 % (6 MB)
35 03:41:29.319852 progress 80 % (6 MB)
36 03:41:29.322289 progress 85 % (6 MB)
37 03:41:29.324682 progress 90 % (7 MB)
38 03:41:29.327084 progress 95 % (7 MB)
39 03:41:29.329335 progress 100 % (8 MB)
40 03:41:29.329655 8 MB downloaded in 0.58 s (13.91 MB/s)
41 03:41:29.329873 end: 1.1.1 http-download (duration 00:00:01) [common]
43 03:41:29.330272 end: 1.1 download-retry (duration 00:00:01) [common]
44 03:41:29.330406 start: 1.2 download-retry (timeout 00:09:59) [common]
45 03:41:29.330534 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 03:41:29.330713 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2244-g20d1c7153f15/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 03:41:29.330817 saving as /var/lib/lava/dispatcher/tmp/12940459/tftp-deploy-tn9bhqvx/kernel/bzImage
48 03:41:29.330918 total size: 9367440 (8 MB)
49 03:41:29.331020 No compression specified
50 03:41:29.332642 progress 0 % (0 MB)
51 03:41:29.335254 progress 5 % (0 MB)
52 03:41:29.337928 progress 10 % (0 MB)
53 03:41:29.340652 progress 15 % (1 MB)
54 03:41:29.343423 progress 20 % (1 MB)
55 03:41:29.345981 progress 25 % (2 MB)
56 03:41:29.348539 progress 30 % (2 MB)
57 03:41:29.351305 progress 35 % (3 MB)
58 03:41:29.353868 progress 40 % (3 MB)
59 03:41:29.356289 progress 45 % (4 MB)
60 03:41:29.358733 progress 50 % (4 MB)
61 03:41:29.361343 progress 55 % (4 MB)
62 03:41:29.363798 progress 60 % (5 MB)
63 03:41:29.366224 progress 65 % (5 MB)
64 03:41:29.368789 progress 70 % (6 MB)
65 03:41:29.371221 progress 75 % (6 MB)
66 03:41:29.373667 progress 80 % (7 MB)
67 03:41:29.376047 progress 85 % (7 MB)
68 03:41:29.378628 progress 90 % (8 MB)
69 03:41:29.381026 progress 95 % (8 MB)
70 03:41:29.383521 progress 100 % (8 MB)
71 03:41:29.383758 8 MB downloaded in 0.05 s (169.08 MB/s)
72 03:41:29.383922 end: 1.2.1 http-download (duration 00:00:00) [common]
74 03:41:29.384186 end: 1.2 download-retry (duration 00:00:00) [common]
75 03:41:29.384295 start: 1.3 download-retry (timeout 00:09:59) [common]
76 03:41:29.384395 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 03:41:29.384551 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2244-g20d1c7153f15/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 03:41:29.384626 saving as /var/lib/lava/dispatcher/tmp/12940459/tftp-deploy-tn9bhqvx/modules/modules.tar
79 03:41:29.384726 total size: 250168 (0 MB)
80 03:41:29.384827 Using unxz to decompress xz
81 03:41:29.389526 progress 13 % (0 MB)
82 03:41:29.389969 progress 26 % (0 MB)
83 03:41:29.390231 progress 39 % (0 MB)
84 03:41:29.391679 progress 52 % (0 MB)
85 03:41:29.393565 progress 65 % (0 MB)
86 03:41:29.395329 progress 78 % (0 MB)
87 03:41:29.397290 progress 91 % (0 MB)
88 03:41:29.399149 progress 100 % (0 MB)
89 03:41:29.404555 0 MB downloaded in 0.02 s (12.03 MB/s)
90 03:41:29.404804 end: 1.3.1 http-download (duration 00:00:00) [common]
92 03:41:29.405108 end: 1.3 download-retry (duration 00:00:00) [common]
93 03:41:29.405220 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 03:41:29.405333 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 03:41:29.405454 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 03:41:29.405618 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 03:41:29.405867 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12940459/lava-overlay-bqth_ber
98 03:41:29.406050 makedir: /var/lib/lava/dispatcher/tmp/12940459/lava-overlay-bqth_ber/lava-12940459/bin
99 03:41:29.406194 makedir: /var/lib/lava/dispatcher/tmp/12940459/lava-overlay-bqth_ber/lava-12940459/tests
100 03:41:29.406309 makedir: /var/lib/lava/dispatcher/tmp/12940459/lava-overlay-bqth_ber/lava-12940459/results
101 03:41:29.406437 Creating /var/lib/lava/dispatcher/tmp/12940459/lava-overlay-bqth_ber/lava-12940459/bin/lava-add-keys
102 03:41:29.406602 Creating /var/lib/lava/dispatcher/tmp/12940459/lava-overlay-bqth_ber/lava-12940459/bin/lava-add-sources
103 03:41:29.406753 Creating /var/lib/lava/dispatcher/tmp/12940459/lava-overlay-bqth_ber/lava-12940459/bin/lava-background-process-start
104 03:41:29.406929 Creating /var/lib/lava/dispatcher/tmp/12940459/lava-overlay-bqth_ber/lava-12940459/bin/lava-background-process-stop
105 03:41:29.407076 Creating /var/lib/lava/dispatcher/tmp/12940459/lava-overlay-bqth_ber/lava-12940459/bin/lava-common-functions
106 03:41:29.407224 Creating /var/lib/lava/dispatcher/tmp/12940459/lava-overlay-bqth_ber/lava-12940459/bin/lava-echo-ipv4
107 03:41:29.407397 Creating /var/lib/lava/dispatcher/tmp/12940459/lava-overlay-bqth_ber/lava-12940459/bin/lava-install-packages
108 03:41:29.407569 Creating /var/lib/lava/dispatcher/tmp/12940459/lava-overlay-bqth_ber/lava-12940459/bin/lava-installed-packages
109 03:41:29.407740 Creating /var/lib/lava/dispatcher/tmp/12940459/lava-overlay-bqth_ber/lava-12940459/bin/lava-os-build
110 03:41:29.407915 Creating /var/lib/lava/dispatcher/tmp/12940459/lava-overlay-bqth_ber/lava-12940459/bin/lava-probe-channel
111 03:41:29.408087 Creating /var/lib/lava/dispatcher/tmp/12940459/lava-overlay-bqth_ber/lava-12940459/bin/lava-probe-ip
112 03:41:29.408260 Creating /var/lib/lava/dispatcher/tmp/12940459/lava-overlay-bqth_ber/lava-12940459/bin/lava-target-ip
113 03:41:29.408436 Creating /var/lib/lava/dispatcher/tmp/12940459/lava-overlay-bqth_ber/lava-12940459/bin/lava-target-mac
114 03:41:29.408595 Creating /var/lib/lava/dispatcher/tmp/12940459/lava-overlay-bqth_ber/lava-12940459/bin/lava-target-storage
115 03:41:29.408745 Creating /var/lib/lava/dispatcher/tmp/12940459/lava-overlay-bqth_ber/lava-12940459/bin/lava-test-case
116 03:41:29.408893 Creating /var/lib/lava/dispatcher/tmp/12940459/lava-overlay-bqth_ber/lava-12940459/bin/lava-test-event
117 03:41:29.409065 Creating /var/lib/lava/dispatcher/tmp/12940459/lava-overlay-bqth_ber/lava-12940459/bin/lava-test-feedback
118 03:41:29.409237 Creating /var/lib/lava/dispatcher/tmp/12940459/lava-overlay-bqth_ber/lava-12940459/bin/lava-test-raise
119 03:41:29.409412 Creating /var/lib/lava/dispatcher/tmp/12940459/lava-overlay-bqth_ber/lava-12940459/bin/lava-test-reference
120 03:41:29.409618 Creating /var/lib/lava/dispatcher/tmp/12940459/lava-overlay-bqth_ber/lava-12940459/bin/lava-test-runner
121 03:41:29.409767 Creating /var/lib/lava/dispatcher/tmp/12940459/lava-overlay-bqth_ber/lava-12940459/bin/lava-test-set
122 03:41:29.409913 Creating /var/lib/lava/dispatcher/tmp/12940459/lava-overlay-bqth_ber/lava-12940459/bin/lava-test-shell
123 03:41:29.410066 Updating /var/lib/lava/dispatcher/tmp/12940459/lava-overlay-bqth_ber/lava-12940459/bin/lava-install-packages (oe)
124 03:41:29.410268 Updating /var/lib/lava/dispatcher/tmp/12940459/lava-overlay-bqth_ber/lava-12940459/bin/lava-installed-packages (oe)
125 03:41:29.410439 Creating /var/lib/lava/dispatcher/tmp/12940459/lava-overlay-bqth_ber/lava-12940459/environment
126 03:41:29.410581 LAVA metadata
127 03:41:29.410692 - LAVA_JOB_ID=12940459
128 03:41:29.410799 - LAVA_DISPATCHER_IP=192.168.201.1
129 03:41:29.410954 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 03:41:29.411054 skipped lava-vland-overlay
131 03:41:29.411177 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 03:41:29.411303 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 03:41:29.411412 skipped lava-multinode-overlay
134 03:41:29.411539 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 03:41:29.411717 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 03:41:29.411867 Loading test definitions
137 03:41:29.412016 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 03:41:29.412126 Using /lava-12940459 at stage 0
139 03:41:29.412568 uuid=12940459_1.4.2.3.1 testdef=None
140 03:41:29.412686 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 03:41:29.412801 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 03:41:29.413581 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 03:41:29.413806 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 03:41:29.414461 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 03:41:29.414687 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 03:41:29.415312 runner path: /var/lib/lava/dispatcher/tmp/12940459/lava-overlay-bqth_ber/lava-12940459/0/tests/0_dmesg test_uuid 12940459_1.4.2.3.1
149 03:41:29.415475 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 03:41:29.415819 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 03:41:29.415929 Using /lava-12940459 at stage 1
153 03:41:29.416365 uuid=12940459_1.4.2.3.5 testdef=None
154 03:41:29.416493 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 03:41:29.416619 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 03:41:29.417379 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 03:41:29.417783 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 03:41:29.418451 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 03:41:29.418707 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 03:41:29.419650 runner path: /var/lib/lava/dispatcher/tmp/12940459/lava-overlay-bqth_ber/lava-12940459/1/tests/1_bootrr test_uuid 12940459_1.4.2.3.5
163 03:41:29.419850 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 03:41:29.420199 Creating lava-test-runner.conf files
166 03:41:29.420302 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12940459/lava-overlay-bqth_ber/lava-12940459/0 for stage 0
167 03:41:29.420439 - 0_dmesg
168 03:41:29.420555 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12940459/lava-overlay-bqth_ber/lava-12940459/1 for stage 1
169 03:41:29.420670 - 1_bootrr
170 03:41:29.420809 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 03:41:29.420932 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 03:41:29.430859 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 03:41:29.430995 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 03:41:29.431103 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 03:41:29.431232 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 03:41:29.431362 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 03:41:29.686795 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 03:41:29.687180 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 03:41:29.687316 extracting modules file /var/lib/lava/dispatcher/tmp/12940459/tftp-deploy-tn9bhqvx/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12940459/extract-overlay-ramdisk-azr5hc_8/ramdisk
180 03:41:29.704676 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 03:41:29.704841 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 03:41:29.704972 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12940459/compress-overlay-n3p38xv4/overlay-1.4.2.4.tar.gz to ramdisk
183 03:41:29.705082 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12940459/compress-overlay-n3p38xv4/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12940459/extract-overlay-ramdisk-azr5hc_8/ramdisk
184 03:41:29.716805 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 03:41:29.716959 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 03:41:29.717099 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 03:41:29.717235 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 03:41:29.717348 Building ramdisk /var/lib/lava/dispatcher/tmp/12940459/extract-overlay-ramdisk-azr5hc_8/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12940459/extract-overlay-ramdisk-azr5hc_8/ramdisk
189 03:41:29.849157 >> 49788 blocks
190 03:41:30.698181 rename /var/lib/lava/dispatcher/tmp/12940459/extract-overlay-ramdisk-azr5hc_8/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12940459/tftp-deploy-tn9bhqvx/ramdisk/ramdisk.cpio.gz
191 03:41:30.698631 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 03:41:30.698755 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 03:41:30.698859 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 03:41:30.698952 No mkimage arch provided, not using FIT.
195 03:41:30.699046 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 03:41:30.699131 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 03:41:30.699233 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 03:41:30.699331 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 03:41:30.699419 No LXC device requested
200 03:41:30.699508 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 03:41:30.699606 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 03:41:30.699698 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 03:41:30.699779 Checking files for TFTP limit of 4294967296 bytes.
204 03:41:30.700283 end: 1 tftp-deploy (duration 00:00:02) [common]
205 03:41:30.700417 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 03:41:30.700541 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 03:41:30.700707 substitutions:
208 03:41:30.700807 - {DTB}: None
209 03:41:30.700901 - {INITRD}: 12940459/tftp-deploy-tn9bhqvx/ramdisk/ramdisk.cpio.gz
210 03:41:30.700995 - {KERNEL}: 12940459/tftp-deploy-tn9bhqvx/kernel/bzImage
211 03:41:30.701086 - {LAVA_MAC}: None
212 03:41:30.701176 - {PRESEED_CONFIG}: None
213 03:41:30.701266 - {PRESEED_LOCAL}: None
214 03:41:30.701353 - {RAMDISK}: 12940459/tftp-deploy-tn9bhqvx/ramdisk/ramdisk.cpio.gz
215 03:41:30.701442 - {ROOT_PART}: None
216 03:41:30.701540 - {ROOT}: None
217 03:41:30.701630 - {SERVER_IP}: 192.168.201.1
218 03:41:30.701717 - {TEE}: None
219 03:41:30.701801 Parsed boot commands:
220 03:41:30.701888 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 03:41:30.702115 Parsed boot commands: tftpboot 192.168.201.1 12940459/tftp-deploy-tn9bhqvx/kernel/bzImage 12940459/tftp-deploy-tn9bhqvx/kernel/cmdline 12940459/tftp-deploy-tn9bhqvx/ramdisk/ramdisk.cpio.gz
222 03:41:30.702256 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 03:41:30.702346 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 03:41:30.702459 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 03:41:30.702579 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 03:41:30.702689 Not connected, no need to disconnect.
227 03:41:30.702801 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 03:41:30.703060 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 03:41:30.703171 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cb317-1h-c3z6-dedede-cbg-8'
230 03:41:30.707151 Setting prompt string to ['lava-test: # ']
231 03:41:30.707569 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 03:41:30.707717 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 03:41:30.707845 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 03:41:30.707969 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 03:41:30.708305 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-8' '--port=1' '--command=reboot'
236 03:41:35.850811 >> Command sent successfully.
237 03:41:35.861764 Returned 0 in 5 seconds
238 03:41:35.963120 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 03:41:35.964506 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 03:41:35.964989 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 03:41:35.965542 Setting prompt string to 'Starting depthcharge on Magolor...'
243 03:41:35.965907 Changing prompt to 'Starting depthcharge on Magolor...'
244 03:41:35.966262 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
245 03:41:35.967463 [Enter `^Ec?' for help]
246 03:41:37.094116
247 03:41:37.094657
248 03:41:37.104040 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
249 03:41:37.107131 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
250 03:41:37.113902 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
251 03:41:37.117104 CPU: AES supported, TXT NOT supported, VT supported
252 03:41:37.123784 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
253 03:41:37.126934 PCH: device id 4d87 (rev 01) is Jasperlake Super
254 03:41:37.130275 IGD: device id 4e55 (rev 01) is Jasperlake GT4
255 03:41:37.134081 VBOOT: Loading verstage.
256 03:41:37.141217 FMAP: Found "FLASH" version 1.1 at 0xc04000.
257 03:41:37.144466 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
258 03:41:37.151302 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
259 03:41:37.154476 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
260 03:41:37.158195
261 03:41:37.158612
262 03:41:37.167944 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
263 03:41:37.182715 Probing TPM: . done!
264 03:41:37.185889 TPM ready after 0 ms
265 03:41:37.189446 Connected to device vid:did:rid of 1ae0:0028:00
266 03:41:37.200607 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
267 03:41:37.207053 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
268 03:41:37.210421 Initialized TPM device CR50 revision 0
269 03:41:37.266489 tlcl_send_startup: Startup return code is 0
270 03:41:37.266985 TPM: setup succeeded
271 03:41:37.280847 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
272 03:41:37.294999 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
273 03:41:37.309568 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
274 03:41:37.319136 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
275 03:41:37.322509 Chrome EC: UHEPI supported
276 03:41:37.325870 Phase 1
277 03:41:37.328937 FMAP: area GBB found @ c05000 (12288 bytes)
278 03:41:37.336149 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
279 03:41:37.343160 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
280 03:41:37.346401 Recovery requested (1009000e)
281 03:41:37.349857 TPM: Extending digest for VBOOT: boot mode into PCR 0
282 03:41:37.361264 tlcl_extend: response is 0
283 03:41:37.368239 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
284 03:41:37.377620 tlcl_extend: response is 0
285 03:41:37.384362 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
286 03:41:37.387292 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
287 03:41:37.394227 BS: verstage times (exec / console): total (unknown) / 124 ms
288 03:41:37.397781
289 03:41:37.398392
290 03:41:37.408306 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
291 03:41:37.411304 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
292 03:41:37.418018 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
293 03:41:37.421579 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
294 03:41:37.424874 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
295 03:41:37.431772 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
296 03:41:37.434706 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
297 03:41:37.438214 TCO_STS: 0000 0001
298 03:41:37.441766 GEN_PMCON: d0015038 00002200
299 03:41:37.444763 GBLRST_CAUSE: 00000000 00000000
300 03:41:37.445210 prev_sleep_state 5
301 03:41:37.447966 Boot Count incremented to 6907
302 03:41:37.454851 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
303 03:41:37.458205 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
304 03:41:37.461769 Chrome EC: UHEPI supported
305 03:41:37.468463 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
306 03:41:37.475377 Probing TPM: done!
307 03:41:37.481975 Connected to device vid:did:rid of 1ae0:0028:00
308 03:41:37.491772 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
309 03:41:37.499516 Initialized TPM device CR50 revision 0
310 03:41:37.510245 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
311 03:41:37.517257 MRC: Hash idx 0x100b comparison successful.
312 03:41:37.517720 MRC cache found, size 5458
313 03:41:37.520887 bootmode is set to: 2
314 03:41:37.524554 SPD INDEX = 0
315 03:41:37.527892 CBFS: Found 'spd.bin' @0x40c40 size 0x600
316 03:41:37.528319 SPD: module type is LPDDR4X
317 03:41:37.534810 SPD: module part number is MT53E512M32D2NP-046 WT:E
318 03:41:37.541698 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
319 03:41:37.545113 SPD: device width 16 bits, bus width 32 bits
320 03:41:37.548454 SPD: module size is 4096 MB (per channel)
321 03:41:37.555121 meminit_channels: DRAM half-populated
322 03:41:37.636203 CBMEM:
323 03:41:37.639391 IMD: root @ 0x76fff000 254 entries.
324 03:41:37.642619 IMD: root @ 0x76ffec00 62 entries.
325 03:41:37.645889 FMAP: area RO_VPD found @ c00000 (16384 bytes)
326 03:41:37.652322 WARNING: RO_VPD is uninitialized or empty.
327 03:41:37.655426 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
328 03:41:37.659186 External stage cache:
329 03:41:37.662590 IMD: root @ 0x7b3ff000 254 entries.
330 03:41:37.665781 IMD: root @ 0x7b3fec00 62 entries.
331 03:41:37.675838 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
332 03:41:37.682566 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
333 03:41:37.688832 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
334 03:41:37.697559 MRC: 'RECOVERY_MRC_CACHE' does not need update.
335 03:41:37.703847 cse_lite: Skip switching to RW in the recovery path
336 03:41:37.704282 1 DIMMs found
337 03:41:37.704642 SMM Memory Map
338 03:41:37.707251 SMRAM : 0x7b000000 0x800000
339 03:41:37.713999 Subregion 0: 0x7b000000 0x200000
340 03:41:37.716793 Subregion 1: 0x7b200000 0x200000
341 03:41:37.720150 Subregion 2: 0x7b400000 0x400000
342 03:41:37.720234 top_of_ram = 0x77000000
343 03:41:37.726587 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
344 03:41:37.733384 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
345 03:41:37.736756 MTRR Range: Start=ff000000 End=0 (Size 1000000)
346 03:41:37.743337 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
347 03:41:37.749745 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
348 03:41:37.759893 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
349 03:41:37.763185 Processing 188 relocs. Offset value of 0x74c0e000
350 03:41:37.772516 BS: romstage times (exec / console): total (unknown) / 255 ms
351 03:41:37.776913
352 03:41:37.777104
353 03:41:37.786998 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
354 03:41:37.793576 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
355 03:41:37.796855 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
356 03:41:37.803329 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
357 03:41:37.859520 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
358 03:41:37.865973 Processing 4805 relocs. Offset value of 0x75da8000
359 03:41:37.872487 BS: postcar times (exec / console): total (unknown) / 42 ms
360 03:41:37.873036
361 03:41:37.873573
362 03:41:37.882646 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
363 03:41:37.883250 Normal boot
364 03:41:37.886671 EC returned error result code 3
365 03:41:37.890059 FW_CONFIG value is 0x204
366 03:41:37.893241 GENERIC: 0.0 disabled by fw_config
367 03:41:37.899889 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
368 03:41:37.903339 I2C: 00:10 disabled by fw_config
369 03:41:37.906219 I2C: 00:10 disabled by fw_config
370 03:41:37.909787 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
371 03:41:37.916420 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
372 03:41:37.919738 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
373 03:41:37.926119 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
374 03:41:37.932506 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
375 03:41:37.935941 I2C: 00:10 disabled by fw_config
376 03:41:37.939444 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
377 03:41:37.945822 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
378 03:41:37.949017 I2C: 00:1a disabled by fw_config
379 03:41:37.952282 I2C: 00:1a disabled by fw_config
380 03:41:37.958854 fw_config match found: AUDIO_AMP=UNPROVISIONED
381 03:41:37.961983 fw_config match found: AUDIO_AMP=UNPROVISIONED
382 03:41:37.965344 GENERIC: 0.0 disabled by fw_config
383 03:41:37.971955 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
384 03:41:37.978519 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
385 03:41:37.981720 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
386 03:41:37.988415 microcode: Update skipped, already up-to-date
387 03:41:37.991282 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
388 03:41:38.018293 Detected 2 core, 2 thread CPU.
389 03:41:38.021704 Setting up SMI for CPU
390 03:41:38.024953 IED base = 0x7b400000
391 03:41:38.025233 IED size = 0x00400000
392 03:41:38.028828 Will perform SMM setup.
393 03:41:38.032245 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
394 03:41:38.042397 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
395 03:41:38.045625 Processing 16 relocs. Offset value of 0x00030000
396 03:41:38.049107 Attempting to start 1 APs
397 03:41:38.051875 Waiting for 10ms after sending INIT.
398 03:41:38.068336 Waiting for 1st SIPI to complete...done.
399 03:41:38.068815 AP: slot 1 apic_id 2.
400 03:41:38.075170 Waiting for 2nd SIPI to complete...done.
401 03:41:38.081539 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
402 03:41:38.088359 Processing 13 relocs. Offset value of 0x00038000
403 03:41:38.088795 Unable to locate Global NVS
404 03:41:38.098694 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
405 03:41:38.101846 Installing permanent SMM handler to 0x7b000000
406 03:41:38.111809 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
407 03:41:38.114610 Processing 704 relocs. Offset value of 0x7b010000
408 03:41:38.124745 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
409 03:41:38.128465 Processing 13 relocs. Offset value of 0x7b008000
410 03:41:38.134565 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
411 03:41:38.137952 Unable to locate Global NVS
412 03:41:38.144427 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
413 03:41:38.147519 Clearing SMI status registers
414 03:41:38.148016 SMI_STS: PM1
415 03:41:38.150933 PM1_STS: PWRBTN
416 03:41:38.151362 TCO_STS: INTRD_DET
417 03:41:38.161127 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
418 03:41:38.164588 In relocation handler: CPU 0
419 03:41:38.167819 New SMBASE=0x7b000000 IEDBASE=0x7b400000
420 03:41:38.170857 Writing SMRR. base = 0x7b000006, mask=0xff800800
421 03:41:38.173957 Relocation complete.
422 03:41:38.180461 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
423 03:41:38.184276 In relocation handler: CPU 1
424 03:41:38.188061 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
425 03:41:38.191917 Writing SMRR. base = 0x7b000006, mask=0xff800800
426 03:41:38.195429 Relocation complete.
427 03:41:38.198374 Initializing CPU #0
428 03:41:38.201454 CPU: vendor Intel device 906c0
429 03:41:38.204728 CPU: family 06, model 9c, stepping 00
430 03:41:38.208303 Clearing out pending MCEs
431 03:41:38.208733 Setting up local APIC...
432 03:41:38.211369 apic_id: 0x00 done.
433 03:41:38.214494 Turbo is available but hidden
434 03:41:38.217911 Turbo is available and visible
435 03:41:38.221270 microcode: Update skipped, already up-to-date
436 03:41:38.224987 CPU #0 initialized
437 03:41:38.228354 Initializing CPU #1
438 03:41:38.231451 CPU: vendor Intel device 906c0
439 03:41:38.234591 CPU: family 06, model 9c, stepping 00
440 03:41:38.235048 Clearing out pending MCEs
441 03:41:38.238103 Setting up local APIC...
442 03:41:38.241222 apic_id: 0x02 done.
443 03:41:38.244316 microcode: Update skipped, already up-to-date
444 03:41:38.247590 CPU #1 initialized
445 03:41:38.250797 bsp_do_flight_plan done after 173 msecs.
446 03:41:38.254008 CPU: frequency set to 2800 MHz
447 03:41:38.257722 Enabling SMIs.
448 03:41:38.260697 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 85 / 287 ms
449 03:41:38.272735 Probing TPM: done!
450 03:41:38.279359 Connected to device vid:did:rid of 1ae0:0028:00
451 03:41:38.289411 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
452 03:41:38.292573 Initialized TPM device CR50 revision 0
453 03:41:38.299065 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
454 03:41:38.302202 Found a VBT of 7680 bytes after decompression
455 03:41:38.309091 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
456 03:41:38.344539 Detected 2 core, 2 thread CPU.
457 03:41:38.347679 Detected 2 core, 2 thread CPU.
458 03:41:38.709795 Display FSP Version Info HOB
459 03:41:38.713147 Reference Code - CPU = 8.7.22.30
460 03:41:38.716325 uCode Version = 24.0.0.1f
461 03:41:38.719962 TXT ACM version = ff.ff.ff.ffff
462 03:41:38.723085 Reference Code - ME = 8.7.22.30
463 03:41:38.726293 MEBx version = 0.0.0.0
464 03:41:38.729378 ME Firmware Version = Consumer SKU
465 03:41:38.733032 Reference Code - PCH = 8.7.22.30
466 03:41:38.736343 PCH-CRID Status = Disabled
467 03:41:38.739499 PCH-CRID Original Value = ff.ff.ff.ffff
468 03:41:38.742993 PCH-CRID New Value = ff.ff.ff.ffff
469 03:41:38.746275 OPROM - RST - RAID = ff.ff.ff.ffff
470 03:41:38.749175 PCH Hsio Version = 4.0.0.0
471 03:41:38.752482 Reference Code - SA - System Agent = 8.7.22.30
472 03:41:38.755834 Reference Code - MRC = 0.0.4.68
473 03:41:38.759184 SA - PCIe Version = 8.7.22.30
474 03:41:38.762914 SA-CRID Status = Disabled
475 03:41:38.766832 SA-CRID Original Value = 0.0.0.0
476 03:41:38.767118 SA-CRID New Value = 0.0.0.0
477 03:41:38.770205 OPROM - VBIOS = ff.ff.ff.ffff
478 03:41:38.777299 IO Manageability Engine FW Version = ff.ff.ff.ffff
479 03:41:38.780896 PHY Build Version = ff.ff.ff.ffff
480 03:41:38.784195 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
481 03:41:38.791466 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
482 03:41:38.794525 ITSS IRQ Polarities Before:
483 03:41:38.794748 IPC0: 0xffffffff
484 03:41:38.797548 IPC1: 0xffffffff
485 03:41:38.797732 IPC2: 0xffffffff
486 03:41:38.801112 IPC3: 0xffffffff
487 03:41:38.804530 ITSS IRQ Polarities After:
488 03:41:38.804842 IPC0: 0xffffffff
489 03:41:38.807921 IPC1: 0xffffffff
490 03:41:38.808276 IPC2: 0xffffffff
491 03:41:38.811154 IPC3: 0xffffffff
492 03:41:38.821163 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
493 03:41:38.827506 BS: BS_DEV_INIT_CHIPS run times (exec / console): 404 / 156 ms
494 03:41:38.831052 Enumerating buses...
495 03:41:38.834081 Show all devs... Before device enumeration.
496 03:41:38.837353 Root Device: enabled 1
497 03:41:38.840908 CPU_CLUSTER: 0: enabled 1
498 03:41:38.841330 DOMAIN: 0000: enabled 1
499 03:41:38.844311 PCI: 00:00.0: enabled 1
500 03:41:38.847387 PCI: 00:02.0: enabled 1
501 03:41:38.850756 PCI: 00:04.0: enabled 1
502 03:41:38.851326 PCI: 00:05.0: enabled 1
503 03:41:38.854336 PCI: 00:09.0: enabled 0
504 03:41:38.857577 PCI: 00:12.6: enabled 0
505 03:41:38.860655 PCI: 00:14.0: enabled 1
506 03:41:38.861122 PCI: 00:14.1: enabled 0
507 03:41:38.864025 PCI: 00:14.2: enabled 0
508 03:41:38.867159 PCI: 00:14.3: enabled 1
509 03:41:38.870450 PCI: 00:14.5: enabled 1
510 03:41:38.870873 PCI: 00:15.0: enabled 1
511 03:41:38.873856 PCI: 00:15.1: enabled 1
512 03:41:38.877006 PCI: 00:15.2: enabled 1
513 03:41:38.877431 PCI: 00:15.3: enabled 1
514 03:41:38.880298 PCI: 00:16.0: enabled 1
515 03:41:38.883567 PCI: 00:16.1: enabled 0
516 03:41:38.887397 PCI: 00:16.4: enabled 0
517 03:41:38.887975 PCI: 00:16.5: enabled 0
518 03:41:38.890360 PCI: 00:17.0: enabled 0
519 03:41:38.893666 PCI: 00:19.0: enabled 1
520 03:41:38.896985 PCI: 00:19.1: enabled 0
521 03:41:38.897412 PCI: 00:19.2: enabled 1
522 03:41:38.900412 PCI: 00:1a.0: enabled 1
523 03:41:38.903559 PCI: 00:1c.0: enabled 0
524 03:41:38.906677 PCI: 00:1c.1: enabled 0
525 03:41:38.907145 PCI: 00:1c.2: enabled 0
526 03:41:38.910136 PCI: 00:1c.3: enabled 0
527 03:41:38.913578 PCI: 00:1c.4: enabled 0
528 03:41:38.916643 PCI: 00:1c.5: enabled 0
529 03:41:38.917118 PCI: 00:1c.6: enabled 0
530 03:41:38.920202 PCI: 00:1c.7: enabled 1
531 03:41:38.923296 PCI: 00:1e.0: enabled 0
532 03:41:38.923723 PCI: 00:1e.1: enabled 0
533 03:41:38.926592 PCI: 00:1e.2: enabled 1
534 03:41:38.929929 PCI: 00:1e.3: enabled 0
535 03:41:38.933449 PCI: 00:1f.0: enabled 1
536 03:41:38.933890 PCI: 00:1f.1: enabled 1
537 03:41:38.937125 PCI: 00:1f.2: enabled 1
538 03:41:38.940199 PCI: 00:1f.3: enabled 1
539 03:41:38.943433 PCI: 00:1f.4: enabled 0
540 03:41:38.943990 PCI: 00:1f.5: enabled 1
541 03:41:38.946491 PCI: 00:1f.7: enabled 0
542 03:41:38.950047 GENERIC: 0.0: enabled 1
543 03:41:38.953080 GENERIC: 0.0: enabled 1
544 03:41:38.953549 USB0 port 0: enabled 1
545 03:41:38.956353 GENERIC: 0.0: enabled 1
546 03:41:38.959608 I2C: 00:2c: enabled 1
547 03:41:38.960034 I2C: 00:15: enabled 1
548 03:41:38.962980 GENERIC: 0.0: enabled 0
549 03:41:38.966189 I2C: 00:15: enabled 1
550 03:41:38.966616 I2C: 00:10: enabled 0
551 03:41:38.969997 I2C: 00:10: enabled 0
552 03:41:38.973186 I2C: 00:2c: enabled 1
553 03:41:38.973770 I2C: 00:40: enabled 1
554 03:41:38.976170 I2C: 00:10: enabled 1
555 03:41:38.979449 I2C: 00:39: enabled 1
556 03:41:38.982774 I2C: 00:36: enabled 1
557 03:41:38.983433 I2C: 00:10: enabled 0
558 03:41:38.986205 I2C: 00:0c: enabled 1
559 03:41:38.989447 I2C: 00:50: enabled 1
560 03:41:38.989933 I2C: 00:1a: enabled 1
561 03:41:38.992804 I2C: 00:1a: enabled 0
562 03:41:38.995658 I2C: 00:1a: enabled 0
563 03:41:38.996083 I2C: 00:28: enabled 1
564 03:41:38.999268 I2C: 00:29: enabled 1
565 03:41:39.002325 PCI: 00:00.0: enabled 1
566 03:41:39.002799 SPI: 00: enabled 1
567 03:41:39.005845 PNP: 0c09.0: enabled 1
568 03:41:39.009219 GENERIC: 0.0: enabled 0
569 03:41:39.009697 USB2 port 0: enabled 1
570 03:41:39.012932 USB2 port 1: enabled 1
571 03:41:39.015568 USB2 port 2: enabled 1
572 03:41:39.019097 USB2 port 3: enabled 1
573 03:41:39.019549 USB2 port 4: enabled 0
574 03:41:39.022351 USB2 port 5: enabled 1
575 03:41:39.025425 USB2 port 6: enabled 0
576 03:41:39.025894 USB2 port 7: enabled 1
577 03:41:39.029155 USB3 port 0: enabled 1
578 03:41:39.032376 USB3 port 1: enabled 1
579 03:41:39.032901 USB3 port 2: enabled 1
580 03:41:39.035625 USB3 port 3: enabled 1
581 03:41:39.038927 APIC: 00: enabled 1
582 03:41:39.039451 APIC: 02: enabled 1
583 03:41:39.041988 Compare with tree...
584 03:41:39.045751 Root Device: enabled 1
585 03:41:39.048618 CPU_CLUSTER: 0: enabled 1
586 03:41:39.049169 APIC: 00: enabled 1
587 03:41:39.051858 APIC: 02: enabled 1
588 03:41:39.055251 DOMAIN: 0000: enabled 1
589 03:41:39.058405 PCI: 00:00.0: enabled 1
590 03:41:39.058919 PCI: 00:02.0: enabled 1
591 03:41:39.061511 PCI: 00:04.0: enabled 1
592 03:41:39.065094 GENERIC: 0.0: enabled 1
593 03:41:39.068465 PCI: 00:05.0: enabled 1
594 03:41:39.071684 GENERIC: 0.0: enabled 1
595 03:41:39.072110 PCI: 00:09.0: enabled 0
596 03:41:39.075018 PCI: 00:12.6: enabled 0
597 03:41:39.078249 PCI: 00:14.0: enabled 1
598 03:41:39.081559 USB0 port 0: enabled 1
599 03:41:39.085039 USB2 port 0: enabled 1
600 03:41:39.085461 USB2 port 1: enabled 1
601 03:41:39.088438 USB2 port 2: enabled 1
602 03:41:39.091513 USB2 port 3: enabled 1
603 03:41:39.095096 USB2 port 4: enabled 0
604 03:41:39.098247 USB2 port 5: enabled 1
605 03:41:39.101951 USB2 port 6: enabled 0
606 03:41:39.102482 USB2 port 7: enabled 1
607 03:41:39.104948 USB3 port 0: enabled 1
608 03:41:39.108620 USB3 port 1: enabled 1
609 03:41:39.111803 USB3 port 2: enabled 1
610 03:41:39.114580 USB3 port 3: enabled 1
611 03:41:39.115004 PCI: 00:14.1: enabled 0
612 03:41:39.117860 PCI: 00:14.2: enabled 0
613 03:41:39.121217 PCI: 00:14.3: enabled 1
614 03:41:39.124675 GENERIC: 0.0: enabled 1
615 03:41:39.127978 PCI: 00:14.5: enabled 1
616 03:41:39.128407 PCI: 00:15.0: enabled 1
617 03:41:39.130914 I2C: 00:2c: enabled 1
618 03:41:39.134396 I2C: 00:15: enabled 1
619 03:41:39.137634 PCI: 00:15.1: enabled 1
620 03:41:39.141072 PCI: 00:15.2: enabled 1
621 03:41:39.141651 GENERIC: 0.0: enabled 0
622 03:41:39.144317 I2C: 00:15: enabled 1
623 03:41:39.147529 I2C: 00:10: enabled 0
624 03:41:39.150946 I2C: 00:10: enabled 0
625 03:41:39.151375 I2C: 00:2c: enabled 1
626 03:41:39.154284 I2C: 00:40: enabled 1
627 03:41:39.157559 I2C: 00:10: enabled 1
628 03:41:39.160803 I2C: 00:39: enabled 1
629 03:41:39.164573 PCI: 00:15.3: enabled 1
630 03:41:39.165111 I2C: 00:36: enabled 1
631 03:41:39.167654 I2C: 00:10: enabled 0
632 03:41:39.170600 I2C: 00:0c: enabled 1
633 03:41:39.174038 I2C: 00:50: enabled 1
634 03:41:39.174466 PCI: 00:16.0: enabled 1
635 03:41:39.177553 PCI: 00:16.1: enabled 0
636 03:41:39.180651 PCI: 00:16.4: enabled 0
637 03:41:39.183901 PCI: 00:16.5: enabled 0
638 03:41:39.187466 PCI: 00:17.0: enabled 0
639 03:41:39.187996 PCI: 00:19.0: enabled 1
640 03:41:39.190726 I2C: 00:1a: enabled 1
641 03:41:39.194241 I2C: 00:1a: enabled 0
642 03:41:39.197135 I2C: 00:1a: enabled 0
643 03:41:39.197628 I2C: 00:28: enabled 1
644 03:41:39.200459 I2C: 00:29: enabled 1
645 03:41:39.204218 PCI: 00:19.1: enabled 0
646 03:41:39.207327 PCI: 00:19.2: enabled 1
647 03:41:39.210394 PCI: 00:1a.0: enabled 1
648 03:41:39.210934 PCI: 00:1e.0: enabled 0
649 03:41:39.213768 PCI: 00:1e.1: enabled 0
650 03:41:39.217227 PCI: 00:1e.2: enabled 1
651 03:41:39.220202 SPI: 00: enabled 1
652 03:41:39.220633 PCI: 00:1e.3: enabled 0
653 03:41:39.223959 PCI: 00:1f.0: enabled 1
654 03:41:39.226887 PNP: 0c09.0: enabled 1
655 03:41:39.230226 PCI: 00:1f.1: enabled 1
656 03:41:39.233639 PCI: 00:1f.2: enabled 1
657 03:41:39.234074 PCI: 00:1f.3: enabled 1
658 03:41:39.236684 GENERIC: 0.0: enabled 0
659 03:41:39.240013 PCI: 00:1f.4: enabled 0
660 03:41:39.243267 PCI: 00:1f.5: enabled 1
661 03:41:39.246891 PCI: 00:1f.7: enabled 0
662 03:41:39.247421 Root Device scanning...
663 03:41:39.250160 scan_static_bus for Root Device
664 03:41:39.253123 CPU_CLUSTER: 0 enabled
665 03:41:39.256447 DOMAIN: 0000 enabled
666 03:41:39.256873 DOMAIN: 0000 scanning...
667 03:41:39.259906 PCI: pci_scan_bus for bus 00
668 03:41:39.263257 PCI: 00:00.0 [8086/0000] ops
669 03:41:39.266620 PCI: 00:00.0 [8086/4e22] enabled
670 03:41:39.270030 PCI: 00:02.0 [8086/0000] bus ops
671 03:41:39.273230 PCI: 00:02.0 [8086/4e55] enabled
672 03:41:39.276643 PCI: 00:04.0 [8086/0000] bus ops
673 03:41:39.279876 PCI: 00:04.0 [8086/4e03] enabled
674 03:41:39.283115 PCI: 00:05.0 [8086/0000] bus ops
675 03:41:39.286355 PCI: 00:05.0 [8086/4e19] enabled
676 03:41:39.289943 PCI: 00:08.0 [8086/4e11] enabled
677 03:41:39.293467 PCI: 00:14.0 [8086/0000] bus ops
678 03:41:39.296693 PCI: 00:14.0 [8086/4ded] enabled
679 03:41:39.299649 PCI: 00:14.2 [8086/4def] disabled
680 03:41:39.303324 PCI: 00:14.3 [8086/0000] bus ops
681 03:41:39.306432 PCI: 00:14.3 [8086/4df0] enabled
682 03:41:39.310090 PCI: 00:14.5 [8086/0000] ops
683 03:41:39.313002 PCI: 00:14.5 [8086/4df8] enabled
684 03:41:39.316394 PCI: 00:15.0 [8086/0000] bus ops
685 03:41:39.319926 PCI: 00:15.0 [8086/4de8] enabled
686 03:41:39.322623 PCI: 00:15.1 [8086/0000] bus ops
687 03:41:39.326162 PCI: 00:15.1 [8086/4de9] enabled
688 03:41:39.329378 PCI: 00:15.2 [8086/0000] bus ops
689 03:41:39.332475 PCI: 00:15.2 [8086/4dea] enabled
690 03:41:39.336292 PCI: 00:15.3 [8086/0000] bus ops
691 03:41:39.339537 PCI: 00:15.3 [8086/4deb] enabled
692 03:41:39.342588 PCI: 00:16.0 [8086/0000] ops
693 03:41:39.345966 PCI: 00:16.0 [8086/4de0] enabled
694 03:41:39.349291 PCI: 00:19.0 [8086/0000] bus ops
695 03:41:39.352816 PCI: 00:19.0 [8086/4dc5] enabled
696 03:41:39.355881 PCI: 00:19.2 [8086/0000] ops
697 03:41:39.359289 PCI: 00:19.2 [8086/4dc7] enabled
698 03:41:39.363066 PCI: 00:1a.0 [8086/0000] ops
699 03:41:39.365816 PCI: 00:1a.0 [8086/4dc4] enabled
700 03:41:39.369222 PCI: 00:1e.0 [8086/0000] ops
701 03:41:39.372775 PCI: 00:1e.0 [8086/4da8] disabled
702 03:41:39.375862 PCI: 00:1e.2 [8086/0000] bus ops
703 03:41:39.379239 PCI: 00:1e.2 [8086/4daa] enabled
704 03:41:39.382160 PCI: 00:1f.0 [8086/0000] bus ops
705 03:41:39.385346 PCI: 00:1f.0 [8086/4d87] enabled
706 03:41:39.391931 PCI: Static device PCI: 00:1f.1 not found, disabling it.
707 03:41:39.392361 RTC Init
708 03:41:39.395315 Set power on after power failure.
709 03:41:39.398472 Disabling Deep S3
710 03:41:39.398897 Disabling Deep S3
711 03:41:39.402031 Disabling Deep S4
712 03:41:39.402455 Disabling Deep S4
713 03:41:39.405085 Disabling Deep S5
714 03:41:39.405586 Disabling Deep S5
715 03:41:39.408390 PCI: 00:1f.2 [0000/0000] hidden
716 03:41:39.412515 PCI: 00:1f.3 [8086/0000] bus ops
717 03:41:39.415143 PCI: 00:1f.3 [8086/4dc8] enabled
718 03:41:39.418370 PCI: 00:1f.5 [8086/0000] bus ops
719 03:41:39.421633 PCI: 00:1f.5 [8086/4da4] enabled
720 03:41:39.424742 PCI: Leftover static devices:
721 03:41:39.428310 PCI: 00:12.6
722 03:41:39.428904 PCI: 00:09.0
723 03:41:39.431413 PCI: 00:14.1
724 03:41:39.431837 PCI: 00:16.1
725 03:41:39.432174 PCI: 00:16.4
726 03:41:39.434833 PCI: 00:16.5
727 03:41:39.435258 PCI: 00:17.0
728 03:41:39.438012 PCI: 00:19.1
729 03:41:39.438431 PCI: 00:1e.1
730 03:41:39.438765 PCI: 00:1e.3
731 03:41:39.442157 PCI: 00:1f.1
732 03:41:39.442620 PCI: 00:1f.4
733 03:41:39.442957 PCI: 00:1f.7
734 03:41:39.445574 PCI: Check your devicetree.cb.
735 03:41:39.449269 PCI: 00:02.0 scanning...
736 03:41:39.452472 scan_generic_bus for PCI: 00:02.0
737 03:41:39.455675 scan_generic_bus for PCI: 00:02.0 done
738 03:41:39.462186 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
739 03:41:39.462619 PCI: 00:04.0 scanning...
740 03:41:39.469165 scan_generic_bus for PCI: 00:04.0
741 03:41:39.469734 GENERIC: 0.0 enabled
742 03:41:39.475927 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
743 03:41:39.479527 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
744 03:41:39.482518 PCI: 00:05.0 scanning...
745 03:41:39.485505 scan_generic_bus for PCI: 00:05.0
746 03:41:39.489237 GENERIC: 0.0 enabled
747 03:41:39.495861 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
748 03:41:39.498934 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
749 03:41:39.502236 PCI: 00:14.0 scanning...
750 03:41:39.505256 scan_static_bus for PCI: 00:14.0
751 03:41:39.508727 USB0 port 0 enabled
752 03:41:39.509161 USB0 port 0 scanning...
753 03:41:39.512240 scan_static_bus for USB0 port 0
754 03:41:39.515284 USB2 port 0 enabled
755 03:41:39.518822 USB2 port 1 enabled
756 03:41:39.519249 USB2 port 2 enabled
757 03:41:39.522204 USB2 port 3 enabled
758 03:41:39.525417 USB2 port 4 disabled
759 03:41:39.525991 USB2 port 5 enabled
760 03:41:39.528718 USB2 port 6 disabled
761 03:41:39.529140 USB2 port 7 enabled
762 03:41:39.531843 USB3 port 0 enabled
763 03:41:39.535197 USB3 port 1 enabled
764 03:41:39.535621 USB3 port 2 enabled
765 03:41:39.538851 USB3 port 3 enabled
766 03:41:39.542243 USB2 port 0 scanning...
767 03:41:39.545647 scan_static_bus for USB2 port 0
768 03:41:39.548633 scan_static_bus for USB2 port 0 done
769 03:41:39.551981 scan_bus: bus USB2 port 0 finished in 6 msecs
770 03:41:39.555153 USB2 port 1 scanning...
771 03:41:39.558181 scan_static_bus for USB2 port 1
772 03:41:39.561573 scan_static_bus for USB2 port 1 done
773 03:41:39.564736 scan_bus: bus USB2 port 1 finished in 6 msecs
774 03:41:39.568020 USB2 port 2 scanning...
775 03:41:39.571288 scan_static_bus for USB2 port 2
776 03:41:39.574875 scan_static_bus for USB2 port 2 done
777 03:41:39.581562 scan_bus: bus USB2 port 2 finished in 6 msecs
778 03:41:39.582084 USB2 port 3 scanning...
779 03:41:39.584661 scan_static_bus for USB2 port 3
780 03:41:39.591285 scan_static_bus for USB2 port 3 done
781 03:41:39.594696 scan_bus: bus USB2 port 3 finished in 6 msecs
782 03:41:39.598017 USB2 port 5 scanning...
783 03:41:39.600590 scan_static_bus for USB2 port 5
784 03:41:39.603988 scan_static_bus for USB2 port 5 done
785 03:41:39.607354 scan_bus: bus USB2 port 5 finished in 6 msecs
786 03:41:39.610618 USB2 port 7 scanning...
787 03:41:39.614207 scan_static_bus for USB2 port 7
788 03:41:39.617432 scan_static_bus for USB2 port 7 done
789 03:41:39.620823 scan_bus: bus USB2 port 7 finished in 6 msecs
790 03:41:39.623870 USB3 port 0 scanning...
791 03:41:39.627183 scan_static_bus for USB3 port 0
792 03:41:39.630874 scan_static_bus for USB3 port 0 done
793 03:41:39.637197 scan_bus: bus USB3 port 0 finished in 6 msecs
794 03:41:39.637436 USB3 port 1 scanning...
795 03:41:39.640782 scan_static_bus for USB3 port 1
796 03:41:39.647394 scan_static_bus for USB3 port 1 done
797 03:41:39.650475 scan_bus: bus USB3 port 1 finished in 6 msecs
798 03:41:39.653872 USB3 port 2 scanning...
799 03:41:39.657303 scan_static_bus for USB3 port 2
800 03:41:39.660688 scan_static_bus for USB3 port 2 done
801 03:41:39.663834 scan_bus: bus USB3 port 2 finished in 6 msecs
802 03:41:39.667289 USB3 port 3 scanning...
803 03:41:39.670426 scan_static_bus for USB3 port 3
804 03:41:39.673993 scan_static_bus for USB3 port 3 done
805 03:41:39.677075 scan_bus: bus USB3 port 3 finished in 6 msecs
806 03:41:39.683354 scan_static_bus for USB0 port 0 done
807 03:41:39.686682 scan_bus: bus USB0 port 0 finished in 172 msecs
808 03:41:39.690002 scan_static_bus for PCI: 00:14.0 done
809 03:41:39.696715 scan_bus: bus PCI: 00:14.0 finished in 188 msecs
810 03:41:39.696959 PCI: 00:14.3 scanning...
811 03:41:39.700371 scan_static_bus for PCI: 00:14.3
812 03:41:39.703631 GENERIC: 0.0 enabled
813 03:41:39.706986 scan_static_bus for PCI: 00:14.3 done
814 03:41:39.713805 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
815 03:41:39.714307 PCI: 00:15.0 scanning...
816 03:41:39.716797 scan_static_bus for PCI: 00:15.0
817 03:41:39.720207 I2C: 00:2c enabled
818 03:41:39.723449 I2C: 00:15 enabled
819 03:41:39.726656 scan_static_bus for PCI: 00:15.0 done
820 03:41:39.729986 scan_bus: bus PCI: 00:15.0 finished in 10 msecs
821 03:41:39.733331 PCI: 00:15.1 scanning...
822 03:41:39.736636 scan_static_bus for PCI: 00:15.1
823 03:41:39.740250 scan_static_bus for PCI: 00:15.1 done
824 03:41:39.746816 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
825 03:41:39.747305 PCI: 00:15.2 scanning...
826 03:41:39.749824 scan_static_bus for PCI: 00:15.2
827 03:41:39.753229 GENERIC: 0.0 disabled
828 03:41:39.756565 I2C: 00:15 enabled
829 03:41:39.756994 I2C: 00:10 disabled
830 03:41:39.759954 I2C: 00:10 disabled
831 03:41:39.763717 I2C: 00:2c enabled
832 03:41:39.764250 I2C: 00:40 enabled
833 03:41:39.766684 I2C: 00:10 enabled
834 03:41:39.767114 I2C: 00:39 enabled
835 03:41:39.770067 scan_static_bus for PCI: 00:15.2 done
836 03:41:39.776574 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
837 03:41:39.779774 PCI: 00:15.3 scanning...
838 03:41:39.782986 scan_static_bus for PCI: 00:15.3
839 03:41:39.783414 I2C: 00:36 enabled
840 03:41:39.786503 I2C: 00:10 disabled
841 03:41:39.789711 I2C: 00:0c enabled
842 03:41:39.790143 I2C: 00:50 enabled
843 03:41:39.793053 scan_static_bus for PCI: 00:15.3 done
844 03:41:39.799700 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
845 03:41:39.800236 PCI: 00:19.0 scanning...
846 03:41:39.802870 scan_static_bus for PCI: 00:19.0
847 03:41:39.806296 I2C: 00:1a enabled
848 03:41:39.809667 I2C: 00:1a disabled
849 03:41:39.810164 I2C: 00:1a disabled
850 03:41:39.812910 I2C: 00:28 enabled
851 03:41:39.813337 I2C: 00:29 enabled
852 03:41:39.819599 scan_static_bus for PCI: 00:19.0 done
853 03:41:39.822668 scan_bus: bus PCI: 00:19.0 finished in 16 msecs
854 03:41:39.826164 PCI: 00:1e.2 scanning...
855 03:41:39.829557 scan_generic_bus for PCI: 00:1e.2
856 03:41:39.829991 SPI: 00 enabled
857 03:41:39.836243 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
858 03:41:39.842510 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
859 03:41:50.902126 PCI: 00:1f.0 scanning...
860 03:41:50.902967 scan_static_bus for PCI: 00:1f.0
861 03:41:50.903342 PNP: 0c09.0 enabled
862 03:41:50.903665 PNP: 0c09.0 scanning...
863 03:41:50.903971 scan_static_bus for PNP: 0c09.0
864 03:41:50.904271 scan_static_bus for PNP: 0c09.0 done
865 03:41:50.904563 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
866 03:41:50.904852 scan_static_bus for PCI: 00:1f.0 done
867 03:41:50.905138 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
868 03:41:50.905424 PCI: 00:1f.3 scanning...
869 03:41:50.905744 scan_static_bus for PCI: 00:1f.3
870 03:41:50.906124 GENERIC: 0.0 disabled
871 03:41:50.906424 scan_static_bus for PCI: 00:1f.3 done
872 03:41:50.906708 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
873 03:41:50.906988 PCI: 00:1f.5 scanning...
874 03:41:50.907266 scan_generic_bus for PCI: 00:1f.5
875 03:41:50.907541 scan_generic_bus for PCI: 00:1f.5 done
876 03:41:50.907816 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
877 03:41:50.908093 scan_bus: bus DOMAIN: 0000 finished in 645 msecs
878 03:41:50.908366 scan_static_bus for Root Device done
879 03:41:50.908641 scan_bus: bus Root Device finished in 664 msecs
880 03:41:50.908915 done
881 03:41:50.909189 BS: BS_DEV_ENUMERATE run times (exec / console): 7 / 1083 ms
882 03:41:50.909597 Chrome EC: UHEPI supported
883 03:41:50.909892 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
884 03:41:50.910172 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
885 03:41:50.910449 SPI flash protection: WPSW=0 SRP0=0
886 03:41:50.910725 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
887 03:41:50.911001 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
888 03:41:50.911275 found VGA at PCI: 00:02.0
889 03:41:50.911548 Setting up VGA for PCI: 00:02.0
890 03:41:50.911821 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
891 03:41:50.912094 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
892 03:41:50.912365 Allocating resources...
893 03:41:50.912652 Reading resources...
894 03:41:50.912937 Root Device read_resources bus 0 link: 0
895 03:41:50.913212 CPU_CLUSTER: 0 read_resources bus 0 link: 0
896 03:41:50.913523 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
897 03:41:50.913829 DOMAIN: 0000 read_resources bus 0 link: 0
898 03:41:50.914105 PCI: 00:04.0 read_resources bus 1 link: 0
899 03:41:50.914378 PCI: 00:04.0 read_resources bus 1 link: 0 done
900 03:41:50.914652 PCI: 00:05.0 read_resources bus 2 link: 0
901 03:41:50.914924 PCI: 00:05.0 read_resources bus 2 link: 0 done
902 03:41:50.915197 PCI: 00:14.0 read_resources bus 0 link: 0
903 03:41:50.915471 USB0 port 0 read_resources bus 0 link: 0
904 03:41:50.915745 USB0 port 0 read_resources bus 0 link: 0 done
905 03:41:50.916023 PCI: 00:14.0 read_resources bus 0 link: 0 done
906 03:41:50.916314 PCI: 00:14.3 read_resources bus 0 link: 0
907 03:41:50.916588 PCI: 00:14.3 read_resources bus 0 link: 0 done
908 03:41:50.916861 PCI: 00:15.0 read_resources bus 0 link: 0
909 03:41:50.917135 PCI: 00:15.0 read_resources bus 0 link: 0 done
910 03:41:50.917420 PCI: 00:15.2 read_resources bus 0 link: 0
911 03:41:50.917744 PCI: 00:15.2 read_resources bus 0 link: 0 done
912 03:41:50.917962 PCI: 00:15.3 read_resources bus 0 link: 0
913 03:41:50.918155 PCI: 00:15.3 read_resources bus 0 link: 0 done
914 03:41:50.918348 PCI: 00:19.0 read_resources bus 0 link: 0
915 03:41:50.918541 PCI: 00:19.0 read_resources bus 0 link: 0 done
916 03:41:50.918734 PCI: 00:1e.2 read_resources bus 3 link: 0
917 03:41:50.918928 PCI: 00:1e.2 read_resources bus 3 link: 0 done
918 03:41:50.919121 PCI: 00:1f.0 read_resources bus 0 link: 0
919 03:41:50.919316 PCI: 00:1f.0 read_resources bus 0 link: 0 done
920 03:41:50.919532 PCI: 00:1f.3 read_resources bus 0 link: 0
921 03:41:50.919731 PCI: 00:1f.3 read_resources bus 0 link: 0 done
922 03:41:50.919925 DOMAIN: 0000 read_resources bus 0 link: 0 done
923 03:41:50.920120 Root Device read_resources bus 0 link: 0 done
924 03:41:50.920314 Done reading resources.
925 03:41:50.920506 Show resources in subtree (Root Device)...After reading.
926 03:41:50.920699 Root Device child on link 0 CPU_CLUSTER: 0
927 03:41:50.920896 CPU_CLUSTER: 0 child on link 0 APIC: 00
928 03:41:50.921090 APIC: 00
929 03:41:50.921281 APIC: 02
930 03:41:50.921488 DOMAIN: 0000 child on link 0 PCI: 00:00.0
931 03:41:50.921695 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
932 03:41:50.921917 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
933 03:41:50.922153 PCI: 00:00.0
934 03:41:50.922352 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
935 03:41:50.922551 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
936 03:41:50.922779 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
937 03:41:50.922932 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
938 03:41:50.923081 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
939 03:41:50.923228 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
940 03:41:50.923376 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
941 03:41:50.923524 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
942 03:41:50.923671 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
943 03:41:50.924108 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
944 03:41:50.924316 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
945 03:41:50.924475 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
946 03:41:50.924625 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
947 03:41:50.924795 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
948 03:41:50.925017 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
949 03:41:50.925174 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
950 03:41:50.925325 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
951 03:41:50.925497 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
952 03:41:50.925659 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
953 03:41:50.925808 PCI: 00:02.0
954 03:41:50.925957 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
955 03:41:50.926147 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
956 03:41:50.926298 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
957 03:41:50.926446 PCI: 00:04.0 child on link 0 GENERIC: 0.0
958 03:41:50.926594 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
959 03:41:50.926743 GENERIC: 0.0
960 03:41:50.926890 PCI: 00:05.0 child on link 0 GENERIC: 0.0
961 03:41:50.927036 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
962 03:41:50.927186 GENERIC: 0.0
963 03:41:50.927332 PCI: 00:08.0
964 03:41:50.927478 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
965 03:41:50.927628 PCI: 00:14.0 child on link 0 USB0 port 0
966 03:41:50.927787 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
967 03:41:50.927906 USB0 port 0 child on link 0 USB2 port 0
968 03:41:50.928022 USB2 port 0
969 03:41:50.928138 USB2 port 1
970 03:41:50.928254 USB2 port 2
971 03:41:50.928369 USB2 port 3
972 03:41:50.928485 USB2 port 4
973 03:41:50.928600 USB2 port 5
974 03:41:50.928716 USB2 port 6
975 03:41:50.928831 USB2 port 7
976 03:41:50.928975 USB3 port 0
977 03:41:50.929094 USB3 port 1
978 03:41:50.929210 USB3 port 2
979 03:41:50.929326 USB3 port 3
980 03:41:50.929443 PCI: 00:14.2
981 03:41:50.929581 PCI: 00:14.3 child on link 0 GENERIC: 0.0
982 03:41:50.929702 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
983 03:41:50.929821 GENERIC: 0.0
984 03:41:50.929939 PCI: 00:14.5
985 03:41:50.930058 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
986 03:41:50.930177 PCI: 00:15.0 child on link 0 I2C: 00:2c
987 03:41:50.930296 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
988 03:41:50.930415 I2C: 00:2c
989 03:41:50.930533 I2C: 00:15
990 03:41:50.930650 PCI: 00:15.1
991 03:41:50.930767 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
992 03:41:50.930886 PCI: 00:15.2 child on link 0 GENERIC: 0.0
993 03:41:50.931005 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
994 03:41:50.931124 GENERIC: 0.0
995 03:41:50.931241 I2C: 00:15
996 03:41:50.931358 I2C: 00:10
997 03:41:50.931475 I2C: 00:10
998 03:41:50.931592 I2C: 00:2c
999 03:41:50.931708 I2C: 00:40
1000 03:41:50.931825 I2C: 00:10
1001 03:41:50.931941 I2C: 00:39
1002 03:41:50.932058 PCI: 00:15.3 child on link 0 I2C: 00:36
1003 03:41:50.932175 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1004 03:41:50.932294 I2C: 00:36
1005 03:41:50.932411 I2C: 00:10
1006 03:41:50.932528 I2C: 00:0c
1007 03:41:50.932644 I2C: 00:50
1008 03:41:50.932761 PCI: 00:16.0
1009 03:41:50.932878 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1010 03:41:50.932979 PCI: 00:19.0 child on link 0 I2C: 00:1a
1011 03:41:50.933079 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1012 03:41:50.933179 I2C: 00:1a
1013 03:41:50.933278 I2C: 00:1a
1014 03:41:50.933376 I2C: 00:1a
1015 03:41:50.933473 I2C: 00:28
1016 03:41:50.933585 I2C: 00:29
1017 03:41:50.933684 PCI: 00:19.2
1018 03:41:50.933782 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1019 03:41:50.933883 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1020 03:41:50.933982 PCI: 00:1a.0
1021 03:41:50.934081 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1022 03:41:50.934179 PCI: 00:1e.0
1023 03:41:50.934277 PCI: 00:1e.2 child on link 0 SPI: 00
1024 03:41:50.934377 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1025 03:41:50.934488 SPI: 00
1026 03:41:50.934590 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1027 03:41:50.934917 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1028 03:41:50.935032 PNP: 0c09.0
1029 03:41:50.935134 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1030 03:41:50.935234 PCI: 00:1f.2
1031 03:41:50.935333 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1032 03:41:50.935433 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1033 03:41:50.935531 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1034 03:41:50.935630 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1035 03:41:50.935761 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1036 03:41:50.935944 GENERIC: 0.0
1037 03:41:50.936104 PCI: 00:1f.5
1038 03:41:50.936259 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1039 03:41:50.936414 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1040 03:41:50.936570 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1041 03:41:50.936724 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1042 03:41:50.936879 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1043 03:41:50.937033 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1044 03:41:50.937187 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1045 03:41:50.937338 DOMAIN: 0000: Resource ranges:
1046 03:41:50.937505 * Base: 1000, Size: 800, Tag: 100
1047 03:41:50.937628 * Base: 1900, Size: e700, Tag: 100
1048 03:41:50.937729 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1049 03:41:50.937832 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1050 03:41:50.937917 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1051 03:41:50.938002 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1052 03:41:50.938086 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1053 03:41:50.938169 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1054 03:41:50.938253 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1055 03:41:50.938336 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1056 03:41:50.938419 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1057 03:41:50.938504 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1058 03:41:50.938588 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1059 03:41:50.938671 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1060 03:41:50.938755 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1061 03:41:50.938838 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1062 03:41:50.938921 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1063 03:41:50.939005 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1064 03:41:50.939088 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1065 03:41:50.939171 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1066 03:41:50.939264 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1067 03:41:50.939349 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1068 03:41:50.939434 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1069 03:41:50.939517 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1070 03:41:50.939600 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1071 03:41:50.939684 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1072 03:41:50.939767 DOMAIN: 0000: Resource ranges:
1073 03:41:50.939850 * Base: 7fc00000, Size: 40400000, Tag: 200
1074 03:41:50.939934 * Base: d0000000, Size: 2b000000, Tag: 200
1075 03:41:50.940017 * Base: fb001000, Size: 2fff000, Tag: 200
1076 03:41:50.940101 * Base: fe010000, Size: 22000, Tag: 200
1077 03:41:50.940183 * Base: fe033000, Size: a4d000, Tag: 200
1078 03:41:50.940267 * Base: fea88000, Size: 2f8000, Tag: 200
1079 03:41:50.940350 * Base: fed88000, Size: 8000, Tag: 200
1080 03:41:50.940433 * Base: fed93000, Size: d000, Tag: 200
1081 03:41:50.940515 * Base: feda2000, Size: 125e000, Tag: 200
1082 03:41:50.940599 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1083 03:41:50.940682 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1084 03:41:50.940766 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1085 03:41:50.940850 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1086 03:41:50.940934 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1087 03:41:50.941018 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1088 03:41:50.941102 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1089 03:41:50.941408 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1090 03:41:50.941602 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1091 03:41:50.941778 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1092 03:41:50.941953 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1093 03:41:50.942127 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1094 03:41:50.942288 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1095 03:41:50.942426 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1096 03:41:50.942560 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1097 03:41:50.942657 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1098 03:41:50.942745 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1099 03:41:50.942838 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1100 03:41:50.942912 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1101 03:41:50.942986 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1102 03:41:50.943060 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1103 03:41:50.943133 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1104 03:41:50.943207 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1105 03:41:50.943282 Root Device assign_resources, bus 0 link: 0
1106 03:41:50.943356 DOMAIN: 0000 assign_resources, bus 0 link: 0
1107 03:41:50.943431 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1108 03:41:50.943505 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1109 03:41:50.943580 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1110 03:41:50.943654 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1111 03:41:50.943728 PCI: 00:04.0 assign_resources, bus 1 link: 0
1112 03:41:50.943801 PCI: 00:04.0 assign_resources, bus 1 link: 0
1113 03:41:50.943875 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1114 03:41:50.943948 PCI: 00:05.0 assign_resources, bus 2 link: 0
1115 03:41:50.944021 PCI: 00:05.0 assign_resources, bus 2 link: 0
1116 03:41:50.944094 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1117 03:41:50.944168 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1118 03:41:50.944242 PCI: 00:14.0 assign_resources, bus 0 link: 0
1119 03:41:50.944316 PCI: 00:14.0 assign_resources, bus 0 link: 0
1120 03:41:50.944389 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1121 03:41:50.944463 PCI: 00:14.3 assign_resources, bus 0 link: 0
1122 03:41:50.944535 PCI: 00:14.3 assign_resources, bus 0 link: 0
1123 03:41:50.944608 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1124 03:41:50.944682 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1125 03:41:50.944755 PCI: 00:15.0 assign_resources, bus 0 link: 0
1126 03:41:50.944828 PCI: 00:15.0 assign_resources, bus 0 link: 0
1127 03:41:50.944901 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1128 03:41:50.944975 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1129 03:41:50.945048 PCI: 00:15.2 assign_resources, bus 0 link: 0
1130 03:41:50.945122 PCI: 00:15.2 assign_resources, bus 0 link: 0
1131 03:41:50.945195 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1132 03:41:50.945268 PCI: 00:15.3 assign_resources, bus 0 link: 0
1133 03:41:50.945341 PCI: 00:15.3 assign_resources, bus 0 link: 0
1134 03:41:50.945413 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1135 03:41:50.945498 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1136 03:41:50.945583 PCI: 00:19.0 assign_resources, bus 0 link: 0
1137 03:41:50.945658 PCI: 00:19.0 assign_resources, bus 0 link: 0
1138 03:41:50.945732 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1139 03:41:50.945805 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1140 03:41:50.945879 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1141 03:41:50.945952 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1142 03:41:50.946024 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1143 03:41:50.946098 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1144 03:41:50.946170 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1145 03:41:50.946243 LPC: Trying to open IO window from 800 size 1ff
1146 03:41:50.946316 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1147 03:41:50.946390 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1148 03:41:50.946464 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1149 03:41:50.946537 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1150 03:41:50.946616 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1151 03:41:50.946700 DOMAIN: 0000 assign_resources, bus 0 link: 0
1152 03:41:50.946773 Root Device assign_resources, bus 0 link: 0
1153 03:41:50.946846 Done setting resources.
1154 03:41:50.947131 Show resources in subtree (Root Device)...After assigning values.
1155 03:41:50.947234 Root Device child on link 0 CPU_CLUSTER: 0
1156 03:41:50.947312 CPU_CLUSTER: 0 child on link 0 APIC: 00
1157 03:41:50.947386 APIC: 00
1158 03:41:50.947461 APIC: 02
1159 03:41:50.947534 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1160 03:41:50.947609 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1161 03:41:50.947683 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1162 03:41:50.947758 PCI: 00:00.0
1163 03:41:50.947842 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1164 03:41:50.947908 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1165 03:41:50.947974 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1166 03:41:50.948040 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1167 03:41:50.948105 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1168 03:41:50.948172 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1169 03:41:50.948238 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1170 03:41:50.948303 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1171 03:41:50.948369 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1172 03:41:50.948435 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1173 03:41:50.948501 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1174 03:41:50.948566 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1175 03:41:50.948632 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1176 03:41:50.948698 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1177 03:41:50.948764 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1178 03:41:50.948830 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1179 03:41:50.948896 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1180 03:41:50.948961 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1181 03:41:50.949027 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1182 03:41:50.949092 PCI: 00:02.0
1183 03:41:50.949157 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1184 03:41:50.949224 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1185 03:41:50.949290 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1186 03:41:50.949356 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1187 03:41:50.949422 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1188 03:41:50.949497 GENERIC: 0.0
1189 03:41:50.949565 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1190 03:41:50.949631 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1191 03:41:50.949697 GENERIC: 0.0
1192 03:41:50.949762 PCI: 00:08.0
1193 03:41:50.949826 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1194 03:41:50.949892 PCI: 00:14.0 child on link 0 USB0 port 0
1195 03:41:50.949958 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1196 03:41:50.950024 USB0 port 0 child on link 0 USB2 port 0
1197 03:41:50.950088 USB2 port 0
1198 03:41:50.950153 USB2 port 1
1199 03:41:50.950218 USB2 port 2
1200 03:41:50.950298 USB2 port 3
1201 03:41:50.950366 USB2 port 4
1202 03:41:50.950431 USB2 port 5
1203 03:41:50.950495 USB2 port 6
1204 03:41:50.950559 USB2 port 7
1205 03:41:50.950624 USB3 port 0
1206 03:41:50.950688 USB3 port 1
1207 03:41:50.950753 USB3 port 2
1208 03:41:50.950817 USB3 port 3
1209 03:41:50.950881 PCI: 00:14.2
1210 03:41:50.950946 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1211 03:41:50.951011 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1212 03:41:50.951077 GENERIC: 0.0
1213 03:41:50.951142 PCI: 00:14.5
1214 03:41:50.951207 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1215 03:41:50.951273 PCI: 00:15.0 child on link 0 I2C: 00:2c
1216 03:41:50.951339 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1217 03:41:50.951405 I2C: 00:2c
1218 03:41:50.951470 I2C: 00:15
1219 03:41:50.951534 PCI: 00:15.1
1220 03:41:50.951599 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1221 03:41:50.951665 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1222 03:41:50.951929 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1223 03:41:50.952003 GENERIC: 0.0
1224 03:41:50.952070 I2C: 00:15
1225 03:41:50.952135 I2C: 00:10
1226 03:41:50.952199 I2C: 00:10
1227 03:41:50.952264 I2C: 00:2c
1228 03:41:50.952329 I2C: 00:40
1229 03:41:50.952394 I2C: 00:10
1230 03:41:50.952458 I2C: 00:39
1231 03:41:50.952523 PCI: 00:15.3 child on link 0 I2C: 00:36
1232 03:41:50.952588 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1233 03:41:50.952654 I2C: 00:36
1234 03:41:50.952718 I2C: 00:10
1235 03:41:50.952782 I2C: 00:0c
1236 03:41:50.952856 I2C: 00:50
1237 03:41:50.952914 PCI: 00:16.0
1238 03:41:50.952973 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1239 03:41:50.953032 PCI: 00:19.0 child on link 0 I2C: 00:1a
1240 03:41:50.953091 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1241 03:41:50.953150 I2C: 00:1a
1242 03:41:50.953208 I2C: 00:1a
1243 03:41:50.953265 I2C: 00:1a
1244 03:41:50.953323 I2C: 00:28
1245 03:41:50.953381 I2C: 00:29
1246 03:41:50.953438 PCI: 00:19.2
1247 03:41:50.953508 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1248 03:41:50.953569 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1249 03:41:50.953628 PCI: 00:1a.0
1250 03:41:50.953689 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1251 03:41:50.953747 PCI: 00:1e.0
1252 03:41:50.953805 PCI: 00:1e.2 child on link 0 SPI: 00
1253 03:41:50.953863 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1254 03:41:50.953922 SPI: 00
1255 03:41:50.953980 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1256 03:41:50.954038 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1257 03:41:50.954097 PNP: 0c09.0
1258 03:41:50.954155 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1259 03:41:50.954213 PCI: 00:1f.2
1260 03:41:50.954271 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1261 03:41:50.954330 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1262 03:41:50.954388 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1263 03:41:50.954446 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1264 03:41:50.954505 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1265 03:41:50.954563 GENERIC: 0.0
1266 03:41:50.954621 PCI: 00:1f.5
1267 03:41:50.954679 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1268 03:41:50.954738 Done allocating resources.
1269 03:41:50.954796 BS: BS_DEV_RESOURCES run times (exec / console): 20 / 2095 ms
1270 03:41:50.954855 Enabling resources...
1271 03:41:50.954914 PCI: 00:00.0 subsystem <- 8086/4e22
1272 03:41:50.954972 PCI: 00:00.0 cmd <- 06
1273 03:41:50.955029 PCI: 00:02.0 subsystem <- 8086/4e55
1274 03:41:50.955087 PCI: 00:02.0 cmd <- 03
1275 03:41:50.955145 PCI: 00:04.0 subsystem <- 8086/4e03
1276 03:41:50.955202 PCI: 00:04.0 cmd <- 02
1277 03:41:50.955260 PCI: 00:05.0 bridge ctrl <- 0003
1278 03:41:50.955318 PCI: 00:05.0 subsystem <- 8086/4e19
1279 03:41:50.955376 PCI: 00:05.0 cmd <- 02
1280 03:41:50.955433 PCI: 00:08.0 cmd <- 06
1281 03:41:50.955490 PCI: 00:14.0 subsystem <- 8086/4ded
1282 03:41:50.955548 PCI: 00:14.0 cmd <- 02
1283 03:41:50.955605 PCI: 00:14.3 subsystem <- 8086/4df0
1284 03:41:50.955663 PCI: 00:14.3 cmd <- 02
1285 03:41:50.955721 PCI: 00:14.5 subsystem <- 8086/4df8
1286 03:41:50.955778 PCI: 00:14.5 cmd <- 06
1287 03:41:50.955836 PCI: 00:15.0 subsystem <- 8086/4de8
1288 03:41:50.955894 PCI: 00:15.0 cmd <- 02
1289 03:41:50.955952 PCI: 00:15.1 subsystem <- 8086/4de9
1290 03:41:50.956010 PCI: 00:15.1 cmd <- 02
1291 03:41:50.956067 PCI: 00:15.2 subsystem <- 8086/4dea
1292 03:41:50.956125 PCI: 00:15.2 cmd <- 02
1293 03:41:50.956182 PCI: 00:15.3 subsystem <- 8086/4deb
1294 03:41:50.956240 PCI: 00:15.3 cmd <- 02
1295 03:41:50.956297 PCI: 00:16.0 subsystem <- 8086/4de0
1296 03:41:50.956355 PCI: 00:16.0 cmd <- 02
1297 03:41:50.956413 PCI: 00:19.0 subsystem <- 8086/4dc5
1298 03:41:50.956471 PCI: 00:19.0 cmd <- 02
1299 03:41:50.956528 PCI: 00:19.2 subsystem <- 8086/4dc7
1300 03:41:50.956586 PCI: 00:19.2 cmd <- 06
1301 03:41:50.956643 PCI: 00:1a.0 subsystem <- 8086/4dc4
1302 03:41:50.956700 PCI: 00:1a.0 cmd <- 06
1303 03:41:50.956758 PCI: 00:1e.2 subsystem <- 8086/4daa
1304 03:41:50.956816 PCI: 00:1e.2 cmd <- 06
1305 03:41:50.956874 PCI: 00:1f.0 subsystem <- 8086/4d87
1306 03:41:50.956932 PCI: 00:1f.0 cmd <- 407
1307 03:41:50.956989 PCI: 00:1f.3 subsystem <- 8086/4dc8
1308 03:41:50.957047 PCI: 00:1f.3 cmd <- 02
1309 03:41:50.957105 PCI: 00:1f.5 subsystem <- 8086/4da4
1310 03:41:50.957162 PCI: 00:1f.5 cmd <- 406
1311 03:41:50.957221 done.
1312 03:41:50.957279 BS: BS_DEV_ENABLE run times (exec / console): 7 / 121 ms
1313 03:41:50.957338 Initializing devices...
1314 03:41:50.957395 Root Device init
1315 03:41:50.957452 mainboard: EC init
1316 03:41:50.957515 Chrome EC: Set SMI mask to 0x0000000000000000
1317 03:41:50.957574 Chrome EC: clear events_b mask to 0x0000000000000000
1318 03:41:50.957633 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1319 03:41:50.957691 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1320 03:41:50.957750 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1321 03:41:50.957819 Chrome EC: Set WAKE mask to 0x0000000000000000
1322 03:41:50.957872 Root Device init finished in 37 msecs
1323 03:41:50.957924 PCI: 00:00.0 init
1324 03:41:50.957976 CPU TDP = 6 Watts
1325 03:41:50.958029 CPU PL1 = 7 Watts
1326 03:41:50.958081 CPU PL2 = 12 Watts
1327 03:41:50.958325 PCI: 00:00.0 init finished in 6 msecs
1328 03:41:50.958385 PCI: 00:02.0 init
1329 03:41:50.958440 GMA: Found VBT in CBFS
1330 03:41:50.958493 GMA: Found valid VBT in CBFS
1331 03:41:50.958546 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1332 03:41:50.958600 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1333 03:41:50.958654 PCI: 00:02.0 init finished in 18 msecs
1334 03:41:50.958707 PCI: 00:08.0 init
1335 03:41:50.958759 PCI: 00:08.0 init finished in 0 msecs
1336 03:41:50.958812 PCI: 00:14.0 init
1337 03:41:50.958864 XHCI: Updated LFPS sampling OFF time to 9 ms
1338 03:41:50.958918 PCI: 00:14.0 init finished in 4 msecs
1339 03:41:50.958970 PCI: 00:15.0 init
1340 03:41:50.959023 I2C bus 0 version 0x3230302a
1341 03:41:50.959075 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1342 03:41:50.959127 PCI: 00:15.0 init finished in 6 msecs
1343 03:41:50.959179 PCI: 00:15.1 init
1344 03:41:50.959231 I2C bus 1 version 0x3230302a
1345 03:41:50.959283 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1346 03:41:50.959336 PCI: 00:15.1 init finished in 6 msecs
1347 03:41:50.959388 PCI: 00:15.2 init
1348 03:41:50.959441 I2C bus 2 version 0x3230302a
1349 03:41:50.959493 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1350 03:41:50.959547 PCI: 00:15.2 init finished in 6 msecs
1351 03:41:50.959599 PCI: 00:15.3 init
1352 03:41:50.959652 I2C bus 3 version 0x3230302a
1353 03:41:50.959705 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1354 03:41:50.959757 PCI: 00:15.3 init finished in 6 msecs
1355 03:41:50.959810 PCI: 00:16.0 init
1356 03:41:50.959862 PCI: 00:16.0 init finished in 0 msecs
1357 03:41:50.959915 PCI: 00:19.0 init
1358 03:41:50.959968 I2C bus 4 version 0x3230302a
1359 03:41:50.960021 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1360 03:41:50.960073 PCI: 00:19.0 init finished in 6 msecs
1361 03:41:50.960125 PCI: 00:1a.0 init
1362 03:41:50.960177 PCI: 00:1a.0 init finished in 0 msecs
1363 03:41:50.960230 PCI: 00:1f.0 init
1364 03:41:50.960282 IOAPIC: Initializing IOAPIC at 0xfec00000
1365 03:41:50.960335 IOAPIC: Bootstrap Processor Local APIC = 0x00
1366 03:41:50.960387 IOAPIC: ID = 0x02
1367 03:41:50.960440 IOAPIC: Dumping registers
1368 03:41:50.960492 reg 0x0000: 0x02000000
1369 03:41:50.960545 reg 0x0001: 0x00770020
1370 03:41:50.960597 reg 0x0002: 0x00000000
1371 03:41:50.960649 PCI: 00:1f.0 init finished in 21 msecs
1372 03:41:50.960702 PCI: 00:1f.2 init
1373 03:41:50.960754 Disabling ACPI via APMC.
1374 03:41:50.960806 APMC done.
1375 03:41:50.960859 PCI: 00:1f.2 init finished in 6 msecs
1376 03:41:50.960911 PNP: 0c09.0 init
1377 03:41:50.960963 Google Chrome EC uptime: 6.537 seconds
1378 03:41:50.961016 Google Chrome AP resets since EC boot: 0
1379 03:41:50.961068 Google Chrome most recent AP reset causes:
1380 03:41:50.961121 Google Chrome EC reset flags at last EC boot: reset-pin
1381 03:41:50.961173 PNP: 0c09.0 init finished in 18 msecs
1382 03:41:50.961226 Devices initialized
1383 03:41:50.961278 Show all devs... After init.
1384 03:41:50.961331 Root Device: enabled 1
1385 03:41:50.961383 CPU_CLUSTER: 0: enabled 1
1386 03:41:50.961435 DOMAIN: 0000: enabled 1
1387 03:41:50.961494 PCI: 00:00.0: enabled 1
1388 03:41:50.961548 PCI: 00:02.0: enabled 1
1389 03:41:50.961600 PCI: 00:04.0: enabled 1
1390 03:41:50.961654 PCI: 00:05.0: enabled 1
1391 03:41:50.961706 PCI: 00:09.0: enabled 0
1392 03:41:50.961759 PCI: 00:12.6: enabled 0
1393 03:41:50.961811 PCI: 00:14.0: enabled 1
1394 03:41:50.961863 PCI: 00:14.1: enabled 0
1395 03:41:50.961924 PCI: 00:14.2: enabled 0
1396 03:41:50.961979 PCI: 00:14.3: enabled 1
1397 03:41:50.962032 PCI: 00:14.5: enabled 1
1398 03:41:50.962085 PCI: 00:15.0: enabled 1
1399 03:41:50.962138 PCI: 00:15.1: enabled 1
1400 03:41:50.962190 PCI: 00:15.2: enabled 1
1401 03:41:50.962242 PCI: 00:15.3: enabled 1
1402 03:41:50.962294 PCI: 00:16.0: enabled 1
1403 03:41:50.962347 PCI: 00:16.1: enabled 0
1404 03:41:50.962399 PCI: 00:16.4: enabled 0
1405 03:41:50.962452 PCI: 00:16.5: enabled 0
1406 03:41:50.962504 PCI: 00:17.0: enabled 0
1407 03:41:50.962557 PCI: 00:19.0: enabled 1
1408 03:41:50.962609 PCI: 00:19.1: enabled 0
1409 03:41:50.962661 PCI: 00:19.2: enabled 1
1410 03:41:50.962714 PCI: 00:1a.0: enabled 1
1411 03:41:50.962779 PCI: 00:1c.0: enabled 0
1412 03:41:50.962830 PCI: 00:1c.1: enabled 0
1413 03:41:50.962881 PCI: 00:1c.2: enabled 0
1414 03:41:50.962932 PCI: 00:1c.3: enabled 0
1415 03:41:50.962983 PCI: 00:1c.4: enabled 0
1416 03:41:50.963035 PCI: 00:1c.5: enabled 0
1417 03:41:50.963085 PCI: 00:1c.6: enabled 0
1418 03:41:50.963136 PCI: 00:1c.7: enabled 1
1419 03:41:50.963188 PCI: 00:1e.0: enabled 0
1420 03:41:50.963239 PCI: 00:1e.1: enabled 0
1421 03:41:50.963290 PCI: 00:1e.2: enabled 1
1422 03:41:50.963341 PCI: 00:1e.3: enabled 0
1423 03:41:50.963393 PCI: 00:1f.0: enabled 1
1424 03:41:50.963444 PCI: 00:1f.1: enabled 0
1425 03:41:50.963496 PCI: 00:1f.2: enabled 1
1426 03:41:50.963547 PCI: 00:1f.3: enabled 1
1427 03:41:50.963598 PCI: 00:1f.4: enabled 0
1428 03:41:50.963649 PCI: 00:1f.5: enabled 1
1429 03:41:50.963700 PCI: 00:1f.7: enabled 0
1430 03:41:50.963751 GENERIC: 0.0: enabled 1
1431 03:41:50.963803 GENERIC: 0.0: enabled 1
1432 03:41:50.963854 USB0 port 0: enabled 1
1433 03:41:50.963907 GENERIC: 0.0: enabled 1
1434 03:41:50.963959 I2C: 00:2c: enabled 1
1435 03:41:50.964010 I2C: 00:15: enabled 1
1436 03:41:50.964062 GENERIC: 0.0: enabled 0
1437 03:41:50.964114 I2C: 00:15: enabled 1
1438 03:41:50.964165 I2C: 00:10: enabled 0
1439 03:41:50.964236 I2C: 00:10: enabled 0
1440 03:41:50.964291 I2C: 00:2c: enabled 1
1441 03:41:50.964343 I2C: 00:40: enabled 1
1442 03:41:50.964394 I2C: 00:10: enabled 1
1443 03:41:50.964445 I2C: 00:39: enabled 1
1444 03:41:50.964496 I2C: 00:36: enabled 1
1445 03:41:50.964548 I2C: 00:10: enabled 0
1446 03:41:50.964600 I2C: 00:0c: enabled 1
1447 03:41:50.964650 I2C: 00:50: enabled 1
1448 03:41:50.964702 I2C: 00:1a: enabled 1
1449 03:41:50.964753 I2C: 00:1a: enabled 0
1450 03:41:50.964805 I2C: 00:1a: enabled 0
1451 03:41:50.964856 I2C: 00:28: enabled 1
1452 03:41:50.964907 I2C: 00:29: enabled 1
1453 03:41:50.964959 PCI: 00:00.0: enabled 1
1454 03:41:50.965010 SPI: 00: enabled 1
1455 03:41:50.965062 PNP: 0c09.0: enabled 1
1456 03:41:50.965113 GENERIC: 0.0: enabled 0
1457 03:41:50.965164 USB2 port 0: enabled 1
1458 03:41:50.965216 USB2 port 1: enabled 1
1459 03:41:50.965268 USB2 port 2: enabled 1
1460 03:41:50.965319 USB2 port 3: enabled 1
1461 03:41:50.965371 USB2 port 4: enabled 0
1462 03:41:50.965422 USB2 port 5: enabled 1
1463 03:41:50.965480 USB2 port 6: enabled 0
1464 03:41:50.965567 USB2 port 7: enabled 1
1465 03:41:50.965619 USB3 port 0: enabled 1
1466 03:41:50.965671 USB3 port 1: enabled 1
1467 03:41:50.965722 USB3 port 2: enabled 1
1468 03:41:50.965774 USB3 port 3: enabled 1
1469 03:41:50.965826 APIC: 00: enabled 1
1470 03:41:50.965877 APIC: 02: enabled 1
1471 03:41:50.965928 PCI: 00:08.0: enabled 1
1472 03:41:50.965980 BS: BS_DEV_INIT run times (exec / console): 25 / 437 ms
1473 03:41:50.966031 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1474 03:41:50.966277 ELOG: NV offset 0xbfa000 size 0x1000
1475 03:41:50.966339 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1476 03:41:50.966394 ELOG: Event(17) added with size 13 at 2024-03-05 03:41:42 UTC
1477 03:41:50.966447 ELOG: Event(92) added with size 9 at 2024-03-05 03:41:42 UTC
1478 03:41:50.966500 ELOG: Event(93) added with size 9 at 2024-03-05 03:41:42 UTC
1479 03:41:50.966552 ELOG: Event(9E) added with size 10 at 2024-03-05 03:41:42 UTC
1480 03:41:50.966604 ELOG: Event(9F) added with size 14 at 2024-03-05 03:41:42 UTC
1481 03:41:50.966656 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1482 03:41:50.966708 ELOG: Event(A1) added with size 10 at 2024-03-05 03:41:42 UTC
1483 03:41:50.966760 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1484 03:41:50.966812 ELOG: Event(A0) added with size 9 at 2024-03-05 03:41:42 UTC
1485 03:41:50.966864 elog_add_boot_reason: Logged dev mode boot
1486 03:41:50.966916 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1487 03:41:50.966968 Finalize devices...
1488 03:41:50.967020 Devices finalized
1489 03:41:50.967071 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1490 03:41:50.967123 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1491 03:41:50.967176 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1492 03:41:50.967228 ME: HFSTS1 : 0x80030045
1493 03:41:50.967279 ME: HFSTS2 : 0x30280136
1494 03:41:50.967331 ME: HFSTS3 : 0x00000050
1495 03:41:50.967383 ME: HFSTS4 : 0x00004000
1496 03:41:50.967434 ME: HFSTS5 : 0x00000000
1497 03:41:50.967485 ME: HFSTS6 : 0x40400006
1498 03:41:50.967537 ME: Manufacturing Mode : NO
1499 03:41:50.967588 ME: FW Partition Table : OK
1500 03:41:50.967639 ME: Bringup Loader Failure : NO
1501 03:41:50.967690 ME: Firmware Init Complete : NO
1502 03:41:50.967741 ME: Boot Options Present : NO
1503 03:41:50.967793 ME: Update In Progress : NO
1504 03:41:50.967845 ME: D0i3 Support : YES
1505 03:41:50.967896 ME: Low Power State Enabled : NO
1506 03:41:50.967948 ME: CPU Replaced : YES
1507 03:41:50.968000 ME: CPU Replacement Valid : YES
1508 03:41:50.968052 ME: Current Working State : 5
1509 03:41:50.968103 ME: Current Operation State : 1
1510 03:41:50.968155 ME: Current Operation Mode : 3
1511 03:41:50.968207 ME: Error Code : 0
1512 03:41:50.968258 ME: CPU Debug Disabled : YES
1513 03:41:50.968310 ME: TXT Support : NO
1514 03:41:50.968361 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1515 03:41:50.968413 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1516 03:41:50.968465 ACPI: Writing ACPI tables at 76b27000.
1517 03:41:50.968517 ACPI: * FACS
1518 03:41:50.968568 ACPI: * DSDT
1519 03:41:50.968619 Ramoops buffer: 0x100000@0x76a26000.
1520 03:41:50.968671 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1521 03:41:50.968723 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1522 03:41:50.968774 Google Chrome EC: version:
1523 03:41:50.968825 ro: magolor_1.1.9999-103b6f9
1524 03:41:50.968877 rw: magolor_1.1.9999-103b6f9
1525 03:41:50.968928 running image: 1
1526 03:41:50.968980 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1527 03:41:50.969032 ACPI: * FADT
1528 03:41:50.969083 SCI is IRQ9
1529 03:41:50.969135 ACPI: added table 1/32, length now 40
1530 03:41:50.969186 ACPI: * SSDT
1531 03:41:50.969237 Found 1 CPU(s) with 2 core(s) each.
1532 03:41:50.969289 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1533 03:41:50.969341 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1534 03:41:50.969393 Could not locate 'wifi_sar' in VPD.
1535 03:41:50.969445 Checking CBFS for default SAR values
1536 03:41:50.969535 wifi_sar_defaults.hex has bad len in CBFS
1537 03:41:50.969588 failed from getting SAR limits!
1538 03:41:50.969639 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1539 03:41:50.969690 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1540 03:41:50.969742 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1541 03:41:50.969794 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1542 03:41:50.969845 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1543 03:41:50.969897 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1544 03:41:50.969948 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1545 03:41:50.970000 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1546 03:41:50.970053 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1547 03:41:50.970104 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1548 03:41:50.970157 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1549 03:41:50.970209 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1550 03:41:50.970261 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1551 03:41:50.970312 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1552 03:41:50.970364 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1553 03:41:50.970415 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1554 03:41:50.970467 PS2K: Passing 101 keymaps to kernel
1555 03:41:50.970518 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1556 03:41:50.970570 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1557 03:41:50.970622 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1558 03:41:50.970674 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1559 03:41:50.970725 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1560 03:41:50.970777 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1561 03:41:50.970828 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1562 03:41:50.970880 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1563 03:41:50.970931 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1564 03:41:50.971173 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1565 03:41:50.971232 ACPI: added table 2/32, length now 44
1566 03:41:50.971285 ACPI: * MCFG
1567 03:41:50.971337 ACPI: added table 3/32, length now 48
1568 03:41:50.971389 ACPI: * TPM2
1569 03:41:50.971441 TPM2 log created at 0x76a16000
1570 03:41:50.971493 ACPI: added table 4/32, length now 52
1571 03:41:50.971544 ACPI: * MADT
1572 03:41:50.971595 SCI is IRQ9
1573 03:41:50.971647 ACPI: added table 5/32, length now 56
1574 03:41:50.971698 current = 76b2d580
1575 03:41:50.971750 ACPI: * DMAR
1576 03:41:50.971801 ACPI: added table 6/32, length now 60
1577 03:41:50.971853 ACPI: added table 7/32, length now 64
1578 03:41:50.971912 ACPI: * HPET
1579 03:41:50.971964 ACPI: added table 8/32, length now 68
1580 03:41:50.972016 ACPI: done.
1581 03:41:50.972068 ACPI tables: 26304 bytes.
1582 03:41:50.972120 smbios_write_tables: 76a15000
1583 03:41:50.972172 EC returned error result code 3
1584 03:41:50.972224 Couldn't obtain OEM name from CBI
1585 03:41:50.972276 Create SMBIOS type 16
1586 03:41:50.972328 Create SMBIOS type 17
1587 03:41:50.972380 GENERIC: 0.0 (WIFI Device)
1588 03:41:50.972431 SMBIOS tables: 913 bytes.
1589 03:41:50.972482 Writing table forward entry at 0x00000500
1590 03:41:50.972534 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1591 03:41:50.972586 Writing coreboot table at 0x76b4b000
1592 03:41:50.972637 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1593 03:41:50.972690 1. 0000000000001000-000000000009ffff: RAM
1594 03:41:50.972741 2. 00000000000a0000-00000000000fffff: RESERVED
1595 03:41:50.972793 3. 0000000000100000-0000000076a14fff: RAM
1596 03:41:50.972844 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1597 03:41:50.972896 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1598 03:41:50.972948 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1599 03:41:50.973000 7. 0000000077000000-000000007fbfffff: RESERVED
1600 03:41:50.973051 8. 00000000c0000000-00000000cfffffff: RESERVED
1601 03:41:50.973103 9. 00000000fb000000-00000000fb000fff: RESERVED
1602 03:41:50.973154 10. 00000000fe000000-00000000fe00ffff: RESERVED
1603 03:41:50.973207 11. 00000000fea80000-00000000fea87fff: RESERVED
1604 03:41:50.973260 12. 00000000fed80000-00000000fed87fff: RESERVED
1605 03:41:50.973313 13. 00000000fed90000-00000000fed92fff: RESERVED
1606 03:41:50.973365 14. 00000000feda0000-00000000feda1fff: RESERVED
1607 03:41:50.973418 15. 0000000100000000-00000001803fffff: RAM
1608 03:41:50.973471 Passing 4 GPIOs to payload:
1609 03:41:50.973573 NAME | PORT | POLARITY | VALUE
1610 03:41:50.973626 lid | undefined | high | high
1611 03:41:50.973678 power | undefined | high | low
1612 03:41:50.973730 oprom | undefined | high | low
1613 03:41:50.973781 EC in RW | 0x000000b9 | high | low
1614 03:41:50.973833 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum abbd
1615 03:41:50.973888 coreboot table: 1504 bytes.
1616 03:41:50.974008 IMD ROOT 0. 0x76fff000 0x00001000
1617 03:41:50.974084 IMD SMALL 1. 0x76ffe000 0x00001000
1618 03:41:50.974138 FSP MEMORY 2. 0x76c4e000 0x003b0000
1619 03:41:50.974192 CONSOLE 3. 0x76c2e000 0x00020000
1620 03:41:50.974245 FMAP 4. 0x76c2d000 0x00000578
1621 03:41:50.974297 TIME STAMP 5. 0x76c2c000 0x00000910
1622 03:41:50.974349 VBOOT WORK 6. 0x76c18000 0x00014000
1623 03:41:50.974401 ROMSTG STCK 7. 0x76c17000 0x00001000
1624 03:41:50.974453 AFTER CAR 8. 0x76c0d000 0x0000a000
1625 03:41:50.974505 RAMSTAGE 9. 0x76ba7000 0x00066000
1626 03:41:50.974557 REFCODE 10. 0x76b67000 0x00040000
1627 03:41:50.974609 SMM BACKUP 11. 0x76b57000 0x00010000
1628 03:41:50.974660 4f444749 12. 0x76b55000 0x00002000
1629 03:41:50.974713 EXT VBT13. 0x76b53000 0x00001c43
1630 03:41:50.974765 COREBOOT 14. 0x76b4b000 0x00008000
1631 03:41:50.974816 ACPI 15. 0x76b27000 0x00024000
1632 03:41:50.974868 ACPI GNVS 16. 0x76b26000 0x00001000
1633 03:41:50.974919 RAMOOPS 17. 0x76a26000 0x00100000
1634 03:41:50.974971 TPM2 TCGLOG18. 0x76a16000 0x00010000
1635 03:41:50.975023 SMBIOS 19. 0x76a15000 0x00000800
1636 03:41:50.975074 IMD small region:
1637 03:41:50.975126 IMD ROOT 0. 0x76ffec00 0x00000400
1638 03:41:50.975178 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1639 03:41:50.975229 VPD 2. 0x76ffeb60 0x0000006c
1640 03:41:50.975281 POWER STATE 3. 0x76ffeb20 0x00000040
1641 03:41:50.975333 ROMSTAGE 4. 0x76ffeb00 0x00000004
1642 03:41:50.975384 MEM INFO 5. 0x76ffe920 0x000001e0
1643 03:41:50.975436 BS: BS_WRITE_TABLES run times (exec / console): 6 / 516 ms
1644 03:41:50.975488 MTRR: Physical address space:
1645 03:41:50.975540 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1646 03:41:50.975598 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1647 03:41:50.975651 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1648 03:41:50.975705 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1649 03:41:50.975759 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1650 03:41:50.975812 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1651 03:41:50.975865 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1652 03:41:50.975918 MTRR: Fixed MSR 0x250 0x0606060606060606
1653 03:41:50.975971 MTRR: Fixed MSR 0x258 0x0606060606060606
1654 03:41:50.976022 MTRR: Fixed MSR 0x259 0x0000000000000000
1655 03:41:50.976075 MTRR: Fixed MSR 0x268 0x0606060606060606
1656 03:41:50.976128 MTRR: Fixed MSR 0x269 0x0606060606060606
1657 03:41:50.976179 MTRR: Fixed MSR 0x26a 0x0606060606060606
1658 03:41:50.976231 MTRR: Fixed MSR 0x26b 0x0606060606060606
1659 03:41:50.976283 MTRR: Fixed MSR 0x26c 0x0606060606060606
1660 03:41:50.976334 MTRR: Fixed MSR 0x26d 0x0606060606060606
1661 03:41:50.976386 MTRR: Fixed MSR 0x26e 0x0606060606060606
1662 03:41:50.976437 MTRR: Fixed MSR 0x26f 0x0606060606060606
1663 03:41:50.976488 call enable_fixed_mtrr()
1664 03:41:50.976731 CPU physical address size: 39 bits
1665 03:41:50.976789 MTRR: default type WB/UC MTRR counts: 6/5.
1666 03:41:50.976843 MTRR: UC selected as default type.
1667 03:41:50.976896 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1668 03:41:50.976949 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1669 03:41:50.977001 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1670 03:41:50.977053 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1671 03:41:50.977104 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1672 03:41:50.977156
1673 03:41:50.977207 MTRR check
1674 03:41:50.977259 Fixed MTRRs : Enabled
1675 03:41:50.977312 Variable MTRRs: Enabled
1676 03:41:50.977363
1677 03:41:50.977415 MTRR: Fixed MSR 0x250 0x0606060606060606
1678 03:41:50.977467 MTRR: Fixed MSR 0x258 0x0606060606060606
1679 03:41:50.977572 MTRR: Fixed MSR 0x259 0x0000000000000000
1680 03:41:50.977624 MTRR: Fixed MSR 0x268 0x0606060606060606
1681 03:41:50.977676 MTRR: Fixed MSR 0x269 0x0606060606060606
1682 03:41:50.977727 MTRR: Fixed MSR 0x26a 0x0606060606060606
1683 03:41:50.977778 MTRR: Fixed MSR 0x26b 0x0606060606060606
1684 03:41:50.977830 MTRR: Fixed MSR 0x26c 0x0606060606060606
1685 03:41:50.977882 MTRR: Fixed MSR 0x26d 0x0606060606060606
1686 03:41:50.977934 MTRR: Fixed MSR 0x26e 0x0606060606060606
1687 03:41:50.977985 MTRR: Fixed MSR 0x26f 0x0606060606060606
1688 03:41:50.978037 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1689 03:41:50.978089 call enable_fixed_mtrr()
1690 03:41:50.978141 Checking cr50 for pending updates
1691 03:41:50.978193 CPU physical address size: 39 bits
1692 03:41:50.978245 Reading cr50 TPM mode
1693 03:41:50.978297 BS: BS_PAYLOAD_LOAD entry times (exec / console): 12 / 6 ms
1694 03:41:50.978350 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1695 03:41:50.978402 Checking segment from ROM address 0xfff9d5b8
1696 03:41:50.978454 Checking segment from ROM address 0xfff9d5d4
1697 03:41:50.978506 Loading segment from ROM address 0xfff9d5b8
1698 03:41:50.978558 code (compression=0)
1699 03:41:50.978610 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1700 03:41:50.978663 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1701 03:41:50.978715 it's not compressed!
1702 03:41:50.978768 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1703 03:41:50.978820 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1704 03:41:50.978872 Loading segment from ROM address 0xfff9d5d4
1705 03:41:50.978924 Entry Point 0x30000000
1706 03:41:50.978975 Loaded segments
1707 03:41:50.979027 BS: BS_PAYLOAD_LOAD run times (exec / console): 127 / 60 ms
1708 03:41:50.979079 Finalizing chipset.
1709 03:41:50.979131 Finalizing SMM.
1710 03:41:50.979183 APMC done.
1711 03:41:50.979234 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1712 03:41:50.979286 mp_park_aps done after 0 msecs.
1713 03:41:50.979337 Jumping to boot code at 0x30000000(0x76b4b000)
1714 03:41:50.979389 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1715 03:41:50.979442
1716 03:41:50.979493
1717 03:41:50.979545
1718 03:41:50.979596 Starting depthcharge on Magolor...
1719 03:41:50.979648
1720 03:41:50.979699 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1721 03:41:50.979751
1722 03:41:50.979803 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1723 03:41:50.979855
1724 03:41:50.979906 fw_config match found: AUDIO_AMP=UNPROVISIONED
1725 03:41:50.979958
1726 03:41:50.980009 Wipe memory regions:
1727 03:41:50.980060
1728 03:41:50.980111 [0x00000000001000, 0x000000000a0000)
1729 03:41:50.980162
1730 03:41:50.980214 [0x00000000100000, 0x00000030000000)
1731 03:41:50.980266
1732 03:41:50.980317 [0x00000031062170, 0x00000076a15000)
1733 03:41:50.980368
1734 03:41:50.980420 [0x00000100000000, 0x00000180400000)
1735 03:41:50.980471
1736 03:41:50.980523 R8152: Initializing
1737 03:41:50.980574
1738 03:41:50.980625 Version 6 (ocp_data = 5c30)
1739 03:41:50.980677
1740 03:41:50.980728 R8152: Done initializing
1741 03:41:50.980780
1742 03:41:50.980830 Adding net device
1743 03:41:50.980881
1744 03:41:50.980932 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1745 03:41:50.980984
1746 03:41:50.981035
1747 03:41:50.981098
1748 03:41:50.981406 end: 2.2.3 depthcharge-start (duration 00:00:15) [common]
1749 03:41:50.981539 start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
1750 03:41:50.981627 Setting prompt string to ['dedede:']
1751 03:41:50.981704 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:40)
1752 03:41:50.981876 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1754 03:41:51.082459 dedede: tftpboot 192.168.201.1 12940459/tftp-deploy-tn9bhqvx/kernel/bzImage 12940459/tftp-deploy-tn9bhqvx/kernel/cmdline 12940459/tftp-deploy-tn9bhqvx/ramdisk/ramdisk.cpio.gz
1755 03:41:51.083092 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1756 03:41:51.083519 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
1757 03:41:51.088122 tftpboot 192.168.201.1 12940459/tftp-deploy-tn9bhqvx/kernel/bzIploy-tn9bhqvx/kernel/cmdline 12940459/tftp-deploy-tn9bhqvx/ramdisk/ramdisk.cpio.gz
1758 03:41:51.088571
1759 03:41:51.088897 Waiting for link
1760 03:41:51.290314
1761 03:41:51.290831 done.
1762 03:41:51.291159
1763 03:41:51.291468 MAC: 00:24:32:30:7b:c4
1764 03:41:51.291768
1765 03:41:51.293237 Sending DHCP discover... done.
1766 03:41:51.293689
1767 03:41:51.296906 Waiting for reply... done.
1768 03:41:51.297433
1769 03:41:51.299948 Sending DHCP request... done.
1770 03:41:51.300364
1771 03:41:51.306875 Waiting for reply... done.
1772 03:41:51.307385
1773 03:41:51.307713 My ip is 192.168.201.12
1774 03:41:51.308022
1775 03:41:51.310189 The DHCP server ip is 192.168.201.1
1776 03:41:51.313643
1777 03:41:51.316680 TFTP server IP predefined by user: 192.168.201.1
1778 03:41:51.317098
1779 03:41:51.323666 Bootfile predefined by user: 12940459/tftp-deploy-tn9bhqvx/kernel/bzImage
1780 03:41:51.324211
1781 03:41:51.326653 Sending tftp read request... done.
1782 03:41:51.327074
1783 03:41:51.336164 Waiting for the transfer...
1784 03:41:51.336597
1785 03:41:52.061311 00000000 ################################################################
1786 03:41:52.061866
1787 03:41:52.785071 00080000 ################################################################
1788 03:41:52.785633
1789 03:41:53.516379 00100000 ################################################################
1790 03:41:53.517022
1791 03:41:54.213566 00180000 ################################################################
1792 03:41:54.214092
1793 03:41:54.819269 00200000 ################################################################
1794 03:41:54.819406
1795 03:41:55.409725 00280000 ################################################################
1796 03:41:55.409867
1797 03:41:55.999597 00300000 ################################################################
1798 03:41:55.999728
1799 03:41:56.586438 00380000 ################################################################
1800 03:41:56.586599
1801 03:41:57.186606 00400000 ################################################################
1802 03:41:57.187181
1803 03:41:57.878730 00480000 ################################################################
1804 03:41:57.879236
1805 03:41:58.614643 00500000 ################################################################
1806 03:41:58.615176
1807 03:41:59.355870 00580000 ################################################################
1808 03:41:59.356361
1809 03:42:00.095873 00600000 ################################################################
1810 03:42:00.096439
1811 03:42:00.828604 00680000 ################################################################
1812 03:42:00.829157
1813 03:42:01.563524 00700000 ################################################################
1814 03:42:01.564093
1815 03:42:02.311192 00780000 ################################################################
1816 03:42:02.311775
1817 03:42:03.045128 00800000 ################################################################
1818 03:42:03.045718
1819 03:42:03.680908 00880000 ######################################################## done.
1820 03:42:03.681439
1821 03:42:03.684402 The bootfile was 9367440 bytes long.
1822 03:42:03.684922
1823 03:42:03.687676 Sending tftp read request... done.
1824 03:42:03.688098
1825 03:42:03.690662 Waiting for the transfer...
1826 03:42:03.691151
1827 03:42:04.400522 00000000 ################################################################
1828 03:42:04.401053
1829 03:42:05.119636 00080000 ################################################################
1830 03:42:05.120149
1831 03:42:05.836620 00100000 ################################################################
1832 03:42:05.837306
1833 03:42:06.574730 00180000 ################################################################
1834 03:42:06.575255
1835 03:42:07.301445 00200000 ################################################################
1836 03:42:07.302387
1837 03:42:07.911778 00280000 ################################################################
1838 03:42:07.911946
1839 03:42:08.458778 00300000 ################################################################
1840 03:42:08.458921
1841 03:42:09.016417 00380000 ################################################################
1842 03:42:09.016599
1843 03:42:09.560630 00400000 ################################################################
1844 03:42:09.560796
1845 03:42:10.104321 00480000 ################################################################
1846 03:42:10.104470
1847 03:42:10.642572 00500000 ################################################################
1848 03:42:10.642716
1849 03:42:11.213917 00580000 ################################################################
1850 03:42:11.214061
1851 03:42:11.756388 00600000 ################################################################
1852 03:42:11.756533
1853 03:42:12.310517 00680000 ################################################################
1854 03:42:12.310670
1855 03:42:12.856767 00700000 ################################################################
1856 03:42:12.856903
1857 03:42:13.405585 00780000 ################################################################
1858 03:42:13.405742
1859 03:42:13.850258 00800000 ##################################################### done.
1860 03:42:13.850439
1861 03:42:13.853451 Sending tftp read request... done.
1862 03:42:13.853583
1863 03:42:13.856774 Waiting for the transfer...
1864 03:42:13.856884
1865 03:42:13.856977 00000000 # done.
1866 03:42:13.857077
1867 03:42:13.866921 Command line loaded dynamically from TFTP file: 12940459/tftp-deploy-tn9bhqvx/kernel/cmdline
1868 03:42:13.867027
1869 03:42:13.883379 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1870 03:42:13.883485
1871 03:42:13.886486 ec_init: CrosEC protocol v3 supported (256, 256)
1872 03:42:13.894014
1873 03:42:13.897174 Shutting down all USB controllers.
1874 03:42:13.897252
1875 03:42:13.897316 Removing current net device
1876 03:42:13.897381
1877 03:42:13.900445 Finalizing coreboot
1878 03:42:13.900522
1879 03:42:13.906993 Exiting depthcharge with code 4 at timestamp: 36860657
1880 03:42:13.907073
1881 03:42:13.907140
1882 03:42:13.907238 Starting kernel ...
1883 03:42:13.907328
1884 03:42:13.907420
1885 03:42:13.907824 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
1886 03:42:13.907923 start: 2.2.5 auto-login-action (timeout 00:04:17) [common]
1887 03:42:13.907998 Setting prompt string to ['Linux version [0-9]']
1888 03:42:13.908068 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1889 03:42:13.908135 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1891 03:46:30.909221 end: 2.2.5 auto-login-action (duration 00:04:17) [common]
1893 03:46:30.910824 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 257 seconds'
1895 03:46:30.912034 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1898 03:46:30.913613 end: 2 depthcharge-action (duration 00:05:00) [common]
1900 03:46:30.915140 Cleaning after the job
1901 03:46:30.915596 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12940459/tftp-deploy-tn9bhqvx/ramdisk
1902 03:46:30.922847 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12940459/tftp-deploy-tn9bhqvx/kernel
1903 03:46:30.930555 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12940459/tftp-deploy-tn9bhqvx/modules
1904 03:46:30.932062 start: 5.1 power-off (timeout 00:00:30) [common]
1905 03:46:30.932665 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-8' '--port=1' '--command=off'
1906 03:46:31.035649 >> Command sent successfully.
1907 03:46:31.046977 Returned 0 in 0 seconds
1908 03:46:31.148261 end: 5.1 power-off (duration 00:00:00) [common]
1910 03:46:31.149676 start: 5.2 read-feedback (timeout 00:10:00) [common]
1911 03:46:31.150866 Listened to connection for namespace 'common' for up to 1s
1913 03:46:31.152148 Listened to connection for namespace 'common' for up to 1s
1914 03:46:32.151474 Finalising connection for namespace 'common'
1915 03:46:32.152211 Disconnecting from shell: Finalise
1916 03:46:32.152851
1917 03:46:32.254128 end: 5.2 read-feedback (duration 00:00:01) [common]
1918 03:46:32.254707 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12940459
1919 03:46:32.306396 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12940459
1920 03:46:32.306612 JobError: Your job cannot terminate cleanly.