Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 03:42:34.924035 lava-dispatcher, installed at version: 2024.01
2 03:42:34.924244 start: 0 validate
3 03:42:34.924380 Start time: 2024-03-05 03:42:34.924373+00:00 (UTC)
4 03:42:34.924496 Using caching service: 'http://localhost/cache/?uri=%s'
5 03:42:34.924623 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 03:42:35.309985 Using caching service: 'http://localhost/cache/?uri=%s'
7 03:42:35.310671 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2244-g20d1c7153f15%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 03:42:35.580685 Using caching service: 'http://localhost/cache/?uri=%s'
9 03:42:35.581379 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2244-g20d1c7153f15%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 03:42:38.572753 validate duration: 3.65
12 03:42:38.573038 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 03:42:38.573151 start: 1.1 download-retry (timeout 00:10:00) [common]
14 03:42:38.573261 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 03:42:38.573393 Not decompressing ramdisk as can be used compressed.
16 03:42:38.573480 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 03:42:38.573556 saving as /var/lib/lava/dispatcher/tmp/12940496/tftp-deploy-z_rrck0r/ramdisk/rootfs.cpio.gz
18 03:42:38.573619 total size: 8418130 (8 MB)
19 03:42:39.079837 progress 0 % (0 MB)
20 03:42:39.092113 progress 5 % (0 MB)
21 03:42:39.104435 progress 10 % (0 MB)
22 03:42:39.112948 progress 15 % (1 MB)
23 03:42:39.118838 progress 20 % (1 MB)
24 03:42:39.123597 progress 25 % (2 MB)
25 03:42:39.127680 progress 30 % (2 MB)
26 03:42:39.131033 progress 35 % (2 MB)
27 03:42:39.134280 progress 40 % (3 MB)
28 03:42:39.137390 progress 45 % (3 MB)
29 03:42:39.140196 progress 50 % (4 MB)
30 03:42:39.142884 progress 55 % (4 MB)
31 03:42:39.145389 progress 60 % (4 MB)
32 03:42:39.147617 progress 65 % (5 MB)
33 03:42:39.149875 progress 70 % (5 MB)
34 03:42:39.152161 progress 75 % (6 MB)
35 03:42:39.154368 progress 80 % (6 MB)
36 03:42:39.156585 progress 85 % (6 MB)
37 03:42:39.158905 progress 90 % (7 MB)
38 03:42:39.161110 progress 95 % (7 MB)
39 03:42:39.163230 progress 100 % (8 MB)
40 03:42:39.163462 8 MB downloaded in 0.59 s (13.61 MB/s)
41 03:42:39.163642 end: 1.1.1 http-download (duration 00:00:01) [common]
43 03:42:39.163884 end: 1.1 download-retry (duration 00:00:01) [common]
44 03:42:39.163975 start: 1.2 download-retry (timeout 00:09:59) [common]
45 03:42:39.164061 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 03:42:39.164201 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2244-g20d1c7153f15/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 03:42:39.164273 saving as /var/lib/lava/dispatcher/tmp/12940496/tftp-deploy-z_rrck0r/kernel/bzImage
48 03:42:39.164336 total size: 9367440 (8 MB)
49 03:42:39.164397 No compression specified
50 03:42:39.165523 progress 0 % (0 MB)
51 03:42:39.168132 progress 5 % (0 MB)
52 03:42:39.170604 progress 10 % (0 MB)
53 03:42:39.173112 progress 15 % (1 MB)
54 03:42:39.175739 progress 20 % (1 MB)
55 03:42:39.178223 progress 25 % (2 MB)
56 03:42:39.180723 progress 30 % (2 MB)
57 03:42:39.183396 progress 35 % (3 MB)
58 03:42:39.185864 progress 40 % (3 MB)
59 03:42:39.188340 progress 45 % (4 MB)
60 03:42:39.190872 progress 50 % (4 MB)
61 03:42:39.193585 progress 55 % (4 MB)
62 03:42:39.196051 progress 60 % (5 MB)
63 03:42:39.198476 progress 65 % (5 MB)
64 03:42:39.201104 progress 70 % (6 MB)
65 03:42:39.203507 progress 75 % (6 MB)
66 03:42:39.205882 progress 80 % (7 MB)
67 03:42:39.208263 progress 85 % (7 MB)
68 03:42:39.210880 progress 90 % (8 MB)
69 03:42:39.213282 progress 95 % (8 MB)
70 03:42:39.215725 progress 100 % (8 MB)
71 03:42:39.215951 8 MB downloaded in 0.05 s (173.09 MB/s)
72 03:42:39.216100 end: 1.2.1 http-download (duration 00:00:00) [common]
74 03:42:39.216332 end: 1.2 download-retry (duration 00:00:00) [common]
75 03:42:39.216425 start: 1.3 download-retry (timeout 00:09:59) [common]
76 03:42:39.216512 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 03:42:39.216648 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2244-g20d1c7153f15/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 03:42:39.216717 saving as /var/lib/lava/dispatcher/tmp/12940496/tftp-deploy-z_rrck0r/modules/modules.tar
79 03:42:39.216778 total size: 250168 (0 MB)
80 03:42:39.216840 Using unxz to decompress xz
81 03:42:39.221189 progress 13 % (0 MB)
82 03:42:39.221605 progress 26 % (0 MB)
83 03:42:39.221857 progress 39 % (0 MB)
84 03:42:39.223301 progress 52 % (0 MB)
85 03:42:39.225149 progress 65 % (0 MB)
86 03:42:39.227081 progress 78 % (0 MB)
87 03:42:39.229061 progress 91 % (0 MB)
88 03:42:39.230956 progress 100 % (0 MB)
89 03:42:39.236396 0 MB downloaded in 0.02 s (12.17 MB/s)
90 03:42:39.236636 end: 1.3.1 http-download (duration 00:00:00) [common]
92 03:42:39.236908 end: 1.3 download-retry (duration 00:00:00) [common]
93 03:42:39.237005 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 03:42:39.237103 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 03:42:39.237185 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 03:42:39.237273 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 03:42:39.237485 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12940496/lava-overlay-jjh55xhy
98 03:42:39.237625 makedir: /var/lib/lava/dispatcher/tmp/12940496/lava-overlay-jjh55xhy/lava-12940496/bin
99 03:42:39.237730 makedir: /var/lib/lava/dispatcher/tmp/12940496/lava-overlay-jjh55xhy/lava-12940496/tests
100 03:42:39.237830 makedir: /var/lib/lava/dispatcher/tmp/12940496/lava-overlay-jjh55xhy/lava-12940496/results
101 03:42:39.237945 Creating /var/lib/lava/dispatcher/tmp/12940496/lava-overlay-jjh55xhy/lava-12940496/bin/lava-add-keys
102 03:42:39.238093 Creating /var/lib/lava/dispatcher/tmp/12940496/lava-overlay-jjh55xhy/lava-12940496/bin/lava-add-sources
103 03:42:39.238226 Creating /var/lib/lava/dispatcher/tmp/12940496/lava-overlay-jjh55xhy/lava-12940496/bin/lava-background-process-start
104 03:42:39.238359 Creating /var/lib/lava/dispatcher/tmp/12940496/lava-overlay-jjh55xhy/lava-12940496/bin/lava-background-process-stop
105 03:42:39.238524 Creating /var/lib/lava/dispatcher/tmp/12940496/lava-overlay-jjh55xhy/lava-12940496/bin/lava-common-functions
106 03:42:39.238655 Creating /var/lib/lava/dispatcher/tmp/12940496/lava-overlay-jjh55xhy/lava-12940496/bin/lava-echo-ipv4
107 03:42:39.238783 Creating /var/lib/lava/dispatcher/tmp/12940496/lava-overlay-jjh55xhy/lava-12940496/bin/lava-install-packages
108 03:42:39.238909 Creating /var/lib/lava/dispatcher/tmp/12940496/lava-overlay-jjh55xhy/lava-12940496/bin/lava-installed-packages
109 03:42:39.239033 Creating /var/lib/lava/dispatcher/tmp/12940496/lava-overlay-jjh55xhy/lava-12940496/bin/lava-os-build
110 03:42:39.239159 Creating /var/lib/lava/dispatcher/tmp/12940496/lava-overlay-jjh55xhy/lava-12940496/bin/lava-probe-channel
111 03:42:39.239283 Creating /var/lib/lava/dispatcher/tmp/12940496/lava-overlay-jjh55xhy/lava-12940496/bin/lava-probe-ip
112 03:42:39.239408 Creating /var/lib/lava/dispatcher/tmp/12940496/lava-overlay-jjh55xhy/lava-12940496/bin/lava-target-ip
113 03:42:39.239531 Creating /var/lib/lava/dispatcher/tmp/12940496/lava-overlay-jjh55xhy/lava-12940496/bin/lava-target-mac
114 03:42:39.239655 Creating /var/lib/lava/dispatcher/tmp/12940496/lava-overlay-jjh55xhy/lava-12940496/bin/lava-target-storage
115 03:42:39.239786 Creating /var/lib/lava/dispatcher/tmp/12940496/lava-overlay-jjh55xhy/lava-12940496/bin/lava-test-case
116 03:42:39.239914 Creating /var/lib/lava/dispatcher/tmp/12940496/lava-overlay-jjh55xhy/lava-12940496/bin/lava-test-event
117 03:42:39.240039 Creating /var/lib/lava/dispatcher/tmp/12940496/lava-overlay-jjh55xhy/lava-12940496/bin/lava-test-feedback
118 03:42:39.240165 Creating /var/lib/lava/dispatcher/tmp/12940496/lava-overlay-jjh55xhy/lava-12940496/bin/lava-test-raise
119 03:42:39.240293 Creating /var/lib/lava/dispatcher/tmp/12940496/lava-overlay-jjh55xhy/lava-12940496/bin/lava-test-reference
120 03:42:39.240422 Creating /var/lib/lava/dispatcher/tmp/12940496/lava-overlay-jjh55xhy/lava-12940496/bin/lava-test-runner
121 03:42:39.240548 Creating /var/lib/lava/dispatcher/tmp/12940496/lava-overlay-jjh55xhy/lava-12940496/bin/lava-test-set
122 03:42:39.240680 Creating /var/lib/lava/dispatcher/tmp/12940496/lava-overlay-jjh55xhy/lava-12940496/bin/lava-test-shell
123 03:42:39.240809 Updating /var/lib/lava/dispatcher/tmp/12940496/lava-overlay-jjh55xhy/lava-12940496/bin/lava-install-packages (oe)
124 03:42:39.240960 Updating /var/lib/lava/dispatcher/tmp/12940496/lava-overlay-jjh55xhy/lava-12940496/bin/lava-installed-packages (oe)
125 03:42:39.241092 Creating /var/lib/lava/dispatcher/tmp/12940496/lava-overlay-jjh55xhy/lava-12940496/environment
126 03:42:39.241202 LAVA metadata
127 03:42:39.241277 - LAVA_JOB_ID=12940496
128 03:42:39.241343 - LAVA_DISPATCHER_IP=192.168.201.1
129 03:42:39.241454 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 03:42:39.241524 skipped lava-vland-overlay
131 03:42:39.241604 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 03:42:39.241689 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 03:42:39.241768 skipped lava-multinode-overlay
134 03:42:39.241845 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 03:42:39.241928 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 03:42:39.242002 Loading test definitions
137 03:42:39.242098 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 03:42:39.242173 Using /lava-12940496 at stage 0
139 03:42:39.242562 uuid=12940496_1.4.2.3.1 testdef=None
140 03:42:39.242652 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 03:42:39.242736 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 03:42:39.243277 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 03:42:39.243501 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 03:42:39.244144 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 03:42:39.244371 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 03:42:39.244990 runner path: /var/lib/lava/dispatcher/tmp/12940496/lava-overlay-jjh55xhy/lava-12940496/0/tests/0_dmesg test_uuid 12940496_1.4.2.3.1
149 03:42:39.245152 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 03:42:39.245443 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 03:42:39.245540 Using /lava-12940496 at stage 1
153 03:42:39.245846 uuid=12940496_1.4.2.3.5 testdef=None
154 03:42:39.245939 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 03:42:39.246024 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 03:42:39.246530 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 03:42:39.246750 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 03:42:39.247389 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 03:42:39.247614 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 03:42:39.248286 runner path: /var/lib/lava/dispatcher/tmp/12940496/lava-overlay-jjh55xhy/lava-12940496/1/tests/1_bootrr test_uuid 12940496_1.4.2.3.5
163 03:42:39.248439 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 03:42:39.248669 Creating lava-test-runner.conf files
166 03:42:39.248733 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12940496/lava-overlay-jjh55xhy/lava-12940496/0 for stage 0
167 03:42:39.248824 - 0_dmesg
168 03:42:39.248904 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12940496/lava-overlay-jjh55xhy/lava-12940496/1 for stage 1
169 03:42:39.248995 - 1_bootrr
170 03:42:39.249090 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 03:42:39.249173 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 03:42:39.257426 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 03:42:39.257529 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 03:42:39.257614 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 03:42:39.257699 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 03:42:39.257785 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 03:42:39.513649 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 03:42:39.514049 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 03:42:39.514171 extracting modules file /var/lib/lava/dispatcher/tmp/12940496/tftp-deploy-z_rrck0r/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12940496/extract-overlay-ramdisk-ms0xi29r/ramdisk
180 03:42:39.527618 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 03:42:39.527736 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 03:42:39.527825 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12940496/compress-overlay-d3l3ee2k/overlay-1.4.2.4.tar.gz to ramdisk
183 03:42:39.527897 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12940496/compress-overlay-d3l3ee2k/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12940496/extract-overlay-ramdisk-ms0xi29r/ramdisk
184 03:42:39.536133 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 03:42:39.536250 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 03:42:39.536341 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 03:42:39.536429 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 03:42:39.536536 Building ramdisk /var/lib/lava/dispatcher/tmp/12940496/extract-overlay-ramdisk-ms0xi29r/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12940496/extract-overlay-ramdisk-ms0xi29r/ramdisk
189 03:42:39.671584 >> 49788 blocks
190 03:42:40.506376 rename /var/lib/lava/dispatcher/tmp/12940496/extract-overlay-ramdisk-ms0xi29r/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12940496/tftp-deploy-z_rrck0r/ramdisk/ramdisk.cpio.gz
191 03:42:40.506846 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 03:42:40.506970 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 03:42:40.507073 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 03:42:40.507165 No mkimage arch provided, not using FIT.
195 03:42:40.507253 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 03:42:40.507336 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 03:42:40.507432 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 03:42:40.507525 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 03:42:40.507612 No LXC device requested
200 03:42:40.507698 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 03:42:40.507789 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 03:42:40.507874 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 03:42:40.507961 Checking files for TFTP limit of 4294967296 bytes.
204 03:42:40.508359 end: 1 tftp-deploy (duration 00:00:02) [common]
205 03:42:40.508463 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 03:42:40.508553 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 03:42:40.508685 substitutions:
208 03:42:40.508753 - {DTB}: None
209 03:42:40.508816 - {INITRD}: 12940496/tftp-deploy-z_rrck0r/ramdisk/ramdisk.cpio.gz
210 03:42:40.508875 - {KERNEL}: 12940496/tftp-deploy-z_rrck0r/kernel/bzImage
211 03:42:40.508931 - {LAVA_MAC}: None
212 03:42:40.508988 - {PRESEED_CONFIG}: None
213 03:42:40.509041 - {PRESEED_LOCAL}: None
214 03:42:40.509095 - {RAMDISK}: 12940496/tftp-deploy-z_rrck0r/ramdisk/ramdisk.cpio.gz
215 03:42:40.509149 - {ROOT_PART}: None
216 03:42:40.509202 - {ROOT}: None
217 03:42:40.509254 - {SERVER_IP}: 192.168.201.1
218 03:42:40.509306 - {TEE}: None
219 03:42:40.509359 Parsed boot commands:
220 03:42:40.509411 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 03:42:40.509583 Parsed boot commands: tftpboot 192.168.201.1 12940496/tftp-deploy-z_rrck0r/kernel/bzImage 12940496/tftp-deploy-z_rrck0r/kernel/cmdline 12940496/tftp-deploy-z_rrck0r/ramdisk/ramdisk.cpio.gz
222 03:42:40.509671 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 03:42:40.509757 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 03:42:40.509844 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 03:42:40.509929 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 03:42:40.510000 Not connected, no need to disconnect.
227 03:42:40.510075 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 03:42:40.510261 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 03:42:40.510335 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-0'
230 03:42:40.514391 Setting prompt string to ['lava-test: # ']
231 03:42:40.514807 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 03:42:40.514922 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 03:42:40.515022 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 03:42:40.515114 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 03:42:40.515302 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-0' '--port=1' '--command=reboot'
236 03:42:45.663944 >> Command sent successfully.
237 03:42:45.674433 Returned 0 in 5 seconds
238 03:42:45.775776 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 03:42:45.777161 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 03:42:45.777655 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 03:42:45.778079 Setting prompt string to 'Starting depthcharge on Voema...'
243 03:42:45.778509 Changing prompt to 'Starting depthcharge on Voema...'
244 03:42:45.778893 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
245 03:42:45.780101 [Enter `^Ec?' for help]
246 03:42:47.367709
247 03:42:47.368298
248 03:42:47.377774 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
249 03:42:47.381501 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
250 03:42:47.387273 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
251 03:42:47.390953 CPU: AES supported, TXT NOT supported, VT supported
252 03:42:47.398060 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
253 03:42:47.403701 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
254 03:42:47.407036 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
255 03:42:47.410657 VBOOT: Loading verstage.
256 03:42:47.413356 FMAP: Found "FLASH" version 1.1 at 0x1804000.
257 03:42:47.420577 FMAP: base = 0x0 size = 0x2000000 #areas = 32
258 03:42:47.423689 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
259 03:42:47.434863 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
260 03:42:47.441497 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
261 03:42:47.442036
262 03:42:47.442375
263 03:42:47.454305 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
264 03:42:47.468208 Probing TPM: . done!
265 03:42:47.471330 TPM ready after 0 ms
266 03:42:47.475359 Connected to device vid:did:rid of 1ae0:0028:00
267 03:42:47.486004 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
268 03:42:47.493062 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
269 03:42:47.496587 Initialized TPM device CR50 revision 0
270 03:42:47.545490 tlcl_send_startup: Startup return code is 0
271 03:42:47.546073 TPM: setup succeeded
272 03:42:47.559588 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
273 03:42:47.574055 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
274 03:42:47.586498 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
275 03:42:47.596244 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
276 03:42:47.600083 Chrome EC: UHEPI supported
277 03:42:47.603250 Phase 1
278 03:42:47.606605 FMAP: area GBB found @ 1805000 (458752 bytes)
279 03:42:47.616619 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
280 03:42:47.623339 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
281 03:42:47.630532 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
282 03:42:47.636812 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
283 03:42:47.640111 Recovery requested (1009000e)
284 03:42:47.643197 TPM: Extending digest for VBOOT: boot mode into PCR 0
285 03:42:47.655065 tlcl_extend: response is 0
286 03:42:47.661463 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
287 03:42:47.671534 tlcl_extend: response is 0
288 03:42:47.678056 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
289 03:42:47.684664 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
290 03:42:47.690995 BS: verstage times (exec / console): total (unknown) / 142 ms
291 03:42:47.691528
292 03:42:47.691873
293 03:42:47.704577 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
294 03:42:47.710914 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
295 03:42:47.714240 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
296 03:42:47.717761 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
297 03:42:47.724268 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
298 03:42:47.727345 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
299 03:42:47.731088 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
300 03:42:47.734298 TCO_STS: 0000 0000
301 03:42:47.737545 GEN_PMCON: d0015038 00002200
302 03:42:47.740717 GBLRST_CAUSE: 00000000 00000000
303 03:42:47.741153 HPR_CAUSE0: 00000000
304 03:42:47.744901 prev_sleep_state 5
305 03:42:47.747557 Boot Count incremented to 27913
306 03:42:47.754456 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
307 03:42:47.760650 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
308 03:42:47.767572 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
309 03:42:47.774214 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
310 03:42:47.779269 Chrome EC: UHEPI supported
311 03:42:47.785798 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
312 03:42:47.798746 Probing TPM: done!
313 03:42:47.805882 Connected to device vid:did:rid of 1ae0:0028:00
314 03:42:47.816987 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
315 03:42:47.823016 Initialized TPM device CR50 revision 0
316 03:42:47.833164 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
317 03:42:47.839215 MRC: Hash idx 0x100b comparison successful.
318 03:42:47.842745 MRC cache found, size faa8
319 03:42:47.843181 bootmode is set to: 2
320 03:42:47.845872 SPD index = 0
321 03:42:47.852951 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
322 03:42:47.856415 SPD: module type is LPDDR4X
323 03:42:47.859375 SPD: module part number is MT53E512M64D4NW-046
324 03:42:47.866078 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
325 03:42:47.869384 SPD: device width 16 bits, bus width 16 bits
326 03:42:47.875910 SPD: module size is 1024 MB (per channel)
327 03:42:48.310153 CBMEM:
328 03:42:48.313302 IMD: root @ 0x76fff000 254 entries.
329 03:42:48.316617 IMD: root @ 0x76ffec00 62 entries.
330 03:42:48.320195 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
331 03:42:48.326378 FMAP: area RW_VPD found @ f35000 (8192 bytes)
332 03:42:48.329892 External stage cache:
333 03:42:48.333218 IMD: root @ 0x7b3ff000 254 entries.
334 03:42:48.336481 IMD: root @ 0x7b3fec00 62 entries.
335 03:42:48.351952 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
336 03:42:48.358844 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
337 03:42:48.364992 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
338 03:42:48.379155 MRC: 'RECOVERY_MRC_CACHE' does not need update.
339 03:42:48.386096 cse_lite: Skip switching to RW in the recovery path
340 03:42:48.386724 8 DIMMs found
341 03:42:48.387113 SMM Memory Map
342 03:42:48.389916 SMRAM : 0x7b000000 0x800000
343 03:42:48.393755 Subregion 0: 0x7b000000 0x200000
344 03:42:48.396814 Subregion 1: 0x7b200000 0x200000
345 03:42:48.399810 Subregion 2: 0x7b400000 0x400000
346 03:42:48.403107 top_of_ram = 0x77000000
347 03:42:48.410362 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
348 03:42:48.413041 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
349 03:42:48.420405 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
350 03:42:48.423276 MTRR Range: Start=ff000000 End=0 (Size 1000000)
351 03:42:48.433719 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
352 03:42:48.440040 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
353 03:42:48.449968 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
354 03:42:48.453678 Processing 211 relocs. Offset value of 0x74c0b000
355 03:42:48.462024 BS: romstage times (exec / console): total (unknown) / 277 ms
356 03:42:48.468355
357 03:42:48.468941
358 03:42:48.478333 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
359 03:42:48.481344 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
360 03:42:48.491532 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
361 03:42:48.497903 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
362 03:42:48.504992 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
363 03:42:48.511110 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
364 03:42:48.558383 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
365 03:42:48.564884 Processing 5008 relocs. Offset value of 0x75d98000
366 03:42:48.568081 BS: postcar times (exec / console): total (unknown) / 59 ms
367 03:42:48.571766
368 03:42:48.572337
369 03:42:48.581759 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
370 03:42:48.582523 Normal boot
371 03:42:48.585163 FW_CONFIG value is 0x804c02
372 03:42:48.588559 PCI: 00:07.0 disabled by fw_config
373 03:42:48.591981 PCI: 00:07.1 disabled by fw_config
374 03:42:48.595314 PCI: 00:0d.2 disabled by fw_config
375 03:42:48.599144 PCI: 00:1c.7 disabled by fw_config
376 03:42:48.605144 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
377 03:42:48.612221 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
378 03:42:48.615079 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
379 03:42:48.618483 GENERIC: 0.0 disabled by fw_config
380 03:42:48.622145 GENERIC: 1.0 disabled by fw_config
381 03:42:48.628607 fw_config match found: DB_USB=USB3_ACTIVE
382 03:42:48.632061 fw_config match found: DB_USB=USB3_ACTIVE
383 03:42:48.635121 fw_config match found: DB_USB=USB3_ACTIVE
384 03:42:48.638685 fw_config match found: DB_USB=USB3_ACTIVE
385 03:42:48.645308 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
386 03:42:48.651668 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
387 03:42:48.658299 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
388 03:42:48.668489 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
389 03:42:48.671976 microcode: sig=0x806c1 pf=0x80 revision=0x86
390 03:42:48.678250 microcode: Update skipped, already up-to-date
391 03:42:48.685106 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
392 03:42:48.711505 Detected 4 core, 8 thread CPU.
393 03:42:48.715504 Setting up SMI for CPU
394 03:42:48.718533 IED base = 0x7b400000
395 03:42:48.719041 IED size = 0x00400000
396 03:42:48.721546 Will perform SMM setup.
397 03:42:48.728754 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
398 03:42:48.734844 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
399 03:42:48.741987 Processing 16 relocs. Offset value of 0x00030000
400 03:42:48.744756 Attempting to start 7 APs
401 03:42:48.748260 Waiting for 10ms after sending INIT.
402 03:42:48.763783 Waiting for 1st SIPI to complete...done.
403 03:42:48.764462 AP: slot 1 apic_id 1.
404 03:42:48.766954 AP: slot 5 apic_id 4.
405 03:42:48.770618 AP: slot 6 apic_id 2.
406 03:42:48.771195 AP: slot 2 apic_id 3.
407 03:42:48.773990 AP: slot 4 apic_id 5.
408 03:42:48.777079 AP: slot 7 apic_id 6.
409 03:42:48.777665 AP: slot 3 apic_id 7.
410 03:42:48.783845 Waiting for 2nd SIPI to complete...done.
411 03:42:48.790183 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
412 03:42:48.796847 Processing 13 relocs. Offset value of 0x00038000
413 03:42:48.797301 Unable to locate Global NVS
414 03:42:48.806512 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
415 03:42:48.810442 Installing permanent SMM handler to 0x7b000000
416 03:42:48.819711 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
417 03:42:48.823641 Processing 794 relocs. Offset value of 0x7b010000
418 03:42:48.833658 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
419 03:42:48.836965 Processing 13 relocs. Offset value of 0x7b008000
420 03:42:48.843792 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
421 03:42:48.849890 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
422 03:42:48.853364 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
423 03:42:48.859986 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
424 03:42:48.867253 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
425 03:42:48.873525 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
426 03:42:48.880055 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
427 03:42:48.880583 Unable to locate Global NVS
428 03:42:48.890008 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
429 03:42:48.893463 Clearing SMI status registers
430 03:42:48.894044 SMI_STS: PM1
431 03:42:48.896687 PM1_STS: PWRBTN
432 03:42:48.903139 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
433 03:42:48.906328 In relocation handler: CPU 0
434 03:42:48.910258 New SMBASE=0x7b000000 IEDBASE=0x7b400000
435 03:42:48.916473 Writing SMRR. base = 0x7b000006, mask=0xff800c00
436 03:42:48.917047 Relocation complete.
437 03:42:48.926341 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
438 03:42:48.926972 In relocation handler: CPU 1
439 03:42:48.932764 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
440 03:42:48.933309 Relocation complete.
441 03:42:48.942696 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
442 03:42:48.943267 In relocation handler: CPU 3
443 03:42:48.949821 New SMBASE=0x7afff400 IEDBASE=0x7b400000
444 03:42:48.950456 Relocation complete.
445 03:42:48.959966 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
446 03:42:48.960550 In relocation handler: CPU 2
447 03:42:48.966003 New SMBASE=0x7afff800 IEDBASE=0x7b400000
448 03:42:48.966633 Relocation complete.
449 03:42:48.975742 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
450 03:42:48.976268 In relocation handler: CPU 6
451 03:42:48.982205 New SMBASE=0x7affe800 IEDBASE=0x7b400000
452 03:42:48.985869 Writing SMRR. base = 0x7b000006, mask=0xff800c00
453 03:42:48.988983 Relocation complete.
454 03:42:48.995764 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
455 03:42:48.999009 In relocation handler: CPU 4
456 03:42:49.002058 New SMBASE=0x7afff000 IEDBASE=0x7b400000
457 03:42:49.005860 Relocation complete.
458 03:42:49.012069 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
459 03:42:49.015111 In relocation handler: CPU 5
460 03:42:49.018910 New SMBASE=0x7affec00 IEDBASE=0x7b400000
461 03:42:49.021910 Writing SMRR. base = 0x7b000006, mask=0xff800c00
462 03:42:49.025716 Relocation complete.
463 03:42:49.032324 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
464 03:42:49.035737 In relocation handler: CPU 7
465 03:42:49.038638 New SMBASE=0x7affe400 IEDBASE=0x7b400000
466 03:42:49.045305 Writing SMRR. base = 0x7b000006, mask=0xff800c00
467 03:42:49.049066 Relocation complete.
468 03:42:49.049411 Initializing CPU #0
469 03:42:49.052185 CPU: vendor Intel device 806c1
470 03:42:49.055998 CPU: family 06, model 8c, stepping 01
471 03:42:49.059656 Clearing out pending MCEs
472 03:42:49.062826 Setting up local APIC...
473 03:42:49.063282 apic_id: 0x00 done.
474 03:42:49.066739 Turbo is available but hidden
475 03:42:49.070144 Turbo is available and visible
476 03:42:49.076839 microcode: Update skipped, already up-to-date
477 03:42:49.077187 CPU #0 initialized
478 03:42:49.080025 Initializing CPU #1
479 03:42:49.080411 Initializing CPU #6
480 03:42:49.083224 Initializing CPU #2
481 03:42:49.086488 CPU: vendor Intel device 806c1
482 03:42:49.090356 CPU: family 06, model 8c, stepping 01
483 03:42:49.092951 CPU: vendor Intel device 806c1
484 03:42:49.096334 CPU: family 06, model 8c, stepping 01
485 03:42:49.099752 Clearing out pending MCEs
486 03:42:49.103141 Clearing out pending MCEs
487 03:42:49.106378 Setting up local APIC...
488 03:42:49.106874 Initializing CPU #4
489 03:42:49.109724 Initializing CPU #5
490 03:42:49.113221 Setting up local APIC...
491 03:42:49.113908 CPU: vendor Intel device 806c1
492 03:42:49.119885 CPU: family 06, model 8c, stepping 01
493 03:42:49.122963 CPU: vendor Intel device 806c1
494 03:42:49.126174 CPU: family 06, model 8c, stepping 01
495 03:42:49.129869 Clearing out pending MCEs
496 03:42:49.130315 Clearing out pending MCEs
497 03:42:49.133154 Setting up local APIC...
498 03:42:49.136522 apic_id: 0x02 done.
499 03:42:49.139946 CPU: vendor Intel device 806c1
500 03:42:49.143669 CPU: family 06, model 8c, stepping 01
501 03:42:49.144107 apic_id: 0x05 done.
502 03:42:49.146735 Setting up local APIC...
503 03:42:49.150131 Initializing CPU #3
504 03:42:49.150732 Initializing CPU #7
505 03:42:49.153258 CPU: vendor Intel device 806c1
506 03:42:49.159982 CPU: family 06, model 8c, stepping 01
507 03:42:49.160520 CPU: vendor Intel device 806c1
508 03:42:49.166962 CPU: family 06, model 8c, stepping 01
509 03:42:49.167540 Clearing out pending MCEs
510 03:42:49.170005 Clearing out pending MCEs
511 03:42:49.173099 Setting up local APIC...
512 03:42:49.176373 microcode: Update skipped, already up-to-date
513 03:42:49.180001 apic_id: 0x04 done.
514 03:42:49.182969 CPU #4 initialized
515 03:42:49.186193 microcode: Update skipped, already up-to-date
516 03:42:49.190049 apic_id: 0x07 done.
517 03:42:49.190633 Setting up local APIC...
518 03:42:49.193184 Clearing out pending MCEs
519 03:42:49.199390 microcode: Update skipped, already up-to-date
520 03:42:49.199982 apic_id: 0x06 done.
521 03:42:49.203625 CPU #3 initialized
522 03:42:49.206601 microcode: Update skipped, already up-to-date
523 03:42:49.209559 Setting up local APIC...
524 03:42:49.212999 microcode: Update skipped, already up-to-date
525 03:42:49.215879 apic_id: 0x03 done.
526 03:42:49.219140 CPU #6 initialized
527 03:42:49.222793 microcode: Update skipped, already up-to-date
528 03:42:49.226336 CPU #5 initialized
529 03:42:49.226852 apic_id: 0x01 done.
530 03:42:49.229350 CPU #7 initialized
531 03:42:49.232897 microcode: Update skipped, already up-to-date
532 03:42:49.236378 CPU #2 initialized
533 03:42:49.236981 CPU #1 initialized
534 03:42:49.242605 bsp_do_flight_plan done after 454 msecs.
535 03:42:49.243259 CPU: frequency set to 4000 MHz
536 03:42:49.245796 Enabling SMIs.
537 03:42:49.252641 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
538 03:42:49.268576 SATAXPCIE1 indicates PCIe NVMe is present
539 03:42:49.271779 Probing TPM: done!
540 03:42:49.275379 Connected to device vid:did:rid of 1ae0:0028:00
541 03:42:49.285817 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
542 03:42:49.289061 Initialized TPM device CR50 revision 0
543 03:42:49.292035 Enabling S0i3.4
544 03:42:49.298852 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
545 03:42:49.302019 Found a VBT of 8704 bytes after decompression
546 03:42:49.309278 cse_lite: CSE RO boot. HybridStorageMode disabled
547 03:42:49.315505 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
548 03:42:49.391739 FSPS returned 0
549 03:42:49.395100 Executing Phase 1 of FspMultiPhaseSiInit
550 03:42:49.405110 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
551 03:42:49.407882 port C0 DISC req: usage 1 usb3 1 usb2 5
552 03:42:49.411627 Raw Buffer output 0 00000511
553 03:42:49.414599 Raw Buffer output 1 00000000
554 03:42:49.418000 pmc_send_ipc_cmd succeeded
555 03:42:49.425525 port C1 DISC req: usage 1 usb3 2 usb2 3
556 03:42:49.426075 Raw Buffer output 0 00000321
557 03:42:49.428210 Raw Buffer output 1 00000000
558 03:42:49.432232 pmc_send_ipc_cmd succeeded
559 03:42:49.437509 Detected 4 core, 8 thread CPU.
560 03:42:49.440964 Detected 4 core, 8 thread CPU.
561 03:42:49.675138 Display FSP Version Info HOB
562 03:42:49.678796 Reference Code - CPU = a.0.4c.31
563 03:42:49.681987 uCode Version = 0.0.0.86
564 03:42:49.685299 TXT ACM version = ff.ff.ff.ffff
565 03:42:49.688133 Reference Code - ME = a.0.4c.31
566 03:42:49.691632 MEBx version = 0.0.0.0
567 03:42:49.694693 ME Firmware Version = Consumer SKU
568 03:42:49.698490 Reference Code - PCH = a.0.4c.31
569 03:42:49.702087 PCH-CRID Status = Disabled
570 03:42:49.705195 PCH-CRID Original Value = ff.ff.ff.ffff
571 03:42:49.708260 PCH-CRID New Value = ff.ff.ff.ffff
572 03:42:49.711504 OPROM - RST - RAID = ff.ff.ff.ffff
573 03:42:49.715202 PCH Hsio Version = 4.0.0.0
574 03:42:49.718804 Reference Code - SA - System Agent = a.0.4c.31
575 03:42:49.721387 Reference Code - MRC = 2.0.0.1
576 03:42:49.724553 SA - PCIe Version = a.0.4c.31
577 03:42:49.728404 SA-CRID Status = Disabled
578 03:42:49.731499 SA-CRID Original Value = 0.0.0.1
579 03:42:49.734935 SA-CRID New Value = 0.0.0.1
580 03:42:49.738169 OPROM - VBIOS = ff.ff.ff.ffff
581 03:42:49.742138 IO Manageability Engine FW Version = 11.1.4.0
582 03:42:49.745361 PHY Build Version = 0.0.0.e0
583 03:42:49.748552 Thunderbolt(TM) FW Version = 0.0.0.0
584 03:42:49.755095 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
585 03:42:49.758492 ITSS IRQ Polarities Before:
586 03:42:49.759144 IPC0: 0xffffffff
587 03:42:49.761413 IPC1: 0xffffffff
588 03:42:49.761888 IPC2: 0xffffffff
589 03:42:49.764983 IPC3: 0xffffffff
590 03:42:49.768408 ITSS IRQ Polarities After:
591 03:42:49.769044 IPC0: 0xffffffff
592 03:42:49.771173 IPC1: 0xffffffff
593 03:42:49.771650 IPC2: 0xffffffff
594 03:42:49.774593 IPC3: 0xffffffff
595 03:42:49.777960 Found PCIe Root Port #9 at PCI: 00:1d.0.
596 03:42:49.791353 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
597 03:42:49.801178 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
598 03:42:49.814577 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
599 03:42:49.821447 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
600 03:42:49.821888 Enumerating buses...
601 03:42:49.827552 Show all devs... Before device enumeration.
602 03:42:49.831045 Root Device: enabled 1
603 03:42:49.831476 DOMAIN: 0000: enabled 1
604 03:42:49.834503 CPU_CLUSTER: 0: enabled 1
605 03:42:49.837783 PCI: 00:00.0: enabled 1
606 03:42:49.841200 PCI: 00:02.0: enabled 1
607 03:42:49.841740 PCI: 00:04.0: enabled 1
608 03:42:49.844729 PCI: 00:05.0: enabled 1
609 03:42:49.847301 PCI: 00:06.0: enabled 0
610 03:42:49.847736 PCI: 00:07.0: enabled 0
611 03:42:49.850506 PCI: 00:07.1: enabled 0
612 03:42:49.853925 PCI: 00:07.2: enabled 0
613 03:42:49.857676 PCI: 00:07.3: enabled 0
614 03:42:49.858104 PCI: 00:08.0: enabled 1
615 03:42:49.860855 PCI: 00:09.0: enabled 0
616 03:42:49.864249 PCI: 00:0a.0: enabled 0
617 03:42:49.868043 PCI: 00:0d.0: enabled 1
618 03:42:49.868580 PCI: 00:0d.1: enabled 0
619 03:42:49.870813 PCI: 00:0d.2: enabled 0
620 03:42:49.874253 PCI: 00:0d.3: enabled 0
621 03:42:49.877132 PCI: 00:0e.0: enabled 0
622 03:42:49.877596 PCI: 00:10.2: enabled 1
623 03:42:49.880698 PCI: 00:10.6: enabled 0
624 03:42:49.883844 PCI: 00:10.7: enabled 0
625 03:42:49.887242 PCI: 00:12.0: enabled 0
626 03:42:49.887669 PCI: 00:12.6: enabled 0
627 03:42:49.890536 PCI: 00:13.0: enabled 0
628 03:42:49.894307 PCI: 00:14.0: enabled 1
629 03:42:49.894897 PCI: 00:14.1: enabled 0
630 03:42:49.897866 PCI: 00:14.2: enabled 1
631 03:42:49.901193 PCI: 00:14.3: enabled 1
632 03:42:49.904483 PCI: 00:15.0: enabled 1
633 03:42:49.905128 PCI: 00:15.1: enabled 1
634 03:42:49.907214 PCI: 00:15.2: enabled 1
635 03:42:49.910893 PCI: 00:15.3: enabled 1
636 03:42:49.914497 PCI: 00:16.0: enabled 1
637 03:42:49.915067 PCI: 00:16.1: enabled 0
638 03:42:49.917515 PCI: 00:16.2: enabled 0
639 03:42:49.920381 PCI: 00:16.3: enabled 0
640 03:42:49.923768 PCI: 00:16.4: enabled 0
641 03:42:49.924243 PCI: 00:16.5: enabled 0
642 03:42:49.927157 PCI: 00:17.0: enabled 1
643 03:42:49.930850 PCI: 00:19.0: enabled 0
644 03:42:49.931278 PCI: 00:19.1: enabled 1
645 03:42:49.934504 PCI: 00:19.2: enabled 0
646 03:42:49.937141 PCI: 00:1c.0: enabled 1
647 03:42:49.940588 PCI: 00:1c.1: enabled 0
648 03:42:49.941117 PCI: 00:1c.2: enabled 0
649 03:42:49.944478 PCI: 00:1c.3: enabled 0
650 03:42:49.947091 PCI: 00:1c.4: enabled 0
651 03:42:49.950631 PCI: 00:1c.5: enabled 0
652 03:42:49.951187 PCI: 00:1c.6: enabled 1
653 03:42:49.953840 PCI: 00:1c.7: enabled 0
654 03:42:49.956880 PCI: 00:1d.0: enabled 1
655 03:42:49.960703 PCI: 00:1d.1: enabled 0
656 03:42:49.961250 PCI: 00:1d.2: enabled 1
657 03:42:49.964126 PCI: 00:1d.3: enabled 0
658 03:42:49.967091 PCI: 00:1e.0: enabled 1
659 03:42:49.970837 PCI: 00:1e.1: enabled 0
660 03:42:49.971367 PCI: 00:1e.2: enabled 1
661 03:42:49.973769 PCI: 00:1e.3: enabled 1
662 03:42:49.977230 PCI: 00:1f.0: enabled 1
663 03:42:49.977776 PCI: 00:1f.1: enabled 0
664 03:42:49.980622 PCI: 00:1f.2: enabled 1
665 03:42:49.983731 PCI: 00:1f.3: enabled 1
666 03:42:49.987418 PCI: 00:1f.4: enabled 0
667 03:42:49.987853 PCI: 00:1f.5: enabled 1
668 03:42:49.990460 PCI: 00:1f.6: enabled 0
669 03:42:49.994541 PCI: 00:1f.7: enabled 0
670 03:42:49.995077 APIC: 00: enabled 1
671 03:42:49.997652 GENERIC: 0.0: enabled 1
672 03:42:50.000927 GENERIC: 0.0: enabled 1
673 03:42:50.004321 GENERIC: 1.0: enabled 1
674 03:42:50.004901 GENERIC: 0.0: enabled 1
675 03:42:50.007108 GENERIC: 1.0: enabled 1
676 03:42:50.010582 USB0 port 0: enabled 1
677 03:42:50.013436 GENERIC: 0.0: enabled 1
678 03:42:50.014017 USB0 port 0: enabled 1
679 03:42:50.017096 GENERIC: 0.0: enabled 1
680 03:42:50.020119 I2C: 00:1a: enabled 1
681 03:42:50.020595 I2C: 00:31: enabled 1
682 03:42:50.024079 I2C: 00:32: enabled 1
683 03:42:50.026746 I2C: 00:10: enabled 1
684 03:42:50.027225 I2C: 00:15: enabled 1
685 03:42:50.030190 GENERIC: 0.0: enabled 0
686 03:42:50.033651 GENERIC: 1.0: enabled 0
687 03:42:50.037019 GENERIC: 0.0: enabled 1
688 03:42:50.037601 SPI: 00: enabled 1
689 03:42:50.040438 SPI: 00: enabled 1
690 03:42:50.043522 PNP: 0c09.0: enabled 1
691 03:42:50.043997 GENERIC: 0.0: enabled 1
692 03:42:50.046820 USB3 port 0: enabled 1
693 03:42:50.050634 USB3 port 1: enabled 1
694 03:42:50.051212 USB3 port 2: enabled 0
695 03:42:50.053473 USB3 port 3: enabled 0
696 03:42:50.056870 USB2 port 0: enabled 0
697 03:42:50.057452 USB2 port 1: enabled 1
698 03:42:50.060416 USB2 port 2: enabled 1
699 03:42:50.063673 USB2 port 3: enabled 0
700 03:42:50.067371 USB2 port 4: enabled 1
701 03:42:50.067959 USB2 port 5: enabled 0
702 03:42:50.070557 USB2 port 6: enabled 0
703 03:42:50.073859 USB2 port 7: enabled 0
704 03:42:50.074478 USB2 port 8: enabled 0
705 03:42:50.077146 USB2 port 9: enabled 0
706 03:42:50.079948 USB3 port 0: enabled 0
707 03:42:50.083700 USB3 port 1: enabled 1
708 03:42:50.084280 USB3 port 2: enabled 0
709 03:42:50.086464 USB3 port 3: enabled 0
710 03:42:50.090608 GENERIC: 0.0: enabled 1
711 03:42:50.091199 GENERIC: 1.0: enabled 1
712 03:42:50.093488 APIC: 01: enabled 1
713 03:42:50.097389 APIC: 03: enabled 1
714 03:42:50.097946 APIC: 07: enabled 1
715 03:42:50.099839 APIC: 05: enabled 1
716 03:42:50.100495 APIC: 04: enabled 1
717 03:42:50.103076 APIC: 02: enabled 1
718 03:42:50.106781 APIC: 06: enabled 1
719 03:42:50.107258 Compare with tree...
720 03:42:50.110211 Root Device: enabled 1
721 03:42:50.113813 DOMAIN: 0000: enabled 1
722 03:42:50.116368 PCI: 00:00.0: enabled 1
723 03:42:50.116860 PCI: 00:02.0: enabled 1
724 03:42:50.120161 PCI: 00:04.0: enabled 1
725 03:42:50.123339 GENERIC: 0.0: enabled 1
726 03:42:50.126768 PCI: 00:05.0: enabled 1
727 03:42:50.130353 PCI: 00:06.0: enabled 0
728 03:42:50.130835 PCI: 00:07.0: enabled 0
729 03:42:50.133188 GENERIC: 0.0: enabled 1
730 03:42:50.136238 PCI: 00:07.1: enabled 0
731 03:42:50.140254 GENERIC: 1.0: enabled 1
732 03:42:50.143453 PCI: 00:07.2: enabled 0
733 03:42:50.143903 GENERIC: 0.0: enabled 1
734 03:42:50.146383 PCI: 00:07.3: enabled 0
735 03:42:50.150019 GENERIC: 1.0: enabled 1
736 03:42:50.154150 PCI: 00:08.0: enabled 1
737 03:42:50.156962 PCI: 00:09.0: enabled 0
738 03:42:50.157395 PCI: 00:0a.0: enabled 0
739 03:42:50.159975 PCI: 00:0d.0: enabled 1
740 03:42:50.163116 USB0 port 0: enabled 1
741 03:42:50.166684 USB3 port 0: enabled 1
742 03:42:50.169673 USB3 port 1: enabled 1
743 03:42:50.173289 USB3 port 2: enabled 0
744 03:42:50.173721 USB3 port 3: enabled 0
745 03:42:50.176241 PCI: 00:0d.1: enabled 0
746 03:42:50.179946 PCI: 00:0d.2: enabled 0
747 03:42:50.183252 GENERIC: 0.0: enabled 1
748 03:42:50.186561 PCI: 00:0d.3: enabled 0
749 03:42:50.186997 PCI: 00:0e.0: enabled 0
750 03:42:50.190139 PCI: 00:10.2: enabled 1
751 03:42:50.193179 PCI: 00:10.6: enabled 0
752 03:42:50.196741 PCI: 00:10.7: enabled 0
753 03:42:50.199903 PCI: 00:12.0: enabled 0
754 03:42:50.200333 PCI: 00:12.6: enabled 0
755 03:42:50.202764 PCI: 00:13.0: enabled 0
756 03:42:50.206088 PCI: 00:14.0: enabled 1
757 03:42:50.209519 USB0 port 0: enabled 1
758 03:42:50.212753 USB2 port 0: enabled 0
759 03:42:50.213182 USB2 port 1: enabled 1
760 03:42:50.216432 USB2 port 2: enabled 1
761 03:42:50.220329 USB2 port 3: enabled 0
762 03:42:50.222903 USB2 port 4: enabled 1
763 03:42:50.226454 USB2 port 5: enabled 0
764 03:42:50.226988 USB2 port 6: enabled 0
765 03:42:50.229947 USB2 port 7: enabled 0
766 03:42:50.233287 USB2 port 8: enabled 0
767 03:42:50.236621 USB2 port 9: enabled 0
768 03:42:50.239408 USB3 port 0: enabled 0
769 03:42:50.242950 USB3 port 1: enabled 1
770 03:42:50.243383 USB3 port 2: enabled 0
771 03:42:50.246460 USB3 port 3: enabled 0
772 03:42:50.249980 PCI: 00:14.1: enabled 0
773 03:42:50.253147 PCI: 00:14.2: enabled 1
774 03:42:50.256164 PCI: 00:14.3: enabled 1
775 03:42:50.256595 GENERIC: 0.0: enabled 1
776 03:42:50.259432 PCI: 00:15.0: enabled 1
777 03:42:50.263182 I2C: 00:1a: enabled 1
778 03:42:50.266107 I2C: 00:31: enabled 1
779 03:42:50.269486 I2C: 00:32: enabled 1
780 03:42:50.269914 PCI: 00:15.1: enabled 1
781 03:42:50.272679 I2C: 00:10: enabled 1
782 03:42:50.276644 PCI: 00:15.2: enabled 1
783 03:42:50.279262 PCI: 00:15.3: enabled 1
784 03:42:50.279694 PCI: 00:16.0: enabled 1
785 03:42:50.282875 PCI: 00:16.1: enabled 0
786 03:42:50.286238 PCI: 00:16.2: enabled 0
787 03:42:50.289531 PCI: 00:16.3: enabled 0
788 03:42:50.293026 PCI: 00:16.4: enabled 0
789 03:42:50.293457 PCI: 00:16.5: enabled 0
790 03:42:50.295808 PCI: 00:17.0: enabled 1
791 03:42:50.299533 PCI: 00:19.0: enabled 0
792 03:42:50.303149 PCI: 00:19.1: enabled 1
793 03:42:50.303605 I2C: 00:15: enabled 1
794 03:42:50.306973 PCI: 00:19.2: enabled 0
795 03:42:50.310184 PCI: 00:1d.0: enabled 1
796 03:42:50.360201 GENERIC: 0.0: enabled 1
797 03:42:50.360797 PCI: 00:1e.0: enabled 1
798 03:42:50.361180 PCI: 00:1e.1: enabled 0
799 03:42:50.361894 PCI: 00:1e.2: enabled 1
800 03:42:50.362265 SPI: 00: enabled 1
801 03:42:50.362696 PCI: 00:1e.3: enabled 1
802 03:42:50.363039 SPI: 00: enabled 1
803 03:42:50.363364 PCI: 00:1f.0: enabled 1
804 03:42:50.363680 PNP: 0c09.0: enabled 1
805 03:42:50.363994 PCI: 00:1f.1: enabled 0
806 03:42:50.364306 PCI: 00:1f.2: enabled 1
807 03:42:50.364613 GENERIC: 0.0: enabled 1
808 03:42:50.364926 GENERIC: 0.0: enabled 1
809 03:42:50.365236 GENERIC: 1.0: enabled 1
810 03:42:50.365548 PCI: 00:1f.3: enabled 1
811 03:42:50.365922 PCI: 00:1f.4: enabled 0
812 03:42:50.366249 PCI: 00:1f.5: enabled 1
813 03:42:50.366587 PCI: 00:1f.6: enabled 0
814 03:42:50.366895 PCI: 00:1f.7: enabled 0
815 03:42:50.378301 CPU_CLUSTER: 0: enabled 1
816 03:42:50.378806 APIC: 00: enabled 1
817 03:42:50.379161 APIC: 01: enabled 1
818 03:42:50.379804 APIC: 03: enabled 1
819 03:42:50.380141 APIC: 07: enabled 1
820 03:42:50.380450 APIC: 05: enabled 1
821 03:42:50.381539 APIC: 04: enabled 1
822 03:42:50.381967 APIC: 02: enabled 1
823 03:42:50.382307 APIC: 06: enabled 1
824 03:42:50.384922 Root Device scanning...
825 03:42:50.388160 scan_static_bus for Root Device
826 03:42:50.391855 DOMAIN: 0000 enabled
827 03:42:50.392296 CPU_CLUSTER: 0 enabled
828 03:42:50.394673 DOMAIN: 0000 scanning...
829 03:42:50.397865 PCI: pci_scan_bus for bus 00
830 03:42:50.401643 PCI: 00:00.0 [8086/0000] ops
831 03:42:50.404646 PCI: 00:00.0 [8086/9a12] enabled
832 03:42:50.408022 PCI: 00:02.0 [8086/0000] bus ops
833 03:42:50.411811 PCI: 00:02.0 [8086/9a40] enabled
834 03:42:50.414973 PCI: 00:04.0 [8086/0000] bus ops
835 03:42:50.417863 PCI: 00:04.0 [8086/9a03] enabled
836 03:42:50.421886 PCI: 00:05.0 [8086/9a19] enabled
837 03:42:50.424829 PCI: 00:07.0 [0000/0000] hidden
838 03:42:50.427828 PCI: 00:08.0 [8086/9a11] enabled
839 03:42:50.431392 PCI: 00:0a.0 [8086/9a0d] disabled
840 03:42:50.434533 PCI: 00:0d.0 [8086/0000] bus ops
841 03:42:50.437638 PCI: 00:0d.0 [8086/9a13] enabled
842 03:42:50.441698 PCI: 00:14.0 [8086/0000] bus ops
843 03:42:50.444628 PCI: 00:14.0 [8086/a0ed] enabled
844 03:42:50.448271 PCI: 00:14.2 [8086/a0ef] enabled
845 03:42:50.451010 PCI: 00:14.3 [8086/0000] bus ops
846 03:42:50.454287 PCI: 00:14.3 [8086/a0f0] enabled
847 03:42:50.457423 PCI: 00:15.0 [8086/0000] bus ops
848 03:42:50.461154 PCI: 00:15.0 [8086/a0e8] enabled
849 03:42:50.464754 PCI: 00:15.1 [8086/0000] bus ops
850 03:42:50.467826 PCI: 00:15.1 [8086/a0e9] enabled
851 03:42:50.471702 PCI: 00:15.2 [8086/0000] bus ops
852 03:42:50.474304 PCI: 00:15.2 [8086/a0ea] enabled
853 03:42:50.477776 PCI: 00:15.3 [8086/0000] bus ops
854 03:42:50.481619 PCI: 00:15.3 [8086/a0eb] enabled
855 03:42:50.484334 PCI: 00:16.0 [8086/0000] ops
856 03:42:50.487989 PCI: 00:16.0 [8086/a0e0] enabled
857 03:42:50.494913 PCI: Static device PCI: 00:17.0 not found, disabling it.
858 03:42:50.497967 PCI: 00:19.0 [8086/0000] bus ops
859 03:42:50.501104 PCI: 00:19.0 [8086/a0c5] disabled
860 03:42:50.504753 PCI: 00:19.1 [8086/0000] bus ops
861 03:42:50.507928 PCI: 00:19.1 [8086/a0c6] enabled
862 03:42:50.511099 PCI: 00:1d.0 [8086/0000] bus ops
863 03:42:50.514292 PCI: 00:1d.0 [8086/a0b0] enabled
864 03:42:50.514643 PCI: 00:1e.0 [8086/0000] ops
865 03:42:50.521231 PCI: 00:1e.0 [8086/a0a8] enabled
866 03:42:50.524162 PCI: 00:1e.2 [8086/0000] bus ops
867 03:42:50.527658 PCI: 00:1e.2 [8086/a0aa] enabled
868 03:42:50.531022 PCI: 00:1e.3 [8086/0000] bus ops
869 03:42:50.534082 PCI: 00:1e.3 [8086/a0ab] enabled
870 03:42:50.537994 PCI: 00:1f.0 [8086/0000] bus ops
871 03:42:50.541453 PCI: 00:1f.0 [8086/a087] enabled
872 03:42:50.542004 RTC Init
873 03:42:50.544022 Set power on after power failure.
874 03:42:50.547384 Disabling Deep S3
875 03:42:50.547812 Disabling Deep S3
876 03:42:50.551365 Disabling Deep S4
877 03:42:50.551992 Disabling Deep S4
878 03:42:50.553988 Disabling Deep S5
879 03:42:50.554459 Disabling Deep S5
880 03:42:50.557069 PCI: 00:1f.2 [0000/0000] hidden
881 03:42:50.560854 PCI: 00:1f.3 [8086/0000] bus ops
882 03:42:50.564379 PCI: 00:1f.3 [8086/a0c8] enabled
883 03:42:50.567555 PCI: 00:1f.5 [8086/0000] bus ops
884 03:42:50.571182 PCI: 00:1f.5 [8086/a0a4] enabled
885 03:42:50.574924 PCI: Leftover static devices:
886 03:42:50.577665 PCI: 00:10.2
887 03:42:50.578095 PCI: 00:10.6
888 03:42:50.581021 PCI: 00:10.7
889 03:42:50.581540 PCI: 00:06.0
890 03:42:50.581884 PCI: 00:07.1
891 03:42:50.584360 PCI: 00:07.2
892 03:42:50.584820 PCI: 00:07.3
893 03:42:50.587145 PCI: 00:09.0
894 03:42:50.587575 PCI: 00:0d.1
895 03:42:50.587913 PCI: 00:0d.2
896 03:42:50.590768 PCI: 00:0d.3
897 03:42:50.591300 PCI: 00:0e.0
898 03:42:50.594086 PCI: 00:12.0
899 03:42:50.594586 PCI: 00:12.6
900 03:42:50.597214 PCI: 00:13.0
901 03:42:50.597640 PCI: 00:14.1
902 03:42:50.597975 PCI: 00:16.1
903 03:42:50.600564 PCI: 00:16.2
904 03:42:50.600991 PCI: 00:16.3
905 03:42:50.603875 PCI: 00:16.4
906 03:42:50.604301 PCI: 00:16.5
907 03:42:50.604635 PCI: 00:17.0
908 03:42:50.607535 PCI: 00:19.2
909 03:42:50.607961 PCI: 00:1e.1
910 03:42:50.611284 PCI: 00:1f.1
911 03:42:50.611837 PCI: 00:1f.4
912 03:42:50.612183 PCI: 00:1f.6
913 03:42:50.614096 PCI: 00:1f.7
914 03:42:50.617502 PCI: Check your devicetree.cb.
915 03:42:50.620625 PCI: 00:02.0 scanning...
916 03:42:50.624251 scan_generic_bus for PCI: 00:02.0
917 03:42:50.627165 scan_generic_bus for PCI: 00:02.0 done
918 03:42:50.630483 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
919 03:42:50.633631 PCI: 00:04.0 scanning...
920 03:42:50.637508 scan_generic_bus for PCI: 00:04.0
921 03:42:50.641124 GENERIC: 0.0 enabled
922 03:42:50.647385 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
923 03:42:50.650853 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
924 03:42:50.653886 PCI: 00:0d.0 scanning...
925 03:42:50.657031 scan_static_bus for PCI: 00:0d.0
926 03:42:50.660931 USB0 port 0 enabled
927 03:42:50.661515 USB0 port 0 scanning...
928 03:42:50.663630 scan_static_bus for USB0 port 0
929 03:42:50.666819 USB3 port 0 enabled
930 03:42:50.670242 USB3 port 1 enabled
931 03:42:50.670849 USB3 port 2 disabled
932 03:42:50.673494 USB3 port 3 disabled
933 03:42:50.676593 USB3 port 0 scanning...
934 03:42:50.680424 scan_static_bus for USB3 port 0
935 03:42:50.683514 scan_static_bus for USB3 port 0 done
936 03:42:50.686854 scan_bus: bus USB3 port 0 finished in 6 msecs
937 03:42:50.690202 USB3 port 1 scanning...
938 03:42:50.693573 scan_static_bus for USB3 port 1
939 03:42:50.696868 scan_static_bus for USB3 port 1 done
940 03:42:50.700509 scan_bus: bus USB3 port 1 finished in 6 msecs
941 03:42:50.707260 scan_static_bus for USB0 port 0 done
942 03:42:50.710293 scan_bus: bus USB0 port 0 finished in 43 msecs
943 03:42:50.713180 scan_static_bus for PCI: 00:0d.0 done
944 03:42:50.719938 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
945 03:42:50.720413 PCI: 00:14.0 scanning...
946 03:42:50.723123 scan_static_bus for PCI: 00:14.0
947 03:42:50.726770 USB0 port 0 enabled
948 03:42:50.730229 USB0 port 0 scanning...
949 03:42:50.733201 scan_static_bus for USB0 port 0
950 03:42:50.733925 USB2 port 0 disabled
951 03:42:50.736270 USB2 port 1 enabled
952 03:42:50.739934 USB2 port 2 enabled
953 03:42:50.740610 USB2 port 3 disabled
954 03:42:50.743438 USB2 port 4 enabled
955 03:42:50.746476 USB2 port 5 disabled
956 03:42:50.746903 USB2 port 6 disabled
957 03:42:50.750522 USB2 port 7 disabled
958 03:42:50.753575 USB2 port 8 disabled
959 03:42:50.754110 USB2 port 9 disabled
960 03:42:50.757164 USB3 port 0 disabled
961 03:42:50.757721 USB3 port 1 enabled
962 03:42:50.760192 USB3 port 2 disabled
963 03:42:50.763577 USB3 port 3 disabled
964 03:42:50.764010 USB2 port 1 scanning...
965 03:42:50.766718 scan_static_bus for USB2 port 1
966 03:42:50.773592 scan_static_bus for USB2 port 1 done
967 03:42:50.776934 scan_bus: bus USB2 port 1 finished in 6 msecs
968 03:42:50.780034 USB2 port 2 scanning...
969 03:42:50.783514 scan_static_bus for USB2 port 2
970 03:42:50.786981 scan_static_bus for USB2 port 2 done
971 03:42:50.790058 scan_bus: bus USB2 port 2 finished in 6 msecs
972 03:42:50.793057 USB2 port 4 scanning...
973 03:42:50.796755 scan_static_bus for USB2 port 4
974 03:42:50.800589 scan_static_bus for USB2 port 4 done
975 03:42:50.806866 scan_bus: bus USB2 port 4 finished in 6 msecs
976 03:42:50.807434 USB3 port 1 scanning...
977 03:42:50.809888 scan_static_bus for USB3 port 1
978 03:42:50.813423 scan_static_bus for USB3 port 1 done
979 03:42:50.819962 scan_bus: bus USB3 port 1 finished in 6 msecs
980 03:42:50.823045 scan_static_bus for USB0 port 0 done
981 03:42:50.826219 scan_bus: bus USB0 port 0 finished in 93 msecs
982 03:42:50.832887 scan_static_bus for PCI: 00:14.0 done
983 03:42:50.836348 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
984 03:42:50.839206 PCI: 00:14.3 scanning...
985 03:42:50.842737 scan_static_bus for PCI: 00:14.3
986 03:42:50.843189 GENERIC: 0.0 enabled
987 03:42:50.850082 scan_static_bus for PCI: 00:14.3 done
988 03:42:50.853312 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
989 03:42:50.856704 PCI: 00:15.0 scanning...
990 03:42:50.859225 scan_static_bus for PCI: 00:15.0
991 03:42:50.859704 I2C: 00:1a enabled
992 03:42:50.863046 I2C: 00:31 enabled
993 03:42:50.866272 I2C: 00:32 enabled
994 03:42:50.869972 scan_static_bus for PCI: 00:15.0 done
995 03:42:50.873051 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
996 03:42:50.876357 PCI: 00:15.1 scanning...
997 03:42:50.879962 scan_static_bus for PCI: 00:15.1
998 03:42:50.883544 I2C: 00:10 enabled
999 03:42:50.886378 scan_static_bus for PCI: 00:15.1 done
1000 03:42:50.890118 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1001 03:42:50.893944 PCI: 00:15.2 scanning...
1002 03:42:50.896921 scan_static_bus for PCI: 00:15.2
1003 03:42:50.900045 scan_static_bus for PCI: 00:15.2 done
1004 03:42:50.903146 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1005 03:42:50.906252 PCI: 00:15.3 scanning...
1006 03:42:50.909578 scan_static_bus for PCI: 00:15.3
1007 03:42:50.913442 scan_static_bus for PCI: 00:15.3 done
1008 03:42:50.919884 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1009 03:42:50.922972 PCI: 00:19.1 scanning...
1010 03:42:50.926325 scan_static_bus for PCI: 00:19.1
1011 03:42:50.927012 I2C: 00:15 enabled
1012 03:42:50.929742 scan_static_bus for PCI: 00:19.1 done
1013 03:42:50.935884 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1014 03:42:50.939290 PCI: 00:1d.0 scanning...
1015 03:42:50.942518 do_pci_scan_bridge for PCI: 00:1d.0
1016 03:42:50.945830 PCI: pci_scan_bus for bus 01
1017 03:42:50.949872 PCI: 01:00.0 [1c5c/174a] enabled
1018 03:42:50.950306 GENERIC: 0.0 enabled
1019 03:42:50.956005 Enabling Common Clock Configuration
1020 03:42:50.959017 L1 Sub-State supported from root port 29
1021 03:42:50.962371 L1 Sub-State Support = 0xf
1022 03:42:50.965550 CommonModeRestoreTime = 0x28
1023 03:42:50.969115 Power On Value = 0x16, Power On Scale = 0x0
1024 03:42:50.969658 ASPM: Enabled L1
1025 03:42:50.975811 PCIe: Max_Payload_Size adjusted to 128
1026 03:42:50.979223 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1027 03:42:50.982546 PCI: 00:1e.2 scanning...
1028 03:42:50.985894 scan_generic_bus for PCI: 00:1e.2
1029 03:42:50.986454 SPI: 00 enabled
1030 03:42:50.992657 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1031 03:42:50.998957 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1032 03:42:51.002638 PCI: 00:1e.3 scanning...
1033 03:42:51.005776 scan_generic_bus for PCI: 00:1e.3
1034 03:42:51.006304 SPI: 00 enabled
1035 03:42:51.012617 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1036 03:42:51.015236 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1037 03:42:51.018783 PCI: 00:1f.0 scanning...
1038 03:42:51.022354 scan_static_bus for PCI: 00:1f.0
1039 03:42:51.025971 PNP: 0c09.0 enabled
1040 03:42:51.029138 PNP: 0c09.0 scanning...
1041 03:42:51.032266 scan_static_bus for PNP: 0c09.0
1042 03:42:51.035613 scan_static_bus for PNP: 0c09.0 done
1043 03:42:51.039427 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1044 03:42:51.042157 scan_static_bus for PCI: 00:1f.0 done
1045 03:42:51.048838 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1046 03:42:51.049391 PCI: 00:1f.2 scanning...
1047 03:42:51.052733 scan_static_bus for PCI: 00:1f.2
1048 03:42:51.056185 GENERIC: 0.0 enabled
1049 03:42:51.058509 GENERIC: 0.0 scanning...
1050 03:42:51.062473 scan_static_bus for GENERIC: 0.0
1051 03:42:51.065241 GENERIC: 0.0 enabled
1052 03:42:51.065778 GENERIC: 1.0 enabled
1053 03:42:51.069577 scan_static_bus for GENERIC: 0.0 done
1054 03:42:51.075295 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1055 03:42:51.078727 scan_static_bus for PCI: 00:1f.2 done
1056 03:42:51.081973 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1057 03:42:51.085560 PCI: 00:1f.3 scanning...
1058 03:42:51.088553 scan_static_bus for PCI: 00:1f.3
1059 03:42:51.092044 scan_static_bus for PCI: 00:1f.3 done
1060 03:42:51.098371 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1061 03:42:51.102171 PCI: 00:1f.5 scanning...
1062 03:42:51.105523 scan_generic_bus for PCI: 00:1f.5
1063 03:42:51.108871 scan_generic_bus for PCI: 00:1f.5 done
1064 03:42:51.112060 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1065 03:42:51.118818 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1066 03:42:51.122047 scan_static_bus for Root Device done
1067 03:42:51.125550 scan_bus: bus Root Device finished in 737 msecs
1068 03:42:51.128647 done
1069 03:42:51.132072 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1070 03:42:51.135217 Chrome EC: UHEPI supported
1071 03:42:51.142587 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1072 03:42:51.148620 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1073 03:42:51.152230 SPI flash protection: WPSW=0 SRP0=0
1074 03:42:51.158565 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1075 03:42:51.162369 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1076 03:42:51.164952 found VGA at PCI: 00:02.0
1077 03:42:51.168739 Setting up VGA for PCI: 00:02.0
1078 03:42:51.175374 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1079 03:42:51.178534 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1080 03:42:51.182028 Allocating resources...
1081 03:42:51.185536 Reading resources...
1082 03:42:51.188424 Root Device read_resources bus 0 link: 0
1083 03:42:51.191858 DOMAIN: 0000 read_resources bus 0 link: 0
1084 03:42:51.198555 PCI: 00:04.0 read_resources bus 1 link: 0
1085 03:42:51.202003 PCI: 00:04.0 read_resources bus 1 link: 0 done
1086 03:42:51.208279 PCI: 00:0d.0 read_resources bus 0 link: 0
1087 03:42:51.211703 USB0 port 0 read_resources bus 0 link: 0
1088 03:42:51.218428 USB0 port 0 read_resources bus 0 link: 0 done
1089 03:42:51.221385 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1090 03:42:51.224783 PCI: 00:14.0 read_resources bus 0 link: 0
1091 03:42:51.231601 USB0 port 0 read_resources bus 0 link: 0
1092 03:42:51.234767 USB0 port 0 read_resources bus 0 link: 0 done
1093 03:42:51.241751 PCI: 00:14.0 read_resources bus 0 link: 0 done
1094 03:42:51.245740 PCI: 00:14.3 read_resources bus 0 link: 0
1095 03:42:51.251727 PCI: 00:14.3 read_resources bus 0 link: 0 done
1096 03:42:51.255196 PCI: 00:15.0 read_resources bus 0 link: 0
1097 03:42:51.261812 PCI: 00:15.0 read_resources bus 0 link: 0 done
1098 03:42:51.265624 PCI: 00:15.1 read_resources bus 0 link: 0
1099 03:42:51.272083 PCI: 00:15.1 read_resources bus 0 link: 0 done
1100 03:42:51.274846 PCI: 00:19.1 read_resources bus 0 link: 0
1101 03:42:51.282600 PCI: 00:19.1 read_resources bus 0 link: 0 done
1102 03:42:51.285462 PCI: 00:1d.0 read_resources bus 1 link: 0
1103 03:42:51.292536 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1104 03:42:51.295199 PCI: 00:1e.2 read_resources bus 2 link: 0
1105 03:42:51.302394 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1106 03:42:51.305455 PCI: 00:1e.3 read_resources bus 3 link: 0
1107 03:42:51.312601 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1108 03:42:51.315724 PCI: 00:1f.0 read_resources bus 0 link: 0
1109 03:42:51.322115 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1110 03:42:51.325876 PCI: 00:1f.2 read_resources bus 0 link: 0
1111 03:42:51.328560 GENERIC: 0.0 read_resources bus 0 link: 0
1112 03:42:51.335905 GENERIC: 0.0 read_resources bus 0 link: 0 done
1113 03:42:51.338837 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1114 03:42:51.346156 DOMAIN: 0000 read_resources bus 0 link: 0 done
1115 03:42:51.350212 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1116 03:42:51.356671 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1117 03:42:51.359979 Root Device read_resources bus 0 link: 0 done
1118 03:42:51.363187 Done reading resources.
1119 03:42:51.370127 Show resources in subtree (Root Device)...After reading.
1120 03:42:51.372938 Root Device child on link 0 DOMAIN: 0000
1121 03:42:51.376492 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1122 03:42:51.386372 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1123 03:42:51.396627 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1124 03:42:51.399145 PCI: 00:00.0
1125 03:42:51.409715 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1126 03:42:51.416375 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1127 03:42:51.426773 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1128 03:42:51.435953 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1129 03:42:51.445876 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1130 03:42:51.455910 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1131 03:42:51.465994 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1132 03:42:51.472837 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1133 03:42:51.482569 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1134 03:42:51.492620 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1135 03:42:51.502873 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1136 03:42:51.512331 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1137 03:42:51.519034 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1138 03:42:51.528569 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1139 03:42:51.538576 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1140 03:42:51.549133 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1141 03:42:51.559004 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1142 03:42:51.569298 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1143 03:42:51.575453 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1144 03:42:51.585390 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1145 03:42:51.588534 PCI: 00:02.0
1146 03:42:51.598062 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 03:42:51.608781 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 03:42:51.618740 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 03:42:51.621903 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1150 03:42:51.631457 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1151 03:42:51.635592 GENERIC: 0.0
1152 03:42:51.636159 PCI: 00:05.0
1153 03:42:51.644971 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 03:42:51.651591 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1155 03:42:51.652152 GENERIC: 0.0
1156 03:42:51.655099 PCI: 00:08.0
1157 03:42:51.665160 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1158 03:42:51.665726 PCI: 00:0a.0
1159 03:42:51.667883 PCI: 00:0d.0 child on link 0 USB0 port 0
1160 03:42:51.678131 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1161 03:42:51.685017 USB0 port 0 child on link 0 USB3 port 0
1162 03:42:51.685572 USB3 port 0
1163 03:42:51.687727 USB3 port 1
1164 03:42:51.688233 USB3 port 2
1165 03:42:51.691139 USB3 port 3
1166 03:42:51.695029 PCI: 00:14.0 child on link 0 USB0 port 0
1167 03:42:51.705117 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 03:42:51.711303 USB0 port 0 child on link 0 USB2 port 0
1169 03:42:51.711880 USB2 port 0
1170 03:42:51.714769 USB2 port 1
1171 03:42:51.715345 USB2 port 2
1172 03:42:51.717869 USB2 port 3
1173 03:42:51.718352 USB2 port 4
1174 03:42:51.721330 USB2 port 5
1175 03:42:51.721813 USB2 port 6
1176 03:42:51.725391 USB2 port 7
1177 03:42:51.725969 USB2 port 8
1178 03:42:51.728006 USB2 port 9
1179 03:42:51.728582 USB3 port 0
1180 03:42:51.731063 USB3 port 1
1181 03:42:51.731773 USB3 port 2
1182 03:42:51.734682 USB3 port 3
1183 03:42:51.735153 PCI: 00:14.2
1184 03:42:51.744261 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1185 03:42:51.755046 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1186 03:42:51.761493 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1187 03:42:51.771328 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1188 03:42:51.771894 GENERIC: 0.0
1189 03:42:51.778004 PCI: 00:15.0 child on link 0 I2C: 00:1a
1190 03:42:51.787479 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 03:42:51.788035 I2C: 00:1a
1192 03:42:51.791280 I2C: 00:31
1193 03:42:51.791802 I2C: 00:32
1194 03:42:51.794448 PCI: 00:15.1 child on link 0 I2C: 00:10
1195 03:42:51.804386 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 03:42:51.807803 I2C: 00:10
1197 03:42:51.808330 PCI: 00:15.2
1198 03:42:51.817846 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 03:42:51.820677 PCI: 00:15.3
1200 03:42:51.830603 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 03:42:51.831150 PCI: 00:16.0
1202 03:42:51.841134 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 03:42:51.844129 PCI: 00:19.0
1204 03:42:51.847398 PCI: 00:19.1 child on link 0 I2C: 00:15
1205 03:42:51.857883 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 03:42:51.860808 I2C: 00:15
1207 03:42:51.864390 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1208 03:42:51.874249 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1209 03:42:51.883635 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1210 03:42:51.890579 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1211 03:42:51.893857 GENERIC: 0.0
1212 03:42:51.894470 PCI: 01:00.0
1213 03:42:51.903640 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 03:42:51.914021 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1215 03:42:51.924074 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1216 03:42:51.924690 PCI: 00:1e.0
1217 03:42:51.937177 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1218 03:42:51.940575 PCI: 00:1e.2 child on link 0 SPI: 00
1219 03:42:51.950764 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1220 03:42:51.951332 SPI: 00
1221 03:42:51.957103 PCI: 00:1e.3 child on link 0 SPI: 00
1222 03:42:51.967410 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1223 03:42:51.968048 SPI: 00
1224 03:42:51.970822 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1225 03:42:51.980165 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1226 03:42:51.980731 PNP: 0c09.0
1227 03:42:51.990246 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1228 03:42:51.993828 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1229 03:42:52.003871 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1230 03:42:52.013524 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1231 03:42:52.016936 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1232 03:42:52.020187 GENERIC: 0.0
1233 03:42:52.023164 GENERIC: 1.0
1234 03:42:52.023636 PCI: 00:1f.3
1235 03:42:52.033292 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1236 03:42:52.043204 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1237 03:42:52.046933 PCI: 00:1f.5
1238 03:42:52.053659 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1239 03:42:52.060454 CPU_CLUSTER: 0 child on link 0 APIC: 00
1240 03:42:52.061051 APIC: 00
1241 03:42:52.061426 APIC: 01
1242 03:42:52.063144 APIC: 03
1243 03:42:52.063617 APIC: 07
1244 03:42:52.066569 APIC: 05
1245 03:42:52.067149 APIC: 04
1246 03:42:52.067529 APIC: 02
1247 03:42:52.069698 APIC: 06
1248 03:42:52.076320 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1249 03:42:52.082905 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1250 03:42:52.090277 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1251 03:42:52.093144 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1252 03:42:52.099440 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1253 03:42:52.103388 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1254 03:42:52.106487 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1255 03:42:52.112934 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1256 03:42:52.123156 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1257 03:42:52.129498 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1258 03:42:52.136097 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1259 03:42:52.142817 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1260 03:42:52.149728 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1261 03:42:52.159061 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1262 03:42:52.165941 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1263 03:42:52.168868 DOMAIN: 0000: Resource ranges:
1264 03:42:52.173218 * Base: 1000, Size: 800, Tag: 100
1265 03:42:52.175992 * Base: 1900, Size: e700, Tag: 100
1266 03:42:52.183110 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1267 03:42:52.189302 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1268 03:42:52.196681 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1269 03:42:52.202365 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1270 03:42:52.209383 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1271 03:42:52.219170 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1272 03:42:52.225781 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1273 03:42:52.232727 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1274 03:42:52.242253 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1275 03:42:52.248686 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1276 03:42:52.255958 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1277 03:42:52.265068 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1278 03:42:52.272053 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1279 03:42:52.279101 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1280 03:42:52.288325 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1281 03:42:52.295356 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1282 03:42:52.301369 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1283 03:42:52.311362 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1284 03:42:52.318765 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1285 03:42:52.324852 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1286 03:42:52.335239 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1287 03:42:52.341524 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1288 03:42:52.348176 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1289 03:42:52.358130 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1290 03:42:52.364464 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1291 03:42:52.367845 DOMAIN: 0000: Resource ranges:
1292 03:42:52.371617 * Base: 7fc00000, Size: 40400000, Tag: 200
1293 03:42:52.374938 * Base: d0000000, Size: 28000000, Tag: 200
1294 03:42:52.381374 * Base: fa000000, Size: 1000000, Tag: 200
1295 03:42:52.384965 * Base: fb001000, Size: 2fff000, Tag: 200
1296 03:42:52.387649 * Base: fe010000, Size: 2e000, Tag: 200
1297 03:42:52.395057 * Base: fe03f000, Size: d41000, Tag: 200
1298 03:42:52.397740 * Base: fed88000, Size: 8000, Tag: 200
1299 03:42:52.400901 * Base: fed93000, Size: d000, Tag: 200
1300 03:42:52.404435 * Base: feda2000, Size: 1e000, Tag: 200
1301 03:42:52.407977 * Base: fede0000, Size: 1220000, Tag: 200
1302 03:42:52.414312 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1303 03:42:52.421155 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1304 03:42:52.427745 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1305 03:42:52.434512 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1306 03:42:52.441145 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1307 03:42:52.448065 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1308 03:42:52.454642 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1309 03:42:52.461150 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1310 03:42:52.467721 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1311 03:42:52.474210 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1312 03:42:52.480736 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1313 03:42:52.487412 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1314 03:42:52.493976 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1315 03:42:52.500689 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1316 03:42:52.507608 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1317 03:42:52.514354 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1318 03:42:52.520872 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1319 03:42:52.527094 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1320 03:42:52.534128 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1321 03:42:52.541161 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1322 03:42:52.547475 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1323 03:42:52.554111 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1324 03:42:52.560614 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1325 03:42:52.567359 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1326 03:42:52.577088 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1327 03:42:52.580696 PCI: 00:1d.0: Resource ranges:
1328 03:42:52.583690 * Base: 7fc00000, Size: 100000, Tag: 200
1329 03:42:52.590314 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1330 03:42:52.596923 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1331 03:42:52.603768 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1332 03:42:52.613954 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1333 03:42:52.619785 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1334 03:42:52.623091 Root Device assign_resources, bus 0 link: 0
1335 03:42:52.626479 DOMAIN: 0000 assign_resources, bus 0 link: 0
1336 03:42:52.636840 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1337 03:42:52.643260 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1338 03:42:52.653560 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1339 03:42:52.660478 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1340 03:42:52.667100 PCI: 00:04.0 assign_resources, bus 1 link: 0
1341 03:42:52.669937 PCI: 00:04.0 assign_resources, bus 1 link: 0
1342 03:42:52.680306 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1343 03:42:52.686629 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1344 03:42:52.696569 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1345 03:42:52.699612 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1346 03:42:52.703360 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1347 03:42:52.712887 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1348 03:42:52.715877 PCI: 00:14.0 assign_resources, bus 0 link: 0
1349 03:42:52.723038 PCI: 00:14.0 assign_resources, bus 0 link: 0
1350 03:42:52.729349 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1351 03:42:52.739189 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1352 03:42:52.746436 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1353 03:42:52.749532 PCI: 00:14.3 assign_resources, bus 0 link: 0
1354 03:42:52.755971 PCI: 00:14.3 assign_resources, bus 0 link: 0
1355 03:42:52.762393 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1356 03:42:52.769126 PCI: 00:15.0 assign_resources, bus 0 link: 0
1357 03:42:52.772807 PCI: 00:15.0 assign_resources, bus 0 link: 0
1358 03:42:52.782658 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1359 03:42:52.785662 PCI: 00:15.1 assign_resources, bus 0 link: 0
1360 03:42:52.788628 PCI: 00:15.1 assign_resources, bus 0 link: 0
1361 03:42:52.799227 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1362 03:42:52.806284 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1363 03:42:52.815773 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1364 03:42:52.822394 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1365 03:42:52.828722 PCI: 00:19.1 assign_resources, bus 0 link: 0
1366 03:42:52.831564 PCI: 00:19.1 assign_resources, bus 0 link: 0
1367 03:42:52.841952 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1368 03:42:52.851922 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1369 03:42:52.858562 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1370 03:42:52.865122 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1371 03:42:52.871813 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1372 03:42:52.881940 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1373 03:42:52.888604 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1374 03:42:52.891030 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1375 03:42:52.901561 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1376 03:42:52.904568 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1377 03:42:52.911756 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1378 03:42:52.917905 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1379 03:42:52.924301 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1380 03:42:52.927857 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1381 03:42:52.930730 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1382 03:42:52.937247 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1383 03:42:52.941312 LPC: Trying to open IO window from 800 size 1ff
1384 03:42:52.950620 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1385 03:42:52.957520 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1386 03:42:52.967344 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1387 03:42:52.970387 DOMAIN: 0000 assign_resources, bus 0 link: 0
1388 03:42:52.977313 Root Device assign_resources, bus 0 link: 0
1389 03:42:52.977590 Done setting resources.
1390 03:42:52.983899 Show resources in subtree (Root Device)...After assigning values.
1391 03:42:52.990938 Root Device child on link 0 DOMAIN: 0000
1392 03:42:52.993838 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1393 03:42:53.004211 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1394 03:42:53.014124 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1395 03:42:53.014918 PCI: 00:00.0
1396 03:42:53.024016 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1397 03:42:53.033824 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1398 03:42:53.043503 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1399 03:42:53.053315 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1400 03:42:53.060310 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1401 03:42:53.070268 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1402 03:42:53.080639 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1403 03:42:53.090298 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1404 03:42:53.099778 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1405 03:42:53.110610 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1406 03:42:53.116372 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1407 03:42:53.126591 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1408 03:42:53.136168 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1409 03:42:53.146568 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1410 03:42:53.156575 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1411 03:42:53.163356 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1412 03:42:53.176408 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1413 03:42:53.182767 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1414 03:42:53.193026 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1415 03:42:53.203200 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1416 03:42:53.206360 PCI: 00:02.0
1417 03:42:53.215940 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1418 03:42:53.226478 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1419 03:42:53.236770 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1420 03:42:53.239513 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1421 03:42:53.249786 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1422 03:42:53.252742 GENERIC: 0.0
1423 03:42:53.253318 PCI: 00:05.0
1424 03:42:53.262382 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1425 03:42:53.269485 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1426 03:42:53.269930 GENERIC: 0.0
1427 03:42:53.272809 PCI: 00:08.0
1428 03:42:53.282548 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1429 03:42:53.283089 PCI: 00:0a.0
1430 03:42:53.288890 PCI: 00:0d.0 child on link 0 USB0 port 0
1431 03:42:53.298965 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1432 03:42:53.302558 USB0 port 0 child on link 0 USB3 port 0
1433 03:42:53.305990 USB3 port 0
1434 03:42:53.306467 USB3 port 1
1435 03:42:53.309078 USB3 port 2
1436 03:42:53.309658 USB3 port 3
1437 03:42:53.315777 PCI: 00:14.0 child on link 0 USB0 port 0
1438 03:42:53.325569 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1439 03:42:53.328520 USB0 port 0 child on link 0 USB2 port 0
1440 03:42:53.332218 USB2 port 0
1441 03:42:53.332664 USB2 port 1
1442 03:42:53.335880 USB2 port 2
1443 03:42:53.336324 USB2 port 3
1444 03:42:53.338675 USB2 port 4
1445 03:42:53.339116 USB2 port 5
1446 03:42:53.341966 USB2 port 6
1447 03:42:53.342433 USB2 port 7
1448 03:42:53.345491 USB2 port 8
1449 03:42:53.349111 USB2 port 9
1450 03:42:53.349556 USB3 port 0
1451 03:42:53.352428 USB3 port 1
1452 03:42:53.352962 USB3 port 2
1453 03:42:53.355480 USB3 port 3
1454 03:42:53.355923 PCI: 00:14.2
1455 03:42:53.365514 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1456 03:42:53.375442 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1457 03:42:53.382338 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1458 03:42:53.391878 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1459 03:42:53.392408 GENERIC: 0.0
1460 03:42:53.399054 PCI: 00:15.0 child on link 0 I2C: 00:1a
1461 03:42:53.408703 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1462 03:42:53.409239 I2C: 00:1a
1463 03:42:53.412126 I2C: 00:31
1464 03:42:53.412552 I2C: 00:32
1465 03:42:53.418891 PCI: 00:15.1 child on link 0 I2C: 00:10
1466 03:42:53.428910 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1467 03:42:53.429499 I2C: 00:10
1468 03:42:53.431775 PCI: 00:15.2
1469 03:42:53.441829 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1470 03:42:53.442273 PCI: 00:15.3
1471 03:42:53.451688 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1472 03:42:53.454953 PCI: 00:16.0
1473 03:42:53.464947 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1474 03:42:53.465468 PCI: 00:19.0
1475 03:42:53.471604 PCI: 00:19.1 child on link 0 I2C: 00:15
1476 03:42:53.481686 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1477 03:42:53.482120 I2C: 00:15
1478 03:42:53.488163 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1479 03:42:53.494821 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1480 03:42:53.508202 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1481 03:42:53.517888 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1482 03:42:53.521588 GENERIC: 0.0
1483 03:42:53.522030 PCI: 01:00.0
1484 03:42:53.532081 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1485 03:42:53.544378 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1486 03:42:53.554575 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1487 03:42:53.555103 PCI: 00:1e.0
1488 03:42:53.564373 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1489 03:42:53.571067 PCI: 00:1e.2 child on link 0 SPI: 00
1490 03:42:53.581357 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1491 03:42:53.581935 SPI: 00
1492 03:42:53.584664 PCI: 00:1e.3 child on link 0 SPI: 00
1493 03:42:53.597717 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1494 03:42:53.598292 SPI: 00
1495 03:42:53.600941 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1496 03:42:53.611216 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1497 03:42:53.611828 PNP: 0c09.0
1498 03:42:53.620960 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1499 03:42:53.624102 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1500 03:42:53.633651 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1501 03:42:53.643863 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1502 03:42:53.647188 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1503 03:42:53.651235 GENERIC: 0.0
1504 03:42:53.654305 GENERIC: 1.0
1505 03:42:53.654808 PCI: 00:1f.3
1506 03:42:53.664276 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1507 03:42:53.673843 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1508 03:42:53.677327 PCI: 00:1f.5
1509 03:42:53.687208 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1510 03:42:53.690669 CPU_CLUSTER: 0 child on link 0 APIC: 00
1511 03:42:53.693662 APIC: 00
1512 03:42:53.694227 APIC: 01
1513 03:42:53.694661 APIC: 03
1514 03:42:53.697652 APIC: 07
1515 03:42:53.698212 APIC: 05
1516 03:42:53.698638 APIC: 04
1517 03:42:53.700575 APIC: 02
1518 03:42:53.701052 APIC: 06
1519 03:42:53.703772 Done allocating resources.
1520 03:42:53.710812 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1521 03:42:53.717316 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1522 03:42:53.719946 Configure GPIOs for I2S audio on UP4.
1523 03:42:53.727297 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1524 03:42:53.730378 Enabling resources...
1525 03:42:53.734030 PCI: 00:00.0 subsystem <- 8086/9a12
1526 03:42:53.737217 PCI: 00:00.0 cmd <- 06
1527 03:42:53.740351 PCI: 00:02.0 subsystem <- 8086/9a40
1528 03:42:53.740926 PCI: 00:02.0 cmd <- 03
1529 03:42:53.747332 PCI: 00:04.0 subsystem <- 8086/9a03
1530 03:42:53.747805 PCI: 00:04.0 cmd <- 02
1531 03:42:53.750918 PCI: 00:05.0 subsystem <- 8086/9a19
1532 03:42:53.754079 PCI: 00:05.0 cmd <- 02
1533 03:42:53.757485 PCI: 00:08.0 subsystem <- 8086/9a11
1534 03:42:53.760695 PCI: 00:08.0 cmd <- 06
1535 03:42:53.763510 PCI: 00:0d.0 subsystem <- 8086/9a13
1536 03:42:53.767505 PCI: 00:0d.0 cmd <- 02
1537 03:42:53.770802 PCI: 00:14.0 subsystem <- 8086/a0ed
1538 03:42:53.773677 PCI: 00:14.0 cmd <- 02
1539 03:42:53.777519 PCI: 00:14.2 subsystem <- 8086/a0ef
1540 03:42:53.780501 PCI: 00:14.2 cmd <- 02
1541 03:42:53.783661 PCI: 00:14.3 subsystem <- 8086/a0f0
1542 03:42:53.786766 PCI: 00:14.3 cmd <- 02
1543 03:42:53.789989 PCI: 00:15.0 subsystem <- 8086/a0e8
1544 03:42:53.790492 PCI: 00:15.0 cmd <- 02
1545 03:42:53.796602 PCI: 00:15.1 subsystem <- 8086/a0e9
1546 03:42:53.797027 PCI: 00:15.1 cmd <- 02
1547 03:42:53.800073 PCI: 00:15.2 subsystem <- 8086/a0ea
1548 03:42:53.803827 PCI: 00:15.2 cmd <- 02
1549 03:42:53.806945 PCI: 00:15.3 subsystem <- 8086/a0eb
1550 03:42:53.810062 PCI: 00:15.3 cmd <- 02
1551 03:42:53.813745 PCI: 00:16.0 subsystem <- 8086/a0e0
1552 03:42:53.816914 PCI: 00:16.0 cmd <- 02
1553 03:42:53.819761 PCI: 00:19.1 subsystem <- 8086/a0c6
1554 03:42:53.823455 PCI: 00:19.1 cmd <- 02
1555 03:42:53.826728 PCI: 00:1d.0 bridge ctrl <- 0013
1556 03:42:53.830064 PCI: 00:1d.0 subsystem <- 8086/a0b0
1557 03:42:53.833640 PCI: 00:1d.0 cmd <- 06
1558 03:42:53.836673 PCI: 00:1e.0 subsystem <- 8086/a0a8
1559 03:42:53.839636 PCI: 00:1e.0 cmd <- 06
1560 03:42:53.843605 PCI: 00:1e.2 subsystem <- 8086/a0aa
1561 03:42:53.844177 PCI: 00:1e.2 cmd <- 06
1562 03:42:53.850303 PCI: 00:1e.3 subsystem <- 8086/a0ab
1563 03:42:53.850927 PCI: 00:1e.3 cmd <- 02
1564 03:42:53.853155 PCI: 00:1f.0 subsystem <- 8086/a087
1565 03:42:53.856469 PCI: 00:1f.0 cmd <- 407
1566 03:42:53.859605 PCI: 00:1f.3 subsystem <- 8086/a0c8
1567 03:42:53.863261 PCI: 00:1f.3 cmd <- 02
1568 03:42:53.866490 PCI: 00:1f.5 subsystem <- 8086/a0a4
1569 03:42:53.869852 PCI: 00:1f.5 cmd <- 406
1570 03:42:53.873939 PCI: 01:00.0 cmd <- 02
1571 03:42:53.879101 done.
1572 03:42:53.881784 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1573 03:42:53.885214 Initializing devices...
1574 03:42:53.888300 Root Device init
1575 03:42:53.891678 Chrome EC: Set SMI mask to 0x0000000000000000
1576 03:42:53.898722 Chrome EC: clear events_b mask to 0x0000000000000000
1577 03:42:53.904875 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1578 03:42:53.911494 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1579 03:42:53.918300 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1580 03:42:53.921598 Chrome EC: Set WAKE mask to 0x0000000000000000
1581 03:42:53.928920 fw_config match found: DB_USB=USB3_ACTIVE
1582 03:42:53.933030 Configure Right Type-C port orientation for retimer
1583 03:42:53.935798 Root Device init finished in 46 msecs
1584 03:42:53.940504 PCI: 00:00.0 init
1585 03:42:53.943766 CPU TDP = 9 Watts
1586 03:42:53.944256 CPU PL1 = 9 Watts
1587 03:42:53.946563 CPU PL2 = 40 Watts
1588 03:42:53.950068 CPU PL4 = 83 Watts
1589 03:42:53.954040 PCI: 00:00.0 init finished in 8 msecs
1590 03:42:53.954656 PCI: 00:02.0 init
1591 03:42:53.957143 GMA: Found VBT in CBFS
1592 03:42:53.959725 GMA: Found valid VBT in CBFS
1593 03:42:53.966450 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1594 03:42:53.973522 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1595 03:42:53.976912 PCI: 00:02.0 init finished in 18 msecs
1596 03:42:53.980481 PCI: 00:05.0 init
1597 03:42:53.982996 PCI: 00:05.0 init finished in 0 msecs
1598 03:42:53.986448 PCI: 00:08.0 init
1599 03:42:53.990810 PCI: 00:08.0 init finished in 0 msecs
1600 03:42:53.993623 PCI: 00:14.0 init
1601 03:42:53.996278 PCI: 00:14.0 init finished in 0 msecs
1602 03:42:53.999241 PCI: 00:14.2 init
1603 03:42:54.002734 PCI: 00:14.2 init finished in 0 msecs
1604 03:42:54.006282 PCI: 00:15.0 init
1605 03:42:54.006888 I2C bus 0 version 0x3230302a
1606 03:42:54.013260 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1607 03:42:54.016520 PCI: 00:15.0 init finished in 6 msecs
1608 03:42:54.017089 PCI: 00:15.1 init
1609 03:42:54.019942 I2C bus 1 version 0x3230302a
1610 03:42:54.022865 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1611 03:42:54.029692 PCI: 00:15.1 init finished in 6 msecs
1612 03:42:54.030243 PCI: 00:15.2 init
1613 03:42:54.033032 I2C bus 2 version 0x3230302a
1614 03:42:54.035891 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1615 03:42:54.039788 PCI: 00:15.2 init finished in 6 msecs
1616 03:42:54.042623 PCI: 00:15.3 init
1617 03:42:54.045832 I2C bus 3 version 0x3230302a
1618 03:42:54.050161 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1619 03:42:54.052848 PCI: 00:15.3 init finished in 6 msecs
1620 03:42:54.056331 PCI: 00:16.0 init
1621 03:42:54.059773 PCI: 00:16.0 init finished in 0 msecs
1622 03:42:54.062733 PCI: 00:19.1 init
1623 03:42:54.065877 I2C bus 5 version 0x3230302a
1624 03:42:54.069115 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1625 03:42:54.072590 PCI: 00:19.1 init finished in 6 msecs
1626 03:42:54.075686 PCI: 00:1d.0 init
1627 03:42:54.076245 Initializing PCH PCIe bridge.
1628 03:42:54.082485 PCI: 00:1d.0 init finished in 3 msecs
1629 03:42:54.085718 PCI: 00:1f.0 init
1630 03:42:54.088789 IOAPIC: Initializing IOAPIC at 0xfec00000
1631 03:42:54.092648 IOAPIC: Bootstrap Processor Local APIC = 0x00
1632 03:42:54.095713 IOAPIC: ID = 0x02
1633 03:42:54.099498 IOAPIC: Dumping registers
1634 03:42:54.100024 reg 0x0000: 0x02000000
1635 03:42:54.102254 reg 0x0001: 0x00770020
1636 03:42:54.105968 reg 0x0002: 0x00000000
1637 03:42:54.109244 PCI: 00:1f.0 init finished in 21 msecs
1638 03:42:54.112612 PCI: 00:1f.2 init
1639 03:42:54.115776 Disabling ACPI via APMC.
1640 03:42:54.116368 APMC done.
1641 03:42:54.119046 PCI: 00:1f.2 init finished in 5 msecs
1642 03:42:54.132382 PCI: 01:00.0 init
1643 03:42:54.135557 PCI: 01:00.0 init finished in 0 msecs
1644 03:42:54.139356 PNP: 0c09.0 init
1645 03:42:54.142261 Google Chrome EC uptime: 8.395 seconds
1646 03:42:54.149485 Google Chrome AP resets since EC boot: 1
1647 03:42:54.152399 Google Chrome most recent AP reset causes:
1648 03:42:54.156053 0.347: 32775 shutdown: entering G3
1649 03:42:54.162563 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1650 03:42:54.165387 PNP: 0c09.0 init finished in 22 msecs
1651 03:42:54.171794 Devices initialized
1652 03:42:54.174804 Show all devs... After init.
1653 03:42:54.178277 Root Device: enabled 1
1654 03:42:54.178787 DOMAIN: 0000: enabled 1
1655 03:42:54.181748 CPU_CLUSTER: 0: enabled 1
1656 03:42:54.185193 PCI: 00:00.0: enabled 1
1657 03:42:54.187769 PCI: 00:02.0: enabled 1
1658 03:42:54.188243 PCI: 00:04.0: enabled 1
1659 03:42:54.191653 PCI: 00:05.0: enabled 1
1660 03:42:54.195056 PCI: 00:06.0: enabled 0
1661 03:42:54.198160 PCI: 00:07.0: enabled 0
1662 03:42:54.198751 PCI: 00:07.1: enabled 0
1663 03:42:54.201080 PCI: 00:07.2: enabled 0
1664 03:42:54.204880 PCI: 00:07.3: enabled 0
1665 03:42:54.207884 PCI: 00:08.0: enabled 1
1666 03:42:54.208314 PCI: 00:09.0: enabled 0
1667 03:42:54.211354 PCI: 00:0a.0: enabled 0
1668 03:42:54.214865 PCI: 00:0d.0: enabled 1
1669 03:42:54.215292 PCI: 00:0d.1: enabled 0
1670 03:42:54.218264 PCI: 00:0d.2: enabled 0
1671 03:42:54.221589 PCI: 00:0d.3: enabled 0
1672 03:42:54.224288 PCI: 00:0e.0: enabled 0
1673 03:42:54.224717 PCI: 00:10.2: enabled 1
1674 03:42:54.227656 PCI: 00:10.6: enabled 0
1675 03:42:54.231310 PCI: 00:10.7: enabled 0
1676 03:42:54.234652 PCI: 00:12.0: enabled 0
1677 03:42:54.235077 PCI: 00:12.6: enabled 0
1678 03:42:54.237791 PCI: 00:13.0: enabled 0
1679 03:42:54.241090 PCI: 00:14.0: enabled 1
1680 03:42:54.244242 PCI: 00:14.1: enabled 0
1681 03:42:54.244688 PCI: 00:14.2: enabled 1
1682 03:42:54.248047 PCI: 00:14.3: enabled 1
1683 03:42:54.251159 PCI: 00:15.0: enabled 1
1684 03:42:54.254836 PCI: 00:15.1: enabled 1
1685 03:42:54.255258 PCI: 00:15.2: enabled 1
1686 03:42:54.257748 PCI: 00:15.3: enabled 1
1687 03:42:54.261214 PCI: 00:16.0: enabled 1
1688 03:42:54.261733 PCI: 00:16.1: enabled 0
1689 03:42:54.264250 PCI: 00:16.2: enabled 0
1690 03:42:54.268019 PCI: 00:16.3: enabled 0
1691 03:42:54.270995 PCI: 00:16.4: enabled 0
1692 03:42:54.271418 PCI: 00:16.5: enabled 0
1693 03:42:54.274576 PCI: 00:17.0: enabled 0
1694 03:42:54.277667 PCI: 00:19.0: enabled 0
1695 03:42:54.281186 PCI: 00:19.1: enabled 1
1696 03:42:54.281704 PCI: 00:19.2: enabled 0
1697 03:42:54.284073 PCI: 00:1c.0: enabled 1
1698 03:42:54.287438 PCI: 00:1c.1: enabled 0
1699 03:42:54.291243 PCI: 00:1c.2: enabled 0
1700 03:42:54.291664 PCI: 00:1c.3: enabled 0
1701 03:42:54.294447 PCI: 00:1c.4: enabled 0
1702 03:42:54.297134 PCI: 00:1c.5: enabled 0
1703 03:42:54.301227 PCI: 00:1c.6: enabled 1
1704 03:42:54.301685 PCI: 00:1c.7: enabled 0
1705 03:42:54.304171 PCI: 00:1d.0: enabled 1
1706 03:42:54.307759 PCI: 00:1d.1: enabled 0
1707 03:42:54.308279 PCI: 00:1d.2: enabled 1
1708 03:42:54.311080 PCI: 00:1d.3: enabled 0
1709 03:42:54.314358 PCI: 00:1e.0: enabled 1
1710 03:42:54.317887 PCI: 00:1e.1: enabled 0
1711 03:42:54.318311 PCI: 00:1e.2: enabled 1
1712 03:42:54.321324 PCI: 00:1e.3: enabled 1
1713 03:42:54.324143 PCI: 00:1f.0: enabled 1
1714 03:42:54.327879 PCI: 00:1f.1: enabled 0
1715 03:42:54.328301 PCI: 00:1f.2: enabled 1
1716 03:42:54.331057 PCI: 00:1f.3: enabled 1
1717 03:42:54.334089 PCI: 00:1f.4: enabled 0
1718 03:42:54.337305 PCI: 00:1f.5: enabled 1
1719 03:42:54.337882 PCI: 00:1f.6: enabled 0
1720 03:42:54.341154 PCI: 00:1f.7: enabled 0
1721 03:42:54.344074 APIC: 00: enabled 1
1722 03:42:54.344498 GENERIC: 0.0: enabled 1
1723 03:42:54.347297 GENERIC: 0.0: enabled 1
1724 03:42:54.350605 GENERIC: 1.0: enabled 1
1725 03:42:54.354288 GENERIC: 0.0: enabled 1
1726 03:42:54.354854 GENERIC: 1.0: enabled 1
1727 03:42:54.357452 USB0 port 0: enabled 1
1728 03:42:54.360670 GENERIC: 0.0: enabled 1
1729 03:42:54.361215 USB0 port 0: enabled 1
1730 03:42:54.363607 GENERIC: 0.0: enabled 1
1731 03:42:54.367166 I2C: 00:1a: enabled 1
1732 03:42:54.371294 I2C: 00:31: enabled 1
1733 03:42:54.371859 I2C: 00:32: enabled 1
1734 03:42:54.373829 I2C: 00:10: enabled 1
1735 03:42:54.377797 I2C: 00:15: enabled 1
1736 03:42:54.378317 GENERIC: 0.0: enabled 0
1737 03:42:54.380670 GENERIC: 1.0: enabled 0
1738 03:42:54.383905 GENERIC: 0.0: enabled 1
1739 03:42:54.384421 SPI: 00: enabled 1
1740 03:42:54.387479 SPI: 00: enabled 1
1741 03:42:54.390813 PNP: 0c09.0: enabled 1
1742 03:42:54.391332 GENERIC: 0.0: enabled 1
1743 03:42:54.393838 USB3 port 0: enabled 1
1744 03:42:54.397500 USB3 port 1: enabled 1
1745 03:42:54.400671 USB3 port 2: enabled 0
1746 03:42:54.401194 USB3 port 3: enabled 0
1747 03:42:54.404010 USB2 port 0: enabled 0
1748 03:42:54.406904 USB2 port 1: enabled 1
1749 03:42:54.407374 USB2 port 2: enabled 1
1750 03:42:54.410634 USB2 port 3: enabled 0
1751 03:42:54.413722 USB2 port 4: enabled 1
1752 03:42:54.414290 USB2 port 5: enabled 0
1753 03:42:54.417330 USB2 port 6: enabled 0
1754 03:42:54.420730 USB2 port 7: enabled 0
1755 03:42:54.424013 USB2 port 8: enabled 0
1756 03:42:54.424484 USB2 port 9: enabled 0
1757 03:42:54.426642 USB3 port 0: enabled 0
1758 03:42:54.430546 USB3 port 1: enabled 1
1759 03:42:54.431063 USB3 port 2: enabled 0
1760 03:42:54.434064 USB3 port 3: enabled 0
1761 03:42:54.437116 GENERIC: 0.0: enabled 1
1762 03:42:54.440903 GENERIC: 1.0: enabled 1
1763 03:42:54.441422 APIC: 01: enabled 1
1764 03:42:54.443912 APIC: 03: enabled 1
1765 03:42:54.444448 APIC: 07: enabled 1
1766 03:42:54.446588 APIC: 05: enabled 1
1767 03:42:54.450512 APIC: 04: enabled 1
1768 03:42:54.450938 APIC: 02: enabled 1
1769 03:42:54.453549 APIC: 06: enabled 1
1770 03:42:54.457090 PCI: 01:00.0: enabled 1
1771 03:42:54.460239 BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
1772 03:42:54.466826 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1773 03:42:54.470287 ELOG: NV offset 0xf30000 size 0x1000
1774 03:42:54.477132 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1775 03:42:54.483302 ELOG: Event(17) added with size 13 at 2024-03-05 03:42:54 UTC
1776 03:42:54.490110 ELOG: Event(92) added with size 9 at 2024-03-05 03:42:54 UTC
1777 03:42:54.496773 ELOG: Event(93) added with size 9 at 2024-03-05 03:42:54 UTC
1778 03:42:54.503759 ELOG: Event(9E) added with size 10 at 2024-03-05 03:42:54 UTC
1779 03:42:54.510546 ELOG: Event(9F) added with size 14 at 2024-03-05 03:42:54 UTC
1780 03:42:54.516077 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1781 03:42:54.520364 ELOG: Event(A1) added with size 10 at 2024-03-05 03:42:54 UTC
1782 03:42:54.526472 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1783 03:42:54.533436 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1784 03:42:54.536275 Finalize devices...
1785 03:42:54.536808 Devices finalized
1786 03:42:54.542996 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1787 03:42:54.549072 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1788 03:42:54.552645 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1789 03:42:54.559235 ME: HFSTS1 : 0x80030055
1790 03:42:54.562514 ME: HFSTS2 : 0x30280116
1791 03:42:54.566530 ME: HFSTS3 : 0x00000050
1792 03:42:54.572624 ME: HFSTS4 : 0x00004000
1793 03:42:54.575959 ME: HFSTS5 : 0x00000000
1794 03:42:54.579022 ME: HFSTS6 : 0x00400006
1795 03:42:54.585798 ME: Manufacturing Mode : YES
1796 03:42:54.589386 ME: SPI Protection Mode Enabled : NO
1797 03:42:54.592465 ME: FW Partition Table : OK
1798 03:42:54.595666 ME: Bringup Loader Failure : NO
1799 03:42:54.599396 ME: Firmware Init Complete : NO
1800 03:42:54.602385 ME: Boot Options Present : NO
1801 03:42:54.605540 ME: Update In Progress : NO
1802 03:42:54.609265 ME: D0i3 Support : YES
1803 03:42:54.615813 ME: Low Power State Enabled : NO
1804 03:42:54.619192 ME: CPU Replaced : YES
1805 03:42:54.622505 ME: CPU Replacement Valid : YES
1806 03:42:54.625734 ME: Current Working State : 5
1807 03:42:54.629353 ME: Current Operation State : 1
1808 03:42:54.632640 ME: Current Operation Mode : 3
1809 03:42:54.635952 ME: Error Code : 0
1810 03:42:54.639016 ME: Enhanced Debug Mode : NO
1811 03:42:54.642849 ME: CPU Debug Disabled : YES
1812 03:42:54.648885 ME: TXT Support : NO
1813 03:42:54.652052 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1814 03:42:54.662034 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1815 03:42:54.665481 CBFS: 'fallback/slic' not found.
1816 03:42:54.668612 ACPI: Writing ACPI tables at 76b01000.
1817 03:42:54.669196 ACPI: * FACS
1818 03:42:54.672211 ACPI: * DSDT
1819 03:42:54.675475 Ramoops buffer: 0x100000@0x76a00000.
1820 03:42:54.682354 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1821 03:42:54.685484 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1822 03:42:54.689045 Google Chrome EC: version:
1823 03:42:54.692094 ro: voema_v2.0.7540-147f8d37d1
1824 03:42:54.695841 rw: voema_v2.0.7540-147f8d37d1
1825 03:42:54.698766 running image: 2
1826 03:42:54.705638 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1827 03:42:54.709535 ACPI: * FADT
1828 03:42:54.710051 SCI is IRQ9
1829 03:42:54.712762 ACPI: added table 1/32, length now 40
1830 03:42:54.715474 ACPI: * SSDT
1831 03:42:54.718739 Found 1 CPU(s) with 8 core(s) each.
1832 03:42:54.725103 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1833 03:42:54.728987 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1834 03:42:54.732053 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1835 03:42:54.735703 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1836 03:42:54.742502 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1837 03:42:54.748549 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1838 03:42:54.752215 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1839 03:42:54.758362 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1840 03:42:54.765715 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1841 03:42:54.769055 \_SB.PCI0.RP09: Added StorageD3Enable property
1842 03:42:54.772185 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1843 03:42:54.778811 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1844 03:42:54.782542 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1845 03:42:54.788574 PS2K: Passing 80 keymaps to kernel
1846 03:42:54.795469 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1847 03:42:54.802104 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1848 03:42:54.805311 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1849 03:42:54.812472 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1850 03:42:54.818778 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1851 03:42:54.825046 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1852 03:42:54.831909 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1853 03:42:54.838558 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1854 03:42:54.842187 ACPI: added table 2/32, length now 44
1855 03:42:54.845705 ACPI: * MCFG
1856 03:42:54.848699 ACPI: added table 3/32, length now 48
1857 03:42:54.851605 ACPI: * TPM2
1858 03:42:54.856205 TPM2 log created at 0x769f0000
1859 03:42:54.858683 ACPI: added table 4/32, length now 52
1860 03:42:54.859129 ACPI: * MADT
1861 03:42:54.861925 SCI is IRQ9
1862 03:42:54.865361 ACPI: added table 5/32, length now 56
1863 03:42:54.865900 current = 76b09850
1864 03:42:54.868330 ACPI: * DMAR
1865 03:42:54.871914 ACPI: added table 6/32, length now 60
1866 03:42:54.875046 ACPI: added table 7/32, length now 64
1867 03:42:54.878849 ACPI: * HPET
1868 03:42:54.882518 ACPI: added table 8/32, length now 68
1869 03:42:54.883053 ACPI: done.
1870 03:42:54.885605 ACPI tables: 35216 bytes.
1871 03:42:54.888701 smbios_write_tables: 769ef000
1872 03:42:54.891954 EC returned error result code 3
1873 03:42:54.894949 Couldn't obtain OEM name from CBI
1874 03:42:54.898233 Create SMBIOS type 16
1875 03:42:54.898730 Create SMBIOS type 17
1876 03:42:54.901759 GENERIC: 0.0 (WIFI Device)
1877 03:42:54.905416 SMBIOS tables: 1750 bytes.
1878 03:42:54.908828 Writing table forward entry at 0x00000500
1879 03:42:54.914993 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1880 03:42:54.918341 Writing coreboot table at 0x76b25000
1881 03:42:54.924944 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1882 03:42:54.928650 1. 0000000000001000-000000000009ffff: RAM
1883 03:42:54.934858 2. 00000000000a0000-00000000000fffff: RESERVED
1884 03:42:54.938702 3. 0000000000100000-00000000769eefff: RAM
1885 03:42:54.945245 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1886 03:42:54.948037 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1887 03:42:54.954560 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1888 03:42:54.961623 7. 0000000077000000-000000007fbfffff: RESERVED
1889 03:42:54.965021 8. 00000000c0000000-00000000cfffffff: RESERVED
1890 03:42:54.971535 9. 00000000f8000000-00000000f9ffffff: RESERVED
1891 03:42:54.974483 10. 00000000fb000000-00000000fb000fff: RESERVED
1892 03:42:54.978482 11. 00000000fe000000-00000000fe00ffff: RESERVED
1893 03:42:54.984698 12. 00000000fed80000-00000000fed87fff: RESERVED
1894 03:42:54.988196 13. 00000000fed90000-00000000fed92fff: RESERVED
1895 03:42:54.995079 14. 00000000feda0000-00000000feda1fff: RESERVED
1896 03:42:54.997725 15. 00000000fedc0000-00000000feddffff: RESERVED
1897 03:42:55.001857 16. 0000000100000000-00000002803fffff: RAM
1898 03:42:55.004589 Passing 4 GPIOs to payload:
1899 03:42:55.011356 NAME | PORT | POLARITY | VALUE
1900 03:42:55.018316 lid | undefined | high | high
1901 03:42:55.021752 power | undefined | high | low
1902 03:42:55.027985 oprom | undefined | high | low
1903 03:42:55.031292 EC in RW | 0x000000e5 | high | high
1904 03:42:55.037920 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 3747
1905 03:42:55.041543 coreboot table: 1576 bytes.
1906 03:42:55.044988 IMD ROOT 0. 0x76fff000 0x00001000
1907 03:42:55.047958 IMD SMALL 1. 0x76ffe000 0x00001000
1908 03:42:55.051141 FSP MEMORY 2. 0x76c4e000 0x003b0000
1909 03:42:55.057726 VPD 3. 0x76c4d000 0x00000367
1910 03:42:55.061445 RO MCACHE 4. 0x76c4c000 0x00000fdc
1911 03:42:55.064798 CONSOLE 5. 0x76c2c000 0x00020000
1912 03:42:55.067798 FMAP 6. 0x76c2b000 0x00000578
1913 03:42:55.070777 TIME STAMP 7. 0x76c2a000 0x00000910
1914 03:42:55.074049 VBOOT WORK 8. 0x76c16000 0x00014000
1915 03:42:55.078026 ROMSTG STCK 9. 0x76c15000 0x00001000
1916 03:42:55.080793 AFTER CAR 10. 0x76c0a000 0x0000b000
1917 03:42:55.087369 RAMSTAGE 11. 0x76b97000 0x00073000
1918 03:42:55.091499 REFCODE 12. 0x76b42000 0x00055000
1919 03:42:55.094268 SMM BACKUP 13. 0x76b32000 0x00010000
1920 03:42:55.097566 4f444749 14. 0x76b30000 0x00002000
1921 03:42:55.101404 EXT VBT15. 0x76b2d000 0x0000219f
1922 03:42:55.103956 COREBOOT 16. 0x76b25000 0x00008000
1923 03:42:55.107847 ACPI 17. 0x76b01000 0x00024000
1924 03:42:55.111034 ACPI GNVS 18. 0x76b00000 0x00001000
1925 03:42:55.114020 RAMOOPS 19. 0x76a00000 0x00100000
1926 03:42:55.120629 TPM2 TCGLOG20. 0x769f0000 0x00010000
1927 03:42:55.124676 SMBIOS 21. 0x769ef000 0x00000800
1928 03:42:55.125211 IMD small region:
1929 03:42:55.127137 IMD ROOT 0. 0x76ffec00 0x00000400
1930 03:42:55.133936 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1931 03:42:55.136929 POWER STATE 2. 0x76ffeb80 0x00000044
1932 03:42:55.140597 ROMSTAGE 3. 0x76ffeb60 0x00000004
1933 03:42:55.143931 MEM INFO 4. 0x76ffe980 0x000001e0
1934 03:42:55.151153 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1935 03:42:55.154239 MTRR: Physical address space:
1936 03:42:55.160580 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1937 03:42:55.167421 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1938 03:42:55.170459 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1939 03:42:55.177384 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1940 03:42:55.183714 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1941 03:42:55.190358 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1942 03:42:55.197483 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1943 03:42:55.200317 MTRR: Fixed MSR 0x250 0x0606060606060606
1944 03:42:55.203711 MTRR: Fixed MSR 0x258 0x0606060606060606
1945 03:42:55.210474 MTRR: Fixed MSR 0x259 0x0000000000000000
1946 03:42:55.213922 MTRR: Fixed MSR 0x268 0x0606060606060606
1947 03:42:55.217013 MTRR: Fixed MSR 0x269 0x0606060606060606
1948 03:42:55.219994 MTRR: Fixed MSR 0x26a 0x0606060606060606
1949 03:42:55.226942 MTRR: Fixed MSR 0x26b 0x0606060606060606
1950 03:42:55.230579 MTRR: Fixed MSR 0x26c 0x0606060606060606
1951 03:42:55.233588 MTRR: Fixed MSR 0x26d 0x0606060606060606
1952 03:42:55.236722 MTRR: Fixed MSR 0x26e 0x0606060606060606
1953 03:42:55.243722 MTRR: Fixed MSR 0x26f 0x0606060606060606
1954 03:42:55.247365 call enable_fixed_mtrr()
1955 03:42:55.249919 CPU physical address size: 39 bits
1956 03:42:55.253359 MTRR: default type WB/UC MTRR counts: 6/6.
1957 03:42:55.257044 MTRR: UC selected as default type.
1958 03:42:55.263122 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1959 03:42:55.269916 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1960 03:42:55.276815 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1961 03:42:55.283057 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1962 03:42:55.289939 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1963 03:42:55.293111 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1964 03:42:55.297479
1965 03:42:55.297899 MTRR check
1966 03:42:55.300652 Fixed MTRRs : Enabled
1967 03:42:55.301077 Variable MTRRs: Enabled
1968 03:42:55.301412
1969 03:42:55.307492 MTRR: Fixed MSR 0x250 0x0606060606060606
1970 03:42:55.311246 MTRR: Fixed MSR 0x258 0x0606060606060606
1971 03:42:55.314166 MTRR: Fixed MSR 0x259 0x0000000000000000
1972 03:42:55.317898 MTRR: Fixed MSR 0x268 0x0606060606060606
1973 03:42:55.324199 MTRR: Fixed MSR 0x269 0x0606060606060606
1974 03:42:55.327137 MTRR: Fixed MSR 0x26a 0x0606060606060606
1975 03:42:55.330765 MTRR: Fixed MSR 0x26b 0x0606060606060606
1976 03:42:55.333917 MTRR: Fixed MSR 0x26c 0x0606060606060606
1977 03:42:55.340614 MTRR: Fixed MSR 0x26d 0x0606060606060606
1978 03:42:55.344058 MTRR: Fixed MSR 0x26e 0x0606060606060606
1979 03:42:55.347810 MTRR: Fixed MSR 0x26f 0x0606060606060606
1980 03:42:55.353740 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1981 03:42:55.357604 call enable_fixed_mtrr()
1982 03:42:55.361039 Checking cr50 for pending updates
1983 03:42:55.364837 CPU physical address size: 39 bits
1984 03:42:55.368163 MTRR: Fixed MSR 0x250 0x0606060606060606
1985 03:42:55.371533 MTRR: Fixed MSR 0x250 0x0606060606060606
1986 03:42:55.374970 MTRR: Fixed MSR 0x258 0x0606060606060606
1987 03:42:55.382058 MTRR: Fixed MSR 0x259 0x0000000000000000
1988 03:42:55.384683 MTRR: Fixed MSR 0x268 0x0606060606060606
1989 03:42:55.388632 MTRR: Fixed MSR 0x269 0x0606060606060606
1990 03:42:55.391297 MTRR: Fixed MSR 0x26a 0x0606060606060606
1991 03:42:55.398006 MTRR: Fixed MSR 0x26b 0x0606060606060606
1992 03:42:55.401321 MTRR: Fixed MSR 0x26c 0x0606060606060606
1993 03:42:55.404855 MTRR: Fixed MSR 0x26d 0x0606060606060606
1994 03:42:55.408516 MTRR: Fixed MSR 0x26e 0x0606060606060606
1995 03:42:55.414639 MTRR: Fixed MSR 0x26f 0x0606060606060606
1996 03:42:55.418683 MTRR: Fixed MSR 0x258 0x0606060606060606
1997 03:42:55.421448 call enable_fixed_mtrr()
1998 03:42:55.424901 MTRR: Fixed MSR 0x259 0x0000000000000000
1999 03:42:55.427652 MTRR: Fixed MSR 0x268 0x0606060606060606
2000 03:42:55.434732 MTRR: Fixed MSR 0x269 0x0606060606060606
2001 03:42:55.438348 MTRR: Fixed MSR 0x26a 0x0606060606060606
2002 03:42:55.440991 MTRR: Fixed MSR 0x26b 0x0606060606060606
2003 03:42:55.444504 MTRR: Fixed MSR 0x26c 0x0606060606060606
2004 03:42:55.451292 MTRR: Fixed MSR 0x26d 0x0606060606060606
2005 03:42:55.454795 MTRR: Fixed MSR 0x26e 0x0606060606060606
2006 03:42:55.458125 MTRR: Fixed MSR 0x26f 0x0606060606060606
2007 03:42:55.461134 CPU physical address size: 39 bits
2008 03:42:55.465436 call enable_fixed_mtrr()
2009 03:42:55.468929 MTRR: Fixed MSR 0x250 0x0606060606060606
2010 03:42:55.475047 MTRR: Fixed MSR 0x250 0x0606060606060606
2011 03:42:55.479481 MTRR: Fixed MSR 0x250 0x0606060606060606
2012 03:42:55.481962 MTRR: Fixed MSR 0x250 0x0606060606060606
2013 03:42:55.485550 MTRR: Fixed MSR 0x258 0x0606060606060606
2014 03:42:55.492633 MTRR: Fixed MSR 0x259 0x0000000000000000
2015 03:42:55.495020 MTRR: Fixed MSR 0x268 0x0606060606060606
2016 03:42:55.498982 MTRR: Fixed MSR 0x269 0x0606060606060606
2017 03:42:55.501789 MTRR: Fixed MSR 0x26a 0x0606060606060606
2018 03:42:55.508569 MTRR: Fixed MSR 0x26b 0x0606060606060606
2019 03:42:55.511893 MTRR: Fixed MSR 0x26c 0x0606060606060606
2020 03:42:55.516040 MTRR: Fixed MSR 0x26d 0x0606060606060606
2021 03:42:55.518627 MTRR: Fixed MSR 0x26e 0x0606060606060606
2022 03:42:55.521890 MTRR: Fixed MSR 0x26f 0x0606060606060606
2023 03:42:55.528319 MTRR: Fixed MSR 0x258 0x0606060606060606
2024 03:42:55.531813 call enable_fixed_mtrr()
2025 03:42:55.535227 MTRR: Fixed MSR 0x259 0x0000000000000000
2026 03:42:55.538251 MTRR: Fixed MSR 0x268 0x0606060606060606
2027 03:42:55.545092 MTRR: Fixed MSR 0x269 0x0606060606060606
2028 03:42:55.548299 MTRR: Fixed MSR 0x26a 0x0606060606060606
2029 03:42:55.551734 MTRR: Fixed MSR 0x26b 0x0606060606060606
2030 03:42:55.554981 MTRR: Fixed MSR 0x26c 0x0606060606060606
2031 03:42:55.558618 MTRR: Fixed MSR 0x26d 0x0606060606060606
2032 03:42:55.564821 MTRR: Fixed MSR 0x26e 0x0606060606060606
2033 03:42:55.568582 MTRR: Fixed MSR 0x26f 0x0606060606060606
2034 03:42:55.571409 CPU physical address size: 39 bits
2035 03:42:55.575675 call enable_fixed_mtrr()
2036 03:42:55.578761 Reading cr50 TPM mode
2037 03:42:55.582870 CPU physical address size: 39 bits
2038 03:42:55.586250 MTRR: Fixed MSR 0x258 0x0606060606060606
2039 03:42:55.589239 MTRR: Fixed MSR 0x258 0x0606060606060606
2040 03:42:55.592496 MTRR: Fixed MSR 0x259 0x0000000000000000
2041 03:42:55.599096 MTRR: Fixed MSR 0x268 0x0606060606060606
2042 03:42:55.602842 MTRR: Fixed MSR 0x269 0x0606060606060606
2043 03:42:55.606003 MTRR: Fixed MSR 0x26a 0x0606060606060606
2044 03:42:55.609800 MTRR: Fixed MSR 0x26b 0x0606060606060606
2045 03:42:55.615998 MTRR: Fixed MSR 0x26c 0x0606060606060606
2046 03:42:55.619582 MTRR: Fixed MSR 0x26d 0x0606060606060606
2047 03:42:55.622753 MTRR: Fixed MSR 0x26e 0x0606060606060606
2048 03:42:55.626442 MTRR: Fixed MSR 0x26f 0x0606060606060606
2049 03:42:55.633401 MTRR: Fixed MSR 0x259 0x0000000000000000
2050 03:42:55.636644 MTRR: Fixed MSR 0x268 0x0606060606060606
2051 03:42:55.639797 MTRR: Fixed MSR 0x269 0x0606060606060606
2052 03:42:55.642889 MTRR: Fixed MSR 0x26a 0x0606060606060606
2053 03:42:55.649904 MTRR: Fixed MSR 0x26b 0x0606060606060606
2054 03:42:55.652666 MTRR: Fixed MSR 0x26c 0x0606060606060606
2055 03:42:55.656247 MTRR: Fixed MSR 0x26d 0x0606060606060606
2056 03:42:55.659668 MTRR: Fixed MSR 0x26e 0x0606060606060606
2057 03:42:55.666088 MTRR: Fixed MSR 0x26f 0x0606060606060606
2058 03:42:55.669847 call enable_fixed_mtrr()
2059 03:42:55.670266 call enable_fixed_mtrr()
2060 03:42:55.673103 CPU physical address size: 39 bits
2061 03:42:55.679376 BS: BS_PAYLOAD_LOAD entry times (exec / console): 223 / 6 ms
2062 03:42:55.683088 CPU physical address size: 39 bits
2063 03:42:55.687627 CPU physical address size: 39 bits
2064 03:42:55.697077 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2065 03:42:55.700354 Checking segment from ROM address 0xffc02b38
2066 03:42:55.703951 Checking segment from ROM address 0xffc02b54
2067 03:42:55.709902 Loading segment from ROM address 0xffc02b38
2068 03:42:55.713686 code (compression=0)
2069 03:42:55.719879 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2070 03:42:55.730663 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2071 03:42:55.731186 it's not compressed!
2072 03:42:55.870677 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2073 03:42:55.876888 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2074 03:42:55.883883 Loading segment from ROM address 0xffc02b54
2075 03:42:55.884442 Entry Point 0x30000000
2076 03:42:55.886858 Loaded segments
2077 03:42:55.893819 BS: BS_PAYLOAD_LOAD run times (exec / console): 143 / 63 ms
2078 03:42:55.936606 Finalizing chipset.
2079 03:42:55.940305 Finalizing SMM.
2080 03:42:55.940885 APMC done.
2081 03:42:55.946384 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2082 03:42:55.949611 mp_park_aps done after 0 msecs.
2083 03:42:55.953012 Jumping to boot code at 0x30000000(0x76b25000)
2084 03:42:55.963299 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2085 03:42:55.963856
2086 03:42:55.964225
2087 03:42:55.964566
2088 03:42:55.965939 Starting depthcharge on Voema...
2089 03:42:55.966436
2090 03:42:55.967774 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2091 03:42:55.968329 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2092 03:42:55.968762 Setting prompt string to ['volteer:']
2093 03:42:55.969202 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2094 03:42:55.976018 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2095 03:42:55.976459
2096 03:42:55.982851 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2097 03:42:55.983378
2098 03:42:55.986570 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2099 03:42:55.989316
2100 03:42:55.992697 Failed to find eMMC card reader
2101 03:42:55.993133
2102 03:42:55.993474 Wipe memory regions:
2103 03:42:55.993787
2104 03:42:55.999147 [0x00000000001000, 0x000000000a0000)
2105 03:42:55.999714
2106 03:42:56.002654 [0x00000000100000, 0x00000030000000)
2107 03:42:56.027710
2108 03:42:56.031022 [0x00000032662db0, 0x000000769ef000)
2109 03:42:56.066492
2110 03:42:56.069844 [0x00000100000000, 0x00000280400000)
2111 03:42:56.270375
2112 03:42:56.273871 ec_init: CrosEC protocol v3 supported (256, 256)
2113 03:42:56.274441
2114 03:42:56.280096 update_port_state: port C0 state: usb enable 1 mux conn 0
2115 03:42:56.280546
2116 03:42:56.286995 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2117 03:42:56.291017
2118 03:42:56.294798 pmc_check_ipc_sts: STS_BUSY done after 1612 us
2119 03:42:56.295413
2120 03:42:56.297775 send_conn_disc_msg: pmc_send_cmd succeeded
2121 03:42:56.730051
2122 03:42:56.730757 R8152: Initializing
2123 03:42:56.731140
2124 03:42:56.732947 Version 6 (ocp_data = 5c30)
2125 03:42:56.733506
2126 03:42:56.736089 R8152: Done initializing
2127 03:42:56.736546
2128 03:42:56.739096 Adding net device
2129 03:42:57.040824
2130 03:42:57.044163 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2131 03:42:57.044635
2132 03:42:57.045006
2133 03:42:57.045346
2134 03:42:57.047418 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2136 03:42:57.148923 volteer: tftpboot 192.168.201.1 12940496/tftp-deploy-z_rrck0r/kernel/bzImage 12940496/tftp-deploy-z_rrck0r/kernel/cmdline 12940496/tftp-deploy-z_rrck0r/ramdisk/ramdisk.cpio.gz
2137 03:42:57.149589 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2138 03:42:57.150030 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2139 03:42:57.154275 tftpboot 192.168.201.1 12940496/tftp-deploy-z_rrck0r/kernel/bzImaploy-z_rrck0r/kernel/cmdline 12940496/tftp-deploy-z_rrck0r/ramdisk/ramdisk.cpio.gz
2140 03:42:57.154764
2141 03:42:57.155105 Waiting for link
2142 03:42:57.358014
2143 03:42:57.358793 done.
2144 03:42:57.359185
2145 03:42:57.359538 MAC: 00:24:32:30:7b:ec
2146 03:42:57.359880
2147 03:42:57.360602 Sending DHCP discover... done.
2148 03:42:57.360968
2149 03:42:57.364478 Waiting for reply... done.
2150 03:42:57.365053
2151 03:42:57.367320 Sending DHCP request... done.
2152 03:42:57.367951
2153 03:42:57.374657 Waiting for reply... done.
2154 03:42:57.375193
2155 03:42:57.375540 My ip is 192.168.201.11
2156 03:42:57.375858
2157 03:42:57.377326 The DHCP server ip is 192.168.201.1
2158 03:42:57.380769
2159 03:42:57.384455 TFTP server IP predefined by user: 192.168.201.1
2160 03:42:57.384980
2161 03:42:57.391267 Bootfile predefined by user: 12940496/tftp-deploy-z_rrck0r/kernel/bzImage
2162 03:42:57.391802
2163 03:42:57.394001 Sending tftp read request... done.
2164 03:42:57.394473
2165 03:42:57.397328 Waiting for the transfer...
2166 03:42:57.397887
2167 03:42:58.094941 00000000 ################################################################
2168 03:42:58.095544
2169 03:42:58.805266 00080000 ################################################################
2170 03:42:58.805789
2171 03:42:59.511806 00100000 ################################################################
2172 03:42:59.512317
2173 03:43:00.189288 00180000 ################################################################
2174 03:43:00.189864
2175 03:43:00.907858 00200000 ################################################################
2176 03:43:00.908474
2177 03:43:01.635958 00280000 ################################################################
2178 03:43:01.636518
2179 03:43:02.347381 00300000 ################################################################
2180 03:43:02.347924
2181 03:43:03.053015 00380000 ################################################################
2182 03:43:03.053417
2183 03:43:03.766778 00400000 ################################################################
2184 03:43:03.767406
2185 03:43:04.484115 00480000 ################################################################
2186 03:43:04.484708
2187 03:43:05.204292 00500000 ################################################################
2188 03:43:05.204843
2189 03:43:05.899340 00580000 ################################################################
2190 03:43:05.899901
2191 03:43:06.618674 00600000 ################################################################
2192 03:43:06.619196
2193 03:43:07.195935 00680000 ################################################################
2194 03:43:07.196116
2195 03:43:07.858653 00700000 ################################################################
2196 03:43:07.858897
2197 03:43:08.552949 00780000 ################################################################
2198 03:43:08.553463
2199 03:43:09.130328 00800000 ################################################################
2200 03:43:09.130897
2201 03:43:09.755056 00880000 ######################################################## done.
2202 03:43:09.755614
2203 03:43:09.757891 The bootfile was 9367440 bytes long.
2204 03:43:09.758626
2205 03:43:09.761361 Sending tftp read request... done.
2206 03:43:09.761784
2207 03:43:09.764687 Waiting for the transfer...
2208 03:43:09.765115
2209 03:43:10.446624 00000000 ################################################################
2210 03:43:10.447151
2211 03:43:11.124760 00080000 ################################################################
2212 03:43:11.125272
2213 03:43:11.762603 00100000 ################################################################
2214 03:43:11.762755
2215 03:43:12.376352 00180000 ################################################################
2216 03:43:12.376491
2217 03:43:12.970477 00200000 ################################################################
2218 03:43:12.970615
2219 03:43:13.548487 00280000 ################################################################
2220 03:43:13.548635
2221 03:43:14.165408 00300000 ################################################################
2222 03:43:14.165552
2223 03:43:14.850934 00380000 ################################################################
2224 03:43:14.851525
2225 03:43:15.465257 00400000 ################################################################
2226 03:43:15.465412
2227 03:43:16.139948 00480000 ################################################################
2228 03:43:16.140531
2229 03:43:16.818102 00500000 ################################################################
2230 03:43:16.818656
2231 03:43:17.444410 00580000 ################################################################
2232 03:43:17.444550
2233 03:43:18.044407 00600000 ################################################################
2234 03:43:18.044736
2235 03:43:18.720440 00680000 ################################################################
2236 03:43:18.720970
2237 03:43:19.381491 00700000 ################################################################
2238 03:43:19.382019
2239 03:43:20.057467 00780000 ################################################################
2240 03:43:20.057989
2241 03:43:20.583016 00800000 #################################################### done.
2242 03:43:20.583508
2243 03:43:20.586280 Sending tftp read request... done.
2244 03:43:20.586732
2245 03:43:20.589602 Waiting for the transfer...
2246 03:43:20.590024
2247 03:43:20.590356 00000000 # done.
2248 03:43:20.590740
2249 03:43:20.599841 Command line loaded dynamically from TFTP file: 12940496/tftp-deploy-z_rrck0r/kernel/cmdline
2250 03:43:20.600370
2251 03:43:20.616068 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2252 03:43:20.620555
2253 03:43:20.623891 Shutting down all USB controllers.
2254 03:43:20.624466
2255 03:43:20.624839 Removing current net device
2256 03:43:20.625181
2257 03:43:20.626768 Finalizing coreboot
2258 03:43:20.627234
2259 03:43:20.633362 Exiting depthcharge with code 4 at timestamp: 33307562
2260 03:43:20.633932
2261 03:43:20.634295
2262 03:43:20.634677 Starting kernel ...
2263 03:43:20.635010
2264 03:43:20.635327
2265 03:43:20.636627 end: 2.2.4 bootloader-commands (duration 00:00:25) [common]
2266 03:43:20.637159 start: 2.2.5 auto-login-action (timeout 00:04:20) [common]
2267 03:43:20.637602 Setting prompt string to ['Linux version [0-9]']
2268 03:43:20.638191 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2269 03:43:20.638667 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2271 03:47:40.638194 end: 2.2.5 auto-login-action (duration 00:04:20) [common]
2273 03:47:40.639495 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 260 seconds'
2275 03:47:40.640401 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2278 03:47:40.641786 end: 2 depthcharge-action (duration 00:05:00) [common]
2280 03:47:40.643013 Cleaning after the job
2281 03:47:40.643558 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12940496/tftp-deploy-z_rrck0r/ramdisk
2282 03:47:40.649924 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12940496/tftp-deploy-z_rrck0r/kernel
2283 03:47:40.656819 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12940496/tftp-deploy-z_rrck0r/modules
2284 03:47:40.658516 start: 5.1 power-off (timeout 00:00:30) [common]
2285 03:47:40.659305 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-0' '--port=1' '--command=off'
2286 03:47:40.744817 >> Command sent successfully.
2287 03:47:40.749004 Returned 0 in 0 seconds
2288 03:47:40.849928 end: 5.1 power-off (duration 00:00:00) [common]
2290 03:47:40.851571 start: 5.2 read-feedback (timeout 00:10:00) [common]
2291 03:47:40.852922 Listened to connection for namespace 'common' for up to 1s
2292 03:47:41.853555 Finalising connection for namespace 'common'
2293 03:47:41.854234 Disconnecting from shell: Finalise
2294 03:47:41.854704
2295 03:47:41.955780 end: 5.2 read-feedback (duration 00:00:01) [common]
2296 03:47:41.956559 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12940496
2297 03:47:42.004311 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12940496
2298 03:47:42.004547 JobError: Your job cannot terminate cleanly.