Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 03:47:32.962689 lava-dispatcher, installed at version: 2024.01
2 03:47:32.962914 start: 0 validate
3 03:47:32.963072 Start time: 2024-03-05 03:47:32.963064+00:00 (UTC)
4 03:47:32.963215 Using caching service: 'http://localhost/cache/?uri=%s'
5 03:47:32.963362 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20240129.0%2Famd64%2Finitrd.cpio.gz exists
6 03:47:33.255851 Using caching service: 'http://localhost/cache/?uri=%s'
7 03:47:33.256049 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2244-g20d1c7153f15%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 03:47:33.522827 Using caching service: 'http://localhost/cache/?uri=%s'
9 03:47:33.523502 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20240129.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 03:47:33.792725 Using caching service: 'http://localhost/cache/?uri=%s'
11 03:47:33.793459 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2244-g20d1c7153f15%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 03:47:34.071856 validate duration: 1.11
14 03:47:34.073468 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 03:47:34.074045 start: 1.1 download-retry (timeout 00:10:00) [common]
16 03:47:34.074694 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 03:47:34.075428 Not decompressing ramdisk as can be used compressed.
18 03:47:34.075920 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20240129.0/amd64/initrd.cpio.gz
19 03:47:34.076466 saving as /var/lib/lava/dispatcher/tmp/12940511/tftp-deploy-i5_6ttan/ramdisk/initrd.cpio.gz
20 03:47:34.076923 total size: 5431448 (5 MB)
21 03:47:34.082403 progress 0 % (0 MB)
22 03:47:34.091003 progress 5 % (0 MB)
23 03:47:34.095702 progress 10 % (0 MB)
24 03:47:34.099503 progress 15 % (0 MB)
25 03:47:34.103059 progress 20 % (1 MB)
26 03:47:34.105918 progress 25 % (1 MB)
27 03:47:34.108602 progress 30 % (1 MB)
28 03:47:34.111165 progress 35 % (1 MB)
29 03:47:34.113439 progress 40 % (2 MB)
30 03:47:34.115475 progress 45 % (2 MB)
31 03:47:34.117492 progress 50 % (2 MB)
32 03:47:34.119598 progress 55 % (2 MB)
33 03:47:34.121368 progress 60 % (3 MB)
34 03:47:34.123119 progress 65 % (3 MB)
35 03:47:34.125039 progress 70 % (3 MB)
36 03:47:34.126623 progress 75 % (3 MB)
37 03:47:34.128212 progress 80 % (4 MB)
38 03:47:34.129798 progress 85 % (4 MB)
39 03:47:34.131560 progress 90 % (4 MB)
40 03:47:34.133160 progress 95 % (4 MB)
41 03:47:34.134758 progress 100 % (5 MB)
42 03:47:34.135006 5 MB downloaded in 0.06 s (89.14 MB/s)
43 03:47:34.135195 end: 1.1.1 http-download (duration 00:00:00) [common]
45 03:47:34.135497 end: 1.1 download-retry (duration 00:00:00) [common]
46 03:47:34.135617 start: 1.2 download-retry (timeout 00:10:00) [common]
47 03:47:34.135728 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 03:47:34.135897 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2244-g20d1c7153f15/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 03:47:34.136012 saving as /var/lib/lava/dispatcher/tmp/12940511/tftp-deploy-i5_6ttan/kernel/bzImage
50 03:47:34.136127 total size: 9367440 (8 MB)
51 03:47:34.136238 No compression specified
52 03:47:34.138040 progress 0 % (0 MB)
53 03:47:34.140954 progress 5 % (0 MB)
54 03:47:34.143721 progress 10 % (0 MB)
55 03:47:34.146536 progress 15 % (1 MB)
56 03:47:34.149501 progress 20 % (1 MB)
57 03:47:34.152298 progress 25 % (2 MB)
58 03:47:34.155046 progress 30 % (2 MB)
59 03:47:34.158053 progress 35 % (3 MB)
60 03:47:34.160831 progress 40 % (3 MB)
61 03:47:34.163600 progress 45 % (4 MB)
62 03:47:34.166384 progress 50 % (4 MB)
63 03:47:34.169384 progress 55 % (4 MB)
64 03:47:34.172167 progress 60 % (5 MB)
65 03:47:34.174865 progress 65 % (5 MB)
66 03:47:34.177759 progress 70 % (6 MB)
67 03:47:34.180508 progress 75 % (6 MB)
68 03:47:34.183179 progress 80 % (7 MB)
69 03:47:34.185929 progress 85 % (7 MB)
70 03:47:34.188842 progress 90 % (8 MB)
71 03:47:34.191527 progress 95 % (8 MB)
72 03:47:34.194254 progress 100 % (8 MB)
73 03:47:34.194520 8 MB downloaded in 0.06 s (153.00 MB/s)
74 03:47:34.194699 end: 1.2.1 http-download (duration 00:00:00) [common]
76 03:47:34.195066 end: 1.2 download-retry (duration 00:00:00) [common]
77 03:47:34.195208 start: 1.3 download-retry (timeout 00:10:00) [common]
78 03:47:34.195349 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 03:47:34.195525 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20240129.0/amd64/full.rootfs.tar.xz
80 03:47:34.195635 saving as /var/lib/lava/dispatcher/tmp/12940511/tftp-deploy-i5_6ttan/nfsrootfs/full.rootfs.tar
81 03:47:34.195745 total size: 133429172 (127 MB)
82 03:47:34.195857 Using unxz to decompress xz
83 03:47:34.200903 progress 0 % (0 MB)
84 03:47:34.588298 progress 5 % (6 MB)
85 03:47:34.987688 progress 10 % (12 MB)
86 03:47:35.321432 progress 15 % (19 MB)
87 03:47:35.526622 progress 20 % (25 MB)
88 03:47:35.798910 progress 25 % (31 MB)
89 03:47:36.193359 progress 30 % (38 MB)
90 03:47:36.581760 progress 35 % (44 MB)
91 03:47:37.035013 progress 40 % (50 MB)
92 03:47:37.475059 progress 45 % (57 MB)
93 03:47:37.882253 progress 50 % (63 MB)
94 03:47:38.311649 progress 55 % (70 MB)
95 03:47:38.721344 progress 60 % (76 MB)
96 03:47:39.133735 progress 65 % (82 MB)
97 03:47:39.546476 progress 70 % (89 MB)
98 03:47:39.960390 progress 75 % (95 MB)
99 03:47:40.457922 progress 80 % (101 MB)
100 03:47:40.948535 progress 85 % (108 MB)
101 03:47:41.248387 progress 90 % (114 MB)
102 03:47:41.662063 progress 95 % (120 MB)
103 03:47:42.123006 progress 100 % (127 MB)
104 03:47:42.130308 127 MB downloaded in 7.93 s (16.04 MB/s)
105 03:47:42.130674 end: 1.3.1 http-download (duration 00:00:08) [common]
107 03:47:42.131115 end: 1.3 download-retry (duration 00:00:08) [common]
108 03:47:42.131258 start: 1.4 download-retry (timeout 00:09:52) [common]
109 03:47:42.131394 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 03:47:42.131602 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2244-g20d1c7153f15/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 03:47:42.131712 saving as /var/lib/lava/dispatcher/tmp/12940511/tftp-deploy-i5_6ttan/modules/modules.tar
112 03:47:42.131813 total size: 250168 (0 MB)
113 03:47:42.131917 Using unxz to decompress xz
114 03:47:42.136648 progress 13 % (0 MB)
115 03:47:42.137112 progress 26 % (0 MB)
116 03:47:42.137397 progress 39 % (0 MB)
117 03:47:42.139012 progress 52 % (0 MB)
118 03:47:42.141177 progress 65 % (0 MB)
119 03:47:42.143156 progress 78 % (0 MB)
120 03:47:42.145315 progress 91 % (0 MB)
121 03:47:42.147418 progress 100 % (0 MB)
122 03:47:42.153534 0 MB downloaded in 0.02 s (10.99 MB/s)
123 03:47:42.153822 end: 1.4.1 http-download (duration 00:00:00) [common]
125 03:47:42.154128 end: 1.4 download-retry (duration 00:00:00) [common]
126 03:47:42.154237 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
127 03:47:42.154350 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
128 03:47:44.615033 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12940511/extract-nfsrootfs-uw_1q2l7
129 03:47:44.615256 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 03:47:44.615422 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
131 03:47:44.615680 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12940511/lava-overlay-k2sbq1bn
132 03:47:44.615891 makedir: /var/lib/lava/dispatcher/tmp/12940511/lava-overlay-k2sbq1bn/lava-12940511/bin
133 03:47:44.616060 makedir: /var/lib/lava/dispatcher/tmp/12940511/lava-overlay-k2sbq1bn/lava-12940511/tests
134 03:47:44.616229 makedir: /var/lib/lava/dispatcher/tmp/12940511/lava-overlay-k2sbq1bn/lava-12940511/results
135 03:47:44.616707 Creating /var/lib/lava/dispatcher/tmp/12940511/lava-overlay-k2sbq1bn/lava-12940511/bin/lava-add-keys
136 03:47:44.616949 Creating /var/lib/lava/dispatcher/tmp/12940511/lava-overlay-k2sbq1bn/lava-12940511/bin/lava-add-sources
137 03:47:44.617118 Creating /var/lib/lava/dispatcher/tmp/12940511/lava-overlay-k2sbq1bn/lava-12940511/bin/lava-background-process-start
138 03:47:44.617267 Creating /var/lib/lava/dispatcher/tmp/12940511/lava-overlay-k2sbq1bn/lava-12940511/bin/lava-background-process-stop
139 03:47:44.617410 Creating /var/lib/lava/dispatcher/tmp/12940511/lava-overlay-k2sbq1bn/lava-12940511/bin/lava-common-functions
140 03:47:44.617551 Creating /var/lib/lava/dispatcher/tmp/12940511/lava-overlay-k2sbq1bn/lava-12940511/bin/lava-echo-ipv4
141 03:47:44.617692 Creating /var/lib/lava/dispatcher/tmp/12940511/lava-overlay-k2sbq1bn/lava-12940511/bin/lava-install-packages
142 03:47:44.617832 Creating /var/lib/lava/dispatcher/tmp/12940511/lava-overlay-k2sbq1bn/lava-12940511/bin/lava-installed-packages
143 03:47:44.617992 Creating /var/lib/lava/dispatcher/tmp/12940511/lava-overlay-k2sbq1bn/lava-12940511/bin/lava-os-build
144 03:47:44.618135 Creating /var/lib/lava/dispatcher/tmp/12940511/lava-overlay-k2sbq1bn/lava-12940511/bin/lava-probe-channel
145 03:47:44.618276 Creating /var/lib/lava/dispatcher/tmp/12940511/lava-overlay-k2sbq1bn/lava-12940511/bin/lava-probe-ip
146 03:47:44.618417 Creating /var/lib/lava/dispatcher/tmp/12940511/lava-overlay-k2sbq1bn/lava-12940511/bin/lava-target-ip
147 03:47:44.618559 Creating /var/lib/lava/dispatcher/tmp/12940511/lava-overlay-k2sbq1bn/lava-12940511/bin/lava-target-mac
148 03:47:44.618701 Creating /var/lib/lava/dispatcher/tmp/12940511/lava-overlay-k2sbq1bn/lava-12940511/bin/lava-target-storage
149 03:47:44.618847 Creating /var/lib/lava/dispatcher/tmp/12940511/lava-overlay-k2sbq1bn/lava-12940511/bin/lava-test-case
150 03:47:44.618989 Creating /var/lib/lava/dispatcher/tmp/12940511/lava-overlay-k2sbq1bn/lava-12940511/bin/lava-test-event
151 03:47:44.619130 Creating /var/lib/lava/dispatcher/tmp/12940511/lava-overlay-k2sbq1bn/lava-12940511/bin/lava-test-feedback
152 03:47:44.619270 Creating /var/lib/lava/dispatcher/tmp/12940511/lava-overlay-k2sbq1bn/lava-12940511/bin/lava-test-raise
153 03:47:44.619412 Creating /var/lib/lava/dispatcher/tmp/12940511/lava-overlay-k2sbq1bn/lava-12940511/bin/lava-test-reference
154 03:47:44.619553 Creating /var/lib/lava/dispatcher/tmp/12940511/lava-overlay-k2sbq1bn/lava-12940511/bin/lava-test-runner
155 03:47:44.619695 Creating /var/lib/lava/dispatcher/tmp/12940511/lava-overlay-k2sbq1bn/lava-12940511/bin/lava-test-set
156 03:47:44.619835 Creating /var/lib/lava/dispatcher/tmp/12940511/lava-overlay-k2sbq1bn/lava-12940511/bin/lava-test-shell
157 03:47:44.619979 Updating /var/lib/lava/dispatcher/tmp/12940511/lava-overlay-k2sbq1bn/lava-12940511/bin/lava-install-packages (oe)
158 03:47:44.620152 Updating /var/lib/lava/dispatcher/tmp/12940511/lava-overlay-k2sbq1bn/lava-12940511/bin/lava-installed-packages (oe)
159 03:47:44.620304 Creating /var/lib/lava/dispatcher/tmp/12940511/lava-overlay-k2sbq1bn/lava-12940511/environment
160 03:47:44.620413 LAVA metadata
161 03:47:44.620493 - LAVA_JOB_ID=12940511
162 03:47:44.620565 - LAVA_DISPATCHER_IP=192.168.201.1
163 03:47:44.620685 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
164 03:47:44.620760 skipped lava-vland-overlay
165 03:47:44.620843 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 03:47:44.620932 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
167 03:47:44.621008 skipped lava-multinode-overlay
168 03:47:44.621129 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 03:47:44.621237 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
170 03:47:44.621323 Loading test definitions
171 03:47:44.621424 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:49) [common]
172 03:47:44.621502 Using /lava-12940511 at stage 0
173 03:47:44.621861 uuid=12940511_1.5.2.3.1 testdef=None
174 03:47:44.621962 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 03:47:44.622056 start: 1.5.2.3.2 test-overlay (timeout 00:09:49) [common]
176 03:47:44.622621 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 03:47:44.622865 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:49) [common]
179 03:47:44.623580 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 03:47:44.623835 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
182 03:47:44.624559 runner path: /var/lib/lava/dispatcher/tmp/12940511/lava-overlay-k2sbq1bn/lava-12940511/0/tests/0_dmesg test_uuid 12940511_1.5.2.3.1
183 03:47:44.624742 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 03:47:44.624992 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:49) [common]
186 03:47:44.625071 Using /lava-12940511 at stage 1
187 03:47:44.625407 uuid=12940511_1.5.2.3.5 testdef=None
188 03:47:44.625505 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 03:47:44.625598 start: 1.5.2.3.6 test-overlay (timeout 00:09:49) [common]
190 03:47:44.626123 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 03:47:44.626361 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:49) [common]
193 03:47:44.627077 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 03:47:44.627329 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:49) [common]
196 03:47:44.628100 runner path: /var/lib/lava/dispatcher/tmp/12940511/lava-overlay-k2sbq1bn/lava-12940511/1/tests/1_bootrr test_uuid 12940511_1.5.2.3.5
197 03:47:44.628389 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 03:47:44.628627 Creating lava-test-runner.conf files
200 03:47:44.628699 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12940511/lava-overlay-k2sbq1bn/lava-12940511/0 for stage 0
201 03:47:44.628803 - 0_dmesg
202 03:47:44.628890 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12940511/lava-overlay-k2sbq1bn/lava-12940511/1 for stage 1
203 03:47:44.628994 - 1_bootrr
204 03:47:44.629099 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 03:47:44.629194 start: 1.5.2.4 compress-overlay (timeout 00:09:49) [common]
206 03:47:44.637308 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 03:47:44.637450 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:49) [common]
208 03:47:44.637554 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 03:47:44.637660 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 03:47:44.637756 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:49) [common]
211 03:47:44.791935 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 03:47:44.792386 start: 1.5.4 extract-modules (timeout 00:09:49) [common]
213 03:47:44.792517 extracting modules file /var/lib/lava/dispatcher/tmp/12940511/tftp-deploy-i5_6ttan/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12940511/extract-nfsrootfs-uw_1q2l7
214 03:47:44.807564 extracting modules file /var/lib/lava/dispatcher/tmp/12940511/tftp-deploy-i5_6ttan/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12940511/extract-overlay-ramdisk-u04uexhe/ramdisk
215 03:47:44.822620 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 03:47:44.822800 start: 1.5.5 apply-overlay-tftp (timeout 00:09:49) [common]
217 03:47:44.822906 [common] Applying overlay to NFS
218 03:47:44.822991 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12940511/compress-overlay-_9bf2qid/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12940511/extract-nfsrootfs-uw_1q2l7
219 03:47:44.832165 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 03:47:44.832348 start: 1.5.6 configure-preseed-file (timeout 00:09:49) [common]
221 03:47:44.832462 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 03:47:44.832562 start: 1.5.7 compress-ramdisk (timeout 00:09:49) [common]
223 03:47:44.832655 Building ramdisk /var/lib/lava/dispatcher/tmp/12940511/extract-overlay-ramdisk-u04uexhe/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12940511/extract-overlay-ramdisk-u04uexhe/ramdisk
224 03:47:44.912276 >> 26151 blocks
225 03:47:45.514230 rename /var/lib/lava/dispatcher/tmp/12940511/extract-overlay-ramdisk-u04uexhe/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12940511/tftp-deploy-i5_6ttan/ramdisk/ramdisk.cpio.gz
226 03:47:45.514727 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 03:47:45.514876 start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
228 03:47:45.514991 start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
229 03:47:45.515099 No mkimage arch provided, not using FIT.
230 03:47:45.515202 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 03:47:45.515296 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 03:47:45.515412 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 03:47:45.515514 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
234 03:47:45.515604 No LXC device requested
235 03:47:45.515693 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 03:47:45.515793 start: 1.7 deploy-device-env (timeout 00:09:49) [common]
237 03:47:45.515883 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 03:47:45.515969 Checking files for TFTP limit of 4294967296 bytes.
239 03:47:45.516500 end: 1 tftp-deploy (duration 00:00:11) [common]
240 03:47:45.516615 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 03:47:45.516722 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 03:47:45.516864 substitutions:
243 03:47:45.516938 - {DTB}: None
244 03:47:45.517007 - {INITRD}: 12940511/tftp-deploy-i5_6ttan/ramdisk/ramdisk.cpio.gz
245 03:47:45.517074 - {KERNEL}: 12940511/tftp-deploy-i5_6ttan/kernel/bzImage
246 03:47:45.517137 - {LAVA_MAC}: None
247 03:47:45.517201 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12940511/extract-nfsrootfs-uw_1q2l7
248 03:47:45.517266 - {NFS_SERVER_IP}: 192.168.201.1
249 03:47:45.517327 - {PRESEED_CONFIG}: None
250 03:47:45.517396 - {PRESEED_LOCAL}: None
251 03:47:45.517465 - {RAMDISK}: 12940511/tftp-deploy-i5_6ttan/ramdisk/ramdisk.cpio.gz
252 03:47:45.517526 - {ROOT_PART}: None
253 03:47:45.517586 - {ROOT}: None
254 03:47:45.517645 - {SERVER_IP}: 192.168.201.1
255 03:47:45.517704 - {TEE}: None
256 03:47:45.517764 Parsed boot commands:
257 03:47:45.517822 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 03:47:45.518029 Parsed boot commands: tftpboot 192.168.201.1 12940511/tftp-deploy-i5_6ttan/kernel/bzImage 12940511/tftp-deploy-i5_6ttan/kernel/cmdline 12940511/tftp-deploy-i5_6ttan/ramdisk/ramdisk.cpio.gz
259 03:47:45.518131 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 03:47:45.518229 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 03:47:45.518333 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 03:47:45.518434 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 03:47:45.518516 Not connected, no need to disconnect.
264 03:47:45.518601 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 03:47:45.518693 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 03:47:45.518772 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-4'
267 03:47:45.523544 Setting prompt string to ['lava-test: # ']
268 03:47:45.523979 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 03:47:45.524130 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 03:47:45.524290 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 03:47:45.524405 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 03:47:45.524640 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
273 03:47:50.663724 >> Command sent successfully.
274 03:47:50.674203 Returned 0 in 5 seconds
275 03:47:50.775516 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 03:47:50.776983 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 03:47:50.777480 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 03:47:50.777920 Setting prompt string to 'Starting depthcharge on Helios...'
280 03:47:50.778268 Changing prompt to 'Starting depthcharge on Helios...'
281 03:47:50.778612 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
282 03:47:50.779828 [Enter `^Ec?' for help]
283 03:47:51.389306
284 03:47:51.389867
285 03:47:51.399960 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
286 03:47:51.402646 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
287 03:47:51.409840 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
288 03:47:51.412986 CPU: AES supported, TXT NOT supported, VT supported
289 03:47:51.420071 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
290 03:47:51.423618 PCH: device id 0284 (rev 00) is Cometlake-U Premium
291 03:47:51.430199 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
292 03:47:51.433288 VBOOT: Loading verstage.
293 03:47:51.436328 FMAP: Found "FLASH" version 1.1 at 0xc04000.
294 03:47:51.443616 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
295 03:47:51.446352 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
296 03:47:51.450304 CBFS @ c08000 size 3f8000
297 03:47:51.456317 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
298 03:47:51.459885 CBFS: Locating 'fallback/verstage'
299 03:47:51.463093 CBFS: Found @ offset 10fb80 size 1072c
300 03:47:51.466959
301 03:47:51.467500
302 03:47:51.476354 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
303 03:47:51.490849 Probing TPM: . done!
304 03:47:51.494389 TPM ready after 0 ms
305 03:47:51.497639 Connected to device vid:did:rid of 1ae0:0028:00
306 03:47:51.507531 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
307 03:47:51.511152 Initialized TPM device CR50 revision 0
308 03:47:51.556807 tlcl_send_startup: Startup return code is 0
309 03:47:51.557319 TPM: setup succeeded
310 03:47:51.569834 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
311 03:47:51.573199 Chrome EC: UHEPI supported
312 03:47:51.576424 Phase 1
313 03:47:51.580233 FMAP: area GBB found @ c05000 (12288 bytes)
314 03:47:51.587024 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
315 03:47:51.587572 Phase 2
316 03:47:51.589877 Phase 3
317 03:47:51.593837 FMAP: area GBB found @ c05000 (12288 bytes)
318 03:47:51.600100 VB2:vb2_report_dev_firmware() This is developer signed firmware
319 03:47:51.606646 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
320 03:47:51.609668 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
321 03:47:51.616552 VB2:vb2_verify_keyblock() Checking keyblock signature...
322 03:47:51.632715 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
323 03:47:51.635305 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
324 03:47:51.642158 VB2:vb2_verify_fw_preamble() Verifying preamble.
325 03:47:51.646333 Phase 4
326 03:47:51.649365 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
327 03:47:51.656623 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
328 03:47:51.836289 VB2:vb2_rsa_verify_digest() Digest check failed!
329 03:47:51.839415 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
330 03:47:51.842698 Saving nvdata
331 03:47:51.846373 Reboot requested (10020007)
332 03:47:51.849244 board_reset() called!
333 03:47:51.849690 full_reset() called!
334 03:47:56.356680
335 03:47:56.356831
336 03:47:56.367009 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
337 03:47:56.369812 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
338 03:47:56.376804 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
339 03:47:56.379867 CPU: AES supported, TXT NOT supported, VT supported
340 03:47:56.386707 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
341 03:47:56.390324 PCH: device id 0284 (rev 00) is Cometlake-U Premium
342 03:47:56.396355 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
343 03:47:56.399964 VBOOT: Loading verstage.
344 03:47:56.403459 FMAP: Found "FLASH" version 1.1 at 0xc04000.
345 03:47:56.410021 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
346 03:47:56.413230 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
347 03:47:56.416380 CBFS @ c08000 size 3f8000
348 03:47:56.423567 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
349 03:47:56.426447 CBFS: Locating 'fallback/verstage'
350 03:47:56.429577 CBFS: Found @ offset 10fb80 size 1072c
351 03:47:56.433370
352 03:47:56.433462
353 03:47:56.443394 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
354 03:47:56.457827 Probing TPM: . done!
355 03:47:56.460841 TPM ready after 0 ms
356 03:47:56.464466 Connected to device vid:did:rid of 1ae0:0028:00
357 03:47:56.474428 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
358 03:47:56.478667 Initialized TPM device CR50 revision 0
359 03:47:56.523845 tlcl_send_startup: Startup return code is 0
360 03:47:56.523980 TPM: setup succeeded
361 03:47:56.536510 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
362 03:47:56.540480 Chrome EC: UHEPI supported
363 03:47:56.543992 Phase 1
364 03:47:56.547053 FMAP: area GBB found @ c05000 (12288 bytes)
365 03:47:56.553291 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
366 03:47:56.560352 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
367 03:47:56.563448 Recovery requested (1009000e)
368 03:47:56.563542 Saving nvdata
369 03:47:56.575658 tlcl_extend: response is 0
370 03:47:56.584344 tlcl_extend: response is 0
371 03:47:56.591527 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
372 03:47:56.594590 CBFS @ c08000 size 3f8000
373 03:47:56.601194 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
374 03:47:56.604813 CBFS: Locating 'fallback/romstage'
375 03:47:56.607941 CBFS: Found @ offset 80 size 145fc
376 03:47:56.611380 Accumulated console time in verstage 98 ms
377 03:47:56.611473
378 03:47:56.611545
379 03:47:56.624806 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
380 03:47:56.630862 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
381 03:47:56.634426 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
382 03:47:56.637573 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
383 03:47:56.644109 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
384 03:47:56.647469 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
385 03:47:56.650597 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
386 03:47:56.653925 TCO_STS: 0000 0000
387 03:47:56.657434 GEN_PMCON: e0015238 00000200
388 03:47:56.660613 GBLRST_CAUSE: 00000000 00000000
389 03:47:56.660706 prev_sleep_state 5
390 03:47:56.663971 Boot Count incremented to 71416
391 03:47:56.671185 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
392 03:47:56.674160 CBFS @ c08000 size 3f8000
393 03:47:56.680886 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
394 03:47:56.680997 CBFS: Locating 'fspm.bin'
395 03:47:56.684193 CBFS: Found @ offset 5ffc0 size 71000
396 03:47:56.688507 Chrome EC: UHEPI supported
397 03:47:56.695664 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
398 03:47:56.701118 Probing TPM: done!
399 03:47:56.707814 Connected to device vid:did:rid of 1ae0:0028:00
400 03:47:56.717777 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
401 03:47:56.722977 Initialized TPM device CR50 revision 0
402 03:47:56.732175 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
403 03:47:56.738978 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
404 03:47:56.742400 MRC cache found, size 1948
405 03:47:56.745547 bootmode is set to: 2
406 03:47:56.749312 PRMRR disabled by config.
407 03:47:56.749407 SPD INDEX = 1
408 03:47:56.755427 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
409 03:47:56.759183 CBFS @ c08000 size 3f8000
410 03:47:56.762421 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
411 03:47:56.765812 CBFS: Locating 'spd.bin'
412 03:47:56.769074 CBFS: Found @ offset 5fb80 size 400
413 03:47:56.772424 SPD: module type is LPDDR3
414 03:47:56.775841 SPD: module part is
415 03:47:56.782774 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
416 03:47:56.785870 SPD: device width 4 bits, bus width 8 bits
417 03:47:56.788894 SPD: module size is 4096 MB (per channel)
418 03:47:56.792626 memory slot: 0 configuration done.
419 03:47:56.795520 memory slot: 2 configuration done.
420 03:47:56.846469 CBMEM:
421 03:47:56.849776 IMD: root @ 99fff000 254 entries.
422 03:47:56.853419 IMD: root @ 99ffec00 62 entries.
423 03:47:56.856562 External stage cache:
424 03:47:56.859698 IMD: root @ 9abff000 254 entries.
425 03:47:56.863470 IMD: root @ 9abfec00 62 entries.
426 03:47:56.866448 Chrome EC: clear events_b mask to 0x0000000020004000
427 03:47:56.882684 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
428 03:47:56.896148 tlcl_write: response is 0
429 03:47:56.905180 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
430 03:47:56.911790 MRC: TPM MRC hash updated successfully.
431 03:47:56.911944 2 DIMMs found
432 03:47:56.914718 SMM Memory Map
433 03:47:56.918192 SMRAM : 0x9a000000 0x1000000
434 03:47:56.921710 Subregion 0: 0x9a000000 0xa00000
435 03:47:56.924805 Subregion 1: 0x9aa00000 0x200000
436 03:47:56.928325 Subregion 2: 0x9ac00000 0x400000
437 03:47:56.931503 top_of_ram = 0x9a000000
438 03:47:56.934839 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
439 03:47:56.941351 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
440 03:47:56.944526 MTRR Range: Start=ff000000 End=0 (Size 1000000)
441 03:47:56.951338 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 03:47:56.954886 CBFS @ c08000 size 3f8000
443 03:47:56.958042 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 03:47:56.961476 CBFS: Locating 'fallback/postcar'
445 03:47:56.968204 CBFS: Found @ offset 107000 size 4b44
446 03:47:56.971435 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
447 03:47:56.983694 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
448 03:47:56.986798 Processing 180 relocs. Offset value of 0x97c0c000
449 03:47:56.995483 Accumulated console time in romstage 285 ms
450 03:47:56.995582
451 03:47:56.995657
452 03:47:57.005564 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
453 03:47:57.012180 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
454 03:47:57.015202 CBFS @ c08000 size 3f8000
455 03:47:57.018452 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
456 03:47:57.025263 CBFS: Locating 'fallback/ramstage'
457 03:47:57.028445 CBFS: Found @ offset 43380 size 1b9e8
458 03:47:57.035535 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
459 03:47:57.066929 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
460 03:47:57.070915 Processing 3976 relocs. Offset value of 0x98db0000
461 03:47:57.077303 Accumulated console time in postcar 52 ms
462 03:47:57.077405
463 03:47:57.077488
464 03:47:57.087236 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
465 03:47:57.094158 FMAP: area RO_VPD found @ c00000 (16384 bytes)
466 03:47:57.097143 WARNING: RO_VPD is uninitialized or empty.
467 03:47:57.100703 FMAP: area RW_VPD found @ af8000 (8192 bytes)
468 03:47:57.107396 FMAP: area RW_VPD found @ af8000 (8192 bytes)
469 03:47:57.107497 Normal boot.
470 03:47:57.113874 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
471 03:47:57.116935 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
472 03:47:57.120513 CBFS @ c08000 size 3f8000
473 03:47:57.127295 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
474 03:47:57.130324 CBFS: Locating 'cpu_microcode_blob.bin'
475 03:47:57.133470 CBFS: Found @ offset 14700 size 2ec00
476 03:47:57.136957 microcode: sig=0x806ec pf=0x4 revision=0xc9
477 03:47:57.140051 Skip microcode update
478 03:47:57.143834 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
479 03:47:57.147166 CBFS @ c08000 size 3f8000
480 03:47:57.153310 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
481 03:47:57.156992 CBFS: Locating 'fsps.bin'
482 03:47:57.160179 CBFS: Found @ offset d1fc0 size 35000
483 03:47:57.185290 Detected 4 core, 8 thread CPU.
484 03:47:57.188284 Setting up SMI for CPU
485 03:47:57.192474 IED base = 0x9ac00000
486 03:47:57.192569 IED size = 0x00400000
487 03:47:57.195105 Will perform SMM setup.
488 03:47:57.201972 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
489 03:47:57.208505 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
490 03:47:57.215236 Processing 16 relocs. Offset value of 0x00030000
491 03:47:57.215331 Attempting to start 7 APs
492 03:47:57.221537 Waiting for 10ms after sending INIT.
493 03:47:57.235002 Waiting for 1st SIPI to complete...done.
494 03:47:57.235112 AP: slot 1 apic_id 1.
495 03:47:57.241800 Waiting for 2nd SIPI to complete...done.
496 03:47:57.241910 AP: slot 4 apic_id 6.
497 03:47:57.244736 AP: slot 5 apic_id 7.
498 03:47:57.248286 AP: slot 6 apic_id 2.
499 03:47:57.248381 AP: slot 7 apic_id 3.
500 03:47:57.251376 AP: slot 2 apic_id 4.
501 03:47:57.254993 AP: slot 3 apic_id 5.
502 03:47:57.261575 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
503 03:47:57.268458 Processing 13 relocs. Offset value of 0x00038000
504 03:47:57.271443 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
505 03:47:57.278365 Installing SMM handler to 0x9a000000
506 03:47:57.284586 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
507 03:47:57.288459 Processing 658 relocs. Offset value of 0x9a010000
508 03:47:57.298056 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
509 03:47:57.301440 Processing 13 relocs. Offset value of 0x9a008000
510 03:47:57.307844 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
511 03:47:57.314322 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
512 03:47:57.320895 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
513 03:47:57.324400 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
514 03:47:57.331221 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
515 03:47:57.337785 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
516 03:47:57.341103 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
517 03:47:57.347957 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
518 03:47:57.351447 Clearing SMI status registers
519 03:47:57.354360 SMI_STS: PM1
520 03:47:57.354452 PM1_STS: PWRBTN
521 03:47:57.358068 TCO_STS: SECOND_TO
522 03:47:57.361279 New SMBASE 0x9a000000
523 03:47:57.364310 In relocation handler: CPU 0
524 03:47:57.367646 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
525 03:47:57.370827 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 03:47:57.374449 Relocation complete.
527 03:47:57.377758 New SMBASE 0x99fffc00
528 03:47:57.377851 In relocation handler: CPU 1
529 03:47:57.384355 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
530 03:47:57.387442 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 03:47:57.391322 Relocation complete.
532 03:47:57.394291 New SMBASE 0x99ffe800
533 03:47:57.394384 In relocation handler: CPU 6
534 03:47:57.401056 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
535 03:47:57.404584 Writing SMRR. base = 0x9a000006, mask=0xff000800
536 03:47:57.407451 Relocation complete.
537 03:47:57.407543 New SMBASE 0x99ffe400
538 03:47:57.411263 In relocation handler: CPU 7
539 03:47:57.417404 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
540 03:47:57.420881 Writing SMRR. base = 0x9a000006, mask=0xff000800
541 03:47:57.424006 Relocation complete.
542 03:47:57.424105 New SMBASE 0x99fff400
543 03:47:57.427660 In relocation handler: CPU 3
544 03:47:57.431165 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
545 03:47:57.437495 Writing SMRR. base = 0x9a000006, mask=0xff000800
546 03:47:57.441008 Relocation complete.
547 03:47:57.441105 New SMBASE 0x99fff800
548 03:47:57.444532 In relocation handler: CPU 2
549 03:47:57.447400 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
550 03:47:57.453973 Writing SMRR. base = 0x9a000006, mask=0xff000800
551 03:47:57.457701 Relocation complete.
552 03:47:57.457794 New SMBASE 0x99fff000
553 03:47:57.461177 In relocation handler: CPU 4
554 03:47:57.464005 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
555 03:47:57.470655 Writing SMRR. base = 0x9a000006, mask=0xff000800
556 03:47:57.470749 Relocation complete.
557 03:47:57.474219 New SMBASE 0x99ffec00
558 03:47:57.477320 In relocation handler: CPU 5
559 03:47:57.481287 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
560 03:47:57.487862 Writing SMRR. base = 0x9a000006, mask=0xff000800
561 03:47:57.487982 Relocation complete.
562 03:47:57.491101 Initializing CPU #0
563 03:47:57.494152 CPU: vendor Intel device 806ec
564 03:47:57.497325 CPU: family 06, model 8e, stepping 0c
565 03:47:57.501293 Clearing out pending MCEs
566 03:47:57.504103 Setting up local APIC...
567 03:47:57.504196 apic_id: 0x00 done.
568 03:47:57.507591 Turbo is available but hidden
569 03:47:57.510475 Turbo is available and visible
570 03:47:57.513844 VMX status: enabled
571 03:47:57.517197 IA32_FEATURE_CONTROL status: locked
572 03:47:57.520857 Skip microcode update
573 03:47:57.520953 CPU #0 initialized
574 03:47:57.523991 Initializing CPU #1
575 03:47:57.524084 Initializing CPU #6
576 03:47:57.527320 Initializing CPU #7
577 03:47:57.530873 CPU: vendor Intel device 806ec
578 03:47:57.533850 CPU: family 06, model 8e, stepping 0c
579 03:47:57.537217 CPU: vendor Intel device 806ec
580 03:47:57.540838 CPU: family 06, model 8e, stepping 0c
581 03:47:57.543795 Clearing out pending MCEs
582 03:47:57.547047 Clearing out pending MCEs
583 03:47:57.550501 Setting up local APIC...
584 03:47:57.550594 CPU: vendor Intel device 806ec
585 03:47:57.557224 CPU: family 06, model 8e, stepping 0c
586 03:47:57.557318 Clearing out pending MCEs
587 03:47:57.560205 Setting up local APIC...
588 03:47:57.564131 Setting up local APIC...
589 03:47:57.567170 Initializing CPU #5
590 03:47:57.567292 Initializing CPU #4
591 03:47:57.570577 CPU: vendor Intel device 806ec
592 03:47:57.573648 CPU: family 06, model 8e, stepping 0c
593 03:47:57.577679 CPU: vendor Intel device 806ec
594 03:47:57.580794 CPU: family 06, model 8e, stepping 0c
595 03:47:57.583550 Clearing out pending MCEs
596 03:47:57.586741 Clearing out pending MCEs
597 03:47:57.590340 Setting up local APIC...
598 03:47:57.590433 Initializing CPU #3
599 03:47:57.593438 Initializing CPU #2
600 03:47:57.597201 CPU: vendor Intel device 806ec
601 03:47:57.600358 CPU: family 06, model 8e, stepping 0c
602 03:47:57.604167 CPU: vendor Intel device 806ec
603 03:47:57.607293 CPU: family 06, model 8e, stepping 0c
604 03:47:57.610613 Clearing out pending MCEs
605 03:47:57.614278 Clearing out pending MCEs
606 03:47:57.614400 Setting up local APIC...
607 03:47:57.617239 apic_id: 0x06 done.
608 03:47:57.620752 Setting up local APIC...
609 03:47:57.620845 apic_id: 0x01 done.
610 03:47:57.623832 apic_id: 0x07 done.
611 03:47:57.627235 VMX status: enabled
612 03:47:57.627329 VMX status: enabled
613 03:47:57.630337 IA32_FEATURE_CONTROL status: locked
614 03:47:57.633363 IA32_FEATURE_CONTROL status: locked
615 03:47:57.636729 Skip microcode update
616 03:47:57.640147 Skip microcode update
617 03:47:57.640275 CPU #4 initialized
618 03:47:57.643436 CPU #5 initialized
619 03:47:57.646949 apic_id: 0x05 done.
620 03:47:57.647044 Setting up local APIC...
621 03:47:57.649902 VMX status: enabled
622 03:47:57.653486 apic_id: 0x04 done.
623 03:47:57.653579 VMX status: enabled
624 03:47:57.656773 VMX status: enabled
625 03:47:57.660037 IA32_FEATURE_CONTROL status: locked
626 03:47:57.663499 IA32_FEATURE_CONTROL status: locked
627 03:47:57.666797 Skip microcode update
628 03:47:57.666890 Skip microcode update
629 03:47:57.670011 CPU #3 initialized
630 03:47:57.673196 CPU #2 initialized
631 03:47:57.676702 IA32_FEATURE_CONTROL status: locked
632 03:47:57.676795 apic_id: 0x02 done.
633 03:47:57.680397 apic_id: 0x03 done.
634 03:47:57.683730 VMX status: enabled
635 03:47:57.683823 VMX status: enabled
636 03:47:57.686434 IA32_FEATURE_CONTROL status: locked
637 03:47:57.690223 IA32_FEATURE_CONTROL status: locked
638 03:47:57.693326 Skip microcode update
639 03:47:57.696959 Skip microcode update
640 03:47:57.697052 CPU #6 initialized
641 03:47:57.699853 CPU #7 initialized
642 03:47:57.703027 Skip microcode update
643 03:47:57.703120 CPU #1 initialized
644 03:47:57.706691 bsp_do_flight_plan done after 466 msecs.
645 03:47:57.709961 CPU: frequency set to 4200 MHz
646 03:47:57.713013 Enabling SMIs.
647 03:47:57.713106 Locking SMM.
648 03:47:57.728923 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
649 03:47:57.732520 CBFS @ c08000 size 3f8000
650 03:47:57.739260 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
651 03:47:57.739355 CBFS: Locating 'vbt.bin'
652 03:47:57.742347 CBFS: Found @ offset 5f5c0 size 499
653 03:47:57.749232 Found a VBT of 4608 bytes after decompression
654 03:47:57.931228 Display FSP Version Info HOB
655 03:47:57.934851 Reference Code - CPU = 9.0.1e.30
656 03:47:57.938123 uCode Version = 0.0.0.ca
657 03:47:57.941632 TXT ACM version = ff.ff.ff.ffff
658 03:47:57.944615 Display FSP Version Info HOB
659 03:47:57.948082 Reference Code - ME = 9.0.1e.30
660 03:47:57.951316 MEBx version = 0.0.0.0
661 03:47:57.955003 ME Firmware Version = Consumer SKU
662 03:47:57.958152 Display FSP Version Info HOB
663 03:47:57.961275 Reference Code - CML PCH = 9.0.1e.30
664 03:47:57.964980 PCH-CRID Status = Disabled
665 03:47:57.967825 PCH-CRID Original Value = ff.ff.ff.ffff
666 03:47:57.971393 PCH-CRID New Value = ff.ff.ff.ffff
667 03:47:57.974815 OPROM - RST - RAID = ff.ff.ff.ffff
668 03:47:57.977850 ChipsetInit Base Version = ff.ff.ff.ffff
669 03:47:57.981537 ChipsetInit Oem Version = ff.ff.ff.ffff
670 03:47:57.984577 Display FSP Version Info HOB
671 03:47:57.991286 Reference Code - SA - System Agent = 9.0.1e.30
672 03:47:57.994849 Reference Code - MRC = 0.7.1.6c
673 03:47:57.994942 SA - PCIe Version = 9.0.1e.30
674 03:47:57.997697 SA-CRID Status = Disabled
675 03:47:58.001317 SA-CRID Original Value = 0.0.0.c
676 03:47:58.004213 SA-CRID New Value = 0.0.0.c
677 03:47:58.007725 OPROM - VBIOS = ff.ff.ff.ffff
678 03:47:58.007818 RTC Init
679 03:47:58.014681 Set power on after power failure.
680 03:47:58.014774 Disabling Deep S3
681 03:47:58.018194 Disabling Deep S3
682 03:47:58.018292 Disabling Deep S4
683 03:47:58.021297 Disabling Deep S4
684 03:47:58.021390 Disabling Deep S5
685 03:47:58.024901 Disabling Deep S5
686 03:47:58.030997 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
687 03:47:58.031127 Enumerating buses...
688 03:47:58.037760 Show all devs... Before device enumeration.
689 03:47:58.037859 Root Device: enabled 1
690 03:47:58.041000 CPU_CLUSTER: 0: enabled 1
691 03:47:58.044188 DOMAIN: 0000: enabled 1
692 03:47:58.044292 APIC: 00: enabled 1
693 03:47:58.047914 PCI: 00:00.0: enabled 1
694 03:47:58.051062 PCI: 00:02.0: enabled 1
695 03:47:58.054343 PCI: 00:04.0: enabled 0
696 03:47:58.054436 PCI: 00:05.0: enabled 0
697 03:47:58.058060 PCI: 00:12.0: enabled 1
698 03:47:58.061176 PCI: 00:12.5: enabled 0
699 03:47:58.064239 PCI: 00:12.6: enabled 0
700 03:47:58.064342 PCI: 00:14.0: enabled 1
701 03:47:58.067354 PCI: 00:14.1: enabled 0
702 03:47:58.070900 PCI: 00:14.3: enabled 1
703 03:47:58.074104 PCI: 00:14.5: enabled 0
704 03:47:58.074229 PCI: 00:15.0: enabled 1
705 03:47:58.077434 PCI: 00:15.1: enabled 1
706 03:47:58.080860 PCI: 00:15.2: enabled 0
707 03:47:58.084028 PCI: 00:15.3: enabled 0
708 03:47:58.084121 PCI: 00:16.0: enabled 1
709 03:47:58.087743 PCI: 00:16.1: enabled 0
710 03:47:58.090960 PCI: 00:16.2: enabled 0
711 03:47:58.091053 PCI: 00:16.3: enabled 0
712 03:47:58.094063 PCI: 00:16.4: enabled 0
713 03:47:58.097728 PCI: 00:16.5: enabled 0
714 03:47:58.101203 PCI: 00:17.0: enabled 1
715 03:47:58.101296 PCI: 00:19.0: enabled 1
716 03:47:58.104562 PCI: 00:19.1: enabled 0
717 03:47:58.107131 PCI: 00:19.2: enabled 0
718 03:47:58.110728 PCI: 00:1a.0: enabled 0
719 03:47:58.110822 PCI: 00:1c.0: enabled 0
720 03:47:58.114254 PCI: 00:1c.1: enabled 0
721 03:47:58.117854 PCI: 00:1c.2: enabled 0
722 03:47:58.120844 PCI: 00:1c.3: enabled 0
723 03:47:58.120938 PCI: 00:1c.4: enabled 0
724 03:47:58.123992 PCI: 00:1c.5: enabled 0
725 03:47:58.127254 PCI: 00:1c.6: enabled 0
726 03:47:58.127358 PCI: 00:1c.7: enabled 0
727 03:47:58.130873 PCI: 00:1d.0: enabled 1
728 03:47:58.134436 PCI: 00:1d.1: enabled 0
729 03:47:58.137309 PCI: 00:1d.2: enabled 0
730 03:47:58.137403 PCI: 00:1d.3: enabled 0
731 03:47:58.140968 PCI: 00:1d.4: enabled 0
732 03:47:58.144206 PCI: 00:1d.5: enabled 1
733 03:47:58.147161 PCI: 00:1e.0: enabled 1
734 03:47:58.147263 PCI: 00:1e.1: enabled 0
735 03:47:58.150692 PCI: 00:1e.2: enabled 1
736 03:47:58.154098 PCI: 00:1e.3: enabled 1
737 03:47:58.157541 PCI: 00:1f.0: enabled 1
738 03:47:58.157634 PCI: 00:1f.1: enabled 1
739 03:47:58.160561 PCI: 00:1f.2: enabled 1
740 03:47:58.164027 PCI: 00:1f.3: enabled 1
741 03:47:58.164149 PCI: 00:1f.4: enabled 1
742 03:47:58.167044 PCI: 00:1f.5: enabled 1
743 03:47:58.170746 PCI: 00:1f.6: enabled 0
744 03:47:58.173752 USB0 port 0: enabled 1
745 03:47:58.173874 I2C: 00:15: enabled 1
746 03:47:58.176804 I2C: 00:5d: enabled 1
747 03:47:58.180412 GENERIC: 0.0: enabled 1
748 03:47:58.180507 I2C: 00:1a: enabled 1
749 03:47:58.183586 I2C: 00:38: enabled 1
750 03:47:58.186942 I2C: 00:39: enabled 1
751 03:47:58.187034 I2C: 00:3a: enabled 1
752 03:47:58.190738 I2C: 00:3b: enabled 1
753 03:47:58.193862 PCI: 00:00.0: enabled 1
754 03:47:58.193955 SPI: 00: enabled 1
755 03:47:58.196953 SPI: 01: enabled 1
756 03:47:58.200572 PNP: 0c09.0: enabled 1
757 03:47:58.200665 USB2 port 0: enabled 1
758 03:47:58.203928 USB2 port 1: enabled 1
759 03:47:58.206809 USB2 port 2: enabled 0
760 03:47:58.206902 USB2 port 3: enabled 0
761 03:47:58.210558 USB2 port 5: enabled 0
762 03:47:58.213510 USB2 port 6: enabled 1
763 03:47:58.217165 USB2 port 9: enabled 1
764 03:47:58.217258 USB3 port 0: enabled 1
765 03:47:58.220431 USB3 port 1: enabled 1
766 03:47:58.223714 USB3 port 2: enabled 1
767 03:47:58.223807 USB3 port 3: enabled 1
768 03:47:58.227189 USB3 port 4: enabled 0
769 03:47:58.230290 APIC: 01: enabled 1
770 03:47:58.230384 APIC: 04: enabled 1
771 03:47:58.233295 APIC: 05: enabled 1
772 03:47:58.236935 APIC: 06: enabled 1
773 03:47:58.237028 APIC: 07: enabled 1
774 03:47:58.240028 APIC: 02: enabled 1
775 03:47:58.240122 APIC: 03: enabled 1
776 03:47:58.243373 Compare with tree...
777 03:47:58.247086 Root Device: enabled 1
778 03:47:58.249884 CPU_CLUSTER: 0: enabled 1
779 03:47:58.249977 APIC: 00: enabled 1
780 03:47:58.253614 APIC: 01: enabled 1
781 03:47:58.256678 APIC: 04: enabled 1
782 03:47:58.256776 APIC: 05: enabled 1
783 03:47:58.259757 APIC: 06: enabled 1
784 03:47:58.263446 APIC: 07: enabled 1
785 03:47:58.263539 APIC: 02: enabled 1
786 03:47:58.266867 APIC: 03: enabled 1
787 03:47:58.269962 DOMAIN: 0000: enabled 1
788 03:47:58.273219 PCI: 00:00.0: enabled 1
789 03:47:58.273312 PCI: 00:02.0: enabled 1
790 03:47:58.276446 PCI: 00:04.0: enabled 0
791 03:47:58.279693 PCI: 00:05.0: enabled 0
792 03:47:58.283208 PCI: 00:12.0: enabled 1
793 03:47:58.286723 PCI: 00:12.5: enabled 0
794 03:47:58.286817 PCI: 00:12.6: enabled 0
795 03:47:58.290190 PCI: 00:14.0: enabled 1
796 03:47:58.293083 USB0 port 0: enabled 1
797 03:47:58.296099 USB2 port 0: enabled 1
798 03:47:58.299716 USB2 port 1: enabled 1
799 03:47:58.299818 USB2 port 2: enabled 0
800 03:47:58.302986 USB2 port 3: enabled 0
801 03:47:58.306630 USB2 port 5: enabled 0
802 03:47:58.309815 USB2 port 6: enabled 1
803 03:47:58.312727 USB2 port 9: enabled 1
804 03:47:58.316497 USB3 port 0: enabled 1
805 03:47:58.316624 USB3 port 1: enabled 1
806 03:47:58.319507 USB3 port 2: enabled 1
807 03:47:58.322874 USB3 port 3: enabled 1
808 03:47:58.326347 USB3 port 4: enabled 0
809 03:47:58.329131 PCI: 00:14.1: enabled 0
810 03:47:58.329225 PCI: 00:14.3: enabled 1
811 03:47:58.332487 PCI: 00:14.5: enabled 0
812 03:47:58.335783 PCI: 00:15.0: enabled 1
813 03:47:58.339196 I2C: 00:15: enabled 1
814 03:47:58.342633 PCI: 00:15.1: enabled 1
815 03:47:58.342727 I2C: 00:5d: enabled 1
816 03:47:58.345739 GENERIC: 0.0: enabled 1
817 03:47:58.349001 PCI: 00:15.2: enabled 0
818 03:47:58.352283 PCI: 00:15.3: enabled 0
819 03:47:58.355871 PCI: 00:16.0: enabled 1
820 03:47:58.355964 PCI: 00:16.1: enabled 0
821 03:47:58.359107 PCI: 00:16.2: enabled 0
822 03:47:58.362149 PCI: 00:16.3: enabled 0
823 03:47:58.365917 PCI: 00:16.4: enabled 0
824 03:47:58.368938 PCI: 00:16.5: enabled 0
825 03:47:58.369032 PCI: 00:17.0: enabled 1
826 03:47:58.372650 PCI: 00:19.0: enabled 1
827 03:47:58.375823 I2C: 00:1a: enabled 1
828 03:47:58.378887 I2C: 00:38: enabled 1
829 03:47:58.378990 I2C: 00:39: enabled 1
830 03:47:58.382896 I2C: 00:3a: enabled 1
831 03:47:58.386326 I2C: 00:3b: enabled 1
832 03:47:58.389015 PCI: 00:19.1: enabled 0
833 03:47:58.392033 PCI: 00:19.2: enabled 0
834 03:47:58.392126 PCI: 00:1a.0: enabled 0
835 03:47:58.395705 PCI: 00:1c.0: enabled 0
836 03:47:58.398652 PCI: 00:1c.1: enabled 0
837 03:47:58.401799 PCI: 00:1c.2: enabled 0
838 03:47:58.405393 PCI: 00:1c.3: enabled 0
839 03:47:58.405489 PCI: 00:1c.4: enabled 0
840 03:47:58.408611 PCI: 00:1c.5: enabled 0
841 03:47:58.411893 PCI: 00:1c.6: enabled 0
842 03:47:58.415545 PCI: 00:1c.7: enabled 0
843 03:47:58.418578 PCI: 00:1d.0: enabled 1
844 03:47:58.418674 PCI: 00:1d.1: enabled 0
845 03:47:58.421642 PCI: 00:1d.2: enabled 0
846 03:47:58.425478 PCI: 00:1d.3: enabled 0
847 03:47:58.428199 PCI: 00:1d.4: enabled 0
848 03:47:58.431803 PCI: 00:1d.5: enabled 1
849 03:47:58.431898 PCI: 00:00.0: enabled 1
850 03:47:58.434797 PCI: 00:1e.0: enabled 1
851 03:47:58.438430 PCI: 00:1e.1: enabled 0
852 03:47:58.441673 PCI: 00:1e.2: enabled 1
853 03:47:58.441800 SPI: 00: enabled 1
854 03:47:58.445079 PCI: 00:1e.3: enabled 1
855 03:47:58.448127 SPI: 01: enabled 1
856 03:47:58.451637 PCI: 00:1f.0: enabled 1
857 03:47:58.451752 PNP: 0c09.0: enabled 1
858 03:47:58.454897 PCI: 00:1f.1: enabled 1
859 03:47:58.458418 PCI: 00:1f.2: enabled 1
860 03:47:58.461275 PCI: 00:1f.3: enabled 1
861 03:47:58.464918 PCI: 00:1f.4: enabled 1
862 03:47:58.465012 PCI: 00:1f.5: enabled 1
863 03:47:58.468150 PCI: 00:1f.6: enabled 0
864 03:47:58.471831 Root Device scanning...
865 03:47:58.474971 scan_static_bus for Root Device
866 03:47:58.478200 CPU_CLUSTER: 0 enabled
867 03:47:58.478292 DOMAIN: 0000 enabled
868 03:47:58.481268 DOMAIN: 0000 scanning...
869 03:47:58.484518 PCI: pci_scan_bus for bus 00
870 03:47:58.488399 PCI: 00:00.0 [8086/0000] ops
871 03:47:58.491828 PCI: 00:00.0 [8086/9b61] enabled
872 03:47:58.494809 PCI: 00:02.0 [8086/0000] bus ops
873 03:47:58.498193 PCI: 00:02.0 [8086/9b41] enabled
874 03:47:58.501241 PCI: 00:04.0 [8086/1903] disabled
875 03:47:58.504529 PCI: 00:08.0 [8086/1911] enabled
876 03:47:58.507925 PCI: 00:12.0 [8086/02f9] enabled
877 03:47:58.511555 PCI: 00:14.0 [8086/0000] bus ops
878 03:47:58.514983 PCI: 00:14.0 [8086/02ed] enabled
879 03:47:58.518021 PCI: 00:14.2 [8086/02ef] enabled
880 03:47:58.521313 PCI: 00:14.3 [8086/02f0] enabled
881 03:47:58.524696 PCI: 00:15.0 [8086/0000] bus ops
882 03:47:58.528205 PCI: 00:15.0 [8086/02e8] enabled
883 03:47:58.531490 PCI: 00:15.1 [8086/0000] bus ops
884 03:47:58.534700 PCI: 00:15.1 [8086/02e9] enabled
885 03:47:58.537992 PCI: 00:16.0 [8086/0000] ops
886 03:47:58.541326 PCI: 00:16.0 [8086/02e0] enabled
887 03:47:58.544446 PCI: 00:17.0 [8086/0000] ops
888 03:47:58.548016 PCI: 00:17.0 [8086/02d3] enabled
889 03:47:58.551637 PCI: 00:19.0 [8086/0000] bus ops
890 03:47:58.554859 PCI: 00:19.0 [8086/02c5] enabled
891 03:47:58.557804 PCI: 00:1d.0 [8086/0000] bus ops
892 03:47:58.561243 PCI: 00:1d.0 [8086/02b0] enabled
893 03:47:58.567770 PCI: Static device PCI: 00:1d.5 not found, disabling it.
894 03:47:58.567865 PCI: 00:1e.0 [8086/0000] ops
895 03:47:58.571477 PCI: 00:1e.0 [8086/02a8] enabled
896 03:47:58.574534 PCI: 00:1e.2 [8086/0000] bus ops
897 03:47:58.577683 PCI: 00:1e.2 [8086/02aa] enabled
898 03:47:58.580813 PCI: 00:1e.3 [8086/0000] bus ops
899 03:47:58.584483 PCI: 00:1e.3 [8086/02ab] enabled
900 03:47:58.587567 PCI: 00:1f.0 [8086/0000] bus ops
901 03:47:58.591445 PCI: 00:1f.0 [8086/0284] enabled
902 03:47:58.598016 PCI: Static device PCI: 00:1f.1 not found, disabling it.
903 03:47:58.604257 PCI: Static device PCI: 00:1f.2 not found, disabling it.
904 03:47:58.607993 PCI: 00:1f.3 [8086/0000] bus ops
905 03:47:58.611187 PCI: 00:1f.3 [8086/02c8] enabled
906 03:47:58.614075 PCI: 00:1f.4 [8086/0000] bus ops
907 03:47:58.617566 PCI: 00:1f.4 [8086/02a3] enabled
908 03:47:58.620668 PCI: 00:1f.5 [8086/0000] bus ops
909 03:47:58.624267 PCI: 00:1f.5 [8086/02a4] enabled
910 03:47:58.627586 PCI: Leftover static devices:
911 03:47:58.627702 PCI: 00:05.0
912 03:47:58.630620 PCI: 00:12.5
913 03:47:58.630713 PCI: 00:12.6
914 03:47:58.630787 PCI: 00:14.1
915 03:47:58.634042 PCI: 00:14.5
916 03:47:58.634162 PCI: 00:15.2
917 03:47:58.637320 PCI: 00:15.3
918 03:47:58.637414 PCI: 00:16.1
919 03:47:58.637488 PCI: 00:16.2
920 03:47:58.640741 PCI: 00:16.3
921 03:47:58.640833 PCI: 00:16.4
922 03:47:58.643942 PCI: 00:16.5
923 03:47:58.644037 PCI: 00:19.1
924 03:47:58.644111 PCI: 00:19.2
925 03:47:58.647381 PCI: 00:1a.0
926 03:47:58.647473 PCI: 00:1c.0
927 03:47:58.650675 PCI: 00:1c.1
928 03:47:58.650775 PCI: 00:1c.2
929 03:47:58.654102 PCI: 00:1c.3
930 03:47:58.654194 PCI: 00:1c.4
931 03:47:58.654266 PCI: 00:1c.5
932 03:47:58.657054 PCI: 00:1c.6
933 03:47:58.657178 PCI: 00:1c.7
934 03:47:58.660391 PCI: 00:1d.1
935 03:47:58.660483 PCI: 00:1d.2
936 03:47:58.660554 PCI: 00:1d.3
937 03:47:58.663965 PCI: 00:1d.4
938 03:47:58.664057 PCI: 00:1d.5
939 03:47:58.667298 PCI: 00:1e.1
940 03:47:58.667397 PCI: 00:1f.1
941 03:47:58.667471 PCI: 00:1f.2
942 03:47:58.670938 PCI: 00:1f.6
943 03:47:58.674312 PCI: Check your devicetree.cb.
944 03:47:58.677606 PCI: 00:02.0 scanning...
945 03:47:58.680494 scan_generic_bus for PCI: 00:02.0
946 03:47:58.683608 scan_generic_bus for PCI: 00:02.0 done
947 03:47:58.690524 scan_bus: scanning of bus PCI: 00:02.0 took 10195 usecs
948 03:47:58.690617 PCI: 00:14.0 scanning...
949 03:47:58.694058 scan_static_bus for PCI: 00:14.0
950 03:47:58.697107 USB0 port 0 enabled
951 03:47:58.700264 USB0 port 0 scanning...
952 03:47:58.704209 scan_static_bus for USB0 port 0
953 03:47:58.704315 USB2 port 0 enabled
954 03:47:58.707115 USB2 port 1 enabled
955 03:47:58.710200 USB2 port 2 disabled
956 03:47:58.710334 USB2 port 3 disabled
957 03:47:58.713750 USB2 port 5 disabled
958 03:47:58.716886 USB2 port 6 enabled
959 03:47:58.716981 USB2 port 9 enabled
960 03:47:58.720401 USB3 port 0 enabled
961 03:47:58.720494 USB3 port 1 enabled
962 03:47:58.723904 USB3 port 2 enabled
963 03:47:58.727080 USB3 port 3 enabled
964 03:47:58.727172 USB3 port 4 disabled
965 03:47:58.730121 USB2 port 0 scanning...
966 03:47:58.733925 scan_static_bus for USB2 port 0
967 03:47:58.737070 scan_static_bus for USB2 port 0 done
968 03:47:58.743275 scan_bus: scanning of bus USB2 port 0 took 9709 usecs
969 03:47:58.746589 USB2 port 1 scanning...
970 03:47:58.750666 scan_static_bus for USB2 port 1
971 03:47:58.753328 scan_static_bus for USB2 port 1 done
972 03:47:58.756611 scan_bus: scanning of bus USB2 port 1 took 9701 usecs
973 03:47:58.760198 USB2 port 6 scanning...
974 03:47:58.763414 scan_static_bus for USB2 port 6
975 03:47:58.767077 scan_static_bus for USB2 port 6 done
976 03:47:58.773359 scan_bus: scanning of bus USB2 port 6 took 9708 usecs
977 03:47:58.777457 USB2 port 9 scanning...
978 03:47:58.780172 scan_static_bus for USB2 port 9
979 03:47:58.783279 scan_static_bus for USB2 port 9 done
980 03:47:58.786613 scan_bus: scanning of bus USB2 port 9 took 9702 usecs
981 03:47:58.790373 USB3 port 0 scanning...
982 03:47:58.793646 scan_static_bus for USB3 port 0
983 03:47:58.797203 scan_static_bus for USB3 port 0 done
984 03:47:58.803482 scan_bus: scanning of bus USB3 port 0 took 9717 usecs
985 03:47:58.806532 USB3 port 1 scanning...
986 03:47:58.810390 scan_static_bus for USB3 port 1
987 03:47:58.813452 scan_static_bus for USB3 port 1 done
988 03:47:58.816389 scan_bus: scanning of bus USB3 port 1 took 9700 usecs
989 03:47:58.819959 USB3 port 2 scanning...
990 03:47:58.823038 scan_static_bus for USB3 port 2
991 03:47:58.826648 scan_static_bus for USB3 port 2 done
992 03:47:58.833455 scan_bus: scanning of bus USB3 port 2 took 9698 usecs
993 03:47:58.836266 USB3 port 3 scanning...
994 03:47:58.840231 scan_static_bus for USB3 port 3
995 03:47:58.843332 scan_static_bus for USB3 port 3 done
996 03:47:58.846562 scan_bus: scanning of bus USB3 port 3 took 9692 usecs
997 03:47:58.853182 scan_static_bus for USB0 port 0 done
998 03:47:58.856450 scan_bus: scanning of bus USB0 port 0 took 155397 usecs
999 03:47:58.859958 scan_static_bus for PCI: 00:14.0 done
1000 03:47:58.866623 scan_bus: scanning of bus PCI: 00:14.0 took 173026 usecs
1001 03:47:58.869968 PCI: 00:15.0 scanning...
1002 03:47:58.872945 scan_generic_bus for PCI: 00:15.0
1003 03:47:58.876265 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1004 03:47:58.879569 scan_generic_bus for PCI: 00:15.0 done
1005 03:47:58.886411 scan_bus: scanning of bus PCI: 00:15.0 took 14283 usecs
1006 03:47:58.889423 PCI: 00:15.1 scanning...
1007 03:47:58.893347 scan_generic_bus for PCI: 00:15.1
1008 03:47:58.895995 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1009 03:47:58.899463 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1010 03:47:58.906330 scan_generic_bus for PCI: 00:15.1 done
1011 03:47:58.909382 scan_bus: scanning of bus PCI: 00:15.1 took 18591 usecs
1012 03:47:58.912634 PCI: 00:19.0 scanning...
1013 03:47:58.916405 scan_generic_bus for PCI: 00:19.0
1014 03:47:58.919467 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1015 03:47:58.926293 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1016 03:47:58.929689 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1017 03:47:58.932709 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1018 03:47:58.936241 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1019 03:47:58.942454 scan_generic_bus for PCI: 00:19.0 done
1020 03:47:58.946010 scan_bus: scanning of bus PCI: 00:19.0 took 30738 usecs
1021 03:47:58.949187 PCI: 00:1d.0 scanning...
1022 03:47:58.952677 do_pci_scan_bridge for PCI: 00:1d.0
1023 03:47:58.955725 PCI: pci_scan_bus for bus 01
1024 03:47:58.959382 PCI: 01:00.0 [1c5c/1327] enabled
1025 03:47:58.962306 Enabling Common Clock Configuration
1026 03:47:58.965584 L1 Sub-State supported from root port 29
1027 03:47:58.969405 L1 Sub-State Support = 0xf
1028 03:47:58.972349 CommonModeRestoreTime = 0x28
1029 03:47:58.976145 Power On Value = 0x16, Power On Scale = 0x0
1030 03:47:58.978921 ASPM: Enabled L1
1031 03:47:58.986091 scan_bus: scanning of bus PCI: 00:1d.0 took 32779 usecs
1032 03:47:58.986187 PCI: 00:1e.2 scanning...
1033 03:47:58.992471 scan_generic_bus for PCI: 00:1e.2
1034 03:47:58.995679 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1035 03:47:58.999026 scan_generic_bus for PCI: 00:1e.2 done
1036 03:47:59.005958 scan_bus: scanning of bus PCI: 00:1e.2 took 13999 usecs
1037 03:47:59.006051 PCI: 00:1e.3 scanning...
1038 03:47:59.009032 scan_generic_bus for PCI: 00:1e.3
1039 03:47:59.015566 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1040 03:47:59.019268 scan_generic_bus for PCI: 00:1e.3 done
1041 03:47:59.022506 scan_bus: scanning of bus PCI: 00:1e.3 took 14001 usecs
1042 03:47:59.025534 PCI: 00:1f.0 scanning...
1043 03:47:59.029263 scan_static_bus for PCI: 00:1f.0
1044 03:47:59.032323 PNP: 0c09.0 enabled
1045 03:47:59.035821 scan_static_bus for PCI: 00:1f.0 done
1046 03:47:59.042251 scan_bus: scanning of bus PCI: 00:1f.0 took 12036 usecs
1047 03:47:59.042336 PCI: 00:1f.3 scanning...
1048 03:47:59.049035 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1049 03:47:59.052143 PCI: 00:1f.4 scanning...
1050 03:47:59.055805 scan_generic_bus for PCI: 00:1f.4
1051 03:47:59.058911 scan_generic_bus for PCI: 00:1f.4 done
1052 03:47:59.065447 scan_bus: scanning of bus PCI: 00:1f.4 took 10174 usecs
1053 03:47:59.068629 PCI: 00:1f.5 scanning...
1054 03:47:59.072164 scan_generic_bus for PCI: 00:1f.5
1055 03:47:59.075554 scan_generic_bus for PCI: 00:1f.5 done
1056 03:47:59.082413 scan_bus: scanning of bus PCI: 00:1f.5 took 10185 usecs
1057 03:47:59.085414 scan_bus: scanning of bus DOMAIN: 0000 took 604969 usecs
1058 03:47:59.088946 scan_static_bus for Root Device done
1059 03:47:59.095324 scan_bus: scanning of bus Root Device took 624845 usecs
1060 03:47:59.095444 done
1061 03:47:59.098360 Chrome EC: UHEPI supported
1062 03:47:59.105524 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1063 03:47:59.111957 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1064 03:47:59.118455 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1065 03:47:59.125408 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1066 03:47:59.128451 SPI flash protection: WPSW=0 SRP0=0
1067 03:47:59.131792 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1068 03:47:59.138395 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1069 03:47:59.141491 found VGA at PCI: 00:02.0
1070 03:47:59.145031 Setting up VGA for PCI: 00:02.0
1071 03:47:59.148042 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1072 03:47:59.154875 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1073 03:47:59.158263 Allocating resources...
1074 03:47:59.158380 Reading resources...
1075 03:47:59.164813 Root Device read_resources bus 0 link: 0
1076 03:47:59.167907 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1077 03:47:59.174916 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1078 03:47:59.177916 DOMAIN: 0000 read_resources bus 0 link: 0
1079 03:47:59.184469 PCI: 00:14.0 read_resources bus 0 link: 0
1080 03:47:59.187885 USB0 port 0 read_resources bus 0 link: 0
1081 03:47:59.195981 USB0 port 0 read_resources bus 0 link: 0 done
1082 03:47:59.199079 PCI: 00:14.0 read_resources bus 0 link: 0 done
1083 03:47:59.206211 PCI: 00:15.0 read_resources bus 1 link: 0
1084 03:47:59.210017 PCI: 00:15.0 read_resources bus 1 link: 0 done
1085 03:47:59.216206 PCI: 00:15.1 read_resources bus 2 link: 0
1086 03:47:59.219745 PCI: 00:15.1 read_resources bus 2 link: 0 done
1087 03:47:59.227031 PCI: 00:19.0 read_resources bus 3 link: 0
1088 03:47:59.233728 PCI: 00:19.0 read_resources bus 3 link: 0 done
1089 03:47:59.236952 PCI: 00:1d.0 read_resources bus 1 link: 0
1090 03:47:59.243860 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1091 03:47:59.247068 PCI: 00:1e.2 read_resources bus 4 link: 0
1092 03:47:59.253388 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1093 03:47:59.256947 PCI: 00:1e.3 read_resources bus 5 link: 0
1094 03:47:59.263824 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1095 03:47:59.266783 PCI: 00:1f.0 read_resources bus 0 link: 0
1096 03:47:59.273513 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1097 03:47:59.280414 DOMAIN: 0000 read_resources bus 0 link: 0 done
1098 03:47:59.283685 Root Device read_resources bus 0 link: 0 done
1099 03:47:59.286629 Done reading resources.
1100 03:47:59.290122 Show resources in subtree (Root Device)...After reading.
1101 03:47:59.296778 Root Device child on link 0 CPU_CLUSTER: 0
1102 03:47:59.299981 CPU_CLUSTER: 0 child on link 0 APIC: 00
1103 03:47:59.300105 APIC: 00
1104 03:47:59.303700 APIC: 01
1105 03:47:59.303789 APIC: 04
1106 03:47:59.306851 APIC: 05
1107 03:47:59.306940 APIC: 06
1108 03:47:59.307012 APIC: 07
1109 03:47:59.310223 APIC: 02
1110 03:47:59.310313 APIC: 03
1111 03:47:59.313630 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1112 03:47:59.323260 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1113 03:47:59.365469 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1114 03:47:59.365625 PCI: 00:00.0
1115 03:47:59.365895 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1116 03:47:59.365981 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1117 03:47:59.369535 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1118 03:47:59.372450 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1119 03:47:59.382560 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1120 03:47:59.392644 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1121 03:47:59.402582 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1122 03:47:59.409375 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1123 03:47:59.418726 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1124 03:47:59.428756 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1125 03:47:59.438566 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1126 03:47:59.448647 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1127 03:47:59.458827 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1128 03:47:59.468671 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1129 03:47:59.474957 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1130 03:47:59.485221 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1131 03:47:59.488316 PCI: 00:02.0
1132 03:47:59.498253 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1133 03:47:59.508408 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1134 03:47:59.515137 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1135 03:47:59.518168 PCI: 00:04.0
1136 03:47:59.518264 PCI: 00:08.0
1137 03:47:59.528414 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1138 03:47:59.531806 PCI: 00:12.0
1139 03:47:59.541303 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1140 03:47:59.544456 PCI: 00:14.0 child on link 0 USB0 port 0
1141 03:47:59.554916 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1142 03:47:59.557788 USB0 port 0 child on link 0 USB2 port 0
1143 03:47:59.561260 USB2 port 0
1144 03:47:59.564450 USB2 port 1
1145 03:47:59.564541 USB2 port 2
1146 03:47:59.567866 USB2 port 3
1147 03:47:59.567956 USB2 port 5
1148 03:47:59.571102 USB2 port 6
1149 03:47:59.571193 USB2 port 9
1150 03:47:59.574833 USB3 port 0
1151 03:47:59.574924 USB3 port 1
1152 03:47:59.577940 USB3 port 2
1153 03:47:59.578030 USB3 port 3
1154 03:47:59.581261 USB3 port 4
1155 03:47:59.581351 PCI: 00:14.2
1156 03:47:59.591223 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1157 03:47:59.601053 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1158 03:47:59.604146 PCI: 00:14.3
1159 03:47:59.614220 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1160 03:47:59.617798 PCI: 00:15.0 child on link 0 I2C: 01:15
1161 03:47:59.627516 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1162 03:47:59.630630 I2C: 01:15
1163 03:47:59.634338 PCI: 00:15.1 child on link 0 I2C: 02:5d
1164 03:47:59.644019 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 03:47:59.644125 I2C: 02:5d
1166 03:47:59.647032 GENERIC: 0.0
1167 03:47:59.647124 PCI: 00:16.0
1168 03:47:59.657399 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 03:47:59.660299 PCI: 00:17.0
1170 03:47:59.670584 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1171 03:47:59.677332 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1172 03:47:59.687013 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1173 03:47:59.693823 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1174 03:47:59.703709 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1175 03:47:59.713315 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1176 03:47:59.716997 PCI: 00:19.0 child on link 0 I2C: 03:1a
1177 03:47:59.727103 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1178 03:47:59.727200 I2C: 03:1a
1179 03:47:59.730259 I2C: 03:38
1180 03:47:59.730406 I2C: 03:39
1181 03:47:59.733811 I2C: 03:3a
1182 03:47:59.733901 I2C: 03:3b
1183 03:47:59.740024 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1184 03:47:59.746579 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1185 03:47:59.756882 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1186 03:47:59.766612 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1187 03:47:59.766724 PCI: 01:00.0
1188 03:47:59.777178 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1189 03:47:59.779844 PCI: 00:1e.0
1190 03:47:59.789847 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1191 03:47:59.800061 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1192 03:47:59.803014 PCI: 00:1e.2 child on link 0 SPI: 00
1193 03:47:59.813215 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 03:47:59.816234 SPI: 00
1195 03:47:59.820005 PCI: 00:1e.3 child on link 0 SPI: 01
1196 03:47:59.829506 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 03:47:59.829604 SPI: 01
1198 03:47:59.836063 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1199 03:47:59.842951 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1200 03:47:59.852787 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1201 03:47:59.855749 PNP: 0c09.0
1202 03:47:59.862320 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1203 03:47:59.866067 PCI: 00:1f.3
1204 03:47:59.875765 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1205 03:47:59.885703 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1206 03:47:59.885808 PCI: 00:1f.4
1207 03:47:59.895528 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1208 03:47:59.905436 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1209 03:47:59.905584 PCI: 00:1f.5
1210 03:47:59.915546 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1211 03:47:59.922272 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1212 03:47:59.928138 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1213 03:47:59.934849 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1214 03:47:59.938527 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1215 03:47:59.941578 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1216 03:47:59.945185 PCI: 00:17.0 18 * [0x60 - 0x67] io
1217 03:47:59.951478 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1218 03:47:59.958238 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1219 03:47:59.964679 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1220 03:47:59.971279 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1221 03:47:59.981110 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1222 03:47:59.987555 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1223 03:47:59.991439 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1224 03:47:59.997483 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1225 03:48:00.004870 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1226 03:48:00.007765 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1227 03:48:00.014217 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1228 03:48:00.017548 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1229 03:48:00.020984 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1230 03:48:00.027642 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1231 03:48:00.031174 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1232 03:48:00.037430 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1233 03:48:00.040993 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1234 03:48:00.047741 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1235 03:48:00.050789 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1236 03:48:00.057389 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1237 03:48:00.060848 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1238 03:48:00.067484 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1239 03:48:00.070468 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1240 03:48:00.077237 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1241 03:48:00.080709 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1242 03:48:00.087479 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1243 03:48:00.090547 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1244 03:48:00.097154 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1245 03:48:00.100725 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1246 03:48:00.104040 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1247 03:48:00.110210 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1248 03:48:00.117095 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1249 03:48:00.123867 avoid_fixed_resources: DOMAIN: 0000
1250 03:48:00.127285 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1251 03:48:00.133411 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1252 03:48:00.139973 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1253 03:48:00.150308 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1254 03:48:00.156914 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1255 03:48:00.163807 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1256 03:48:00.173551 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1257 03:48:00.179920 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1258 03:48:00.186541 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1259 03:48:00.196842 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1260 03:48:00.203655 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1261 03:48:00.209802 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1262 03:48:00.213435 Setting resources...
1263 03:48:00.216833 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1264 03:48:00.223432 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1265 03:48:00.226814 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1266 03:48:00.229920 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1267 03:48:00.233535 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1268 03:48:00.239835 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1269 03:48:00.246767 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1270 03:48:00.253633 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1271 03:48:00.259863 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1272 03:48:00.266311 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1273 03:48:00.270126 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1274 03:48:00.276199 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1275 03:48:00.279830 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1276 03:48:00.286762 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1277 03:48:00.289486 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1278 03:48:00.296233 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1279 03:48:00.299721 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1280 03:48:00.306634 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1281 03:48:00.309672 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1282 03:48:00.312930 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1283 03:48:00.319608 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1284 03:48:00.322698 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1285 03:48:00.329551 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1286 03:48:00.332821 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1287 03:48:00.339354 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1288 03:48:00.342906 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1289 03:48:00.349149 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1290 03:48:00.352604 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1291 03:48:00.358874 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1292 03:48:00.362337 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1293 03:48:00.369047 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1294 03:48:00.372286 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1295 03:48:00.379069 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1296 03:48:00.388879 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1297 03:48:00.395337 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1298 03:48:00.402286 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1299 03:48:00.409119 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1300 03:48:00.415166 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1301 03:48:00.418980 Root Device assign_resources, bus 0 link: 0
1302 03:48:00.425143 DOMAIN: 0000 assign_resources, bus 0 link: 0
1303 03:48:00.432017 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1304 03:48:00.441864 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1305 03:48:00.448787 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1306 03:48:00.458639 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1307 03:48:00.464882 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1308 03:48:00.474863 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1309 03:48:00.478562 PCI: 00:14.0 assign_resources, bus 0 link: 0
1310 03:48:00.481873 PCI: 00:14.0 assign_resources, bus 0 link: 0
1311 03:48:00.491734 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1312 03:48:00.498422 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1313 03:48:00.508060 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1314 03:48:00.514909 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1315 03:48:00.521546 PCI: 00:15.0 assign_resources, bus 1 link: 0
1316 03:48:00.524658 PCI: 00:15.0 assign_resources, bus 1 link: 0
1317 03:48:00.531429 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1318 03:48:00.538244 PCI: 00:15.1 assign_resources, bus 2 link: 0
1319 03:48:00.541255 PCI: 00:15.1 assign_resources, bus 2 link: 0
1320 03:48:00.551161 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1321 03:48:00.557860 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1322 03:48:00.568074 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1323 03:48:00.574668 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1324 03:48:00.581332 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1325 03:48:00.588093 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1326 03:48:00.598093 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1327 03:48:00.604876 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1328 03:48:00.611005 PCI: 00:19.0 assign_resources, bus 3 link: 0
1329 03:48:00.614341 PCI: 00:19.0 assign_resources, bus 3 link: 0
1330 03:48:00.624551 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1331 03:48:00.630716 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1332 03:48:00.640549 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1333 03:48:00.644435 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1334 03:48:00.653824 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1335 03:48:00.657273 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1336 03:48:00.667171 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1337 03:48:00.673873 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1338 03:48:00.680350 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1339 03:48:00.683940 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1340 03:48:00.693782 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1341 03:48:00.697333 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1342 03:48:00.700489 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1343 03:48:00.707350 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1344 03:48:00.710446 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1345 03:48:00.717319 LPC: Trying to open IO window from 800 size 1ff
1346 03:48:00.723772 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1347 03:48:00.733721 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1348 03:48:00.740227 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1349 03:48:00.750177 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1350 03:48:00.753782 DOMAIN: 0000 assign_resources, bus 0 link: 0
1351 03:48:00.760461 Root Device assign_resources, bus 0 link: 0
1352 03:48:00.760554 Done setting resources.
1353 03:48:00.766647 Show resources in subtree (Root Device)...After assigning values.
1354 03:48:00.773358 Root Device child on link 0 CPU_CLUSTER: 0
1355 03:48:00.777098 CPU_CLUSTER: 0 child on link 0 APIC: 00
1356 03:48:00.777190 APIC: 00
1357 03:48:00.780109 APIC: 01
1358 03:48:00.780235 APIC: 04
1359 03:48:00.780321 APIC: 05
1360 03:48:00.783208 APIC: 06
1361 03:48:00.783327 APIC: 07
1362 03:48:00.786306 APIC: 02
1363 03:48:00.786418 APIC: 03
1364 03:48:00.789904 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1365 03:48:00.799908 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1366 03:48:00.812718 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1367 03:48:00.812852 PCI: 00:00.0
1368 03:48:00.822475 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1369 03:48:00.832421 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1370 03:48:00.843095 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1371 03:48:00.849412 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1372 03:48:00.859154 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1373 03:48:00.868949 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1374 03:48:00.878739 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1375 03:48:00.888579 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1376 03:48:00.898663 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1377 03:48:00.905682 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1378 03:48:00.914978 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1379 03:48:00.925038 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1380 03:48:00.934709 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1381 03:48:00.944545 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1382 03:48:00.954727 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1383 03:48:00.961248 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1384 03:48:00.964459 PCI: 00:02.0
1385 03:48:00.974256 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1386 03:48:00.984166 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1387 03:48:00.994201 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1388 03:48:00.997995 PCI: 00:04.0
1389 03:48:00.998120 PCI: 00:08.0
1390 03:48:01.007943 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1391 03:48:01.010954 PCI: 00:12.0
1392 03:48:01.020673 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1393 03:48:01.023840 PCI: 00:14.0 child on link 0 USB0 port 0
1394 03:48:01.034055 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1395 03:48:01.040992 USB0 port 0 child on link 0 USB2 port 0
1396 03:48:01.041087 USB2 port 0
1397 03:48:01.044155 USB2 port 1
1398 03:48:01.044278 USB2 port 2
1399 03:48:01.047450 USB2 port 3
1400 03:48:01.047537 USB2 port 5
1401 03:48:01.050444 USB2 port 6
1402 03:48:01.050559 USB2 port 9
1403 03:48:01.054160 USB3 port 0
1404 03:48:01.054271 USB3 port 1
1405 03:48:01.057272 USB3 port 2
1406 03:48:01.060401 USB3 port 3
1407 03:48:01.060485 USB3 port 4
1408 03:48:01.064187 PCI: 00:14.2
1409 03:48:01.073894 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1410 03:48:01.083626 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1411 03:48:01.083749 PCI: 00:14.3
1412 03:48:01.093431 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1413 03:48:01.100236 PCI: 00:15.0 child on link 0 I2C: 01:15
1414 03:48:01.110536 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1415 03:48:01.110629 I2C: 01:15
1416 03:48:01.116730 PCI: 00:15.1 child on link 0 I2C: 02:5d
1417 03:48:01.126760 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1418 03:48:01.126879 I2C: 02:5d
1419 03:48:01.130536 GENERIC: 0.0
1420 03:48:01.130644 PCI: 00:16.0
1421 03:48:01.139819 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1422 03:48:01.143382 PCI: 00:17.0
1423 03:48:01.153260 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1424 03:48:01.163022 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1425 03:48:01.173120 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1426 03:48:01.179759 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1427 03:48:01.189453 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1428 03:48:01.199824 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1429 03:48:01.206111 PCI: 00:19.0 child on link 0 I2C: 03:1a
1430 03:48:01.216060 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1431 03:48:01.216157 I2C: 03:1a
1432 03:48:01.219539 I2C: 03:38
1433 03:48:01.219630 I2C: 03:39
1434 03:48:01.222803 I2C: 03:3a
1435 03:48:01.222928 I2C: 03:3b
1436 03:48:01.225960 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1437 03:48:01.236058 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1438 03:48:01.245833 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1439 03:48:01.255642 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1440 03:48:01.259394 PCI: 01:00.0
1441 03:48:01.268877 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1442 03:48:01.272232 PCI: 00:1e.0
1443 03:48:01.282348 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1444 03:48:01.292396 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1445 03:48:01.295471 PCI: 00:1e.2 child on link 0 SPI: 00
1446 03:48:01.305366 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1447 03:48:01.309096 SPI: 00
1448 03:48:01.312229 PCI: 00:1e.3 child on link 0 SPI: 01
1449 03:48:01.322143 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1450 03:48:01.322237 SPI: 01
1451 03:48:01.328746 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1452 03:48:01.335128 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1453 03:48:01.345401 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1454 03:48:01.348193 PNP: 0c09.0
1455 03:48:01.354905 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1456 03:48:01.358626 PCI: 00:1f.3
1457 03:48:01.367981 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1458 03:48:01.378199 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1459 03:48:01.381767 PCI: 00:1f.4
1460 03:48:01.388091 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1461 03:48:01.398326 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1462 03:48:01.401175 PCI: 00:1f.5
1463 03:48:01.411660 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1464 03:48:01.414647 Done allocating resources.
1465 03:48:01.417744 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1466 03:48:01.421618 Enabling resources...
1467 03:48:01.427981 PCI: 00:00.0 subsystem <- 8086/9b61
1468 03:48:01.428102 PCI: 00:00.0 cmd <- 06
1469 03:48:01.431613 PCI: 00:02.0 subsystem <- 8086/9b41
1470 03:48:01.434645 PCI: 00:02.0 cmd <- 03
1471 03:48:01.438210 PCI: 00:08.0 cmd <- 06
1472 03:48:01.441269 PCI: 00:12.0 subsystem <- 8086/02f9
1473 03:48:01.444760 PCI: 00:12.0 cmd <- 02
1474 03:48:01.447933 PCI: 00:14.0 subsystem <- 8086/02ed
1475 03:48:01.451696 PCI: 00:14.0 cmd <- 02
1476 03:48:01.451792 PCI: 00:14.2 cmd <- 02
1477 03:48:01.458107 PCI: 00:14.3 subsystem <- 8086/02f0
1478 03:48:01.458202 PCI: 00:14.3 cmd <- 02
1479 03:48:01.461466 PCI: 00:15.0 subsystem <- 8086/02e8
1480 03:48:01.465241 PCI: 00:15.0 cmd <- 02
1481 03:48:01.468121 PCI: 00:15.1 subsystem <- 8086/02e9
1482 03:48:01.471747 PCI: 00:15.1 cmd <- 02
1483 03:48:01.474850 PCI: 00:16.0 subsystem <- 8086/02e0
1484 03:48:01.478416 PCI: 00:16.0 cmd <- 02
1485 03:48:01.481467 PCI: 00:17.0 subsystem <- 8086/02d3
1486 03:48:01.484990 PCI: 00:17.0 cmd <- 03
1487 03:48:01.488119 PCI: 00:19.0 subsystem <- 8086/02c5
1488 03:48:01.491678 PCI: 00:19.0 cmd <- 02
1489 03:48:01.494764 PCI: 00:1d.0 bridge ctrl <- 0013
1490 03:48:01.497929 PCI: 00:1d.0 subsystem <- 8086/02b0
1491 03:48:01.501527 PCI: 00:1d.0 cmd <- 06
1492 03:48:01.504581 PCI: 00:1e.0 subsystem <- 8086/02a8
1493 03:48:01.504717 PCI: 00:1e.0 cmd <- 06
1494 03:48:01.512316 PCI: 00:1e.2 subsystem <- 8086/02aa
1495 03:48:01.512434 PCI: 00:1e.2 cmd <- 06
1496 03:48:01.515300 PCI: 00:1e.3 subsystem <- 8086/02ab
1497 03:48:01.518535 PCI: 00:1e.3 cmd <- 02
1498 03:48:01.521606 PCI: 00:1f.0 subsystem <- 8086/0284
1499 03:48:01.525241 PCI: 00:1f.0 cmd <- 407
1500 03:48:01.528258 PCI: 00:1f.3 subsystem <- 8086/02c8
1501 03:48:01.531494 PCI: 00:1f.3 cmd <- 02
1502 03:48:01.535099 PCI: 00:1f.4 subsystem <- 8086/02a3
1503 03:48:01.538243 PCI: 00:1f.4 cmd <- 03
1504 03:48:01.541342 PCI: 00:1f.5 subsystem <- 8086/02a4
1505 03:48:01.545133 PCI: 00:1f.5 cmd <- 406
1506 03:48:01.553188 PCI: 01:00.0 cmd <- 02
1507 03:48:01.558257 done.
1508 03:48:01.570142 ME: Version: 14.0.39.1367
1509 03:48:01.576891 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1510 03:48:01.580181 Initializing devices...
1511 03:48:01.580306 Root Device init ...
1512 03:48:01.587040 Chrome EC: Set SMI mask to 0x0000000000000000
1513 03:48:01.590090 Chrome EC: clear events_b mask to 0x0000000000000000
1514 03:48:01.596780 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1515 03:48:01.603460 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1516 03:48:01.610113 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1517 03:48:01.613128 Chrome EC: Set WAKE mask to 0x0000000000000000
1518 03:48:01.616914 Root Device init finished in 35168 usecs
1519 03:48:01.620063 CPU_CLUSTER: 0 init ...
1520 03:48:01.627198 CPU_CLUSTER: 0 init finished in 2447 usecs
1521 03:48:01.631968 PCI: 00:00.0 init ...
1522 03:48:01.634310 CPU TDP: 15 Watts
1523 03:48:01.637871 CPU PL2 = 64 Watts
1524 03:48:01.641342 PCI: 00:00.0 init finished in 7079 usecs
1525 03:48:01.644455 PCI: 00:02.0 init ...
1526 03:48:01.647820 PCI: 00:02.0 init finished in 2262 usecs
1527 03:48:01.650754 PCI: 00:08.0 init ...
1528 03:48:01.654407 PCI: 00:08.0 init finished in 2251 usecs
1529 03:48:01.657449 PCI: 00:12.0 init ...
1530 03:48:01.661190 PCI: 00:12.0 init finished in 2251 usecs
1531 03:48:01.664322 PCI: 00:14.0 init ...
1532 03:48:01.667696 PCI: 00:14.0 init finished in 2252 usecs
1533 03:48:01.670792 PCI: 00:14.2 init ...
1534 03:48:01.673923 PCI: 00:14.2 init finished in 2252 usecs
1535 03:48:01.677326 PCI: 00:14.3 init ...
1536 03:48:01.681061 PCI: 00:14.3 init finished in 2270 usecs
1537 03:48:01.683865 PCI: 00:15.0 init ...
1538 03:48:01.687175 DW I2C bus 0 at 0xd121f000 (400 KHz)
1539 03:48:01.690867 PCI: 00:15.0 init finished in 5977 usecs
1540 03:48:01.694112 PCI: 00:15.1 init ...
1541 03:48:01.697348 DW I2C bus 1 at 0xd1220000 (400 KHz)
1542 03:48:01.703863 PCI: 00:15.1 init finished in 5974 usecs
1543 03:48:01.703956 PCI: 00:16.0 init ...
1544 03:48:01.710253 PCI: 00:16.0 init finished in 2253 usecs
1545 03:48:01.714044 PCI: 00:19.0 init ...
1546 03:48:01.716889 DW I2C bus 4 at 0xd1222000 (400 KHz)
1547 03:48:01.719976 PCI: 00:19.0 init finished in 5975 usecs
1548 03:48:01.723743 PCI: 00:1d.0 init ...
1549 03:48:01.726945 Initializing PCH PCIe bridge.
1550 03:48:01.730050 PCI: 00:1d.0 init finished in 5284 usecs
1551 03:48:01.733751 PCI: 00:1f.0 init ...
1552 03:48:01.736945 IOAPIC: Initializing IOAPIC at 0xfec00000
1553 03:48:01.743855 IOAPIC: Bootstrap Processor Local APIC = 0x00
1554 03:48:01.743950 IOAPIC: ID = 0x02
1555 03:48:01.747239 IOAPIC: Dumping registers
1556 03:48:01.750050 reg 0x0000: 0x02000000
1557 03:48:01.754040 reg 0x0001: 0x00770020
1558 03:48:01.754169 reg 0x0002: 0x00000000
1559 03:48:01.760073 PCI: 00:1f.0 init finished in 23525 usecs
1560 03:48:01.763314 PCI: 00:1f.4 init ...
1561 03:48:01.766966 PCI: 00:1f.4 init finished in 2261 usecs
1562 03:48:01.776972 PCI: 01:00.0 init ...
1563 03:48:01.780648 PCI: 01:00.0 init finished in 2253 usecs
1564 03:48:01.784595 PNP: 0c09.0 init ...
1565 03:48:01.788491 Google Chrome EC uptime: 11.054 seconds
1566 03:48:01.794503 Google Chrome AP resets since EC boot: 0
1567 03:48:01.798438 Google Chrome most recent AP reset causes:
1568 03:48:01.804478 Google Chrome EC reset flags at last EC boot: reset-pin
1569 03:48:01.808021 PNP: 0c09.0 init finished in 20559 usecs
1570 03:48:01.811243 Devices initialized
1571 03:48:01.811334 Show all devs... After init.
1572 03:48:01.814528 Root Device: enabled 1
1573 03:48:01.817756 CPU_CLUSTER: 0: enabled 1
1574 03:48:01.821392 DOMAIN: 0000: enabled 1
1575 03:48:01.821518 APIC: 00: enabled 1
1576 03:48:01.824534 PCI: 00:00.0: enabled 1
1577 03:48:01.827626 PCI: 00:02.0: enabled 1
1578 03:48:01.831422 PCI: 00:04.0: enabled 0
1579 03:48:01.831507 PCI: 00:05.0: enabled 0
1580 03:48:01.834481 PCI: 00:12.0: enabled 1
1581 03:48:01.837555 PCI: 00:12.5: enabled 0
1582 03:48:01.837670 PCI: 00:12.6: enabled 0
1583 03:48:01.841284 PCI: 00:14.0: enabled 1
1584 03:48:01.844318 PCI: 00:14.1: enabled 0
1585 03:48:01.847533 PCI: 00:14.3: enabled 1
1586 03:48:01.847618 PCI: 00:14.5: enabled 0
1587 03:48:01.851274 PCI: 00:15.0: enabled 1
1588 03:48:01.854393 PCI: 00:15.1: enabled 1
1589 03:48:01.857539 PCI: 00:15.2: enabled 0
1590 03:48:01.857645 PCI: 00:15.3: enabled 0
1591 03:48:01.861238 PCI: 00:16.0: enabled 1
1592 03:48:01.864514 PCI: 00:16.1: enabled 0
1593 03:48:01.868121 PCI: 00:16.2: enabled 0
1594 03:48:01.868211 PCI: 00:16.3: enabled 0
1595 03:48:01.870778 PCI: 00:16.4: enabled 0
1596 03:48:01.874217 PCI: 00:16.5: enabled 0
1597 03:48:01.877179 PCI: 00:17.0: enabled 1
1598 03:48:01.877269 PCI: 00:19.0: enabled 1
1599 03:48:01.880829 PCI: 00:19.1: enabled 0
1600 03:48:01.883658 PCI: 00:19.2: enabled 0
1601 03:48:01.883749 PCI: 00:1a.0: enabled 0
1602 03:48:01.887466 PCI: 00:1c.0: enabled 0
1603 03:48:01.890702 PCI: 00:1c.1: enabled 0
1604 03:48:01.893816 PCI: 00:1c.2: enabled 0
1605 03:48:01.893906 PCI: 00:1c.3: enabled 0
1606 03:48:01.897232 PCI: 00:1c.4: enabled 0
1607 03:48:01.900305 PCI: 00:1c.5: enabled 0
1608 03:48:01.903925 PCI: 00:1c.6: enabled 0
1609 03:48:01.904035 PCI: 00:1c.7: enabled 0
1610 03:48:01.907396 PCI: 00:1d.0: enabled 1
1611 03:48:01.910885 PCI: 00:1d.1: enabled 0
1612 03:48:01.913707 PCI: 00:1d.2: enabled 0
1613 03:48:01.913803 PCI: 00:1d.3: enabled 0
1614 03:48:01.917132 PCI: 00:1d.4: enabled 0
1615 03:48:01.920667 PCI: 00:1d.5: enabled 0
1616 03:48:01.920757 PCI: 00:1e.0: enabled 1
1617 03:48:01.923695 PCI: 00:1e.1: enabled 0
1618 03:48:01.927014 PCI: 00:1e.2: enabled 1
1619 03:48:01.930092 PCI: 00:1e.3: enabled 1
1620 03:48:01.930182 PCI: 00:1f.0: enabled 1
1621 03:48:01.933906 PCI: 00:1f.1: enabled 0
1622 03:48:01.936956 PCI: 00:1f.2: enabled 0
1623 03:48:01.940606 PCI: 00:1f.3: enabled 1
1624 03:48:01.940696 PCI: 00:1f.4: enabled 1
1625 03:48:01.943776 PCI: 00:1f.5: enabled 1
1626 03:48:01.946877 PCI: 00:1f.6: enabled 0
1627 03:48:01.949928 USB0 port 0: enabled 1
1628 03:48:01.950019 I2C: 01:15: enabled 1
1629 03:48:01.953771 I2C: 02:5d: enabled 1
1630 03:48:01.956986 GENERIC: 0.0: enabled 1
1631 03:48:01.957077 I2C: 03:1a: enabled 1
1632 03:48:01.960122 I2C: 03:38: enabled 1
1633 03:48:01.963573 I2C: 03:39: enabled 1
1634 03:48:01.963663 I2C: 03:3a: enabled 1
1635 03:48:01.966856 I2C: 03:3b: enabled 1
1636 03:48:01.969791 PCI: 00:00.0: enabled 1
1637 03:48:01.969881 SPI: 00: enabled 1
1638 03:48:01.973483 SPI: 01: enabled 1
1639 03:48:01.976480 PNP: 0c09.0: enabled 1
1640 03:48:01.976570 USB2 port 0: enabled 1
1641 03:48:01.980114 USB2 port 1: enabled 1
1642 03:48:01.983034 USB2 port 2: enabled 0
1643 03:48:01.983124 USB2 port 3: enabled 0
1644 03:48:01.986298 USB2 port 5: enabled 0
1645 03:48:01.989896 USB2 port 6: enabled 1
1646 03:48:01.993317 USB2 port 9: enabled 1
1647 03:48:01.993406 USB3 port 0: enabled 1
1648 03:48:01.996546 USB3 port 1: enabled 1
1649 03:48:01.999779 USB3 port 2: enabled 1
1650 03:48:01.999897 USB3 port 3: enabled 1
1651 03:48:02.002971 USB3 port 4: enabled 0
1652 03:48:02.006349 APIC: 01: enabled 1
1653 03:48:02.006465 APIC: 04: enabled 1
1654 03:48:02.009442 APIC: 05: enabled 1
1655 03:48:02.013018 APIC: 06: enabled 1
1656 03:48:02.013102 APIC: 07: enabled 1
1657 03:48:02.015980 APIC: 02: enabled 1
1658 03:48:02.016094 APIC: 03: enabled 1
1659 03:48:02.019304 PCI: 00:08.0: enabled 1
1660 03:48:02.023072 PCI: 00:14.2: enabled 1
1661 03:48:02.026429 PCI: 01:00.0: enabled 1
1662 03:48:02.029751 Disabling ACPI via APMC:
1663 03:48:02.029847 done.
1664 03:48:02.036462 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1665 03:48:02.039716 ELOG: NV offset 0xaf0000 size 0x4000
1666 03:48:02.046257 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1667 03:48:02.052546 ELOG: Event(17) added with size 13 at 2024-03-05 03:47:21 UTC
1668 03:48:02.059411 ELOG: Event(92) added with size 9 at 2024-03-05 03:47:21 UTC
1669 03:48:02.066306 ELOG: Event(93) added with size 9 at 2024-03-05 03:47:21 UTC
1670 03:48:02.072408 ELOG: Event(9A) added with size 9 at 2024-03-05 03:47:21 UTC
1671 03:48:02.079324 ELOG: Event(9E) added with size 10 at 2024-03-05 03:47:21 UTC
1672 03:48:02.086034 ELOG: Event(9F) added with size 14 at 2024-03-05 03:47:21 UTC
1673 03:48:02.088985 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1674 03:48:02.096738 ELOG: Event(A1) added with size 10 at 2024-03-05 03:47:21 UTC
1675 03:48:02.106461 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1676 03:48:02.113128 ELOG: Event(A0) added with size 9 at 2024-03-05 03:47:21 UTC
1677 03:48:02.116491 elog_add_boot_reason: Logged dev mode boot
1678 03:48:02.119859 Finalize devices...
1679 03:48:02.119950 PCI: 00:17.0 final
1680 03:48:02.122759 Devices finalized
1681 03:48:02.126223 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1682 03:48:02.132516 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1683 03:48:02.135892 ME: HFSTS1 : 0x90000245
1684 03:48:02.139253 ME: HFSTS2 : 0x3B850126
1685 03:48:02.146443 ME: HFSTS3 : 0x00000020
1686 03:48:02.149256 ME: HFSTS4 : 0x00004800
1687 03:48:02.152914 ME: HFSTS5 : 0x00000000
1688 03:48:02.155864 ME: HFSTS6 : 0x40400006
1689 03:48:02.159487 ME: Manufacturing Mode : NO
1690 03:48:02.162670 ME: FW Partition Table : OK
1691 03:48:02.165829 ME: Bringup Loader Failure : NO
1692 03:48:02.169470 ME: Firmware Init Complete : YES
1693 03:48:02.172525 ME: Boot Options Present : NO
1694 03:48:02.175644 ME: Update In Progress : NO
1695 03:48:02.179038 ME: D0i3 Support : YES
1696 03:48:02.182553 ME: Low Power State Enabled : NO
1697 03:48:02.185812 ME: CPU Replaced : NO
1698 03:48:02.188897 ME: CPU Replacement Valid : YES
1699 03:48:02.192932 ME: Current Working State : 5
1700 03:48:02.195727 ME: Current Operation State : 1
1701 03:48:02.198927 ME: Current Operation Mode : 0
1702 03:48:02.202393 ME: Error Code : 0
1703 03:48:02.205646 ME: CPU Debug Disabled : YES
1704 03:48:02.209310 ME: TXT Support : NO
1705 03:48:02.215604 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1706 03:48:02.222360 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1707 03:48:02.222450 CBFS @ c08000 size 3f8000
1708 03:48:02.228507 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1709 03:48:02.232119 CBFS: Locating 'fallback/dsdt.aml'
1710 03:48:02.235172 CBFS: Found @ offset 10bb80 size 3fa5
1711 03:48:02.241895 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1712 03:48:02.245119 CBFS @ c08000 size 3f8000
1713 03:48:02.248511 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1714 03:48:02.252132 CBFS: Locating 'fallback/slic'
1715 03:48:02.257048 CBFS: 'fallback/slic' not found.
1716 03:48:02.263883 ACPI: Writing ACPI tables at 99b3e000.
1717 03:48:02.263991 ACPI: * FACS
1718 03:48:02.266746 ACPI: * DSDT
1719 03:48:02.270473 Ramoops buffer: 0x100000@0x99a3d000.
1720 03:48:02.273395 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1721 03:48:02.279787 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1722 03:48:02.283587 Google Chrome EC: version:
1723 03:48:02.286572 ro: helios_v2.0.2659-56403530b
1724 03:48:02.289992 rw: helios_v2.0.2849-c41de27e7d
1725 03:48:02.290076 running image: 1
1726 03:48:02.294238 ACPI: * FADT
1727 03:48:02.294318 SCI is IRQ9
1728 03:48:02.300745 ACPI: added table 1/32, length now 40
1729 03:48:02.300843 ACPI: * SSDT
1730 03:48:02.304471 Found 1 CPU(s) with 8 core(s) each.
1731 03:48:02.307633 Error: Could not locate 'wifi_sar' in VPD.
1732 03:48:02.314196 Checking CBFS for default SAR values
1733 03:48:02.317741 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1734 03:48:02.320709 CBFS @ c08000 size 3f8000
1735 03:48:02.327333 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1736 03:48:02.330877 CBFS: Locating 'wifi_sar_defaults.hex'
1737 03:48:02.333880 CBFS: Found @ offset 5fac0 size 77
1738 03:48:02.337676 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1739 03:48:02.343741 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1740 03:48:02.347379 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1741 03:48:02.354319 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1742 03:48:02.356991 failed to find key in VPD: dsm_calib_r0_0
1743 03:48:02.367205 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1744 03:48:02.370827 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1745 03:48:02.373779 failed to find key in VPD: dsm_calib_r0_1
1746 03:48:02.383382 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1747 03:48:02.390344 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1748 03:48:02.393416 failed to find key in VPD: dsm_calib_r0_2
1749 03:48:02.403694 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1750 03:48:02.406864 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1751 03:48:02.413420 failed to find key in VPD: dsm_calib_r0_3
1752 03:48:02.420562 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1753 03:48:02.426637 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1754 03:48:02.430169 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1755 03:48:02.433485 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1756 03:48:02.437203 EC returned error result code 1
1757 03:48:02.441019 EC returned error result code 1
1758 03:48:02.445269 EC returned error result code 1
1759 03:48:02.451283 PS2K: Bad resp from EC. Vivaldi disabled!
1760 03:48:02.454505 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1761 03:48:02.461250 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1762 03:48:02.467971 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1763 03:48:02.471340 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1764 03:48:02.478200 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1765 03:48:02.484806 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1766 03:48:02.491095 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1767 03:48:02.494443 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1768 03:48:02.497955 ACPI: added table 2/32, length now 44
1769 03:48:02.500885 ACPI: * MCFG
1770 03:48:02.504524 ACPI: added table 3/32, length now 48
1771 03:48:02.507501 ACPI: * TPM2
1772 03:48:02.511169 TPM2 log created at 99a2d000
1773 03:48:02.514644 ACPI: added table 4/32, length now 52
1774 03:48:02.514736 ACPI: * MADT
1775 03:48:02.517783 SCI is IRQ9
1776 03:48:02.520813 ACPI: added table 5/32, length now 56
1777 03:48:02.520911 current = 99b43ac0
1778 03:48:02.524530 ACPI: * DMAR
1779 03:48:02.527591 ACPI: added table 6/32, length now 60
1780 03:48:02.530717 ACPI: * IGD OpRegion
1781 03:48:02.530820 GMA: Found VBT in CBFS
1782 03:48:02.534625 GMA: Found valid VBT in CBFS
1783 03:48:02.537501 ACPI: added table 7/32, length now 64
1784 03:48:02.540937 ACPI: * HPET
1785 03:48:02.544439 ACPI: added table 8/32, length now 68
1786 03:48:02.544533 ACPI: done.
1787 03:48:02.547305 ACPI tables: 31744 bytes.
1788 03:48:02.550830 smbios_write_tables: 99a2c000
1789 03:48:02.554168 EC returned error result code 3
1790 03:48:02.557456 Couldn't obtain OEM name from CBI
1791 03:48:02.560958 Create SMBIOS type 17
1792 03:48:02.564188 PCI: 00:00.0 (Intel Cannonlake)
1793 03:48:02.567171 PCI: 00:14.3 (Intel WiFi)
1794 03:48:02.571031 SMBIOS tables: 939 bytes.
1795 03:48:02.574208 Writing table forward entry at 0x00000500
1796 03:48:02.580872 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1797 03:48:02.583871 Writing coreboot table at 0x99b62000
1798 03:48:02.590475 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1799 03:48:02.593896 1. 0000000000001000-000000000009ffff: RAM
1800 03:48:02.596934 2. 00000000000a0000-00000000000fffff: RESERVED
1801 03:48:02.604032 3. 0000000000100000-0000000099a2bfff: RAM
1802 03:48:02.610231 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1803 03:48:02.613425 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1804 03:48:02.620234 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1805 03:48:02.623404 7. 000000009a000000-000000009f7fffff: RESERVED
1806 03:48:02.630413 8. 00000000e0000000-00000000efffffff: RESERVED
1807 03:48:02.633511 9. 00000000fc000000-00000000fc000fff: RESERVED
1808 03:48:02.640238 10. 00000000fe000000-00000000fe00ffff: RESERVED
1809 03:48:02.643700 11. 00000000fed10000-00000000fed17fff: RESERVED
1810 03:48:02.646789 12. 00000000fed80000-00000000fed83fff: RESERVED
1811 03:48:02.653273 13. 00000000fed90000-00000000fed91fff: RESERVED
1812 03:48:02.656754 14. 00000000feda0000-00000000feda1fff: RESERVED
1813 03:48:02.662911 15. 0000000100000000-000000045e7fffff: RAM
1814 03:48:02.666217 Graphics framebuffer located at 0xc0000000
1815 03:48:02.669886 Passing 5 GPIOs to payload:
1816 03:48:02.672880 NAME | PORT | POLARITY | VALUE
1817 03:48:02.679760 write protect | undefined | high | low
1818 03:48:02.686024 lid | undefined | high | high
1819 03:48:02.689688 power | undefined | high | low
1820 03:48:02.696431 oprom | undefined | high | low
1821 03:48:02.699872 EC in RW | 0x000000cb | high | low
1822 03:48:02.703065 Board ID: 4
1823 03:48:02.706453 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1824 03:48:02.709212 CBFS @ c08000 size 3f8000
1825 03:48:02.715867 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1826 03:48:02.722437 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1827 03:48:02.722532 coreboot table: 1492 bytes.
1828 03:48:02.726135 IMD ROOT 0. 99fff000 00001000
1829 03:48:02.729357 IMD SMALL 1. 99ffe000 00001000
1830 03:48:02.732459 FSP MEMORY 2. 99c4e000 003b0000
1831 03:48:02.735966 CONSOLE 3. 99c2e000 00020000
1832 03:48:02.739441 FMAP 4. 99c2d000 0000054e
1833 03:48:02.742754 TIME STAMP 5. 99c2c000 00000910
1834 03:48:02.746150 VBOOT WORK 6. 99c18000 00014000
1835 03:48:02.749161 MRC DATA 7. 99c16000 00001958
1836 03:48:02.752847 ROMSTG STCK 8. 99c15000 00001000
1837 03:48:02.755935 AFTER CAR 9. 99c0b000 0000a000
1838 03:48:02.759429 RAMSTAGE 10. 99baf000 0005c000
1839 03:48:02.762490 REFCODE 11. 99b7a000 00035000
1840 03:48:02.766096 SMM BACKUP 12. 99b6a000 00010000
1841 03:48:02.769117 COREBOOT 13. 99b62000 00008000
1842 03:48:02.772841 ACPI 14. 99b3e000 00024000
1843 03:48:02.776010 ACPI GNVS 15. 99b3d000 00001000
1844 03:48:02.779095 RAMOOPS 16. 99a3d000 00100000
1845 03:48:02.782652 TPM2 TCGLOG17. 99a2d000 00010000
1846 03:48:02.786007 SMBIOS 18. 99a2c000 00000800
1847 03:48:02.789112 IMD small region:
1848 03:48:02.792577 IMD ROOT 0. 99ffec00 00000400
1849 03:48:02.795585 FSP RUNTIME 1. 99ffebe0 00000004
1850 03:48:02.799327 EC HOSTEVENT 2. 99ffebc0 00000008
1851 03:48:02.802245 POWER STATE 3. 99ffeb80 00000040
1852 03:48:02.806001 ROMSTAGE 4. 99ffeb60 00000004
1853 03:48:02.809274 MEM INFO 5. 99ffe9a0 000001b9
1854 03:48:02.812868 VPD 6. 99ffe920 0000006c
1855 03:48:02.815984 MTRR: Physical address space:
1856 03:48:02.822612 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1857 03:48:02.829071 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1858 03:48:02.835605 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1859 03:48:02.842478 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1860 03:48:02.848654 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1861 03:48:02.855726 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1862 03:48:02.862226 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1863 03:48:02.865824 MTRR: Fixed MSR 0x250 0x0606060606060606
1864 03:48:02.868950 MTRR: Fixed MSR 0x258 0x0606060606060606
1865 03:48:02.871815 MTRR: Fixed MSR 0x259 0x0000000000000000
1866 03:48:02.875336 MTRR: Fixed MSR 0x268 0x0606060606060606
1867 03:48:02.882240 MTRR: Fixed MSR 0x269 0x0606060606060606
1868 03:48:02.885258 MTRR: Fixed MSR 0x26a 0x0606060606060606
1869 03:48:02.888414 MTRR: Fixed MSR 0x26b 0x0606060606060606
1870 03:48:02.892148 MTRR: Fixed MSR 0x26c 0x0606060606060606
1871 03:48:02.898262 MTRR: Fixed MSR 0x26d 0x0606060606060606
1872 03:48:02.902280 MTRR: Fixed MSR 0x26e 0x0606060606060606
1873 03:48:02.905169 MTRR: Fixed MSR 0x26f 0x0606060606060606
1874 03:48:02.908828 call enable_fixed_mtrr()
1875 03:48:02.911861 CPU physical address size: 39 bits
1876 03:48:02.918665 MTRR: default type WB/UC MTRR counts: 6/8.
1877 03:48:02.921963 MTRR: WB selected as default type.
1878 03:48:02.925171 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1879 03:48:02.931713 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1880 03:48:02.938267 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1881 03:48:02.945007 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1882 03:48:02.951401 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1883 03:48:02.958019 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1884 03:48:02.961402 MTRR: Fixed MSR 0x250 0x0606060606060606
1885 03:48:02.967821 MTRR: Fixed MSR 0x258 0x0606060606060606
1886 03:48:02.971289 MTRR: Fixed MSR 0x259 0x0000000000000000
1887 03:48:02.974799 MTRR: Fixed MSR 0x268 0x0606060606060606
1888 03:48:02.977807 MTRR: Fixed MSR 0x269 0x0606060606060606
1889 03:48:02.984229 MTRR: Fixed MSR 0x26a 0x0606060606060606
1890 03:48:02.987618 MTRR: Fixed MSR 0x26b 0x0606060606060606
1891 03:48:02.990979 MTRR: Fixed MSR 0x26c 0x0606060606060606
1892 03:48:02.994629 MTRR: Fixed MSR 0x26d 0x0606060606060606
1893 03:48:02.997641 MTRR: Fixed MSR 0x26e 0x0606060606060606
1894 03:48:03.004579 MTRR: Fixed MSR 0x26f 0x0606060606060606
1895 03:48:03.004670
1896 03:48:03.004741 MTRR check
1897 03:48:03.007750 Fixed MTRRs : Enabled
1898 03:48:03.011301 Variable MTRRs: Enabled
1899 03:48:03.011396
1900 03:48:03.014462 call enable_fixed_mtrr()
1901 03:48:03.017489 MTRR: Fixed MSR 0x250 0x0606060606060606
1902 03:48:03.020681 MTRR: Fixed MSR 0x250 0x0606060606060606
1903 03:48:03.024462 MTRR: Fixed MSR 0x258 0x0606060606060606
1904 03:48:03.027376 MTRR: Fixed MSR 0x259 0x0000000000000000
1905 03:48:03.034065 MTRR: Fixed MSR 0x268 0x0606060606060606
1906 03:48:03.037307 MTRR: Fixed MSR 0x269 0x0606060606060606
1907 03:48:03.040723 MTRR: Fixed MSR 0x26a 0x0606060606060606
1908 03:48:03.044055 MTRR: Fixed MSR 0x26b 0x0606060606060606
1909 03:48:03.050584 MTRR: Fixed MSR 0x26c 0x0606060606060606
1910 03:48:03.053633 MTRR: Fixed MSR 0x26d 0x0606060606060606
1911 03:48:03.057171 MTRR: Fixed MSR 0x26e 0x0606060606060606
1912 03:48:03.060218 MTRR: Fixed MSR 0x26f 0x0606060606060606
1913 03:48:03.067543 MTRR: Fixed MSR 0x258 0x0606060606060606
1914 03:48:03.067637 call enable_fixed_mtrr()
1915 03:48:03.073880 MTRR: Fixed MSR 0x259 0x0000000000000000
1916 03:48:03.076887 MTRR: Fixed MSR 0x268 0x0606060606060606
1917 03:48:03.080298 MTRR: Fixed MSR 0x269 0x0606060606060606
1918 03:48:03.084078 MTRR: Fixed MSR 0x26a 0x0606060606060606
1919 03:48:03.090401 MTRR: Fixed MSR 0x26b 0x0606060606060606
1920 03:48:03.093814 MTRR: Fixed MSR 0x26c 0x0606060606060606
1921 03:48:03.096873 MTRR: Fixed MSR 0x26d 0x0606060606060606
1922 03:48:03.100415 MTRR: Fixed MSR 0x26e 0x0606060606060606
1923 03:48:03.107027 MTRR: Fixed MSR 0x26f 0x0606060606060606
1924 03:48:03.110418 CPU physical address size: 39 bits
1925 03:48:03.113688 call enable_fixed_mtrr()
1926 03:48:03.116732 MTRR: Fixed MSR 0x250 0x0606060606060606
1927 03:48:03.120396 MTRR: Fixed MSR 0x250 0x0606060606060606
1928 03:48:03.123764 MTRR: Fixed MSR 0x258 0x0606060606060606
1929 03:48:03.129860 MTRR: Fixed MSR 0x259 0x0000000000000000
1930 03:48:03.133637 MTRR: Fixed MSR 0x268 0x0606060606060606
1931 03:48:03.136473 MTRR: Fixed MSR 0x269 0x0606060606060606
1932 03:48:03.139706 MTRR: Fixed MSR 0x26a 0x0606060606060606
1933 03:48:03.143321 MTRR: Fixed MSR 0x26b 0x0606060606060606
1934 03:48:03.149976 MTRR: Fixed MSR 0x26c 0x0606060606060606
1935 03:48:03.153208 MTRR: Fixed MSR 0x26d 0x0606060606060606
1936 03:48:03.156723 MTRR: Fixed MSR 0x26e 0x0606060606060606
1937 03:48:03.160108 MTRR: Fixed MSR 0x26f 0x0606060606060606
1938 03:48:03.166539 MTRR: Fixed MSR 0x258 0x0606060606060606
1939 03:48:03.169834 MTRR: Fixed MSR 0x259 0x0000000000000000
1940 03:48:03.172976 MTRR: Fixed MSR 0x268 0x0606060606060606
1941 03:48:03.176669 MTRR: Fixed MSR 0x269 0x0606060606060606
1942 03:48:03.183067 MTRR: Fixed MSR 0x26a 0x0606060606060606
1943 03:48:03.186562 MTRR: Fixed MSR 0x26b 0x0606060606060606
1944 03:48:03.189457 MTRR: Fixed MSR 0x26c 0x0606060606060606
1945 03:48:03.192812 MTRR: Fixed MSR 0x26d 0x0606060606060606
1946 03:48:03.199564 MTRR: Fixed MSR 0x26e 0x0606060606060606
1947 03:48:03.202612 MTRR: Fixed MSR 0x26f 0x0606060606060606
1948 03:48:03.206227 call enable_fixed_mtrr()
1949 03:48:03.209464 MTRR: Fixed MSR 0x250 0x0606060606060606
1950 03:48:03.212683 MTRR: Fixed MSR 0x250 0x0606060606060606
1951 03:48:03.215991 MTRR: Fixed MSR 0x258 0x0606060606060606
1952 03:48:03.222669 MTRR: Fixed MSR 0x259 0x0000000000000000
1953 03:48:03.226131 MTRR: Fixed MSR 0x268 0x0606060606060606
1954 03:48:03.229260 MTRR: Fixed MSR 0x269 0x0606060606060606
1955 03:48:03.232799 MTRR: Fixed MSR 0x26a 0x0606060606060606
1956 03:48:03.239367 MTRR: Fixed MSR 0x26b 0x0606060606060606
1957 03:48:03.242311 MTRR: Fixed MSR 0x26c 0x0606060606060606
1958 03:48:03.246017 MTRR: Fixed MSR 0x26d 0x0606060606060606
1959 03:48:03.249231 MTRR: Fixed MSR 0x26e 0x0606060606060606
1960 03:48:03.255893 MTRR: Fixed MSR 0x26f 0x0606060606060606
1961 03:48:03.258917 MTRR: Fixed MSR 0x258 0x0606060606060606
1962 03:48:03.262164 call enable_fixed_mtrr()
1963 03:48:03.265950 MTRR: Fixed MSR 0x259 0x0000000000000000
1964 03:48:03.268844 MTRR: Fixed MSR 0x268 0x0606060606060606
1965 03:48:03.272111 MTRR: Fixed MSR 0x269 0x0606060606060606
1966 03:48:03.278885 MTRR: Fixed MSR 0x26a 0x0606060606060606
1967 03:48:03.282025 MTRR: Fixed MSR 0x26b 0x0606060606060606
1968 03:48:03.285829 MTRR: Fixed MSR 0x26c 0x0606060606060606
1969 03:48:03.289120 MTRR: Fixed MSR 0x26d 0x0606060606060606
1970 03:48:03.295376 MTRR: Fixed MSR 0x26e 0x0606060606060606
1971 03:48:03.298580 MTRR: Fixed MSR 0x26f 0x0606060606060606
1972 03:48:03.302319 CPU physical address size: 39 bits
1973 03:48:03.305560 call enable_fixed_mtrr()
1974 03:48:03.308591 CPU physical address size: 39 bits
1975 03:48:03.315094 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1976 03:48:03.318518 CPU physical address size: 39 bits
1977 03:48:03.322116 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1978 03:48:03.324999 CPU physical address size: 39 bits
1979 03:48:03.328553 call enable_fixed_mtrr()
1980 03:48:03.332053 CBFS @ c08000 size 3f8000
1981 03:48:03.338422 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1982 03:48:03.341714 CBFS: Locating 'fallback/payload'
1983 03:48:03.344855 CPU physical address size: 39 bits
1984 03:48:03.348055 CPU physical address size: 39 bits
1985 03:48:03.351677 CBFS: Found @ offset 1c96c0 size 3f798
1986 03:48:03.354828 Checking segment from ROM address 0xffdd16f8
1987 03:48:03.361936 Checking segment from ROM address 0xffdd1714
1988 03:48:03.364832 Loading segment from ROM address 0xffdd16f8
1989 03:48:03.368358 code (compression=0)
1990 03:48:03.374871 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1991 03:48:03.384631 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1992 03:48:03.388353 it's not compressed!
1993 03:48:03.478335 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1994 03:48:03.485442 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1995 03:48:03.488354 Loading segment from ROM address 0xffdd1714
1996 03:48:03.491674 Entry Point 0x30000000
1997 03:48:03.495160 Loaded segments
1998 03:48:03.500916 Finalizing chipset.
1999 03:48:03.503837 Finalizing SMM.
2000 03:48:03.507434 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2001 03:48:03.510969 mp_park_aps done after 0 msecs.
2002 03:48:03.517126 Jumping to boot code at 30000000(99b62000)
2003 03:48:03.523953 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2004 03:48:03.524048
2005 03:48:03.524119
2006 03:48:03.524185
2007 03:48:03.526963 Starting depthcharge on Helios...
2008 03:48:03.527053
2009 03:48:03.527410 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2010 03:48:03.527516 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2011 03:48:03.527609 Setting prompt string to ['hatch:']
2012 03:48:03.527697 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2013 03:48:03.537381 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2014 03:48:03.537480
2015 03:48:03.544010 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2016 03:48:03.544103
2017 03:48:03.550480 board_setup: Info: eMMC controller not present; skipping
2018 03:48:03.550571
2019 03:48:03.553615 New NVMe Controller 0x30053ac0 @ 00:1d:00
2020 03:48:03.553735
2021 03:48:03.560146 board_setup: Info: SDHCI controller not present; skipping
2022 03:48:03.560277
2023 03:48:03.567081 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2024 03:48:03.567184
2025 03:48:03.567279 Wipe memory regions:
2026 03:48:03.567368
2027 03:48:03.569911 [0x00000000001000, 0x000000000a0000)
2028 03:48:03.570005
2029 03:48:03.573719 [0x00000000100000, 0x00000030000000)
2030 03:48:03.640061
2031 03:48:03.643037 [0x00000030657430, 0x00000099a2c000)
2032 03:48:03.789664
2033 03:48:03.792689 [0x00000100000000, 0x0000045e800000)
2034 03:48:05.249960
2035 03:48:05.250125 R8152: Initializing
2036 03:48:05.250232
2037 03:48:05.252725 Version 9 (ocp_data = 6010)
2038 03:48:05.257094
2039 03:48:05.257191 R8152: Done initializing
2040 03:48:05.257286
2041 03:48:05.260328 Adding net device
2042 03:48:05.743022
2043 03:48:05.743167 R8152: Initializing
2044 03:48:05.743244
2045 03:48:05.746607 Version 6 (ocp_data = 5c30)
2046 03:48:05.746730
2047 03:48:05.750037 R8152: Done initializing
2048 03:48:05.750141
2049 03:48:05.753195 net_add_device: Attemp to include the same device
2050 03:48:05.756970
2051 03:48:05.763844 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2052 03:48:05.763953
2053 03:48:05.764029
2054 03:48:05.764094
2055 03:48:05.764383 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2057 03:48:05.864835 hatch: tftpboot 192.168.201.1 12940511/tftp-deploy-i5_6ttan/kernel/bzImage 12940511/tftp-deploy-i5_6ttan/kernel/cmdline 12940511/tftp-deploy-i5_6ttan/ramdisk/ramdisk.cpio.gz
2058 03:48:05.865283 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2059 03:48:05.865591 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2060 03:48:05.870193 tftpboot 192.168.201.1 12940511/tftp-deploy-i5_6ttan/kernel/bzIploy-i5_6ttan/kernel/cmdline 12940511/tftp-deploy-i5_6ttan/ramdisk/ramdisk.cpio.gz
2061 03:48:05.870875
2062 03:48:05.871370 Waiting for link
2063 03:48:06.070821
2064 03:48:06.071238 done.
2065 03:48:06.071606
2066 03:48:06.071950 MAC: 00:24:32:50:1a:59
2067 03:48:06.072404
2068 03:48:06.074147 Sending DHCP discover... done.
2069 03:48:06.074512
2070 03:48:06.077718 Waiting for reply... done.
2071 03:48:06.078077
2072 03:48:06.081928 Sending DHCP request... done.
2073 03:48:06.082281
2074 03:48:06.099645 Waiting for reply... done.
2075 03:48:06.100156
2076 03:48:06.100532 My ip is 192.168.201.14
2077 03:48:06.100876
2078 03:48:06.103953 The DHCP server ip is 192.168.201.1
2079 03:48:06.106424
2080 03:48:06.110202 TFTP server IP predefined by user: 192.168.201.1
2081 03:48:06.110550
2082 03:48:06.116410 Bootfile predefined by user: 12940511/tftp-deploy-i5_6ttan/kernel/bzImage
2083 03:48:06.117014
2084 03:48:06.119750 Sending tftp read request... done.
2085 03:48:06.120730
2086 03:48:06.129036 Waiting for the transfer...
2087 03:48:06.129424
2088 03:48:06.798280 00000000 ################################################################
2089 03:48:06.798690
2090 03:48:07.462291 00080000 ################################################################
2091 03:48:07.462790
2092 03:48:08.141595 00100000 ################################################################
2093 03:48:08.142050
2094 03:48:08.828359 00180000 ################################################################
2095 03:48:08.828869
2096 03:48:09.498734 00200000 ################################################################
2097 03:48:09.499234
2098 03:48:10.151674 00280000 ################################################################
2099 03:48:10.152226
2100 03:48:10.857552 00300000 ################################################################
2101 03:48:10.858079
2102 03:48:11.498119 00380000 ################################################################
2103 03:48:11.498357
2104 03:48:12.058297 00400000 ################################################################
2105 03:48:12.058772
2106 03:48:12.652149 00480000 ################################################################
2107 03:48:12.652300
2108 03:48:13.267743 00500000 ################################################################
2109 03:48:13.268234
2110 03:48:13.962748 00580000 ################################################################
2111 03:48:13.963275
2112 03:48:14.666467 00600000 ################################################################
2113 03:48:14.666981
2114 03:48:15.260200 00680000 ################################################################
2115 03:48:15.260758
2116 03:48:15.904971 00700000 ################################################################
2117 03:48:15.905444
2118 03:48:16.532395 00780000 ################################################################
2119 03:48:16.532932
2120 03:48:17.224747 00800000 ################################################################
2121 03:48:17.225311
2122 03:48:17.832197 00880000 ######################################################## done.
2123 03:48:17.832725
2124 03:48:17.835793 The bootfile was 9367440 bytes long.
2125 03:48:17.836459
2126 03:48:17.838799 Sending tftp read request... done.
2127 03:48:17.839499
2128 03:48:17.842298 Waiting for the transfer...
2129 03:48:17.842705
2130 03:48:18.511433 00000000 ################################################################
2131 03:48:18.511926
2132 03:48:19.162117 00080000 ################################################################
2133 03:48:19.162614
2134 03:48:19.814847 00100000 ################################################################
2135 03:48:19.815375
2136 03:48:20.487920 00180000 ################################################################
2137 03:48:20.488065
2138 03:48:21.150278 00200000 ################################################################
2139 03:48:21.150438
2140 03:48:21.752598 00280000 ################################################################
2141 03:48:21.753102
2142 03:48:22.396771 00300000 ################################################################
2143 03:48:22.397272
2144 03:48:23.020041 00380000 ################################################################
2145 03:48:23.020184
2146 03:48:23.535974 00400000 ################################################################
2147 03:48:23.536153
2148 03:48:24.082296 00480000 ################################################################
2149 03:48:24.082457
2150 03:48:24.637521 00500000 ############################################################### done.
2151 03:48:24.637705
2152 03:48:24.641143 Sending tftp read request... done.
2153 03:48:24.641234
2154 03:48:24.644781 Waiting for the transfer...
2155 03:48:24.644870
2156 03:48:24.644940 00000000 # done.
2157 03:48:24.645008
2158 03:48:24.654390 Command line loaded dynamically from TFTP file: 12940511/tftp-deploy-i5_6ttan/kernel/cmdline
2159 03:48:24.654480
2160 03:48:24.684211 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12940511/extract-nfsrootfs-uw_1q2l7,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2161 03:48:24.684315
2162 03:48:24.687109 ec_init(0): CrosEC protocol v3 supported (256, 256)
2163 03:48:24.693420
2164 03:48:24.697094 Shutting down all USB controllers.
2165 03:48:24.697183
2166 03:48:24.697253 Removing current net device
2167 03:48:24.701388
2168 03:48:24.701476 Finalizing coreboot
2169 03:48:24.701548
2170 03:48:24.707681 Exiting depthcharge with code 4 at timestamp: 28525796
2171 03:48:24.707799
2172 03:48:24.707903
2173 03:48:24.707972 Starting kernel ...
2174 03:48:24.708036
2175 03:48:24.708096
2176 03:48:24.708472 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2177 03:48:24.708577 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2178 03:48:24.708659 Setting prompt string to ['Linux version [0-9]']
2179 03:48:24.708735 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2180 03:48:24.708806 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2182 03:52:45.708831 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2184 03:52:45.709052 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2186 03:52:45.709217 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2189 03:52:45.709493 end: 2 depthcharge-action (duration 00:05:00) [common]
2191 03:52:45.709728 Cleaning after the job
2192 03:52:45.709830 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12940511/tftp-deploy-i5_6ttan/ramdisk
2193 03:52:45.710901 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12940511/tftp-deploy-i5_6ttan/kernel
2194 03:52:45.712577 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12940511/tftp-deploy-i5_6ttan/nfsrootfs
2195 03:52:45.797357 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12940511/tftp-deploy-i5_6ttan/modules
2196 03:52:45.797835 start: 5.1 power-off (timeout 00:00:30) [common]
2197 03:52:45.798027 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2198 03:52:45.878029 >> Command sent successfully.
2199 03:52:45.880706 Returned 0 in 0 seconds
2200 03:52:45.981206 end: 5.1 power-off (duration 00:00:00) [common]
2202 03:52:45.981663 start: 5.2 read-feedback (timeout 00:10:00) [common]
2203 03:52:45.982055 Listened to connection for namespace 'common' for up to 1s
2205 03:52:45.982565 Listened to connection for namespace 'common' for up to 1s
2206 03:52:46.982895 Finalising connection for namespace 'common'
2207 03:52:46.983073 Disconnecting from shell: Finalise
2208 03:52:46.983165
2209 03:52:47.083506 end: 5.2 read-feedback (duration 00:00:01) [common]
2210 03:52:47.083672 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12940511
2211 03:52:47.440973 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12940511
2212 03:52:47.441171 JobError: Your job cannot terminate cleanly.