Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 03:42:57.677124 lava-dispatcher, installed at version: 2024.01
2 03:42:57.677318 start: 0 validate
3 03:42:57.677451 Start time: 2024-03-05 03:42:57.677443+00:00 (UTC)
4 03:42:57.677566 Using caching service: 'http://localhost/cache/?uri=%s'
5 03:42:57.677691 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20240129.0%2Famd64%2Finitrd.cpio.gz exists
6 03:42:57.947140 Using caching service: 'http://localhost/cache/?uri=%s'
7 03:42:57.947863 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2244-g20d1c7153f15%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 03:42:58.219084 Using caching service: 'http://localhost/cache/?uri=%s'
9 03:42:58.219824 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20240129.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 03:42:58.491153 Using caching service: 'http://localhost/cache/?uri=%s'
11 03:42:58.491915 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2244-g20d1c7153f15%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 03:42:58.768917 validate duration: 1.09
14 03:42:58.770287 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 03:42:58.770929 start: 1.1 download-retry (timeout 00:10:00) [common]
16 03:42:58.771429 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 03:42:58.772070 Not decompressing ramdisk as can be used compressed.
18 03:42:58.772551 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20240129.0/amd64/initrd.cpio.gz
19 03:42:58.772912 saving as /var/lib/lava/dispatcher/tmp/12940478/tftp-deploy-9fjcirue/ramdisk/initrd.cpio.gz
20 03:42:58.773274 total size: 5431448 (5 MB)
21 03:42:58.778691 progress 0 % (0 MB)
22 03:42:58.788429 progress 5 % (0 MB)
23 03:42:58.795481 progress 10 % (0 MB)
24 03:42:58.800287 progress 15 % (0 MB)
25 03:42:58.804539 progress 20 % (1 MB)
26 03:42:58.807902 progress 25 % (1 MB)
27 03:42:58.810745 progress 30 % (1 MB)
28 03:42:58.813655 progress 35 % (1 MB)
29 03:42:58.815959 progress 40 % (2 MB)
30 03:42:58.818216 progress 45 % (2 MB)
31 03:42:58.820252 progress 50 % (2 MB)
32 03:42:58.822480 progress 55 % (2 MB)
33 03:42:58.824327 progress 60 % (3 MB)
34 03:42:58.826167 progress 65 % (3 MB)
35 03:42:58.828183 progress 70 % (3 MB)
36 03:42:58.829786 progress 75 % (3 MB)
37 03:42:58.831402 progress 80 % (4 MB)
38 03:42:58.833001 progress 85 % (4 MB)
39 03:42:58.834641 progress 90 % (4 MB)
40 03:42:58.836107 progress 95 % (4 MB)
41 03:42:58.837587 progress 100 % (5 MB)
42 03:42:58.837804 5 MB downloaded in 0.06 s (80.24 MB/s)
43 03:42:58.837976 end: 1.1.1 http-download (duration 00:00:00) [common]
45 03:42:58.838221 end: 1.1 download-retry (duration 00:00:00) [common]
46 03:42:58.838308 start: 1.2 download-retry (timeout 00:10:00) [common]
47 03:42:58.838392 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 03:42:58.838528 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2244-g20d1c7153f15/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 03:42:58.838598 saving as /var/lib/lava/dispatcher/tmp/12940478/tftp-deploy-9fjcirue/kernel/bzImage
50 03:42:58.838716 total size: 9367440 (8 MB)
51 03:42:58.838780 No compression specified
52 03:42:58.839893 progress 0 % (0 MB)
53 03:42:58.842336 progress 5 % (0 MB)
54 03:42:58.844850 progress 10 % (0 MB)
55 03:42:58.847311 progress 15 % (1 MB)
56 03:42:58.849920 progress 20 % (1 MB)
57 03:42:58.852374 progress 25 % (2 MB)
58 03:42:58.854803 progress 30 % (2 MB)
59 03:42:58.857349 progress 35 % (3 MB)
60 03:42:58.859778 progress 40 % (3 MB)
61 03:42:58.862153 progress 45 % (4 MB)
62 03:42:58.864599 progress 50 % (4 MB)
63 03:42:58.867189 progress 55 % (4 MB)
64 03:42:58.869551 progress 60 % (5 MB)
65 03:42:58.871922 progress 65 % (5 MB)
66 03:42:58.874416 progress 70 % (6 MB)
67 03:42:58.876843 progress 75 % (6 MB)
68 03:42:58.879215 progress 80 % (7 MB)
69 03:42:58.881555 progress 85 % (7 MB)
70 03:42:58.884047 progress 90 % (8 MB)
71 03:42:58.886373 progress 95 % (8 MB)
72 03:42:58.888893 progress 100 % (8 MB)
73 03:42:58.889238 8 MB downloaded in 0.05 s (176.88 MB/s)
74 03:42:58.889398 end: 1.2.1 http-download (duration 00:00:00) [common]
76 03:42:58.889645 end: 1.2 download-retry (duration 00:00:00) [common]
77 03:42:58.889731 start: 1.3 download-retry (timeout 00:10:00) [common]
78 03:42:58.889816 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 03:42:58.890016 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20240129.0/amd64/full.rootfs.tar.xz
80 03:42:58.890084 saving as /var/lib/lava/dispatcher/tmp/12940478/tftp-deploy-9fjcirue/nfsrootfs/full.rootfs.tar
81 03:42:58.890145 total size: 133429172 (127 MB)
82 03:42:58.890211 Using unxz to decompress xz
83 03:42:58.894772 progress 0 % (0 MB)
84 03:42:59.236413 progress 5 % (6 MB)
85 03:42:59.589317 progress 10 % (12 MB)
86 03:42:59.877783 progress 15 % (19 MB)
87 03:43:00.059774 progress 20 % (25 MB)
88 03:43:00.300388 progress 25 % (31 MB)
89 03:43:00.645973 progress 30 % (38 MB)
90 03:43:00.990148 progress 35 % (44 MB)
91 03:43:01.389948 progress 40 % (50 MB)
92 03:43:01.773545 progress 45 % (57 MB)
93 03:43:02.128086 progress 50 % (63 MB)
94 03:43:02.508353 progress 55 % (70 MB)
95 03:43:02.871353 progress 60 % (76 MB)
96 03:43:03.234281 progress 65 % (82 MB)
97 03:43:03.600161 progress 70 % (89 MB)
98 03:43:03.962822 progress 75 % (95 MB)
99 03:43:04.400091 progress 80 % (101 MB)
100 03:43:04.832940 progress 85 % (108 MB)
101 03:43:05.094365 progress 90 % (114 MB)
102 03:43:05.441104 progress 95 % (120 MB)
103 03:43:05.847547 progress 100 % (127 MB)
104 03:43:05.853915 127 MB downloaded in 6.96 s (18.27 MB/s)
105 03:43:05.854173 end: 1.3.1 http-download (duration 00:00:07) [common]
107 03:43:05.854437 end: 1.3 download-retry (duration 00:00:07) [common]
108 03:43:05.854527 start: 1.4 download-retry (timeout 00:09:53) [common]
109 03:43:05.854621 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 03:43:05.854807 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2244-g20d1c7153f15/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 03:43:05.854879 saving as /var/lib/lava/dispatcher/tmp/12940478/tftp-deploy-9fjcirue/modules/modules.tar
112 03:43:05.854941 total size: 250168 (0 MB)
113 03:43:05.855010 Using unxz to decompress xz
114 03:43:05.859374 progress 13 % (0 MB)
115 03:43:05.859776 progress 26 % (0 MB)
116 03:43:05.860028 progress 39 % (0 MB)
117 03:43:05.861523 progress 52 % (0 MB)
118 03:43:05.863423 progress 65 % (0 MB)
119 03:43:05.865180 progress 78 % (0 MB)
120 03:43:05.867244 progress 91 % (0 MB)
121 03:43:05.869083 progress 100 % (0 MB)
122 03:43:05.874600 0 MB downloaded in 0.02 s (12.14 MB/s)
123 03:43:05.874895 end: 1.4.1 http-download (duration 00:00:00) [common]
125 03:43:05.875164 end: 1.4 download-retry (duration 00:00:00) [common]
126 03:43:05.875258 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
127 03:43:05.875355 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
128 03:43:08.095475 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12940478/extract-nfsrootfs-fci4nwvx
129 03:43:08.095692 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 03:43:08.095839 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
131 03:43:08.096058 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12940478/lava-overlay-43j8lk0_
132 03:43:08.096245 makedir: /var/lib/lava/dispatcher/tmp/12940478/lava-overlay-43j8lk0_/lava-12940478/bin
133 03:43:08.096390 makedir: /var/lib/lava/dispatcher/tmp/12940478/lava-overlay-43j8lk0_/lava-12940478/tests
134 03:43:08.096534 makedir: /var/lib/lava/dispatcher/tmp/12940478/lava-overlay-43j8lk0_/lava-12940478/results
135 03:43:08.096682 Creating /var/lib/lava/dispatcher/tmp/12940478/lava-overlay-43j8lk0_/lava-12940478/bin/lava-add-keys
136 03:43:08.096888 Creating /var/lib/lava/dispatcher/tmp/12940478/lava-overlay-43j8lk0_/lava-12940478/bin/lava-add-sources
137 03:43:08.097077 Creating /var/lib/lava/dispatcher/tmp/12940478/lava-overlay-43j8lk0_/lava-12940478/bin/lava-background-process-start
138 03:43:08.097222 Creating /var/lib/lava/dispatcher/tmp/12940478/lava-overlay-43j8lk0_/lava-12940478/bin/lava-background-process-stop
139 03:43:08.097351 Creating /var/lib/lava/dispatcher/tmp/12940478/lava-overlay-43j8lk0_/lava-12940478/bin/lava-common-functions
140 03:43:08.097477 Creating /var/lib/lava/dispatcher/tmp/12940478/lava-overlay-43j8lk0_/lava-12940478/bin/lava-echo-ipv4
141 03:43:08.097603 Creating /var/lib/lava/dispatcher/tmp/12940478/lava-overlay-43j8lk0_/lava-12940478/bin/lava-install-packages
142 03:43:08.097729 Creating /var/lib/lava/dispatcher/tmp/12940478/lava-overlay-43j8lk0_/lava-12940478/bin/lava-installed-packages
143 03:43:08.097852 Creating /var/lib/lava/dispatcher/tmp/12940478/lava-overlay-43j8lk0_/lava-12940478/bin/lava-os-build
144 03:43:08.097976 Creating /var/lib/lava/dispatcher/tmp/12940478/lava-overlay-43j8lk0_/lava-12940478/bin/lava-probe-channel
145 03:43:08.098098 Creating /var/lib/lava/dispatcher/tmp/12940478/lava-overlay-43j8lk0_/lava-12940478/bin/lava-probe-ip
146 03:43:08.098223 Creating /var/lib/lava/dispatcher/tmp/12940478/lava-overlay-43j8lk0_/lava-12940478/bin/lava-target-ip
147 03:43:08.098346 Creating /var/lib/lava/dispatcher/tmp/12940478/lava-overlay-43j8lk0_/lava-12940478/bin/lava-target-mac
148 03:43:08.098470 Creating /var/lib/lava/dispatcher/tmp/12940478/lava-overlay-43j8lk0_/lava-12940478/bin/lava-target-storage
149 03:43:08.098594 Creating /var/lib/lava/dispatcher/tmp/12940478/lava-overlay-43j8lk0_/lava-12940478/bin/lava-test-case
150 03:43:08.098768 Creating /var/lib/lava/dispatcher/tmp/12940478/lava-overlay-43j8lk0_/lava-12940478/bin/lava-test-event
151 03:43:08.098892 Creating /var/lib/lava/dispatcher/tmp/12940478/lava-overlay-43j8lk0_/lava-12940478/bin/lava-test-feedback
152 03:43:08.099017 Creating /var/lib/lava/dispatcher/tmp/12940478/lava-overlay-43j8lk0_/lava-12940478/bin/lava-test-raise
153 03:43:08.099141 Creating /var/lib/lava/dispatcher/tmp/12940478/lava-overlay-43j8lk0_/lava-12940478/bin/lava-test-reference
154 03:43:08.099267 Creating /var/lib/lava/dispatcher/tmp/12940478/lava-overlay-43j8lk0_/lava-12940478/bin/lava-test-runner
155 03:43:08.099391 Creating /var/lib/lava/dispatcher/tmp/12940478/lava-overlay-43j8lk0_/lava-12940478/bin/lava-test-set
156 03:43:08.099514 Creating /var/lib/lava/dispatcher/tmp/12940478/lava-overlay-43j8lk0_/lava-12940478/bin/lava-test-shell
157 03:43:08.099638 Updating /var/lib/lava/dispatcher/tmp/12940478/lava-overlay-43j8lk0_/lava-12940478/bin/lava-install-packages (oe)
158 03:43:08.099787 Updating /var/lib/lava/dispatcher/tmp/12940478/lava-overlay-43j8lk0_/lava-12940478/bin/lava-installed-packages (oe)
159 03:43:08.099910 Creating /var/lib/lava/dispatcher/tmp/12940478/lava-overlay-43j8lk0_/lava-12940478/environment
160 03:43:08.100014 LAVA metadata
161 03:43:08.100084 - LAVA_JOB_ID=12940478
162 03:43:08.100148 - LAVA_DISPATCHER_IP=192.168.201.1
163 03:43:08.100246 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
164 03:43:08.100313 skipped lava-vland-overlay
165 03:43:08.100386 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 03:43:08.100462 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
167 03:43:08.100524 skipped lava-multinode-overlay
168 03:43:08.100595 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 03:43:08.100671 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
170 03:43:08.100742 Loading test definitions
171 03:43:08.100827 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
172 03:43:08.100895 Using /lava-12940478 at stage 0
173 03:43:08.101195 uuid=12940478_1.5.2.3.1 testdef=None
174 03:43:08.101283 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 03:43:08.101367 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
176 03:43:08.101865 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 03:43:08.102078 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
179 03:43:08.102723 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 03:43:08.102948 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
182 03:43:08.103558 runner path: /var/lib/lava/dispatcher/tmp/12940478/lava-overlay-43j8lk0_/lava-12940478/0/tests/0_dmesg test_uuid 12940478_1.5.2.3.1
183 03:43:08.103714 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 03:43:08.103932 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
186 03:43:08.104003 Using /lava-12940478 at stage 1
187 03:43:08.104295 uuid=12940478_1.5.2.3.5 testdef=None
188 03:43:08.104381 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 03:43:08.104464 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
190 03:43:08.104922 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 03:43:08.105132 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
193 03:43:08.105763 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 03:43:08.105985 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
196 03:43:08.106602 runner path: /var/lib/lava/dispatcher/tmp/12940478/lava-overlay-43j8lk0_/lava-12940478/1/tests/1_bootrr test_uuid 12940478_1.5.2.3.5
197 03:43:08.106818 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 03:43:08.107017 Creating lava-test-runner.conf files
200 03:43:08.107079 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12940478/lava-overlay-43j8lk0_/lava-12940478/0 for stage 0
201 03:43:08.107166 - 0_dmesg
202 03:43:08.107243 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12940478/lava-overlay-43j8lk0_/lava-12940478/1 for stage 1
203 03:43:08.107331 - 1_bootrr
204 03:43:08.107423 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 03:43:08.107506 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
206 03:43:08.114738 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 03:43:08.114838 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
208 03:43:08.114922 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 03:43:08.115003 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 03:43:08.115089 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
211 03:43:08.249082 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 03:43:08.249475 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
213 03:43:08.249613 extracting modules file /var/lib/lava/dispatcher/tmp/12940478/tftp-deploy-9fjcirue/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12940478/extract-nfsrootfs-fci4nwvx
214 03:43:08.262780 extracting modules file /var/lib/lava/dispatcher/tmp/12940478/tftp-deploy-9fjcirue/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12940478/extract-overlay-ramdisk-_7nbevg0/ramdisk
215 03:43:08.275906 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 03:43:08.276036 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
217 03:43:08.276134 [common] Applying overlay to NFS
218 03:43:08.276218 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12940478/compress-overlay-v2p3gjvi/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12940478/extract-nfsrootfs-fci4nwvx
219 03:43:08.284283 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 03:43:08.284405 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
221 03:43:08.284510 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 03:43:08.284616 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
223 03:43:08.284705 Building ramdisk /var/lib/lava/dispatcher/tmp/12940478/extract-overlay-ramdisk-_7nbevg0/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12940478/extract-overlay-ramdisk-_7nbevg0/ramdisk
224 03:43:08.352592 >> 26151 blocks
225 03:43:08.878703 rename /var/lib/lava/dispatcher/tmp/12940478/extract-overlay-ramdisk-_7nbevg0/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12940478/tftp-deploy-9fjcirue/ramdisk/ramdisk.cpio.gz
226 03:43:08.879154 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 03:43:08.879299 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
228 03:43:08.879417 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
229 03:43:08.879529 No mkimage arch provided, not using FIT.
230 03:43:08.879639 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 03:43:08.879746 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 03:43:08.879897 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 03:43:08.880037 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
234 03:43:08.880156 No LXC device requested
235 03:43:08.880278 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 03:43:08.880416 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
237 03:43:08.880516 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 03:43:08.880606 Checking files for TFTP limit of 4294967296 bytes.
239 03:43:08.881054 end: 1 tftp-deploy (duration 00:00:10) [common]
240 03:43:08.881192 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 03:43:08.881336 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 03:43:08.881517 substitutions:
243 03:43:08.881617 - {DTB}: None
244 03:43:08.881699 - {INITRD}: 12940478/tftp-deploy-9fjcirue/ramdisk/ramdisk.cpio.gz
245 03:43:08.881798 - {KERNEL}: 12940478/tftp-deploy-9fjcirue/kernel/bzImage
246 03:43:08.881878 - {LAVA_MAC}: None
247 03:43:08.881956 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12940478/extract-nfsrootfs-fci4nwvx
248 03:43:08.882053 - {NFS_SERVER_IP}: 192.168.201.1
249 03:43:08.882149 - {PRESEED_CONFIG}: None
250 03:43:08.882245 - {PRESEED_LOCAL}: None
251 03:43:08.882341 - {RAMDISK}: 12940478/tftp-deploy-9fjcirue/ramdisk/ramdisk.cpio.gz
252 03:43:08.882436 - {ROOT_PART}: None
253 03:43:08.882531 - {ROOT}: None
254 03:43:08.882632 - {SERVER_IP}: 192.168.201.1
255 03:43:08.882760 - {TEE}: None
256 03:43:08.882856 Parsed boot commands:
257 03:43:08.882952 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 03:43:08.883189 Parsed boot commands: tftpboot 192.168.201.1 12940478/tftp-deploy-9fjcirue/kernel/bzImage 12940478/tftp-deploy-9fjcirue/kernel/cmdline 12940478/tftp-deploy-9fjcirue/ramdisk/ramdisk.cpio.gz
259 03:43:08.883316 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 03:43:08.883425 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 03:43:08.883536 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 03:43:08.883668 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 03:43:08.883777 Not connected, no need to disconnect.
264 03:43:08.883897 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 03:43:08.884030 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 03:43:08.884137 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-12'
267 03:43:08.888257 Setting prompt string to ['lava-test: # ']
268 03:43:08.888680 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 03:43:08.888793 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 03:43:08.888895 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 03:43:08.888985 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 03:43:08.889181 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-12' '--port=1' '--command=reboot'
273 03:43:14.040927 >> Command sent successfully.
274 03:43:14.047283 Returned 0 in 5 seconds
275 03:43:14.148088 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 03:43:14.149602 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 03:43:14.150164 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 03:43:14.150689 Setting prompt string to 'Starting depthcharge on Voema...'
280 03:43:14.151096 Changing prompt to 'Starting depthcharge on Voema...'
281 03:43:14.151481 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
282 03:43:14.152812 [Enter `^Ec?' for help]
283 03:43:15.706793
284 03:43:15.707372
285 03:43:15.717127 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
286 03:43:15.720414 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
287 03:43:15.727248 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
288 03:43:15.730520 CPU: AES supported, TXT NOT supported, VT supported
289 03:43:15.737779 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
290 03:43:15.741539 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
291 03:43:15.748170 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
292 03:43:15.751418 VBOOT: Loading verstage.
293 03:43:15.754311 FMAP: Found "FLASH" version 1.1 at 0x1804000.
294 03:43:15.761013 FMAP: base = 0x0 size = 0x2000000 #areas = 32
295 03:43:15.764975 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
296 03:43:15.774417 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
297 03:43:15.781686 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
298 03:43:15.782258
299 03:43:15.782676
300 03:43:15.792177 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
301 03:43:15.807358 Probing TPM: . done!
302 03:43:15.811068 TPM ready after 0 ms
303 03:43:15.814600 Connected to device vid:did:rid of 1ae0:0028:00
304 03:43:15.825837 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
305 03:43:15.831892 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
306 03:43:15.835458 Initialized TPM device CR50 revision 0
307 03:43:15.890785 tlcl_send_startup: Startup return code is 0
308 03:43:15.891494 TPM: setup succeeded
309 03:43:15.906234 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
310 03:43:15.920330 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
311 03:43:15.933792 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
312 03:43:15.943271 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
313 03:43:15.947566 Chrome EC: UHEPI supported
314 03:43:15.949917 Phase 1
315 03:43:15.953745 FMAP: area GBB found @ 1805000 (458752 bytes)
316 03:43:15.963039 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
317 03:43:15.970454 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
318 03:43:15.976500 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
319 03:43:15.983095 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
320 03:43:15.986100 Recovery requested (1009000e)
321 03:43:15.995749 TPM: Extending digest for VBOOT: boot mode into PCR 0
322 03:43:16.002477 tlcl_extend: response is 0
323 03:43:16.008784 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
324 03:43:16.018391 tlcl_extend: response is 0
325 03:43:16.025477 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
326 03:43:16.032033 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
327 03:43:16.038280 BS: verstage times (exec / console): total (unknown) / 142 ms
328 03:43:16.038892
329 03:43:16.039274
330 03:43:16.051762 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
331 03:43:16.058415 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
332 03:43:16.061422 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
333 03:43:16.064525 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
334 03:43:16.071626 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
335 03:43:16.074579 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
336 03:43:16.077784 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
337 03:43:16.081356 TCO_STS: 0000 0000
338 03:43:16.084364 GEN_PMCON: d0015038 00002200
339 03:43:16.087424 GBLRST_CAUSE: 00000000 00000000
340 03:43:16.090914 HPR_CAUSE0: 00000000
341 03:43:16.091248 prev_sleep_state 5
342 03:43:16.094209 Boot Count incremented to 25393
343 03:43:16.101066 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
344 03:43:16.107584 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
345 03:43:16.117413 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
346 03:43:16.124551 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
347 03:43:16.127214 Chrome EC: UHEPI supported
348 03:43:16.134166 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
349 03:43:16.145487 Probing TPM: done!
350 03:43:16.152282 Connected to device vid:did:rid of 1ae0:0028:00
351 03:43:16.161918 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
352 03:43:16.166095 Initialized TPM device CR50 revision 0
353 03:43:16.180582 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
354 03:43:16.186715 MRC: Hash idx 0x100b comparison successful.
355 03:43:16.190426 MRC cache found, size faa8
356 03:43:16.191054 bootmode is set to: 2
357 03:43:16.193850 SPD index = 2
358 03:43:16.199897 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
359 03:43:16.203369 SPD: module type is LPDDR4X
360 03:43:16.206971 SPD: module part number is MT53D1G64D4NW-046
361 03:43:16.213618 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
362 03:43:16.220358 SPD: device width 16 bits, bus width 16 bits
363 03:43:16.223211 SPD: module size is 2048 MB (per channel)
364 03:43:16.652954 CBMEM:
365 03:43:16.656117 IMD: root @ 0x76fff000 254 entries.
366 03:43:16.658499 IMD: root @ 0x76ffec00 62 entries.
367 03:43:16.661802 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
368 03:43:16.668532 FMAP: area RW_VPD found @ f35000 (8192 bytes)
369 03:43:16.671500 External stage cache:
370 03:43:16.675312 IMD: root @ 0x7b3ff000 254 entries.
371 03:43:16.678296 IMD: root @ 0x7b3fec00 62 entries.
372 03:43:16.693447 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
373 03:43:16.699834 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
374 03:43:16.706435 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
375 03:43:16.720425 MRC: 'RECOVERY_MRC_CACHE' does not need update.
376 03:43:16.727069 cse_lite: Skip switching to RW in the recovery path
377 03:43:16.727633 8 DIMMs found
378 03:43:16.728023 SMM Memory Map
379 03:43:16.733382 SMRAM : 0x7b000000 0x800000
380 03:43:16.736897 Subregion 0: 0x7b000000 0x200000
381 03:43:16.740311 Subregion 1: 0x7b200000 0x200000
382 03:43:16.743688 Subregion 2: 0x7b400000 0x400000
383 03:43:16.744254 top_of_ram = 0x77000000
384 03:43:16.749988 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
385 03:43:16.757216 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
386 03:43:16.760223 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
387 03:43:16.766807 MTRR Range: Start=ff000000 End=0 (Size 1000000)
388 03:43:16.773490 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
389 03:43:16.780672 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
390 03:43:16.789909 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
391 03:43:16.797121 Processing 211 relocs. Offset value of 0x74c0b000
392 03:43:16.803399 BS: romstage times (exec / console): total (unknown) / 277 ms
393 03:43:16.809458
394 03:43:16.810027
395 03:43:16.819813 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
396 03:43:16.822697 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
397 03:43:16.829274 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
398 03:43:16.839499 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
399 03:43:16.846027 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
400 03:43:16.852937 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
401 03:43:16.896129 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
402 03:43:16.902444 Processing 5008 relocs. Offset value of 0x75d98000
403 03:43:16.905944 BS: postcar times (exec / console): total (unknown) / 59 ms
404 03:43:16.909128
405 03:43:16.909601
406 03:43:16.919020 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
407 03:43:16.919598 Normal boot
408 03:43:16.922277 FW_CONFIG value is 0x804c02
409 03:43:16.925874 PCI: 00:07.0 disabled by fw_config
410 03:43:16.928954 PCI: 00:07.1 disabled by fw_config
411 03:43:16.935765 PCI: 00:0d.2 disabled by fw_config
412 03:43:16.938841 PCI: 00:1c.7 disabled by fw_config
413 03:43:16.941986 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 03:43:16.949170 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
415 03:43:16.955202 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
416 03:43:16.958745 GENERIC: 0.0 disabled by fw_config
417 03:43:16.962037 GENERIC: 1.0 disabled by fw_config
418 03:43:16.965547 fw_config match found: DB_USB=USB3_ACTIVE
419 03:43:16.969131 fw_config match found: DB_USB=USB3_ACTIVE
420 03:43:16.971849 fw_config match found: DB_USB=USB3_ACTIVE
421 03:43:16.978435 fw_config match found: DB_USB=USB3_ACTIVE
422 03:43:16.982503 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
423 03:43:16.991813 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
424 03:43:16.998468 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
425 03:43:17.005114 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
426 03:43:17.008175 microcode: sig=0x806c1 pf=0x80 revision=0x86
427 03:43:17.015096 microcode: Update skipped, already up-to-date
428 03:43:17.021920 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
429 03:43:17.049870 Detected 4 core, 8 thread CPU.
430 03:43:17.053427 Setting up SMI for CPU
431 03:43:17.056652 IED base = 0x7b400000
432 03:43:17.057223 IED size = 0x00400000
433 03:43:17.059343 Will perform SMM setup.
434 03:43:17.066378 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
435 03:43:17.073268 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
436 03:43:17.079683 Processing 16 relocs. Offset value of 0x00030000
437 03:43:17.082605 Attempting to start 7 APs
438 03:43:17.086403 Waiting for 10ms after sending INIT.
439 03:43:17.101434 Waiting for 1st SIPI to complete...done.
440 03:43:17.102005 AP: slot 1 apic_id 1.
441 03:43:17.107760 Waiting for 2nd SIPI to complete...done.
442 03:43:17.108318 AP: slot 2 apic_id 3.
443 03:43:17.111153 AP: slot 5 apic_id 2.
444 03:43:17.114445 AP: slot 6 apic_id 4.
445 03:43:17.115106 AP: slot 3 apic_id 5.
446 03:43:17.118007 AP: slot 4 apic_id 6.
447 03:43:17.121432 AP: slot 7 apic_id 7.
448 03:43:17.127876 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
449 03:43:17.134304 Processing 13 relocs. Offset value of 0x00038000
450 03:43:17.137780 Unable to locate Global NVS
451 03:43:17.144822 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
452 03:43:17.147920 Installing permanent SMM handler to 0x7b000000
453 03:43:17.157774 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
454 03:43:17.161077 Processing 794 relocs. Offset value of 0x7b010000
455 03:43:17.171165 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
456 03:43:17.174443 Processing 13 relocs. Offset value of 0x7b008000
457 03:43:17.181309 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
458 03:43:17.187778 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
459 03:43:17.190708 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
460 03:43:17.197922 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
461 03:43:17.204291 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
462 03:43:17.210661 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
463 03:43:17.217301 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
464 03:43:17.220820 Unable to locate Global NVS
465 03:43:17.227114 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
466 03:43:17.230723 Clearing SMI status registers
467 03:43:17.231288 SMI_STS: PM1
468 03:43:17.234154 PM1_STS: PWRBTN
469 03:43:17.240755 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
470 03:43:17.244313 In relocation handler: CPU 0
471 03:43:17.247559 New SMBASE=0x7b000000 IEDBASE=0x7b400000
472 03:43:17.253749 Writing SMRR. base = 0x7b000006, mask=0xff800c00
473 03:43:17.254320 Relocation complete.
474 03:43:17.263538 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
475 03:43:17.267110 In relocation handler: CPU 1
476 03:43:17.270554 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
477 03:43:17.271202 Relocation complete.
478 03:43:17.280273 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
479 03:43:17.280843 In relocation handler: CPU 3
480 03:43:17.287237 New SMBASE=0x7afff400 IEDBASE=0x7b400000
481 03:43:17.287831 Relocation complete.
482 03:43:17.296775 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
483 03:43:17.297334 In relocation handler: CPU 6
484 03:43:17.303686 New SMBASE=0x7affe800 IEDBASE=0x7b400000
485 03:43:17.307016 Writing SMRR. base = 0x7b000006, mask=0xff800c00
486 03:43:17.310311 Relocation complete.
487 03:43:17.316735 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
488 03:43:17.320455 In relocation handler: CPU 5
489 03:43:17.323636 New SMBASE=0x7affec00 IEDBASE=0x7b400000
490 03:43:17.330056 Writing SMRR. base = 0x7b000006, mask=0xff800c00
491 03:43:17.330744 Relocation complete.
492 03:43:17.336773 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
493 03:43:17.339992 In relocation handler: CPU 2
494 03:43:17.346466 New SMBASE=0x7afff800 IEDBASE=0x7b400000
495 03:43:17.347101 Relocation complete.
496 03:43:17.353000 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
497 03:43:17.356246 In relocation handler: CPU 7
498 03:43:17.362605 New SMBASE=0x7affe400 IEDBASE=0x7b400000
499 03:43:17.363136 Relocation complete.
500 03:43:17.369662 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
501 03:43:17.373080 In relocation handler: CPU 4
502 03:43:17.379327 New SMBASE=0x7afff000 IEDBASE=0x7b400000
503 03:43:17.383293 Writing SMRR. base = 0x7b000006, mask=0xff800c00
504 03:43:17.386180 Relocation complete.
505 03:43:17.386696 Initializing CPU #0
506 03:43:17.389478 CPU: vendor Intel device 806c1
507 03:43:17.396041 CPU: family 06, model 8c, stepping 01
508 03:43:17.396617 Clearing out pending MCEs
509 03:43:17.399378 Setting up local APIC...
510 03:43:17.402527 apic_id: 0x00 done.
511 03:43:17.406357 Turbo is available but hidden
512 03:43:17.409599 Turbo is available and visible
513 03:43:17.412864 microcode: Update skipped, already up-to-date
514 03:43:17.416149 CPU #0 initialized
515 03:43:17.416721 Initializing CPU #7
516 03:43:17.419403 Initializing CPU #4
517 03:43:17.422338 CPU: vendor Intel device 806c1
518 03:43:17.425875 CPU: family 06, model 8c, stepping 01
519 03:43:17.429024 CPU: vendor Intel device 806c1
520 03:43:17.432705 CPU: family 06, model 8c, stepping 01
521 03:43:17.435720 Clearing out pending MCEs
522 03:43:17.438923 Clearing out pending MCEs
523 03:43:17.439496 Initializing CPU #2
524 03:43:17.442725 Initializing CPU #5
525 03:43:17.445828 CPU: vendor Intel device 806c1
526 03:43:17.449136 CPU: family 06, model 8c, stepping 01
527 03:43:17.452708 Setting up local APIC...
528 03:43:17.457153 CPU: vendor Intel device 806c1
529 03:43:17.459387 CPU: family 06, model 8c, stepping 01
530 03:43:17.462452 Clearing out pending MCEs
531 03:43:17.463075 Clearing out pending MCEs
532 03:43:17.466211 Setting up local APIC...
533 03:43:17.469206 Setting up local APIC...
534 03:43:17.473094 Initializing CPU #1
535 03:43:17.473899 apic_id: 0x06 done.
536 03:43:17.476854 apic_id: 0x07 done.
537 03:43:17.479716 microcode: Update skipped, already up-to-date
538 03:43:17.483188 Setting up local APIC...
539 03:43:17.486110 CPU: vendor Intel device 806c1
540 03:43:17.489558 CPU: family 06, model 8c, stepping 01
541 03:43:17.492929 Clearing out pending MCEs
542 03:43:17.493688 apic_id: 0x02 done.
543 03:43:17.499569 microcode: Update skipped, already up-to-date
544 03:43:17.500388 CPU #4 initialized
545 03:43:17.503306 CPU #7 initialized
546 03:43:17.503798 Initializing CPU #6
547 03:43:17.506213 Initializing CPU #3
548 03:43:17.509647 CPU: vendor Intel device 806c1
549 03:43:17.513256 CPU: family 06, model 8c, stepping 01
550 03:43:17.516051 CPU: vendor Intel device 806c1
551 03:43:17.519685 CPU: family 06, model 8c, stepping 01
552 03:43:17.522519 Clearing out pending MCEs
553 03:43:17.525763 Clearing out pending MCEs
554 03:43:17.528872 apic_id: 0x03 done.
555 03:43:17.532644 microcode: Update skipped, already up-to-date
556 03:43:17.535573 microcode: Update skipped, already up-to-date
557 03:43:17.539010 CPU #5 initialized
558 03:43:17.539145 CPU #2 initialized
559 03:43:17.542454 Setting up local APIC...
560 03:43:17.545789 Setting up local APIC...
561 03:43:17.549120 apic_id: 0x05 done.
562 03:43:17.549228 Setting up local APIC...
563 03:43:17.552251 apic_id: 0x01 done.
564 03:43:17.555375 apic_id: 0x04 done.
565 03:43:17.558835 microcode: Update skipped, already up-to-date
566 03:43:17.562517 microcode: Update skipped, already up-to-date
567 03:43:17.565283 CPU #3 initialized
568 03:43:17.569030 CPU #6 initialized
569 03:43:17.572278 microcode: Update skipped, already up-to-date
570 03:43:17.575602 CPU #1 initialized
571 03:43:17.578805 bsp_do_flight_plan done after 468 msecs.
572 03:43:17.582029 CPU: frequency set to 4400 MHz
573 03:43:17.582132 Enabling SMIs.
574 03:43:17.588522 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
575 03:43:17.605883 SATAXPCIE1 indicates PCIe NVMe is present
576 03:43:17.609323 Probing TPM: done!
577 03:43:17.612568 Connected to device vid:did:rid of 1ae0:0028:00
578 03:43:17.623009 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
579 03:43:17.626334 Initialized TPM device CR50 revision 0
580 03:43:17.629405 Enabling S0i3.4
581 03:43:17.636194 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
582 03:43:17.639414 Found a VBT of 8704 bytes after decompression
583 03:43:17.645933 cse_lite: CSE RO boot. HybridStorageMode disabled
584 03:43:17.652838 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
585 03:43:17.728293 FSPS returned 0
586 03:43:17.731498 Executing Phase 1 of FspMultiPhaseSiInit
587 03:43:17.741356 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
588 03:43:17.744660 port C0 DISC req: usage 1 usb3 1 usb2 5
589 03:43:17.747734 Raw Buffer output 0 00000511
590 03:43:17.751484 Raw Buffer output 1 00000000
591 03:43:17.755091 pmc_send_ipc_cmd succeeded
592 03:43:17.761446 port C1 DISC req: usage 1 usb3 2 usb2 3
593 03:43:17.761532 Raw Buffer output 0 00000321
594 03:43:17.764848 Raw Buffer output 1 00000000
595 03:43:17.769381 pmc_send_ipc_cmd succeeded
596 03:43:17.774571 Detected 4 core, 8 thread CPU.
597 03:43:17.778248 Detected 4 core, 8 thread CPU.
598 03:43:17.978732 Display FSP Version Info HOB
599 03:43:17.981606 Reference Code - CPU = a.0.4c.31
600 03:43:17.985140 uCode Version = 0.0.0.86
601 03:43:17.988432 TXT ACM version = ff.ff.ff.ffff
602 03:43:17.991364 Reference Code - ME = a.0.4c.31
603 03:43:17.994681 MEBx version = 0.0.0.0
604 03:43:17.997961 ME Firmware Version = Consumer SKU
605 03:43:18.001362 Reference Code - PCH = a.0.4c.31
606 03:43:18.004938 PCH-CRID Status = Disabled
607 03:43:18.009078 PCH-CRID Original Value = ff.ff.ff.ffff
608 03:43:18.011471 PCH-CRID New Value = ff.ff.ff.ffff
609 03:43:18.015083 OPROM - RST - RAID = ff.ff.ff.ffff
610 03:43:18.017832 PCH Hsio Version = 4.0.0.0
611 03:43:18.021499 Reference Code - SA - System Agent = a.0.4c.31
612 03:43:18.024502 Reference Code - MRC = 2.0.0.1
613 03:43:18.027702 SA - PCIe Version = a.0.4c.31
614 03:43:18.031400 SA-CRID Status = Disabled
615 03:43:18.035145 SA-CRID Original Value = 0.0.0.1
616 03:43:18.038055 SA-CRID New Value = 0.0.0.1
617 03:43:18.041919 OPROM - VBIOS = ff.ff.ff.ffff
618 03:43:18.045308 IO Manageability Engine FW Version = 11.1.4.0
619 03:43:18.047685 PHY Build Version = 0.0.0.e0
620 03:43:18.052306 Thunderbolt(TM) FW Version = 0.0.0.0
621 03:43:18.059702 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
622 03:43:18.060272 ITSS IRQ Polarities Before:
623 03:43:18.062278 IPC0: 0xffffffff
624 03:43:18.062776 IPC1: 0xffffffff
625 03:43:18.065738 IPC2: 0xffffffff
626 03:43:18.069257 IPC3: 0xffffffff
627 03:43:18.069830 ITSS IRQ Polarities After:
628 03:43:18.072154 IPC0: 0xffffffff
629 03:43:18.072724 IPC1: 0xffffffff
630 03:43:18.075355 IPC2: 0xffffffff
631 03:43:18.075824 IPC3: 0xffffffff
632 03:43:18.082557 Found PCIe Root Port #9 at PCI: 00:1d.0.
633 03:43:18.092372 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
634 03:43:18.105749 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
635 03:43:18.119008 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
636 03:43:18.125614 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
637 03:43:18.126171 Enumerating buses...
638 03:43:18.132400 Show all devs... Before device enumeration.
639 03:43:18.132975 Root Device: enabled 1
640 03:43:18.135266 DOMAIN: 0000: enabled 1
641 03:43:18.138589 CPU_CLUSTER: 0: enabled 1
642 03:43:18.141684 PCI: 00:00.0: enabled 1
643 03:43:18.142163 PCI: 00:02.0: enabled 1
644 03:43:18.145374 PCI: 00:04.0: enabled 1
645 03:43:18.148442 PCI: 00:05.0: enabled 1
646 03:43:18.148918 PCI: 00:06.0: enabled 0
647 03:43:18.152432 PCI: 00:07.0: enabled 0
648 03:43:18.155491 PCI: 00:07.1: enabled 0
649 03:43:18.158450 PCI: 00:07.2: enabled 0
650 03:43:18.159071 PCI: 00:07.3: enabled 0
651 03:43:18.162439 PCI: 00:08.0: enabled 1
652 03:43:18.165416 PCI: 00:09.0: enabled 0
653 03:43:18.168538 PCI: 00:0a.0: enabled 0
654 03:43:18.169104 PCI: 00:0d.0: enabled 1
655 03:43:18.172012 PCI: 00:0d.1: enabled 0
656 03:43:18.174990 PCI: 00:0d.2: enabled 0
657 03:43:18.178434 PCI: 00:0d.3: enabled 0
658 03:43:18.179097 PCI: 00:0e.0: enabled 0
659 03:43:18.181471 PCI: 00:10.2: enabled 1
660 03:43:18.185259 PCI: 00:10.6: enabled 0
661 03:43:18.185829 PCI: 00:10.7: enabled 0
662 03:43:18.188444 PCI: 00:12.0: enabled 0
663 03:43:18.191478 PCI: 00:12.6: enabled 0
664 03:43:18.195155 PCI: 00:13.0: enabled 0
665 03:43:18.195652 PCI: 00:14.0: enabled 1
666 03:43:18.197885 PCI: 00:14.1: enabled 0
667 03:43:18.201852 PCI: 00:14.2: enabled 1
668 03:43:18.205418 PCI: 00:14.3: enabled 1
669 03:43:18.205990 PCI: 00:15.0: enabled 1
670 03:43:18.208054 PCI: 00:15.1: enabled 1
671 03:43:18.211754 PCI: 00:15.2: enabled 1
672 03:43:18.215366 PCI: 00:15.3: enabled 1
673 03:43:18.215933 PCI: 00:16.0: enabled 1
674 03:43:18.218533 PCI: 00:16.1: enabled 0
675 03:43:18.221489 PCI: 00:16.2: enabled 0
676 03:43:18.221966 PCI: 00:16.3: enabled 0
677 03:43:18.224773 PCI: 00:16.4: enabled 0
678 03:43:18.228535 PCI: 00:16.5: enabled 0
679 03:43:18.231991 PCI: 00:17.0: enabled 1
680 03:43:18.232564 PCI: 00:19.0: enabled 0
681 03:43:18.235342 PCI: 00:19.1: enabled 1
682 03:43:18.238470 PCI: 00:19.2: enabled 0
683 03:43:18.241086 PCI: 00:1c.0: enabled 1
684 03:43:18.241562 PCI: 00:1c.1: enabled 0
685 03:43:18.244749 PCI: 00:1c.2: enabled 0
686 03:43:18.248270 PCI: 00:1c.3: enabled 0
687 03:43:18.251275 PCI: 00:1c.4: enabled 0
688 03:43:18.251752 PCI: 00:1c.5: enabled 0
689 03:43:18.254935 PCI: 00:1c.6: enabled 1
690 03:43:18.258238 PCI: 00:1c.7: enabled 0
691 03:43:18.261599 PCI: 00:1d.0: enabled 1
692 03:43:18.262165 PCI: 00:1d.1: enabled 0
693 03:43:18.264763 PCI: 00:1d.2: enabled 1
694 03:43:18.268148 PCI: 00:1d.3: enabled 0
695 03:43:18.268713 PCI: 00:1e.0: enabled 1
696 03:43:18.271596 PCI: 00:1e.1: enabled 0
697 03:43:18.274707 PCI: 00:1e.2: enabled 1
698 03:43:18.278054 PCI: 00:1e.3: enabled 1
699 03:43:18.278535 PCI: 00:1f.0: enabled 1
700 03:43:18.281548 PCI: 00:1f.1: enabled 0
701 03:43:18.284307 PCI: 00:1f.2: enabled 1
702 03:43:18.287940 PCI: 00:1f.3: enabled 1
703 03:43:18.288416 PCI: 00:1f.4: enabled 0
704 03:43:18.291959 PCI: 00:1f.5: enabled 1
705 03:43:18.294907 PCI: 00:1f.6: enabled 0
706 03:43:18.298185 PCI: 00:1f.7: enabled 0
707 03:43:18.298719 APIC: 00: enabled 1
708 03:43:18.301472 GENERIC: 0.0: enabled 1
709 03:43:18.304412 GENERIC: 0.0: enabled 1
710 03:43:18.304887 GENERIC: 1.0: enabled 1
711 03:43:18.307526 GENERIC: 0.0: enabled 1
712 03:43:18.310725 GENERIC: 1.0: enabled 1
713 03:43:18.314392 USB0 port 0: enabled 1
714 03:43:18.315031 GENERIC: 0.0: enabled 1
715 03:43:18.317889 USB0 port 0: enabled 1
716 03:43:18.321305 GENERIC: 0.0: enabled 1
717 03:43:18.321868 I2C: 00:1a: enabled 1
718 03:43:18.324376 I2C: 00:31: enabled 1
719 03:43:18.327823 I2C: 00:32: enabled 1
720 03:43:18.328392 I2C: 00:10: enabled 1
721 03:43:18.331239 I2C: 00:15: enabled 1
722 03:43:18.334705 GENERIC: 0.0: enabled 0
723 03:43:18.337710 GENERIC: 1.0: enabled 0
724 03:43:18.338184 GENERIC: 0.0: enabled 1
725 03:43:18.340554 SPI: 00: enabled 1
726 03:43:18.343915 SPI: 00: enabled 1
727 03:43:18.344386 PNP: 0c09.0: enabled 1
728 03:43:18.347636 GENERIC: 0.0: enabled 1
729 03:43:18.350785 USB3 port 0: enabled 1
730 03:43:18.351263 USB3 port 1: enabled 1
731 03:43:18.354510 USB3 port 2: enabled 0
732 03:43:18.357746 USB3 port 3: enabled 0
733 03:43:18.360771 USB2 port 0: enabled 0
734 03:43:18.361250 USB2 port 1: enabled 1
735 03:43:18.363767 USB2 port 2: enabled 1
736 03:43:18.367476 USB2 port 3: enabled 0
737 03:43:18.367951 USB2 port 4: enabled 1
738 03:43:18.371204 USB2 port 5: enabled 0
739 03:43:18.374457 USB2 port 6: enabled 0
740 03:43:18.375084 USB2 port 7: enabled 0
741 03:43:18.377460 USB2 port 8: enabled 0
742 03:43:18.380479 USB2 port 9: enabled 0
743 03:43:18.384318 USB3 port 0: enabled 0
744 03:43:18.384899 USB3 port 1: enabled 1
745 03:43:18.387179 USB3 port 2: enabled 0
746 03:43:18.390440 USB3 port 3: enabled 0
747 03:43:18.390966 GENERIC: 0.0: enabled 1
748 03:43:18.394020 GENERIC: 1.0: enabled 1
749 03:43:18.397251 APIC: 01: enabled 1
750 03:43:18.397731 APIC: 03: enabled 1
751 03:43:18.400886 APIC: 05: enabled 1
752 03:43:18.403903 APIC: 06: enabled 1
753 03:43:18.404473 APIC: 02: enabled 1
754 03:43:18.407076 APIC: 04: enabled 1
755 03:43:18.410792 APIC: 07: enabled 1
756 03:43:18.411355 Compare with tree...
757 03:43:18.413877 Root Device: enabled 1
758 03:43:18.416820 DOMAIN: 0000: enabled 1
759 03:43:18.417296 PCI: 00:00.0: enabled 1
760 03:43:18.420177 PCI: 00:02.0: enabled 1
761 03:43:18.423410 PCI: 00:04.0: enabled 1
762 03:43:18.427024 GENERIC: 0.0: enabled 1
763 03:43:18.430708 PCI: 00:05.0: enabled 1
764 03:43:18.431283 PCI: 00:06.0: enabled 0
765 03:43:18.433752 PCI: 00:07.0: enabled 0
766 03:43:18.436885 GENERIC: 0.0: enabled 1
767 03:43:18.440415 PCI: 00:07.1: enabled 0
768 03:43:18.443458 GENERIC: 1.0: enabled 1
769 03:43:18.447315 PCI: 00:07.2: enabled 0
770 03:43:18.447881 GENERIC: 0.0: enabled 1
771 03:43:18.450166 PCI: 00:07.3: enabled 0
772 03:43:18.453577 GENERIC: 1.0: enabled 1
773 03:43:18.456952 PCI: 00:08.0: enabled 1
774 03:43:18.459879 PCI: 00:09.0: enabled 0
775 03:43:18.460355 PCI: 00:0a.0: enabled 0
776 03:43:18.463780 PCI: 00:0d.0: enabled 1
777 03:43:18.466902 USB0 port 0: enabled 1
778 03:43:18.470212 USB3 port 0: enabled 1
779 03:43:18.473459 USB3 port 1: enabled 1
780 03:43:18.474030 USB3 port 2: enabled 0
781 03:43:18.476951 USB3 port 3: enabled 0
782 03:43:18.480468 PCI: 00:0d.1: enabled 0
783 03:43:18.483942 PCI: 00:0d.2: enabled 0
784 03:43:18.487025 GENERIC: 0.0: enabled 1
785 03:43:18.487596 PCI: 00:0d.3: enabled 0
786 03:43:18.490125 PCI: 00:0e.0: enabled 0
787 03:43:18.493402 PCI: 00:10.2: enabled 1
788 03:43:18.496630 PCI: 00:10.6: enabled 0
789 03:43:18.500154 PCI: 00:10.7: enabled 0
790 03:43:18.500638 PCI: 00:12.0: enabled 0
791 03:43:18.503890 PCI: 00:12.6: enabled 0
792 03:43:18.506845 PCI: 00:13.0: enabled 0
793 03:43:18.509990 PCI: 00:14.0: enabled 1
794 03:43:18.513628 USB0 port 0: enabled 1
795 03:43:18.514199 USB2 port 0: enabled 0
796 03:43:18.516527 USB2 port 1: enabled 1
797 03:43:18.520292 USB2 port 2: enabled 1
798 03:43:18.523376 USB2 port 3: enabled 0
799 03:43:18.526539 USB2 port 4: enabled 1
800 03:43:18.530472 USB2 port 5: enabled 0
801 03:43:18.531089 USB2 port 6: enabled 0
802 03:43:18.533344 USB2 port 7: enabled 0
803 03:43:18.536842 USB2 port 8: enabled 0
804 03:43:18.540082 USB2 port 9: enabled 0
805 03:43:18.543309 USB3 port 0: enabled 0
806 03:43:18.543875 USB3 port 1: enabled 1
807 03:43:18.546353 USB3 port 2: enabled 0
808 03:43:18.549823 USB3 port 3: enabled 0
809 03:43:18.553252 PCI: 00:14.1: enabled 0
810 03:43:18.556585 PCI: 00:14.2: enabled 1
811 03:43:18.559598 PCI: 00:14.3: enabled 1
812 03:43:18.560169 GENERIC: 0.0: enabled 1
813 03:43:18.563088 PCI: 00:15.0: enabled 1
814 03:43:18.565919 I2C: 00:1a: enabled 1
815 03:43:18.569716 I2C: 00:31: enabled 1
816 03:43:18.570193 I2C: 00:32: enabled 1
817 03:43:18.572457 PCI: 00:15.1: enabled 1
818 03:43:18.575505 I2C: 00:10: enabled 1
819 03:43:18.579062 PCI: 00:15.2: enabled 1
820 03:43:18.582395 PCI: 00:15.3: enabled 1
821 03:43:18.582558 PCI: 00:16.0: enabled 1
822 03:43:18.585917 PCI: 00:16.1: enabled 0
823 03:43:18.588983 PCI: 00:16.2: enabled 0
824 03:43:18.592448 PCI: 00:16.3: enabled 0
825 03:43:18.595701 PCI: 00:16.4: enabled 0
826 03:43:18.595853 PCI: 00:16.5: enabled 0
827 03:43:18.598803 PCI: 00:17.0: enabled 1
828 03:43:18.602177 PCI: 00:19.0: enabled 0
829 03:43:18.605693 PCI: 00:19.1: enabled 1
830 03:43:18.609182 I2C: 00:15: enabled 1
831 03:43:18.609385 PCI: 00:19.2: enabled 0
832 03:43:18.612019 PCI: 00:1d.0: enabled 1
833 03:43:18.615822 GENERIC: 0.0: enabled 1
834 03:43:18.618926 PCI: 00:1e.0: enabled 1
835 03:43:18.622219 PCI: 00:1e.1: enabled 0
836 03:43:18.622457 PCI: 00:1e.2: enabled 1
837 03:43:18.625473 SPI: 00: enabled 1
838 03:43:18.628757 PCI: 00:1e.3: enabled 1
839 03:43:18.632042 SPI: 00: enabled 1
840 03:43:18.632334 PCI: 00:1f.0: enabled 1
841 03:43:18.635185 PNP: 0c09.0: enabled 1
842 03:43:18.639104 PCI: 00:1f.1: enabled 0
843 03:43:18.642251 PCI: 00:1f.2: enabled 1
844 03:43:18.646141 GENERIC: 0.0: enabled 1
845 03:43:18.646681 GENERIC: 0.0: enabled 1
846 03:43:18.697294 GENERIC: 1.0: enabled 1
847 03:43:18.697994 PCI: 00:1f.3: enabled 1
848 03:43:18.698831 PCI: 00:1f.4: enabled 0
849 03:43:18.699230 PCI: 00:1f.5: enabled 1
850 03:43:18.699584 PCI: 00:1f.6: enabled 0
851 03:43:18.699925 PCI: 00:1f.7: enabled 0
852 03:43:18.700254 CPU_CLUSTER: 0: enabled 1
853 03:43:18.700575 APIC: 00: enabled 1
854 03:43:18.700893 APIC: 01: enabled 1
855 03:43:18.701208 APIC: 03: enabled 1
856 03:43:18.701520 APIC: 05: enabled 1
857 03:43:18.701831 APIC: 06: enabled 1
858 03:43:18.702203 APIC: 02: enabled 1
859 03:43:18.702528 APIC: 04: enabled 1
860 03:43:18.702921 APIC: 07: enabled 1
861 03:43:18.703237 Root Device scanning...
862 03:43:18.703548 scan_static_bus for Root Device
863 03:43:18.703856 DOMAIN: 0000 enabled
864 03:43:18.704161 CPU_CLUSTER: 0 enabled
865 03:43:18.704464 DOMAIN: 0000 scanning...
866 03:43:18.707372 PCI: pci_scan_bus for bus 00
867 03:43:18.707846 PCI: 00:00.0 [8086/0000] ops
868 03:43:18.710657 PCI: 00:00.0 [8086/9a12] enabled
869 03:43:18.711243 PCI: 00:02.0 [8086/0000] bus ops
870 03:43:18.714025 PCI: 00:02.0 [8086/9a40] enabled
871 03:43:18.717459 PCI: 00:04.0 [8086/0000] bus ops
872 03:43:18.721977 PCI: 00:04.0 [8086/9a03] enabled
873 03:43:18.726130 PCI: 00:05.0 [8086/9a19] enabled
874 03:43:18.726546 PCI: 00:07.0 [0000/0000] hidden
875 03:43:18.728897 PCI: 00:08.0 [8086/9a11] enabled
876 03:43:18.735507 PCI: 00:0a.0 [8086/9a0d] disabled
877 03:43:18.738833 PCI: 00:0d.0 [8086/0000] bus ops
878 03:43:18.742273 PCI: 00:0d.0 [8086/9a13] enabled
879 03:43:18.745388 PCI: 00:14.0 [8086/0000] bus ops
880 03:43:18.748893 PCI: 00:14.0 [8086/a0ed] enabled
881 03:43:18.751978 PCI: 00:14.2 [8086/a0ef] enabled
882 03:43:18.755995 PCI: 00:14.3 [8086/0000] bus ops
883 03:43:18.758811 PCI: 00:14.3 [8086/a0f0] enabled
884 03:43:18.762127 PCI: 00:15.0 [8086/0000] bus ops
885 03:43:18.765727 PCI: 00:15.0 [8086/a0e8] enabled
886 03:43:18.768808 PCI: 00:15.1 [8086/0000] bus ops
887 03:43:18.772181 PCI: 00:15.1 [8086/a0e9] enabled
888 03:43:18.775629 PCI: 00:15.2 [8086/0000] bus ops
889 03:43:18.779281 PCI: 00:15.2 [8086/a0ea] enabled
890 03:43:18.782500 PCI: 00:15.3 [8086/0000] bus ops
891 03:43:18.785505 PCI: 00:15.3 [8086/a0eb] enabled
892 03:43:18.786076 PCI: 00:16.0 [8086/0000] ops
893 03:43:18.789010 PCI: 00:16.0 [8086/a0e0] enabled
894 03:43:18.795594 PCI: Static device PCI: 00:17.0 not found, disabling it.
895 03:43:18.798578 PCI: 00:19.0 [8086/0000] bus ops
896 03:43:18.801863 PCI: 00:19.0 [8086/a0c5] disabled
897 03:43:18.805163 PCI: 00:19.1 [8086/0000] bus ops
898 03:43:18.808260 PCI: 00:19.1 [8086/a0c6] enabled
899 03:43:18.811619 PCI: 00:1d.0 [8086/0000] bus ops
900 03:43:18.814991 PCI: 00:1d.0 [8086/a0b0] enabled
901 03:43:18.818416 PCI: 00:1e.0 [8086/0000] ops
902 03:43:18.822061 PCI: 00:1e.0 [8086/a0a8] enabled
903 03:43:18.824927 PCI: 00:1e.2 [8086/0000] bus ops
904 03:43:18.828510 PCI: 00:1e.2 [8086/a0aa] enabled
905 03:43:18.831572 PCI: 00:1e.3 [8086/0000] bus ops
906 03:43:18.834746 PCI: 00:1e.3 [8086/a0ab] enabled
907 03:43:18.838263 PCI: 00:1f.0 [8086/0000] bus ops
908 03:43:18.841132 PCI: 00:1f.0 [8086/a087] enabled
909 03:43:18.844670 RTC Init
910 03:43:18.848240 Set power on after power failure.
911 03:43:18.848779 Disabling Deep S3
912 03:43:18.851440 Disabling Deep S3
913 03:43:18.851867 Disabling Deep S4
914 03:43:18.854485 Disabling Deep S4
915 03:43:18.858189 Disabling Deep S5
916 03:43:18.858777 Disabling Deep S5
917 03:43:18.861315 PCI: 00:1f.2 [0000/0000] hidden
918 03:43:18.864536 PCI: 00:1f.3 [8086/0000] bus ops
919 03:43:18.867709 PCI: 00:1f.3 [8086/a0c8] enabled
920 03:43:18.871416 PCI: 00:1f.5 [8086/0000] bus ops
921 03:43:18.875565 PCI: 00:1f.5 [8086/a0a4] enabled
922 03:43:18.878233 PCI: Leftover static devices:
923 03:43:18.879012 PCI: 00:10.2
924 03:43:18.881133 PCI: 00:10.6
925 03:43:18.881558 PCI: 00:10.7
926 03:43:18.884653 PCI: 00:06.0
927 03:43:18.885086 PCI: 00:07.1
928 03:43:18.885431 PCI: 00:07.2
929 03:43:18.887869 PCI: 00:07.3
930 03:43:18.888520 PCI: 00:09.0
931 03:43:18.891195 PCI: 00:0d.1
932 03:43:18.891619 PCI: 00:0d.2
933 03:43:18.894679 PCI: 00:0d.3
934 03:43:18.895105 PCI: 00:0e.0
935 03:43:18.895441 PCI: 00:12.0
936 03:43:18.897955 PCI: 00:12.6
937 03:43:18.898461 PCI: 00:13.0
938 03:43:18.901071 PCI: 00:14.1
939 03:43:18.901490 PCI: 00:16.1
940 03:43:18.901823 PCI: 00:16.2
941 03:43:18.904401 PCI: 00:16.3
942 03:43:18.904818 PCI: 00:16.4
943 03:43:18.907418 PCI: 00:16.5
944 03:43:18.907839 PCI: 00:17.0
945 03:43:18.908174 PCI: 00:19.2
946 03:43:18.910876 PCI: 00:1e.1
947 03:43:18.911375 PCI: 00:1f.1
948 03:43:18.914500 PCI: 00:1f.4
949 03:43:18.914967 PCI: 00:1f.6
950 03:43:18.917574 PCI: 00:1f.7
951 03:43:18.918004 PCI: Check your devicetree.cb.
952 03:43:18.921087 PCI: 00:02.0 scanning...
953 03:43:18.923914 scan_generic_bus for PCI: 00:02.0
954 03:43:18.930743 scan_generic_bus for PCI: 00:02.0 done
955 03:43:18.934447 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
956 03:43:18.937322 PCI: 00:04.0 scanning...
957 03:43:18.940863 scan_generic_bus for PCI: 00:04.0
958 03:43:18.943767 GENERIC: 0.0 enabled
959 03:43:18.947761 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
960 03:43:18.954131 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
961 03:43:18.956853 PCI: 00:0d.0 scanning...
962 03:43:18.960614 scan_static_bus for PCI: 00:0d.0
963 03:43:18.961164 USB0 port 0 enabled
964 03:43:18.963717 USB0 port 0 scanning...
965 03:43:18.967497 scan_static_bus for USB0 port 0
966 03:43:18.971089 USB3 port 0 enabled
967 03:43:18.971658 USB3 port 1 enabled
968 03:43:18.974082 USB3 port 2 disabled
969 03:43:18.977256 USB3 port 3 disabled
970 03:43:18.977839 USB3 port 0 scanning...
971 03:43:18.980563 scan_static_bus for USB3 port 0
972 03:43:18.984176 scan_static_bus for USB3 port 0 done
973 03:43:18.990764 scan_bus: bus USB3 port 0 finished in 6 msecs
974 03:43:18.994041 USB3 port 1 scanning...
975 03:43:18.997098 scan_static_bus for USB3 port 1
976 03:43:19.000154 scan_static_bus for USB3 port 1 done
977 03:43:19.003414 scan_bus: bus USB3 port 1 finished in 6 msecs
978 03:43:19.007461 scan_static_bus for USB0 port 0 done
979 03:43:19.013308 scan_bus: bus USB0 port 0 finished in 43 msecs
980 03:43:19.016568 scan_static_bus for PCI: 00:0d.0 done
981 03:43:19.020028 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
982 03:43:19.023399 PCI: 00:14.0 scanning...
983 03:43:19.026822 scan_static_bus for PCI: 00:14.0
984 03:43:19.030313 USB0 port 0 enabled
985 03:43:19.030931 USB0 port 0 scanning...
986 03:43:19.033396 scan_static_bus for USB0 port 0
987 03:43:19.036701 USB2 port 0 disabled
988 03:43:19.040400 USB2 port 1 enabled
989 03:43:19.040982 USB2 port 2 enabled
990 03:43:19.043261 USB2 port 3 disabled
991 03:43:19.046528 USB2 port 4 enabled
992 03:43:19.047033 USB2 port 5 disabled
993 03:43:19.050552 USB2 port 6 disabled
994 03:43:19.053584 USB2 port 7 disabled
995 03:43:19.054058 USB2 port 8 disabled
996 03:43:19.057231 USB2 port 9 disabled
997 03:43:19.059868 USB3 port 0 disabled
998 03:43:19.060340 USB3 port 1 enabled
999 03:43:19.063636 USB3 port 2 disabled
1000 03:43:19.064199 USB3 port 3 disabled
1001 03:43:19.066999 USB2 port 1 scanning...
1002 03:43:19.069965 scan_static_bus for USB2 port 1
1003 03:43:19.074090 scan_static_bus for USB2 port 1 done
1004 03:43:19.080042 scan_bus: bus USB2 port 1 finished in 6 msecs
1005 03:43:19.080623 USB2 port 2 scanning...
1006 03:43:19.083265 scan_static_bus for USB2 port 2
1007 03:43:19.089983 scan_static_bus for USB2 port 2 done
1008 03:43:19.093344 scan_bus: bus USB2 port 2 finished in 6 msecs
1009 03:43:19.096742 USB2 port 4 scanning...
1010 03:43:19.100119 scan_static_bus for USB2 port 4
1011 03:43:19.103483 scan_static_bus for USB2 port 4 done
1012 03:43:19.106854 scan_bus: bus USB2 port 4 finished in 6 msecs
1013 03:43:19.110135 USB3 port 1 scanning...
1014 03:43:19.113223 scan_static_bus for USB3 port 1
1015 03:43:19.116231 scan_static_bus for USB3 port 1 done
1016 03:43:19.123265 scan_bus: bus USB3 port 1 finished in 6 msecs
1017 03:43:19.126408 scan_static_bus for USB0 port 0 done
1018 03:43:19.130214 scan_bus: bus USB0 port 0 finished in 93 msecs
1019 03:43:19.133258 scan_static_bus for PCI: 00:14.0 done
1020 03:43:19.140049 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1021 03:43:19.140620 PCI: 00:14.3 scanning...
1022 03:43:19.143196 scan_static_bus for PCI: 00:14.3
1023 03:43:19.146466 GENERIC: 0.0 enabled
1024 03:43:19.150040 scan_static_bus for PCI: 00:14.3 done
1025 03:43:19.156918 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1026 03:43:19.157635 PCI: 00:15.0 scanning...
1027 03:43:19.159856 scan_static_bus for PCI: 00:15.0
1028 03:43:19.163218 I2C: 00:1a enabled
1029 03:43:19.166659 I2C: 00:31 enabled
1030 03:43:19.167241 I2C: 00:32 enabled
1031 03:43:19.170119 scan_static_bus for PCI: 00:15.0 done
1032 03:43:19.177109 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1033 03:43:19.180378 PCI: 00:15.1 scanning...
1034 03:43:19.183278 scan_static_bus for PCI: 00:15.1
1035 03:43:19.183900 I2C: 00:10 enabled
1036 03:43:19.186844 scan_static_bus for PCI: 00:15.1 done
1037 03:43:19.193238 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1038 03:43:19.196503 PCI: 00:15.2 scanning...
1039 03:43:19.199337 scan_static_bus for PCI: 00:15.2
1040 03:43:19.202825 scan_static_bus for PCI: 00:15.2 done
1041 03:43:19.206175 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1042 03:43:19.209984 PCI: 00:15.3 scanning...
1043 03:43:19.212845 scan_static_bus for PCI: 00:15.3
1044 03:43:19.216306 scan_static_bus for PCI: 00:15.3 done
1045 03:43:19.223031 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1046 03:43:19.223604 PCI: 00:19.1 scanning...
1047 03:43:19.225831 scan_static_bus for PCI: 00:19.1
1048 03:43:19.229392 I2C: 00:15 enabled
1049 03:43:19.232716 scan_static_bus for PCI: 00:19.1 done
1050 03:43:19.239095 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1051 03:43:19.239658 PCI: 00:1d.0 scanning...
1052 03:43:19.246446 do_pci_scan_bridge for PCI: 00:1d.0
1053 03:43:19.247059 PCI: pci_scan_bus for bus 01
1054 03:43:19.249474 PCI: 01:00.0 [15b7/5009] enabled
1055 03:43:19.252739 GENERIC: 0.0 enabled
1056 03:43:19.256270 Enabling Common Clock Configuration
1057 03:43:19.262586 L1 Sub-State supported from root port 29
1058 03:43:19.263190 L1 Sub-State Support = 0x5
1059 03:43:19.265887 CommonModeRestoreTime = 0x28
1060 03:43:19.272123 Power On Value = 0x16, Power On Scale = 0x0
1061 03:43:19.272680 ASPM: Enabled L1
1062 03:43:19.275821 PCIe: Max_Payload_Size adjusted to 128
1063 03:43:19.282421 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1064 03:43:19.285862 PCI: 00:1e.2 scanning...
1065 03:43:19.289238 scan_generic_bus for PCI: 00:1e.2
1066 03:43:19.289807 SPI: 00 enabled
1067 03:43:19.295624 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1068 03:43:19.299816 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1069 03:43:19.303215 PCI: 00:1e.3 scanning...
1070 03:43:19.306135 scan_generic_bus for PCI: 00:1e.3
1071 03:43:19.310097 SPI: 00 enabled
1072 03:43:19.312994 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1073 03:43:19.319722 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1074 03:43:19.323251 PCI: 00:1f.0 scanning...
1075 03:43:19.326334 scan_static_bus for PCI: 00:1f.0
1076 03:43:19.326931 PNP: 0c09.0 enabled
1077 03:43:19.329458 PNP: 0c09.0 scanning...
1078 03:43:19.333173 scan_static_bus for PNP: 0c09.0
1079 03:43:19.336571 scan_static_bus for PNP: 0c09.0 done
1080 03:43:19.342978 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1081 03:43:19.346103 scan_static_bus for PCI: 00:1f.0 done
1082 03:43:19.349491 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1083 03:43:19.352617 PCI: 00:1f.2 scanning...
1084 03:43:19.355845 scan_static_bus for PCI: 00:1f.2
1085 03:43:19.359838 GENERIC: 0.0 enabled
1086 03:43:19.360417 GENERIC: 0.0 scanning...
1087 03:43:19.362734 scan_static_bus for GENERIC: 0.0
1088 03:43:19.366291 GENERIC: 0.0 enabled
1089 03:43:19.369828 GENERIC: 1.0 enabled
1090 03:43:19.372678 scan_static_bus for GENERIC: 0.0 done
1091 03:43:19.376234 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1092 03:43:19.382687 scan_static_bus for PCI: 00:1f.2 done
1093 03:43:19.385799 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1094 03:43:19.389487 PCI: 00:1f.3 scanning...
1095 03:43:19.392338 scan_static_bus for PCI: 00:1f.3
1096 03:43:19.395815 scan_static_bus for PCI: 00:1f.3 done
1097 03:43:19.399402 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1098 03:43:19.402349 PCI: 00:1f.5 scanning...
1099 03:43:19.405741 scan_generic_bus for PCI: 00:1f.5
1100 03:43:19.409213 scan_generic_bus for PCI: 00:1f.5 done
1101 03:43:19.415370 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1102 03:43:19.419266 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1103 03:43:19.422247 scan_static_bus for Root Device done
1104 03:43:19.428948 scan_bus: bus Root Device finished in 735 msecs
1105 03:43:19.429506 done
1106 03:43:19.436600 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1107 03:43:19.438836 Chrome EC: UHEPI supported
1108 03:43:19.445786 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1109 03:43:19.452073 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1110 03:43:19.455468 SPI flash protection: WPSW=1 SRP0=0
1111 03:43:19.461886 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1112 03:43:19.465380 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1113 03:43:19.468698 found VGA at PCI: 00:02.0
1114 03:43:19.471988 Setting up VGA for PCI: 00:02.0
1115 03:43:19.478686 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1116 03:43:19.481512 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1117 03:43:19.485303 Allocating resources...
1118 03:43:19.488449 Reading resources...
1119 03:43:19.491326 Root Device read_resources bus 0 link: 0
1120 03:43:19.494797 DOMAIN: 0000 read_resources bus 0 link: 0
1121 03:43:19.501763 PCI: 00:04.0 read_resources bus 1 link: 0
1122 03:43:19.504581 PCI: 00:04.0 read_resources bus 1 link: 0 done
1123 03:43:19.511164 PCI: 00:0d.0 read_resources bus 0 link: 0
1124 03:43:19.514311 USB0 port 0 read_resources bus 0 link: 0
1125 03:43:19.521553 USB0 port 0 read_resources bus 0 link: 0 done
1126 03:43:19.524616 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1127 03:43:19.531455 PCI: 00:14.0 read_resources bus 0 link: 0
1128 03:43:19.534830 USB0 port 0 read_resources bus 0 link: 0
1129 03:43:19.541446 USB0 port 0 read_resources bus 0 link: 0 done
1130 03:43:19.544468 PCI: 00:14.0 read_resources bus 0 link: 0 done
1131 03:43:19.551086 PCI: 00:14.3 read_resources bus 0 link: 0
1132 03:43:19.554589 PCI: 00:14.3 read_resources bus 0 link: 0 done
1133 03:43:19.557521 PCI: 00:15.0 read_resources bus 0 link: 0
1134 03:43:19.565132 PCI: 00:15.0 read_resources bus 0 link: 0 done
1135 03:43:19.568486 PCI: 00:15.1 read_resources bus 0 link: 0
1136 03:43:19.575243 PCI: 00:15.1 read_resources bus 0 link: 0 done
1137 03:43:19.578792 PCI: 00:19.1 read_resources bus 0 link: 0
1138 03:43:19.584971 PCI: 00:19.1 read_resources bus 0 link: 0 done
1139 03:43:19.588444 PCI: 00:1d.0 read_resources bus 1 link: 0
1140 03:43:19.595227 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1141 03:43:19.598174 PCI: 00:1e.2 read_resources bus 2 link: 0
1142 03:43:19.604950 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1143 03:43:19.608688 PCI: 00:1e.3 read_resources bus 3 link: 0
1144 03:43:19.615111 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1145 03:43:19.618194 PCI: 00:1f.0 read_resources bus 0 link: 0
1146 03:43:19.625100 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1147 03:43:19.628845 PCI: 00:1f.2 read_resources bus 0 link: 0
1148 03:43:19.631847 GENERIC: 0.0 read_resources bus 0 link: 0
1149 03:43:19.638885 GENERIC: 0.0 read_resources bus 0 link: 0 done
1150 03:43:19.642234 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1151 03:43:19.649301 DOMAIN: 0000 read_resources bus 0 link: 0 done
1152 03:43:19.652263 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1153 03:43:19.659647 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1154 03:43:19.662209 Root Device read_resources bus 0 link: 0 done
1155 03:43:19.665627 Done reading resources.
1156 03:43:19.672615 Show resources in subtree (Root Device)...After reading.
1157 03:43:19.675433 Root Device child on link 0 DOMAIN: 0000
1158 03:43:19.678943 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1159 03:43:19.688658 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1160 03:43:19.698711 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1161 03:43:19.701665 PCI: 00:00.0
1162 03:43:19.712117 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1163 03:43:19.718609 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1164 03:43:19.728216 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1165 03:43:19.738347 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1166 03:43:19.748674 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1167 03:43:19.758783 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1168 03:43:19.768538 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1169 03:43:19.774811 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1170 03:43:19.784574 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1171 03:43:19.794675 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1172 03:43:19.804370 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1173 03:43:19.815100 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1174 03:43:19.824770 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1175 03:43:19.830902 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1176 03:43:19.841249 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1177 03:43:19.851465 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1178 03:43:19.861232 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1179 03:43:19.871153 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1180 03:43:19.881300 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1181 03:43:19.887248 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1182 03:43:19.890555 PCI: 00:02.0
1183 03:43:19.901344 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1184 03:43:19.910847 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1185 03:43:19.920803 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1186 03:43:19.923946 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1187 03:43:19.934056 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1188 03:43:19.937672 GENERIC: 0.0
1189 03:43:19.938248 PCI: 00:05.0
1190 03:43:19.947263 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1191 03:43:19.953693 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1192 03:43:19.954165 GENERIC: 0.0
1193 03:43:19.957204 PCI: 00:08.0
1194 03:43:19.967449 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 03:43:19.968017 PCI: 00:0a.0
1196 03:43:19.970518 PCI: 00:0d.0 child on link 0 USB0 port 0
1197 03:43:19.980341 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1198 03:43:19.987098 USB0 port 0 child on link 0 USB3 port 0
1199 03:43:19.987570 USB3 port 0
1200 03:43:19.990241 USB3 port 1
1201 03:43:19.990748 USB3 port 2
1202 03:43:19.993520 USB3 port 3
1203 03:43:19.997080 PCI: 00:14.0 child on link 0 USB0 port 0
1204 03:43:20.006585 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1205 03:43:20.013758 USB0 port 0 child on link 0 USB2 port 0
1206 03:43:20.014340 USB2 port 0
1207 03:43:20.016878 USB2 port 1
1208 03:43:20.017463 USB2 port 2
1209 03:43:20.020558 USB2 port 3
1210 03:43:20.021026 USB2 port 4
1211 03:43:20.023536 USB2 port 5
1212 03:43:20.024002 USB2 port 6
1213 03:43:20.026694 USB2 port 7
1214 03:43:20.027166 USB2 port 8
1215 03:43:20.030106 USB2 port 9
1216 03:43:20.030572 USB3 port 0
1217 03:43:20.033701 USB3 port 1
1218 03:43:20.036713 USB3 port 2
1219 03:43:20.037175 USB3 port 3
1220 03:43:20.040021 PCI: 00:14.2
1221 03:43:20.050056 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1222 03:43:20.059891 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1223 03:43:20.063137 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1224 03:43:20.073364 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1225 03:43:20.073930 GENERIC: 0.0
1226 03:43:20.079731 PCI: 00:15.0 child on link 0 I2C: 00:1a
1227 03:43:20.090022 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1228 03:43:20.090586 I2C: 00:1a
1229 03:43:20.093110 I2C: 00:31
1230 03:43:20.093659 I2C: 00:32
1231 03:43:20.099791 PCI: 00:15.1 child on link 0 I2C: 00:10
1232 03:43:20.109498 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1233 03:43:20.110033 I2C: 00:10
1234 03:43:20.110410 PCI: 00:15.2
1235 03:43:20.119763 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1236 03:43:20.122920 PCI: 00:15.3
1237 03:43:20.133284 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1238 03:43:20.136311 PCI: 00:16.0
1239 03:43:20.146349 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1240 03:43:20.146948 PCI: 00:19.0
1241 03:43:20.150033 PCI: 00:19.1 child on link 0 I2C: 00:15
1242 03:43:20.159285 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 03:43:20.162774 I2C: 00:15
1244 03:43:20.166425 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1245 03:43:20.175988 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1246 03:43:20.186133 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1247 03:43:20.195362 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1248 03:43:20.195911 GENERIC: 0.0
1249 03:43:20.198943 PCI: 01:00.0
1250 03:43:20.208974 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1251 03:43:20.218454 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1252 03:43:20.218955 PCI: 00:1e.0
1253 03:43:20.228308 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1254 03:43:20.235466 PCI: 00:1e.2 child on link 0 SPI: 00
1255 03:43:20.245687 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1256 03:43:20.246262 SPI: 00
1257 03:43:20.248298 PCI: 00:1e.3 child on link 0 SPI: 00
1258 03:43:20.259322 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1259 03:43:20.261705 SPI: 00
1260 03:43:20.265314 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1261 03:43:20.275474 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1262 03:43:20.276047 PNP: 0c09.0
1263 03:43:20.285408 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1264 03:43:20.288551 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1265 03:43:20.298541 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1266 03:43:20.307832 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1267 03:43:20.311455 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1268 03:43:20.314594 GENERIC: 0.0
1269 03:43:20.315097 GENERIC: 1.0
1270 03:43:20.318561 PCI: 00:1f.3
1271 03:43:20.327912 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1272 03:43:20.338228 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1273 03:43:20.338819 PCI: 00:1f.5
1274 03:43:20.348168 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1275 03:43:20.351319 CPU_CLUSTER: 0 child on link 0 APIC: 00
1276 03:43:20.354842 APIC: 00
1277 03:43:20.355401 APIC: 01
1278 03:43:20.355773 APIC: 03
1279 03:43:20.358258 APIC: 05
1280 03:43:20.358846 APIC: 06
1281 03:43:20.361453 APIC: 02
1282 03:43:20.362006 APIC: 04
1283 03:43:20.362373 APIC: 07
1284 03:43:20.371094 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1285 03:43:20.375039 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1286 03:43:20.381371 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1287 03:43:20.387557 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1288 03:43:20.391263 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1289 03:43:20.397723 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1290 03:43:20.404156 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1291 03:43:20.411185 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1292 03:43:20.417397 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1293 03:43:20.427405 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1294 03:43:20.430888 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1295 03:43:20.440734 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1296 03:43:20.447142 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1297 03:43:20.454131 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1298 03:43:20.457413 DOMAIN: 0000: Resource ranges:
1299 03:43:20.460473 * Base: 1000, Size: 800, Tag: 100
1300 03:43:20.463857 * Base: 1900, Size: e700, Tag: 100
1301 03:43:20.470557 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1302 03:43:20.476604 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1303 03:43:20.483323 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1304 03:43:20.489933 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1305 03:43:20.500178 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1306 03:43:20.506509 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1307 03:43:20.513189 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1308 03:43:20.523103 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1309 03:43:20.529684 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1310 03:43:20.536395 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1311 03:43:20.546256 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1312 03:43:20.553228 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1313 03:43:20.559712 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1314 03:43:20.569941 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1315 03:43:20.576290 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1316 03:43:20.583005 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1317 03:43:20.592620 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1318 03:43:20.599320 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1319 03:43:20.606366 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1320 03:43:20.615714 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1321 03:43:20.622328 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1322 03:43:20.628989 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1323 03:43:20.639222 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1324 03:43:20.645744 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1325 03:43:20.652336 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1326 03:43:20.656243 DOMAIN: 0000: Resource ranges:
1327 03:43:20.662535 * Base: 7fc00000, Size: 40400000, Tag: 200
1328 03:43:20.665908 * Base: d0000000, Size: 28000000, Tag: 200
1329 03:43:20.669221 * Base: fa000000, Size: 1000000, Tag: 200
1330 03:43:20.672227 * Base: fb001000, Size: 2fff000, Tag: 200
1331 03:43:20.678690 * Base: fe010000, Size: 2e000, Tag: 200
1332 03:43:20.682395 * Base: fe03f000, Size: d41000, Tag: 200
1333 03:43:20.685390 * Base: fed88000, Size: 8000, Tag: 200
1334 03:43:20.688894 * Base: fed93000, Size: d000, Tag: 200
1335 03:43:20.695727 * Base: feda2000, Size: 1e000, Tag: 200
1336 03:43:20.698829 * Base: fede0000, Size: 1220000, Tag: 200
1337 03:43:20.702313 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1338 03:43:20.712278 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1339 03:43:20.718464 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1340 03:43:20.725606 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1341 03:43:20.731687 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1342 03:43:20.738554 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1343 03:43:20.745329 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1344 03:43:20.751960 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1345 03:43:20.758167 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1346 03:43:20.765026 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1347 03:43:20.771569 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1348 03:43:20.778097 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1349 03:43:20.784616 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1350 03:43:20.791562 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1351 03:43:20.798127 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1352 03:43:20.805101 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1353 03:43:20.811159 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1354 03:43:20.818022 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1355 03:43:20.824674 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1356 03:43:20.831076 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1357 03:43:20.837852 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1358 03:43:20.844264 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1359 03:43:20.851130 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1360 03:43:20.858329 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1361 03:43:20.864446 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1362 03:43:20.867415 PCI: 00:1d.0: Resource ranges:
1363 03:43:20.870815 * Base: 7fc00000, Size: 100000, Tag: 200
1364 03:43:20.877698 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1365 03:43:20.884254 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1366 03:43:20.894403 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1367 03:43:20.900707 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1368 03:43:20.903858 Root Device assign_resources, bus 0 link: 0
1369 03:43:20.911245 DOMAIN: 0000 assign_resources, bus 0 link: 0
1370 03:43:20.917477 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1371 03:43:20.927465 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1372 03:43:20.933961 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1373 03:43:20.943757 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1374 03:43:20.947478 PCI: 00:04.0 assign_resources, bus 1 link: 0
1375 03:43:20.953842 PCI: 00:04.0 assign_resources, bus 1 link: 0
1376 03:43:20.960241 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1377 03:43:20.970382 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1378 03:43:20.976799 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1379 03:43:20.980149 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1380 03:43:20.986945 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1381 03:43:20.993418 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1382 03:43:21.000271 PCI: 00:14.0 assign_resources, bus 0 link: 0
1383 03:43:21.003492 PCI: 00:14.0 assign_resources, bus 0 link: 0
1384 03:43:21.013241 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1385 03:43:21.020163 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1386 03:43:21.026788 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1387 03:43:21.032795 PCI: 00:14.3 assign_resources, bus 0 link: 0
1388 03:43:21.036956 PCI: 00:14.3 assign_resources, bus 0 link: 0
1389 03:43:21.046302 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1390 03:43:21.049245 PCI: 00:15.0 assign_resources, bus 0 link: 0
1391 03:43:21.055926 PCI: 00:15.0 assign_resources, bus 0 link: 0
1392 03:43:21.062628 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1393 03:43:21.066053 PCI: 00:15.1 assign_resources, bus 0 link: 0
1394 03:43:21.072923 PCI: 00:15.1 assign_resources, bus 0 link: 0
1395 03:43:21.079294 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1396 03:43:21.089174 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1397 03:43:21.096019 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1398 03:43:21.105531 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1399 03:43:21.108955 PCI: 00:19.1 assign_resources, bus 0 link: 0
1400 03:43:21.115699 PCI: 00:19.1 assign_resources, bus 0 link: 0
1401 03:43:21.122098 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1402 03:43:21.132202 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1403 03:43:21.142070 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1404 03:43:21.145014 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1405 03:43:21.155306 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1406 03:43:21.161775 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1407 03:43:21.168381 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1408 03:43:21.174901 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1409 03:43:21.178239 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1410 03:43:21.185230 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1411 03:43:21.191961 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1412 03:43:21.198580 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1413 03:43:21.201724 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1414 03:43:21.208127 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1415 03:43:21.211465 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1416 03:43:21.218286 LPC: Trying to open IO window from 800 size 1ff
1417 03:43:21.224745 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1418 03:43:21.234552 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1419 03:43:21.241094 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1420 03:43:21.244190 DOMAIN: 0000 assign_resources, bus 0 link: 0
1421 03:43:21.251058 Root Device assign_resources, bus 0 link: 0
1422 03:43:21.254473 Done setting resources.
1423 03:43:21.261015 Show resources in subtree (Root Device)...After assigning values.
1424 03:43:21.264132 Root Device child on link 0 DOMAIN: 0000
1425 03:43:21.267845 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1426 03:43:21.277545 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1427 03:43:21.287521 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1428 03:43:21.287608 PCI: 00:00.0
1429 03:43:21.297416 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1430 03:43:21.307431 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1431 03:43:21.317261 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1432 03:43:21.327639 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1433 03:43:21.337605 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1434 03:43:21.344016 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1435 03:43:21.353949 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1436 03:43:21.364277 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1437 03:43:21.373844 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1438 03:43:21.383724 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1439 03:43:21.393739 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1440 03:43:21.400446 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1441 03:43:21.410163 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1442 03:43:21.420307 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1443 03:43:21.430243 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1444 03:43:21.439833 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1445 03:43:21.450520 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1446 03:43:21.456914 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1447 03:43:21.466609 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1448 03:43:21.476548 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1449 03:43:21.479878 PCI: 00:02.0
1450 03:43:21.489607 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1451 03:43:21.499549 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1452 03:43:21.509575 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1453 03:43:21.513079 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1454 03:43:21.522955 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1455 03:43:21.526222 GENERIC: 0.0
1456 03:43:21.526306 PCI: 00:05.0
1457 03:43:21.539541 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1458 03:43:21.542942 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1459 03:43:21.546380 GENERIC: 0.0
1460 03:43:21.546462 PCI: 00:08.0
1461 03:43:21.555704 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1462 03:43:21.559274 PCI: 00:0a.0
1463 03:43:21.562651 PCI: 00:0d.0 child on link 0 USB0 port 0
1464 03:43:21.572526 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1465 03:43:21.575857 USB0 port 0 child on link 0 USB3 port 0
1466 03:43:21.579505 USB3 port 0
1467 03:43:21.582640 USB3 port 1
1468 03:43:21.582743 USB3 port 2
1469 03:43:21.586071 USB3 port 3
1470 03:43:21.589234 PCI: 00:14.0 child on link 0 USB0 port 0
1471 03:43:21.599161 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1472 03:43:21.602489 USB0 port 0 child on link 0 USB2 port 0
1473 03:43:21.606143 USB2 port 0
1474 03:43:21.606231 USB2 port 1
1475 03:43:21.608961 USB2 port 2
1476 03:43:21.612081 USB2 port 3
1477 03:43:21.612183 USB2 port 4
1478 03:43:21.615498 USB2 port 5
1479 03:43:21.615602 USB2 port 6
1480 03:43:21.618901 USB2 port 7
1481 03:43:21.618980 USB2 port 8
1482 03:43:21.622304 USB2 port 9
1483 03:43:21.622384 USB3 port 0
1484 03:43:21.625857 USB3 port 1
1485 03:43:21.625937 USB3 port 2
1486 03:43:21.629309 USB3 port 3
1487 03:43:21.629389 PCI: 00:14.2
1488 03:43:21.639167 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1489 03:43:21.652069 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1490 03:43:21.655956 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1491 03:43:21.665486 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1492 03:43:21.668703 GENERIC: 0.0
1493 03:43:21.671987 PCI: 00:15.0 child on link 0 I2C: 00:1a
1494 03:43:21.681948 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1495 03:43:21.682035 I2C: 00:1a
1496 03:43:21.685028 I2C: 00:31
1497 03:43:21.685134 I2C: 00:32
1498 03:43:21.691992 PCI: 00:15.1 child on link 0 I2C: 00:10
1499 03:43:21.702112 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1500 03:43:21.702196 I2C: 00:10
1501 03:43:21.705386 PCI: 00:15.2
1502 03:43:21.715059 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1503 03:43:21.715146 PCI: 00:15.3
1504 03:43:21.728371 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1505 03:43:21.728457 PCI: 00:16.0
1506 03:43:21.738438 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1507 03:43:21.741506 PCI: 00:19.0
1508 03:43:21.745171 PCI: 00:19.1 child on link 0 I2C: 00:15
1509 03:43:21.755461 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1510 03:43:21.758090 I2C: 00:15
1511 03:43:21.761644 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1512 03:43:21.771337 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1513 03:43:21.781608 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1514 03:43:21.791423 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1515 03:43:21.794476 GENERIC: 0.0
1516 03:43:21.794557 PCI: 01:00.0
1517 03:43:21.807777 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1518 03:43:21.817900 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1519 03:43:21.818012 PCI: 00:1e.0
1520 03:43:21.831553 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1521 03:43:21.834380 PCI: 00:1e.2 child on link 0 SPI: 00
1522 03:43:21.844838 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1523 03:43:21.844922 SPI: 00
1524 03:43:21.847798 PCI: 00:1e.3 child on link 0 SPI: 00
1525 03:43:21.861141 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1526 03:43:21.861228 SPI: 00
1527 03:43:21.864179 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1528 03:43:21.874150 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1529 03:43:21.874233 PNP: 0c09.0
1530 03:43:21.884031 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1531 03:43:21.887647 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1532 03:43:21.897553 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1533 03:43:21.907439 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1534 03:43:21.910860 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1535 03:43:21.914256 GENERIC: 0.0
1536 03:43:21.914337 GENERIC: 1.0
1537 03:43:21.917719 PCI: 00:1f.3
1538 03:43:21.927210 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1539 03:43:21.937403 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1540 03:43:21.940441 PCI: 00:1f.5
1541 03:43:21.950636 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1542 03:43:21.954049 CPU_CLUSTER: 0 child on link 0 APIC: 00
1543 03:43:21.957082 APIC: 00
1544 03:43:21.957164 APIC: 01
1545 03:43:21.957228 APIC: 03
1546 03:43:21.960454 APIC: 05
1547 03:43:21.960536 APIC: 06
1548 03:43:21.960601 APIC: 02
1549 03:43:21.963930 APIC: 04
1550 03:43:21.964044 APIC: 07
1551 03:43:21.967210 Done allocating resources.
1552 03:43:21.973576 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1553 03:43:21.980177 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1554 03:43:21.983399 Configure GPIOs for I2S audio on UP4.
1555 03:43:21.990197 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1556 03:43:21.993650 Enabling resources...
1557 03:43:21.997017 PCI: 00:00.0 subsystem <- 8086/9a12
1558 03:43:22.000524 PCI: 00:00.0 cmd <- 06
1559 03:43:22.003277 PCI: 00:02.0 subsystem <- 8086/9a40
1560 03:43:22.003359 PCI: 00:02.0 cmd <- 03
1561 03:43:22.010214 PCI: 00:04.0 subsystem <- 8086/9a03
1562 03:43:22.010297 PCI: 00:04.0 cmd <- 02
1563 03:43:22.013625 PCI: 00:05.0 subsystem <- 8086/9a19
1564 03:43:22.016656 PCI: 00:05.0 cmd <- 02
1565 03:43:22.020112 PCI: 00:08.0 subsystem <- 8086/9a11
1566 03:43:22.023471 PCI: 00:08.0 cmd <- 06
1567 03:43:22.026863 PCI: 00:0d.0 subsystem <- 8086/9a13
1568 03:43:22.029888 PCI: 00:0d.0 cmd <- 02
1569 03:43:22.033093 PCI: 00:14.0 subsystem <- 8086/a0ed
1570 03:43:22.037053 PCI: 00:14.0 cmd <- 02
1571 03:43:22.040094 PCI: 00:14.2 subsystem <- 8086/a0ef
1572 03:43:22.042962 PCI: 00:14.2 cmd <- 02
1573 03:43:22.046326 PCI: 00:14.3 subsystem <- 8086/a0f0
1574 03:43:22.049869 PCI: 00:14.3 cmd <- 02
1575 03:43:22.053111 PCI: 00:15.0 subsystem <- 8086/a0e8
1576 03:43:22.053193 PCI: 00:15.0 cmd <- 02
1577 03:43:22.059966 PCI: 00:15.1 subsystem <- 8086/a0e9
1578 03:43:22.060048 PCI: 00:15.1 cmd <- 02
1579 03:43:22.062818 PCI: 00:15.2 subsystem <- 8086/a0ea
1580 03:43:22.066843 PCI: 00:15.2 cmd <- 02
1581 03:43:22.070432 PCI: 00:15.3 subsystem <- 8086/a0eb
1582 03:43:22.072904 PCI: 00:15.3 cmd <- 02
1583 03:43:22.076286 PCI: 00:16.0 subsystem <- 8086/a0e0
1584 03:43:22.079517 PCI: 00:16.0 cmd <- 02
1585 03:43:22.082843 PCI: 00:19.1 subsystem <- 8086/a0c6
1586 03:43:22.086357 PCI: 00:19.1 cmd <- 02
1587 03:43:22.089565 PCI: 00:1d.0 bridge ctrl <- 0013
1588 03:43:22.092828 PCI: 00:1d.0 subsystem <- 8086/a0b0
1589 03:43:22.096380 PCI: 00:1d.0 cmd <- 06
1590 03:43:22.099522 PCI: 00:1e.0 subsystem <- 8086/a0a8
1591 03:43:22.102439 PCI: 00:1e.0 cmd <- 06
1592 03:43:22.105653 PCI: 00:1e.2 subsystem <- 8086/a0aa
1593 03:43:22.105736 PCI: 00:1e.2 cmd <- 06
1594 03:43:22.112729 PCI: 00:1e.3 subsystem <- 8086/a0ab
1595 03:43:22.112815 PCI: 00:1e.3 cmd <- 02
1596 03:43:22.116077 PCI: 00:1f.0 subsystem <- 8086/a087
1597 03:43:22.119424 PCI: 00:1f.0 cmd <- 407
1598 03:43:22.122804 PCI: 00:1f.3 subsystem <- 8086/a0c8
1599 03:43:22.125782 PCI: 00:1f.3 cmd <- 02
1600 03:43:22.129082 PCI: 00:1f.5 subsystem <- 8086/a0a4
1601 03:43:22.132598 PCI: 00:1f.5 cmd <- 406
1602 03:43:22.136382 PCI: 01:00.0 cmd <- 02
1603 03:43:22.141256 done.
1604 03:43:22.144518 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1605 03:43:22.147537 Initializing devices...
1606 03:43:22.150769 Root Device init
1607 03:43:22.154309 Chrome EC: Set SMI mask to 0x0000000000000000
1608 03:43:22.161204 Chrome EC: clear events_b mask to 0x0000000000000000
1609 03:43:22.167632 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1610 03:43:22.174381 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1611 03:43:22.180964 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1612 03:43:22.183786 Chrome EC: Set WAKE mask to 0x0000000000000000
1613 03:43:22.191498 fw_config match found: DB_USB=USB3_ACTIVE
1614 03:43:22.194154 Configure Right Type-C port orientation for retimer
1615 03:43:22.197909 Root Device init finished in 45 msecs
1616 03:43:22.201626 PCI: 00:00.0 init
1617 03:43:22.204910 CPU TDP = 9 Watts
1618 03:43:22.204992 CPU PL1 = 9 Watts
1619 03:43:22.208298 CPU PL2 = 40 Watts
1620 03:43:22.211854 CPU PL4 = 83 Watts
1621 03:43:22.214906 PCI: 00:00.0 init finished in 8 msecs
1622 03:43:22.214994 PCI: 00:02.0 init
1623 03:43:22.218485 GMA: Found VBT in CBFS
1624 03:43:22.221811 GMA: Found valid VBT in CBFS
1625 03:43:22.229089 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1626 03:43:22.234955 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1627 03:43:22.238831 PCI: 00:02.0 init finished in 18 msecs
1628 03:43:22.241737 PCI: 00:05.0 init
1629 03:43:22.244808 PCI: 00:05.0 init finished in 0 msecs
1630 03:43:22.248597 PCI: 00:08.0 init
1631 03:43:22.251261 PCI: 00:08.0 init finished in 0 msecs
1632 03:43:22.254455 PCI: 00:14.0 init
1633 03:43:22.258102 PCI: 00:14.0 init finished in 0 msecs
1634 03:43:22.261808 PCI: 00:14.2 init
1635 03:43:22.264792 PCI: 00:14.2 init finished in 0 msecs
1636 03:43:22.267850 PCI: 00:15.0 init
1637 03:43:22.267922 I2C bus 0 version 0x3230302a
1638 03:43:22.274313 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1639 03:43:22.277838 PCI: 00:15.0 init finished in 6 msecs
1640 03:43:22.277920 PCI: 00:15.1 init
1641 03:43:22.280894 I2C bus 1 version 0x3230302a
1642 03:43:22.284649 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1643 03:43:22.291275 PCI: 00:15.1 init finished in 6 msecs
1644 03:43:22.291358 PCI: 00:15.2 init
1645 03:43:22.294468 I2C bus 2 version 0x3230302a
1646 03:43:22.297538 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1647 03:43:22.300979 PCI: 00:15.2 init finished in 6 msecs
1648 03:43:22.304522 PCI: 00:15.3 init
1649 03:43:22.307491 I2C bus 3 version 0x3230302a
1650 03:43:22.311152 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1651 03:43:22.314070 PCI: 00:15.3 init finished in 6 msecs
1652 03:43:22.317629 PCI: 00:16.0 init
1653 03:43:22.321218 PCI: 00:16.0 init finished in 0 msecs
1654 03:43:22.324236 PCI: 00:19.1 init
1655 03:43:22.327610 I2C bus 5 version 0x3230302a
1656 03:43:22.330897 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1657 03:43:22.334390 PCI: 00:19.1 init finished in 6 msecs
1658 03:43:22.337424 PCI: 00:1d.0 init
1659 03:43:22.341268 Initializing PCH PCIe bridge.
1660 03:43:22.344258 PCI: 00:1d.0 init finished in 3 msecs
1661 03:43:22.347232 PCI: 00:1f.0 init
1662 03:43:22.350402 IOAPIC: Initializing IOAPIC at 0xfec00000
1663 03:43:22.354098 IOAPIC: Bootstrap Processor Local APIC = 0x00
1664 03:43:22.356973 IOAPIC: ID = 0x02
1665 03:43:22.360384 IOAPIC: Dumping registers
1666 03:43:22.360465 reg 0x0000: 0x02000000
1667 03:43:22.364237 reg 0x0001: 0x00770020
1668 03:43:22.367558 reg 0x0002: 0x00000000
1669 03:43:22.370255 PCI: 00:1f.0 init finished in 21 msecs
1670 03:43:22.373813 PCI: 00:1f.2 init
1671 03:43:22.377505 Disabling ACPI via APMC.
1672 03:43:22.377587 APMC done.
1673 03:43:22.383771 PCI: 00:1f.2 init finished in 5 msecs
1674 03:43:22.394445 PCI: 01:00.0 init
1675 03:43:22.397531 PCI: 01:00.0 init finished in 0 msecs
1676 03:43:22.400634 PNP: 0c09.0 init
1677 03:43:22.403764 Google Chrome EC uptime: 8.270 seconds
1678 03:43:22.410875 Google Chrome AP resets since EC boot: 1
1679 03:43:22.413916 Google Chrome most recent AP reset causes:
1680 03:43:22.417242 0.454: 32775 shutdown: entering G3
1681 03:43:22.424102 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1682 03:43:22.427085 PNP: 0c09.0 init finished in 22 msecs
1683 03:43:22.433103 Devices initialized
1684 03:43:22.436495 Show all devs... After init.
1685 03:43:22.439519 Root Device: enabled 1
1686 03:43:22.439600 DOMAIN: 0000: enabled 1
1687 03:43:22.442865 CPU_CLUSTER: 0: enabled 1
1688 03:43:22.446163 PCI: 00:00.0: enabled 1
1689 03:43:22.449649 PCI: 00:02.0: enabled 1
1690 03:43:22.449730 PCI: 00:04.0: enabled 1
1691 03:43:22.453007 PCI: 00:05.0: enabled 1
1692 03:43:22.456350 PCI: 00:06.0: enabled 0
1693 03:43:22.459635 PCI: 00:07.0: enabled 0
1694 03:43:22.459716 PCI: 00:07.1: enabled 0
1695 03:43:22.463172 PCI: 00:07.2: enabled 0
1696 03:43:22.466065 PCI: 00:07.3: enabled 0
1697 03:43:22.469302 PCI: 00:08.0: enabled 1
1698 03:43:22.469383 PCI: 00:09.0: enabled 0
1699 03:43:22.472677 PCI: 00:0a.0: enabled 0
1700 03:43:22.476268 PCI: 00:0d.0: enabled 1
1701 03:43:22.479358 PCI: 00:0d.1: enabled 0
1702 03:43:22.479439 PCI: 00:0d.2: enabled 0
1703 03:43:22.482605 PCI: 00:0d.3: enabled 0
1704 03:43:22.485899 PCI: 00:0e.0: enabled 0
1705 03:43:22.485979 PCI: 00:10.2: enabled 1
1706 03:43:22.489182 PCI: 00:10.6: enabled 0
1707 03:43:22.492838 PCI: 00:10.7: enabled 0
1708 03:43:22.495743 PCI: 00:12.0: enabled 0
1709 03:43:22.495825 PCI: 00:12.6: enabled 0
1710 03:43:22.499351 PCI: 00:13.0: enabled 0
1711 03:43:22.502509 PCI: 00:14.0: enabled 1
1712 03:43:22.506047 PCI: 00:14.1: enabled 0
1713 03:43:22.506128 PCI: 00:14.2: enabled 1
1714 03:43:22.509244 PCI: 00:14.3: enabled 1
1715 03:43:22.512536 PCI: 00:15.0: enabled 1
1716 03:43:22.516201 PCI: 00:15.1: enabled 1
1717 03:43:22.516283 PCI: 00:15.2: enabled 1
1718 03:43:22.519618 PCI: 00:15.3: enabled 1
1719 03:43:22.522420 PCI: 00:16.0: enabled 1
1720 03:43:22.525779 PCI: 00:16.1: enabled 0
1721 03:43:22.525860 PCI: 00:16.2: enabled 0
1722 03:43:22.529111 PCI: 00:16.3: enabled 0
1723 03:43:22.532445 PCI: 00:16.4: enabled 0
1724 03:43:22.532527 PCI: 00:16.5: enabled 0
1725 03:43:22.535770 PCI: 00:17.0: enabled 0
1726 03:43:22.539037 PCI: 00:19.0: enabled 0
1727 03:43:22.542182 PCI: 00:19.1: enabled 1
1728 03:43:22.542262 PCI: 00:19.2: enabled 0
1729 03:43:22.545700 PCI: 00:1c.0: enabled 1
1730 03:43:22.548900 PCI: 00:1c.1: enabled 0
1731 03:43:22.552463 PCI: 00:1c.2: enabled 0
1732 03:43:22.552544 PCI: 00:1c.3: enabled 0
1733 03:43:22.555451 PCI: 00:1c.4: enabled 0
1734 03:43:22.559002 PCI: 00:1c.5: enabled 0
1735 03:43:22.562200 PCI: 00:1c.6: enabled 1
1736 03:43:22.562282 PCI: 00:1c.7: enabled 0
1737 03:43:22.565684 PCI: 00:1d.0: enabled 1
1738 03:43:22.569199 PCI: 00:1d.1: enabled 0
1739 03:43:22.569279 PCI: 00:1d.2: enabled 1
1740 03:43:22.572489 PCI: 00:1d.3: enabled 0
1741 03:43:22.575630 PCI: 00:1e.0: enabled 1
1742 03:43:22.579095 PCI: 00:1e.1: enabled 0
1743 03:43:22.579176 PCI: 00:1e.2: enabled 1
1744 03:43:22.582762 PCI: 00:1e.3: enabled 1
1745 03:43:22.585920 PCI: 00:1f.0: enabled 1
1746 03:43:22.588824 PCI: 00:1f.1: enabled 0
1747 03:43:22.588907 PCI: 00:1f.2: enabled 1
1748 03:43:22.592617 PCI: 00:1f.3: enabled 1
1749 03:43:22.595539 PCI: 00:1f.4: enabled 0
1750 03:43:22.598833 PCI: 00:1f.5: enabled 1
1751 03:43:22.598949 PCI: 00:1f.6: enabled 0
1752 03:43:22.602184 PCI: 00:1f.7: enabled 0
1753 03:43:22.605738 APIC: 00: enabled 1
1754 03:43:22.605819 GENERIC: 0.0: enabled 1
1755 03:43:22.608505 GENERIC: 0.0: enabled 1
1756 03:43:22.611937 GENERIC: 1.0: enabled 1
1757 03:43:22.615891 GENERIC: 0.0: enabled 1
1758 03:43:22.615978 GENERIC: 1.0: enabled 1
1759 03:43:22.618768 USB0 port 0: enabled 1
1760 03:43:22.621940 GENERIC: 0.0: enabled 1
1761 03:43:22.622022 USB0 port 0: enabled 1
1762 03:43:22.625438 GENERIC: 0.0: enabled 1
1763 03:43:22.628483 I2C: 00:1a: enabled 1
1764 03:43:22.632212 I2C: 00:31: enabled 1
1765 03:43:22.632326 I2C: 00:32: enabled 1
1766 03:43:22.635385 I2C: 00:10: enabled 1
1767 03:43:22.638508 I2C: 00:15: enabled 1
1768 03:43:22.638615 GENERIC: 0.0: enabled 0
1769 03:43:22.641782 GENERIC: 1.0: enabled 0
1770 03:43:22.645524 GENERIC: 0.0: enabled 1
1771 03:43:22.645631 SPI: 00: enabled 1
1772 03:43:22.648868 SPI: 00: enabled 1
1773 03:43:22.651776 PNP: 0c09.0: enabled 1
1774 03:43:22.651857 GENERIC: 0.0: enabled 1
1775 03:43:22.655210 USB3 port 0: enabled 1
1776 03:43:22.658222 USB3 port 1: enabled 1
1777 03:43:22.661576 USB3 port 2: enabled 0
1778 03:43:22.661657 USB3 port 3: enabled 0
1779 03:43:22.665248 USB2 port 0: enabled 0
1780 03:43:22.668152 USB2 port 1: enabled 1
1781 03:43:22.668234 USB2 port 2: enabled 1
1782 03:43:22.671627 USB2 port 3: enabled 0
1783 03:43:22.674823 USB2 port 4: enabled 1
1784 03:43:22.678118 USB2 port 5: enabled 0
1785 03:43:22.678198 USB2 port 6: enabled 0
1786 03:43:22.681431 USB2 port 7: enabled 0
1787 03:43:22.685051 USB2 port 8: enabled 0
1788 03:43:22.685127 USB2 port 9: enabled 0
1789 03:43:22.688368 USB3 port 0: enabled 0
1790 03:43:22.691623 USB3 port 1: enabled 1
1791 03:43:22.691724 USB3 port 2: enabled 0
1792 03:43:22.694943 USB3 port 3: enabled 0
1793 03:43:22.698381 GENERIC: 0.0: enabled 1
1794 03:43:22.701372 GENERIC: 1.0: enabled 1
1795 03:43:22.701443 APIC: 01: enabled 1
1796 03:43:22.704807 APIC: 03: enabled 1
1797 03:43:22.704888 APIC: 05: enabled 1
1798 03:43:22.708241 APIC: 06: enabled 1
1799 03:43:22.711377 APIC: 02: enabled 1
1800 03:43:22.711459 APIC: 04: enabled 1
1801 03:43:22.714995 APIC: 07: enabled 1
1802 03:43:22.718073 PCI: 01:00.0: enabled 1
1803 03:43:22.721443 BS: BS_DEV_INIT run times (exec / console): 31 / 540 ms
1804 03:43:22.728538 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1805 03:43:22.731437 ELOG: NV offset 0xf30000 size 0x1000
1806 03:43:22.737864 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1807 03:43:22.744770 ELOG: Event(17) added with size 13 at 2024-03-05 03:43:23 UTC
1808 03:43:22.751476 ELOG: Event(92) added with size 9 at 2024-03-05 03:43:23 UTC
1809 03:43:22.757855 ELOG: Event(93) added with size 9 at 2024-03-05 03:43:23 UTC
1810 03:43:22.764408 ELOG: Event(9E) added with size 10 at 2024-03-05 03:43:23 UTC
1811 03:43:22.770941 ELOG: Event(9F) added with size 14 at 2024-03-05 03:43:23 UTC
1812 03:43:22.777508 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1813 03:43:22.784219 ELOG: Event(A1) added with size 10 at 2024-03-05 03:43:23 UTC
1814 03:43:22.791034 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1815 03:43:22.797566 ELOG: Event(A0) added with size 9 at 2024-03-05 03:43:23 UTC
1816 03:43:22.801123 elog_add_boot_reason: Logged dev mode boot
1817 03:43:22.807326 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1818 03:43:22.807411 Finalize devices...
1819 03:43:22.810849 Devices finalized
1820 03:43:22.817407 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1821 03:43:22.820674 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1822 03:43:22.827352 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1823 03:43:22.830653 ME: HFSTS1 : 0x80030055
1824 03:43:22.837178 ME: HFSTS2 : 0x30280116
1825 03:43:22.840858 ME: HFSTS3 : 0x00000050
1826 03:43:22.843850 ME: HFSTS4 : 0x00004000
1827 03:43:22.850496 ME: HFSTS5 : 0x00000000
1828 03:43:22.853953 ME: HFSTS6 : 0x40400006
1829 03:43:22.857154 ME: Manufacturing Mode : YES
1830 03:43:22.860677 ME: SPI Protection Mode Enabled : NO
1831 03:43:22.864047 ME: FW Partition Table : OK
1832 03:43:22.870790 ME: Bringup Loader Failure : NO
1833 03:43:22.874031 ME: Firmware Init Complete : NO
1834 03:43:22.876904 ME: Boot Options Present : NO
1835 03:43:22.880692 ME: Update In Progress : NO
1836 03:43:22.883836 ME: D0i3 Support : YES
1837 03:43:22.887145 ME: Low Power State Enabled : NO
1838 03:43:22.890767 ME: CPU Replaced : YES
1839 03:43:22.897104 ME: CPU Replacement Valid : YES
1840 03:43:22.900538 ME: Current Working State : 5
1841 03:43:22.903457 ME: Current Operation State : 1
1842 03:43:22.907311 ME: Current Operation Mode : 3
1843 03:43:22.910835 ME: Error Code : 0
1844 03:43:22.913769 ME: Enhanced Debug Mode : NO
1845 03:43:22.917066 ME: CPU Debug Disabled : YES
1846 03:43:22.920286 ME: TXT Support : NO
1847 03:43:22.926531 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1848 03:43:22.933026 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1849 03:43:22.936522 CBFS: 'fallback/slic' not found.
1850 03:43:22.943194 ACPI: Writing ACPI tables at 76b01000.
1851 03:43:22.943275 ACPI: * FACS
1852 03:43:22.946751 ACPI: * DSDT
1853 03:43:22.949604 Ramoops buffer: 0x100000@0x76a00000.
1854 03:43:22.952960 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1855 03:43:22.959936 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1856 03:43:22.963014 Google Chrome EC: version:
1857 03:43:22.966596 ro: voema_v2.0.10114-a447f03e46
1858 03:43:22.969814 rw: voema_v2.0.10114-a447f03e46
1859 03:43:22.969895 running image: 2
1860 03:43:22.976390 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1861 03:43:22.980749 ACPI: * FADT
1862 03:43:22.980831 SCI is IRQ9
1863 03:43:22.987382 ACPI: added table 1/32, length now 40
1864 03:43:22.987464 ACPI: * SSDT
1865 03:43:22.990835 Found 1 CPU(s) with 8 core(s) each.
1866 03:43:22.997889 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1867 03:43:23.000828 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1868 03:43:23.004035 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1869 03:43:23.007165 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1870 03:43:23.014348 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1871 03:43:23.020837 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1872 03:43:23.024178 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1873 03:43:23.030400 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1874 03:43:23.036994 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1875 03:43:23.040596 \_SB.PCI0.RP09: Added StorageD3Enable property
1876 03:43:23.046855 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1877 03:43:23.050600 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1878 03:43:23.057009 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1879 03:43:23.060298 PS2K: Passing 80 keymaps to kernel
1880 03:43:23.067230 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1881 03:43:23.073476 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1882 03:43:23.080352 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1883 03:43:23.087178 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1884 03:43:23.093325 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1885 03:43:23.100516 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1886 03:43:23.106594 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1887 03:43:23.113771 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1888 03:43:23.116692 ACPI: added table 2/32, length now 44
1889 03:43:23.120286 ACPI: * MCFG
1890 03:43:23.123382 ACPI: added table 3/32, length now 48
1891 03:43:23.123464 ACPI: * TPM2
1892 03:43:23.126773 TPM2 log created at 0x769f0000
1893 03:43:23.129749 ACPI: added table 4/32, length now 52
1894 03:43:23.133224 ACPI: * MADT
1895 03:43:23.133305 SCI is IRQ9
1896 03:43:23.136520 ACPI: added table 5/32, length now 56
1897 03:43:23.140073 current = 76b09850
1898 03:43:23.140155 ACPI: * DMAR
1899 03:43:23.146269 ACPI: added table 6/32, length now 60
1900 03:43:23.150133 ACPI: added table 7/32, length now 64
1901 03:43:23.150215 ACPI: * HPET
1902 03:43:23.152876 ACPI: added table 8/32, length now 68
1903 03:43:23.156571 ACPI: done.
1904 03:43:23.159516 ACPI tables: 35216 bytes.
1905 03:43:23.159597 smbios_write_tables: 769ef000
1906 03:43:23.162984 EC returned error result code 3
1907 03:43:23.166606 Couldn't obtain OEM name from CBI
1908 03:43:23.171316 Create SMBIOS type 16
1909 03:43:23.174934 Create SMBIOS type 17
1910 03:43:23.177942 GENERIC: 0.0 (WIFI Device)
1911 03:43:23.181358 SMBIOS tables: 1734 bytes.
1912 03:43:23.184539 Writing table forward entry at 0x00000500
1913 03:43:23.191401 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1914 03:43:23.194852 Writing coreboot table at 0x76b25000
1915 03:43:23.201645 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1916 03:43:23.204608 1. 0000000000001000-000000000009ffff: RAM
1917 03:43:23.207684 2. 00000000000a0000-00000000000fffff: RESERVED
1918 03:43:23.214381 3. 0000000000100000-00000000769eefff: RAM
1919 03:43:23.217630 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1920 03:43:23.224279 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1921 03:43:23.230990 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1922 03:43:23.234346 7. 0000000077000000-000000007fbfffff: RESERVED
1923 03:43:23.241196 8. 00000000c0000000-00000000cfffffff: RESERVED
1924 03:43:23.243992 9. 00000000f8000000-00000000f9ffffff: RESERVED
1925 03:43:23.247583 10. 00000000fb000000-00000000fb000fff: RESERVED
1926 03:43:23.254053 11. 00000000fe000000-00000000fe00ffff: RESERVED
1927 03:43:23.257174 12. 00000000fed80000-00000000fed87fff: RESERVED
1928 03:43:23.263932 13. 00000000fed90000-00000000fed92fff: RESERVED
1929 03:43:23.267119 14. 00000000feda0000-00000000feda1fff: RESERVED
1930 03:43:23.273966 15. 00000000fedc0000-00000000feddffff: RESERVED
1931 03:43:23.276929 16. 0000000100000000-00000004803fffff: RAM
1932 03:43:23.280084 Passing 4 GPIOs to payload:
1933 03:43:23.287027 NAME | PORT | POLARITY | VALUE
1934 03:43:23.290318 lid | undefined | high | high
1935 03:43:23.296947 power | undefined | high | low
1936 03:43:23.300207 oprom | undefined | high | low
1937 03:43:23.306837 EC in RW | 0x000000e5 | high | high
1938 03:43:23.313222 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e94e
1939 03:43:23.316463 coreboot table: 1576 bytes.
1940 03:43:23.320269 IMD ROOT 0. 0x76fff000 0x00001000
1941 03:43:23.323181 IMD SMALL 1. 0x76ffe000 0x00001000
1942 03:43:23.326396 FSP MEMORY 2. 0x76c4e000 0x003b0000
1943 03:43:23.329856 VPD 3. 0x76c4d000 0x00000367
1944 03:43:23.333066 RO MCACHE 4. 0x76c4c000 0x00000fdc
1945 03:43:23.336397 CONSOLE 5. 0x76c2c000 0x00020000
1946 03:43:23.343391 FMAP 6. 0x76c2b000 0x00000578
1947 03:43:23.346483 TIME STAMP 7. 0x76c2a000 0x00000910
1948 03:43:23.349608 VBOOT WORK 8. 0x76c16000 0x00014000
1949 03:43:23.352905 ROMSTG STCK 9. 0x76c15000 0x00001000
1950 03:43:23.356308 AFTER CAR 10. 0x76c0a000 0x0000b000
1951 03:43:23.359719 RAMSTAGE 11. 0x76b97000 0x00073000
1952 03:43:23.362730 REFCODE 12. 0x76b42000 0x00055000
1953 03:43:23.366425 SMM BACKUP 13. 0x76b32000 0x00010000
1954 03:43:23.373262 4f444749 14. 0x76b30000 0x00002000
1955 03:43:23.376543 EXT VBT15. 0x76b2d000 0x0000219f
1956 03:43:23.379897 COREBOOT 16. 0x76b25000 0x00008000
1957 03:43:23.383029 ACPI 17. 0x76b01000 0x00024000
1958 03:43:23.385997 ACPI GNVS 18. 0x76b00000 0x00001000
1959 03:43:23.389831 RAMOOPS 19. 0x76a00000 0x00100000
1960 03:43:23.392635 TPM2 TCGLOG20. 0x769f0000 0x00010000
1961 03:43:23.396046 SMBIOS 21. 0x769ef000 0x00000800
1962 03:43:23.400303 IMD small region:
1963 03:43:23.402552 IMD ROOT 0. 0x76ffec00 0x00000400
1964 03:43:23.406666 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1965 03:43:23.409296 POWER STATE 2. 0x76ffeb80 0x00000044
1966 03:43:23.416421 ROMSTAGE 3. 0x76ffeb60 0x00000004
1967 03:43:23.419247 MEM INFO 4. 0x76ffe980 0x000001e0
1968 03:43:23.426411 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1969 03:43:23.429501 MTRR: Physical address space:
1970 03:43:23.432846 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1971 03:43:23.439169 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1972 03:43:23.445785 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1973 03:43:23.452225 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1974 03:43:23.458763 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1975 03:43:23.465639 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1976 03:43:23.472222 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1977 03:43:23.475526 MTRR: Fixed MSR 0x250 0x0606060606060606
1978 03:43:23.478969 MTRR: Fixed MSR 0x258 0x0606060606060606
1979 03:43:23.482438 MTRR: Fixed MSR 0x259 0x0000000000000000
1980 03:43:23.489105 MTRR: Fixed MSR 0x268 0x0606060606060606
1981 03:43:23.492458 MTRR: Fixed MSR 0x269 0x0606060606060606
1982 03:43:23.495496 MTRR: Fixed MSR 0x26a 0x0606060606060606
1983 03:43:23.498858 MTRR: Fixed MSR 0x26b 0x0606060606060606
1984 03:43:23.505684 MTRR: Fixed MSR 0x26c 0x0606060606060606
1985 03:43:23.508797 MTRR: Fixed MSR 0x26d 0x0606060606060606
1986 03:43:23.512317 MTRR: Fixed MSR 0x26e 0x0606060606060606
1987 03:43:23.515508 MTRR: Fixed MSR 0x26f 0x0606060606060606
1988 03:43:23.520118 call enable_fixed_mtrr()
1989 03:43:23.523419 CPU physical address size: 39 bits
1990 03:43:23.530152 MTRR: default type WB/UC MTRR counts: 6/7.
1991 03:43:23.533463 MTRR: WB selected as default type.
1992 03:43:23.540134 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1993 03:43:23.543510 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1994 03:43:23.550021 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1995 03:43:23.556673 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1996 03:43:23.563737 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1997 03:43:23.569949 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1998 03:43:23.573827
1999 03:43:23.573907 MTRR check
2000 03:43:23.577057 Fixed MTRRs : Enabled
2001 03:43:23.577139 Variable MTRRs: Enabled
2002 03:43:23.577204
2003 03:43:23.583371 MTRR: Fixed MSR 0x250 0x0606060606060606
2004 03:43:23.586831 MTRR: Fixed MSR 0x258 0x0606060606060606
2005 03:43:23.590220 MTRR: Fixed MSR 0x259 0x0000000000000000
2006 03:43:23.593769 MTRR: Fixed MSR 0x268 0x0606060606060606
2007 03:43:23.600271 MTRR: Fixed MSR 0x269 0x0606060606060606
2008 03:43:23.603786 MTRR: Fixed MSR 0x26a 0x0606060606060606
2009 03:43:23.606671 MTRR: Fixed MSR 0x26b 0x0606060606060606
2010 03:43:23.610648 MTRR: Fixed MSR 0x26c 0x0606060606060606
2011 03:43:23.616632 MTRR: Fixed MSR 0x26d 0x0606060606060606
2012 03:43:23.620377 MTRR: Fixed MSR 0x26e 0x0606060606060606
2013 03:43:23.623544 MTRR: Fixed MSR 0x26f 0x0606060606060606
2014 03:43:23.630566 MTRR: Fixed MSR 0x250 0x0606060606060606
2015 03:43:23.630699 call enable_fixed_mtrr()
2016 03:43:23.637358 MTRR: Fixed MSR 0x258 0x0606060606060606
2017 03:43:23.640645 MTRR: Fixed MSR 0x259 0x0000000000000000
2018 03:43:23.643977 MTRR: Fixed MSR 0x268 0x0606060606060606
2019 03:43:23.647140 MTRR: Fixed MSR 0x269 0x0606060606060606
2020 03:43:23.653833 MTRR: Fixed MSR 0x26a 0x0606060606060606
2021 03:43:23.657067 MTRR: Fixed MSR 0x26b 0x0606060606060606
2022 03:43:23.660291 MTRR: Fixed MSR 0x26c 0x0606060606060606
2023 03:43:23.663393 MTRR: Fixed MSR 0x26d 0x0606060606060606
2024 03:43:23.670027 MTRR: Fixed MSR 0x26e 0x0606060606060606
2025 03:43:23.673534 MTRR: Fixed MSR 0x26f 0x0606060606060606
2026 03:43:23.676537 CPU physical address size: 39 bits
2027 03:43:23.683010 call enable_fixed_mtrr()
2028 03:43:23.686387 MTRR: Fixed MSR 0x250 0x0606060606060606
2029 03:43:23.689603 MTRR: Fixed MSR 0x250 0x0606060606060606
2030 03:43:23.696542 MTRR: Fixed MSR 0x258 0x0606060606060606
2031 03:43:23.699856 MTRR: Fixed MSR 0x259 0x0000000000000000
2032 03:43:23.703155 MTRR: Fixed MSR 0x268 0x0606060606060606
2033 03:43:23.706673 MTRR: Fixed MSR 0x269 0x0606060606060606
2034 03:43:23.713051 MTRR: Fixed MSR 0x26a 0x0606060606060606
2035 03:43:23.716470 MTRR: Fixed MSR 0x26b 0x0606060606060606
2036 03:43:23.719358 MTRR: Fixed MSR 0x26c 0x0606060606060606
2037 03:43:23.722814 MTRR: Fixed MSR 0x26d 0x0606060606060606
2038 03:43:23.726166 MTRR: Fixed MSR 0x26e 0x0606060606060606
2039 03:43:23.732607 MTRR: Fixed MSR 0x26f 0x0606060606060606
2040 03:43:23.739469 MTRR: Fixed MSR 0x258 0x0606060606060606
2041 03:43:23.739551 call enable_fixed_mtrr()
2042 03:43:23.745819 MTRR: Fixed MSR 0x259 0x0000000000000000
2043 03:43:23.749195 MTRR: Fixed MSR 0x268 0x0606060606060606
2044 03:43:23.752556 MTRR: Fixed MSR 0x269 0x0606060606060606
2045 03:43:23.755943 MTRR: Fixed MSR 0x26a 0x0606060606060606
2046 03:43:23.759395 MTRR: Fixed MSR 0x26b 0x0606060606060606
2047 03:43:23.766121 MTRR: Fixed MSR 0x26c 0x0606060606060606
2048 03:43:23.769273 MTRR: Fixed MSR 0x26d 0x0606060606060606
2049 03:43:23.772400 MTRR: Fixed MSR 0x26e 0x0606060606060606
2050 03:43:23.775676 MTRR: Fixed MSR 0x26f 0x0606060606060606
2051 03:43:23.784457 CPU physical address size: 39 bits
2052 03:43:23.787385 call enable_fixed_mtrr()
2053 03:43:23.790953 CPU physical address size: 39 bits
2054 03:43:23.797453 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
2055 03:43:23.800852 MTRR: Fixed MSR 0x250 0x0606060606060606
2056 03:43:23.804753 Checking cr50 for pending updates
2057 03:43:23.807829 MTRR: Fixed MSR 0x258 0x0606060606060606
2058 03:43:23.811576 MTRR: Fixed MSR 0x259 0x0000000000000000
2059 03:43:23.817996 MTRR: Fixed MSR 0x268 0x0606060606060606
2060 03:43:23.821088 MTRR: Fixed MSR 0x269 0x0606060606060606
2061 03:43:23.825011 MTRR: Fixed MSR 0x26a 0x0606060606060606
2062 03:43:23.827954 MTRR: Fixed MSR 0x26b 0x0606060606060606
2063 03:43:23.831245 MTRR: Fixed MSR 0x26c 0x0606060606060606
2064 03:43:23.837977 MTRR: Fixed MSR 0x26d 0x0606060606060606
2065 03:43:23.841370 MTRR: Fixed MSR 0x26e 0x0606060606060606
2066 03:43:23.844274 MTRR: Fixed MSR 0x26f 0x0606060606060606
2067 03:43:23.849502 Reading cr50 TPM mode
2068 03:43:23.853077 call enable_fixed_mtrr()
2069 03:43:23.856255 MTRR: Fixed MSR 0x250 0x0606060606060606
2070 03:43:23.859456 MTRR: Fixed MSR 0x250 0x0606060606060606
2071 03:43:23.862835 MTRR: Fixed MSR 0x258 0x0606060606060606
2072 03:43:23.869492 MTRR: Fixed MSR 0x259 0x0000000000000000
2073 03:43:23.872997 MTRR: Fixed MSR 0x268 0x0606060606060606
2074 03:43:23.875861 MTRR: Fixed MSR 0x269 0x0606060606060606
2075 03:43:23.879385 MTRR: Fixed MSR 0x26a 0x0606060606060606
2076 03:43:23.886255 MTRR: Fixed MSR 0x26b 0x0606060606060606
2077 03:43:23.889321 MTRR: Fixed MSR 0x26c 0x0606060606060606
2078 03:43:23.892601 MTRR: Fixed MSR 0x26d 0x0606060606060606
2079 03:43:23.896072 MTRR: Fixed MSR 0x26e 0x0606060606060606
2080 03:43:23.899376 MTRR: Fixed MSR 0x26f 0x0606060606060606
2081 03:43:23.905826 MTRR: Fixed MSR 0x258 0x0606060606060606
2082 03:43:23.909309 call enable_fixed_mtrr()
2083 03:43:23.912537 MTRR: Fixed MSR 0x259 0x0000000000000000
2084 03:43:23.919029 MTRR: Fixed MSR 0x268 0x0606060606060606
2085 03:43:23.922554 MTRR: Fixed MSR 0x269 0x0606060606060606
2086 03:43:23.925588 MTRR: Fixed MSR 0x26a 0x0606060606060606
2087 03:43:23.929126 MTRR: Fixed MSR 0x26b 0x0606060606060606
2088 03:43:23.932255 MTRR: Fixed MSR 0x26c 0x0606060606060606
2089 03:43:23.939020 MTRR: Fixed MSR 0x26d 0x0606060606060606
2090 03:43:23.942257 MTRR: Fixed MSR 0x26e 0x0606060606060606
2091 03:43:23.945270 MTRR: Fixed MSR 0x26f 0x0606060606060606
2092 03:43:23.950034 CPU physical address size: 39 bits
2093 03:43:23.956562 call enable_fixed_mtrr()
2094 03:43:23.959813 CPU physical address size: 39 bits
2095 03:43:23.963188 CPU physical address size: 39 bits
2096 03:43:23.969649 BS: BS_PAYLOAD_LOAD entry times (exec / console): 49 / 8 ms
2097 03:43:23.972915 CPU physical address size: 39 bits
2098 03:43:23.983338 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2099 03:43:23.986198 Checking segment from ROM address 0xffc02b38
2100 03:43:23.990301 Checking segment from ROM address 0xffc02b54
2101 03:43:23.996205 Loading segment from ROM address 0xffc02b38
2102 03:43:23.996288 code (compression=0)
2103 03:43:24.006592 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2104 03:43:24.016348 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2105 03:43:24.016438 it's not compressed!
2106 03:43:24.161690 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2107 03:43:24.167930 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2108 03:43:24.174949 Loading segment from ROM address 0xffc02b54
2109 03:43:24.178773 Entry Point 0x30000000
2110 03:43:24.178854 Loaded segments
2111 03:43:24.185218 BS: BS_PAYLOAD_LOAD run times (exec / console): 145 / 65 ms
2112 03:43:24.230678 Finalizing chipset.
2113 03:43:24.233740 Finalizing SMM.
2114 03:43:24.233870 APMC done.
2115 03:43:24.240100 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2116 03:43:24.243469 mp_park_aps done after 0 msecs.
2117 03:43:24.246614 Jumping to boot code at 0x30000000(0x76b25000)
2118 03:43:24.256791 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2119 03:43:24.256873
2120 03:43:24.256937
2121 03:43:24.260361
2122 03:43:24.260441 Starting depthcharge on Voema...
2123 03:43:24.260785 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2124 03:43:24.260884 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2125 03:43:24.260964 Setting prompt string to ['volteer:']
2126 03:43:24.261075 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2127 03:43:24.263574
2128 03:43:24.269927 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2129 03:43:24.270008
2130 03:43:24.276545 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2131 03:43:24.276625
2132 03:43:24.283275 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2133 03:43:24.283357
2134 03:43:24.286726 Failed to find eMMC card reader
2135 03:43:24.286807
2136 03:43:24.286870 Wipe memory regions:
2137 03:43:24.290370
2138 03:43:24.293294 [0x00000000001000, 0x000000000a0000)
2139 03:43:24.293375
2140 03:43:24.296455 [0x00000000100000, 0x00000030000000)
2141 03:43:24.332390
2142 03:43:24.335426 [0x00000032662db0, 0x000000769ef000)
2143 03:43:24.385615
2144 03:43:24.388488 [0x00000100000000, 0x00000480400000)
2145 03:43:25.047189
2146 03:43:25.049800 ec_init: CrosEC protocol v3 supported (256, 256)
2147 03:43:25.481353
2148 03:43:25.481524 R8152: Initializing
2149 03:43:25.481607
2150 03:43:25.484400 Version 6 (ocp_data = 5c30)
2151 03:43:25.484481
2152 03:43:25.487920 R8152: Done initializing
2153 03:43:25.488016
2154 03:43:25.491703 Adding net device
2155 03:43:25.792390
2156 03:43:25.795544 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2157 03:43:25.795634
2158 03:43:25.795698
2159 03:43:25.795758
2160 03:43:25.798960 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2162 03:43:25.899365 volteer: tftpboot 192.168.201.1 12940478/tftp-deploy-9fjcirue/kernel/bzImage 12940478/tftp-deploy-9fjcirue/kernel/cmdline 12940478/tftp-deploy-9fjcirue/ramdisk/ramdisk.cpio.gz
2163 03:43:25.899542 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2164 03:43:25.899647 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2165 03:43:25.903756 tftpboot 192.168.201.1 12940478/tftp-deploy-9fjcirue/kernel/bzIploy-9fjcirue/kernel/cmdline 12940478/tftp-deploy-9fjcirue/ramdisk/ramdisk.cpio.gz
2166 03:43:25.903841
2167 03:43:25.903906 Waiting for link
2168 03:43:26.106969
2169 03:43:26.107105 done.
2170 03:43:26.107172
2171 03:43:26.107232 MAC: 00:24:32:30:78:e4
2172 03:43:26.107289
2173 03:43:26.109943 Sending DHCP discover... done.
2174 03:43:26.110024
2175 03:43:26.113124 Waiting for reply... done.
2176 03:43:26.113219
2177 03:43:26.116858 Sending DHCP request... done.
2178 03:43:26.116980
2179 03:43:26.120001 Waiting for reply... done.
2180 03:43:26.120097
2181 03:43:26.123335 My ip is 192.168.201.13
2182 03:43:26.123430
2183 03:43:26.126549 The DHCP server ip is 192.168.201.1
2184 03:43:26.126704
2185 03:43:26.133294 TFTP server IP predefined by user: 192.168.201.1
2186 03:43:26.133376
2187 03:43:26.140075 Bootfile predefined by user: 12940478/tftp-deploy-9fjcirue/kernel/bzImage
2188 03:43:26.140169
2189 03:43:26.143348 Sending tftp read request... done.
2190 03:43:26.143428
2191 03:43:26.146401 Waiting for the transfer...
2192 03:43:26.146538
2193 03:43:26.720483 00000000 ################################################################
2194 03:43:26.720633
2195 03:43:27.299236 00080000 ################################################################
2196 03:43:27.299367
2197 03:43:27.883361 00100000 ################################################################
2198 03:43:27.883499
2199 03:43:28.448258 00180000 ################################################################
2200 03:43:28.448394
2201 03:43:29.038341 00200000 ################################################################
2202 03:43:29.038488
2203 03:43:29.633029 00280000 ################################################################
2204 03:43:29.633180
2205 03:43:30.214551 00300000 ################################################################
2206 03:43:30.214737
2207 03:43:30.799042 00380000 ################################################################
2208 03:43:30.799209
2209 03:43:31.386357 00400000 ################################################################
2210 03:43:31.386503
2211 03:43:31.974574 00480000 ################################################################
2212 03:43:31.974748
2213 03:43:32.567657 00500000 ################################################################
2214 03:43:32.567816
2215 03:43:33.167291 00580000 ################################################################
2216 03:43:33.167441
2217 03:43:33.857284 00600000 ################################################################
2218 03:43:33.857795
2219 03:43:34.561589 00680000 ################################################################
2220 03:43:34.562114
2221 03:43:35.255720 00700000 ################################################################
2222 03:43:35.256244
2223 03:43:35.957986 00780000 ################################################################
2224 03:43:35.958510
2225 03:43:36.662278 00800000 ################################################################
2226 03:43:36.662924
2227 03:43:37.286675 00880000 ######################################################## done.
2228 03:43:37.287243
2229 03:43:37.289592 The bootfile was 9367440 bytes long.
2230 03:43:37.290148
2231 03:43:37.292788 Sending tftp read request... done.
2232 03:43:37.293251
2233 03:43:37.296426 Waiting for the transfer...
2234 03:43:37.296978
2235 03:43:37.916453 00000000 ################################################################
2236 03:43:37.916598
2237 03:43:38.549910 00080000 ################################################################
2238 03:43:38.550054
2239 03:43:39.211574 00100000 ################################################################
2240 03:43:39.212062
2241 03:43:39.872077 00180000 ################################################################
2242 03:43:39.872681
2243 03:43:40.546971 00200000 ################################################################
2244 03:43:40.547149
2245 03:43:41.101401 00280000 ################################################################
2246 03:43:41.101559
2247 03:43:41.642275 00300000 ################################################################
2248 03:43:41.642449
2249 03:43:42.167548 00380000 ################################################################
2250 03:43:42.167699
2251 03:43:42.691610 00400000 ################################################################
2252 03:43:42.691753
2253 03:43:43.261612 00480000 ################################################################
2254 03:43:43.261761
2255 03:43:43.794313 00500000 ############################################################### done.
2256 03:43:43.794488
2257 03:43:43.797830 Sending tftp read request... done.
2258 03:43:43.797915
2259 03:43:43.800887 Waiting for the transfer...
2260 03:43:43.800970
2261 03:43:43.801035 00000000 # done.
2262 03:43:43.801097
2263 03:43:43.811067 Command line loaded dynamically from TFTP file: 12940478/tftp-deploy-9fjcirue/kernel/cmdline
2264 03:43:43.811160
2265 03:43:43.833952 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12940478/extract-nfsrootfs-fci4nwvx,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2266 03:43:43.841300
2267 03:43:43.844368 Shutting down all USB controllers.
2268 03:43:43.844450
2269 03:43:43.844514 Removing current net device
2270 03:43:43.844598
2271 03:43:43.847874 Finalizing coreboot
2272 03:43:43.847955
2273 03:43:43.854139 Exiting depthcharge with code 4 at timestamp: 28174558
2274 03:43:43.854221
2275 03:43:43.854285
2276 03:43:43.854345 Starting kernel ...
2277 03:43:43.854402
2278 03:43:43.854458
2279 03:43:43.854806 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2280 03:43:43.854905 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2281 03:43:43.854981 Setting prompt string to ['Linux version [0-9]']
2282 03:43:43.855048 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2283 03:43:43.855114 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2285 03:48:08.855718 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2287 03:48:08.856699 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2289 03:48:08.857482 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2292 03:48:08.858777 end: 2 depthcharge-action (duration 00:05:00) [common]
2294 03:48:08.860308 Cleaning after the job
2295 03:48:08.860812 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12940478/tftp-deploy-9fjcirue/ramdisk
2296 03:48:08.865078 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12940478/tftp-deploy-9fjcirue/kernel
2297 03:48:08.871696 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12940478/tftp-deploy-9fjcirue/nfsrootfs
2298 03:48:08.970045 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12940478/tftp-deploy-9fjcirue/modules
2299 03:48:08.970492 start: 5.1 power-off (timeout 00:00:30) [common]
2300 03:48:08.970703 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-12' '--port=1' '--command=off'
2301 03:48:09.050498 >> Command sent successfully.
2302 03:48:09.055878 Returned 0 in 0 seconds
2303 03:48:09.156522 end: 5.1 power-off (duration 00:00:00) [common]
2305 03:48:09.156965 start: 5.2 read-feedback (timeout 00:10:00) [common]
2306 03:48:09.157339 Listened to connection for namespace 'common' for up to 1s
2307 03:48:10.158098 Finalising connection for namespace 'common'
2308 03:48:10.158762 Disconnecting from shell: Finalise
2309 03:48:10.159145
2310 03:48:10.260078 end: 5.2 read-feedback (duration 00:00:01) [common]
2311 03:48:10.260627 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12940478
2312 03:48:10.639763 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12940478
2313 03:48:10.639958 JobError: Your job cannot terminate cleanly.