Boot log: acer-cb317-1h-c3z6-dedede
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
1 17:08:22.498147 lava-dispatcher, installed at version: 2024.01
2 17:08:22.498363 start: 0 validate
3 17:08:22.498497 Start time: 2024-03-01 17:08:22.498490+00:00 (UTC)
4 17:08:22.498626 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:08:22.498759 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 17:08:22.766843 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:08:22.767008 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2245-gb01c108f53cc0%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:08:23.025246 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:08:23.025451 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2245-gb01c108f53cc0%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 17:08:25.607493 validate duration: 3.11
12 17:08:25.607786 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 17:08:25.607901 start: 1.1 download-retry (timeout 00:10:00) [common]
14 17:08:25.608011 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 17:08:25.608179 Not decompressing ramdisk as can be used compressed.
16 17:08:25.608266 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 17:08:25.608333 saving as /var/lib/lava/dispatcher/tmp/12908843/tftp-deploy-ul9h7tc_/ramdisk/rootfs.cpio.gz
18 17:08:25.608398 total size: 8418130 (8 MB)
19 17:08:26.120375 progress 0 % (0 MB)
20 17:08:26.123144 progress 5 % (0 MB)
21 17:08:26.125715 progress 10 % (0 MB)
22 17:08:26.128222 progress 15 % (1 MB)
23 17:08:26.130722 progress 20 % (1 MB)
24 17:08:26.133172 progress 25 % (2 MB)
25 17:08:26.135683 progress 30 % (2 MB)
26 17:08:26.138005 progress 35 % (2 MB)
27 17:08:26.140499 progress 40 % (3 MB)
28 17:08:26.142986 progress 45 % (3 MB)
29 17:08:26.145450 progress 50 % (4 MB)
30 17:08:26.147948 progress 55 % (4 MB)
31 17:08:26.150463 progress 60 % (4 MB)
32 17:08:26.152798 progress 65 % (5 MB)
33 17:08:26.155259 progress 70 % (5 MB)
34 17:08:26.157790 progress 75 % (6 MB)
35 17:08:26.160212 progress 80 % (6 MB)
36 17:08:26.162775 progress 85 % (6 MB)
37 17:08:26.165153 progress 90 % (7 MB)
38 17:08:26.167465 progress 95 % (7 MB)
39 17:08:26.169867 progress 100 % (8 MB)
40 17:08:26.170119 8 MB downloaded in 0.56 s (14.29 MB/s)
41 17:08:26.170284 end: 1.1.1 http-download (duration 00:00:01) [common]
43 17:08:26.170541 end: 1.1 download-retry (duration 00:00:01) [common]
44 17:08:26.170646 start: 1.2 download-retry (timeout 00:09:59) [common]
45 17:08:26.170733 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 17:08:26.170917 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2245-gb01c108f53cc0/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 17:08:26.171002 saving as /var/lib/lava/dispatcher/tmp/12908843/tftp-deploy-ul9h7tc_/kernel/bzImage
48 17:08:26.171075 total size: 9367440 (8 MB)
49 17:08:26.171144 No compression specified
50 17:08:26.172690 progress 0 % (0 MB)
51 17:08:26.175382 progress 5 % (0 MB)
52 17:08:26.178168 progress 10 % (0 MB)
53 17:08:26.180910 progress 15 % (1 MB)
54 17:08:26.183656 progress 20 % (1 MB)
55 17:08:26.186480 progress 25 % (2 MB)
56 17:08:26.189141 progress 30 % (2 MB)
57 17:08:26.192096 progress 35 % (3 MB)
58 17:08:26.195085 progress 40 % (3 MB)
59 17:08:26.198094 progress 45 % (4 MB)
60 17:08:26.200805 progress 50 % (4 MB)
61 17:08:26.203700 progress 55 % (4 MB)
62 17:08:26.206547 progress 60 % (5 MB)
63 17:08:26.209162 progress 65 % (5 MB)
64 17:08:26.212019 progress 70 % (6 MB)
65 17:08:26.214786 progress 75 % (6 MB)
66 17:08:26.217394 progress 80 % (7 MB)
67 17:08:26.220079 progress 85 % (7 MB)
68 17:08:26.222958 progress 90 % (8 MB)
69 17:08:26.225609 progress 95 % (8 MB)
70 17:08:26.228192 progress 100 % (8 MB)
71 17:08:26.228462 8 MB downloaded in 0.06 s (155.68 MB/s)
72 17:08:26.228704 end: 1.2.1 http-download (duration 00:00:00) [common]
74 17:08:26.229079 end: 1.2 download-retry (duration 00:00:00) [common]
75 17:08:26.229217 start: 1.3 download-retry (timeout 00:09:59) [common]
76 17:08:26.229336 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 17:08:26.229544 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2245-gb01c108f53cc0/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 17:08:26.229649 saving as /var/lib/lava/dispatcher/tmp/12908843/tftp-deploy-ul9h7tc_/modules/modules.tar
79 17:08:26.229715 total size: 250960 (0 MB)
80 17:08:26.229778 Using unxz to decompress xz
81 17:08:26.234798 progress 13 % (0 MB)
82 17:08:26.235264 progress 26 % (0 MB)
83 17:08:26.235548 progress 39 % (0 MB)
84 17:08:26.237356 progress 52 % (0 MB)
85 17:08:26.239611 progress 65 % (0 MB)
86 17:08:26.241682 progress 78 % (0 MB)
87 17:08:26.243714 progress 91 % (0 MB)
88 17:08:26.245752 progress 100 % (0 MB)
89 17:08:26.251784 0 MB downloaded in 0.02 s (10.85 MB/s)
90 17:08:26.252043 end: 1.3.1 http-download (duration 00:00:00) [common]
92 17:08:26.252319 end: 1.3 download-retry (duration 00:00:00) [common]
93 17:08:26.252435 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 17:08:26.252531 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 17:08:26.252613 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 17:08:26.252702 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 17:08:26.252930 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12908843/lava-overlay-z2azdzgs
98 17:08:26.253072 makedir: /var/lib/lava/dispatcher/tmp/12908843/lava-overlay-z2azdzgs/lava-12908843/bin
99 17:08:26.253177 makedir: /var/lib/lava/dispatcher/tmp/12908843/lava-overlay-z2azdzgs/lava-12908843/tests
100 17:08:26.253277 makedir: /var/lib/lava/dispatcher/tmp/12908843/lava-overlay-z2azdzgs/lava-12908843/results
101 17:08:26.253401 Creating /var/lib/lava/dispatcher/tmp/12908843/lava-overlay-z2azdzgs/lava-12908843/bin/lava-add-keys
102 17:08:26.253619 Creating /var/lib/lava/dispatcher/tmp/12908843/lava-overlay-z2azdzgs/lava-12908843/bin/lava-add-sources
103 17:08:26.253756 Creating /var/lib/lava/dispatcher/tmp/12908843/lava-overlay-z2azdzgs/lava-12908843/bin/lava-background-process-start
104 17:08:26.253892 Creating /var/lib/lava/dispatcher/tmp/12908843/lava-overlay-z2azdzgs/lava-12908843/bin/lava-background-process-stop
105 17:08:26.254036 Creating /var/lib/lava/dispatcher/tmp/12908843/lava-overlay-z2azdzgs/lava-12908843/bin/lava-common-functions
106 17:08:26.254195 Creating /var/lib/lava/dispatcher/tmp/12908843/lava-overlay-z2azdzgs/lava-12908843/bin/lava-echo-ipv4
107 17:08:26.254324 Creating /var/lib/lava/dispatcher/tmp/12908843/lava-overlay-z2azdzgs/lava-12908843/bin/lava-install-packages
108 17:08:26.254462 Creating /var/lib/lava/dispatcher/tmp/12908843/lava-overlay-z2azdzgs/lava-12908843/bin/lava-installed-packages
109 17:08:26.254592 Creating /var/lib/lava/dispatcher/tmp/12908843/lava-overlay-z2azdzgs/lava-12908843/bin/lava-os-build
110 17:08:26.254722 Creating /var/lib/lava/dispatcher/tmp/12908843/lava-overlay-z2azdzgs/lava-12908843/bin/lava-probe-channel
111 17:08:26.254852 Creating /var/lib/lava/dispatcher/tmp/12908843/lava-overlay-z2azdzgs/lava-12908843/bin/lava-probe-ip
112 17:08:26.254988 Creating /var/lib/lava/dispatcher/tmp/12908843/lava-overlay-z2azdzgs/lava-12908843/bin/lava-target-ip
113 17:08:26.255150 Creating /var/lib/lava/dispatcher/tmp/12908843/lava-overlay-z2azdzgs/lava-12908843/bin/lava-target-mac
114 17:08:26.255278 Creating /var/lib/lava/dispatcher/tmp/12908843/lava-overlay-z2azdzgs/lava-12908843/bin/lava-target-storage
115 17:08:26.255411 Creating /var/lib/lava/dispatcher/tmp/12908843/lava-overlay-z2azdzgs/lava-12908843/bin/lava-test-case
116 17:08:26.255549 Creating /var/lib/lava/dispatcher/tmp/12908843/lava-overlay-z2azdzgs/lava-12908843/bin/lava-test-event
117 17:08:26.255678 Creating /var/lib/lava/dispatcher/tmp/12908843/lava-overlay-z2azdzgs/lava-12908843/bin/lava-test-feedback
118 17:08:26.255805 Creating /var/lib/lava/dispatcher/tmp/12908843/lava-overlay-z2azdzgs/lava-12908843/bin/lava-test-raise
119 17:08:26.255935 Creating /var/lib/lava/dispatcher/tmp/12908843/lava-overlay-z2azdzgs/lava-12908843/bin/lava-test-reference
120 17:08:26.256076 Creating /var/lib/lava/dispatcher/tmp/12908843/lava-overlay-z2azdzgs/lava-12908843/bin/lava-test-runner
121 17:08:26.256207 Creating /var/lib/lava/dispatcher/tmp/12908843/lava-overlay-z2azdzgs/lava-12908843/bin/lava-test-set
122 17:08:26.256337 Creating /var/lib/lava/dispatcher/tmp/12908843/lava-overlay-z2azdzgs/lava-12908843/bin/lava-test-shell
123 17:08:26.256469 Updating /var/lib/lava/dispatcher/tmp/12908843/lava-overlay-z2azdzgs/lava-12908843/bin/lava-install-packages (oe)
124 17:08:26.256636 Updating /var/lib/lava/dispatcher/tmp/12908843/lava-overlay-z2azdzgs/lava-12908843/bin/lava-installed-packages (oe)
125 17:08:26.256763 Creating /var/lib/lava/dispatcher/tmp/12908843/lava-overlay-z2azdzgs/lava-12908843/environment
126 17:08:26.256864 LAVA metadata
127 17:08:26.256941 - LAVA_JOB_ID=12908843
128 17:08:26.257009 - LAVA_DISPATCHER_IP=192.168.201.1
129 17:08:26.257135 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 17:08:26.257206 skipped lava-vland-overlay
131 17:08:26.257286 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 17:08:26.257371 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 17:08:26.257446 skipped lava-multinode-overlay
134 17:08:26.257607 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 17:08:26.257696 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 17:08:26.257773 Loading test definitions
137 17:08:26.257877 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 17:08:26.257957 Using /lava-12908843 at stage 0
139 17:08:26.258294 uuid=12908843_1.4.2.3.1 testdef=None
140 17:08:26.258385 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 17:08:26.258470 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 17:08:26.259032 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 17:08:26.259278 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 17:08:26.259942 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 17:08:26.260198 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 17:08:26.260837 runner path: /var/lib/lava/dispatcher/tmp/12908843/lava-overlay-z2azdzgs/lava-12908843/0/tests/0_dmesg test_uuid 12908843_1.4.2.3.1
149 17:08:26.261000 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 17:08:26.261310 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 17:08:26.261413 Using /lava-12908843 at stage 1
153 17:08:26.261811 uuid=12908843_1.4.2.3.5 testdef=None
154 17:08:26.261901 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 17:08:26.261987 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 17:08:26.262478 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 17:08:26.262729 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 17:08:26.263541 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 17:08:26.263873 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 17:08:26.264962 runner path: /var/lib/lava/dispatcher/tmp/12908843/lava-overlay-z2azdzgs/lava-12908843/1/tests/1_bootrr test_uuid 12908843_1.4.2.3.5
163 17:08:26.265154 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 17:08:26.265537 Creating lava-test-runner.conf files
166 17:08:26.265675 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12908843/lava-overlay-z2azdzgs/lava-12908843/0 for stage 0
167 17:08:26.265773 - 0_dmesg
168 17:08:26.265865 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12908843/lava-overlay-z2azdzgs/lava-12908843/1 for stage 1
169 17:08:26.265999 - 1_bootrr
170 17:08:26.266097 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 17:08:26.266188 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 17:08:26.275910 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 17:08:26.276099 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 17:08:26.276234 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 17:08:26.276387 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 17:08:26.276524 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 17:08:26.547071 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 17:08:26.547478 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 17:08:26.547599 extracting modules file /var/lib/lava/dispatcher/tmp/12908843/tftp-deploy-ul9h7tc_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12908843/extract-overlay-ramdisk-ghtrfrby/ramdisk
180 17:08:26.562522 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 17:08:26.562681 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 17:08:26.562787 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12908843/compress-overlay-1g7k72ys/overlay-1.4.2.4.tar.gz to ramdisk
183 17:08:26.562870 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12908843/compress-overlay-1g7k72ys/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12908843/extract-overlay-ramdisk-ghtrfrby/ramdisk
184 17:08:26.572121 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 17:08:26.572273 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 17:08:26.572413 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 17:08:26.572539 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 17:08:26.572642 Building ramdisk /var/lib/lava/dispatcher/tmp/12908843/extract-overlay-ramdisk-ghtrfrby/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12908843/extract-overlay-ramdisk-ghtrfrby/ramdisk
189 17:08:26.722656 >> 49788 blocks
190 17:08:27.584031 rename /var/lib/lava/dispatcher/tmp/12908843/extract-overlay-ramdisk-ghtrfrby/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12908843/tftp-deploy-ul9h7tc_/ramdisk/ramdisk.cpio.gz
191 17:08:27.584501 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 17:08:27.584640 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 17:08:27.584746 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 17:08:27.584849 No mkimage arch provided, not using FIT.
195 17:08:27.584945 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 17:08:27.585034 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 17:08:27.585148 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 17:08:27.585253 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 17:08:27.585352 No LXC device requested
200 17:08:27.585448 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 17:08:27.585564 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 17:08:27.585654 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 17:08:27.585745 Checking files for TFTP limit of 4294967296 bytes.
204 17:08:27.586188 end: 1 tftp-deploy (duration 00:00:02) [common]
205 17:08:27.586304 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 17:08:27.586411 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 17:08:27.586543 substitutions:
208 17:08:27.586622 - {DTB}: None
209 17:08:27.586693 - {INITRD}: 12908843/tftp-deploy-ul9h7tc_/ramdisk/ramdisk.cpio.gz
210 17:08:27.586757 - {KERNEL}: 12908843/tftp-deploy-ul9h7tc_/kernel/bzImage
211 17:08:27.586817 - {LAVA_MAC}: None
212 17:08:27.586883 - {PRESEED_CONFIG}: None
213 17:08:27.586944 - {PRESEED_LOCAL}: None
214 17:08:27.587001 - {RAMDISK}: 12908843/tftp-deploy-ul9h7tc_/ramdisk/ramdisk.cpio.gz
215 17:08:27.587058 - {ROOT_PART}: None
216 17:08:27.587121 - {ROOT}: None
217 17:08:27.587181 - {SERVER_IP}: 192.168.201.1
218 17:08:27.587238 - {TEE}: None
219 17:08:27.587295 Parsed boot commands:
220 17:08:27.587352 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 17:08:27.587562 Parsed boot commands: tftpboot 192.168.201.1 12908843/tftp-deploy-ul9h7tc_/kernel/bzImage 12908843/tftp-deploy-ul9h7tc_/kernel/cmdline 12908843/tftp-deploy-ul9h7tc_/ramdisk/ramdisk.cpio.gz
222 17:08:27.587684 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 17:08:27.587778 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 17:08:27.587885 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 17:08:27.587977 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 17:08:27.588067 Not connected, no need to disconnect.
227 17:08:27.588158 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 17:08:27.588370 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 17:08:27.588465 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cb317-1h-c3z6-dedede-cbg-8'
230 17:08:27.593043 Setting prompt string to ['lava-test: # ']
231 17:08:27.593469 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 17:08:27.593616 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 17:08:27.593730 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 17:08:27.593838 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 17:08:27.594180 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-8' '--port=1' '--command=reboot'
236 17:08:32.724390 >> Command sent successfully.
237 17:08:32.727020 Returned 0 in 5 seconds
238 17:08:32.827490 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 17:08:32.827815 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 17:08:32.827916 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 17:08:32.828005 Setting prompt string to 'Starting depthcharge on Magolor...'
243 17:08:32.828076 Changing prompt to 'Starting depthcharge on Magolor...'
244 17:08:32.828142 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
245 17:08:32.828414 [Enter `^Ec?' for help]
246 17:08:33.968490
247 17:08:33.968638
248 17:08:33.978526 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
249 17:08:33.981915 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
250 17:08:33.988352 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
251 17:08:33.991761 CPU: AES supported, TXT NOT supported, VT supported
252 17:08:33.998419 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
253 17:08:34.001416 PCH: device id 4d87 (rev 01) is Jasperlake Super
254 17:08:34.008315 IGD: device id 4e55 (rev 01) is Jasperlake GT4
255 17:08:34.008401 VBOOT: Loading verstage.
256 17:08:34.015650 FMAP: Found "FLASH" version 1.1 at 0xc04000.
257 17:08:34.018732 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
258 17:08:34.025418 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
259 17:08:34.032179 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
260 17:08:34.032275
261 17:08:34.032343
262 17:08:34.041714 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
263 17:08:34.057332 Probing TPM: . done!
264 17:08:34.060656 TPM ready after 0 ms
265 17:08:34.064457 Connected to device vid:did:rid of 1ae0:0028:00
266 17:08:34.074808 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
267 17:08:34.081416 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
268 17:08:34.084929 Initialized TPM device CR50 revision 0
269 17:08:34.141938 tlcl_send_startup: Startup return code is 0
270 17:08:34.142051 TPM: setup succeeded
271 17:08:34.156278 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
272 17:08:34.170705 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
273 17:08:34.183621 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
274 17:08:34.193684 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
275 17:08:34.197175 Chrome EC: UHEPI supported
276 17:08:34.200541 Phase 1
277 17:08:34.203552 FMAP: area GBB found @ c05000 (12288 bytes)
278 17:08:34.210407 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
279 17:08:34.217650 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
280 17:08:34.221069 Recovery requested (1009000e)
281 17:08:34.229469 TPM: Extending digest for VBOOT: boot mode into PCR 0
282 17:08:34.236203 tlcl_extend: response is 0
283 17:08:34.242664 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
284 17:08:34.252287 tlcl_extend: response is 0
285 17:08:34.258993 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
286 17:08:34.261985 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
287 17:08:34.268785 BS: verstage times (exec / console): total (unknown) / 124 ms
288 17:08:34.272480
289 17:08:34.272564
290 17:08:34.282702 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
291 17:08:34.286025 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
292 17:08:34.292900 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
293 17:08:34.296075 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
294 17:08:34.299516 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
295 17:08:34.306237 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
296 17:08:34.309518 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
297 17:08:34.312537 TCO_STS: 0000 0001
298 17:08:34.315920 GEN_PMCON: d0015038 00002200
299 17:08:34.319239 GBLRST_CAUSE: 00000000 00000000
300 17:08:34.319325 prev_sleep_state 5
301 17:08:34.322672 Boot Count incremented to 6783
302 17:08:34.329517 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
303 17:08:34.332536 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
304 17:08:34.336242 Chrome EC: UHEPI supported
305 17:08:34.342868 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
306 17:08:34.349627 Probing TPM: done!
307 17:08:34.355863 Connected to device vid:did:rid of 1ae0:0028:00
308 17:08:34.366014 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
309 17:08:34.369397 Initialized TPM device CR50 revision 0
310 17:08:34.384997 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
311 17:08:34.391239 MRC: Hash idx 0x100b comparison successful.
312 17:08:34.391326 MRC cache found, size 5458
313 17:08:34.395065 bootmode is set to: 2
314 17:08:34.395150 SPD INDEX = 0
315 17:08:34.402317 CBFS: Found 'spd.bin' @0x40c40 size 0x600
316 17:08:34.402419 SPD: module type is LPDDR4X
317 17:08:34.409455 SPD: module part number is MT53E512M32D2NP-046 WT:E
318 17:08:34.416050 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
319 17:08:34.419473 SPD: device width 16 bits, bus width 32 bits
320 17:08:34.422840 SPD: module size is 4096 MB (per channel)
321 17:08:34.429152 meminit_channels: DRAM half-populated
322 17:08:34.510135 CBMEM:
323 17:08:34.513761 IMD: root @ 0x76fff000 254 entries.
324 17:08:34.516829 IMD: root @ 0x76ffec00 62 entries.
325 17:08:34.520439 FMAP: area RO_VPD found @ c00000 (16384 bytes)
326 17:08:34.526788 WARNING: RO_VPD is uninitialized or empty.
327 17:08:34.530099 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
328 17:08:34.533728 External stage cache:
329 17:08:34.537246 IMD: root @ 0x7b3ff000 254 entries.
330 17:08:34.540281 IMD: root @ 0x7b3fec00 62 entries.
331 17:08:34.550500 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
332 17:08:34.556903 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
333 17:08:34.563551 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
334 17:08:34.572033 MRC: 'RECOVERY_MRC_CACHE' does not need update.
335 17:08:34.578580 cse_lite: Skip switching to RW in the recovery path
336 17:08:34.578669 1 DIMMs found
337 17:08:34.578741 SMM Memory Map
338 17:08:34.581551 SMRAM : 0x7b000000 0x800000
339 17:08:34.588398 Subregion 0: 0x7b000000 0x200000
340 17:08:34.591787 Subregion 1: 0x7b200000 0x200000
341 17:08:34.595116 Subregion 2: 0x7b400000 0x400000
342 17:08:34.595201 top_of_ram = 0x77000000
343 17:08:34.601516 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
344 17:08:34.608196 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
345 17:08:34.611423 MTRR Range: Start=ff000000 End=0 (Size 1000000)
346 17:08:34.618152 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
347 17:08:34.624348 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
348 17:08:34.634299 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
349 17:08:34.637704 Processing 188 relocs. Offset value of 0x74c0e000
350 17:08:34.646880 BS: romstage times (exec / console): total (unknown) / 255 ms
351 17:08:34.651516
352 17:08:34.651600
353 17:08:34.661135 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
354 17:08:34.667845 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
355 17:08:34.671331 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
356 17:08:34.677820 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
357 17:08:34.734087 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
358 17:08:34.740623 Processing 4805 relocs. Offset value of 0x75da8000
359 17:08:34.747210 BS: postcar times (exec / console): total (unknown) / 42 ms
360 17:08:34.747297
361 17:08:34.747365
362 17:08:34.756914 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
363 17:08:34.757001 Normal boot
364 17:08:34.761102 EC returned error result code 3
365 17:08:34.764017 FW_CONFIG value is 0x204
366 17:08:34.767716 GENERIC: 0.0 disabled by fw_config
367 17:08:34.774230 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
368 17:08:34.777472 I2C: 00:10 disabled by fw_config
369 17:08:34.780636 I2C: 00:10 disabled by fw_config
370 17:08:34.784090 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
371 17:08:34.790630 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
372 17:08:34.793882 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
373 17:08:34.800594 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
374 17:08:34.803933 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
375 17:08:34.806867 I2C: 00:10 disabled by fw_config
376 17:08:34.813751 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
377 17:08:34.820151 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
378 17:08:34.823388 I2C: 00:1a disabled by fw_config
379 17:08:34.826868 I2C: 00:1a disabled by fw_config
380 17:08:34.833536 fw_config match found: AUDIO_AMP=UNPROVISIONED
381 17:08:34.836794 fw_config match found: AUDIO_AMP=UNPROVISIONED
382 17:08:34.840514 GENERIC: 0.0 disabled by fw_config
383 17:08:34.847149 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
384 17:08:34.850546 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
385 17:08:34.857293 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
386 17:08:34.860555 microcode: Update skipped, already up-to-date
387 17:08:34.866834 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
388 17:08:34.893092 Detected 2 core, 2 thread CPU.
389 17:08:34.896248 Setting up SMI for CPU
390 17:08:34.899658 IED base = 0x7b400000
391 17:08:34.900281 IED size = 0x00400000
392 17:08:34.903172 Will perform SMM setup.
393 17:08:34.906073 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
394 17:08:34.916248 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
395 17:08:34.919244 Processing 16 relocs. Offset value of 0x00030000
396 17:08:34.923545 Attempting to start 1 APs
397 17:08:34.926818 Waiting for 10ms after sending INIT.
398 17:08:34.942743 Waiting for 1st SIPI to complete...done.
399 17:08:34.943395 AP: slot 1 apic_id 2.
400 17:08:34.949461 Waiting for 2nd SIPI to complete...done.
401 17:08:34.956134 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
402 17:08:34.962827 Processing 13 relocs. Offset value of 0x00038000
403 17:08:34.963271 Unable to locate Global NVS
404 17:08:34.972666 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
405 17:08:34.975718 Installing permanent SMM handler to 0x7b000000
406 17:08:34.985690 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
407 17:08:34.989108 Processing 704 relocs. Offset value of 0x7b010000
408 17:08:34.998910 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
409 17:08:35.002147 Processing 13 relocs. Offset value of 0x7b008000
410 17:08:35.008840 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
411 17:08:35.012308 Unable to locate Global NVS
412 17:08:35.018976 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
413 17:08:35.022314 Clearing SMI status registers
414 17:08:35.022747 SMI_STS: PM1
415 17:08:35.025334 PM1_STS: PWRBTN
416 17:08:35.025847 TCO_STS: INTRD_DET
417 17:08:35.035338 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
418 17:08:35.038533 In relocation handler: CPU 0
419 17:08:35.041834 New SMBASE=0x7b000000 IEDBASE=0x7b400000
420 17:08:35.045373 Writing SMRR. base = 0x7b000006, mask=0xff800800
421 17:08:35.048382 Relocation complete.
422 17:08:35.055293 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
423 17:08:35.059338 In relocation handler: CPU 1
424 17:08:35.062929 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
425 17:08:35.066296 Writing SMRR. base = 0x7b000006, mask=0xff800800
426 17:08:35.069800 Relocation complete.
427 17:08:35.072724 Initializing CPU #0
428 17:08:35.076137 CPU: vendor Intel device 906c0
429 17:08:35.079587 CPU: family 06, model 9c, stepping 00
430 17:08:35.082622 Clearing out pending MCEs
431 17:08:35.083105 Setting up local APIC...
432 17:08:35.086020 apic_id: 0x00 done.
433 17:08:35.089537 Turbo is available but hidden
434 17:08:35.092896 Turbo is available and visible
435 17:08:35.095938 microcode: Update skipped, already up-to-date
436 17:08:35.098928 CPU #0 initialized
437 17:08:35.099364 Initializing CPU #1
438 17:08:35.102528 CPU: vendor Intel device 906c0
439 17:08:35.109366 CPU: family 06, model 9c, stepping 00
440 17:08:35.109878 Clearing out pending MCEs
441 17:08:35.112468 Setting up local APIC...
442 17:08:35.115984 apic_id: 0x02 done.
443 17:08:35.119507 microcode: Update skipped, already up-to-date
444 17:08:35.122497 CPU #1 initialized
445 17:08:35.125935 bsp_do_flight_plan done after 173 msecs.
446 17:08:35.129150 CPU: frequency set to 2800 MHz
447 17:08:35.129610 Enabling SMIs.
448 17:08:35.135526 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 85 / 287 ms
449 17:08:35.147036 Probing TPM: done!
450 17:08:35.153739 Connected to device vid:did:rid of 1ae0:0028:00
451 17:08:35.163606 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
452 17:08:35.167012 Initialized TPM device CR50 revision 0
453 17:08:35.170058 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
454 17:08:35.177259 Found a VBT of 7680 bytes after decompression
455 17:08:35.183966 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
456 17:08:35.219109 Detected 2 core, 2 thread CPU.
457 17:08:35.222046 Detected 2 core, 2 thread CPU.
458 17:08:35.583574 Display FSP Version Info HOB
459 17:08:35.587312 Reference Code - CPU = 8.7.22.30
460 17:08:35.590219 uCode Version = 24.0.0.1f
461 17:08:35.593594 TXT ACM version = ff.ff.ff.ffff
462 17:08:35.596865 Reference Code - ME = 8.7.22.30
463 17:08:35.600169 MEBx version = 0.0.0.0
464 17:08:35.603487 ME Firmware Version = Consumer SKU
465 17:08:35.606637 Reference Code - PCH = 8.7.22.30
466 17:08:35.609983 PCH-CRID Status = Disabled
467 17:08:35.613457 PCH-CRID Original Value = ff.ff.ff.ffff
468 17:08:35.616693 PCH-CRID New Value = ff.ff.ff.ffff
469 17:08:35.620053 OPROM - RST - RAID = ff.ff.ff.ffff
470 17:08:35.623408 PCH Hsio Version = 4.0.0.0
471 17:08:35.626615 Reference Code - SA - System Agent = 8.7.22.30
472 17:08:35.629978 Reference Code - MRC = 0.0.4.68
473 17:08:35.633208 SA - PCIe Version = 8.7.22.30
474 17:08:35.637035 SA-CRID Status = Disabled
475 17:08:35.640657 SA-CRID Original Value = 0.0.0.0
476 17:08:35.643977 SA-CRID New Value = 0.0.0.0
477 17:08:35.644090 OPROM - VBIOS = ff.ff.ff.ffff
478 17:08:35.651177 IO Manageability Engine FW Version = ff.ff.ff.ffff
479 17:08:35.654467 PHY Build Version = ff.ff.ff.ffff
480 17:08:35.657693 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
481 17:08:35.664412 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
482 17:08:35.667589 ITSS IRQ Polarities Before:
483 17:08:35.667674 IPC0: 0xffffffff
484 17:08:35.670893 IPC1: 0xffffffff
485 17:08:35.670977 IPC2: 0xffffffff
486 17:08:35.674326 IPC3: 0xffffffff
487 17:08:35.677697 ITSS IRQ Polarities After:
488 17:08:35.677784 IPC0: 0xffffffff
489 17:08:35.681144 IPC1: 0xffffffff
490 17:08:35.681260 IPC2: 0xffffffff
491 17:08:35.684242 IPC3: 0xffffffff
492 17:08:35.694004 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
493 17:08:35.700869 BS: BS_DEV_INIT_CHIPS run times (exec / console): 404 / 156 ms
494 17:08:35.704281 Enumerating buses...
495 17:08:35.707618 Show all devs... Before device enumeration.
496 17:08:35.710641 Root Device: enabled 1
497 17:08:35.714341 CPU_CLUSTER: 0: enabled 1
498 17:08:35.717662 DOMAIN: 0000: enabled 1
499 17:08:35.717775 PCI: 00:00.0: enabled 1
500 17:08:35.720685 PCI: 00:02.0: enabled 1
501 17:08:35.724034 PCI: 00:04.0: enabled 1
502 17:08:35.727352 PCI: 00:05.0: enabled 1
503 17:08:35.727431 PCI: 00:09.0: enabled 0
504 17:08:35.730718 PCI: 00:12.6: enabled 0
505 17:08:35.734077 PCI: 00:14.0: enabled 1
506 17:08:35.734189 PCI: 00:14.1: enabled 0
507 17:08:35.737074 PCI: 00:14.2: enabled 0
508 17:08:35.740458 PCI: 00:14.3: enabled 1
509 17:08:35.743776 PCI: 00:14.5: enabled 1
510 17:08:35.743889 PCI: 00:15.0: enabled 1
511 17:08:35.747117 PCI: 00:15.1: enabled 1
512 17:08:35.750413 PCI: 00:15.2: enabled 1
513 17:08:35.753642 PCI: 00:15.3: enabled 1
514 17:08:35.753754 PCI: 00:16.0: enabled 1
515 17:08:35.757113 PCI: 00:16.1: enabled 0
516 17:08:35.760252 PCI: 00:16.4: enabled 0
517 17:08:35.763731 PCI: 00:16.5: enabled 0
518 17:08:35.763816 PCI: 00:17.0: enabled 0
519 17:08:35.766951 PCI: 00:19.0: enabled 1
520 17:08:35.770444 PCI: 00:19.1: enabled 0
521 17:08:35.773416 PCI: 00:19.2: enabled 1
522 17:08:35.773538 PCI: 00:1a.0: enabled 1
523 17:08:35.776917 PCI: 00:1c.0: enabled 0
524 17:08:35.780147 PCI: 00:1c.1: enabled 0
525 17:08:35.780261 PCI: 00:1c.2: enabled 0
526 17:08:35.783596 PCI: 00:1c.3: enabled 0
527 17:08:35.786820 PCI: 00:1c.4: enabled 0
528 17:08:35.790077 PCI: 00:1c.5: enabled 0
529 17:08:35.790203 PCI: 00:1c.6: enabled 0
530 17:08:35.793335 PCI: 00:1c.7: enabled 1
531 17:08:35.796792 PCI: 00:1e.0: enabled 0
532 17:08:35.800124 PCI: 00:1e.1: enabled 0
533 17:08:35.800229 PCI: 00:1e.2: enabled 1
534 17:08:35.803591 PCI: 00:1e.3: enabled 0
535 17:08:35.806639 PCI: 00:1f.0: enabled 1
536 17:08:35.810066 PCI: 00:1f.1: enabled 1
537 17:08:35.810172 PCI: 00:1f.2: enabled 1
538 17:08:35.813367 PCI: 00:1f.3: enabled 1
539 17:08:35.816593 PCI: 00:1f.4: enabled 0
540 17:08:35.816671 PCI: 00:1f.5: enabled 1
541 17:08:35.819760 PCI: 00:1f.7: enabled 0
542 17:08:35.823152 GENERIC: 0.0: enabled 1
543 17:08:35.826799 GENERIC: 0.0: enabled 1
544 17:08:35.826886 USB0 port 0: enabled 1
545 17:08:35.829936 GENERIC: 0.0: enabled 1
546 17:08:35.833120 I2C: 00:2c: enabled 1
547 17:08:35.833227 I2C: 00:15: enabled 1
548 17:08:35.836214 GENERIC: 0.0: enabled 0
549 17:08:35.839520 I2C: 00:15: enabled 1
550 17:08:35.842834 I2C: 00:10: enabled 0
551 17:08:35.842914 I2C: 00:10: enabled 0
552 17:08:35.846157 I2C: 00:2c: enabled 1
553 17:08:35.849582 I2C: 00:40: enabled 1
554 17:08:35.849688 I2C: 00:10: enabled 1
555 17:08:35.852945 I2C: 00:39: enabled 1
556 17:08:35.856127 I2C: 00:36: enabled 1
557 17:08:35.856205 I2C: 00:10: enabled 0
558 17:08:35.859577 I2C: 00:0c: enabled 1
559 17:08:35.862559 I2C: 00:50: enabled 1
560 17:08:35.862662 I2C: 00:1a: enabled 1
561 17:08:35.865931 I2C: 00:1a: enabled 0
562 17:08:35.869312 I2C: 00:1a: enabled 0
563 17:08:35.869403 I2C: 00:28: enabled 1
564 17:08:35.872587 I2C: 00:29: enabled 1
565 17:08:35.875964 PCI: 00:00.0: enabled 1
566 17:08:35.876045 SPI: 00: enabled 1
567 17:08:35.879186 PNP: 0c09.0: enabled 1
568 17:08:35.882329 GENERIC: 0.0: enabled 0
569 17:08:35.885661 USB2 port 0: enabled 1
570 17:08:35.885741 USB2 port 1: enabled 1
571 17:08:35.889111 USB2 port 2: enabled 1
572 17:08:35.892441 USB2 port 3: enabled 1
573 17:08:35.892559 USB2 port 4: enabled 0
574 17:08:35.895554 USB2 port 5: enabled 1
575 17:08:35.898871 USB2 port 6: enabled 0
576 17:08:35.898955 USB2 port 7: enabled 1
577 17:08:35.902268 USB3 port 0: enabled 1
578 17:08:35.905699 USB3 port 1: enabled 1
579 17:08:35.908841 USB3 port 2: enabled 1
580 17:08:35.908923 USB3 port 3: enabled 1
581 17:08:35.912156 APIC: 00: enabled 1
582 17:08:35.915461 APIC: 02: enabled 1
583 17:08:35.915565 Compare with tree...
584 17:08:35.918872 Root Device: enabled 1
585 17:08:35.922133 CPU_CLUSTER: 0: enabled 1
586 17:08:35.922214 APIC: 00: enabled 1
587 17:08:35.925576 APIC: 02: enabled 1
588 17:08:35.928520 DOMAIN: 0000: enabled 1
589 17:08:35.932039 PCI: 00:00.0: enabled 1
590 17:08:35.932124 PCI: 00:02.0: enabled 1
591 17:08:35.935396 PCI: 00:04.0: enabled 1
592 17:08:35.938586 GENERIC: 0.0: enabled 1
593 17:08:35.941793 PCI: 00:05.0: enabled 1
594 17:08:35.945148 GENERIC: 0.0: enabled 1
595 17:08:35.945262 PCI: 00:09.0: enabled 0
596 17:08:35.948596 PCI: 00:12.6: enabled 0
597 17:08:35.951887 PCI: 00:14.0: enabled 1
598 17:08:35.955224 USB0 port 0: enabled 1
599 17:08:35.958442 USB2 port 0: enabled 1
600 17:08:35.958528 USB2 port 1: enabled 1
601 17:08:35.961865 USB2 port 2: enabled 1
602 17:08:35.964766 USB2 port 3: enabled 1
603 17:08:35.968183 USB2 port 4: enabled 0
604 17:08:35.971511 USB2 port 5: enabled 1
605 17:08:35.974827 USB2 port 6: enabled 0
606 17:08:35.974940 USB2 port 7: enabled 1
607 17:08:35.978032 USB3 port 0: enabled 1
608 17:08:35.981533 USB3 port 1: enabled 1
609 17:08:35.984999 USB3 port 2: enabled 1
610 17:08:35.988003 USB3 port 3: enabled 1
611 17:08:35.988089 PCI: 00:14.1: enabled 0
612 17:08:35.991396 PCI: 00:14.2: enabled 0
613 17:08:35.994625 PCI: 00:14.3: enabled 1
614 17:08:35.998200 GENERIC: 0.0: enabled 1
615 17:08:36.001335 PCI: 00:14.5: enabled 1
616 17:08:36.001479 PCI: 00:15.0: enabled 1
617 17:08:36.004736 I2C: 00:2c: enabled 1
618 17:08:36.007907 I2C: 00:15: enabled 1
619 17:08:36.011165 PCI: 00:15.1: enabled 1
620 17:08:36.014632 PCI: 00:15.2: enabled 1
621 17:08:36.014717 GENERIC: 0.0: enabled 0
622 17:08:36.017876 I2C: 00:15: enabled 1
623 17:08:36.021174 I2C: 00:10: enabled 0
624 17:08:36.024358 I2C: 00:10: enabled 0
625 17:08:36.024475 I2C: 00:2c: enabled 1
626 17:08:36.027645 I2C: 00:40: enabled 1
627 17:08:36.031048 I2C: 00:10: enabled 1
628 17:08:36.034343 I2C: 00:39: enabled 1
629 17:08:36.037757 PCI: 00:15.3: enabled 1
630 17:08:36.037871 I2C: 00:36: enabled 1
631 17:08:36.040798 I2C: 00:10: enabled 0
632 17:08:36.044256 I2C: 00:0c: enabled 1
633 17:08:36.047515 I2C: 00:50: enabled 1
634 17:08:36.047630 PCI: 00:16.0: enabled 1
635 17:08:36.050663 PCI: 00:16.1: enabled 0
636 17:08:36.054179 PCI: 00:16.4: enabled 0
637 17:08:36.057566 PCI: 00:16.5: enabled 0
638 17:08:36.060729 PCI: 00:17.0: enabled 0
639 17:08:36.060817 PCI: 00:19.0: enabled 1
640 17:08:36.064132 I2C: 00:1a: enabled 1
641 17:08:36.067143 I2C: 00:1a: enabled 0
642 17:08:36.070549 I2C: 00:1a: enabled 0
643 17:08:36.070630 I2C: 00:28: enabled 1
644 17:08:36.073910 I2C: 00:29: enabled 1
645 17:08:36.077210 PCI: 00:19.1: enabled 0
646 17:08:36.080606 PCI: 00:19.2: enabled 1
647 17:08:36.084072 PCI: 00:1a.0: enabled 1
648 17:08:36.084166 PCI: 00:1e.0: enabled 0
649 17:08:36.087001 PCI: 00:1e.1: enabled 0
650 17:08:36.090342 PCI: 00:1e.2: enabled 1
651 17:08:36.093773 SPI: 00: enabled 1
652 17:08:36.093850 PCI: 00:1e.3: enabled 0
653 17:08:36.097278 PCI: 00:1f.0: enabled 1
654 17:08:36.100207 PNP: 0c09.0: enabled 1
655 17:08:36.103484 PCI: 00:1f.1: enabled 1
656 17:08:36.107035 PCI: 00:1f.2: enabled 1
657 17:08:36.107140 PCI: 00:1f.3: enabled 1
658 17:08:36.110311 GENERIC: 0.0: enabled 0
659 17:08:36.113630 PCI: 00:1f.4: enabled 0
660 17:08:36.116870 PCI: 00:1f.5: enabled 1
661 17:08:36.120099 PCI: 00:1f.7: enabled 0
662 17:08:36.120233 Root Device scanning...
663 17:08:36.123438 scan_static_bus for Root Device
664 17:08:36.126775 CPU_CLUSTER: 0 enabled
665 17:08:36.130096 DOMAIN: 0000 enabled
666 17:08:36.133154 DOMAIN: 0000 scanning...
667 17:08:36.133320 PCI: pci_scan_bus for bus 00
668 17:08:36.136604 PCI: 00:00.0 [8086/0000] ops
669 17:08:36.140016 PCI: 00:00.0 [8086/4e22] enabled
670 17:08:36.143352 PCI: 00:02.0 [8086/0000] bus ops
671 17:08:36.146472 PCI: 00:02.0 [8086/4e55] enabled
672 17:08:36.150378 PCI: 00:04.0 [8086/0000] bus ops
673 17:08:36.153333 PCI: 00:04.0 [8086/4e03] enabled
674 17:08:36.156878 PCI: 00:05.0 [8086/0000] bus ops
675 17:08:36.159674 PCI: 00:05.0 [8086/4e19] enabled
676 17:08:36.162938 PCI: 00:08.0 [8086/4e11] enabled
677 17:08:36.166393 PCI: 00:14.0 [8086/0000] bus ops
678 17:08:36.169591 PCI: 00:14.0 [8086/4ded] enabled
679 17:08:36.172957 PCI: 00:14.2 [8086/4def] disabled
680 17:08:36.176307 PCI: 00:14.3 [8086/0000] bus ops
681 17:08:36.179845 PCI: 00:14.3 [8086/4df0] enabled
682 17:08:36.182869 PCI: 00:14.5 [8086/0000] ops
683 17:08:36.186294 PCI: 00:14.5 [8086/4df8] enabled
684 17:08:36.189512 PCI: 00:15.0 [8086/0000] bus ops
685 17:08:36.192795 PCI: 00:15.0 [8086/4de8] enabled
686 17:08:36.196222 PCI: 00:15.1 [8086/0000] bus ops
687 17:08:36.199658 PCI: 00:15.1 [8086/4de9] enabled
688 17:08:36.202684 PCI: 00:15.2 [8086/0000] bus ops
689 17:08:36.206082 PCI: 00:15.2 [8086/4dea] enabled
690 17:08:36.209401 PCI: 00:15.3 [8086/0000] bus ops
691 17:08:36.212732 PCI: 00:15.3 [8086/4deb] enabled
692 17:08:36.216159 PCI: 00:16.0 [8086/0000] ops
693 17:08:36.219286 PCI: 00:16.0 [8086/4de0] enabled
694 17:08:36.222689 PCI: 00:19.0 [8086/0000] bus ops
695 17:08:36.226079 PCI: 00:19.0 [8086/4dc5] enabled
696 17:08:36.228971 PCI: 00:19.2 [8086/0000] ops
697 17:08:36.232284 PCI: 00:19.2 [8086/4dc7] enabled
698 17:08:36.235599 PCI: 00:1a.0 [8086/0000] ops
699 17:08:36.239027 PCI: 00:1a.0 [8086/4dc4] enabled
700 17:08:36.242247 PCI: 00:1e.0 [8086/0000] ops
701 17:08:36.245655 PCI: 00:1e.0 [8086/4da8] disabled
702 17:08:36.248830 PCI: 00:1e.2 [8086/0000] bus ops
703 17:08:36.252266 PCI: 00:1e.2 [8086/4daa] enabled
704 17:08:36.255609 PCI: 00:1f.0 [8086/0000] bus ops
705 17:08:36.259136 PCI: 00:1f.0 [8086/4d87] enabled
706 17:08:36.265354 PCI: Static device PCI: 00:1f.1 not found, disabling it.
707 17:08:36.265470 RTC Init
708 17:08:36.268833 Set power on after power failure.
709 17:08:36.272063 Disabling Deep S3
710 17:08:36.272209 Disabling Deep S3
711 17:08:36.275191 Disabling Deep S4
712 17:08:36.275323 Disabling Deep S4
713 17:08:36.278448 Disabling Deep S5
714 17:08:36.278531 Disabling Deep S5
715 17:08:36.281922 PCI: 00:1f.2 [0000/0000] hidden
716 17:08:36.285199 PCI: 00:1f.3 [8086/0000] bus ops
717 17:08:36.288409 PCI: 00:1f.3 [8086/4dc8] enabled
718 17:08:36.291750 PCI: 00:1f.5 [8086/0000] bus ops
719 17:08:36.295111 PCI: 00:1f.5 [8086/4da4] enabled
720 17:08:36.298128 PCI: Leftover static devices:
721 17:08:36.301539 PCI: 00:12.6
722 17:08:36.301619 PCI: 00:09.0
723 17:08:36.305055 PCI: 00:14.1
724 17:08:36.305142 PCI: 00:16.1
725 17:08:36.305210 PCI: 00:16.4
726 17:08:36.308496 PCI: 00:16.5
727 17:08:36.308604 PCI: 00:17.0
728 17:08:36.311763 PCI: 00:19.1
729 17:08:36.311874 PCI: 00:1e.1
730 17:08:36.311945 PCI: 00:1e.3
731 17:08:36.315839 PCI: 00:1f.1
732 17:08:36.315933 PCI: 00:1f.4
733 17:08:36.316025 PCI: 00:1f.7
734 17:08:36.319216 PCI: Check your devicetree.cb.
735 17:08:36.322690 PCI: 00:02.0 scanning...
736 17:08:36.326079 scan_generic_bus for PCI: 00:02.0
737 17:08:36.351331 scan_generic_bus for PCI: 00:02.0 done
738 17:08:36.351551 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
739 17:08:36.351664 PCI: 00:04.0 scanning...
740 17:08:36.351884 scan_generic_bus for PCI: 00:04.0
741 17:08:36.352001 GENERIC: 0.0 enabled
742 17:08:36.352144 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
743 17:08:36.352457 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
744 17:08:36.356126 PCI: 00:05.0 scanning...
745 17:08:36.359453 scan_generic_bus for PCI: 00:05.0
746 17:08:36.362692 GENERIC: 0.0 enabled
747 17:08:36.369040 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
748 17:08:36.372381 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
749 17:08:36.375759 PCI: 00:14.0 scanning...
750 17:08:36.379044 scan_static_bus for PCI: 00:14.0
751 17:08:36.382440 USB0 port 0 enabled
752 17:08:36.382570 USB0 port 0 scanning...
753 17:08:36.385639 scan_static_bus for USB0 port 0
754 17:08:36.388831 USB2 port 0 enabled
755 17:08:36.392162 USB2 port 1 enabled
756 17:08:36.392324 USB2 port 2 enabled
757 17:08:36.395584 USB2 port 3 enabled
758 17:08:36.398803 USB2 port 4 disabled
759 17:08:36.398995 USB2 port 5 enabled
760 17:08:36.402271 USB2 port 6 disabled
761 17:08:36.402477 USB2 port 7 enabled
762 17:08:36.405693 USB3 port 0 enabled
763 17:08:36.409224 USB3 port 1 enabled
764 17:08:36.409506 USB3 port 2 enabled
765 17:08:36.412273 USB3 port 3 enabled
766 17:08:36.415613 USB2 port 0 scanning...
767 17:08:36.418819 scan_static_bus for USB2 port 0
768 17:08:36.422523 scan_static_bus for USB2 port 0 done
769 17:08:36.425738 scan_bus: bus USB2 port 0 finished in 6 msecs
770 17:08:36.428624 USB2 port 1 scanning...
771 17:08:36.432024 scan_static_bus for USB2 port 1
772 17:08:36.435237 scan_static_bus for USB2 port 1 done
773 17:08:36.438650 scan_bus: bus USB2 port 1 finished in 6 msecs
774 17:08:36.441848 USB2 port 2 scanning...
775 17:08:36.445048 scan_static_bus for USB2 port 2
776 17:08:36.448497 scan_static_bus for USB2 port 2 done
777 17:08:36.454935 scan_bus: bus USB2 port 2 finished in 6 msecs
778 17:08:36.455054 USB2 port 3 scanning...
779 17:08:36.458386 scan_static_bus for USB2 port 3
780 17:08:36.464775 scan_static_bus for USB2 port 3 done
781 17:08:36.468307 scan_bus: bus USB2 port 3 finished in 6 msecs
782 17:08:36.471175 USB2 port 5 scanning...
783 17:08:36.474532 scan_static_bus for USB2 port 5
784 17:08:36.477913 scan_static_bus for USB2 port 5 done
785 17:08:36.481251 scan_bus: bus USB2 port 5 finished in 6 msecs
786 17:08:36.484730 USB2 port 7 scanning...
787 17:08:36.487897 scan_static_bus for USB2 port 7
788 17:08:36.491281 scan_static_bus for USB2 port 7 done
789 17:08:36.494512 scan_bus: bus USB2 port 7 finished in 6 msecs
790 17:08:36.497740 USB3 port 0 scanning...
791 17:08:36.501090 scan_static_bus for USB3 port 0
792 17:08:36.504504 scan_static_bus for USB3 port 0 done
793 17:08:36.510954 scan_bus: bus USB3 port 0 finished in 6 msecs
794 17:08:36.511039 USB3 port 1 scanning...
795 17:08:36.514359 scan_static_bus for USB3 port 1
796 17:08:36.521023 scan_static_bus for USB3 port 1 done
797 17:08:36.524248 scan_bus: bus USB3 port 1 finished in 6 msecs
798 17:08:36.527430 USB3 port 2 scanning...
799 17:08:36.530928 scan_static_bus for USB3 port 2
800 17:08:36.534174 scan_static_bus for USB3 port 2 done
801 17:08:36.537511 scan_bus: bus USB3 port 2 finished in 6 msecs
802 17:08:36.540759 USB3 port 3 scanning...
803 17:08:36.543814 scan_static_bus for USB3 port 3
804 17:08:36.547207 scan_static_bus for USB3 port 3 done
805 17:08:36.553963 scan_bus: bus USB3 port 3 finished in 6 msecs
806 17:08:36.556924 scan_static_bus for USB0 port 0 done
807 17:08:36.560151 scan_bus: bus USB0 port 0 finished in 172 msecs
808 17:08:36.563376 scan_static_bus for PCI: 00:14.0 done
809 17:08:36.570148 scan_bus: bus PCI: 00:14.0 finished in 188 msecs
810 17:08:36.570235 PCI: 00:14.3 scanning...
811 17:08:36.573820 scan_static_bus for PCI: 00:14.3
812 17:08:36.576806 GENERIC: 0.0 enabled
813 17:08:36.580252 scan_static_bus for PCI: 00:14.3 done
814 17:08:36.587021 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
815 17:08:36.587102 PCI: 00:15.0 scanning...
816 17:08:36.590546 scan_static_bus for PCI: 00:15.0
817 17:08:36.593430 I2C: 00:2c enabled
818 17:08:36.597158 I2C: 00:15 enabled
819 17:08:36.600469 scan_static_bus for PCI: 00:15.0 done
820 17:08:36.603393 scan_bus: bus PCI: 00:15.0 finished in 11 msecs
821 17:08:36.606820 PCI: 00:15.1 scanning...
822 17:08:36.610089 scan_static_bus for PCI: 00:15.1
823 17:08:36.613849 scan_static_bus for PCI: 00:15.1 done
824 17:08:36.619983 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
825 17:08:36.620062 PCI: 00:15.2 scanning...
826 17:08:36.623341 scan_static_bus for PCI: 00:15.2
827 17:08:36.626776 GENERIC: 0.0 disabled
828 17:08:36.630124 I2C: 00:15 enabled
829 17:08:36.630203 I2C: 00:10 disabled
830 17:08:36.633425 I2C: 00:10 disabled
831 17:08:36.636451 I2C: 00:2c enabled
832 17:08:36.636531 I2C: 00:40 enabled
833 17:08:36.639884 I2C: 00:10 enabled
834 17:08:36.639995 I2C: 00:39 enabled
835 17:08:36.643239 scan_static_bus for PCI: 00:15.2 done
836 17:08:36.649604 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
837 17:08:36.653020 PCI: 00:15.3 scanning...
838 17:08:36.656358 scan_static_bus for PCI: 00:15.3
839 17:08:36.656469 I2C: 00:36 enabled
840 17:08:36.659818 I2C: 00:10 disabled
841 17:08:36.662899 I2C: 00:0c enabled
842 17:08:36.662983 I2C: 00:50 enabled
843 17:08:36.666116 scan_static_bus for PCI: 00:15.3 done
844 17:08:36.672814 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
845 17:08:36.672899 PCI: 00:19.0 scanning...
846 17:08:36.676341 scan_static_bus for PCI: 00:19.0
847 17:08:36.679412 I2C: 00:1a enabled
848 17:08:36.683116 I2C: 00:1a disabled
849 17:08:36.683232 I2C: 00:1a disabled
850 17:08:36.686431 I2C: 00:28 enabled
851 17:08:36.686520 I2C: 00:29 enabled
852 17:08:36.693126 scan_static_bus for PCI: 00:19.0 done
853 17:08:36.696038 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
854 17:08:36.699736 PCI: 00:1e.2 scanning...
855 17:08:36.702851 scan_generic_bus for PCI: 00:1e.2
856 17:08:36.702928 SPI: 00 enabled
857 17:08:36.709604 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
858 17:08:36.715857 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
859 17:08:36.715942 PCI: 00:1f.0 scanning...
860 17:08:36.719290 scan_static_bus for PCI: 00:1f.0
861 17:08:36.722616 PNP: 0c09.0 enabled
862 17:08:36.726102 PNP: 0c09.0 scanning...
863 17:08:36.729198 scan_static_bus for PNP: 0c09.0
864 17:08:36.732667 scan_static_bus for PNP: 0c09.0 done
865 17:08:36.735928 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
866 17:08:36.742503 scan_static_bus for PCI: 00:1f.0 done
867 17:08:36.745657 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
868 17:08:36.749093 PCI: 00:1f.3 scanning...
869 17:08:36.752454 scan_static_bus for PCI: 00:1f.3
870 17:08:36.752539 GENERIC: 0.0 disabled
871 17:08:36.759082 scan_static_bus for PCI: 00:1f.3 done
872 17:08:36.762184 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
873 17:08:36.765744 PCI: 00:1f.5 scanning...
874 17:08:36.768955 scan_generic_bus for PCI: 00:1f.5
875 17:08:36.772348 scan_generic_bus for PCI: 00:1f.5 done
876 17:08:36.775320 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
877 17:08:36.781883 scan_bus: bus DOMAIN: 0000 finished in 645 msecs
878 17:08:36.785252 scan_static_bus for Root Device done
879 17:08:36.791683 scan_bus: bus Root Device finished in 664 msecs
880 17:08:36.791765 done
881 17:08:36.798331 BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 1083 ms
882 17:08:36.801712 Chrome EC: UHEPI supported
883 17:08:36.805000 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
884 17:08:36.811454 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
885 17:08:36.814898 SPI flash protection: WPSW=0 SRP0=0
886 17:08:36.821657 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
887 17:08:36.827985 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
888 17:08:36.828143 found VGA at PCI: 00:02.0
889 17:08:36.831409 Setting up VGA for PCI: 00:02.0
890 17:08:36.838055 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
891 17:08:36.841436 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
892 17:08:36.844571 Allocating resources...
893 17:08:36.847926 Reading resources...
894 17:08:36.851070 Root Device read_resources bus 0 link: 0
895 17:08:36.854298 CPU_CLUSTER: 0 read_resources bus 0 link: 0
896 17:08:36.860873 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
897 17:08:36.864380 DOMAIN: 0000 read_resources bus 0 link: 0
898 17:08:36.871035 PCI: 00:04.0 read_resources bus 1 link: 0
899 17:08:36.874392 PCI: 00:04.0 read_resources bus 1 link: 0 done
900 17:08:36.881051 PCI: 00:05.0 read_resources bus 2 link: 0
901 17:08:36.884038 PCI: 00:05.0 read_resources bus 2 link: 0 done
902 17:08:36.890851 PCI: 00:14.0 read_resources bus 0 link: 0
903 17:08:36.894974 USB0 port 0 read_resources bus 0 link: 0
904 17:08:36.901725 USB0 port 0 read_resources bus 0 link: 0 done
905 17:08:36.955325 PCI: 00:14.0 read_resources bus 0 link: 0 done
906 17:08:36.955421 PCI: 00:14.3 read_resources bus 0 link: 0
907 17:08:36.955771 PCI: 00:14.3 read_resources bus 0 link: 0 done
908 17:08:36.956356 PCI: 00:15.0 read_resources bus 0 link: 0
909 17:08:36.956623 PCI: 00:15.0 read_resources bus 0 link: 0 done
910 17:08:36.956730 PCI: 00:15.2 read_resources bus 0 link: 0
911 17:08:36.956827 PCI: 00:15.2 read_resources bus 0 link: 0 done
912 17:08:36.957148 PCI: 00:15.3 read_resources bus 0 link: 0
913 17:08:36.957251 PCI: 00:15.3 read_resources bus 0 link: 0 done
914 17:08:36.957338 PCI: 00:19.0 read_resources bus 0 link: 0
915 17:08:36.959928 PCI: 00:19.0 read_resources bus 0 link: 0 done
916 17:08:36.963549 PCI: 00:1e.2 read_resources bus 3 link: 0
917 17:08:36.963642 PCI: 00:1e.2 read_resources bus 3 link: 0 done
918 17:08:36.969830 PCI: 00:1f.0 read_resources bus 0 link: 0
919 17:08:36.973145 PCI: 00:1f.0 read_resources bus 0 link: 0 done
920 17:08:36.979673 PCI: 00:1f.3 read_resources bus 0 link: 0
921 17:08:36.983016 PCI: 00:1f.3 read_resources bus 0 link: 0 done
922 17:08:36.989597 DOMAIN: 0000 read_resources bus 0 link: 0 done
923 17:08:36.992736 Root Device read_resources bus 0 link: 0 done
924 17:08:36.996320 Done reading resources.
925 17:08:37.002798 Show resources in subtree (Root Device)...After reading.
926 17:08:37.006184 Root Device child on link 0 CPU_CLUSTER: 0
927 17:08:37.009562 CPU_CLUSTER: 0 child on link 0 APIC: 00
928 17:08:37.012754 APIC: 00
929 17:08:37.012896 APIC: 02
930 17:08:37.016245 DOMAIN: 0000 child on link 0 PCI: 00:00.0
931 17:08:37.026357 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
932 17:08:37.036300 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
933 17:08:37.036580 PCI: 00:00.0
934 17:08:37.046064 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
935 17:08:37.055977 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
936 17:08:37.065830 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
937 17:08:37.075810 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
938 17:08:37.085841 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
939 17:08:37.095388 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
940 17:08:37.102280 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
941 17:08:37.111974 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
942 17:08:37.121451 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
943 17:08:37.131756 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
944 17:08:37.141263 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
945 17:08:37.151307 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
946 17:08:37.158035 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
947 17:08:37.167763 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
948 17:08:37.177607 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
949 17:08:37.187416 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
950 17:08:37.197253 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
951 17:08:37.207408 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
952 17:08:37.213720 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
953 17:08:37.217252 PCI: 00:02.0
954 17:08:37.226883 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
955 17:08:37.236858 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
956 17:08:37.246813 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
957 17:08:37.250101 PCI: 00:04.0 child on link 0 GENERIC: 0.0
958 17:08:37.259835 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
959 17:08:37.263073 GENERIC: 0.0
960 17:08:37.266520 PCI: 00:05.0 child on link 0 GENERIC: 0.0
961 17:08:37.276277 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
962 17:08:37.279766 GENERIC: 0.0
963 17:08:37.280108 PCI: 00:08.0
964 17:08:37.289606 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
965 17:08:37.293063 PCI: 00:14.0 child on link 0 USB0 port 0
966 17:08:37.302695 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
967 17:08:37.309440 USB0 port 0 child on link 0 USB2 port 0
968 17:08:37.309816 USB2 port 0
969 17:08:37.313031 USB2 port 1
970 17:08:37.313433 USB2 port 2
971 17:08:37.315920 USB2 port 3
972 17:08:37.316321 USB2 port 4
973 17:08:37.319591 USB2 port 5
974 17:08:37.319970 USB2 port 6
975 17:08:37.322815 USB2 port 7
976 17:08:37.323154 USB3 port 0
977 17:08:37.325828 USB3 port 1
978 17:08:37.329203 USB3 port 2
979 17:08:37.329578 USB3 port 3
980 17:08:37.332612 PCI: 00:14.2
981 17:08:37.335848 PCI: 00:14.3 child on link 0 GENERIC: 0.0
982 17:08:37.345941 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
983 17:08:37.346347 GENERIC: 0.0
984 17:08:37.349040 PCI: 00:14.5
985 17:08:37.359274 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
986 17:08:37.362607 PCI: 00:15.0 child on link 0 I2C: 00:2c
987 17:08:37.372109 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
988 17:08:37.375611 I2C: 00:2c
989 17:08:37.376049 I2C: 00:15
990 17:08:37.378958 PCI: 00:15.1
991 17:08:37.388680 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
992 17:08:37.392117 PCI: 00:15.2 child on link 0 GENERIC: 0.0
993 17:08:37.402141 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
994 17:08:37.405440 GENERIC: 0.0
995 17:08:37.405930 I2C: 00:15
996 17:08:37.408866 I2C: 00:10
997 17:08:37.409444 I2C: 00:10
998 17:08:37.409886 I2C: 00:2c
999 17:08:37.411902 I2C: 00:40
1000 17:08:37.412392 I2C: 00:10
1001 17:08:37.415222 I2C: 00:39
1002 17:08:37.418575 PCI: 00:15.3 child on link 0 I2C: 00:36
1003 17:08:37.428763 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1004 17:08:37.432007 I2C: 00:36
1005 17:08:37.432558 I2C: 00:10
1006 17:08:37.435257 I2C: 00:0c
1007 17:08:37.435699 I2C: 00:50
1008 17:08:37.438580 PCI: 00:16.0
1009 17:08:37.448264 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1010 17:08:37.451694 PCI: 00:19.0 child on link 0 I2C: 00:1a
1011 17:08:37.461624 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1012 17:08:37.462097 I2C: 00:1a
1013 17:08:37.464591 I2C: 00:1a
1014 17:08:37.465061 I2C: 00:1a
1015 17:08:37.467946 I2C: 00:28
1016 17:08:37.468405 I2C: 00:29
1017 17:08:37.471462 PCI: 00:19.2
1018 17:08:37.481302 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1019 17:08:37.491101 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1020 17:08:37.494228 PCI: 00:1a.0
1021 17:08:37.503985 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1022 17:08:37.504344 PCI: 00:1e.0
1023 17:08:37.507197 PCI: 00:1e.2 child on link 0 SPI: 00
1024 17:08:37.517155 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1025 17:08:37.520509 SPI: 00
1026 17:08:37.523661 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1027 17:08:37.533881 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1028 17:08:37.534003 PNP: 0c09.0
1029 17:08:37.543686 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1030 17:08:37.543782 PCI: 00:1f.2
1031 17:08:37.553395 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1032 17:08:37.563226 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1033 17:08:37.566638 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1034 17:08:37.577819 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1035 17:08:37.587659 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1036 17:08:37.587879 GENERIC: 0.0
1037 17:08:37.591046 PCI: 00:1f.5
1038 17:08:37.601118 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1039 17:08:37.607676 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1040 17:08:37.614111 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1041 17:08:37.621030 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1042 17:08:37.627769 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1043 17:08:37.637311 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1044 17:08:37.644129 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1045 17:08:37.647205 DOMAIN: 0000: Resource ranges:
1046 17:08:37.650828 * Base: 1000, Size: 800, Tag: 100
1047 17:08:37.653861 * Base: 1900, Size: e700, Tag: 100
1048 17:08:37.660533 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1049 17:08:37.667098 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1050 17:08:37.673795 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1051 17:08:37.680196 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1052 17:08:37.686877 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1053 17:08:37.697068 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1054 17:08:37.703387 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1055 17:08:37.709956 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1056 17:08:37.719966 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1057 17:08:37.726645 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1058 17:08:37.732823 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1059 17:08:37.742639 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1060 17:08:37.749615 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1061 17:08:37.755968 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1062 17:08:37.766052 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1063 17:08:37.772720 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1064 17:08:37.779363 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1065 17:08:37.789266 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1066 17:08:37.795473 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1067 17:08:37.802232 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1068 17:08:37.812218 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1069 17:08:37.818694 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1070 17:08:37.825229 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1071 17:08:37.835247 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1072 17:08:37.838722 DOMAIN: 0000: Resource ranges:
1073 17:08:37.841932 * Base: 7fc00000, Size: 40400000, Tag: 200
1074 17:08:37.845262 * Base: d0000000, Size: 2b000000, Tag: 200
1075 17:08:37.851655 * Base: fb001000, Size: 2fff000, Tag: 200
1076 17:08:37.855232 * Base: fe010000, Size: 22000, Tag: 200
1077 17:08:37.858447 * Base: fe033000, Size: a4d000, Tag: 200
1078 17:08:37.861902 * Base: fea88000, Size: 2f8000, Tag: 200
1079 17:08:37.865063 * Base: fed88000, Size: 8000, Tag: 200
1080 17:08:37.871632 * Base: fed93000, Size: d000, Tag: 200
1081 17:08:37.875117 * Base: feda2000, Size: 125e000, Tag: 200
1082 17:08:37.878318 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1083 17:08:37.887965 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1084 17:08:37.894485 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1085 17:08:37.901161 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1086 17:08:37.907753 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1087 17:08:37.914207 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1088 17:08:37.920820 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1089 17:08:37.927912 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1090 17:08:37.934176 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1091 17:08:37.941000 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1092 17:08:37.947305 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1093 17:08:37.954054 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1094 17:08:37.960786 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1095 17:08:37.967125 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1096 17:08:37.973830 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1097 17:08:37.980523 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1098 17:08:37.986956 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1099 17:08:37.993615 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1100 17:08:38.000025 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1101 17:08:38.006738 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1102 17:08:38.013308 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1103 17:08:38.020087 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1104 17:08:38.026639 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1105 17:08:38.029833 Root Device assign_resources, bus 0 link: 0
1106 17:08:38.036337 DOMAIN: 0000 assign_resources, bus 0 link: 0
1107 17:08:38.043000 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1108 17:08:38.052792 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1109 17:08:38.059722 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1110 17:08:38.069562 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1111 17:08:38.072653 PCI: 00:04.0 assign_resources, bus 1 link: 0
1112 17:08:38.076083 PCI: 00:04.0 assign_resources, bus 1 link: 0
1113 17:08:38.086050 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1114 17:08:38.089063 PCI: 00:05.0 assign_resources, bus 2 link: 0
1115 17:08:38.095667 PCI: 00:05.0 assign_resources, bus 2 link: 0
1116 17:08:38.102251 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1117 17:08:38.112513 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1118 17:08:38.115842 PCI: 00:14.0 assign_resources, bus 0 link: 0
1119 17:08:38.119015 PCI: 00:14.0 assign_resources, bus 0 link: 0
1120 17:08:38.128545 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1121 17:08:38.132169 PCI: 00:14.3 assign_resources, bus 0 link: 0
1122 17:08:38.138527 PCI: 00:14.3 assign_resources, bus 0 link: 0
1123 17:08:38.144943 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1124 17:08:38.152380 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1125 17:08:38.159124 PCI: 00:15.0 assign_resources, bus 0 link: 0
1126 17:08:38.162287 PCI: 00:15.0 assign_resources, bus 0 link: 0
1127 17:08:38.171884 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1128 17:08:38.178803 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1129 17:08:38.182098 PCI: 00:15.2 assign_resources, bus 0 link: 0
1130 17:08:38.188707 PCI: 00:15.2 assign_resources, bus 0 link: 0
1131 17:08:38.194868 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1132 17:08:38.201729 PCI: 00:15.3 assign_resources, bus 0 link: 0
1133 17:08:38.204944 PCI: 00:15.3 assign_resources, bus 0 link: 0
1134 17:08:38.211623 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1135 17:08:38.221839 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1136 17:08:38.224728 PCI: 00:19.0 assign_resources, bus 0 link: 0
1137 17:08:38.231601 PCI: 00:19.0 assign_resources, bus 0 link: 0
1138 17:08:38.238127 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1139 17:08:38.247950 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1140 17:08:38.254660 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1141 17:08:38.257781 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1142 17:08:38.264483 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1143 17:08:38.267580 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1144 17:08:38.274310 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1145 17:08:38.277805 LPC: Trying to open IO window from 800 size 1ff
1146 17:08:38.287449 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1147 17:08:38.294032 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1148 17:08:38.297424 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1149 17:08:38.304027 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1150 17:08:38.310823 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1151 17:08:38.317557 DOMAIN: 0000 assign_resources, bus 0 link: 0
1152 17:08:38.320564 Root Device assign_resources, bus 0 link: 0
1153 17:08:38.323873 Done setting resources.
1154 17:08:38.330863 Show resources in subtree (Root Device)...After assigning values.
1155 17:08:38.334068 Root Device child on link 0 CPU_CLUSTER: 0
1156 17:08:38.337236 CPU_CLUSTER: 0 child on link 0 APIC: 00
1157 17:08:38.340678 APIC: 00
1158 17:08:38.341101 APIC: 02
1159 17:08:38.343637 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1160 17:08:38.353761 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1161 17:08:38.363437 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1162 17:08:38.366956 PCI: 00:00.0
1163 17:08:38.376990 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1164 17:08:38.383462 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1165 17:08:38.393088 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1166 17:08:38.403098 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1167 17:08:38.412926 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1168 17:08:38.422632 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1169 17:08:38.433126 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1170 17:08:38.439527 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1171 17:08:38.449244 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1172 17:08:38.459586 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1173 17:08:38.468825 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1174 17:08:38.479096 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1175 17:08:38.488743 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1176 17:08:38.495546 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1177 17:08:38.505122 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1178 17:08:38.515052 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1179 17:08:38.525002 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1180 17:08:38.534715 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1181 17:08:38.544677 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1182 17:08:38.545128 PCI: 00:02.0
1183 17:08:38.554354 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1184 17:08:38.567825 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1185 17:08:38.574186 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1186 17:08:38.580774 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1187 17:08:38.590668 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1188 17:08:38.591186 GENERIC: 0.0
1189 17:08:38.597455 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1190 17:08:38.607259 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1191 17:08:38.607690 GENERIC: 0.0
1192 17:08:38.610470 PCI: 00:08.0
1193 17:08:38.620369 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1194 17:08:38.623647 PCI: 00:14.0 child on link 0 USB0 port 0
1195 17:08:38.633596 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1196 17:08:38.640110 USB0 port 0 child on link 0 USB2 port 0
1197 17:08:38.640542 USB2 port 0
1198 17:08:38.643451 USB2 port 1
1199 17:08:38.643879 USB2 port 2
1200 17:08:38.646894 USB2 port 3
1201 17:08:38.647318 USB2 port 4
1202 17:08:38.650167 USB2 port 5
1203 17:08:38.653769 USB2 port 6
1204 17:08:38.654310 USB2 port 7
1205 17:08:38.656645 USB3 port 0
1206 17:08:38.657074 USB3 port 1
1207 17:08:38.660017 USB3 port 2
1208 17:08:38.660445 USB3 port 3
1209 17:08:38.663459 PCI: 00:14.2
1210 17:08:38.666667 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1211 17:08:38.676794 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1212 17:08:38.679921 GENERIC: 0.0
1213 17:08:38.680351 PCI: 00:14.5
1214 17:08:38.689821 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1215 17:08:38.696441 PCI: 00:15.0 child on link 0 I2C: 00:2c
1216 17:08:38.706190 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1217 17:08:38.706631 I2C: 00:2c
1218 17:08:38.709561 I2C: 00:15
1219 17:08:38.709992 PCI: 00:15.1
1220 17:08:38.719476 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1221 17:08:38.726238 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1222 17:08:38.736074 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1223 17:08:38.736509 GENERIC: 0.0
1224 17:08:38.739630 I2C: 00:15
1225 17:08:38.740223 I2C: 00:10
1226 17:08:38.742594 I2C: 00:10
1227 17:08:38.743022 I2C: 00:2c
1228 17:08:38.746000 I2C: 00:40
1229 17:08:38.746429 I2C: 00:10
1230 17:08:38.749392 I2C: 00:39
1231 17:08:38.752516 PCI: 00:15.3 child on link 0 I2C: 00:36
1232 17:08:38.762869 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1233 17:08:38.763428 I2C: 00:36
1234 17:08:38.766056 I2C: 00:10
1235 17:08:38.766497 I2C: 00:0c
1236 17:08:38.769028 I2C: 00:50
1237 17:08:38.769471 PCI: 00:16.0
1238 17:08:38.778914 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1239 17:08:38.785557 PCI: 00:19.0 child on link 0 I2C: 00:1a
1240 17:08:38.795206 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1241 17:08:38.795658 I2C: 00:1a
1242 17:08:38.798813 I2C: 00:1a
1243 17:08:38.799255 I2C: 00:1a
1244 17:08:38.801903 I2C: 00:28
1245 17:08:38.802346 I2C: 00:29
1246 17:08:38.805428 PCI: 00:19.2
1247 17:08:38.815417 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1248 17:08:38.825129 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1249 17:08:38.828384 PCI: 00:1a.0
1250 17:08:38.838188 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1251 17:08:38.838354 PCI: 00:1e.0
1252 17:08:38.844442 PCI: 00:1e.2 child on link 0 SPI: 00
1253 17:08:38.854616 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1254 17:08:38.854729 SPI: 00
1255 17:08:38.857951 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1256 17:08:38.867763 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1257 17:08:38.867855 PNP: 0c09.0
1258 17:08:38.877620 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1259 17:08:38.880898 PCI: 00:1f.2
1260 17:08:38.887618 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1261 17:08:38.897214 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1262 17:08:38.903762 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1263 17:08:38.913914 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1264 17:08:38.923674 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1265 17:08:38.923773 GENERIC: 0.0
1266 17:08:38.927042 PCI: 00:1f.5
1267 17:08:38.936826 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1268 17:08:38.940294 Done allocating resources.
1269 17:08:38.946743 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2093 ms
1270 17:08:38.950203 Enabling resources...
1271 17:08:38.953152 PCI: 00:00.0 subsystem <- 8086/4e22
1272 17:08:38.953238 PCI: 00:00.0 cmd <- 06
1273 17:08:38.960054 PCI: 00:02.0 subsystem <- 8086/4e55
1274 17:08:38.960142 PCI: 00:02.0 cmd <- 03
1275 17:08:38.963387 PCI: 00:04.0 subsystem <- 8086/4e03
1276 17:08:38.966742 PCI: 00:04.0 cmd <- 02
1277 17:08:38.969691 PCI: 00:05.0 bridge ctrl <- 0003
1278 17:08:38.973054 PCI: 00:05.0 subsystem <- 8086/4e19
1279 17:08:38.976546 PCI: 00:05.0 cmd <- 02
1280 17:08:38.979623 PCI: 00:08.0 cmd <- 06
1281 17:08:38.982898 PCI: 00:14.0 subsystem <- 8086/4ded
1282 17:08:38.986224 PCI: 00:14.0 cmd <- 02
1283 17:08:38.989682 PCI: 00:14.3 subsystem <- 8086/4df0
1284 17:08:38.992902 PCI: 00:14.3 cmd <- 02
1285 17:08:38.996233 PCI: 00:14.5 subsystem <- 8086/4df8
1286 17:08:38.996320 PCI: 00:14.5 cmd <- 06
1287 17:08:39.002770 PCI: 00:15.0 subsystem <- 8086/4de8
1288 17:08:39.002857 PCI: 00:15.0 cmd <- 02
1289 17:08:39.006022 PCI: 00:15.1 subsystem <- 8086/4de9
1290 17:08:39.009355 PCI: 00:15.1 cmd <- 02
1291 17:08:39.012608 PCI: 00:15.2 subsystem <- 8086/4dea
1292 17:08:39.015764 PCI: 00:15.2 cmd <- 02
1293 17:08:39.019235 PCI: 00:15.3 subsystem <- 8086/4deb
1294 17:08:39.022319 PCI: 00:15.3 cmd <- 02
1295 17:08:39.025685 PCI: 00:16.0 subsystem <- 8086/4de0
1296 17:08:39.029004 PCI: 00:16.0 cmd <- 02
1297 17:08:39.032276 PCI: 00:19.0 subsystem <- 8086/4dc5
1298 17:08:39.035607 PCI: 00:19.0 cmd <- 02
1299 17:08:39.038527 PCI: 00:19.2 subsystem <- 8086/4dc7
1300 17:08:39.038614 PCI: 00:19.2 cmd <- 06
1301 17:08:39.045123 PCI: 00:1a.0 subsystem <- 8086/4dc4
1302 17:08:39.045210 PCI: 00:1a.0 cmd <- 06
1303 17:08:39.048437 PCI: 00:1e.2 subsystem <- 8086/4daa
1304 17:08:39.051934 PCI: 00:1e.2 cmd <- 06
1305 17:08:39.055236 PCI: 00:1f.0 subsystem <- 8086/4d87
1306 17:08:39.058575 PCI: 00:1f.0 cmd <- 407
1307 17:08:39.061842 PCI: 00:1f.3 subsystem <- 8086/4dc8
1308 17:08:39.065045 PCI: 00:1f.3 cmd <- 02
1309 17:08:39.068299 PCI: 00:1f.5 subsystem <- 8086/4da4
1310 17:08:39.071636 PCI: 00:1f.5 cmd <- 406
1311 17:08:39.074933 done.
1312 17:08:39.078237 BS: BS_DEV_ENABLE run times (exec / console): 7 / 121 ms
1313 17:08:39.081710 Initializing devices...
1314 17:08:39.084821 Root Device init
1315 17:08:39.084904 mainboard: EC init
1316 17:08:39.091455 Chrome EC: Set SMI mask to 0x0000000000000000
1317 17:08:39.094767 Chrome EC: clear events_b mask to 0x0000000000000000
1318 17:08:39.101683 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1319 17:08:39.108215 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1320 17:08:39.114841 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1321 17:08:39.118194 Chrome EC: Set WAKE mask to 0x0000000000000000
1322 17:08:39.121372 Root Device init finished in 34 msecs
1323 17:08:39.125560 PCI: 00:00.0 init
1324 17:08:39.129177 CPU TDP = 6 Watts
1325 17:08:39.129263 CPU PL1 = 7 Watts
1326 17:08:39.132295 CPU PL2 = 12 Watts
1327 17:08:39.135733 PCI: 00:00.0 init finished in 6 msecs
1328 17:08:39.138835 PCI: 00:02.0 init
1329 17:08:39.142148 GMA: Found VBT in CBFS
1330 17:08:39.142260 GMA: Found valid VBT in CBFS
1331 17:08:39.148789 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1332 17:08:39.155380 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1333 17:08:39.161875 PCI: 00:02.0 init finished in 18 msecs
1334 17:08:39.161966 PCI: 00:08.0 init
1335 17:08:39.168501 PCI: 00:08.0 init finished in 0 msecs
1336 17:08:39.168592 PCI: 00:14.0 init
1337 17:08:39.175224 XHCI: Updated LFPS sampling OFF time to 9 ms
1338 17:08:39.178416 PCI: 00:14.0 init finished in 4 msecs
1339 17:08:39.181674 PCI: 00:15.0 init
1340 17:08:39.181775 I2C bus 0 version 0x3230302a
1341 17:08:39.188324 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1342 17:08:39.191581 PCI: 00:15.0 init finished in 6 msecs
1343 17:08:39.191670 PCI: 00:15.1 init
1344 17:08:39.195189 I2C bus 1 version 0x3230302a
1345 17:08:39.198308 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1346 17:08:39.201702 PCI: 00:15.1 init finished in 6 msecs
1347 17:08:39.204943 PCI: 00:15.2 init
1348 17:08:39.208630 I2C bus 2 version 0x3230302a
1349 17:08:39.211787 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1350 17:08:39.215109 PCI: 00:15.2 init finished in 6 msecs
1351 17:08:39.218464 PCI: 00:15.3 init
1352 17:08:39.221842 I2C bus 3 version 0x3230302a
1353 17:08:39.225086 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1354 17:08:39.228329 PCI: 00:15.3 init finished in 6 msecs
1355 17:08:39.231388 PCI: 00:16.0 init
1356 17:08:39.234686 PCI: 00:16.0 init finished in 0 msecs
1357 17:08:39.234773 PCI: 00:19.0 init
1358 17:08:39.238110 I2C bus 4 version 0x3230302a
1359 17:08:39.241335 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1360 17:08:39.248168 PCI: 00:19.0 init finished in 6 msecs
1361 17:08:39.248257 PCI: 00:1a.0 init
1362 17:08:39.251158 PCI: 00:1a.0 init finished in 0 msecs
1363 17:08:39.255271 PCI: 00:1f.0 init
1364 17:08:39.258561 IOAPIC: Initializing IOAPIC at 0xfec00000
1365 17:08:39.265128 IOAPIC: Bootstrap Processor Local APIC = 0x00
1366 17:08:39.265215 IOAPIC: ID = 0x02
1367 17:08:39.268295 IOAPIC: Dumping registers
1368 17:08:39.271565 reg 0x0000: 0x02000000
1369 17:08:39.274777 reg 0x0001: 0x00770020
1370 17:08:39.274864 reg 0x0002: 0x00000000
1371 17:08:39.281511 PCI: 00:1f.0 init finished in 21 msecs
1372 17:08:39.281602 PCI: 00:1f.2 init
1373 17:08:39.284875 Disabling ACPI via APMC.
1374 17:08:39.289056 APMC done.
1375 17:08:39.292286 PCI: 00:1f.2 init finished in 6 msecs
1376 17:08:39.303186 PNP: 0c09.0 init
1377 17:08:39.306623 Google Chrome EC uptime: 6.531 seconds
1378 17:08:39.313259 Google Chrome AP resets since EC boot: 0
1379 17:08:39.316316 Google Chrome most recent AP reset causes:
1380 17:08:39.323157 Google Chrome EC reset flags at last EC boot: reset-pin
1381 17:08:39.326352 PNP: 0c09.0 init finished in 18 msecs
1382 17:08:39.326438 Devices initialized
1383 17:08:39.329608 Show all devs... After init.
1384 17:08:39.332904 Root Device: enabled 1
1385 17:08:39.336513 CPU_CLUSTER: 0: enabled 1
1386 17:08:39.339558 DOMAIN: 0000: enabled 1
1387 17:08:39.339641 PCI: 00:00.0: enabled 1
1388 17:08:39.343153 PCI: 00:02.0: enabled 1
1389 17:08:39.346460 PCI: 00:04.0: enabled 1
1390 17:08:39.346543 PCI: 00:05.0: enabled 1
1391 17:08:39.349645 PCI: 00:09.0: enabled 0
1392 17:08:39.352993 PCI: 00:12.6: enabled 0
1393 17:08:39.356145 PCI: 00:14.0: enabled 1
1394 17:08:39.356232 PCI: 00:14.1: enabled 0
1395 17:08:39.359435 PCI: 00:14.2: enabled 0
1396 17:08:39.363039 PCI: 00:14.3: enabled 1
1397 17:08:39.366381 PCI: 00:14.5: enabled 1
1398 17:08:39.366468 PCI: 00:15.0: enabled 1
1399 17:08:39.369485 PCI: 00:15.1: enabled 1
1400 17:08:39.372631 PCI: 00:15.2: enabled 1
1401 17:08:39.375938 PCI: 00:15.3: enabled 1
1402 17:08:39.376025 PCI: 00:16.0: enabled 1
1403 17:08:39.379188 PCI: 00:16.1: enabled 0
1404 17:08:39.382664 PCI: 00:16.4: enabled 0
1405 17:08:39.385994 PCI: 00:16.5: enabled 0
1406 17:08:39.386081 PCI: 00:17.0: enabled 0
1407 17:08:39.389222 PCI: 00:19.0: enabled 1
1408 17:08:39.392434 PCI: 00:19.1: enabled 0
1409 17:08:39.392521 PCI: 00:19.2: enabled 1
1410 17:08:39.395631 PCI: 00:1a.0: enabled 1
1411 17:08:39.399009 PCI: 00:1c.0: enabled 0
1412 17:08:39.402313 PCI: 00:1c.1: enabled 0
1413 17:08:39.402447 PCI: 00:1c.2: enabled 0
1414 17:08:39.405501 PCI: 00:1c.3: enabled 0
1415 17:08:39.408900 PCI: 00:1c.4: enabled 0
1416 17:08:39.412271 PCI: 00:1c.5: enabled 0
1417 17:08:39.412408 PCI: 00:1c.6: enabled 0
1418 17:08:39.415472 PCI: 00:1c.7: enabled 1
1419 17:08:39.418991 PCI: 00:1e.0: enabled 0
1420 17:08:39.422196 PCI: 00:1e.1: enabled 0
1421 17:08:39.422332 PCI: 00:1e.2: enabled 1
1422 17:08:39.425410 PCI: 00:1e.3: enabled 0
1423 17:08:39.428756 PCI: 00:1f.0: enabled 1
1424 17:08:39.432023 PCI: 00:1f.1: enabled 0
1425 17:08:39.432120 PCI: 00:1f.2: enabled 1
1426 17:08:39.435271 PCI: 00:1f.3: enabled 1
1427 17:08:39.438664 PCI: 00:1f.4: enabled 0
1428 17:08:39.438747 PCI: 00:1f.5: enabled 1
1429 17:08:39.441834 PCI: 00:1f.7: enabled 0
1430 17:08:39.445052 GENERIC: 0.0: enabled 1
1431 17:08:39.448574 GENERIC: 0.0: enabled 1
1432 17:08:39.448657 USB0 port 0: enabled 1
1433 17:08:39.451882 GENERIC: 0.0: enabled 1
1434 17:08:39.455084 I2C: 00:2c: enabled 1
1435 17:08:39.455168 I2C: 00:15: enabled 1
1436 17:08:39.458578 GENERIC: 0.0: enabled 0
1437 17:08:39.461697 I2C: 00:15: enabled 1
1438 17:08:39.465210 I2C: 00:10: enabled 0
1439 17:08:39.465293 I2C: 00:10: enabled 0
1440 17:08:39.468250 I2C: 00:2c: enabled 1
1441 17:08:39.471507 I2C: 00:40: enabled 1
1442 17:08:39.471590 I2C: 00:10: enabled 1
1443 17:08:39.475070 I2C: 00:39: enabled 1
1444 17:08:39.478435 I2C: 00:36: enabled 1
1445 17:08:39.478518 I2C: 00:10: enabled 0
1446 17:08:39.481697 I2C: 00:0c: enabled 1
1447 17:08:39.484712 I2C: 00:50: enabled 1
1448 17:08:39.484815 I2C: 00:1a: enabled 1
1449 17:08:39.487949 I2C: 00:1a: enabled 0
1450 17:08:39.491317 I2C: 00:1a: enabled 0
1451 17:08:39.491399 I2C: 00:28: enabled 1
1452 17:08:39.494919 I2C: 00:29: enabled 1
1453 17:08:39.498594 PCI: 00:00.0: enabled 1
1454 17:08:39.498686 SPI: 00: enabled 1
1455 17:08:39.501618 PNP: 0c09.0: enabled 1
1456 17:08:39.504812 GENERIC: 0.0: enabled 0
1457 17:08:39.504900 USB2 port 0: enabled 1
1458 17:08:39.508146 USB2 port 1: enabled 1
1459 17:08:39.511386 USB2 port 2: enabled 1
1460 17:08:39.514361 USB2 port 3: enabled 1
1461 17:08:39.514444 USB2 port 4: enabled 0
1462 17:08:39.518065 USB2 port 5: enabled 1
1463 17:08:39.521399 USB2 port 6: enabled 0
1464 17:08:39.521508 USB2 port 7: enabled 1
1465 17:08:39.524324 USB3 port 0: enabled 1
1466 17:08:39.527927 USB3 port 1: enabled 1
1467 17:08:39.530981 USB3 port 2: enabled 1
1468 17:08:39.531092 USB3 port 3: enabled 1
1469 17:08:39.534153 APIC: 00: enabled 1
1470 17:08:39.534237 APIC: 02: enabled 1
1471 17:08:39.537602 PCI: 00:08.0: enabled 1
1472 17:08:39.544294 BS: BS_DEV_INIT run times (exec / console): 23 / 436 ms
1473 17:08:39.547617 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1474 17:08:39.550933 ELOG: NV offset 0xbfa000 size 0x1000
1475 17:08:39.559175 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1476 17:08:39.565839 ELOG: Event(17) added with size 13 at 2024-03-01 17:08:39 UTC
1477 17:08:39.572309 ELOG: Event(92) added with size 9 at 2024-03-01 17:08:39 UTC
1478 17:08:39.579046 ELOG: Event(93) added with size 9 at 2024-03-01 17:08:39 UTC
1479 17:08:39.585510 ELOG: Event(9E) added with size 10 at 2024-03-01 17:08:39 UTC
1480 17:08:39.592172 ELOG: Event(9F) added with size 14 at 2024-03-01 17:08:39 UTC
1481 17:08:39.598776 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1482 17:08:39.602050 ELOG: Event(A1) added with size 10 at 2024-03-01 17:08:39 UTC
1483 17:08:39.612104 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1484 17:08:39.618396 ELOG: Event(A0) added with size 9 at 2024-03-01 17:08:39 UTC
1485 17:08:39.622049 elog_add_boot_reason: Logged dev mode boot
1486 17:08:39.628394 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1487 17:08:39.628481 Finalize devices...
1488 17:08:39.631657 Devices finalized
1489 17:08:39.638307 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1490 17:08:39.641413 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1491 17:08:39.648189 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1492 17:08:39.651476 ME: HFSTS1 : 0x80030045
1493 17:08:39.654838 ME: HFSTS2 : 0x30280136
1494 17:08:39.661237 ME: HFSTS3 : 0x00000050
1495 17:08:39.664579 ME: HFSTS4 : 0x00004000
1496 17:08:39.667888 ME: HFSTS5 : 0x00000000
1497 17:08:39.671149 ME: HFSTS6 : 0x40400006
1498 17:08:39.674394 ME: Manufacturing Mode : NO
1499 17:08:39.677862 ME: FW Partition Table : OK
1500 17:08:39.680844 ME: Bringup Loader Failure : NO
1501 17:08:39.684174 ME: Firmware Init Complete : NO
1502 17:08:39.687594 ME: Boot Options Present : NO
1503 17:08:39.690720 ME: Update In Progress : NO
1504 17:08:39.694351 ME: D0i3 Support : YES
1505 17:08:39.697635 ME: Low Power State Enabled : NO
1506 17:08:39.700996 ME: CPU Replaced : YES
1507 17:08:39.704440 ME: CPU Replacement Valid : YES
1508 17:08:39.707152 ME: Current Working State : 5
1509 17:08:39.710541 ME: Current Operation State : 1
1510 17:08:39.713796 ME: Current Operation Mode : 3
1511 17:08:39.717201 ME: Error Code : 0
1512 17:08:39.720515 ME: CPU Debug Disabled : YES
1513 17:08:39.723869 ME: TXT Support : NO
1514 17:08:39.730448 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1515 17:08:39.736768 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1516 17:08:39.740224 ACPI: Writing ACPI tables at 76b27000.
1517 17:08:39.743698 ACPI: * FACS
1518 17:08:39.743810 ACPI: * DSDT
1519 17:08:39.746618 Ramoops buffer: 0x100000@0x76a26000.
1520 17:08:39.753180 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1521 17:08:39.756694 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1522 17:08:39.760060 Google Chrome EC: version:
1523 17:08:39.763356 ro: magolor_1.1.9999-103b6f9
1524 17:08:39.766527 rw: magolor_1.1.9999-103b6f9
1525 17:08:39.769849 running image: 1
1526 17:08:39.776301 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1527 17:08:39.779642 ACPI: * FADT
1528 17:08:39.779725 SCI is IRQ9
1529 17:08:39.782889 ACPI: added table 1/32, length now 40
1530 17:08:39.786334 ACPI: * SSDT
1531 17:08:39.789651 Found 1 CPU(s) with 2 core(s) each.
1532 17:08:39.792822 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1533 17:08:39.799374 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1534 17:08:39.802705 Could not locate 'wifi_sar' in VPD.
1535 17:08:39.805844 Checking CBFS for default SAR values
1536 17:08:39.809295 wifi_sar_defaults.hex has bad len in CBFS
1537 17:08:39.812660 failed from getting SAR limits!
1538 17:08:39.818977 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1539 17:08:39.822356 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1540 17:08:39.829150 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1541 17:08:39.832279 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1542 17:08:39.838767 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1543 17:08:39.842323 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1544 17:08:39.848801 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1545 17:08:39.855360 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1546 17:08:39.858841 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1547 17:08:39.865435 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1548 17:08:39.871998 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1549 17:08:39.878697 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1550 17:08:39.881938 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1551 17:08:39.888321 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1552 17:08:39.891836 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1553 17:08:39.898512 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1554 17:08:39.901839 PS2K: Passing 101 keymaps to kernel
1555 17:08:39.908513 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1556 17:08:39.915022 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1557 17:08:39.918123 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1558 17:08:39.924819 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1559 17:08:39.931392 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1560 17:08:39.934719 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1561 17:08:39.941453 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1562 17:08:39.947961 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1563 17:08:39.951521 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1564 17:08:39.958060 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1565 17:08:39.961370 ACPI: added table 2/32, length now 44
1566 17:08:39.964635 ACPI: * MCFG
1567 17:08:39.968024 ACPI: added table 3/32, length now 48
1568 17:08:39.968109 ACPI: * TPM2
1569 17:08:39.971233 TPM2 log created at 0x76a16000
1570 17:08:39.974452 ACPI: added table 4/32, length now 52
1571 17:08:39.977745 ACPI: * MADT
1572 17:08:39.977829 SCI is IRQ9
1573 17:08:39.981002 ACPI: added table 5/32, length now 56
1574 17:08:39.984268 current = 76b2d580
1575 17:08:39.987606 ACPI: * DMAR
1576 17:08:39.990915 ACPI: added table 6/32, length now 60
1577 17:08:39.994460 ACPI: added table 7/32, length now 64
1578 17:08:39.994556 ACPI: * HPET
1579 17:08:40.001133 ACPI: added table 8/32, length now 68
1580 17:08:40.001218 ACPI: done.
1581 17:08:40.004381 ACPI tables: 26304 bytes.
1582 17:08:40.007728 smbios_write_tables: 76a15000
1583 17:08:40.011067 EC returned error result code 3
1584 17:08:40.014379 Couldn't obtain OEM name from CBI
1585 17:08:40.017330 Create SMBIOS type 16
1586 17:08:40.020648 Create SMBIOS type 17
1587 17:08:40.020740 GENERIC: 0.0 (WIFI Device)
1588 17:08:40.024197 SMBIOS tables: 913 bytes.
1589 17:08:40.027295 Writing table forward entry at 0x00000500
1590 17:08:40.034035 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1591 17:08:40.037242 Writing coreboot table at 0x76b4b000
1592 17:08:40.043908 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1593 17:08:40.050323 1. 0000000000001000-000000000009ffff: RAM
1594 17:08:40.053661 2. 00000000000a0000-00000000000fffff: RESERVED
1595 17:08:40.057233 3. 0000000000100000-0000000076a14fff: RAM
1596 17:08:40.063794 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1597 17:08:40.067146 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1598 17:08:40.073663 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1599 17:08:40.080299 7. 0000000077000000-000000007fbfffff: RESERVED
1600 17:08:40.083409 8. 00000000c0000000-00000000cfffffff: RESERVED
1601 17:08:40.090189 9. 00000000fb000000-00000000fb000fff: RESERVED
1602 17:08:40.093379 10. 00000000fe000000-00000000fe00ffff: RESERVED
1603 17:08:40.096586 11. 00000000fea80000-00000000fea87fff: RESERVED
1604 17:08:40.103467 12. 00000000fed80000-00000000fed87fff: RESERVED
1605 17:08:40.106767 13. 00000000fed90000-00000000fed92fff: RESERVED
1606 17:08:40.113257 14. 00000000feda0000-00000000feda1fff: RESERVED
1607 17:08:40.116566 15. 0000000100000000-00000001803fffff: RAM
1608 17:08:40.119877 Passing 4 GPIOs to payload:
1609 17:08:40.126395 NAME | PORT | POLARITY | VALUE
1610 17:08:40.129717 lid | undefined | high | high
1611 17:08:40.136547 power | undefined | high | low
1612 17:08:40.139868 oprom | undefined | high | low
1613 17:08:40.146126 EC in RW | 0x000000b9 | high | low
1614 17:08:40.152897 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum 4a59
1615 17:08:40.156107 coreboot table: 1504 bytes.
1616 17:08:40.159388 IMD ROOT 0. 0x76fff000 0x00001000
1617 17:08:40.162669 IMD SMALL 1. 0x76ffe000 0x00001000
1618 17:08:40.166240 FSP MEMORY 2. 0x76c4e000 0x003b0000
1619 17:08:40.169624 CONSOLE 3. 0x76c2e000 0x00020000
1620 17:08:40.172681 FMAP 4. 0x76c2d000 0x00000578
1621 17:08:40.176119 TIME STAMP 5. 0x76c2c000 0x00000910
1622 17:08:40.179418 VBOOT WORK 6. 0x76c18000 0x00014000
1623 17:08:40.186188 ROMSTG STCK 7. 0x76c17000 0x00001000
1624 17:08:40.189384 AFTER CAR 8. 0x76c0d000 0x0000a000
1625 17:08:40.192640 RAMSTAGE 9. 0x76ba7000 0x00066000
1626 17:08:40.196065 REFCODE 10. 0x76b67000 0x00040000
1627 17:08:40.199293 SMM BACKUP 11. 0x76b57000 0x00010000
1628 17:08:40.202589 4f444749 12. 0x76b55000 0x00002000
1629 17:08:40.206081 EXT VBT13. 0x76b53000 0x00001c43
1630 17:08:40.209132 COREBOOT 14. 0x76b4b000 0x00008000
1631 17:08:40.212187 ACPI 15. 0x76b27000 0x00024000
1632 17:08:40.218933 ACPI GNVS 16. 0x76b26000 0x00001000
1633 17:08:40.222440 RAMOOPS 17. 0x76a26000 0x00100000
1634 17:08:40.225868 TPM2 TCGLOG18. 0x76a16000 0x00010000
1635 17:08:40.229186 SMBIOS 19. 0x76a15000 0x00000800
1636 17:08:40.229272 IMD small region:
1637 17:08:40.235770 IMD ROOT 0. 0x76ffec00 0x00000400
1638 17:08:40.238961 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1639 17:08:40.242053 VPD 2. 0x76ffeb60 0x0000006c
1640 17:08:40.245398 POWER STATE 3. 0x76ffeb20 0x00000040
1641 17:08:40.249058 ROMSTAGE 4. 0x76ffeb00 0x00000004
1642 17:08:40.255452 MEM INFO 5. 0x76ffe920 0x000001e0
1643 17:08:40.258836 BS: BS_WRITE_TABLES run times (exec / console): 7 / 516 ms
1644 17:08:40.262187 MTRR: Physical address space:
1645 17:08:40.268763 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1646 17:08:40.275441 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1647 17:08:40.282161 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1648 17:08:40.288487 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1649 17:08:40.294992 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1650 17:08:40.301666 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1651 17:08:40.304913 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1652 17:08:40.311529 MTRR: Fixed MSR 0x250 0x0606060606060606
1653 17:08:40.314795 MTRR: Fixed MSR 0x258 0x0606060606060606
1654 17:08:40.318073 MTRR: Fixed MSR 0x259 0x0000000000000000
1655 17:08:40.321493 MTRR: Fixed MSR 0x268 0x0606060606060606
1656 17:08:40.328136 MTRR: Fixed MSR 0x269 0x0606060606060606
1657 17:08:40.331490 MTRR: Fixed MSR 0x26a 0x0606060606060606
1658 17:08:40.334514 MTRR: Fixed MSR 0x26b 0x0606060606060606
1659 17:08:40.337893 MTRR: Fixed MSR 0x26c 0x0606060606060606
1660 17:08:40.344405 MTRR: Fixed MSR 0x26d 0x0606060606060606
1661 17:08:40.347771 MTRR: Fixed MSR 0x26e 0x0606060606060606
1662 17:08:40.351194 MTRR: Fixed MSR 0x26f 0x0606060606060606
1663 17:08:40.354444 call enable_fixed_mtrr()
1664 17:08:40.357952 CPU physical address size: 39 bits
1665 17:08:40.361190 MTRR: default type WB/UC MTRR counts: 6/5.
1666 17:08:40.364289 MTRR: UC selected as default type.
1667 17:08:40.370942 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1668 17:08:40.377485 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1669 17:08:40.384167 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1670 17:08:40.390655 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1671 17:08:40.397342 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1672 17:08:40.397439
1673 17:08:40.397541 MTRR check
1674 17:08:40.400645 Fixed MTRRs : Enabled
1675 17:08:40.403831 Variable MTRRs: Enabled
1676 17:08:40.403910
1677 17:08:40.407347 MTRR: Fixed MSR 0x250 0x0606060606060606
1678 17:08:40.410481 MTRR: Fixed MSR 0x258 0x0606060606060606
1679 17:08:40.417273 MTRR: Fixed MSR 0x259 0x0000000000000000
1680 17:08:40.420491 MTRR: Fixed MSR 0x268 0x0606060606060606
1681 17:08:40.423625 MTRR: Fixed MSR 0x269 0x0606060606060606
1682 17:08:40.426922 MTRR: Fixed MSR 0x26a 0x0606060606060606
1683 17:08:40.430306 MTRR: Fixed MSR 0x26b 0x0606060606060606
1684 17:08:40.436971 MTRR: Fixed MSR 0x26c 0x0606060606060606
1685 17:08:40.440328 MTRR: Fixed MSR 0x26d 0x0606060606060606
1686 17:08:40.443476 MTRR: Fixed MSR 0x26e 0x0606060606060606
1687 17:08:40.446724 MTRR: Fixed MSR 0x26f 0x0606060606060606
1688 17:08:40.453327 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1689 17:08:40.456605 call enable_fixed_mtrr()
1690 17:08:40.460459 Checking cr50 for pending updates
1691 17:08:40.463703 CPU physical address size: 39 bits
1692 17:08:40.467366 Reading cr50 TPM mode
1693 17:08:40.477274 BS: BS_PAYLOAD_LOAD entry times (exec / console): 12 / 6 ms
1694 17:08:40.484930 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1695 17:08:40.488241 Checking segment from ROM address 0xfff9d5b8
1696 17:08:40.494504 Checking segment from ROM address 0xfff9d5d4
1697 17:08:40.497838 Loading segment from ROM address 0xfff9d5b8
1698 17:08:40.501114 code (compression=0)
1699 17:08:40.507750 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1700 17:08:40.517823 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1701 17:08:40.521134 it's not compressed!
1702 17:08:40.647100 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1703 17:08:40.653549 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1704 17:08:40.661008 Loading segment from ROM address 0xfff9d5d4
1705 17:08:40.664443 Entry Point 0x30000000
1706 17:08:40.664862 Loaded segments
1707 17:08:40.671161 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms
1708 17:08:40.687349 Finalizing chipset.
1709 17:08:40.690727 Finalizing SMM.
1710 17:08:40.691182 APMC done.
1711 17:08:40.697001 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1712 17:08:40.700344 mp_park_aps done after 0 msecs.
1713 17:08:40.703626 Jumping to boot code at 0x30000000(0x76b4b000)
1714 17:08:40.713807 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1715 17:08:40.714324
1716 17:08:40.714676
1717 17:08:40.715001
1718 17:08:40.716890 Starting depthcharge on Magolor...
1719 17:08:40.717325
1720 17:08:40.718433 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1721 17:08:40.718944 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1722 17:08:40.719362 Setting prompt string to ['dedede:']
1723 17:08:40.719832 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1724 17:08:40.726499 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1725 17:08:40.726779
1726 17:08:40.733320 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1727 17:08:40.733603
1728 17:08:40.736494 fw_config match found: AUDIO_AMP=UNPROVISIONED
1729 17:08:40.736657
1730 17:08:40.739732 Wipe memory regions:
1731 17:08:40.739899
1732 17:08:40.742954 [0x00000000001000, 0x000000000a0000)
1733 17:08:40.743110
1734 17:08:40.746190 [0x00000000100000, 0x00000030000000)
1735 17:08:40.876192
1736 17:08:40.879328 [0x00000031062170, 0x00000076a15000)
1737 17:08:41.048763
1738 17:08:41.051545 [0x00000100000000, 0x00000180400000)
1739 17:08:42.114470
1740 17:08:42.115000 R8152: Initializing
1741 17:08:42.115371
1742 17:08:42.117578 Version 6 (ocp_data = 5c30)
1743 17:08:42.121385
1744 17:08:42.121887 R8152: Done initializing
1745 17:08:42.122240
1746 17:08:42.124674 Adding net device
1747 17:08:42.125109
1748 17:08:42.127657 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1749 17:08:42.131038
1750 17:08:42.131603
1751 17:08:42.131961
1752 17:08:42.132744 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1754 17:08:42.234035 dedede: tftpboot 192.168.201.1 12908843/tftp-deploy-ul9h7tc_/kernel/bzImage 12908843/tftp-deploy-ul9h7tc_/kernel/cmdline 12908843/tftp-deploy-ul9h7tc_/ramdisk/ramdisk.cpio.gz
1755 17:08:42.234652 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1756 17:08:42.235065 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1757 17:08:42.239478 tftpboot 192.168.201.1 12908843/tftp-deploy-ul9h7tc_/kernel/bzIploy-ul9h7tc_/kernel/cmdline 12908843/tftp-deploy-ul9h7tc_/ramdisk/ramdisk.cpio.gz
1758 17:08:42.240025
1759 17:08:42.240375 Waiting for link
1760 17:08:42.440952
1761 17:08:42.441097 done.
1762 17:08:42.441167
1763 17:08:42.441229 MAC: 00:24:32:30:7b:c4
1764 17:08:42.441290
1765 17:08:42.444303 Sending DHCP discover... done.
1766 17:08:42.444392
1767 17:08:42.447411 Waiting for reply... done.
1768 17:08:42.447498
1769 17:08:42.450728 Sending DHCP request... done.
1770 17:08:42.450828
1771 17:08:42.453911 Waiting for reply... done.
1772 17:08:42.454003
1773 17:08:42.457329 My ip is 192.168.201.12
1774 17:08:42.457439
1775 17:08:42.460697 The DHCP server ip is 192.168.201.1
1776 17:08:42.460785
1777 17:08:42.463812 TFTP server IP predefined by user: 192.168.201.1
1778 17:08:42.463898
1779 17:08:42.470446 Bootfile predefined by user: 12908843/tftp-deploy-ul9h7tc_/kernel/bzImage
1780 17:08:42.470564
1781 17:08:42.473687 Sending tftp read request... done.
1782 17:08:42.473774
1783 17:08:42.481024 Waiting for the transfer...
1784 17:08:42.481140
1785 17:08:43.136204 00000000 ################################################################
1786 17:08:43.136739
1787 17:08:43.828698 00080000 ################################################################
1788 17:08:43.829211
1789 17:08:44.431438 00100000 ################################################################
1790 17:08:44.431574
1791 17:08:44.984036 00180000 ################################################################
1792 17:08:44.984210
1793 17:08:45.565410 00200000 ################################################################
1794 17:08:45.565612
1795 17:08:46.140027 00280000 ################################################################
1796 17:08:46.140167
1797 17:08:46.718244 00300000 ################################################################
1798 17:08:46.718388
1799 17:08:47.289812 00380000 ################################################################
1800 17:08:47.289957
1801 17:08:47.863573 00400000 ################################################################
1802 17:08:47.863714
1803 17:08:48.444699 00480000 ################################################################
1804 17:08:48.445172
1805 17:08:49.138735 00500000 ################################################################
1806 17:08:49.139206
1807 17:08:49.862861 00580000 ################################################################
1808 17:08:49.863375
1809 17:08:50.569559 00600000 ################################################################
1810 17:08:50.570078
1811 17:08:51.268288 00680000 ################################################################
1812 17:08:51.268937
1813 17:08:51.984060 00700000 ################################################################
1814 17:08:51.984579
1815 17:08:52.705728 00780000 ################################################################
1816 17:08:52.706392
1817 17:08:53.419131 00800000 ################################################################
1818 17:08:53.419672
1819 17:08:54.029971 00880000 ######################################################## done.
1820 17:08:54.030490
1821 17:08:54.033429 The bootfile was 9367440 bytes long.
1822 17:08:54.033903
1823 17:08:54.036533 Sending tftp read request... done.
1824 17:08:54.036959
1825 17:08:54.039787 Waiting for the transfer...
1826 17:08:54.040234
1827 17:08:54.781281 00000000 ################################################################
1828 17:08:54.781903
1829 17:08:55.517095 00080000 ################################################################
1830 17:08:55.517660
1831 17:08:56.168732 00100000 ################################################################
1832 17:08:56.168899
1833 17:08:56.781386 00180000 ################################################################
1834 17:08:56.781548
1835 17:08:57.452558 00200000 ################################################################
1836 17:08:57.453189
1837 17:08:58.119755 00280000 ################################################################
1838 17:08:58.120408
1839 17:08:58.867381 00300000 ################################################################
1840 17:08:58.867561
1841 17:08:59.629594 00380000 ################################################################
1842 17:08:59.630263
1843 17:09:00.316306 00400000 ################################################################
1844 17:09:00.316471
1845 17:09:00.930932 00480000 ################################################################
1846 17:09:00.931096
1847 17:09:01.542446 00500000 ################################################################
1848 17:09:01.542583
1849 17:09:02.142746 00580000 ################################################################
1850 17:09:02.143631
1851 17:09:02.847614 00600000 ################################################################
1852 17:09:02.848130
1853 17:09:03.540841 00680000 ################################################################
1854 17:09:03.540976
1855 17:09:04.208735 00700000 ################################################################
1856 17:09:04.209237
1857 17:09:04.936510 00780000 ################################################################
1858 17:09:04.937010
1859 17:09:05.532538 00800000 ##################################################### done.
1860 17:09:05.532708
1861 17:09:05.535817 Sending tftp read request... done.
1862 17:09:05.535926
1863 17:09:05.538781 Waiting for the transfer...
1864 17:09:05.538865
1865 17:09:05.538932 00000000 # done.
1866 17:09:05.538995
1867 17:09:05.548917 Command line loaded dynamically from TFTP file: 12908843/tftp-deploy-ul9h7tc_/kernel/cmdline
1868 17:09:05.549031
1869 17:09:05.565234 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1870 17:09:05.565349
1871 17:09:05.568762 ec_init: CrosEC protocol v3 supported (256, 256)
1872 17:09:05.575707
1873 17:09:05.578954 Shutting down all USB controllers.
1874 17:09:05.579037
1875 17:09:05.579104 Removing current net device
1876 17:09:05.579164
1877 17:09:05.582215 Finalizing coreboot
1878 17:09:05.582305
1879 17:09:05.588801 Exiting depthcharge with code 4 at timestamp: 31664702
1880 17:09:05.588890
1881 17:09:05.588976
1882 17:09:05.589076 Starting kernel ...
1883 17:09:05.589175
1884 17:09:05.589272
1885 17:09:05.589887 end: 2.2.4 bootloader-commands (duration 00:00:25) [common]
1886 17:09:05.590020 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
1887 17:09:05.590128 Setting prompt string to ['Linux version [0-9]']
1888 17:09:05.590234 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1889 17:09:05.590339 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1891 17:13:27.590249 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
1893 17:13:27.590469 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
1895 17:13:27.590678 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1898 17:13:27.590945 end: 2 depthcharge-action (duration 00:05:00) [common]
1900 17:13:27.591171 Cleaning after the job
1901 17:13:27.591260 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12908843/tftp-deploy-ul9h7tc_/ramdisk
1902 17:13:27.592769 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12908843/tftp-deploy-ul9h7tc_/kernel
1903 17:13:27.594306 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12908843/tftp-deploy-ul9h7tc_/modules
1904 17:13:27.594690 start: 5.1 power-off (timeout 00:00:30) [common]
1905 17:13:27.594862 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-8' '--port=1' '--command=off'
1906 17:13:27.671236 >> Command sent successfully.
1907 17:13:27.673807 Returned 0 in 0 seconds
1908 17:13:27.774172 end: 5.1 power-off (duration 00:00:00) [common]
1910 17:13:27.774505 start: 5.2 read-feedback (timeout 00:10:00) [common]
1911 17:13:27.774764 Listened to connection for namespace 'common' for up to 1s
1913 17:13:27.775144 Listened to connection for namespace 'common' for up to 1s
1914 17:13:28.775861 Finalising connection for namespace 'common'
1915 17:13:28.776569 Disconnecting from shell: Finalise
1916 17:13:28.776978
1917 17:13:28.878055 end: 5.2 read-feedback (duration 00:00:01) [common]
1918 17:13:28.878641 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12908843
1919 17:13:28.928628 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12908843
1920 17:13:28.928855 JobError: Your job cannot terminate cleanly.