Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
1 17:08:25.757382 lava-dispatcher, installed at version: 2024.01
2 17:08:25.757578 start: 0 validate
3 17:08:25.757706 Start time: 2024-03-01 17:08:25.757699+00:00 (UTC)
4 17:08:25.757823 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:08:25.757954 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 17:08:26.018590 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:08:26.018804 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2245-gb01c108f53cc0%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:08:26.285798 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:08:26.285976 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2245-gb01c108f53cc0%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 17:08:33.215165 validate duration: 7.46
12 17:08:33.215431 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 17:08:33.215534 start: 1.1 download-retry (timeout 00:10:00) [common]
14 17:08:33.215627 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 17:08:33.215756 Not decompressing ramdisk as can be used compressed.
16 17:08:33.215843 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 17:08:33.215905 saving as /var/lib/lava/dispatcher/tmp/12908839/tftp-deploy-ucpgdosc/ramdisk/rootfs.cpio.gz
18 17:08:33.215985 total size: 8418130 (8 MB)
19 17:08:33.746785 progress 0 % (0 MB)
20 17:08:33.762363 progress 5 % (0 MB)
21 17:08:33.776108 progress 10 % (0 MB)
22 17:08:33.784383 progress 15 % (1 MB)
23 17:08:33.790041 progress 20 % (1 MB)
24 17:08:33.794454 progress 25 % (2 MB)
25 17:08:33.798349 progress 30 % (2 MB)
26 17:08:33.801688 progress 35 % (2 MB)
27 17:08:33.805038 progress 40 % (3 MB)
28 17:08:33.808203 progress 45 % (3 MB)
29 17:08:33.811128 progress 50 % (4 MB)
30 17:08:33.813841 progress 55 % (4 MB)
31 17:08:33.816411 progress 60 % (4 MB)
32 17:08:33.818642 progress 65 % (5 MB)
33 17:08:33.820976 progress 70 % (5 MB)
34 17:08:33.823281 progress 75 % (6 MB)
35 17:08:33.825582 progress 80 % (6 MB)
36 17:08:33.827841 progress 85 % (6 MB)
37 17:08:33.830192 progress 90 % (7 MB)
38 17:08:33.832522 progress 95 % (7 MB)
39 17:08:33.834614 progress 100 % (8 MB)
40 17:08:33.834857 8 MB downloaded in 0.62 s (12.97 MB/s)
41 17:08:33.835016 end: 1.1.1 http-download (duration 00:00:01) [common]
43 17:08:33.835255 end: 1.1 download-retry (duration 00:00:01) [common]
44 17:08:33.835346 start: 1.2 download-retry (timeout 00:09:59) [common]
45 17:08:33.835431 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 17:08:33.835571 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2245-gb01c108f53cc0/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 17:08:33.835642 saving as /var/lib/lava/dispatcher/tmp/12908839/tftp-deploy-ucpgdosc/kernel/bzImage
48 17:08:33.835703 total size: 9367440 (8 MB)
49 17:08:33.835763 No compression specified
50 17:08:33.836938 progress 0 % (0 MB)
51 17:08:33.839573 progress 5 % (0 MB)
52 17:08:33.842122 progress 10 % (0 MB)
53 17:08:33.844698 progress 15 % (1 MB)
54 17:08:33.847315 progress 20 % (1 MB)
55 17:08:33.849817 progress 25 % (2 MB)
56 17:08:33.852352 progress 30 % (2 MB)
57 17:08:33.854969 progress 35 % (3 MB)
58 17:08:33.857516 progress 40 % (3 MB)
59 17:08:33.859934 progress 45 % (4 MB)
60 17:08:33.862376 progress 50 % (4 MB)
61 17:08:33.865041 progress 55 % (4 MB)
62 17:08:33.867456 progress 60 % (5 MB)
63 17:08:33.869897 progress 65 % (5 MB)
64 17:08:33.872537 progress 70 % (6 MB)
65 17:08:33.874953 progress 75 % (6 MB)
66 17:08:33.877363 progress 80 % (7 MB)
67 17:08:33.879784 progress 85 % (7 MB)
68 17:08:33.882381 progress 90 % (8 MB)
69 17:08:33.884935 progress 95 % (8 MB)
70 17:08:33.887418 progress 100 % (8 MB)
71 17:08:33.887644 8 MB downloaded in 0.05 s (172.01 MB/s)
72 17:08:33.887789 end: 1.2.1 http-download (duration 00:00:00) [common]
74 17:08:33.888121 end: 1.2 download-retry (duration 00:00:00) [common]
75 17:08:33.888217 start: 1.3 download-retry (timeout 00:09:59) [common]
76 17:08:33.888302 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 17:08:33.888447 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2245-gb01c108f53cc0/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 17:08:33.888516 saving as /var/lib/lava/dispatcher/tmp/12908839/tftp-deploy-ucpgdosc/modules/modules.tar
79 17:08:33.888576 total size: 250960 (0 MB)
80 17:08:33.888650 Using unxz to decompress xz
81 17:08:33.893026 progress 13 % (0 MB)
82 17:08:33.893438 progress 26 % (0 MB)
83 17:08:33.893677 progress 39 % (0 MB)
84 17:08:33.895272 progress 52 % (0 MB)
85 17:08:33.897256 progress 65 % (0 MB)
86 17:08:33.899052 progress 78 % (0 MB)
87 17:08:33.900971 progress 91 % (0 MB)
88 17:08:33.902840 progress 100 % (0 MB)
89 17:08:33.908377 0 MB downloaded in 0.02 s (12.09 MB/s)
90 17:08:33.908609 end: 1.3.1 http-download (duration 00:00:00) [common]
92 17:08:33.908880 end: 1.3 download-retry (duration 00:00:00) [common]
93 17:08:33.908976 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 17:08:33.909070 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 17:08:33.909155 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 17:08:33.909243 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 17:08:33.909479 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12908839/lava-overlay-upkk6ety
98 17:08:33.909623 makedir: /var/lib/lava/dispatcher/tmp/12908839/lava-overlay-upkk6ety/lava-12908839/bin
99 17:08:33.909732 makedir: /var/lib/lava/dispatcher/tmp/12908839/lava-overlay-upkk6ety/lava-12908839/tests
100 17:08:33.909832 makedir: /var/lib/lava/dispatcher/tmp/12908839/lava-overlay-upkk6ety/lava-12908839/results
101 17:08:33.909965 Creating /var/lib/lava/dispatcher/tmp/12908839/lava-overlay-upkk6ety/lava-12908839/bin/lava-add-keys
102 17:08:33.910118 Creating /var/lib/lava/dispatcher/tmp/12908839/lava-overlay-upkk6ety/lava-12908839/bin/lava-add-sources
103 17:08:33.910252 Creating /var/lib/lava/dispatcher/tmp/12908839/lava-overlay-upkk6ety/lava-12908839/bin/lava-background-process-start
104 17:08:33.910383 Creating /var/lib/lava/dispatcher/tmp/12908839/lava-overlay-upkk6ety/lava-12908839/bin/lava-background-process-stop
105 17:08:33.910510 Creating /var/lib/lava/dispatcher/tmp/12908839/lava-overlay-upkk6ety/lava-12908839/bin/lava-common-functions
106 17:08:33.910637 Creating /var/lib/lava/dispatcher/tmp/12908839/lava-overlay-upkk6ety/lava-12908839/bin/lava-echo-ipv4
107 17:08:33.910763 Creating /var/lib/lava/dispatcher/tmp/12908839/lava-overlay-upkk6ety/lava-12908839/bin/lava-install-packages
108 17:08:33.910890 Creating /var/lib/lava/dispatcher/tmp/12908839/lava-overlay-upkk6ety/lava-12908839/bin/lava-installed-packages
109 17:08:33.911015 Creating /var/lib/lava/dispatcher/tmp/12908839/lava-overlay-upkk6ety/lava-12908839/bin/lava-os-build
110 17:08:33.911143 Creating /var/lib/lava/dispatcher/tmp/12908839/lava-overlay-upkk6ety/lava-12908839/bin/lava-probe-channel
111 17:08:33.911270 Creating /var/lib/lava/dispatcher/tmp/12908839/lava-overlay-upkk6ety/lava-12908839/bin/lava-probe-ip
112 17:08:33.911395 Creating /var/lib/lava/dispatcher/tmp/12908839/lava-overlay-upkk6ety/lava-12908839/bin/lava-target-ip
113 17:08:33.911520 Creating /var/lib/lava/dispatcher/tmp/12908839/lava-overlay-upkk6ety/lava-12908839/bin/lava-target-mac
114 17:08:33.911644 Creating /var/lib/lava/dispatcher/tmp/12908839/lava-overlay-upkk6ety/lava-12908839/bin/lava-target-storage
115 17:08:33.911775 Creating /var/lib/lava/dispatcher/tmp/12908839/lava-overlay-upkk6ety/lava-12908839/bin/lava-test-case
116 17:08:33.911905 Creating /var/lib/lava/dispatcher/tmp/12908839/lava-overlay-upkk6ety/lava-12908839/bin/lava-test-event
117 17:08:33.912032 Creating /var/lib/lava/dispatcher/tmp/12908839/lava-overlay-upkk6ety/lava-12908839/bin/lava-test-feedback
118 17:08:33.912209 Creating /var/lib/lava/dispatcher/tmp/12908839/lava-overlay-upkk6ety/lava-12908839/bin/lava-test-raise
119 17:08:33.912338 Creating /var/lib/lava/dispatcher/tmp/12908839/lava-overlay-upkk6ety/lava-12908839/bin/lava-test-reference
120 17:08:33.912466 Creating /var/lib/lava/dispatcher/tmp/12908839/lava-overlay-upkk6ety/lava-12908839/bin/lava-test-runner
121 17:08:33.912591 Creating /var/lib/lava/dispatcher/tmp/12908839/lava-overlay-upkk6ety/lava-12908839/bin/lava-test-set
122 17:08:33.912717 Creating /var/lib/lava/dispatcher/tmp/12908839/lava-overlay-upkk6ety/lava-12908839/bin/lava-test-shell
123 17:08:33.912845 Updating /var/lib/lava/dispatcher/tmp/12908839/lava-overlay-upkk6ety/lava-12908839/bin/lava-install-packages (oe)
124 17:08:33.912998 Updating /var/lib/lava/dispatcher/tmp/12908839/lava-overlay-upkk6ety/lava-12908839/bin/lava-installed-packages (oe)
125 17:08:33.913120 Creating /var/lib/lava/dispatcher/tmp/12908839/lava-overlay-upkk6ety/lava-12908839/environment
126 17:08:33.913222 LAVA metadata
127 17:08:33.913299 - LAVA_JOB_ID=12908839
128 17:08:33.913365 - LAVA_DISPATCHER_IP=192.168.201.1
129 17:08:33.913466 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 17:08:33.913532 skipped lava-vland-overlay
131 17:08:33.913618 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 17:08:33.913695 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 17:08:33.913760 skipped lava-multinode-overlay
134 17:08:33.913833 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 17:08:33.913915 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 17:08:33.913996 Loading test definitions
137 17:08:33.914089 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 17:08:33.914167 Using /lava-12908839 at stage 0
139 17:08:33.914484 uuid=12908839_1.4.2.3.1 testdef=None
140 17:08:33.914571 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 17:08:33.914657 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 17:08:33.915191 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 17:08:33.915417 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 17:08:33.916062 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 17:08:33.916324 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 17:08:33.916944 runner path: /var/lib/lava/dispatcher/tmp/12908839/lava-overlay-upkk6ety/lava-12908839/0/tests/0_dmesg test_uuid 12908839_1.4.2.3.1
149 17:08:33.917103 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 17:08:33.917329 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 17:08:33.917399 Using /lava-12908839 at stage 1
153 17:08:33.917699 uuid=12908839_1.4.2.3.5 testdef=None
154 17:08:33.917786 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 17:08:33.917870 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 17:08:33.918337 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 17:08:33.918554 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 17:08:33.919199 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 17:08:33.919425 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 17:08:33.920095 runner path: /var/lib/lava/dispatcher/tmp/12908839/lava-overlay-upkk6ety/lava-12908839/1/tests/1_bootrr test_uuid 12908839_1.4.2.3.5
163 17:08:33.920263 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 17:08:33.920468 Creating lava-test-runner.conf files
166 17:08:33.920532 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12908839/lava-overlay-upkk6ety/lava-12908839/0 for stage 0
167 17:08:33.920623 - 0_dmesg
168 17:08:33.920702 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12908839/lava-overlay-upkk6ety/lava-12908839/1 for stage 1
169 17:08:33.920792 - 1_bootrr
170 17:08:33.920886 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 17:08:33.920971 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 17:08:33.929203 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 17:08:33.929306 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 17:08:33.929392 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 17:08:33.929474 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 17:08:33.929559 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 17:08:34.184183 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 17:08:34.184582 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 17:08:34.184704 extracting modules file /var/lib/lava/dispatcher/tmp/12908839/tftp-deploy-ucpgdosc/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12908839/extract-overlay-ramdisk-tfon9ecs/ramdisk
180 17:08:34.198124 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 17:08:34.198245 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 17:08:34.198330 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12908839/compress-overlay-pa50uojk/overlay-1.4.2.4.tar.gz to ramdisk
183 17:08:34.198400 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12908839/compress-overlay-pa50uojk/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12908839/extract-overlay-ramdisk-tfon9ecs/ramdisk
184 17:08:34.206894 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 17:08:34.207007 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 17:08:34.207100 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 17:08:34.207185 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 17:08:34.207258 Building ramdisk /var/lib/lava/dispatcher/tmp/12908839/extract-overlay-ramdisk-tfon9ecs/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12908839/extract-overlay-ramdisk-tfon9ecs/ramdisk
189 17:08:34.347813 >> 49788 blocks
190 17:08:35.225291 rename /var/lib/lava/dispatcher/tmp/12908839/extract-overlay-ramdisk-tfon9ecs/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12908839/tftp-deploy-ucpgdosc/ramdisk/ramdisk.cpio.gz
191 17:08:35.225743 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 17:08:35.225875 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 17:08:35.225977 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 17:08:35.226073 No mkimage arch provided, not using FIT.
195 17:08:35.226164 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 17:08:35.226252 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 17:08:35.226354 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 17:08:35.226448 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 17:08:35.226531 No LXC device requested
200 17:08:35.226610 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 17:08:35.226695 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 17:08:35.226777 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 17:08:35.226853 Checking files for TFTP limit of 4294967296 bytes.
204 17:08:35.227274 end: 1 tftp-deploy (duration 00:00:02) [common]
205 17:08:35.227378 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 17:08:35.227470 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 17:08:35.227591 substitutions:
208 17:08:35.227658 - {DTB}: None
209 17:08:35.227720 - {INITRD}: 12908839/tftp-deploy-ucpgdosc/ramdisk/ramdisk.cpio.gz
210 17:08:35.227778 - {KERNEL}: 12908839/tftp-deploy-ucpgdosc/kernel/bzImage
211 17:08:35.227834 - {LAVA_MAC}: None
212 17:08:35.227888 - {PRESEED_CONFIG}: None
213 17:08:35.227942 - {PRESEED_LOCAL}: None
214 17:08:35.227996 - {RAMDISK}: 12908839/tftp-deploy-ucpgdosc/ramdisk/ramdisk.cpio.gz
215 17:08:35.228049 - {ROOT_PART}: None
216 17:08:35.228143 - {ROOT}: None
217 17:08:35.228196 - {SERVER_IP}: 192.168.201.1
218 17:08:35.228249 - {TEE}: None
219 17:08:35.228301 Parsed boot commands:
220 17:08:35.228354 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 17:08:35.228536 Parsed boot commands: tftpboot 192.168.201.1 12908839/tftp-deploy-ucpgdosc/kernel/bzImage 12908839/tftp-deploy-ucpgdosc/kernel/cmdline 12908839/tftp-deploy-ucpgdosc/ramdisk/ramdisk.cpio.gz
222 17:08:35.228625 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 17:08:35.228709 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 17:08:35.228825 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 17:08:35.228937 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 17:08:35.229025 Not connected, no need to disconnect.
227 17:08:35.229102 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 17:08:35.229288 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 17:08:35.229361 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-7'
230 17:08:35.233432 Setting prompt string to ['lava-test: # ']
231 17:08:35.233809 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 17:08:35.233925 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 17:08:35.234020 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 17:08:35.234110 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 17:08:35.234345 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-7' '--port=1' '--command=reboot'
236 17:08:40.383330 >> Command sent successfully.
237 17:08:40.393971 Returned 0 in 5 seconds
238 17:08:40.495141 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 17:08:40.496574 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 17:08:40.497077 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 17:08:40.497540 Setting prompt string to 'Starting depthcharge on Voema...'
243 17:08:40.497900 Changing prompt to 'Starting depthcharge on Voema...'
244 17:08:40.498254 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
245 17:08:40.499462 [Enter `^Ec?' for help]
246 17:08:42.088944
247 17:08:42.089541
248 17:08:42.098947 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
249 17:08:42.102028 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
250 17:08:42.108400 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
251 17:08:42.111953 CPU: AES supported, TXT NOT supported, VT supported
252 17:08:42.118355 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
253 17:08:42.124990 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
254 17:08:42.128346 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
255 17:08:42.131920 VBOOT: Loading verstage.
256 17:08:42.138794 FMAP: Found "FLASH" version 1.1 at 0x1804000.
257 17:08:42.142216 FMAP: base = 0x0 size = 0x2000000 #areas = 32
258 17:08:42.145501 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
259 17:08:42.155550 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
260 17:08:42.162157 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
261 17:08:42.162580
262 17:08:42.163008
263 17:08:42.175237 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
264 17:08:42.189073 Probing TPM: . done!
265 17:08:42.192499 TPM ready after 0 ms
266 17:08:42.195782 Connected to device vid:did:rid of 1ae0:0028:00
267 17:08:42.207015 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
268 17:08:42.213980 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
269 17:08:42.217026 Initialized TPM device CR50 revision 0
270 17:08:42.268692 tlcl_send_startup: Startup return code is 0
271 17:08:42.269103 TPM: setup succeeded
272 17:08:42.284455 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
273 17:08:42.298938 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
274 17:08:42.311774 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
275 17:08:42.321294 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
276 17:08:42.324462 Chrome EC: UHEPI supported
277 17:08:42.327973 Phase 1
278 17:08:42.331611 FMAP: area GBB found @ 1805000 (458752 bytes)
279 17:08:42.341252 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
280 17:08:42.347971 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
281 17:08:42.354962 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
282 17:08:42.361476 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
283 17:08:42.364745 Recovery requested (1009000e)
284 17:08:42.367710 TPM: Extending digest for VBOOT: boot mode into PCR 0
285 17:08:42.379835 tlcl_extend: response is 0
286 17:08:42.386439 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
287 17:08:42.396406 tlcl_extend: response is 0
288 17:08:42.402685 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
289 17:08:42.409882 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
290 17:08:42.416164 BS: verstage times (exec / console): total (unknown) / 142 ms
291 17:08:42.416697
292 17:08:42.417036
293 17:08:42.428984 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
294 17:08:42.435931 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
295 17:08:42.439208 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
296 17:08:42.442565 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
297 17:08:42.449590 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
298 17:08:42.452676 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
299 17:08:42.455938 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
300 17:08:42.459002 TCO_STS: 0000 0000
301 17:08:42.462409 GEN_PMCON: d0015038 00002200
302 17:08:42.465812 GBLRST_CAUSE: 00000000 00000000
303 17:08:42.466237 HPR_CAUSE0: 00000000
304 17:08:42.468732 prev_sleep_state 5
305 17:08:42.472337 Boot Count incremented to 27588
306 17:08:42.479130 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
307 17:08:42.485553 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
308 17:08:42.492153 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
309 17:08:42.499041 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
310 17:08:42.503319 Chrome EC: UHEPI supported
311 17:08:42.510062 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
312 17:08:42.522931 Probing TPM: done!
313 17:08:42.529467 Connected to device vid:did:rid of 1ae0:0028:00
314 17:08:42.540745 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
315 17:08:42.547572 Initialized TPM device CR50 revision 0
316 17:08:42.558051 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
317 17:08:42.564523 MRC: Hash idx 0x100b comparison successful.
318 17:08:42.567795 MRC cache found, size faa8
319 17:08:42.568295 bootmode is set to: 2
320 17:08:42.571145 SPD index = 0
321 17:08:42.577833 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
322 17:08:42.581039 SPD: module type is LPDDR4X
323 17:08:42.584130 SPD: module part number is MT53E512M64D4NW-046
324 17:08:42.591015 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
325 17:08:42.594596 SPD: device width 16 bits, bus width 16 bits
326 17:08:42.601148 SPD: module size is 1024 MB (per channel)
327 17:08:43.031679 CBMEM:
328 17:08:43.035144 IMD: root @ 0x76fff000 254 entries.
329 17:08:43.038103 IMD: root @ 0x76ffec00 62 entries.
330 17:08:43.041552 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
331 17:08:43.048220 FMAP: area RW_VPD found @ f35000 (8192 bytes)
332 17:08:43.051435 External stage cache:
333 17:08:43.054705 IMD: root @ 0x7b3ff000 254 entries.
334 17:08:43.057825 IMD: root @ 0x7b3fec00 62 entries.
335 17:08:43.073168 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
336 17:08:43.080045 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
337 17:08:43.086652 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
338 17:08:43.100883 MRC: 'RECOVERY_MRC_CACHE' does not need update.
339 17:08:43.107176 cse_lite: Skip switching to RW in the recovery path
340 17:08:43.107560 8 DIMMs found
341 17:08:43.107872 SMM Memory Map
342 17:08:43.110815 SMRAM : 0x7b000000 0x800000
343 17:08:43.114235 Subregion 0: 0x7b000000 0x200000
344 17:08:43.118127 Subregion 1: 0x7b200000 0x200000
345 17:08:43.121829 Subregion 2: 0x7b400000 0x400000
346 17:08:43.125278 top_of_ram = 0x77000000
347 17:08:43.131701 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
348 17:08:43.134901 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
349 17:08:43.141539 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
350 17:08:43.145023 MTRR Range: Start=ff000000 End=0 (Size 1000000)
351 17:08:43.154993 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
352 17:08:43.158282 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
353 17:08:43.170022 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
354 17:08:43.176787 Processing 211 relocs. Offset value of 0x74c0b000
355 17:08:43.183586 BS: romstage times (exec / console): total (unknown) / 277 ms
356 17:08:43.189495
357 17:08:43.189913
358 17:08:43.199153 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
359 17:08:43.202645 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
360 17:08:43.212822 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
361 17:08:43.219678 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
362 17:08:43.225924 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
363 17:08:43.232518 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
364 17:08:43.279882 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
365 17:08:43.286316 Processing 5008 relocs. Offset value of 0x75d98000
366 17:08:43.290117 BS: postcar times (exec / console): total (unknown) / 59 ms
367 17:08:43.293039
368 17:08:43.293460
369 17:08:43.303039 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
370 17:08:43.303562 Normal boot
371 17:08:43.306451 FW_CONFIG value is 0x804c02
372 17:08:43.310019 PCI: 00:07.0 disabled by fw_config
373 17:08:43.313385 PCI: 00:07.1 disabled by fw_config
374 17:08:43.316431 PCI: 00:0d.2 disabled by fw_config
375 17:08:43.319765 PCI: 00:1c.7 disabled by fw_config
376 17:08:43.326676 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
377 17:08:43.333234 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
378 17:08:43.336563 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
379 17:08:43.339665 GENERIC: 0.0 disabled by fw_config
380 17:08:43.343425 GENERIC: 1.0 disabled by fw_config
381 17:08:43.349574 fw_config match found: DB_USB=USB3_ACTIVE
382 17:08:43.353063 fw_config match found: DB_USB=USB3_ACTIVE
383 17:08:43.356179 fw_config match found: DB_USB=USB3_ACTIVE
384 17:08:43.359700 fw_config match found: DB_USB=USB3_ACTIVE
385 17:08:43.366126 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
386 17:08:43.373387 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
387 17:08:43.379686 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
388 17:08:43.389714 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
389 17:08:43.393015 microcode: sig=0x806c1 pf=0x80 revision=0x86
390 17:08:43.399784 microcode: Update skipped, already up-to-date
391 17:08:43.406458 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
392 17:08:43.432997 Detected 4 core, 8 thread CPU.
393 17:08:43.436401 Setting up SMI for CPU
394 17:08:43.439364 IED base = 0x7b400000
395 17:08:43.439803 IED size = 0x00400000
396 17:08:43.442953 Will perform SMM setup.
397 17:08:43.449578 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
398 17:08:43.456013 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
399 17:08:43.462655 Processing 16 relocs. Offset value of 0x00030000
400 17:08:43.465987 Attempting to start 7 APs
401 17:08:43.468993 Waiting for 10ms after sending INIT.
402 17:08:43.484870 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
403 17:08:43.485044 done.
404 17:08:43.488428 AP: slot 2 apic_id 3.
405 17:08:43.491912 AP: slot 6 apic_id 2.
406 17:08:43.492139 AP: slot 3 apic_id 5.
407 17:08:43.494650 AP: slot 7 apic_id 4.
408 17:08:43.498239 Waiting for 2nd SIPI to complete...done.
409 17:08:43.501449 AP: slot 5 apic_id 6.
410 17:08:43.504825 AP: slot 4 apic_id 7.
411 17:08:43.511593 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
412 17:08:43.518118 Processing 13 relocs. Offset value of 0x00038000
413 17:08:43.518539 Unable to locate Global NVS
414 17:08:43.528627 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
415 17:08:43.531902 Installing permanent SMM handler to 0x7b000000
416 17:08:43.541542 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
417 17:08:43.544800 Processing 794 relocs. Offset value of 0x7b010000
418 17:08:43.554704 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
419 17:08:43.558329 Processing 13 relocs. Offset value of 0x7b008000
420 17:08:43.565102 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
421 17:08:43.571585 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
422 17:08:43.574905 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
423 17:08:43.581514 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
424 17:08:43.588255 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
425 17:08:43.594853 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
426 17:08:43.601697 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
427 17:08:43.602127 Unable to locate Global NVS
428 17:08:43.611442 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
429 17:08:43.614945 Clearing SMI status registers
430 17:08:43.615368 SMI_STS: PM1
431 17:08:43.618081 PM1_STS: PWRBTN
432 17:08:43.624748 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
433 17:08:43.627808 In relocation handler: CPU 0
434 17:08:43.631103 New SMBASE=0x7b000000 IEDBASE=0x7b400000
435 17:08:43.637984 Writing SMRR. base = 0x7b000006, mask=0xff800c00
436 17:08:43.638575 Relocation complete.
437 17:08:43.647962 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
438 17:08:43.648446 In relocation handler: CPU 1
439 17:08:43.654535 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
440 17:08:43.655105 Relocation complete.
441 17:08:43.661390 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
442 17:08:43.664313 In relocation handler: CPU 2
443 17:08:43.670997 New SMBASE=0x7afff800 IEDBASE=0x7b400000
444 17:08:43.671615 Relocation complete.
445 17:08:43.677639 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
446 17:08:43.681341 In relocation handler: CPU 6
447 17:08:43.687489 New SMBASE=0x7affe800 IEDBASE=0x7b400000
448 17:08:43.690745 Writing SMRR. base = 0x7b000006, mask=0xff800c00
449 17:08:43.694567 Relocation complete.
450 17:08:43.700960 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
451 17:08:43.704565 In relocation handler: CPU 4
452 17:08:43.707836 New SMBASE=0x7afff000 IEDBASE=0x7b400000
453 17:08:43.711110 Relocation complete.
454 17:08:43.717443 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
455 17:08:43.720947 In relocation handler: CPU 5
456 17:08:43.723992 New SMBASE=0x7affec00 IEDBASE=0x7b400000
457 17:08:43.727432 Writing SMRR. base = 0x7b000006, mask=0xff800c00
458 17:08:43.730691 Relocation complete.
459 17:08:43.737572 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
460 17:08:43.741178 In relocation handler: CPU 3
461 17:08:43.744412 New SMBASE=0x7afff400 IEDBASE=0x7b400000
462 17:08:43.747210 Relocation complete.
463 17:08:43.754086 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
464 17:08:43.757193 In relocation handler: CPU 7
465 17:08:43.760553 New SMBASE=0x7affe400 IEDBASE=0x7b400000
466 17:08:43.767419 Writing SMRR. base = 0x7b000006, mask=0xff800c00
467 17:08:43.767861 Relocation complete.
468 17:08:43.770734 Initializing CPU #0
469 17:08:43.774129 CPU: vendor Intel device 806c1
470 17:08:43.777417 CPU: family 06, model 8c, stepping 01
471 17:08:43.781107 Clearing out pending MCEs
472 17:08:43.785102 Setting up local APIC...
473 17:08:43.785421 apic_id: 0x00 done.
474 17:08:43.788627 Turbo is available but hidden
475 17:08:43.791981 Turbo is available and visible
476 17:08:43.795059 microcode: Update skipped, already up-to-date
477 17:08:43.798337 CPU #0 initialized
478 17:08:43.801853 Initializing CPU #2
479 17:08:43.802003 Initializing CPU #6
480 17:08:43.805234 CPU: vendor Intel device 806c1
481 17:08:43.808305 CPU: family 06, model 8c, stepping 01
482 17:08:43.811782 CPU: vendor Intel device 806c1
483 17:08:43.815020 CPU: family 06, model 8c, stepping 01
484 17:08:43.818518 Clearing out pending MCEs
485 17:08:43.821731 Clearing out pending MCEs
486 17:08:43.825096 Setting up local APIC...
487 17:08:43.825177 Initializing CPU #4
488 17:08:43.828398 Initializing CPU #5
489 17:08:43.831876 CPU: vendor Intel device 806c1
490 17:08:43.835104 CPU: family 06, model 8c, stepping 01
491 17:08:43.838420 CPU: vendor Intel device 806c1
492 17:08:43.841908 CPU: family 06, model 8c, stepping 01
493 17:08:43.844713 Clearing out pending MCEs
494 17:08:43.848168 Initializing CPU #7
495 17:08:43.848249 Initializing CPU #3
496 17:08:43.851538 CPU: vendor Intel device 806c1
497 17:08:43.854882 CPU: family 06, model 8c, stepping 01
498 17:08:43.858282 CPU: vendor Intel device 806c1
499 17:08:43.861583 CPU: family 06, model 8c, stepping 01
500 17:08:43.865084 apic_id: 0x03 done.
501 17:08:43.868371 Setting up local APIC...
502 17:08:43.871747 Clearing out pending MCEs
503 17:08:43.871828 Clearing out pending MCEs
504 17:08:43.875469 Setting up local APIC...
505 17:08:43.878340 Clearing out pending MCEs
506 17:08:43.881766 Setting up local APIC...
507 17:08:43.882213 apic_id: 0x05 done.
508 17:08:43.885117 Setting up local APIC...
509 17:08:43.888485 Setting up local APIC...
510 17:08:43.891443 apic_id: 0x07 done.
511 17:08:43.891845 apic_id: 0x04 done.
512 17:08:43.898145 microcode: Update skipped, already up-to-date
513 17:08:43.901761 microcode: Update skipped, already up-to-date
514 17:08:43.904926 CPU #3 initialized
515 17:08:43.905354 CPU #7 initialized
516 17:08:43.908499 microcode: Update skipped, already up-to-date
517 17:08:43.911375 apic_id: 0x02 done.
518 17:08:43.914723 CPU #2 initialized
519 17:08:43.918099 microcode: Update skipped, already up-to-date
520 17:08:43.921406 Initializing CPU #1
521 17:08:43.921828 apic_id: 0x06 done.
522 17:08:43.927808 microcode: Update skipped, already up-to-date
523 17:08:43.931521 microcode: Update skipped, already up-to-date
524 17:08:43.934840 CPU #4 initialized
525 17:08:43.935257 CPU #5 initialized
526 17:08:43.938301 CPU #6 initialized
527 17:08:43.941142 CPU: vendor Intel device 806c1
528 17:08:43.945140 CPU: family 06, model 8c, stepping 01
529 17:08:43.947928 Clearing out pending MCEs
530 17:08:43.951262 Setting up local APIC...
531 17:08:43.951675 apic_id: 0x01 done.
532 17:08:43.958060 microcode: Update skipped, already up-to-date
533 17:08:43.958496 CPU #1 initialized
534 17:08:43.964621 bsp_do_flight_plan done after 459 msecs.
535 17:08:43.967934 CPU: frequency set to 4000 MHz
536 17:08:43.968495 Enabling SMIs.
537 17:08:43.974279 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
538 17:08:43.990093 SATAXPCIE1 indicates PCIe NVMe is present
539 17:08:43.993535 Probing TPM: done!
540 17:08:43.996992 Connected to device vid:did:rid of 1ae0:0028:00
541 17:08:44.007424 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
542 17:08:44.010915 Initialized TPM device CR50 revision 0
543 17:08:44.014023 Enabling S0i3.4
544 17:08:44.020565 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
545 17:08:44.024034 Found a VBT of 8704 bytes after decompression
546 17:08:44.030653 cse_lite: CSE RO boot. HybridStorageMode disabled
547 17:08:44.036963 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
548 17:08:44.113825 FSPS returned 0
549 17:08:44.116750 Executing Phase 1 of FspMultiPhaseSiInit
550 17:08:44.126854 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
551 17:08:44.130144 port C0 DISC req: usage 1 usb3 1 usb2 5
552 17:08:44.133412 Raw Buffer output 0 00000511
553 17:08:44.136955 Raw Buffer output 1 00000000
554 17:08:44.140323 pmc_send_ipc_cmd succeeded
555 17:08:44.147246 port C1 DISC req: usage 1 usb3 2 usb2 3
556 17:08:44.147329 Raw Buffer output 0 00000321
557 17:08:44.150557 Raw Buffer output 1 00000000
558 17:08:44.154404 pmc_send_ipc_cmd succeeded
559 17:08:44.159963 Detected 4 core, 8 thread CPU.
560 17:08:44.163272 Detected 4 core, 8 thread CPU.
561 17:08:44.397071 Display FSP Version Info HOB
562 17:08:44.400634 Reference Code - CPU = a.0.4c.31
563 17:08:44.404041 uCode Version = 0.0.0.86
564 17:08:44.407474 TXT ACM version = ff.ff.ff.ffff
565 17:08:44.410805 Reference Code - ME = a.0.4c.31
566 17:08:44.414275 MEBx version = 0.0.0.0
567 17:08:44.417127 ME Firmware Version = Consumer SKU
568 17:08:44.420189 Reference Code - PCH = a.0.4c.31
569 17:08:44.424034 PCH-CRID Status = Disabled
570 17:08:44.427413 PCH-CRID Original Value = ff.ff.ff.ffff
571 17:08:44.430713 PCH-CRID New Value = ff.ff.ff.ffff
572 17:08:44.434049 OPROM - RST - RAID = ff.ff.ff.ffff
573 17:08:44.436939 PCH Hsio Version = 4.0.0.0
574 17:08:44.440852 Reference Code - SA - System Agent = a.0.4c.31
575 17:08:44.443919 Reference Code - MRC = 2.0.0.1
576 17:08:44.446844 SA - PCIe Version = a.0.4c.31
577 17:08:44.450335 SA-CRID Status = Disabled
578 17:08:44.453839 SA-CRID Original Value = 0.0.0.1
579 17:08:44.457010 SA-CRID New Value = 0.0.0.1
580 17:08:44.460370 OPROM - VBIOS = ff.ff.ff.ffff
581 17:08:44.463780 IO Manageability Engine FW Version = 11.1.4.0
582 17:08:44.467094 PHY Build Version = 0.0.0.e0
583 17:08:44.470795 Thunderbolt(TM) FW Version = 0.0.0.0
584 17:08:44.477080 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
585 17:08:44.480574 ITSS IRQ Polarities Before:
586 17:08:44.480995 IPC0: 0xffffffff
587 17:08:44.483752 IPC1: 0xffffffff
588 17:08:44.484231 IPC2: 0xffffffff
589 17:08:44.486832 IPC3: 0xffffffff
590 17:08:44.490036 ITSS IRQ Polarities After:
591 17:08:44.490623 IPC0: 0xffffffff
592 17:08:44.493696 IPC1: 0xffffffff
593 17:08:44.494121 IPC2: 0xffffffff
594 17:08:44.497185 IPC3: 0xffffffff
595 17:08:44.500435 Found PCIe Root Port #9 at PCI: 00:1d.0.
596 17:08:44.513791 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
597 17:08:44.523353 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
598 17:08:44.537117 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
599 17:08:44.543226 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
600 17:08:44.546552 Enumerating buses...
601 17:08:44.549720 Show all devs... Before device enumeration.
602 17:08:44.553463 Root Device: enabled 1
603 17:08:44.553887 DOMAIN: 0000: enabled 1
604 17:08:44.556591 CPU_CLUSTER: 0: enabled 1
605 17:08:44.559893 PCI: 00:00.0: enabled 1
606 17:08:44.563264 PCI: 00:02.0: enabled 1
607 17:08:44.563688 PCI: 00:04.0: enabled 1
608 17:08:44.566735 PCI: 00:05.0: enabled 1
609 17:08:44.570153 PCI: 00:06.0: enabled 0
610 17:08:44.570604 PCI: 00:07.0: enabled 0
611 17:08:44.573395 PCI: 00:07.1: enabled 0
612 17:08:44.576278 PCI: 00:07.2: enabled 0
613 17:08:44.579901 PCI: 00:07.3: enabled 0
614 17:08:44.580424 PCI: 00:08.0: enabled 1
615 17:08:44.583307 PCI: 00:09.0: enabled 0
616 17:08:44.586510 PCI: 00:0a.0: enabled 0
617 17:08:44.589893 PCI: 00:0d.0: enabled 1
618 17:08:44.590320 PCI: 00:0d.1: enabled 0
619 17:08:44.593145 PCI: 00:0d.2: enabled 0
620 17:08:44.596345 PCI: 00:0d.3: enabled 0
621 17:08:44.600002 PCI: 00:0e.0: enabled 0
622 17:08:44.600469 PCI: 00:10.2: enabled 1
623 17:08:44.603034 PCI: 00:10.6: enabled 0
624 17:08:44.606330 PCI: 00:10.7: enabled 0
625 17:08:44.609653 PCI: 00:12.0: enabled 0
626 17:08:44.610079 PCI: 00:12.6: enabled 0
627 17:08:44.613037 PCI: 00:13.0: enabled 0
628 17:08:44.616433 PCI: 00:14.0: enabled 1
629 17:08:44.616858 PCI: 00:14.1: enabled 0
630 17:08:44.619593 PCI: 00:14.2: enabled 1
631 17:08:44.623015 PCI: 00:14.3: enabled 1
632 17:08:44.626472 PCI: 00:15.0: enabled 1
633 17:08:44.626899 PCI: 00:15.1: enabled 1
634 17:08:44.629800 PCI: 00:15.2: enabled 1
635 17:08:44.633028 PCI: 00:15.3: enabled 1
636 17:08:44.636254 PCI: 00:16.0: enabled 1
637 17:08:44.636684 PCI: 00:16.1: enabled 0
638 17:08:44.639709 PCI: 00:16.2: enabled 0
639 17:08:44.643052 PCI: 00:16.3: enabled 0
640 17:08:44.646531 PCI: 00:16.4: enabled 0
641 17:08:44.646955 PCI: 00:16.5: enabled 0
642 17:08:44.649900 PCI: 00:17.0: enabled 1
643 17:08:44.653341 PCI: 00:19.0: enabled 0
644 17:08:44.653764 PCI: 00:19.1: enabled 1
645 17:08:44.656749 PCI: 00:19.2: enabled 0
646 17:08:44.659880 PCI: 00:1c.0: enabled 1
647 17:08:44.662840 PCI: 00:1c.1: enabled 0
648 17:08:44.663264 PCI: 00:1c.2: enabled 0
649 17:08:44.666256 PCI: 00:1c.3: enabled 0
650 17:08:44.669617 PCI: 00:1c.4: enabled 0
651 17:08:44.673013 PCI: 00:1c.5: enabled 0
652 17:08:44.673453 PCI: 00:1c.6: enabled 1
653 17:08:44.676492 PCI: 00:1c.7: enabled 0
654 17:08:44.679761 PCI: 00:1d.0: enabled 1
655 17:08:44.682857 PCI: 00:1d.1: enabled 0
656 17:08:44.683294 PCI: 00:1d.2: enabled 1
657 17:08:44.686324 PCI: 00:1d.3: enabled 0
658 17:08:44.689653 PCI: 00:1e.0: enabled 1
659 17:08:44.690112 PCI: 00:1e.1: enabled 0
660 17:08:44.692926 PCI: 00:1e.2: enabled 1
661 17:08:44.696361 PCI: 00:1e.3: enabled 1
662 17:08:44.699554 PCI: 00:1f.0: enabled 1
663 17:08:44.699994 PCI: 00:1f.1: enabled 0
664 17:08:44.702939 PCI: 00:1f.2: enabled 1
665 17:08:44.706445 PCI: 00:1f.3: enabled 1
666 17:08:44.709451 PCI: 00:1f.4: enabled 0
667 17:08:44.709891 PCI: 00:1f.5: enabled 1
668 17:08:44.712604 PCI: 00:1f.6: enabled 0
669 17:08:44.715941 PCI: 00:1f.7: enabled 0
670 17:08:44.716463 APIC: 00: enabled 1
671 17:08:44.719273 GENERIC: 0.0: enabled 1
672 17:08:44.722793 GENERIC: 0.0: enabled 1
673 17:08:44.726332 GENERIC: 1.0: enabled 1
674 17:08:44.726864 GENERIC: 0.0: enabled 1
675 17:08:44.729464 GENERIC: 1.0: enabled 1
676 17:08:44.732627 USB0 port 0: enabled 1
677 17:08:44.736081 GENERIC: 0.0: enabled 1
678 17:08:44.736652 USB0 port 0: enabled 1
679 17:08:44.739452 GENERIC: 0.0: enabled 1
680 17:08:44.742772 I2C: 00:1a: enabled 1
681 17:08:44.743299 I2C: 00:31: enabled 1
682 17:08:44.746122 I2C: 00:32: enabled 1
683 17:08:44.749478 I2C: 00:10: enabled 1
684 17:08:44.750089 I2C: 00:15: enabled 1
685 17:08:44.753019 GENERIC: 0.0: enabled 0
686 17:08:44.755896 GENERIC: 1.0: enabled 0
687 17:08:44.759186 GENERIC: 0.0: enabled 1
688 17:08:44.759598 SPI: 00: enabled 1
689 17:08:44.762527 SPI: 00: enabled 1
690 17:08:44.763077 PNP: 0c09.0: enabled 1
691 17:08:44.765761 GENERIC: 0.0: enabled 1
692 17:08:44.769155 USB3 port 0: enabled 1
693 17:08:44.772375 USB3 port 1: enabled 1
694 17:08:44.772930 USB3 port 2: enabled 0
695 17:08:44.775808 USB3 port 3: enabled 0
696 17:08:44.779125 USB2 port 0: enabled 0
697 17:08:44.779738 USB2 port 1: enabled 1
698 17:08:44.782485 USB2 port 2: enabled 1
699 17:08:44.786064 USB2 port 3: enabled 0
700 17:08:44.788977 USB2 port 4: enabled 1
701 17:08:44.789413 USB2 port 5: enabled 0
702 17:08:44.792940 USB2 port 6: enabled 0
703 17:08:44.795745 USB2 port 7: enabled 0
704 17:08:44.796261 USB2 port 8: enabled 0
705 17:08:44.799147 USB2 port 9: enabled 0
706 17:08:44.802356 USB3 port 0: enabled 0
707 17:08:44.805574 USB3 port 1: enabled 1
708 17:08:44.805998 USB3 port 2: enabled 0
709 17:08:44.808887 USB3 port 3: enabled 0
710 17:08:44.812277 GENERIC: 0.0: enabled 1
711 17:08:44.812697 GENERIC: 1.0: enabled 1
712 17:08:44.815601 APIC: 01: enabled 1
713 17:08:44.819011 APIC: 03: enabled 1
714 17:08:44.819500 APIC: 05: enabled 1
715 17:08:44.822448 APIC: 07: enabled 1
716 17:08:44.822887 APIC: 06: enabled 1
717 17:08:44.825907 APIC: 02: enabled 1
718 17:08:44.829382 APIC: 04: enabled 1
719 17:08:44.829829 Compare with tree...
720 17:08:44.832309 Root Device: enabled 1
721 17:08:44.835638 DOMAIN: 0000: enabled 1
722 17:08:44.838978 PCI: 00:00.0: enabled 1
723 17:08:44.839566 PCI: 00:02.0: enabled 1
724 17:08:44.842248 PCI: 00:04.0: enabled 1
725 17:08:44.845883 GENERIC: 0.0: enabled 1
726 17:08:44.849188 PCI: 00:05.0: enabled 1
727 17:08:44.852560 PCI: 00:06.0: enabled 0
728 17:08:44.853171 PCI: 00:07.0: enabled 0
729 17:08:44.855562 GENERIC: 0.0: enabled 1
730 17:08:44.858731 PCI: 00:07.1: enabled 0
731 17:08:44.862657 GENERIC: 1.0: enabled 1
732 17:08:44.865508 PCI: 00:07.2: enabled 0
733 17:08:44.866157 GENERIC: 0.0: enabled 1
734 17:08:44.868825 PCI: 00:07.3: enabled 0
735 17:08:44.872210 GENERIC: 1.0: enabled 1
736 17:08:44.875577 PCI: 00:08.0: enabled 1
737 17:08:44.878726 PCI: 00:09.0: enabled 0
738 17:08:44.879105 PCI: 00:0a.0: enabled 0
739 17:08:44.881909 PCI: 00:0d.0: enabled 1
740 17:08:44.885684 USB0 port 0: enabled 1
741 17:08:44.889006 USB3 port 0: enabled 1
742 17:08:44.892273 USB3 port 1: enabled 1
743 17:08:44.895596 USB3 port 2: enabled 0
744 17:08:44.895999 USB3 port 3: enabled 0
745 17:08:44.898930 PCI: 00:0d.1: enabled 0
746 17:08:44.902283 PCI: 00:0d.2: enabled 0
747 17:08:44.905590 GENERIC: 0.0: enabled 1
748 17:08:44.908685 PCI: 00:0d.3: enabled 0
749 17:08:44.909036 PCI: 00:0e.0: enabled 0
750 17:08:44.912168 PCI: 00:10.2: enabled 1
751 17:08:44.915524 PCI: 00:10.6: enabled 0
752 17:08:44.918882 PCI: 00:10.7: enabled 0
753 17:08:44.922535 PCI: 00:12.0: enabled 0
754 17:08:44.922832 PCI: 00:12.6: enabled 0
755 17:08:44.925212 PCI: 00:13.0: enabled 0
756 17:08:44.928560 PCI: 00:14.0: enabled 1
757 17:08:44.932037 USB0 port 0: enabled 1
758 17:08:44.935452 USB2 port 0: enabled 0
759 17:08:44.935904 USB2 port 1: enabled 1
760 17:08:44.938636 USB2 port 2: enabled 1
761 17:08:44.941865 USB2 port 3: enabled 0
762 17:08:44.945401 USB2 port 4: enabled 1
763 17:08:44.948620 USB2 port 5: enabled 0
764 17:08:44.948940 USB2 port 6: enabled 0
765 17:08:44.951846 USB2 port 7: enabled 0
766 17:08:44.955029 USB2 port 8: enabled 0
767 17:08:44.958779 USB2 port 9: enabled 0
768 17:08:44.961961 USB3 port 0: enabled 0
769 17:08:44.965480 USB3 port 1: enabled 1
770 17:08:44.965837 USB3 port 2: enabled 0
771 17:08:44.968407 USB3 port 3: enabled 0
772 17:08:44.971896 PCI: 00:14.1: enabled 0
773 17:08:44.975141 PCI: 00:14.2: enabled 1
774 17:08:44.978539 PCI: 00:14.3: enabled 1
775 17:08:44.978842 GENERIC: 0.0: enabled 1
776 17:08:44.982027 PCI: 00:15.0: enabled 1
777 17:08:44.985564 I2C: 00:1a: enabled 1
778 17:08:44.988787 I2C: 00:31: enabled 1
779 17:08:44.991990 I2C: 00:32: enabled 1
780 17:08:44.992470 PCI: 00:15.1: enabled 1
781 17:08:44.995155 I2C: 00:10: enabled 1
782 17:08:44.998456 PCI: 00:15.2: enabled 1
783 17:08:45.001792 PCI: 00:15.3: enabled 1
784 17:08:45.002213 PCI: 00:16.0: enabled 1
785 17:08:45.005131 PCI: 00:16.1: enabled 0
786 17:08:45.008599 PCI: 00:16.2: enabled 0
787 17:08:45.012145 PCI: 00:16.3: enabled 0
788 17:08:45.015230 PCI: 00:16.4: enabled 0
789 17:08:45.015653 PCI: 00:16.5: enabled 0
790 17:08:45.018630 PCI: 00:17.0: enabled 1
791 17:08:45.022003 PCI: 00:19.0: enabled 0
792 17:08:45.025477 PCI: 00:19.1: enabled 1
793 17:08:45.029284 I2C: 00:15: enabled 1
794 17:08:45.029730 PCI: 00:19.2: enabled 0
795 17:08:45.032686 PCI: 00:1d.0: enabled 1
796 17:08:45.036639 GENERIC: 0.0: enabled 1
797 17:08:45.037101 PCI: 00:1e.0: enabled 1
798 17:08:45.039967 PCI: 00:1e.1: enabled 0
799 17:08:45.043345 PCI: 00:1e.2: enabled 1
800 17:08:45.046725 SPI: 00: enabled 1
801 17:08:45.047164 PCI: 00:1e.3: enabled 1
802 17:08:45.049721 SPI: 00: enabled 1
803 17:08:45.099976 PCI: 00:1f.0: enabled 1
804 17:08:45.100553 PNP: 0c09.0: enabled 1
805 17:08:45.101376 PCI: 00:1f.1: enabled 0
806 17:08:45.101747 PCI: 00:1f.2: enabled 1
807 17:08:45.102069 GENERIC: 0.0: enabled 1
808 17:08:45.102373 GENERIC: 0.0: enabled 1
809 17:08:45.102670 GENERIC: 1.0: enabled 1
810 17:08:45.102963 PCI: 00:1f.3: enabled 1
811 17:08:45.103252 PCI: 00:1f.4: enabled 0
812 17:08:45.103535 PCI: 00:1f.5: enabled 1
813 17:08:45.103819 PCI: 00:1f.6: enabled 0
814 17:08:45.104148 PCI: 00:1f.7: enabled 0
815 17:08:45.104442 CPU_CLUSTER: 0: enabled 1
816 17:08:45.104721 APIC: 00: enabled 1
817 17:08:45.105001 APIC: 01: enabled 1
818 17:08:45.105279 APIC: 03: enabled 1
819 17:08:45.105556 APIC: 05: enabled 1
820 17:08:45.105830 APIC: 07: enabled 1
821 17:08:45.106104 APIC: 06: enabled 1
822 17:08:45.106377 APIC: 02: enabled 1
823 17:08:45.133951 APIC: 04: enabled 1
824 17:08:45.134382 Root Device scanning...
825 17:08:45.135134 scan_static_bus for Root Device
826 17:08:45.135486 DOMAIN: 0000 enabled
827 17:08:45.135804 CPU_CLUSTER: 0 enabled
828 17:08:45.136154 DOMAIN: 0000 scanning...
829 17:08:45.136465 PCI: pci_scan_bus for bus 00
830 17:08:45.136780 PCI: 00:00.0 [8086/0000] ops
831 17:08:45.137191 PCI: 00:00.0 [8086/9a12] enabled
832 17:08:45.137598 PCI: 00:02.0 [8086/0000] bus ops
833 17:08:45.137997 PCI: 00:02.0 [8086/9a40] enabled
834 17:08:45.138560 PCI: 00:04.0 [8086/0000] bus ops
835 17:08:45.141501 PCI: 00:04.0 [8086/9a03] enabled
836 17:08:45.144865 PCI: 00:05.0 [8086/9a19] enabled
837 17:08:45.148299 PCI: 00:07.0 [0000/0000] hidden
838 17:08:45.151430 PCI: 00:08.0 [8086/9a11] enabled
839 17:08:45.154953 PCI: 00:0a.0 [8086/9a0d] disabled
840 17:08:45.158356 PCI: 00:0d.0 [8086/0000] bus ops
841 17:08:45.161819 PCI: 00:0d.0 [8086/9a13] enabled
842 17:08:45.165067 PCI: 00:14.0 [8086/0000] bus ops
843 17:08:45.168349 PCI: 00:14.0 [8086/a0ed] enabled
844 17:08:45.171678 PCI: 00:14.2 [8086/a0ef] enabled
845 17:08:45.174927 PCI: 00:14.3 [8086/0000] bus ops
846 17:08:45.178265 PCI: 00:14.3 [8086/a0f0] enabled
847 17:08:45.181514 PCI: 00:15.0 [8086/0000] bus ops
848 17:08:45.184910 PCI: 00:15.0 [8086/a0e8] enabled
849 17:08:45.188096 PCI: 00:15.1 [8086/0000] bus ops
850 17:08:45.191462 PCI: 00:15.1 [8086/a0e9] enabled
851 17:08:45.194905 PCI: 00:15.2 [8086/0000] bus ops
852 17:08:45.197843 PCI: 00:15.2 [8086/a0ea] enabled
853 17:08:45.201726 PCI: 00:15.3 [8086/0000] bus ops
854 17:08:45.204674 PCI: 00:15.3 [8086/a0eb] enabled
855 17:08:45.207974 PCI: 00:16.0 [8086/0000] ops
856 17:08:45.211709 PCI: 00:16.0 [8086/a0e0] enabled
857 17:08:45.214513 PCI: Static device PCI: 00:17.0 not found, disabling it.
858 17:08:45.218361 PCI: 00:19.0 [8086/0000] bus ops
859 17:08:45.221479 PCI: 00:19.0 [8086/a0c5] disabled
860 17:08:45.224761 PCI: 00:19.1 [8086/0000] bus ops
861 17:08:45.228069 PCI: 00:19.1 [8086/a0c6] enabled
862 17:08:45.231191 PCI: 00:1d.0 [8086/0000] bus ops
863 17:08:45.234865 PCI: 00:1d.0 [8086/a0b0] enabled
864 17:08:45.238233 PCI: 00:1e.0 [8086/0000] ops
865 17:08:45.241750 PCI: 00:1e.0 [8086/a0a8] enabled
866 17:08:45.244734 PCI: 00:1e.2 [8086/0000] bus ops
867 17:08:45.248172 PCI: 00:1e.2 [8086/a0aa] enabled
868 17:08:45.251074 PCI: 00:1e.3 [8086/0000] bus ops
869 17:08:45.254429 PCI: 00:1e.3 [8086/a0ab] enabled
870 17:08:45.257800 PCI: 00:1f.0 [8086/0000] bus ops
871 17:08:45.261048 PCI: 00:1f.0 [8086/a087] enabled
872 17:08:45.264486 RTC Init
873 17:08:45.267789 Set power on after power failure.
874 17:08:45.268286 Disabling Deep S3
875 17:08:45.271210 Disabling Deep S3
876 17:08:45.271627 Disabling Deep S4
877 17:08:45.274571 Disabling Deep S4
878 17:08:45.274986 Disabling Deep S5
879 17:08:45.278016 Disabling Deep S5
880 17:08:45.280771 PCI: 00:1f.2 [0000/0000] hidden
881 17:08:45.284182 PCI: 00:1f.3 [8086/0000] bus ops
882 17:08:45.287835 PCI: 00:1f.3 [8086/a0c8] enabled
883 17:08:45.290859 PCI: 00:1f.5 [8086/0000] bus ops
884 17:08:45.294295 PCI: 00:1f.5 [8086/a0a4] enabled
885 17:08:45.297751 PCI: Leftover static devices:
886 17:08:45.298171 PCI: 00:10.2
887 17:08:45.301372 PCI: 00:10.6
888 17:08:45.301868 PCI: 00:10.7
889 17:08:45.304527 PCI: 00:06.0
890 17:08:45.304947 PCI: 00:07.1
891 17:08:45.305276 PCI: 00:07.2
892 17:08:45.307588 PCI: 00:07.3
893 17:08:45.308006 PCI: 00:09.0
894 17:08:45.310898 PCI: 00:0d.1
895 17:08:45.311316 PCI: 00:0d.2
896 17:08:45.314179 PCI: 00:0d.3
897 17:08:45.314598 PCI: 00:0e.0
898 17:08:45.314931 PCI: 00:12.0
899 17:08:45.317668 PCI: 00:12.6
900 17:08:45.318088 PCI: 00:13.0
901 17:08:45.321038 PCI: 00:14.1
902 17:08:45.321458 PCI: 00:16.1
903 17:08:45.321792 PCI: 00:16.2
904 17:08:45.324427 PCI: 00:16.3
905 17:08:45.324847 PCI: 00:16.4
906 17:08:45.327585 PCI: 00:16.5
907 17:08:45.328004 PCI: 00:17.0
908 17:08:45.328390 PCI: 00:19.2
909 17:08:45.330925 PCI: 00:1e.1
910 17:08:45.331345 PCI: 00:1f.1
911 17:08:45.334286 PCI: 00:1f.4
912 17:08:45.334710 PCI: 00:1f.6
913 17:08:45.337702 PCI: 00:1f.7
914 17:08:45.338120 PCI: Check your devicetree.cb.
915 17:08:45.340904 PCI: 00:02.0 scanning...
916 17:08:45.344313 scan_generic_bus for PCI: 00:02.0
917 17:08:45.351015 scan_generic_bus for PCI: 00:02.0 done
918 17:08:45.353737 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
919 17:08:45.357244 PCI: 00:04.0 scanning...
920 17:08:45.360529 scan_generic_bus for PCI: 00:04.0
921 17:08:45.360978 GENERIC: 0.0 enabled
922 17:08:45.367098 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
923 17:08:45.374031 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
924 17:08:45.376464 PCI: 00:0d.0 scanning...
925 17:08:45.379850 scan_static_bus for PCI: 00:0d.0
926 17:08:45.379931 USB0 port 0 enabled
927 17:08:45.383398 USB0 port 0 scanning...
928 17:08:45.386830 scan_static_bus for USB0 port 0
929 17:08:45.390214 USB3 port 0 enabled
930 17:08:45.390295 USB3 port 1 enabled
931 17:08:45.393530 USB3 port 2 disabled
932 17:08:45.396702 USB3 port 3 disabled
933 17:08:45.396786 USB3 port 0 scanning...
934 17:08:45.400041 scan_static_bus for USB3 port 0
935 17:08:45.403269 scan_static_bus for USB3 port 0 done
936 17:08:45.409897 scan_bus: bus USB3 port 0 finished in 6 msecs
937 17:08:45.413046 USB3 port 1 scanning...
938 17:08:45.416581 scan_static_bus for USB3 port 1
939 17:08:45.419636 scan_static_bus for USB3 port 1 done
940 17:08:45.423326 scan_bus: bus USB3 port 1 finished in 6 msecs
941 17:08:45.426381 scan_static_bus for USB0 port 0 done
942 17:08:45.433226 scan_bus: bus USB0 port 0 finished in 43 msecs
943 17:08:45.436662 scan_static_bus for PCI: 00:0d.0 done
944 17:08:45.439602 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
945 17:08:45.442888 PCI: 00:14.0 scanning...
946 17:08:45.446375 scan_static_bus for PCI: 00:14.0
947 17:08:45.449654 USB0 port 0 enabled
948 17:08:45.449736 USB0 port 0 scanning...
949 17:08:45.453027 scan_static_bus for USB0 port 0
950 17:08:45.456418 USB2 port 0 disabled
951 17:08:45.459664 USB2 port 1 enabled
952 17:08:45.459745 USB2 port 2 enabled
953 17:08:45.464967 USB2 port 3 disabled
954 17:08:45.466469 USB2 port 4 enabled
955 17:08:45.466577 USB2 port 5 disabled
956 17:08:45.469612 USB2 port 6 disabled
957 17:08:45.472771 USB2 port 7 disabled
958 17:08:45.472889 USB2 port 8 disabled
959 17:08:45.476326 USB2 port 9 disabled
960 17:08:45.476408 USB3 port 0 disabled
961 17:08:45.479662 USB3 port 1 enabled
962 17:08:45.483057 USB3 port 2 disabled
963 17:08:45.483139 USB3 port 3 disabled
964 17:08:45.486476 USB2 port 1 scanning...
965 17:08:45.489802 scan_static_bus for USB2 port 1
966 17:08:45.493223 scan_static_bus for USB2 port 1 done
967 17:08:45.499291 scan_bus: bus USB2 port 1 finished in 6 msecs
968 17:08:45.499374 USB2 port 2 scanning...
969 17:08:45.503034 scan_static_bus for USB2 port 2
970 17:08:45.510014 scan_static_bus for USB2 port 2 done
971 17:08:45.512718 scan_bus: bus USB2 port 2 finished in 6 msecs
972 17:08:45.516021 USB2 port 4 scanning...
973 17:08:45.519360 scan_static_bus for USB2 port 4
974 17:08:45.522871 scan_static_bus for USB2 port 4 done
975 17:08:45.526004 scan_bus: bus USB2 port 4 finished in 6 msecs
976 17:08:45.529654 USB3 port 1 scanning...
977 17:08:45.532851 scan_static_bus for USB3 port 1
978 17:08:45.536527 scan_static_bus for USB3 port 1 done
979 17:08:45.542919 scan_bus: bus USB3 port 1 finished in 6 msecs
980 17:08:45.546374 scan_static_bus for USB0 port 0 done
981 17:08:45.549714 scan_bus: bus USB0 port 0 finished in 93 msecs
982 17:08:45.552753 scan_static_bus for PCI: 00:14.0 done
983 17:08:45.559446 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
984 17:08:45.559902 PCI: 00:14.3 scanning...
985 17:08:45.563259 scan_static_bus for PCI: 00:14.3
986 17:08:45.566211 GENERIC: 0.0 enabled
987 17:08:45.569593 scan_static_bus for PCI: 00:14.3 done
988 17:08:45.576100 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
989 17:08:45.576533 PCI: 00:15.0 scanning...
990 17:08:45.579925 scan_static_bus for PCI: 00:15.0
991 17:08:45.583235 I2C: 00:1a enabled
992 17:08:45.586671 I2C: 00:31 enabled
993 17:08:45.587238 I2C: 00:32 enabled
994 17:08:45.589941 scan_static_bus for PCI: 00:15.0 done
995 17:08:45.596662 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
996 17:08:45.599736 PCI: 00:15.1 scanning...
997 17:08:45.602810 scan_static_bus for PCI: 00:15.1
998 17:08:45.603230 I2C: 00:10 enabled
999 17:08:45.606026 scan_static_bus for PCI: 00:15.1 done
1000 17:08:45.613718 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1001 17:08:45.614143 PCI: 00:15.2 scanning...
1002 17:08:45.616997 scan_static_bus for PCI: 00:15.2
1003 17:08:45.623820 scan_static_bus for PCI: 00:15.2 done
1004 17:08:45.626571 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1005 17:08:45.630323 PCI: 00:15.3 scanning...
1006 17:08:45.633511 scan_static_bus for PCI: 00:15.3
1007 17:08:45.636962 scan_static_bus for PCI: 00:15.3 done
1008 17:08:45.640126 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1009 17:08:45.643327 PCI: 00:19.1 scanning...
1010 17:08:45.646700 scan_static_bus for PCI: 00:19.1
1011 17:08:45.650144 I2C: 00:15 enabled
1012 17:08:45.653431 scan_static_bus for PCI: 00:19.1 done
1013 17:08:45.656605 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1014 17:08:45.660022 PCI: 00:1d.0 scanning...
1015 17:08:45.663574 do_pci_scan_bridge for PCI: 00:1d.0
1016 17:08:45.666354 PCI: pci_scan_bus for bus 01
1017 17:08:45.669668 PCI: 01:00.0 [1c5c/174a] enabled
1018 17:08:45.673388 GENERIC: 0.0 enabled
1019 17:08:45.676623 Enabling Common Clock Configuration
1020 17:08:45.679868 L1 Sub-State supported from root port 29
1021 17:08:45.683084 L1 Sub-State Support = 0xf
1022 17:08:45.686566 CommonModeRestoreTime = 0x28
1023 17:08:45.689873 Power On Value = 0x16, Power On Scale = 0x0
1024 17:08:45.693381 ASPM: Enabled L1
1025 17:08:45.696690 PCIe: Max_Payload_Size adjusted to 128
1026 17:08:45.703326 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1027 17:08:45.703743 PCI: 00:1e.2 scanning...
1028 17:08:45.706177 scan_generic_bus for PCI: 00:1e.2
1029 17:08:45.709469 SPI: 00 enabled
1030 17:08:45.716401 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1031 17:08:45.719416 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1032 17:08:45.722803 PCI: 00:1e.3 scanning...
1033 17:08:45.726112 scan_generic_bus for PCI: 00:1e.3
1034 17:08:45.729493 SPI: 00 enabled
1035 17:08:45.732927 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1036 17:08:45.739643 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1037 17:08:45.742630 PCI: 00:1f.0 scanning...
1038 17:08:45.746163 scan_static_bus for PCI: 00:1f.0
1039 17:08:45.746719 PNP: 0c09.0 enabled
1040 17:08:45.749580 PNP: 0c09.0 scanning...
1041 17:08:45.752687 scan_static_bus for PNP: 0c09.0
1042 17:08:45.755975 scan_static_bus for PNP: 0c09.0 done
1043 17:08:45.762728 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1044 17:08:45.765756 scan_static_bus for PCI: 00:1f.0 done
1045 17:08:45.769350 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1046 17:08:45.772539 PCI: 00:1f.2 scanning...
1047 17:08:45.775719 scan_static_bus for PCI: 00:1f.2
1048 17:08:45.779213 GENERIC: 0.0 enabled
1049 17:08:45.779669 GENERIC: 0.0 scanning...
1050 17:08:45.782530 scan_static_bus for GENERIC: 0.0
1051 17:08:45.785914 GENERIC: 0.0 enabled
1052 17:08:45.789528 GENERIC: 1.0 enabled
1053 17:08:45.792648 scan_static_bus for GENERIC: 0.0 done
1054 17:08:45.795970 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1055 17:08:45.802655 scan_static_bus for PCI: 00:1f.2 done
1056 17:08:45.805939 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1057 17:08:45.809408 PCI: 00:1f.3 scanning...
1058 17:08:45.812566 scan_static_bus for PCI: 00:1f.3
1059 17:08:45.815702 scan_static_bus for PCI: 00:1f.3 done
1060 17:08:45.819191 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1061 17:08:45.822714 PCI: 00:1f.5 scanning...
1062 17:08:45.825857 scan_generic_bus for PCI: 00:1f.5
1063 17:08:45.829191 scan_generic_bus for PCI: 00:1f.5 done
1064 17:08:45.835927 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1065 17:08:45.838755 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1066 17:08:45.842350 scan_static_bus for Root Device done
1067 17:08:45.849331 scan_bus: bus Root Device finished in 736 msecs
1068 17:08:45.849775 done
1069 17:08:45.855669 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1070 17:08:45.858899 Chrome EC: UHEPI supported
1071 17:08:45.865514 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1072 17:08:45.872156 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1073 17:08:45.875552 SPI flash protection: WPSW=0 SRP0=0
1074 17:08:45.882325 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1075 17:08:45.885586 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1076 17:08:45.889089 found VGA at PCI: 00:02.0
1077 17:08:45.892016 Setting up VGA for PCI: 00:02.0
1078 17:08:45.898911 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1079 17:08:45.901924 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1080 17:08:45.905265 Allocating resources...
1081 17:08:45.908719 Reading resources...
1082 17:08:45.911994 Root Device read_resources bus 0 link: 0
1083 17:08:45.915368 DOMAIN: 0000 read_resources bus 0 link: 0
1084 17:08:45.922437 PCI: 00:04.0 read_resources bus 1 link: 0
1085 17:08:45.925582 PCI: 00:04.0 read_resources bus 1 link: 0 done
1086 17:08:45.931864 PCI: 00:0d.0 read_resources bus 0 link: 0
1087 17:08:45.935187 USB0 port 0 read_resources bus 0 link: 0
1088 17:08:45.941885 USB0 port 0 read_resources bus 0 link: 0 done
1089 17:08:45.945217 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1090 17:08:45.948707 PCI: 00:14.0 read_resources bus 0 link: 0
1091 17:08:45.955187 USB0 port 0 read_resources bus 0 link: 0
1092 17:08:45.958353 USB0 port 0 read_resources bus 0 link: 0 done
1093 17:08:45.965458 PCI: 00:14.0 read_resources bus 0 link: 0 done
1094 17:08:45.968614 PCI: 00:14.3 read_resources bus 0 link: 0
1095 17:08:45.975515 PCI: 00:14.3 read_resources bus 0 link: 0 done
1096 17:08:45.978458 PCI: 00:15.0 read_resources bus 0 link: 0
1097 17:08:45.985423 PCI: 00:15.0 read_resources bus 0 link: 0 done
1098 17:08:45.988736 PCI: 00:15.1 read_resources bus 0 link: 0
1099 17:08:45.995589 PCI: 00:15.1 read_resources bus 0 link: 0 done
1100 17:08:45.998804 PCI: 00:19.1 read_resources bus 0 link: 0
1101 17:08:46.006123 PCI: 00:19.1 read_resources bus 0 link: 0 done
1102 17:08:46.009133 PCI: 00:1d.0 read_resources bus 1 link: 0
1103 17:08:46.015732 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1104 17:08:46.019145 PCI: 00:1e.2 read_resources bus 2 link: 0
1105 17:08:46.025722 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1106 17:08:46.029425 PCI: 00:1e.3 read_resources bus 3 link: 0
1107 17:08:46.035527 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1108 17:08:46.038854 PCI: 00:1f.0 read_resources bus 0 link: 0
1109 17:08:46.045786 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1110 17:08:46.049215 PCI: 00:1f.2 read_resources bus 0 link: 0
1111 17:08:46.051932 GENERIC: 0.0 read_resources bus 0 link: 0
1112 17:08:46.059632 GENERIC: 0.0 read_resources bus 0 link: 0 done
1113 17:08:46.062508 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1114 17:08:46.069800 DOMAIN: 0000 read_resources bus 0 link: 0 done
1115 17:08:46.073091 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1116 17:08:46.079768 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1117 17:08:46.083134 Root Device read_resources bus 0 link: 0 done
1118 17:08:46.086910 Done reading resources.
1119 17:08:46.093134 Show resources in subtree (Root Device)...After reading.
1120 17:08:46.096479 Root Device child on link 0 DOMAIN: 0000
1121 17:08:46.100156 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1122 17:08:46.109986 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1123 17:08:46.119647 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1124 17:08:46.123044 PCI: 00:00.0
1125 17:08:46.132941 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1126 17:08:46.139664 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1127 17:08:46.149726 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1128 17:08:46.159666 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1129 17:08:46.169498 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1130 17:08:46.179487 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1131 17:08:46.186355 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1132 17:08:46.195978 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1133 17:08:46.206164 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1134 17:08:46.215917 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1135 17:08:46.226066 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1136 17:08:46.235817 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1137 17:08:46.242572 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1138 17:08:46.252534 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1139 17:08:46.262707 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1140 17:08:46.272163 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1141 17:08:46.282051 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1142 17:08:46.292512 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1143 17:08:46.298989 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1144 17:08:46.308599 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1145 17:08:46.312143 PCI: 00:02.0
1146 17:08:46.322211 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 17:08:46.331868 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 17:08:46.341691 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 17:08:46.344990 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1150 17:08:46.355257 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1151 17:08:46.358707 GENERIC: 0.0
1152 17:08:46.359144 PCI: 00:05.0
1153 17:08:46.368256 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 17:08:46.374983 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1155 17:08:46.375395 GENERIC: 0.0
1156 17:08:46.378449 PCI: 00:08.0
1157 17:08:46.388366 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1158 17:08:46.388782 PCI: 00:0a.0
1159 17:08:46.391899 PCI: 00:0d.0 child on link 0 USB0 port 0
1160 17:08:46.401914 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1161 17:08:46.408467 USB0 port 0 child on link 0 USB3 port 0
1162 17:08:46.408951 USB3 port 0
1163 17:08:46.411773 USB3 port 1
1164 17:08:46.412364 USB3 port 2
1165 17:08:46.415313 USB3 port 3
1166 17:08:46.418663 PCI: 00:14.0 child on link 0 USB0 port 0
1167 17:08:46.428205 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 17:08:46.434916 USB0 port 0 child on link 0 USB2 port 0
1169 17:08:46.435330 USB2 port 0
1170 17:08:46.438191 USB2 port 1
1171 17:08:46.438673 USB2 port 2
1172 17:08:46.441712 USB2 port 3
1173 17:08:46.442139 USB2 port 4
1174 17:08:46.444780 USB2 port 5
1175 17:08:46.445247 USB2 port 6
1176 17:08:46.448591 USB2 port 7
1177 17:08:46.449000 USB2 port 8
1178 17:08:46.451390 USB2 port 9
1179 17:08:46.451852 USB3 port 0
1180 17:08:46.454856 USB3 port 1
1181 17:08:46.455265 USB3 port 2
1182 17:08:46.458244 USB3 port 3
1183 17:08:46.458654 PCI: 00:14.2
1184 17:08:46.468212 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1185 17:08:46.478199 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1186 17:08:46.484892 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1187 17:08:46.494657 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1188 17:08:46.495088 GENERIC: 0.0
1189 17:08:46.500717 PCI: 00:15.0 child on link 0 I2C: 00:1a
1190 17:08:46.510720 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 17:08:46.510804 I2C: 00:1a
1192 17:08:46.514508 I2C: 00:31
1193 17:08:46.514589 I2C: 00:32
1194 17:08:46.517319 PCI: 00:15.1 child on link 0 I2C: 00:10
1195 17:08:46.527538 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 17:08:46.530967 I2C: 00:10
1197 17:08:46.531053 PCI: 00:15.2
1198 17:08:46.540948 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 17:08:46.544088 PCI: 00:15.3
1200 17:08:46.554393 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 17:08:46.554528 PCI: 00:16.0
1202 17:08:46.564139 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 17:08:46.567568 PCI: 00:19.0
1204 17:08:46.570899 PCI: 00:19.1 child on link 0 I2C: 00:15
1205 17:08:46.581212 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 17:08:46.584665 I2C: 00:15
1207 17:08:46.587488 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1208 17:08:46.597604 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1209 17:08:46.607651 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1210 17:08:46.614514 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1211 17:08:46.617530 GENERIC: 0.0
1212 17:08:46.617943 PCI: 01:00.0
1213 17:08:46.627733 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 17:08:46.637386 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1215 17:08:46.647295 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1216 17:08:46.647778 PCI: 00:1e.0
1217 17:08:46.660509 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1218 17:08:46.664132 PCI: 00:1e.2 child on link 0 SPI: 00
1219 17:08:46.673861 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1220 17:08:46.674342 SPI: 00
1221 17:08:46.680839 PCI: 00:1e.3 child on link 0 SPI: 00
1222 17:08:46.690333 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1223 17:08:46.690834 SPI: 00
1224 17:08:46.693549 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1225 17:08:46.703933 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1226 17:08:46.704500 PNP: 0c09.0
1227 17:08:46.713928 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1228 17:08:46.717305 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1229 17:08:46.727322 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1230 17:08:46.736928 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1231 17:08:46.740319 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1232 17:08:46.743643 GENERIC: 0.0
1233 17:08:46.746996 GENERIC: 1.0
1234 17:08:46.747627 PCI: 00:1f.3
1235 17:08:46.756534 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1236 17:08:46.766203 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1237 17:08:46.769658 PCI: 00:1f.5
1238 17:08:46.776393 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1239 17:08:46.783019 CPU_CLUSTER: 0 child on link 0 APIC: 00
1240 17:08:46.783095 APIC: 00
1241 17:08:46.783158 APIC: 01
1242 17:08:46.786475 APIC: 03
1243 17:08:46.786547 APIC: 05
1244 17:08:46.789863 APIC: 07
1245 17:08:46.789937 APIC: 06
1246 17:08:46.789997 APIC: 02
1247 17:08:46.792917 APIC: 04
1248 17:08:46.799618 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1249 17:08:46.806527 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1250 17:08:46.812679 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1251 17:08:46.816071 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1252 17:08:46.822839 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1253 17:08:46.826496 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1254 17:08:46.830041 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1255 17:08:46.836513 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1256 17:08:46.846461 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1257 17:08:46.852876 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1258 17:08:46.859355 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1259 17:08:46.865811 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1260 17:08:46.872378 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1261 17:08:46.882461 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1262 17:08:46.889207 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1263 17:08:46.892668 DOMAIN: 0000: Resource ranges:
1264 17:08:46.895935 * Base: 1000, Size: 800, Tag: 100
1265 17:08:46.899062 * Base: 1900, Size: e700, Tag: 100
1266 17:08:46.905950 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1267 17:08:46.912604 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1268 17:08:46.918752 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1269 17:08:46.925412 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1270 17:08:46.932061 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1271 17:08:46.942153 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1272 17:08:46.949218 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1273 17:08:46.955297 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1274 17:08:46.965725 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1275 17:08:46.972160 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1276 17:08:46.978909 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1277 17:08:46.988701 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1278 17:08:46.995500 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1279 17:08:47.002141 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1280 17:08:47.008527 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1281 17:08:47.018690 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1282 17:08:47.025263 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1283 17:08:47.032000 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1284 17:08:47.042008 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1285 17:08:47.048730 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1286 17:08:47.055288 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1287 17:08:47.064932 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1288 17:08:47.071457 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1289 17:08:47.078567 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1290 17:08:47.087939 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1291 17:08:47.091679 DOMAIN: 0000: Resource ranges:
1292 17:08:47.094625 * Base: 7fc00000, Size: 40400000, Tag: 200
1293 17:08:47.098588 * Base: d0000000, Size: 28000000, Tag: 200
1294 17:08:47.105083 * Base: fa000000, Size: 1000000, Tag: 200
1295 17:08:47.108001 * Base: fb001000, Size: 2fff000, Tag: 200
1296 17:08:47.111409 * Base: fe010000, Size: 2e000, Tag: 200
1297 17:08:47.114765 * Base: fe03f000, Size: d41000, Tag: 200
1298 17:08:47.121394 * Base: fed88000, Size: 8000, Tag: 200
1299 17:08:47.124815 * Base: fed93000, Size: d000, Tag: 200
1300 17:08:47.128701 * Base: feda2000, Size: 1e000, Tag: 200
1301 17:08:47.131423 * Base: fede0000, Size: 1220000, Tag: 200
1302 17:08:47.137867 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1303 17:08:47.144981 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1304 17:08:47.151227 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1305 17:08:47.157659 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1306 17:08:47.164436 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1307 17:08:47.171346 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1308 17:08:47.177786 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1309 17:08:47.184294 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1310 17:08:47.191048 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1311 17:08:47.197930 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1312 17:08:47.204147 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1313 17:08:47.210968 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1314 17:08:47.217718 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1315 17:08:47.223925 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1316 17:08:47.230628 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1317 17:08:47.237655 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1318 17:08:47.244389 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1319 17:08:47.250813 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1320 17:08:47.257360 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1321 17:08:47.263748 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1322 17:08:47.270700 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1323 17:08:47.277417 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1324 17:08:47.283803 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1325 17:08:47.290866 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1326 17:08:47.300678 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1327 17:08:47.303977 PCI: 00:1d.0: Resource ranges:
1328 17:08:47.307281 * Base: 7fc00000, Size: 100000, Tag: 200
1329 17:08:47.313972 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1330 17:08:47.320613 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1331 17:08:47.326828 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1332 17:08:47.333750 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1333 17:08:47.343916 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1334 17:08:47.346735 Root Device assign_resources, bus 0 link: 0
1335 17:08:47.350114 DOMAIN: 0000 assign_resources, bus 0 link: 0
1336 17:08:47.360210 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1337 17:08:47.366821 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1338 17:08:47.376825 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1339 17:08:47.383349 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1340 17:08:47.390170 PCI: 00:04.0 assign_resources, bus 1 link: 0
1341 17:08:47.393357 PCI: 00:04.0 assign_resources, bus 1 link: 0
1342 17:08:47.402900 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1343 17:08:47.409497 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1344 17:08:47.419646 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1345 17:08:47.422915 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1346 17:08:47.426338 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1347 17:08:47.436061 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1348 17:08:47.439627 PCI: 00:14.0 assign_resources, bus 0 link: 0
1349 17:08:47.446210 PCI: 00:14.0 assign_resources, bus 0 link: 0
1350 17:08:47.452946 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1351 17:08:47.462943 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1352 17:08:47.469565 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1353 17:08:47.473029 PCI: 00:14.3 assign_resources, bus 0 link: 0
1354 17:08:47.479185 PCI: 00:14.3 assign_resources, bus 0 link: 0
1355 17:08:47.485857 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1356 17:08:47.492623 PCI: 00:15.0 assign_resources, bus 0 link: 0
1357 17:08:47.495869 PCI: 00:15.0 assign_resources, bus 0 link: 0
1358 17:08:47.505729 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1359 17:08:47.508991 PCI: 00:15.1 assign_resources, bus 0 link: 0
1360 17:08:47.512577 PCI: 00:15.1 assign_resources, bus 0 link: 0
1361 17:08:47.522537 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1362 17:08:47.528862 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1363 17:08:47.539008 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1364 17:08:47.545804 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1365 17:08:47.551830 PCI: 00:19.1 assign_resources, bus 0 link: 0
1366 17:08:47.555196 PCI: 00:19.1 assign_resources, bus 0 link: 0
1367 17:08:47.565150 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1368 17:08:47.575222 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1369 17:08:47.582150 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1370 17:08:47.588671 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1371 17:08:47.595037 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1372 17:08:47.605176 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1373 17:08:47.611393 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1374 17:08:47.615193 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1375 17:08:47.624714 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1376 17:08:47.628392 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1377 17:08:47.634845 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1378 17:08:47.641787 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1379 17:08:47.644653 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1380 17:08:47.651453 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1381 17:08:47.654932 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1382 17:08:47.661445 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1383 17:08:47.665050 LPC: Trying to open IO window from 800 size 1ff
1384 17:08:47.674414 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1385 17:08:47.681115 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1386 17:08:47.690986 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1387 17:08:47.694735 DOMAIN: 0000 assign_resources, bus 0 link: 0
1388 17:08:47.701427 Root Device assign_resources, bus 0 link: 0
1389 17:08:47.701501 Done setting resources.
1390 17:08:47.708155 Show resources in subtree (Root Device)...After assigning values.
1391 17:08:47.711242 Root Device child on link 0 DOMAIN: 0000
1392 17:08:47.717904 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1393 17:08:47.727566 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1394 17:08:47.737794 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1395 17:08:47.737881 PCI: 00:00.0
1396 17:08:47.747750 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1397 17:08:47.757848 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1398 17:08:47.767484 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1399 17:08:47.774145 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1400 17:08:47.784308 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1401 17:08:47.794312 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1402 17:08:47.804142 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1403 17:08:47.814314 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1404 17:08:47.823904 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1405 17:08:47.830918 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1406 17:08:47.840518 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1407 17:08:47.850721 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1408 17:08:47.860494 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1409 17:08:47.870104 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1410 17:08:47.877267 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1411 17:08:47.886925 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1412 17:08:47.896857 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1413 17:08:47.906807 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1414 17:08:47.916733 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1415 17:08:47.926820 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1416 17:08:47.926908 PCI: 00:02.0
1417 17:08:47.939958 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1418 17:08:47.950104 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1419 17:08:47.960232 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1420 17:08:47.963355 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1421 17:08:47.973324 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1422 17:08:47.976634 GENERIC: 0.0
1423 17:08:47.976708 PCI: 00:05.0
1424 17:08:47.986715 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1425 17:08:47.992971 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1426 17:08:47.993055 GENERIC: 0.0
1427 17:08:47.996606 PCI: 00:08.0
1428 17:08:48.006214 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1429 17:08:48.006297 PCI: 00:0a.0
1430 17:08:48.013093 PCI: 00:0d.0 child on link 0 USB0 port 0
1431 17:08:48.022861 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1432 17:08:48.026037 USB0 port 0 child on link 0 USB3 port 0
1433 17:08:48.029480 USB3 port 0
1434 17:08:48.029555 USB3 port 1
1435 17:08:48.032898 USB3 port 2
1436 17:08:48.032978 USB3 port 3
1437 17:08:48.039421 PCI: 00:14.0 child on link 0 USB0 port 0
1438 17:08:48.049286 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1439 17:08:48.052602 USB0 port 0 child on link 0 USB2 port 0
1440 17:08:48.055999 USB2 port 0
1441 17:08:48.056132 USB2 port 1
1442 17:08:48.059679 USB2 port 2
1443 17:08:48.059786 USB2 port 3
1444 17:08:48.062870 USB2 port 4
1445 17:08:48.062950 USB2 port 5
1446 17:08:48.065967 USB2 port 6
1447 17:08:48.066043 USB2 port 7
1448 17:08:48.069672 USB2 port 8
1449 17:08:48.069745 USB2 port 9
1450 17:08:48.072882 USB3 port 0
1451 17:08:48.072956 USB3 port 1
1452 17:08:48.076290 USB3 port 2
1453 17:08:48.076391 USB3 port 3
1454 17:08:48.079165 PCI: 00:14.2
1455 17:08:48.089216 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1456 17:08:48.099000 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1457 17:08:48.105873 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1458 17:08:48.115966 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1459 17:08:48.116095 GENERIC: 0.0
1460 17:08:48.122413 PCI: 00:15.0 child on link 0 I2C: 00:1a
1461 17:08:48.132564 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1462 17:08:48.132646 I2C: 00:1a
1463 17:08:48.135465 I2C: 00:31
1464 17:08:48.135545 I2C: 00:32
1465 17:08:48.138887 PCI: 00:15.1 child on link 0 I2C: 00:10
1466 17:08:48.148750 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1467 17:08:48.152114 I2C: 00:10
1468 17:08:48.152190 PCI: 00:15.2
1469 17:08:48.165801 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1470 17:08:48.165880 PCI: 00:15.3
1471 17:08:48.175501 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1472 17:08:48.178943 PCI: 00:16.0
1473 17:08:48.188608 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1474 17:08:48.188692 PCI: 00:19.0
1475 17:08:48.195524 PCI: 00:19.1 child on link 0 I2C: 00:15
1476 17:08:48.205542 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1477 17:08:48.205649 I2C: 00:15
1478 17:08:48.212287 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1479 17:08:48.218521 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1480 17:08:48.232339 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1481 17:08:48.241830 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1482 17:08:48.245215 GENERIC: 0.0
1483 17:08:48.245296 PCI: 01:00.0
1484 17:08:48.255470 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1485 17:08:48.265424 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1486 17:08:48.278464 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1487 17:08:48.278549 PCI: 00:1e.0
1488 17:08:48.288529 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1489 17:08:48.294846 PCI: 00:1e.2 child on link 0 SPI: 00
1490 17:08:48.305147 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1491 17:08:48.305238 SPI: 00
1492 17:08:48.308510 PCI: 00:1e.3 child on link 0 SPI: 00
1493 17:08:48.318171 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1494 17:08:48.321564 SPI: 00
1495 17:08:48.324996 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1496 17:08:48.334699 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1497 17:08:48.334802 PNP: 0c09.0
1498 17:08:48.345139 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1499 17:08:48.348458 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1500 17:08:48.358259 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1501 17:08:48.368414 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1502 17:08:48.371870 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1503 17:08:48.375365 GENERIC: 0.0
1504 17:08:48.375674 GENERIC: 1.0
1505 17:08:48.378562 PCI: 00:1f.3
1506 17:08:48.388545 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1507 17:08:48.398259 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1508 17:08:48.402036 PCI: 00:1f.5
1509 17:08:48.412225 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1510 17:08:48.414926 CPU_CLUSTER: 0 child on link 0 APIC: 00
1511 17:08:48.415342 APIC: 00
1512 17:08:48.418665 APIC: 01
1513 17:08:48.419080 APIC: 03
1514 17:08:48.421887 APIC: 05
1515 17:08:48.422301 APIC: 07
1516 17:08:48.422629 APIC: 06
1517 17:08:48.425304 APIC: 02
1518 17:08:48.425720 APIC: 04
1519 17:08:48.428306 Done allocating resources.
1520 17:08:48.434735 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1521 17:08:48.441692 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1522 17:08:48.445017 Configure GPIOs for I2S audio on UP4.
1523 17:08:48.451461 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1524 17:08:48.454859 Enabling resources...
1525 17:08:48.457930 PCI: 00:00.0 subsystem <- 8086/9a12
1526 17:08:48.458419 PCI: 00:00.0 cmd <- 06
1527 17:08:48.465085 PCI: 00:02.0 subsystem <- 8086/9a40
1528 17:08:48.465653 PCI: 00:02.0 cmd <- 03
1529 17:08:48.467950 PCI: 00:04.0 subsystem <- 8086/9a03
1530 17:08:48.471261 PCI: 00:04.0 cmd <- 02
1531 17:08:48.475138 PCI: 00:05.0 subsystem <- 8086/9a19
1532 17:08:48.478046 PCI: 00:05.0 cmd <- 02
1533 17:08:48.481526 PCI: 00:08.0 subsystem <- 8086/9a11
1534 17:08:48.484649 PCI: 00:08.0 cmd <- 06
1535 17:08:48.487900 PCI: 00:0d.0 subsystem <- 8086/9a13
1536 17:08:48.491422 PCI: 00:0d.0 cmd <- 02
1537 17:08:48.494675 PCI: 00:14.0 subsystem <- 8086/a0ed
1538 17:08:48.497814 PCI: 00:14.0 cmd <- 02
1539 17:08:48.501246 PCI: 00:14.2 subsystem <- 8086/a0ef
1540 17:08:48.504688 PCI: 00:14.2 cmd <- 02
1541 17:08:48.508109 PCI: 00:14.3 subsystem <- 8086/a0f0
1542 17:08:48.508531 PCI: 00:14.3 cmd <- 02
1543 17:08:48.514385 PCI: 00:15.0 subsystem <- 8086/a0e8
1544 17:08:48.514799 PCI: 00:15.0 cmd <- 02
1545 17:08:48.518002 PCI: 00:15.1 subsystem <- 8086/a0e9
1546 17:08:48.521179 PCI: 00:15.1 cmd <- 02
1547 17:08:48.524236 PCI: 00:15.2 subsystem <- 8086/a0ea
1548 17:08:48.527872 PCI: 00:15.2 cmd <- 02
1549 17:08:48.530893 PCI: 00:15.3 subsystem <- 8086/a0eb
1550 17:08:48.534345 PCI: 00:15.3 cmd <- 02
1551 17:08:48.537672 PCI: 00:16.0 subsystem <- 8086/a0e0
1552 17:08:48.540938 PCI: 00:16.0 cmd <- 02
1553 17:08:48.544147 PCI: 00:19.1 subsystem <- 8086/a0c6
1554 17:08:48.547844 PCI: 00:19.1 cmd <- 02
1555 17:08:48.551091 PCI: 00:1d.0 bridge ctrl <- 0013
1556 17:08:48.554529 PCI: 00:1d.0 subsystem <- 8086/a0b0
1557 17:08:48.557418 PCI: 00:1d.0 cmd <- 06
1558 17:08:48.561021 PCI: 00:1e.0 subsystem <- 8086/a0a8
1559 17:08:48.561609 PCI: 00:1e.0 cmd <- 06
1560 17:08:48.567308 PCI: 00:1e.2 subsystem <- 8086/a0aa
1561 17:08:48.567864 PCI: 00:1e.2 cmd <- 06
1562 17:08:48.571077 PCI: 00:1e.3 subsystem <- 8086/a0ab
1563 17:08:48.574468 PCI: 00:1e.3 cmd <- 02
1564 17:08:48.577562 PCI: 00:1f.0 subsystem <- 8086/a087
1565 17:08:48.580693 PCI: 00:1f.0 cmd <- 407
1566 17:08:48.584103 PCI: 00:1f.3 subsystem <- 8086/a0c8
1567 17:08:48.587447 PCI: 00:1f.3 cmd <- 02
1568 17:08:48.590672 PCI: 00:1f.5 subsystem <- 8086/a0a4
1569 17:08:48.593876 PCI: 00:1f.5 cmd <- 406
1570 17:08:48.597820 PCI: 01:00.0 cmd <- 02
1571 17:08:48.602590 done.
1572 17:08:48.605342 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1573 17:08:48.608796 Initializing devices...
1574 17:08:48.612205 Root Device init
1575 17:08:48.615631 Chrome EC: Set SMI mask to 0x0000000000000000
1576 17:08:48.622204 Chrome EC: clear events_b mask to 0x0000000000000000
1577 17:08:48.628645 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1578 17:08:48.635772 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1579 17:08:48.638720 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1580 17:08:48.645600 Chrome EC: Set WAKE mask to 0x0000000000000000
1581 17:08:48.648743 fw_config match found: DB_USB=USB3_ACTIVE
1582 17:08:48.655316 Configure Right Type-C port orientation for retimer
1583 17:08:48.658654 Root Device init finished in 44 msecs
1584 17:08:48.661731 PCI: 00:00.0 init
1585 17:08:48.665191 CPU TDP = 9 Watts
1586 17:08:48.665608 CPU PL1 = 9 Watts
1587 17:08:48.668488 CPU PL2 = 40 Watts
1588 17:08:48.672210 CPU PL4 = 83 Watts
1589 17:08:48.675586 PCI: 00:00.0 init finished in 8 msecs
1590 17:08:48.676001 PCI: 00:02.0 init
1591 17:08:48.679080 GMA: Found VBT in CBFS
1592 17:08:48.682048 GMA: Found valid VBT in CBFS
1593 17:08:48.688733 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1594 17:08:48.695276 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1595 17:08:48.698579 PCI: 00:02.0 init finished in 18 msecs
1596 17:08:48.701941 PCI: 00:05.0 init
1597 17:08:48.705207 PCI: 00:05.0 init finished in 0 msecs
1598 17:08:48.708576 PCI: 00:08.0 init
1599 17:08:48.711899 PCI: 00:08.0 init finished in 0 msecs
1600 17:08:48.715207 PCI: 00:14.0 init
1601 17:08:48.718678 PCI: 00:14.0 init finished in 0 msecs
1602 17:08:48.721969 PCI: 00:14.2 init
1603 17:08:48.725314 PCI: 00:14.2 init finished in 0 msecs
1604 17:08:48.728645 PCI: 00:15.0 init
1605 17:08:48.729051 I2C bus 0 version 0x3230302a
1606 17:08:48.735113 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1607 17:08:48.738509 PCI: 00:15.0 init finished in 6 msecs
1608 17:08:48.739107 PCI: 00:15.1 init
1609 17:08:48.741781 I2C bus 1 version 0x3230302a
1610 17:08:48.745010 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1611 17:08:48.748358 PCI: 00:15.1 init finished in 6 msecs
1612 17:08:48.751923 PCI: 00:15.2 init
1613 17:08:48.755396 I2C bus 2 version 0x3230302a
1614 17:08:48.759042 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1615 17:08:48.761672 PCI: 00:15.2 init finished in 6 msecs
1616 17:08:48.765447 PCI: 00:15.3 init
1617 17:08:48.768467 I2C bus 3 version 0x3230302a
1618 17:08:48.771729 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1619 17:08:48.775038 PCI: 00:15.3 init finished in 6 msecs
1620 17:08:48.778561 PCI: 00:16.0 init
1621 17:08:48.781893 PCI: 00:16.0 init finished in 0 msecs
1622 17:08:48.785129 PCI: 00:19.1 init
1623 17:08:48.785710 I2C bus 5 version 0x3230302a
1624 17:08:48.791599 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1625 17:08:48.794976 PCI: 00:19.1 init finished in 6 msecs
1626 17:08:48.795393 PCI: 00:1d.0 init
1627 17:08:48.798310 Initializing PCH PCIe bridge.
1628 17:08:48.801556 PCI: 00:1d.0 init finished in 3 msecs
1629 17:08:48.806003 PCI: 00:1f.0 init
1630 17:08:48.809367 IOAPIC: Initializing IOAPIC at 0xfec00000
1631 17:08:48.816022 IOAPIC: Bootstrap Processor Local APIC = 0x00
1632 17:08:48.816616 IOAPIC: ID = 0x02
1633 17:08:48.819368 IOAPIC: Dumping registers
1634 17:08:48.822648 reg 0x0000: 0x02000000
1635 17:08:48.826183 reg 0x0001: 0x00770020
1636 17:08:48.826735 reg 0x0002: 0x00000000
1637 17:08:48.832769 PCI: 00:1f.0 init finished in 21 msecs
1638 17:08:48.833331 PCI: 00:1f.2 init
1639 17:08:48.835982 Disabling ACPI via APMC.
1640 17:08:48.839871 APMC done.
1641 17:08:48.842755 PCI: 00:1f.2 init finished in 5 msecs
1642 17:08:48.854536 PCI: 01:00.0 init
1643 17:08:48.857943 PCI: 01:00.0 init finished in 0 msecs
1644 17:08:48.861220 PNP: 0c09.0 init
1645 17:08:48.864608 Google Chrome EC uptime: 8.387 seconds
1646 17:08:48.871177 Google Chrome AP resets since EC boot: 1
1647 17:08:48.874441 Google Chrome most recent AP reset causes:
1648 17:08:48.877504 0.349: 32775 shutdown: entering G3
1649 17:08:48.884484 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1650 17:08:48.887382 PNP: 0c09.0 init finished in 22 msecs
1651 17:08:48.893548 Devices initialized
1652 17:08:48.896763 Show all devs... After init.
1653 17:08:48.900002 Root Device: enabled 1
1654 17:08:48.900603 DOMAIN: 0000: enabled 1
1655 17:08:48.903496 CPU_CLUSTER: 0: enabled 1
1656 17:08:48.906513 PCI: 00:00.0: enabled 1
1657 17:08:48.909910 PCI: 00:02.0: enabled 1
1658 17:08:48.910521 PCI: 00:04.0: enabled 1
1659 17:08:48.913239 PCI: 00:05.0: enabled 1
1660 17:08:48.916511 PCI: 00:06.0: enabled 0
1661 17:08:48.919805 PCI: 00:07.0: enabled 0
1662 17:08:48.920363 PCI: 00:07.1: enabled 0
1663 17:08:48.923167 PCI: 00:07.2: enabled 0
1664 17:08:48.926701 PCI: 00:07.3: enabled 0
1665 17:08:48.930038 PCI: 00:08.0: enabled 1
1666 17:08:48.930622 PCI: 00:09.0: enabled 0
1667 17:08:48.933418 PCI: 00:0a.0: enabled 0
1668 17:08:48.936750 PCI: 00:0d.0: enabled 1
1669 17:08:48.940158 PCI: 00:0d.1: enabled 0
1670 17:08:48.940600 PCI: 00:0d.2: enabled 0
1671 17:08:48.943168 PCI: 00:0d.3: enabled 0
1672 17:08:48.946586 PCI: 00:0e.0: enabled 0
1673 17:08:48.947167 PCI: 00:10.2: enabled 1
1674 17:08:48.949938 PCI: 00:10.6: enabled 0
1675 17:08:48.953288 PCI: 00:10.7: enabled 0
1676 17:08:48.956585 PCI: 00:12.0: enabled 0
1677 17:08:48.957279 PCI: 00:12.6: enabled 0
1678 17:08:48.959975 PCI: 00:13.0: enabled 0
1679 17:08:48.962768 PCI: 00:14.0: enabled 1
1680 17:08:48.966060 PCI: 00:14.1: enabled 0
1681 17:08:48.966648 PCI: 00:14.2: enabled 1
1682 17:08:48.969557 PCI: 00:14.3: enabled 1
1683 17:08:48.972924 PCI: 00:15.0: enabled 1
1684 17:08:48.976099 PCI: 00:15.1: enabled 1
1685 17:08:48.976579 PCI: 00:15.2: enabled 1
1686 17:08:48.979569 PCI: 00:15.3: enabled 1
1687 17:08:48.983081 PCI: 00:16.0: enabled 1
1688 17:08:48.983575 PCI: 00:16.1: enabled 0
1689 17:08:48.986248 PCI: 00:16.2: enabled 0
1690 17:08:48.989469 PCI: 00:16.3: enabled 0
1691 17:08:48.992927 PCI: 00:16.4: enabled 0
1692 17:08:48.993515 PCI: 00:16.5: enabled 0
1693 17:08:48.996161 PCI: 00:17.0: enabled 0
1694 17:08:48.999689 PCI: 00:19.0: enabled 0
1695 17:08:49.003139 PCI: 00:19.1: enabled 1
1696 17:08:49.003584 PCI: 00:19.2: enabled 0
1697 17:08:49.006156 PCI: 00:1c.0: enabled 1
1698 17:08:49.009708 PCI: 00:1c.1: enabled 0
1699 17:08:49.012619 PCI: 00:1c.2: enabled 0
1700 17:08:49.013184 PCI: 00:1c.3: enabled 0
1701 17:08:49.016312 PCI: 00:1c.4: enabled 0
1702 17:08:49.019228 PCI: 00:1c.5: enabled 0
1703 17:08:49.023015 PCI: 00:1c.6: enabled 1
1704 17:08:49.023562 PCI: 00:1c.7: enabled 0
1705 17:08:49.026027 PCI: 00:1d.0: enabled 1
1706 17:08:49.029468 PCI: 00:1d.1: enabled 0
1707 17:08:49.029885 PCI: 00:1d.2: enabled 1
1708 17:08:49.032890 PCI: 00:1d.3: enabled 0
1709 17:08:49.036390 PCI: 00:1e.0: enabled 1
1710 17:08:49.039659 PCI: 00:1e.1: enabled 0
1711 17:08:49.040112 PCI: 00:1e.2: enabled 1
1712 17:08:49.042688 PCI: 00:1e.3: enabled 1
1713 17:08:49.046014 PCI: 00:1f.0: enabled 1
1714 17:08:49.049364 PCI: 00:1f.1: enabled 0
1715 17:08:49.049988 PCI: 00:1f.2: enabled 1
1716 17:08:49.052984 PCI: 00:1f.3: enabled 1
1717 17:08:49.056196 PCI: 00:1f.4: enabled 0
1718 17:08:49.059520 PCI: 00:1f.5: enabled 1
1719 17:08:49.059933 PCI: 00:1f.6: enabled 0
1720 17:08:49.062451 PCI: 00:1f.7: enabled 0
1721 17:08:49.065857 APIC: 00: enabled 1
1722 17:08:49.066270 GENERIC: 0.0: enabled 1
1723 17:08:49.069265 GENERIC: 0.0: enabled 1
1724 17:08:49.072538 GENERIC: 1.0: enabled 1
1725 17:08:49.075826 GENERIC: 0.0: enabled 1
1726 17:08:49.076404 GENERIC: 1.0: enabled 1
1727 17:08:49.079080 USB0 port 0: enabled 1
1728 17:08:49.082603 GENERIC: 0.0: enabled 1
1729 17:08:49.083108 USB0 port 0: enabled 1
1730 17:08:49.085735 GENERIC: 0.0: enabled 1
1731 17:08:49.089234 I2C: 00:1a: enabled 1
1732 17:08:49.092471 I2C: 00:31: enabled 1
1733 17:08:49.092882 I2C: 00:32: enabled 1
1734 17:08:49.095580 I2C: 00:10: enabled 1
1735 17:08:49.099007 I2C: 00:15: enabled 1
1736 17:08:49.099441 GENERIC: 0.0: enabled 0
1737 17:08:49.102435 GENERIC: 1.0: enabled 0
1738 17:08:49.105636 GENERIC: 0.0: enabled 1
1739 17:08:49.106047 SPI: 00: enabled 1
1740 17:08:49.109093 SPI: 00: enabled 1
1741 17:08:49.112642 PNP: 0c09.0: enabled 1
1742 17:08:49.113222 GENERIC: 0.0: enabled 1
1743 17:08:49.115945 USB3 port 0: enabled 1
1744 17:08:49.119191 USB3 port 1: enabled 1
1745 17:08:49.122434 USB3 port 2: enabled 0
1746 17:08:49.122868 USB3 port 3: enabled 0
1747 17:08:49.125541 USB2 port 0: enabled 0
1748 17:08:49.129157 USB2 port 1: enabled 1
1749 17:08:49.129706 USB2 port 2: enabled 1
1750 17:08:49.132380 USB2 port 3: enabled 0
1751 17:08:49.135488 USB2 port 4: enabled 1
1752 17:08:49.135945 USB2 port 5: enabled 0
1753 17:08:49.138713 USB2 port 6: enabled 0
1754 17:08:49.142400 USB2 port 7: enabled 0
1755 17:08:49.145709 USB2 port 8: enabled 0
1756 17:08:49.146120 USB2 port 9: enabled 0
1757 17:08:49.149089 USB3 port 0: enabled 0
1758 17:08:49.152422 USB3 port 1: enabled 1
1759 17:08:49.152828 USB3 port 2: enabled 0
1760 17:08:49.155745 USB3 port 3: enabled 0
1761 17:08:49.158989 GENERIC: 0.0: enabled 1
1762 17:08:49.162411 GENERIC: 1.0: enabled 1
1763 17:08:49.162835 APIC: 01: enabled 1
1764 17:08:49.165850 APIC: 03: enabled 1
1765 17:08:49.166424 APIC: 05: enabled 1
1766 17:08:49.168696 APIC: 07: enabled 1
1767 17:08:49.172132 APIC: 06: enabled 1
1768 17:08:49.172586 APIC: 02: enabled 1
1769 17:08:49.175511 APIC: 04: enabled 1
1770 17:08:49.178647 PCI: 01:00.0: enabled 1
1771 17:08:49.182003 BS: BS_DEV_INIT run times (exec / console): 31 / 540 ms
1772 17:08:49.188858 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1773 17:08:49.192208 ELOG: NV offset 0xf30000 size 0x1000
1774 17:08:49.198872 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1775 17:08:49.204961 ELOG: Event(17) added with size 13 at 2024-03-01 17:08:49 UTC
1776 17:08:49.211536 ELOG: Event(92) added with size 9 at 2024-03-01 17:08:49 UTC
1777 17:08:49.218162 ELOG: Event(93) added with size 9 at 2024-03-01 17:08:49 UTC
1778 17:08:49.224979 ELOG: Event(9E) added with size 10 at 2024-03-01 17:08:49 UTC
1779 17:08:49.231464 ELOG: Event(9F) added with size 14 at 2024-03-01 17:08:49 UTC
1780 17:08:49.238236 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1781 17:08:49.241420 ELOG: Event(A1) added with size 10 at 2024-03-01 17:08:49 UTC
1782 17:08:49.251077 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1783 17:08:49.258170 ELOG: Event(A0) added with size 9 at 2024-03-01 17:08:49 UTC
1784 17:08:49.261411 elog_add_boot_reason: Logged dev mode boot
1785 17:08:49.268020 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1786 17:08:49.268144 Finalize devices...
1787 17:08:49.271409 Devices finalized
1788 17:08:49.278088 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1789 17:08:49.281521 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1790 17:08:49.287643 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1791 17:08:49.291082 ME: HFSTS1 : 0x80030055
1792 17:08:49.297788 ME: HFSTS2 : 0x30280116
1793 17:08:49.301135 ME: HFSTS3 : 0x00000050
1794 17:08:49.304435 ME: HFSTS4 : 0x00004000
1795 17:08:49.311150 ME: HFSTS5 : 0x00000000
1796 17:08:49.314477 ME: HFSTS6 : 0x00400006
1797 17:08:49.317726 ME: Manufacturing Mode : YES
1798 17:08:49.321132 ME: SPI Protection Mode Enabled : NO
1799 17:08:49.324564 ME: FW Partition Table : OK
1800 17:08:49.330705 ME: Bringup Loader Failure : NO
1801 17:08:49.334721 ME: Firmware Init Complete : NO
1802 17:08:49.337330 ME: Boot Options Present : NO
1803 17:08:49.340653 ME: Update In Progress : NO
1804 17:08:49.344304 ME: D0i3 Support : YES
1805 17:08:49.347698 ME: Low Power State Enabled : NO
1806 17:08:49.351047 ME: CPU Replaced : YES
1807 17:08:49.354270 ME: CPU Replacement Valid : YES
1808 17:08:49.360552 ME: Current Working State : 5
1809 17:08:49.364312 ME: Current Operation State : 1
1810 17:08:49.367747 ME: Current Operation Mode : 3
1811 17:08:49.370631 ME: Error Code : 0
1812 17:08:49.373908 ME: Enhanced Debug Mode : NO
1813 17:08:49.377461 ME: CPU Debug Disabled : YES
1814 17:08:49.380476 ME: TXT Support : NO
1815 17:08:49.387078 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1816 17:08:49.394211 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1817 17:08:49.397170 CBFS: 'fallback/slic' not found.
1818 17:08:49.403992 ACPI: Writing ACPI tables at 76b01000.
1819 17:08:49.404115 ACPI: * FACS
1820 17:08:49.407333 ACPI: * DSDT
1821 17:08:49.410622 Ramoops buffer: 0x100000@0x76a00000.
1822 17:08:49.413787 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1823 17:08:49.417195 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1824 17:08:49.421405 Google Chrome EC: version:
1825 17:08:49.424680 ro: voema_v2.0.7540-147f8d37d1
1826 17:08:49.428154 rw: voema_v2.0.7540-147f8d37d1
1827 17:08:49.431548 running image: 2
1828 17:08:49.438138 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1829 17:08:49.441590 ACPI: * FADT
1830 17:08:49.441670 SCI is IRQ9
1831 17:08:49.444827 ACPI: added table 1/32, length now 40
1832 17:08:49.448019 ACPI: * SSDT
1833 17:08:49.451422 Found 1 CPU(s) with 8 core(s) each.
1834 17:08:49.454724 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1835 17:08:49.461270 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1836 17:08:49.464826 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1837 17:08:49.468166 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1838 17:08:49.474790 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1839 17:08:49.481453 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1840 17:08:49.484648 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1841 17:08:49.491048 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1842 17:08:49.497891 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1843 17:08:49.501155 \_SB.PCI0.RP09: Added StorageD3Enable property
1844 17:08:49.504525 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1845 17:08:49.511155 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1846 17:08:49.517683 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1847 17:08:49.521247 PS2K: Passing 80 keymaps to kernel
1848 17:08:49.527771 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1849 17:08:49.534103 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1850 17:08:49.541263 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1851 17:08:49.547522 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1852 17:08:49.554009 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1853 17:08:49.561110 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1854 17:08:49.567624 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1855 17:08:49.574378 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1856 17:08:49.577762 ACPI: added table 2/32, length now 44
1857 17:08:49.577867 ACPI: * MCFG
1858 17:08:49.580623 ACPI: added table 3/32, length now 48
1859 17:08:49.583999 ACPI: * TPM2
1860 17:08:49.587301 TPM2 log created at 0x769f0000
1861 17:08:49.590802 ACPI: added table 4/32, length now 52
1862 17:08:49.594333 ACPI: * MADT
1863 17:08:49.594413 SCI is IRQ9
1864 17:08:49.597179 ACPI: added table 5/32, length now 56
1865 17:08:49.601106 current = 76b09850
1866 17:08:49.601186 ACPI: * DMAR
1867 17:08:49.604187 ACPI: added table 6/32, length now 60
1868 17:08:49.607941 ACPI: added table 7/32, length now 64
1869 17:08:49.611037 ACPI: * HPET
1870 17:08:49.614142 ACPI: added table 8/32, length now 68
1871 17:08:49.614234 ACPI: done.
1872 17:08:49.617369 ACPI tables: 35216 bytes.
1873 17:08:49.620730 smbios_write_tables: 769ef000
1874 17:08:49.623987 EC returned error result code 3
1875 17:08:49.627046 Couldn't obtain OEM name from CBI
1876 17:08:49.631732 Create SMBIOS type 16
1877 17:08:49.634874 Create SMBIOS type 17
1878 17:08:49.638170 GENERIC: 0.0 (WIFI Device)
1879 17:08:49.638319 SMBIOS tables: 1750 bytes.
1880 17:08:49.644770 Writing table forward entry at 0x00000500
1881 17:08:49.651415 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1882 17:08:49.654727 Writing coreboot table at 0x76b25000
1883 17:08:49.661806 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1884 17:08:49.665316 1. 0000000000001000-000000000009ffff: RAM
1885 17:08:49.668379 2. 00000000000a0000-00000000000fffff: RESERVED
1886 17:08:49.675255 3. 0000000000100000-00000000769eefff: RAM
1887 17:08:49.678365 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1888 17:08:49.684685 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1889 17:08:49.691431 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1890 17:08:49.695123 7. 0000000077000000-000000007fbfffff: RESERVED
1891 17:08:49.697923 8. 00000000c0000000-00000000cfffffff: RESERVED
1892 17:08:49.704744 9. 00000000f8000000-00000000f9ffffff: RESERVED
1893 17:08:49.708489 10. 00000000fb000000-00000000fb000fff: RESERVED
1894 17:08:49.714894 11. 00000000fe000000-00000000fe00ffff: RESERVED
1895 17:08:49.718097 12. 00000000fed80000-00000000fed87fff: RESERVED
1896 17:08:49.724607 13. 00000000fed90000-00000000fed92fff: RESERVED
1897 17:08:49.727833 14. 00000000feda0000-00000000feda1fff: RESERVED
1898 17:08:49.734814 15. 00000000fedc0000-00000000feddffff: RESERVED
1899 17:08:49.737935 16. 0000000100000000-00000002803fffff: RAM
1900 17:08:49.741344 Passing 4 GPIOs to payload:
1901 17:08:49.744491 NAME | PORT | POLARITY | VALUE
1902 17:08:49.751006 lid | undefined | high | high
1903 17:08:49.754469 power | undefined | high | low
1904 17:08:49.760920 oprom | undefined | high | low
1905 17:08:49.767856 EC in RW | 0x000000e5 | high | high
1906 17:08:49.774254 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 5de0
1907 17:08:49.774870 coreboot table: 1576 bytes.
1908 17:08:49.780864 IMD ROOT 0. 0x76fff000 0x00001000
1909 17:08:49.784287 IMD SMALL 1. 0x76ffe000 0x00001000
1910 17:08:49.787634 FSP MEMORY 2. 0x76c4e000 0x003b0000
1911 17:08:49.791049 VPD 3. 0x76c4d000 0x00000367
1912 17:08:49.794434 RO MCACHE 4. 0x76c4c000 0x00000fdc
1913 17:08:49.798147 CONSOLE 5. 0x76c2c000 0x00020000
1914 17:08:49.801125 FMAP 6. 0x76c2b000 0x00000578
1915 17:08:49.804502 TIME STAMP 7. 0x76c2a000 0x00000910
1916 17:08:49.807995 VBOOT WORK 8. 0x76c16000 0x00014000
1917 17:08:49.814641 ROMSTG STCK 9. 0x76c15000 0x00001000
1918 17:08:49.818097 AFTER CAR 10. 0x76c0a000 0x0000b000
1919 17:08:49.820862 RAMSTAGE 11. 0x76b97000 0x00073000
1920 17:08:49.824209 REFCODE 12. 0x76b42000 0x00055000
1921 17:08:49.827618 SMM BACKUP 13. 0x76b32000 0x00010000
1922 17:08:49.830825 4f444749 14. 0x76b30000 0x00002000
1923 17:08:49.834455 EXT VBT15. 0x76b2d000 0x0000219f
1924 17:08:49.837598 COREBOOT 16. 0x76b25000 0x00008000
1925 17:08:49.841025 ACPI 17. 0x76b01000 0x00024000
1926 17:08:49.847749 ACPI GNVS 18. 0x76b00000 0x00001000
1927 17:08:49.851181 RAMOOPS 19. 0x76a00000 0x00100000
1928 17:08:49.854638 TPM2 TCGLOG20. 0x769f0000 0x00010000
1929 17:08:49.858005 SMBIOS 21. 0x769ef000 0x00000800
1930 17:08:49.858480 IMD small region:
1931 17:08:49.864491 IMD ROOT 0. 0x76ffec00 0x00000400
1932 17:08:49.867692 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1933 17:08:49.871290 POWER STATE 2. 0x76ffeb80 0x00000044
1934 17:08:49.874510 ROMSTAGE 3. 0x76ffeb60 0x00000004
1935 17:08:49.877866 MEM INFO 4. 0x76ffe980 0x000001e0
1936 17:08:49.884666 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1937 17:08:49.888032 MTRR: Physical address space:
1938 17:08:49.894273 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1939 17:08:49.901183 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1940 17:08:49.907689 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1941 17:08:49.914388 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1942 17:08:49.917298 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1943 17:08:49.924132 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1944 17:08:49.931026 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1945 17:08:49.934332 MTRR: Fixed MSR 0x250 0x0606060606060606
1946 17:08:49.941006 MTRR: Fixed MSR 0x258 0x0606060606060606
1947 17:08:49.944430 MTRR: Fixed MSR 0x259 0x0000000000000000
1948 17:08:49.947232 MTRR: Fixed MSR 0x268 0x0606060606060606
1949 17:08:49.950605 MTRR: Fixed MSR 0x269 0x0606060606060606
1950 17:08:49.957361 MTRR: Fixed MSR 0x26a 0x0606060606060606
1951 17:08:49.960797 MTRR: Fixed MSR 0x26b 0x0606060606060606
1952 17:08:49.963927 MTRR: Fixed MSR 0x26c 0x0606060606060606
1953 17:08:49.967246 MTRR: Fixed MSR 0x26d 0x0606060606060606
1954 17:08:49.973725 MTRR: Fixed MSR 0x26e 0x0606060606060606
1955 17:08:49.977372 MTRR: Fixed MSR 0x26f 0x0606060606060606
1956 17:08:49.980422 call enable_fixed_mtrr()
1957 17:08:49.984080 CPU physical address size: 39 bits
1958 17:08:49.987026 MTRR: default type WB/UC MTRR counts: 6/6.
1959 17:08:49.990388 MTRR: UC selected as default type.
1960 17:08:49.997233 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1961 17:08:50.003999 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1962 17:08:50.010681 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1963 17:08:50.016798 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1964 17:08:50.023563 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1965 17:08:50.030483 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1966 17:08:50.033681 MTRR: Fixed MSR 0x250 0x0606060606060606
1967 17:08:50.040186 MTRR: Fixed MSR 0x258 0x0606060606060606
1968 17:08:50.043400 MTRR: Fixed MSR 0x259 0x0000000000000000
1969 17:08:50.046890 MTRR: Fixed MSR 0x268 0x0606060606060606
1970 17:08:50.050024 MTRR: Fixed MSR 0x269 0x0606060606060606
1971 17:08:50.056929 MTRR: Fixed MSR 0x26a 0x0606060606060606
1972 17:08:50.059958 MTRR: Fixed MSR 0x26b 0x0606060606060606
1973 17:08:50.063180 MTRR: Fixed MSR 0x26c 0x0606060606060606
1974 17:08:50.066631 MTRR: Fixed MSR 0x26d 0x0606060606060606
1975 17:08:50.070005 MTRR: Fixed MSR 0x26e 0x0606060606060606
1976 17:08:50.076584 MTRR: Fixed MSR 0x26f 0x0606060606060606
1977 17:08:50.077080
1978 17:08:50.077485 MTRR check
1979 17:08:50.080149 Fixed MTRRs : Enabled
1980 17:08:50.083181 Variable MTRRs: Enabled
1981 17:08:50.083609
1982 17:08:50.086572 call enable_fixed_mtrr()
1983 17:08:50.093390 BS: BS_WRITE_TABLES exit times (exec / console): 48 / 151 ms
1984 17:08:50.096543 CPU physical address size: 39 bits
1985 17:08:50.100252 Checking cr50 for pending updates
1986 17:08:50.103685 MTRR: Fixed MSR 0x250 0x0606060606060606
1987 17:08:50.107481 MTRR: Fixed MSR 0x250 0x0606060606060606
1988 17:08:50.113597 MTRR: Fixed MSR 0x258 0x0606060606060606
1989 17:08:50.116923 MTRR: Fixed MSR 0x259 0x0000000000000000
1990 17:08:50.120220 MTRR: Fixed MSR 0x268 0x0606060606060606
1991 17:08:50.123650 MTRR: Fixed MSR 0x269 0x0606060606060606
1992 17:08:50.126941 MTRR: Fixed MSR 0x26a 0x0606060606060606
1993 17:08:50.133924 MTRR: Fixed MSR 0x26b 0x0606060606060606
1994 17:08:50.136802 MTRR: Fixed MSR 0x26c 0x0606060606060606
1995 17:08:50.139885 MTRR: Fixed MSR 0x26d 0x0606060606060606
1996 17:08:50.143105 MTRR: Fixed MSR 0x26e 0x0606060606060606
1997 17:08:50.150005 MTRR: Fixed MSR 0x26f 0x0606060606060606
1998 17:08:50.153350 MTRR: Fixed MSR 0x258 0x0606060606060606
1999 17:08:50.156873 call enable_fixed_mtrr()
2000 17:08:50.159728 MTRR: Fixed MSR 0x259 0x0000000000000000
2001 17:08:50.162979 MTRR: Fixed MSR 0x268 0x0606060606060606
2002 17:08:50.169776 MTRR: Fixed MSR 0x269 0x0606060606060606
2003 17:08:50.173128 MTRR: Fixed MSR 0x26a 0x0606060606060606
2004 17:08:50.176470 MTRR: Fixed MSR 0x26b 0x0606060606060606
2005 17:08:50.179902 MTRR: Fixed MSR 0x26c 0x0606060606060606
2006 17:08:50.186290 MTRR: Fixed MSR 0x26d 0x0606060606060606
2007 17:08:50.189559 MTRR: Fixed MSR 0x26e 0x0606060606060606
2008 17:08:50.193054 MTRR: Fixed MSR 0x26f 0x0606060606060606
2009 17:08:50.196436 CPU physical address size: 39 bits
2010 17:08:50.200728 call enable_fixed_mtrr()
2011 17:08:50.204279 MTRR: Fixed MSR 0x250 0x0606060606060606
2012 17:08:50.210797 MTRR: Fixed MSR 0x250 0x0606060606060606
2013 17:08:50.213893 MTRR: Fixed MSR 0x258 0x0606060606060606
2014 17:08:50.217298 MTRR: Fixed MSR 0x259 0x0000000000000000
2015 17:08:50.220759 MTRR: Fixed MSR 0x268 0x0606060606060606
2016 17:08:50.227275 MTRR: Fixed MSR 0x269 0x0606060606060606
2017 17:08:50.230646 MTRR: Fixed MSR 0x26a 0x0606060606060606
2018 17:08:50.233751 MTRR: Fixed MSR 0x26b 0x0606060606060606
2019 17:08:50.237144 MTRR: Fixed MSR 0x26c 0x0606060606060606
2020 17:08:50.243966 MTRR: Fixed MSR 0x26d 0x0606060606060606
2021 17:08:50.247260 MTRR: Fixed MSR 0x26e 0x0606060606060606
2022 17:08:50.250504 MTRR: Fixed MSR 0x26f 0x0606060606060606
2023 17:08:50.256971 MTRR: Fixed MSR 0x258 0x0606060606060606
2024 17:08:50.257052 call enable_fixed_mtrr()
2025 17:08:50.263690 MTRR: Fixed MSR 0x259 0x0000000000000000
2026 17:08:50.267052 MTRR: Fixed MSR 0x268 0x0606060606060606
2027 17:08:50.270435 MTRR: Fixed MSR 0x269 0x0606060606060606
2028 17:08:50.273786 MTRR: Fixed MSR 0x26a 0x0606060606060606
2029 17:08:50.277220 MTRR: Fixed MSR 0x26b 0x0606060606060606
2030 17:08:50.284032 MTRR: Fixed MSR 0x26c 0x0606060606060606
2031 17:08:50.287002 MTRR: Fixed MSR 0x26d 0x0606060606060606
2032 17:08:50.290693 MTRR: Fixed MSR 0x26e 0x0606060606060606
2033 17:08:50.293908 MTRR: Fixed MSR 0x26f 0x0606060606060606
2034 17:08:50.298230 CPU physical address size: 39 bits
2035 17:08:50.305004 call enable_fixed_mtrr()
2036 17:08:50.308624 CPU physical address size: 39 bits
2037 17:08:50.308710 Reading cr50 TPM mode
2038 17:08:50.311825 MTRR: Fixed MSR 0x250 0x0606060606060606
2039 17:08:50.318552 MTRR: Fixed MSR 0x250 0x0606060606060606
2040 17:08:50.321897 MTRR: Fixed MSR 0x258 0x0606060606060606
2041 17:08:50.325341 MTRR: Fixed MSR 0x259 0x0000000000000000
2042 17:08:50.328858 MTRR: Fixed MSR 0x268 0x0606060606060606
2043 17:08:50.335055 MTRR: Fixed MSR 0x269 0x0606060606060606
2044 17:08:50.338668 MTRR: Fixed MSR 0x26a 0x0606060606060606
2045 17:08:50.341793 MTRR: Fixed MSR 0x26b 0x0606060606060606
2046 17:08:50.345063 MTRR: Fixed MSR 0x26c 0x0606060606060606
2047 17:08:50.348306 MTRR: Fixed MSR 0x26d 0x0606060606060606
2048 17:08:50.355166 MTRR: Fixed MSR 0x26e 0x0606060606060606
2049 17:08:50.358592 MTRR: Fixed MSR 0x26f 0x0606060606060606
2050 17:08:50.362004 MTRR: Fixed MSR 0x258 0x0606060606060606
2051 17:08:50.365127 call enable_fixed_mtrr()
2052 17:08:50.368449 MTRR: Fixed MSR 0x259 0x0000000000000000
2053 17:08:50.374697 MTRR: Fixed MSR 0x268 0x0606060606060606
2054 17:08:50.378162 MTRR: Fixed MSR 0x269 0x0606060606060606
2055 17:08:50.381576 MTRR: Fixed MSR 0x26a 0x0606060606060606
2056 17:08:50.384993 MTRR: Fixed MSR 0x26b 0x0606060606060606
2057 17:08:50.391674 MTRR: Fixed MSR 0x26c 0x0606060606060606
2058 17:08:50.395125 MTRR: Fixed MSR 0x26d 0x0606060606060606
2059 17:08:50.398410 MTRR: Fixed MSR 0x26e 0x0606060606060606
2060 17:08:50.401725 MTRR: Fixed MSR 0x26f 0x0606060606060606
2061 17:08:50.405623 CPU physical address size: 39 bits
2062 17:08:50.412336 call enable_fixed_mtrr()
2063 17:08:50.415798 BS: BS_PAYLOAD_LOAD entry times (exec / console): 215 / 7 ms
2064 17:08:50.419087 CPU physical address size: 39 bits
2065 17:08:50.428930 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2066 17:08:50.431989 CPU physical address size: 39 bits
2067 17:08:50.435911 Checking segment from ROM address 0xffc02b38
2068 17:08:50.438633 Checking segment from ROM address 0xffc02b54
2069 17:08:50.445752 Loading segment from ROM address 0xffc02b38
2070 17:08:50.448670 code (compression=0)
2071 17:08:50.455381 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2072 17:08:50.465659 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2073 17:08:50.465751 it's not compressed!
2074 17:08:50.605781 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2075 17:08:50.612137 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2076 17:08:50.618579 Loading segment from ROM address 0xffc02b54
2077 17:08:50.618669 Entry Point 0x30000000
2078 17:08:50.622268 Loaded segments
2079 17:08:50.628780 BS: BS_PAYLOAD_LOAD run times (exec / console): 142 / 63 ms
2080 17:08:50.671902 Finalizing chipset.
2081 17:08:50.675076 Finalizing SMM.
2082 17:08:50.675155 APMC done.
2083 17:08:50.681689 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2084 17:08:50.685107 mp_park_aps done after 0 msecs.
2085 17:08:50.688002 Jumping to boot code at 0x30000000(0x76b25000)
2086 17:08:50.698202 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2087 17:08:50.698296
2088 17:08:50.698370
2089 17:08:50.698438
2090 17:08:50.701439 Starting depthcharge on Voema...
2091 17:08:50.701539
2092 17:08:50.701927 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2093 17:08:50.702045 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2094 17:08:50.702143 Setting prompt string to ['volteer:']
2095 17:08:50.702242 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2096 17:08:50.711624 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2097 17:08:50.711749
2098 17:08:50.717950 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2099 17:08:50.718083
2100 17:08:50.724798 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2101 17:08:50.724964
2102 17:08:50.727902 Failed to find eMMC card reader
2103 17:08:50.728117
2104 17:08:50.728336 Wipe memory regions:
2105 17:08:50.728472
2106 17:08:50.734926 [0x00000000001000, 0x000000000a0000)
2107 17:08:50.735243
2108 17:08:50.738152 [0x00000000100000, 0x00000030000000)
2109 17:08:50.763196
2110 17:08:50.765995 [0x00000032662db0, 0x000000769ef000)
2111 17:08:50.802263
2112 17:08:50.805319 [0x00000100000000, 0x00000280400000)
2113 17:08:51.007510
2114 17:08:51.010814 ec_init: CrosEC protocol v3 supported (256, 256)
2115 17:08:51.010903
2116 17:08:51.017249 update_port_state: port C0 state: usb enable 1 mux conn 0
2117 17:08:51.017352
2118 17:08:51.023994 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2119 17:08:51.028448
2120 17:08:51.031696 pmc_check_ipc_sts: STS_BUSY done after 1616 us
2121 17:08:51.031812
2122 17:08:51.034933 send_conn_disc_msg: pmc_send_cmd succeeded
2123 17:08:51.469299
2124 17:08:51.469768 R8152: Initializing
2125 17:08:51.470099
2126 17:08:51.472473 Version 9 (ocp_data = 6010)
2127 17:08:51.472885
2128 17:08:51.476134 R8152: Done initializing
2129 17:08:51.476549
2130 17:08:51.479307 Adding net device
2131 17:08:51.781965
2132 17:08:51.785069 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2133 17:08:51.785528
2134 17:08:51.785890
2135 17:08:51.786229
2136 17:08:51.788961 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2138 17:08:51.890421 volteer: tftpboot 192.168.201.1 12908839/tftp-deploy-ucpgdosc/kernel/bzImage 12908839/tftp-deploy-ucpgdosc/kernel/cmdline 12908839/tftp-deploy-ucpgdosc/ramdisk/ramdisk.cpio.gz
2139 17:08:51.890973 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2140 17:08:51.891398 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2141 17:08:51.896232 tftpboot 192.168.201.1 12908839/tftp-deploy-ucpgdosc/kernel/bzIploy-ucpgdosc/kernel/cmdline 12908839/tftp-deploy-ucpgdosc/ramdisk/ramdisk.cpio.gz
2142 17:08:51.896668
2143 17:08:51.896998 Waiting for link
2144 17:08:52.099254
2145 17:08:52.099728 done.
2146 17:08:52.100268
2147 17:08:52.100652 MAC: 00:e0:4c:71:a6:42
2148 17:08:52.101079
2149 17:08:52.102794 Sending DHCP discover... done.
2150 17:08:52.103205
2151 17:08:52.105890 Waiting for reply... done.
2152 17:08:52.106354
2153 17:08:52.109351 Sending DHCP request... done.
2154 17:08:52.109763
2155 17:08:52.112614 Waiting for reply... done.
2156 17:08:52.113023
2157 17:08:52.116028 My ip is 192.168.201.18
2158 17:08:52.116470
2159 17:08:52.119461 The DHCP server ip is 192.168.201.1
2160 17:08:52.119874
2161 17:08:52.122835 TFTP server IP predefined by user: 192.168.201.1
2162 17:08:52.123362
2163 17:08:52.129063 Bootfile predefined by user: 12908839/tftp-deploy-ucpgdosc/kernel/bzImage
2164 17:08:52.129538
2165 17:08:52.132485 Sending tftp read request... done.
2166 17:08:52.132897
2167 17:08:52.142530 Waiting for the transfer...
2168 17:08:52.142971
2169 17:08:52.496966 00000000 ################################################################
2170 17:08:52.497098
2171 17:08:52.745496 00080000 ################################################################
2172 17:08:52.745627
2173 17:08:53.011011 00100000 ################################################################
2174 17:08:53.011143
2175 17:08:53.259585 00180000 ################################################################
2176 17:08:53.259719
2177 17:08:53.521173 00200000 ################################################################
2178 17:08:53.521310
2179 17:08:53.765411 00280000 ################################################################
2180 17:08:53.765545
2181 17:08:54.011223 00300000 ################################################################
2182 17:08:54.011352
2183 17:08:54.277442 00380000 ################################################################
2184 17:08:54.277568
2185 17:08:54.544707 00400000 ################################################################
2186 17:08:54.544841
2187 17:08:54.798098 00480000 ################################################################
2188 17:08:54.798229
2189 17:08:55.083112 00500000 ################################################################
2190 17:08:55.083259
2191 17:08:55.344025 00580000 ################################################################
2192 17:08:55.344198
2193 17:08:55.611122 00600000 ################################################################
2194 17:08:55.611262
2195 17:08:55.858721 00680000 ################################################################
2196 17:08:55.858897
2197 17:08:56.096116 00700000 ################################################################
2198 17:08:56.096262
2199 17:08:56.335825 00780000 ################################################################
2200 17:08:56.335956
2201 17:08:56.598278 00800000 ################################################################
2202 17:08:56.598415
2203 17:08:56.810217 00880000 ######################################################## done.
2204 17:08:56.810367
2205 17:08:56.813661 The bootfile was 9367440 bytes long.
2206 17:08:56.817185
2207 17:08:56.820280 Sending tftp read request... done.
2208 17:08:56.820360
2209 17:08:56.820423 Waiting for the transfer...
2210 17:08:56.820482
2211 17:08:57.090735 00000000 ################################################################
2212 17:08:57.090982
2213 17:08:57.348316 00080000 ################################################################
2214 17:08:57.348574
2215 17:08:57.594685 00100000 ################################################################
2216 17:08:57.594929
2217 17:08:57.842744 00180000 ################################################################
2218 17:08:57.842918
2219 17:08:58.086642 00200000 ################################################################
2220 17:08:58.086806
2221 17:08:58.334677 00280000 ################################################################
2222 17:08:58.334824
2223 17:08:58.578499 00300000 ################################################################
2224 17:08:58.578642
2225 17:08:58.823009 00380000 ################################################################
2226 17:08:58.823152
2227 17:08:59.067877 00400000 ################################################################
2228 17:08:59.068018
2229 17:08:59.313588 00480000 ################################################################
2230 17:08:59.313720
2231 17:08:59.557064 00500000 ################################################################
2232 17:08:59.557199
2233 17:08:59.804461 00580000 ################################################################
2234 17:08:59.804601
2235 17:09:00.048919 00600000 ################################################################
2236 17:09:00.049060
2237 17:09:00.295796 00680000 ################################################################
2238 17:09:00.295924
2239 17:09:00.539685 00700000 ################################################################
2240 17:09:00.539818
2241 17:09:00.782716 00780000 ################################################################
2242 17:09:00.782857
2243 17:09:00.979931 00800000 #################################################### done.
2244 17:09:00.980144
2245 17:09:00.983325 Sending tftp read request... done.
2246 17:09:00.983407
2247 17:09:00.986499 Waiting for the transfer...
2248 17:09:00.986581
2249 17:09:00.986645 00000000 # done.
2250 17:09:00.986708
2251 17:09:00.996204 Command line loaded dynamically from TFTP file: 12908839/tftp-deploy-ucpgdosc/kernel/cmdline
2252 17:09:00.996293
2253 17:09:01.012823 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2254 17:09:01.017755
2255 17:09:01.020979 Shutting down all USB controllers.
2256 17:09:01.021112
2257 17:09:01.021217 Removing current net device
2258 17:09:01.021318
2259 17:09:01.024067 Finalizing coreboot
2260 17:09:01.024218
2261 17:09:01.030580 Exiting depthcharge with code 4 at timestamp: 18977205
2262 17:09:01.030750
2263 17:09:01.030884
2264 17:09:01.031010 Starting kernel ...
2265 17:09:01.031133
2266 17:09:01.031251
2267 17:09:01.031836 end: 2.2.4 bootloader-commands (duration 00:00:10) [common]
2268 17:09:01.032031 start: 2.2.5 auto-login-action (timeout 00:04:34) [common]
2269 17:09:01.032209 Setting prompt string to ['Linux version [0-9]']
2270 17:09:01.032350 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2271 17:09:01.032494 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2273 17:13:35.033108 end: 2.2.5 auto-login-action (duration 00:04:34) [common]
2275 17:13:35.034124 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 274 seconds'
2277 17:13:35.034936 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2280 17:13:35.035646 end: 2 depthcharge-action (duration 00:05:00) [common]
2282 17:13:35.035860 Cleaning after the job
2283 17:13:35.035947 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12908839/tftp-deploy-ucpgdosc/ramdisk
2284 17:13:35.037290 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12908839/tftp-deploy-ucpgdosc/kernel
2285 17:13:35.038948 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12908839/tftp-deploy-ucpgdosc/modules
2286 17:13:35.039289 start: 5.1 power-off (timeout 00:00:30) [common]
2287 17:13:35.039446 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-7' '--port=1' '--command=off'
2288 17:13:35.122632 >> Command sent successfully.
2289 17:13:35.133282 Returned 0 in 0 seconds
2290 17:13:35.234695 end: 5.1 power-off (duration 00:00:00) [common]
2292 17:13:35.236114 start: 5.2 read-feedback (timeout 00:10:00) [common]
2293 17:13:35.237323 Listened to connection for namespace 'common' for up to 1s
2294 17:13:36.237998 Finalising connection for namespace 'common'
2295 17:13:36.238640 Disconnecting from shell: Finalise
2296 17:13:36.239020
2297 17:13:36.340033 end: 5.2 read-feedback (duration 00:00:01) [common]
2298 17:13:36.340667 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12908839
2299 17:13:36.361490 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12908839
2300 17:13:36.361669 JobError: Your job cannot terminate cleanly.