Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
1 17:08:25.984792 lava-dispatcher, installed at version: 2024.01
2 17:08:25.984991 start: 0 validate
3 17:08:25.985131 Start time: 2024-03-01 17:08:25.985122+00:00 (UTC)
4 17:08:25.985255 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:08:25.985382 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230623.0%2Famd64%2Frootfs.cpio.gz exists
6 17:08:26.244378 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:08:26.244547 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2245-gb01c108f53cc0%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:08:33.245172 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:08:33.245355 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2245-gb01c108f53cc0%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 17:08:34.246753 validate duration: 8.26
12 17:08:34.247021 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 17:08:34.247135 start: 1.1 download-retry (timeout 00:10:00) [common]
14 17:08:34.247228 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 17:08:34.247355 Not decompressing ramdisk as can be used compressed.
16 17:08:34.247438 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230623.0/amd64/rootfs.cpio.gz
17 17:08:34.247500 saving as /var/lib/lava/dispatcher/tmp/12908838/tftp-deploy-2gtill5s/ramdisk/rootfs.cpio.gz
18 17:08:34.247562 total size: 35760064 (34 MB)
19 17:08:34.248656 progress 0 % (0 MB)
20 17:08:34.258273 progress 5 % (1 MB)
21 17:08:34.267902 progress 10 % (3 MB)
22 17:08:34.277285 progress 15 % (5 MB)
23 17:08:34.286711 progress 20 % (6 MB)
24 17:08:34.296154 progress 25 % (8 MB)
25 17:08:34.305668 progress 30 % (10 MB)
26 17:08:34.314976 progress 35 % (11 MB)
27 17:08:34.324535 progress 40 % (13 MB)
28 17:08:34.333915 progress 45 % (15 MB)
29 17:08:34.343116 progress 50 % (17 MB)
30 17:08:34.352576 progress 55 % (18 MB)
31 17:08:34.361862 progress 60 % (20 MB)
32 17:08:34.371277 progress 65 % (22 MB)
33 17:08:34.380528 progress 70 % (23 MB)
34 17:08:34.389896 progress 75 % (25 MB)
35 17:08:34.399331 progress 80 % (27 MB)
36 17:08:34.408715 progress 85 % (29 MB)
37 17:08:34.418066 progress 90 % (30 MB)
38 17:08:34.427090 progress 95 % (32 MB)
39 17:08:34.436292 progress 100 % (34 MB)
40 17:08:34.436443 34 MB downloaded in 0.19 s (180.56 MB/s)
41 17:08:34.436606 end: 1.1.1 http-download (duration 00:00:00) [common]
43 17:08:34.436877 end: 1.1 download-retry (duration 00:00:00) [common]
44 17:08:34.436961 start: 1.2 download-retry (timeout 00:10:00) [common]
45 17:08:34.437042 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 17:08:34.437182 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2245-gb01c108f53cc0/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 17:08:34.437251 saving as /var/lib/lava/dispatcher/tmp/12908838/tftp-deploy-2gtill5s/kernel/bzImage
48 17:08:34.437311 total size: 9367440 (8 MB)
49 17:08:34.437370 No compression specified
50 17:08:34.438491 progress 0 % (0 MB)
51 17:08:34.441006 progress 5 % (0 MB)
52 17:08:34.443447 progress 10 % (0 MB)
53 17:08:34.445896 progress 15 % (1 MB)
54 17:08:34.448538 progress 20 % (1 MB)
55 17:08:34.450997 progress 25 % (2 MB)
56 17:08:34.453467 progress 30 % (2 MB)
57 17:08:34.456129 progress 35 % (3 MB)
58 17:08:34.458543 progress 40 % (3 MB)
59 17:08:34.461015 progress 45 % (4 MB)
60 17:08:34.463456 progress 50 % (4 MB)
61 17:08:34.466115 progress 55 % (4 MB)
62 17:08:34.468592 progress 60 % (5 MB)
63 17:08:34.470976 progress 65 % (5 MB)
64 17:08:34.473519 progress 70 % (6 MB)
65 17:08:34.475915 progress 75 % (6 MB)
66 17:08:34.478297 progress 80 % (7 MB)
67 17:08:34.480685 progress 85 % (7 MB)
68 17:08:34.483229 progress 90 % (8 MB)
69 17:08:34.485644 progress 95 % (8 MB)
70 17:08:34.488186 progress 100 % (8 MB)
71 17:08:34.488419 8 MB downloaded in 0.05 s (174.81 MB/s)
72 17:08:34.488580 end: 1.2.1 http-download (duration 00:00:00) [common]
74 17:08:34.488832 end: 1.2 download-retry (duration 00:00:00) [common]
75 17:08:34.488937 start: 1.3 download-retry (timeout 00:10:00) [common]
76 17:08:34.489041 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 17:08:34.489193 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2245-gb01c108f53cc0/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 17:08:34.489267 saving as /var/lib/lava/dispatcher/tmp/12908838/tftp-deploy-2gtill5s/modules/modules.tar
79 17:08:34.489364 total size: 250960 (0 MB)
80 17:08:34.489464 Using unxz to decompress xz
81 17:08:34.493737 progress 13 % (0 MB)
82 17:08:34.494166 progress 26 % (0 MB)
83 17:08:34.494414 progress 39 % (0 MB)
84 17:08:34.496044 progress 52 % (0 MB)
85 17:08:34.498061 progress 65 % (0 MB)
86 17:08:34.499849 progress 78 % (0 MB)
87 17:08:34.501753 progress 91 % (0 MB)
88 17:08:34.503593 progress 100 % (0 MB)
89 17:08:34.509111 0 MB downloaded in 0.02 s (12.12 MB/s)
90 17:08:34.509360 end: 1.3.1 http-download (duration 00:00:00) [common]
92 17:08:34.509658 end: 1.3 download-retry (duration 00:00:00) [common]
93 17:08:34.509764 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 17:08:34.509883 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 17:08:34.509984 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 17:08:34.510091 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 17:08:34.510381 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12908838/lava-overlay-d2vsfwn9
98 17:08:34.510560 makedir: /var/lib/lava/dispatcher/tmp/12908838/lava-overlay-d2vsfwn9/lava-12908838/bin
99 17:08:34.510711 makedir: /var/lib/lava/dispatcher/tmp/12908838/lava-overlay-d2vsfwn9/lava-12908838/tests
100 17:08:34.510851 makedir: /var/lib/lava/dispatcher/tmp/12908838/lava-overlay-d2vsfwn9/lava-12908838/results
101 17:08:34.511011 Creating /var/lib/lava/dispatcher/tmp/12908838/lava-overlay-d2vsfwn9/lava-12908838/bin/lava-add-keys
102 17:08:34.511199 Creating /var/lib/lava/dispatcher/tmp/12908838/lava-overlay-d2vsfwn9/lava-12908838/bin/lava-add-sources
103 17:08:34.511348 Creating /var/lib/lava/dispatcher/tmp/12908838/lava-overlay-d2vsfwn9/lava-12908838/bin/lava-background-process-start
104 17:08:34.511496 Creating /var/lib/lava/dispatcher/tmp/12908838/lava-overlay-d2vsfwn9/lava-12908838/bin/lava-background-process-stop
105 17:08:34.511645 Creating /var/lib/lava/dispatcher/tmp/12908838/lava-overlay-d2vsfwn9/lava-12908838/bin/lava-common-functions
106 17:08:34.511815 Creating /var/lib/lava/dispatcher/tmp/12908838/lava-overlay-d2vsfwn9/lava-12908838/bin/lava-echo-ipv4
107 17:08:34.511989 Creating /var/lib/lava/dispatcher/tmp/12908838/lava-overlay-d2vsfwn9/lava-12908838/bin/lava-install-packages
108 17:08:34.512196 Creating /var/lib/lava/dispatcher/tmp/12908838/lava-overlay-d2vsfwn9/lava-12908838/bin/lava-installed-packages
109 17:08:34.512368 Creating /var/lib/lava/dispatcher/tmp/12908838/lava-overlay-d2vsfwn9/lava-12908838/bin/lava-os-build
110 17:08:34.512540 Creating /var/lib/lava/dispatcher/tmp/12908838/lava-overlay-d2vsfwn9/lava-12908838/bin/lava-probe-channel
111 17:08:34.512715 Creating /var/lib/lava/dispatcher/tmp/12908838/lava-overlay-d2vsfwn9/lava-12908838/bin/lava-probe-ip
112 17:08:34.512909 Creating /var/lib/lava/dispatcher/tmp/12908838/lava-overlay-d2vsfwn9/lava-12908838/bin/lava-target-ip
113 17:08:34.513075 Creating /var/lib/lava/dispatcher/tmp/12908838/lava-overlay-d2vsfwn9/lava-12908838/bin/lava-target-mac
114 17:08:34.513238 Creating /var/lib/lava/dispatcher/tmp/12908838/lava-overlay-d2vsfwn9/lava-12908838/bin/lava-target-storage
115 17:08:34.513406 Creating /var/lib/lava/dispatcher/tmp/12908838/lava-overlay-d2vsfwn9/lava-12908838/bin/lava-test-case
116 17:08:34.513567 Creating /var/lib/lava/dispatcher/tmp/12908838/lava-overlay-d2vsfwn9/lava-12908838/bin/lava-test-event
117 17:08:34.513724 Creating /var/lib/lava/dispatcher/tmp/12908838/lava-overlay-d2vsfwn9/lava-12908838/bin/lava-test-feedback
118 17:08:34.513882 Creating /var/lib/lava/dispatcher/tmp/12908838/lava-overlay-d2vsfwn9/lava-12908838/bin/lava-test-raise
119 17:08:34.514041 Creating /var/lib/lava/dispatcher/tmp/12908838/lava-overlay-d2vsfwn9/lava-12908838/bin/lava-test-reference
120 17:08:34.514202 Creating /var/lib/lava/dispatcher/tmp/12908838/lava-overlay-d2vsfwn9/lava-12908838/bin/lava-test-runner
121 17:08:34.514361 Creating /var/lib/lava/dispatcher/tmp/12908838/lava-overlay-d2vsfwn9/lava-12908838/bin/lava-test-set
122 17:08:34.514524 Creating /var/lib/lava/dispatcher/tmp/12908838/lava-overlay-d2vsfwn9/lava-12908838/bin/lava-test-shell
123 17:08:34.514690 Updating /var/lib/lava/dispatcher/tmp/12908838/lava-overlay-d2vsfwn9/lava-12908838/bin/lava-install-packages (oe)
124 17:08:34.514875 Updating /var/lib/lava/dispatcher/tmp/12908838/lava-overlay-d2vsfwn9/lava-12908838/bin/lava-installed-packages (oe)
125 17:08:34.515027 Creating /var/lib/lava/dispatcher/tmp/12908838/lava-overlay-d2vsfwn9/lava-12908838/environment
126 17:08:34.515154 LAVA metadata
127 17:08:34.515257 - LAVA_JOB_ID=12908838
128 17:08:34.515350 - LAVA_DISPATCHER_IP=192.168.201.1
129 17:08:34.515485 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 17:08:34.515576 skipped lava-vland-overlay
131 17:08:34.515681 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 17:08:34.515762 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 17:08:34.515825 skipped lava-multinode-overlay
134 17:08:34.515896 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 17:08:34.515983 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 17:08:34.516063 Loading test definitions
137 17:08:34.516194 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 17:08:34.516268 Using /lava-12908838 at stage 0
139 17:08:34.516575 uuid=12908838_1.4.2.3.1 testdef=None
140 17:08:34.516661 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 17:08:34.516745 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 17:08:34.517329 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 17:08:34.517672 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 17:08:34.518446 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 17:08:34.518672 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 17:08:34.519345 runner path: /var/lib/lava/dispatcher/tmp/12908838/lava-overlay-d2vsfwn9/lava-12908838/0/tests/0_cros-ec test_uuid 12908838_1.4.2.3.1
149 17:08:34.519504 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 17:08:34.519707 Creating lava-test-runner.conf files
152 17:08:34.519768 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12908838/lava-overlay-d2vsfwn9/lava-12908838/0 for stage 0
153 17:08:34.519856 - 0_cros-ec
154 17:08:34.519952 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
155 17:08:34.520034 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
156 17:08:34.527788 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
157 17:08:34.527917 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
158 17:08:34.528030 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
159 17:08:34.528174 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
160 17:08:34.528270 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
161 17:08:35.612540 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
162 17:08:35.612971 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
163 17:08:35.613112 extracting modules file /var/lib/lava/dispatcher/tmp/12908838/tftp-deploy-2gtill5s/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12908838/extract-overlay-ramdisk-cjq93zy6/ramdisk
164 17:08:35.627429 end: 1.4.4 extract-modules (duration 00:00:00) [common]
165 17:08:35.627562 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
166 17:08:35.627663 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12908838/compress-overlay-o7u51orp/overlay-1.4.2.4.tar.gz to ramdisk
167 17:08:35.627753 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12908838/compress-overlay-o7u51orp/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12908838/extract-overlay-ramdisk-cjq93zy6/ramdisk
168 17:08:35.634552 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
169 17:08:35.634678 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
170 17:08:35.634788 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
171 17:08:35.634895 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
172 17:08:35.634988 Building ramdisk /var/lib/lava/dispatcher/tmp/12908838/extract-overlay-ramdisk-cjq93zy6/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12908838/extract-overlay-ramdisk-cjq93zy6/ramdisk
173 17:08:36.167404 >> 184082 blocks
174 17:08:39.702432 rename /var/lib/lava/dispatcher/tmp/12908838/extract-overlay-ramdisk-cjq93zy6/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12908838/tftp-deploy-2gtill5s/ramdisk/ramdisk.cpio.gz
175 17:08:39.702900 end: 1.4.7 compress-ramdisk (duration 00:00:04) [common]
176 17:08:39.703027 start: 1.4.8 prepare-kernel (timeout 00:09:55) [common]
177 17:08:39.703127 start: 1.4.8.1 prepare-fit (timeout 00:09:55) [common]
178 17:08:39.703255 No mkimage arch provided, not using FIT.
179 17:08:39.703352 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
180 17:08:39.703434 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
181 17:08:39.703538 end: 1.4 prepare-tftp-overlay (duration 00:00:05) [common]
182 17:08:39.703624 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:55) [common]
183 17:08:39.703707 No LXC device requested
184 17:08:39.703784 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
185 17:08:39.703869 start: 1.6 deploy-device-env (timeout 00:09:55) [common]
186 17:08:39.703949 end: 1.6 deploy-device-env (duration 00:00:00) [common]
187 17:08:39.704061 Checking files for TFTP limit of 4294967296 bytes.
188 17:08:39.704481 end: 1 tftp-deploy (duration 00:00:05) [common]
189 17:08:39.704593 start: 2 depthcharge-action (timeout 00:05:00) [common]
190 17:08:39.704704 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
191 17:08:39.704829 substitutions:
192 17:08:39.704895 - {DTB}: None
193 17:08:39.704958 - {INITRD}: 12908838/tftp-deploy-2gtill5s/ramdisk/ramdisk.cpio.gz
194 17:08:39.705016 - {KERNEL}: 12908838/tftp-deploy-2gtill5s/kernel/bzImage
195 17:08:39.705073 - {LAVA_MAC}: None
196 17:08:39.705131 - {PRESEED_CONFIG}: None
197 17:08:39.705185 - {PRESEED_LOCAL}: None
198 17:08:39.705239 - {RAMDISK}: 12908838/tftp-deploy-2gtill5s/ramdisk/ramdisk.cpio.gz
199 17:08:39.705293 - {ROOT_PART}: None
200 17:08:39.705346 - {ROOT}: None
201 17:08:39.705399 - {SERVER_IP}: 192.168.201.1
202 17:08:39.705451 - {TEE}: None
203 17:08:39.705504 Parsed boot commands:
204 17:08:39.705556 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
205 17:08:39.705732 Parsed boot commands: tftpboot 192.168.201.1 12908838/tftp-deploy-2gtill5s/kernel/bzImage 12908838/tftp-deploy-2gtill5s/kernel/cmdline 12908838/tftp-deploy-2gtill5s/ramdisk/ramdisk.cpio.gz
206 17:08:39.705817 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
207 17:08:39.705899 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
208 17:08:39.705990 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
209 17:08:39.706070 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
210 17:08:39.706140 Not connected, no need to disconnect.
211 17:08:39.706217 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
212 17:08:39.706295 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
213 17:08:39.706365 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-9'
214 17:08:39.710564 Setting prompt string to ['lava-test: # ']
215 17:08:39.710923 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
216 17:08:39.711029 end: 2.2.1 reset-connection (duration 00:00:00) [common]
217 17:08:39.711127 start: 2.2.2 reset-device (timeout 00:05:00) [common]
218 17:08:39.711215 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
219 17:08:39.711471 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=reboot'
220 17:08:44.863950 >> Command sent successfully.
221 17:08:44.876123 Returned 0 in 5 seconds
222 17:08:44.977186 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
224 17:08:44.978250 end: 2.2.2 reset-device (duration 00:00:05) [common]
225 17:08:44.978653 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
226 17:08:44.978997 Setting prompt string to 'Starting depthcharge on Voema...'
227 17:08:44.979378 Changing prompt to 'Starting depthcharge on Voema...'
228 17:08:44.979702 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
229 17:08:44.980739 [Enter `^Ec?' for help]
230 17:08:46.531946
231 17:08:46.532141
232 17:08:46.541698 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
233 17:08:46.548612 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
234 17:08:46.551428 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
235 17:08:46.554941 CPU: AES supported, TXT NOT supported, VT supported
236 17:08:46.561768 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
237 17:08:46.568516 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
238 17:08:46.571352 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
239 17:08:46.574730 VBOOT: Loading verstage.
240 17:08:46.581561 FMAP: Found "FLASH" version 1.1 at 0x1804000.
241 17:08:46.585115 FMAP: base = 0x0 size = 0x2000000 #areas = 32
242 17:08:46.588581 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
243 17:08:46.598806 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
244 17:08:46.606120 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
245 17:08:46.606631
246 17:08:46.607120
247 17:08:46.618954 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
248 17:08:46.632537 Probing TPM: . done!
249 17:08:46.636095 TPM ready after 0 ms
250 17:08:46.639527 Connected to device vid:did:rid of 1ae0:0028:00
251 17:08:46.650426 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
252 17:08:46.657283 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
253 17:08:46.660484 Initialized TPM device CR50 revision 0
254 17:08:46.711876 tlcl_send_startup: Startup return code is 0
255 17:08:46.712577 TPM: setup succeeded
256 17:08:46.727544 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
257 17:08:46.742989 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
258 17:08:46.755976 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
259 17:08:46.766691 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
260 17:08:46.770071 Chrome EC: UHEPI supported
261 17:08:46.773865 Phase 1
262 17:08:46.777467 FMAP: area GBB found @ 1805000 (458752 bytes)
263 17:08:46.787140 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
264 17:08:46.793878 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
265 17:08:46.800140 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
266 17:08:46.806991 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
267 17:08:46.810046 Recovery requested (1009000e)
268 17:08:46.819542 TPM: Extending digest for VBOOT: boot mode into PCR 0
269 17:08:46.825874 tlcl_extend: response is 0
270 17:08:46.832647 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
271 17:08:46.842384 tlcl_extend: response is 0
272 17:08:46.849013 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
273 17:08:46.855218 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
274 17:08:46.861937 BS: verstage times (exec / console): total (unknown) / 142 ms
275 17:08:46.862050
276 17:08:46.862145
277 17:08:46.875079 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
278 17:08:46.881952 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
279 17:08:46.885194 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
280 17:08:46.888420 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
281 17:08:46.895367 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
282 17:08:46.898371 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
283 17:08:46.901754 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
284 17:08:46.905452 TCO_STS: 0000 0000
285 17:08:46.908180 GEN_PMCON: d0015038 00002200
286 17:08:46.911374 GBLRST_CAUSE: 00000000 00000000
287 17:08:46.914754 HPR_CAUSE0: 00000000
288 17:08:46.914882 prev_sleep_state 5
289 17:08:46.918078 Boot Count incremented to 27085
290 17:08:46.924808 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
291 17:08:46.931497 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
292 17:08:46.941609 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
293 17:08:46.947899 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
294 17:08:46.951388 Chrome EC: UHEPI supported
295 17:08:46.957949 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
296 17:08:46.969992 Probing TPM: done!
297 17:08:46.977091 Connected to device vid:did:rid of 1ae0:0028:00
298 17:08:46.987007 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
299 17:08:46.994329 Initialized TPM device CR50 revision 0
300 17:08:47.004252 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
301 17:08:47.010550 MRC: Hash idx 0x100b comparison successful.
302 17:08:47.013858 MRC cache found, size faa8
303 17:08:47.013939 bootmode is set to: 2
304 17:08:47.017596 SPD index = 0
305 17:08:47.024010 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
306 17:08:47.027467 SPD: module type is LPDDR4X
307 17:08:47.030772 SPD: module part number is MT53E512M64D4NW-046
308 17:08:47.037539 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
309 17:08:47.040809 SPD: device width 16 bits, bus width 16 bits
310 17:08:47.046969 SPD: module size is 1024 MB (per channel)
311 17:08:47.478589 CBMEM:
312 17:08:47.481580 IMD: root @ 0x76fff000 254 entries.
313 17:08:47.485138 IMD: root @ 0x76ffec00 62 entries.
314 17:08:47.488287 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
315 17:08:47.494798 FMAP: area RW_VPD found @ f35000 (8192 bytes)
316 17:08:47.498515 External stage cache:
317 17:08:47.501566 IMD: root @ 0x7b3ff000 254 entries.
318 17:08:47.504637 IMD: root @ 0x7b3fec00 62 entries.
319 17:08:47.520328 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
320 17:08:47.527094 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
321 17:08:47.533258 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
322 17:08:47.547990 MRC: 'RECOVERY_MRC_CACHE' does not need update.
323 17:08:47.551246 cse_lite: Skip switching to RW in the recovery path
324 17:08:47.554596 8 DIMMs found
325 17:08:47.554680 SMM Memory Map
326 17:08:47.558052 SMRAM : 0x7b000000 0x800000
327 17:08:47.561328 Subregion 0: 0x7b000000 0x200000
328 17:08:47.565192 Subregion 1: 0x7b200000 0x200000
329 17:08:47.567994 Subregion 2: 0x7b400000 0x400000
330 17:08:47.571450 top_of_ram = 0x77000000
331 17:08:47.577994 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
332 17:08:47.581274 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
333 17:08:47.588103 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
334 17:08:47.591510 MTRR Range: Start=ff000000 End=0 (Size 1000000)
335 17:08:47.601579 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
336 17:08:47.608218 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
337 17:08:47.617631 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
338 17:08:47.620980 Processing 211 relocs. Offset value of 0x74c0b000
339 17:08:47.630391 BS: romstage times (exec / console): total (unknown) / 277 ms
340 17:08:47.636589
341 17:08:47.636675
342 17:08:47.646244 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
343 17:08:47.649705 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
344 17:08:47.659183 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
345 17:08:47.665894 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
346 17:08:47.672654 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
347 17:08:47.679478 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
348 17:08:47.726479 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
349 17:08:47.732750 Processing 5008 relocs. Offset value of 0x75d98000
350 17:08:47.736353 BS: postcar times (exec / console): total (unknown) / 59 ms
351 17:08:47.739744
352 17:08:47.739827
353 17:08:47.749917 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
354 17:08:47.750031 Normal boot
355 17:08:47.752986 FW_CONFIG value is 0x804c02
356 17:08:47.756663 PCI: 00:07.0 disabled by fw_config
357 17:08:47.760113 PCI: 00:07.1 disabled by fw_config
358 17:08:47.763428 PCI: 00:0d.2 disabled by fw_config
359 17:08:47.766341 PCI: 00:1c.7 disabled by fw_config
360 17:08:47.773002 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
361 17:08:47.779739 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
362 17:08:47.783163 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
363 17:08:47.786413 GENERIC: 0.0 disabled by fw_config
364 17:08:47.789855 GENERIC: 1.0 disabled by fw_config
365 17:08:47.796547 fw_config match found: DB_USB=USB3_ACTIVE
366 17:08:47.799727 fw_config match found: DB_USB=USB3_ACTIVE
367 17:08:47.802894 fw_config match found: DB_USB=USB3_ACTIVE
368 17:08:47.806315 fw_config match found: DB_USB=USB3_ACTIVE
369 17:08:47.813089 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
370 17:08:47.819489 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
371 17:08:47.829750 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
372 17:08:47.835998 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
373 17:08:47.839434 microcode: sig=0x806c1 pf=0x80 revision=0x86
374 17:08:47.846090 microcode: Update skipped, already up-to-date
375 17:08:47.852909 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
376 17:08:47.880095 Detected 4 core, 8 thread CPU.
377 17:08:47.882937 Setting up SMI for CPU
378 17:08:47.886349 IED base = 0x7b400000
379 17:08:47.886433 IED size = 0x00400000
380 17:08:47.889523 Will perform SMM setup.
381 17:08:47.896243 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
382 17:08:47.903067 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
383 17:08:47.909457 Processing 16 relocs. Offset value of 0x00030000
384 17:08:47.912874 Attempting to start 7 APs
385 17:08:47.916172 Waiting for 10ms after sending INIT.
386 17:08:47.932165 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
387 17:08:47.932261 done.
388 17:08:47.935331 AP: slot 7 apic_id 5.
389 17:08:47.938388 AP: slot 4 apic_id 4.
390 17:08:47.938467 AP: slot 2 apic_id 3.
391 17:08:47.941835 AP: slot 5 apic_id 2.
392 17:08:47.945156 Waiting for 2nd SIPI to complete...done.
393 17:08:47.948522 AP: slot 6 apic_id 6.
394 17:08:47.951740 AP: slot 3 apic_id 7.
395 17:08:47.958625 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
396 17:08:47.964925 Processing 13 relocs. Offset value of 0x00038000
397 17:08:47.968313 Unable to locate Global NVS
398 17:08:47.975030 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
399 17:08:47.978249 Installing permanent SMM handler to 0x7b000000
400 17:08:47.988431 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
401 17:08:47.991753 Processing 794 relocs. Offset value of 0x7b010000
402 17:08:48.001583 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
403 17:08:48.005097 Processing 13 relocs. Offset value of 0x7b008000
404 17:08:48.011559 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
405 17:08:48.018210 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
406 17:08:48.021097 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
407 17:08:48.027775 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
408 17:08:48.034535 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
409 17:08:48.041172 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
410 17:08:48.048186 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
411 17:08:48.048275 Unable to locate Global NVS
412 17:08:48.057524 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
413 17:08:48.061134 Clearing SMI status registers
414 17:08:48.061255 SMI_STS: PM1
415 17:08:48.064349 PM1_STS: PWRBTN
416 17:08:48.071199 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
417 17:08:48.074545 In relocation handler: CPU 0
418 17:08:48.077377 New SMBASE=0x7b000000 IEDBASE=0x7b400000
419 17:08:48.084069 Writing SMRR. base = 0x7b000006, mask=0xff800c00
420 17:08:48.087463 Relocation complete.
421 17:08:48.094018 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
422 17:08:48.097365 In relocation handler: CPU 1
423 17:08:48.100684 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
424 17:08:48.100787 Relocation complete.
425 17:08:48.110919 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
426 17:08:48.114268 In relocation handler: CPU 2
427 17:08:48.117471 New SMBASE=0x7afff800 IEDBASE=0x7b400000
428 17:08:48.117549 Relocation complete.
429 17:08:48.127431 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
430 17:08:48.130357 In relocation handler: CPU 5
431 17:08:48.133690 New SMBASE=0x7affec00 IEDBASE=0x7b400000
432 17:08:48.137120 Writing SMRR. base = 0x7b000006, mask=0xff800c00
433 17:08:48.140463 Relocation complete.
434 17:08:48.147000 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
435 17:08:48.150335 In relocation handler: CPU 4
436 17:08:48.153754 New SMBASE=0x7afff000 IEDBASE=0x7b400000
437 17:08:48.160080 Writing SMRR. base = 0x7b000006, mask=0xff800c00
438 17:08:48.160173 Relocation complete.
439 17:08:48.170110 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
440 17:08:48.170190 In relocation handler: CPU 7
441 17:08:48.176883 New SMBASE=0x7affe400 IEDBASE=0x7b400000
442 17:08:48.176968 Relocation complete.
443 17:08:48.186867 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
444 17:08:48.186952 In relocation handler: CPU 6
445 17:08:48.193588 New SMBASE=0x7affe800 IEDBASE=0x7b400000
446 17:08:48.197046 Writing SMRR. base = 0x7b000006, mask=0xff800c00
447 17:08:48.199848 Relocation complete.
448 17:08:48.206583 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
449 17:08:48.209949 In relocation handler: CPU 3
450 17:08:48.213930 New SMBASE=0x7afff400 IEDBASE=0x7b400000
451 17:08:48.217349 Relocation complete.
452 17:08:48.217432 Initializing CPU #0
453 17:08:48.220741 CPU: vendor Intel device 806c1
454 17:08:48.224039 CPU: family 06, model 8c, stepping 01
455 17:08:48.227268 Clearing out pending MCEs
456 17:08:48.231031 Setting up local APIC...
457 17:08:48.233894 apic_id: 0x00 done.
458 17:08:48.233978 Turbo is available but hidden
459 17:08:48.237268 Turbo is available and visible
460 17:08:48.243965 microcode: Update skipped, already up-to-date
461 17:08:48.244049 CPU #0 initialized
462 17:08:48.247187 Initializing CPU #4
463 17:08:48.250409 Initializing CPU #7
464 17:08:48.253772 CPU: vendor Intel device 806c1
465 17:08:48.257123 CPU: family 06, model 8c, stepping 01
466 17:08:48.260434 CPU: vendor Intel device 806c1
467 17:08:48.263638 CPU: family 06, model 8c, stepping 01
468 17:08:48.266939 Clearing out pending MCEs
469 17:08:48.267028 Clearing out pending MCEs
470 17:08:48.270564 Setting up local APIC...
471 17:08:48.273610 Initializing CPU #2
472 17:08:48.273695 Initializing CPU #5
473 17:08:48.277297 CPU: vendor Intel device 806c1
474 17:08:48.283542 CPU: family 06, model 8c, stepping 01
475 17:08:48.286848 CPU: vendor Intel device 806c1
476 17:08:48.290388 CPU: family 06, model 8c, stepping 01
477 17:08:48.290471 Clearing out pending MCEs
478 17:08:48.293449 Clearing out pending MCEs
479 17:08:48.296923 Setting up local APIC...
480 17:08:48.299983 apic_id: 0x04 done.
481 17:08:48.300093 Setting up local APIC...
482 17:08:48.303411 Setting up local APIC...
483 17:08:48.306841 Initializing CPU #1
484 17:08:48.306930 apic_id: 0x05 done.
485 17:08:48.313556 microcode: Update skipped, already up-to-date
486 17:08:48.317047 microcode: Update skipped, already up-to-date
487 17:08:48.320431 CPU #4 initialized
488 17:08:48.320511 CPU #7 initialized
489 17:08:48.323731 Initializing CPU #6
490 17:08:48.327312 Initializing CPU #3
491 17:08:48.330543 CPU: vendor Intel device 806c1
492 17:08:48.333694 CPU: family 06, model 8c, stepping 01
493 17:08:48.337089 CPU: vendor Intel device 806c1
494 17:08:48.340588 CPU: family 06, model 8c, stepping 01
495 17:08:48.343349 Clearing out pending MCEs
496 17:08:48.343463 Clearing out pending MCEs
497 17:08:48.346627 Setting up local APIC...
498 17:08:48.349994 apic_id: 0x02 done.
499 17:08:48.350131 apic_id: 0x03 done.
500 17:08:48.357363 microcode: Update skipped, already up-to-date
501 17:08:48.360090 microcode: Update skipped, already up-to-date
502 17:08:48.363357 CPU #5 initialized
503 17:08:48.363568 CPU #2 initialized
504 17:08:48.366800 Setting up local APIC...
505 17:08:48.370161 CPU: vendor Intel device 806c1
506 17:08:48.373469 CPU: family 06, model 8c, stepping 01
507 17:08:48.376828 apic_id: 0x06 done.
508 17:08:48.380132 apic_id: 0x07 done.
509 17:08:48.383409 microcode: Update skipped, already up-to-date
510 17:08:48.386804 microcode: Update skipped, already up-to-date
511 17:08:48.390181 CPU #6 initialized
512 17:08:48.393471 CPU #3 initialized
513 17:08:48.394005 Clearing out pending MCEs
514 17:08:48.396811 Setting up local APIC...
515 17:08:48.400168 apic_id: 0x01 done.
516 17:08:48.403661 microcode: Update skipped, already up-to-date
517 17:08:48.406626 CPU #1 initialized
518 17:08:48.409931 bsp_do_flight_plan done after 459 msecs.
519 17:08:48.413161 CPU: frequency set to 4000 MHz
520 17:08:48.416870 Enabling SMIs.
521 17:08:48.420147 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
522 17:08:48.437529 SATAXPCIE1 indicates PCIe NVMe is present
523 17:08:48.441220 Probing TPM: done!
524 17:08:48.444468 Connected to device vid:did:rid of 1ae0:0028:00
525 17:08:48.455112 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
526 17:08:48.458454 Initialized TPM device CR50 revision 0
527 17:08:48.461606 Enabling S0i3.4
528 17:08:48.467902 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
529 17:08:48.471261 Found a VBT of 8704 bytes after decompression
530 17:08:48.478046 cse_lite: CSE RO boot. HybridStorageMode disabled
531 17:08:48.484649 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
532 17:08:48.561021 FSPS returned 0
533 17:08:48.564213 Executing Phase 1 of FspMultiPhaseSiInit
534 17:08:48.574230 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
535 17:08:48.577335 port C0 DISC req: usage 1 usb3 1 usb2 5
536 17:08:48.580690 Raw Buffer output 0 00000511
537 17:08:48.584034 Raw Buffer output 1 00000000
538 17:08:48.587891 pmc_send_ipc_cmd succeeded
539 17:08:48.594410 port C1 DISC req: usage 1 usb3 2 usb2 3
540 17:08:48.594846 Raw Buffer output 0 00000321
541 17:08:48.597822 Raw Buffer output 1 00000000
542 17:08:48.601946 pmc_send_ipc_cmd succeeded
543 17:08:48.607077 Detected 4 core, 8 thread CPU.
544 17:08:48.610497 Detected 4 core, 8 thread CPU.
545 17:08:48.844333 Display FSP Version Info HOB
546 17:08:48.847098 Reference Code - CPU = a.0.4c.31
547 17:08:48.850557 uCode Version = 0.0.0.86
548 17:08:48.853791 TXT ACM version = ff.ff.ff.ffff
549 17:08:48.857276 Reference Code - ME = a.0.4c.31
550 17:08:48.860568 MEBx version = 0.0.0.0
551 17:08:48.863908 ME Firmware Version = Consumer SKU
552 17:08:48.867269 Reference Code - PCH = a.0.4c.31
553 17:08:48.870425 PCH-CRID Status = Disabled
554 17:08:48.873908 PCH-CRID Original Value = ff.ff.ff.ffff
555 17:08:48.877303 PCH-CRID New Value = ff.ff.ff.ffff
556 17:08:48.880496 OPROM - RST - RAID = ff.ff.ff.ffff
557 17:08:48.883748 PCH Hsio Version = 4.0.0.0
558 17:08:48.887184 Reference Code - SA - System Agent = a.0.4c.31
559 17:08:48.890412 Reference Code - MRC = 2.0.0.1
560 17:08:48.893848 SA - PCIe Version = a.0.4c.31
561 17:08:48.896861 SA-CRID Status = Disabled
562 17:08:48.900582 SA-CRID Original Value = 0.0.0.1
563 17:08:48.903822 SA-CRID New Value = 0.0.0.1
564 17:08:48.906957 OPROM - VBIOS = ff.ff.ff.ffff
565 17:08:48.910432 IO Manageability Engine FW Version = 11.1.4.0
566 17:08:48.913760 PHY Build Version = 0.0.0.e0
567 17:08:48.916876 Thunderbolt(TM) FW Version = 0.0.0.0
568 17:08:48.923746 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
569 17:08:48.927061 ITSS IRQ Polarities Before:
570 17:08:48.927537 IPC0: 0xffffffff
571 17:08:48.930528 IPC1: 0xffffffff
572 17:08:48.930991 IPC2: 0xffffffff
573 17:08:48.933939 IPC3: 0xffffffff
574 17:08:48.937345 ITSS IRQ Polarities After:
575 17:08:48.937813 IPC0: 0xffffffff
576 17:08:48.940147 IPC1: 0xffffffff
577 17:08:48.940574 IPC2: 0xffffffff
578 17:08:48.943619 IPC3: 0xffffffff
579 17:08:48.946923 Found PCIe Root Port #9 at PCI: 00:1d.0.
580 17:08:48.959972 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
581 17:08:48.969998 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
582 17:08:48.983347 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
583 17:08:48.989923 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 237 ms
584 17:08:48.993400 Enumerating buses...
585 17:08:48.996589 Show all devs... Before device enumeration.
586 17:08:49.000107 Root Device: enabled 1
587 17:08:49.000584 DOMAIN: 0000: enabled 1
588 17:08:49.003253 CPU_CLUSTER: 0: enabled 1
589 17:08:49.006664 PCI: 00:00.0: enabled 1
590 17:08:49.009957 PCI: 00:02.0: enabled 1
591 17:08:49.010494 PCI: 00:04.0: enabled 1
592 17:08:49.013205 PCI: 00:05.0: enabled 1
593 17:08:49.016644 PCI: 00:06.0: enabled 0
594 17:08:49.019933 PCI: 00:07.0: enabled 0
595 17:08:49.020481 PCI: 00:07.1: enabled 0
596 17:08:49.022927 PCI: 00:07.2: enabled 0
597 17:08:49.026509 PCI: 00:07.3: enabled 0
598 17:08:49.027066 PCI: 00:08.0: enabled 1
599 17:08:49.029928 PCI: 00:09.0: enabled 0
600 17:08:49.032857 PCI: 00:0a.0: enabled 0
601 17:08:49.036208 PCI: 00:0d.0: enabled 1
602 17:08:49.036852 PCI: 00:0d.1: enabled 0
603 17:08:49.039696 PCI: 00:0d.2: enabled 0
604 17:08:49.043069 PCI: 00:0d.3: enabled 0
605 17:08:49.046329 PCI: 00:0e.0: enabled 0
606 17:08:49.046786 PCI: 00:10.2: enabled 1
607 17:08:49.049963 PCI: 00:10.6: enabled 0
608 17:08:49.052890 PCI: 00:10.7: enabled 0
609 17:08:49.056165 PCI: 00:12.0: enabled 0
610 17:08:49.056700 PCI: 00:12.6: enabled 0
611 17:08:49.059564 PCI: 00:13.0: enabled 0
612 17:08:49.062902 PCI: 00:14.0: enabled 1
613 17:08:49.066296 PCI: 00:14.1: enabled 0
614 17:08:49.066829 PCI: 00:14.2: enabled 1
615 17:08:49.069594 PCI: 00:14.3: enabled 1
616 17:08:49.072872 PCI: 00:15.0: enabled 1
617 17:08:49.073386 PCI: 00:15.1: enabled 1
618 17:08:49.076367 PCI: 00:15.2: enabled 1
619 17:08:49.079621 PCI: 00:15.3: enabled 1
620 17:08:49.083003 PCI: 00:16.0: enabled 1
621 17:08:49.083606 PCI: 00:16.1: enabled 0
622 17:08:49.086322 PCI: 00:16.2: enabled 0
623 17:08:49.089575 PCI: 00:16.3: enabled 0
624 17:08:49.092826 PCI: 00:16.4: enabled 0
625 17:08:49.093426 PCI: 00:16.5: enabled 0
626 17:08:49.096198 PCI: 00:17.0: enabled 1
627 17:08:49.099470 PCI: 00:19.0: enabled 0
628 17:08:49.102877 PCI: 00:19.1: enabled 1
629 17:08:49.103409 PCI: 00:19.2: enabled 0
630 17:08:49.106066 PCI: 00:1c.0: enabled 1
631 17:08:49.109553 PCI: 00:1c.1: enabled 0
632 17:08:49.110245 PCI: 00:1c.2: enabled 0
633 17:08:49.112642 PCI: 00:1c.3: enabled 0
634 17:08:49.115945 PCI: 00:1c.4: enabled 0
635 17:08:49.119716 PCI: 00:1c.5: enabled 0
636 17:08:49.120289 PCI: 00:1c.6: enabled 1
637 17:08:49.122921 PCI: 00:1c.7: enabled 0
638 17:08:49.125941 PCI: 00:1d.0: enabled 1
639 17:08:49.129504 PCI: 00:1d.1: enabled 0
640 17:08:49.130086 PCI: 00:1d.2: enabled 1
641 17:08:49.132910 PCI: 00:1d.3: enabled 0
642 17:08:49.135882 PCI: 00:1e.0: enabled 1
643 17:08:49.139069 PCI: 00:1e.1: enabled 0
644 17:08:49.139657 PCI: 00:1e.2: enabled 1
645 17:08:49.142837 PCI: 00:1e.3: enabled 1
646 17:08:49.146361 PCI: 00:1f.0: enabled 1
647 17:08:49.149513 PCI: 00:1f.1: enabled 0
648 17:08:49.150070 PCI: 00:1f.2: enabled 1
649 17:08:49.153057 PCI: 00:1f.3: enabled 1
650 17:08:49.155745 PCI: 00:1f.4: enabled 0
651 17:08:49.156365 PCI: 00:1f.5: enabled 1
652 17:08:49.159073 PCI: 00:1f.6: enabled 0
653 17:08:49.162908 PCI: 00:1f.7: enabled 0
654 17:08:49.165850 APIC: 00: enabled 1
655 17:08:49.166424 GENERIC: 0.0: enabled 1
656 17:08:49.169227 GENERIC: 0.0: enabled 1
657 17:08:49.172597 GENERIC: 1.0: enabled 1
658 17:08:49.173113 GENERIC: 0.0: enabled 1
659 17:08:49.176019 GENERIC: 1.0: enabled 1
660 17:08:49.179157 USB0 port 0: enabled 1
661 17:08:49.182412 GENERIC: 0.0: enabled 1
662 17:08:49.182976 USB0 port 0: enabled 1
663 17:08:49.185925 GENERIC: 0.0: enabled 1
664 17:08:49.189367 I2C: 00:1a: enabled 1
665 17:08:49.189902 I2C: 00:31: enabled 1
666 17:08:49.192642 I2C: 00:32: enabled 1
667 17:08:49.196008 I2C: 00:10: enabled 1
668 17:08:49.199024 I2C: 00:15: enabled 1
669 17:08:49.199134 GENERIC: 0.0: enabled 0
670 17:08:49.202151 GENERIC: 1.0: enabled 0
671 17:08:49.205508 GENERIC: 0.0: enabled 1
672 17:08:49.205591 SPI: 00: enabled 1
673 17:08:49.208931 SPI: 00: enabled 1
674 17:08:49.212115 PNP: 0c09.0: enabled 1
675 17:08:49.212198 GENERIC: 0.0: enabled 1
676 17:08:49.215362 USB3 port 0: enabled 1
677 17:08:49.218734 USB3 port 1: enabled 1
678 17:08:49.218817 USB3 port 2: enabled 0
679 17:08:49.222114 USB3 port 3: enabled 0
680 17:08:49.225459 USB2 port 0: enabled 0
681 17:08:49.228676 USB2 port 1: enabled 1
682 17:08:49.228759 USB2 port 2: enabled 1
683 17:08:49.232062 USB2 port 3: enabled 0
684 17:08:49.235455 USB2 port 4: enabled 1
685 17:08:49.235537 USB2 port 5: enabled 0
686 17:08:49.238741 USB2 port 6: enabled 0
687 17:08:49.241461 USB2 port 7: enabled 0
688 17:08:49.245235 USB2 port 8: enabled 0
689 17:08:49.245318 USB2 port 9: enabled 0
690 17:08:49.248747 USB3 port 0: enabled 0
691 17:08:49.251689 USB3 port 1: enabled 1
692 17:08:49.251771 USB3 port 2: enabled 0
693 17:08:49.255063 USB3 port 3: enabled 0
694 17:08:49.258537 GENERIC: 0.0: enabled 1
695 17:08:49.261918 GENERIC: 1.0: enabled 1
696 17:08:49.262001 APIC: 01: enabled 1
697 17:08:49.265134 APIC: 03: enabled 1
698 17:08:49.265217 APIC: 07: enabled 1
699 17:08:49.268580 APIC: 04: enabled 1
700 17:08:49.271370 APIC: 02: enabled 1
701 17:08:49.271483 APIC: 06: enabled 1
702 17:08:49.274731 APIC: 05: enabled 1
703 17:08:49.278088 Compare with tree...
704 17:08:49.278200 Root Device: enabled 1
705 17:08:49.281350 DOMAIN: 0000: enabled 1
706 17:08:49.285017 PCI: 00:00.0: enabled 1
707 17:08:49.288284 PCI: 00:02.0: enabled 1
708 17:08:49.288385 PCI: 00:04.0: enabled 1
709 17:08:49.291560 GENERIC: 0.0: enabled 1
710 17:08:49.294876 PCI: 00:05.0: enabled 1
711 17:08:49.298379 PCI: 00:06.0: enabled 0
712 17:08:49.301102 PCI: 00:07.0: enabled 0
713 17:08:49.301216 GENERIC: 0.0: enabled 1
714 17:08:49.304439 PCI: 00:07.1: enabled 0
715 17:08:49.307598 GENERIC: 1.0: enabled 1
716 17:08:49.311104 PCI: 00:07.2: enabled 0
717 17:08:49.314443 GENERIC: 0.0: enabled 1
718 17:08:49.317697 PCI: 00:07.3: enabled 0
719 17:08:49.317795 GENERIC: 1.0: enabled 1
720 17:08:49.321054 PCI: 00:08.0: enabled 1
721 17:08:49.324464 PCI: 00:09.0: enabled 0
722 17:08:49.327963 PCI: 00:0a.0: enabled 0
723 17:08:49.331158 PCI: 00:0d.0: enabled 1
724 17:08:49.331232 USB0 port 0: enabled 1
725 17:08:49.334435 USB3 port 0: enabled 1
726 17:08:49.337839 USB3 port 1: enabled 1
727 17:08:49.341134 USB3 port 2: enabled 0
728 17:08:49.344333 USB3 port 3: enabled 0
729 17:08:49.344418 PCI: 00:0d.1: enabled 0
730 17:08:49.347695 PCI: 00:0d.2: enabled 0
731 17:08:49.350924 GENERIC: 0.0: enabled 1
732 17:08:49.354267 PCI: 00:0d.3: enabled 0
733 17:08:49.357710 PCI: 00:0e.0: enabled 0
734 17:08:49.357800 PCI: 00:10.2: enabled 1
735 17:08:49.361070 PCI: 00:10.6: enabled 0
736 17:08:49.364312 PCI: 00:10.7: enabled 0
737 17:08:49.367637 PCI: 00:12.0: enabled 0
738 17:08:49.370979 PCI: 00:12.6: enabled 0
739 17:08:49.371055 PCI: 00:13.0: enabled 0
740 17:08:49.373870 PCI: 00:14.0: enabled 1
741 17:08:49.377208 USB0 port 0: enabled 1
742 17:08:49.380948 USB2 port 0: enabled 0
743 17:08:49.384233 USB2 port 1: enabled 1
744 17:08:49.387175 USB2 port 2: enabled 1
745 17:08:49.387252 USB2 port 3: enabled 0
746 17:08:49.390854 USB2 port 4: enabled 1
747 17:08:49.394203 USB2 port 5: enabled 0
748 17:08:49.397662 USB2 port 6: enabled 0
749 17:08:49.400461 USB2 port 7: enabled 0
750 17:08:49.400531 USB2 port 8: enabled 0
751 17:08:49.403813 USB2 port 9: enabled 0
752 17:08:49.407329 USB3 port 0: enabled 0
753 17:08:49.410510 USB3 port 1: enabled 1
754 17:08:49.413734 USB3 port 2: enabled 0
755 17:08:49.417088 USB3 port 3: enabled 0
756 17:08:49.417166 PCI: 00:14.1: enabled 0
757 17:08:49.420893 PCI: 00:14.2: enabled 1
758 17:08:49.424191 PCI: 00:14.3: enabled 1
759 17:08:49.426974 GENERIC: 0.0: enabled 1
760 17:08:49.430917 PCI: 00:15.0: enabled 1
761 17:08:49.430988 I2C: 00:1a: enabled 1
762 17:08:49.433728 I2C: 00:31: enabled 1
763 17:08:49.437089 I2C: 00:32: enabled 1
764 17:08:49.440375 PCI: 00:15.1: enabled 1
765 17:08:49.440443 I2C: 00:10: enabled 1
766 17:08:49.443712 PCI: 00:15.2: enabled 1
767 17:08:49.446908 PCI: 00:15.3: enabled 1
768 17:08:49.450217 PCI: 00:16.0: enabled 1
769 17:08:49.453561 PCI: 00:16.1: enabled 0
770 17:08:49.453639 PCI: 00:16.2: enabled 0
771 17:08:49.457818 PCI: 00:16.3: enabled 0
772 17:08:49.461775 PCI: 00:16.4: enabled 0
773 17:08:49.461864 PCI: 00:16.5: enabled 0
774 17:08:49.465286 PCI: 00:17.0: enabled 1
775 17:08:49.468080 PCI: 00:19.0: enabled 0
776 17:08:49.471903 PCI: 00:19.1: enabled 1
777 17:08:49.475327 I2C: 00:15: enabled 1
778 17:08:49.475404 PCI: 00:19.2: enabled 0
779 17:08:49.478516 PCI: 00:1d.0: enabled 1
780 17:08:49.481673 GENERIC: 0.0: enabled 1
781 17:08:49.530557 PCI: 00:1e.0: enabled 1
782 17:08:49.530661 PCI: 00:1e.1: enabled 0
783 17:08:49.530731 PCI: 00:1e.2: enabled 1
784 17:08:49.531018 SPI: 00: enabled 1
785 17:08:49.531085 PCI: 00:1e.3: enabled 1
786 17:08:49.531160 SPI: 00: enabled 1
787 17:08:49.531242 PCI: 00:1f.0: enabled 1
788 17:08:49.531300 PNP: 0c09.0: enabled 1
789 17:08:49.531375 PCI: 00:1f.1: enabled 0
790 17:08:49.531434 PCI: 00:1f.2: enabled 1
791 17:08:49.531677 GENERIC: 0.0: enabled 1
792 17:08:49.531738 GENERIC: 0.0: enabled 1
793 17:08:49.531845 GENERIC: 1.0: enabled 1
794 17:08:49.531904 PCI: 00:1f.3: enabled 1
795 17:08:49.531966 PCI: 00:1f.4: enabled 0
796 17:08:49.532022 PCI: 00:1f.5: enabled 1
797 17:08:49.532123 PCI: 00:1f.6: enabled 0
798 17:08:49.532206 PCI: 00:1f.7: enabled 0
799 17:08:49.532263 CPU_CLUSTER: 0: enabled 1
800 17:08:49.535217 APIC: 00: enabled 1
801 17:08:49.535288 APIC: 01: enabled 1
802 17:08:49.538541 APIC: 03: enabled 1
803 17:08:49.541695 APIC: 07: enabled 1
804 17:08:49.541776 APIC: 04: enabled 1
805 17:08:49.545130 APIC: 02: enabled 1
806 17:08:49.548686 APIC: 06: enabled 1
807 17:08:49.548764 APIC: 05: enabled 1
808 17:08:49.552220 Root Device scanning...
809 17:08:49.555601 scan_static_bus for Root Device
810 17:08:49.558922 DOMAIN: 0000 enabled
811 17:08:49.562551 CPU_CLUSTER: 0 enabled
812 17:08:49.562631 DOMAIN: 0000 scanning...
813 17:08:49.565779 PCI: pci_scan_bus for bus 00
814 17:08:49.569270 PCI: 00:00.0 [8086/0000] ops
815 17:08:49.572127 PCI: 00:00.0 [8086/9a12] enabled
816 17:08:49.575445 PCI: 00:02.0 [8086/0000] bus ops
817 17:08:49.578880 PCI: 00:02.0 [8086/9a40] enabled
818 17:08:49.582202 PCI: 00:04.0 [8086/0000] bus ops
819 17:08:49.585687 PCI: 00:04.0 [8086/9a03] enabled
820 17:08:49.588780 PCI: 00:05.0 [8086/9a19] enabled
821 17:08:49.592044 PCI: 00:07.0 [0000/0000] hidden
822 17:08:49.595450 PCI: 00:08.0 [8086/9a11] enabled
823 17:08:49.598636 PCI: 00:0a.0 [8086/9a0d] disabled
824 17:08:49.602430 PCI: 00:0d.0 [8086/0000] bus ops
825 17:08:49.605527 PCI: 00:0d.0 [8086/9a13] enabled
826 17:08:49.609306 PCI: 00:14.0 [8086/0000] bus ops
827 17:08:49.612369 PCI: 00:14.0 [8086/a0ed] enabled
828 17:08:49.615746 PCI: 00:14.2 [8086/a0ef] enabled
829 17:08:49.618989 PCI: 00:14.3 [8086/0000] bus ops
830 17:08:49.622223 PCI: 00:14.3 [8086/a0f0] enabled
831 17:08:49.625571 PCI: 00:15.0 [8086/0000] bus ops
832 17:08:49.628639 PCI: 00:15.0 [8086/a0e8] enabled
833 17:08:49.632070 PCI: 00:15.1 [8086/0000] bus ops
834 17:08:49.635419 PCI: 00:15.1 [8086/a0e9] enabled
835 17:08:49.638182 PCI: 00:15.2 [8086/0000] bus ops
836 17:08:49.642160 PCI: 00:15.2 [8086/a0ea] enabled
837 17:08:49.645251 PCI: 00:15.3 [8086/0000] bus ops
838 17:08:49.648631 PCI: 00:15.3 [8086/a0eb] enabled
839 17:08:49.651986 PCI: 00:16.0 [8086/0000] ops
840 17:08:49.654684 PCI: 00:16.0 [8086/a0e0] enabled
841 17:08:49.661688 PCI: Static device PCI: 00:17.0 not found, disabling it.
842 17:08:49.665408 PCI: 00:19.0 [8086/0000] bus ops
843 17:08:49.668398 PCI: 00:19.0 [8086/a0c5] disabled
844 17:08:49.671988 PCI: 00:19.1 [8086/0000] bus ops
845 17:08:49.675013 PCI: 00:19.1 [8086/a0c6] enabled
846 17:08:49.678375 PCI: 00:1d.0 [8086/0000] bus ops
847 17:08:49.681851 PCI: 00:1d.0 [8086/a0b0] enabled
848 17:08:49.685105 PCI: 00:1e.0 [8086/0000] ops
849 17:08:49.688554 PCI: 00:1e.0 [8086/a0a8] enabled
850 17:08:49.691438 PCI: 00:1e.2 [8086/0000] bus ops
851 17:08:49.695172 PCI: 00:1e.2 [8086/a0aa] enabled
852 17:08:49.698548 PCI: 00:1e.3 [8086/0000] bus ops
853 17:08:49.701885 PCI: 00:1e.3 [8086/a0ab] enabled
854 17:08:49.705300 PCI: 00:1f.0 [8086/0000] bus ops
855 17:08:49.708155 PCI: 00:1f.0 [8086/a087] enabled
856 17:08:49.708583 RTC Init
857 17:08:49.715227 Set power on after power failure.
858 17:08:49.715654 Disabling Deep S3
859 17:08:49.718416 Disabling Deep S3
860 17:08:49.718854 Disabling Deep S4
861 17:08:49.721839 Disabling Deep S4
862 17:08:49.722264 Disabling Deep S5
863 17:08:49.724960 Disabling Deep S5
864 17:08:49.728259 PCI: 00:1f.2 [0000/0000] hidden
865 17:08:49.731370 PCI: 00:1f.3 [8086/0000] bus ops
866 17:08:49.734814 PCI: 00:1f.3 [8086/a0c8] enabled
867 17:08:49.738371 PCI: 00:1f.5 [8086/0000] bus ops
868 17:08:49.741686 PCI: 00:1f.5 [8086/a0a4] enabled
869 17:08:49.745141 PCI: Leftover static devices:
870 17:08:49.745791 PCI: 00:10.2
871 17:08:49.748174 PCI: 00:10.6
872 17:08:49.748843 PCI: 00:10.7
873 17:08:49.751582 PCI: 00:06.0
874 17:08:49.752006 PCI: 00:07.1
875 17:08:49.752396 PCI: 00:07.2
876 17:08:49.754999 PCI: 00:07.3
877 17:08:49.755420 PCI: 00:09.0
878 17:08:49.758392 PCI: 00:0d.1
879 17:08:49.758814 PCI: 00:0d.2
880 17:08:49.759150 PCI: 00:0d.3
881 17:08:49.761489 PCI: 00:0e.0
882 17:08:49.761913 PCI: 00:12.0
883 17:08:49.764751 PCI: 00:12.6
884 17:08:49.765177 PCI: 00:13.0
885 17:08:49.765512 PCI: 00:14.1
886 17:08:49.768108 PCI: 00:16.1
887 17:08:49.768537 PCI: 00:16.2
888 17:08:49.771385 PCI: 00:16.3
889 17:08:49.771807 PCI: 00:16.4
890 17:08:49.774724 PCI: 00:16.5
891 17:08:49.775149 PCI: 00:17.0
892 17:08:49.775486 PCI: 00:19.2
893 17:08:49.777861 PCI: 00:1e.1
894 17:08:49.778283 PCI: 00:1f.1
895 17:08:49.781269 PCI: 00:1f.4
896 17:08:49.781692 PCI: 00:1f.6
897 17:08:49.782028 PCI: 00:1f.7
898 17:08:49.784815 PCI: Check your devicetree.cb.
899 17:08:49.788327 PCI: 00:02.0 scanning...
900 17:08:49.790992 scan_generic_bus for PCI: 00:02.0
901 17:08:49.794407 scan_generic_bus for PCI: 00:02.0 done
902 17:08:49.801147 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
903 17:08:49.804394 PCI: 00:04.0 scanning...
904 17:08:49.807766 scan_generic_bus for PCI: 00:04.0
905 17:08:49.808249 GENERIC: 0.0 enabled
906 17:08:49.814600 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
907 17:08:49.820844 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
908 17:08:49.821279 PCI: 00:0d.0 scanning...
909 17:08:49.824213 scan_static_bus for PCI: 00:0d.0
910 17:08:49.827637 USB0 port 0 enabled
911 17:08:49.831214 USB0 port 0 scanning...
912 17:08:49.834430 scan_static_bus for USB0 port 0
913 17:08:49.837566 USB3 port 0 enabled
914 17:08:49.837984 USB3 port 1 enabled
915 17:08:49.840982 USB3 port 2 disabled
916 17:08:49.841436 USB3 port 3 disabled
917 17:08:49.844163 USB3 port 0 scanning...
918 17:08:49.847535 scan_static_bus for USB3 port 0
919 17:08:49.851067 scan_static_bus for USB3 port 0 done
920 17:08:49.857551 scan_bus: bus USB3 port 0 finished in 6 msecs
921 17:08:49.857974 USB3 port 1 scanning...
922 17:08:49.863856 scan_static_bus for USB3 port 1
923 17:08:49.867676 scan_static_bus for USB3 port 1 done
924 17:08:49.870456 scan_bus: bus USB3 port 1 finished in 6 msecs
925 17:08:49.873920 scan_static_bus for USB0 port 0 done
926 17:08:49.880531 scan_bus: bus USB0 port 0 finished in 43 msecs
927 17:08:49.884044 scan_static_bus for PCI: 00:0d.0 done
928 17:08:49.887373 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
929 17:08:49.890812 PCI: 00:14.0 scanning...
930 17:08:49.894220 scan_static_bus for PCI: 00:14.0
931 17:08:49.897017 USB0 port 0 enabled
932 17:08:49.897470 USB0 port 0 scanning...
933 17:08:49.900502 scan_static_bus for USB0 port 0
934 17:08:49.903760 USB2 port 0 disabled
935 17:08:49.907015 USB2 port 1 enabled
936 17:08:49.907457 USB2 port 2 enabled
937 17:08:49.910306 USB2 port 3 disabled
938 17:08:49.913786 USB2 port 4 enabled
939 17:08:49.914376 USB2 port 5 disabled
940 17:08:49.917281 USB2 port 6 disabled
941 17:08:49.917821 USB2 port 7 disabled
942 17:08:49.920633 USB2 port 8 disabled
943 17:08:49.923587 USB2 port 9 disabled
944 17:08:49.924093 USB3 port 0 disabled
945 17:08:49.926919 USB3 port 1 enabled
946 17:08:49.930473 USB3 port 2 disabled
947 17:08:49.930919 USB3 port 3 disabled
948 17:08:49.933789 USB2 port 1 scanning...
949 17:08:49.936840 scan_static_bus for USB2 port 1
950 17:08:49.940439 scan_static_bus for USB2 port 1 done
951 17:08:49.946622 scan_bus: bus USB2 port 1 finished in 6 msecs
952 17:08:49.947082 USB2 port 2 scanning...
953 17:08:49.949944 scan_static_bus for USB2 port 2
954 17:08:49.956801 scan_static_bus for USB2 port 2 done
955 17:08:49.960240 scan_bus: bus USB2 port 2 finished in 6 msecs
956 17:08:49.963446 USB2 port 4 scanning...
957 17:08:49.966499 scan_static_bus for USB2 port 4
958 17:08:49.969972 scan_static_bus for USB2 port 4 done
959 17:08:49.973136 scan_bus: bus USB2 port 4 finished in 6 msecs
960 17:08:49.976559 USB3 port 1 scanning...
961 17:08:49.979732 scan_static_bus for USB3 port 1
962 17:08:49.982931 scan_static_bus for USB3 port 1 done
963 17:08:49.989948 scan_bus: bus USB3 port 1 finished in 6 msecs
964 17:08:49.993163 scan_static_bus for USB0 port 0 done
965 17:08:49.996612 scan_bus: bus USB0 port 0 finished in 93 msecs
966 17:08:49.999477 scan_static_bus for PCI: 00:14.0 done
967 17:08:50.006214 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
968 17:08:50.006636 PCI: 00:14.3 scanning...
969 17:08:50.010123 scan_static_bus for PCI: 00:14.3
970 17:08:50.013484 GENERIC: 0.0 enabled
971 17:08:50.016260 scan_static_bus for PCI: 00:14.3 done
972 17:08:50.022920 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
973 17:08:50.023541 PCI: 00:15.0 scanning...
974 17:08:50.029743 scan_static_bus for PCI: 00:15.0
975 17:08:50.030266 I2C: 00:1a enabled
976 17:08:50.033677 I2C: 00:31 enabled
977 17:08:50.034100 I2C: 00:32 enabled
978 17:08:50.036523 scan_static_bus for PCI: 00:15.0 done
979 17:08:50.043795 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
980 17:08:50.044340 PCI: 00:15.1 scanning...
981 17:08:50.047200 scan_static_bus for PCI: 00:15.1
982 17:08:50.050523 I2C: 00:10 enabled
983 17:08:50.054035 scan_static_bus for PCI: 00:15.1 done
984 17:08:50.060447 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
985 17:08:50.060964 PCI: 00:15.2 scanning...
986 17:08:50.063711 scan_static_bus for PCI: 00:15.2
987 17:08:50.070403 scan_static_bus for PCI: 00:15.2 done
988 17:08:50.073631 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
989 17:08:50.077089 PCI: 00:15.3 scanning...
990 17:08:50.080546 scan_static_bus for PCI: 00:15.3
991 17:08:50.083479 scan_static_bus for PCI: 00:15.3 done
992 17:08:50.086843 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
993 17:08:50.090408 PCI: 00:19.1 scanning...
994 17:08:50.093336 scan_static_bus for PCI: 00:19.1
995 17:08:50.096716 I2C: 00:15 enabled
996 17:08:50.100264 scan_static_bus for PCI: 00:19.1 done
997 17:08:50.103696 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
998 17:08:50.106774 PCI: 00:1d.0 scanning...
999 17:08:50.110239 do_pci_scan_bridge for PCI: 00:1d.0
1000 17:08:50.113634 PCI: pci_scan_bus for bus 01
1001 17:08:50.116809 PCI: 01:00.0 [1c5c/174a] enabled
1002 17:08:50.120217 GENERIC: 0.0 enabled
1003 17:08:50.123636 Enabling Common Clock Configuration
1004 17:08:50.126418 L1 Sub-State supported from root port 29
1005 17:08:50.129911 L1 Sub-State Support = 0xf
1006 17:08:50.133257 CommonModeRestoreTime = 0x28
1007 17:08:50.136791 Power On Value = 0x16, Power On Scale = 0x0
1008 17:08:50.139809 ASPM: Enabled L1
1009 17:08:50.142523 PCIe: Max_Payload_Size adjusted to 128
1010 17:08:50.149397 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1011 17:08:50.149479 PCI: 00:1e.2 scanning...
1012 17:08:50.152723 scan_generic_bus for PCI: 00:1e.2
1013 17:08:50.156182 SPI: 00 enabled
1014 17:08:50.162995 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1015 17:08:50.166351 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1016 17:08:50.169152 PCI: 00:1e.3 scanning...
1017 17:08:50.172550 scan_generic_bus for PCI: 00:1e.3
1018 17:08:50.175979 SPI: 00 enabled
1019 17:08:50.179324 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1020 17:08:50.185669 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1021 17:08:50.188927 PCI: 00:1f.0 scanning...
1022 17:08:50.192323 scan_static_bus for PCI: 00:1f.0
1023 17:08:50.192399 PNP: 0c09.0 enabled
1024 17:08:50.195731 PNP: 0c09.0 scanning...
1025 17:08:50.199055 scan_static_bus for PNP: 0c09.0
1026 17:08:50.202203 scan_static_bus for PNP: 0c09.0 done
1027 17:08:50.208853 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1028 17:08:50.212555 scan_static_bus for PCI: 00:1f.0 done
1029 17:08:50.215593 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1030 17:08:50.218939 PCI: 00:1f.2 scanning...
1031 17:08:50.222096 scan_static_bus for PCI: 00:1f.2
1032 17:08:50.225440 GENERIC: 0.0 enabled
1033 17:08:50.228638 GENERIC: 0.0 scanning...
1034 17:08:50.232014 scan_static_bus for GENERIC: 0.0
1035 17:08:50.232131 GENERIC: 0.0 enabled
1036 17:08:50.235342 GENERIC: 1.0 enabled
1037 17:08:50.238883 scan_static_bus for GENERIC: 0.0 done
1038 17:08:50.242266 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1039 17:08:50.248793 scan_static_bus for PCI: 00:1f.2 done
1040 17:08:50.252074 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1041 17:08:50.255149 PCI: 00:1f.3 scanning...
1042 17:08:50.258627 scan_static_bus for PCI: 00:1f.3
1043 17:08:50.261938 scan_static_bus for PCI: 00:1f.3 done
1044 17:08:50.265268 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1045 17:08:50.268704 PCI: 00:1f.5 scanning...
1046 17:08:50.272016 scan_generic_bus for PCI: 00:1f.5
1047 17:08:50.278341 scan_generic_bus for PCI: 00:1f.5 done
1048 17:08:50.281737 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1049 17:08:50.285042 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1050 17:08:50.291998 scan_static_bus for Root Device done
1051 17:08:50.295383 scan_bus: bus Root Device finished in 737 msecs
1052 17:08:50.295464 done
1053 17:08:50.301561 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1054 17:08:50.304889 Chrome EC: UHEPI supported
1055 17:08:50.311673 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1056 17:08:50.318422 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1057 17:08:50.321309 SPI flash protection: WPSW=0 SRP0=0
1058 17:08:50.324704 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1059 17:08:50.331634 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1060 17:08:50.335021 found VGA at PCI: 00:02.0
1061 17:08:50.338047 Setting up VGA for PCI: 00:02.0
1062 17:08:50.341329 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1063 17:08:50.348343 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1064 17:08:50.351631 Allocating resources...
1065 17:08:50.351733 Reading resources...
1066 17:08:50.358104 Root Device read_resources bus 0 link: 0
1067 17:08:50.361428 DOMAIN: 0000 read_resources bus 0 link: 0
1068 17:08:50.364407 PCI: 00:04.0 read_resources bus 1 link: 0
1069 17:08:50.371314 PCI: 00:04.0 read_resources bus 1 link: 0 done
1070 17:08:50.374687 PCI: 00:0d.0 read_resources bus 0 link: 0
1071 17:08:50.381519 USB0 port 0 read_resources bus 0 link: 0
1072 17:08:50.384365 USB0 port 0 read_resources bus 0 link: 0 done
1073 17:08:50.391126 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1074 17:08:50.394401 PCI: 00:14.0 read_resources bus 0 link: 0
1075 17:08:50.401120 USB0 port 0 read_resources bus 0 link: 0
1076 17:08:50.404472 USB0 port 0 read_resources bus 0 link: 0 done
1077 17:08:50.410647 PCI: 00:14.0 read_resources bus 0 link: 0 done
1078 17:08:50.413936 PCI: 00:14.3 read_resources bus 0 link: 0
1079 17:08:50.420756 PCI: 00:14.3 read_resources bus 0 link: 0 done
1080 17:08:50.424221 PCI: 00:15.0 read_resources bus 0 link: 0
1081 17:08:50.430843 PCI: 00:15.0 read_resources bus 0 link: 0 done
1082 17:08:50.434149 PCI: 00:15.1 read_resources bus 0 link: 0
1083 17:08:50.440845 PCI: 00:15.1 read_resources bus 0 link: 0 done
1084 17:08:50.443672 PCI: 00:19.1 read_resources bus 0 link: 0
1085 17:08:50.450710 PCI: 00:19.1 read_resources bus 0 link: 0 done
1086 17:08:50.453899 PCI: 00:1d.0 read_resources bus 1 link: 0
1087 17:08:50.461127 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1088 17:08:50.463995 PCI: 00:1e.2 read_resources bus 2 link: 0
1089 17:08:50.470947 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1090 17:08:50.474394 PCI: 00:1e.3 read_resources bus 3 link: 0
1091 17:08:50.480661 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1092 17:08:50.484234 PCI: 00:1f.0 read_resources bus 0 link: 0
1093 17:08:50.490543 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1094 17:08:50.493884 PCI: 00:1f.2 read_resources bus 0 link: 0
1095 17:08:50.497107 GENERIC: 0.0 read_resources bus 0 link: 0
1096 17:08:50.504345 GENERIC: 0.0 read_resources bus 0 link: 0 done
1097 17:08:50.507927 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1098 17:08:50.515286 DOMAIN: 0000 read_resources bus 0 link: 0 done
1099 17:08:50.518639 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1100 17:08:50.524793 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1101 17:08:50.528218 Root Device read_resources bus 0 link: 0 done
1102 17:08:50.531492 Done reading resources.
1103 17:08:50.538241 Show resources in subtree (Root Device)...After reading.
1104 17:08:50.541480 Root Device child on link 0 DOMAIN: 0000
1105 17:08:50.544709 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1106 17:08:50.555085 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1107 17:08:50.564716 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1108 17:08:50.568216 PCI: 00:00.0
1109 17:08:50.578119 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1110 17:08:50.584703 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1111 17:08:50.594703 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1112 17:08:50.604476 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1113 17:08:50.614596 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1114 17:08:50.624726 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1115 17:08:50.634281 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1116 17:08:50.641204 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1117 17:08:50.651090 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1118 17:08:50.661472 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1119 17:08:50.670790 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1120 17:08:50.681065 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1121 17:08:50.687313 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1122 17:08:50.697568 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1123 17:08:50.707666 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1124 17:08:50.717468 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1125 17:08:50.727388 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1126 17:08:50.737559 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1127 17:08:50.744422 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1128 17:08:50.753596 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1129 17:08:50.756904 PCI: 00:02.0
1130 17:08:50.767097 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1131 17:08:50.777299 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1132 17:08:50.786679 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1133 17:08:50.790179 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1134 17:08:50.800316 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1135 17:08:50.803626 GENERIC: 0.0
1136 17:08:50.803708 PCI: 00:05.0
1137 17:08:50.813614 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1138 17:08:50.819765 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1139 17:08:50.819848 GENERIC: 0.0
1140 17:08:50.823051 PCI: 00:08.0
1141 17:08:50.833158 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1142 17:08:50.833240 PCI: 00:0a.0
1143 17:08:50.836600 PCI: 00:0d.0 child on link 0 USB0 port 0
1144 17:08:50.849699 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1145 17:08:50.852822 USB0 port 0 child on link 0 USB3 port 0
1146 17:08:50.852904 USB3 port 0
1147 17:08:50.856030 USB3 port 1
1148 17:08:50.856157 USB3 port 2
1149 17:08:50.859457 USB3 port 3
1150 17:08:50.862719 PCI: 00:14.0 child on link 0 USB0 port 0
1151 17:08:50.872905 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1152 17:08:50.879367 USB0 port 0 child on link 0 USB2 port 0
1153 17:08:50.879449 USB2 port 0
1154 17:08:50.882936 USB2 port 1
1155 17:08:50.883017 USB2 port 2
1156 17:08:50.886027 USB2 port 3
1157 17:08:50.886107 USB2 port 4
1158 17:08:50.889399 USB2 port 5
1159 17:08:50.889480 USB2 port 6
1160 17:08:50.892674 USB2 port 7
1161 17:08:50.896179 USB2 port 8
1162 17:08:50.896260 USB2 port 9
1163 17:08:50.898922 USB3 port 0
1164 17:08:50.899002 USB3 port 1
1165 17:08:50.902254 USB3 port 2
1166 17:08:50.902377 USB3 port 3
1167 17:08:50.905672 PCI: 00:14.2
1168 17:08:50.915910 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1169 17:08:50.925546 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1170 17:08:50.929160 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1171 17:08:50.939090 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1172 17:08:50.942203 GENERIC: 0.0
1173 17:08:50.945369 PCI: 00:15.0 child on link 0 I2C: 00:1a
1174 17:08:50.955495 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1175 17:08:50.955579 I2C: 00:1a
1176 17:08:50.958646 I2C: 00:31
1177 17:08:50.958728 I2C: 00:32
1178 17:08:50.965322 PCI: 00:15.1 child on link 0 I2C: 00:10
1179 17:08:50.975398 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1180 17:08:50.975481 I2C: 00:10
1181 17:08:50.978745 PCI: 00:15.2
1182 17:08:50.988349 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 17:08:50.988432 PCI: 00:15.3
1184 17:08:50.998242 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 17:08:51.001692 PCI: 00:16.0
1186 17:08:51.011453 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 17:08:51.011536 PCI: 00:19.0
1188 17:08:51.014787 PCI: 00:19.1 child on link 0 I2C: 00:15
1189 17:08:51.025112 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 17:08:51.028408 I2C: 00:15
1191 17:08:51.031219 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1192 17:08:51.041610 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1193 17:08:51.051306 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1194 17:08:51.061250 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1195 17:08:51.061334 GENERIC: 0.0
1196 17:08:51.064903 PCI: 01:00.0
1197 17:08:51.074686 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1198 17:08:51.084212 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1199 17:08:51.090823 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1200 17:08:51.094458 PCI: 00:1e.0
1201 17:08:51.104360 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1202 17:08:51.107809 PCI: 00:1e.2 child on link 0 SPI: 00
1203 17:08:51.117466 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1204 17:08:51.120768 SPI: 00
1205 17:08:51.124193 PCI: 00:1e.3 child on link 0 SPI: 00
1206 17:08:51.134267 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1207 17:08:51.134349 SPI: 00
1208 17:08:51.140843 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1209 17:08:51.147181 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1210 17:08:51.150809 PNP: 0c09.0
1211 17:08:51.160575 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1212 17:08:51.164176 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1213 17:08:51.173821 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1214 17:08:51.183621 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1215 17:08:51.186985 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1216 17:08:51.187066 GENERIC: 0.0
1217 17:08:51.190401 GENERIC: 1.0
1218 17:08:51.193423 PCI: 00:1f.3
1219 17:08:51.203434 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1220 17:08:51.213489 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1221 17:08:51.213572 PCI: 00:1f.5
1222 17:08:51.223673 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1223 17:08:51.226946 CPU_CLUSTER: 0 child on link 0 APIC: 00
1224 17:08:51.230248 APIC: 00
1225 17:08:51.230362 APIC: 01
1226 17:08:51.230443 APIC: 03
1227 17:08:51.233665 APIC: 07
1228 17:08:51.233775 APIC: 04
1229 17:08:51.233862 APIC: 02
1230 17:08:51.236507 APIC: 06
1231 17:08:51.236629 APIC: 05
1232 17:08:51.246697 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1233 17:08:51.250030 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1234 17:08:51.256475 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1235 17:08:51.263197 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1236 17:08:51.266351 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1237 17:08:51.273326 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1238 17:08:51.276682 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1239 17:08:51.282982 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1240 17:08:51.290034 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1241 17:08:51.299926 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1242 17:08:51.306416 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1243 17:08:51.313414 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1244 17:08:51.319678 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1245 17:08:51.326255 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1246 17:08:51.332792 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1247 17:08:51.336093 DOMAIN: 0000: Resource ranges:
1248 17:08:51.342834 * Base: 1000, Size: 800, Tag: 100
1249 17:08:51.346265 * Base: 1900, Size: e700, Tag: 100
1250 17:08:51.349110 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1251 17:08:51.355809 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1252 17:08:51.362340 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1253 17:08:51.372491 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1254 17:08:51.379026 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1255 17:08:51.385846 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1256 17:08:51.395746 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1257 17:08:51.402610 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1258 17:08:51.409170 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1259 17:08:51.418632 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1260 17:08:51.425437 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1261 17:08:51.432138 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1262 17:08:51.442487 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1263 17:08:51.448588 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1264 17:08:51.455720 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1265 17:08:51.465292 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1266 17:08:51.471905 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1267 17:08:51.478816 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1268 17:08:51.488805 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1269 17:08:51.494906 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1270 17:08:51.501546 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1271 17:08:51.511966 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1272 17:08:51.518179 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1273 17:08:51.524877 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1274 17:08:51.534668 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1275 17:08:51.537977 DOMAIN: 0000: Resource ranges:
1276 17:08:51.541441 * Base: 7fc00000, Size: 40400000, Tag: 200
1277 17:08:51.544801 * Base: d0000000, Size: 28000000, Tag: 200
1278 17:08:51.551202 * Base: fa000000, Size: 1000000, Tag: 200
1279 17:08:51.554595 * Base: fb001000, Size: 2fff000, Tag: 200
1280 17:08:51.558181 * Base: fe010000, Size: 2e000, Tag: 200
1281 17:08:51.561465 * Base: fe03f000, Size: d41000, Tag: 200
1282 17:08:51.567990 * Base: fed88000, Size: 8000, Tag: 200
1283 17:08:51.570984 * Base: fed93000, Size: d000, Tag: 200
1284 17:08:51.574271 * Base: feda2000, Size: 1e000, Tag: 200
1285 17:08:51.577590 * Base: fede0000, Size: 1220000, Tag: 200
1286 17:08:51.584159 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1287 17:08:51.590994 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1288 17:08:51.597776 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1289 17:08:51.604266 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1290 17:08:51.610425 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1291 17:08:51.617174 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1292 17:08:51.624157 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1293 17:08:51.630448 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1294 17:08:51.637180 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1295 17:08:51.643463 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1296 17:08:51.650326 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1297 17:08:51.656845 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1298 17:08:51.663639 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1299 17:08:51.670034 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1300 17:08:51.676549 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1301 17:08:51.683473 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1302 17:08:51.690379 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1303 17:08:51.696834 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1304 17:08:51.703147 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1305 17:08:51.709687 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1306 17:08:51.716470 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1307 17:08:51.723212 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1308 17:08:51.729986 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1309 17:08:51.736577 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1310 17:08:51.746525 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1311 17:08:51.749298 PCI: 00:1d.0: Resource ranges:
1312 17:08:51.752669 * Base: 7fc00000, Size: 100000, Tag: 200
1313 17:08:51.759628 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1314 17:08:51.765839 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1315 17:08:51.772656 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1316 17:08:51.782397 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1317 17:08:51.788991 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1318 17:08:51.792431 Root Device assign_resources, bus 0 link: 0
1319 17:08:51.796243 DOMAIN: 0000 assign_resources, bus 0 link: 0
1320 17:08:51.805825 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1321 17:08:51.812944 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1322 17:08:51.822511 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1323 17:08:51.829278 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1324 17:08:51.835793 PCI: 00:04.0 assign_resources, bus 1 link: 0
1325 17:08:51.839181 PCI: 00:04.0 assign_resources, bus 1 link: 0
1326 17:08:51.848577 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1327 17:08:51.855313 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1328 17:08:51.865510 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1329 17:08:51.868628 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1330 17:08:51.872091 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1331 17:08:51.881969 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1332 17:08:51.885208 PCI: 00:14.0 assign_resources, bus 0 link: 0
1333 17:08:51.891548 PCI: 00:14.0 assign_resources, bus 0 link: 0
1334 17:08:51.898339 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1335 17:08:51.908248 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1336 17:08:51.915112 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1337 17:08:51.918329 PCI: 00:14.3 assign_resources, bus 0 link: 0
1338 17:08:51.925078 PCI: 00:14.3 assign_resources, bus 0 link: 0
1339 17:08:51.931658 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1340 17:08:51.938228 PCI: 00:15.0 assign_resources, bus 0 link: 0
1341 17:08:51.941216 PCI: 00:15.0 assign_resources, bus 0 link: 0
1342 17:08:51.950993 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1343 17:08:51.954448 PCI: 00:15.1 assign_resources, bus 0 link: 0
1344 17:08:51.957756 PCI: 00:15.1 assign_resources, bus 0 link: 0
1345 17:08:51.968084 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1346 17:08:51.974609 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1347 17:08:51.984341 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1348 17:08:51.990991 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1349 17:08:51.997691 PCI: 00:19.1 assign_resources, bus 0 link: 0
1350 17:08:52.000954 PCI: 00:19.1 assign_resources, bus 0 link: 0
1351 17:08:52.010983 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1352 17:08:52.020556 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1353 17:08:52.027260 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1354 17:08:52.033983 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1355 17:08:52.040223 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1356 17:08:52.050803 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1357 17:08:52.056694 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1358 17:08:52.060382 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1359 17:08:52.070212 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1360 17:08:52.074118 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1361 17:08:52.080527 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1362 17:08:52.087291 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1363 17:08:52.093642 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1364 17:08:52.097107 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1365 17:08:52.100276 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1366 17:08:52.106940 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1367 17:08:52.110347 LPC: Trying to open IO window from 800 size 1ff
1368 17:08:52.120566 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1369 17:08:52.126873 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1370 17:08:52.136769 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1371 17:08:52.140165 DOMAIN: 0000 assign_resources, bus 0 link: 0
1372 17:08:52.146383 Root Device assign_resources, bus 0 link: 0
1373 17:08:52.146796 Done setting resources.
1374 17:08:52.153585 Show resources in subtree (Root Device)...After assigning values.
1375 17:08:52.160030 Root Device child on link 0 DOMAIN: 0000
1376 17:08:52.163549 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1377 17:08:52.173455 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1378 17:08:52.183315 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1379 17:08:52.183732 PCI: 00:00.0
1380 17:08:52.193270 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1381 17:08:52.203148 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1382 17:08:52.212802 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1383 17:08:52.223036 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1384 17:08:52.229777 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1385 17:08:52.239795 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1386 17:08:52.249268 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1387 17:08:52.259158 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1388 17:08:52.269298 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1389 17:08:52.279484 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1390 17:08:52.286281 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1391 17:08:52.295698 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1392 17:08:52.305667 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1393 17:08:52.315581 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1394 17:08:52.322237 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1395 17:08:52.332446 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1396 17:08:52.342061 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1397 17:08:52.352138 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1398 17:08:52.362149 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1399 17:08:52.372303 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1400 17:08:52.372755 PCI: 00:02.0
1401 17:08:52.385046 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1402 17:08:52.395093 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1403 17:08:52.405056 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1404 17:08:52.408475 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1405 17:08:52.418138 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1406 17:08:52.421501 GENERIC: 0.0
1407 17:08:52.421818 PCI: 00:05.0
1408 17:08:52.431446 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1409 17:08:52.437792 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1410 17:08:52.438030 GENERIC: 0.0
1411 17:08:52.441224 PCI: 00:08.0
1412 17:08:52.451136 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1413 17:08:52.451331 PCI: 00:0a.0
1414 17:08:52.457986 PCI: 00:0d.0 child on link 0 USB0 port 0
1415 17:08:52.467964 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1416 17:08:52.471113 USB0 port 0 child on link 0 USB3 port 0
1417 17:08:52.474473 USB3 port 0
1418 17:08:52.474554 USB3 port 1
1419 17:08:52.477822 USB3 port 2
1420 17:08:52.477904 USB3 port 3
1421 17:08:52.484104 PCI: 00:14.0 child on link 0 USB0 port 0
1422 17:08:52.494625 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1423 17:08:52.497417 USB0 port 0 child on link 0 USB2 port 0
1424 17:08:52.500951 USB2 port 0
1425 17:08:52.501050 USB2 port 1
1426 17:08:52.504276 USB2 port 2
1427 17:08:52.504375 USB2 port 3
1428 17:08:52.507597 USB2 port 4
1429 17:08:52.507694 USB2 port 5
1430 17:08:52.510949 USB2 port 6
1431 17:08:52.511045 USB2 port 7
1432 17:08:52.514311 USB2 port 8
1433 17:08:52.514407 USB2 port 9
1434 17:08:52.517577 USB3 port 0
1435 17:08:52.520807 USB3 port 1
1436 17:08:52.520903 USB3 port 2
1437 17:08:52.524137 USB3 port 3
1438 17:08:52.524233 PCI: 00:14.2
1439 17:08:52.533800 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1440 17:08:52.544286 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1441 17:08:52.550921 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1442 17:08:52.560472 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1443 17:08:52.560549 GENERIC: 0.0
1444 17:08:52.567189 PCI: 00:15.0 child on link 0 I2C: 00:1a
1445 17:08:52.577321 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1446 17:08:52.577417 I2C: 00:1a
1447 17:08:52.580317 I2C: 00:31
1448 17:08:52.580416 I2C: 00:32
1449 17:08:52.587184 PCI: 00:15.1 child on link 0 I2C: 00:10
1450 17:08:52.597079 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1451 17:08:52.597163 I2C: 00:10
1452 17:08:52.600404 PCI: 00:15.2
1453 17:08:52.610373 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1454 17:08:52.610455 PCI: 00:15.3
1455 17:08:52.619922 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1456 17:08:52.623300 PCI: 00:16.0
1457 17:08:52.633290 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1458 17:08:52.636649 PCI: 00:19.0
1459 17:08:52.639957 PCI: 00:19.1 child on link 0 I2C: 00:15
1460 17:08:52.649956 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1461 17:08:52.650038 I2C: 00:15
1462 17:08:52.656728 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1463 17:08:52.666362 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1464 17:08:52.676470 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1465 17:08:52.686270 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1466 17:08:52.689515 GENERIC: 0.0
1467 17:08:52.689596 PCI: 01:00.0
1468 17:08:52.699302 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1469 17:08:52.712468 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1470 17:08:52.722579 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1471 17:08:52.722662 PCI: 00:1e.0
1472 17:08:52.735915 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1473 17:08:52.739154 PCI: 00:1e.2 child on link 0 SPI: 00
1474 17:08:52.749178 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1475 17:08:52.749273 SPI: 00
1476 17:08:52.755858 PCI: 00:1e.3 child on link 0 SPI: 00
1477 17:08:52.765686 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1478 17:08:52.765811 SPI: 00
1479 17:08:52.769020 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1480 17:08:52.778974 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1481 17:08:52.782393 PNP: 0c09.0
1482 17:08:52.788579 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1483 17:08:52.795210 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1484 17:08:52.802235 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1485 17:08:52.811942 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1486 17:08:52.818633 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1487 17:08:52.818714 GENERIC: 0.0
1488 17:08:52.821847 GENERIC: 1.0
1489 17:08:52.821928 PCI: 00:1f.3
1490 17:08:52.831828 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1491 17:08:52.844770 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1492 17:08:52.844854 PCI: 00:1f.5
1493 17:08:52.854656 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1494 17:08:52.858385 CPU_CLUSTER: 0 child on link 0 APIC: 00
1495 17:08:52.861717 APIC: 00
1496 17:08:52.861828 APIC: 01
1497 17:08:52.865059 APIC: 03
1498 17:08:52.865140 APIC: 07
1499 17:08:52.865204 APIC: 04
1500 17:08:52.868407 APIC: 02
1501 17:08:52.868489 APIC: 06
1502 17:08:52.871256 APIC: 05
1503 17:08:52.871336 Done allocating resources.
1504 17:08:52.878089 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1505 17:08:52.884745 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1506 17:08:52.888105 Configure GPIOs for I2S audio on UP4.
1507 17:08:52.894920 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1508 17:08:52.898204 Enabling resources...
1509 17:08:52.901599 PCI: 00:00.0 subsystem <- 8086/9a12
1510 17:08:52.904850 PCI: 00:00.0 cmd <- 06
1511 17:08:52.908045 PCI: 00:02.0 subsystem <- 8086/9a40
1512 17:08:52.911354 PCI: 00:02.0 cmd <- 03
1513 17:08:52.914607 PCI: 00:04.0 subsystem <- 8086/9a03
1514 17:08:52.917772 PCI: 00:04.0 cmd <- 02
1515 17:08:52.921319 PCI: 00:05.0 subsystem <- 8086/9a19
1516 17:08:52.921422 PCI: 00:05.0 cmd <- 02
1517 17:08:52.928087 PCI: 00:08.0 subsystem <- 8086/9a11
1518 17:08:52.928197 PCI: 00:08.0 cmd <- 06
1519 17:08:52.931297 PCI: 00:0d.0 subsystem <- 8086/9a13
1520 17:08:52.934421 PCI: 00:0d.0 cmd <- 02
1521 17:08:52.938034 PCI: 00:14.0 subsystem <- 8086/a0ed
1522 17:08:52.941153 PCI: 00:14.0 cmd <- 02
1523 17:08:52.944557 PCI: 00:14.2 subsystem <- 8086/a0ef
1524 17:08:52.947962 PCI: 00:14.2 cmd <- 02
1525 17:08:52.950922 PCI: 00:14.3 subsystem <- 8086/a0f0
1526 17:08:52.954262 PCI: 00:14.3 cmd <- 02
1527 17:08:52.957849 PCI: 00:15.0 subsystem <- 8086/a0e8
1528 17:08:52.960794 PCI: 00:15.0 cmd <- 02
1529 17:08:52.964350 PCI: 00:15.1 subsystem <- 8086/a0e9
1530 17:08:52.967651 PCI: 00:15.1 cmd <- 02
1531 17:08:52.971056 PCI: 00:15.2 subsystem <- 8086/a0ea
1532 17:08:52.974415 PCI: 00:15.2 cmd <- 02
1533 17:08:52.977658 PCI: 00:15.3 subsystem <- 8086/a0eb
1534 17:08:52.977738 PCI: 00:15.3 cmd <- 02
1535 17:08:52.984031 PCI: 00:16.0 subsystem <- 8086/a0e0
1536 17:08:52.984135 PCI: 00:16.0 cmd <- 02
1537 17:08:52.987363 PCI: 00:19.1 subsystem <- 8086/a0c6
1538 17:08:52.990741 PCI: 00:19.1 cmd <- 02
1539 17:08:52.994169 PCI: 00:1d.0 bridge ctrl <- 0013
1540 17:08:52.996902 PCI: 00:1d.0 subsystem <- 8086/a0b0
1541 17:08:53.000390 PCI: 00:1d.0 cmd <- 06
1542 17:08:53.003756 PCI: 00:1e.0 subsystem <- 8086/a0a8
1543 17:08:53.007022 PCI: 00:1e.0 cmd <- 06
1544 17:08:53.010343 PCI: 00:1e.2 subsystem <- 8086/a0aa
1545 17:08:53.013488 PCI: 00:1e.2 cmd <- 06
1546 17:08:53.016770 PCI: 00:1e.3 subsystem <- 8086/a0ab
1547 17:08:53.020168 PCI: 00:1e.3 cmd <- 02
1548 17:08:53.023408 PCI: 00:1f.0 subsystem <- 8086/a087
1549 17:08:53.026991 PCI: 00:1f.0 cmd <- 407
1550 17:08:53.029783 PCI: 00:1f.3 subsystem <- 8086/a0c8
1551 17:08:53.033548 PCI: 00:1f.3 cmd <- 02
1552 17:08:53.036404 PCI: 00:1f.5 subsystem <- 8086/a0a4
1553 17:08:53.036484 PCI: 00:1f.5 cmd <- 406
1554 17:08:53.042273 PCI: 01:00.0 cmd <- 02
1555 17:08:53.047204 done.
1556 17:08:53.050078 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1557 17:08:53.053504 Initializing devices...
1558 17:08:53.056714 Root Device init
1559 17:08:53.060252 Chrome EC: Set SMI mask to 0x0000000000000000
1560 17:08:53.066747 Chrome EC: clear events_b mask to 0x0000000000000000
1561 17:08:53.073749 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1562 17:08:53.076682 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1563 17:08:53.083208 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1564 17:08:53.089993 Chrome EC: Set WAKE mask to 0x0000000000000000
1565 17:08:53.093344 fw_config match found: DB_USB=USB3_ACTIVE
1566 17:08:53.100192 Configure Right Type-C port orientation for retimer
1567 17:08:53.102958 Root Device init finished in 42 msecs
1568 17:08:53.106201 PCI: 00:00.0 init
1569 17:08:53.109603 CPU TDP = 9 Watts
1570 17:08:53.109683 CPU PL1 = 9 Watts
1571 17:08:53.113023 CPU PL2 = 40 Watts
1572 17:08:53.113103 CPU PL4 = 83 Watts
1573 17:08:53.116315 PCI: 00:00.0 init finished in 8 msecs
1574 17:08:53.120181 PCI: 00:02.0 init
1575 17:08:53.122998 GMA: Found VBT in CBFS
1576 17:08:53.126246 GMA: Found valid VBT in CBFS
1577 17:08:53.129766 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1578 17:08:53.139592 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1579 17:08:53.142757 PCI: 00:02.0 init finished in 18 msecs
1580 17:08:53.146644 PCI: 00:05.0 init
1581 17:08:53.149599 PCI: 00:05.0 init finished in 0 msecs
1582 17:08:53.149679 PCI: 00:08.0 init
1583 17:08:53.156243 PCI: 00:08.0 init finished in 0 msecs
1584 17:08:53.156323 PCI: 00:14.0 init
1585 17:08:53.163132 PCI: 00:14.0 init finished in 0 msecs
1586 17:08:53.163213 PCI: 00:14.2 init
1587 17:08:53.165902 PCI: 00:14.2 init finished in 0 msecs
1588 17:08:53.169690 PCI: 00:15.0 init
1589 17:08:53.173298 I2C bus 0 version 0x3230302a
1590 17:08:53.176313 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1591 17:08:53.180081 PCI: 00:15.0 init finished in 6 msecs
1592 17:08:53.183210 PCI: 00:15.1 init
1593 17:08:53.186507 I2C bus 1 version 0x3230302a
1594 17:08:53.189980 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1595 17:08:53.192939 PCI: 00:15.1 init finished in 6 msecs
1596 17:08:53.196523 PCI: 00:15.2 init
1597 17:08:53.199945 I2C bus 2 version 0x3230302a
1598 17:08:53.202765 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1599 17:08:53.206631 PCI: 00:15.2 init finished in 6 msecs
1600 17:08:53.209558 PCI: 00:15.3 init
1601 17:08:53.209652 I2C bus 3 version 0x3230302a
1602 17:08:53.216356 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1603 17:08:53.219750 PCI: 00:15.3 init finished in 6 msecs
1604 17:08:53.219831 PCI: 00:16.0 init
1605 17:08:53.223011 PCI: 00:16.0 init finished in 0 msecs
1606 17:08:53.226803 PCI: 00:19.1 init
1607 17:08:53.230077 I2C bus 5 version 0x3230302a
1608 17:08:53.233445 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1609 17:08:53.236785 PCI: 00:19.1 init finished in 6 msecs
1610 17:08:53.240061 PCI: 00:1d.0 init
1611 17:08:53.243359 Initializing PCH PCIe bridge.
1612 17:08:53.246522 PCI: 00:1d.0 init finished in 3 msecs
1613 17:08:53.250035 PCI: 00:1f.0 init
1614 17:08:53.253382 IOAPIC: Initializing IOAPIC at 0xfec00000
1615 17:08:53.259553 IOAPIC: Bootstrap Processor Local APIC = 0x00
1616 17:08:53.259635 IOAPIC: ID = 0x02
1617 17:08:53.263446 IOAPIC: Dumping registers
1618 17:08:53.266250 reg 0x0000: 0x02000000
1619 17:08:53.266331 reg 0x0001: 0x00770020
1620 17:08:53.269813 reg 0x0002: 0x00000000
1621 17:08:53.276187 PCI: 00:1f.0 init finished in 21 msecs
1622 17:08:53.276268 PCI: 00:1f.2 init
1623 17:08:53.279262 Disabling ACPI via APMC.
1624 17:08:53.283924 APMC done.
1625 17:08:53.287498 PCI: 00:1f.2 init finished in 6 msecs
1626 17:08:53.298937 PCI: 01:00.0 init
1627 17:08:53.302441 PCI: 01:00.0 init finished in 0 msecs
1628 17:08:53.305749 PNP: 0c09.0 init
1629 17:08:53.312316 Google Chrome EC uptime: 8.418 seconds
1630 17:08:53.315761 Google Chrome AP resets since EC boot: 0
1631 17:08:53.319028 Google Chrome most recent AP reset causes:
1632 17:08:53.325885 Google Chrome EC reset flags at last EC boot: reset-pin
1633 17:08:53.329136 PNP: 0c09.0 init finished in 18 msecs
1634 17:08:53.333908 Devices initialized
1635 17:08:53.337227 Show all devs... After init.
1636 17:08:53.340567 Root Device: enabled 1
1637 17:08:53.340647 DOMAIN: 0000: enabled 1
1638 17:08:53.343948 CPU_CLUSTER: 0: enabled 1
1639 17:08:53.347355 PCI: 00:00.0: enabled 1
1640 17:08:53.350606 PCI: 00:02.0: enabled 1
1641 17:08:53.350687 PCI: 00:04.0: enabled 1
1642 17:08:53.354219 PCI: 00:05.0: enabled 1
1643 17:08:53.357172 PCI: 00:06.0: enabled 0
1644 17:08:53.360503 PCI: 00:07.0: enabled 0
1645 17:08:53.360584 PCI: 00:07.1: enabled 0
1646 17:08:53.364253 PCI: 00:07.2: enabled 0
1647 17:08:53.367021 PCI: 00:07.3: enabled 0
1648 17:08:53.370408 PCI: 00:08.0: enabled 1
1649 17:08:53.370488 PCI: 00:09.0: enabled 0
1650 17:08:53.373828 PCI: 00:0a.0: enabled 0
1651 17:08:53.377195 PCI: 00:0d.0: enabled 1
1652 17:08:53.380533 PCI: 00:0d.1: enabled 0
1653 17:08:53.380614 PCI: 00:0d.2: enabled 0
1654 17:08:53.383876 PCI: 00:0d.3: enabled 0
1655 17:08:53.386924 PCI: 00:0e.0: enabled 0
1656 17:08:53.387006 PCI: 00:10.2: enabled 1
1657 17:08:53.390570 PCI: 00:10.6: enabled 0
1658 17:08:53.394099 PCI: 00:10.7: enabled 0
1659 17:08:53.397273 PCI: 00:12.0: enabled 0
1660 17:08:53.397354 PCI: 00:12.6: enabled 0
1661 17:08:53.400552 PCI: 00:13.0: enabled 0
1662 17:08:53.403985 PCI: 00:14.0: enabled 1
1663 17:08:53.406875 PCI: 00:14.1: enabled 0
1664 17:08:53.406956 PCI: 00:14.2: enabled 1
1665 17:08:53.410599 PCI: 00:14.3: enabled 1
1666 17:08:53.413650 PCI: 00:15.0: enabled 1
1667 17:08:53.417223 PCI: 00:15.1: enabled 1
1668 17:08:53.417318 PCI: 00:15.2: enabled 1
1669 17:08:53.420173 PCI: 00:15.3: enabled 1
1670 17:08:53.423572 PCI: 00:16.0: enabled 1
1671 17:08:53.423647 PCI: 00:16.1: enabled 0
1672 17:08:53.426865 PCI: 00:16.2: enabled 0
1673 17:08:53.430258 PCI: 00:16.3: enabled 0
1674 17:08:53.433607 PCI: 00:16.4: enabled 0
1675 17:08:53.433688 PCI: 00:16.5: enabled 0
1676 17:08:53.437269 PCI: 00:17.0: enabled 0
1677 17:08:53.440607 PCI: 00:19.0: enabled 0
1678 17:08:53.443848 PCI: 00:19.1: enabled 1
1679 17:08:53.443928 PCI: 00:19.2: enabled 0
1680 17:08:53.447008 PCI: 00:1c.0: enabled 1
1681 17:08:53.450129 PCI: 00:1c.1: enabled 0
1682 17:08:53.453545 PCI: 00:1c.2: enabled 0
1683 17:08:53.453626 PCI: 00:1c.3: enabled 0
1684 17:08:53.457005 PCI: 00:1c.4: enabled 0
1685 17:08:53.460371 PCI: 00:1c.5: enabled 0
1686 17:08:53.463690 PCI: 00:1c.6: enabled 1
1687 17:08:53.463779 PCI: 00:1c.7: enabled 0
1688 17:08:53.466703 PCI: 00:1d.0: enabled 1
1689 17:08:53.470292 PCI: 00:1d.1: enabled 0
1690 17:08:53.470373 PCI: 00:1d.2: enabled 1
1691 17:08:53.473632 PCI: 00:1d.3: enabled 0
1692 17:08:53.476987 PCI: 00:1e.0: enabled 1
1693 17:08:53.480284 PCI: 00:1e.1: enabled 0
1694 17:08:53.480365 PCI: 00:1e.2: enabled 1
1695 17:08:53.483539 PCI: 00:1e.3: enabled 1
1696 17:08:53.486911 PCI: 00:1f.0: enabled 1
1697 17:08:53.490151 PCI: 00:1f.1: enabled 0
1698 17:08:53.490233 PCI: 00:1f.2: enabled 1
1699 17:08:53.493361 PCI: 00:1f.3: enabled 1
1700 17:08:53.496752 PCI: 00:1f.4: enabled 0
1701 17:08:53.499879 PCI: 00:1f.5: enabled 1
1702 17:08:53.499959 PCI: 00:1f.6: enabled 0
1703 17:08:53.503424 PCI: 00:1f.7: enabled 0
1704 17:08:53.506509 APIC: 00: enabled 1
1705 17:08:53.506606 GENERIC: 0.0: enabled 1
1706 17:08:53.510027 GENERIC: 0.0: enabled 1
1707 17:08:53.513487 GENERIC: 1.0: enabled 1
1708 17:08:53.516727 GENERIC: 0.0: enabled 1
1709 17:08:53.516808 GENERIC: 1.0: enabled 1
1710 17:08:53.520079 USB0 port 0: enabled 1
1711 17:08:53.523333 GENERIC: 0.0: enabled 1
1712 17:08:53.523413 USB0 port 0: enabled 1
1713 17:08:53.526893 GENERIC: 0.0: enabled 1
1714 17:08:53.529855 I2C: 00:1a: enabled 1
1715 17:08:53.533615 I2C: 00:31: enabled 1
1716 17:08:53.533696 I2C: 00:32: enabled 1
1717 17:08:53.536474 I2C: 00:10: enabled 1
1718 17:08:53.539756 I2C: 00:15: enabled 1
1719 17:08:53.539836 GENERIC: 0.0: enabled 0
1720 17:08:53.543379 GENERIC: 1.0: enabled 0
1721 17:08:53.546434 GENERIC: 0.0: enabled 1
1722 17:08:53.546515 SPI: 00: enabled 1
1723 17:08:53.549940 SPI: 00: enabled 1
1724 17:08:53.553261 PNP: 0c09.0: enabled 1
1725 17:08:53.553341 GENERIC: 0.0: enabled 1
1726 17:08:53.556650 USB3 port 0: enabled 1
1727 17:08:53.560115 USB3 port 1: enabled 1
1728 17:08:53.563455 USB3 port 2: enabled 0
1729 17:08:53.563536 USB3 port 3: enabled 0
1730 17:08:53.566268 USB2 port 0: enabled 0
1731 17:08:53.569882 USB2 port 1: enabled 1
1732 17:08:53.569963 USB2 port 2: enabled 1
1733 17:08:53.572919 USB2 port 3: enabled 0
1734 17:08:53.576268 USB2 port 4: enabled 1
1735 17:08:53.576349 USB2 port 5: enabled 0
1736 17:08:53.579963 USB2 port 6: enabled 0
1737 17:08:53.583314 USB2 port 7: enabled 0
1738 17:08:53.586474 USB2 port 8: enabled 0
1739 17:08:53.586555 USB2 port 9: enabled 0
1740 17:08:53.589740 USB3 port 0: enabled 0
1741 17:08:53.593190 USB3 port 1: enabled 1
1742 17:08:53.593272 USB3 port 2: enabled 0
1743 17:08:53.596425 USB3 port 3: enabled 0
1744 17:08:53.599757 GENERIC: 0.0: enabled 1
1745 17:08:53.603110 GENERIC: 1.0: enabled 1
1746 17:08:53.603197 APIC: 01: enabled 1
1747 17:08:53.606471 APIC: 03: enabled 1
1748 17:08:53.606551 APIC: 07: enabled 1
1749 17:08:53.609579 APIC: 04: enabled 1
1750 17:08:53.613059 APIC: 02: enabled 1
1751 17:08:53.613143 APIC: 06: enabled 1
1752 17:08:53.616342 APIC: 05: enabled 1
1753 17:08:53.619796 PCI: 01:00.0: enabled 1
1754 17:08:53.622613 BS: BS_DEV_INIT run times (exec / console): 31 / 536 ms
1755 17:08:53.629419 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1756 17:08:53.632685 ELOG: NV offset 0xf30000 size 0x1000
1757 17:08:53.639403 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1758 17:08:53.645910 ELOG: Event(17) added with size 13 at 2024-03-01 17:08:51 UTC
1759 17:08:53.652382 ELOG: Event(92) added with size 9 at 2024-03-01 17:08:51 UTC
1760 17:08:53.659131 ELOG: Event(93) added with size 9 at 2024-03-01 17:08:51 UTC
1761 17:08:53.665304 ELOG: Event(9E) added with size 10 at 2024-03-01 17:08:51 UTC
1762 17:08:53.672190 ELOG: Event(9F) added with size 14 at 2024-03-01 17:08:51 UTC
1763 17:08:53.678993 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1764 17:08:53.685224 ELOG: Event(A1) added with size 10 at 2024-03-01 17:08:51 UTC
1765 17:08:53.692059 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1766 17:08:53.698699 ELOG: Event(A0) added with size 9 at 2024-03-01 17:08:51 UTC
1767 17:08:53.701860 elog_add_boot_reason: Logged dev mode boot
1768 17:08:53.708511 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1769 17:08:53.708592 Finalize devices...
1770 17:08:53.711776 Devices finalized
1771 17:08:53.718657 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1772 17:08:53.721611 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1773 17:08:53.728445 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1774 17:08:53.731778 ME: HFSTS1 : 0x80030055
1775 17:08:53.738450 ME: HFSTS2 : 0x30280116
1776 17:08:53.741897 ME: HFSTS3 : 0x00000050
1777 17:08:53.745248 ME: HFSTS4 : 0x00004000
1778 17:08:53.751402 ME: HFSTS5 : 0x00000000
1779 17:08:53.754858 ME: HFSTS6 : 0x00400006
1780 17:08:53.758187 ME: Manufacturing Mode : YES
1781 17:08:53.761574 ME: SPI Protection Mode Enabled : NO
1782 17:08:53.768257 ME: FW Partition Table : OK
1783 17:08:53.771658 ME: Bringup Loader Failure : NO
1784 17:08:53.774949 ME: Firmware Init Complete : NO
1785 17:08:53.778431 ME: Boot Options Present : NO
1786 17:08:53.781252 ME: Update In Progress : NO
1787 17:08:53.784631 ME: D0i3 Support : YES
1788 17:08:53.787983 ME: Low Power State Enabled : NO
1789 17:08:53.791386 ME: CPU Replaced : YES
1790 17:08:53.797956 ME: CPU Replacement Valid : YES
1791 17:08:53.801494 ME: Current Working State : 5
1792 17:08:53.804304 ME: Current Operation State : 1
1793 17:08:53.807663 ME: Current Operation Mode : 3
1794 17:08:53.811031 ME: Error Code : 0
1795 17:08:53.814781 ME: Enhanced Debug Mode : NO
1796 17:08:53.817583 ME: CPU Debug Disabled : YES
1797 17:08:53.820958 ME: TXT Support : NO
1798 17:08:53.827691 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1799 17:08:53.837609 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1800 17:08:53.840960 CBFS: 'fallback/slic' not found.
1801 17:08:53.844517 ACPI: Writing ACPI tables at 76b01000.
1802 17:08:53.844598 ACPI: * FACS
1803 17:08:53.847319 ACPI: * DSDT
1804 17:08:53.851093 Ramoops buffer: 0x100000@0x76a00000.
1805 17:08:53.854019 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1806 17:08:53.860638 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1807 17:08:53.863863 Google Chrome EC: version:
1808 17:08:53.867302 ro: voema_v2.0.10114-a447f03e46
1809 17:08:53.870719 rw: voema_v2.0.10114-a447f03e46
1810 17:08:53.870793 running image: 1
1811 17:08:53.877120 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1812 17:08:53.882167 ACPI: * FADT
1813 17:08:53.882246 SCI is IRQ9
1814 17:08:53.888471 ACPI: added table 1/32, length now 40
1815 17:08:53.888552 ACPI: * SSDT
1816 17:08:53.891882 Found 1 CPU(s) with 8 core(s) each.
1817 17:08:53.898692 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1818 17:08:53.901979 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1819 17:08:53.905340 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1820 17:08:53.909010 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1821 17:08:53.915091 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1822 17:08:53.922037 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1823 17:08:53.925406 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1824 17:08:53.932147 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1825 17:08:53.938593 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1826 17:08:53.941957 \_SB.PCI0.RP09: Added StorageD3Enable property
1827 17:08:53.948840 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1828 17:08:53.951688 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1829 17:08:53.958313 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1830 17:08:53.961719 PS2K: Passing 80 keymaps to kernel
1831 17:08:53.968589 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1832 17:08:53.974671 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1833 17:08:53.981536 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1834 17:08:53.988236 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1835 17:08:53.994771 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1836 17:08:54.001257 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1837 17:08:54.007877 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1838 17:08:54.014469 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1839 17:08:54.018135 ACPI: added table 2/32, length now 44
1840 17:08:54.018217 ACPI: * MCFG
1841 17:08:54.024696 ACPI: added table 3/32, length now 48
1842 17:08:54.024777 ACPI: * TPM2
1843 17:08:54.027800 TPM2 log created at 0x769f0000
1844 17:08:54.031255 ACPI: added table 4/32, length now 52
1845 17:08:54.034742 ACPI: * MADT
1846 17:08:54.034824 SCI is IRQ9
1847 17:08:54.038233 ACPI: added table 5/32, length now 56
1848 17:08:54.041361 current = 76b09850
1849 17:08:54.041442 ACPI: * DMAR
1850 17:08:54.044770 ACPI: added table 6/32, length now 60
1851 17:08:54.051284 ACPI: added table 7/32, length now 64
1852 17:08:54.051366 ACPI: * HPET
1853 17:08:54.054661 ACPI: added table 8/32, length now 68
1854 17:08:54.058028 ACPI: done.
1855 17:08:54.058109 ACPI tables: 35216 bytes.
1856 17:08:54.060890 smbios_write_tables: 769ef000
1857 17:08:54.065437 EC returned error result code 3
1858 17:08:54.068828 Couldn't obtain OEM name from CBI
1859 17:08:54.072765 Create SMBIOS type 16
1860 17:08:54.076102 Create SMBIOS type 17
1861 17:08:54.079574 GENERIC: 0.0 (WIFI Device)
1862 17:08:54.079675 SMBIOS tables: 1750 bytes.
1863 17:08:54.085767 Writing table forward entry at 0x00000500
1864 17:08:54.092387 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1865 17:08:54.096030 Writing coreboot table at 0x76b25000
1866 17:08:54.102479 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1867 17:08:54.105676 1. 0000000000001000-000000000009ffff: RAM
1868 17:08:54.109240 2. 00000000000a0000-00000000000fffff: RESERVED
1869 17:08:54.115930 3. 0000000000100000-00000000769eefff: RAM
1870 17:08:54.119227 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1871 17:08:54.125766 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1872 17:08:54.132360 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1873 17:08:54.135637 7. 0000000077000000-000000007fbfffff: RESERVED
1874 17:08:54.139197 8. 00000000c0000000-00000000cfffffff: RESERVED
1875 17:08:54.145483 9. 00000000f8000000-00000000f9ffffff: RESERVED
1876 17:08:54.149151 10. 00000000fb000000-00000000fb000fff: RESERVED
1877 17:08:54.155430 11. 00000000fe000000-00000000fe00ffff: RESERVED
1878 17:08:54.158791 12. 00000000fed80000-00000000fed87fff: RESERVED
1879 17:08:54.165621 13. 00000000fed90000-00000000fed92fff: RESERVED
1880 17:08:54.169024 14. 00000000feda0000-00000000feda1fff: RESERVED
1881 17:08:54.175716 15. 00000000fedc0000-00000000feddffff: RESERVED
1882 17:08:54.179093 16. 0000000100000000-00000002803fffff: RAM
1883 17:08:54.181858 Passing 4 GPIOs to payload:
1884 17:08:54.185282 NAME | PORT | POLARITY | VALUE
1885 17:08:54.192038 lid | undefined | high | high
1886 17:08:54.198807 power | undefined | high | low
1887 17:08:54.202276 oprom | undefined | high | low
1888 17:08:54.208637 EC in RW | 0x000000e5 | high | low
1889 17:08:54.215108 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 5a43
1890 17:08:54.215189 coreboot table: 1576 bytes.
1891 17:08:54.222108 IMD ROOT 0. 0x76fff000 0x00001000
1892 17:08:54.224979 IMD SMALL 1. 0x76ffe000 0x00001000
1893 17:08:54.228445 FSP MEMORY 2. 0x76c4e000 0x003b0000
1894 17:08:54.231623 VPD 3. 0x76c4d000 0x00000367
1895 17:08:54.235446 RO MCACHE 4. 0x76c4c000 0x00000fdc
1896 17:08:54.238361 CONSOLE 5. 0x76c2c000 0x00020000
1897 17:08:54.241750 FMAP 6. 0x76c2b000 0x00000578
1898 17:08:54.244924 TIME STAMP 7. 0x76c2a000 0x00000910
1899 17:08:54.251573 VBOOT WORK 8. 0x76c16000 0x00014000
1900 17:08:54.254845 ROMSTG STCK 9. 0x76c15000 0x00001000
1901 17:08:54.258106 AFTER CAR 10. 0x76c0a000 0x0000b000
1902 17:08:54.261610 RAMSTAGE 11. 0x76b97000 0x00073000
1903 17:08:54.264891 REFCODE 12. 0x76b42000 0x00055000
1904 17:08:54.268305 SMM BACKUP 13. 0x76b32000 0x00010000
1905 17:08:54.271707 4f444749 14. 0x76b30000 0x00002000
1906 17:08:54.275136 EXT VBT15. 0x76b2d000 0x0000219f
1907 17:08:54.278009 COREBOOT 16. 0x76b25000 0x00008000
1908 17:08:54.284675 ACPI 17. 0x76b01000 0x00024000
1909 17:08:54.288092 ACPI GNVS 18. 0x76b00000 0x00001000
1910 17:08:54.291591 RAMOOPS 19. 0x76a00000 0x00100000
1911 17:08:54.294925 TPM2 TCGLOG20. 0x769f0000 0x00010000
1912 17:08:54.298359 SMBIOS 21. 0x769ef000 0x00000800
1913 17:08:54.301629 IMD small region:
1914 17:08:54.304503 IMD ROOT 0. 0x76ffec00 0x00000400
1915 17:08:54.307914 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1916 17:08:54.311260 POWER STATE 2. 0x76ffeb80 0x00000044
1917 17:08:54.314497 ROMSTAGE 3. 0x76ffeb60 0x00000004
1918 17:08:54.320960 MEM INFO 4. 0x76ffe980 0x000001e0
1919 17:08:54.324331 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1920 17:08:54.327799 MTRR: Physical address space:
1921 17:08:54.334336 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1922 17:08:54.341336 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1923 17:08:54.347920 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1924 17:08:54.354473 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1925 17:08:54.360962 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1926 17:08:54.367551 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1927 17:08:54.370784 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1928 17:08:54.377677 MTRR: Fixed MSR 0x250 0x0606060606060606
1929 17:08:54.380944 MTRR: Fixed MSR 0x258 0x0606060606060606
1930 17:08:54.384434 MTRR: Fixed MSR 0x259 0x0000000000000000
1931 17:08:54.387762 MTRR: Fixed MSR 0x268 0x0606060606060606
1932 17:08:54.394375 MTRR: Fixed MSR 0x269 0x0606060606060606
1933 17:08:54.397812 MTRR: Fixed MSR 0x26a 0x0606060606060606
1934 17:08:54.400648 MTRR: Fixed MSR 0x26b 0x0606060606060606
1935 17:08:54.404009 MTRR: Fixed MSR 0x26c 0x0606060606060606
1936 17:08:54.410832 MTRR: Fixed MSR 0x26d 0x0606060606060606
1937 17:08:54.414121 MTRR: Fixed MSR 0x26e 0x0606060606060606
1938 17:08:54.417501 MTRR: Fixed MSR 0x26f 0x0606060606060606
1939 17:08:54.420754 call enable_fixed_mtrr()
1940 17:08:54.423882 CPU physical address size: 39 bits
1941 17:08:54.430621 MTRR: default type WB/UC MTRR counts: 6/6.
1942 17:08:54.433937 MTRR: UC selected as default type.
1943 17:08:54.440669 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1944 17:08:54.444041 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1945 17:08:54.450230 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1946 17:08:54.457083 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1947 17:08:54.463802 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1948 17:08:54.470404 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1949 17:08:54.470486
1950 17:08:54.473534 MTRR check
1951 17:08:54.477250 Fixed MTRRs : Enabled
1952 17:08:54.477331 Variable MTRRs: Enabled
1953 17:08:54.477395
1954 17:08:54.483700 MTRR: Fixed MSR 0x250 0x0606060606060606
1955 17:08:54.486805 MTRR: Fixed MSR 0x258 0x0606060606060606
1956 17:08:54.490460 MTRR: Fixed MSR 0x259 0x0000000000000000
1957 17:08:54.493625 MTRR: Fixed MSR 0x268 0x0606060606060606
1958 17:08:54.496633 MTRR: Fixed MSR 0x269 0x0606060606060606
1959 17:08:54.503608 MTRR: Fixed MSR 0x26a 0x0606060606060606
1960 17:08:54.507017 MTRR: Fixed MSR 0x26b 0x0606060606060606
1961 17:08:54.510428 MTRR: Fixed MSR 0x26c 0x0606060606060606
1962 17:08:54.513201 MTRR: Fixed MSR 0x26d 0x0606060606060606
1963 17:08:54.519864 MTRR: Fixed MSR 0x26e 0x0606060606060606
1964 17:08:54.523264 MTRR: Fixed MSR 0x26f 0x0606060606060606
1965 17:08:54.529761 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1966 17:08:54.533104 call enable_fixed_mtrr()
1967 17:08:54.536344 Checking cr50 for pending updates
1968 17:08:54.540126 CPU physical address size: 39 bits
1969 17:08:54.543539 MTRR: Fixed MSR 0x250 0x0606060606060606
1970 17:08:54.546881 MTRR: Fixed MSR 0x250 0x0606060606060606
1971 17:08:54.550214 MTRR: Fixed MSR 0x258 0x0606060606060606
1972 17:08:54.557031 MTRR: Fixed MSR 0x259 0x0000000000000000
1973 17:08:54.560376 MTRR: Fixed MSR 0x268 0x0606060606060606
1974 17:08:54.563683 MTRR: Fixed MSR 0x269 0x0606060606060606
1975 17:08:54.567169 MTRR: Fixed MSR 0x26a 0x0606060606060606
1976 17:08:54.573611 MTRR: Fixed MSR 0x26b 0x0606060606060606
1977 17:08:54.576862 MTRR: Fixed MSR 0x26c 0x0606060606060606
1978 17:08:54.580289 MTRR: Fixed MSR 0x26d 0x0606060606060606
1979 17:08:54.583611 MTRR: Fixed MSR 0x26e 0x0606060606060606
1980 17:08:54.589985 MTRR: Fixed MSR 0x26f 0x0606060606060606
1981 17:08:54.593198 MTRR: Fixed MSR 0x258 0x0606060606060606
1982 17:08:54.596676 call enable_fixed_mtrr()
1983 17:08:54.599606 MTRR: Fixed MSR 0x259 0x0000000000000000
1984 17:08:54.603212 MTRR: Fixed MSR 0x268 0x0606060606060606
1985 17:08:54.609703 MTRR: Fixed MSR 0x269 0x0606060606060606
1986 17:08:54.612934 MTRR: Fixed MSR 0x26a 0x0606060606060606
1987 17:08:54.616493 MTRR: Fixed MSR 0x26b 0x0606060606060606
1988 17:08:54.619622 MTRR: Fixed MSR 0x26c 0x0606060606060606
1989 17:08:54.626265 MTRR: Fixed MSR 0x26d 0x0606060606060606
1990 17:08:54.629672 MTRR: Fixed MSR 0x26e 0x0606060606060606
1991 17:08:54.632927 MTRR: Fixed MSR 0x26f 0x0606060606060606
1992 17:08:54.635978 CPU physical address size: 39 bits
1993 17:08:54.643188 call enable_fixed_mtrr()
1994 17:08:54.646153 MTRR: Fixed MSR 0x250 0x0606060606060606
1995 17:08:54.649596 MTRR: Fixed MSR 0x250 0x0606060606060606
1996 17:08:54.652950 MTRR: Fixed MSR 0x258 0x0606060606060606
1997 17:08:54.656340 MTRR: Fixed MSR 0x259 0x0000000000000000
1998 17:08:54.662983 MTRR: Fixed MSR 0x268 0x0606060606060606
1999 17:08:54.666254 MTRR: Fixed MSR 0x269 0x0606060606060606
2000 17:08:54.669691 MTRR: Fixed MSR 0x26a 0x0606060606060606
2001 17:08:54.673067 MTRR: Fixed MSR 0x26b 0x0606060606060606
2002 17:08:54.679530 MTRR: Fixed MSR 0x26c 0x0606060606060606
2003 17:08:54.682682 MTRR: Fixed MSR 0x26d 0x0606060606060606
2004 17:08:54.686076 MTRR: Fixed MSR 0x26e 0x0606060606060606
2005 17:08:54.689548 MTRR: Fixed MSR 0x26f 0x0606060606060606
2006 17:08:54.696715 MTRR: Fixed MSR 0x258 0x0606060606060606
2007 17:08:54.700208 MTRR: Fixed MSR 0x259 0x0000000000000000
2008 17:08:54.703486 MTRR: Fixed MSR 0x268 0x0606060606060606
2009 17:08:54.706806 MTRR: Fixed MSR 0x269 0x0606060606060606
2010 17:08:54.713292 MTRR: Fixed MSR 0x26a 0x0606060606060606
2011 17:08:54.716848 MTRR: Fixed MSR 0x26b 0x0606060606060606
2012 17:08:54.719879 MTRR: Fixed MSR 0x26c 0x0606060606060606
2013 17:08:54.723403 MTRR: Fixed MSR 0x26d 0x0606060606060606
2014 17:08:54.729929 MTRR: Fixed MSR 0x26e 0x0606060606060606
2015 17:08:54.733402 MTRR: Fixed MSR 0x26f 0x0606060606060606
2016 17:08:54.736401 call enable_fixed_mtrr()
2017 17:08:54.740628 call enable_fixed_mtrr()
2018 17:08:54.740707 Reading cr50 TPM mode
2019 17:08:54.743713 MTRR: Fixed MSR 0x250 0x0606060606060606
2020 17:08:54.750359 MTRR: Fixed MSR 0x250 0x0606060606060606
2021 17:08:54.753608 MTRR: Fixed MSR 0x258 0x0606060606060606
2022 17:08:54.757431 MTRR: Fixed MSR 0x259 0x0000000000000000
2023 17:08:54.760356 MTRR: Fixed MSR 0x268 0x0606060606060606
2024 17:08:54.767219 MTRR: Fixed MSR 0x269 0x0606060606060606
2025 17:08:54.770627 MTRR: Fixed MSR 0x26a 0x0606060606060606
2026 17:08:54.773620 MTRR: Fixed MSR 0x26b 0x0606060606060606
2027 17:08:54.777464 MTRR: Fixed MSR 0x26c 0x0606060606060606
2028 17:08:54.780327 MTRR: Fixed MSR 0x26d 0x0606060606060606
2029 17:08:54.787236 MTRR: Fixed MSR 0x26e 0x0606060606060606
2030 17:08:54.790223 MTRR: Fixed MSR 0x26f 0x0606060606060606
2031 17:08:54.793623 MTRR: Fixed MSR 0x258 0x0606060606060606
2032 17:08:54.796958 call enable_fixed_mtrr()
2033 17:08:54.800329 MTRR: Fixed MSR 0x259 0x0000000000000000
2034 17:08:54.807054 MTRR: Fixed MSR 0x268 0x0606060606060606
2035 17:08:54.810418 MTRR: Fixed MSR 0x269 0x0606060606060606
2036 17:08:54.813775 MTRR: Fixed MSR 0x26a 0x0606060606060606
2037 17:08:54.817186 MTRR: Fixed MSR 0x26b 0x0606060606060606
2038 17:08:54.823738 MTRR: Fixed MSR 0x26c 0x0606060606060606
2039 17:08:54.826869 MTRR: Fixed MSR 0x26d 0x0606060606060606
2040 17:08:54.829915 MTRR: Fixed MSR 0x26e 0x0606060606060606
2041 17:08:54.833289 MTRR: Fixed MSR 0x26f 0x0606060606060606
2042 17:08:54.837417 CPU physical address size: 39 bits
2043 17:08:54.844150 call enable_fixed_mtrr()
2044 17:08:54.847429 CPU physical address size: 39 bits
2045 17:08:54.850516 CPU physical address size: 39 bits
2046 17:08:54.853919 CPU physical address size: 39 bits
2047 17:08:54.860743 BS: BS_PAYLOAD_LOAD entry times (exec / console): 210 / 6 ms
2048 17:08:54.864028 CPU physical address size: 39 bits
2049 17:08:54.870685 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2050 17:08:54.877330 Checking segment from ROM address 0xffc02b38
2051 17:08:54.880312 Checking segment from ROM address 0xffc02b54
2052 17:08:54.883675 Loading segment from ROM address 0xffc02b38
2053 17:08:54.887107 code (compression=0)
2054 17:08:54.896841 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2055 17:08:54.903451 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2056 17:08:54.906732 it's not compressed!
2057 17:08:55.045488 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2058 17:08:55.052306 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2059 17:08:55.058593 Loading segment from ROM address 0xffc02b54
2060 17:08:55.058700 Entry Point 0x30000000
2061 17:08:55.062053 Loaded segments
2062 17:08:55.068672 BS: BS_PAYLOAD_LOAD run times (exec / console): 138 / 63 ms
2063 17:08:55.111554 Finalizing chipset.
2064 17:08:55.114600 Finalizing SMM.
2065 17:08:55.114705 APMC done.
2066 17:08:55.121589 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2067 17:08:55.125020 mp_park_aps done after 0 msecs.
2068 17:08:55.127757 Jumping to boot code at 0x30000000(0x76b25000)
2069 17:08:55.138018 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2070 17:08:55.138120
2071 17:08:55.138214
2072 17:08:55.138309
2073 17:08:55.141344 Starting depthcharge on Voema...
2074 17:08:55.141439
2075 17:08:55.141861 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2076 17:08:55.141992 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2077 17:08:55.142104 Setting prompt string to ['volteer:']
2078 17:08:55.142221 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2079 17:08:55.151538 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2080 17:08:55.151642
2081 17:08:55.157898 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2082 17:08:55.157999
2083 17:08:55.164417 Looking for NVMe Controller 0x3005f238 @ 00:1d:00
2084 17:08:55.164561
2085 17:08:55.167552 Failed to find eMMC card reader
2086 17:08:55.167648
2087 17:08:55.167738 Wipe memory regions:
2088 17:08:55.167824
2089 17:08:55.174354 [0x00000000001000, 0x000000000a0000)
2090 17:08:55.174454
2091 17:08:55.177456 [0x00000000100000, 0x00000030000000)
2092 17:08:55.203585
2093 17:08:55.206258 [0x00000032662db0, 0x000000769ef000)
2094 17:08:55.241823
2095 17:08:55.245152 [0x00000100000000, 0x00000280400000)
2096 17:08:55.445640
2097 17:08:55.448916 ec_init: CrosEC protocol v3 supported (256, 256)
2098 17:08:55.879848
2099 17:08:55.880014 R8152: Initializing
2100 17:08:55.880158
2101 17:08:55.882964 Version 6 (ocp_data = 5c30)
2102 17:08:55.883077
2103 17:08:55.886505 R8152: Done initializing
2104 17:08:55.886614
2105 17:08:55.889701 Adding net device
2106 17:08:56.191815
2107 17:08:56.195151 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2108 17:08:56.195263
2109 17:08:56.195357
2110 17:08:56.195454
2111 17:08:56.198729 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2113 17:08:56.299112 volteer: tftpboot 192.168.201.1 12908838/tftp-deploy-2gtill5s/kernel/bzImage 12908838/tftp-deploy-2gtill5s/kernel/cmdline 12908838/tftp-deploy-2gtill5s/ramdisk/ramdisk.cpio.gz
2114 17:08:56.299299 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2115 17:08:56.299413 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2116 17:08:56.303314 tftpboot 192.168.201.1 12908838/tftp-deploy-2gtill5s/kernel/bzIploy-2gtill5s/kernel/cmdline 12908838/tftp-deploy-2gtill5s/ramdisk/ramdisk.cpio.gz
2117 17:08:56.303423
2118 17:08:56.303556 Waiting for link
2119 17:08:56.506381
2120 17:08:56.506540 done.
2121 17:08:56.506634
2122 17:08:56.506723 MAC: 00:24:32:30:77:76
2123 17:08:56.506812
2124 17:08:56.509223 Sending DHCP discover... done.
2125 17:08:56.509319
2126 17:08:56.512656 Waiting for reply... done.
2127 17:08:56.512753
2128 17:08:56.516006 Sending DHCP request... done.
2129 17:08:56.516134
2130 17:08:56.519419 Waiting for reply... done.
2131 17:08:56.519491
2132 17:08:56.522816 My ip is 192.168.201.16
2133 17:08:56.522914
2134 17:08:56.526086 The DHCP server ip is 192.168.201.1
2135 17:08:56.526182
2136 17:08:56.529129 TFTP server IP predefined by user: 192.168.201.1
2137 17:08:56.529227
2138 17:08:56.536022 Bootfile predefined by user: 12908838/tftp-deploy-2gtill5s/kernel/bzImage
2139 17:08:56.536148
2140 17:08:56.539323 Sending tftp read request... done.
2141 17:08:56.539404
2142 17:08:56.546592 Waiting for the transfer...
2143 17:08:56.546703
2144 17:08:57.083170 00000000 ################################################################
2145 17:08:57.083326
2146 17:08:57.601786 00080000 ################################################################
2147 17:08:57.601957
2148 17:08:58.129145 00100000 ################################################################
2149 17:08:58.129348
2150 17:08:58.669888 00180000 ################################################################
2151 17:08:58.670032
2152 17:08:59.206151 00200000 ################################################################
2153 17:08:59.206350
2154 17:08:59.745711 00280000 ################################################################
2155 17:08:59.745844
2156 17:09:00.272420 00300000 ################################################################
2157 17:09:00.272568
2158 17:09:00.806297 00380000 ################################################################
2159 17:09:00.806436
2160 17:09:01.432040 00400000 ################################################################
2161 17:09:01.432630
2162 17:09:02.108430 00480000 ################################################################
2163 17:09:02.108938
2164 17:09:02.794360 00500000 ################################################################
2165 17:09:02.794872
2166 17:09:03.477011 00580000 ################################################################
2167 17:09:03.477546
2168 17:09:04.154520 00600000 ################################################################
2169 17:09:04.155029
2170 17:09:04.846356 00680000 ################################################################
2171 17:09:04.846967
2172 17:09:05.533477 00700000 ################################################################
2173 17:09:05.533997
2174 17:09:06.212162 00780000 ################################################################
2175 17:09:06.212690
2176 17:09:06.893200 00800000 ################################################################
2177 17:09:06.893714
2178 17:09:07.471686 00880000 ######################################################## done.
2179 17:09:07.472330
2180 17:09:07.475382 The bootfile was 9367440 bytes long.
2181 17:09:07.475820
2182 17:09:07.478348 Sending tftp read request... done.
2183 17:09:07.478763
2184 17:09:07.481930 Waiting for the transfer...
2185 17:09:07.482347
2186 17:09:08.159411 00000000 ################################################################
2187 17:09:08.159562
2188 17:09:08.837414 00080000 ################################################################
2189 17:09:08.837932
2190 17:09:09.491969 00100000 ################################################################
2191 17:09:09.492522
2192 17:09:10.171575 00180000 ################################################################
2193 17:09:10.171825
2194 17:09:10.843629 00200000 ################################################################
2195 17:09:10.844270
2196 17:09:11.511753 00280000 ################################################################
2197 17:09:11.512366
2198 17:09:12.215165 00300000 ################################################################
2199 17:09:12.215706
2200 17:09:12.900160 00380000 ################################################################
2201 17:09:12.900753
2202 17:09:13.575623 00400000 ################################################################
2203 17:09:13.575776
2204 17:09:14.258578 00480000 ################################################################
2205 17:09:14.258731
2206 17:09:14.941896 00500000 ################################################################
2207 17:09:14.942126
2208 17:09:15.619356 00580000 ################################################################
2209 17:09:15.619865
2210 17:09:16.305008 00600000 ################################################################
2211 17:09:16.305517
2212 17:09:16.933782 00680000 ################################################################
2213 17:09:16.934298
2214 17:09:17.620905 00700000 ################################################################
2215 17:09:17.621418
2216 17:09:18.332910 00780000 ################################################################
2217 17:09:18.333443
2218 17:09:19.025582 00800000 ################################################################
2219 17:09:19.026185
2220 17:09:19.710991 00880000 ################################################################
2221 17:09:19.711520
2222 17:09:20.424118 00900000 ################################################################
2223 17:09:20.424647
2224 17:09:21.124062 00980000 ################################################################
2225 17:09:21.124224
2226 17:09:21.730604 00a00000 ################################################################
2227 17:09:21.730755
2228 17:09:22.340816 00a80000 ################################################################
2229 17:09:22.341366
2230 17:09:23.020452 00b00000 ################################################################
2231 17:09:23.021002
2232 17:09:23.709662 00b80000 ################################################################
2233 17:09:23.710188
2234 17:09:24.403547 00c00000 ################################################################
2235 17:09:24.404095
2236 17:09:25.084626 00c80000 ################################################################
2237 17:09:25.085169
2238 17:09:25.747948 00d00000 ################################################################
2239 17:09:25.748136
2240 17:09:26.393089 00d80000 ################################################################
2241 17:09:26.393660
2242 17:09:26.987559 00e00000 ################################################################
2243 17:09:26.987713
2244 17:09:27.534463 00e80000 ################################################################
2245 17:09:27.534612
2246 17:09:28.087220 00f00000 ################################################################
2247 17:09:28.087363
2248 17:09:28.743542 00f80000 ################################################################
2249 17:09:28.744118
2250 17:09:29.428806 01000000 ################################################################
2251 17:09:29.429322
2252 17:09:30.119395 01080000 ################################################################
2253 17:09:30.119914
2254 17:09:30.818833 01100000 ################################################################
2255 17:09:30.819455
2256 17:09:31.516793 01180000 ################################################################
2257 17:09:31.517540
2258 17:09:32.203004 01200000 ################################################################
2259 17:09:32.203527
2260 17:09:32.881291 01280000 ################################################################
2261 17:09:32.881840
2262 17:09:33.555643 01300000 ################################################################
2263 17:09:33.556334
2264 17:09:34.245816 01380000 ################################################################
2265 17:09:34.246450
2266 17:09:34.957601 01400000 ################################################################
2267 17:09:34.958331
2268 17:09:35.664359 01480000 ################################################################
2269 17:09:35.664866
2270 17:09:36.364023 01500000 ################################################################
2271 17:09:36.364598
2272 17:09:37.029902 01580000 ################################################################
2273 17:09:37.030108
2274 17:09:37.684195 01600000 ################################################################
2275 17:09:37.684739
2276 17:09:38.362854 01680000 ################################################################
2277 17:09:38.363414
2278 17:09:39.060755 01700000 ################################################################
2279 17:09:39.060959
2280 17:09:39.688642 01780000 ################################################################
2281 17:09:39.689146
2282 17:09:40.349038 01800000 ################################################################
2283 17:09:40.349580
2284 17:09:41.040535 01880000 ################################################################
2285 17:09:41.041032
2286 17:09:41.727074 01900000 ################################################################
2287 17:09:41.727567
2288 17:09:42.410511 01980000 ################################################################
2289 17:09:42.411012
2290 17:09:43.088367 01a00000 ################################################################
2291 17:09:43.088887
2292 17:09:43.757912 01a80000 ################################################################
2293 17:09:43.758486
2294 17:09:44.408063 01b00000 ################################################################
2295 17:09:44.408277
2296 17:09:45.045377 01b80000 ################################################################
2297 17:09:45.045875
2298 17:09:45.729146 01c00000 ################################################################
2299 17:09:45.729648
2300 17:09:46.397618 01c80000 ################################################################
2301 17:09:46.398119
2302 17:09:47.086276 01d00000 ################################################################
2303 17:09:47.086923
2304 17:09:47.654285 01d80000 ################################################################
2305 17:09:47.654809
2306 17:09:48.343021 01e00000 ################################################################
2307 17:09:48.343721
2308 17:09:48.984914 01e80000 ################################################################
2309 17:09:48.985068
2310 17:09:49.513197 01f00000 ################################################################
2311 17:09:49.513355
2312 17:09:50.082440 01f80000 ################################################################
2313 17:09:50.082585
2314 17:09:50.653114 02000000 ################################################################
2315 17:09:50.653289
2316 17:09:51.226619 02080000 ################################################################
2317 17:09:51.226768
2318 17:09:51.775401 02100000 ################################################################
2319 17:09:51.775547
2320 17:09:52.343073 02180000 ################################################################
2321 17:09:52.343234
2322 17:09:52.833155 02200000 ###################################################### done.
2323 17:09:52.833316
2324 17:09:52.836400 Sending tftp read request... done.
2325 17:09:52.836486
2326 17:09:52.839799 Waiting for the transfer...
2327 17:09:52.839906
2328 17:09:52.840002 00000000 # done.
2329 17:09:52.840122
2330 17:09:52.850023 Command line loaded dynamically from TFTP file: 12908838/tftp-deploy-2gtill5s/kernel/cmdline
2331 17:09:52.850104
2332 17:09:52.865850 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2333 17:09:52.871981
2334 17:09:52.874969 Shutting down all USB controllers.
2335 17:09:52.875049
2336 17:09:52.875113 Removing current net device
2337 17:09:52.875187
2338 17:09:52.878244 Finalizing coreboot
2339 17:09:52.878324
2340 17:09:52.884772 Exiting depthcharge with code 4 at timestamp: 66408602
2341 17:09:52.884879
2342 17:09:52.884972
2343 17:09:52.885069 Starting kernel ...
2344 17:09:52.885155
2345 17:09:52.885239
2346 17:09:52.886098 end: 2.2.4 bootloader-commands (duration 00:00:58) [common]
2347 17:09:52.886194 start: 2.2.5 auto-login-action (timeout 00:03:47) [common]
2348 17:09:52.886269 Setting prompt string to ['Linux version [0-9]']
2349 17:09:52.886335 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2350 17:09:52.886401 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2352 17:13:39.887207 end: 2.2.5 auto-login-action (duration 00:03:47) [common]
2354 17:13:39.888265 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 227 seconds'
2356 17:13:39.889079 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2359 17:13:39.890419 end: 2 depthcharge-action (duration 00:05:00) [common]
2361 17:13:39.891496 Cleaning after the job
2362 17:13:39.891920 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12908838/tftp-deploy-2gtill5s/ramdisk
2363 17:13:39.913719 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12908838/tftp-deploy-2gtill5s/kernel
2364 17:13:39.917767 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12908838/tftp-deploy-2gtill5s/modules
2365 17:13:39.918652 start: 4.1 power-off (timeout 00:00:30) [common]
2366 17:13:39.919070 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=off'
2367 17:13:40.021119 >> Command sent successfully.
2368 17:13:40.031359 Returned 0 in 0 seconds
2369 17:13:40.132606 end: 4.1 power-off (duration 00:00:00) [common]
2371 17:13:40.134066 start: 4.2 read-feedback (timeout 00:10:00) [common]
2372 17:13:40.135243 Listened to connection for namespace 'common' for up to 1s
2373 17:13:41.135991 Finalising connection for namespace 'common'
2374 17:13:41.136772 Disconnecting from shell: Finalise
2375 17:13:41.137217
2376 17:13:41.238427 end: 4.2 read-feedback (duration 00:00:01) [common]
2377 17:13:41.239057 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12908838
2378 17:13:41.333330 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12908838
2379 17:13:41.333528 JobError: Your job cannot terminate cleanly.