Boot log: acer-cb317-1h-c3z6-dedede
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 12:46:16.663437 lava-dispatcher, installed at version: 2024.01
2 12:46:16.663648 start: 0 validate
3 12:46:16.663783 Start time: 2024-03-05 12:46:16.663775+00:00 (UTC)
4 12:46:16.663912 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:46:16.664042 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 12:46:16.939636 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:46:16.939811 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2247-g140bf69dc64d%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:46:17.198610 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:46:17.198773 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2247-g140bf69dc64d%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 12:46:17.466120 validate duration: 0.80
12 12:46:17.466401 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:46:17.466515 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:46:17.466626 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:46:17.466760 Not decompressing ramdisk as can be used compressed.
16 12:46:17.466846 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 12:46:17.466912 saving as /var/lib/lava/dispatcher/tmp/12948301/tftp-deploy-0kc4eie5/ramdisk/rootfs.cpio.gz
18 12:46:17.466977 total size: 8418130 (8 MB)
19 12:46:17.468065 progress 0 % (0 MB)
20 12:46:17.470531 progress 5 % (0 MB)
21 12:46:17.472895 progress 10 % (0 MB)
22 12:46:17.475177 progress 15 % (1 MB)
23 12:46:17.477521 progress 20 % (1 MB)
24 12:46:17.479850 progress 25 % (2 MB)
25 12:46:17.482129 progress 30 % (2 MB)
26 12:46:17.484277 progress 35 % (2 MB)
27 12:46:17.486559 progress 40 % (3 MB)
28 12:46:17.488883 progress 45 % (3 MB)
29 12:46:17.491143 progress 50 % (4 MB)
30 12:46:17.493460 progress 55 % (4 MB)
31 12:46:17.495740 progress 60 % (4 MB)
32 12:46:17.497857 progress 65 % (5 MB)
33 12:46:17.500117 progress 70 % (5 MB)
34 12:46:17.502352 progress 75 % (6 MB)
35 12:46:17.504602 progress 80 % (6 MB)
36 12:46:17.506815 progress 85 % (6 MB)
37 12:46:17.509080 progress 90 % (7 MB)
38 12:46:17.511286 progress 95 % (7 MB)
39 12:46:17.513367 progress 100 % (8 MB)
40 12:46:17.513644 8 MB downloaded in 0.05 s (172.03 MB/s)
41 12:46:17.513806 end: 1.1.1 http-download (duration 00:00:00) [common]
43 12:46:17.514046 end: 1.1 download-retry (duration 00:00:00) [common]
44 12:46:17.514137 start: 1.2 download-retry (timeout 00:10:00) [common]
45 12:46:17.514223 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 12:46:17.514361 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2247-g140bf69dc64d/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 12:46:17.514434 saving as /var/lib/lava/dispatcher/tmp/12948301/tftp-deploy-0kc4eie5/kernel/bzImage
48 12:46:17.514495 total size: 9367440 (8 MB)
49 12:46:17.514556 No compression specified
50 12:46:17.515730 progress 0 % (0 MB)
51 12:46:17.518238 progress 5 % (0 MB)
52 12:46:17.520715 progress 10 % (0 MB)
53 12:46:17.523167 progress 15 % (1 MB)
54 12:46:17.525821 progress 20 % (1 MB)
55 12:46:17.528311 progress 25 % (2 MB)
56 12:46:17.530765 progress 30 % (2 MB)
57 12:46:17.533363 progress 35 % (3 MB)
58 12:46:17.535815 progress 40 % (3 MB)
59 12:46:17.538244 progress 45 % (4 MB)
60 12:46:17.540789 progress 50 % (4 MB)
61 12:46:17.543454 progress 55 % (4 MB)
62 12:46:17.545868 progress 60 % (5 MB)
63 12:46:17.548299 progress 65 % (5 MB)
64 12:46:17.550857 progress 70 % (6 MB)
65 12:46:17.553276 progress 75 % (6 MB)
66 12:46:17.555704 progress 80 % (7 MB)
67 12:46:17.558183 progress 85 % (7 MB)
68 12:46:17.560768 progress 90 % (8 MB)
69 12:46:17.563165 progress 95 % (8 MB)
70 12:46:17.565613 progress 100 % (8 MB)
71 12:46:17.565854 8 MB downloaded in 0.05 s (173.96 MB/s)
72 12:46:17.566003 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:46:17.566251 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:46:17.566346 start: 1.3 download-retry (timeout 00:10:00) [common]
76 12:46:17.566431 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 12:46:17.566573 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2247-g140bf69dc64d/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 12:46:17.566642 saving as /var/lib/lava/dispatcher/tmp/12948301/tftp-deploy-0kc4eie5/modules/modules.tar
79 12:46:17.566705 total size: 251176 (0 MB)
80 12:46:17.566767 Using unxz to decompress xz
81 12:46:17.571197 progress 13 % (0 MB)
82 12:46:17.571653 progress 26 % (0 MB)
83 12:46:17.571899 progress 39 % (0 MB)
84 12:46:17.573517 progress 52 % (0 MB)
85 12:46:17.575464 progress 65 % (0 MB)
86 12:46:17.577295 progress 78 % (0 MB)
87 12:46:17.579162 progress 91 % (0 MB)
88 12:46:17.581003 progress 100 % (0 MB)
89 12:46:17.586523 0 MB downloaded in 0.02 s (12.09 MB/s)
90 12:46:17.586774 end: 1.3.1 http-download (duration 00:00:00) [common]
92 12:46:17.587049 end: 1.3 download-retry (duration 00:00:00) [common]
93 12:46:17.587147 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 12:46:17.587298 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 12:46:17.587443 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 12:46:17.587535 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 12:46:17.587759 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12948301/lava-overlay-l9eq6gbh
98 12:46:17.587896 makedir: /var/lib/lava/dispatcher/tmp/12948301/lava-overlay-l9eq6gbh/lava-12948301/bin
99 12:46:17.588001 makedir: /var/lib/lava/dispatcher/tmp/12948301/lava-overlay-l9eq6gbh/lava-12948301/tests
100 12:46:17.588102 makedir: /var/lib/lava/dispatcher/tmp/12948301/lava-overlay-l9eq6gbh/lava-12948301/results
101 12:46:17.588215 Creating /var/lib/lava/dispatcher/tmp/12948301/lava-overlay-l9eq6gbh/lava-12948301/bin/lava-add-keys
102 12:46:17.588362 Creating /var/lib/lava/dispatcher/tmp/12948301/lava-overlay-l9eq6gbh/lava-12948301/bin/lava-add-sources
103 12:46:17.588496 Creating /var/lib/lava/dispatcher/tmp/12948301/lava-overlay-l9eq6gbh/lava-12948301/bin/lava-background-process-start
104 12:46:17.588632 Creating /var/lib/lava/dispatcher/tmp/12948301/lava-overlay-l9eq6gbh/lava-12948301/bin/lava-background-process-stop
105 12:46:17.588762 Creating /var/lib/lava/dispatcher/tmp/12948301/lava-overlay-l9eq6gbh/lava-12948301/bin/lava-common-functions
106 12:46:17.588894 Creating /var/lib/lava/dispatcher/tmp/12948301/lava-overlay-l9eq6gbh/lava-12948301/bin/lava-echo-ipv4
107 12:46:17.589023 Creating /var/lib/lava/dispatcher/tmp/12948301/lava-overlay-l9eq6gbh/lava-12948301/bin/lava-install-packages
108 12:46:17.589154 Creating /var/lib/lava/dispatcher/tmp/12948301/lava-overlay-l9eq6gbh/lava-12948301/bin/lava-installed-packages
109 12:46:17.589282 Creating /var/lib/lava/dispatcher/tmp/12948301/lava-overlay-l9eq6gbh/lava-12948301/bin/lava-os-build
110 12:46:17.589409 Creating /var/lib/lava/dispatcher/tmp/12948301/lava-overlay-l9eq6gbh/lava-12948301/bin/lava-probe-channel
111 12:46:17.589536 Creating /var/lib/lava/dispatcher/tmp/12948301/lava-overlay-l9eq6gbh/lava-12948301/bin/lava-probe-ip
112 12:46:17.589663 Creating /var/lib/lava/dispatcher/tmp/12948301/lava-overlay-l9eq6gbh/lava-12948301/bin/lava-target-ip
113 12:46:17.589789 Creating /var/lib/lava/dispatcher/tmp/12948301/lava-overlay-l9eq6gbh/lava-12948301/bin/lava-target-mac
114 12:46:17.589916 Creating /var/lib/lava/dispatcher/tmp/12948301/lava-overlay-l9eq6gbh/lava-12948301/bin/lava-target-storage
115 12:46:17.590047 Creating /var/lib/lava/dispatcher/tmp/12948301/lava-overlay-l9eq6gbh/lava-12948301/bin/lava-test-case
116 12:46:17.590177 Creating /var/lib/lava/dispatcher/tmp/12948301/lava-overlay-l9eq6gbh/lava-12948301/bin/lava-test-event
117 12:46:17.590305 Creating /var/lib/lava/dispatcher/tmp/12948301/lava-overlay-l9eq6gbh/lava-12948301/bin/lava-test-feedback
118 12:46:17.590434 Creating /var/lib/lava/dispatcher/tmp/12948301/lava-overlay-l9eq6gbh/lava-12948301/bin/lava-test-raise
119 12:46:17.590563 Creating /var/lib/lava/dispatcher/tmp/12948301/lava-overlay-l9eq6gbh/lava-12948301/bin/lava-test-reference
120 12:46:17.590696 Creating /var/lib/lava/dispatcher/tmp/12948301/lava-overlay-l9eq6gbh/lava-12948301/bin/lava-test-runner
121 12:46:17.590826 Creating /var/lib/lava/dispatcher/tmp/12948301/lava-overlay-l9eq6gbh/lava-12948301/bin/lava-test-set
122 12:46:17.590956 Creating /var/lib/lava/dispatcher/tmp/12948301/lava-overlay-l9eq6gbh/lava-12948301/bin/lava-test-shell
123 12:46:17.591087 Updating /var/lib/lava/dispatcher/tmp/12948301/lava-overlay-l9eq6gbh/lava-12948301/bin/lava-install-packages (oe)
124 12:46:17.591243 Updating /var/lib/lava/dispatcher/tmp/12948301/lava-overlay-l9eq6gbh/lava-12948301/bin/lava-installed-packages (oe)
125 12:46:17.591393 Creating /var/lib/lava/dispatcher/tmp/12948301/lava-overlay-l9eq6gbh/lava-12948301/environment
126 12:46:17.591510 LAVA metadata
127 12:46:17.591587 - LAVA_JOB_ID=12948301
128 12:46:17.591653 - LAVA_DISPATCHER_IP=192.168.201.1
129 12:46:17.591759 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 12:46:17.591827 skipped lava-vland-overlay
131 12:46:17.591905 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 12:46:17.591985 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 12:46:17.592058 skipped lava-multinode-overlay
134 12:46:17.592134 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 12:46:17.592214 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 12:46:17.592289 Loading test definitions
137 12:46:17.592383 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 12:46:17.592461 Using /lava-12948301 at stage 0
139 12:46:17.592788 uuid=12948301_1.4.2.3.1 testdef=None
140 12:46:17.592878 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 12:46:17.592964 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 12:46:17.593504 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 12:46:17.593730 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 12:46:17.594381 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 12:46:17.594609 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 12:46:17.595230 runner path: /var/lib/lava/dispatcher/tmp/12948301/lava-overlay-l9eq6gbh/lava-12948301/0/tests/0_dmesg test_uuid 12948301_1.4.2.3.1
149 12:46:17.595425 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 12:46:17.595654 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 12:46:17.595726 Using /lava-12948301 at stage 1
153 12:46:17.596025 uuid=12948301_1.4.2.3.5 testdef=None
154 12:46:17.596113 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 12:46:17.596198 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 12:46:17.596668 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 12:46:17.596888 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 12:46:17.597531 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 12:46:17.597757 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 12:46:17.598387 runner path: /var/lib/lava/dispatcher/tmp/12948301/lava-overlay-l9eq6gbh/lava-12948301/1/tests/1_bootrr test_uuid 12948301_1.4.2.3.5
163 12:46:17.598540 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 12:46:17.598745 Creating lava-test-runner.conf files
166 12:46:17.598809 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12948301/lava-overlay-l9eq6gbh/lava-12948301/0 for stage 0
167 12:46:17.598900 - 0_dmesg
168 12:46:17.598981 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12948301/lava-overlay-l9eq6gbh/lava-12948301/1 for stage 1
169 12:46:17.599072 - 1_bootrr
170 12:46:17.599167 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 12:46:17.599251 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 12:46:17.607632 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 12:46:17.607737 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 12:46:17.607827 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 12:46:17.607912 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 12:46:17.608000 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 12:46:17.875188 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 12:46:17.875631 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 12:46:17.875747 extracting modules file /var/lib/lava/dispatcher/tmp/12948301/tftp-deploy-0kc4eie5/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12948301/extract-overlay-ramdisk-yniookkm/ramdisk
180 12:46:17.889590 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 12:46:17.889709 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 12:46:17.889798 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12948301/compress-overlay-u41i_1mp/overlay-1.4.2.4.tar.gz to ramdisk
183 12:46:17.889873 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12948301/compress-overlay-u41i_1mp/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12948301/extract-overlay-ramdisk-yniookkm/ramdisk
184 12:46:17.899825 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 12:46:17.899998 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 12:46:17.900150 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 12:46:17.900303 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 12:46:17.900439 Building ramdisk /var/lib/lava/dispatcher/tmp/12948301/extract-overlay-ramdisk-yniookkm/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12948301/extract-overlay-ramdisk-yniookkm/ramdisk
189 12:46:18.087167 >> 49788 blocks
190 12:46:18.922705 rename /var/lib/lava/dispatcher/tmp/12948301/extract-overlay-ramdisk-yniookkm/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12948301/tftp-deploy-0kc4eie5/ramdisk/ramdisk.cpio.gz
191 12:46:18.923171 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 12:46:18.923296 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
193 12:46:18.923442 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
194 12:46:18.923538 No mkimage arch provided, not using FIT.
195 12:46:18.923629 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 12:46:18.923714 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 12:46:18.923813 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 12:46:18.923911 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
199 12:46:18.923998 No LXC device requested
200 12:46:18.924086 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 12:46:18.924171 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
202 12:46:18.924256 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 12:46:18.924337 Checking files for TFTP limit of 4294967296 bytes.
204 12:46:18.924750 end: 1 tftp-deploy (duration 00:00:01) [common]
205 12:46:18.924857 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 12:46:18.924949 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 12:46:18.925077 substitutions:
208 12:46:18.925146 - {DTB}: None
209 12:46:18.925209 - {INITRD}: 12948301/tftp-deploy-0kc4eie5/ramdisk/ramdisk.cpio.gz
210 12:46:18.925269 - {KERNEL}: 12948301/tftp-deploy-0kc4eie5/kernel/bzImage
211 12:46:18.925327 - {LAVA_MAC}: None
212 12:46:18.925383 - {PRESEED_CONFIG}: None
213 12:46:18.925443 - {PRESEED_LOCAL}: None
214 12:46:18.925592 - {RAMDISK}: 12948301/tftp-deploy-0kc4eie5/ramdisk/ramdisk.cpio.gz
215 12:46:18.925674 - {ROOT_PART}: None
216 12:46:18.925744 - {ROOT}: None
217 12:46:18.925801 - {SERVER_IP}: 192.168.201.1
218 12:46:18.925856 - {TEE}: None
219 12:46:18.925911 Parsed boot commands:
220 12:46:18.925968 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 12:46:18.926146 Parsed boot commands: tftpboot 192.168.201.1 12948301/tftp-deploy-0kc4eie5/kernel/bzImage 12948301/tftp-deploy-0kc4eie5/kernel/cmdline 12948301/tftp-deploy-0kc4eie5/ramdisk/ramdisk.cpio.gz
222 12:46:18.926238 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 12:46:18.926325 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 12:46:18.926420 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 12:46:18.926507 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 12:46:18.926580 Not connected, no need to disconnect.
227 12:46:18.926666 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 12:46:18.926855 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 12:46:18.926930 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cb317-1h-c3z6-dedede-cbg-5'
230 12:46:18.931050 Setting prompt string to ['lava-test: # ']
231 12:46:18.931613 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 12:46:18.931810 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 12:46:18.931965 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 12:46:18.932148 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 12:46:18.932441 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-5' '--port=1' '--command=reboot'
236 12:46:24.068927 >> Command sent successfully.
237 12:46:24.072203 Returned 0 in 5 seconds
238 12:46:24.172594 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 12:46:24.172922 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 12:46:24.173020 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 12:46:24.173110 Setting prompt string to 'Starting depthcharge on Magolor...'
243 12:46:24.173179 Changing prompt to 'Starting depthcharge on Magolor...'
244 12:46:24.173248 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
245 12:46:24.173509 [Enter `^Ec?' for help]
246 12:46:25.311949
247 12:46:25.312108
248 12:46:25.319821 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
249 12:46:25.326566 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
250 12:46:25.330547 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
251 12:46:25.333808 CPU: AES supported, TXT NOT supported, VT supported
252 12:46:25.340959 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
253 12:46:25.343988 PCH: device id 4d87 (rev 01) is Jasperlake Super
254 12:46:25.350681 IGD: device id 4e55 (rev 01) is Jasperlake GT4
255 12:46:25.353986 VBOOT: Loading verstage.
256 12:46:25.357175 FMAP: Found "FLASH" version 1.1 at 0xc04000.
257 12:46:25.364284 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
258 12:46:25.367676 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
259 12:46:25.375122 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
260 12:46:25.375222
261 12:46:25.375313
262 12:46:25.384632 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
263 12:46:25.400437 Probing TPM: . done!
264 12:46:25.403575 TPM ready after 0 ms
265 12:46:25.407231 Connected to device vid:did:rid of 1ae0:0028:00
266 12:46:25.417830 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
267 12:46:25.425050 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
268 12:46:25.475759 Initialized TPM device CR50 revision 0
269 12:46:25.493093 tlcl_send_startup: Startup return code is 0
270 12:46:25.493200 TPM: setup succeeded
271 12:46:25.502605 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
272 12:46:25.516467 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
273 12:46:25.532647 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
274 12:46:25.542487 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
275 12:46:25.545967 Chrome EC: UHEPI supported
276 12:46:25.549389 Phase 1
277 12:46:25.552991 FMAP: area GBB found @ c05000 (12288 bytes)
278 12:46:25.559523 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
279 12:46:25.566227 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
280 12:46:25.569487 Recovery requested (1009000e)
281 12:46:25.579113 TPM: Extending digest for VBOOT: boot mode into PCR 0
282 12:46:25.585218 tlcl_extend: response is 0
283 12:46:25.591835 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
284 12:46:25.601214 tlcl_extend: response is 0
285 12:46:25.608366 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
286 12:46:25.611936 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
287 12:46:25.617856 BS: verstage times (exec / console): total (unknown) / 124 ms
288 12:46:25.621528
289 12:46:25.621611
290 12:46:25.631121 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
291 12:46:25.638027 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
292 12:46:25.641325 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
293 12:46:25.644254 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
294 12:46:25.650901 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
295 12:46:25.654644 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
296 12:46:25.657613 gpe0_sts[3]: 00080000 gpe0_en[3]: 00010000
297 12:46:25.661094 TCO_STS: 0000 0001
298 12:46:25.664761 GEN_PMCON: d0015038 00002200
299 12:46:25.667751 GBLRST_CAUSE: 00000000 00000000
300 12:46:25.667835 prev_sleep_state 5
301 12:46:25.671939 Boot Count incremented to 3719
302 12:46:25.678533 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
303 12:46:25.681892 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
304 12:46:25.685675 Chrome EC: UHEPI supported
305 12:46:25.692381 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
306 12:46:25.698441 Probing TPM: done!
307 12:46:25.706776 Connected to device vid:did:rid of 1ae0:0028:00
308 12:46:25.716528 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
309 12:46:25.722729 Initialized TPM device CR50 revision 0
310 12:46:25.733026 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
311 12:46:25.739759 MRC: Hash idx 0x100b comparison successful.
312 12:46:25.743069 MRC cache found, size 5458
313 12:46:25.743150 bootmode is set to: 2
314 12:46:25.746041 SPD INDEX = 0
315 12:46:25.749723 CBFS: Found 'spd.bin' @0x40c40 size 0x600
316 12:46:25.752909 SPD: module type is LPDDR4X
317 12:46:25.759776 SPD: module part number is MT53E512M32D2NP-046 WT:E
318 12:46:25.766482 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
319 12:46:25.770072 SPD: device width 16 bits, bus width 32 bits
320 12:46:25.772424 SPD: module size is 4096 MB (per channel)
321 12:46:25.776042 meminit_channels: DRAM half-populated
322 12:46:25.858848 CBMEM:
323 12:46:25.862556 IMD: root @ 0x76fff000 254 entries.
324 12:46:25.865624 IMD: root @ 0x76ffec00 62 entries.
325 12:46:25.869177 FMAP: area RO_VPD found @ c00000 (16384 bytes)
326 12:46:25.875521 WARNING: RO_VPD is uninitialized or empty.
327 12:46:25.878794 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
328 12:46:25.882507 External stage cache:
329 12:46:25.885816 IMD: root @ 0x7b3ff000 254 entries.
330 12:46:25.889090 IMD: root @ 0x7b3fec00 62 entries.
331 12:46:25.899299 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
332 12:46:25.906006 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
333 12:46:25.912387 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
334 12:46:25.921173 MRC: 'RECOVERY_MRC_CACHE' does not need update.
335 12:46:25.927466 cse_lite: Skip switching to RW in the recovery path
336 12:46:25.927549 1 DIMMs found
337 12:46:25.927619 SMM Memory Map
338 12:46:25.930531 SMRAM : 0x7b000000 0x800000
339 12:46:25.937262 Subregion 0: 0x7b000000 0x200000
340 12:46:25.940595 Subregion 1: 0x7b200000 0x200000
341 12:46:25.944075 Subregion 2: 0x7b400000 0x400000
342 12:46:25.944156 top_of_ram = 0x77000000
343 12:46:25.950770 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
344 12:46:25.957281 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
345 12:46:25.960497 MTRR Range: Start=ff000000 End=0 (Size 1000000)
346 12:46:25.967610 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
347 12:46:25.970778 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
348 12:46:25.982750 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
349 12:46:25.989422 Processing 188 relocs. Offset value of 0x74c0e000
350 12:46:25.996119 BS: romstage times (exec / console): total (unknown) / 255 ms
351 12:46:26.000756
352 12:46:26.000837
353 12:46:26.010560 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
354 12:46:26.017885 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
355 12:46:26.020966 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
356 12:46:26.027134 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
357 12:46:26.083541 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
358 12:46:26.090405 Processing 4805 relocs. Offset value of 0x75da8000
359 12:46:26.093649 BS: postcar times (exec / console): total (unknown) / 42 ms
360 12:46:26.097101
361 12:46:26.097185
362 12:46:26.107057 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
363 12:46:26.107173 Normal boot
364 12:46:26.110918 EC returned error result code 3
365 12:46:26.114142 FW_CONFIG value is 0x204
366 12:46:26.117230 GENERIC: 0.0 disabled by fw_config
367 12:46:26.124316 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
368 12:46:26.127353 I2C: 00:10 disabled by fw_config
369 12:46:26.130397 I2C: 00:10 disabled by fw_config
370 12:46:26.133695 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
371 12:46:26.141845 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
372 12:46:26.145540 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
373 12:46:26.148326 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
374 12:46:26.155250 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
375 12:46:26.158345 I2C: 00:10 disabled by fw_config
376 12:46:26.164867 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
377 12:46:26.172051 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
378 12:46:26.174999 I2C: 00:1a disabled by fw_config
379 12:46:26.178709 I2C: 00:1a disabled by fw_config
380 12:46:26.181399 fw_config match found: AUDIO_AMP=UNPROVISIONED
381 12:46:26.187917 fw_config match found: AUDIO_AMP=UNPROVISIONED
382 12:46:26.191674 GENERIC: 0.0 disabled by fw_config
383 12:46:26.194829 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
384 12:46:26.201381 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
385 12:46:26.204703 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
386 12:46:26.211627 microcode: Update skipped, already up-to-date
387 12:46:26.214631 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
388 12:46:26.242580 Detected 2 core, 2 thread CPU.
389 12:46:26.246395 Setting up SMI for CPU
390 12:46:26.249585 IED base = 0x7b400000
391 12:46:26.249689 IED size = 0x00400000
392 12:46:26.252542 Will perform SMM setup.
393 12:46:26.255824 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
394 12:46:26.265833 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
395 12:46:26.269427 Processing 16 relocs. Offset value of 0x00030000
396 12:46:26.272796 Attempting to start 1 APs
397 12:46:26.276251 Waiting for 10ms after sending INIT.
398 12:46:26.292474 Waiting for 1st SIPI to complete...done.
399 12:46:26.292558 AP: slot 1 apic_id 2.
400 12:46:26.299226 Waiting for 2nd SIPI to complete...done.
401 12:46:26.306057 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
402 12:46:26.312304 Processing 13 relocs. Offset value of 0x00038000
403 12:46:26.312387 Unable to locate Global NVS
404 12:46:26.322303 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
405 12:46:26.325863 Installing permanent SMM handler to 0x7b000000
406 12:46:26.335540 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
407 12:46:26.338804 Processing 704 relocs. Offset value of 0x7b010000
408 12:46:26.348804 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
409 12:46:26.351871 Processing 13 relocs. Offset value of 0x7b008000
410 12:46:26.358868 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
411 12:46:26.361868 Unable to locate Global NVS
412 12:46:26.368394 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
413 12:46:26.372437 Clearing SMI status registers
414 12:46:26.372519 SMI_STS: PM1
415 12:46:26.375058 PM1_STS: PWRBTN
416 12:46:26.375140 TCO_STS: INTRD_DET
417 12:46:26.378703 GPE0 STD STS:
418 12:46:26.385310 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
419 12:46:26.388380 In relocation handler: CPU 0
420 12:46:26.392097 New SMBASE=0x7b000000 IEDBASE=0x7b400000
421 12:46:26.398249 Writing SMRR. base = 0x7b000006, mask=0xff800800
422 12:46:26.398331 Relocation complete.
423 12:46:26.408493 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
424 12:46:26.408576 In relocation handler: CPU 1
425 12:46:26.415051 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
426 12:46:26.418234 Writing SMRR. base = 0x7b000006, mask=0xff800800
427 12:46:26.421560 Relocation complete.
428 12:46:26.421642 Initializing CPU #0
429 12:46:26.424831 CPU: vendor Intel device 906c0
430 12:46:26.431753 CPU: family 06, model 9c, stepping 00
431 12:46:26.431836 Clearing out pending MCEs
432 12:46:26.434820 Setting up local APIC...
433 12:46:26.437960 apic_id: 0x00 done.
434 12:46:26.441059 Turbo is available but hidden
435 12:46:26.444939 Turbo is available and visible
436 12:46:26.448216 microcode: Update skipped, already up-to-date
437 12:46:26.451163 CPU #0 initialized
438 12:46:26.451244 Initializing CPU #1
439 12:46:26.454623 CPU: vendor Intel device 906c0
440 12:46:26.461240 CPU: family 06, model 9c, stepping 00
441 12:46:26.461323 Clearing out pending MCEs
442 12:46:26.464623 Setting up local APIC...
443 12:46:26.467741 apic_id: 0x02 done.
444 12:46:26.471212 microcode: Update skipped, already up-to-date
445 12:46:26.474421 CPU #1 initialized
446 12:46:26.478071 bsp_do_flight_plan done after 175 msecs.
447 12:46:26.480919 CPU: frequency set to 2800 MHz
448 12:46:26.481002 Enabling SMIs.
449 12:46:26.487656 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 86 / 289 ms
450 12:46:26.498770 Probing TPM: done!
451 12:46:26.505898 Connected to device vid:did:rid of 1ae0:0028:00
452 12:46:26.515085 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
453 12:46:26.519065 Initialized TPM device CR50 revision 0
454 12:46:26.521926 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
455 12:46:26.529236 Found a VBT of 7680 bytes after decompression
456 12:46:26.535553 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
457 12:46:26.570530 Detected 2 core, 2 thread CPU.
458 12:46:26.573872 Detected 2 core, 2 thread CPU.
459 12:46:26.937006 Display FSP Version Info HOB
460 12:46:26.940656 Reference Code - CPU = 8.7.22.30
461 12:46:26.943702 uCode Version = 24.0.0.1f
462 12:46:26.947089 TXT ACM version = ff.ff.ff.ffff
463 12:46:26.950333 Reference Code - ME = 8.7.22.30
464 12:46:26.953635 MEBx version = 0.0.0.0
465 12:46:26.957048 ME Firmware Version = Consumer SKU
466 12:46:26.960476 Reference Code - PCH = 8.7.22.30
467 12:46:26.964229 PCH-CRID Status = Disabled
468 12:46:26.967557 PCH-CRID Original Value = ff.ff.ff.ffff
469 12:46:26.970658 PCH-CRID New Value = ff.ff.ff.ffff
470 12:46:26.974095 OPROM - RST - RAID = ff.ff.ff.ffff
471 12:46:26.976985 PCH Hsio Version = 4.0.0.0
472 12:46:26.980665 Reference Code - SA - System Agent = 8.7.22.30
473 12:46:26.983714 Reference Code - MRC = 0.0.4.68
474 12:46:26.986858 SA - PCIe Version = 8.7.22.30
475 12:46:26.990329 SA-CRID Status = Disabled
476 12:46:26.993766 SA-CRID Original Value = 0.0.0.0
477 12:46:26.996796 SA-CRID New Value = 0.0.0.0
478 12:46:27.000141 OPROM - VBIOS = ff.ff.ff.ffff
479 12:46:27.003332 IO Manageability Engine FW Version = ff.ff.ff.ffff
480 12:46:27.006705 PHY Build Version = ff.ff.ff.ffff
481 12:46:27.013366 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
482 12:46:27.016603 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
483 12:46:27.019881 ITSS IRQ Polarities Before:
484 12:46:27.023572 IPC0: 0xffffffff
485 12:46:27.023696 IPC1: 0xffffffff
486 12:46:27.026592 IPC2: 0xffffffff
487 12:46:27.026712 IPC3: 0xffffffff
488 12:46:27.030079 ITSS IRQ Polarities After:
489 12:46:27.033067 IPC0: 0xffffffff
490 12:46:27.033188 IPC1: 0xffffffff
491 12:46:27.036469 IPC2: 0xffffffff
492 12:46:27.036589 IPC3: 0xffffffff
493 12:46:27.049661 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
494 12:46:27.056509 BS: BS_DEV_INIT_CHIPS run times (exec / console): 405 / 156 ms
495 12:46:27.060134 Enumerating buses...
496 12:46:27.063490 Show all devs... Before device enumeration.
497 12:46:27.066382 Root Device: enabled 1
498 12:46:27.066505 CPU_CLUSTER: 0: enabled 1
499 12:46:27.069969 DOMAIN: 0000: enabled 1
500 12:46:27.073015 PCI: 00:00.0: enabled 1
501 12:46:27.076819 PCI: 00:02.0: enabled 1
502 12:46:27.076983 PCI: 00:04.0: enabled 1
503 12:46:27.079712 PCI: 00:05.0: enabled 1
504 12:46:27.083393 PCI: 00:09.0: enabled 0
505 12:46:27.083526 PCI: 00:12.6: enabled 0
506 12:46:27.086498 PCI: 00:14.0: enabled 1
507 12:46:27.089607 PCI: 00:14.1: enabled 0
508 12:46:27.092768 PCI: 00:14.2: enabled 0
509 12:46:27.092889 PCI: 00:14.3: enabled 1
510 12:46:27.095957 PCI: 00:14.5: enabled 1
511 12:46:27.099520 PCI: 00:15.0: enabled 1
512 12:46:27.102715 PCI: 00:15.1: enabled 1
513 12:46:27.102833 PCI: 00:15.2: enabled 1
514 12:46:27.106052 PCI: 00:15.3: enabled 1
515 12:46:27.109454 PCI: 00:16.0: enabled 1
516 12:46:27.112796 PCI: 00:16.1: enabled 0
517 12:46:27.112919 PCI: 00:16.4: enabled 0
518 12:46:27.115988 PCI: 00:16.5: enabled 0
519 12:46:27.119405 PCI: 00:17.0: enabled 0
520 12:46:27.122551 PCI: 00:19.0: enabled 1
521 12:46:27.122672 PCI: 00:19.1: enabled 0
522 12:46:27.125783 PCI: 00:19.2: enabled 1
523 12:46:27.129366 PCI: 00:1a.0: enabled 1
524 12:46:27.129491 PCI: 00:1c.0: enabled 0
525 12:46:27.132482 PCI: 00:1c.1: enabled 0
526 12:46:27.135708 PCI: 00:1c.2: enabled 0
527 12:46:27.139517 PCI: 00:1c.3: enabled 0
528 12:46:27.139640 PCI: 00:1c.4: enabled 0
529 12:46:27.142706 PCI: 00:1c.5: enabled 0
530 12:46:27.145912 PCI: 00:1c.6: enabled 0
531 12:46:27.149118 PCI: 00:1c.7: enabled 1
532 12:46:27.149240 PCI: 00:1e.0: enabled 0
533 12:46:27.152405 PCI: 00:1e.1: enabled 0
534 12:46:27.156295 PCI: 00:1e.2: enabled 1
535 12:46:27.159316 PCI: 00:1e.3: enabled 0
536 12:46:27.159477 PCI: 00:1f.0: enabled 1
537 12:46:27.162663 PCI: 00:1f.1: enabled 1
538 12:46:27.165775 PCI: 00:1f.2: enabled 1
539 12:46:27.165899 PCI: 00:1f.3: enabled 1
540 12:46:27.168830 PCI: 00:1f.4: enabled 0
541 12:46:27.172612 PCI: 00:1f.5: enabled 1
542 12:46:27.175744 PCI: 00:1f.7: enabled 0
543 12:46:27.175867 GENERIC: 0.0: enabled 1
544 12:46:27.179054 GENERIC: 0.0: enabled 1
545 12:46:27.182453 USB0 port 0: enabled 1
546 12:46:27.185683 GENERIC: 0.0: enabled 1
547 12:46:27.185807 I2C: 00:2c: enabled 1
548 12:46:27.189089 I2C: 00:15: enabled 1
549 12:46:27.192577 GENERIC: 0.0: enabled 0
550 12:46:27.192698 I2C: 00:15: enabled 1
551 12:46:27.195502 I2C: 00:10: enabled 0
552 12:46:27.198607 I2C: 00:10: enabled 0
553 12:46:27.198728 I2C: 00:2c: enabled 1
554 12:46:27.202032 I2C: 00:40: enabled 1
555 12:46:27.205358 I2C: 00:10: enabled 1
556 12:46:27.205477 I2C: 00:39: enabled 1
557 12:46:27.208606 I2C: 00:36: enabled 1
558 12:46:27.212120 I2C: 00:10: enabled 0
559 12:46:27.212241 I2C: 00:0c: enabled 1
560 12:46:27.215289 I2C: 00:50: enabled 1
561 12:46:27.218830 I2C: 00:1a: enabled 1
562 12:46:27.218953 I2C: 00:1a: enabled 0
563 12:46:27.221894 I2C: 00:1a: enabled 0
564 12:46:27.225074 I2C: 00:28: enabled 1
565 12:46:27.225197 I2C: 00:29: enabled 1
566 12:46:27.228822 PCI: 00:00.0: enabled 1
567 12:46:27.231833 SPI: 00: enabled 1
568 12:46:27.235550 PNP: 0c09.0: enabled 1
569 12:46:27.235673 GENERIC: 0.0: enabled 0
570 12:46:27.238698 USB2 port 0: enabled 1
571 12:46:27.242138 USB2 port 1: enabled 1
572 12:46:27.242260 USB2 port 2: enabled 1
573 12:46:27.245122 USB2 port 3: enabled 1
574 12:46:27.248351 USB2 port 4: enabled 0
575 12:46:27.248474 USB2 port 5: enabled 1
576 12:46:27.252139 USB2 port 6: enabled 0
577 12:46:27.255179 USB2 port 7: enabled 1
578 12:46:27.258332 USB3 port 0: enabled 1
579 12:46:27.258453 USB3 port 1: enabled 1
580 12:46:27.261587 USB3 port 2: enabled 1
581 12:46:27.264919 USB3 port 3: enabled 1
582 12:46:27.265043 APIC: 00: enabled 1
583 12:46:27.268028 APIC: 02: enabled 1
584 12:46:27.271786 Compare with tree...
585 12:46:27.271908 Root Device: enabled 1
586 12:46:27.274877 CPU_CLUSTER: 0: enabled 1
587 12:46:27.278181 APIC: 00: enabled 1
588 12:46:27.278303 APIC: 02: enabled 1
589 12:46:27.281733 DOMAIN: 0000: enabled 1
590 12:46:27.284962 PCI: 00:00.0: enabled 1
591 12:46:27.288550 PCI: 00:02.0: enabled 1
592 12:46:27.291428 PCI: 00:04.0: enabled 1
593 12:46:27.291551 GENERIC: 0.0: enabled 1
594 12:46:27.294992 PCI: 00:05.0: enabled 1
595 12:46:27.298207 GENERIC: 0.0: enabled 1
596 12:46:27.301181 PCI: 00:09.0: enabled 0
597 12:46:27.304888 PCI: 00:12.6: enabled 0
598 12:46:27.305010 PCI: 00:14.0: enabled 1
599 12:46:27.308145 USB0 port 0: enabled 1
600 12:46:27.311455 USB2 port 0: enabled 1
601 12:46:27.314615 USB2 port 1: enabled 1
602 12:46:27.318093 USB2 port 2: enabled 1
603 12:46:27.321497 USB2 port 3: enabled 1
604 12:46:27.321621 USB2 port 4: enabled 0
605 12:46:27.324665 USB2 port 5: enabled 1
606 12:46:27.328035 USB2 port 6: enabled 0
607 12:46:27.331247 USB2 port 7: enabled 1
608 12:46:27.334626 USB3 port 0: enabled 1
609 12:46:27.334748 USB3 port 1: enabled 1
610 12:46:27.337786 USB3 port 2: enabled 1
611 12:46:27.341124 USB3 port 3: enabled 1
612 12:46:27.344218 PCI: 00:14.1: enabled 0
613 12:46:27.348045 PCI: 00:14.2: enabled 0
614 12:46:27.351266 PCI: 00:14.3: enabled 1
615 12:46:27.351390 GENERIC: 0.0: enabled 1
616 12:46:27.354384 PCI: 00:14.5: enabled 1
617 12:46:27.357520 PCI: 00:15.0: enabled 1
618 12:46:27.360878 I2C: 00:2c: enabled 1
619 12:46:27.361001 I2C: 00:15: enabled 1
620 12:46:27.364014 PCI: 00:15.1: enabled 1
621 12:46:27.367417 PCI: 00:15.2: enabled 1
622 12:46:27.371191 GENERIC: 0.0: enabled 0
623 12:46:27.374207 I2C: 00:15: enabled 1
624 12:46:27.374328 I2C: 00:10: enabled 0
625 12:46:27.377528 I2C: 00:10: enabled 0
626 12:46:27.380733 I2C: 00:2c: enabled 1
627 12:46:27.383936 I2C: 00:40: enabled 1
628 12:46:27.384059 I2C: 00:10: enabled 1
629 12:46:27.387597 I2C: 00:39: enabled 1
630 12:46:27.391339 PCI: 00:15.3: enabled 1
631 12:46:27.395339 I2C: 00:36: enabled 1
632 12:46:27.395499 I2C: 00:10: enabled 0
633 12:46:27.399023 I2C: 00:0c: enabled 1
634 12:46:27.401942 I2C: 00:50: enabled 1
635 12:46:27.402065 PCI: 00:16.0: enabled 1
636 12:46:27.405522 PCI: 00:16.1: enabled 0
637 12:46:27.408660 PCI: 00:16.4: enabled 0
638 12:46:27.411786 PCI: 00:16.5: enabled 0
639 12:46:27.415812 PCI: 00:17.0: enabled 0
640 12:46:27.415935 PCI: 00:19.0: enabled 1
641 12:46:27.418516 I2C: 00:1a: enabled 1
642 12:46:27.421635 I2C: 00:1a: enabled 0
643 12:46:27.425386 I2C: 00:1a: enabled 0
644 12:46:27.428572 I2C: 00:28: enabled 1
645 12:46:27.428695 I2C: 00:29: enabled 1
646 12:46:27.431988 PCI: 00:19.1: enabled 0
647 12:46:27.434894 PCI: 00:19.2: enabled 1
648 12:46:27.438385 PCI: 00:1a.0: enabled 1
649 12:46:27.438505 PCI: 00:1e.0: enabled 0
650 12:46:27.441404 PCI: 00:1e.1: enabled 0
651 12:46:27.444900 PCI: 00:1e.2: enabled 1
652 12:46:27.448178 SPI: 00: enabled 1
653 12:46:27.451789 PCI: 00:1e.3: enabled 0
654 12:46:27.451912 PCI: 00:1f.0: enabled 1
655 12:46:27.455188 PNP: 0c09.0: enabled 1
656 12:46:27.458315 PCI: 00:1f.1: enabled 1
657 12:46:27.461579 PCI: 00:1f.2: enabled 1
658 12:46:27.461701 PCI: 00:1f.3: enabled 1
659 12:46:27.464896 GENERIC: 0.0: enabled 0
660 12:46:27.468015 PCI: 00:1f.4: enabled 0
661 12:46:27.471202 PCI: 00:1f.5: enabled 1
662 12:46:27.474965 PCI: 00:1f.7: enabled 0
663 12:46:27.475085 Root Device scanning...
664 12:46:27.478008 scan_static_bus for Root Device
665 12:46:27.481174 CPU_CLUSTER: 0 enabled
666 12:46:27.484717 DOMAIN: 0000 enabled
667 12:46:27.488015 DOMAIN: 0000 scanning...
668 12:46:27.491068 PCI: pci_scan_bus for bus 00
669 12:46:27.491191 PCI: 00:00.0 [8086/0000] ops
670 12:46:27.494214 PCI: 00:00.0 [8086/4e22] enabled
671 12:46:27.497890 PCI: 00:02.0 [8086/0000] bus ops
672 12:46:27.501023 PCI: 00:02.0 [8086/4e55] enabled
673 12:46:27.504398 PCI: 00:04.0 [8086/0000] bus ops
674 12:46:27.507867 PCI: 00:04.0 [8086/4e03] enabled
675 12:46:27.510892 PCI: 00:05.0 [8086/0000] bus ops
676 12:46:27.514176 PCI: 00:05.0 [8086/4e19] enabled
677 12:46:27.520812 PCI: 00:08.0 [8086/4e11] enabled
678 12:46:27.524107 PCI: 00:14.0 [8086/0000] bus ops
679 12:46:27.527316 PCI: 00:14.0 [8086/4ded] enabled
680 12:46:27.530635 PCI: 00:14.2 [8086/4def] disabled
681 12:46:27.534268 PCI: 00:14.3 [8086/0000] bus ops
682 12:46:27.537287 PCI: 00:14.3 [8086/4df0] enabled
683 12:46:27.537369 PCI: 00:14.5 [8086/0000] ops
684 12:46:27.540954 PCI: 00:14.5 [8086/4df8] enabled
685 12:46:27.544080 PCI: 00:15.0 [8086/0000] bus ops
686 12:46:27.547549 PCI: 00:15.0 [8086/4de8] enabled
687 12:46:27.550405 PCI: 00:15.1 [8086/0000] bus ops
688 12:46:27.554047 PCI: 00:15.1 [8086/4de9] enabled
689 12:46:27.557254 PCI: 00:15.2 [8086/0000] bus ops
690 12:46:27.560428 PCI: 00:15.2 [8086/4dea] enabled
691 12:46:27.563758 PCI: 00:15.3 [8086/0000] bus ops
692 12:46:27.566931 PCI: 00:15.3 [8086/4deb] enabled
693 12:46:27.570218 PCI: 00:16.0 [8086/0000] ops
694 12:46:27.573782 PCI: 00:16.0 [8086/4de0] enabled
695 12:46:27.576959 PCI: 00:19.0 [8086/0000] bus ops
696 12:46:27.580333 PCI: 00:19.0 [8086/4dc5] enabled
697 12:46:27.583550 PCI: 00:19.2 [8086/0000] ops
698 12:46:27.586860 PCI: 00:19.2 [8086/4dc7] enabled
699 12:46:27.590124 PCI: 00:1a.0 [8086/0000] ops
700 12:46:27.593396 PCI: 00:1a.0 [8086/4dc4] enabled
701 12:46:27.596832 PCI: 00:1e.0 [8086/0000] ops
702 12:46:27.599992 PCI: 00:1e.0 [8086/4da8] disabled
703 12:46:27.603849 PCI: 00:1e.2 [8086/0000] bus ops
704 12:46:27.606994 PCI: 00:1e.2 [8086/4daa] enabled
705 12:46:27.610071 PCI: 00:1f.0 [8086/0000] bus ops
706 12:46:27.613629 PCI: 00:1f.0 [8086/4d87] enabled
707 12:46:27.620064 PCI: Static device PCI: 00:1f.1 not found, disabling it.
708 12:46:27.620148 RTC Init
709 12:46:27.623491 Set power on after power failure.
710 12:46:27.626628 Disabling Deep S3
711 12:46:27.626710 Disabling Deep S3
712 12:46:27.629910 Disabling Deep S4
713 12:46:27.629993 Disabling Deep S4
714 12:46:27.633565 Disabling Deep S5
715 12:46:27.636862 Disabling Deep S5
716 12:46:27.640034 PCI: 00:1f.2 [0000/0000] hidden
717 12:46:27.643237 PCI: 00:1f.3 [8086/0000] bus ops
718 12:46:27.646556 PCI: 00:1f.3 [8086/4dc8] enabled
719 12:46:27.649714 PCI: 00:1f.5 [8086/0000] bus ops
720 12:46:27.649836 PCI: 00:1f.5 [8086/4da4] enabled
721 12:46:27.653113 PCI: Leftover static devices:
722 12:46:27.656671 PCI: 00:12.6
723 12:46:27.656793 PCI: 00:09.0
724 12:46:27.659825 PCI: 00:14.1
725 12:46:27.659948 PCI: 00:16.1
726 12:46:27.660062 PCI: 00:16.4
727 12:46:27.663467 PCI: 00:16.5
728 12:46:27.663590 PCI: 00:17.0
729 12:46:27.666646 PCI: 00:19.1
730 12:46:27.666767 PCI: 00:1e.1
731 12:46:27.666877 PCI: 00:1e.3
732 12:46:27.670234 PCI: 00:1f.1
733 12:46:27.670356 PCI: 00:1f.4
734 12:46:27.673113 PCI: 00:1f.7
735 12:46:27.676747 PCI: Check your devicetree.cb.
736 12:46:27.676870 PCI: 00:02.0 scanning...
737 12:46:27.683143 scan_generic_bus for PCI: 00:02.0
738 12:46:27.686330 scan_generic_bus for PCI: 00:02.0 done
739 12:46:27.690007 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
740 12:46:27.693058 PCI: 00:04.0 scanning...
741 12:46:27.696625 scan_generic_bus for PCI: 00:04.0
742 12:46:27.699604 GENERIC: 0.0 enabled
743 12:46:27.703276 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
744 12:46:27.709647 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
745 12:46:27.712867 PCI: 00:05.0 scanning...
746 12:46:27.716335 scan_generic_bus for PCI: 00:05.0
747 12:46:27.716459 GENERIC: 0.0 enabled
748 12:46:27.722847 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
749 12:46:27.729550 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
750 12:46:27.729674 PCI: 00:14.0 scanning...
751 12:46:27.732609 scan_static_bus for PCI: 00:14.0
752 12:46:27.736117 USB0 port 0 enabled
753 12:46:27.739540 USB0 port 0 scanning...
754 12:46:27.742899 scan_static_bus for USB0 port 0
755 12:46:27.743024 USB2 port 0 enabled
756 12:46:27.746129 USB2 port 1 enabled
757 12:46:27.749601 USB2 port 2 enabled
758 12:46:27.749725 USB2 port 3 enabled
759 12:46:27.752705 USB2 port 4 disabled
760 12:46:27.755908 USB2 port 5 enabled
761 12:46:27.756031 USB2 port 6 disabled
762 12:46:27.759255 USB2 port 7 enabled
763 12:46:27.759383 USB3 port 0 enabled
764 12:46:27.762392 USB3 port 1 enabled
765 12:46:27.766115 USB3 port 2 enabled
766 12:46:27.766238 USB3 port 3 enabled
767 12:46:27.769329 USB2 port 0 scanning...
768 12:46:27.772607 scan_static_bus for USB2 port 0
769 12:46:27.775729 scan_static_bus for USB2 port 0 done
770 12:46:27.782888 scan_bus: bus USB2 port 0 finished in 6 msecs
771 12:46:27.783012 USB2 port 1 scanning...
772 12:46:27.785639 scan_static_bus for USB2 port 1
773 12:46:27.789140 scan_static_bus for USB2 port 1 done
774 12:46:27.795862 scan_bus: bus USB2 port 1 finished in 6 msecs
775 12:46:27.799060 USB2 port 2 scanning...
776 12:46:27.802227 scan_static_bus for USB2 port 2
777 12:46:27.805440 scan_static_bus for USB2 port 2 done
778 12:46:27.808670 scan_bus: bus USB2 port 2 finished in 6 msecs
779 12:46:27.811933 USB2 port 3 scanning...
780 12:46:27.815664 scan_static_bus for USB2 port 3
781 12:46:27.818717 scan_static_bus for USB2 port 3 done
782 12:46:27.822298 scan_bus: bus USB2 port 3 finished in 6 msecs
783 12:46:27.825260 USB2 port 5 scanning...
784 12:46:27.828475 scan_static_bus for USB2 port 5
785 12:46:27.831966 scan_static_bus for USB2 port 5 done
786 12:46:27.838738 scan_bus: bus USB2 port 5 finished in 6 msecs
787 12:46:27.838863 USB2 port 7 scanning...
788 12:46:27.842034 scan_static_bus for USB2 port 7
789 12:46:27.848580 scan_static_bus for USB2 port 7 done
790 12:46:27.852143 scan_bus: bus USB2 port 7 finished in 6 msecs
791 12:46:27.854993 USB3 port 0 scanning...
792 12:46:27.858401 scan_static_bus for USB3 port 0
793 12:46:27.861962 scan_static_bus for USB3 port 0 done
794 12:46:27.865302 scan_bus: bus USB3 port 0 finished in 6 msecs
795 12:46:27.868558 USB3 port 1 scanning...
796 12:46:27.871882 scan_static_bus for USB3 port 1
797 12:46:27.875024 scan_static_bus for USB3 port 1 done
798 12:46:27.878425 scan_bus: bus USB3 port 1 finished in 6 msecs
799 12:46:27.881547 USB3 port 2 scanning...
800 12:46:27.885150 scan_static_bus for USB3 port 2
801 12:46:27.888569 scan_static_bus for USB3 port 2 done
802 12:46:27.894545 scan_bus: bus USB3 port 2 finished in 6 msecs
803 12:46:27.894671 USB3 port 3 scanning...
804 12:46:27.897813 scan_static_bus for USB3 port 3
805 12:46:27.904724 scan_static_bus for USB3 port 3 done
806 12:46:27.907833 scan_bus: bus USB3 port 3 finished in 6 msecs
807 12:46:27.911127 scan_static_bus for USB0 port 0 done
808 12:46:27.917884 scan_bus: bus USB0 port 0 finished in 172 msecs
809 12:46:27.921332 scan_static_bus for PCI: 00:14.0 done
810 12:46:27.924882 scan_bus: bus PCI: 00:14.0 finished in 189 msecs
811 12:46:27.928007 PCI: 00:14.3 scanning...
812 12:46:27.931216 scan_static_bus for PCI: 00:14.3
813 12:46:27.934427 GENERIC: 0.0 enabled
814 12:46:27.937493 scan_static_bus for PCI: 00:14.3 done
815 12:46:27.941019 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
816 12:46:27.944737 PCI: 00:15.0 scanning...
817 12:46:27.947551 scan_static_bus for PCI: 00:15.0
818 12:46:27.951051 I2C: 00:2c enabled
819 12:46:27.951173 I2C: 00:15 enabled
820 12:46:27.954510 scan_static_bus for PCI: 00:15.0 done
821 12:46:27.960951 scan_bus: bus PCI: 00:15.0 finished in 11 msecs
822 12:46:27.964108 PCI: 00:15.1 scanning...
823 12:46:27.968275 scan_static_bus for PCI: 00:15.1
824 12:46:27.968357 scan_static_bus for PCI: 00:15.1 done
825 12:46:27.975523 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
826 12:46:27.978478 PCI: 00:15.2 scanning...
827 12:46:27.982377 scan_static_bus for PCI: 00:15.2
828 12:46:27.982459 GENERIC: 0.0 disabled
829 12:46:27.986601 I2C: 00:15 enabled
830 12:46:27.986683 I2C: 00:10 disabled
831 12:46:27.989794 I2C: 00:10 disabled
832 12:46:27.989876 I2C: 00:2c enabled
833 12:46:27.993406 I2C: 00:40 enabled
834 12:46:27.993488 I2C: 00:10 enabled
835 12:46:27.996201 I2C: 00:39 enabled
836 12:46:28.000065 scan_static_bus for PCI: 00:15.2 done
837 12:46:28.006574 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
838 12:46:28.006658 PCI: 00:15.3 scanning...
839 12:46:28.009849 scan_static_bus for PCI: 00:15.3
840 12:46:28.013090 I2C: 00:36 enabled
841 12:46:28.016686 I2C: 00:10 disabled
842 12:46:28.016769 I2C: 00:0c enabled
843 12:46:28.019889 I2C: 00:50 enabled
844 12:46:28.023100 scan_static_bus for PCI: 00:15.3 done
845 12:46:28.026410 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
846 12:46:28.029578 PCI: 00:19.0 scanning...
847 12:46:28.032786 scan_static_bus for PCI: 00:19.0
848 12:46:28.036445 I2C: 00:1a enabled
849 12:46:28.036528 I2C: 00:1a disabled
850 12:46:28.039412 I2C: 00:1a disabled
851 12:46:28.042908 I2C: 00:28 enabled
852 12:46:28.042992 I2C: 00:29 enabled
853 12:46:28.046231 scan_static_bus for PCI: 00:19.0 done
854 12:46:28.052944 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
855 12:46:28.056485 PCI: 00:1e.2 scanning...
856 12:46:28.059335 scan_generic_bus for PCI: 00:1e.2
857 12:46:28.059460 SPI: 00 enabled
858 12:46:28.066111 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
859 12:46:28.069357 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
860 12:46:28.072701 PCI: 00:1f.0 scanning...
861 12:46:28.075988 scan_static_bus for PCI: 00:1f.0
862 12:46:28.079095 PNP: 0c09.0 enabled
863 12:46:28.082775 PNP: 0c09.0 scanning...
864 12:46:28.086353 scan_static_bus for PNP: 0c09.0
865 12:46:28.089258 scan_static_bus for PNP: 0c09.0 done
866 12:46:28.092607 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
867 12:46:28.095778 scan_static_bus for PCI: 00:1f.0 done
868 12:46:28.102847 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
869 12:46:28.102929 PCI: 00:1f.3 scanning...
870 12:46:28.106224 scan_static_bus for PCI: 00:1f.3
871 12:46:28.109273 GENERIC: 0.0 disabled
872 12:46:28.112592 scan_static_bus for PCI: 00:1f.3 done
873 12:46:28.119390 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
874 12:46:28.119486 PCI: 00:1f.5 scanning...
875 12:46:28.125912 scan_generic_bus for PCI: 00:1f.5
876 12:46:28.129477 scan_generic_bus for PCI: 00:1f.5 done
877 12:46:28.132926 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
878 12:46:28.139237 scan_bus: bus DOMAIN: 0000 finished in 646 msecs
879 12:46:28.142487 scan_static_bus for Root Device done
880 12:46:28.145922 scan_bus: bus Root Device finished in 665 msecs
881 12:46:28.146030 done
882 12:46:28.152909 BS: BS_DEV_ENUMERATE run times (exec / console): 7 / 1085 ms
883 12:46:28.155917 Chrome EC: UHEPI supported
884 12:46:28.162922 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
885 12:46:28.168944 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
886 12:46:28.172173 SPI flash protection: WPSW=0 SRP0=0
887 12:46:28.175682 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
888 12:46:28.182192 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
889 12:46:28.186111 found VGA at PCI: 00:02.0
890 12:46:28.188754 Setting up VGA for PCI: 00:02.0
891 12:46:28.192348 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
892 12:46:28.198739 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
893 12:46:28.202329 Allocating resources...
894 12:46:28.202411 Reading resources...
895 12:46:28.208910 Root Device read_resources bus 0 link: 0
896 12:46:28.212215 CPU_CLUSTER: 0 read_resources bus 0 link: 0
897 12:46:28.215479 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
898 12:46:28.222033 DOMAIN: 0000 read_resources bus 0 link: 0
899 12:46:28.225203 PCI: 00:04.0 read_resources bus 1 link: 0
900 12:46:28.231854 PCI: 00:04.0 read_resources bus 1 link: 0 done
901 12:46:28.235610 PCI: 00:05.0 read_resources bus 2 link: 0
902 12:46:28.241947 PCI: 00:05.0 read_resources bus 2 link: 0 done
903 12:46:28.245106 PCI: 00:14.0 read_resources bus 0 link: 0
904 12:46:28.249209 USB0 port 0 read_resources bus 0 link: 0
905 12:46:28.256810 USB0 port 0 read_resources bus 0 link: 0 done
906 12:46:28.260382 PCI: 00:14.0 read_resources bus 0 link: 0 done
907 12:46:28.319338 PCI: 00:14.3 read_resources bus 0 link: 0
908 12:46:28.319435 PCI: 00:14.3 read_resources bus 0 link: 0 done
909 12:46:28.319771 PCI: 00:15.0 read_resources bus 0 link: 0
910 12:46:28.320038 PCI: 00:15.0 read_resources bus 0 link: 0 done
911 12:46:28.320113 PCI: 00:15.2 read_resources bus 0 link: 0
912 12:46:28.320189 PCI: 00:15.2 read_resources bus 0 link: 0 done
913 12:46:28.320564 PCI: 00:15.3 read_resources bus 0 link: 0
914 12:46:28.320882 PCI: 00:15.3 read_resources bus 0 link: 0 done
915 12:46:28.320957 PCI: 00:19.0 read_resources bus 0 link: 0
916 12:46:28.321032 PCI: 00:19.0 read_resources bus 0 link: 0 done
917 12:46:28.321371 PCI: 00:1e.2 read_resources bus 3 link: 0
918 12:46:28.321455 PCI: 00:1e.2 read_resources bus 3 link: 0 done
919 12:46:28.358267 PCI: 00:1f.0 read_resources bus 0 link: 0
920 12:46:28.358838 PCI: 00:1f.0 read_resources bus 0 link: 0 done
921 12:46:28.359376 PCI: 00:1f.3 read_resources bus 0 link: 0
922 12:46:28.359474 PCI: 00:1f.3 read_resources bus 0 link: 0 done
923 12:46:28.359731 DOMAIN: 0000 read_resources bus 0 link: 0 done
924 12:46:28.359985 Root Device read_resources bus 0 link: 0 done
925 12:46:28.360054 Done reading resources.
926 12:46:28.360127 Show resources in subtree (Root Device)...After reading.
927 12:46:28.363630 Root Device child on link 0 CPU_CLUSTER: 0
928 12:46:28.366631 CPU_CLUSTER: 0 child on link 0 APIC: 00
929 12:46:28.366714 APIC: 00
930 12:46:28.369773 APIC: 02
931 12:46:28.373339 DOMAIN: 0000 child on link 0 PCI: 00:00.0
932 12:46:28.383010 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
933 12:46:28.393015 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
934 12:46:28.393100 PCI: 00:00.0
935 12:46:28.402750 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
936 12:46:28.412864 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
937 12:46:28.422345 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
938 12:46:28.432358 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
939 12:46:28.442755 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
940 12:46:28.449074 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
941 12:46:28.458586 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
942 12:46:28.468751 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
943 12:46:28.478806 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
944 12:46:28.488492 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
945 12:46:28.495296 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
946 12:46:28.504863 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
947 12:46:28.515053 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
948 12:46:28.525341 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
949 12:46:28.535036 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
950 12:46:28.541387 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
951 12:46:28.551305 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
952 12:46:28.561334 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
953 12:46:28.571115 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
954 12:46:28.574404 PCI: 00:02.0
955 12:46:28.584630 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
956 12:46:28.594806 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
957 12:46:28.600883 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
958 12:46:28.607852 PCI: 00:04.0 child on link 0 GENERIC: 0.0
959 12:46:28.617568 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
960 12:46:28.617652 GENERIC: 0.0
961 12:46:28.624261 PCI: 00:05.0 child on link 0 GENERIC: 0.0
962 12:46:28.634195 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
963 12:46:28.634326 GENERIC: 0.0
964 12:46:28.637337 PCI: 00:08.0
965 12:46:28.644659 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
966 12:46:28.652114 PCI: 00:14.0 child on link 0 USB0 port 0
967 12:46:28.661947 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
968 12:46:28.665205 USB0 port 0 child on link 0 USB2 port 0
969 12:46:28.665288 USB2 port 0
970 12:46:28.668608 USB2 port 1
971 12:46:28.671880 USB2 port 2
972 12:46:28.671963 USB2 port 3
973 12:46:28.675395 USB2 port 4
974 12:46:28.675494 USB2 port 5
975 12:46:28.678432 USB2 port 6
976 12:46:28.678515 USB2 port 7
977 12:46:28.682041 USB3 port 0
978 12:46:28.682124 USB3 port 1
979 12:46:28.685196 USB3 port 2
980 12:46:28.685279 USB3 port 3
981 12:46:28.688703 PCI: 00:14.2
982 12:46:28.691509 PCI: 00:14.3 child on link 0 GENERIC: 0.0
983 12:46:28.701733 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
984 12:46:28.704814 GENERIC: 0.0
985 12:46:28.704896 PCI: 00:14.5
986 12:46:28.714905 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
987 12:46:28.718187 PCI: 00:15.0 child on link 0 I2C: 00:2c
988 12:46:28.728004 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
989 12:46:28.731232 I2C: 00:2c
990 12:46:28.731341 I2C: 00:15
991 12:46:28.734882 PCI: 00:15.1
992 12:46:28.744697 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
993 12:46:28.748058 PCI: 00:15.2 child on link 0 GENERIC: 0.0
994 12:46:28.758210 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
995 12:46:28.761389 GENERIC: 0.0
996 12:46:28.761470 I2C: 00:15
997 12:46:28.764494 I2C: 00:10
998 12:46:28.764575 I2C: 00:10
999 12:46:28.767973 I2C: 00:2c
1000 12:46:28.768055 I2C: 00:40
1001 12:46:28.771219 I2C: 00:10
1002 12:46:28.771331 I2C: 00:39
1003 12:46:28.774287 PCI: 00:15.3 child on link 0 I2C: 00:36
1004 12:46:28.784458 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1005 12:46:28.787823 I2C: 00:36
1006 12:46:28.787910 I2C: 00:10
1007 12:46:28.790742 I2C: 00:0c
1008 12:46:28.790824 I2C: 00:50
1009 12:46:28.794105 PCI: 00:16.0
1010 12:46:28.804640 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1011 12:46:28.807438 PCI: 00:19.0 child on link 0 I2C: 00:1a
1012 12:46:28.817415 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1013 12:46:28.820539 I2C: 00:1a
1014 12:46:28.820621 I2C: 00:1a
1015 12:46:28.820686 I2C: 00:1a
1016 12:46:28.823855 I2C: 00:28
1017 12:46:28.823937 I2C: 00:29
1018 12:46:28.827637 PCI: 00:19.2
1019 12:46:28.837617 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1020 12:46:28.847106 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1021 12:46:28.850437 PCI: 00:1a.0
1022 12:46:28.860668 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1023 12:46:28.860795 PCI: 00:1e.0
1024 12:46:28.863656 PCI: 00:1e.2 child on link 0 SPI: 00
1025 12:46:28.873701 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1026 12:46:28.876863 SPI: 00
1027 12:46:28.880576 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1028 12:46:28.890336 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1029 12:46:28.890480 PNP: 0c09.0
1030 12:46:28.900236 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1031 12:46:28.900361 PCI: 00:1f.2
1032 12:46:28.910094 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1033 12:46:28.919895 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1034 12:46:28.923471 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1035 12:46:28.933459 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1036 12:46:28.943006 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1037 12:46:28.946254 GENERIC: 0.0
1038 12:46:28.946377 PCI: 00:1f.5
1039 12:46:28.956266 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1040 12:46:28.966202 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1041 12:46:28.973178 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1042 12:46:28.979666 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1043 12:46:28.986113 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1044 12:46:28.993010 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1045 12:46:28.999600 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1046 12:46:29.002660 DOMAIN: 0000: Resource ranges:
1047 12:46:29.005879 * Base: 1000, Size: 800, Tag: 100
1048 12:46:29.012565 * Base: 1900, Size: e700, Tag: 100
1049 12:46:29.015820 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1050 12:46:29.022407 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1051 12:46:29.029051 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1052 12:46:29.039012 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1053 12:46:29.045637 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1054 12:46:29.052133 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1055 12:46:29.061982 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1056 12:46:29.068998 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1057 12:46:29.075319 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1058 12:46:29.085079 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1059 12:46:29.092040 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1060 12:46:29.098339 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1061 12:46:29.105382 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1062 12:46:29.115037 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1063 12:46:29.121875 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1064 12:46:29.128403 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1065 12:46:29.138640 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1066 12:46:29.144860 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1067 12:46:29.151614 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1068 12:46:29.161786 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1069 12:46:29.168158 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1070 12:46:29.174651 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1071 12:46:29.184770 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1072 12:46:29.191246 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1073 12:46:29.194496 DOMAIN: 0000: Resource ranges:
1074 12:46:29.198064 * Base: 7fc00000, Size: 40400000, Tag: 200
1075 12:46:29.204689 * Base: d0000000, Size: 2b000000, Tag: 200
1076 12:46:29.207766 * Base: fb001000, Size: 2fff000, Tag: 200
1077 12:46:29.211247 * Base: fe010000, Size: 22000, Tag: 200
1078 12:46:29.217846 * Base: fe033000, Size: a4d000, Tag: 200
1079 12:46:29.221409 * Base: fea88000, Size: 2f8000, Tag: 200
1080 12:46:29.225013 * Base: fed88000, Size: 8000, Tag: 200
1081 12:46:29.228222 * Base: fed93000, Size: d000, Tag: 200
1082 12:46:29.231735 * Base: feda2000, Size: 125e000, Tag: 200
1083 12:46:29.238436 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1084 12:46:29.245112 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1085 12:46:29.251327 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1086 12:46:29.258138 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1087 12:46:29.264720 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1088 12:46:29.271303 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1089 12:46:29.278137 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1090 12:46:29.284415 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1091 12:46:29.291410 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1092 12:46:29.297949 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1093 12:46:29.304944 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1094 12:46:29.311063 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1095 12:46:29.317706 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1096 12:46:29.324642 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1097 12:46:29.330818 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1098 12:46:29.337881 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1099 12:46:29.344227 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1100 12:46:29.350727 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1101 12:46:29.357458 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1102 12:46:29.364272 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1103 12:46:29.370786 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1104 12:46:29.377443 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1105 12:46:29.383756 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1106 12:46:29.387293 Root Device assign_resources, bus 0 link: 0
1107 12:46:29.394246 DOMAIN: 0000 assign_resources, bus 0 link: 0
1108 12:46:29.400503 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1109 12:46:29.410705 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1110 12:46:29.417172 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1111 12:46:29.426921 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1112 12:46:29.430166 PCI: 00:04.0 assign_resources, bus 1 link: 0
1113 12:46:29.433696 PCI: 00:04.0 assign_resources, bus 1 link: 0
1114 12:46:29.443422 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1115 12:46:29.446944 PCI: 00:05.0 assign_resources, bus 2 link: 0
1116 12:46:29.453650 PCI: 00:05.0 assign_resources, bus 2 link: 0
1117 12:46:29.460074 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1118 12:46:29.470227 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1119 12:46:29.473485 PCI: 00:14.0 assign_resources, bus 0 link: 0
1120 12:46:29.476643 PCI: 00:14.0 assign_resources, bus 0 link: 0
1121 12:46:29.486682 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1122 12:46:29.489866 PCI: 00:14.3 assign_resources, bus 0 link: 0
1123 12:46:29.496844 PCI: 00:14.3 assign_resources, bus 0 link: 0
1124 12:46:29.503230 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1125 12:46:29.510206 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1126 12:46:29.516963 PCI: 00:15.0 assign_resources, bus 0 link: 0
1127 12:46:29.520093 PCI: 00:15.0 assign_resources, bus 0 link: 0
1128 12:46:29.530177 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1129 12:46:29.536972 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1130 12:46:29.539777 PCI: 00:15.2 assign_resources, bus 0 link: 0
1131 12:46:29.546668 PCI: 00:15.2 assign_resources, bus 0 link: 0
1132 12:46:29.553181 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1133 12:46:29.559737 PCI: 00:15.3 assign_resources, bus 0 link: 0
1134 12:46:29.563312 PCI: 00:15.3 assign_resources, bus 0 link: 0
1135 12:46:29.572947 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1136 12:46:29.579689 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1137 12:46:29.582948 PCI: 00:19.0 assign_resources, bus 0 link: 0
1138 12:46:29.589876 PCI: 00:19.0 assign_resources, bus 0 link: 0
1139 12:46:29.596246 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1140 12:46:29.606122 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1141 12:46:29.612944 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1142 12:46:29.616236 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1143 12:46:29.622806 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1144 12:46:29.626235 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1145 12:46:29.632769 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1146 12:46:29.636084 LPC: Trying to open IO window from 800 size 1ff
1147 12:46:29.646022 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1148 12:46:29.652583 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1149 12:46:29.659585 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1150 12:46:29.662345 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1151 12:46:29.669220 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1152 12:46:29.675756 DOMAIN: 0000 assign_resources, bus 0 link: 0
1153 12:46:29.679312 Root Device assign_resources, bus 0 link: 0
1154 12:46:29.682544 Done setting resources.
1155 12:46:29.688636 Show resources in subtree (Root Device)...After assigning values.
1156 12:46:29.691980 Root Device child on link 0 CPU_CLUSTER: 0
1157 12:46:29.695718 CPU_CLUSTER: 0 child on link 0 APIC: 00
1158 12:46:29.698640 APIC: 00
1159 12:46:29.698737 APIC: 02
1160 12:46:29.705582 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1161 12:46:29.711950 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1162 12:46:29.721937 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1163 12:46:29.725214 PCI: 00:00.0
1164 12:46:29.735601 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1165 12:46:29.744869 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1166 12:46:29.751619 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1167 12:46:29.761307 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1168 12:46:29.771108 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1169 12:46:29.780851 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1170 12:46:29.790830 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1171 12:46:29.800941 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1172 12:46:29.807240 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1173 12:46:29.817324 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1174 12:46:29.827283 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1175 12:46:29.837381 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1176 12:46:29.846842 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1177 12:46:29.853181 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1178 12:46:29.863254 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1179 12:46:29.873137 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1180 12:46:29.883043 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1181 12:46:29.893527 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1182 12:46:29.903679 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1183 12:46:29.903761 PCI: 00:02.0
1184 12:46:29.912917 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1185 12:46:29.926306 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1186 12:46:29.933016 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1187 12:46:29.939086 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1188 12:46:29.949226 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1189 12:46:29.952320 GENERIC: 0.0
1190 12:46:29.956044 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1191 12:46:29.966147 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1192 12:46:29.969088 GENERIC: 0.0
1193 12:46:29.969169 PCI: 00:08.0
1194 12:46:29.978704 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1195 12:46:29.985784 PCI: 00:14.0 child on link 0 USB0 port 0
1196 12:46:29.995295 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1197 12:46:29.998823 USB0 port 0 child on link 0 USB2 port 0
1198 12:46:30.002232 USB2 port 0
1199 12:46:30.002314 USB2 port 1
1200 12:46:30.005464 USB2 port 2
1201 12:46:30.005545 USB2 port 3
1202 12:46:30.008628 USB2 port 4
1203 12:46:30.008709 USB2 port 5
1204 12:46:30.011860 USB2 port 6
1205 12:46:30.011942 USB2 port 7
1206 12:46:30.015672 USB3 port 0
1207 12:46:30.015754 USB3 port 1
1208 12:46:30.018506 USB3 port 2
1209 12:46:30.018587 USB3 port 3
1210 12:46:30.022188 PCI: 00:14.2
1211 12:46:30.025077 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1212 12:46:30.035336 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1213 12:46:30.038827 GENERIC: 0.0
1214 12:46:30.038908 PCI: 00:14.5
1215 12:46:30.048610 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1216 12:46:30.055776 PCI: 00:15.0 child on link 0 I2C: 00:2c
1217 12:46:30.065285 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1218 12:46:30.065368 I2C: 00:2c
1219 12:46:30.068536 I2C: 00:15
1220 12:46:30.068617 PCI: 00:15.1
1221 12:46:30.078292 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1222 12:46:30.084843 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1223 12:46:30.094974 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1224 12:46:30.095056 GENERIC: 0.0
1225 12:46:30.098124 I2C: 00:15
1226 12:46:30.098205 I2C: 00:10
1227 12:46:30.101433 I2C: 00:10
1228 12:46:30.101540 I2C: 00:2c
1229 12:46:30.104550 I2C: 00:40
1230 12:46:30.104632 I2C: 00:10
1231 12:46:30.108138 I2C: 00:39
1232 12:46:30.111065 PCI: 00:15.3 child on link 0 I2C: 00:36
1233 12:46:30.121438 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1234 12:46:30.124325 I2C: 00:36
1235 12:46:30.124406 I2C: 00:10
1236 12:46:30.127714 I2C: 00:0c
1237 12:46:30.127796 I2C: 00:50
1238 12:46:30.131010 PCI: 00:16.0
1239 12:46:30.140829 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1240 12:46:30.144088 PCI: 00:19.0 child on link 0 I2C: 00:1a
1241 12:46:30.154553 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1242 12:46:30.157863 I2C: 00:1a
1243 12:46:30.157944 I2C: 00:1a
1244 12:46:30.158009 I2C: 00:1a
1245 12:46:30.161365 I2C: 00:28
1246 12:46:30.161446 I2C: 00:29
1247 12:46:30.164319 PCI: 00:19.2
1248 12:46:30.174018 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1249 12:46:30.184110 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1250 12:46:30.187408 PCI: 00:1a.0
1251 12:46:30.197422 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1252 12:46:30.200567 PCI: 00:1e.0
1253 12:46:30.203876 PCI: 00:1e.2 child on link 0 SPI: 00
1254 12:46:30.213905 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1255 12:46:30.213987 SPI: 00
1256 12:46:30.220411 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1257 12:46:30.227294 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1258 12:46:30.230580 PNP: 0c09.0
1259 12:46:30.237057 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1260 12:46:30.240567 PCI: 00:1f.2
1261 12:46:30.250308 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1262 12:46:30.257070 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1263 12:46:30.264075 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1264 12:46:30.273335 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1265 12:46:30.283256 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1266 12:46:30.286444 GENERIC: 0.0
1267 12:46:30.286527 PCI: 00:1f.5
1268 12:46:30.296749 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1269 12:46:30.300078 Done allocating resources.
1270 12:46:30.306646 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2097 ms
1271 12:46:30.309834 Enabling resources...
1272 12:46:30.313088 PCI: 00:00.0 subsystem <- 8086/4e22
1273 12:46:30.316448 PCI: 00:00.0 cmd <- 06
1274 12:46:30.319604 PCI: 00:02.0 subsystem <- 8086/4e55
1275 12:46:30.319685 PCI: 00:02.0 cmd <- 03
1276 12:46:30.326354 PCI: 00:04.0 subsystem <- 8086/4e03
1277 12:46:30.326435 PCI: 00:04.0 cmd <- 02
1278 12:46:30.330054 PCI: 00:05.0 bridge ctrl <- 0003
1279 12:46:30.333066 PCI: 00:05.0 subsystem <- 8086/4e19
1280 12:46:30.336681 PCI: 00:05.0 cmd <- 02
1281 12:46:30.339748 PCI: 00:08.0 cmd <- 06
1282 12:46:30.343421 PCI: 00:14.0 subsystem <- 8086/4ded
1283 12:46:30.346413 PCI: 00:14.0 cmd <- 02
1284 12:46:30.349666 PCI: 00:14.3 subsystem <- 8086/4df0
1285 12:46:30.353309 PCI: 00:14.3 cmd <- 02
1286 12:46:30.356256 PCI: 00:14.5 subsystem <- 8086/4df8
1287 12:46:30.356338 PCI: 00:14.5 cmd <- 06
1288 12:46:30.363036 PCI: 00:15.0 subsystem <- 8086/4de8
1289 12:46:30.363118 PCI: 00:15.0 cmd <- 02
1290 12:46:30.366381 PCI: 00:15.1 subsystem <- 8086/4de9
1291 12:46:30.369713 PCI: 00:15.1 cmd <- 02
1292 12:46:30.372990 PCI: 00:15.2 subsystem <- 8086/4dea
1293 12:46:30.376655 PCI: 00:15.2 cmd <- 02
1294 12:46:30.379872 PCI: 00:15.3 subsystem <- 8086/4deb
1295 12:46:30.383071 PCI: 00:15.3 cmd <- 02
1296 12:46:30.386413 PCI: 00:16.0 subsystem <- 8086/4de0
1297 12:46:30.389855 PCI: 00:16.0 cmd <- 02
1298 12:46:30.392687 PCI: 00:19.0 subsystem <- 8086/4dc5
1299 12:46:30.396456 PCI: 00:19.0 cmd <- 02
1300 12:46:30.399941 PCI: 00:19.2 subsystem <- 8086/4dc7
1301 12:46:30.400023 PCI: 00:19.2 cmd <- 06
1302 12:46:30.405987 PCI: 00:1a.0 subsystem <- 8086/4dc4
1303 12:46:30.406068 PCI: 00:1a.0 cmd <- 06
1304 12:46:30.409252 PCI: 00:1e.2 subsystem <- 8086/4daa
1305 12:46:30.413008 PCI: 00:1e.2 cmd <- 06
1306 12:46:30.416060 PCI: 00:1f.0 subsystem <- 8086/4d87
1307 12:46:30.419317 PCI: 00:1f.0 cmd <- 407
1308 12:46:30.423002 PCI: 00:1f.3 subsystem <- 8086/4dc8
1309 12:46:30.426237 PCI: 00:1f.3 cmd <- 02
1310 12:46:30.429459 PCI: 00:1f.5 subsystem <- 8086/4da4
1311 12:46:30.432490 PCI: 00:1f.5 cmd <- 406
1312 12:46:30.436165 done.
1313 12:46:30.439110 BS: BS_DEV_ENABLE run times (exec / console): 6 / 122 ms
1314 12:46:30.442508 Initializing devices...
1315 12:46:30.446331 Root Device init
1316 12:46:30.446411 mainboard: EC init
1317 12:46:30.452460 Chrome EC: Set SMI mask to 0x0000000000000000
1318 12:46:30.455818 Chrome EC: clear events_b mask to 0x0000000000000000
1319 12:46:30.462891 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1320 12:46:30.469372 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1321 12:46:30.475978 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1322 12:46:30.479238 Chrome EC: Set WAKE mask to 0x0000000000000000
1323 12:46:30.482295 Root Device init finished in 35 msecs
1324 12:46:30.486699 PCI: 00:00.0 init
1325 12:46:30.489829 CPU TDP = 6 Watts
1326 12:46:30.489910 CPU PL1 = 7 Watts
1327 12:46:30.493478 CPU PL2 = 12 Watts
1328 12:46:30.496728 PCI: 00:00.0 init finished in 6 msecs
1329 12:46:30.499909 PCI: 00:02.0 init
1330 12:46:30.503261 GMA: Found VBT in CBFS
1331 12:46:30.503385 GMA: Found valid VBT in CBFS
1332 12:46:30.509982 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1333 12:46:30.516579 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1334 12:46:30.522922 PCI: 00:02.0 init finished in 18 msecs
1335 12:46:30.523004 PCI: 00:08.0 init
1336 12:46:30.529898 PCI: 00:08.0 init finished in 0 msecs
1337 12:46:30.529980 PCI: 00:14.0 init
1338 12:46:30.536231 XHCI: Updated LFPS sampling OFF time to 9 ms
1339 12:46:30.539218 PCI: 00:14.0 init finished in 4 msecs
1340 12:46:30.542856 PCI: 00:15.0 init
1341 12:46:30.542938 I2C bus 0 version 0x3230302a
1342 12:46:30.549681 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1343 12:46:30.552924 PCI: 00:15.0 init finished in 6 msecs
1344 12:46:30.553005 PCI: 00:15.1 init
1345 12:46:30.555971 I2C bus 1 version 0x3230302a
1346 12:46:30.559184 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1347 12:46:30.565912 PCI: 00:15.1 init finished in 6 msecs
1348 12:46:30.565993 PCI: 00:15.2 init
1349 12:46:30.569096 I2C bus 2 version 0x3230302a
1350 12:46:30.572624 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1351 12:46:30.575585 PCI: 00:15.2 init finished in 6 msecs
1352 12:46:30.579314 PCI: 00:15.3 init
1353 12:46:30.582480 I2C bus 3 version 0x3230302a
1354 12:46:30.586233 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1355 12:46:30.588998 PCI: 00:15.3 init finished in 6 msecs
1356 12:46:30.592334 PCI: 00:16.0 init
1357 12:46:30.595860 PCI: 00:16.0 init finished in 0 msecs
1358 12:46:30.595942 PCI: 00:19.0 init
1359 12:46:30.599008 I2C bus 4 version 0x3230302a
1360 12:46:30.602267 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1361 12:46:30.609111 PCI: 00:19.0 init finished in 6 msecs
1362 12:46:30.609192 PCI: 00:1a.0 init
1363 12:46:30.612373 PCI: 00:1a.0 init finished in 0 msecs
1364 12:46:30.616694 PCI: 00:1f.0 init
1365 12:46:30.619693 IOAPIC: Initializing IOAPIC at 0xfec00000
1366 12:46:30.626107 IOAPIC: Bootstrap Processor Local APIC = 0x00
1367 12:46:30.626189 IOAPIC: ID = 0x02
1368 12:46:30.629917 IOAPIC: Dumping registers
1369 12:46:30.633154 reg 0x0000: 0x02000000
1370 12:46:30.636337 reg 0x0001: 0x00770020
1371 12:46:30.636418 reg 0x0002: 0x00000000
1372 12:46:30.642956 PCI: 00:1f.0 init finished in 21 msecs
1373 12:46:30.643037 PCI: 00:1f.2 init
1374 12:46:30.646323 Disabling ACPI via APMC.
1375 12:46:30.650436 APMC done.
1376 12:46:30.653393 PCI: 00:1f.2 init finished in 5 msecs
1377 12:46:30.663943 PNP: 0c09.0 init
1378 12:46:30.667612 Google Chrome EC uptime: 6.571 seconds
1379 12:46:30.674351 Google Chrome AP resets since EC boot: 0
1380 12:46:30.677233 Google Chrome most recent AP reset causes:
1381 12:46:30.684406 Google Chrome EC reset flags at last EC boot: reset-pin
1382 12:46:30.687314 PNP: 0c09.0 init finished in 18 msecs
1383 12:46:30.687446 Devices initialized
1384 12:46:30.690585 Show all devs... After init.
1385 12:46:30.694495 Root Device: enabled 1
1386 12:46:30.697355 CPU_CLUSTER: 0: enabled 1
1387 12:46:30.700896 DOMAIN: 0000: enabled 1
1388 12:46:30.701005 PCI: 00:00.0: enabled 1
1389 12:46:30.703996 PCI: 00:02.0: enabled 1
1390 12:46:30.707255 PCI: 00:04.0: enabled 1
1391 12:46:30.707353 PCI: 00:05.0: enabled 1
1392 12:46:30.710489 PCI: 00:09.0: enabled 0
1393 12:46:30.714173 PCI: 00:12.6: enabled 0
1394 12:46:30.717411 PCI: 00:14.0: enabled 1
1395 12:46:30.717493 PCI: 00:14.1: enabled 0
1396 12:46:30.720916 PCI: 00:14.2: enabled 0
1397 12:46:30.723652 PCI: 00:14.3: enabled 1
1398 12:46:30.727358 PCI: 00:14.5: enabled 1
1399 12:46:30.727477 PCI: 00:15.0: enabled 1
1400 12:46:30.730648 PCI: 00:15.1: enabled 1
1401 12:46:30.734060 PCI: 00:15.2: enabled 1
1402 12:46:30.737197 PCI: 00:15.3: enabled 1
1403 12:46:30.737279 PCI: 00:16.0: enabled 1
1404 12:46:30.740475 PCI: 00:16.1: enabled 0
1405 12:46:30.743623 PCI: 00:16.4: enabled 0
1406 12:46:30.746782 PCI: 00:16.5: enabled 0
1407 12:46:30.746863 PCI: 00:17.0: enabled 0
1408 12:46:30.750068 PCI: 00:19.0: enabled 1
1409 12:46:30.753755 PCI: 00:19.1: enabled 0
1410 12:46:30.753837 PCI: 00:19.2: enabled 1
1411 12:46:30.756973 PCI: 00:1a.0: enabled 1
1412 12:46:30.760317 PCI: 00:1c.0: enabled 0
1413 12:46:30.763771 PCI: 00:1c.1: enabled 0
1414 12:46:30.763852 PCI: 00:1c.2: enabled 0
1415 12:46:30.766741 PCI: 00:1c.3: enabled 0
1416 12:46:30.770132 PCI: 00:1c.4: enabled 0
1417 12:46:30.773661 PCI: 00:1c.5: enabled 0
1418 12:46:30.773742 PCI: 00:1c.6: enabled 0
1419 12:46:30.776674 PCI: 00:1c.7: enabled 1
1420 12:46:30.779857 PCI: 00:1e.0: enabled 0
1421 12:46:30.783468 PCI: 00:1e.1: enabled 0
1422 12:46:30.783549 PCI: 00:1e.2: enabled 1
1423 12:46:30.786458 PCI: 00:1e.3: enabled 0
1424 12:46:30.790101 PCI: 00:1f.0: enabled 1
1425 12:46:30.793252 PCI: 00:1f.1: enabled 0
1426 12:46:30.793351 PCI: 00:1f.2: enabled 1
1427 12:46:30.796237 PCI: 00:1f.3: enabled 1
1428 12:46:30.799613 PCI: 00:1f.4: enabled 0
1429 12:46:30.802814 PCI: 00:1f.5: enabled 1
1430 12:46:30.802895 PCI: 00:1f.7: enabled 0
1431 12:46:30.806317 GENERIC: 0.0: enabled 1
1432 12:46:30.809489 GENERIC: 0.0: enabled 1
1433 12:46:30.809570 USB0 port 0: enabled 1
1434 12:46:30.813297 GENERIC: 0.0: enabled 1
1435 12:46:30.816457 I2C: 00:2c: enabled 1
1436 12:46:30.819556 I2C: 00:15: enabled 1
1437 12:46:30.819637 GENERIC: 0.0: enabled 0
1438 12:46:30.822806 I2C: 00:15: enabled 1
1439 12:46:30.826430 I2C: 00:10: enabled 0
1440 12:46:30.826511 I2C: 00:10: enabled 0
1441 12:46:30.829284 I2C: 00:2c: enabled 1
1442 12:46:30.833009 I2C: 00:40: enabled 1
1443 12:46:30.833089 I2C: 00:10: enabled 1
1444 12:46:30.836289 I2C: 00:39: enabled 1
1445 12:46:30.839733 I2C: 00:36: enabled 1
1446 12:46:30.839814 I2C: 00:10: enabled 0
1447 12:46:30.842656 I2C: 00:0c: enabled 1
1448 12:46:30.845994 I2C: 00:50: enabled 1
1449 12:46:30.846075 I2C: 00:1a: enabled 1
1450 12:46:30.849237 I2C: 00:1a: enabled 0
1451 12:46:30.852661 I2C: 00:1a: enabled 0
1452 12:46:30.852744 I2C: 00:28: enabled 1
1453 12:46:30.855856 I2C: 00:29: enabled 1
1454 12:46:30.859374 PCI: 00:00.0: enabled 1
1455 12:46:30.859469 SPI: 00: enabled 1
1456 12:46:30.862592 PNP: 0c09.0: enabled 1
1457 12:46:30.866002 GENERIC: 0.0: enabled 0
1458 12:46:30.869223 USB2 port 0: enabled 1
1459 12:46:30.869304 USB2 port 1: enabled 1
1460 12:46:30.872272 USB2 port 2: enabled 1
1461 12:46:30.875740 USB2 port 3: enabled 1
1462 12:46:30.875855 USB2 port 4: enabled 0
1463 12:46:30.878895 USB2 port 5: enabled 1
1464 12:46:30.882476 USB2 port 6: enabled 0
1465 12:46:30.882583 USB2 port 7: enabled 1
1466 12:46:30.885618 USB3 port 0: enabled 1
1467 12:46:30.889340 USB3 port 1: enabled 1
1468 12:46:30.892396 USB3 port 2: enabled 1
1469 12:46:30.892477 USB3 port 3: enabled 1
1470 12:46:30.895947 APIC: 00: enabled 1
1471 12:46:30.899003 APIC: 02: enabled 1
1472 12:46:30.899084 PCI: 00:08.0: enabled 1
1473 12:46:30.906101 BS: BS_DEV_INIT run times (exec / console): 22 / 437 ms
1474 12:46:30.908837 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1475 12:46:30.912163 ELOG: NV offset 0xbfa000 size 0x1000
1476 12:46:30.920367 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1477 12:46:30.927233 ELOG: Event(17) added with size 13 at 2024-03-05 12:46:31 UTC
1478 12:46:30.934056 ELOG: Event(92) added with size 9 at 2024-03-05 12:46:31 UTC
1479 12:46:30.940636 ELOG: Event(93) added with size 9 at 2024-03-05 12:46:31 UTC
1480 12:46:30.946996 ELOG: Event(9E) added with size 10 at 2024-03-05 12:46:31 UTC
1481 12:46:30.953926 ELOG: Event(9F) added with size 14 at 2024-03-05 12:46:31 UTC
1482 12:46:30.960406 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1483 12:46:30.963546 ELOG: Event(A1) added with size 10 at 2024-03-05 12:46:31 UTC
1484 12:46:30.973800 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1485 12:46:30.980062 ELOG: Event(A0) added with size 9 at 2024-03-05 12:46:31 UTC
1486 12:46:30.983315 elog_add_boot_reason: Logged dev mode boot
1487 12:46:30.989781 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1488 12:46:30.989863 Finalize devices...
1489 12:46:30.993426 Devices finalized
1490 12:46:30.999685 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1491 12:46:31.003193 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1492 12:46:31.009630 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1493 12:46:31.013105 ME: HFSTS1 : 0x80030045
1494 12:46:31.016194 ME: HFSTS2 : 0x30280136
1495 12:46:31.023065 ME: HFSTS3 : 0x00000050
1496 12:46:31.026253 ME: HFSTS4 : 0x00004000
1497 12:46:31.029437 ME: HFSTS5 : 0x00000000
1498 12:46:31.033348 ME: HFSTS6 : 0x40400006
1499 12:46:31.036785 ME: Manufacturing Mode : NO
1500 12:46:31.040061 ME: FW Partition Table : OK
1501 12:46:31.042847 ME: Bringup Loader Failure : NO
1502 12:46:31.046180 ME: Firmware Init Complete : NO
1503 12:46:31.049931 ME: Boot Options Present : NO
1504 12:46:31.053186 ME: Update In Progress : NO
1505 12:46:31.056562 ME: D0i3 Support : YES
1506 12:46:31.059897 ME: Low Power State Enabled : NO
1507 12:46:31.062769 ME: CPU Replaced : YES
1508 12:46:31.066513 ME: CPU Replacement Valid : YES
1509 12:46:31.069245 ME: Current Working State : 5
1510 12:46:31.072993 ME: Current Operation State : 1
1511 12:46:31.076226 ME: Current Operation Mode : 3
1512 12:46:31.079479 ME: Error Code : 0
1513 12:46:31.082755 ME: CPU Debug Disabled : YES
1514 12:46:31.086088 ME: TXT Support : NO
1515 12:46:31.092606 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1516 12:46:31.099062 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1517 12:46:31.102508 ACPI: Writing ACPI tables at 76b27000.
1518 12:46:31.105803 ACPI: * FACS
1519 12:46:31.105884 ACPI: * DSDT
1520 12:46:31.109017 Ramoops buffer: 0x100000@0x76a26000.
1521 12:46:31.116077 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1522 12:46:31.119260 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1523 12:46:31.122369 Google Chrome EC: version:
1524 12:46:31.126282 ro: magolor_1.1.9999-103b6f9
1525 12:46:31.129548 rw: magolor_1.1.9999-103b6f9
1526 12:46:31.129628 running image: 1
1527 12:46:31.135865 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1528 12:46:31.140080 ACPI: * FADT
1529 12:46:31.140161 SCI is IRQ9
1530 12:46:31.146829 ACPI: added table 1/32, length now 40
1531 12:46:31.146910 ACPI: * SSDT
1532 12:46:31.149873 Found 1 CPU(s) with 2 core(s) each.
1533 12:46:31.153738 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1534 12:46:31.160309 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1535 12:46:31.163658 Could not locate 'wifi_sar' in VPD.
1536 12:46:31.166668 Checking CBFS for default SAR values
1537 12:46:31.173393 wifi_sar_defaults.hex has bad len in CBFS
1538 12:46:31.177062 failed from getting SAR limits!
1539 12:46:31.179712 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1540 12:46:31.186301 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1541 12:46:31.190262 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1542 12:46:31.196421 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1543 12:46:31.200113 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1544 12:46:31.206677 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1545 12:46:31.210028 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1546 12:46:31.216580 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1547 12:46:31.223099 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1548 12:46:31.230191 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1549 12:46:31.233009 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1550 12:46:31.239586 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1551 12:46:31.246307 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1552 12:46:31.250009 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1553 12:46:31.252885 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1554 12:46:31.261102 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1555 12:46:31.264357 PS2K: Passing 101 keymaps to kernel
1556 12:46:31.270661 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1557 12:46:31.277249 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1558 12:46:31.280738 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1559 12:46:31.287303 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1560 12:46:31.290472 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1561 12:46:31.297648 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1562 12:46:31.303973 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1563 12:46:31.310439 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1564 12:46:31.313815 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1565 12:46:31.320393 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1566 12:46:31.323639 ACPI: added table 2/32, length now 44
1567 12:46:31.327221 ACPI: * MCFG
1568 12:46:31.330346 ACPI: added table 3/32, length now 48
1569 12:46:31.330428 ACPI: * TPM2
1570 12:46:31.334100 TPM2 log created at 0x76a16000
1571 12:46:31.337361 ACPI: added table 4/32, length now 52
1572 12:46:31.340328 ACPI: * MADT
1573 12:46:31.340408 SCI is IRQ9
1574 12:46:31.344326 ACPI: added table 5/32, length now 56
1575 12:46:31.346824 current = 76b2d580
1576 12:46:31.350285 ACPI: * DMAR
1577 12:46:31.353939 ACPI: added table 6/32, length now 60
1578 12:46:31.357547 ACPI: added table 7/32, length now 64
1579 12:46:31.357628 ACPI: * HPET
1580 12:46:31.360518 ACPI: added table 8/32, length now 68
1581 12:46:31.363863 ACPI: done.
1582 12:46:31.366994 ACPI tables: 26304 bytes.
1583 12:46:31.370246 smbios_write_tables: 76a15000
1584 12:46:31.373628 EC returned error result code 3
1585 12:46:31.377222 Couldn't obtain OEM name from CBI
1586 12:46:31.377301 Create SMBIOS type 16
1587 12:46:31.380342 Create SMBIOS type 17
1588 12:46:31.383279 GENERIC: 0.0 (WIFI Device)
1589 12:46:31.386637 SMBIOS tables: 913 bytes.
1590 12:46:31.389971 Writing table forward entry at 0x00000500
1591 12:46:31.397436 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1592 12:46:31.400108 Writing coreboot table at 0x76b4b000
1593 12:46:31.406616 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1594 12:46:31.409849 1. 0000000000001000-000000000009ffff: RAM
1595 12:46:31.416677 2. 00000000000a0000-00000000000fffff: RESERVED
1596 12:46:31.419981 3. 0000000000100000-0000000076a14fff: RAM
1597 12:46:31.426681 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1598 12:46:31.430014 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1599 12:46:31.436584 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1600 12:46:31.439863 7. 0000000077000000-000000007fbfffff: RESERVED
1601 12:46:31.446421 8. 00000000c0000000-00000000cfffffff: RESERVED
1602 12:46:31.449578 9. 00000000fb000000-00000000fb000fff: RESERVED
1603 12:46:31.456127 10. 00000000fe000000-00000000fe00ffff: RESERVED
1604 12:46:31.459616 11. 00000000fea80000-00000000fea87fff: RESERVED
1605 12:46:31.466471 12. 00000000fed80000-00000000fed87fff: RESERVED
1606 12:46:31.469806 13. 00000000fed90000-00000000fed92fff: RESERVED
1607 12:46:31.473114 14. 00000000feda0000-00000000feda1fff: RESERVED
1608 12:46:31.479814 15. 0000000100000000-00000001803fffff: RAM
1609 12:46:31.482999 Passing 4 GPIOs to payload:
1610 12:46:31.486149 NAME | PORT | POLARITY | VALUE
1611 12:46:31.492622 lid | undefined | high | high
1612 12:46:31.496362 power | undefined | high | low
1613 12:46:31.502934 oprom | undefined | high | low
1614 12:46:31.509349 EC in RW | 0x000000b9 | high | low
1615 12:46:31.512450 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum 892d
1616 12:46:31.516162 coreboot table: 1504 bytes.
1617 12:46:31.519261 IMD ROOT 0. 0x76fff000 0x00001000
1618 12:46:31.525962 IMD SMALL 1. 0x76ffe000 0x00001000
1619 12:46:31.529291 FSP MEMORY 2. 0x76c4e000 0x003b0000
1620 12:46:31.532891 CONSOLE 3. 0x76c2e000 0x00020000
1621 12:46:31.536105 FMAP 4. 0x76c2d000 0x00000578
1622 12:46:31.539540 TIME STAMP 5. 0x76c2c000 0x00000910
1623 12:46:31.542649 VBOOT WORK 6. 0x76c18000 0x00014000
1624 12:46:31.545813 ROMSTG STCK 7. 0x76c17000 0x00001000
1625 12:46:31.548981 AFTER CAR 8. 0x76c0d000 0x0000a000
1626 12:46:31.552703 RAMSTAGE 9. 0x76ba7000 0x00066000
1627 12:46:31.559018 REFCODE 10. 0x76b67000 0x00040000
1628 12:46:31.562581 SMM BACKUP 11. 0x76b57000 0x00010000
1629 12:46:31.565783 4f444749 12. 0x76b55000 0x00002000
1630 12:46:31.569325 EXT VBT13. 0x76b53000 0x00001c43
1631 12:46:31.572310 COREBOOT 14. 0x76b4b000 0x00008000
1632 12:46:31.577292 ACPI 15. 0x76b27000 0x00024000
1633 12:46:31.579429 ACPI GNVS 16. 0x76b26000 0x00001000
1634 12:46:31.582588 RAMOOPS 17. 0x76a26000 0x00100000
1635 12:46:31.585887 TPM2 TCGLOG18. 0x76a16000 0x00010000
1636 12:46:31.592341 SMBIOS 19. 0x76a15000 0x00000800
1637 12:46:31.592426 IMD small region:
1638 12:46:31.595931 IMD ROOT 0. 0x76ffec00 0x00000400
1639 12:46:31.599168 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1640 12:46:31.605544 VPD 2. 0x76ffeb60 0x0000006c
1641 12:46:31.608895 POWER STATE 3. 0x76ffeb20 0x00000040
1642 12:46:31.612123 ROMSTAGE 4. 0x76ffeb00 0x00000004
1643 12:46:31.615826 MEM INFO 5. 0x76ffe920 0x000001e0
1644 12:46:31.622703 BS: BS_WRITE_TABLES run times (exec / console): 6 / 517 ms
1645 12:46:31.625473 MTRR: Physical address space:
1646 12:46:31.632365 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1647 12:46:31.638669 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1648 12:46:31.642441 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1649 12:46:31.648795 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1650 12:46:31.655097 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1651 12:46:31.662104 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1652 12:46:31.668659 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1653 12:46:31.671855 MTRR: Fixed MSR 0x250 0x0606060606060606
1654 12:46:31.675081 MTRR: Fixed MSR 0x258 0x0606060606060606
1655 12:46:31.682046 MTRR: Fixed MSR 0x259 0x0000000000000000
1656 12:46:31.685290 MTRR: Fixed MSR 0x268 0x0606060606060606
1657 12:46:31.688742 MTRR: Fixed MSR 0x269 0x0606060606060606
1658 12:46:31.691836 MTRR: Fixed MSR 0x26a 0x0606060606060606
1659 12:46:31.698280 MTRR: Fixed MSR 0x26b 0x0606060606060606
1660 12:46:31.701426 MTRR: Fixed MSR 0x26c 0x0606060606060606
1661 12:46:31.705149 MTRR: Fixed MSR 0x26d 0x0606060606060606
1662 12:46:31.708504 MTRR: Fixed MSR 0x26e 0x0606060606060606
1663 12:46:31.714959 MTRR: Fixed MSR 0x26f 0x0606060606060606
1664 12:46:31.718566 call enable_fixed_mtrr()
1665 12:46:31.721222 CPU physical address size: 39 bits
1666 12:46:31.725163 MTRR: default type WB/UC MTRR counts: 6/5.
1667 12:46:31.727920 MTRR: UC selected as default type.
1668 12:46:31.734822 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1669 12:46:31.741545 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1670 12:46:31.747779 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1671 12:46:31.751383 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1672 12:46:31.757749 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1673 12:46:31.761506
1674 12:46:31.761587 MTRR check
1675 12:46:31.765009 Fixed MTRRs : Enabled
1676 12:46:31.765090 Variable MTRRs: Enabled
1677 12:46:31.765154
1678 12:46:31.771196 MTRR: Fixed MSR 0x250 0x0606060606060606
1679 12:46:31.774539 MTRR: Fixed MSR 0x258 0x0606060606060606
1680 12:46:31.777827 MTRR: Fixed MSR 0x259 0x0000000000000000
1681 12:46:31.781306 MTRR: Fixed MSR 0x268 0x0606060606060606
1682 12:46:31.787548 MTRR: Fixed MSR 0x269 0x0606060606060606
1683 12:46:31.791202 MTRR: Fixed MSR 0x26a 0x0606060606060606
1684 12:46:31.794456 MTRR: Fixed MSR 0x26b 0x0606060606060606
1685 12:46:31.797974 MTRR: Fixed MSR 0x26c 0x0606060606060606
1686 12:46:31.804545 MTRR: Fixed MSR 0x26d 0x0606060606060606
1687 12:46:31.807783 MTRR: Fixed MSR 0x26e 0x0606060606060606
1688 12:46:31.810896 MTRR: Fixed MSR 0x26f 0x0606060606060606
1689 12:46:31.817426 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1690 12:46:31.820648 call enable_fixed_mtrr()
1691 12:46:31.824515 Checking cr50 for pending updates
1692 12:46:31.824595 CPU physical address size: 39 bits
1693 12:46:31.829445 Reading cr50 TPM mode
1694 12:46:31.839804 BS: BS_PAYLOAD_LOAD entry times (exec / console): 12 / 6 ms
1695 12:46:31.847515 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1696 12:46:31.851015 Checking segment from ROM address 0xfff9d5b8
1697 12:46:31.857348 Checking segment from ROM address 0xfff9d5d4
1698 12:46:31.860566 Loading segment from ROM address 0xfff9d5b8
1699 12:46:31.864170 code (compression=0)
1700 12:46:31.870573 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1701 12:46:31.880390 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1702 12:46:31.883482 it's not compressed!
1703 12:46:32.009331 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1704 12:46:32.015634 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1705 12:46:32.023126 Loading segment from ROM address 0xfff9d5d4
1706 12:46:32.026424 Entry Point 0x30000000
1707 12:46:32.026506 Loaded segments
1708 12:46:32.033213 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms
1709 12:46:32.049063 Finalizing chipset.
1710 12:46:32.052364 Finalizing SMM.
1711 12:46:32.052445 APMC done.
1712 12:46:32.059303 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1713 12:46:32.062224 mp_park_aps done after 0 msecs.
1714 12:46:32.065953 Jumping to boot code at 0x30000000(0x76b4b000)
1715 12:46:32.075944 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1716 12:46:32.076026
1717 12:46:32.076090
1718 12:46:32.076151
1719 12:46:32.078798 Starting depthcharge on Magolor...
1720 12:46:32.078878
1721 12:46:32.079204 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1722 12:46:32.079297 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1723 12:46:32.079381 Setting prompt string to ['dedede:']
1724 12:46:32.079462 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1725 12:46:32.089109 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1726 12:46:32.089193
1727 12:46:32.095309 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1728 12:46:32.095446
1729 12:46:32.098962 fw_config match found: AUDIO_AMP=UNPROVISIONED
1730 12:46:32.099044
1731 12:46:32.101999 Wipe memory regions:
1732 12:46:32.102080
1733 12:46:32.105262 [0x00000000001000, 0x000000000a0000)
1734 12:46:32.105342
1735 12:46:32.108774 [0x00000000100000, 0x00000030000000)
1736 12:46:32.240611
1737 12:46:32.243761 [0x00000031062170, 0x00000076a15000)
1738 12:46:32.415264
1739 12:46:32.418888 [0x00000100000000, 0x00000180400000)
1740 12:46:33.485986
1741 12:46:33.486161 R8152: Initializing
1742 12:46:33.486295
1743 12:46:33.489142 Version 6 (ocp_data = 5c30)
1744 12:46:33.492456
1745 12:46:33.492536 R8152: Done initializing
1746 12:46:33.492602
1747 12:46:33.496065 Adding net device
1748 12:46:33.496151
1749 12:46:33.499300 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1750 12:46:33.502636
1751 12:46:33.502717
1752 12:46:33.502781
1753 12:46:33.503061 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1755 12:46:33.603428 dedede: tftpboot 192.168.201.1 12948301/tftp-deploy-0kc4eie5/kernel/bzImage 12948301/tftp-deploy-0kc4eie5/kernel/cmdline 12948301/tftp-deploy-0kc4eie5/ramdisk/ramdisk.cpio.gz
1756 12:46:33.603605 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1757 12:46:33.603688 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1758 12:46:33.608027 tftpboot 192.168.201.1 12948301/tftp-deploy-0kc4eie5/kernel/bzImloy-0kc4eie5/kernel/cmdline 12948301/tftp-deploy-0kc4eie5/ramdisk/ramdisk.cpio.gz
1759 12:46:33.608112
1760 12:46:33.608177 Waiting for link
1761 12:46:33.809574
1762 12:46:33.809699 done.
1763 12:46:33.809766
1764 12:46:33.809828 MAC: 00:24:32:30:7b:58
1765 12:46:33.809887
1766 12:46:33.813065 Sending DHCP discover... done.
1767 12:46:33.813191
1768 12:46:33.816415 Waiting for reply... done.
1769 12:46:33.816537
1770 12:46:33.819704 Sending DHCP request... done.
1771 12:46:33.819827
1772 12:46:33.826308 Waiting for reply... done.
1773 12:46:33.826430
1774 12:46:33.826541 My ip is 192.168.201.13
1775 12:46:33.826650
1776 12:46:33.829384 The DHCP server ip is 192.168.201.1
1777 12:46:33.833144
1778 12:46:33.835897 TFTP server IP predefined by user: 192.168.201.1
1779 12:46:33.836021
1780 12:46:33.842396 Bootfile predefined by user: 12948301/tftp-deploy-0kc4eie5/kernel/bzImage
1781 12:46:33.842501
1782 12:46:33.846094 Sending tftp read request... done.
1783 12:46:33.846200
1784 12:46:33.849069 Waiting for the transfer...
1785 12:46:33.852667
1786 12:46:34.429619 00000000 ################################################################
1787 12:46:34.429756
1788 12:46:34.992531 00080000 ################################################################
1789 12:46:34.992677
1790 12:46:35.579543 00100000 ################################################################
1791 12:46:35.579700
1792 12:46:36.171340 00180000 ################################################################
1793 12:46:36.171534
1794 12:46:36.761257 00200000 ################################################################
1795 12:46:36.761480
1796 12:46:37.356855 00280000 ################################################################
1797 12:46:37.357002
1798 12:46:37.941017 00300000 ################################################################
1799 12:46:37.941180
1800 12:46:38.531659 00380000 ################################################################
1801 12:46:38.531806
1802 12:46:39.119369 00400000 ################################################################
1803 12:46:39.119537
1804 12:46:39.703038 00480000 ################################################################
1805 12:46:39.703182
1806 12:46:40.294800 00500000 ################################################################
1807 12:46:40.294971
1808 12:46:40.878913 00580000 ################################################################
1809 12:46:40.879057
1810 12:46:41.471643 00600000 ################################################################
1811 12:46:41.471793
1812 12:46:42.068714 00680000 ################################################################
1813 12:46:42.068887
1814 12:46:42.668268 00700000 ################################################################
1815 12:46:42.668413
1816 12:46:43.278343 00780000 ################################################################
1817 12:46:43.278491
1818 12:46:43.868382 00800000 ################################################################
1819 12:46:43.868538
1820 12:46:44.390567 00880000 ######################################################## done.
1821 12:46:44.390701
1822 12:46:44.394290 The bootfile was 9367440 bytes long.
1823 12:46:44.394365
1824 12:46:44.397384 Sending tftp read request... done.
1825 12:46:44.397466
1826 12:46:44.400387 Waiting for the transfer...
1827 12:46:44.400485
1828 12:46:44.991215 00000000 ################################################################
1829 12:46:44.991433
1830 12:46:45.592410 00080000 ################################################################
1831 12:46:45.592621
1832 12:46:46.183041 00100000 ################################################################
1833 12:46:46.183191
1834 12:46:46.764319 00180000 ################################################################
1835 12:46:46.764466
1836 12:46:47.338460 00200000 ################################################################
1837 12:46:47.338607
1838 12:46:47.935840 00280000 ################################################################
1839 12:46:47.935992
1840 12:46:48.541157 00300000 ################################################################
1841 12:46:48.541315
1842 12:46:49.133294 00380000 ################################################################
1843 12:46:49.133441
1844 12:46:49.691265 00400000 ################################################################
1845 12:46:49.691421
1846 12:46:50.248811 00480000 ################################################################
1847 12:46:50.248959
1848 12:46:50.795995 00500000 ################################################################
1849 12:46:50.796143
1850 12:46:51.359004 00580000 ################################################################
1851 12:46:51.359152
1852 12:46:51.929550 00600000 ################################################################
1853 12:46:51.929699
1854 12:46:52.500953 00680000 ################################################################
1855 12:46:52.501092
1856 12:46:53.057867 00700000 ################################################################
1857 12:46:53.058008
1858 12:46:53.627751 00780000 ################################################################
1859 12:46:53.627903
1860 12:46:54.103415 00800000 ###################################################### done.
1861 12:46:54.103563
1862 12:46:54.106811 Sending tftp read request... done.
1863 12:46:54.106896
1864 12:46:54.110072 Waiting for the transfer...
1865 12:46:54.110155
1866 12:46:54.113551 00000000 # done.
1867 12:46:54.113635
1868 12:46:54.119734 Command line loaded dynamically from TFTP file: 12948301/tftp-deploy-0kc4eie5/kernel/cmdline
1869 12:46:54.119819
1870 12:46:54.136199 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1871 12:46:54.136289
1872 12:46:54.139492 ec_init: CrosEC protocol v3 supported (256, 256)
1873 12:46:54.147718
1874 12:46:54.151233 Shutting down all USB controllers.
1875 12:46:54.151316
1876 12:46:54.151421 Removing current net device
1877 12:46:54.151484
1878 12:46:54.154693 Finalizing coreboot
1879 12:46:54.154776
1880 12:46:54.160993 Exiting depthcharge with code 4 at timestamp: 28892963
1881 12:46:54.161076
1882 12:46:54.161142
1883 12:46:54.161205 Starting kernel ...
1884 12:46:54.161263
1885 12:46:54.161321
1886 12:46:54.161689 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
1887 12:46:54.161784 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
1888 12:46:54.161860 Setting prompt string to ['Linux version [0-9]']
1889 12:46:54.161927 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1890 12:46:54.161995 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1892 12:51:19.162060 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
1894 12:51:19.162257 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
1896 12:51:19.162419 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1899 12:51:19.162656 end: 2 depthcharge-action (duration 00:05:00) [common]
1901 12:51:19.162919 Cleaning after the job
1902 12:51:19.163009 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12948301/tftp-deploy-0kc4eie5/ramdisk
1903 12:51:19.164327 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12948301/tftp-deploy-0kc4eie5/kernel
1904 12:51:19.165864 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12948301/tftp-deploy-0kc4eie5/modules
1905 12:51:19.166206 start: 5.1 power-off (timeout 00:00:30) [common]
1906 12:51:19.166366 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-5' '--port=1' '--command=off'
1907 12:51:19.242285 >> Command sent successfully.
1908 12:51:19.244806 Returned 0 in 0 seconds
1909 12:51:19.345299 end: 5.1 power-off (duration 00:00:00) [common]
1911 12:51:19.345822 start: 5.2 read-feedback (timeout 00:10:00) [common]
1912 12:51:19.346248 Listened to connection for namespace 'common' for up to 1s
1914 12:51:19.346777 Listened to connection for namespace 'common' for up to 1s
1915 12:51:20.347121 Finalising connection for namespace 'common'
1916 12:51:20.347304 Disconnecting from shell: Finalise
1917 12:51:20.347430
1918 12:51:20.447774 end: 5.2 read-feedback (duration 00:00:01) [common]
1919 12:51:20.447907 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12948301
1920 12:51:20.464056 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12948301
1921 12:51:20.464196 JobError: Your job cannot terminate cleanly.