Boot log: acer-cbv514-1h-34uz-brya

    1 12:42:40.552360  lava-dispatcher, installed at version: 2024.01
    2 12:42:40.552570  start: 0 validate
    3 12:42:40.552690  Start time: 2024-03-05 12:42:40.552684+00:00 (UTC)
    4 12:42:40.552806  Using caching service: 'http://localhost/cache/?uri=%s'
    5 12:42:40.552917  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
    6 12:42:40.819448  Using caching service: 'http://localhost/cache/?uri=%s'
    7 12:42:40.819626  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2247-g140bf69dc64d%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
    8 12:42:41.077821  Using caching service: 'http://localhost/cache/?uri=%s'
    9 12:42:41.077976  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2247-g140bf69dc64d%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
   10 12:42:47.528294  validate duration: 6.98
   12 12:42:47.528561  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 12:42:47.528647  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 12:42:47.528720  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 12:42:47.528832  Not decompressing ramdisk as can be used compressed.
   16 12:42:47.528909  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
   17 12:42:47.528964  saving as /var/lib/lava/dispatcher/tmp/12948271/tftp-deploy-q4amzrk9/ramdisk/rootfs.cpio.gz
   18 12:42:47.529014  total size: 8418130 (8 MB)
   19 12:42:48.018689  progress   0 % (0 MB)
   20 12:42:48.020604  progress   5 % (0 MB)
   21 12:42:48.022254  progress  10 % (0 MB)
   22 12:42:48.023848  progress  15 % (1 MB)
   23 12:42:48.025530  progress  20 % (1 MB)
   24 12:42:48.027107  progress  25 % (2 MB)
   25 12:42:48.028700  progress  30 % (2 MB)
   26 12:42:48.030206  progress  35 % (2 MB)
   27 12:42:48.031810  progress  40 % (3 MB)
   28 12:42:48.033462  progress  45 % (3 MB)
   29 12:42:48.035131  progress  50 % (4 MB)
   30 12:42:48.036708  progress  55 % (4 MB)
   31 12:42:48.038286  progress  60 % (4 MB)
   32 12:42:48.039735  progress  65 % (5 MB)
   33 12:42:48.041306  progress  70 % (5 MB)
   34 12:42:48.042860  progress  75 % (6 MB)
   35 12:42:48.044410  progress  80 % (6 MB)
   36 12:42:48.045984  progress  85 % (6 MB)
   37 12:42:48.047524  progress  90 % (7 MB)
   38 12:42:48.049074  progress  95 % (7 MB)
   39 12:42:48.050568  progress 100 % (8 MB)
   40 12:42:48.050744  8 MB downloaded in 0.52 s (15.39 MB/s)
   41 12:42:48.050886  end: 1.1.1 http-download (duration 00:00:01) [common]
   43 12:42:48.051082  end: 1.1 download-retry (duration 00:00:01) [common]
   44 12:42:48.051153  start: 1.2 download-retry (timeout 00:09:59) [common]
   45 12:42:48.051220  start: 1.2.1 http-download (timeout 00:09:59) [common]
   46 12:42:48.051344  downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2247-g140bf69dc64d/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
   47 12:42:48.051404  saving as /var/lib/lava/dispatcher/tmp/12948271/tftp-deploy-q4amzrk9/kernel/bzImage
   48 12:42:48.051453  total size: 9367440 (8 MB)
   49 12:42:48.051501  No compression specified
   50 12:42:48.052434  progress   0 % (0 MB)
   51 12:42:48.054206  progress   5 % (0 MB)
   52 12:42:48.055899  progress  10 % (0 MB)
   53 12:42:48.057621  progress  15 % (1 MB)
   54 12:42:48.059420  progress  20 % (1 MB)
   55 12:42:48.061105  progress  25 % (2 MB)
   56 12:42:48.062812  progress  30 % (2 MB)
   57 12:42:48.064615  progress  35 % (3 MB)
   58 12:42:48.066339  progress  40 % (3 MB)
   59 12:42:48.068046  progress  45 % (4 MB)
   60 12:42:48.069758  progress  50 % (4 MB)
   61 12:42:48.071581  progress  55 % (4 MB)
   62 12:42:48.073275  progress  60 % (5 MB)
   63 12:42:48.074966  progress  65 % (5 MB)
   64 12:42:48.076739  progress  70 % (6 MB)
   65 12:42:48.078395  progress  75 % (6 MB)
   66 12:42:48.080042  progress  80 % (7 MB)
   67 12:42:48.081713  progress  85 % (7 MB)
   68 12:42:48.083467  progress  90 % (8 MB)
   69 12:42:48.085105  progress  95 % (8 MB)
   70 12:42:48.086790  progress 100 % (8 MB)
   71 12:42:48.086962  8 MB downloaded in 0.04 s (251.61 MB/s)
   72 12:42:48.087087  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 12:42:48.087276  end: 1.2 download-retry (duration 00:00:00) [common]
   75 12:42:48.087348  start: 1.3 download-retry (timeout 00:09:59) [common]
   76 12:42:48.087414  start: 1.3.1 http-download (timeout 00:09:59) [common]
   77 12:42:48.087531  downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2247-g140bf69dc64d/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
   78 12:42:48.087588  saving as /var/lib/lava/dispatcher/tmp/12948271/tftp-deploy-q4amzrk9/modules/modules.tar
   79 12:42:48.087637  total size: 251176 (0 MB)
   80 12:42:48.087685  Using unxz to decompress xz
   81 12:42:48.091410  progress  13 % (0 MB)
   82 12:42:48.091727  progress  26 % (0 MB)
   83 12:42:48.091933  progress  39 % (0 MB)
   84 12:42:48.093567  progress  52 % (0 MB)
   85 12:42:48.095205  progress  65 % (0 MB)
   86 12:42:48.096796  progress  78 % (0 MB)
   87 12:42:48.098451  progress  91 % (0 MB)
   88 12:42:48.100037  progress 100 % (0 MB)
   89 12:42:48.104887  0 MB downloaded in 0.02 s (13.89 MB/s)
   90 12:42:48.105095  end: 1.3.1 http-download (duration 00:00:00) [common]
   92 12:42:48.105343  end: 1.3 download-retry (duration 00:00:00) [common]
   93 12:42:48.105426  start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
   94 12:42:48.105507  start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
   95 12:42:48.105581  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
   96 12:42:48.105655  start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
   97 12:42:48.105857  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12948271/lava-overlay-dmd35ko8
   98 12:42:48.105978  makedir: /var/lib/lava/dispatcher/tmp/12948271/lava-overlay-dmd35ko8/lava-12948271/bin
   99 12:42:48.106070  makedir: /var/lib/lava/dispatcher/tmp/12948271/lava-overlay-dmd35ko8/lava-12948271/tests
  100 12:42:48.106155  makedir: /var/lib/lava/dispatcher/tmp/12948271/lava-overlay-dmd35ko8/lava-12948271/results
  101 12:42:48.106254  Creating /var/lib/lava/dispatcher/tmp/12948271/lava-overlay-dmd35ko8/lava-12948271/bin/lava-add-keys
  102 12:42:48.106383  Creating /var/lib/lava/dispatcher/tmp/12948271/lava-overlay-dmd35ko8/lava-12948271/bin/lava-add-sources
  103 12:42:48.106486  Creating /var/lib/lava/dispatcher/tmp/12948271/lava-overlay-dmd35ko8/lava-12948271/bin/lava-background-process-start
  104 12:42:48.106585  Creating /var/lib/lava/dispatcher/tmp/12948271/lava-overlay-dmd35ko8/lava-12948271/bin/lava-background-process-stop
  105 12:42:48.106685  Creating /var/lib/lava/dispatcher/tmp/12948271/lava-overlay-dmd35ko8/lava-12948271/bin/lava-common-functions
  106 12:42:48.106781  Creating /var/lib/lava/dispatcher/tmp/12948271/lava-overlay-dmd35ko8/lava-12948271/bin/lava-echo-ipv4
  107 12:42:48.106877  Creating /var/lib/lava/dispatcher/tmp/12948271/lava-overlay-dmd35ko8/lava-12948271/bin/lava-install-packages
  108 12:42:48.106974  Creating /var/lib/lava/dispatcher/tmp/12948271/lava-overlay-dmd35ko8/lava-12948271/bin/lava-installed-packages
  109 12:42:48.107068  Creating /var/lib/lava/dispatcher/tmp/12948271/lava-overlay-dmd35ko8/lava-12948271/bin/lava-os-build
  110 12:42:48.107163  Creating /var/lib/lava/dispatcher/tmp/12948271/lava-overlay-dmd35ko8/lava-12948271/bin/lava-probe-channel
  111 12:42:48.107258  Creating /var/lib/lava/dispatcher/tmp/12948271/lava-overlay-dmd35ko8/lava-12948271/bin/lava-probe-ip
  112 12:42:48.107354  Creating /var/lib/lava/dispatcher/tmp/12948271/lava-overlay-dmd35ko8/lava-12948271/bin/lava-target-ip
  113 12:42:48.107449  Creating /var/lib/lava/dispatcher/tmp/12948271/lava-overlay-dmd35ko8/lava-12948271/bin/lava-target-mac
  114 12:42:48.107544  Creating /var/lib/lava/dispatcher/tmp/12948271/lava-overlay-dmd35ko8/lava-12948271/bin/lava-target-storage
  115 12:42:48.107642  Creating /var/lib/lava/dispatcher/tmp/12948271/lava-overlay-dmd35ko8/lava-12948271/bin/lava-test-case
  116 12:42:48.107738  Creating /var/lib/lava/dispatcher/tmp/12948271/lava-overlay-dmd35ko8/lava-12948271/bin/lava-test-event
  117 12:42:48.107835  Creating /var/lib/lava/dispatcher/tmp/12948271/lava-overlay-dmd35ko8/lava-12948271/bin/lava-test-feedback
  118 12:42:48.107932  Creating /var/lib/lava/dispatcher/tmp/12948271/lava-overlay-dmd35ko8/lava-12948271/bin/lava-test-raise
  119 12:42:48.108030  Creating /var/lib/lava/dispatcher/tmp/12948271/lava-overlay-dmd35ko8/lava-12948271/bin/lava-test-reference
  120 12:42:48.108128  Creating /var/lib/lava/dispatcher/tmp/12948271/lava-overlay-dmd35ko8/lava-12948271/bin/lava-test-runner
  121 12:42:48.108224  Creating /var/lib/lava/dispatcher/tmp/12948271/lava-overlay-dmd35ko8/lava-12948271/bin/lava-test-set
  122 12:42:48.108320  Creating /var/lib/lava/dispatcher/tmp/12948271/lava-overlay-dmd35ko8/lava-12948271/bin/lava-test-shell
  123 12:42:48.108419  Updating /var/lib/lava/dispatcher/tmp/12948271/lava-overlay-dmd35ko8/lava-12948271/bin/lava-install-packages (oe)
  124 12:42:48.108546  Updating /var/lib/lava/dispatcher/tmp/12948271/lava-overlay-dmd35ko8/lava-12948271/bin/lava-installed-packages (oe)
  125 12:42:48.108642  Creating /var/lib/lava/dispatcher/tmp/12948271/lava-overlay-dmd35ko8/lava-12948271/environment
  126 12:42:48.108723  LAVA metadata
  127 12:42:48.108783  - LAVA_JOB_ID=12948271
  128 12:42:48.108837  - LAVA_DISPATCHER_IP=192.168.201.1
  129 12:42:48.108924  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
  130 12:42:48.108985  skipped lava-vland-overlay
  131 12:42:48.109052  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  132 12:42:48.109122  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
  133 12:42:48.109193  skipped lava-multinode-overlay
  134 12:42:48.109322  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  135 12:42:48.109457  start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
  136 12:42:48.109540  Loading test definitions
  137 12:42:48.109623  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
  138 12:42:48.109696  Using /lava-12948271 at stage 0
  139 12:42:48.109955  uuid=12948271_1.4.2.3.1 testdef=None
  140 12:42:48.110026  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  141 12:42:48.110091  start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
  142 12:42:48.110511  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  144 12:42:48.110688  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
  145 12:42:48.111202  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  147 12:42:48.111393  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
  148 12:42:48.111877  runner path: /var/lib/lava/dispatcher/tmp/12948271/lava-overlay-dmd35ko8/lava-12948271/0/tests/0_dmesg test_uuid 12948271_1.4.2.3.1
  149 12:42:48.112011  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  151 12:42:48.112194  start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
  152 12:42:48.112250  Using /lava-12948271 at stage 1
  153 12:42:48.112482  uuid=12948271_1.4.2.3.5 testdef=None
  154 12:42:48.112551  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  155 12:42:48.112616  start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
  156 12:42:48.112974  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  158 12:42:48.113154  start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
  159 12:42:48.113672  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  161 12:42:48.113851  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
  162 12:42:48.114339  runner path: /var/lib/lava/dispatcher/tmp/12948271/lava-overlay-dmd35ko8/lava-12948271/1/tests/1_bootrr test_uuid 12948271_1.4.2.3.5
  163 12:42:48.114456  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  165 12:42:48.114618  Creating lava-test-runner.conf files
  166 12:42:48.114666  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12948271/lava-overlay-dmd35ko8/lava-12948271/0 for stage 0
  167 12:42:48.114735  - 0_dmesg
  168 12:42:48.114801  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12948271/lava-overlay-dmd35ko8/lava-12948271/1 for stage 1
  169 12:42:48.114874  - 1_bootrr
  170 12:42:48.114950  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  171 12:42:48.115023  start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
  172 12:42:48.121399  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  173 12:42:48.121494  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
  174 12:42:48.121569  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  175 12:42:48.121640  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  176 12:42:48.121709  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
  177 12:42:48.291423  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  178 12:42:48.291719  start: 1.4.4 extract-modules (timeout 00:09:59) [common]
  179 12:42:48.291825  extracting modules file /var/lib/lava/dispatcher/tmp/12948271/tftp-deploy-q4amzrk9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12948271/extract-overlay-ramdisk-vmmw_pjf/ramdisk
  180 12:42:48.300667  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  181 12:42:48.300777  start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
  182 12:42:48.300851  [common] Applying overlay /var/lib/lava/dispatcher/tmp/12948271/compress-overlay-mdpdr6f7/overlay-1.4.2.4.tar.gz to ramdisk
  183 12:42:48.300907  [common] Applying overlay /var/lib/lava/dispatcher/tmp/12948271/compress-overlay-mdpdr6f7/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12948271/extract-overlay-ramdisk-vmmw_pjf/ramdisk
  184 12:42:48.306842  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  185 12:42:48.306949  start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
  186 12:42:48.307026  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  187 12:42:48.307097  start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
  188 12:42:48.307159  Building ramdisk /var/lib/lava/dispatcher/tmp/12948271/extract-overlay-ramdisk-vmmw_pjf/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12948271/extract-overlay-ramdisk-vmmw_pjf/ramdisk
  189 12:42:48.364826  >> 49788 blocks

  190 12:42:49.107591  rename /var/lib/lava/dispatcher/tmp/12948271/extract-overlay-ramdisk-vmmw_pjf/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12948271/tftp-deploy-q4amzrk9/ramdisk/ramdisk.cpio.gz
  191 12:42:49.107986  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  192 12:42:49.108138  start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
  193 12:42:49.108233  start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
  194 12:42:49.108317  No mkimage arch provided, not using FIT.
  195 12:42:49.108393  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  196 12:42:49.108467  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  197 12:42:49.108558  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  198 12:42:49.108643  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
  199 12:42:49.108710  No LXC device requested
  200 12:42:49.108778  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  201 12:42:49.108853  start: 1.6 deploy-device-env (timeout 00:09:58) [common]
  202 12:42:49.108922  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  203 12:42:49.108985  Checking files for TFTP limit of 4294967296 bytes.
  204 12:42:49.109316  end: 1 tftp-deploy (duration 00:00:02) [common]
  205 12:42:49.109395  start: 2 depthcharge-action (timeout 00:05:00) [common]
  206 12:42:49.109464  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  207 12:42:49.109558  substitutions:
  208 12:42:49.109611  - {DTB}: None
  209 12:42:49.109661  - {INITRD}: 12948271/tftp-deploy-q4amzrk9/ramdisk/ramdisk.cpio.gz
  210 12:42:49.109707  - {KERNEL}: 12948271/tftp-deploy-q4amzrk9/kernel/bzImage
  211 12:42:49.109752  - {LAVA_MAC}: None
  212 12:42:49.109795  - {PRESEED_CONFIG}: None
  213 12:42:49.109840  - {PRESEED_LOCAL}: None
  214 12:42:49.109883  - {RAMDISK}: 12948271/tftp-deploy-q4amzrk9/ramdisk/ramdisk.cpio.gz
  215 12:42:49.109928  - {ROOT_PART}: None
  216 12:42:49.109971  - {ROOT}: None
  217 12:42:49.110014  - {SERVER_IP}: 192.168.201.1
  218 12:42:49.110058  - {TEE}: None
  219 12:42:49.110101  Parsed boot commands:
  220 12:42:49.110144  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  221 12:42:49.110285  Parsed boot commands: tftpboot 192.168.201.1 12948271/tftp-deploy-q4amzrk9/kernel/bzImage 12948271/tftp-deploy-q4amzrk9/kernel/cmdline 12948271/tftp-deploy-q4amzrk9/ramdisk/ramdisk.cpio.gz
  222 12:42:49.110365  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  223 12:42:49.110433  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  224 12:42:49.110504  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  225 12:42:49.110575  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  226 12:42:49.110632  Not connected, no need to disconnect.
  227 12:42:49.110691  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  228 12:42:49.110841  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  229 12:42:49.110897  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-3'
  230 12:42:49.113833  Setting prompt string to ['lava-test: # ']
  231 12:42:49.114075  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  232 12:42:49.114175  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  233 12:42:49.114253  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  234 12:42:49.114324  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  235 12:42:49.114482  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-3' '--port=1' '--command=reboot'
  236 12:42:54.255782  >> Command sent successfully.

  237 12:42:54.263995  Returned 0 in 5 seconds
  238 12:42:54.365034  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  240 12:42:54.366188  end: 2.2.2 reset-device (duration 00:00:05) [common]
  241 12:42:54.366580  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  242 12:42:54.366862  Setting prompt string to 'Starting depthcharge on Volmar...'
  243 12:42:54.367105  Changing prompt to 'Starting depthcharge on Volmar...'
  244 12:42:54.367362  depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
  245 12:42:54.368162  [Enter `^Ec?' for help]

  246 12:42:55.738235  

  247 12:42:55.738750  

  248 12:42:55.744968  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 bootblock starting (log level: 8)...

  249 12:42:55.748442  CPU: 12th Gen Intel(R) Core(TM) i3-1215U

  250 12:42:55.755141  CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423

  251 12:42:55.758809  CPU: AES supported, TXT NOT supported, VT supported

  252 12:42:55.768590  Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384

  253 12:42:55.769050  Cache size = 10 MiB

  254 12:42:55.772175  MCH: device id 4609 (rev 04) is Alderlake-P

  255 12:42:55.778441  PCH: device id 5182 (rev 01) is Raptorlake-P SKU

  256 12:42:55.782180  IGD: device id 46b3 (rev 0c) is Alderlake P GT2

  257 12:42:55.786102  VBOOT: Loading verstage.

  258 12:42:55.789675  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  259 12:42:55.797073  FMAP: base = 0x0 size = 0x2000000 #areas = 37

  260 12:42:55.801016  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  261 12:42:55.807701  CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes

  262 12:42:55.817972  CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954

  263 12:42:55.818323  

  264 12:42:55.818571  

  265 12:42:55.824041  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 verstage starting (log level: 8)...

  266 12:42:55.832054  Probing TPM I2C: I2C bus 1 version 0x3230302a

  267 12:42:55.835324  DW I2C bus 1 at 0xfe022000 (400 KHz)

  268 12:42:55.838521  I2C TX abort detected (00000001)

  269 12:42:55.842222  cr50_i2c_read: Address write failed

  270 12:42:55.854152  .done! DID_VID 0x00281ae0

  271 12:42:55.858143  TPM ready after 0 ms

  272 12:42:55.861260  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  273 12:42:55.874989  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  274 12:42:55.880925  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  275 12:42:55.933746  tlcl_send_startup: Startup return code is 0

  276 12:42:55.934126  TPM: setup succeeded

  277 12:42:55.955338  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  278 12:42:55.979731  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  279 12:42:55.985977  Chrome EC: UHEPI supported

  280 12:42:55.989186  Reading cr50 boot mode

  281 12:42:56.004697  Cr50 says boot_mode is VERIFIED_RW(0x00).

  282 12:42:56.005185  Phase 1

  283 12:42:56.011158  FMAP: area GBB found @ 1805000 (458752 bytes)

  284 12:42:56.017957  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  285 12:42:56.024552  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  286 12:42:56.030819  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  287 12:42:56.034141  Phase 2

  288 12:42:56.034496  Phase 3

  289 12:42:56.036999  FMAP: area GBB found @ 1805000 (458752 bytes)

  290 12:42:56.044210  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  291 12:42:56.046865  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  292 12:42:56.053577  VB2:vb2_verify_keyblock() Checking keyblock signature...

  293 12:42:56.060417  VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW

  294 12:42:56.067856  VB2:vb2_verify_digest() HW RSA forbidden, using SW

  295 12:42:56.070708  VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW

  296 12:42:56.085381  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  297 12:42:56.087874  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  298 12:42:56.094963  VB2:vb2_verify_fw_preamble() Verifying preamble.

  299 12:42:56.101366  VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW

  300 12:42:56.104655  VB2:vb2_verify_digest() HW RSA forbidden, using SW

  301 12:42:56.111784  VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW

  302 12:42:56.115611  Phase 4

  303 12:42:56.119401  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  304 12:42:56.125461  VB2:vb2api_init_hash() HW crypto forbidden by TPM flag, using SW

  305 12:42:56.351157  VB2:vb2_verify_digest() HW RSA forbidden, using SW

  306 12:42:56.357148  VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW

  307 12:42:56.360460  Saving vboot hash.

  308 12:42:56.367337  TPM: Extending digest for `VBOOT: boot mode` into PCR 0

  309 12:42:56.383729  tlcl_extend: response is 0

  310 12:42:56.390507  TPM: Digest of `VBOOT: boot mode` to PCR 0 measured

  311 12:42:56.393663  TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1

  312 12:42:56.411352  tlcl_extend: response is 0

  313 12:42:56.418058  TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured

  314 12:42:56.438207  tlcl_lock_nv_write: response is 0

  315 12:42:56.456542  tlcl_lock_nv_write: response is 0

  316 12:42:56.456673  Slot A is selected

  317 12:42:56.463670  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  318 12:42:56.470333  CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes

  319 12:42:56.477419  CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600

  320 12:42:56.483651  BS: verstage times (exec / console): total (unknown) / 253 ms

  321 12:42:56.484063  

  322 12:42:56.484336  

  323 12:42:56.490741  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 romstage starting (log level: 8)...

  324 12:42:56.494684  Google Chrome EC: version:

  325 12:42:56.498088  	ro: volmar_v2.0.14126-e605144e9c

  326 12:42:56.500882  	rw: volmar_v0.0.55-22d1557

  327 12:42:56.504259    running image: 2

  328 12:42:56.507789  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  329 12:42:56.517593  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  330 12:42:56.524287  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  331 12:42:56.530620  CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c

  332 12:42:56.540649  VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  333 12:42:56.551392  VB2:check_ec_hash()            Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  334 12:42:56.557641  EC took 1767us to calculate image hash

  335 12:42:56.567512  VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  336 12:42:56.570426  VB2:sync_ec() select_rw=RW(active)

  337 12:42:56.580372  Waited 270us to clear limit power flag.

  338 12:42:56.583609  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  339 12:42:56.587549  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  340 12:42:56.590900  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  341 12:42:56.597603  gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000

  342 12:42:56.600970  gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000

  343 12:42:56.604129  TCO_STS:   0000 0000

  344 12:42:56.606883  GEN_PMCON: d0015038 00002200

  345 12:42:56.607259  GBLRST_CAUSE: 00000000 00000000

  346 12:42:56.610483  HPR_CAUSE0: 00000000

  347 12:42:56.614210  prev_sleep_state 5

  348 12:42:56.617623  Abort disabling TXT, as CPU is not TXT capable.

  349 12:42:56.625046  cse_lite: Number of partitions = 3

  350 12:42:56.628183  cse_lite: Current partition = RO

  351 12:42:56.628525  cse_lite: Next partition = RO

  352 12:42:56.631864  cse_lite: Flags = 0x7

  353 12:42:56.638627  cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)

  354 12:42:56.648583  cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)

  355 12:42:56.652028  FMAP: area SI_ME found @ 1000 (5238784 bytes)

  356 12:42:56.658147  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  357 12:42:56.664712  cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000

  358 12:42:56.671787  CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8

  359 12:42:56.674926  cse_lite: CSE CBFS RW version : 16.1.25.2049

  360 12:42:56.681398  cse_lite: Set Boot Partition Info Command (RW)

  361 12:42:56.684614  HECI: Global Reset(Type:1) Command

  362 12:42:58.095318  

  363 12:42:58.095465  

  364 12:42:58.102361  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 bootblock starting (log level: 8)...

  365 12:42:58.106610  CPU: 12th Gen Intel(R) Core(TM) i3-1215U

  366 12:42:58.112936  CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423

  367 12:42:58.116627  CPU: AES supported, TXT NOT supported, VT supported

  368 12:42:58.122759  Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384

  369 12:42:58.126184  Cache size = 10 MiB

  370 12:42:58.129476  MCH: device id 4609 (rev 04) is Alderlake-P

  371 12:42:58.136519  PCH: device id 5182 (rev 01) is Raptorlake-P SKU

  372 12:42:58.139686  IGD: device id 46b3 (rev 0c) is Alderlake P GT2

  373 12:42:58.143133  VBOOT: Loading verstage.

  374 12:42:58.147086  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  375 12:42:58.153963  FMAP: base = 0x0 size = 0x2000000 #areas = 37

  376 12:42:58.157269  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  377 12:42:58.164497  CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes

  378 12:42:58.174186  CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954

  379 12:42:58.174261  

  380 12:42:58.174314  

  381 12:42:58.184192  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 verstage starting (log level: 8)...

  382 12:42:58.190841  Probing TPM I2C: I2C bus 1 version 0x3230302a

  383 12:42:58.194122  DW I2C bus 1 at 0xfe022000 (400 KHz)

  384 12:42:58.197831  done! DID_VID 0x00281ae0

  385 12:42:58.197902  TPM ready after 0 ms

  386 12:42:58.204503  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  387 12:42:58.212580  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  388 12:42:58.220012  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  389 12:42:58.275987  tlcl_send_startup: Startup return code is 0

  390 12:42:58.276107  TPM: setup succeeded

  391 12:42:58.296926  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  392 12:42:58.318852  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  393 12:42:58.322899  Chrome EC: UHEPI supported

  394 12:42:58.325907  Reading cr50 boot mode

  395 12:42:58.340730  Cr50 says boot_mode is VERIFIED_RW(0x00).

  396 12:42:58.340807  Phase 1

  397 12:42:58.347629  FMAP: area GBB found @ 1805000 (458752 bytes)

  398 12:42:58.354203  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  399 12:42:58.360765  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  400 12:42:58.367523  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  401 12:42:58.370757  Phase 2

  402 12:42:58.370817  Phase 3

  403 12:42:58.373940  FMAP: area GBB found @ 1805000 (458752 bytes)

  404 12:42:58.380663  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  405 12:42:58.384099  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  406 12:42:58.390598  VB2:vb2_verify_keyblock() Checking keyblock signature...

  407 12:42:58.397610  VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW

  408 12:42:58.404022  VB2:vb2_verify_digest() HW RSA forbidden, using SW

  409 12:42:58.407228  VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW

  410 12:42:58.422087  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  411 12:42:58.424989  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  412 12:42:58.431597  VB2:vb2_verify_fw_preamble() Verifying preamble.

  413 12:42:58.438472  VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW

  414 12:42:58.441605  VB2:vb2_verify_digest() HW RSA forbidden, using SW

  415 12:42:58.448174  VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW

  416 12:42:58.452568  Phase 4

  417 12:42:58.455672  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  418 12:42:58.462662  VB2:vb2api_init_hash() HW crypto forbidden by TPM flag, using SW

  419 12:42:58.688152  VB2:vb2_verify_digest() HW RSA forbidden, using SW

  420 12:42:58.695277  VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW

  421 12:42:58.698545  Saving vboot hash.

  422 12:42:58.704715  TPM: Extending digest for `VBOOT: boot mode` into PCR 0

  423 12:42:58.720583  tlcl_extend: response is 0

  424 12:42:58.727227  TPM: Digest of `VBOOT: boot mode` to PCR 0 measured

  425 12:42:58.733537  TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1

  426 12:42:58.748335  tlcl_extend: response is 0

  427 12:42:58.755010  TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured

  428 12:42:58.774871  tlcl_lock_nv_write: response is 0

  429 12:42:58.793635  tlcl_lock_nv_write: response is 0

  430 12:42:58.793711  Slot A is selected

  431 12:42:58.800736  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  432 12:42:58.807352  CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes

  433 12:42:58.813816  CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600

  434 12:42:58.820514  BS: verstage times (exec / console): total (unknown) / 246 ms

  435 12:42:58.820573  

  436 12:42:58.820622  

  437 12:42:58.826965  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 romstage starting (log level: 8)...

  438 12:42:58.831176  Google Chrome EC: version:

  439 12:42:58.834500  	ro: volmar_v2.0.14126-e605144e9c

  440 12:42:58.837480  	rw: volmar_v0.0.55-22d1557

  441 12:42:58.840830    running image: 2

  442 12:42:58.844438  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  443 12:42:58.854369  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  444 12:42:58.860899  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  445 12:42:58.867559  CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c

  446 12:42:58.877329  VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  447 12:42:58.887520  VB2:check_ec_hash()            Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  448 12:42:58.895293  EC took 2318us to calculate image hash

  449 12:42:58.902794  VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  450 12:42:58.905362  VB2:sync_ec() select_rw=RW(active)

  451 12:42:58.914852  Waited 269us to clear limit power flag.

  452 12:42:58.922315  pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00

  453 12:42:58.925487  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  454 12:42:58.928808  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  455 12:42:58.935506  gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000

  456 12:42:58.938539  gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000

  457 12:42:58.941583  TCO_STS:   0000 0000

  458 12:42:58.941650  GEN_PMCON: d1001038 00002200

  459 12:42:58.945093  GBLRST_CAUSE: 00000040 00000000

  460 12:42:58.948350  HPR_CAUSE0: 00000000

  461 12:42:58.951625  prev_sleep_state 5

  462 12:42:58.955217  Abort disabling TXT, as CPU is not TXT capable.

  463 12:42:58.962546  cse_lite: Number of partitions = 3

  464 12:42:58.965919  cse_lite: Current partition = RW

  465 12:42:58.965980  cse_lite: Next partition = RW

  466 12:42:58.969258  cse_lite: Flags = 0x7

  467 12:42:58.975963  cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)

  468 12:42:58.985695  cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)

  469 12:42:58.989365  FMAP: area SI_ME found @ 1000 (5238784 bytes)

  470 12:42:58.996037  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  471 12:42:59.002440  cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000

  472 12:42:59.009053  CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8

  473 12:42:59.012607  cse_lite: CSE CBFS RW version : 16.1.25.2049

  474 12:42:59.015997  Boot Count incremented to 3538

  475 12:42:59.022379  CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4

  476 12:42:59.028620  FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)

  477 12:42:59.041979  Probing TPM I2C: done! DID_VID 0x00281ae0

  478 12:42:59.045453  Locality already claimed

  479 12:42:59.048268  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  480 12:42:59.068404  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0

  481 12:42:59.074982  MRC: Hash idx 0x100d comparison successful.

  482 12:42:59.078283  MRC cache found, size f6c8

  483 12:42:59.078365  bootmode is set to: 2

  484 12:42:59.081871  EC returned error result code 3

  485 12:42:59.085336  FW_CONFIG value from CBI is 0x131

  486 12:42:59.091975  fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED

  487 12:42:59.094753  SPD index = 0

  488 12:42:59.101586  CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c

  489 12:42:59.101665  SPD: module type is LPDDR4X

  490 12:42:59.108666  SPD: module part number is K4U6E3S4AB-MGCL

  491 12:42:59.115199  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  492 12:42:59.118650  SPD: device width 16 bits, bus width 16 bits

  493 12:42:59.122073  SPD: module size is 1024 MB (per channel)

  494 12:42:59.192279  CBMEM:

  495 12:42:59.195796  IMD: root @ 0x76fff000 254 entries.

  496 12:42:59.198690  IMD: root @ 0x76ffec00 62 entries.

  497 12:42:59.206724  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  498 12:42:59.209598  RO_VPD is uninitialized or empty.

  499 12:42:59.212819  FMAP: area RW_VPD found @ f29000 (8192 bytes)

  500 12:42:59.219930  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  501 12:42:59.222670  External stage cache:

  502 12:42:59.226188  IMD: root @ 0x7bbff000 254 entries.

  503 12:42:59.229432  IMD: root @ 0x7bbfec00 62 entries.

  504 12:42:59.236413  FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)

  505 12:42:59.242967  MRC: Checking cached data update for 'RW_MRC_CACHE'.

  506 12:42:59.246523  MRC: 'RW_MRC_CACHE' does not need update.

  507 12:42:59.246596  8 DIMMs found

  508 12:42:59.250056  SMM Memory Map

  509 12:42:59.253001  SMRAM       : 0x7b800000 0x800000

  510 12:42:59.256442   Subregion 0: 0x7b800000 0x200000

  511 12:42:59.259598   Subregion 1: 0x7ba00000 0x200000

  512 12:42:59.263134   Subregion 2: 0x7bc00000 0x400000

  513 12:42:59.266217  top_of_ram = 0x77000000

  514 12:42:59.269455  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  515 12:42:59.276328  MTRR Range: Start=7b800000 End=7c000000 (Size 800000)

  516 12:42:59.282716  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  517 12:42:59.286063  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  518 12:42:59.286119  Normal boot

  519 12:42:59.296588  CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948

  520 12:42:59.303125  Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0

  521 12:42:59.309574  Processing 237 relocs. Offset value of 0x74ab9000

  522 12:42:59.317865  BS: romstage times (exec / console): total (unknown) / 377 ms

  523 12:42:59.325440  

  524 12:42:59.325536  

  525 12:42:59.331385  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 postcar starting (log level: 8)...

  526 12:42:59.331453  Normal boot

  527 12:42:59.338732  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  528 12:42:59.344763  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  529 12:42:59.351742  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  530 12:42:59.361680  CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0

  531 12:42:59.409500  Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0

  532 12:42:59.416155  Processing 5931 relocs. Offset value of 0x72a2f000

  533 12:42:59.419350  BS: postcar times (exec / console): total (unknown) / 51 ms

  534 12:42:59.422789  

  535 12:42:59.422851  

  536 12:42:59.429241  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 ramstage starting (log level: 8)...

  537 12:42:59.432729  Reserving BERT start 76a1e000, size 10000

  538 12:42:59.436012  Normal boot

  539 12:42:59.439414  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  540 12:42:59.446103  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  541 12:42:59.456157  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  542 12:42:59.459595  FMAP: area RW_VPD found @ f29000 (8192 bytes)

  543 12:42:59.462878  Google Chrome EC: version:

  544 12:42:59.466265  	ro: volmar_v2.0.14126-e605144e9c

  545 12:42:59.469802  	rw: volmar_v0.0.55-22d1557

  546 12:42:59.469872    running image: 2

  547 12:42:59.473924  ACPI _SWS is PM1 Index 8 GPE Index -1

  548 12:42:59.480867  BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms

  549 12:42:59.484533  EC returned error result code 3

  550 12:42:59.488243  FW_CONFIG value from CBI is 0x131

  551 12:42:59.494536  fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED

  552 12:42:59.497592  PCI: 00:1c.2 disabled by fw_config

  553 12:42:59.500967  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  554 12:42:59.507883  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  555 12:42:59.514577  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  556 12:42:59.517901  fw_config match found: FPMCU_MASK=FPMCU_ENABLED

  557 12:42:59.524218  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  558 12:42:59.530771  CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080

  559 12:42:59.534046  microcode: sig=0x906a4 pf=0x80 revision=0x423

  560 12:42:59.540686  microcode: Update skipped, already up-to-date

  561 12:42:59.547301  CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314

  562 12:42:59.579184  Detected 6 core, 8 thread CPU.

  563 12:42:59.582488  Setting up SMI for CPU

  564 12:42:59.585274  IED base = 0x7bc00000

  565 12:42:59.589039  IED size = 0x00400000

  566 12:42:59.589102  Will perform SMM setup.

  567 12:42:59.595448  CPU: 12th Gen Intel(R) Core(TM) i3-1215U.

  568 12:42:59.595509  LAPIC 0x0 in XAPIC mode.

  569 12:42:59.605390  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178

  570 12:42:59.609002  Processing 18 relocs. Offset value of 0x00030000

  571 12:42:59.613419  Attempting to start 7 APs

  572 12:42:59.617043  Waiting for 10ms after sending INIT.

  573 12:42:59.629696  Waiting for SIPI to complete...

  574 12:42:59.632994  done.

  575 12:42:59.633054  LAPIC 0x16 in XAPIC mode.

  576 12:42:59.636604  LAPIC 0x14 in XAPIC mode.

  577 12:42:59.639715  LAPIC 0x1 in XAPIC mode.

  578 12:42:59.643094  LAPIC 0x10 in XAPIC mode.

  579 12:42:59.646360  Waiting for SIPI to complete...

  580 12:42:59.646419  done.

  581 12:42:59.649691  AP: slot 2 apic_id 10, MCU rev: 0x00000423

  582 12:42:59.653011  LAPIC 0x12 in XAPIC mode.

  583 12:42:59.656366  AP: slot 4 apic_id 14, MCU rev: 0x00000423

  584 12:42:59.663115  AP: slot 5 apic_id 1, MCU rev: 0x00000423

  585 12:42:59.666474  AP: slot 1 apic_id 16, MCU rev: 0x00000423

  586 12:42:59.669786  AP: slot 3 apic_id 12, MCU rev: 0x00000423

  587 12:42:59.673105  LAPIC 0x9 in XAPIC mode.

  588 12:42:59.676555  LAPIC 0x8 in XAPIC mode.

  589 12:42:59.679850  AP: slot 6 apic_id 9, MCU rev: 0x00000423

  590 12:42:59.682773  AP: slot 7 apic_id 8, MCU rev: 0x00000423

  591 12:42:59.686520  smm_setup_relocation_handler: enter

  592 12:42:59.689820  smm_setup_relocation_handler: exit

  593 12:42:59.699543  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208

  594 12:42:59.703087  Processing 11 relocs. Offset value of 0x00038000

  595 12:42:59.709622  smm_module_setup_stub: stack_top = 0x7b804000

  596 12:42:59.712904  smm_module_setup_stub: per cpu stack_size = 0x800

  597 12:42:59.719253  smm_module_setup_stub: runtime.start32_offset = 0x4c

  598 12:42:59.722799  smm_module_setup_stub: runtime.smm_size = 0x10000

  599 12:42:59.729431  SMM Module: stub loaded at 38000. Will call 0x76a52094

  600 12:42:59.733090  Installing permanent SMM handler to 0x7b800000

  601 12:42:59.739069  smm_load_module: total_smm_space_needed e468, available -> 200000

  602 12:42:59.749594  Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468

  603 12:42:59.753070  Processing 255 relocs. Offset value of 0x7b9f6000

  604 12:42:59.759101  smm_load_module: smram_start: 0x7b800000

  605 12:42:59.762450  smm_load_module: smram_end: 7ba00000

  606 12:42:59.765681  smm_load_module: handler start 0x7b9f6d5f

  607 12:42:59.769244  smm_load_module: handler_size 98d0

  608 12:42:59.772336  smm_load_module: fxsave_area 0x7b9ff000

  609 12:42:59.775802  smm_load_module: fxsave_size 1000

  610 12:42:59.779121  smm_load_module: CONFIG_MSEG_SIZE 0x0

  611 12:42:59.785788  smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0

  612 12:42:59.792719  smm_load_module: handler_mod_params.smbase = 0x7b800000

  613 12:42:59.795652  smm_load_module: per_cpu_save_state_size = 0x400

  614 12:42:59.799441  smm_load_module: num_cpus = 0x8

  615 12:42:59.806016  smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000

  616 12:42:59.809378  smm_load_module: total_save_state_size = 0x2000

  617 12:42:59.812520  smm_load_module: cpu0 entry: 7b9e6000

  618 12:42:59.819197  smm_create_map: cpus allowed in one segment 30

  619 12:42:59.822388  smm_create_map: min # of segments needed 1

  620 12:42:59.822457  CPU 0x0

  621 12:42:59.829209      smbase 7b9e6000  entry 7b9ee000

  622 12:42:59.832463             ss_start 7b9f5c00  code_end 7b9ee208

  623 12:42:59.832531  CPU 0x1

  624 12:42:59.835623      smbase 7b9e5c00  entry 7b9edc00

  625 12:42:59.842615             ss_start 7b9f5800  code_end 7b9ede08

  626 12:42:59.842682  CPU 0x2

  627 12:42:59.845582      smbase 7b9e5800  entry 7b9ed800

  628 12:42:59.852328             ss_start 7b9f5400  code_end 7b9eda08

  629 12:42:59.852386  CPU 0x3

  630 12:42:59.855264      smbase 7b9e5400  entry 7b9ed400

  631 12:42:59.859098             ss_start 7b9f5000  code_end 7b9ed608

  632 12:42:59.862841  CPU 0x4

  633 12:42:59.865344      smbase 7b9e5000  entry 7b9ed000

  634 12:42:59.868687             ss_start 7b9f4c00  code_end 7b9ed208

  635 12:42:59.868749  CPU 0x5

  636 12:42:59.875778      smbase 7b9e4c00  entry 7b9ecc00

  637 12:42:59.879217             ss_start 7b9f4800  code_end 7b9ece08

  638 12:42:59.879301  CPU 0x6

  639 12:42:59.882351      smbase 7b9e4800  entry 7b9ec800

  640 12:42:59.888532             ss_start 7b9f4400  code_end 7b9eca08

  641 12:42:59.888593  CPU 0x7

  642 12:42:59.892100      smbase 7b9e4400  entry 7b9ec400

  643 12:42:59.898739             ss_start 7b9f4000  code_end 7b9ec608

  644 12:42:59.905419  Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208

  645 12:42:59.908665  Processing 11 relocs. Offset value of 0x7b9ee000

  646 12:42:59.915426  smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000

  647 12:42:59.922094  SMM Module: placing smm entry code at 7b9edc00,  cpu # 0x1

  648 12:42:59.928535  smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes

  649 12:42:59.935046  SMM Module: placing smm entry code at 7b9ed800,  cpu # 0x2

  650 12:42:59.941687  smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes

  651 12:42:59.948567  SMM Module: placing smm entry code at 7b9ed400,  cpu # 0x3

  652 12:42:59.955031  smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes

  653 12:42:59.958127  SMM Module: placing smm entry code at 7b9ed000,  cpu # 0x4

  654 12:42:59.964963  smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes

  655 12:42:59.971479  SMM Module: placing smm entry code at 7b9ecc00,  cpu # 0x5

  656 12:42:59.978135  smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes

  657 12:42:59.984723  SMM Module: placing smm entry code at 7b9ec800,  cpu # 0x6

  658 12:42:59.991415  smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes

  659 12:42:59.998127  SMM Module: placing smm entry code at 7b9ec400,  cpu # 0x7

  660 12:43:00.004722  smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes

  661 12:43:00.008168  smm_module_setup_stub: stack_top = 0x7b804000

  662 12:43:00.014680  smm_module_setup_stub: per cpu stack_size = 0x800

  663 12:43:00.017944  smm_module_setup_stub: runtime.start32_offset = 0x4c

  664 12:43:00.024683  smm_module_setup_stub: runtime.smm_size = 0x200000

  665 12:43:00.031290  SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f

  666 12:43:00.034885  Clearing SMI status registers

  667 12:43:00.037692  SMI_STS: PM1 

  668 12:43:00.037749  PM1_STS: WAK PWRBTN 

  669 12:43:00.044790  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0

  670 12:43:00.047991  In relocation handler: CPU 0

  671 12:43:00.051254  New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000

  672 12:43:00.057907  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  673 12:43:00.061291  Relocation complete.

  674 12:43:00.067642  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5

  675 12:43:00.071360  In relocation handler: CPU 5

  676 12:43:00.074939  New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000

  677 12:43:00.077636  Relocation complete.

  678 12:43:00.084163  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2

  679 12:43:00.088053  In relocation handler: CPU 2

  680 12:43:00.090812  New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000

  681 12:43:00.094227  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  682 12:43:00.097611  Relocation complete.

  683 12:43:00.104305  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4

  684 12:43:00.107446  In relocation handler: CPU 4

  685 12:43:00.110851  New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000

  686 12:43:00.117815  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  687 12:43:00.117872  Relocation complete.

  688 12:43:00.124296  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3

  689 12:43:00.127773  In relocation handler: CPU 3

  690 12:43:00.134286  New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000

  691 12:43:00.137703  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  692 12:43:00.141047  Relocation complete.

  693 12:43:00.147715  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1

  694 12:43:00.150974  In relocation handler: CPU 1

  695 12:43:00.154104  New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000

  696 12:43:00.157534  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  697 12:43:00.160863  Relocation complete.

  698 12:43:00.167328  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6

  699 12:43:00.170732  In relocation handler: CPU 6

  700 12:43:00.174051  New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000

  701 12:43:00.177422  Relocation complete.

  702 12:43:00.183881  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7

  703 12:43:00.187499  In relocation handler: CPU 7

  704 12:43:00.190739  New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000

  705 12:43:00.197355  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  706 12:43:00.197431  Relocation complete.

  707 12:43:00.200870  Initializing CPU #0

  708 12:43:00.203844  CPU: vendor Intel device 906a4

  709 12:43:00.207206  CPU: family 06, model 9a, stepping 04

  710 12:43:00.210549  Clearing out pending MCEs

  711 12:43:00.213874  cpu: energy policy set to 7

  712 12:43:00.217187  Turbo is available but hidden

  713 12:43:00.220601  Turbo is available and visible

  714 12:43:00.223743  microcode: Update skipped, already up-to-date

  715 12:43:00.227201  CPU #0 initialized

  716 12:43:00.227286  Initializing CPU #5

  717 12:43:00.230410  Initializing CPU #4

  718 12:43:00.233708  Initializing CPU #3

  719 12:43:00.233783  CPU: vendor Intel device 906a4

  720 12:43:00.240352  CPU: family 06, model 9a, stepping 04

  721 12:43:00.240443  Initializing CPU #1

  722 12:43:00.243784  CPU: vendor Intel device 906a4

  723 12:43:00.247187  CPU: family 06, model 9a, stepping 04

  724 12:43:00.250077  CPU: vendor Intel device 906a4

  725 12:43:00.253493  CPU: family 06, model 9a, stepping 04

  726 12:43:00.256848  Clearing out pending MCEs

  727 12:43:00.260659  Clearing out pending MCEs

  728 12:43:00.263899  Initializing CPU #2

  729 12:43:00.263977  Clearing out pending MCEs

  730 12:43:00.266956  cpu: energy policy set to 7

  731 12:43:00.270012  CPU: vendor Intel device 906a4

  732 12:43:00.273518  CPU: family 06, model 9a, stepping 04

  733 12:43:00.279997  microcode: Update skipped, already up-to-date

  734 12:43:00.280088  CPU #4 initialized

  735 12:43:00.283221  cpu: energy policy set to 7

  736 12:43:00.286624  CPU: vendor Intel device 906a4

  737 12:43:00.289930  CPU: family 06, model 9a, stepping 04

  738 12:43:00.296881  microcode: Update skipped, already up-to-date

  739 12:43:00.296957  CPU #3 initialized

  740 12:43:00.300018  Clearing out pending MCEs

  741 12:43:00.303598  Clearing out pending MCEs

  742 12:43:00.306548  cpu: energy policy set to 7

  743 12:43:00.310169  cpu: energy policy set to 7

  744 12:43:00.313811  microcode: Update skipped, already up-to-date

  745 12:43:00.316637  CPU #1 initialized

  746 12:43:00.320025  microcode: Update skipped, already up-to-date

  747 12:43:00.320101  CPU #2 initialized

  748 12:43:00.323381  Initializing CPU #6

  749 12:43:00.326686  Initializing CPU #7

  750 12:43:00.330011  CPU: vendor Intel device 906a4

  751 12:43:00.333264  CPU: family 06, model 9a, stepping 04

  752 12:43:00.336654  CPU: vendor Intel device 906a4

  753 12:43:00.340037  CPU: family 06, model 9a, stepping 04

  754 12:43:00.343594  Clearing out pending MCEs

  755 12:43:00.343674  Clearing out pending MCEs

  756 12:43:00.346187  cpu: energy policy set to 7

  757 12:43:00.349734  cpu: energy policy set to 7

  758 12:43:00.356298  microcode: Update skipped, already up-to-date

  759 12:43:00.356366  CPU #6 initialized

  760 12:43:00.359627  cpu: energy policy set to 7

  761 12:43:00.362948  microcode: Update skipped, already up-to-date

  762 12:43:00.366226  CPU #5 initialized

  763 12:43:00.369423  microcode: Update skipped, already up-to-date

  764 12:43:00.372976  CPU #7 initialized

  765 12:43:00.376682  bsp_do_flight_plan done after 726 msecs.

  766 12:43:00.379971  CPU: frequency set to 4400 MHz

  767 12:43:00.383098  Enabling SMIs.

  768 12:43:00.389667  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms

  769 12:43:00.404500  Probing TPM I2C: done! DID_VID 0x00281ae0

  770 12:43:00.407532  Locality already claimed

  771 12:43:00.410673  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  772 12:43:00.422370  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  773 12:43:00.425662  Enabling GPIO PM b/c CR50 has long IRQ pulse support

  774 12:43:00.432623  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  775 12:43:00.439282  CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8

  776 12:43:00.442761  Found a VBT of 9216 bytes after decompression

  777 12:43:00.445871  PCI  1.0, PIN A, using IRQ #16

  778 12:43:00.449176  PCI  2.0, PIN A, using IRQ #17

  779 12:43:00.452436  PCI  4.0, PIN A, using IRQ #18

  780 12:43:00.455732  PCI  5.0, PIN A, using IRQ #16

  781 12:43:00.459200  PCI  6.0, PIN A, using IRQ #16

  782 12:43:00.462569  PCI  6.2, PIN C, using IRQ #18

  783 12:43:00.465716  PCI  7.0, PIN A, using IRQ #19

  784 12:43:00.468571  PCI  7.1, PIN B, using IRQ #20

  785 12:43:00.472328  PCI  7.2, PIN C, using IRQ #21

  786 12:43:00.475352  PCI  7.3, PIN D, using IRQ #22

  787 12:43:00.478488  PCI  8.0, PIN A, using IRQ #23

  788 12:43:00.482004  PCI  D.0, PIN A, using IRQ #17

  789 12:43:00.485110  PCI  D.1, PIN B, using IRQ #19

  790 12:43:00.485176  PCI 10.0, PIN A, using IRQ #24

  791 12:43:00.488834  PCI 10.1, PIN B, using IRQ #25

  792 12:43:00.492082  PCI 10.6, PIN C, using IRQ #20

  793 12:43:00.495394  PCI 10.7, PIN D, using IRQ #21

  794 12:43:00.498542  PCI 11.0, PIN A, using IRQ #26

  795 12:43:00.502032  PCI 11.1, PIN B, using IRQ #27

  796 12:43:00.505287  PCI 11.2, PIN C, using IRQ #28

  797 12:43:00.508563  PCI 11.3, PIN D, using IRQ #29

  798 12:43:00.511806  PCI 12.0, PIN A, using IRQ #30

  799 12:43:00.515454  PCI 12.6, PIN B, using IRQ #31

  800 12:43:00.518244  PCI 12.7, PIN C, using IRQ #22

  801 12:43:00.521759  PCI 13.0, PIN A, using IRQ #32

  802 12:43:00.525451  PCI 13.1, PIN B, using IRQ #33

  803 12:43:00.528605  PCI 13.2, PIN C, using IRQ #34

  804 12:43:00.531927  PCI 13.3, PIN D, using IRQ #35

  805 12:43:00.535068  PCI 14.0, PIN B, using IRQ #23

  806 12:43:00.538263  PCI 14.1, PIN A, using IRQ #36

  807 12:43:00.541813  PCI 14.3, PIN C, using IRQ #17

  808 12:43:00.541878  PCI 15.0, PIN A, using IRQ #37

  809 12:43:00.544887  PCI 15.1, PIN B, using IRQ #38

  810 12:43:00.548912  PCI 15.2, PIN C, using IRQ #39

  811 12:43:00.551397  PCI 15.3, PIN D, using IRQ #40

  812 12:43:00.555269  PCI 16.0, PIN A, using IRQ #18

  813 12:43:00.558495  PCI 16.1, PIN B, using IRQ #19

  814 12:43:00.561899  PCI 16.2, PIN C, using IRQ #20

  815 12:43:00.565181  PCI 16.3, PIN D, using IRQ #21

  816 12:43:00.568551  PCI 16.4, PIN A, using IRQ #18

  817 12:43:00.571911  PCI 16.5, PIN B, using IRQ #19

  818 12:43:00.574699  PCI 17.0, PIN A, using IRQ #22

  819 12:43:00.577973  PCI 19.0, PIN A, using IRQ #41

  820 12:43:00.581603  PCI 19.1, PIN B, using IRQ #42

  821 12:43:00.584677  PCI 19.2, PIN C, using IRQ #43

  822 12:43:00.588119  PCI 1C.0, PIN A, using IRQ #16

  823 12:43:00.591559  PCI 1C.1, PIN B, using IRQ #17

  824 12:43:00.594557  PCI 1C.2, PIN C, using IRQ #18

  825 12:43:00.594616  PCI 1C.3, PIN D, using IRQ #19

  826 12:43:00.598319  PCI 1C.4, PIN A, using IRQ #16

  827 12:43:00.601128  PCI 1C.5, PIN B, using IRQ #17

  828 12:43:00.604484  PCI 1C.6, PIN C, using IRQ #18

  829 12:43:00.608138  PCI 1C.7, PIN D, using IRQ #19

  830 12:43:00.611619  PCI 1D.0, PIN A, using IRQ #16

  831 12:43:00.614870  PCI 1D.1, PIN B, using IRQ #17

  832 12:43:00.618245  PCI 1D.2, PIN C, using IRQ #18

  833 12:43:00.621700  PCI 1D.3, PIN D, using IRQ #19

  834 12:43:00.624393  PCI 1E.0, PIN A, using IRQ #23

  835 12:43:00.628249  PCI 1E.1, PIN B, using IRQ #20

  836 12:43:00.631472  PCI 1E.2, PIN C, using IRQ #44

  837 12:43:00.634741  PCI 1E.3, PIN D, using IRQ #45

  838 12:43:00.638254  PCI 1F.3, PIN B, using IRQ #22

  839 12:43:00.641081  PCI 1F.4, PIN C, using IRQ #23

  840 12:43:00.644578  PCI 1F.6, PIN D, using IRQ #20

  841 12:43:00.648134  PCI 1F.7, PIN A, using IRQ #21

  842 12:43:00.651308  IRQ: Using dynamically assigned PCI IO-APIC IRQs

  843 12:43:00.657911  WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called

  844 12:43:00.842027  FSPS returned 0

  845 12:43:00.845072  Executing Phase 1 of FspMultiPhaseSiInit

  846 12:43:00.854958  FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  847 12:43:00.858360  port C0 DISC req: usage 1 usb3 1 usb2 1

  848 12:43:00.861666  Raw Buffer output 0 00000111

  849 12:43:00.864851  Raw Buffer output 1 00000000

  850 12:43:00.868527  pmc_send_ipc_cmd succeeded

  851 12:43:00.875214  port C1 DISC req: usage 1 usb3 3 usb2 3

  852 12:43:00.875274  Raw Buffer output 0 00000331

  853 12:43:00.878316  Raw Buffer output 1 00000000

  854 12:43:00.883002  pmc_send_ipc_cmd succeeded

  855 12:43:00.886523  Detected 6 core, 8 thread CPU.

  856 12:43:00.889957  Detected 6 core, 8 thread CPU.

  857 12:43:00.894719  Detected 6 core, 8 thread CPU.

  858 12:43:00.898092  Detected 6 core, 8 thread CPU.

  859 12:43:00.901395  Detected 6 core, 8 thread CPU.

  860 12:43:00.904840  Detected 6 core, 8 thread CPU.

  861 12:43:00.908043  Detected 6 core, 8 thread CPU.

  862 12:43:00.911744  Detected 6 core, 8 thread CPU.

  863 12:43:00.914996  Detected 6 core, 8 thread CPU.

  864 12:43:00.918321  Detected 6 core, 8 thread CPU.

  865 12:43:00.921485  Detected 6 core, 8 thread CPU.

  866 12:43:00.924746  Detected 6 core, 8 thread CPU.

  867 12:43:00.928028  Detected 6 core, 8 thread CPU.

  868 12:43:00.931722  Detected 6 core, 8 thread CPU.

  869 12:43:00.934779  Detected 6 core, 8 thread CPU.

  870 12:43:00.937962  Detected 6 core, 8 thread CPU.

  871 12:43:00.941142  Detected 6 core, 8 thread CPU.

  872 12:43:00.944952  Detected 6 core, 8 thread CPU.

  873 12:43:00.948278  Detected 6 core, 8 thread CPU.

  874 12:43:00.951640  Detected 6 core, 8 thread CPU.

  875 12:43:00.955131  Detected 6 core, 8 thread CPU.

  876 12:43:00.958343  Detected 6 core, 8 thread CPU.

  877 12:43:01.248360  Detected 6 core, 8 thread CPU.

  878 12:43:01.251706  Detected 6 core, 8 thread CPU.

  879 12:43:01.254890  Detected 6 core, 8 thread CPU.

  880 12:43:01.258494  Detected 6 core, 8 thread CPU.

  881 12:43:01.262159  Detected 6 core, 8 thread CPU.

  882 12:43:01.265236  Detected 6 core, 8 thread CPU.

  883 12:43:01.268496  Detected 6 core, 8 thread CPU.

  884 12:43:01.271882  Detected 6 core, 8 thread CPU.

  885 12:43:01.275350  Detected 6 core, 8 thread CPU.

  886 12:43:01.278662  Detected 6 core, 8 thread CPU.

  887 12:43:01.281791  Detected 6 core, 8 thread CPU.

  888 12:43:01.284689  Detected 6 core, 8 thread CPU.

  889 12:43:01.288058  Detected 6 core, 8 thread CPU.

  890 12:43:01.291766  Detected 6 core, 8 thread CPU.

  891 12:43:01.294950  Detected 6 core, 8 thread CPU.

  892 12:43:01.298358  Detected 6 core, 8 thread CPU.

  893 12:43:01.301765  Detected 6 core, 8 thread CPU.

  894 12:43:01.305100  Detected 6 core, 8 thread CPU.

  895 12:43:01.307766  Detected 6 core, 8 thread CPU.

  896 12:43:01.311109  Detected 6 core, 8 thread CPU.

  897 12:43:01.314440  Display FSP Version Info HOB

  898 12:43:01.318054  Reference Code - CPU = c.0.65.70

  899 12:43:01.318122  uCode Version = 0.0.4.23

  900 12:43:01.321619  TXT ACM version = ff.ff.ff.ffff

  901 12:43:01.324948  Reference Code - ME = c.0.65.70

  902 12:43:01.328182  MEBx version = 0.0.0.0

  903 12:43:01.331461  ME Firmware Version = Lite SKU

  904 12:43:01.334843  Reference Code - PCH = c.0.65.70

  905 12:43:01.338542  PCH-CRID Status = Disabled

  906 12:43:01.341162  PCH-CRID Original Value = ff.ff.ff.ffff

  907 12:43:01.344887  PCH-CRID New Value = ff.ff.ff.ffff

  908 12:43:01.347919  OPROM - RST - RAID = ff.ff.ff.ffff

  909 12:43:01.351104  PCH Hsio Version = 4.0.0.0

  910 12:43:01.354834  Reference Code - SA - System Agent = c.0.65.70

  911 12:43:01.357958  Reference Code - MRC = 0.0.3.80

  912 12:43:01.361320  SA - PCIe Version = c.0.65.70

  913 12:43:01.364800  SA-CRID Status = Disabled

  914 12:43:01.367628  SA-CRID Original Value = 0.0.0.4

  915 12:43:01.371220  SA-CRID New Value = 0.0.0.4

  916 12:43:01.374564  OPROM - VBIOS = ff.ff.ff.ffff

  917 12:43:01.377834  IO Manageability Engine FW Version = 24.0.4.0

  918 12:43:01.381306  PHY Build Version = 0.0.0.2016

  919 12:43:01.384625  Thunderbolt(TM) FW Version = 0.0.0.0

  920 12:43:01.391160  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  921 12:43:01.398080  BS: BS_DEV_INIT_CHIPS run times (exec / console): 495 / 507 ms

  922 12:43:01.401308  Enumerating buses...

  923 12:43:01.404892  Show all devs... Before device enumeration.

  924 12:43:01.408082  Root Device: enabled 1

  925 12:43:01.408152  CPU_CLUSTER: 0: enabled 1

  926 12:43:01.411473  DOMAIN: 0000: enabled 1

  927 12:43:01.414706  GPIO: 0: enabled 1

  928 12:43:01.418202  PCI: 00:00.0: enabled 1

  929 12:43:01.418262  PCI: 00:01.0: enabled 0

  930 12:43:01.421548  PCI: 00:01.1: enabled 0

  931 12:43:01.424783  PCI: 00:02.0: enabled 1

  932 12:43:01.424840  PCI: 00:04.0: enabled 1

  933 12:43:01.427659  PCI: 00:05.0: enabled 0

  934 12:43:01.431097  PCI: 00:06.0: enabled 1

  935 12:43:01.434429  PCI: 00:06.2: enabled 0

  936 12:43:01.434493  PCI: 00:07.0: enabled 0

  937 12:43:01.437703  PCI: 00:07.1: enabled 0

  938 12:43:01.440988  PCI: 00:07.2: enabled 0

  939 12:43:01.444336  PCI: 00:07.3: enabled 0

  940 12:43:01.444393  PCI: 00:08.0: enabled 0

  941 12:43:01.448124  PCI: 00:09.0: enabled 0

  942 12:43:01.451459  PCI: 00:0a.0: enabled 1

  943 12:43:01.454527  PCI: 00:0d.0: enabled 1

  944 12:43:01.454649  PCI: 00:0d.1: enabled 0

  945 12:43:01.457866  PCI: 00:0d.2: enabled 0

  946 12:43:01.461578  PCI: 00:0d.3: enabled 0

  947 12:43:01.462037  PCI: 00:0e.0: enabled 0

  948 12:43:01.464720  PCI: 00:10.0: enabled 0

  949 12:43:01.467902  PCI: 00:10.1: enabled 0

  950 12:43:01.471428  PCI: 00:10.6: enabled 0

  951 12:43:01.471867  PCI: 00:10.7: enabled 0

  952 12:43:01.474728  PCI: 00:12.0: enabled 0

  953 12:43:01.478151  PCI: 00:12.6: enabled 0

  954 12:43:01.481127  PCI: 00:12.7: enabled 0

  955 12:43:01.481576  PCI: 00:13.0: enabled 0

  956 12:43:01.484561  PCI: 00:14.0: enabled 1

  957 12:43:01.487825  PCI: 00:14.1: enabled 0

  958 12:43:01.491711  PCI: 00:14.2: enabled 1

  959 12:43:01.492214  PCI: 00:14.3: enabled 1

  960 12:43:01.494958  PCI: 00:15.0: enabled 1

  961 12:43:01.498121  PCI: 00:15.1: enabled 1

  962 12:43:01.500913  PCI: 00:15.2: enabled 0

  963 12:43:01.501334  PCI: 00:15.3: enabled 1

  964 12:43:01.504865  PCI: 00:16.0: enabled 1

  965 12:43:01.507925  PCI: 00:16.1: enabled 0

  966 12:43:01.507997  PCI: 00:16.2: enabled 0

  967 12:43:01.511164  PCI: 00:16.3: enabled 0

  968 12:43:01.514741  PCI: 00:16.4: enabled 0

  969 12:43:01.517988  PCI: 00:16.5: enabled 0

  970 12:43:01.518045  PCI: 00:17.0: enabled 1

  971 12:43:01.521093  PCI: 00:19.0: enabled 0

  972 12:43:01.524427  PCI: 00:19.1: enabled 1

  973 12:43:01.528044  PCI: 00:19.2: enabled 0

  974 12:43:01.528106  PCI: 00:1a.0: enabled 0

  975 12:43:01.530757  PCI: 00:1c.0: enabled 0

  976 12:43:01.534570  PCI: 00:1c.1: enabled 0

  977 12:43:01.534625  PCI: 00:1c.2: enabled 0

  978 12:43:01.537649  PCI: 00:1c.3: enabled 0

  979 12:43:01.541163  PCI: 00:1c.4: enabled 0

  980 12:43:01.544548  PCI: 00:1c.5: enabled 0

  981 12:43:01.544623  PCI: 00:1c.6: enabled 0

  982 12:43:01.547409  PCI: 00:1c.7: enabled 0

  983 12:43:01.551043  PCI: 00:1d.0: enabled 0

  984 12:43:01.554788  PCI: 00:1d.1: enabled 0

  985 12:43:01.554864  PCI: 00:1d.2: enabled 0

  986 12:43:01.557800  PCI: 00:1d.3: enabled 0

  987 12:43:01.561109  PCI: 00:1e.0: enabled 1

  988 12:43:01.564617  PCI: 00:1e.1: enabled 0

  989 12:43:01.564693  PCI: 00:1e.2: enabled 0

  990 12:43:01.567783  PCI: 00:1e.3: enabled 1

  991 12:43:01.571283  PCI: 00:1f.0: enabled 1

  992 12:43:01.574970  PCI: 00:1f.1: enabled 0

  993 12:43:01.575047  PCI: 00:1f.2: enabled 1

  994 12:43:01.577347  PCI: 00:1f.3: enabled 1

  995 12:43:01.580645  PCI: 00:1f.4: enabled 0

  996 12:43:01.580722  PCI: 00:1f.5: enabled 1

  997 12:43:01.584400  PCI: 00:1f.6: enabled 0

  998 12:43:01.587535  PCI: 00:1f.7: enabled 0

  999 12:43:01.590946  GENERIC: 0.0: enabled 1

 1000 12:43:01.591022  GENERIC: 0.0: enabled 1

 1001 12:43:01.594338  GENERIC: 1.0: enabled 1

 1002 12:43:01.597616  GENERIC: 0.0: enabled 1

 1003 12:43:01.600892  GENERIC: 1.0: enabled 1

 1004 12:43:01.600967  USB0 port 0: enabled 1

 1005 12:43:01.604462  USB0 port 0: enabled 1

 1006 12:43:01.607967  GENERIC: 0.0: enabled 1

 1007 12:43:01.608042  I2C: 00:1a: enabled 1

 1008 12:43:01.610824  I2C: 00:31: enabled 1

 1009 12:43:01.613956  I2C: 00:32: enabled 1

 1010 12:43:01.614033  I2C: 00:50: enabled 1

 1011 12:43:01.617238  I2C: 00:10: enabled 1

 1012 12:43:01.620623  I2C: 00:15: enabled 1

 1013 12:43:01.620698  I2C: 00:2c: enabled 1

 1014 12:43:01.623975  GENERIC: 0.0: enabled 1

 1015 12:43:01.627259  SPI: 00: enabled 1

 1016 12:43:01.630676  PNP: 0c09.0: enabled 1

 1017 12:43:01.630751  GENERIC: 0.0: enabled 1

 1018 12:43:01.634060  USB3 port 0: enabled 1

 1019 12:43:01.637359  USB3 port 1: enabled 0

 1020 12:43:01.637434  USB3 port 2: enabled 1

 1021 12:43:01.640497  USB3 port 3: enabled 0

 1022 12:43:01.643833  USB2 port 0: enabled 1

 1023 12:43:01.643923  USB2 port 1: enabled 0

 1024 12:43:01.647176  USB2 port 2: enabled 1

 1025 12:43:01.650717  USB2 port 3: enabled 0

 1026 12:43:01.654182  USB2 port 4: enabled 0

 1027 12:43:01.654257  USB2 port 5: enabled 1

 1028 12:43:01.657007  USB2 port 6: enabled 0

 1029 12:43:01.660705  USB2 port 7: enabled 0

 1030 12:43:01.660778  USB2 port 8: enabled 1

 1031 12:43:01.664076  USB2 port 9: enabled 1

 1032 12:43:01.667448  USB3 port 0: enabled 1

 1033 12:43:01.670752  USB3 port 1: enabled 0

 1034 12:43:01.670826  USB3 port 2: enabled 0

 1035 12:43:01.674091  USB3 port 3: enabled 0

 1036 12:43:01.677431  GENERIC: 0.0: enabled 1

 1037 12:43:01.677506  GENERIC: 1.0: enabled 1

 1038 12:43:01.680635  APIC: 00: enabled 1

 1039 12:43:01.683877  APIC: 16: enabled 1

 1040 12:43:01.683962  APIC: 10: enabled 1

 1041 12:43:01.687291  APIC: 12: enabled 1

 1042 12:43:01.690648  APIC: 14: enabled 1

 1043 12:43:01.690721  APIC: 01: enabled 1

 1044 12:43:01.693846  APIC: 09: enabled 1

 1045 12:43:01.693918  APIC: 08: enabled 1

 1046 12:43:01.697170  Compare with tree...

 1047 12:43:01.700738  Root Device: enabled 1

 1048 12:43:01.703882   CPU_CLUSTER: 0: enabled 1

 1049 12:43:01.703956    APIC: 00: enabled 1

 1050 12:43:01.707228    APIC: 16: enabled 1

 1051 12:43:01.710583    APIC: 10: enabled 1

 1052 12:43:01.710657    APIC: 12: enabled 1

 1053 12:43:01.713734    APIC: 14: enabled 1

 1054 12:43:01.716833    APIC: 01: enabled 1

 1055 12:43:01.716907    APIC: 09: enabled 1

 1056 12:43:01.720263    APIC: 08: enabled 1

 1057 12:43:01.723788   DOMAIN: 0000: enabled 1

 1058 12:43:01.723862    GPIO: 0: enabled 1

 1059 12:43:01.726938    PCI: 00:00.0: enabled 1

 1060 12:43:01.730714    PCI: 00:01.0: enabled 0

 1061 12:43:01.733642    PCI: 00:01.1: enabled 0

 1062 12:43:01.736936    PCI: 00:02.0: enabled 1

 1063 12:43:01.737010    PCI: 00:04.0: enabled 1

 1064 12:43:01.740164     GENERIC: 0.0: enabled 1

 1065 12:43:01.743683    PCI: 00:05.0: enabled 0

 1066 12:43:01.747050    PCI: 00:06.0: enabled 1

 1067 12:43:01.750446    PCI: 00:06.2: enabled 0

 1068 12:43:01.750520    PCI: 00:08.0: enabled 0

 1069 12:43:01.753693    PCI: 00:09.0: enabled 0

 1070 12:43:01.756855    PCI: 00:0a.0: enabled 1

 1071 12:43:01.760152    PCI: 00:0d.0: enabled 1

 1072 12:43:01.763444     USB0 port 0: enabled 1

 1073 12:43:01.763518      USB3 port 0: enabled 1

 1074 12:43:01.766802      USB3 port 1: enabled 0

 1075 12:43:01.770667      USB3 port 2: enabled 1

 1076 12:43:01.773559      USB3 port 3: enabled 0

 1077 12:43:01.777158    PCI: 00:0d.1: enabled 0

 1078 12:43:01.777240    PCI: 00:0d.2: enabled 0

 1079 12:43:01.780250    PCI: 00:0d.3: enabled 0

 1080 12:43:01.783466    PCI: 00:0e.0: enabled 0

 1081 12:43:01.786591    PCI: 00:10.0: enabled 0

 1082 12:43:01.790117    PCI: 00:10.1: enabled 0

 1083 12:43:01.790191    PCI: 00:10.6: enabled 0

 1084 12:43:01.793437    PCI: 00:10.7: enabled 0

 1085 12:43:01.796832    PCI: 00:12.0: enabled 0

 1086 12:43:01.800437    PCI: 00:12.6: enabled 0

 1087 12:43:01.803333    PCI: 00:12.7: enabled 0

 1088 12:43:01.803407    PCI: 00:13.0: enabled 0

 1089 12:43:01.806977    PCI: 00:14.0: enabled 1

 1090 12:43:01.810212     USB0 port 0: enabled 1

 1091 12:43:01.813502      USB2 port 0: enabled 1

 1092 12:43:01.816835      USB2 port 1: enabled 0

 1093 12:43:01.816892      USB2 port 2: enabled 1

 1094 12:43:01.820291      USB2 port 3: enabled 0

 1095 12:43:01.823591      USB2 port 4: enabled 0

 1096 12:43:01.826807      USB2 port 5: enabled 1

 1097 12:43:01.829844      USB2 port 6: enabled 0

 1098 12:43:01.833392      USB2 port 7: enabled 0

 1099 12:43:01.833466      USB2 port 8: enabled 1

 1100 12:43:01.836945      USB2 port 9: enabled 1

 1101 12:43:01.840068      USB3 port 0: enabled 1

 1102 12:43:01.843877      USB3 port 1: enabled 0

 1103 12:43:01.846572      USB3 port 2: enabled 0

 1104 12:43:01.846646      USB3 port 3: enabled 0

 1105 12:43:01.849976    PCI: 00:14.1: enabled 0

 1106 12:43:01.853400    PCI: 00:14.2: enabled 1

 1107 12:43:01.856615    PCI: 00:14.3: enabled 1

 1108 12:43:01.860055     GENERIC: 0.0: enabled 1

 1109 12:43:01.860129    PCI: 00:15.0: enabled 1

 1110 12:43:01.863366     I2C: 00:1a: enabled 1

 1111 12:43:01.866542     I2C: 00:31: enabled 1

 1112 12:43:01.869757     I2C: 00:32: enabled 1

 1113 12:43:01.873098    PCI: 00:15.1: enabled 1

 1114 12:43:01.873182     I2C: 00:50: enabled 1

 1115 12:43:01.876440    PCI: 00:15.2: enabled 0

 1116 12:43:01.880028    PCI: 00:15.3: enabled 1

 1117 12:43:01.883191     I2C: 00:10: enabled 1

 1118 12:43:01.883265    PCI: 00:16.0: enabled 1

 1119 12:43:01.886575    PCI: 00:16.1: enabled 0

 1120 12:43:01.889814    PCI: 00:16.2: enabled 0

 1121 12:43:01.892939    PCI: 00:16.3: enabled 0

 1122 12:43:01.896632    PCI: 00:16.4: enabled 0

 1123 12:43:01.896707    PCI: 00:16.5: enabled 0

 1124 12:43:01.899872    PCI: 00:17.0: enabled 1

 1125 12:43:01.903168    PCI: 00:19.0: enabled 0

 1126 12:43:01.906580    PCI: 00:19.1: enabled 1

 1127 12:43:01.909864     I2C: 00:15: enabled 1

 1128 12:43:01.909940     I2C: 00:2c: enabled 1

 1129 12:43:01.912933    PCI: 00:19.2: enabled 0

 1130 12:43:01.916118    PCI: 00:1a.0: enabled 0

 1131 12:43:01.919574    PCI: 00:1e.0: enabled 1

 1132 12:43:01.923054    PCI: 00:1e.1: enabled 0

 1133 12:43:01.923132    PCI: 00:1e.2: enabled 0

 1134 12:43:01.926370    PCI: 00:1e.3: enabled 1

 1135 12:43:01.929659     SPI: 00: enabled 1

 1136 12:43:01.933090    PCI: 00:1f.0: enabled 1

 1137 12:43:01.933168     PNP: 0c09.0: enabled 1

 1138 12:43:01.936130    PCI: 00:1f.1: enabled 0

 1139 12:43:01.939636    PCI: 00:1f.2: enabled 1

 1140 12:43:01.943297     GENERIC: 0.0: enabled 1

 1141 12:43:01.946020      GENERIC: 0.0: enabled 1

 1142 12:43:01.946095      GENERIC: 1.0: enabled 1

 1143 12:43:01.949282    PCI: 00:1f.3: enabled 1

 1144 12:43:01.953374    PCI: 00:1f.4: enabled 0

 1145 12:43:01.956031    PCI: 00:1f.5: enabled 1

 1146 12:43:01.959475    PCI: 00:1f.6: enabled 0

 1147 12:43:01.959550    PCI: 00:1f.7: enabled 0

 1148 12:43:01.962737  Root Device scanning...

 1149 12:43:01.965994  scan_static_bus for Root Device

 1150 12:43:01.969882  CPU_CLUSTER: 0 enabled

 1151 12:43:01.972641  DOMAIN: 0000 enabled

 1152 12:43:01.972719  DOMAIN: 0000 scanning...

 1153 12:43:01.976385  PCI: pci_scan_bus for bus 00

 1154 12:43:01.979811  PCI: 00:00.0 [8086/0000] ops

 1155 12:43:01.982989  PCI: 00:00.0 [8086/4609] enabled

 1156 12:43:01.985903  PCI: 00:02.0 [8086/0000] bus ops

 1157 12:43:01.989530  PCI: 00:02.0 [8086/46b3] enabled

 1158 12:43:01.992932  PCI: 00:04.0 [8086/0000] bus ops

 1159 12:43:01.995940  PCI: 00:04.0 [8086/461d] enabled

 1160 12:43:01.999482  PCI: 00:06.0 [8086/0000] bus ops

 1161 12:43:02.002656  PCI: 00:06.0 [8086/464d] enabled

 1162 12:43:02.006175  PCI: 00:08.0 [8086/464f] disabled

 1163 12:43:02.009459  PCI: 00:0a.0 [8086/467d] enabled

 1164 12:43:02.012864  PCI: 00:0d.0 [8086/0000] bus ops

 1165 12:43:02.016084  PCI: 00:0d.0 [8086/461e] enabled

 1166 12:43:02.019665  PCI: 00:14.0 [8086/0000] bus ops

 1167 12:43:02.022775  PCI: 00:14.0 [8086/51ed] enabled

 1168 12:43:02.026241  PCI: 00:14.2 [8086/51ef] enabled

 1169 12:43:02.029703  PCI: 00:14.3 [8086/0000] bus ops

 1170 12:43:02.032998  PCI: 00:14.3 [8086/51f0] enabled

 1171 12:43:02.036203  PCI: 00:15.0 [8086/0000] bus ops

 1172 12:43:02.042068  PCI: 00:15.0 [8086/51e8] enabled

 1173 12:43:02.042718  PCI: 00:15.1 [8086/0000] bus ops

 1174 12:43:02.046348  PCI: 00:15.1 [8086/51e9] enabled

 1175 12:43:02.049249  PCI: 00:15.2 [8086/0000] bus ops

 1176 12:43:02.052567  PCI: 00:15.2 [8086/51ea] disabled

 1177 12:43:02.055890  PCI: 00:15.3 [8086/0000] bus ops

 1178 12:43:02.059288  PCI: 00:15.3 [8086/51eb] enabled

 1179 12:43:02.062759  PCI: 00:16.0 [8086/0000] ops

 1180 12:43:02.066017  PCI: 00:16.0 [8086/51e0] enabled

 1181 12:43:02.072407  PCI: Static device PCI: 00:17.0 not found, disabling it.

 1182 12:43:02.076004  PCI: 00:19.0 [8086/0000] bus ops

 1183 12:43:02.079214  PCI: 00:19.0 [8086/51c5] disabled

 1184 12:43:02.082697  PCI: 00:19.1 [8086/0000] bus ops

 1185 12:43:02.085727  PCI: 00:19.1 [8086/51c6] enabled

 1186 12:43:02.089047  PCI: 00:1e.0 [8086/0000] ops

 1187 12:43:02.092292  PCI: 00:1e.0 [8086/51a8] enabled

 1188 12:43:02.095712  PCI: 00:1e.3 [8086/0000] bus ops

 1189 12:43:02.099035  PCI: 00:1e.3 [8086/51ab] enabled

 1190 12:43:02.102337  PCI: 00:1f.0 [8086/0000] bus ops

 1191 12:43:02.105848  PCI: 00:1f.0 [8086/5182] enabled

 1192 12:43:02.109070  RTC Init

 1193 12:43:02.112111  Set power on after power failure.

 1194 12:43:02.112167  Disabling Deep S3

 1195 12:43:02.115524  Disabling Deep S3

 1196 12:43:02.118688  Disabling Deep S4

 1197 12:43:02.118744  Disabling Deep S4

 1198 12:43:02.122167  Disabling Deep S5

 1199 12:43:02.122236  Disabling Deep S5

 1200 12:43:02.125593  PCI: 00:1f.2 [0000/0000] hidden

 1201 12:43:02.129016  PCI: 00:1f.3 [8086/0000] bus ops

 1202 12:43:02.132442  PCI: 00:1f.3 [8086/51c8] enabled

 1203 12:43:02.135562  PCI: 00:1f.5 [8086/0000] bus ops

 1204 12:43:02.139178  PCI: 00:1f.5 [8086/51a4] enabled

 1205 12:43:02.142196  GPIO: 0 enabled

 1206 12:43:02.145462  PCI: Leftover static devices:

 1207 12:43:02.145526  PCI: 00:01.0

 1208 12:43:02.145575  PCI: 00:01.1

 1209 12:43:02.148862  PCI: 00:05.0

 1210 12:43:02.148923  PCI: 00:06.2

 1211 12:43:02.152069  PCI: 00:09.0

 1212 12:43:02.152148  PCI: 00:0d.1

 1213 12:43:02.155732  PCI: 00:0d.2

 1214 12:43:02.155793  PCI: 00:0d.3

 1215 12:43:02.155842  PCI: 00:0e.0

 1216 12:43:02.159055  PCI: 00:10.0

 1217 12:43:02.159110  PCI: 00:10.1

 1218 12:43:02.162384  PCI: 00:10.6

 1219 12:43:02.162439  PCI: 00:10.7

 1220 12:43:02.162484  PCI: 00:12.0

 1221 12:43:02.165950  PCI: 00:12.6

 1222 12:43:02.166004  PCI: 00:12.7

 1223 12:43:02.169248  PCI: 00:13.0

 1224 12:43:02.169305  PCI: 00:14.1

 1225 12:43:02.169352  PCI: 00:16.1

 1226 12:43:02.172503  PCI: 00:16.2

 1227 12:43:02.172566  PCI: 00:16.3

 1228 12:43:02.175748  PCI: 00:16.4

 1229 12:43:02.175808  PCI: 00:16.5

 1230 12:43:02.178616  PCI: 00:17.0

 1231 12:43:02.178678  PCI: 00:19.2

 1232 12:43:02.178724  PCI: 00:1a.0

 1233 12:43:02.181997  PCI: 00:1e.1

 1234 12:43:02.182058  PCI: 00:1e.2

 1235 12:43:02.185496  PCI: 00:1f.1

 1236 12:43:02.185558  PCI: 00:1f.4

 1237 12:43:02.185609  PCI: 00:1f.6

 1238 12:43:02.189619  PCI: 00:1f.7

 1239 12:43:02.192276  PCI: Check your devicetree.cb.

 1240 12:43:02.195368  PCI: 00:02.0 scanning...

 1241 12:43:02.198673  scan_generic_bus for PCI: 00:02.0

 1242 12:43:02.202031  scan_generic_bus for PCI: 00:02.0 done

 1243 12:43:02.205450  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

 1244 12:43:02.208620  PCI: 00:04.0 scanning...

 1245 12:43:02.211946  scan_generic_bus for PCI: 00:04.0

 1246 12:43:02.215213  GENERIC: 0.0 enabled

 1247 12:43:02.218687  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

 1248 12:43:02.225558  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

 1249 12:43:02.228801  PCI: 00:06.0 scanning...

 1250 12:43:02.232048  do_pci_scan_bridge for PCI: 00:06.0

 1251 12:43:02.235322  PCI: pci_scan_bus for bus 01

 1252 12:43:02.238602  PCI: 01:00.0 [15b7/5009] enabled

 1253 12:43:02.241925  Enabling Common Clock Configuration

 1254 12:43:02.245231  L1 Sub-State supported from root port 6

 1255 12:43:02.248647  L1 Sub-State Support = 0x5

 1256 12:43:02.252262  CommonModeRestoreTime = 0x6e

 1257 12:43:02.255568  Power On Value = 0x5, Power On Scale = 0x2

 1258 12:43:02.255641  ASPM: Enabled L1

 1259 12:43:02.261865  PCIe: Max_Payload_Size adjusted to 256

 1260 12:43:02.261933  PCI: 01:00.0: Enabled LTR

 1261 12:43:02.268688  PCI: 01:00.0: Programmed LTR max latencies

 1262 12:43:02.272013  scan_bus: bus PCI: 00:06.0 finished in 40 msecs

 1263 12:43:02.275226  PCI: 00:0d.0 scanning...

 1264 12:43:02.278554  scan_static_bus for PCI: 00:0d.0

 1265 12:43:02.281906  USB0 port 0 enabled

 1266 12:43:02.281981  USB0 port 0 scanning...

 1267 12:43:02.285196  scan_static_bus for USB0 port 0

 1268 12:43:02.288618  USB3 port 0 enabled

 1269 12:43:02.288701  USB3 port 1 disabled

 1270 12:43:02.291889  USB3 port 2 enabled

 1271 12:43:02.295407  USB3 port 3 disabled

 1272 12:43:02.295485  USB3 port 0 scanning...

 1273 12:43:02.298750  scan_static_bus for USB3 port 0

 1274 12:43:02.305412  scan_static_bus for USB3 port 0 done

 1275 12:43:02.308885  scan_bus: bus USB3 port 0 finished in 6 msecs

 1276 12:43:02.312329  USB3 port 2 scanning...

 1277 12:43:02.315682  scan_static_bus for USB3 port 2

 1278 12:43:02.318797  scan_static_bus for USB3 port 2 done

 1279 12:43:02.321711  scan_bus: bus USB3 port 2 finished in 6 msecs

 1280 12:43:02.325043  scan_static_bus for USB0 port 0 done

 1281 12:43:02.331663  scan_bus: bus USB0 port 0 finished in 43 msecs

 1282 12:43:02.335254  scan_static_bus for PCI: 00:0d.0 done

 1283 12:43:02.338433  scan_bus: bus PCI: 00:0d.0 finished in 59 msecs

 1284 12:43:02.341884  PCI: 00:14.0 scanning...

 1285 12:43:02.345266  scan_static_bus for PCI: 00:14.0

 1286 12:43:02.348330  USB0 port 0 enabled

 1287 12:43:02.348396  USB0 port 0 scanning...

 1288 12:43:02.352235  scan_static_bus for USB0 port 0

 1289 12:43:02.354976  USB2 port 0 enabled

 1290 12:43:02.358671  USB2 port 1 disabled

 1291 12:43:02.359097  USB2 port 2 enabled

 1292 12:43:02.361762  USB2 port 3 disabled

 1293 12:43:02.364883  USB2 port 4 disabled

 1294 12:43:02.364951  USB2 port 5 enabled

 1295 12:43:02.368128  USB2 port 6 disabled

 1296 12:43:02.368439  USB2 port 7 disabled

 1297 12:43:02.371616  USB2 port 8 enabled

 1298 12:43:02.374876  USB2 port 9 enabled

 1299 12:43:02.375148  USB3 port 0 enabled

 1300 12:43:02.378477  USB3 port 1 disabled

 1301 12:43:02.382232  USB3 port 2 disabled

 1302 12:43:02.382626  USB3 port 3 disabled

 1303 12:43:02.385136  USB2 port 0 scanning...

 1304 12:43:02.388414  scan_static_bus for USB2 port 0

 1305 12:43:02.392177  scan_static_bus for USB2 port 0 done

 1306 12:43:02.395032  scan_bus: bus USB2 port 0 finished in 6 msecs

 1307 12:43:02.398263  USB2 port 2 scanning...

 1308 12:43:02.401634  scan_static_bus for USB2 port 2

 1309 12:43:02.404934  scan_static_bus for USB2 port 2 done

 1310 12:43:02.411933  scan_bus: bus USB2 port 2 finished in 6 msecs

 1311 12:43:02.412373  USB2 port 5 scanning...

 1312 12:43:02.415125  scan_static_bus for USB2 port 5

 1313 12:43:02.421464  scan_static_bus for USB2 port 5 done

 1314 12:43:02.424774  scan_bus: bus USB2 port 5 finished in 6 msecs

 1315 12:43:02.428262  USB2 port 8 scanning...

 1316 12:43:02.431603  scan_static_bus for USB2 port 8

 1317 12:43:02.435103  scan_static_bus for USB2 port 8 done

 1318 12:43:02.438290  scan_bus: bus USB2 port 8 finished in 6 msecs

 1319 12:43:02.441428  USB2 port 9 scanning...

 1320 12:43:02.444709  scan_static_bus for USB2 port 9

 1321 12:43:02.448353  scan_static_bus for USB2 port 9 done

 1322 12:43:02.451481  scan_bus: bus USB2 port 9 finished in 6 msecs

 1323 12:43:02.454521  USB3 port 0 scanning...

 1324 12:43:02.457694  scan_static_bus for USB3 port 0

 1325 12:43:02.461182  scan_static_bus for USB3 port 0 done

 1326 12:43:02.467489  scan_bus: bus USB3 port 0 finished in 6 msecs

 1327 12:43:02.470969  scan_static_bus for USB0 port 0 done

 1328 12:43:02.474411  scan_bus: bus USB0 port 0 finished in 120 msecs

 1329 12:43:02.477963  scan_static_bus for PCI: 00:14.0 done

 1330 12:43:02.484646  scan_bus: bus PCI: 00:14.0 finished in 136 msecs

 1331 12:43:02.484783  PCI: 00:14.3 scanning...

 1332 12:43:02.488167  scan_static_bus for PCI: 00:14.3

 1333 12:43:02.491449  GENERIC: 0.0 enabled

 1334 12:43:02.494382  scan_static_bus for PCI: 00:14.3 done

 1335 12:43:02.501066  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

 1336 12:43:02.501141  PCI: 00:15.0 scanning...

 1337 12:43:02.504388  scan_static_bus for PCI: 00:15.0

 1338 12:43:02.507707  I2C: 00:1a enabled

 1339 12:43:02.511142  I2C: 00:31 enabled

 1340 12:43:02.511216  I2C: 00:32 enabled

 1341 12:43:02.514440  scan_static_bus for PCI: 00:15.0 done

 1342 12:43:02.520883  scan_bus: bus PCI: 00:15.0 finished in 12 msecs

 1343 12:43:02.524185  PCI: 00:15.1 scanning...

 1344 12:43:02.527554  scan_static_bus for PCI: 00:15.1

 1345 12:43:02.527627  I2C: 00:50 enabled

 1346 12:43:02.530647  scan_static_bus for PCI: 00:15.1 done

 1347 12:43:02.537496  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

 1348 12:43:02.537571  PCI: 00:15.3 scanning...

 1349 12:43:02.540804  scan_static_bus for PCI: 00:15.3

 1350 12:43:02.544099  I2C: 00:10 enabled

 1351 12:43:02.547681  scan_static_bus for PCI: 00:15.3 done

 1352 12:43:02.553887  scan_bus: bus PCI: 00:15.3 finished in 9 msecs

 1353 12:43:02.553972  PCI: 00:19.1 scanning...

 1354 12:43:02.557389  scan_static_bus for PCI: 00:19.1

 1355 12:43:02.560739  I2C: 00:15 enabled

 1356 12:43:02.563955  I2C: 00:2c enabled

 1357 12:43:02.567456  scan_static_bus for PCI: 00:19.1 done

 1358 12:43:02.570601  scan_bus: bus PCI: 00:19.1 finished in 11 msecs

 1359 12:43:02.574083  PCI: 00:1e.3 scanning...

 1360 12:43:02.577328  scan_generic_bus for PCI: 00:1e.3

 1361 12:43:02.577400  SPI: 00 enabled

 1362 12:43:02.583906  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1363 12:43:02.590621  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1364 12:43:02.590711  PCI: 00:1f.0 scanning...

 1365 12:43:02.594205  scan_static_bus for PCI: 00:1f.0

 1366 12:43:02.597147  PNP: 0c09.0 enabled

 1367 12:43:02.600833  PNP: 0c09.0 scanning...

 1368 12:43:02.603829  scan_static_bus for PNP: 0c09.0

 1369 12:43:02.607712  scan_static_bus for PNP: 0c09.0 done

 1370 12:43:02.610500  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1371 12:43:02.614222  scan_static_bus for PCI: 00:1f.0 done

 1372 12:43:02.620882  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1373 12:43:02.624272  PCI: 00:1f.2 scanning...

 1374 12:43:02.627456  scan_static_bus for PCI: 00:1f.2

 1375 12:43:02.627535  GENERIC: 0.0 enabled

 1376 12:43:02.630903  GENERIC: 0.0 scanning...

 1377 12:43:02.634221  scan_static_bus for GENERIC: 0.0

 1378 12:43:02.637621  GENERIC: 0.0 enabled

 1379 12:43:02.637698  GENERIC: 1.0 enabled

 1380 12:43:02.640565  scan_static_bus for GENERIC: 0.0 done

 1381 12:43:02.647239  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1382 12:43:02.650718  scan_static_bus for PCI: 00:1f.2 done

 1383 12:43:02.653904  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1384 12:43:02.657315  PCI: 00:1f.3 scanning...

 1385 12:43:02.660528  scan_static_bus for PCI: 00:1f.3

 1386 12:43:02.663883  scan_static_bus for PCI: 00:1f.3 done

 1387 12:43:02.670433  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1388 12:43:02.673877  PCI: 00:1f.5 scanning...

 1389 12:43:02.677186  scan_generic_bus for PCI: 00:1f.5

 1390 12:43:02.680586  scan_generic_bus for PCI: 00:1f.5 done

 1391 12:43:02.683926  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1392 12:43:02.690559  scan_bus: bus DOMAIN: 0000 finished in 710 msecs

 1393 12:43:02.694006  scan_static_bus for Root Device done

 1394 12:43:02.697205  scan_bus: bus Root Device finished in 729 msecs

 1395 12:43:02.697284  done

 1396 12:43:02.703633  BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 1296 ms

 1397 12:43:02.710239  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)

 1398 12:43:02.716927  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1399 12:43:02.720397  SPI flash protection: WPSW=1 SRP0=0

 1400 12:43:02.723661  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1401 12:43:02.730310  BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms

 1402 12:43:02.733652  found VGA at PCI: 00:02.0

 1403 12:43:02.736830  Setting up VGA for PCI: 00:02.0

 1404 12:43:02.740204  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1405 12:43:02.746895  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1406 12:43:02.750418  Allocating resources...

 1407 12:43:02.750492  Reading resources...

 1408 12:43:02.757541  Root Device read_resources bus 0 link: 0

 1409 12:43:02.760164  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1410 12:43:02.763262  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1411 12:43:02.769934  DOMAIN: 0000 read_resources bus 0 link: 0

 1412 12:43:02.776902  SA MMIO resource: MCHBAR ->  base = 0xfedc0000, size = 0x20000

 1413 12:43:02.779953  SA MMIO resource: DMIBAR ->  base = 0xfeda0000, size = 0x1000

 1414 12:43:02.787061  SA MMIO resource: EPBAR ->  base = 0xfeda1000, size = 0x1000

 1415 12:43:02.793098  SA MMIO resource: REGBAR ->  base = 0xfb000000, size = 0x1000

 1416 12:43:02.799827  SA MMIO resource: EDRAMBAR ->  base = 0xfed80000, size = 0x4000

 1417 12:43:02.806373  SA MMIO resource: CRAB_ABORT ->  base = 0xfeb00000, size = 0x80000

 1418 12:43:02.812927  SA MMIO resource: TPM ->  base = 0xfed40000, size = 0x10000

 1419 12:43:02.820181  SA MMIO resource: LT_SECURITY ->  base = 0xfed50000, size = 0x20000

 1420 12:43:02.826467  SA MMIO resource: APIC ->  base = 0xfec00000, size = 0x100000

 1421 12:43:02.833004  SA MMIO resource: PCH_RESERVED ->  base = 0xfc800000, size = 0x2000000

 1422 12:43:02.840037  SA MMIO resource: GFXVTBAR ->  base = 0xfed90000, size = 0x1000

 1423 12:43:02.846806  SA MMIO resource: IPUVTBAR ->  base = 0xfed92000, size = 0x1000

 1424 12:43:02.850145  SA MMIO resource: TBT0BAR ->  base = 0xfed84000, size = 0x1000

 1425 12:43:02.856535  SA MMIO resource: TBT1BAR ->  base = 0xfed85000, size = 0x1000

 1426 12:43:02.863388  SA MMIO resource: TBT2BAR ->  base = 0xfed86000, size = 0x1000

 1427 12:43:02.869476  SA MMIO resource: TBT3BAR ->  base = 0xfed87000, size = 0x1000

 1428 12:43:02.876244  SA MMIO resource: VTVC0BAR ->  base = 0xfed91000, size = 0x1000

 1429 12:43:02.883110  SA MMIO resource: MMCONF ->  base = 0xc0000000, size = 0x10000000

 1430 12:43:02.889564  SA MMIO resource: DSM ->  base = 0x7c800000, size = 0x3c00000

 1431 12:43:02.896477  SA MMIO resource: TSEG ->  base = 0x7b800000, size = 0x800000

 1432 12:43:02.902980  SA MMIO resource: GSM ->  base = 0x7c000000, size = 0x800000

 1433 12:43:02.906350  PCI: 00:04.0 read_resources bus 1 link: 0

 1434 12:43:02.909701  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1435 12:43:02.912958  PCI: 00:06.0 read_resources bus 1 link: 0

 1436 12:43:02.919168  PCI: 00:06.0 read_resources bus 1 link: 0 done

 1437 12:43:02.922843  PCI: 00:0d.0 read_resources bus 0 link: 0

 1438 12:43:02.926207  USB0 port 0 read_resources bus 0 link: 0

 1439 12:43:02.932761  USB0 port 0 read_resources bus 0 link: 0 done

 1440 12:43:02.936181  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1441 12:43:02.942583  PCI: 00:14.0 read_resources bus 0 link: 0

 1442 12:43:02.945975  USB0 port 0 read_resources bus 0 link: 0

 1443 12:43:02.949017  USB0 port 0 read_resources bus 0 link: 0 done

 1444 12:43:02.955809  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1445 12:43:02.959454  PCI: 00:14.3 read_resources bus 0 link: 0

 1446 12:43:02.962503  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1447 12:43:02.969153  PCI: 00:15.0 read_resources bus 0 link: 0

 1448 12:43:02.972486  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1449 12:43:02.975831  PCI: 00:15.1 read_resources bus 0 link: 0

 1450 12:43:02.982293  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1451 12:43:02.985828  PCI: 00:15.3 read_resources bus 0 link: 0

 1452 12:43:02.988794  PCI: 00:15.3 read_resources bus 0 link: 0 done

 1453 12:43:02.996362  PCI: 00:19.1 read_resources bus 0 link: 0

 1454 12:43:02.999057  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1455 12:43:03.005881  PCI: 00:1e.3 read_resources bus 2 link: 0

 1456 12:43:03.009133  PCI: 00:1e.3 read_resources bus 2 link: 0 done

 1457 12:43:03.012383  PCI: 00:1f.0 read_resources bus 0 link: 0

 1458 12:43:03.018989  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1459 12:43:03.022251  PCI: 00:1f.2 read_resources bus 0 link: 0

 1460 12:43:03.025619  GENERIC: 0.0 read_resources bus 0 link: 0

 1461 12:43:03.032321  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1462 12:43:03.035694  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1463 12:43:03.042448  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1464 12:43:03.045726  Root Device read_resources bus 0 link: 0 done

 1465 12:43:03.049119  Done reading resources.

 1466 12:43:03.052331  Show resources in subtree (Root Device)...After reading.

 1467 12:43:03.058890   Root Device child on link 0 CPU_CLUSTER: 0

 1468 12:43:03.062260    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1469 12:43:03.062334     APIC: 00

 1470 12:43:03.065433     APIC: 16

 1471 12:43:03.065504     APIC: 10

 1472 12:43:03.065572     APIC: 12

 1473 12:43:03.068793     APIC: 14

 1474 12:43:03.068867     APIC: 01

 1475 12:43:03.072060     APIC: 09

 1476 12:43:03.072144     APIC: 08

 1477 12:43:03.075566    DOMAIN: 0000 child on link 0 GPIO: 0

 1478 12:43:03.085709    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1479 12:43:03.095890    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1480 12:43:03.095975     GPIO: 0

 1481 12:43:03.098957     PCI: 00:00.0

 1482 12:43:03.108599     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0

 1483 12:43:03.115539     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1

 1484 12:43:03.125590     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1485 12:43:03.135604     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1486 12:43:03.145655     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4

 1487 12:43:03.155128     PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5

 1488 12:43:03.165014     PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1489 12:43:03.171963     PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7

 1490 12:43:03.181609     PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8

 1491 12:43:03.191785     PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9

 1492 12:43:03.201800     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1493 12:43:03.211555     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1494 12:43:03.221219     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1495 12:43:03.231407     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d

 1496 12:43:03.238043     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e

 1497 12:43:03.248018     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f

 1498 12:43:03.258078     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10

 1499 12:43:03.268208     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11

 1500 12:43:03.278160     PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12

 1501 12:43:03.287757     PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13

 1502 12:43:03.297657     PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14

 1503 12:43:03.307513     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15

 1504 12:43:03.314387     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16

 1505 12:43:03.324488     PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17

 1506 12:43:03.333924     PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18

 1507 12:43:03.343890     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19

 1508 12:43:03.354143     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a

 1509 12:43:03.363990     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b

 1510 12:43:03.364066     PCI: 00:02.0

 1511 12:43:03.377317     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1512 12:43:03.387109     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1513 12:43:03.393737     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1514 12:43:03.400555     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1515 12:43:03.410652     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1516 12:43:03.410728      GENERIC: 0.0

 1517 12:43:03.414120     PCI: 00:06.0 child on link 0 PCI: 01:00.0

 1518 12:43:03.423855     PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1519 12:43:03.433799     PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1520 12:43:03.443577     PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1521 12:43:03.443654      PCI: 01:00.0

 1522 12:43:03.454587      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1523 12:43:03.464265      PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20

 1524 12:43:03.467256     PCI: 00:08.0

 1525 12:43:03.467586     PCI: 00:0a.0

 1526 12:43:03.477084     PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10

 1527 12:43:03.484596     PCI: 00:0d.0 child on link 0 USB0 port 0

 1528 12:43:03.494254     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1529 12:43:03.497553      USB0 port 0 child on link 0 USB3 port 0

 1530 12:43:03.497896       USB3 port 0

 1531 12:43:03.500353       USB3 port 1

 1532 12:43:03.500432       USB3 port 2

 1533 12:43:03.504015       USB3 port 3

 1534 12:43:03.506798     PCI: 00:14.0 child on link 0 USB0 port 0

 1535 12:43:03.517288     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1536 12:43:03.524036      USB0 port 0 child on link 0 USB2 port 0

 1537 12:43:03.524110       USB2 port 0

 1538 12:43:03.527038       USB2 port 1

 1539 12:43:03.527113       USB2 port 2

 1540 12:43:03.530366       USB2 port 3

 1541 12:43:03.530439       USB2 port 4

 1542 12:43:03.533498       USB2 port 5

 1543 12:43:03.533572       USB2 port 6

 1544 12:43:03.536838       USB2 port 7

 1545 12:43:03.536912       USB2 port 8

 1546 12:43:03.540179       USB2 port 9

 1547 12:43:03.543989       USB3 port 0

 1548 12:43:03.544063       USB3 port 1

 1549 12:43:03.546968       USB3 port 2

 1550 12:43:03.547052       USB3 port 3

 1551 12:43:03.550433     PCI: 00:14.2

 1552 12:43:03.560398     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1553 12:43:03.570012     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1554 12:43:03.573921     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1555 12:43:03.583550     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1556 12:43:03.583638      GENERIC: 0.0

 1557 12:43:03.590346     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1558 12:43:03.600346     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1559 12:43:03.600423      I2C: 00:1a

 1560 12:43:03.603704      I2C: 00:31

 1561 12:43:03.603777      I2C: 00:32

 1562 12:43:03.606683     PCI: 00:15.1 child on link 0 I2C: 00:50

 1563 12:43:03.616698     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1564 12:43:03.620230      I2C: 00:50

 1565 12:43:03.620304     PCI: 00:15.2

 1566 12:43:03.626888     PCI: 00:15.3 child on link 0 I2C: 00:10

 1567 12:43:03.636943     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1568 12:43:03.637018      I2C: 00:10

 1569 12:43:03.640144     PCI: 00:16.0

 1570 12:43:03.650166     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1571 12:43:03.650253     PCI: 00:19.0

 1572 12:43:03.656864     PCI: 00:19.1 child on link 0 I2C: 00:15

 1573 12:43:03.666790     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1574 12:43:03.666869      I2C: 00:15

 1575 12:43:03.666927      I2C: 00:2c

 1576 12:43:03.669656     PCI: 00:1e.0

 1577 12:43:03.680074     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1578 12:43:03.686521     PCI: 00:1e.3 child on link 0 SPI: 00

 1579 12:43:03.696520     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1580 12:43:03.696596      SPI: 00

 1581 12:43:03.699733     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1582 12:43:03.710118     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1583 12:43:03.710192      PNP: 0c09.0

 1584 12:43:03.719936      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1585 12:43:03.723051     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1586 12:43:03.732937     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1587 12:43:03.742776     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1588 12:43:03.746081      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1589 12:43:03.749742       GENERIC: 0.0

 1590 12:43:03.749817       GENERIC: 1.0

 1591 12:43:03.753202     PCI: 00:1f.3

 1592 12:43:03.762831     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1593 12:43:03.772992     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1594 12:43:03.773078     PCI: 00:1f.5

 1595 12:43:03.783308     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1596 12:43:03.789322  === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1597 12:43:03.796362   PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1598 12:43:03.802934   PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1599 12:43:03.809331   PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1600 12:43:03.812904    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1601 12:43:03.816264    PCI: 01:00.0 20 *  [0x4000 - 0x40ff] mem

 1602 12:43:03.825682   PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1603 12:43:03.832760   PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1604 12:43:03.839105   PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1605 12:43:03.846477  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1606 12:43:03.852918  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1607 12:43:03.859550   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1608 12:43:03.868970   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1609 12:43:03.875653   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1610 12:43:03.879196   DOMAIN: 0000: Resource ranges:

 1611 12:43:03.882267   * Base: 1000, Size: 800, Tag: 100

 1612 12:43:03.886335   * Base: 1900, Size: e700, Tag: 100

 1613 12:43:03.893029    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1614 12:43:03.899762  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1615 12:43:03.906314  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1616 12:43:03.912799   update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)

 1617 12:43:03.919546   update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)

 1618 12:43:03.929374   update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)

 1619 12:43:03.935871   update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)

 1620 12:43:03.942754   update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)

 1621 12:43:03.952038   update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)

 1622 12:43:03.958596   update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)

 1623 12:43:03.965057   update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)

 1624 12:43:03.975914   update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)

 1625 12:43:03.982117   update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)

 1626 12:43:03.988841   update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)

 1627 12:43:03.998741   update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)

 1628 12:43:04.006018   update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)

 1629 12:43:04.011968   update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)

 1630 12:43:04.022183   update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)

 1631 12:43:04.028774   update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)

 1632 12:43:04.035092   update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)

 1633 12:43:04.044945   update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)

 1634 12:43:04.051310   update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)

 1635 12:43:04.058115   update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)

 1636 12:43:04.068301   update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)

 1637 12:43:04.074556   update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)

 1638 12:43:04.081157   update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)

 1639 12:43:04.092074   update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)

 1640 12:43:04.098044   update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)

 1641 12:43:04.104612   update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)

 1642 12:43:04.114555   update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)

 1643 12:43:04.121561   update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)

 1644 12:43:04.128324   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1645 12:43:04.137770   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1646 12:43:04.140960   DOMAIN: 0000: Resource ranges:

 1647 12:43:04.144330   * Base: 80400000, Size: 3fc00000, Tag: 200

 1648 12:43:04.147401   * Base: d0000000, Size: 28000000, Tag: 200

 1649 12:43:04.154288   * Base: fa000000, Size: 1000000, Tag: 200

 1650 12:43:04.157399   * Base: fb001000, Size: 17ff000, Tag: 200

 1651 12:43:04.160918   * Base: fe800000, Size: 300000, Tag: 200

 1652 12:43:04.164133   * Base: feb80000, Size: 80000, Tag: 200

 1653 12:43:04.170968   * Base: fed00000, Size: 40000, Tag: 200

 1654 12:43:04.174125   * Base: fed70000, Size: 10000, Tag: 200

 1655 12:43:04.177782   * Base: fed88000, Size: 8000, Tag: 200

 1656 12:43:04.181025   * Base: fed93000, Size: d000, Tag: 200

 1657 12:43:04.184395   * Base: feda2000, Size: 1e000, Tag: 200

 1658 12:43:04.190973   * Base: fede0000, Size: 1220000, Tag: 200

 1659 12:43:04.194058   * Base: 27fc00000, Size: 7d80400000, Tag: 100200

 1660 12:43:04.200827    PCI: 00:02.0 18 *  [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem

 1661 12:43:04.207519    PCI: 00:02.0 10 *  [0x81000000 - 0x81ffffff] limit: 81ffffff mem

 1662 12:43:04.214202    PCI: 00:06.0 20 *  [0x80400000 - 0x804fffff] limit: 804fffff mem

 1663 12:43:04.220898    PCI: 00:1f.3 20 *  [0x80500000 - 0x805fffff] limit: 805fffff mem

 1664 12:43:04.227394    PCI: 00:04.0 10 *  [0x80600000 - 0x8061ffff] limit: 8061ffff mem

 1665 12:43:04.234002    PCI: 00:0d.0 10 *  [0x80620000 - 0x8062ffff] limit: 8062ffff mem

 1666 12:43:04.240718    PCI: 00:14.0 10 *  [0x80630000 - 0x8063ffff] limit: 8063ffff mem

 1667 12:43:04.247600    PCI: 00:0a.0 10 *  [0x80640000 - 0x80647fff] limit: 80647fff mem

 1668 12:43:04.254076    PCI: 00:14.2 10 *  [0x80648000 - 0x8064bfff] limit: 8064bfff mem

 1669 12:43:04.260416    PCI: 00:14.3 10 *  [0x8064c000 - 0x8064ffff] limit: 8064ffff mem

 1670 12:43:04.266698    PCI: 00:1f.3 10 *  [0x80650000 - 0x80653fff] limit: 80653fff mem

 1671 12:43:04.273656    PCI: 00:14.2 18 *  [0x80654000 - 0x80654fff] limit: 80654fff mem

 1672 12:43:04.280416    PCI: 00:15.0 10 *  [0x80655000 - 0x80655fff] limit: 80655fff mem

 1673 12:43:04.287496    PCI: 00:15.1 10 *  [0x80656000 - 0x80656fff] limit: 80656fff mem

 1674 12:43:04.293141    PCI: 00:15.3 10 *  [0x80657000 - 0x80657fff] limit: 80657fff mem

 1675 12:43:04.300295    PCI: 00:16.0 10 *  [0x80658000 - 0x80658fff] limit: 80658fff mem

 1676 12:43:04.306994    PCI: 00:19.1 10 *  [0x80659000 - 0x80659fff] limit: 80659fff mem

 1677 12:43:04.313372    PCI: 00:1e.3 10 *  [0x8065a000 - 0x8065afff] limit: 8065afff mem

 1678 12:43:04.320171    PCI: 00:1f.5 10 *  [0x8065b000 - 0x8065bfff] limit: 8065bfff mem

 1679 12:43:04.330316  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1680 12:43:04.336654  PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff

 1681 12:43:04.340700   PCI: 00:06.0: Resource ranges:

 1682 12:43:04.343422   * Base: 80400000, Size: 100000, Tag: 200

 1683 12:43:04.349812    PCI: 01:00.0 10 *  [0x80400000 - 0x80403fff] limit: 80403fff mem

 1684 12:43:04.356719    PCI: 01:00.0 20 *  [0x80404000 - 0x804040ff] limit: 804040ff mem

 1685 12:43:04.366682  PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done

 1686 12:43:04.372927  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1687 12:43:04.376330  Root Device assign_resources, bus 0 link: 0

 1688 12:43:04.383252  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1689 12:43:04.389431  PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64

 1690 12:43:04.400025  PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64

 1691 12:43:04.406508  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1692 12:43:04.413433  PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64

 1693 12:43:04.419899  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1694 12:43:04.422780  PCI: 00:04.0 assign_resources, bus 1 link: 0 done

 1695 12:43:04.433165  PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1696 12:43:04.442719  PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1697 12:43:04.449133  PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem

 1698 12:43:04.455953  PCI: 00:06.0 assign_resources, bus 1 link: 0

 1699 12:43:04.462994  PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64

 1700 12:43:04.469462  PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64

 1701 12:43:04.475774  PCI: 00:06.0 assign_resources, bus 1 link: 0 done

 1702 12:43:04.482700  PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64

 1703 12:43:04.492640  PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64

 1704 12:43:04.495756  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1705 12:43:04.502741  PCI: 00:0d.0 assign_resources, bus 0 link: 0 done

 1706 12:43:04.508752  PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64

 1707 12:43:04.511879  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1708 12:43:04.518612  PCI: 00:14.0 assign_resources, bus 0 link: 0 done

 1709 12:43:04.525325  PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64

 1710 12:43:04.535340  PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64

 1711 12:43:04.541987  PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64

 1712 12:43:04.548945  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1713 12:43:04.551687  PCI: 00:14.3 assign_resources, bus 0 link: 0 done

 1714 12:43:04.558625  PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64

 1715 12:43:04.565342  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1716 12:43:04.568266  PCI: 00:15.0 assign_resources, bus 0 link: 0 done

 1717 12:43:04.578022  PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64

 1718 12:43:04.581578  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1719 12:43:04.588107  PCI: 00:15.1 assign_resources, bus 0 link: 0 done

 1720 12:43:04.594746  PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64

 1721 12:43:04.598364  PCI: 00:15.3 assign_resources, bus 0 link: 0

 1722 12:43:04.604655  PCI: 00:15.3 assign_resources, bus 0 link: 0 done

 1723 12:43:04.611629  PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64

 1724 12:43:04.621196  PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64

 1725 12:43:04.624628  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1726 12:43:04.631350  PCI: 00:19.1 assign_resources, bus 0 link: 0 done

 1727 12:43:04.638248  PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64

 1728 12:43:04.641429  PCI: 00:1e.3 assign_resources, bus 2 link: 0

 1729 12:43:04.647609  PCI: 00:1e.3 assign_resources, bus 2 link: 0 done

 1730 12:43:04.650984  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1731 12:43:04.657905  PCI: 00:1f.0 assign_resources, bus 0 link: 0 done

 1732 12:43:04.661025  LPC: Trying to open IO window from 800 size 1ff

 1733 12:43:04.670934  PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64

 1734 12:43:04.677492  PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64

 1735 12:43:04.684372  PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem

 1736 12:43:04.691164  DOMAIN: 0000 assign_resources, bus 0 link: 0 done

 1737 12:43:04.694369  Root Device assign_resources, bus 0 link: 0 done

 1738 12:43:04.697828  Done setting resources.

 1739 12:43:04.704350  Show resources in subtree (Root Device)...After assigning values.

 1740 12:43:04.707464   Root Device child on link 0 CPU_CLUSTER: 0

 1741 12:43:04.714320    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1742 12:43:04.714378     APIC: 00

 1743 12:43:04.714434     APIC: 16

 1744 12:43:04.717380     APIC: 10

 1745 12:43:04.717450     APIC: 12

 1746 12:43:04.720779     APIC: 14

 1747 12:43:04.720836     APIC: 01

 1748 12:43:04.720882     APIC: 09

 1749 12:43:04.724605     APIC: 08

 1750 12:43:04.727295    DOMAIN: 0000 child on link 0 GPIO: 0

 1751 12:43:04.737281    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1752 12:43:04.747252    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1753 12:43:04.747319     GPIO: 0

 1754 12:43:04.750901     PCI: 00:00.0

 1755 12:43:04.757193     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0

 1756 12:43:04.767326     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1

 1757 12:43:04.776910     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1758 12:43:04.787120     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1759 12:43:04.796942     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4

 1760 12:43:04.806867     PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5

 1761 12:43:04.813761     PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1762 12:43:04.823583     PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7

 1763 12:43:04.833632     PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8

 1764 12:43:04.843532     PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9

 1765 12:43:04.853293     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1766 12:43:04.862976     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1767 12:43:04.872937     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1768 12:43:04.879636     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d

 1769 12:43:04.890112     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e

 1770 12:43:04.900165     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f

 1771 12:43:04.909490     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10

 1772 12:43:04.919553     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11

 1773 12:43:04.929714     PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12

 1774 12:43:04.939626     PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13

 1775 12:43:04.949209     PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14

 1776 12:43:04.955946     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15

 1777 12:43:04.965969     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16

 1778 12:43:04.976091     PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17

 1779 12:43:04.986214     PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18

 1780 12:43:04.995906     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19

 1781 12:43:05.006092     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a

 1782 12:43:05.016393     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b

 1783 12:43:05.016478     PCI: 00:02.0

 1784 12:43:05.025582     PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10

 1785 12:43:05.038996     PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18

 1786 12:43:05.045636     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1787 12:43:05.052161     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1788 12:43:05.062164     PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10

 1789 12:43:05.062239      GENERIC: 0.0

 1790 12:43:05.068894     PCI: 00:06.0 child on link 0 PCI: 01:00.0

 1791 12:43:05.078678     PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1792 12:43:05.088458     PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1793 12:43:05.098554     PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20

 1794 12:43:05.101794      PCI: 01:00.0

 1795 12:43:05.111430      PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10

 1796 12:43:05.121786      PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20

 1797 12:43:05.124912     PCI: 00:08.0

 1798 12:43:05.124992     PCI: 00:0a.0

 1799 12:43:05.135165     PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10

 1800 12:43:05.141432     PCI: 00:0d.0 child on link 0 USB0 port 0

 1801 12:43:05.151330     PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10

 1802 12:43:05.154587      USB0 port 0 child on link 0 USB3 port 0

 1803 12:43:05.157850       USB3 port 0

 1804 12:43:05.157906       USB3 port 1

 1805 12:43:05.161109       USB3 port 2

 1806 12:43:05.161163       USB3 port 3

 1807 12:43:05.164594     PCI: 00:14.0 child on link 0 USB0 port 0

 1808 12:43:05.177846     PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10

 1809 12:43:05.181898      USB0 port 0 child on link 0 USB2 port 0

 1810 12:43:05.184293       USB2 port 0

 1811 12:43:05.184352       USB2 port 1

 1812 12:43:05.187794       USB2 port 2

 1813 12:43:05.187863       USB2 port 3

 1814 12:43:05.191135       USB2 port 4

 1815 12:43:05.191203       USB2 port 5

 1816 12:43:05.194336       USB2 port 6

 1817 12:43:05.194397       USB2 port 7

 1818 12:43:05.197714       USB2 port 8

 1819 12:43:05.197771       USB2 port 9

 1820 12:43:05.201096       USB3 port 0

 1821 12:43:05.201155       USB3 port 1

 1822 12:43:05.204446       USB3 port 2

 1823 12:43:05.204499       USB3 port 3

 1824 12:43:05.207891     PCI: 00:14.2

 1825 12:43:05.217305     PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10

 1826 12:43:05.227733     PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18

 1827 12:43:05.234263     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1828 12:43:05.244169     PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10

 1829 12:43:05.244230      GENERIC: 0.0

 1830 12:43:05.247666     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1831 12:43:05.260787     PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10

 1832 12:43:05.260859      I2C: 00:1a

 1833 12:43:05.264348      I2C: 00:31

 1834 12:43:05.264402      I2C: 00:32

 1835 12:43:05.267523     PCI: 00:15.1 child on link 0 I2C: 00:50

 1836 12:43:05.277687     PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10

 1837 12:43:05.280985      I2C: 00:50

 1838 12:43:05.281502     PCI: 00:15.2

 1839 12:43:05.287381     PCI: 00:15.3 child on link 0 I2C: 00:10

 1840 12:43:05.297158     PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10

 1841 12:43:05.297543      I2C: 00:10

 1842 12:43:05.300841     PCI: 00:16.0

 1843 12:43:05.310820     PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10

 1844 12:43:05.311284     PCI: 00:19.0

 1845 12:43:05.317818     PCI: 00:19.1 child on link 0 I2C: 00:15

 1846 12:43:05.327235     PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10

 1847 12:43:05.327775      I2C: 00:15

 1848 12:43:05.330396      I2C: 00:2c

 1849 12:43:05.330742     PCI: 00:1e.0

 1850 12:43:05.344135     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1851 12:43:05.347112     PCI: 00:1e.3 child on link 0 SPI: 00

 1852 12:43:05.357080     PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10

 1853 12:43:05.357548      SPI: 00

 1854 12:43:05.364098     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1855 12:43:05.370151     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1856 12:43:05.373532      PNP: 0c09.0

 1857 12:43:05.380149      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1858 12:43:05.386711     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1859 12:43:05.396733     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1860 12:43:05.404441     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1861 12:43:05.410932      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1862 12:43:05.411389       GENERIC: 0.0

 1863 12:43:05.413705       GENERIC: 1.0

 1864 12:43:05.414051     PCI: 00:1f.3

 1865 12:43:05.426777     PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10

 1866 12:43:05.437054     PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20

 1867 12:43:05.437526     PCI: 00:1f.5

 1868 12:43:05.446977     PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10

 1869 12:43:05.449874  Done allocating resources.

 1870 12:43:05.456276  BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2717 ms

 1871 12:43:05.463468  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

 1872 12:43:05.466447  Configure audio over I2S with MAX98373 NAU88L25B.

 1873 12:43:05.471308  Enabling BT offload

 1874 12:43:05.478899  BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms

 1875 12:43:05.481590  Enabling resources...

 1876 12:43:05.485670  PCI: 00:00.0 subsystem <- 8086/4609

 1877 12:43:05.488310  PCI: 00:00.0 cmd <- 06

 1878 12:43:05.492065  PCI: 00:02.0 subsystem <- 8086/46b3

 1879 12:43:05.495871  PCI: 00:02.0 cmd <- 03

 1880 12:43:05.498959  PCI: 00:04.0 subsystem <- 8086/461d

 1881 12:43:05.499109  PCI: 00:04.0 cmd <- 02

 1882 12:43:05.502565  PCI: 00:06.0 bridge ctrl <- 0013

 1883 12:43:05.505338  PCI: 00:06.0 subsystem <- 8086/464d

 1884 12:43:05.508812  PCI: 00:06.0 cmd <- 106

 1885 12:43:05.512068  PCI: 00:0a.0 subsystem <- 8086/467d

 1886 12:43:05.515767  PCI: 00:0a.0 cmd <- 02

 1887 12:43:05.519108  PCI: 00:0d.0 subsystem <- 8086/461e

 1888 12:43:05.521456  PCI: 00:0d.0 cmd <- 02

 1889 12:43:05.524889  PCI: 00:14.0 subsystem <- 8086/51ed

 1890 12:43:05.528382  PCI: 00:14.0 cmd <- 02

 1891 12:43:05.531767  PCI: 00:14.2 subsystem <- 8086/51ef

 1892 12:43:05.531854  PCI: 00:14.2 cmd <- 02

 1893 12:43:05.539054  PCI: 00:14.3 subsystem <- 8086/51f0

 1894 12:43:05.539503  PCI: 00:14.3 cmd <- 02

 1895 12:43:05.542087  PCI: 00:15.0 subsystem <- 8086/51e8

 1896 12:43:05.545256  PCI: 00:15.0 cmd <- 02

 1897 12:43:05.548641  PCI: 00:15.1 subsystem <- 8086/51e9

 1898 12:43:05.551387  PCI: 00:15.1 cmd <- 06

 1899 12:43:05.555715  PCI: 00:15.3 subsystem <- 8086/51eb

 1900 12:43:05.558578  PCI: 00:15.3 cmd <- 02

 1901 12:43:05.561422  PCI: 00:16.0 subsystem <- 8086/51e0

 1902 12:43:05.564713  PCI: 00:16.0 cmd <- 02

 1903 12:43:05.568238  PCI: 00:19.1 subsystem <- 8086/51c6

 1904 12:43:05.568697  PCI: 00:19.1 cmd <- 02

 1905 12:43:05.571382  PCI: 00:1e.0 subsystem <- 8086/51a8

 1906 12:43:05.574657  PCI: 00:1e.0 cmd <- 06

 1907 12:43:05.577897  PCI: 00:1e.3 subsystem <- 8086/51ab

 1908 12:43:05.581803  PCI: 00:1e.3 cmd <- 02

 1909 12:43:05.584837  PCI: 00:1f.0 subsystem <- 8086/5182

 1910 12:43:05.588074  PCI: 00:1f.0 cmd <- 407

 1911 12:43:05.591389  PCI: 00:1f.3 subsystem <- 8086/51c8

 1912 12:43:05.594741  PCI: 00:1f.3 cmd <- 02

 1913 12:43:05.598247  PCI: 00:1f.5 subsystem <- 8086/51a4

 1914 12:43:05.598593  PCI: 00:1f.5 cmd <- 406

 1915 12:43:05.601102  PCI: 01:00.0 cmd <- 02

 1916 12:43:05.601609  done.

 1917 12:43:05.608188  BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms

 1918 12:43:05.610782  ME: Version: Unavailable

 1919 12:43:05.617326  BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms

 1920 12:43:05.617722  Initializing devices...

 1921 12:43:05.620681  Root Device init

 1922 12:43:05.621025  mainboard: EC init

 1923 12:43:05.627301  Chrome EC: Set SMI mask to 0x0000000000000000

 1924 12:43:05.630864  Chrome EC: UHEPI supported

 1925 12:43:05.637431  Chrome EC: clear events_b mask to 0x0000000000000000

 1926 12:43:05.640383  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1927 12:43:05.648167  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e

 1928 12:43:05.654846  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e

 1929 12:43:05.661622  Chrome EC: Set WAKE mask to 0x0000000000000000

 1930 12:43:05.664229  Root Device init finished in 41 msecs

 1931 12:43:05.668300  PCI: 00:00.0 init

 1932 12:43:05.671424  CPU TDP = 15 Watts

 1933 12:43:05.671881  CPU PL1 = 15 Watts

 1934 12:43:05.674777  CPU PL2 = 55 Watts

 1935 12:43:05.677617  CPU PL4 = 123 Watts

 1936 12:43:05.681249  PCI: 00:00.0 init finished in 8 msecs

 1937 12:43:05.681728  PCI: 00:02.0 init

 1938 12:43:05.685200  GMA: Found VBT in CBFS

 1939 12:43:05.688451  GMA: Found valid VBT in CBFS

 1940 12:43:05.694383  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1941 12:43:05.701539                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000

 1942 12:43:05.704819  PCI: 00:02.0 init finished in 18 msecs

 1943 12:43:05.707695  PCI: 00:06.0 init

 1944 12:43:05.711360  Initializing PCH PCIe bridge.

 1945 12:43:05.714625  PCI: 00:06.0 init finished in 3 msecs

 1946 12:43:05.715096  PCI: 00:0a.0 init

 1947 12:43:05.720947  PCI: 00:0a.0 init finished in 0 msecs

 1948 12:43:05.721382  PCI: 00:14.0 init

 1949 12:43:05.724275  PCI: 00:14.0 init finished in 0 msecs

 1950 12:43:05.727579  PCI: 00:14.2 init

 1951 12:43:05.730982  PCI: 00:14.2 init finished in 0 msecs

 1952 12:43:05.734547  PCI: 00:15.0 init

 1953 12:43:05.735000  I2C bus 0 version 0x3230302a

 1954 12:43:05.741292  DW I2C bus 0 at 0x80655000 (400 KHz)

 1955 12:43:05.744056  PCI: 00:15.0 init finished in 6 msecs

 1956 12:43:05.744476  PCI: 00:15.1 init

 1957 12:43:05.747512  I2C bus 1 version 0x3230302a

 1958 12:43:05.751146  DW I2C bus 1 at 0x80656000 (400 KHz)

 1959 12:43:05.754119  PCI: 00:15.1 init finished in 6 msecs

 1960 12:43:05.757852  PCI: 00:15.3 init

 1961 12:43:05.760630  I2C bus 3 version 0x3230302a

 1962 12:43:05.763963  DW I2C bus 3 at 0x80657000 (400 KHz)

 1963 12:43:05.767332  PCI: 00:15.3 init finished in 6 msecs

 1964 12:43:05.770840  PCI: 00:16.0 init

 1965 12:43:05.773977  PCI: 00:16.0 init finished in 0 msecs

 1966 12:43:05.774526  PCI: 00:19.1 init

 1967 12:43:05.777384  I2C bus 5 version 0x3230302a

 1968 12:43:05.780505  DW I2C bus 5 at 0x80659000 (400 KHz)

 1969 12:43:05.787299  PCI: 00:19.1 init finished in 6 msecs

 1970 12:43:05.787784  PCI: 00:1f.0 init

 1971 12:43:05.790558  IOAPIC: Initializing IOAPIC at 0xfec00000

 1972 12:43:05.793511  IOAPIC: ID = 0x02

 1973 12:43:05.796758  IOAPIC: Dumping registers

 1974 12:43:05.800722    reg 0x0000: 0x02000000

 1975 12:43:05.801180    reg 0x0001: 0x00770020

 1976 12:43:05.803994    reg 0x0002: 0x00000000

 1977 12:43:05.806960  IOAPIC: 120 interrupts

 1978 12:43:05.810244  IOAPIC: Clearing IOAPIC at 0xfec00000

 1979 12:43:05.813305  IOAPIC: vector 0x00 value 0x00000000 0x00010000

 1980 12:43:05.820216  IOAPIC: vector 0x01 value 0x00000000 0x00010000

 1981 12:43:05.824053  IOAPIC: vector 0x02 value 0x00000000 0x00010000

 1982 12:43:05.830087  IOAPIC: vector 0x03 value 0x00000000 0x00010000

 1983 12:43:05.833579  IOAPIC: vector 0x04 value 0x00000000 0x00010000

 1984 12:43:05.840618  IOAPIC: vector 0x05 value 0x00000000 0x00010000

 1985 12:43:05.843477  IOAPIC: vector 0x06 value 0x00000000 0x00010000

 1986 12:43:05.850001  IOAPIC: vector 0x07 value 0x00000000 0x00010000

 1987 12:43:05.853438  IOAPIC: vector 0x08 value 0x00000000 0x00010000

 1988 12:43:05.856718  IOAPIC: vector 0x09 value 0x00000000 0x00010000

 1989 12:43:05.862870  IOAPIC: vector 0x0a value 0x00000000 0x00010000

 1990 12:43:05.866621  IOAPIC: vector 0x0b value 0x00000000 0x00010000

 1991 12:43:05.872546  IOAPIC: vector 0x0c value 0x00000000 0x00010000

 1992 12:43:05.875906  IOAPIC: vector 0x0d value 0x00000000 0x00010000

 1993 12:43:05.882890  IOAPIC: vector 0x0e value 0x00000000 0x00010000

 1994 12:43:05.886379  IOAPIC: vector 0x0f value 0x00000000 0x00010000

 1995 12:43:05.892716  IOAPIC: vector 0x10 value 0x00000000 0x00010000

 1996 12:43:05.895996  IOAPIC: vector 0x11 value 0x00000000 0x00010000

 1997 12:43:05.902760  IOAPIC: vector 0x12 value 0x00000000 0x00010000

 1998 12:43:05.906028  IOAPIC: vector 0x13 value 0x00000000 0x00010000

 1999 12:43:05.909045  IOAPIC: vector 0x14 value 0x00000000 0x00010000

 2000 12:43:05.915795  IOAPIC: vector 0x15 value 0x00000000 0x00010000

 2001 12:43:05.919274  IOAPIC: vector 0x16 value 0x00000000 0x00010000

 2002 12:43:05.925940  IOAPIC: vector 0x17 value 0x00000000 0x00010000

 2003 12:43:05.929512  IOAPIC: vector 0x18 value 0x00000000 0x00010000

 2004 12:43:05.935846  IOAPIC: vector 0x19 value 0x00000000 0x00010000

 2005 12:43:05.939118  IOAPIC: vector 0x1a value 0x00000000 0x00010000

 2006 12:43:05.945661  IOAPIC: vector 0x1b value 0x00000000 0x00010000

 2007 12:43:05.949182  IOAPIC: vector 0x1c value 0x00000000 0x00010000

 2008 12:43:05.955374  IOAPIC: vector 0x1d value 0x00000000 0x00010000

 2009 12:43:05.958689  IOAPIC: vector 0x1e value 0x00000000 0x00010000

 2010 12:43:05.962096  IOAPIC: vector 0x1f value 0x00000000 0x00010000

 2011 12:43:05.968618  IOAPIC: vector 0x20 value 0x00000000 0x00010000

 2012 12:43:05.972633  IOAPIC: vector 0x21 value 0x00000000 0x00010000

 2013 12:43:05.978594  IOAPIC: vector 0x22 value 0x00000000 0x00010000

 2014 12:43:05.982215  IOAPIC: vector 0x23 value 0x00000000 0x00010000

 2015 12:43:05.988726  IOAPIC: vector 0x24 value 0x00000000 0x00010000

 2016 12:43:05.991902  IOAPIC: vector 0x25 value 0x00000000 0x00010000

 2017 12:43:05.998625  IOAPIC: vector 0x26 value 0x00000000 0x00010000

 2018 12:43:06.001614  IOAPIC: vector 0x27 value 0x00000000 0x00010000

 2019 12:43:06.008598  IOAPIC: vector 0x28 value 0x00000000 0x00010000

 2020 12:43:06.011896  IOAPIC: vector 0x29 value 0x00000000 0x00010000

 2021 12:43:06.015295  IOAPIC: vector 0x2a value 0x00000000 0x00010000

 2022 12:43:06.021547  IOAPIC: vector 0x2b value 0x00000000 0x00010000

 2023 12:43:06.024709  IOAPIC: vector 0x2c value 0x00000000 0x00010000

 2024 12:43:06.030862  IOAPIC: vector 0x2d value 0x00000000 0x00010000

 2025 12:43:06.034550  IOAPIC: vector 0x2e value 0x00000000 0x00010000

 2026 12:43:06.040713  IOAPIC: vector 0x2f value 0x00000000 0x00010000

 2027 12:43:06.044238  IOAPIC: vector 0x30 value 0x00000000 0x00010000

 2028 12:43:06.050943  IOAPIC: vector 0x31 value 0x00000000 0x00010000

 2029 12:43:06.054512  IOAPIC: vector 0x32 value 0x00000000 0x00010000

 2030 12:43:06.057747  IOAPIC: vector 0x33 value 0x00000000 0x00010000

 2031 12:43:06.064760  IOAPIC: vector 0x34 value 0x00000000 0x00010000

 2032 12:43:06.067805  IOAPIC: vector 0x35 value 0x00000000 0x00010000

 2033 12:43:06.074337  IOAPIC: vector 0x36 value 0x00000000 0x00010000

 2034 12:43:06.077820  IOAPIC: vector 0x37 value 0x00000000 0x00010000

 2035 12:43:06.084613  IOAPIC: vector 0x38 value 0x00000000 0x00010000

 2036 12:43:06.087879  IOAPIC: vector 0x39 value 0x00000000 0x00010000

 2037 12:43:06.094772  IOAPIC: vector 0x3a value 0x00000000 0x00010000

 2038 12:43:06.097750  IOAPIC: vector 0x3b value 0x00000000 0x00010000

 2039 12:43:06.101044  IOAPIC: vector 0x3c value 0x00000000 0x00010000

 2040 12:43:06.107408  IOAPIC: vector 0x3d value 0x00000000 0x00010000

 2041 12:43:06.110736  IOAPIC: vector 0x3e value 0x00000000 0x00010000

 2042 12:43:06.117177  IOAPIC: vector 0x3f value 0x00000000 0x00010000

 2043 12:43:06.121028  IOAPIC: vector 0x40 value 0x00000000 0x00010000

 2044 12:43:06.127062  IOAPIC: vector 0x41 value 0x00000000 0x00010000

 2045 12:43:06.130490  IOAPIC: vector 0x42 value 0x00000000 0x00010000

 2046 12:43:06.137428  IOAPIC: vector 0x43 value 0x00000000 0x00010000

 2047 12:43:06.141703  IOAPIC: vector 0x44 value 0x00000000 0x00010000

 2048 12:43:06.144267  IOAPIC: vector 0x45 value 0x00000000 0x00010000

 2049 12:43:06.150709  IOAPIC: vector 0x46 value 0x00000000 0x00010000

 2050 12:43:06.154106  IOAPIC: vector 0x47 value 0x00000000 0x00010000

 2051 12:43:06.160466  IOAPIC: vector 0x48 value 0x00000000 0x00010000

 2052 12:43:06.163905  IOAPIC: vector 0x49 value 0x00000000 0x00010000

 2053 12:43:06.170779  IOAPIC: vector 0x4a value 0x00000000 0x00010000

 2054 12:43:06.173962  IOAPIC: vector 0x4b value 0x00000000 0x00010000

 2055 12:43:06.180708  IOAPIC: vector 0x4c value 0x00000000 0x00010000

 2056 12:43:06.184174  IOAPIC: vector 0x4d value 0x00000000 0x00010000

 2057 12:43:06.190559  IOAPIC: vector 0x4e value 0x00000000 0x00010000

 2058 12:43:06.193833  IOAPIC: vector 0x4f value 0x00000000 0x00010000

 2059 12:43:06.196896  IOAPIC: vector 0x50 value 0x00000000 0x00010000

 2060 12:43:06.204159  IOAPIC: vector 0x51 value 0x00000000 0x00010000

 2061 12:43:06.206772  IOAPIC: vector 0x52 value 0x00000000 0x00010000

 2062 12:43:06.213845  IOAPIC: vector 0x53 value 0x00000000 0x00010000

 2063 12:43:06.217536  IOAPIC: vector 0x54 value 0x00000000 0x00010000

 2064 12:43:06.223760  IOAPIC: vector 0x55 value 0x00000000 0x00010000

 2065 12:43:06.227111  IOAPIC: vector 0x56 value 0x00000000 0x00010000

 2066 12:43:06.233229  IOAPIC: vector 0x57 value 0x00000000 0x00010000

 2067 12:43:06.236638  IOAPIC: vector 0x58 value 0x00000000 0x00010000

 2068 12:43:06.240029  IOAPIC: vector 0x59 value 0x00000000 0x00010000

 2069 12:43:06.247287  IOAPIC: vector 0x5a value 0x00000000 0x00010000

 2070 12:43:06.250449  IOAPIC: vector 0x5b value 0x00000000 0x00010000

 2071 12:43:06.256633  IOAPIC: vector 0x5c value 0x00000000 0x00010000

 2072 12:43:06.260580  IOAPIC: vector 0x5d value 0x00000000 0x00010000

 2073 12:43:06.267025  IOAPIC: vector 0x5e value 0x00000000 0x00010000

 2074 12:43:06.270555  IOAPIC: vector 0x5f value 0x00000000 0x00010000

 2075 12:43:06.273602  IOAPIC: vector 0x60 value 0x00000000 0x00010000

 2076 12:43:06.280359  IOAPIC: vector 0x61 value 0x00000000 0x00010000

 2077 12:43:06.283559  IOAPIC: vector 0x62 value 0x00000000 0x00010000

 2078 12:43:06.289950  IOAPIC: vector 0x63 value 0x00000000 0x00010000

 2079 12:43:06.293520  IOAPIC: vector 0x64 value 0x00000000 0x00010000

 2080 12:43:06.300166  IOAPIC: vector 0x65 value 0x00000000 0x00010000

 2081 12:43:06.303376  IOAPIC: vector 0x66 value 0x00000000 0x00010000

 2082 12:43:06.309726  IOAPIC: vector 0x67 value 0x00000000 0x00010000

 2083 12:43:06.313000  IOAPIC: vector 0x68 value 0x00000000 0x00010000

 2084 12:43:06.316211  IOAPIC: vector 0x69 value 0x00000000 0x00010000

 2085 12:43:06.323487  IOAPIC: vector 0x6a value 0x00000000 0x00010000

 2086 12:43:06.326725  IOAPIC: vector 0x6b value 0x00000000 0x00010000

 2087 12:43:06.333385  IOAPIC: vector 0x6c value 0x00000000 0x00010000

 2088 12:43:06.336579  IOAPIC: vector 0x6d value 0x00000000 0x00010000

 2089 12:43:06.343797  IOAPIC: vector 0x6e value 0x00000000 0x00010000

 2090 12:43:06.346912  IOAPIC: vector 0x6f value 0x00000000 0x00010000

 2091 12:43:06.353406  IOAPIC: vector 0x70 value 0x00000000 0x00010000

 2092 12:43:06.356441  IOAPIC: vector 0x71 value 0x00000000 0x00010000

 2093 12:43:06.359815  IOAPIC: vector 0x72 value 0x00000000 0x00010000

 2094 12:43:06.366641  IOAPIC: vector 0x73 value 0x00000000 0x00010000

 2095 12:43:06.369966  IOAPIC: vector 0x74 value 0x00000000 0x00010000

 2096 12:43:06.376247  IOAPIC: vector 0x75 value 0x00000000 0x00010000

 2097 12:43:06.379414  IOAPIC: vector 0x76 value 0x00000000 0x00010000

 2098 12:43:06.386137  IOAPIC: vector 0x77 value 0x00000000 0x00010000

 2099 12:43:06.389298  IOAPIC: Bootstrap Processor Local APIC = 0x00

 2100 12:43:06.395915  IOAPIC: vector 0x00 value 0x00000000 0x00000700

 2101 12:43:06.399381  PCI: 00:1f.0 init finished in 607 msecs

 2102 12:43:06.399754  PCI: 00:1f.2 init

 2103 12:43:06.402854  apm_control: Disabling ACPI.

 2104 12:43:06.407841  APMC done.

 2105 12:43:06.411496  PCI: 00:1f.2 init finished in 6 msecs

 2106 12:43:06.414541  PCI: 00:1f.3 init

 2107 12:43:06.417970  PCI: 00:1f.3 init finished in 0 msecs

 2108 12:43:06.418335  PCI: 01:00.0 init

 2109 12:43:06.420977  PCI: 01:00.0 init finished in 0 msecs

 2110 12:43:06.423746  PNP: 0c09.0 init

 2111 12:43:06.426969  Google Chrome EC uptime: 12.162 seconds

 2112 12:43:06.434068  Google Chrome AP resets since EC boot: 1

 2113 12:43:06.437260  Google Chrome most recent AP reset causes:

 2114 12:43:06.440632  	0.341: 32775 shutdown: entering G3

 2115 12:43:06.447545  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 2116 12:43:06.451139  PNP: 0c09.0 init finished in 23 msecs

 2117 12:43:06.453546  GENERIC: 0.0 init

 2118 12:43:06.457300  GENERIC: 0.0 init finished in 0 msecs

 2119 12:43:06.457687  GENERIC: 1.0 init

 2120 12:43:06.464252  GENERIC: 1.0 init finished in 0 msecs

 2121 12:43:06.464748  Devices initialized

 2122 12:43:06.467426  Show all devs... After init.

 2123 12:43:06.470184  Root Device: enabled 1

 2124 12:43:06.473842  CPU_CLUSTER: 0: enabled 1

 2125 12:43:06.474191  DOMAIN: 0000: enabled 1

 2126 12:43:06.476991  GPIO: 0: enabled 1

 2127 12:43:06.480192  PCI: 00:00.0: enabled 1

 2128 12:43:06.480541  PCI: 00:01.0: enabled 0

 2129 12:43:06.483934  PCI: 00:01.1: enabled 0

 2130 12:43:06.486815  PCI: 00:02.0: enabled 1

 2131 12:43:06.490185  PCI: 00:04.0: enabled 1

 2132 12:43:06.490592  PCI: 00:05.0: enabled 0

 2133 12:43:06.493499  PCI: 00:06.0: enabled 1

 2134 12:43:06.496808  PCI: 00:06.2: enabled 0

 2135 12:43:06.499773  PCI: 00:07.0: enabled 0

 2136 12:43:06.499849  PCI: 00:07.1: enabled 0

 2137 12:43:06.502971  PCI: 00:07.2: enabled 0

 2138 12:43:06.506901  PCI: 00:07.3: enabled 0

 2139 12:43:06.510259  PCI: 00:08.0: enabled 0

 2140 12:43:06.510618  PCI: 00:09.0: enabled 0

 2141 12:43:06.513557  PCI: 00:0a.0: enabled 1

 2142 12:43:06.516341  PCI: 00:0d.0: enabled 1

 2143 12:43:06.519534  PCI: 00:0d.1: enabled 0

 2144 12:43:06.519611  PCI: 00:0d.2: enabled 0

 2145 12:43:06.522806  PCI: 00:0d.3: enabled 0

 2146 12:43:06.526335  PCI: 00:0e.0: enabled 0

 2147 12:43:06.529718  PCI: 00:10.0: enabled 0

 2148 12:43:06.530089  PCI: 00:10.1: enabled 0

 2149 12:43:06.533266  PCI: 00:10.6: enabled 0

 2150 12:43:06.536710  PCI: 00:10.7: enabled 0

 2151 12:43:06.537172  PCI: 00:12.0: enabled 0

 2152 12:43:06.539860  PCI: 00:12.6: enabled 0

 2153 12:43:06.542925  PCI: 00:12.7: enabled 0

 2154 12:43:06.546662  PCI: 00:13.0: enabled 0

 2155 12:43:06.547120  PCI: 00:14.0: enabled 1

 2156 12:43:06.549871  PCI: 00:14.1: enabled 0

 2157 12:43:06.553176  PCI: 00:14.2: enabled 1

 2158 12:43:06.555982  PCI: 00:14.3: enabled 1

 2159 12:43:06.556367  PCI: 00:15.0: enabled 1

 2160 12:43:06.559623  PCI: 00:15.1: enabled 1

 2161 12:43:06.562947  PCI: 00:15.2: enabled 0

 2162 12:43:06.566265  PCI: 00:15.3: enabled 1

 2163 12:43:06.566610  PCI: 00:16.0: enabled 1

 2164 12:43:06.569270  PCI: 00:16.1: enabled 0

 2165 12:43:06.572664  PCI: 00:16.2: enabled 0

 2166 12:43:06.576143  PCI: 00:16.3: enabled 0

 2167 12:43:06.576451  PCI: 00:16.4: enabled 0

 2168 12:43:06.578996  PCI: 00:16.5: enabled 0

 2169 12:43:06.583132  PCI: 00:17.0: enabled 0

 2170 12:43:06.583588  PCI: 00:19.0: enabled 0

 2171 12:43:06.586031  PCI: 00:19.1: enabled 1

 2172 12:43:06.589074  PCI: 00:19.2: enabled 0

 2173 12:43:06.592644  PCI: 00:1a.0: enabled 0

 2174 12:43:06.593015  PCI: 00:1c.0: enabled 0

 2175 12:43:06.595822  PCI: 00:1c.1: enabled 0

 2176 12:43:06.599122  PCI: 00:1c.2: enabled 0

 2177 12:43:06.603097  PCI: 00:1c.3: enabled 0

 2178 12:43:06.603549  PCI: 00:1c.4: enabled 0

 2179 12:43:06.605939  PCI: 00:1c.5: enabled 0

 2180 12:43:06.609907  PCI: 00:1c.6: enabled 0

 2181 12:43:06.612534  PCI: 00:1c.7: enabled 0

 2182 12:43:06.612941  PCI: 00:1d.0: enabled 0

 2183 12:43:06.616252  PCI: 00:1d.1: enabled 0

 2184 12:43:06.619574  PCI: 00:1d.2: enabled 0

 2185 12:43:06.622354  PCI: 00:1d.3: enabled 0

 2186 12:43:06.622710  PCI: 00:1e.0: enabled 1

 2187 12:43:06.626364  PCI: 00:1e.1: enabled 0

 2188 12:43:06.629824  PCI: 00:1e.2: enabled 0

 2189 12:43:06.630274  PCI: 00:1e.3: enabled 1

 2190 12:43:06.632522  PCI: 00:1f.0: enabled 1

 2191 12:43:06.636196  PCI: 00:1f.1: enabled 0

 2192 12:43:06.639291  PCI: 00:1f.2: enabled 1

 2193 12:43:06.639643  PCI: 00:1f.3: enabled 1

 2194 12:43:06.642874  PCI: 00:1f.4: enabled 0

 2195 12:43:06.646091  PCI: 00:1f.5: enabled 1

 2196 12:43:06.649200  PCI: 00:1f.6: enabled 0

 2197 12:43:06.649586  PCI: 00:1f.7: enabled 0

 2198 12:43:06.652416  GENERIC: 0.0: enabled 1

 2199 12:43:06.655704  GENERIC: 0.0: enabled 1

 2200 12:43:06.659249  GENERIC: 1.0: enabled 1

 2201 12:43:06.659618  GENERIC: 0.0: enabled 1

 2202 12:43:06.662571  GENERIC: 1.0: enabled 1

 2203 12:43:06.665864  USB0 port 0: enabled 1

 2204 12:43:06.666206  USB0 port 0: enabled 1

 2205 12:43:06.668999  GENERIC: 0.0: enabled 1

 2206 12:43:06.672633  I2C: 00:1a: enabled 1

 2207 12:43:06.675564  I2C: 00:31: enabled 1

 2208 12:43:06.675975  I2C: 00:32: enabled 1

 2209 12:43:06.678602  I2C: 00:50: enabled 1

 2210 12:43:06.682505  I2C: 00:10: enabled 1

 2211 12:43:06.682958  I2C: 00:15: enabled 1

 2212 12:43:06.685651  I2C: 00:2c: enabled 1

 2213 12:43:06.688808  GENERIC: 0.0: enabled 1

 2214 12:43:06.689165  SPI: 00: enabled 1

 2215 12:43:06.692375  PNP: 0c09.0: enabled 1

 2216 12:43:06.695602  GENERIC: 0.0: enabled 1

 2217 12:43:06.695947  USB3 port 0: enabled 1

 2218 12:43:06.698741  USB3 port 1: enabled 0

 2219 12:43:06.702739  USB3 port 2: enabled 1

 2220 12:43:06.705535  USB3 port 3: enabled 0

 2221 12:43:06.705876  USB2 port 0: enabled 1

 2222 12:43:06.708896  USB2 port 1: enabled 0

 2223 12:43:06.712042  USB2 port 2: enabled 1

 2224 12:43:06.712393  USB2 port 3: enabled 0

 2225 12:43:06.715304  USB2 port 4: enabled 0

 2226 12:43:06.718752  USB2 port 5: enabled 1

 2227 12:43:06.719092  USB2 port 6: enabled 0

 2228 12:43:06.722073  USB2 port 7: enabled 0

 2229 12:43:06.725669  USB2 port 8: enabled 1

 2230 12:43:06.728645  USB2 port 9: enabled 1

 2231 12:43:06.729034  USB3 port 0: enabled 1

 2232 12:43:06.731983  USB3 port 1: enabled 0

 2233 12:43:06.735212  USB3 port 2: enabled 0

 2234 12:43:06.735554  USB3 port 3: enabled 0

 2235 12:43:06.738839  GENERIC: 0.0: enabled 1

 2236 12:43:06.742158  GENERIC: 1.0: enabled 1

 2237 12:43:06.742478  APIC: 00: enabled 1

 2238 12:43:06.745373  APIC: 16: enabled 1

 2239 12:43:06.748971  APIC: 10: enabled 1

 2240 12:43:06.749493  APIC: 12: enabled 1

 2241 12:43:06.752378  APIC: 14: enabled 1

 2242 12:43:06.755811  APIC: 01: enabled 1

 2243 12:43:06.756309  APIC: 09: enabled 1

 2244 12:43:06.758615  APIC: 08: enabled 1

 2245 12:43:06.761901  PCI: 01:00.0: enabled 1

 2246 12:43:06.765520  BS: BS_DEV_INIT run times (exec / console): 11 / 1133 ms

 2247 12:43:06.772443  FMAP: area RW_ELOG found @ f20000 (16384 bytes)

 2248 12:43:06.775579  ELOG: NV offset 0xf20000 size 0x4000

 2249 12:43:06.782502  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 2250 12:43:06.788981  ELOG: Event(17) added with size 13 at 2024-03-05 12:43:06 UTC

 2251 12:43:06.795403  ELOG: Event(9E) added with size 10 at 2024-03-05 12:43:06 UTC

 2252 12:43:06.802388  ELOG: Event(9F) added with size 14 at 2024-03-05 12:43:06 UTC

 2253 12:43:06.808600  BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms

 2254 12:43:06.815429  ELOG: Event(A0) added with size 9 at 2024-03-05 12:43:06 UTC

 2255 12:43:06.818760  elog_add_boot_reason: Logged dev mode boot

 2256 12:43:06.825182  BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms

 2257 12:43:06.825644  Finalize devices...

 2258 12:43:06.828790  PCI: 00:16.0 final

 2259 12:43:06.832183  PCI: 00:1f.2 final

 2260 12:43:06.832637  GENERIC: 0.0 final

 2261 12:43:06.838348  added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0

 2262 12:43:06.841293  GENERIC: 1.0 final

 2263 12:43:06.845299  added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0

 2264 12:43:06.848774  Devices finalized

 2265 12:43:06.855038  BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms

 2266 12:43:06.858362  FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)

 2267 12:43:06.864278  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 2268 12:43:06.871398  ME: HFSTS1                      : 0x90000245

 2269 12:43:06.875082  ME: HFSTS2                      : 0x82100116

 2270 12:43:06.878009  ME: HFSTS3                      : 0x00000050

 2271 12:43:06.884861  ME: HFSTS4                      : 0x00004000

 2272 12:43:06.888111  ME: HFSTS5                      : 0x00000000

 2273 12:43:06.891287  ME: HFSTS6                      : 0x40600006

 2274 12:43:06.894817  ME: Manufacturing Mode          : NO

 2275 12:43:06.901054  ME: SPI Protection Mode Enabled : YES

 2276 12:43:06.904416  ME: FPFs Committed              : YES

 2277 12:43:06.907956  ME: Manufacturing Vars Locked   : YES

 2278 12:43:06.911040  ME: FW Partition Table          : OK

 2279 12:43:06.914204  ME: Bringup Loader Failure      : NO

 2280 12:43:06.918006  ME: Firmware Init Complete      : YES

 2281 12:43:06.920992  ME: Boot Options Present        : NO

 2282 12:43:06.924875  ME: Update In Progress          : NO

 2283 12:43:06.931034  ME: D0i3 Support                : YES

 2284 12:43:06.934466  ME: Low Power State Enabled     : NO

 2285 12:43:06.937701  ME: CPU Replaced                : YES

 2286 12:43:06.941192  ME: CPU Replacement Valid       : YES

 2287 12:43:06.944251  ME: Current Working State       : 5

 2288 12:43:06.947625  ME: Current Operation State     : 1

 2289 12:43:06.950850  ME: Current Operation Mode      : 0

 2290 12:43:06.954026  ME: Error Code                  : 0

 2291 12:43:06.957662  ME: Enhanced Debug Mode         : NO

 2292 12:43:06.963877  ME: CPU Debug Disabled          : YES

 2293 12:43:06.967532  ME: TXT Support                 : NO

 2294 12:43:06.970731  ME: WP for RO is enabled        : YES

 2295 12:43:06.977001  ME: RO write protection scope - Start=0x1000, End=0x15AFFF

 2296 12:43:06.983891  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms

 2297 12:43:06.988026  Ramoops buffer: 0x100000@0x76899000.

 2298 12:43:06.990599  BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms

 2299 12:43:07.000573  CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c

 2300 12:43:07.003933  CBFS: 'fallback/slic' not found.

 2301 12:43:07.007186  ACPI: Writing ACPI tables at 7686d000.

 2302 12:43:07.007473  ACPI:    * FACS

 2303 12:43:07.010477  ACPI:    * DSDT

 2304 12:43:07.016895  PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000

 2305 12:43:07.020375  ACPI:    * FADT

 2306 12:43:07.020827  SCI is IRQ9

 2307 12:43:07.027479  ACPI: added table 1/32, length now 40

 2308 12:43:07.027899  ACPI:     * SSDT

 2309 12:43:07.033536  Found 1 CPU(s) with 6/8 physical/logical core(s) each.

 2310 12:43:07.036502  \_SB.PCI0.PEPD: Intel Power Engine Plug-in

 2311 12:43:07.043271  \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2

 2312 12:43:07.046449  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 2313 12:43:07.053613  CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4

 2314 12:43:07.056637  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 2315 12:43:07.063438  \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0

 2316 12:43:07.070046  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 2317 12:43:07.073503  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 2318 12:43:07.079979  \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50

 2319 12:43:07.083555  \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10

 2320 12:43:07.090120  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 2321 12:43:07.093565  \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c

 2322 12:43:07.100128  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 2323 12:43:07.106857  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 2324 12:43:07.109289  PS2K: Passing 80 keymaps to kernel

 2325 12:43:07.116386  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 2326 12:43:07.122935  \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2

 2327 12:43:07.129956  \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0

 2328 12:43:07.136592  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 2329 12:43:07.139871  \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5

 2330 12:43:07.146250  \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8

 2331 12:43:07.152959  \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9

 2332 12:43:07.159555  \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0

 2333 12:43:07.166161  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 2334 12:43:07.172881  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 2335 12:43:07.176173  ACPI: added table 2/32, length now 44

 2336 12:43:07.179319  ACPI:    * MCFG

 2337 12:43:07.182647  ACPI: added table 3/32, length now 48

 2338 12:43:07.182991  ACPI:    * TPM2

 2339 12:43:07.185503  TPM2 log created at 0x7685d000

 2340 12:43:07.188590  ACPI: added table 4/32, length now 52

 2341 12:43:07.192387  ACPI:     * LPIT

 2342 12:43:07.195669  ACPI: added table 5/32, length now 56

 2343 12:43:07.195742  ACPI:    * MADT

 2344 12:43:07.198712  SCI is IRQ9

 2345 12:43:07.202384  ACPI: added table 6/32, length now 60

 2346 12:43:07.205979  cmd_reg from pmc_make_ipc_cmd 1052838

 2347 12:43:07.212586  CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc

 2348 12:43:07.219132  CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200

 2349 12:43:07.226087  CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00

 2350 12:43:07.229092  PMC CrashLog size in discovery mode: 0xC00

 2351 12:43:07.232046  cpu crashlog bar addr: 0x80640000

 2352 12:43:07.235982  cpu discovery table offset: 0x6030

 2353 12:43:07.239387  cpu_crashlog_discovery_table buffer count: 0x3

 2354 12:43:07.245840  cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0

 2355 12:43:07.252712  cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000

 2356 12:43:07.258513  cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000

 2357 12:43:07.265044  PMC crashLog size in discovery mode : 0xC00

 2358 12:43:07.271925  Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.

 2359 12:43:07.275289  discover mode PMC crashlog size adjusted to: 0x200

 2360 12:43:07.281729  Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.

 2361 12:43:07.288599  discover mode PMC crashlog size adjusted to: 0x0

 2362 12:43:07.292076  m_cpu_crashLog_size : 0x3480 bytes

 2363 12:43:07.295513  CPU crashLog present.

 2364 12:43:07.298888  CPU crash data size: 0x3480 bytes in 0x3 region(s).

 2365 12:43:07.305495  Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.

 2366 12:43:07.308649  current = 76876550

 2367 12:43:07.309102  ACPI:    * DMAR

 2368 12:43:07.315778  ACPI: added table 7/32, length now 64

 2369 12:43:07.318508  ACPI: added table 8/32, length now 68

 2370 12:43:07.318960  ACPI:    * HPET

 2371 12:43:07.322323  ACPI: added table 9/32, length now 72

 2372 12:43:07.325184  ACPI: done.

 2373 12:43:07.328478  ACPI tables: 38528 bytes.

 2374 12:43:07.328936  smbios_write_tables: 76857000

 2375 12:43:07.334684  EC returned error result code 3

 2376 12:43:07.337555  Couldn't obtain OEM name from CBI

 2377 12:43:07.341061  Create SMBIOS type 16

 2378 12:43:07.344175  Create SMBIOS type 17

 2379 12:43:07.344245  Create SMBIOS type 20

 2380 12:43:07.347181  GENERIC: 0.0 (WIFI Device)

 2381 12:43:07.351219  SMBIOS tables: 2156 bytes.

 2382 12:43:07.354009  Writing table forward entry at 0x00000500

 2383 12:43:07.360887  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955

 2384 12:43:07.364505  Writing coreboot table at 0x76891000

 2385 12:43:07.370831   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 2386 12:43:07.377174   1. 0000000000001000-000000000009ffff: RAM

 2387 12:43:07.380608   2. 00000000000a0000-00000000000fffff: RESERVED

 2388 12:43:07.383962   3. 0000000000100000-0000000076856fff: RAM

 2389 12:43:07.390931   4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES

 2390 12:43:07.397489   5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE

 2391 12:43:07.400787   6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES

 2392 12:43:07.407494   7. 0000000077000000-00000000803fffff: RESERVED

 2393 12:43:07.410394   8. 00000000c0000000-00000000cfffffff: RESERVED

 2394 12:43:07.416973   9. 00000000f8000000-00000000f9ffffff: RESERVED

 2395 12:43:07.420746  10. 00000000fb000000-00000000fb000fff: RESERVED

 2396 12:43:07.427488  11. 00000000fc800000-00000000fe7fffff: RESERVED

 2397 12:43:07.430678  12. 00000000feb00000-00000000feb7ffff: RESERVED

 2398 12:43:07.433796  13. 00000000fec00000-00000000fecfffff: RESERVED

 2399 12:43:07.440177  14. 00000000fed40000-00000000fed6ffff: RESERVED

 2400 12:43:07.443597  15. 00000000fed80000-00000000fed87fff: RESERVED

 2401 12:43:07.449874  16. 00000000fed90000-00000000fed92fff: RESERVED

 2402 12:43:07.453380  17. 00000000feda0000-00000000feda1fff: RESERVED

 2403 12:43:07.459964  18. 00000000fedc0000-00000000feddffff: RESERVED

 2404 12:43:07.463432  19. 0000000100000000-000000027fbfffff: RAM

 2405 12:43:07.467150  Passing 4 GPIOs to payload:

 2406 12:43:07.470381              NAME |       PORT | POLARITY |     VALUE

 2407 12:43:07.477071               lid |  undefined |     high |      high

 2408 12:43:07.483861             power |  undefined |     high |       low

 2409 12:43:07.486920             oprom |  undefined |     high |       low

 2410 12:43:07.493180          EC in RW | 0x00000151 |     high |      high

 2411 12:43:07.493574  Board ID: 3

 2412 12:43:07.496457  FW config: 0x131

 2413 12:43:07.503380  Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum c641

 2414 12:43:07.503833  coreboot table: 1788 bytes.

 2415 12:43:07.509951  IMD ROOT    0. 0x76fff000 0x00001000

 2416 12:43:07.513370  IMD SMALL   1. 0x76ffe000 0x00001000

 2417 12:43:07.516937  FSP MEMORY  2. 0x76afe000 0x00500000

 2418 12:43:07.519898  CONSOLE     3. 0x76ade000 0x00020000

 2419 12:43:07.523073  RW MCACHE   4. 0x76add000 0x0000043c

 2420 12:43:07.526237  RO MCACHE   5. 0x76adc000 0x00000fd8

 2421 12:43:07.530058  FMAP        6. 0x76adb000 0x0000064a

 2422 12:43:07.533107  TIME STAMP  7. 0x76ada000 0x00000910

 2423 12:43:07.540197  VBOOT WORK  8. 0x76ac6000 0x00014000

 2424 12:43:07.543657  MEM INFO    9. 0x76ac5000 0x000003b8

 2425 12:43:07.546508  ROMSTG STCK10. 0x76ac4000 0x00001000

 2426 12:43:07.549824  AFTER CAR  11. 0x76ab8000 0x0000c000

 2427 12:43:07.553282  RAMSTAGE   12. 0x76a2e000 0x0008a000

 2428 12:43:07.556190  ACPI BERT  13. 0x76a1e000 0x00010000

 2429 12:43:07.559615  CHROMEOS NVS14. 0x76a1d000 0x00000f00

 2430 12:43:07.563209  REFCODE    15. 0x769ae000 0x0006f000

 2431 12:43:07.569658  SMM BACKUP 16. 0x7699e000 0x00010000

 2432 12:43:07.572683  IGD OPREGION17. 0x76999000 0x00004203

 2433 12:43:07.575981  RAMOOPS    18. 0x76899000 0x00100000

 2434 12:43:07.579571  COREBOOT   19. 0x76891000 0x00008000

 2435 12:43:07.582905  ACPI       20. 0x7686d000 0x00024000

 2436 12:43:07.586134  TPM2 TCGLOG21. 0x7685d000 0x00010000

 2437 12:43:07.589774  PMC CRASHLOG22. 0x7685c000 0x00000c00

 2438 12:43:07.596054  CPU CRASHLOG23. 0x76858000 0x00003480

 2439 12:43:07.599316  SMBIOS     24. 0x76857000 0x00001000

 2440 12:43:07.599628  IMD small region:

 2441 12:43:07.606147    IMD ROOT    0. 0x76ffec00 0x00000400

 2442 12:43:07.609107    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 2443 12:43:07.612154    VPD         2. 0x76ffeb80 0x00000058

 2444 12:43:07.615451    POWER STATE 3. 0x76ffeb20 0x00000044

 2445 12:43:07.618989    ROMSTAGE    4. 0x76ffeb00 0x00000004

 2446 12:43:07.622584    ACPI GNVS   5. 0x76ffeaa0 0x00000048

 2447 12:43:07.629354    TYPE_C INFO 6. 0x76ffea80 0x0000000c

 2448 12:43:07.632555  BS: BS_WRITE_TABLES run times (exec / console): 7 / 628 ms

 2449 12:43:07.635664  MTRR: Physical address space:

 2450 12:43:07.641973  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 2451 12:43:07.648648  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 2452 12:43:07.655176  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 2453 12:43:07.661589  0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0

 2454 12:43:07.668484  0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1

 2455 12:43:07.674934  0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0

 2456 12:43:07.681705  0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6

 2457 12:43:07.684685  MTRR: Fixed MSR 0x250 0x0606060606060606

 2458 12:43:07.688839  MTRR: Fixed MSR 0x258 0x0606060606060606

 2459 12:43:07.692144  MTRR: Fixed MSR 0x259 0x0000000000000000

 2460 12:43:07.698557  MTRR: Fixed MSR 0x268 0x0606060606060606

 2461 12:43:07.701464  MTRR: Fixed MSR 0x269 0x0606060606060606

 2462 12:43:07.704856  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2463 12:43:07.708528  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2464 12:43:07.711708  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2465 12:43:07.718190  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2466 12:43:07.721775  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2467 12:43:07.724935  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2468 12:43:07.729110  call enable_fixed_mtrr()

 2469 12:43:07.732402  CPU physical address size: 39 bits

 2470 12:43:07.739219  MTRR: default type WB/UC MTRR counts: 6/6.

 2471 12:43:07.742091  MTRR: UC selected as default type.

 2472 12:43:07.748491  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 2473 12:43:07.751600  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 2474 12:43:07.758270  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 2475 12:43:07.765224  MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1

 2476 12:43:07.771794  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 2477 12:43:07.778234  MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6

 2478 12:43:07.785181  MTRR: Fixed MSR 0x250 0x0606060606060606

 2479 12:43:07.788453  MTRR: Fixed MSR 0x258 0x0606060606060606

 2480 12:43:07.791647  MTRR: Fixed MSR 0x259 0x0000000000000000

 2481 12:43:07.794951  MTRR: Fixed MSR 0x268 0x0606060606060606

 2482 12:43:07.801637  MTRR: Fixed MSR 0x269 0x0606060606060606

 2483 12:43:07.804698  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2484 12:43:07.807754  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2485 12:43:07.810948  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2486 12:43:07.818114  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2487 12:43:07.821661  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2488 12:43:07.824972  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2489 12:43:07.827956  MTRR: Fixed MSR 0x250 0x0606060606060606

 2490 12:43:07.834500  MTRR: Fixed MSR 0x250 0x0606060606060606

 2491 12:43:07.838067  MTRR: Fixed MSR 0x258 0x0606060606060606

 2492 12:43:07.841205  MTRR: Fixed MSR 0x259 0x0000000000000000

 2493 12:43:07.844772  MTRR: Fixed MSR 0x268 0x0606060606060606

 2494 12:43:07.847905  MTRR: Fixed MSR 0x269 0x0606060606060606

 2495 12:43:07.854536  MTRR: Fixed MSR 0x250 0x0606060606060606

 2496 12:43:07.857948  MTRR: Fixed MSR 0x250 0x0606060606060606

 2497 12:43:07.861058  MTRR: Fixed MSR 0x258 0x0606060606060606

 2498 12:43:07.864661  MTRR: Fixed MSR 0x259 0x0000000000000000

 2499 12:43:07.871276  MTRR: Fixed MSR 0x268 0x0606060606060606

 2500 12:43:07.874936  MTRR: Fixed MSR 0x269 0x0606060606060606

 2501 12:43:07.877651  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2502 12:43:07.881793  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2503 12:43:07.888041  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2504 12:43:07.891020  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2505 12:43:07.894375  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2506 12:43:07.898000  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2507 12:43:07.901702  call enable_fixed_mtrr()

 2508 12:43:07.904558  MTRR: Fixed MSR 0x258 0x0606060606060606

 2509 12:43:07.910625  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2510 12:43:07.914360  MTRR: Fixed MSR 0x258 0x0606060606060606

 2511 12:43:07.917361  call enable_fixed_mtrr()

 2512 12:43:07.920780  MTRR: Fixed MSR 0x259 0x0000000000000000

 2513 12:43:07.924567  MTRR: Fixed MSR 0x268 0x0606060606060606

 2514 12:43:07.927952  MTRR: Fixed MSR 0x269 0x0606060606060606

 2515 12:43:07.934311  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2516 12:43:07.937506  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2517 12:43:07.940542  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2518 12:43:07.944337  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2519 12:43:07.950461  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2520 12:43:07.953740  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2521 12:43:07.956932  MTRR: Fixed MSR 0x250 0x0606060606060606

 2522 12:43:07.960377  CPU physical address size: 39 bits

 2523 12:43:07.963775  call enable_fixed_mtrr()

 2524 12:43:07.967128  MTRR: Fixed MSR 0x250 0x0606060606060606

 2525 12:43:07.970546  MTRR: Fixed MSR 0x258 0x0606060606060606

 2526 12:43:07.977150  MTRR: Fixed MSR 0x259 0x0000000000000000

 2527 12:43:07.980709  MTRR: Fixed MSR 0x268 0x0606060606060606

 2528 12:43:07.983548  MTRR: Fixed MSR 0x269 0x0606060606060606

 2529 12:43:07.986591  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2530 12:43:07.990286  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2531 12:43:07.996610  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2532 12:43:08.000334  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2533 12:43:08.004000  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2534 12:43:08.007301  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2535 12:43:08.013769  MTRR: Fixed MSR 0x258 0x0606060606060606

 2536 12:43:08.014212  call enable_fixed_mtrr()

 2537 12:43:08.020386  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2538 12:43:08.023936  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2539 12:43:08.027028  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2540 12:43:08.030945  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2541 12:43:08.036532  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2542 12:43:08.039748  CPU physical address size: 39 bits

 2543 12:43:08.043352  CPU physical address size: 39 bits

 2544 12:43:08.043438  call enable_fixed_mtrr()

 2545 12:43:08.050349  MTRR: Fixed MSR 0x259 0x0000000000000000

 2546 12:43:08.053604  CPU physical address size: 39 bits

 2547 12:43:08.056967  MTRR: Fixed MSR 0x259 0x0000000000000000

 2548 12:43:08.059986  MTRR: Fixed MSR 0x268 0x0606060606060606

 2549 12:43:08.063214  CPU physical address size: 39 bits

 2550 12:43:08.069637  MTRR: Fixed MSR 0x269 0x0606060606060606

 2551 12:43:08.073257  MTRR: Fixed MSR 0x268 0x0606060606060606

 2552 12:43:08.076407  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2553 12:43:08.079752  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2554 12:43:08.087011  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2555 12:43:08.090002  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2556 12:43:08.093534  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2557 12:43:08.097036  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2558 12:43:08.103041  MTRR: Fixed MSR 0x269 0x0606060606060606

 2559 12:43:08.103394  call enable_fixed_mtrr()

 2560 12:43:08.110101  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2561 12:43:08.113468  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2562 12:43:08.116953  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2563 12:43:08.120120  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2564 12:43:08.126521  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2565 12:43:08.129836  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2566 12:43:08.132701  CPU physical address size: 39 bits

 2567 12:43:08.136222  call enable_fixed_mtrr()

 2568 12:43:08.139514  CPU physical address size: 39 bits

 2569 12:43:08.139849  

 2570 12:43:08.142441  MTRR check

 2571 12:43:08.142510  Fixed MTRRs   : Enabled

 2572 12:43:08.145995  Variable MTRRs: Enabled

 2573 12:43:08.146054  

 2574 12:43:08.153449  BS: BS_WRITE_TABLES exit times (exec / console): 246 / 150 ms

 2575 12:43:08.155648  Checking cr50 for pending updates

 2576 12:43:08.167389  Reading cr50 TPM mode

 2577 12:43:08.182993  BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms

 2578 12:43:08.192985  CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c

 2579 12:43:08.196383  Checking segment from ROM address 0xf96cbe6c

 2580 12:43:08.199736  Checking segment from ROM address 0xf96cbe88

 2581 12:43:08.206134  Loading segment from ROM address 0xf96cbe6c

 2582 12:43:08.206486    code (compression=1)

 2583 12:43:08.216168    New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca

 2584 12:43:08.222641  Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca

 2585 12:43:08.226387  using LZMA

 2586 12:43:08.249245  [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4

 2587 12:43:08.255995  Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c

 2588 12:43:08.263639  Loading segment from ROM address 0xf96cbe88

 2589 12:43:08.266841    Entry Point 0x30000000

 2590 12:43:08.267182  Loaded segments

 2591 12:43:08.273876  BS: BS_PAYLOAD_LOAD run times (exec / console): 22 / 62 ms

 2592 12:43:08.280076  BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms

 2593 12:43:08.283712  Finalizing chipset.

 2594 12:43:08.287120  apm_control: Finalizing SMM.

 2595 12:43:08.287568  APMC done.

 2596 12:43:08.290138  HECI: CSE device 16.1 is disabled

 2597 12:43:08.293654  HECI: CSE device 16.2 is disabled

 2598 12:43:08.296398  HECI: CSE device 16.3 is disabled

 2599 12:43:08.300097  HECI: CSE device 16.4 is disabled

 2600 12:43:08.303199  HECI: CSE device 16.5 is disabled

 2601 12:43:08.306512  HECI: Sending End-of-Post

 2602 12:43:08.315642  CSE: EOP requested action: continue boot

 2603 12:43:08.318686  CSE EOP successful, continuing boot

 2604 12:43:08.325450  BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms

 2605 12:43:08.328621  mp_park_aps done after 0 msecs.

 2606 12:43:08.331596  Jumping to boot code at 0x30000000(0x76891000)

 2607 12:43:08.341576  CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes

 2608 12:43:08.346408  

 2609 12:43:08.346858  

 2610 12:43:08.347115  

 2611 12:43:08.349778  Starting depthcharge on Volmar...

 2612 12:43:08.350228  

 2613 12:43:08.351123  end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
 2614 12:43:08.351468  start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
 2615 12:43:08.351746  Setting prompt string to ['brya:']
 2616 12:43:08.352023  bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
 2617 12:43:08.355981  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2618 12:43:08.356448  

 2619 12:43:08.362317  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2620 12:43:08.362770  

 2621 12:43:08.369129  Looking for NVMe Controller 0x300653d8 @ 00:06:00

 2622 12:43:08.369508  

 2623 12:43:08.372185  configure_storage: Failed to remap 1C:2

 2624 12:43:08.372260  

 2625 12:43:08.376165  Wipe memory regions:

 2626 12:43:08.376250  

 2627 12:43:08.378521  	[0x00000000001000, 0x000000000a0000)

 2628 12:43:08.378589  

 2629 12:43:08.382335  	[0x00000000100000, 0x00000030000000)

 2630 12:43:08.496654  

 2631 12:43:08.499449  	[0x00000032668e60, 0x00000076857000)

 2632 12:43:08.659670  

 2633 12:43:08.662800  	[0x00000100000000, 0x0000027fc00000)

 2634 12:43:09.561632  

 2635 12:43:09.564995  ec_init: CrosEC protocol v3 supported (256, 256)

 2636 12:43:10.174329  

 2637 12:43:10.174848  R8152: Initializing

 2638 12:43:10.175107  

 2639 12:43:10.177062  Version 9 (ocp_data = 6010)

 2640 12:43:10.177436  

 2641 12:43:10.180575  R8152: Done initializing

 2642 12:43:10.181027  

 2643 12:43:10.184126  Adding net device

 2644 12:43:10.484834  

 2645 12:43:10.487893  [firmware-brya-14505.B-collabora] Feb  7 2023 16:06:26

 2646 12:43:10.488236  

 2647 12:43:10.488479  

 2648 12:43:10.488720  

 2649 12:43:10.489339  Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2651 12:43:10.590421  brya: tftpboot 192.168.201.1 12948271/tftp-deploy-q4amzrk9/kernel/bzImage 12948271/tftp-deploy-q4amzrk9/kernel/cmdline 12948271/tftp-deploy-q4amzrk9/ramdisk/ramdisk.cpio.gz

 2652 12:43:10.591011  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2653 12:43:10.591443  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
 2654 12:43:10.596523  tftpboot 192.168.201.1 12948271/tftp-deploy-q4amzrk9/kernel/bzIploy-q4amzrk9/kernel/cmdline 12948271/tftp-deploy-q4amzrk9/ramdisk/ramdisk.cpio.gz

 2655 12:43:10.597027  

 2656 12:43:10.597372  Waiting for link

 2657 12:43:10.798384  

 2658 12:43:10.798856  done.

 2659 12:43:10.799098  

 2660 12:43:10.799313  MAC: 00:e0:4c:68:02:ef

 2661 12:43:10.799518  

 2662 12:43:10.801348  Sending DHCP discover... done.

 2663 12:43:10.801711  

 2664 12:43:10.805153  Waiting for reply... done.

 2665 12:43:10.805235  

 2666 12:43:10.808028  Sending DHCP request... done.

 2667 12:43:10.808153  

 2668 12:43:10.811669  Waiting for reply... done.

 2669 12:43:10.815665  

 2670 12:43:10.816108  My ip is 192.168.201.16

 2671 12:43:10.816366  

 2672 12:43:10.818783  The DHCP server ip is 192.168.201.1

 2673 12:43:10.819229  

 2674 12:43:10.825251  TFTP server IP predefined by user: 192.168.201.1

 2675 12:43:10.825692  

 2676 12:43:10.832090  Bootfile predefined by user: 12948271/tftp-deploy-q4amzrk9/kernel/bzImage

 2677 12:43:10.832542  

 2678 12:43:10.834760  Sending tftp read request... done.

 2679 12:43:10.835100  

 2680 12:43:10.841999  Waiting for the transfer... 

 2681 12:43:10.842341  

 2682 12:43:11.074826  00000000 ################################################################

 2683 12:43:11.074985  

 2684 12:43:11.306076  00080000 ################################################################

 2685 12:43:11.306217  

 2686 12:43:11.538176  00100000 ################################################################

 2687 12:43:11.538317  

 2688 12:43:11.769230  00180000 ################################################################

 2689 12:43:11.769358  

 2690 12:43:12.000719  00200000 ################################################################

 2691 12:43:12.000858  

 2692 12:43:12.235555  00280000 ################################################################

 2693 12:43:12.235686  

 2694 12:43:12.468617  00300000 ################################################################

 2695 12:43:12.468762  

 2696 12:43:12.703984  00380000 ################################################################

 2697 12:43:12.704134  

 2698 12:43:12.936694  00400000 ################################################################

 2699 12:43:12.936837  

 2700 12:43:13.169348  00480000 ################################################################

 2701 12:43:13.169487  

 2702 12:43:13.401605  00500000 ################################################################

 2703 12:43:13.401751  

 2704 12:43:13.629950  00580000 ################################################################

 2705 12:43:13.630101  

 2706 12:43:13.855753  00600000 ################################################################

 2707 12:43:13.855904  

 2708 12:43:14.081486  00680000 ################################################################

 2709 12:43:14.081651  

 2710 12:43:14.309377  00700000 ################################################################

 2711 12:43:14.309518  

 2712 12:43:14.540704  00780000 ################################################################

 2713 12:43:14.540842  

 2714 12:43:14.774549  00800000 ################################################################

 2715 12:43:14.774686  

 2716 12:43:14.976420  00880000 ######################################################## done.

 2717 12:43:14.976557  

 2718 12:43:14.980163  The bootfile was 9367440 bytes long.

 2719 12:43:14.980248  

 2720 12:43:14.983279  Sending tftp read request... done.

 2721 12:43:14.983355  

 2722 12:43:14.986330  Waiting for the transfer... 

 2723 12:43:14.986395  

 2724 12:43:15.219777  00000000 ################################################################

 2725 12:43:15.219916  

 2726 12:43:15.448663  00080000 ################################################################

 2727 12:43:15.448802  

 2728 12:43:15.674379  00100000 ################################################################

 2729 12:43:15.674518  

 2730 12:43:15.900805  00180000 ################################################################

 2731 12:43:15.900947  

 2732 12:43:16.125741  00200000 ################################################################

 2733 12:43:16.125882  

 2734 12:43:16.350936  00280000 ################################################################

 2735 12:43:16.351074  

 2736 12:43:16.578912  00300000 ################################################################

 2737 12:43:16.579063  

 2738 12:43:16.806522  00380000 ################################################################

 2739 12:43:16.806662  

 2740 12:43:17.033004  00400000 ################################################################

 2741 12:43:17.033162  

 2742 12:43:17.260132  00480000 ################################################################

 2743 12:43:17.260272  

 2744 12:43:17.486224  00500000 ################################################################

 2745 12:43:17.486392  

 2746 12:43:17.712580  00580000 ################################################################

 2747 12:43:17.712724  

 2748 12:43:17.938600  00600000 ################################################################

 2749 12:43:17.938736  

 2750 12:43:18.163921  00680000 ################################################################

 2751 12:43:18.164047  

 2752 12:43:18.392389  00700000 ################################################################

 2753 12:43:18.392536  

 2754 12:43:18.618485  00780000 ################################################################

 2755 12:43:18.618624  

 2756 12:43:18.803065  00800000 ##################################################### done.

 2757 12:43:18.803205  

 2758 12:43:18.806611  Sending tftp read request... done.

 2759 12:43:18.806695  

 2760 12:43:18.809762  Waiting for the transfer... 

 2761 12:43:18.809838  

 2762 12:43:18.813387  00000000 # done.

 2763 12:43:18.813462  

 2764 12:43:18.822953  Command line loaded dynamically from TFTP file: 12948271/tftp-deploy-q4amzrk9/kernel/cmdline

 2765 12:43:18.823041  

 2766 12:43:18.836702  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2767 12:43:18.843746  

 2768 12:43:18.846979  Shutting down all USB controllers.

 2769 12:43:18.847424  

 2770 12:43:18.847686  Removing current net device

 2771 12:43:18.847905  

 2772 12:43:18.850488  Finalizing coreboot

 2773 12:43:18.850942  

 2774 12:43:18.856883  Exiting depthcharge with code 4 at timestamp: 20771237

 2775 12:43:18.857372  

 2776 12:43:18.857663  

 2777 12:43:18.857895  Starting kernel ...

 2778 12:43:18.858117  

 2779 12:43:18.858325  

 2780 12:43:18.859223  end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
 2781 12:43:18.859566  start: 2.2.5 auto-login-action (timeout 00:04:30) [common]
 2782 12:43:18.859826  Setting prompt string to ['Linux version [0-9]']
 2783 12:43:18.860062  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2784 12:43:18.860304  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2786 12:47:48.860332  end: 2.2.5 auto-login-action (duration 00:04:30) [common]
 2788 12:47:48.861126  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 270 seconds'
 2790 12:47:48.861772  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2793 12:47:48.862725  end: 2 depthcharge-action (duration 00:05:00) [common]
 2795 12:47:48.863682  Cleaning after the job
 2796 12:47:48.863980  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12948271/tftp-deploy-q4amzrk9/ramdisk
 2797 12:47:48.865788  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12948271/tftp-deploy-q4amzrk9/kernel
 2798 12:47:48.866784  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12948271/tftp-deploy-q4amzrk9/modules
 2799 12:47:48.867063  start: 5.1 power-off (timeout 00:00:30) [common]
 2800 12:47:48.867197  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-3' '--port=1' '--command=off'
 2801 12:47:48.945324  >> Command sent successfully.

 2802 12:47:48.953317  Returned 0 in 0 seconds
 2803 12:47:49.054245  end: 5.1 power-off (duration 00:00:00) [common]
 2805 12:47:49.055301  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2806 12:47:49.056067  Listened to connection for namespace 'common' for up to 1s
 2808 12:47:49.056981  Listened to connection for namespace 'common' for up to 1s
 2809 12:47:50.056917  Finalising connection for namespace 'common'
 2810 12:47:50.057487  Disconnecting from shell: Finalise
 2811 12:47:50.057779  
 2812 12:47:50.158546  end: 5.2 read-feedback (duration 00:00:01) [common]
 2813 12:47:50.159053  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12948271
 2814 12:47:50.172155  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12948271
 2815 12:47:50.172284  JobError: Your job cannot terminate cleanly.