Boot log: acer-chromebox-cxi4-puff
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 12:42:31.682948 lava-dispatcher, installed at version: 2024.01
2 12:42:31.683167 start: 0 validate
3 12:42:31.683304 Start time: 2024-03-05 12:42:31.683295+00:00 (UTC)
4 12:42:31.683433 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:42:31.683566 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 12:42:31.951375 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:42:31.951600 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2247-g140bf69dc64d%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:42:32.209373 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:42:32.209537 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2247-g140bf69dc64d%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 12:42:32.479689 validate duration: 0.80
12 12:42:32.481610 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:42:32.482419 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:42:32.483188 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:42:32.484074 Not decompressing ramdisk as can be used compressed.
16 12:42:32.484703 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 12:42:32.485207 saving as /var/lib/lava/dispatcher/tmp/12948284/tftp-deploy-8pjsssnf/ramdisk/rootfs.cpio.gz
18 12:42:32.485592 total size: 8418130 (8 MB)
19 12:42:32.492251 progress 0 % (0 MB)
20 12:42:32.500618 progress 5 % (0 MB)
21 12:42:32.506384 progress 10 % (0 MB)
22 12:42:32.510989 progress 15 % (1 MB)
23 12:42:32.514951 progress 20 % (1 MB)
24 12:42:32.518501 progress 25 % (2 MB)
25 12:42:32.521911 progress 30 % (2 MB)
26 12:42:32.524760 progress 35 % (2 MB)
27 12:42:32.527709 progress 40 % (3 MB)
28 12:42:32.530475 progress 45 % (3 MB)
29 12:42:32.533038 progress 50 % (4 MB)
30 12:42:32.535480 progress 55 % (4 MB)
31 12:42:32.537961 progress 60 % (4 MB)
32 12:42:32.540150 progress 65 % (5 MB)
33 12:42:32.542464 progress 70 % (5 MB)
34 12:42:32.544943 progress 75 % (6 MB)
35 12:42:32.547462 progress 80 % (6 MB)
36 12:42:32.550014 progress 85 % (6 MB)
37 12:42:32.552516 progress 90 % (7 MB)
38 12:42:32.554966 progress 95 % (7 MB)
39 12:42:32.557279 progress 100 % (8 MB)
40 12:42:32.557538 8 MB downloaded in 0.07 s (111.54 MB/s)
41 12:42:32.557751 end: 1.1.1 http-download (duration 00:00:00) [common]
43 12:42:32.558132 end: 1.1 download-retry (duration 00:00:00) [common]
44 12:42:32.558255 start: 1.2 download-retry (timeout 00:10:00) [common]
45 12:42:32.558371 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 12:42:32.558547 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2247-g140bf69dc64d/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 12:42:32.558651 saving as /var/lib/lava/dispatcher/tmp/12948284/tftp-deploy-8pjsssnf/kernel/bzImage
48 12:42:32.558742 total size: 9367440 (8 MB)
49 12:42:32.558836 No compression specified
50 12:42:32.560406 progress 0 % (0 MB)
51 12:42:32.563048 progress 5 % (0 MB)
52 12:42:32.565669 progress 10 % (0 MB)
53 12:42:32.568292 progress 15 % (1 MB)
54 12:42:32.571032 progress 20 % (1 MB)
55 12:42:32.573654 progress 25 % (2 MB)
56 12:42:32.576255 progress 30 % (2 MB)
57 12:42:32.578968 progress 35 % (3 MB)
58 12:42:32.581598 progress 40 % (3 MB)
59 12:42:32.584179 progress 45 % (4 MB)
60 12:42:32.586962 progress 50 % (4 MB)
61 12:42:32.589888 progress 55 % (4 MB)
62 12:42:32.592513 progress 60 % (5 MB)
63 12:42:32.595126 progress 65 % (5 MB)
64 12:42:32.597924 progress 70 % (6 MB)
65 12:42:32.600522 progress 75 % (6 MB)
66 12:42:32.603105 progress 80 % (7 MB)
67 12:42:32.605688 progress 85 % (7 MB)
68 12:42:32.608369 progress 90 % (8 MB)
69 12:42:32.610977 progress 95 % (8 MB)
70 12:42:32.613622 progress 100 % (8 MB)
71 12:42:32.613886 8 MB downloaded in 0.06 s (162.02 MB/s)
72 12:42:32.614083 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:42:32.614454 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:42:32.614576 start: 1.3 download-retry (timeout 00:10:00) [common]
76 12:42:32.614696 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 12:42:32.614873 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2247-g140bf69dc64d/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 12:42:32.614968 saving as /var/lib/lava/dispatcher/tmp/12948284/tftp-deploy-8pjsssnf/modules/modules.tar
79 12:42:32.615058 total size: 251176 (0 MB)
80 12:42:32.615153 Using unxz to decompress xz
81 12:42:32.619982 progress 13 % (0 MB)
82 12:42:32.620445 progress 26 % (0 MB)
83 12:42:32.620724 progress 39 % (0 MB)
84 12:42:32.622320 progress 52 % (0 MB)
85 12:42:32.624589 progress 65 % (0 MB)
86 12:42:32.626546 progress 78 % (0 MB)
87 12:42:32.628435 progress 91 % (0 MB)
88 12:42:32.630481 progress 100 % (0 MB)
89 12:42:32.635982 0 MB downloaded in 0.02 s (11.45 MB/s)
90 12:42:32.636217 end: 1.3.1 http-download (duration 00:00:00) [common]
92 12:42:32.636492 end: 1.3 download-retry (duration 00:00:00) [common]
93 12:42:32.636590 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 12:42:32.636686 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 12:42:32.636766 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 12:42:32.636853 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 12:42:32.637106 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12948284/lava-overlay-zv9qt9em
98 12:42:32.637246 makedir: /var/lib/lava/dispatcher/tmp/12948284/lava-overlay-zv9qt9em/lava-12948284/bin
99 12:42:32.637350 makedir: /var/lib/lava/dispatcher/tmp/12948284/lava-overlay-zv9qt9em/lava-12948284/tests
100 12:42:32.637448 makedir: /var/lib/lava/dispatcher/tmp/12948284/lava-overlay-zv9qt9em/lava-12948284/results
101 12:42:32.637564 Creating /var/lib/lava/dispatcher/tmp/12948284/lava-overlay-zv9qt9em/lava-12948284/bin/lava-add-keys
102 12:42:32.637712 Creating /var/lib/lava/dispatcher/tmp/12948284/lava-overlay-zv9qt9em/lava-12948284/bin/lava-add-sources
103 12:42:32.637842 Creating /var/lib/lava/dispatcher/tmp/12948284/lava-overlay-zv9qt9em/lava-12948284/bin/lava-background-process-start
104 12:42:32.637972 Creating /var/lib/lava/dispatcher/tmp/12948284/lava-overlay-zv9qt9em/lava-12948284/bin/lava-background-process-stop
105 12:42:32.638098 Creating /var/lib/lava/dispatcher/tmp/12948284/lava-overlay-zv9qt9em/lava-12948284/bin/lava-common-functions
106 12:42:32.638224 Creating /var/lib/lava/dispatcher/tmp/12948284/lava-overlay-zv9qt9em/lava-12948284/bin/lava-echo-ipv4
107 12:42:32.638350 Creating /var/lib/lava/dispatcher/tmp/12948284/lava-overlay-zv9qt9em/lava-12948284/bin/lava-install-packages
108 12:42:32.638474 Creating /var/lib/lava/dispatcher/tmp/12948284/lava-overlay-zv9qt9em/lava-12948284/bin/lava-installed-packages
109 12:42:32.638611 Creating /var/lib/lava/dispatcher/tmp/12948284/lava-overlay-zv9qt9em/lava-12948284/bin/lava-os-build
110 12:42:32.638737 Creating /var/lib/lava/dispatcher/tmp/12948284/lava-overlay-zv9qt9em/lava-12948284/bin/lava-probe-channel
111 12:42:32.638865 Creating /var/lib/lava/dispatcher/tmp/12948284/lava-overlay-zv9qt9em/lava-12948284/bin/lava-probe-ip
112 12:42:32.638991 Creating /var/lib/lava/dispatcher/tmp/12948284/lava-overlay-zv9qt9em/lava-12948284/bin/lava-target-ip
113 12:42:32.639114 Creating /var/lib/lava/dispatcher/tmp/12948284/lava-overlay-zv9qt9em/lava-12948284/bin/lava-target-mac
114 12:42:32.639237 Creating /var/lib/lava/dispatcher/tmp/12948284/lava-overlay-zv9qt9em/lava-12948284/bin/lava-target-storage
115 12:42:32.639365 Creating /var/lib/lava/dispatcher/tmp/12948284/lava-overlay-zv9qt9em/lava-12948284/bin/lava-test-case
116 12:42:32.639492 Creating /var/lib/lava/dispatcher/tmp/12948284/lava-overlay-zv9qt9em/lava-12948284/bin/lava-test-event
117 12:42:32.639615 Creating /var/lib/lava/dispatcher/tmp/12948284/lava-overlay-zv9qt9em/lava-12948284/bin/lava-test-feedback
118 12:42:32.639739 Creating /var/lib/lava/dispatcher/tmp/12948284/lava-overlay-zv9qt9em/lava-12948284/bin/lava-test-raise
119 12:42:32.639865 Creating /var/lib/lava/dispatcher/tmp/12948284/lava-overlay-zv9qt9em/lava-12948284/bin/lava-test-reference
120 12:42:32.639990 Creating /var/lib/lava/dispatcher/tmp/12948284/lava-overlay-zv9qt9em/lava-12948284/bin/lava-test-runner
121 12:42:32.640115 Creating /var/lib/lava/dispatcher/tmp/12948284/lava-overlay-zv9qt9em/lava-12948284/bin/lava-test-set
122 12:42:32.640242 Creating /var/lib/lava/dispatcher/tmp/12948284/lava-overlay-zv9qt9em/lava-12948284/bin/lava-test-shell
123 12:42:32.640371 Updating /var/lib/lava/dispatcher/tmp/12948284/lava-overlay-zv9qt9em/lava-12948284/bin/lava-install-packages (oe)
124 12:42:32.640523 Updating /var/lib/lava/dispatcher/tmp/12948284/lava-overlay-zv9qt9em/lava-12948284/bin/lava-installed-packages (oe)
125 12:42:32.640646 Creating /var/lib/lava/dispatcher/tmp/12948284/lava-overlay-zv9qt9em/lava-12948284/environment
126 12:42:32.640745 LAVA metadata
127 12:42:32.640820 - LAVA_JOB_ID=12948284
128 12:42:32.640886 - LAVA_DISPATCHER_IP=192.168.201.1
129 12:42:32.641013 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 12:42:32.641094 skipped lava-vland-overlay
131 12:42:32.641172 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 12:42:32.641254 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 12:42:32.641327 skipped lava-multinode-overlay
134 12:42:32.641401 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 12:42:32.641482 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 12:42:32.641557 Loading test definitions
137 12:42:32.641651 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 12:42:32.641731 Using /lava-12948284 at stage 0
139 12:42:32.642053 uuid=12948284_1.4.2.3.1 testdef=None
140 12:42:32.642140 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 12:42:32.642226 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 12:42:32.642761 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 12:42:32.642985 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 12:42:32.643627 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 12:42:32.643852 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 12:42:32.644474 runner path: /var/lib/lava/dispatcher/tmp/12948284/lava-overlay-zv9qt9em/lava-12948284/0/tests/0_dmesg test_uuid 12948284_1.4.2.3.1
149 12:42:32.644632 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 12:42:32.644857 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 12:42:32.644928 Using /lava-12948284 at stage 1
153 12:42:32.645264 uuid=12948284_1.4.2.3.5 testdef=None
154 12:42:32.645351 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 12:42:32.645467 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 12:42:32.645933 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 12:42:32.646150 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 12:42:32.646788 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 12:42:32.647013 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 12:42:32.647647 runner path: /var/lib/lava/dispatcher/tmp/12948284/lava-overlay-zv9qt9em/lava-12948284/1/tests/1_bootrr test_uuid 12948284_1.4.2.3.5
163 12:42:32.647799 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 12:42:32.648003 Creating lava-test-runner.conf files
166 12:42:32.648065 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12948284/lava-overlay-zv9qt9em/lava-12948284/0 for stage 0
167 12:42:32.648154 - 0_dmesg
168 12:42:32.648234 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12948284/lava-overlay-zv9qt9em/lava-12948284/1 for stage 1
169 12:42:32.648325 - 1_bootrr
170 12:42:32.648419 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 12:42:32.648503 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 12:42:32.656718 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 12:42:32.656825 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 12:42:32.656926 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 12:42:32.657036 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 12:42:32.657123 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 12:42:32.913356 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 12:42:32.913757 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 12:42:32.913892 extracting modules file /var/lib/lava/dispatcher/tmp/12948284/tftp-deploy-8pjsssnf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12948284/extract-overlay-ramdisk-zaof93xy/ramdisk
180 12:42:32.933379 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 12:42:32.933506 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 12:42:32.933600 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12948284/compress-overlay-hikwni4j/overlay-1.4.2.4.tar.gz to ramdisk
183 12:42:32.933674 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12948284/compress-overlay-hikwni4j/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12948284/extract-overlay-ramdisk-zaof93xy/ramdisk
184 12:42:32.946545 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 12:42:32.946693 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 12:42:32.946816 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 12:42:32.946941 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 12:42:32.947051 Building ramdisk /var/lib/lava/dispatcher/tmp/12948284/extract-overlay-ramdisk-zaof93xy/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12948284/extract-overlay-ramdisk-zaof93xy/ramdisk
189 12:42:33.075314 >> 49788 blocks
190 12:42:33.919298 rename /var/lib/lava/dispatcher/tmp/12948284/extract-overlay-ramdisk-zaof93xy/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12948284/tftp-deploy-8pjsssnf/ramdisk/ramdisk.cpio.gz
191 12:42:33.919713 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 12:42:33.919841 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
193 12:42:33.919945 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
194 12:42:33.920036 No mkimage arch provided, not using FIT.
195 12:42:33.920123 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 12:42:33.920209 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 12:42:33.920311 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 12:42:33.920403 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
199 12:42:33.920489 No LXC device requested
200 12:42:33.920573 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 12:42:33.920664 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
202 12:42:33.920748 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 12:42:33.920825 Checking files for TFTP limit of 4294967296 bytes.
204 12:42:33.921268 end: 1 tftp-deploy (duration 00:00:01) [common]
205 12:42:33.921378 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 12:42:33.921474 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 12:42:33.921602 substitutions:
208 12:42:33.921670 - {DTB}: None
209 12:42:33.921732 - {INITRD}: 12948284/tftp-deploy-8pjsssnf/ramdisk/ramdisk.cpio.gz
210 12:42:33.921791 - {KERNEL}: 12948284/tftp-deploy-8pjsssnf/kernel/bzImage
211 12:42:33.921848 - {LAVA_MAC}: None
212 12:42:33.921902 - {PRESEED_CONFIG}: None
213 12:42:33.921957 - {PRESEED_LOCAL}: None
214 12:42:33.922011 - {RAMDISK}: 12948284/tftp-deploy-8pjsssnf/ramdisk/ramdisk.cpio.gz
215 12:42:33.922065 - {ROOT_PART}: None
216 12:42:33.922118 - {ROOT}: None
217 12:42:33.922172 - {SERVER_IP}: 192.168.201.1
218 12:42:33.922225 - {TEE}: None
219 12:42:33.922279 Parsed boot commands:
220 12:42:33.922335 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 12:42:33.922506 Parsed boot commands: tftpboot 192.168.201.1 12948284/tftp-deploy-8pjsssnf/kernel/bzImage 12948284/tftp-deploy-8pjsssnf/kernel/cmdline 12948284/tftp-deploy-8pjsssnf/ramdisk/ramdisk.cpio.gz
222 12:42:33.922598 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 12:42:33.922686 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 12:42:33.922781 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 12:42:33.922867 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 12:42:33.922938 Not connected, no need to disconnect.
227 12:42:33.923016 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 12:42:33.923199 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 12:42:33.923271 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-chromebox-cxi4-puff-cbg-1'
230 12:42:33.927109 Setting prompt string to ['lava-test: # ']
231 12:42:33.927499 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 12:42:33.927613 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 12:42:33.927712 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 12:42:33.927803 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 12:42:33.928001 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-chromebox-cxi4-puff-cbg-1' '--port=1' '--command=reboot'
236 12:42:40.579932 >> Command sent successfully.
237 12:42:40.593068 Returned 0 in 6 seconds
238 12:42:40.694530 end: 2.2.2.1 pdu-reboot (duration 00:00:07) [common]
240 12:42:40.696657 end: 2.2.2 reset-device (duration 00:00:07) [common]
241 12:42:40.697500 start: 2.2.3 depthcharge-start (timeout 00:04:53) [common]
242 12:42:40.698187 Setting prompt string to 'Starting depthcharge on Kaisa...'
243 12:42:40.698698 Changing prompt to 'Starting depthcharge on Kaisa...'
244 12:42:40.699275 depthcharge-start: Wait for prompt Starting depthcharge on Kaisa... (timeout 00:05:00)
245 12:42:40.701034 [Enter `^Ec?' for help]
246 12:42:41.016879 �
247 12:42:41.017744
248 12:42:41.027027 coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 bootblock starting (log level: 8)...
249 12:42:41.032489 CPU: Intel(R) Celeron(R) CPU 5205U @ 1.90GHz
250 12:42:41.038248 CPU: ID a0660, Cometlake-U A0 (6+2), ucode: 000000c9
251 12:42:41.043484 CPU: AES supported, TXT NOT supported, VT supported
252 12:42:41.048047 MCH: device id 9b71 (rev 00) is CometLake-U (2+2)
253 12:42:41.052588 PCH: device id 0285 (rev 00) is Cometlake-U Base
254 12:42:41.057836 IGD: device id 9baa (rev 04) is CometLake ULT GT2
255 12:42:41.061247 VBOOT: Loading verstage.
256 12:42:41.066348 FMAP: Found "FLASH" version 1.1 at 0xc04000.
257 12:42:41.071197 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
258 12:42:41.076093 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
259 12:42:41.079845 CBFS: Locating 'fallback/verstage'
260 12:42:41.084086 CBFS: Found @ offset 10c240 size 1152c
261 12:42:41.085244
262 12:42:41.085575
263 12:42:41.096179 coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 verstage starting (log level: 8)...
264 12:42:41.109947 Probing TPM: . done!
265 12:42:41.113313 TPM ready after 0 ms
266 12:42:41.118686 Connected to device vid:did:rid of 1ae0:0028:00
267 12:42:41.128165 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b81dc66
268 12:42:41.132406 Initialized TPM device CR50 revision 0
269 12:42:41.205494 tlcl_send_startup: Startup return code is 0
270 12:42:41.207798 TPM: setup succeeded
271 12:42:41.220818 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
272 12:42:41.233626 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
273 12:42:41.241857 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
274 12:42:41.254565 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
275 12:42:41.258231 Chrome EC: UHEPI supported
276 12:42:41.258976 Phase 1
277 12:42:41.263642 FMAP: area GBB found @ c05000 (12288 bytes)
278 12:42:41.271092 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
279 12:42:41.277700 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
280 12:42:41.280657 Recovery requested (1009000e)
281 12:42:41.286179 TPM: Extending digest for VBOOT: boot mode into PCR 0
282 12:42:41.295642 tlcl_extend: response is 0
283 12:42:41.301075 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
284 12:42:41.310204 tlcl_extend: response is 0
285 12:42:41.315444 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
286 12:42:41.319048 CBFS: Locating 'fallback/romstage'
287 12:42:41.322708 CBFS: Found @ offset 80 size 1607c
288 12:42:41.328145 BS: verstage times (exec / console): total (unknown) / 119 ms
289 12:42:41.330534
290 12:42:41.330956
291 12:42:41.340652 coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 romstage starting (log level: 8)...
292 12:42:41.347518 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
293 12:42:41.352178 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
294 12:42:41.356579 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
295 12:42:41.360757 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
296 12:42:41.365064 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
297 12:42:41.368999 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
298 12:42:41.371711 TCO_STS: 0000 0000
299 12:42:41.374063 GEN_PMCON: e0015038 00000200
300 12:42:41.378042 GBLRST_CAUSE: 00000000 00000000
301 12:42:41.379448 prev_sleep_state 5
302 12:42:41.383448 Boot Count incremented to 17564
303 12:42:41.389092 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
304 12:42:41.392100 CBFS: Locating 'fspm.bin'
305 12:42:41.395650 CBFS: Found @ offset 66fc0 size 71000
306 12:42:41.398698 Chrome EC: UHEPI supported
307 12:42:41.405433 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
308 12:42:41.409773 Probing TPM: done!
309 12:42:41.414302 Connected to device vid:did:rid of 1ae0:0028:00
310 12:42:41.424904 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b81dc66
311 12:42:41.428557 Initialized TPM device CR50 revision 0
312 12:42:41.442220 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
313 12:42:41.449265 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
314 12:42:41.451789 MRC cache found, size 1948
315 12:42:41.454615 bootmode is set to: 2
316 12:42:41.456561 PRMRR disabled by config.
317 12:42:41.461812 FMAP: area RW_SPD_CACHE found @ aff000 (4096 bytes)
318 12:42:41.465646 SPD_CACHE: cache found, size 0x1000
319 12:42:41.469373 No memory dimm at address 50
320 12:42:41.472071 SPD_CACHE: DIMM0 is not present
321 12:42:41.478086 SPD_CACHE: DIMM1 is the same
322 12:42:41.478896 SPD @ 0x52
323 12:42:41.481793 SPD: module type is DDR4
324 12:42:41.485980 SPD: module part number is HMA851S6CJR6N-VK
325 12:42:41.492566 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
326 12:42:41.497340 SPD: device width 16 bits, bus width 64 bits
327 12:42:41.500650 SPD: module size is 4096 MB (per channel)
328 12:42:41.504281 memory slot: 2 configuration done.
329 12:42:41.552605 CBMEM:
330 12:42:41.556374 IMD: root @ 0x99fff000 254 entries.
331 12:42:41.559585 IMD: root @ 0x99ffec00 62 entries.
332 12:42:41.563838 FMAP: area RO_VPD found @ c00000 (16384 bytes)
333 12:42:41.568456 WARNING: RO_VPD is uninitialized or empty.
334 12:42:41.572748 FMAP: area RW_VPD found @ af8000 (8192 bytes)
335 12:42:41.577240 External stage cache:
336 12:42:41.579830 IMD: root @ 0x9abff000 254 entries.
337 12:42:41.583150 IMD: root @ 0x9abfec00 62 entries.
338 12:42:41.598454 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
339 12:42:41.607972 tlcl_write: response is 0
340 12:42:41.611547 MRC: TPM MRC hash updated successfully.
341 12:42:41.613654 1 DIMMs found
342 12:42:41.615294 SMM Memory Map
343 12:42:41.618747 SMRAM : 0x9a000000 0x1000000
344 12:42:41.621583 Subregion 0: 0x9a000000 0xa00000
345 12:42:41.625286 Subregion 1: 0x9aa00000 0x200000
346 12:42:41.628933 Subregion 2: 0x9ac00000 0x400000
347 12:42:41.631019 top_of_ram = 0x9a000000
348 12:42:41.635943 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
349 12:42:41.641743 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
350 12:42:41.646352 MTRR Range: Start=ff000000 End=0 (Size 1000000)
351 12:42:41.651662 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
352 12:42:41.655147 CBFS: Locating 'fallback/postcar'
353 12:42:41.658714 CBFS: Found @ offset 1076c0 size 4b28
354 12:42:41.664925 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
355 12:42:41.675657 Loading module at 0x99c0c000 with entry 0x99c0c000. filesize: 0x4818 memsize: 0x8af8
356 12:42:41.680761 Processing 173 relocs. Offset value of 0x97c0c000
357 12:42:41.688453 BS: romstage times (exec / console): total (unknown) / 267 ms
358 12:42:41.690012
359 12:42:41.690618
360 12:42:41.700270 coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 postcar starting (log level: 8)...
361 12:42:41.705380 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
362 12:42:41.709827 CBFS: Locating 'fallback/ramstage'
363 12:42:41.712388 CBFS: Found @ offset 44e00 size 1e0ef
364 12:42:41.719397 Decompressing stage fallback/ramstage @ 0x99ba4fc0 (415200 bytes)
365 12:42:41.750867 Loading module at 0x99ba5000 with entry 0x99ba5000. filesize: 0x46598 memsize: 0x655a0
366 12:42:41.755386 Processing 4604 relocs. Offset value of 0x98da5000
367 12:42:41.761765 BS: postcar times (exec / console): total (unknown) / 43 ms
368 12:42:41.761967
369 12:42:41.762114
370 12:42:41.772660 coreboot-v1.9308_26_0.0.22-15031-g42970b8c8b Tue Mar 29 17:32:50 UTC 2022 ramstage starting (log level: 8)...
371 12:42:41.774459 Normal boot
372 12:42:41.779736 cse_lite: Skip switching to RW in the recovery path
373 12:42:41.784411 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 5 ms
374 12:42:41.789916 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
375 12:42:41.793904 CBFS: Locating 'cpu_microcode_blob.bin'
376 12:42:41.797816 CBFS: Found @ offset 16180 size 2ec00
377 12:42:41.801933 microcode: sig=0xa0660 pf=0x80 revision=0xc9
378 12:42:41.804180 Skip microcode update
379 12:42:41.809451 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
380 12:42:41.811771 CBFS: Locating 'fsps.bin'
381 12:42:41.816429 CBFS: Found @ offset d8fc0 size 2e69d
382 12:42:41.852487 Detected 2 core, 2 thread CPU.
383 12:42:41.854928 Setting up SMI for CPU
384 12:42:41.856602 IED base = 0x9ac00000
385 12:42:41.859311 IED size = 0x00400000
386 12:42:41.861208 Will perform SMM setup.
387 12:42:41.865628 CPU: Intel(R) Celeron(R) CPU 5205U @ 1.90GHz.
388 12:42:41.874536 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
389 12:42:41.879196 Processing 16 relocs. Offset value of 0x00030000
390 12:42:41.882039 Attempting to start 1 APs
391 12:42:41.885740 Waiting for 10ms after sending INIT.
392 12:42:41.899231 Waiting for 1st SIPI to complete...done.
393 12:42:41.902257 AP: slot 1 apic_id 2.
394 12:42:41.906256 Waiting for 2nd SIPI to complete...done.
395 12:42:41.913938 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
396 12:42:41.919662 Processing 13 relocs. Offset value of 0x00038000
397 12:42:41.926433 SMM Module: stub loaded at 0x00038000. Will call 0x99bc2760(0x00000000)
398 12:42:41.929977 Installing SMM handler to 0x9a000000
399 12:42:41.938381 Loading module at 0x9a010000 with entry 0x9a010a30. filesize: 0x7bc8 memsize: 0xcc90
400 12:42:41.942551 Processing 617 relocs. Offset value of 0x9a010000
401 12:42:41.951261 Loading module at 0x9a008000 with entry 0x9a008000. filesize: 0x1b8 memsize: 0x1b8
402 12:42:41.956005 Processing 13 relocs. Offset value of 0x9a008000
403 12:42:41.962028 SMM Module: placing jmp sequence at 0x9a007c00 rel16 0x03fd
404 12:42:41.968754 SMM Module: stub loaded at 0x9a008000. Will call 0x9a010a30(0x00000000)
405 12:42:41.972154 Clearing SMI status registers
406 12:42:41.974433 SMI_STS: PM1
407 12:42:41.975526 PM1_STS: PWRBTN
408 12:42:41.977724 New SMBASE 0x9a000000
409 12:42:41.980913 In relocation handler: CPU 0
410 12:42:41.985514 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
411 12:42:41.989356 Writing SMRR. base = 0x9a000006, mask=0xff000800
412 12:42:41.991977 Relocation complete.
413 12:42:41.994538 New SMBASE 0x99fffc00
414 12:42:41.997046 In relocation handler: CPU 1
415 12:42:42.001279 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
416 12:42:42.005625 Writing SMRR. base = 0x9a000006, mask=0xff000800
417 12:42:42.007660 Relocation complete.
418 12:42:42.010867 Initializing CPU #0
419 12:42:42.013720 CPU: vendor Intel device a0660
420 12:42:42.017536 CPU: family 06, model a6, stepping 00
421 12:42:42.020647 Clearing out pending MCEs
422 12:42:42.022891 Setting up local APIC...
423 12:42:42.025260 apic_id: 0x00 done.
424 12:42:42.028134 Turbo is available but hidden
425 12:42:42.029778 Turbo is unavailable
426 12:42:42.031625 VMX status: enabled
427 12:42:42.035430 IA32_FEATURE_CONTROL status: locked
428 12:42:42.037160 Skip microcode update
429 12:42:42.039876 CPU #0 initialized
430 12:42:42.042183 Initializing CPU #1
431 12:42:42.045606 CPU: vendor Intel device a0660
432 12:42:42.049030 CPU: family 06, model a6, stepping 00
433 12:42:42.051904 Clearing out pending MCEs
434 12:42:42.054077 Setting up local APIC...
435 12:42:42.056958 apic_id: 0x02 done.
436 12:42:42.058711 VMX status: enabled
437 12:42:42.062264 IA32_FEATURE_CONTROL status: locked
438 12:42:42.064591 Skip microcode update
439 12:42:42.066297 CPU #1 initialized
440 12:42:42.073191 bsp_do_flight_plan done after 160 msecs.
441 12:42:42.073401 Enabling SMIs.
442 12:42:42.073548 Locking SMM.
443 12:42:42.080010 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 89 / 199 ms
444 12:42:42.090425 Waiting for DisplayPort
445 12:42:45.114178 DisplayPort not ready after 3000ms. Abort.
446 12:42:45.120576 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
447 12:42:45.122973 CBFS: Locating 'vbt.bin'
448 12:42:45.126571 CBFS: Found @ offset 66a80 size 49e
449 12:42:45.131599 Found a VBT of 4608 bytes after decompression
450 12:42:45.133218 psys_pmax = 182W
451 12:42:45.181776 Display FSP Version Info HOB
452 12:42:45.185266 Reference Code - CPU = 9.0.1e.30
453 12:42:45.187628 uCode Version = 0.0.0.ca
454 12:42:45.190374 TXT ACM version = ff.ff.ff.ffff
455 12:42:45.193952 Reference Code - ME = 9.0.1e.30
456 12:42:45.196332 MEBx version = 0.0.0.0
457 12:42:45.199671 ME Firmware Version = Consumer SKU
458 12:42:45.203242 Reference Code - CML PCH = 9.0.1e.30
459 12:42:45.206372 PCH-CRID Status = Disabled
460 12:42:45.209824 PCH-CRID Original Value = ff.ff.ff.ffff
461 12:42:45.213407 PCH-CRID New Value = ff.ff.ff.ffff
462 12:42:45.217134 OPROM - RST - RAID = ff.ff.ff.ffff
463 12:42:45.221173 ChipsetInit Base Version = ff.ff.ff.ffff
464 12:42:45.225513 ChipsetInit Oem Version = ff.ff.ff.ffff
465 12:42:45.229618 Reference Code - SA - System Agent = 9.0.1e.30
466 12:42:45.233160 Reference Code - MRC = 0.0.0.2d
467 12:42:45.235912 SA - PCIe Version = 9.0.1e.30
468 12:42:45.238563 SA-CRID Status = Disabled
469 12:42:45.241847 SA-CRID Original Value = 0.0.0.0
470 12:42:45.244780 SA-CRID New Value = 0.0.0.0
471 12:42:45.247666 OPROM - VBIOS = ff.ff.ff.ffff
472 12:42:45.251519 Found PCIe Root Port #7 at PCI: 00:1c.0.
473 12:42:45.259245 Remapping PCIe Root Port #7 from PCI: 00:1c.6 to new function number 0.
474 12:42:45.270677 pcie_rp_update_dev: Couldn't find PCIe Root Port #9 (originally PCI: 00:1d.0) which was enabled in devicetree, removing.
475 12:42:45.282834 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
476 12:42:45.295121 pcie_rp_update_dev: Couldn't find PCIe Root Port #14 (originally PCI: 00:1d.5) which was enabled in devicetree, removing.
477 12:42:45.302078 BS: BS_DEV_INIT_CHIPS run times (exec / console): 3069 / 140 ms
478 12:42:45.303498 RTC Init
479 12:42:45.306857 Set power on after power failure.
480 12:42:45.308502 Disabling Deep S3
481 12:42:45.310520 Disabling Deep S3
482 12:42:45.311557 Disabling Deep S4
483 12:42:45.313959 Disabling Deep S4
484 12:42:45.315665 Disabling Deep S5
485 12:42:45.317924 Disabling Deep S5
486 12:42:45.323375 BS: BS_DEV_INIT_CHIPS exit times (exec / console): 1 / 15 ms
487 12:42:45.326172 Enumerating buses...
488 12:42:45.330299 Show all devs... Before device enumeration.
489 12:42:45.332553 Root Device: enabled 1
490 12:42:45.334687 CPU_CLUSTER: 0: enabled 1
491 12:42:45.337683 DOMAIN: 0000: enabled 1
492 12:42:45.339838 APIC: 00: enabled 1
493 12:42:45.341922 PCI: 00:00.0: enabled 1
494 12:42:45.344949 PCI: 00:02.0: enabled 1
495 12:42:45.347466 PCI: 00:04.0: enabled 1
496 12:42:45.349801 PCI: 00:05.0: enabled 0
497 12:42:45.351679 PCI: 00:12.0: enabled 1
498 12:42:45.354255 PCI: 00:12.5: enabled 0
499 12:42:45.356622 PCI: 00:12.6: enabled 0
500 12:42:45.358952 PCI: 00:14.0: enabled 1
501 12:42:45.361540 PCI: 00:14.1: enabled 0
502 12:42:45.363806 PCI: 00:14.3: enabled 1
503 12:42:45.366353 PCI: 00:14.5: enabled 1
504 12:42:45.368510 PCI: 00:15.0: enabled 0
505 12:42:45.371092 PCI: 00:15.1: enabled 0
506 12:42:45.373513 PCI: 00:15.2: enabled 1
507 12:42:45.375753 PCI: 00:15.3: enabled 1
508 12:42:45.378273 PCI: 00:16.0: enabled 1
509 12:42:45.381280 PCI: 00:16.1: enabled 0
510 12:42:45.383572 PCI: 00:16.2: enabled 0
511 12:42:45.385869 PCI: 00:16.3: enabled 0
512 12:42:45.388603 PCI: 00:16.4: enabled 0
513 12:42:45.390632 PCI: 00:16.5: enabled 0
514 12:42:45.392897 PCI: 00:17.0: enabled 1
515 12:42:45.395305 PCI: 00:19.0: enabled 1
516 12:42:45.397711 PCI: 00:19.1: enabled 0
517 12:42:45.400799 PCI: 00:19.2: enabled 0
518 12:42:45.402602 PCI: 00:1a.0: enabled 1
519 12:42:45.405004 PCI: 00:1c.0: enabled 0
520 12:42:45.408162 PCI: 00:1c.1: enabled 0
521 12:42:45.410398 PCI: 00:1c.2: enabled 0
522 12:42:45.412729 PCI: 00:1c.3: enabled 0
523 12:42:45.414997 PCI: 00:1c.4: enabled 0
524 12:42:45.417816 PCI: 00:1c.5: enabled 0
525 12:42:45.420251 PCI: 00:1c.0: enabled 1
526 12:42:45.422300 PCI: 00:1c.7: enabled 0
527 12:42:45.425012 PCI: 00:1d.0: enabled 1
528 12:42:45.427802 PCI: 00:1d.1: enabled 0
529 12:42:45.429532 PCI: 00:1d.2: enabled 1
530 12:42:45.432483 PCI: 00:1d.3: enabled 0
531 12:42:45.434592 PCI: 00:1d.4: enabled 0
532 12:42:45.437113 PCI: 00:1d.5: enabled 1
533 12:42:45.439272 PCI: 00:1e.0: enabled 1
534 12:42:45.442118 PCI: 00:1e.1: enabled 0
535 12:42:45.444102 PCI: 00:1e.2: enabled 1
536 12:42:45.446693 PCI: 00:1e.3: enabled 0
537 12:42:45.449501 PCI: 00:1f.0: enabled 1
538 12:42:45.452015 PCI: 00:1f.1: enabled 1
539 12:42:45.453586 PCI: 00:1f.2: enabled 1
540 12:42:45.456110 PCI: 00:1f.3: enabled 1
541 12:42:45.458387 PCI: 00:1f.4: enabled 1
542 12:42:45.461298 PCI: 00:1f.5: enabled 1
543 12:42:45.463660 PCI: 00:1f.6: enabled 0
544 12:42:45.466345 GENERIC: 0.0: enabled 1
545 12:42:45.468657 USB0 port 0: enabled 1
546 12:42:45.471065 I2C: 00:4a: enabled 1
547 12:42:45.473453 I2C: 00:4a: enabled 1
548 12:42:45.475199 I2C: 00:1a: enabled 1
549 12:42:45.477759 PCI: 00:00.0: enabled 1
550 12:42:45.479920 PCI: 00:00.0: enabled 1
551 12:42:45.482030 SPI: 00: enabled 1
552 12:42:45.484260 PNP: 0c09.0: enabled 1
553 12:42:45.486542 USB2 port 0: enabled 1
554 12:42:45.488663 USB2 port 1: enabled 1
555 12:42:45.491053 USB2 port 2: enabled 1
556 12:42:45.493985 USB2 port 3: enabled 1
557 12:42:45.495832 USB2 port 5: enabled 1
558 12:42:45.498033 USB2 port 6: enabled 0
559 12:42:45.500264 USB2 port 9: enabled 1
560 12:42:45.503555 USB3 port 0: enabled 1
561 12:42:45.505041 USB3 port 1: enabled 1
562 12:42:45.507481 USB3 port 2: enabled 1
563 12:42:45.510312 USB3 port 3: enabled 1
564 12:42:45.512502 USB3 port 4: enabled 1
565 12:42:45.514628 USB2 port 4: enabled 1
566 12:42:45.517275 USB3 port 5: enabled 1
567 12:42:45.519583 APIC: 02: enabled 1
568 12:42:45.521854 Compare with tree...
569 12:42:45.523252 Root Device: enabled 1
570 12:42:45.526694 CPU_CLUSTER: 0: enabled 1
571 12:42:45.528776 APIC: 00: enabled 1
572 12:42:45.531056 APIC: 02: enabled 1
573 12:42:45.533017 DOMAIN: 0000: enabled 1
574 12:42:45.536006 PCI: 00:00.0: enabled 1
575 12:42:45.538511 PCI: 00:02.0: enabled 1
576 12:42:45.540765 PCI: 00:04.0: enabled 1
577 12:42:45.544167 GENERIC: 0.0: enabled 1
578 12:42:45.546565 PCI: 00:05.0: enabled 0
579 12:42:45.548648 PCI: 00:12.0: enabled 1
580 12:42:45.551508 PCI: 00:12.5: enabled 0
581 12:42:45.554428 PCI: 00:12.6: enabled 0
582 12:42:45.557280 PCI: 00:14.0: enabled 1
583 12:42:45.560286 USB0 port 0: enabled 1
584 12:42:45.563161 USB2 port 0: enabled 1
585 12:42:45.564934 USB2 port 1: enabled 1
586 12:42:45.568042 USB2 port 2: enabled 1
587 12:42:45.571175 USB2 port 3: enabled 1
588 12:42:45.573439 USB2 port 5: enabled 1
589 12:42:45.576172 USB2 port 6: enabled 0
590 12:42:45.579033 USB2 port 9: enabled 1
591 12:42:45.581454 USB3 port 0: enabled 1
592 12:42:45.584536 USB3 port 1: enabled 1
593 12:42:45.587093 USB3 port 2: enabled 1
594 12:42:45.590279 USB3 port 3: enabled 1
595 12:42:45.592865 USB3 port 4: enabled 1
596 12:42:45.595416 USB2 port 4: enabled 1
597 12:42:45.597763 USB3 port 5: enabled 1
598 12:42:45.601428 PCI: 00:14.1: enabled 0
599 12:42:45.603503 PCI: 00:14.3: enabled 1
600 12:42:45.606083 PCI: 00:14.5: enabled 1
601 12:42:45.608959 PCI: 00:15.0: enabled 0
602 12:42:45.611547 PCI: 00:15.1: enabled 0
603 12:42:45.614040 PCI: 00:15.2: enabled 1
604 12:42:45.616229 I2C: 00:4a: enabled 1
605 12:42:45.619007 PCI: 00:15.3: enabled 1
606 12:42:45.621516 I2C: 00:4a: enabled 1
607 12:42:45.624329 PCI: 00:16.0: enabled 1
608 12:42:45.627062 PCI: 00:16.1: enabled 0
609 12:42:45.629338 PCI: 00:16.2: enabled 0
610 12:42:45.632049 PCI: 00:16.3: enabled 0
611 12:42:45.634777 PCI: 00:16.4: enabled 0
612 12:42:45.637718 PCI: 00:16.5: enabled 0
613 12:42:45.640017 PCI: 00:17.0: enabled 1
614 12:42:45.642939 PCI: 00:19.0: enabled 1
615 12:42:45.645039 I2C: 00:1a: enabled 1
616 12:42:45.647842 PCI: 00:19.1: enabled 0
617 12:42:45.650437 PCI: 00:19.2: enabled 0
618 12:42:45.653308 PCI: 00:1a.0: enabled 1
619 12:42:45.655886 PCI: 00:1c.0: enabled 1
620 12:42:45.658857 PCI: 00:00.0: enabled 1
621 12:42:45.661045 PCI: 00:1e.0: enabled 1
622 12:42:45.663720 PCI: 00:1e.1: enabled 0
623 12:42:45.666198 PCI: 00:1e.2: enabled 1
624 12:42:45.668177 SPI: 00: enabled 1
625 12:42:45.671244 PCI: 00:1e.3: enabled 0
626 12:42:45.673978 PCI: 00:1f.0: enabled 1
627 12:42:45.676148 PNP: 0c09.0: enabled 1
628 12:42:45.679252 PCI: 00:1f.1: enabled 1
629 12:42:45.681614 PCI: 00:1f.2: enabled 1
630 12:42:45.684239 PCI: 00:1f.3: enabled 1
631 12:42:45.687328 PCI: 00:1f.4: enabled 1
632 12:42:45.689548 PCI: 00:1f.5: enabled 1
633 12:42:45.692924 PCI: 00:1f.6: enabled 0
634 12:42:45.694481 Root Device scanning...
635 12:42:45.697749 scan_static_bus for Root Device
636 12:42:45.700601 CPU_CLUSTER: 0 enabled
637 12:42:45.703128 DOMAIN: 0000 enabled
638 12:42:45.704822 DOMAIN: 0000 scanning...
639 12:42:45.708491 PCI: pci_scan_bus for bus 00
640 12:42:45.711106 PCI: 00:00.0 [8086/0000] ops
641 12:42:45.714828 PCI: 00:00.0 [8086/9b71] enabled
642 12:42:45.717949 PCI: 00:02.0 [8086/0000] bus ops
643 12:42:45.721098 PCI: 00:02.0 [8086/9baa] enabled
644 12:42:45.724106 PCI: 00:04.0 [8086/0000] bus ops
645 12:42:45.727676 PCI: 00:04.0 [8086/1903] enabled
646 12:42:45.730933 PCI: 00:08.0 [8086/1911] enabled
647 12:42:45.734385 PCI: 00:12.0 [8086/02f9] enabled
648 12:42:45.737618 PCI: 00:14.0 [8086/0000] bus ops
649 12:42:45.740777 PCI: 00:14.0 [8086/02ed] enabled
650 12:42:45.744155 PCI: 00:14.2 [8086/02ef] enabled
651 12:42:45.747324 PCI: 00:14.3 [8086/02f0] enabled
652 12:42:45.750682 PCI: 00:14.5 [8086/0000] ops
653 12:42:45.754316 PCI: 00:14.5 [8086/02f5] enabled
654 12:42:45.756876 PCI: 00:15.0 [8086/0000] bus ops
655 12:42:45.760804 PCI: 00:15.0 [8086/02e8] disabled
656 12:42:45.764133 PCI: 00:15.2 [8086/0000] bus ops
657 12:42:45.767607 PCI: 00:15.2 [8086/02ea] enabled
658 12:42:45.770975 PCI: 00:15.3 [8086/0000] bus ops
659 12:42:45.774427 PCI: 00:15.3 [8086/02eb] enabled
660 12:42:45.777499 PCI: 00:16.0 [8086/0000] ops
661 12:42:45.779852 PCI: 00:16.0 [8086/02e0] enabled
662 12:42:45.785915 PCI: Static device PCI: 00:17.0 not found, disabling it.
663 12:42:45.789478 PCI: 00:19.0 [8086/0000] bus ops
664 12:42:45.792732 PCI: 00:19.0 [8086/02c5] enabled
665 12:42:45.795705 PCI: 00:1a.0 [8086/0000] ops
666 12:42:45.799284 PCI: 00:1a.0 [8086/02c4] enabled
667 12:42:45.802204 PCI: 00:1c.0 [8086/0000] bus ops
668 12:42:45.805832 PCI: 00:1c.0 [8086/02be] enabled
669 12:42:45.808661 PCI: 00:1e.0 [8086/0000] ops
670 12:42:45.811848 PCI: 00:1e.0 [8086/02a8] enabled
671 12:42:45.814889 PCI: 00:1e.2 [8086/0000] bus ops
672 12:42:45.818493 PCI: 00:1e.2 [8086/02aa] enabled
673 12:42:45.822212 PCI: 00:1f.0 [8086/0000] bus ops
674 12:42:45.825452 PCI: 00:1f.0 [8086/0285] enabled
675 12:42:45.830644 PCI: Static device PCI: 00:1f.1 not found, disabling it.
676 12:42:45.836191 PCI: Static device PCI: 00:1f.2 not found, disabling it.
677 12:42:45.839482 PCI: 00:1f.3 [8086/0000] bus ops
678 12:42:45.842670 PCI: 00:1f.3 [8086/02c8] enabled
679 12:42:45.846650 PCI: 00:1f.4 [8086/0000] bus ops
680 12:42:45.849660 PCI: 00:1f.4 [8086/02a3] enabled
681 12:42:45.853205 PCI: 00:1f.5 [8086/0000] bus ops
682 12:42:45.856296 PCI: 00:1f.5 [8086/02a4] enabled
683 12:42:45.859282 PCI: Leftover static devices:
684 12:42:45.860250 PCI: 00:05.0
685 12:42:45.862006 PCI: 00:12.5
686 12:42:45.863079 PCI: 00:12.6
687 12:42:45.864699 PCI: 00:14.1
688 12:42:45.865728 PCI: 00:15.1
689 12:42:45.867447 PCI: 00:16.1
690 12:42:45.868724 PCI: 00:16.2
691 12:42:45.870543 PCI: 00:16.3
692 12:42:45.871927 PCI: 00:16.4
693 12:42:45.873177 PCI: 00:16.5
694 12:42:45.874257 PCI: 00:17.0
695 12:42:45.875739 PCI: 00:19.1
696 12:42:45.877201 PCI: 00:19.2
697 12:42:45.878390 PCI: 00:1e.1
698 12:42:45.880023 PCI: 00:1e.3
699 12:42:45.881135 PCI: 00:1f.1
700 12:42:45.882857 PCI: 00:1f.2
701 12:42:45.884002 PCI: 00:1f.6
702 12:42:45.886901 PCI: Check your devicetree.cb.
703 12:42:45.888894 PCI: 00:02.0 scanning...
704 12:42:45.893141 scan_generic_bus for PCI: 00:02.0
705 12:42:45.897071 scan_generic_bus for PCI: 00:02.0 done
706 12:42:45.901868 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
707 12:42:45.904383 PCI: 00:04.0 scanning...
708 12:42:45.908315 scan_generic_bus for PCI: 00:04.0
709 12:42:45.911907 bus: PCI: 00:04.0[0]->GENERIC: 0.0 enabled
710 12:42:45.915819 scan_generic_bus for PCI: 00:04.0 done
711 12:42:45.920871 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
712 12:42:45.923717 PCI: 00:14.0 scanning...
713 12:42:45.927233 scan_static_bus for PCI: 00:14.0
714 12:42:45.928889 USB0 port 0 enabled
715 12:42:45.931496 USB0 port 0 scanning...
716 12:42:45.934916 scan_static_bus for USB0 port 0
717 12:42:45.937153 USB2 port 0 enabled
718 12:42:45.939328 USB2 port 1 enabled
719 12:42:45.941431 USB2 port 2 enabled
720 12:42:45.943543 USB2 port 3 enabled
721 12:42:45.945598 USB2 port 5 enabled
722 12:42:45.947728 USB2 port 6 disabled
723 12:42:45.949599 USB2 port 9 enabled
724 12:42:45.951560 USB3 port 0 enabled
725 12:42:45.953498 USB3 port 1 enabled
726 12:42:45.956110 USB3 port 2 enabled
727 12:42:45.957769 USB3 port 3 enabled
728 12:42:45.959683 USB3 port 4 enabled
729 12:42:45.962224 USB2 port 4 enabled
730 12:42:45.963860 USB3 port 5 enabled
731 12:42:45.966131 USB2 port 0 scanning...
732 12:42:45.970070 scan_static_bus for USB2 port 0
733 12:42:45.972966 scan_static_bus for USB2 port 0 done
734 12:42:45.977877 scan_bus: bus USB2 port 0 finished in 6 msecs
735 12:42:45.980047 USB2 port 1 scanning...
736 12:42:45.983674 scan_static_bus for USB2 port 1
737 12:42:45.987364 scan_static_bus for USB2 port 1 done
738 12:42:45.992080 scan_bus: bus USB2 port 1 finished in 6 msecs
739 12:42:45.994312 USB2 port 2 scanning...
740 12:42:45.998708 scan_static_bus for USB2 port 2
741 12:42:46.001562 scan_static_bus for USB2 port 2 done
742 12:42:46.006501 scan_bus: bus USB2 port 2 finished in 6 msecs
743 12:42:46.008408 USB2 port 3 scanning...
744 12:42:46.012986 scan_static_bus for USB2 port 3
745 12:42:46.016199 scan_static_bus for USB2 port 3 done
746 12:42:46.020283 scan_bus: bus USB2 port 3 finished in 6 msecs
747 12:42:46.022764 USB2 port 5 scanning...
748 12:42:46.026694 scan_static_bus for USB2 port 5
749 12:42:46.030885 scan_static_bus for USB2 port 5 done
750 12:42:46.035124 scan_bus: bus USB2 port 5 finished in 6 msecs
751 12:42:46.037960 USB2 port 9 scanning...
752 12:42:46.040920 scan_static_bus for USB2 port 9
753 12:42:46.044810 scan_static_bus for USB2 port 9 done
754 12:42:46.049263 scan_bus: bus USB2 port 9 finished in 6 msecs
755 12:42:46.051161 USB3 port 0 scanning...
756 12:42:46.055149 scan_static_bus for USB3 port 0
757 12:42:46.058274 scan_static_bus for USB3 port 0 done
758 12:42:46.064087 scan_bus: bus USB3 port 0 finished in 6 msecs
759 12:42:46.065241 USB3 port 1 scanning...
760 12:42:46.069258 scan_static_bus for USB3 port 1
761 12:42:46.073246 scan_static_bus for USB3 port 1 done
762 12:42:46.077775 scan_bus: bus USB3 port 1 finished in 6 msecs
763 12:42:46.079997 USB3 port 2 scanning...
764 12:42:46.083972 scan_static_bus for USB3 port 2
765 12:42:46.087425 scan_static_bus for USB3 port 2 done
766 12:42:46.091999 scan_bus: bus USB3 port 2 finished in 6 msecs
767 12:42:46.094644 USB3 port 3 scanning...
768 12:42:46.098211 scan_static_bus for USB3 port 3
769 12:42:46.101900 scan_static_bus for USB3 port 3 done
770 12:42:46.105924 scan_bus: bus USB3 port 3 finished in 6 msecs
771 12:42:46.108813 USB3 port 4 scanning...
772 12:42:46.111581 scan_static_bus for USB3 port 4
773 12:42:46.115479 scan_static_bus for USB3 port 4 done
774 12:42:46.120134 scan_bus: bus USB3 port 4 finished in 6 msecs
775 12:42:46.122710 USB2 port 4 scanning...
776 12:42:46.126609 scan_static_bus for USB2 port 4
777 12:42:46.129887 scan_static_bus for USB2 port 4 done
778 12:42:46.134142 scan_bus: bus USB2 port 4 finished in 6 msecs
779 12:42:46.137295 USB3 port 5 scanning...
780 12:42:46.140763 scan_static_bus for USB3 port 5
781 12:42:46.144587 scan_static_bus for USB3 port 5 done
782 12:42:46.148464 scan_bus: bus USB3 port 5 finished in 6 msecs
783 12:42:46.152669 scan_static_bus for USB0 port 0 done
784 12:42:46.157838 scan_bus: bus USB0 port 0 finished in 220 msecs
785 12:42:46.161413 scan_static_bus for PCI: 00:14.0 done
786 12:42:46.166020 scan_bus: bus PCI: 00:14.0 finished in 236 msecs
787 12:42:46.168821 PCI: 00:15.2 scanning...
788 12:42:46.172182 scan_generic_bus for PCI: 00:15.2
789 12:42:46.176332 bus: PCI: 00:15.2[0]->I2C: 02:4a enabled
790 12:42:46.180449 scan_generic_bus for PCI: 00:15.2 done
791 12:42:46.184913 scan_bus: bus PCI: 00:15.2 finished in 11 msecs
792 12:42:46.187155 PCI: 00:15.3 scanning...
793 12:42:46.191057 scan_generic_bus for PCI: 00:15.3
794 12:42:46.195427 bus: PCI: 00:15.3[0]->I2C: 03:4a enabled
795 12:42:46.199263 scan_generic_bus for PCI: 00:15.3 done
796 12:42:46.204003 scan_bus: bus PCI: 00:15.3 finished in 11 msecs
797 12:42:46.206499 PCI: 00:19.0 scanning...
798 12:42:46.210292 scan_generic_bus for PCI: 00:19.0
799 12:42:46.214432 bus: PCI: 00:19.0[0]->I2C: 04:1a enabled
800 12:42:46.217747 scan_generic_bus for PCI: 00:19.0 done
801 12:42:46.222446 scan_bus: bus PCI: 00:19.0 finished in 11 msecs
802 12:42:46.225614 PCI: 00:1c.0 scanning...
803 12:42:46.229179 do_pci_scan_bridge for PCI: 00:1c.0
804 12:42:46.232121 PCI: pci_scan_bus for bus 01
805 12:42:46.235579 PCI: 01:00.0 [10ec/8168] ops
806 12:42:46.238256 PCI: 01:00.0 [10ec/8168] enabled
807 12:42:46.242309 Enabling Common Clock Configuration
808 12:42:46.246342 L1 Sub-State supported from root port 28
809 12:42:46.249010 L1 Sub-State Support = 0xf
810 12:42:46.252276 CommonModeRestoreTime = 0x96
811 12:42:46.256392 Power On Value = 0xf, Power On Scale = 0x1
812 12:42:46.258036 ASPM: Enabled L1
813 12:42:46.262613 PCIe: Max_Payload_Size adjusted to 128
814 12:42:46.267172 scan_bus: bus PCI: 00:1c.0 finished in 36 msecs
815 12:42:46.269840 PCI: 00:1e.2 scanning...
816 12:42:46.273034 scan_generic_bus for PCI: 00:1e.2
817 12:42:46.276929 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
818 12:42:46.281025 scan_generic_bus for PCI: 00:1e.2 done
819 12:42:46.286120 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
820 12:42:46.288285 PCI: 00:1f.0 scanning...
821 12:42:46.291349 scan_static_bus for PCI: 00:1f.0
822 12:42:46.294022 PNP: 0c09.0 enabled
823 12:42:46.296431 PNP: 0c09.0 scanning...
824 12:42:46.299844 scan_static_bus for PNP: 0c09.0
825 12:42:46.303708 scan_static_bus for PNP: 0c09.0 done
826 12:42:46.308267 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
827 12:42:46.311946 scan_static_bus for PCI: 00:1f.0 done
828 12:42:46.316350 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
829 12:42:46.319218 PCI: 00:1f.3 scanning...
830 12:42:46.322153 scan_static_bus for PCI: 00:1f.3
831 12:42:46.326687 scan_static_bus for PCI: 00:1f.3 done
832 12:42:46.330980 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
833 12:42:46.333487 PCI: 00:1f.4 scanning...
834 12:42:46.337498 scan_generic_bus for PCI: 00:1f.4
835 12:42:46.341473 scan_generic_bus for PCI: 00:1f.4 done
836 12:42:46.346807 scan_bus: bus PCI: 00:1f.4 finished in 7 msecs
837 12:42:46.348329 PCI: 00:1f.5 scanning...
838 12:42:46.352293 scan_generic_bus for PCI: 00:1f.5
839 12:42:46.356590 scan_generic_bus for PCI: 00:1f.5 done
840 12:42:46.361005 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
841 12:42:46.365660 scan_bus: bus DOMAIN: 0000 finished in 654 msecs
842 12:42:46.369275 scan_static_bus for Root Device done
843 12:42:46.373891 scan_bus: bus Root Device finished in 673 msecs
844 12:42:46.374832 done
845 12:42:46.381261 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1038 ms
846 12:42:46.387093 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
847 12:42:46.393484 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
848 12:42:46.399369 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
849 12:42:46.405200 MRC: 'RECOVERY_MRC_CACHE' does not need update.
850 12:42:46.407415 Chrome EC: UHEPI supported
851 12:42:46.414208 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
852 12:42:46.417359 SPI flash protection: WPSW=0 SRP0=0
853 12:42:46.422288 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
854 12:42:46.428171 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 39 ms
855 12:42:46.430989 found VGA at PCI: 00:02.0
856 12:42:46.433912 Setting up VGA for PCI: 00:02.0
857 12:42:46.439430 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
858 12:42:46.444371 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
859 12:42:46.446693 Allocating resources...
860 12:42:46.448367 Reading resources...
861 12:42:46.452861 Root Device read_resources bus 0 link: 0
862 12:42:46.457457 CPU_CLUSTER: 0 read_resources bus 0 link: 0
863 12:42:46.462698 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
864 12:42:46.466961 DOMAIN: 0000 read_resources bus 0 link: 0
865 12:42:46.471873 PCI: 00:04.0 read_resources bus 1 link: 0
866 12:42:46.477696 PCI: 00:04.0 read_resources bus 1 link: 0 done
867 12:42:46.482588 PCI: 00:14.0 read_resources bus 0 link: 0
868 12:42:46.486830 USB0 port 0 read_resources bus 0 link: 0
869 12:42:46.495873 USB0 port 0 read_resources bus 0 link: 0 done
870 12:42:46.501038 PCI: 00:14.0 read_resources bus 0 link: 0 done
871 12:42:46.506555 PCI: 00:15.2 read_resources bus 2 link: 0
872 12:42:46.511561 PCI: 00:15.2 read_resources bus 2 link: 0 done
873 12:42:46.516273 PCI: 00:15.3 read_resources bus 3 link: 0
874 12:42:46.521599 PCI: 00:15.3 read_resources bus 3 link: 0 done
875 12:42:46.526263 PCI: 00:19.0 read_resources bus 4 link: 0
876 12:42:46.531573 PCI: 00:19.0 read_resources bus 4 link: 0 done
877 12:42:46.536600 PCI: 00:1c.0 read_resources bus 1 link: 0
878 12:42:46.541944 PCI: 00:1c.0 read_resources bus 1 link: 0 done
879 12:42:46.547123 PCI: 00:1e.2 read_resources bus 5 link: 0
880 12:42:46.552803 PCI: 00:1e.2 read_resources bus 5 link: 0 done
881 12:42:46.557222 PCI: 00:1f.0 read_resources bus 0 link: 0
882 12:42:46.562240 PCI: 00:1f.0 read_resources bus 0 link: 0 done
883 12:42:46.568388 DOMAIN: 0000 read_resources bus 0 link: 0 done
884 12:42:46.573537 Root Device read_resources bus 0 link: 0 done
885 12:42:46.575024 Done reading resources.
886 12:42:46.580875 Show resources in subtree (Root Device)...After reading.
887 12:42:46.585384 Root Device child on link 0 CPU_CLUSTER: 0
888 12:42:46.589827 CPU_CLUSTER: 0 child on link 0 APIC: 00
889 12:42:46.590984 APIC: 00
890 12:42:46.592620 APIC: 02
891 12:42:46.596595 DOMAIN: 0000 child on link 0 PCI: 00:00.0
892 12:42:46.606415 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
893 12:42:46.616211 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
894 12:42:46.617851 PCI: 00:00.0
895 12:42:46.627147 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
896 12:42:46.636580 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
897 12:42:46.645883 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
898 12:42:46.654887 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
899 12:42:46.664054 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
900 12:42:46.674171 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
901 12:42:46.683410 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
902 12:42:46.692543 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
903 12:42:46.701720 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
904 12:42:46.710694 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
905 12:42:46.720675 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
906 12:42:46.729947 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
907 12:42:46.739061 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
908 12:42:46.749354 PCI: 00:00.0 resource base 100000000 size 5e800000 align 0 gran 0 limit 0 flags e0004200 index d
909 12:42:46.758259 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
910 12:42:46.767695 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
911 12:42:46.768990 PCI: 00:02.0
912 12:42:46.779242 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
913 12:42:46.790220 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
914 12:42:46.798557 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
915 12:42:46.802123 PCI: 00:04.0 child on link 0 GENERIC: 0.0
916 12:42:46.812600 PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
917 12:42:46.813986 GENERIC: 0.0
918 12:42:46.815950 PCI: 00:08.0
919 12:42:46.825579 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
920 12:42:46.827029 PCI: 00:12.0
921 12:42:46.837351 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
922 12:42:46.841365 PCI: 00:14.0 child on link 0 USB0 port 0
923 12:42:46.851833 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
924 12:42:46.857311 USB0 port 0 child on link 0 USB2 port 0
925 12:42:46.857831 USB2 port 0
926 12:42:46.860135 USB2 port 1
927 12:42:46.861814 USB2 port 2
928 12:42:46.863541 USB2 port 3
929 12:42:46.865177 USB2 port 5
930 12:42:46.866860 USB2 port 6
931 12:42:46.868659 USB2 port 9
932 12:42:46.870101 USB3 port 0
933 12:42:46.872300 USB3 port 1
934 12:42:46.874369 USB3 port 2
935 12:42:46.875980 USB3 port 3
936 12:42:46.877268 USB3 port 4
937 12:42:46.879548 USB2 port 4
938 12:42:46.881414 USB3 port 5
939 12:42:46.883170 PCI: 00:14.2
940 12:42:46.892536 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
941 12:42:46.902096 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
942 12:42:46.904633 PCI: 00:14.3
943 12:42:46.913513 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
944 12:42:46.915795 PCI: 00:14.5
945 12:42:46.926154 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
946 12:42:46.927077 PCI: 00:15.0
947 12:42:46.931944 PCI: 00:15.2 child on link 0 I2C: 02:4a
948 12:42:46.941379 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
949 12:42:46.943172 I2C: 02:4a
950 12:42:46.947772 PCI: 00:15.3 child on link 0 I2C: 03:4a
951 12:42:46.956966 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
952 12:42:46.958666 I2C: 03:4a
953 12:42:46.960390 PCI: 00:16.0
954 12:42:46.970278 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
955 12:42:46.974788 PCI: 00:19.0 child on link 0 I2C: 04:1a
956 12:42:46.984737 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
957 12:42:46.986053 I2C: 04:1a
958 12:42:46.987751 PCI: 00:1a.0
959 12:42:46.997527 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
960 12:42:47.002113 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
961 12:42:47.010716 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
962 12:42:47.020042 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
963 12:42:47.029229 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
964 12:42:47.031240 PCI: 01:00.0
965 12:42:47.039576 PCI: 01:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
966 12:42:47.049628 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
967 12:42:47.060398 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 20
968 12:42:47.061537 PCI: 00:1e.0
969 12:42:47.072345 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
970 12:42:47.083184 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
971 12:42:47.087016 PCI: 00:1e.2 child on link 0 SPI: 00
972 12:42:47.096678 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
973 12:42:47.097710 SPI: 00
974 12:42:47.102305 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
975 12:42:47.110800 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
976 12:42:47.119605 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
977 12:42:47.121028 PNP: 0c09.0
978 12:42:47.129989 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
979 12:42:47.131828 PCI: 00:1f.3
980 12:42:47.142203 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
981 12:42:47.152058 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
982 12:42:47.153649 PCI: 00:1f.4
983 12:42:47.162264 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
984 12:42:47.172334 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
985 12:42:47.174093 PCI: 00:1f.5
986 12:42:47.183206 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
987 12:42:47.191300 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
988 12:42:47.196356 PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff
989 12:42:47.200864 PCI: 01:00.0 10 * [0x0 - 0xff] io
990 12:42:47.207415 PCI: 00:1c.0 io: size: 1000 align: 12 gran: 12 limit: ffff done
991 12:42:47.212549 PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
992 12:42:47.217109 PCI: 01:00.0 20 * [0x0 - 0x3fff] mem
993 12:42:47.221752 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
994 12:42:47.228894 PCI: 00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
995 12:42:47.236282 PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
996 12:42:47.243038 PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
997 12:42:47.250389 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
998 12:42:47.257234 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
999 12:42:47.264428 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1000 12:42:47.272373 update_constraints: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1001 12:42:47.279976 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1002 12:42:47.287123 update_constraints: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1003 12:42:47.290171 DOMAIN: 0000: Resource ranges:
1004 12:42:47.294263 * Base: 1000, Size: 800, Tag: 100
1005 12:42:47.297668 * Base: 1900, Size: d6a0, Tag: 100
1006 12:42:47.300916 * Base: efc0, Size: 1040, Tag: 100
1007 12:42:47.306129 PCI: 00:1c.0 1c * [0x2000 - 0x2fff] limit: 2fff io
1008 12:42:47.311476 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1009 12:42:47.318200 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1010 12:42:47.325138 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1011 12:42:47.332886 update_constraints: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1012 12:42:47.340718 update_constraints: PCI: 00:00.0 01 base fed10000 limit fed17fff mem (fixed)
1013 12:42:47.348373 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1014 12:42:47.355729 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1015 12:42:47.363445 update_constraints: PCI: 00:00.0 04 base fc000000 limit fc000fff mem (fixed)
1016 12:42:47.371361 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1017 12:42:47.379410 update_constraints: PCI: 00:00.0 06 base fe000000 limit fe00ffff mem (fixed)
1018 12:42:47.386747 update_constraints: PCI: 00:00.0 07 base fed90000 limit fed90fff mem (fixed)
1019 12:42:47.394385 update_constraints: PCI: 00:00.0 08 base fed91000 limit fed91fff mem (fixed)
1020 12:42:47.401513 update_constraints: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1021 12:42:47.409579 update_constraints: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1022 12:42:47.417197 update_constraints: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1023 12:42:47.424341 update_constraints: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1024 12:42:47.432403 update_constraints: PCI: 00:00.0 0d base 100000000 limit 15e7fffff mem (fixed)
1025 12:42:47.440290 update_constraints: PCI: 00:00.0 0e base 000a0000 limit 000bffff mem (fixed)
1026 12:42:47.447578 update_constraints: PCI: 00:00.0 0f base 000c0000 limit 000fffff mem (fixed)
1027 12:42:47.455551 update_constraints: PCI: 00:1e.0 10 base fe032000 limit fe032fff mem (fixed)
1028 12:42:47.458879 DOMAIN: 0000: Resource ranges:
1029 12:42:47.463316 * Base: 9f800000, Size: 40800000, Tag: 200
1030 12:42:47.467534 * Base: f0000000, Size: c000000, Tag: 200
1031 12:42:47.472418 * Base: fc001000, Size: 1fff000, Tag: 200
1032 12:42:47.475550 * Base: fe010000, Size: 22000, Tag: 200
1033 12:42:47.480407 * Base: fe033000, Size: cdd000, Tag: 200
1034 12:42:47.483701 * Base: fed18000, Size: 68000, Tag: 200
1035 12:42:47.489035 * Base: fed84000, Size: c000, Tag: 200
1036 12:42:47.492224 * Base: fed92000, Size: e000, Tag: 200
1037 12:42:47.496388 * Base: feda2000, Size: 125e000, Tag: 200
1038 12:42:47.501255 * Base: 15e800000, Size: 7ea1800000, Tag: 100200
1039 12:42:47.508502 PCI: 00:02.0 18 * [0xa0000000 - 0xafffffff] limit: afffffff prefmem
1040 12:42:47.515243 PCI: 00:02.0 10 * [0xb0000000 - 0xb0ffffff] limit: b0ffffff mem
1041 12:42:47.521835 PCI: 00:1c.0 20 * [0x9f800000 - 0x9f8fffff] limit: 9f8fffff mem
1042 12:42:47.528097 PCI: 00:1f.3 20 * [0x9f900000 - 0x9f9fffff] limit: 9f9fffff mem
1043 12:42:47.534796 PCI: 00:14.0 10 * [0x9fa00000 - 0x9fa0ffff] limit: 9fa0ffff mem
1044 12:42:47.540914 PCI: 00:04.0 10 * [0x9fa10000 - 0x9fa17fff] limit: 9fa17fff mem
1045 12:42:47.548406 PCI: 00:14.3 10 * [0x9fa18000 - 0x9fa1bfff] limit: 9fa1bfff mem
1046 12:42:47.554811 PCI: 00:1f.3 10 * [0x9fa1c000 - 0x9fa1ffff] limit: 9fa1ffff mem
1047 12:42:47.561290 PCI: 00:14.2 10 * [0x9fa20000 - 0x9fa21fff] limit: 9fa21fff mem
1048 12:42:47.567420 PCI: 00:08.0 10 * [0x9fa22000 - 0x9fa22fff] limit: 9fa22fff mem
1049 12:42:47.574193 PCI: 00:12.0 10 * [0x9fa23000 - 0x9fa23fff] limit: 9fa23fff mem
1050 12:42:47.580828 PCI: 00:14.2 18 * [0x9fa24000 - 0x9fa24fff] limit: 9fa24fff mem
1051 12:42:47.587493 PCI: 00:14.5 10 * [0x9fa25000 - 0x9fa25fff] limit: 9fa25fff mem
1052 12:42:47.594276 PCI: 00:15.2 10 * [0x9fa26000 - 0x9fa26fff] limit: 9fa26fff mem
1053 12:42:47.600904 PCI: 00:15.3 10 * [0x9fa27000 - 0x9fa27fff] limit: 9fa27fff mem
1054 12:42:47.608236 PCI: 00:16.0 10 * [0x9fa28000 - 0x9fa28fff] limit: 9fa28fff mem
1055 12:42:47.614660 PCI: 00:19.0 10 * [0x9fa29000 - 0x9fa29fff] limit: 9fa29fff mem
1056 12:42:47.621024 PCI: 00:1a.0 10 * [0x9fa2a000 - 0x9fa2afff] limit: 9fa2afff mem
1057 12:42:47.627772 PCI: 00:1e.0 18 * [0x9fa2b000 - 0x9fa2bfff] limit: 9fa2bfff mem
1058 12:42:47.634632 PCI: 00:1e.2 10 * [0x9fa2c000 - 0x9fa2cfff] limit: 9fa2cfff mem
1059 12:42:47.640500 PCI: 00:1f.5 10 * [0x9fa2d000 - 0x9fa2dfff] limit: 9fa2dfff mem
1060 12:42:47.646973 PCI: 00:1f.4 10 * [0x9fa2e000 - 0x9fa2e0ff] limit: 9fa2e0ff mem
1061 12:42:47.655624 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1062 12:42:47.662069 PCI: 00:1c.0 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff
1063 12:42:47.664738 PCI: 00:1c.0: Resource ranges:
1064 12:42:47.668800 * Base: 2000, Size: 1000, Tag: 100
1065 12:42:47.673228 PCI: 01:00.0 10 * [0x2000 - 0x20ff] limit: 20ff io
1066 12:42:47.681243 PCI: 00:1c.0 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff done
1067 12:42:47.689106 PCI: 00:1c.0 mem: base: 9f800000 size: 100000 align: 20 gran: 20 limit: 9f8fffff
1068 12:42:47.691776 PCI: 00:1c.0: Resource ranges:
1069 12:42:47.696217 * Base: 9f800000, Size: 100000, Tag: 200
1070 12:42:47.702804 PCI: 01:00.0 20 * [0x9f800000 - 0x9f803fff] limit: 9f803fff mem
1071 12:42:47.709291 PCI: 01:00.0 18 * [0x9f804000 - 0x9f804fff] limit: 9f804fff mem
1072 12:42:47.717885 PCI: 00:1c.0 mem: base: 9f800000 size: 100000 align: 20 gran: 20 limit: 9f8fffff done
1073 12:42:47.725288 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1074 12:42:47.729635 Root Device assign_resources, bus 0 link: 0
1075 12:42:47.734198 DOMAIN: 0000 assign_resources, bus 0 link: 0
1076 12:42:47.742160 PCI: 00:02.0 10 <- [0x00b0000000 - 0x00b0ffffff] size 0x01000000 gran 0x18 mem64
1077 12:42:47.751322 PCI: 00:02.0 18 <- [0x00a0000000 - 0x00afffffff] size 0x10000000 gran 0x1c prefmem64
1078 12:42:47.759193 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1079 12:42:47.766880 PCI: 00:04.0 10 <- [0x009fa10000 - 0x009fa17fff] size 0x00008000 gran 0x0f mem64
1080 12:42:47.771500 PCI: 00:04.0 assign_resources, bus 1 link: 0
1081 12:42:47.776692 PCI: 00:04.0 assign_resources, bus 1 link: 0
1082 12:42:47.784244 PCI: 00:08.0 10 <- [0x009fa22000 - 0x009fa22fff] size 0x00001000 gran 0x0c mem64
1083 12:42:47.793053 PCI: 00:12.0 10 <- [0x009fa23000 - 0x009fa23fff] size 0x00001000 gran 0x0c mem64
1084 12:42:47.801009 PCI: 00:14.0 10 <- [0x009fa00000 - 0x009fa0ffff] size 0x00010000 gran 0x10 mem64
1085 12:42:47.806011 PCI: 00:14.0 assign_resources, bus 0 link: 0
1086 12:42:47.810539 PCI: 00:14.0 assign_resources, bus 0 link: 0
1087 12:42:47.819017 PCI: 00:14.2 10 <- [0x009fa20000 - 0x009fa21fff] size 0x00002000 gran 0x0d mem64
1088 12:42:47.826329 PCI: 00:14.2 18 <- [0x009fa24000 - 0x009fa24fff] size 0x00001000 gran 0x0c mem64
1089 12:42:47.834775 PCI: 00:14.3 10 <- [0x009fa18000 - 0x009fa1bfff] size 0x00004000 gran 0x0e mem64
1090 12:42:47.842859 PCI: 00:14.5 10 <- [0x009fa25000 - 0x009fa25fff] size 0x00001000 gran 0x0c mem64
1091 12:42:47.851702 PCI: 00:15.2 10 <- [0x009fa26000 - 0x009fa26fff] size 0x00001000 gran 0x0c mem64
1092 12:42:47.856245 PCI: 00:15.2 assign_resources, bus 2 link: 0
1093 12:42:47.860781 PCI: 00:15.2 assign_resources, bus 2 link: 0
1094 12:42:47.869505 PCI: 00:15.3 10 <- [0x009fa27000 - 0x009fa27fff] size 0x00001000 gran 0x0c mem64
1095 12:42:47.873770 PCI: 00:15.3 assign_resources, bus 3 link: 0
1096 12:42:47.878569 PCI: 00:15.3 assign_resources, bus 3 link: 0
1097 12:42:47.887093 PCI: 00:16.0 10 <- [0x009fa28000 - 0x009fa28fff] size 0x00001000 gran 0x0c mem64
1098 12:42:47.894987 PCI: 00:19.0 10 <- [0x009fa29000 - 0x009fa29fff] size 0x00001000 gran 0x0c mem64
1099 12:42:47.899801 PCI: 00:19.0 assign_resources, bus 4 link: 0
1100 12:42:47.904242 PCI: 00:19.0 assign_resources, bus 4 link: 0
1101 12:42:47.912901 PCI: 00:1a.0 10 <- [0x009fa2a000 - 0x009fa2afff] size 0x00001000 gran 0x0c mem64
1102 12:42:47.921451 PCI: 00:1c.0 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 01 io
1103 12:42:47.931675 PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1104 12:42:47.939329 PCI: 00:1c.0 20 <- [0x009f800000 - 0x009f8fffff] size 0x00100000 gran 0x14 bus 01 mem
1105 12:42:47.944404 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1106 12:42:47.952627 PCI: 01:00.0 10 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io
1107 12:42:47.959994 PCI: 01:00.0 18 <- [0x009f804000 - 0x009f804fff] size 0x00001000 gran 0x0c mem64
1108 12:42:47.968498 PCI: 01:00.0 20 <- [0x009f800000 - 0x009f803fff] size 0x00004000 gran 0x0e mem64
1109 12:42:47.972544 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1110 12:42:47.980891 PCI: 00:1e.0 18 <- [0x009fa2b000 - 0x009fa2bfff] size 0x00001000 gran 0x0c mem64
1111 12:42:47.989991 PCI: 00:1e.2 10 <- [0x009fa2c000 - 0x009fa2cfff] size 0x00001000 gran 0x0c mem64
1112 12:42:47.993650 PCI: 00:1e.2 assign_resources, bus 5 link: 0
1113 12:42:47.999346 PCI: 00:1e.2 assign_resources, bus 5 link: 0
1114 12:42:48.003731 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1115 12:42:48.008180 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1116 12:42:48.013537 LPC: Trying to open IO window from 800 size 1ff
1117 12:42:48.021903 PCI: 00:1f.3 10 <- [0x009fa1c000 - 0x009fa1ffff] size 0x00004000 gran 0x0e mem64
1118 12:42:48.029982 PCI: 00:1f.3 20 <- [0x009f900000 - 0x009f9fffff] size 0x00100000 gran 0x14 mem64
1119 12:42:48.038242 PCI: 00:1f.4 10 <- [0x009fa2e000 - 0x009fa2e0ff] size 0x00000100 gran 0x08 mem64
1120 12:42:48.045860 PCI: 00:1f.5 10 <- [0x009fa2d000 - 0x009fa2dfff] size 0x00001000 gran 0x0c mem
1121 12:42:48.050695 DOMAIN: 0000 assign_resources, bus 0 link: 0
1122 12:42:48.055676 Root Device assign_resources, bus 0 link: 0
1123 12:42:48.057577 Done setting resources.
1124 12:42:48.064354 Show resources in subtree (Root Device)...After assigning values.
1125 12:42:48.068800 Root Device child on link 0 CPU_CLUSTER: 0
1126 12:42:48.073214 CPU_CLUSTER: 0 child on link 0 APIC: 00
1127 12:42:48.073877 APIC: 00
1128 12:42:48.076131 APIC: 02
1129 12:42:48.080177 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1130 12:42:48.089293 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1131 12:42:48.099534 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1132 12:42:48.101125 PCI: 00:00.0
1133 12:42:48.110790 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1134 12:42:48.119680 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1135 12:42:48.129327 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1136 12:42:48.138510 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1137 12:42:48.147643 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1138 12:42:48.157536 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1139 12:42:48.167256 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1140 12:42:48.176535 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1141 12:42:48.185533 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1142 12:42:48.194614 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1143 12:42:48.203703 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1144 12:42:48.213001 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1145 12:42:48.222984 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1146 12:42:48.232489 PCI: 00:00.0 resource base 100000000 size 5e800000 align 0 gran 0 limit 0 flags e0004200 index d
1147 12:42:48.241800 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1148 12:42:48.251002 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1149 12:42:48.252232 PCI: 00:02.0
1150 12:42:48.262516 PCI: 00:02.0 resource base b0000000 size 1000000 align 24 gran 24 limit b0ffffff flags 60000201 index 10
1151 12:42:48.273767 PCI: 00:02.0 resource base a0000000 size 10000000 align 28 gran 28 limit afffffff flags 60001201 index 18
1152 12:42:48.282874 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1153 12:42:48.287426 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1154 12:42:48.297021 PCI: 00:04.0 resource base 9fa10000 size 8000 align 15 gran 15 limit 9fa17fff flags 60000201 index 10
1155 12:42:48.299241 GENERIC: 0.0
1156 12:42:48.301031 PCI: 00:08.0
1157 12:42:48.310891 PCI: 00:08.0 resource base 9fa22000 size 1000 align 12 gran 12 limit 9fa22fff flags 60000201 index 10
1158 12:42:48.313172 PCI: 00:12.0
1159 12:42:48.323261 PCI: 00:12.0 resource base 9fa23000 size 1000 align 12 gran 12 limit 9fa23fff flags 60000201 index 10
1160 12:42:48.327608 PCI: 00:14.0 child on link 0 USB0 port 0
1161 12:42:48.338055 PCI: 00:14.0 resource base 9fa00000 size 10000 align 16 gran 16 limit 9fa0ffff flags 60000201 index 10
1162 12:42:48.342619 USB0 port 0 child on link 0 USB2 port 0
1163 12:42:48.344139 USB2 port 0
1164 12:42:48.345806 USB2 port 1
1165 12:42:48.347498 USB2 port 2
1166 12:42:48.349259 USB2 port 3
1167 12:42:48.351780 USB2 port 5
1168 12:42:48.352855 USB2 port 6
1169 12:42:48.354192 USB2 port 9
1170 12:42:48.356680 USB3 port 0
1171 12:42:48.358470 USB3 port 1
1172 12:42:48.360000 USB3 port 2
1173 12:42:48.361635 USB3 port 3
1174 12:42:48.363547 USB3 port 4
1175 12:42:48.365479 USB2 port 4
1176 12:42:48.366578 USB3 port 5
1177 12:42:48.368446 PCI: 00:14.2
1178 12:42:48.378880 PCI: 00:14.2 resource base 9fa20000 size 2000 align 13 gran 13 limit 9fa21fff flags 60000201 index 10
1179 12:42:48.389108 PCI: 00:14.2 resource base 9fa24000 size 1000 align 12 gran 12 limit 9fa24fff flags 60000201 index 18
1180 12:42:48.390550 PCI: 00:14.3
1181 12:42:48.401579 PCI: 00:14.3 resource base 9fa18000 size 4000 align 14 gran 14 limit 9fa1bfff flags 60000201 index 10
1182 12:42:48.403808 PCI: 00:14.5
1183 12:42:48.413388 PCI: 00:14.5 resource base 9fa25000 size 1000 align 12 gran 12 limit 9fa25fff flags 60000201 index 10
1184 12:42:48.414912 PCI: 00:15.0
1185 12:42:48.418885 PCI: 00:15.2 child on link 0 I2C: 02:4a
1186 12:42:48.429149 PCI: 00:15.2 resource base 9fa26000 size 1000 align 12 gran 12 limit 9fa26fff flags 60000201 index 10
1187 12:42:48.430821 I2C: 02:4a
1188 12:42:48.435857 PCI: 00:15.3 child on link 0 I2C: 03:4a
1189 12:42:48.445516 PCI: 00:15.3 resource base 9fa27000 size 1000 align 12 gran 12 limit 9fa27fff flags 60000201 index 10
1190 12:42:48.447816 I2C: 03:4a
1191 12:42:48.449269 PCI: 00:16.0
1192 12:42:48.459345 PCI: 00:16.0 resource base 9fa28000 size 1000 align 12 gran 12 limit 9fa28fff flags 60000201 index 10
1193 12:42:48.463914 PCI: 00:19.0 child on link 0 I2C: 04:1a
1194 12:42:48.474913 PCI: 00:19.0 resource base 9fa29000 size 1000 align 12 gran 12 limit 9fa29fff flags 60000201 index 10
1195 12:42:48.475432 I2C: 04:1a
1196 12:42:48.476715 PCI: 00:1a.0
1197 12:42:48.487000 PCI: 00:1a.0 resource base 9fa2a000 size 1000 align 12 gran 12 limit 9fa2afff flags 60000201 index 10
1198 12:42:48.492130 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1199 12:42:48.501402 PCI: 00:1c.0 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c
1200 12:42:48.512862 PCI: 00:1c.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1201 12:42:48.522835 PCI: 00:1c.0 resource base 9f800000 size 100000 align 20 gran 20 limit 9f8fffff flags 60080202 index 20
1202 12:42:48.524944 PCI: 01:00.0
1203 12:42:48.534654 PCI: 01:00.0 resource base 2000 size 100 align 8 gran 8 limit 20ff flags 60000100 index 10
1204 12:42:48.545102 PCI: 01:00.0 resource base 9f804000 size 1000 align 12 gran 12 limit 9f804fff flags 60000201 index 18
1205 12:42:48.555314 PCI: 01:00.0 resource base 9f800000 size 4000 align 14 gran 14 limit 9f803fff flags 60000201 index 20
1206 12:42:48.557048 PCI: 00:1e.0
1207 12:42:48.568336 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1208 12:42:48.578777 PCI: 00:1e.0 resource base 9fa2b000 size 1000 align 12 gran 12 limit 9fa2bfff flags 60000201 index 18
1209 12:42:48.582724 PCI: 00:1e.2 child on link 0 SPI: 00
1210 12:42:48.593097 PCI: 00:1e.2 resource base 9fa2c000 size 1000 align 12 gran 12 limit 9fa2cfff flags 60000201 index 10
1211 12:42:48.593725 SPI: 00
1212 12:42:48.598573 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1213 12:42:48.607470 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1214 12:42:48.616645 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1215 12:42:48.617750 PNP: 0c09.0
1216 12:42:48.626495 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1217 12:42:48.627868 PCI: 00:1f.3
1218 12:42:48.637960 PCI: 00:1f.3 resource base 9fa1c000 size 4000 align 14 gran 14 limit 9fa1ffff flags 60000201 index 10
1219 12:42:48.648642 PCI: 00:1f.3 resource base 9f900000 size 100000 align 20 gran 20 limit 9f9fffff flags 60000201 index 20
1220 12:42:48.650039 PCI: 00:1f.4
1221 12:42:48.659394 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1222 12:42:48.670063 PCI: 00:1f.4 resource base 9fa2e000 size 100 align 12 gran 8 limit 9fa2e0ff flags 60000201 index 10
1223 12:42:48.671261 PCI: 00:1f.5
1224 12:42:48.681964 PCI: 00:1f.5 resource base 9fa2d000 size 1000 align 12 gran 12 limit 9fa2dfff flags 60000200 index 10
1225 12:42:48.684785 Done allocating resources.
1226 12:42:48.690425 BS: BS_DEV_RESOURCES run times (exec / console): 30 / 2221 ms
1227 12:42:48.693382 Enabling resources...
1228 12:42:48.697964 PCI: 00:00.0 subsystem <- 8086/9b71
1229 12:42:48.700133 PCI: 00:00.0 cmd <- 06
1230 12:42:48.704115 PCI: 00:02.0 subsystem <- 8086/9baa
1231 12:42:48.706798 PCI: 00:02.0 cmd <- 03
1232 12:42:48.710031 PCI: 00:04.0 subsystem <- 8086/1903
1233 12:42:48.712211 PCI: 00:04.0 cmd <- 02
1234 12:42:48.714728 PCI: 00:08.0 cmd <- 06
1235 12:42:48.718856 PCI: 00:12.0 subsystem <- 8086/02f9
1236 12:42:48.721541 PCI: 00:12.0 cmd <- 02
1237 12:42:48.725124 PCI: 00:14.0 subsystem <- 8086/02ed
1238 12:42:48.727256 PCI: 00:14.0 cmd <- 02
1239 12:42:48.730688 PCI: 00:14.2 cmd <- 02
1240 12:42:48.733760 PCI: 00:14.3 subsystem <- 8086/02f0
1241 12:42:48.736593 PCI: 00:14.3 cmd <- 02
1242 12:42:48.741054 PCI: 00:14.5 subsystem <- 8086/02f5
1243 12:42:48.742192 PCI: 00:14.5 cmd <- 06
1244 12:42:48.747361 PCI: 00:15.2 subsystem <- 8086/02ea
1245 12:42:48.749622 PCI: 00:15.2 cmd <- 02
1246 12:42:48.752732 PCI: 00:15.3 subsystem <- 8086/02eb
1247 12:42:48.755636 PCI: 00:15.3 cmd <- 02
1248 12:42:48.759731 PCI: 00:16.0 subsystem <- 8086/02e0
1249 12:42:48.762222 PCI: 00:16.0 cmd <- 02
1250 12:42:48.765384 PCI: 00:19.0 subsystem <- 8086/02c5
1251 12:42:48.767967 PCI: 00:19.0 cmd <- 02
1252 12:42:48.771827 PCI: 00:1a.0 subsystem <- 8086/02c4
1253 12:42:48.774294 PCI: 00:1a.0 cmd <- 06
1254 12:42:48.777751 PCI: 00:1c.0 bridge ctrl <- 0013
1255 12:42:48.780769 PCI: 00:1c.0 subsystem <- 8086/02be
1256 12:42:48.784148 PCI: 00:1c.0 cmd <- 07
1257 12:42:48.788106 PCI: 00:1e.0 subsystem <- 8086/02a8
1258 12:42:48.789916 PCI: 00:1e.0 cmd <- 06
1259 12:42:48.793931 PCI: 00:1e.2 subsystem <- 8086/02aa
1260 12:42:48.796086 PCI: 00:1e.2 cmd <- 06
1261 12:42:48.799863 PCI: 00:1f.0 subsystem <- 8086/0285
1262 12:42:48.802282 PCI: 00:1f.0 cmd <- 407
1263 12:42:48.807053 PCI: 00:1f.3 subsystem <- 8086/02c8
1264 12:42:48.809162 PCI: 00:1f.3 cmd <- 02
1265 12:42:48.812957 PCI: 00:1f.4 subsystem <- 8086/02a3
1266 12:42:48.815023 PCI: 00:1f.4 cmd <- 03
1267 12:42:48.819537 PCI: 00:1f.5 subsystem <- 8086/02a4
1268 12:42:48.821906 PCI: 00:1f.5 cmd <- 406
1269 12:42:48.826477 PCI: 01:00.0 cmd <- 03
1270 12:42:48.828743 done.
1271 12:42:48.834283 BS: BS_DEV_ENABLE run times (exec / console): 11 / 126 ms
1272 12:42:48.837155 Initializing devices...
1273 12:42:48.837855 Root Device init
1274 12:42:48.843050 Chrome EC: Set SMI mask to 0x0000000000000000
1275 12:42:48.848581 Chrome EC: clear events_b mask to 0x0000000000000000
1276 12:42:48.854646 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000004
1277 12:42:48.860237 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000000000004
1278 12:42:48.866426 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000000080004
1279 12:42:48.871044 Chrome EC: Set WAKE mask to 0x0000000000000000
1280 12:42:48.874527 Root Device init finished in 32 msecs
1281 12:42:48.879014 PCI: 00:00.0 init
1282 12:42:48.881794 CPU TDP = 15 Watts
1283 12:42:48.884057 CPU PL1 = 15 Watts
1284 12:42:48.885317 CPU PL2 = 35 Watts
1285 12:42:48.888002 CPU PsysPL2 = 65 Watts
1286 12:42:48.892046 PCI: 00:00.0 init finished in 9 msecs
1287 12:42:48.894299 PCI: 00:02.0 init
1288 12:42:48.896327 GMA: Found VBT in CBFS
1289 12:42:48.899454 GMA: Found valid VBT in CBFS
1290 12:42:48.903776 PCI: 00:02.0 init finished in 5 msecs
1291 12:42:48.906003 PCI: 00:08.0 init
1292 12:42:48.910406 PCI: 00:08.0 init finished in 0 msecs
1293 12:42:48.911945 PCI: 00:12.0 init
1294 12:42:48.915850 PCI: 00:12.0 init finished in 0 msecs
1295 12:42:48.918078 PCI: 00:14.0 init
1296 12:42:48.921492 PCI: 00:14.0 init finished in 0 msecs
1297 12:42:48.924014 PCI: 00:14.2 init
1298 12:42:48.927765 PCI: 00:14.2 init finished in 0 msecs
1299 12:42:48.930055 PCI: 00:14.3 init
1300 12:42:48.934197 PCI: 00:14.3 init finished in 0 msecs
1301 12:42:48.937362 PCI: 00:15.2 init
1302 12:42:48.940206 I2C bus 2 version 0x3132322a
1303 12:42:48.944149 DW I2C bus 2 at 0x9fa26000 (400 KHz)
1304 12:42:48.947599 PCI: 00:15.2 init finished in 6 msecs
1305 12:42:48.949910 PCI: 00:15.3 init
1306 12:42:48.952690 I2C bus 3 version 0x3132322a
1307 12:42:48.956536 DW I2C bus 3 at 0x9fa27000 (400 KHz)
1308 12:42:48.960776 PCI: 00:15.3 init finished in 6 msecs
1309 12:42:48.962748 PCI: 00:16.0 init
1310 12:42:48.966492 PCI: 00:16.0 init finished in 0 msecs
1311 12:42:48.969006 PCI: 00:19.0 init
1312 12:42:48.971915 I2C bus 4 version 0x3132322a
1313 12:42:48.975259 DW I2C bus 4 at 0x9fa29000 (400 KHz)
1314 12:42:48.978947 PCI: 00:19.0 init finished in 6 msecs
1315 12:42:48.981373 PCI: 00:1a.0 init
1316 12:42:48.985004 PCI: 00:1a.0 init finished in 0 msecs
1317 12:42:48.987566 PCI: 00:1c.0 init
1318 12:42:48.990542 Initializing PCH PCIe bridge.
1319 12:42:48.994468 PCI: 00:1c.0 init finished in 3 msecs
1320 12:42:48.996880 PCI: 00:1f.0 init
1321 12:42:49.001686 IOAPIC: Initializing IOAPIC at 0xfec00000
1322 12:42:49.006177 IOAPIC: Bootstrap Processor Local APIC = 0x00
1323 12:42:49.007862 IOAPIC: ID = 0x02
1324 12:42:49.010444 IOAPIC: Dumping registers
1325 12:42:49.012713 reg 0x0000: 0x02000000
1326 12:42:49.015282 reg 0x0001: 0x00770020
1327 12:42:49.018336 reg 0x0002: 0x00000000
1328 12:42:49.022187 PCI: 00:1f.0 init finished in 21 msecs
1329 12:42:49.024611 PCI: 00:1f.4 init
1330 12:42:49.028667 PCI: 00:1f.4 init finished in 0 msecs
1331 12:42:49.038722 PCI: 01:00.0 init
1332 12:42:49.043667 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1333 12:42:49.050380 Error: Could not locate 'ethernet_mac0' in VPD
1334 12:42:49.056500 r8168: mac address not found in VPD, using default 00:e0:4c:00:c0:b0
1335 12:42:49.060834 r8168: ignore invalid MAC address in cbfs
1336 12:42:49.064087 r8168: Resetting NIC...done
1337 12:42:49.067890 r8168: Programming MAC Address...done
1338 12:42:49.070675 r8168: Customized LED 0x5af
1339 12:42:49.074213 r8168: read back LED setting as 0x5af
1340 12:42:49.078249 PCI: 01:00.0 init finished in 35 msecs
1341 12:42:49.081680 PNP: 0c09.0 init
1342 12:42:49.085771 Google Chrome EC uptime: 3534345.972 seconds
1343 12:42:49.090379 Google Chrome AP resets since EC boot: 7641
1344 12:42:49.094873 Google Chrome most recent AP reset causes:
1345 12:42:49.098391 3534304.538: 32768 shutdown: power failure
1346 12:42:49.103629 3534304.543: 32768 shutdown: power failure
1347 12:42:49.107586 3534304.840: 32775 shutdown: entering G3
1348 12:42:49.112123 3534330.885: 32774 shutdown: by console command
1349 12:42:49.117442 Google Chrome EC reset flags at last EC boot: reset-pin
1350 12:42:49.121553 PNP: 0c09.0 init finished in 36 msecs
1351 12:42:49.124261 Devices initialized
1352 12:42:49.127034 Show all devs... After init.
1353 12:42:49.129227 Root Device: enabled 1
1354 12:42:49.131959 CPU_CLUSTER: 0: enabled 1
1355 12:42:49.134637 DOMAIN: 0000: enabled 1
1356 12:42:49.136637 APIC: 00: enabled 1
1357 12:42:49.138917 PCI: 00:00.0: enabled 1
1358 12:42:49.141171 PCI: 00:02.0: enabled 1
1359 12:42:49.144066 PCI: 00:04.0: enabled 1
1360 12:42:49.146026 PCI: 00:05.0: enabled 0
1361 12:42:49.148571 PCI: 00:12.0: enabled 1
1362 12:42:49.151068 PCI: 00:12.5: enabled 0
1363 12:42:49.153188 PCI: 00:12.6: enabled 0
1364 12:42:49.155362 PCI: 00:14.0: enabled 1
1365 12:42:49.158295 PCI: 00:14.1: enabled 0
1366 12:42:49.160398 PCI: 00:14.3: enabled 1
1367 12:42:49.162788 PCI: 00:14.5: enabled 1
1368 12:42:49.165445 PCI: 00:15.0: enabled 0
1369 12:42:49.167629 PCI: 00:15.1: enabled 0
1370 12:42:49.170184 PCI: 00:15.2: enabled 1
1371 12:42:49.172772 PCI: 00:15.3: enabled 1
1372 12:42:49.174914 PCI: 00:16.0: enabled 1
1373 12:42:49.177285 PCI: 00:16.1: enabled 0
1374 12:42:49.179775 PCI: 00:16.2: enabled 0
1375 12:42:49.182099 PCI: 00:16.3: enabled 0
1376 12:42:49.184764 PCI: 00:16.4: enabled 0
1377 12:42:49.187376 PCI: 00:16.5: enabled 0
1378 12:42:49.190047 PCI: 00:17.0: enabled 0
1379 12:42:49.192699 PCI: 00:19.0: enabled 1
1380 12:42:49.194476 PCI: 00:19.1: enabled 0
1381 12:42:49.197476 PCI: 00:19.2: enabled 0
1382 12:42:49.199303 PCI: 00:1a.0: enabled 1
1383 12:42:49.202473 PCI: 00:1c.0: enabled 0
1384 12:42:49.204776 PCI: 00:1c.1: enabled 0
1385 12:42:49.207102 PCI: 00:1c.2: enabled 0
1386 12:42:49.209053 PCI: 00:1c.3: enabled 0
1387 12:42:49.212391 PCI: 00:1c.4: enabled 0
1388 12:42:49.214089 PCI: 00:1c.5: enabled 0
1389 12:42:49.216928 PCI: 00:1c.0: enabled 1
1390 12:42:49.219270 PCI: 00:1c.7: enabled 0
1391 12:42:49.221046 PCI: 00:1d.0: enabled 1
1392 12:42:49.223620 PCI: 00:1d.1: enabled 0
1393 12:42:49.226499 PCI: 00:1d.2: enabled 1
1394 12:42:49.229092 PCI: 00:1d.3: enabled 0
1395 12:42:49.231425 PCI: 00:1d.4: enabled 0
1396 12:42:49.233718 PCI: 00:1d.5: enabled 1
1397 12:42:49.236622 PCI: 00:1e.0: enabled 1
1398 12:42:49.238983 PCI: 00:1e.1: enabled 0
1399 12:42:49.241161 PCI: 00:1e.2: enabled 1
1400 12:42:49.243097 PCI: 00:1e.3: enabled 0
1401 12:42:49.245869 PCI: 00:1f.0: enabled 1
1402 12:42:49.248199 PCI: 00:1f.1: enabled 0
1403 12:42:49.251245 PCI: 00:1f.2: enabled 0
1404 12:42:49.253215 PCI: 00:1f.3: enabled 1
1405 12:42:49.255858 PCI: 00:1f.4: enabled 1
1406 12:42:49.258234 PCI: 00:1f.5: enabled 1
1407 12:42:49.260684 PCI: 00:1f.6: enabled 0
1408 12:42:49.263213 GENERIC: 0.0: enabled 1
1409 12:42:49.265745 USB0 port 0: enabled 1
1410 12:42:49.267142 I2C: 02:4a: enabled 1
1411 12:42:49.270063 I2C: 03:4a: enabled 1
1412 12:42:49.272243 I2C: 04:1a: enabled 1
1413 12:42:49.274601 PCI: 01:00.0: enabled 1
1414 12:42:49.277313 PCI: 00:00.0: enabled 1
1415 12:42:49.279160 SPI: 00: enabled 1
1416 12:42:49.281548 PNP: 0c09.0: enabled 1
1417 12:42:49.284131 USB2 port 0: enabled 1
1418 12:42:49.286095 USB2 port 1: enabled 1
1419 12:42:49.287693 USB2 port 2: enabled 1
1420 12:42:49.290149 USB2 port 3: enabled 1
1421 12:42:49.293147 USB2 port 5: enabled 1
1422 12:42:49.295051 USB2 port 6: enabled 0
1423 12:42:49.297520 USB2 port 9: enabled 1
1424 12:42:49.299778 USB3 port 0: enabled 1
1425 12:42:49.302193 USB3 port 1: enabled 1
1426 12:42:49.304688 USB3 port 2: enabled 1
1427 12:42:49.307077 USB3 port 3: enabled 1
1428 12:42:49.309464 USB3 port 4: enabled 1
1429 12:42:49.311384 USB2 port 4: enabled 1
1430 12:42:49.314486 USB3 port 5: enabled 1
1431 12:42:49.315916 APIC: 02: enabled 1
1432 12:42:49.317956 PCI: 00:08.0: enabled 1
1433 12:42:49.320673 PCI: 00:14.2: enabled 1
1434 12:42:49.326157 BS: BS_DEV_INIT run times (exec / console): 26 / 460 ms
1435 12:42:49.329214 Disabling ACPI via APMC.
1436 12:42:49.334970 APMC done.
1437 12:42:49.339588 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1438 12:42:49.343619 ELOG: NV offset 0xaf0000 size 0x4000
1439 12:42:49.351684 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1440 12:42:49.357687 ELOG: Event(17) added with size 13 at 2024-03-05 12:42:49 UTC
1441 12:42:49.364052 ELOG: Event(92) added with size 9 at 2024-03-05 12:42:49 UTC
1442 12:42:49.370785 ELOG: Event(93) added with size 9 at 2024-03-05 12:42:49 UTC
1443 12:42:49.377167 ELOG: Event(9E) added with size 10 at 2024-03-05 12:42:49 UTC
1444 12:42:49.383303 ELOG: Event(9F) added with size 14 at 2024-03-05 12:42:49 UTC
1445 12:42:49.389082 BS: BS_DEV_INIT exit times (exec / console): 7 / 49 ms
1446 12:42:49.395212 ELOG: Event(A1) added with size 10 at 2024-03-05 12:42:49 UTC
1447 12:42:49.402450 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1448 12:42:49.409178 ELOG: Event(A0) added with size 9 at 2024-03-05 12:42:49 UTC
1449 12:42:49.413674 elog_add_boot_reason: Logged dev mode boot
1450 12:42:49.419238 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1451 12:42:49.421403 Finalize devices...
1452 12:42:49.422810 Devices finalized
1453 12:42:49.428257 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1454 12:42:49.433535 FMAP: area RW_NVRAM found @ afa000 (20480 bytes)
1455 12:42:49.439262 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1456 12:42:49.443768 ME: HFSTS1 : 0x80030045
1457 12:42:49.447346 ME: HFSTS2 : 0x30280136
1458 12:42:49.451426 ME: HFSTS3 : 0x00000050
1459 12:42:49.455417 ME: HFSTS4 : 0x00004800
1460 12:42:49.459571 ME: HFSTS5 : 0x00000000
1461 12:42:49.463639 ME: HFSTS6 : 0x40400006
1462 12:42:49.467295 ME: Manufacturing Mode : NO
1463 12:42:49.470617 ME: FW Partition Table : OK
1464 12:42:49.474105 ME: Bringup Loader Failure : NO
1465 12:42:49.477514 ME: Firmware Init Complete : NO
1466 12:42:49.480181 ME: Boot Options Present : NO
1467 12:42:49.484197 ME: Update In Progress : NO
1468 12:42:49.487198 ME: D0i3 Support : YES
1469 12:42:49.490268 ME: Low Power State Enabled : NO
1470 12:42:49.493770 ME: CPU Replaced : YES
1471 12:42:49.497523 ME: CPU Replacement Valid : YES
1472 12:42:49.500436 ME: Current Working State : 5
1473 12:42:49.503914 ME: Current Operation State : 1
1474 12:42:49.507321 ME: Current Operation Mode : 3
1475 12:42:49.510128 ME: Error Code : 0
1476 12:42:49.514199 ME: CPU Debug Disabled : YES
1477 12:42:49.517013 ME: TXT Support : NO
1478 12:42:49.523343 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1479 12:42:49.528457 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1480 12:42:49.531281 CBFS: Locating 'fallback/dsdt.aml'
1481 12:42:49.535871 CBFS: Found @ offset 636c0 size 32e0
1482 12:42:49.541022 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1483 12:42:49.543736 CBFS: Locating 'fallback/slic'
1484 12:42:49.549263 CBFS: 'fallback/slic' not found.
1485 12:42:49.553533 ACPI: Writing ACPI tables at 99b31000.
1486 12:42:49.554162 ACPI: * FACS
1487 12:42:49.556625 ACPI: * DSDT
1488 12:42:49.560062 Ramoops buffer: 0x100000@0x99a30000.
1489 12:42:49.564912 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1490 12:42:49.569055 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1491 12:42:49.572773 Google Chrome EC: version:
1492 12:42:49.575409 ro: puff_v2.0.4638-67e4d7990
1493 12:42:49.578595 rw: puff_v2.0.4638-67e4d7990
1494 12:42:49.580131 running image: 1
1495 12:42:49.586722 PCI space above 4GB MMIO is at 0x15e800000, len = 0x7ea1800000
1496 12:42:49.589704 ACPI: * FADT
1497 12:42:49.590838 SCI is IRQ9
1498 12:42:49.594956 ACPI: added table 1/32, length now 40
1499 12:42:49.596891 ACPI: * SSDT
1500 12:42:49.600368 Found 1 CPU(s) with 2 core(s) each.
1501 12:42:49.605031 \_SB.PCI0.WFA3.WFA3: Intel WiFi PCI: 00:14.3
1502 12:42:49.609102 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1503 12:42:49.613587 \_SB.PCI0.I2C2.PS17: Parade PS175 at I2C: 02:4a
1504 12:42:49.618812 \_SB.PCI0.I2C3.RTD2: Realtek RTD2142 at I2C: 03:4a
1505 12:42:49.623890 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 04:1a
1506 12:42:49.628871 \_SB.PCI0.RP01.RLTK.RLTK: Realtek r8168 PCI: 01:00.0
1507 12:42:49.633045 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1508 12:42:49.639090 EC returned error result code 3
1509 12:42:49.643452 EC returned error result code 1
1510 12:42:49.647443 PS2K: Bad resp from EC. Vivaldi disabled!
1511 12:42:49.653300 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-A Front Left at USB2 port 0
1512 12:42:49.659880 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-C Port Rear at USB2 port 1
1513 12:42:49.666631 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-A Front Right at USB2 port 2
1514 12:42:49.673005 \_SB.PCI0.XHCI.RHUB.HS04: USB2 Type-A Rear Right at USB2 port 3
1515 12:42:49.679134 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Type-A Rear Left at USB2 port 5
1516 12:42:49.683494 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1517 12:42:49.690834 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Front Left at USB3 port 0
1518 12:42:49.696289 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Front Right at USB3 port 1
1519 12:42:49.702971 \_SB.PCI0.XHCI.RHUB.SS03: USB3 Type-A Rear Right at USB3 port 2
1520 12:42:49.708899 \_SB.PCI0.XHCI.RHUB.SS04: USB3 Type-C Rear at USB3 port 3
1521 12:42:49.714886 \_SB.PCI0.XHCI.RHUB.SS05: USB3 Type-A Rear Left at USB3 port 4
1522 12:42:49.721407 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-A Rear Middle at USB2 port 4
1523 12:42:49.728083 \_SB.PCI0.XHCI.RHUB.SS06: USB3 Type-A Rear Middle at USB3 port 5
1524 12:42:49.731742 ACPI: added table 2/32, length now 44
1525 12:42:49.732922 ACPI: * MCFG
1526 12:42:49.736783 ACPI: added table 3/32, length now 48
1527 12:42:49.738741 ACPI: * TPM2
1528 12:42:49.742191 TPM2 log created at 0x99a20000
1529 12:42:49.745782 ACPI: added table 4/32, length now 52
1530 12:42:49.747315 ACPI: * MADT
1531 12:42:49.748968 SCI is IRQ9
1532 12:42:49.752131 ACPI: added table 5/32, length now 56
1533 12:42:49.754153 current = 99b36070
1534 12:42:49.756317 ACPI: * DMAR
1535 12:42:49.760288 ACPI: added table 6/32, length now 60
1536 12:42:49.763648 ACPI: added table 7/32, length now 64
1537 12:42:49.764926 ACPI: * HPET
1538 12:42:49.769230 ACPI: added table 8/32, length now 68
1539 12:42:49.770343 ACPI: done.
1540 12:42:49.773170 ACPI tables: 20912 bytes.
1541 12:42:49.776024 smbios_write_tables: 99a1f000
1542 12:42:49.779818 EC returned error result code 3
1543 12:42:49.783367 Couldn't obtain OEM name from CBI
1544 12:42:49.786723 Create SMBIOS type 17
1545 12:42:49.790119 PCI: 00:00.0 (Intel Cannonlake)
1546 12:42:49.792377 PCI: 00:14.3 (Intel WiFi)
1547 12:42:49.795017 SMBIOS tables: 841 bytes.
1548 12:42:49.798769 Writing table forward entry at 0x00000500
1549 12:42:49.805606 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 1629
1550 12:42:49.808501 Writing coreboot table at 0x99b55000
1551 12:42:49.814644 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1552 12:42:49.819095 1. 0000000000001000-000000000009ffff: RAM
1553 12:42:49.823753 2. 00000000000a0000-00000000000fffff: RESERVED
1554 12:42:49.827813 3. 0000000000100000-0000000099a1efff: RAM
1555 12:42:49.834327 4. 0000000099a1f000-0000000099ba4fff: CONFIGURATION TABLES
1556 12:42:49.838642 5. 0000000099ba5000-0000000099c0afff: RAMSTAGE
1557 12:42:49.844606 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1558 12:42:49.849816 7. 000000009a000000-000000009f7fffff: RESERVED
1559 12:42:49.855377 8. 00000000e0000000-00000000efffffff: RESERVED
1560 12:42:49.859791 9. 00000000fc000000-00000000fc000fff: RESERVED
1561 12:42:49.864702 10. 00000000fe000000-00000000fe00ffff: RESERVED
1562 12:42:49.869015 11. 00000000fed10000-00000000fed17fff: RESERVED
1563 12:42:49.873400 12. 00000000fed80000-00000000fed83fff: RESERVED
1564 12:42:49.879115 13. 00000000fed90000-00000000fed91fff: RESERVED
1565 12:42:49.883142 14. 00000000feda0000-00000000feda1fff: RESERVED
1566 12:42:49.887750 15. 0000000100000000-000000015e7fffff: RAM
1567 12:42:49.891042 Graphics hand-off block not found
1568 12:42:49.894790 FSP did not return a valid framebuffer
1569 12:42:49.897627 Passing 4 GPIOs to payload:
1570 12:42:49.903545 NAME | PORT | POLARITY | VALUE
1571 12:42:49.908211 lid | undefined | high | high
1572 12:42:49.914064 power | undefined | high | low
1573 12:42:49.919162 oprom | undefined | high | low
1574 12:42:49.924425 EC in RW | 0x000000cb | high | low
1575 12:42:49.925851 Board ID: 4
1576 12:42:49.929813 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1577 12:42:49.936268 Wrote coreboot table at: 0x99b55000, 0x578 bytes, checksum d0d1
1578 12:42:49.939884 coreboot table: 1424 bytes.
1579 12:42:49.943380 IMD ROOT 0. 0x99fff000 0x00001000
1580 12:42:49.947242 IMD SMALL 1. 0x99ffe000 0x00001000
1581 12:42:49.950831 FSP MEMORY 2. 0x99c4e000 0x003b0000
1582 12:42:49.954531 CONSOLE 3. 0x99c2e000 0x00020000
1583 12:42:49.958160 FMAP 4. 0x99c2d000 0x00000578
1584 12:42:49.961481 TIME STAMP 5. 0x99c2c000 0x00000910
1585 12:42:49.965592 VBOOT WORK 6. 0x99c18000 0x00014000
1586 12:42:49.969130 MRC DATA 7. 0x99c16000 0x00001958
1587 12:42:49.973037 ROMSTG STCK 8. 0x99c15000 0x00001000
1588 12:42:49.976077 AFTER CAR 9. 0x99c0b000 0x0000a000
1589 12:42:49.980705 RAMSTAGE 10. 0x99ba4000 0x00067000
1590 12:42:49.984121 REFCODE 11. 0x99b6f000 0x00035000
1591 12:42:49.987954 SMM BACKUP 12. 0x99b5f000 0x00010000
1592 12:42:49.990932 4f444749 13. 0x99b5d000 0x00002000
1593 12:42:49.994738 COREBOOT 14. 0x99b55000 0x00008000
1594 12:42:49.999089 ACPI 15. 0x99b31000 0x00024000
1595 12:42:50.002878 ACPI GNVS 16. 0x99b30000 0x00001000
1596 12:42:50.006308 RAMOOPS 17. 0x99a30000 0x00100000
1597 12:42:50.009714 TPM2 TCGLOG18. 0x99a20000 0x00010000
1598 12:42:50.013655 SMBIOS 19. 0x99a1f000 0x00000800
1599 12:42:50.015112 IMD small region:
1600 12:42:50.019743 IMD ROOT 0. 0x99ffec00 0x00000400
1601 12:42:50.023149 FSP RUNTIME 1. 0x99ffebe0 0x00000004
1602 12:42:50.026974 VPD 2. 0x99ffeb80 0x00000058
1603 12:42:50.030944 POWER STATE 3. 0x99ffeb40 0x00000040
1604 12:42:50.034824 ROMSTAGE 4. 0x99ffeb20 0x00000004
1605 12:42:50.038653 MEM INFO 5. 0x99ffe960 0x000001b9
1606 12:42:50.044617 BS: BS_WRITE_TABLES run times (exec / console): 11 / 504 ms
1607 12:42:50.048235 MTRR: Physical address space:
1608 12:42:50.054020 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1609 12:42:50.060320 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1610 12:42:50.066742 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1611 12:42:50.072829 0x000000009b000000 - 0x00000000a0000000 size 0x05000000 type 0
1612 12:42:50.079058 0x00000000a0000000 - 0x00000000b0000000 size 0x10000000 type 1
1613 12:42:50.085191 0x00000000b0000000 - 0x0000000100000000 size 0x50000000 type 0
1614 12:42:50.090983 0x0000000100000000 - 0x000000015e800000 size 0x5e800000 type 6
1615 12:42:50.095595 MTRR: Fixed MSR 0x250 0x0606060606060606
1616 12:42:50.099709 MTRR: Fixed MSR 0x258 0x0606060606060606
1617 12:42:50.104032 MTRR: Fixed MSR 0x259 0x0000000000000000
1618 12:42:50.108446 MTRR: Fixed MSR 0x268 0x0606060606060606
1619 12:42:50.112086 MTRR: Fixed MSR 0x269 0x0606060606060606
1620 12:42:50.116079 MTRR: Fixed MSR 0x26a 0x0606060606060606
1621 12:42:50.120419 MTRR: Fixed MSR 0x26b 0x0606060606060606
1622 12:42:50.123706 MTRR: Fixed MSR 0x26c 0x0606060606060606
1623 12:42:50.128346 MTRR: Fixed MSR 0x26d 0x0606060606060606
1624 12:42:50.132159 MTRR: Fixed MSR 0x26e 0x0606060606060606
1625 12:42:50.136797 MTRR: Fixed MSR 0x26f 0x0606060606060606
1626 12:42:50.139039 call enable_fixed_mtrr()
1627 12:42:50.142590 CPU physical address size: 39 bits
1628 12:42:50.146679 MTRR: default type WB/UC MTRR counts: 5/6.
1629 12:42:50.150779 MTRR: WB selected as default type.
1630 12:42:50.157420 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1631 12:42:50.163057 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1632 12:42:50.169649 MTRR: 2 base 0x00000000a0000000 mask 0x0000007ff0000000 type 1
1633 12:42:50.175836 MTRR: 3 base 0x00000000b0000000 mask 0x0000007ff0000000 type 0
1634 12:42:50.182602 MTRR: 4 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1635 12:42:50.186743 MTRR: Fixed MSR 0x250 0x0606060606060606
1636 12:42:50.191117 MTRR: Fixed MSR 0x258 0x0606060606060606
1637 12:42:50.194907 MTRR: Fixed MSR 0x259 0x0000000000000000
1638 12:42:50.199139 MTRR: Fixed MSR 0x268 0x0606060606060606
1639 12:42:50.202855 MTRR: Fixed MSR 0x269 0x0606060606060606
1640 12:42:50.206926 MTRR: Fixed MSR 0x26a 0x0606060606060606
1641 12:42:50.210892 MTRR: Fixed MSR 0x26b 0x0606060606060606
1642 12:42:50.214824 MTRR: Fixed MSR 0x26c 0x0606060606060606
1643 12:42:50.219075 MTRR: Fixed MSR 0x26d 0x0606060606060606
1644 12:42:50.223471 MTRR: Fixed MSR 0x26e 0x0606060606060606
1645 12:42:50.227185 MTRR: Fixed MSR 0x26f 0x0606060606060606
1646 12:42:50.227621
1647 12:42:50.228318 MTRR check
1648 12:42:50.231039 Fixed MTRRs : Enabled
1649 12:42:50.233122 Variable MTRRs: Enabled
1650 12:42:50.234130
1651 12:42:50.236660 call enable_fixed_mtrr()
1652 12:42:50.242469 BS: BS_WRITE_TABLES exit times (exec / console): 45 / 143 ms
1653 12:42:50.246237 CPU physical address size: 39 bits
1654 12:42:50.248220 Probing TPM: done!
1655 12:42:50.253701 Connected to device vid:did:rid of 1ae0:0028:00
1656 12:42:50.263310 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b81dc66
1657 12:42:50.267407 Initialized TPM device CR50 revision 0
1658 12:42:50.270709 Checking cr50 for pending updates
1659 12:42:50.275997 Reading cr50 TPM mode
1660 12:42:50.286594 BS: BS_PAYLOAD_LOAD entry times (exec / console): 12 / 25 ms
1661 12:42:50.290912 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1662 12:42:50.294584 CBFS: Locating 'fallback/payload'
1663 12:42:50.299142 CBFS: Found @ offset 3a0c00 size 48db0
1664 12:42:50.303893 Checking segment from ROM address 0xfffa8c38
1665 12:42:50.308602 Checking segment from ROM address 0xfffa8c54
1666 12:42:50.312934 Loading segment from ROM address 0xfffa8c38
1667 12:42:50.315635 code (compression=0)
1668 12:42:50.324006 New segment dstaddr 0x30000000 memsize 0x2660100 srcaddr 0xfffa8c70 filesize 0x48d78
1669 12:42:50.332457 Loading Segment: addr: 0x30000000 memsz: 0x0000000002660100 filesz: 0x0000000000048d78
1670 12:42:50.334376 it's not compressed!
1671 12:42:50.437977 [ 0x30000000, 30048d78, 0x32660100) <- fffa8c70
1672 12:42:50.444538 Clearing Segment: addr: 0x0000000030048d78 memsz: 0x0000000002617388
1673 12:42:50.452329 Loading segment from ROM address 0xfffa8c54
1674 12:42:50.454938 Entry Point 0x30000000
1675 12:42:50.456657 Loaded segments
1676 12:42:50.462423 BS: BS_PAYLOAD_LOAD run times (exec / console): 103 / 67 ms
1677 12:42:50.465812 Finalizing chipset.
1678 12:42:50.467561 Finalizing SMM.
1679 12:42:50.468921 APMC done.
1680 12:42:50.474366 BS: BS_PAYLOAD_LOAD exit times (exec / console): 2 / 5 ms
1681 12:42:50.477702 mp_park_aps done after 0 msecs.
1682 12:42:50.482219 Jumping to boot code at 0x30000000(0x99b55000)
1683 12:42:50.492570 CPU0: stack: 0x99bf8000 - 0x99bf9000, lowest used address 0x99bf8a88, stack used: 1400 bytes
1684 12:42:50.493226
1685 12:42:50.493834
1686 12:42:50.494260
1687 12:42:50.495809 Starting depthcharge on Kaisa...
1688 12:42:50.496238
1689 12:42:50.498376 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
1690 12:42:50.498851 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
1691 12:42:50.499262 Setting prompt string to ['puff:']
1692 12:42:50.499584 bootloader-commands: Wait for prompt ['puff:'] (timeout 00:04:43)
1693 12:42:50.503125 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1694 12:42:50.503396
1695 12:42:50.510591 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1696 12:42:50.511102
1697 12:42:50.512180 BIOS MMAP details:
1698 12:42:50.512818
1699 12:42:50.515778 IFD Base Offset : 0x300000
1700 12:42:50.516372
1701 12:42:50.518214 IFD End Offset : 0x1000000
1702 12:42:50.518421
1703 12:42:50.520489 MMAP Size : 0xd00000
1704 12:42:50.521605
1705 12:42:50.524570 MMAP Start : 0xff300000
1706 12:42:50.524757
1707 12:42:50.529027 Looking for NVMe Controller 0x3105c848 @ 00:1d:00
1708 12:42:50.529490
1709 12:42:50.531127 Wipe memory regions:
1710 12:42:50.531582
1711 12:42:50.534501 [0x00000000001000, 0x000000000a0000)
1712 12:42:50.535302
1713 12:42:50.538437 [0x00000000100000, 0x00000030000000)
1714 12:42:50.587989
1715 12:42:50.591371 [0x00000032660100, 0x00000099a1f000)
1716 12:42:50.694808
1717 12:42:50.697582 [0x00000100000000, 0x0000015e800000)
1718 12:42:51.098749
1719 12:42:51.100537 R8152: Initializing
1720 12:42:51.100834
1721 12:42:51.103709 Version 9 (ocp_data = 6010)
1722 12:42:51.104409
1723 12:42:51.107213 R8152: Done initializing
1724 12:42:51.107613
1725 12:42:51.109034 Adding net device
1726 12:42:51.409702
1727 12:42:51.414999 [firmware-puff-13324.B-collabora] Feb 14 2023 12:06:39
1728 12:42:51.415653
1729 12:42:51.416440
1730 12:42:51.416964
1731 12:42:51.418051 Setting prompt string to ['puff:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1733 12:42:51.519260 puff: tftpboot 192.168.201.1 12948284/tftp-deploy-8pjsssnf/kernel/bzImage 12948284/tftp-deploy-8pjsssnf/kernel/cmdline 12948284/tftp-deploy-8pjsssnf/ramdisk/ramdisk.cpio.gz
1734 12:42:51.520070 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1735 12:42:51.520562 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
1736 12:42:51.565312 tftpboot 192.168.201.1 12948284/tftp-deploy-8pjsssnf/kernel/bzImage 12948284/tftp-deploy-8pjsssnf/kernel/cmdline 12948284/tftp-deploy-8pjsssnf/ramdisk/ramdisk.cpio.gz
1737 12:42:51.566145
1738 12:42:51.566579 Waiting for link
1739 12:42:51.724122
1740 12:42:51.725134 done.
1741 12:42:51.725535
1742 12:42:51.727350 MAC: 00:e0:4c:68:05:87
1743 12:42:51.727853
1744 12:42:51.730525 Sending DHCP discover... done.
1745 12:42:51.731010
1746 12:42:51.732904 Waiting for reply... done.
1747 12:42:51.733443
1748 12:42:51.735765 Sending DHCP request... done.
1749 12:42:51.736681
1750 12:42:51.738360 Waiting for reply... done.
1751 12:42:51.738929
1752 12:42:51.740724 My ip is 192.168.201.226
1753 12:42:51.741249
1754 12:42:51.745129 The DHCP server ip is 192.168.201.1
1755 12:42:51.745618
1756 12:42:51.749170 TFTP server IP predefined by user: 192.168.201.1
1757 12:42:51.749574
1758 12:42:51.756783 Bootfile predefined by user: 12948284/tftp-deploy-8pjsssnf/kernel/bzImage
1759 12:42:51.757327
1760 12:42:51.760153 Sending tftp read request... done.
1761 12:42:51.760718
1762 12:42:51.764309 Waiting for the transfer...
1763 12:42:51.764864
1764 12:42:52.038397 00000000 ################################################################
1765 12:42:52.039247
1766 12:42:52.296690 00080000 ################################################################
1767 12:42:52.297583
1768 12:42:52.559392 00100000 ################################################################
1769 12:42:52.559785
1770 12:42:52.818877 00180000 ################################################################
1771 12:42:52.819005
1772 12:42:53.080459 00200000 ################################################################
1773 12:42:53.080880
1774 12:42:53.344611 00280000 ################################################################
1775 12:42:53.344747
1776 12:42:53.611802 00300000 ################################################################
1777 12:42:53.612444
1778 12:42:53.879646 00380000 ################################################################
1779 12:42:53.880110
1780 12:42:54.124910 00400000 ################################################################
1781 12:42:54.125403
1782 12:42:54.393270 00480000 ################################################################
1783 12:42:54.393844
1784 12:42:54.649899 00500000 ################################################################
1785 12:42:54.651209
1786 12:42:54.903786 00580000 ################################################################
1787 12:42:54.904218
1788 12:42:55.158727 00600000 ################################################################
1789 12:42:55.159067
1790 12:42:55.413004 00680000 ################################################################
1791 12:42:55.414137
1792 12:42:55.698431 00700000 ################################################################
1793 12:42:55.698935
1794 12:42:55.963976 00780000 ################################################################
1795 12:42:55.964345
1796 12:42:56.227512 00800000 ################################################################
1797 12:42:56.228042
1798 12:42:56.438405 00880000 ######################################################## done.
1799 12:42:56.438537
1800 12:42:56.442318 The bootfile was 9367440 bytes long.
1801 12:42:56.442403
1802 12:42:56.446153 Sending tftp read request... done.
1803 12:42:56.446236
1804 12:42:56.448114 Waiting for the transfer...
1805 12:42:56.448195
1806 12:42:56.694280 00000000 ################################################################
1807 12:42:56.695720
1808 12:42:56.942151 00080000 ################################################################
1809 12:42:56.942511
1810 12:42:57.202116 00100000 ################################################################
1811 12:42:57.202539
1812 12:42:57.456950 00180000 ################################################################
1813 12:42:57.457504
1814 12:42:57.710693 00200000 ################################################################
1815 12:42:57.711226
1816 12:42:57.959228 00280000 ################################################################
1817 12:42:57.959757
1818 12:42:58.204869 00300000 ################################################################
1819 12:42:58.205337
1820 12:42:58.454943 00380000 ################################################################
1821 12:42:58.455152
1822 12:42:58.707355 00400000 ################################################################
1823 12:42:58.708480
1824 12:42:58.952024 00480000 ################################################################
1825 12:42:58.952624
1826 12:42:59.191874 00500000 ################################################################
1827 12:42:59.192263
1828 12:42:59.437557 00580000 ################################################################
1829 12:42:59.437944
1830 12:42:59.679206 00600000 ################################################################
1831 12:42:59.679736
1832 12:42:59.919216 00680000 ################################################################
1833 12:42:59.920192
1834 12:43:00.162155 00700000 ################################################################
1835 12:43:00.162541
1836 12:43:00.419747 00780000 ################################################################
1837 12:43:00.420264
1838 12:43:00.623227 00800000 #################################################### done.
1839 12:43:00.623365
1840 12:43:00.626539 Sending tftp read request... done.
1841 12:43:00.626880
1842 12:43:00.629513 Waiting for the transfer...
1843 12:43:00.629867
1844 12:43:00.631323 00000000 # done.
1845 12:43:00.631852
1846 12:43:00.640635 Command line loaded dynamically from TFTP file: 12948284/tftp-deploy-8pjsssnf/kernel/cmdline
1847 12:43:00.640712
1848 12:43:00.655624 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1849 12:43:00.656176
1850 12:43:00.660702 ec_init: CrosEC protocol v3 supported (256, 256)
1851 12:43:00.664560
1852 12:43:00.668211 Shutting down all USB controllers.
1853 12:43:00.668738
1854 12:43:00.671040 Removing current net device
1855 12:43:00.672112
1856 12:43:00.673271 Finalizing coreboot
1857 12:43:00.673341
1858 12:43:00.678596 Exiting depthcharge with code 4 at timestamp: 19630742
1859 12:43:00.678669
1860 12:43:00.678745
1861 12:43:00.680225 end: 2.2.4 bootloader-commands (duration 00:00:10) [common]
1862 12:43:00.680321 start: 2.2.5 auto-login-action (timeout 00:04:33) [common]
1863 12:43:00.680400 Setting prompt string to ['Linux version [0-9]']
1864 12:43:00.680468 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1865 12:43:00.680536 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1866 12:43:00.680711 Starting kernel ...
1867 12:43:00.680784
1868 12:43:00.680861
1870 12:47:33.681302 end: 2.2.5 auto-login-action (duration 00:04:33) [common]
1872 12:47:33.682333 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 273 seconds'
1874 12:47:33.683105 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1877 12:47:33.684312 end: 2 depthcharge-action (duration 00:05:00) [common]
1879 12:47:33.685395 Cleaning after the job
1880 12:47:33.685817 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12948284/tftp-deploy-8pjsssnf/ramdisk
1881 12:47:33.691620 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12948284/tftp-deploy-8pjsssnf/kernel
1882 12:47:33.698053 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12948284/tftp-deploy-8pjsssnf/modules
1883 12:47:33.700102 start: 5.1 power-off (timeout 00:00:30) [common]
1884 12:47:33.700897 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-chromebox-cxi4-puff-cbg-1' '--port=1' '--command=off'
1885 12:47:34.600252 >> Command sent successfully.
1886 12:47:34.611026 Returned 0 in 0 seconds
1887 12:47:34.712373 end: 5.1 power-off (duration 00:00:01) [common]
1889 12:47:34.713920 start: 5.2 read-feedback (timeout 00:09:59) [common]
1890 12:47:34.715083 Listened to connection for namespace 'common' for up to 1s
1891 12:47:35.715798 Finalising connection for namespace 'common'
1892 12:47:35.716436 Disconnecting from shell: Finalise
1893 12:47:35.716836
1894 12:47:35.817901 end: 5.2 read-feedback (duration 00:00:01) [common]
1895 12:47:35.818475 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12948284
1896 12:47:35.838702 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12948284
1897 12:47:35.838835 JobError: Your job cannot terminate cleanly.