Boot log: acer-chromebox-cxi5-brask
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 12:42:43.514087 lava-dispatcher, installed at version: 2024.01
2 12:42:43.514249 start: 0 validate
3 12:42:43.514356 Start time: 2024-03-05 12:42:43.514350+00:00 (UTC)
4 12:42:43.514457 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:42:43.514561 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 12:42:43.768055 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:42:43.768640 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2247-g140bf69dc64d%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:42:44.023108 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:42:44.023655 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2247-g140bf69dc64d%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 12:42:46.996035 validate duration: 3.48
12 12:42:46.996282 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:42:46.996372 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:42:46.996453 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:42:46.996559 Not decompressing ramdisk as can be used compressed.
16 12:42:46.996631 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 12:42:46.996685 saving as /var/lib/lava/dispatcher/tmp/12948308/tftp-deploy-db5ynl4e/ramdisk/rootfs.cpio.gz
18 12:42:46.996737 total size: 8418130 (8 MB)
19 12:42:47.523125 progress 0 % (0 MB)
20 12:42:47.528657 progress 5 % (0 MB)
21 12:42:47.530183 progress 10 % (0 MB)
22 12:42:47.531734 progress 15 % (1 MB)
23 12:42:47.533241 progress 20 % (1 MB)
24 12:42:47.534744 progress 25 % (2 MB)
25 12:42:47.536276 progress 30 % (2 MB)
26 12:42:47.537668 progress 35 % (2 MB)
27 12:42:47.539192 progress 40 % (3 MB)
28 12:42:47.540695 progress 45 % (3 MB)
29 12:42:47.542173 progress 50 % (4 MB)
30 12:42:47.543670 progress 55 % (4 MB)
31 12:42:47.545167 progress 60 % (4 MB)
32 12:42:47.546535 progress 65 % (5 MB)
33 12:42:47.548042 progress 70 % (5 MB)
34 12:42:47.549520 progress 75 % (6 MB)
35 12:42:47.550994 progress 80 % (6 MB)
36 12:42:47.552504 progress 85 % (6 MB)
37 12:42:47.553976 progress 90 % (7 MB)
38 12:42:47.555484 progress 95 % (7 MB)
39 12:42:47.556871 progress 100 % (8 MB)
40 12:42:47.557035 8 MB downloaded in 0.56 s (14.33 MB/s)
41 12:42:47.557166 end: 1.1.1 http-download (duration 00:00:01) [common]
43 12:42:47.557366 end: 1.1 download-retry (duration 00:00:01) [common]
44 12:42:47.557434 start: 1.2 download-retry (timeout 00:09:59) [common]
45 12:42:47.557498 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 12:42:47.557608 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2247-g140bf69dc64d/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 12:42:47.557667 saving as /var/lib/lava/dispatcher/tmp/12948308/tftp-deploy-db5ynl4e/kernel/bzImage
48 12:42:47.557713 total size: 9367440 (8 MB)
49 12:42:47.557761 No compression specified
50 12:42:47.558678 progress 0 % (0 MB)
51 12:42:47.560414 progress 5 % (0 MB)
52 12:42:47.562035 progress 10 % (0 MB)
53 12:42:47.563679 progress 15 % (1 MB)
54 12:42:47.565423 progress 20 % (1 MB)
55 12:42:47.567053 progress 25 % (2 MB)
56 12:42:47.568698 progress 30 % (2 MB)
57 12:42:47.570416 progress 35 % (3 MB)
58 12:42:47.572048 progress 40 % (3 MB)
59 12:42:47.573665 progress 45 % (4 MB)
60 12:42:47.575275 progress 50 % (4 MB)
61 12:42:47.576977 progress 55 % (4 MB)
62 12:42:47.578561 progress 60 % (5 MB)
63 12:42:47.580167 progress 65 % (5 MB)
64 12:42:47.581852 progress 70 % (6 MB)
65 12:42:47.583487 progress 75 % (6 MB)
66 12:42:47.585068 progress 80 % (7 MB)
67 12:42:47.586656 progress 85 % (7 MB)
68 12:42:47.588359 progress 90 % (8 MB)
69 12:42:47.589939 progress 95 % (8 MB)
70 12:42:47.591568 progress 100 % (8 MB)
71 12:42:47.591731 8 MB downloaded in 0.03 s (262.63 MB/s)
72 12:42:47.591845 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:42:47.592030 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:42:47.592101 start: 1.3 download-retry (timeout 00:09:59) [common]
76 12:42:47.592165 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 12:42:47.592268 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2247-g140bf69dc64d/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 12:42:47.592324 saving as /var/lib/lava/dispatcher/tmp/12948308/tftp-deploy-db5ynl4e/modules/modules.tar
79 12:42:47.592370 total size: 251176 (0 MB)
80 12:42:47.592417 Using unxz to decompress xz
81 12:42:47.595535 progress 13 % (0 MB)
82 12:42:47.595827 progress 26 % (0 MB)
83 12:42:47.596013 progress 39 % (0 MB)
84 12:42:47.597322 progress 52 % (0 MB)
85 12:42:47.598957 progress 65 % (0 MB)
86 12:42:47.600567 progress 78 % (0 MB)
87 12:42:47.602204 progress 91 % (0 MB)
88 12:42:47.603806 progress 100 % (0 MB)
89 12:42:47.608597 0 MB downloaded in 0.02 s (14.77 MB/s)
90 12:42:47.608785 end: 1.3.1 http-download (duration 00:00:00) [common]
92 12:42:47.609069 end: 1.3 download-retry (duration 00:00:00) [common]
93 12:42:47.609145 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 12:42:47.609219 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 12:42:47.609281 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 12:42:47.609346 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 12:42:47.609503 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12948308/lava-overlay-o5cxid1h
98 12:42:47.609604 makedir: /var/lib/lava/dispatcher/tmp/12948308/lava-overlay-o5cxid1h/lava-12948308/bin
99 12:42:47.609684 makedir: /var/lib/lava/dispatcher/tmp/12948308/lava-overlay-o5cxid1h/lava-12948308/tests
100 12:42:47.609757 makedir: /var/lib/lava/dispatcher/tmp/12948308/lava-overlay-o5cxid1h/lava-12948308/results
101 12:42:47.609841 Creating /var/lib/lava/dispatcher/tmp/12948308/lava-overlay-o5cxid1h/lava-12948308/bin/lava-add-keys
102 12:42:47.609950 Creating /var/lib/lava/dispatcher/tmp/12948308/lava-overlay-o5cxid1h/lava-12948308/bin/lava-add-sources
103 12:42:47.610046 Creating /var/lib/lava/dispatcher/tmp/12948308/lava-overlay-o5cxid1h/lava-12948308/bin/lava-background-process-start
104 12:42:47.610143 Creating /var/lib/lava/dispatcher/tmp/12948308/lava-overlay-o5cxid1h/lava-12948308/bin/lava-background-process-stop
105 12:42:47.610234 Creating /var/lib/lava/dispatcher/tmp/12948308/lava-overlay-o5cxid1h/lava-12948308/bin/lava-common-functions
106 12:42:47.610324 Creating /var/lib/lava/dispatcher/tmp/12948308/lava-overlay-o5cxid1h/lava-12948308/bin/lava-echo-ipv4
107 12:42:47.610414 Creating /var/lib/lava/dispatcher/tmp/12948308/lava-overlay-o5cxid1h/lava-12948308/bin/lava-install-packages
108 12:42:47.610503 Creating /var/lib/lava/dispatcher/tmp/12948308/lava-overlay-o5cxid1h/lava-12948308/bin/lava-installed-packages
109 12:42:47.610593 Creating /var/lib/lava/dispatcher/tmp/12948308/lava-overlay-o5cxid1h/lava-12948308/bin/lava-os-build
110 12:42:47.610684 Creating /var/lib/lava/dispatcher/tmp/12948308/lava-overlay-o5cxid1h/lava-12948308/bin/lava-probe-channel
111 12:42:47.610774 Creating /var/lib/lava/dispatcher/tmp/12948308/lava-overlay-o5cxid1h/lava-12948308/bin/lava-probe-ip
112 12:42:47.610862 Creating /var/lib/lava/dispatcher/tmp/12948308/lava-overlay-o5cxid1h/lava-12948308/bin/lava-target-ip
113 12:42:47.610952 Creating /var/lib/lava/dispatcher/tmp/12948308/lava-overlay-o5cxid1h/lava-12948308/bin/lava-target-mac
114 12:42:47.611056 Creating /var/lib/lava/dispatcher/tmp/12948308/lava-overlay-o5cxid1h/lava-12948308/bin/lava-target-storage
115 12:42:47.611162 Creating /var/lib/lava/dispatcher/tmp/12948308/lava-overlay-o5cxid1h/lava-12948308/bin/lava-test-case
116 12:42:47.611251 Creating /var/lib/lava/dispatcher/tmp/12948308/lava-overlay-o5cxid1h/lava-12948308/bin/lava-test-event
117 12:42:47.611339 Creating /var/lib/lava/dispatcher/tmp/12948308/lava-overlay-o5cxid1h/lava-12948308/bin/lava-test-feedback
118 12:42:47.611428 Creating /var/lib/lava/dispatcher/tmp/12948308/lava-overlay-o5cxid1h/lava-12948308/bin/lava-test-raise
119 12:42:47.611549 Creating /var/lib/lava/dispatcher/tmp/12948308/lava-overlay-o5cxid1h/lava-12948308/bin/lava-test-reference
120 12:42:47.611639 Creating /var/lib/lava/dispatcher/tmp/12948308/lava-overlay-o5cxid1h/lava-12948308/bin/lava-test-runner
121 12:42:47.611727 Creating /var/lib/lava/dispatcher/tmp/12948308/lava-overlay-o5cxid1h/lava-12948308/bin/lava-test-set
122 12:42:47.611816 Creating /var/lib/lava/dispatcher/tmp/12948308/lava-overlay-o5cxid1h/lava-12948308/bin/lava-test-shell
123 12:42:47.611907 Updating /var/lib/lava/dispatcher/tmp/12948308/lava-overlay-o5cxid1h/lava-12948308/bin/lava-install-packages (oe)
124 12:42:47.612022 Updating /var/lib/lava/dispatcher/tmp/12948308/lava-overlay-o5cxid1h/lava-12948308/bin/lava-installed-packages (oe)
125 12:42:47.612110 Creating /var/lib/lava/dispatcher/tmp/12948308/lava-overlay-o5cxid1h/lava-12948308/environment
126 12:42:47.612193 LAVA metadata
127 12:42:47.612253 - LAVA_JOB_ID=12948308
128 12:42:47.612305 - LAVA_DISPATCHER_IP=192.168.201.1
129 12:42:47.612385 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 12:42:47.612438 skipped lava-vland-overlay
131 12:42:47.612496 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 12:42:47.612557 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 12:42:47.612610 skipped lava-multinode-overlay
134 12:42:47.612668 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 12:42:47.612729 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 12:42:47.612787 Loading test definitions
137 12:42:47.612859 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 12:42:47.612919 Using /lava-12948308 at stage 0
139 12:42:47.613144 uuid=12948308_1.4.2.3.1 testdef=None
140 12:42:47.613217 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 12:42:47.613282 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 12:42:47.613696 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 12:42:47.613878 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 12:42:47.614365 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 12:42:47.614549 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 12:42:47.615034 runner path: /var/lib/lava/dispatcher/tmp/12948308/lava-overlay-o5cxid1h/lava-12948308/0/tests/0_dmesg test_uuid 12948308_1.4.2.3.1
149 12:42:47.615170 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 12:42:47.615367 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 12:42:47.615426 Using /lava-12948308 at stage 1
153 12:42:47.615650 uuid=12948308_1.4.2.3.5 testdef=None
154 12:42:47.615726 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 12:42:47.615791 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 12:42:47.616139 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 12:42:47.616315 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 12:42:47.616789 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 12:42:47.616962 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 12:42:47.617427 runner path: /var/lib/lava/dispatcher/tmp/12948308/lava-overlay-o5cxid1h/lava-12948308/1/tests/1_bootrr test_uuid 12948308_1.4.2.3.5
163 12:42:47.617556 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 12:42:47.617722 Creating lava-test-runner.conf files
166 12:42:47.617771 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12948308/lava-overlay-o5cxid1h/lava-12948308/0 for stage 0
167 12:42:47.617836 - 0_dmesg
168 12:42:47.617900 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12948308/lava-overlay-o5cxid1h/lava-12948308/1 for stage 1
169 12:42:47.617970 - 1_bootrr
170 12:42:47.618044 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 12:42:47.618112 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 12:42:47.624234 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 12:42:47.624327 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 12:42:47.624399 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 12:42:47.624466 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 12:42:47.624535 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 12:42:47.785264 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 12:42:47.785512 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 12:42:47.785607 extracting modules file /var/lib/lava/dispatcher/tmp/12948308/tftp-deploy-db5ynl4e/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12948308/extract-overlay-ramdisk-9bdx15ec/ramdisk
180 12:42:47.793806 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 12:42:47.793905 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 12:42:47.793977 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12948308/compress-overlay-ou0wxnuq/overlay-1.4.2.4.tar.gz to ramdisk
183 12:42:47.794035 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12948308/compress-overlay-ou0wxnuq/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12948308/extract-overlay-ramdisk-9bdx15ec/ramdisk
184 12:42:47.799510 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 12:42:47.799605 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 12:42:47.799679 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 12:42:47.799749 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 12:42:47.799810 Building ramdisk /var/lib/lava/dispatcher/tmp/12948308/extract-overlay-ramdisk-9bdx15ec/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12948308/extract-overlay-ramdisk-9bdx15ec/ramdisk
189 12:42:47.853740 >> 49788 blocks
190 12:42:48.582479 rename /var/lib/lava/dispatcher/tmp/12948308/extract-overlay-ramdisk-9bdx15ec/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12948308/tftp-deploy-db5ynl4e/ramdisk/ramdisk.cpio.gz
191 12:42:48.582842 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 12:42:48.582949 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 12:42:48.583059 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 12:42:48.583141 No mkimage arch provided, not using FIT.
195 12:42:48.583211 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 12:42:48.583284 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 12:42:48.583359 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 12:42:48.583433 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 12:42:48.583499 No LXC device requested
200 12:42:48.583567 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 12:42:48.583636 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 12:42:48.583703 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 12:42:48.583766 Checking files for TFTP limit of 4294967296 bytes.
204 12:42:48.584078 end: 1 tftp-deploy (duration 00:00:02) [common]
205 12:42:48.584155 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 12:42:48.584222 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 12:42:48.584307 substitutions:
208 12:42:48.584358 - {DTB}: None
209 12:42:48.584404 - {INITRD}: 12948308/tftp-deploy-db5ynl4e/ramdisk/ramdisk.cpio.gz
210 12:42:48.584448 - {KERNEL}: 12948308/tftp-deploy-db5ynl4e/kernel/bzImage
211 12:42:48.584492 - {LAVA_MAC}: None
212 12:42:48.584546 - {PRESEED_CONFIG}: None
213 12:42:48.584597 - {PRESEED_LOCAL}: None
214 12:42:48.584641 - {RAMDISK}: 12948308/tftp-deploy-db5ynl4e/ramdisk/ramdisk.cpio.gz
215 12:42:48.584690 - {ROOT_PART}: None
216 12:42:48.584736 - {ROOT}: None
217 12:42:48.584778 - {SERVER_IP}: 192.168.201.1
218 12:42:48.584820 - {TEE}: None
219 12:42:48.584862 Parsed boot commands:
220 12:42:48.584903 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 12:42:48.585039 Parsed boot commands: tftpboot 192.168.201.1 12948308/tftp-deploy-db5ynl4e/kernel/bzImage 12948308/tftp-deploy-db5ynl4e/kernel/cmdline 12948308/tftp-deploy-db5ynl4e/ramdisk/ramdisk.cpio.gz
222 12:42:48.585109 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 12:42:48.585171 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 12:42:48.585236 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 12:42:48.585299 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 12:42:48.585352 Not connected, no need to disconnect.
227 12:42:48.585409 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 12:42:48.585554 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 12:42:48.585608 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-chromebox-cxi5-brask-cbg-4'
230 12:42:48.588008 Setting prompt string to ['lava-test: # ']
231 12:42:48.588243 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 12:42:48.588331 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 12:42:48.588408 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 12:42:48.588489 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 12:42:48.588641 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-chromebox-cxi5-brask-cbg-4' '--port=1' '--command=reboot'
236 12:42:53.726543 >> Command sent successfully.
237 12:42:53.731907 Returned 0 in 5 seconds
238 12:42:53.832594 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 12:42:53.833640 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 12:42:53.833996 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 12:42:53.834276 Setting prompt string to 'Starting depthcharge on Moli...'
243 12:42:53.834515 Changing prompt to 'Starting depthcharge on Moli...'
244 12:42:53.834743 depthcharge-start: Wait for prompt Starting depthcharge on Moli... (timeout 00:05:00)
245 12:42:53.835518 [Enter `^Ec?' for help]
246 12:42:55.042324
247 12:42:55.042803
248 12:42:55.051957 coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep 6 23:44:51 UTC 2023 bootblock starting (log level: 8)...
249 12:42:55.055382 CPU: Intel(R) Celeron(R) 7305
250 12:42:55.058738 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
251 12:42:55.065211 CPU: AES supported, TXT NOT supported, VT supported
252 12:42:55.071832 Cache: Level 3: Associativity = 8 Partitions = 1 Line Size = 64 Sets = 16384
253 12:42:55.075255 Cache size = 8 MiB
254 12:42:55.078642 MCH: device id 4619 (rev 04) is Alderlake-P
255 12:42:55.085250 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
256 12:42:55.088390 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
257 12:42:55.092053 VBOOT: Loading verstage.
258 12:42:55.095419 FMAP: Found "FLASH" version 1.1 at 0x1804000.
259 12:42:55.101785 FMAP: base = 0x0 size = 0x2000000 #areas = 37
260 12:42:55.104794 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
261 12:42:55.115436 CBFS: mcache @0xfef85600 built for 73 files, used 0x1000 of 0x2000 bytes
262 12:42:55.122361 CBFS: Found 'fallback/verstage' @0x18bf40 size 0x164a8 in mcache @0xfef85908
263 12:42:55.122830
264 12:42:55.123128
265 12:42:55.135735 coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep 6 23:44:51 UTC 2023 verstage starting (log level: 8)...
266 12:42:55.139143 Probing TPM I2C: I2C bus 1 version 0x3230302a
267 12:42:55.142714 DW I2C bus 1 at 0xfe022000 (400 KHz)
268 12:42:55.146449 done! DID_VID 0x00281ae0
269 12:42:55.149808 TPM ready after 0 ms
270 12:42:55.153183 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
271 12:42:55.166294 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.141/cr50_v2.9
272 12:42:55.172693 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
273 12:42:55.233917 tlcl_send_startup: Startup return code is 0
274 12:42:55.234473 TPM: setup succeeded
275 12:42:55.256560 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
276 12:42:55.278538 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
277 12:42:55.282562 Chrome EC: UHEPI supported
278 12:42:55.285799 Reading cr50 boot mode
279 12:42:55.300257 Cr50 says boot_mode is VERIFIED_RW(0x00).
280 12:42:55.300724 Phase 1
281 12:42:55.307198 FMAP: area GBB found @ 1805000 (458752 bytes)
282 12:42:55.313995 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
283 12:42:55.320483 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
284 12:42:55.327162 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
285 12:42:55.327626 Phase 2
286 12:42:55.330249 Phase 3
287 12:42:55.334091 FMAP: area GBB found @ 1805000 (458752 bytes)
288 12:42:55.340612 FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)
289 12:42:55.344202 FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)
290 12:42:55.350622 VB2:vb2_verify_keyblock() Checking keyblock signature...
291 12:42:55.357312 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
292 12:42:55.363995 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
293 12:42:55.373794 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
294 12:42:55.386792 FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)
295 12:42:55.390178 FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)
296 12:42:55.396670 VB2:vb2_verify_fw_preamble() Verifying preamble.
297 12:42:55.403308 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
298 12:42:55.410313 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
299 12:42:55.416894 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
300 12:42:55.420954 Phase 4
301 12:42:55.424145 FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)
302 12:42:55.430503 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
303 12:42:55.658823 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
304 12:42:55.665863 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
305 12:42:55.669547 Saving vboot hash.
306 12:42:55.675604 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
307 12:42:55.692245 tlcl_extend: response is 0
308 12:42:55.698672 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
309 12:42:55.705087 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
310 12:42:55.719508 tlcl_extend: response is 0
311 12:42:55.726350 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
312 12:42:55.744912 tlcl_lock_nv_write: response is 0
313 12:42:55.762277 tlcl_lock_nv_write: response is 0
314 12:42:55.762744 Slot B is selected
315 12:42:55.769051 FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)
316 12:42:55.775712 CBFS: mcache @0xfef87600 built for 23 files, used 0x464 of 0x2000 bytes
317 12:42:55.782620 CBFS: Found 'fallback/romstage' @0x0 size 0x1e2e0 in mcache @0xfef87600
318 12:42:55.789186 BS: verstage times (exec / console): total (unknown) / 260 ms
319 12:42:55.789666
320 12:42:55.790013
321 12:42:55.799009 coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep 6 23:44:51 UTC 2023 romstage starting (log level: 8)...
322 12:42:55.802377 Google Chrome EC: version:
323 12:42:55.805881 ro: moli_v2.0.19454-8a70cbdcf0
324 12:42:55.809141 rw: moli_v2.0.22464-d4ba27cabb
325 12:42:55.812442 running image: 2
326 12:42:55.815786 FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)
327 12:42:55.826145 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
328 12:42:55.832776 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
329 12:42:55.838424 CBFS: Found 'ecrw.hash' @0x1e0200 size 0x20 in mcache @0xfef879bc
330 12:42:55.848587 VB2:check_ec_hash() Hexp RW(active): 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d
331 12:42:55.858641 VB2:check_ec_hash() Hmir: 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d
332 12:42:55.861849 EC took 966us to calculate image hash
333 12:42:55.872191 VB2:check_ec_hash() Heff RW(active): 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d
334 12:42:55.875458 VB2:sync_ec() select_rw=RW(active)
335 12:42:55.884004 EC returned error result code 1
336 12:42:55.887259 PARAM_LIMIT_POWER not supported by EC.
337 12:42:55.894038 Waited 7362us to clear limit power flag.
338 12:42:55.898141 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
339 12:42:55.901092 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
340 12:42:55.908296 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
341 12:42:55.911571 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
342 12:42:55.915871 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
343 12:42:55.916337 TCO_STS: 0000 0000
344 12:42:55.918689 GEN_PMCON: d0015038 00002200
345 12:42:55.922078 GBLRST_CAUSE: 00000000 00000000
346 12:42:55.925449 HPR_CAUSE0: 00000000
347 12:42:55.928965 prev_sleep_state 5
348 12:42:55.932376 Abort disabling TXT, as CPU is not TXT capable.
349 12:42:55.940096 cse_lite: Number of partitions = 3
350 12:42:55.942930 cse_lite: Current partition = RO
351 12:42:55.943309 cse_lite: Next partition = RO
352 12:42:55.946671 cse_lite: Flags = 0x7
353 12:42:55.953368 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x19bfff)
354 12:42:55.963031 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x205000, End=0x439fff)
355 12:42:55.966621 FMAP: area SI_ME found @ 1000 (5238784 bytes)
356 12:42:55.973643 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
357 12:42:55.980213 cse_lite: CSE RW partition: offset = 0x205000, size = 0x235000
358 12:42:55.986777 CBFS: Found 'me_rw.version' @0x7eec0 size 0xd in mcache @0xfef877f4
359 12:42:55.989774 cse_lite: CSE CBFS RW version : 16.1.25.2049
360 12:42:55.993551 CSE Sub-partition update not required
361 12:42:56.000182 cse_lite: Set Boot Partition Info Command (RW)
362 12:42:56.003397 HECI: Global Reset(Type:1) Command
363 12:42:57.417619
364 12:42:57.418094
365 12:42:57.427757 coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep 6 23:44:51 UTC 2023 bootblock starting (log level: 8)...
366 12:42:57.430669 CPU: Intel(R) Celeron(R) 7305
367 12:42:57.434447 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
368 12:42:57.440376 CPU: AES supported, TXT NOT supported, VT supported
369 12:42:57.446798 Cache: Level 3: Associativity = 8 Partitions = 1 Line Size = 64 Sets = 16384
370 12:42:57.450455 Cache size = 8 MiB
371 12:42:57.453639 MCH: device id 4619 (rev 04) is Alderlake-P
372 12:42:57.460234 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
373 12:42:57.463799 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
374 12:42:57.467168 VBOOT: Loading verstage.
375 12:42:57.470257 FMAP: Found "FLASH" version 1.1 at 0x1804000.
376 12:42:57.477001 FMAP: base = 0x0 size = 0x2000000 #areas = 37
377 12:42:57.480448 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
378 12:42:57.490799 CBFS: mcache @0xfef85600 built for 73 files, used 0x1000 of 0x2000 bytes
379 12:42:57.497256 CBFS: Found 'fallback/verstage' @0x18bf40 size 0x164a8 in mcache @0xfef85908
380 12:42:57.497320
381 12:42:57.497370
382 12:42:57.510573 coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep 6 23:44:51 UTC 2023 verstage starting (log level: 8)...
383 12:42:57.514252 Probing TPM I2C: I2C bus 1 version 0x3230302a
384 12:42:57.520720 DW I2C bus 1 at 0xfe022000 (400 KHz)
385 12:42:57.520797 done! DID_VID 0x00281ae0
386 12:42:57.524203 TPM ready after 0 ms
387 12:42:57.527524 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
388 12:42:57.541339 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.141/cr50_v2.9
389 12:42:57.547822 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
390 12:42:57.607089 tlcl_send_startup: Startup return code is 0
391 12:42:57.607202 TPM: setup succeeded
392 12:42:57.627522 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
393 12:42:57.649217 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
394 12:42:57.653193 Chrome EC: UHEPI supported
395 12:42:57.656101 Reading cr50 boot mode
396 12:42:57.671175 Cr50 says boot_mode is VERIFIED_RW(0x00).
397 12:42:57.671239 Phase 1
398 12:42:57.677906 FMAP: area GBB found @ 1805000 (458752 bytes)
399 12:42:57.684366 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
400 12:42:57.691216 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
401 12:42:57.697841 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
402 12:42:57.697914 Phase 2
403 12:42:57.701207 Phase 3
404 12:42:57.704316 FMAP: area GBB found @ 1805000 (458752 bytes)
405 12:42:57.711018 FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)
406 12:42:57.714516 FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)
407 12:42:57.720968 VB2:vb2_verify_keyblock() Checking keyblock signature...
408 12:42:57.727817 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
409 12:42:57.734392 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
410 12:42:57.744626 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
411 12:42:57.758358 FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)
412 12:42:57.761868 FMAP: area VBLOCK_B found @ 1000000 (65536 bytes)
413 12:42:57.769405 VB2:vb2_verify_fw_preamble() Verifying preamble.
414 12:42:57.772876 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
415 12:42:57.778831 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
416 12:42:57.789072 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
417 12:42:57.792067 Phase 4
418 12:42:57.795692 FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)
419 12:42:57.802193 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
420 12:42:58.029449 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
421 12:42:58.036208 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
422 12:42:58.039673 Saving vboot hash.
423 12:42:58.046092 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
424 12:42:58.062156 tlcl_extend: response is 0
425 12:42:58.068755 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
426 12:42:58.075319 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
427 12:42:58.089805 tlcl_extend: response is 0
428 12:42:58.096640 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
429 12:42:58.115282 tlcl_lock_nv_write: response is 0
430 12:42:58.132998 tlcl_lock_nv_write: response is 0
431 12:42:58.133079 Slot B is selected
432 12:42:58.139337 FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)
433 12:42:58.146301 CBFS: mcache @0xfef87600 built for 23 files, used 0x464 of 0x2000 bytes
434 12:42:58.152685 CBFS: Found 'fallback/romstage' @0x0 size 0x1e2e0 in mcache @0xfef87600
435 12:42:58.159587 BS: verstage times (exec / console): total (unknown) / 260 ms
436 12:42:58.159652
437 12:42:58.159702
438 12:42:58.169410 coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep 6 23:44:51 UTC 2023 romstage starting (log level: 8)...
439 12:42:58.172907 Google Chrome EC: version:
440 12:42:58.176131 ro: moli_v2.0.19454-8a70cbdcf0
441 12:42:58.179263 rw: moli_v2.0.22464-d4ba27cabb
442 12:42:58.182599 running image: 2
443 12:42:58.186133 FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)
444 12:42:58.196011 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
445 12:42:58.202771 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
446 12:42:58.209357 CBFS: Found 'ecrw.hash' @0x1e0200 size 0x20 in mcache @0xfef879bc
447 12:42:58.219807 VB2:check_ec_hash() Hexp RW(active): 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d
448 12:42:58.229341 VB2:check_ec_hash() Hmir: 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d
449 12:42:58.232900 EC took 943us to calculate image hash
450 12:42:58.242850 VB2:check_ec_hash() Heff RW(active): 4b5e9cf392d67cb44ef3fdfc435e56e521eb3b13299fd09abf8f0e82d1d7976d
451 12:42:58.246018 VB2:sync_ec() select_rw=RW(active)
452 12:42:58.253635 EC returned error result code 1
453 12:42:58.257855 PARAM_LIMIT_POWER not supported by EC.
454 12:42:58.264318 Waited 7387us to clear limit power flag.
455 12:42:58.267706 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
456 12:42:58.271342 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
457 12:42:58.277800 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
458 12:42:58.281078 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
459 12:42:58.284210 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
460 12:42:58.287736 TCO_STS: 0000 0000
461 12:42:58.290947 GEN_PMCON: d1001038 00002200
462 12:42:58.294309 GBLRST_CAUSE: 00000040 00000000
463 12:42:58.294363 HPR_CAUSE0: 00000000
464 12:42:58.297698 prev_sleep_state 5
465 12:42:58.304260 Abort disabling TXT, as CPU is not TXT capable.
466 12:42:58.307596 cse_lite: Number of partitions = 3
467 12:42:58.311218 cse_lite: Current partition = RW
468 12:42:58.314259 cse_lite: Next partition = RW
469 12:42:58.317606 cse_lite: Flags = 0x7
470 12:42:58.324450 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x19bfff)
471 12:42:58.330985 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x205000, End=0x439fff)
472 12:42:58.337973 FMAP: area SI_ME found @ 1000 (5238784 bytes)
473 12:42:58.344268 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
474 12:42:58.351008 cse_lite: CSE RW partition: offset = 0x205000, size = 0x235000
475 12:42:58.357674 CBFS: Found 'me_rw.version' @0x7eec0 size 0xd in mcache @0xfef877f4
476 12:42:58.361006 cse_lite: CSE CBFS RW version : 16.1.25.2049
477 12:42:58.364582 CSE Sub-partition update not required
478 12:42:58.369008 Boot Count incremented to 2272
479 12:42:58.375566 CBFS: Found 'fspm.bin' @0x7efc0 size 0xc0000 in mcache @0xfef87868
480 12:42:58.382290 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
481 12:42:58.395594 Probing TPM I2C: done! DID_VID 0x00281ae0
482 12:42:58.399137 Locality already claimed
483 12:42:58.402204 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
484 12:42:58.421908 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
485 12:42:58.425973 MRC: Hash idx 0x100d comparison successful.
486 12:42:58.429381 MRC cache found, size f6c8
487 12:42:58.432780 bootmode is set to: 2
488 12:42:58.436065 FW_CONFIG value from CBI is 0x64
489 12:42:58.439498 fw_config match found: STORAGE=STORAGE_EMMC
490 12:42:58.446238 FMAP: area RW_SPD_CACHE found @ f28000 (4096 bytes)
491 12:42:58.449235 SPD_CACHE: cache found, size 0x1000
492 12:42:58.455667 SPD_CACHE: DIMM0 is the same
493 12:42:58.459033 No memory dimm at address 51
494 12:42:58.462245 SPD_CACHE: DIMM1 is not present
495 12:42:58.465807 No memory dimm at address 52
496 12:42:58.468471 SPD_CACHE: DIMM2 is not present
497 12:42:58.472459 No memory dimm at address 53
498 12:42:58.475607 SPD_CACHE: DIMM3 is not present
499 12:42:58.479101 Use the SPD cache data
500 12:42:58.482445 SPD: module type is DDR4
501 12:42:58.485718 SPD: module part number is M471A5244CB0-CWE
502 12:42:58.492235 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
503 12:42:58.495624 SPD: device width 16 bits, bus width 64 bits
504 12:42:58.499160 SPD: module size is 4096 MB (per channel)
505 12:42:58.552762 CBMEM:
506 12:42:58.555854 IMD: root @ 0x76fff000 254 entries.
507 12:42:58.559215 IMD: root @ 0x76ffec00 62 entries.
508 12:42:58.568662 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
509 12:42:58.571872 FMAP: area RW_VPD found @ f29000 (8192 bytes)
510 12:42:58.575290 RW_VPD is uninitialized or empty.
511 12:42:58.582333 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
512 12:42:58.585769 External stage cache:
513 12:42:58.588981 IMD: root @ 0x7bbff000 254 entries.
514 12:42:58.592335 IMD: root @ 0x7bbfec00 62 entries.
515 12:42:58.599645 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
516 12:42:58.606070 MRC: Checking cached data update for 'RW_MRC_CACHE'.
517 12:42:58.609500 MRC: 'RW_MRC_CACHE' does not need update.
518 12:42:58.609966 1 DIMMs found
519 12:42:58.612769 SMM Memory Map
520 12:42:58.616165 SMRAM : 0x7b800000 0x800000
521 12:42:58.619677 Subregion 0: 0x7b800000 0x200000
522 12:42:58.622983 Subregion 1: 0x7ba00000 0x200000
523 12:42:58.626122 Subregion 2: 0x7bc00000 0x400000
524 12:42:58.629253 top_of_ram = 0x77000000
525 12:42:58.632542 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
526 12:42:58.638948 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
527 12:42:58.645923 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
528 12:42:58.649276 MTRR Range: Start=ff000000 End=0 (Size 1000000)
529 12:42:58.649652 Normal boot
530 12:42:58.658613 CBFS: Found 'fallback/postcar' @0x186040 size 0x5e9c in mcache @0xfef878dc
531 12:42:58.668693 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x5aa8 memsize: 0xae60
532 12:42:58.671874 Processing 237 relocs. Offset value of 0x74ab9000
533 12:42:58.675317 CLFLUSH [0x76ab9000, 0x76ac3e60]
534 12:42:58.678466 CLFLUSH [0x76abea80, 0x76abea84]
535 12:42:58.688714 BS: romstage times (exec / console): total (unknown) / 418 ms
536 12:42:58.691916 CLFLUSH [0x76ab8000, 0x77000000]
537 12:42:58.702618 CLFLUSH [0x7ba00000, 0x7bc00000]
538 12:42:58.714394
539 12:42:58.714453
540 12:42:58.724227 coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep 6 23:44:51 UTC 2023 postcar starting (log level: 8)...
541 12:42:58.724295 Normal boot
542 12:42:58.730673 FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)
543 12:42:58.737403 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
544 12:42:58.744104 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
545 12:42:58.754203 CBFS: Found 'fallback/ramstage' @0x537c0 size 0x25581 in mcache @0x76add0b0
546 12:42:58.801811 Loading module at 0x76a2e000 with entry 0x76a2e000. filesize: 0x53100 memsize: 0x89b50
547 12:42:58.808500 Processing 5882 relocs. Offset value of 0x72a2e000
548 12:42:58.811860 BS: postcar times (exec / console): total (unknown) / 54 ms
549 12:42:58.815329
550 12:42:58.815390
551 12:42:58.825278 coreboot-v1.9308_26_0.0.22-27049-gc173a2e938 Wed Sep 6 23:44:51 UTC 2023 ramstage starting (log level: 8)...
552 12:42:58.828402 Reserving BERT start 76a1d000, size 10000
553 12:42:58.828464 Normal boot
554 12:42:58.835138 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
555 12:42:58.842142 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
556 12:42:58.848502 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
557 12:42:58.855341 FMAP: area RW_VPD found @ f29000 (8192 bytes)
558 12:42:58.858385 Google Chrome EC: version:
559 12:42:58.861762 ro: moli_v2.0.19454-8a70cbdcf0
560 12:42:58.865038 rw: moli_v2.0.22464-d4ba27cabb
561 12:42:58.865109 running image: 2
562 12:42:58.868333 ACPI _SWS is PM1 Index 8 GPE Index -1
563 12:42:58.874964 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
564 12:42:58.878568 FW_CONFIG value from CBI is 0x64
565 12:42:58.885314 PCI: 00:06.0 disabled by fw_config
566 12:42:58.888638 fw_config match found: STORAGE=STORAGE_EMMC
567 12:42:58.891783 fw_config match found: STORAGE=STORAGE_EMMC
568 12:42:58.898710 FMAP: area FW_MAIN_B found @ 1010000 (5242816 bytes)
569 12:42:58.905434 CBFS: Found 'cpu_microcode_blob.bin' @0x1e380 size 0x35400 in mcache @0x76add080
570 12:42:58.912082 microcode: sig=0x906a4 pf=0x80 revision=0x423
571 12:42:58.915422 microcode: Update skipped, already up-to-date
572 12:42:58.921688 CBFS: Found 'fsps.bin' @0x13f000 size 0x46fd9 in mcache @0x76add2a8
573 12:42:58.955233 Detected 5 core, 5 thread CPU.
574 12:42:58.958563 Setting up SMI for CPU
575 12:42:58.962281 IED base = 0x7bc00000
576 12:42:58.962344 IED size = 0x00400000
577 12:42:58.965102 Will perform SMM setup.
578 12:42:58.968603 CPU: Intel(R) Celeron(R) 7305.
579 12:42:58.971705 LAPIC 0x0 in XAPIC mode.
580 12:42:58.978562 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
581 12:42:58.985359 Processing 18 relocs. Offset value of 0x00030000
582 12:42:58.989422 Attempting to start 4 APs
583 12:42:58.992530 Waiting for 10ms after sending INIT.
584 12:42:59.005908 Waiting for SIPI to complete...
585 12:42:59.009319 done.
586 12:42:59.009382 LAPIC 0x10 in XAPIC mode.
587 12:42:59.012680 Waiting for SIPI to complete...
588 12:42:59.012759 done.
589 12:42:59.016100 LAPIC 0x16 in XAPIC mode.
590 12:42:59.022724 AP: slot 4 apic_id 10, MCU rev: 0x00000423
591 12:42:59.022802 LAPIC 0x12 in XAPIC mode.
592 12:42:59.029188 AP: slot 3 apic_id 16, MCU rev: 0x00000423
593 12:42:59.029267 LAPIC 0x14 in XAPIC mode.
594 12:42:59.035887 AP: slot 1 apic_id 12, MCU rev: 0x00000423
595 12:42:59.039413 AP: slot 2 apic_id 14, MCU rev: 0x00000423
596 12:42:59.042902 smm_setup_relocation_handler: enter
597 12:42:59.045977 smm_setup_relocation_handler: exit
598 12:42:59.055841 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
599 12:42:59.059068 Processing 11 relocs. Offset value of 0x00038000
600 12:42:59.065905 smm_module_setup_stub: stack_top = 0x7b802800
601 12:42:59.068983 smm_module_setup_stub: per cpu stack_size = 0x800
602 12:42:59.075780 smm_module_setup_stub: runtime.start32_offset = 0x4c
603 12:42:59.078995 smm_module_setup_stub: runtime.smm_size = 0x10000
604 12:42:59.085614 SMM Module: stub loaded at 38000. Will call 0x76a5220d
605 12:42:59.089168 Installing permanent SMM handler to 0x7b800000
606 12:42:59.092230 FX_SAVE [0x7b9ff600-0x7ba00000]
607 12:42:59.095590 HANDLER [0x7b9f6000-0x7b9ff528]
608 12:42:59.095646
609 12:42:59.099028 CPU 0
610 12:42:59.102488 ss0 [0x7b9f5c00-0x7b9f6000]
611 12:42:59.105722 stub0 [0x7b9ee000-0x7b9ee208]
612 12:42:59.105778
613 12:42:59.105825 CPU 1
614 12:42:59.108904 ss1 [0x7b9f5800-0x7b9f5c00]
615 12:42:59.112320 stub1 [0x7b9edc00-0x7b9ede08]
616 12:42:59.112379
617 12:42:59.115632 CPU 2
618 12:42:59.118919 ss2 [0x7b9f5400-0x7b9f5800]
619 12:42:59.122292 stub2 [0x7b9ed800-0x7b9eda08]
620 12:42:59.122352
621 12:42:59.122401 CPU 3
622 12:42:59.125469 ss3 [0x7b9f5000-0x7b9f5400]
623 12:42:59.128991 stub3 [0x7b9ed400-0x7b9ed608]
624 12:42:59.129069
625 12:42:59.132154 CPU 4
626 12:42:59.135658 ss4 [0x7b9f4c00-0x7b9f5000]
627 12:42:59.138926 stub4 [0x7b9ed000-0x7b9ed208]
628 12:42:59.139004
629 12:42:59.142106 stacks [0x7b800000-0x7b802800]
630 12:42:59.152676 Loading module at 0x7b9f6000 with entry 0x7b9f6d5c. filesize: 0x4408 memsize: 0x9528
631 12:42:59.155249 Processing 255 relocs. Offset value of 0x7b9f6000
632 12:42:59.165286 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
633 12:42:59.168891 Processing 11 relocs. Offset value of 0x7b9ee000
634 12:42:59.172122 smm_module_setup_stub: stack_top = 0x7b802800
635 12:42:59.178894 smm_module_setup_stub: per cpu stack_size = 0x800
636 12:42:59.182087 smm_module_setup_stub: runtime.start32_offset = 0x4c
637 12:42:59.188822 smm_module_setup_stub: runtime.smm_size = 0x200000
638 12:42:59.195422 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
639 12:42:59.202112 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
640 12:42:59.208585 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
641 12:42:59.215569 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
642 12:42:59.218574 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
643 12:42:59.225230 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
644 12:42:59.231932 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
645 12:42:59.238613 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
646 12:42:59.245123 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5c
647 12:42:59.249024 Clearing SMI status registers
648 12:42:59.252345 SMI_STS: PM1
649 12:42:59.252431 PM1_STS: WAK PWRBTN
650 12:42:59.262289 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
651 12:42:59.265643 In relocation handler: CPU 0
652 12:42:59.269009 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
653 12:42:59.272433 Writing SMRR. base = 0x7b800006, mask=0xff800c00
654 12:42:59.275618 Relocation complete.
655 12:42:59.282274 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
656 12:42:59.285518 In relocation handler: CPU 3
657 12:42:59.289189 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
658 12:42:59.295717 Writing SMRR. base = 0x7b800006, mask=0xff800c00
659 12:42:59.295777 Relocation complete.
660 12:42:59.302276 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
661 12:42:59.305687 In relocation handler: CPU 2
662 12:42:59.308981 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
663 12:42:59.315853 Writing SMRR. base = 0x7b800006, mask=0xff800c00
664 12:42:59.319212 Relocation complete.
665 12:42:59.325523 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
666 12:42:59.329147 In relocation handler: CPU 4
667 12:42:59.332318 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
668 12:42:59.335516 Writing SMRR. base = 0x7b800006, mask=0xff800c00
669 12:42:59.339050 Relocation complete.
670 12:42:59.345481 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
671 12:42:59.349053 In relocation handler: CPU 1
672 12:42:59.352275 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
673 12:42:59.359115 Writing SMRR. base = 0x7b800006, mask=0xff800c00
674 12:42:59.359191 Relocation complete.
675 12:42:59.362312 Initializing CPU #0
676 12:42:59.365652 CPU: vendor Intel device 906a4
677 12:42:59.368932 CPU: family 06, model 9a, stepping 04
678 12:42:59.372257 Clearing out pending MCEs
679 12:42:59.375680 cpu: energy policy set to 7
680 12:42:59.375756 Turbo is unavailable
681 12:42:59.382192 microcode: Update skipped, already up-to-date
682 12:42:59.382269 CPU #0 initialized
683 12:42:59.385598 Initializing CPU #4
684 12:42:59.389071 Initializing CPU #2
685 12:42:59.389147 Initializing CPU #1
686 12:42:59.392335 Initializing CPU #3
687 12:42:59.395434 CPU: vendor Intel device 906a4
688 12:42:59.399064 CPU: family 06, model 9a, stepping 04
689 12:42:59.402242 CPU: vendor Intel device 906a4
690 12:42:59.405529 CPU: family 06, model 9a, stepping 04
691 12:42:59.408732 CPU: vendor Intel device 906a4
692 12:42:59.412280 CPU: family 06, model 9a, stepping 04
693 12:42:59.415280 Clearing out pending MCEs
694 12:42:59.418804 Clearing out pending MCEs
695 12:42:59.422023 CPU: vendor Intel device 906a4
696 12:42:59.425464 CPU: family 06, model 9a, stepping 04
697 12:42:59.428607 Clearing out pending MCEs
698 12:42:59.428682 cpu: energy policy set to 7
699 12:42:59.432287 Clearing out pending MCEs
700 12:42:59.435365 cpu: energy policy set to 7
701 12:42:59.438605 cpu: energy policy set to 7
702 12:42:59.441860 microcode: Update skipped, already up-to-date
703 12:42:59.445318 CPU #3 initialized
704 12:42:59.448621 cpu: energy policy set to 7
705 12:42:59.452104 microcode: Update skipped, already up-to-date
706 12:42:59.455352 CPU #4 initialized
707 12:42:59.458662 microcode: Update skipped, already up-to-date
708 12:42:59.461974 CPU #1 initialized
709 12:42:59.465704 microcode: Update skipped, already up-to-date
710 12:42:59.468459 CPU #2 initialized
711 12:42:59.472045 bsp_do_flight_plan done after 453 msecs.
712 12:42:59.472098 Enabling SMIs.
713 12:42:59.478552 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 245 / 352 ms
714 12:42:59.496682 Overriding PL2 (55) PsysPL2 (90) Psys_Pmax (214)
715 12:42:59.503215 Overriding power limits PL1(mW) (15000, 15000) PL2(mW) (55000, 55000) PL4 (123)
716 12:42:59.510025 Probing TPM I2C: done! DID_VID 0x00281ae0
717 12:42:59.513136 Locality already claimed
718 12:42:59.516608 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
719 12:42:59.527444 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.141/cr50_v2.9
720 12:42:59.530839 Enabling GPIO PM b/c CR50 has long IRQ pulse support
721 12:42:59.537256 fw_config match found: AUDIO=NAU88L25B_I2S
722 12:42:59.540762 CBFS: Found 'vbt.bin' @0x7e980 size 0x4eb in mcache @0x76add1c4
723 12:42:59.547645 Found a VBT of 8704 bytes after decompression
724 12:42:59.547722 PsysPmax = 214W
725 12:42:59.550865 PCI 1.0, PIN A, using IRQ #16
726 12:42:59.554321 PCI 2.0, PIN A, using IRQ #17
727 12:42:59.557572 PCI 4.0, PIN A, using IRQ #18
728 12:42:59.560876 PCI 5.0, PIN A, using IRQ #16
729 12:42:59.564198 PCI 6.0, PIN A, using IRQ #16
730 12:42:59.567631 PCI 6.2, PIN C, using IRQ #18
731 12:42:59.571433 PCI 7.0, PIN A, using IRQ #19
732 12:42:59.574081 PCI 7.1, PIN B, using IRQ #20
733 12:42:59.577729 PCI 7.2, PIN C, using IRQ #21
734 12:42:59.580958 PCI 7.3, PIN D, using IRQ #22
735 12:42:59.584074 PCI 8.0, PIN A, using IRQ #23
736 12:42:59.587338 PCI D.0, PIN A, using IRQ #17
737 12:42:59.590822 PCI D.1, PIN B, using IRQ #19
738 12:42:59.594024 PCI 10.0, PIN A, using IRQ #24
739 12:42:59.597526 PCI 10.1, PIN B, using IRQ #25
740 12:42:59.597594 PCI 10.6, PIN C, using IRQ #20
741 12:42:59.600816 PCI 10.7, PIN D, using IRQ #21
742 12:42:59.604479 PCI 11.0, PIN A, using IRQ #26
743 12:42:59.607811 PCI 11.1, PIN B, using IRQ #27
744 12:42:59.610877 PCI 11.2, PIN C, using IRQ #28
745 12:42:59.614285 PCI 11.3, PIN D, using IRQ #29
746 12:42:59.617542 PCI 12.0, PIN A, using IRQ #30
747 12:42:59.621427 PCI 12.6, PIN B, using IRQ #31
748 12:42:59.624356 PCI 12.7, PIN C, using IRQ #22
749 12:42:59.627646 PCI 13.0, PIN A, using IRQ #32
750 12:42:59.631280 PCI 13.1, PIN B, using IRQ #33
751 12:42:59.634338 PCI 13.2, PIN C, using IRQ #34
752 12:42:59.637430 PCI 13.3, PIN D, using IRQ #35
753 12:42:59.641016 PCI 14.0, PIN B, using IRQ #23
754 12:42:59.644323 PCI 14.1, PIN A, using IRQ #36
755 12:42:59.647447 PCI 14.3, PIN C, using IRQ #17
756 12:42:59.647522 PCI 15.0, PIN A, using IRQ #37
757 12:42:59.651060 PCI 15.1, PIN B, using IRQ #38
758 12:42:59.654393 PCI 15.2, PIN C, using IRQ #39
759 12:42:59.657286 PCI 15.3, PIN D, using IRQ #40
760 12:42:59.660817 PCI 16.0, PIN A, using IRQ #18
761 12:42:59.664204 PCI 16.1, PIN B, using IRQ #19
762 12:42:59.667314 PCI 16.2, PIN C, using IRQ #20
763 12:42:59.670885 PCI 16.3, PIN D, using IRQ #21
764 12:42:59.674179 PCI 16.4, PIN A, using IRQ #18
765 12:42:59.677518 PCI 16.5, PIN B, using IRQ #19
766 12:42:59.680827 PCI 17.0, PIN A, using IRQ #22
767 12:42:59.684180 PCI 19.0, PIN A, using IRQ #41
768 12:42:59.687607 PCI 19.1, PIN B, using IRQ #42
769 12:42:59.690979 PCI 19.2, PIN C, using IRQ #43
770 12:42:59.694198 PCI 1C.0, PIN A, using IRQ #16
771 12:42:59.694257 PCI 1C.1, PIN B, using IRQ #17
772 12:42:59.697738 PCI 1C.2, PIN C, using IRQ #18
773 12:42:59.701018 PCI 1C.3, PIN D, using IRQ #19
774 12:42:59.704330 PCI 1C.4, PIN A, using IRQ #16
775 12:42:59.707596 PCI 1C.5, PIN B, using IRQ #17
776 12:42:59.711192 PCI 1C.6, PIN C, using IRQ #18
777 12:42:59.714509 PCI 1C.7, PIN D, using IRQ #19
778 12:42:59.717745 PCI 1D.0, PIN A, using IRQ #16
779 12:42:59.720910 PCI 1D.1, PIN B, using IRQ #17
780 12:42:59.724296 PCI 1D.2, PIN C, using IRQ #18
781 12:42:59.727454 PCI 1D.3, PIN D, using IRQ #19
782 12:42:59.731036 PCI 1E.0, PIN A, using IRQ #23
783 12:42:59.734537 PCI 1E.1, PIN B, using IRQ #20
784 12:42:59.737443 PCI 1E.2, PIN C, using IRQ #44
785 12:42:59.740859 PCI 1E.3, PIN D, using IRQ #45
786 12:42:59.744621 PCI 1F.3, PIN B, using IRQ #22
787 12:42:59.747420 PCI 1F.4, PIN C, using IRQ #23
788 12:42:59.747482 PCI 1F.6, PIN D, using IRQ #20
789 12:42:59.750956 PCI 1F.7, PIN A, using IRQ #21
790 12:42:59.757545 IRQ: Using dynamically assigned PCI IO-APIC IRQs
791 12:42:59.764039 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
792 12:42:59.825941 FSPS returned 0
793 12:42:59.829300 Executing Phase 1 of FspMultiPhaseSiInit
794 12:42:59.839240 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
795 12:42:59.842450 port C0 DISC req: usage 1 usb3 1 usb2 1
796 12:42:59.845938 Raw Buffer output 0 00000111
797 12:42:59.849319 Raw Buffer output 1 00000000
798 12:42:59.852825 pmc_send_ipc_cmd succeeded
799 12:42:59.859268 port C1 DISC req: usage 1 usb3 3 usb2 3
800 12:42:59.859337 Raw Buffer output 0 00000331
801 12:42:59.862602 Raw Buffer output 1 00000000
802 12:42:59.866774 pmc_send_ipc_cmd succeeded
803 12:42:59.873436 AP Mode Entry enabled, skip waiting for DisplayPort connection
804 12:42:59.879549 Detected 5 core, 5 thread CPU.
805 12:42:59.882884 Detected 5 core, 5 thread CPU.
806 12:42:59.887909 Detected 5 core, 5 thread CPU.
807 12:42:59.891400 Detected 5 core, 5 thread CPU.
808 12:42:59.894649 Detected 5 core, 5 thread CPU.
809 12:42:59.898248 Detected 5 core, 5 thread CPU.
810 12:42:59.901710 Detected 5 core, 5 thread CPU.
811 12:42:59.904808 Detected 5 core, 5 thread CPU.
812 12:42:59.908265 Detected 5 core, 5 thread CPU.
813 12:42:59.911536 Detected 5 core, 5 thread CPU.
814 12:42:59.914870 Detected 5 core, 5 thread CPU.
815 12:42:59.918235 Detected 5 core, 5 thread CPU.
816 12:42:59.921768 Detected 5 core, 5 thread CPU.
817 12:42:59.924912 Detected 5 core, 5 thread CPU.
818 12:42:59.928471 Detected 5 core, 5 thread CPU.
819 12:42:59.931659 Detected 5 core, 5 thread CPU.
820 12:43:00.030961 Detected 5 core, 5 thread CPU.
821 12:43:00.033950 Detected 5 core, 5 thread CPU.
822 12:43:00.037382 Detected 5 core, 5 thread CPU.
823 12:43:00.040343 Detected 5 core, 5 thread CPU.
824 12:43:00.043908 Detected 5 core, 5 thread CPU.
825 12:43:00.047183 Detected 5 core, 5 thread CPU.
826 12:43:00.050731 Detected 5 core, 5 thread CPU.
827 12:43:00.053925 Detected 5 core, 5 thread CPU.
828 12:43:00.057167 Detected 5 core, 5 thread CPU.
829 12:43:00.060414 Detected 5 core, 5 thread CPU.
830 12:43:00.063722 Detected 5 core, 5 thread CPU.
831 12:43:00.067281 Detected 5 core, 5 thread CPU.
832 12:43:00.070550 Detected 5 core, 5 thread CPU.
833 12:43:00.073810 Detected 5 core, 5 thread CPU.
834 12:43:00.077398 Display FSP Version Info HOB
835 12:43:00.080600 Reference Code - CPU = c.0.65.70
836 12:43:00.083824 uCode Version = 0.0.4.23
837 12:43:00.083884 TXT ACM version = ff.ff.ff.ffff
838 12:43:00.087759 Reference Code - ME = c.0.65.70
839 12:43:00.090500 MEBx version = 0.0.0.0
840 12:43:00.093837 ME Firmware Version = Lite SKU
841 12:43:00.097167 Reference Code - PCH = c.0.65.70
842 12:43:00.100658 PCH-CRID Status = Disabled
843 12:43:00.103908 PCH-CRID Original Value = ff.ff.ff.ffff
844 12:43:00.107401 PCH-CRID New Value = ff.ff.ff.ffff
845 12:43:00.110683 OPROM - RST - RAID = ff.ff.ff.ffff
846 12:43:00.114087 PCH Hsio Version = 4.0.0.0
847 12:43:00.117284 Reference Code - SA - System Agent = c.0.65.70
848 12:43:00.120809 Reference Code - MRC = 0.0.3.80
849 12:43:00.123962 SA - PCIe Version = c.0.65.70
850 12:43:00.127252 SA-CRID Status = Disabled
851 12:43:00.130525 SA-CRID Original Value = 0.0.0.4
852 12:43:00.133962 SA-CRID New Value = 0.0.0.4
853 12:43:00.137278 OPROM - VBIOS = ff.ff.ff.ffff
854 12:43:00.140775 IO Manageability Engine FW Version = 24.0.4.0
855 12:43:00.143976 PHY Build Version = 0.0.0.2016
856 12:43:00.147334 Thunderbolt(TM) FW Version = 11.5.0.0
857 12:43:00.153986 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
858 12:43:00.157550 Found PCIe Root Port #7 at PCI: 00:1c.0.
859 12:43:00.164150 Found PCIe Root Port #8 at PCI: 00:1c.7.
860 12:43:00.167608 Found PCIe Root Port #12 at PCI: 00:1d.0.
861 12:43:00.177246 pcie_rp_update_dev: Couldn't find PCIe Root Port #6 (originally PCI: 00:1c.5) which was enabled in devicetree, removing.
862 12:43:00.187274 Remapping PCIe Root Port #7 from PCI: 00:1c.6 to new function number 0.
863 12:43:00.193973 Remapping PCIe Root Port #12 from PCI: 00:1d.3 to new function number 0.
864 12:43:00.197250 Found PCIe Root Port #1 at PCI: 00:07.0.
865 12:43:00.200640 Found PCIe Root Port #2 at PCI: 00:07.1.
866 12:43:00.203846 Found PCIe Root Port #3 at PCI: 00:07.2.
867 12:43:00.207167 Sending EOP early from SoC
868 12:43:00.210793 HECI: Sending End-of-Post
869 12:43:00.217460 BS: BS_DEV_INIT_CHIPS run times (exec / console): 185 / 545 ms
870 12:43:00.220618 Enumerating buses...
871 12:43:00.223937 Show all devs... Before device enumeration.
872 12:43:00.227237 Root Device: enabled 1
873 12:43:00.227298 CPU_CLUSTER: 0: enabled 1
874 12:43:00.230692 DOMAIN: 0000: enabled 1
875 12:43:00.233882 GPIO: 0: enabled 1
876 12:43:00.233943 PCI: 00:00.0: enabled 1
877 12:43:00.237608 PCI: 00:01.0: enabled 0
878 12:43:00.240793 PCI: 00:01.1: enabled 0
879 12:43:00.244012 PCI: 00:02.0: enabled 1
880 12:43:00.244069 PCI: 00:04.0: enabled 1
881 12:43:00.247233 PCI: 00:05.0: enabled 0
882 12:43:00.250684 PCI: 00:06.0: enabled 0
883 12:43:00.254023 PCI: 00:06.2: enabled 0
884 12:43:00.254083 PCI: 00:07.0: enabled 1
885 12:43:00.257478 PCI: 00:07.1: enabled 1
886 12:43:00.260742 PCI: 00:07.2: enabled 1
887 12:43:00.264013 PCI: 00:07.3: enabled 0
888 12:43:00.264091 PCI: 00:08.0: enabled 0
889 12:43:00.267465 PCI: 00:09.0: enabled 0
890 12:43:00.270618 PCI: 00:0a.0: enabled 1
891 12:43:00.270694 PCI: 00:0d.0: enabled 1
892 12:43:00.273921 PCI: 00:0d.1: enabled 0
893 12:43:00.277173 PCI: 00:0d.2: enabled 1
894 12:43:00.280493 PCI: 00:0d.3: enabled 1
895 12:43:00.280559 PCI: 00:0e.0: enabled 0
896 12:43:00.283927 PCI: 00:10.0: enabled 0
897 12:43:00.287407 PCI: 00:10.1: enabled 0
898 12:43:00.290562 PCI: 00:10.6: enabled 0
899 12:43:00.290617 PCI: 00:10.7: enabled 0
900 12:43:00.293958 PCI: 00:12.0: enabled 0
901 12:43:00.297254 PCI: 00:12.6: enabled 0
902 12:43:00.297318 PCI: 00:12.7: enabled 0
903 12:43:00.300952 PCI: 00:13.0: enabled 0
904 12:43:00.304023 PCI: 00:14.0: enabled 1
905 12:43:00.307384 PCI: 00:14.1: enabled 0
906 12:43:00.307445 PCI: 00:14.2: enabled 1
907 12:43:00.310711 PCI: 00:14.3: enabled 1
908 12:43:00.314091 PCI: 00:15.0: enabled 1
909 12:43:00.318113 PCI: 00:15.1: enabled 1
910 12:43:00.318168 PCI: 00:15.2: enabled 0
911 12:43:00.320691 PCI: 00:15.3: enabled 0
912 12:43:00.323874 PCI: 00:16.0: enabled 1
913 12:43:00.327252 PCI: 00:16.1: enabled 0
914 12:43:00.327313 PCI: 00:16.2: enabled 0
915 12:43:00.330527 PCI: 00:16.3: enabled 0
916 12:43:00.333966 PCI: 00:16.4: enabled 0
917 12:43:00.337257 PCI: 00:16.5: enabled 0
918 12:43:00.337321 PCI: 00:17.0: enabled 1
919 12:43:00.340738 PCI: 00:19.0: enabled 0
920 12:43:00.343875 PCI: 00:19.1: enabled 0
921 12:43:00.343928 PCI: 00:19.2: enabled 0
922 12:43:00.347312 PCI: 00:1a.0: enabled 0
923 12:43:00.350554 PCI: 00:1c.0: enabled 0
924 12:43:00.354103 PCI: 00:1c.1: enabled 0
925 12:43:00.354178 PCI: 00:1c.2: enabled 0
926 12:43:00.357292 PCI: 00:1c.3: enabled 0
927 12:43:00.360633 PCI: 00:1c.4: enabled 0
928 12:43:00.363699 PCI: 00:1c.5: enabled 1
929 12:43:00.363776 PCI: 00:1c.0: enabled 1
930 12:43:00.367297 PCI: 00:1c.7: enabled 1
931 12:43:00.370717 PCI: 00:1d.0: enabled 0
932 12:43:00.374005 PCI: 00:1d.1: enabled 0
933 12:43:00.374081 PCI: 00:1d.2: enabled 0
934 12:43:00.377089 PCI: 00:1d.0: enabled 1
935 12:43:00.380594 PCI: 00:1e.0: enabled 1
936 12:43:00.380670 PCI: 00:1e.1: enabled 0
937 12:43:00.384149 PCI: 00:1e.2: enabled 0
938 12:43:00.387365 PCI: 00:1e.3: enabled 1
939 12:43:00.390791 PCI: 00:1f.0: enabled 1
940 12:43:00.390867 PCI: 00:1f.1: enabled 0
941 12:43:00.393894 PCI: 00:1f.2: enabled 1
942 12:43:00.444013 PCI: 00:1f.3: enabled 1
943 12:43:00.444095 PCI: 00:1f.4: enabled 1
944 12:43:00.444152 PCI: 00:1f.5: enabled 1
945 12:43:00.444376 PCI: 00:1f.6: enabled 0
946 12:43:00.444430 PCI: 00:1f.7: enabled 0
947 12:43:00.444480 GENERIC: 0.0: enabled 1
948 12:43:00.444530 GENERIC: 0.0: enabled 1
949 12:43:00.444578 GENERIC: 1.0: enabled 1
950 12:43:00.444625 GENERIC: 0.0: enabled 1
951 12:43:00.444670 GENERIC: 1.0: enabled 1
952 12:43:00.444722 USB0 port 0: enabled 1
953 12:43:00.444770 GENERIC: 0.0: enabled 1
954 12:43:00.444816 GENERIC: 0.0: enabled 1
955 12:43:00.444862 USB0 port 0: enabled 1
956 12:43:00.444908 GENERIC: 0.0: enabled 1
957 12:43:00.444954 I2C: 00:1a: enabled 1
958 12:43:00.444998 I2C: 00:50: enabled 1
959 12:43:00.445041 PCI: 00:00.0: enabled 1
960 12:43:00.445093 PCI: 00:00.0: enabled 1
961 12:43:00.445139 GENERIC: 0.0: enabled 1
962 12:43:00.445187 GENERIC: 0.0: enabled 1
963 12:43:00.461279 PNP: 0c09.0: enabled 1
964 12:43:00.461344 GENERIC: 0.0: enabled 1
965 12:43:00.461575 USB3 port 0: enabled 1
966 12:43:00.461628 USB3 port 1: enabled 0
967 12:43:00.461674 USB3 port 2: enabled 1
968 12:43:00.464688 USB3 port 3: enabled 0
969 12:43:00.464741 USB2 port 0: enabled 1
970 12:43:00.464787 USB2 port 1: enabled 0
971 12:43:00.468107 USB2 port 2: enabled 1
972 12:43:00.468163 USB2 port 3: enabled 1
973 12:43:00.471214 USB2 port 4: enabled 1
974 12:43:00.474795 USB2 port 5: enabled 1
975 12:43:00.474853 USB2 port 6: enabled 1
976 12:43:00.478041 USB2 port 7: enabled 1
977 12:43:00.481409 USB2 port 8: enabled 0
978 12:43:00.481461 USB2 port 9: enabled 1
979 12:43:00.484496 USB3 port 0: enabled 1
980 12:43:00.487905 USB3 port 1: enabled 1
981 12:43:00.487960 USB3 port 2: enabled 1
982 12:43:00.491291 USB3 port 3: enabled 1
983 12:43:00.494737 GENERIC: 0.0: enabled 1
984 12:43:00.497999 GENERIC: 1.0: enabled 1
985 12:43:00.498051 APIC: 00: enabled 1
986 12:43:00.501423 APIC: 12: enabled 1
987 12:43:00.504493 APIC: 14: enabled 1
988 12:43:00.504546 APIC: 16: enabled 1
989 12:43:00.507697 APIC: 10: enabled 1
990 12:43:00.507754 Compare with tree...
991 12:43:00.511365 Root Device: enabled 1
992 12:43:00.514332 CPU_CLUSTER: 0: enabled 1
993 12:43:00.517757 APIC: 00: enabled 1
994 12:43:00.517817 APIC: 12: enabled 1
995 12:43:00.521020 APIC: 14: enabled 1
996 12:43:00.524384 APIC: 16: enabled 1
997 12:43:00.524440 APIC: 10: enabled 1
998 12:43:00.527928 DOMAIN: 0000: enabled 1
999 12:43:00.531209 GPIO: 0: enabled 1
1000 12:43:00.531286 PCI: 00:00.0: enabled 1
1001 12:43:00.534483 PCI: 00:01.0: enabled 0
1002 12:43:00.538097 PCI: 00:01.1: enabled 0
1003 12:43:00.541202 PCI: 00:02.0: enabled 1
1004 12:43:00.544678 PCI: 00:04.0: enabled 1
1005 12:43:00.544742 GENERIC: 0.0: enabled 1
1006 12:43:00.547872 PCI: 00:05.0: enabled 0
1007 12:43:00.551074 PCI: 00:06.0: enabled 0
1008 12:43:00.554549 PCI: 00:06.2: enabled 0
1009 12:43:00.557973 PCI: 00:07.0: enabled 1
1010 12:43:00.558034 GENERIC: 0.0: enabled 1
1011 12:43:00.561271 PCI: 00:07.1: enabled 1
1012 12:43:00.564487 GENERIC: 1.0: enabled 1
1013 12:43:00.567893 PCI: 00:07.2: enabled 1
1014 12:43:00.571351 GENERIC: 0.0: enabled 1
1015 12:43:00.571410 PCI: 00:08.0: enabled 0
1016 12:43:00.574442 PCI: 00:09.0: enabled 0
1017 12:43:00.578065 PCI: 00:0a.0: enabled 1
1018 12:43:00.581175 PCI: 00:0d.0: enabled 1
1019 12:43:00.584436 USB0 port 0: enabled 1
1020 12:43:00.584507 USB3 port 0: enabled 1
1021 12:43:00.587954 USB3 port 1: enabled 0
1022 12:43:00.591172 USB3 port 2: enabled 1
1023 12:43:00.594574 USB3 port 3: enabled 0
1024 12:43:00.598074 PCI: 00:0d.1: enabled 0
1025 12:43:00.598138 PCI: 00:0d.2: enabled 1
1026 12:43:00.601336 GENERIC: 0.0: enabled 1
1027 12:43:00.604613 PCI: 00:0d.3: enabled 1
1028 12:43:00.608056 GENERIC: 0.0: enabled 1
1029 12:43:00.611271 PCI: 00:0e.0: enabled 0
1030 12:43:00.611327 PCI: 00:10.0: enabled 0
1031 12:43:00.614536 PCI: 00:10.1: enabled 0
1032 12:43:00.618020 PCI: 00:10.6: enabled 0
1033 12:43:00.621001 PCI: 00:10.7: enabled 0
1034 12:43:00.624632 PCI: 00:12.0: enabled 0
1035 12:43:00.624690 PCI: 00:12.6: enabled 0
1036 12:43:00.628374 PCI: 00:12.7: enabled 0
1037 12:43:00.631248 PCI: 00:13.0: enabled 0
1038 12:43:00.634448 PCI: 00:14.0: enabled 1
1039 12:43:00.638098 USB0 port 0: enabled 1
1040 12:43:00.638155 USB2 port 0: enabled 1
1041 12:43:00.641194 USB2 port 1: enabled 0
1042 12:43:00.644548 USB2 port 2: enabled 1
1043 12:43:00.647887 USB2 port 3: enabled 1
1044 12:43:00.651061 USB2 port 4: enabled 1
1045 12:43:00.654447 USB2 port 5: enabled 1
1046 12:43:00.654511 USB2 port 6: enabled 1
1047 12:43:00.657880 USB2 port 7: enabled 1
1048 12:43:00.661322 USB2 port 8: enabled 0
1049 12:43:00.664374 USB2 port 9: enabled 1
1050 12:43:00.667687 USB3 port 0: enabled 1
1051 12:43:00.667742 USB3 port 1: enabled 1
1052 12:43:00.670839 USB3 port 2: enabled 1
1053 12:43:00.674461 USB3 port 3: enabled 1
1054 12:43:00.677802 PCI: 00:14.1: enabled 0
1055 12:43:00.681049 PCI: 00:14.2: enabled 1
1056 12:43:00.681105 PCI: 00:14.3: enabled 1
1057 12:43:00.684597 GENERIC: 0.0: enabled 1
1058 12:43:00.687642 PCI: 00:15.0: enabled 1
1059 12:43:00.690880 I2C: 00:1a: enabled 1
1060 12:43:00.694264 PCI: 00:15.1: enabled 1
1061 12:43:00.694349 I2C: 00:50: enabled 1
1062 12:43:00.697608 PCI: 00:15.2: enabled 0
1063 12:43:00.700895 PCI: 00:15.3: enabled 0
1064 12:43:00.704429 PCI: 00:16.0: enabled 1
1065 12:43:00.707642 PCI: 00:16.1: enabled 0
1066 12:43:00.707695 PCI: 00:16.2: enabled 0
1067 12:43:00.710928 PCI: 00:16.3: enabled 0
1068 12:43:00.714311 PCI: 00:16.4: enabled 0
1069 12:43:00.717471 PCI: 00:16.5: enabled 0
1070 12:43:00.720912 PCI: 00:17.0: enabled 1
1071 12:43:00.720971 PCI: 00:19.0: enabled 0
1072 12:43:00.724225 PCI: 00:19.1: enabled 0
1073 12:43:00.727390 PCI: 00:19.2: enabled 0
1074 12:43:00.730910 PCI: 00:1a.0: enabled 0
1075 12:43:00.734257 PCI: 00:1c.0: enabled 1
1076 12:43:00.734327 PCI: 00:00.0: enabled 1
1077 12:43:00.737518 PCI: 00:1c.7: enabled 1
1078 12:43:00.740880 GENERIC: 0.0: enabled 1
1079 12:43:00.744168 PCI: 00:1d.0: enabled 1
1080 12:43:00.747705 GENERIC: 0.0: enabled 1
1081 12:43:00.747760 PCI: 00:1e.0: enabled 1
1082 12:43:00.750924 PCI: 00:1e.1: enabled 0
1083 12:43:00.753931 PCI: 00:1e.2: enabled 0
1084 12:43:00.757580 PCI: 00:1e.3: enabled 1
1085 12:43:00.760742 PCI: 00:1f.0: enabled 1
1086 12:43:00.760802 PNP: 0c09.0: enabled 1
1087 12:43:00.763970 PCI: 00:1f.1: enabled 0
1088 12:43:00.767493 PCI: 00:1f.2: enabled 1
1089 12:43:00.770701 GENERIC: 0.0: enabled 1
1090 12:43:00.773894 GENERIC: 0.0: enabled 1
1091 12:43:00.773969 GENERIC: 1.0: enabled 1
1092 12:43:00.777313 PCI: 00:1f.3: enabled 1
1093 12:43:00.780597 PCI: 00:1f.4: enabled 1
1094 12:43:00.784028 PCI: 00:1f.5: enabled 1
1095 12:43:00.787217 PCI: 00:1f.6: enabled 0
1096 12:43:00.787293 PCI: 00:1f.7: enabled 0
1097 12:43:00.790872 Root Device scanning...
1098 12:43:00.793859 scan_static_bus for Root Device
1099 12:43:00.797357 CPU_CLUSTER: 0 enabled
1100 12:43:00.800581 DOMAIN: 0000 enabled
1101 12:43:00.800655 DOMAIN: 0000 scanning...
1102 12:43:00.803949 PCI: pci_scan_bus for bus 00
1103 12:43:00.807204 PCI: 00:00.0 [8086/0000] ops
1104 12:43:00.810626 PCI: 00:00.0 [8086/4619] enabled
1105 12:43:00.813866 PCI: 00:02.0 [8086/0000] bus ops
1106 12:43:00.817124 PCI: 00:02.0 [8086/46b3] enabled
1107 12:43:00.820669 PCI: 00:04.0 [8086/0000] bus ops
1108 12:43:00.823824 PCI: 00:04.0 [8086/461d] enabled
1109 12:43:00.827411 PCI: 00:07.0 subordinate bus PCI Express
1110 12:43:00.830589 PCI: 00:07.0 hot-plug capable
1111 12:43:00.833850 PCI: 00:07.0 [8086/466e] enabled
1112 12:43:00.837055 PCI: 00:07.1 subordinate bus PCI Express
1113 12:43:00.840605 PCI: 00:07.1 hot-plug capable
1114 12:43:00.844007 PCI: 00:07.1 [8086/463f] enabled
1115 12:43:00.850447 PCI: 00:07.2 subordinate bus PCI Express
1116 12:43:00.850523 PCI: 00:07.2 hot-plug capable
1117 12:43:00.853732 PCI: 00:07.2 [8086/462f] enabled
1118 12:43:00.860728 PCI: 00:08.0 [8086/464f] disabled
1119 12:43:00.864006 PCI: 00:0a.0 [8086/467d] enabled
1120 12:43:00.867222 PCI: 00:0d.0 [8086/0000] bus ops
1121 12:43:00.870677 PCI: 00:0d.0 [8086/461e] enabled
1122 12:43:00.873793 PCI: 00:0d.2 [8086/0000] bus ops
1123 12:43:00.877140 PCI: 00:0d.2 [8086/463e] enabled
1124 12:43:00.880585 PCI: 00:0d.3 [8086/0000] bus ops
1125 12:43:00.883921 PCI: 00:0d.3 [8086/466d] enabled
1126 12:43:00.887283 PCI: 00:14.0 [8086/0000] bus ops
1127 12:43:00.890471 PCI: 00:14.0 [8086/51ed] enabled
1128 12:43:00.893917 PCI: 00:14.2 [8086/51ef] enabled
1129 12:43:00.897264 PCI: 00:14.3 [8086/0000] bus ops
1130 12:43:00.900541 PCI: 00:14.3 [8086/51f0] enabled
1131 12:43:00.903915 PCI: 00:15.0 [8086/0000] bus ops
1132 12:43:00.907267 PCI: 00:15.0 [8086/51e8] enabled
1133 12:43:00.910417 PCI: 00:15.1 [8086/0000] bus ops
1134 12:43:00.913744 PCI: 00:15.1 [8086/51e9] enabled
1135 12:43:00.913808 PCI: 00:16.0 [8086/0000] ops
1136 12:43:00.917083 PCI: 00:16.0 [8086/51e0] enabled
1137 12:43:00.923736 PCI: Static device PCI: 00:17.0 not found, disabling it.
1138 12:43:00.927394 PCI: 00:1c.0 [8086/0000] bus ops
1139 12:43:00.930461 PCI: 00:1c.0 [8086/51be] enabled
1140 12:43:00.933820 PCI: 00:1c.7 [8086/0000] bus ops
1141 12:43:00.937187 PCI: 00:1c.7 [8086/51bf] enabled
1142 12:43:00.940382 PCI: 00:1d.0 [8086/0000] bus ops
1143 12:43:00.943739 PCI: 00:1d.0 [8086/51b3] enabled
1144 12:43:00.946981 PCI: 00:1e.0 [8086/0000] ops
1145 12:43:00.950473 PCI: 00:1e.0 [8086/51a8] enabled
1146 12:43:00.953772 PCI: 00:1e.3 [8086/0000] bus ops
1147 12:43:00.957134 PCI: 00:1e.3 [8086/51ab] enabled
1148 12:43:00.960681 PCI: 00:1f.0 [8086/0000] bus ops
1149 12:43:00.963828 PCI: 00:1f.0 [8086/5182] enabled
1150 12:43:00.963892 RTC Init
1151 12:43:00.970508 Set power on after power failure.
1152 12:43:00.970565 Disabling Deep S3
1153 12:43:00.974015 Disabling Deep S3
1154 12:43:00.974070 Disabling Deep S4
1155 12:43:00.977396 Disabling Deep S4
1156 12:43:00.977450 Disabling Deep S5
1157 12:43:00.980540 Disabling Deep S5
1158 12:43:00.983920 PCI: 00:1f.2 [0000/0000] hidden
1159 12:43:00.987272 PCI: 00:1f.3 [8086/0000] bus ops
1160 12:43:00.990703 PCI: 00:1f.3 [8086/51c8] enabled
1161 12:43:00.993958 PCI: 00:1f.4 [8086/0000] bus ops
1162 12:43:00.997345 PCI: 00:1f.4 [8086/51a3] enabled
1163 12:43:01.000489 PCI: 00:1f.5 [8086/0000] bus ops
1164 12:43:01.003879 PCI: 00:1f.5 [8086/51a4] enabled
1165 12:43:01.003937 GPIO: 0 enabled
1166 12:43:01.007204 PCI: Leftover static devices:
1167 12:43:01.010670 PCI: 00:01.0
1168 12:43:01.010722 PCI: 00:01.1
1169 12:43:01.013957 PCI: 00:05.0
1170 12:43:01.014009 PCI: 00:06.0
1171 12:43:01.014054 PCI: 00:06.2
1172 12:43:01.017090 PCI: 00:09.0
1173 12:43:01.017165 PCI: 00:0d.1
1174 12:43:01.020576 PCI: 00:0e.0
1175 12:43:01.020651 PCI: 00:10.0
1176 12:43:01.020702 PCI: 00:10.1
1177 12:43:01.024001 PCI: 00:10.6
1178 12:43:01.024075 PCI: 00:10.7
1179 12:43:01.027306 PCI: 00:12.0
1180 12:43:01.027381 PCI: 00:12.6
1181 12:43:01.027433 PCI: 00:12.7
1182 12:43:01.030428 PCI: 00:13.0
1183 12:43:01.030502 PCI: 00:14.1
1184 12:43:01.033861 PCI: 00:15.2
1185 12:43:01.033936 PCI: 00:15.3
1186 12:43:01.037205 PCI: 00:16.1
1187 12:43:01.037281 PCI: 00:16.2
1188 12:43:01.037333 PCI: 00:16.3
1189 12:43:01.040504 PCI: 00:16.4
1190 12:43:01.040579 PCI: 00:16.5
1191 12:43:01.043914 PCI: 00:17.0
1192 12:43:01.043988 PCI: 00:19.0
1193 12:43:01.044040 PCI: 00:19.1
1194 12:43:01.047085 PCI: 00:19.2
1195 12:43:01.047160 PCI: 00:1a.0
1196 12:43:01.050701 PCI: 00:1e.1
1197 12:43:01.050776 PCI: 00:1e.2
1198 12:43:01.050827 PCI: 00:1f.1
1199 12:43:01.053610 PCI: 00:1f.6
1200 12:43:01.053684 PCI: 00:1f.7
1201 12:43:01.056978 PCI: Check your devicetree.cb.
1202 12:43:01.060425 PCI: 00:02.0 scanning...
1203 12:43:01.063976 scan_generic_bus for PCI: 00:02.0
1204 12:43:01.067001 scan_generic_bus for PCI: 00:02.0 done
1205 12:43:01.073962 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1206 12:43:01.074037 PCI: 00:04.0 scanning...
1207 12:43:01.077325 scan_generic_bus for PCI: 00:04.0
1208 12:43:01.080320 GENERIC: 0.0 enabled
1209 12:43:01.086902 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1210 12:43:01.090442 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1211 12:43:01.093734 PCI: 00:07.0 scanning...
1212 12:43:01.096926 do_pci_scan_bridge for PCI: 00:07.0
1213 12:43:01.100523 PCI: pci_scan_bus for bus 01
1214 12:43:01.103705 GENERIC: 0.0 enabled
1215 12:43:01.106990 scan_bus: bus PCI: 00:07.0 finished in 8 msecs
1216 12:43:01.110345 PCI: 00:07.1 scanning...
1217 12:43:01.113521 do_pci_scan_bridge for PCI: 00:07.1
1218 12:43:01.117031 PCI: pci_scan_bus for bus 2c
1219 12:43:01.117106 GENERIC: 1.0 enabled
1220 12:43:01.124150 scan_bus: bus PCI: 00:07.1 finished in 8 msecs
1221 12:43:01.127219 PCI: 00:07.2 scanning...
1222 12:43:01.130377 do_pci_scan_bridge for PCI: 00:07.2
1223 12:43:01.133660 PCI: pci_scan_bus for bus 57
1224 12:43:01.133734 GENERIC: 0.0 enabled
1225 12:43:01.140244 scan_bus: bus PCI: 00:07.2 finished in 8 msecs
1226 12:43:01.140319 PCI: 00:0d.0 scanning...
1227 12:43:01.143843 scan_static_bus for PCI: 00:0d.0
1228 12:43:01.146911 USB0 port 0 enabled
1229 12:43:01.150323 USB0 port 0 scanning...
1230 12:43:01.153365 scan_static_bus for USB0 port 0
1231 12:43:01.153442 USB3 port 0 enabled
1232 12:43:01.156869 USB3 port 1 disabled
1233 12:43:01.160070 USB3 port 2 enabled
1234 12:43:01.160125 USB3 port 3 disabled
1235 12:43:01.163423 USB3 port 0 scanning...
1236 12:43:01.166772 scan_static_bus for USB3 port 0
1237 12:43:01.170271 scan_static_bus for USB3 port 0 done
1238 12:43:01.176975 scan_bus: bus USB3 port 0 finished in 6 msecs
1239 12:43:01.177052 USB3 port 2 scanning...
1240 12:43:01.180310 scan_static_bus for USB3 port 2
1241 12:43:01.183355 scan_static_bus for USB3 port 2 done
1242 12:43:01.189970 scan_bus: bus USB3 port 2 finished in 6 msecs
1243 12:43:01.193331 scan_static_bus for USB0 port 0 done
1244 12:43:01.196716 scan_bus: bus USB0 port 0 finished in 43 msecs
1245 12:43:01.199895 scan_static_bus for PCI: 00:0d.0 done
1246 12:43:01.206447 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1247 12:43:01.209809 PCI: 00:0d.2 scanning...
1248 12:43:01.213335 scan_generic_bus for PCI: 00:0d.2
1249 12:43:01.213418 GENERIC: 0.0 enabled
1250 12:43:01.219903 bus: PCI: 00:0d.2[0]->scan_generic_bus for PCI: 00:0d.2 done
1251 12:43:01.226548 scan_bus: bus PCI: 00:0d.2 finished in 11 msecs
1252 12:43:01.226623 PCI: 00:0d.3 scanning...
1253 12:43:01.229810 scan_generic_bus for PCI: 00:0d.3
1254 12:43:01.233185 GENERIC: 0.0 enabled
1255 12:43:01.239709 bus: PCI: 00:0d.3[0]->scan_generic_bus for PCI: 00:0d.3 done
1256 12:43:01.243160 scan_bus: bus PCI: 00:0d.3 finished in 11 msecs
1257 12:43:01.246390 PCI: 00:14.0 scanning...
1258 12:43:01.249721 scan_static_bus for PCI: 00:14.0
1259 12:43:01.252923 USB0 port 0 enabled
1260 12:43:01.252997 USB0 port 0 scanning...
1261 12:43:01.256258 scan_static_bus for USB0 port 0
1262 12:43:01.259842 USB2 port 0 enabled
1263 12:43:01.262875 USB2 port 1 disabled
1264 12:43:01.262949 USB2 port 2 enabled
1265 12:43:01.266208 USB2 port 3 enabled
1266 12:43:01.269613 USB2 port 4 enabled
1267 12:43:01.269688 USB2 port 5 enabled
1268 12:43:01.272841 USB2 port 6 enabled
1269 12:43:01.272917 USB2 port 7 enabled
1270 12:43:01.276255 USB2 port 8 disabled
1271 12:43:01.279685 USB2 port 9 enabled
1272 12:43:01.279754 USB3 port 0 enabled
1273 12:43:01.282861 USB3 port 1 enabled
1274 12:43:01.282921 USB3 port 2 enabled
1275 12:43:01.286267 USB3 port 3 enabled
1276 12:43:01.289590 USB2 port 0 scanning...
1277 12:43:01.292912 scan_static_bus for USB2 port 0
1278 12:43:01.296074 scan_static_bus for USB2 port 0 done
1279 12:43:01.299663 scan_bus: bus USB2 port 0 finished in 6 msecs
1280 12:43:01.302779 USB2 port 2 scanning...
1281 12:43:01.306297 scan_static_bus for USB2 port 2
1282 12:43:01.309519 scan_static_bus for USB2 port 2 done
1283 12:43:01.312757 scan_bus: bus USB2 port 2 finished in 6 msecs
1284 12:43:01.316339 USB2 port 3 scanning...
1285 12:43:01.319608 scan_static_bus for USB2 port 3
1286 12:43:01.322829 scan_static_bus for USB2 port 3 done
1287 12:43:01.329450 scan_bus: bus USB2 port 3 finished in 6 msecs
1288 12:43:01.329517 USB2 port 4 scanning...
1289 12:43:01.332727 scan_static_bus for USB2 port 4
1290 12:43:01.339268 scan_static_bus for USB2 port 4 done
1291 12:43:01.342863 scan_bus: bus USB2 port 4 finished in 6 msecs
1292 12:43:01.346164 USB2 port 5 scanning...
1293 12:43:01.349229 scan_static_bus for USB2 port 5
1294 12:43:01.353051 scan_static_bus for USB2 port 5 done
1295 12:43:01.356135 scan_bus: bus USB2 port 5 finished in 6 msecs
1296 12:43:01.359269 USB2 port 6 scanning...
1297 12:43:01.362668 scan_static_bus for USB2 port 6
1298 12:43:01.366069 scan_static_bus for USB2 port 6 done
1299 12:43:01.369373 scan_bus: bus USB2 port 6 finished in 6 msecs
1300 12:43:01.372750 USB2 port 7 scanning...
1301 12:43:01.376002 scan_static_bus for USB2 port 7
1302 12:43:01.379382 scan_static_bus for USB2 port 7 done
1303 12:43:01.382803 scan_bus: bus USB2 port 7 finished in 6 msecs
1304 12:43:01.386058 USB2 port 9 scanning...
1305 12:43:01.389300 scan_static_bus for USB2 port 9
1306 12:43:01.392911 scan_static_bus for USB2 port 9 done
1307 12:43:01.399399 scan_bus: bus USB2 port 9 finished in 6 msecs
1308 12:43:01.399474 USB3 port 0 scanning...
1309 12:43:01.402591 scan_static_bus for USB3 port 0
1310 12:43:01.406192 scan_static_bus for USB3 port 0 done
1311 12:43:01.412769 scan_bus: bus USB3 port 0 finished in 6 msecs
1312 12:43:01.416004 USB3 port 1 scanning...
1313 12:43:01.419475 scan_static_bus for USB3 port 1
1314 12:43:01.422703 scan_static_bus for USB3 port 1 done
1315 12:43:01.425992 scan_bus: bus USB3 port 1 finished in 6 msecs
1316 12:43:01.429314 USB3 port 2 scanning...
1317 12:43:01.432555 scan_static_bus for USB3 port 2
1318 12:43:01.436010 scan_static_bus for USB3 port 2 done
1319 12:43:01.439458 scan_bus: bus USB3 port 2 finished in 6 msecs
1320 12:43:01.442972 USB3 port 3 scanning...
1321 12:43:01.445875 scan_static_bus for USB3 port 3
1322 12:43:01.449378 scan_static_bus for USB3 port 3 done
1323 12:43:01.452754 scan_bus: bus USB3 port 3 finished in 6 msecs
1324 12:43:01.459330 scan_static_bus for USB0 port 0 done
1325 12:43:01.462703 scan_bus: bus USB0 port 0 finished in 203 msecs
1326 12:43:01.465948 scan_static_bus for PCI: 00:14.0 done
1327 12:43:01.473255 scan_bus: bus PCI: 00:14.0 finished in 219 msecs
1328 12:43:01.473313 PCI: 00:14.3 scanning...
1329 12:43:01.475844 scan_static_bus for PCI: 00:14.3
1330 12:43:01.479253 GENERIC: 0.0 enabled
1331 12:43:01.482438 scan_static_bus for PCI: 00:14.3 done
1332 12:43:01.489001 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1333 12:43:01.489058 PCI: 00:15.0 scanning...
1334 12:43:01.492548 scan_static_bus for PCI: 00:15.0
1335 12:43:01.495798 I2C: 00:1a enabled
1336 12:43:01.499020 scan_static_bus for PCI: 00:15.0 done
1337 12:43:01.502391 scan_bus: bus PCI: 00:15.0 finished in 9 msecs
1338 12:43:01.505822 PCI: 00:15.1 scanning...
1339 12:43:01.509152 scan_static_bus for PCI: 00:15.1
1340 12:43:01.512258 I2C: 00:50 enabled
1341 12:43:01.515670 scan_static_bus for PCI: 00:15.1 done
1342 12:43:01.519004 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1343 12:43:01.522382 PCI: 00:1c.0 scanning...
1344 12:43:01.525593 do_pci_scan_bridge for PCI: 00:1c.0
1345 12:43:01.528950 PCI: pci_scan_bus for bus 82
1346 12:43:01.532558 PCI: 82:00.0 [10ec/0000] ops
1347 12:43:01.535579 PCI: 82:00.0 [10ec/8168] enabled
1348 12:43:01.539241 Enabling Common Clock Configuration
1349 12:43:01.542317 L1 Sub-State supported from root port 28
1350 12:43:01.545732 L1 Sub-State Support = 0xf
1351 12:43:01.549195 CommonModeRestoreTime = 0x96
1352 12:43:01.552545 Power On Value = 0xf, Power On Scale = 0x1
1353 12:43:01.555763 ASPM: Enabled L1
1354 12:43:01.558936 PCIe: Max_Payload_Size adjusted to 128
1355 12:43:01.562414 PCI: 82:00.0: Enabled LTR
1356 12:43:01.565555 PCI: 82:00.0: Programmed LTR max latencies
1357 12:43:01.572265 scan_bus: bus PCI: 00:1c.0 finished in 43 msecs
1358 12:43:01.572341 PCI: 00:1c.7 scanning...
1359 12:43:01.575590 do_pci_scan_bridge for PCI: 00:1c.7
1360 12:43:01.579134 PCI: pci_scan_bus for bus 83
1361 12:43:01.582306 PCI: 83:00.0 [17a0/9755] enabled
1362 12:43:01.585656 GENERIC: 0.0 enabled
1363 12:43:01.589096 Enabling Common Clock Configuration
1364 12:43:01.592381 L1 Sub-State supported from root port 28
1365 12:43:01.595677 L1 Sub-State Support = 0xf
1366 12:43:01.599047 CommonModeRestoreTime = 0xff
1367 12:43:01.602223 Power On Value = 0x1f, Power On Scale = 0x2
1368 12:43:01.605805 ASPM: Enabled L0s and L1
1369 12:43:01.609004 PCIe: Max_Payload_Size adjusted to 128
1370 12:43:01.612547 PCI: 83:00.0: Enabled LTR
1371 12:43:01.615785 PCI: 83:00.0: Programmed LTR max latencies
1372 12:43:01.622316 scan_bus: bus PCI: 00:1c.7 finished in 43 msecs
1373 12:43:01.625598 PCI: 00:1d.0 scanning...
1374 12:43:01.629038 do_pci_scan_bridge for PCI: 00:1d.0
1375 12:43:01.632210 PCI: pci_scan_bus for bus 84
1376 12:43:01.635459 PCI: 84:00.0 [1217/8760] enabled
1377 12:43:01.635534 GENERIC: 0.0 enabled
1378 12:43:01.638914 L1 Sub-State supported from root port 29
1379 12:43:01.642369 L1 Sub-State Support = 0xa
1380 12:43:01.645564 CommonModeRestoreTime = 0x78
1381 12:43:01.652329 Power On Value = 0x16, Power On Scale = 0x0
1382 12:43:01.652404 ASPM: Enabled L1
1383 12:43:01.655616 PCIe: Max_Payload_Size adjusted to 128
1384 12:43:01.659018 PCI: 84:00.0: Enabled LTR
1385 12:43:01.662298 PCI: 84:00.0: Programmed LTR max latencies
1386 12:43:01.668912 scan_bus: bus PCI: 00:1d.0 finished in 38 msecs
1387 12:43:01.668987 PCI: 00:1e.3 scanning...
1388 12:43:01.675559 scan_generic_bus for PCI: 00:1e.3
1389 12:43:01.678991 scan_generic_bus for PCI: 00:1e.3 done
1390 12:43:01.682301 scan_bus: bus PCI: 00:1e.3 finished in 7 msecs
1391 12:43:01.685472 PCI: 00:1f.0 scanning...
1392 12:43:01.689442 scan_static_bus for PCI: 00:1f.0
1393 12:43:01.689517 PNP: 0c09.0 enabled
1394 12:43:01.692040 PNP: 0c09.0 scanning...
1395 12:43:01.695581 scan_static_bus for PNP: 0c09.0
1396 12:43:01.698837 scan_static_bus for PNP: 0c09.0 done
1397 12:43:01.705513 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1398 12:43:01.708915 scan_static_bus for PCI: 00:1f.0 done
1399 12:43:01.712276 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1400 12:43:01.715491 PCI: 00:1f.2 scanning...
1401 12:43:01.718870 scan_static_bus for PCI: 00:1f.2
1402 12:43:01.722263 GENERIC: 0.0 enabled
1403 12:43:01.722315 GENERIC: 0.0 scanning...
1404 12:43:01.725629 scan_static_bus for GENERIC: 0.0
1405 12:43:01.728797 GENERIC: 0.0 enabled
1406 12:43:01.732262 GENERIC: 1.0 enabled
1407 12:43:01.735557 scan_static_bus for GENERIC: 0.0 done
1408 12:43:01.739047 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1409 12:43:01.742281 scan_static_bus for PCI: 00:1f.2 done
1410 12:43:01.748956 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1411 12:43:01.752464 PCI: 00:1f.3 scanning...
1412 12:43:01.755654 scan_static_bus for PCI: 00:1f.3
1413 12:43:01.758895 scan_static_bus for PCI: 00:1f.3 done
1414 12:43:01.762709 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1415 12:43:01.765341 PCI: 00:1f.4 scanning...
1416 12:43:01.768757 scan_generic_bus for PCI: 00:1f.4
1417 12:43:01.772271 scan_generic_bus for PCI: 00:1f.4 done
1418 12:43:01.778726 scan_bus: bus PCI: 00:1f.4 finished in 7 msecs
1419 12:43:01.778796 PCI: 00:1f.5 scanning...
1420 12:43:01.782417 scan_generic_bus for PCI: 00:1f.5
1421 12:43:01.785736 scan_generic_bus for PCI: 00:1f.5 done
1422 12:43:01.792206 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1423 12:43:01.795651 scan_bus: bus DOMAIN: 0000 finished in 990 msecs
1424 12:43:01.798847 scan_static_bus for Root Device done
1425 12:43:01.805795 scan_bus: bus Root Device finished in 1009 msecs
1426 12:43:01.805853 done
1427 12:43:01.812228 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1586 ms
1428 12:43:01.818968 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1429 12:43:01.825589 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1430 12:43:01.828847 SPI flash protection: WPSW=0 SRP0=1
1431 12:43:01.832025 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1432 12:43:01.838830 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1433 12:43:01.842024 found VGA at PCI: 00:02.0
1434 12:43:01.845396 Setting up VGA for PCI: 00:02.0
1435 12:43:01.849059 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1436 12:43:01.855663 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1437 12:43:01.855743 Allocating resources...
1438 12:43:01.858706 Reading resources...
1439 12:43:01.862271 Root Device read_resources bus 0 link: 0
1440 12:43:01.869469 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1441 12:43:01.872193 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1442 12:43:01.875550 DOMAIN: 0000 read_resources bus 0 link: 0
1443 12:43:01.882203 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1444 12:43:01.888829 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1445 12:43:01.895562 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1446 12:43:01.902287 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1447 12:43:01.908837 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1448 12:43:01.915298 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1449 12:43:01.918780 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1450 12:43:01.925259 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1451 12:43:01.932084 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1452 12:43:01.938976 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1453 12:43:01.945305 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1454 12:43:01.951925 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1455 12:43:01.958523 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1456 12:43:01.965255 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1457 12:43:01.972321 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1458 12:43:01.978664 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1459 12:43:01.985599 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1460 12:43:01.991776 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1461 12:43:01.995192 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1462 12:43:02.001615 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1463 12:43:02.008363 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1464 12:43:02.011693 PCI: 00:04.0 read_resources bus 1 link: 0
1465 12:43:02.018333 PCI: 00:04.0 read_resources bus 1 link: 0 done
1466 12:43:02.021488 PCI: 00:07.0 read_resources bus 1 link: 0
1467 12:43:02.028522 PCI: 00:07.0 read_resources bus 1 link: 0 done
1468 12:43:02.031641 PCI: 00:07.1 read_resources bus 44 link: 0
1469 12:43:02.035003 PCI: 00:07.1 read_resources bus 44 link: 0 done
1470 12:43:02.041536 PCI: 00:07.2 read_resources bus 87 link: 0
1471 12:43:02.045222 PCI: 00:07.2 read_resources bus 87 link: 0 done
1472 12:43:02.048265 PCI: 00:0d.0 read_resources bus 0 link: 0
1473 12:43:02.054802 USB0 port 0 read_resources bus 0 link: 0
1474 12:43:02.058393 USB0 port 0 read_resources bus 0 link: 0 done
1475 12:43:02.061478 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1476 12:43:02.068277 PCI: 00:0d.2 read_resources bus 2 link: 0
1477 12:43:02.071584 PCI: 00:0d.2 read_resources bus 2 link: 0 done
1478 12:43:02.074820 PCI: 00:0d.3 read_resources bus 3 link: 0
1479 12:43:02.081139 PCI: 00:0d.3 read_resources bus 3 link: 0 done
1480 12:43:02.084537 PCI: 00:14.0 read_resources bus 0 link: 0
1481 12:43:02.088062 USB0 port 0 read_resources bus 0 link: 0
1482 12:43:02.094591 USB0 port 0 read_resources bus 0 link: 0 done
1483 12:43:02.098138 PCI: 00:14.0 read_resources bus 0 link: 0 done
1484 12:43:02.101926 PCI: 00:14.3 read_resources bus 0 link: 0
1485 12:43:02.108135 PCI: 00:14.3 read_resources bus 0 link: 0 done
1486 12:43:02.111263 PCI: 00:15.0 read_resources bus 0 link: 0
1487 12:43:02.114669 PCI: 00:15.0 read_resources bus 0 link: 0 done
1488 12:43:02.121369 PCI: 00:15.1 read_resources bus 0 link: 0
1489 12:43:02.124655 PCI: 00:15.1 read_resources bus 0 link: 0 done
1490 12:43:02.131458 PCI: 00:1c.0 read_resources bus 130 link: 0
1491 12:43:02.134575 PCI: 00:1c.0 read_resources bus 130 link: 0 done
1492 12:43:02.137896 PCI: 00:1c.7 read_resources bus 131 link: 0
1493 12:43:02.144825 PCI: 00:1c.7 read_resources bus 131 link: 0 done
1494 12:43:02.148373 PCI: 00:1d.0 read_resources bus 132 link: 0
1495 12:43:02.155002 PCI: 00:1d.0 read_resources bus 132 link: 0 done
1496 12:43:02.158179 PCI: 00:1f.0 read_resources bus 0 link: 0
1497 12:43:02.164942 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1498 12:43:02.168337 PCI: 00:1f.2 read_resources bus 0 link: 0
1499 12:43:02.171447 GENERIC: 0.0 read_resources bus 0 link: 0
1500 12:43:02.174664 GENERIC: 0.0 read_resources bus 0 link: 0 done
1501 12:43:02.181591 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1502 12:43:02.185052 DOMAIN: 0000 read_resources bus 0 link: 0 done
1503 12:43:02.191367 Root Device read_resources bus 0 link: 0 done
1504 12:43:02.194648 Done reading resources.
1505 12:43:02.197896 Show resources in subtree (Root Device)...After reading.
1506 12:43:02.204673 Root Device child on link 0 CPU_CLUSTER: 0
1507 12:43:02.207884 CPU_CLUSTER: 0 child on link 0 APIC: 00
1508 12:43:02.207950 APIC: 00
1509 12:43:02.211323 APIC: 12
1510 12:43:02.211404 APIC: 14
1511 12:43:02.211461 APIC: 16
1512 12:43:02.214643 APIC: 10
1513 12:43:02.217907 DOMAIN: 0000 child on link 0 GPIO: 0
1514 12:43:02.228205 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1515 12:43:02.238028 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1516 12:43:02.238103 GPIO: 0
1517 12:43:02.241414 PCI: 00:00.0
1518 12:43:02.247908 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1519 12:43:02.258181 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1520 12:43:02.267824 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1521 12:43:02.277686 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1522 12:43:02.287800 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1523 12:43:02.294540 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1524 12:43:02.304588 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1525 12:43:02.314383 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1526 12:43:02.324671 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1527 12:43:02.334547 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1528 12:43:02.344331 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1529 12:43:02.354227 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1530 12:43:02.361144 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1531 12:43:02.371365 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1532 12:43:02.381239 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1533 12:43:02.391183 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1534 12:43:02.401358 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1535 12:43:02.410936 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1536 12:43:02.421138 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1537 12:43:02.427775 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1538 12:43:02.437660 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1539 12:43:02.447700 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1540 12:43:02.457874 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1541 12:43:02.467721 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1542 12:43:02.477734 PCI: 00:00.0 resource base 100000000 size 7fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1543 12:43:02.487641 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1544 12:43:02.494380 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1545 12:43:02.504174 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1546 12:43:02.507684 PCI: 00:02.0
1547 12:43:02.517407 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1548 12:43:02.527532 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1549 12:43:02.534438 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1550 12:43:02.540969 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1551 12:43:02.550887 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1552 12:43:02.550961 GENERIC: 0.0
1553 12:43:02.557426 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1554 12:43:02.564219 PCI: 00:07.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1555 12:43:02.574218 PCI: 00:07.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1556 12:43:02.584019 PCI: 00:07.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1557 12:43:02.587267 GENERIC: 0.0
1558 12:43:02.587345 NONE
1559 12:43:02.597325 NONE resource base 0 size c200000 align 12 gran 12 limit ffffffff flags 200 index 10
1560 12:43:02.607314 NONE resource base 0 size 1c000000 align 12 gran 12 limit ffffffffffffffff flags 101200 index 14
1561 12:43:02.614054 NONE resource base 0 size 2000 align 12 gran 12 limit ffff flags 100 index 18
1562 12:43:02.617137 PCI: 00:07.1 child on link 0 GENERIC: 1.0
1563 12:43:02.627204 PCI: 00:07.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1564 12:43:02.637163 PCI: 00:07.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1565 12:43:02.647319 PCI: 00:07.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1566 12:43:02.647393 GENERIC: 1.0
1567 12:43:02.647444 NONE
1568 12:43:02.657096 NONE resource base 0 size c200000 align 12 gran 12 limit ffffffff flags 200 index 10
1569 12:43:02.667150 NONE resource base 0 size 1c000000 align 12 gran 12 limit ffffffffffffffff flags 101200 index 14
1570 12:43:02.674002 NONE resource base 0 size 2000 align 12 gran 12 limit ffff flags 100 index 18
1571 12:43:02.680447 PCI: 00:07.2 child on link 0 GENERIC: 0.0
1572 12:43:02.687392 PCI: 00:07.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1573 12:43:02.697130 PCI: 00:07.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1574 12:43:02.707246 PCI: 00:07.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1575 12:43:02.710683 GENERIC: 0.0
1576 12:43:02.710755 NONE
1577 12:43:02.720553 NONE resource base 0 size c200000 align 12 gran 12 limit ffffffff flags 200 index 10
1578 12:43:02.730273 NONE resource base 0 size 1c000000 align 12 gran 12 limit ffffffffffffffff flags 101200 index 14
1579 12:43:02.737065 NONE resource base 0 size 2000 align 12 gran 12 limit ffff flags 100 index 18
1580 12:43:02.740321 PCI: 00:08.0
1581 12:43:02.740400 PCI: 00:0a.0
1582 12:43:02.750478 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1583 12:43:02.753976 PCI: 00:0d.0 child on link 0 USB0 port 0
1584 12:43:02.763858 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1585 12:43:02.770517 USB0 port 0 child on link 0 USB3 port 0
1586 12:43:02.770579 USB3 port 0
1587 12:43:02.773912 USB3 port 1
1588 12:43:02.773967 USB3 port 2
1589 12:43:02.776959 USB3 port 3
1590 12:43:02.780514 PCI: 00:0d.2 child on link 0 GENERIC: 0.0
1591 12:43:02.790562 PCI: 00:0d.2 resource base 0 size 40000 align 18 gran 18 limit ffffffffffffffff flags 201 index 10
1592 12:43:02.800466 PCI: 00:0d.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1593 12:43:02.803742 GENERIC: 0.0
1594 12:43:02.807263 PCI: 00:0d.3 child on link 0 GENERIC: 0.0
1595 12:43:02.816789 PCI: 00:0d.3 resource base 0 size 40000 align 18 gran 18 limit ffffffffffffffff flags 201 index 10
1596 12:43:02.826978 PCI: 00:0d.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1597 12:43:02.830267 GENERIC: 0.0
1598 12:43:02.833532 PCI: 00:14.0 child on link 0 USB0 port 0
1599 12:43:02.843537 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1600 12:43:02.846914 USB0 port 0 child on link 0 USB2 port 0
1601 12:43:02.850042 USB2 port 0
1602 12:43:02.850097 USB2 port 1
1603 12:43:02.853496 USB2 port 2
1604 12:43:02.853551 USB2 port 3
1605 12:43:02.856907 USB2 port 4
1606 12:43:02.856960 USB2 port 5
1607 12:43:02.860028 USB2 port 6
1608 12:43:02.863599 USB2 port 7
1609 12:43:02.863653 USB2 port 8
1610 12:43:02.866790 USB2 port 9
1611 12:43:02.866852 USB3 port 0
1612 12:43:02.870138 USB3 port 1
1613 12:43:02.870191 USB3 port 2
1614 12:43:02.873565 USB3 port 3
1615 12:43:02.873618 PCI: 00:14.2
1616 12:43:02.883285 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1617 12:43:02.893263 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1618 12:43:02.900017 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1619 12:43:02.909797 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1620 12:43:02.909854 GENERIC: 0.0
1621 12:43:02.913256 PCI: 00:15.0 child on link 0 I2C: 00:1a
1622 12:43:02.923004 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1623 12:43:02.926701 I2C: 00:1a
1624 12:43:02.929799 PCI: 00:15.1 child on link 0 I2C: 00:50
1625 12:43:02.939828 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1626 12:43:02.942879 I2C: 00:50
1627 12:43:02.942938 PCI: 00:16.0
1628 12:43:02.952724 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1629 12:43:02.959549 PCI: 00:1c.0 child on link 0 PCI: 82:00.0
1630 12:43:02.966108 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1631 12:43:02.976043 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1632 12:43:02.986022 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1633 12:43:02.986098 PCI: 82:00.0
1634 12:43:02.995753 PCI: 82:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
1635 12:43:03.005929 PCI: 82:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1636 12:43:03.015777 PCI: 82:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 20
1637 12:43:03.019069 PCI: 00:1c.7 child on link 0 GENERIC: 0.0
1638 12:43:03.029128 PCI: 00:1c.7 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1639 12:43:03.038965 PCI: 00:1c.7 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1640 12:43:03.049079 PCI: 00:1c.7 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1641 12:43:03.049141 GENERIC: 0.0
1642 12:43:03.052135 PCI: 83:00.0
1643 12:43:03.062188 PCI: 83:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1644 12:43:03.065640 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1645 12:43:03.075464 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1646 12:43:03.085512 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1647 12:43:03.092275 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1648 12:43:03.095296 GENERIC: 0.0
1649 12:43:03.095356 PCI: 84:00.0
1650 12:43:03.105460 PCI: 84:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1651 12:43:03.108782 PCI: 00:1e.0
1652 12:43:03.118551 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1653 12:43:03.122105 PCI: 00:1e.3
1654 12:43:03.131946 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1655 12:43:03.135199 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1656 12:43:03.145166 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1657 12:43:03.145226 PNP: 0c09.0
1658 12:43:03.154966 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1659 12:43:03.158259 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1660 12:43:03.168424 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1661 12:43:03.178074 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1662 12:43:03.181379 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1663 12:43:03.184834 GENERIC: 0.0
1664 12:43:03.184895 GENERIC: 1.0
1665 12:43:03.188146 PCI: 00:1f.3
1666 12:43:03.198117 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1667 12:43:03.207955 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1668 12:43:03.208023 PCI: 00:1f.4
1669 12:43:03.217766 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1670 12:43:03.227975 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1671 12:43:03.231171 PCI: 00:1f.5
1672 12:43:03.237818 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1673 12:43:03.247764 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1674 12:43:03.251287 PCI: 00:07.0 io: size: 0 align: 12 gran: 12 limit: ffff
1675 12:43:03.254332 NONE 18 * [0x0 - 0x1fff] io
1676 12:43:03.261178 PCI: 00:07.0 io: size: 2000 align: 12 gran: 12 limit: ffff done
1677 12:43:03.267668 PCI: 00:07.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1678 12:43:03.270807 NONE 10 * [0x0 - 0xc1fffff] mem
1679 12:43:03.277476 PCI: 00:07.0 mem: size: c200000 align: 20 gran: 20 limit: ffffffff done
1680 12:43:03.287602 PCI: 00:07.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1681 12:43:03.290818 NONE 14 * [0x0 - 0x1bffffff] prefmem
1682 12:43:03.297519 PCI: 00:07.0 prefmem: size: 1c000000 align: 20 gran: 20 limit: ffffffffffffffff done
1683 12:43:03.304033 PCI: 00:07.1 io: size: 0 align: 12 gran: 12 limit: ffff
1684 12:43:03.307284 NONE 18 * [0x0 - 0x1fff] io
1685 12:43:03.313875 PCI: 00:07.1 io: size: 2000 align: 12 gran: 12 limit: ffff done
1686 12:43:03.320471 PCI: 00:07.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1687 12:43:03.323848 NONE 10 * [0x0 - 0xc1fffff] mem
1688 12:43:03.330595 PCI: 00:07.1 mem: size: c200000 align: 20 gran: 20 limit: ffffffff done
1689 12:43:03.337316 PCI: 00:07.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1690 12:43:03.340440 NONE 14 * [0x0 - 0x1bffffff] prefmem
1691 12:43:03.350466 PCI: 00:07.1 prefmem: size: 1c000000 align: 20 gran: 20 limit: ffffffffffffffff done
1692 12:43:03.357130 PCI: 00:07.2 io: size: 0 align: 12 gran: 12 limit: ffff
1693 12:43:03.360549 NONE 18 * [0x0 - 0x1fff] io
1694 12:43:03.367150 PCI: 00:07.2 io: size: 2000 align: 12 gran: 12 limit: ffff done
1695 12:43:03.370495 PCI: 00:07.2 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1696 12:43:03.373900 NONE 10 * [0x0 - 0xc1fffff] mem
1697 12:43:03.383626 PCI: 00:07.2 mem: size: c200000 align: 20 gran: 20 limit: ffffffff done
1698 12:43:03.390516 PCI: 00:07.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1699 12:43:03.393902 NONE 14 * [0x0 - 0x1bffffff] prefmem
1700 12:43:03.403742 PCI: 00:07.2 prefmem: size: 1c000000 align: 20 gran: 20 limit: ffffffffffffffff done
1701 12:43:03.407157 PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff
1702 12:43:03.410366 PCI: 82:00.0 10 * [0x0 - 0xff] io
1703 12:43:03.416890 PCI: 00:1c.0 io: size: 1000 align: 12 gran: 12 limit: ffff done
1704 12:43:03.423800 PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1705 12:43:03.426901 PCI: 82:00.0 20 * [0x0 - 0x3fff] mem
1706 12:43:03.433605 PCI: 82:00.0 18 * [0x4000 - 0x4fff] mem
1707 12:43:03.440003 PCI: 00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1708 12:43:03.446703 PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1709 12:43:03.453596 PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1710 12:43:03.460188 PCI: 00:1c.7 io: size: 0 align: 12 gran: 12 limit: ffff
1711 12:43:03.466626 PCI: 00:1c.7 io: size: 0 align: 12 gran: 12 limit: ffff done
1712 12:43:03.473283 PCI: 00:1c.7 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1713 12:43:03.476590 PCI: 83:00.0 10 * [0x0 - 0xfff] mem
1714 12:43:03.483231 PCI: 00:1c.7 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1715 12:43:03.490529 PCI: 00:1c.7 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1716 12:43:03.499917 PCI: 00:1c.7 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1717 12:43:03.503449 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1718 12:43:03.509909 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1719 12:43:03.516522 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1720 12:43:03.519829 PCI: 84:00.0 10 * [0x0 - 0x3fff] mem
1721 12:43:03.526765 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1722 12:43:03.536505 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1723 12:43:03.542973 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1724 12:43:03.549860 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1725 12:43:03.556346 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1726 12:43:03.562852 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1727 12:43:03.573079 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1728 12:43:03.579883 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1729 12:43:03.586411 update_constraints: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1730 12:43:03.589530 DOMAIN: 0000: Resource ranges:
1731 12:43:03.592951 * Base: 1000, Size: 800, Tag: 100
1732 12:43:03.596379 * Base: 1900, Size: d6a0, Tag: 100
1733 12:43:03.599670 * Base: efc0, Size: 1040, Tag: 100
1734 12:43:03.606455 PCI: 00:07.0 1c * [0x2000 - 0x3fff] limit: 3fff io
1735 12:43:03.609626 PCI: 00:07.1 1c * [0x4000 - 0x5fff] limit: 5fff io
1736 12:43:03.616411 PCI: 00:07.2 1c * [0x6000 - 0x7fff] limit: 7fff io
1737 12:43:03.623171 PCI: 00:1c.0 1c * [0x8000 - 0x8fff] limit: 8fff io
1738 12:43:03.626301 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1739 12:43:03.633210 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1740 12:43:03.639628 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1741 12:43:03.649765 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1742 12:43:03.656481 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1743 12:43:03.663115 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1744 12:43:03.672973 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1745 12:43:03.679653 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1746 12:43:03.686378 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1747 12:43:03.696441 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1748 12:43:03.703026 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1749 12:43:03.709448 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1750 12:43:03.716347 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1751 12:43:03.726191 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1752 12:43:03.732752 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1753 12:43:03.739441 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1754 12:43:03.749595 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1755 12:43:03.756315 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1756 12:43:03.762811 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1757 12:43:03.772697 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1758 12:43:03.779208 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1759 12:43:03.786150 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1760 12:43:03.795691 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1761 12:43:03.802381 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1762 12:43:03.809289 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1763 12:43:03.818929 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1764 12:43:03.825547 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1765 12:43:03.832303 update_constraints: PCI: 00:00.0 18 base 100000000 limit 17fbfffff mem (fixed)
1766 12:43:03.842194 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1767 12:43:03.848896 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1768 12:43:03.855671 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1769 12:43:03.865439 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1770 12:43:03.872049 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1771 12:43:03.875328 DOMAIN: 0000: Resource ranges:
1772 12:43:03.878838 * Base: 80400000, Size: 3fc00000, Tag: 200
1773 12:43:03.885639 * Base: d0000000, Size: 28000000, Tag: 200
1774 12:43:03.888759 * Base: fa000000, Size: 1000000, Tag: 200
1775 12:43:03.892042 * Base: fb001000, Size: 17ff000, Tag: 200
1776 12:43:03.895258 * Base: fe800000, Size: 300000, Tag: 200
1777 12:43:03.902352 * Base: feb80000, Size: 80000, Tag: 200
1778 12:43:03.905268 * Base: fed00000, Size: 40000, Tag: 200
1779 12:43:03.908993 * Base: fed70000, Size: 10000, Tag: 200
1780 12:43:03.912140 * Base: fed88000, Size: 8000, Tag: 200
1781 12:43:03.918808 * Base: fed93000, Size: d000, Tag: 200
1782 12:43:03.921978 * Base: feda2000, Size: 1e000, Tag: 200
1783 12:43:03.925298 * Base: fede0000, Size: 1220000, Tag: 200
1784 12:43:03.931889 * Base: 17fc00000, Size: 7e80400000, Tag: 100200
1785 12:43:03.938617 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1786 12:43:03.945281 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1787 12:43:03.951760 PCI: 00:07.0 20 * [0x82000000 - 0x8e1fffff] limit: 8e1fffff mem
1788 12:43:03.958497 PCI: 00:07.1 20 * [0xa0000000 - 0xac1fffff] limit: ac1fffff mem
1789 12:43:03.965311 PCI: 00:07.2 20 * [0xac200000 - 0xb83fffff] limit: b83fffff mem
1790 12:43:03.971684 PCI: 00:1c.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1791 12:43:03.978605 PCI: 00:1c.7 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1792 12:43:03.985024 PCI: 00:1d.0 20 * [0x80600000 - 0x806fffff] limit: 806fffff mem
1793 12:43:03.991772 PCI: 00:1f.3 20 * [0x80700000 - 0x807fffff] limit: 807fffff mem
1794 12:43:03.998273 PCI: 00:0d.2 10 * [0x80800000 - 0x8083ffff] limit: 8083ffff mem
1795 12:43:04.004928 PCI: 00:0d.3 10 * [0x80840000 - 0x8087ffff] limit: 8087ffff mem
1796 12:43:04.011691 PCI: 00:04.0 10 * [0x80880000 - 0x8089ffff] limit: 8089ffff mem
1797 12:43:04.018388 PCI: 00:0d.0 10 * [0x808a0000 - 0x808affff] limit: 808affff mem
1798 12:43:04.024888 PCI: 00:14.0 10 * [0x808b0000 - 0x808bffff] limit: 808bffff mem
1799 12:43:04.031541 PCI: 00:0a.0 10 * [0x808c0000 - 0x808c7fff] limit: 808c7fff mem
1800 12:43:04.037991 PCI: 00:14.2 10 * [0x808c8000 - 0x808cbfff] limit: 808cbfff mem
1801 12:43:04.044796 PCI: 00:14.3 10 * [0x808cc000 - 0x808cffff] limit: 808cffff mem
1802 12:43:04.051338 PCI: 00:1f.3 10 * [0x808d0000 - 0x808d3fff] limit: 808d3fff mem
1803 12:43:04.058030 PCI: 00:0d.2 18 * [0x808d4000 - 0x808d4fff] limit: 808d4fff mem
1804 12:43:04.064638 PCI: 00:0d.3 18 * [0x808d5000 - 0x808d5fff] limit: 808d5fff mem
1805 12:43:04.071281 PCI: 00:14.2 18 * [0x808d6000 - 0x808d6fff] limit: 808d6fff mem
1806 12:43:04.077922 PCI: 00:15.0 10 * [0x808d7000 - 0x808d7fff] limit: 808d7fff mem
1807 12:43:04.084754 PCI: 00:15.1 10 * [0x808d8000 - 0x808d8fff] limit: 808d8fff mem
1808 12:43:04.091232 PCI: 00:16.0 10 * [0x808d9000 - 0x808d9fff] limit: 808d9fff mem
1809 12:43:04.097671 PCI: 00:1e.3 10 * [0x808da000 - 0x808dafff] limit: 808dafff mem
1810 12:43:04.104452 PCI: 00:1f.5 10 * [0x808db000 - 0x808dbfff] limit: 808dbfff mem
1811 12:43:04.111259 PCI: 00:1f.4 10 * [0x808dc000 - 0x808dc0ff] limit: 808dc0ff mem
1812 12:43:04.117866 PCI: 00:07.0 24 * [0x17fc00000 - 0x19bbfffff] limit: 19bbfffff prefmem
1813 12:43:04.124287 PCI: 00:07.1 24 * [0x19bc00000 - 0x1b7bfffff] limit: 1b7bfffff prefmem
1814 12:43:04.131167 PCI: 00:07.2 24 * [0x1b7c00000 - 0x1d3bfffff] limit: 1d3bfffff prefmem
1815 12:43:04.141050 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1816 12:43:04.147555 PCI: 00:07.0 io: base: 2000 size: 2000 align: 12 gran: 12 limit: 3fff
1817 12:43:04.150956 PCI: 00:07.0: Resource ranges:
1818 12:43:04.154333 * Base: 2000, Size: 2000, Tag: 100
1819 12:43:04.157558 NONE 18 * [0x2000 - 0x3fff] limit: 3fff io
1820 12:43:04.164170 PCI: 00:07.0 io: base: 2000 size: 2000 align: 12 gran: 12 limit: 3fff done
1821 12:43:04.174224 PCI: 00:07.0 prefmem: base: 17fc00000 size: 1c000000 align: 20 gran: 20 limit: 19bbfffff
1822 12:43:04.177466 PCI: 00:07.0: Resource ranges:
1823 12:43:04.180732 * Base: 17fc00000, Size: 1c000000, Tag: 1200
1824 12:43:04.187442 NONE 14 * [0x17fc00000 - 0x19bbfffff] limit: 19bbfffff prefmem
1825 12:43:04.197370 PCI: 00:07.0 prefmem: base: 17fc00000 size: 1c000000 align: 20 gran: 20 limit: 19bbfffff done
1826 12:43:04.204298 PCI: 00:07.0 mem: base: 82000000 size: c200000 align: 20 gran: 20 limit: 8e1fffff
1827 12:43:04.207297 PCI: 00:07.0: Resource ranges:
1828 12:43:04.214011 * Base: 82000000, Size: c200000, Tag: 200
1829 12:43:04.220518 NONE 10 * [0x82000000 - 0x8e1fffff] limit: 8e1fffff mem
1830 12:43:04.227121 PCI: 00:07.0 mem: base: 82000000 size: c200000 align: 20 gran: 20 limit: 8e1fffff done
1831 12:43:04.233923 PCI: 00:07.1 io: base: 4000 size: 2000 align: 12 gran: 12 limit: 5fff
1832 12:43:04.237383 PCI: 00:07.1: Resource ranges:
1833 12:43:04.240882 * Base: 4000, Size: 2000, Tag: 100
1834 12:43:04.247464 NONE 18 * [0x4000 - 0x5fff] limit: 5fff io
1835 12:43:04.253775 PCI: 00:07.1 io: base: 4000 size: 2000 align: 12 gran: 12 limit: 5fff done
1836 12:43:04.263873 PCI: 00:07.1 prefmem: base: 19bc00000 size: 1c000000 align: 20 gran: 20 limit: 1b7bfffff
1837 12:43:04.263953 PCI: 00:07.1: Resource ranges:
1838 12:43:04.270420 * Base: 19bc00000, Size: 1c000000, Tag: 1200
1839 12:43:04.277096 NONE 14 * [0x19bc00000 - 0x1b7bfffff] limit: 1b7bfffff prefmem
1840 12:43:04.287039 PCI: 00:07.1 prefmem: base: 19bc00000 size: 1c000000 align: 20 gran: 20 limit: 1b7bfffff done
1841 12:43:04.293682 PCI: 00:07.1 mem: base: a0000000 size: c200000 align: 20 gran: 20 limit: ac1fffff
1842 12:43:04.297071 PCI: 00:07.1: Resource ranges:
1843 12:43:04.300269 * Base: a0000000, Size: c200000, Tag: 200
1844 12:43:04.306903 NONE 10 * [0xa0000000 - 0xac1fffff] limit: ac1fffff mem
1845 12:43:04.316864 PCI: 00:07.1 mem: base: a0000000 size: c200000 align: 20 gran: 20 limit: ac1fffff done
1846 12:43:04.323536 PCI: 00:07.2 io: base: 6000 size: 2000 align: 12 gran: 12 limit: 7fff
1847 12:43:04.326814 PCI: 00:07.2: Resource ranges:
1848 12:43:04.330196 * Base: 6000, Size: 2000, Tag: 100
1849 12:43:04.333469 NONE 18 * [0x6000 - 0x7fff] limit: 7fff io
1850 12:43:04.340067 PCI: 00:07.2 io: base: 6000 size: 2000 align: 12 gran: 12 limit: 7fff done
1851 12:43:04.350179 PCI: 00:07.2 prefmem: base: 1b7c00000 size: 1c000000 align: 20 gran: 20 limit: 1d3bfffff
1852 12:43:04.353328 PCI: 00:07.2: Resource ranges:
1853 12:43:04.356668 * Base: 1b7c00000, Size: 1c000000, Tag: 1200
1854 12:43:04.363348 NONE 14 * [0x1b7c00000 - 0x1d3bfffff] limit: 1d3bfffff prefmem
1855 12:43:04.373187 PCI: 00:07.2 prefmem: base: 1b7c00000 size: 1c000000 align: 20 gran: 20 limit: 1d3bfffff done
1856 12:43:04.383270 PCI: 00:07.2 mem: base: ac200000 size: c200000 align: 20 gran: 20 limit: b83fffff
1857 12:43:04.386590 PCI: 00:07.2: Resource ranges:
1858 12:43:04.389839 * Base: ac200000, Size: c200000, Tag: 200
1859 12:43:04.396486 NONE 10 * [0xac200000 - 0xb83fffff] limit: b83fffff mem
1860 12:43:04.403173 PCI: 00:07.2 mem: base: ac200000 size: c200000 align: 20 gran: 20 limit: b83fffff done
1861 12:43:04.409817 PCI: 00:1c.0 io: base: 8000 size: 1000 align: 12 gran: 12 limit: 8fff
1862 12:43:04.413194 PCI: 00:1c.0: Resource ranges:
1863 12:43:04.416508 * Base: 8000, Size: 1000, Tag: 100
1864 12:43:04.422976 PCI: 82:00.0 10 * [0x8000 - 0x80ff] limit: 80ff io
1865 12:43:04.430015 PCI: 00:1c.0 io: base: 8000 size: 1000 align: 12 gran: 12 limit: 8fff done
1866 12:43:04.439743 PCI: 00:1c.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1867 12:43:04.443097 PCI: 00:1c.0: Resource ranges:
1868 12:43:04.446321 * Base: 80400000, Size: 100000, Tag: 200
1869 12:43:04.452930 PCI: 82:00.0 20 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1870 12:43:04.459572 PCI: 82:00.0 18 * [0x80404000 - 0x80404fff] limit: 80404fff mem
1871 12:43:04.466316 PCI: 00:1c.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1872 12:43:04.475975 PCI: 00:1c.7 mem: base: 80500000 size: 100000 align: 20 gran: 20 limit: 805fffff
1873 12:43:04.479433 PCI: 00:1c.7: Resource ranges:
1874 12:43:04.482806 * Base: 80500000, Size: 100000, Tag: 200
1875 12:43:04.489313 PCI: 83:00.0 10 * [0x80500000 - 0x80500fff] limit: 80500fff mem
1876 12:43:04.499248 PCI: 00:1c.7 mem: base: 80500000 size: 100000 align: 20 gran: 20 limit: 805fffff done
1877 12:43:04.505849 PCI: 00:1d.0 mem: base: 80600000 size: 100000 align: 20 gran: 20 limit: 806fffff
1878 12:43:04.509380 PCI: 00:1d.0: Resource ranges:
1879 12:43:04.512417 * Base: 80600000, Size: 100000, Tag: 200
1880 12:43:04.519346 PCI: 84:00.0 10 * [0x80600000 - 0x80603fff] limit: 80603fff mem
1881 12:43:04.529060 PCI: 00:1d.0 mem: base: 80600000 size: 100000 align: 20 gran: 20 limit: 806fffff done
1882 12:43:04.535951 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1883 12:43:04.538938 Root Device assign_resources, bus 0 link: 0
1884 12:43:04.545903 DOMAIN: 0000 assign_resources, bus 0 link: 0
1885 12:43:04.552254 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1886 12:43:04.562156 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1887 12:43:04.568945 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1888 12:43:04.575700 PCI: 00:04.0 10 <- [0x0080880000 - 0x008089ffff] size 0x00020000 gran 0x11 mem64
1889 12:43:04.582154 PCI: 00:04.0 assign_resources, bus 1 link: 0
1890 12:43:04.585500 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1891 12:43:04.595621 PCI: 00:07.0 1c <- [0x0000002000 - 0x0000003fff] size 0x00002000 gran 0x0c bus 01 io
1892 12:43:04.602156 PCI: 00:07.0 24 <- [0x017fc00000 - 0x019bbfffff] size 0x1c000000 gran 0x14 bus 01 prefmem
1893 12:43:04.612215 PCI: 00:07.0 20 <- [0x0082000000 - 0x008e1fffff] size 0x0c200000 gran 0x14 bus 01 mem
1894 12:43:04.615433 PCI: 00:07.0 assign_resources, bus 1 link: 0
1895 12:43:04.622025 PCI: 00:07.0 assign_resources, bus 1 link: 0 done
1896 12:43:04.628759 PCI: 00:07.1 1c <- [0x0000004000 - 0x0000005fff] size 0x00002000 gran 0x0c bus 2c io
1897 12:43:04.639321 PCI: 00:07.1 24 <- [0x019bc00000 - 0x01b7bfffff] size 0x1c000000 gran 0x14 bus 2c prefmem
1898 12:43:04.649324 PCI: 00:07.1 20 <- [0x00a0000000 - 0x00ac1fffff] size 0x0c200000 gran 0x14 bus 2c mem
1899 12:43:04.652529 PCI: 00:07.1 assign_resources, bus 44 link: 0
1900 12:43:04.658794 PCI: 00:07.1 assign_resources, bus 44 link: 0 done
1901 12:43:04.665818 PCI: 00:07.2 1c <- [0x0000006000 - 0x0000007fff] size 0x00002000 gran 0x0c bus 57 io
1902 12:43:04.675473 PCI: 00:07.2 24 <- [0x01b7c00000 - 0x01d3bfffff] size 0x1c000000 gran 0x14 bus 57 prefmem
1903 12:43:04.682358 PCI: 00:07.2 20 <- [0x00ac200000 - 0x00b83fffff] size 0x0c200000 gran 0x14 bus 57 mem
1904 12:43:04.689243 PCI: 00:07.2 assign_resources, bus 87 link: 0
1905 12:43:04.692378 PCI: 00:07.2 assign_resources, bus 87 link: 0 done
1906 12:43:04.701718 PCI: 00:0a.0 10 <- [0x00808c0000 - 0x00808c7fff] size 0x00008000 gran 0x0f mem64
1907 12:43:04.708365 PCI: 00:0d.0 10 <- [0x00808a0000 - 0x00808affff] size 0x00010000 gran 0x10 mem64
1908 12:43:04.711742 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1909 12:43:04.718238 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1910 12:43:04.725190 PCI: 00:0d.2 10 <- [0x0080800000 - 0x008083ffff] size 0x00040000 gran 0x12 mem64
1911 12:43:04.734788 PCI: 00:0d.2 18 <- [0x00808d4000 - 0x00808d4fff] size 0x00001000 gran 0x0c mem64
1912 12:43:04.738474 PCI: 00:0d.2 assign_resources, bus 2 link: 0
1913 12:43:04.744987 PCI: 00:0d.2 assign_resources, bus 2 link: 0 done
1914 12:43:04.751489 PCI: 00:0d.3 10 <- [0x0080840000 - 0x008087ffff] size 0x00040000 gran 0x12 mem64
1915 12:43:04.758330 PCI: 00:0d.3 18 <- [0x00808d5000 - 0x00808d5fff] size 0x00001000 gran 0x0c mem64
1916 12:43:04.764837 PCI: 00:0d.3 assign_resources, bus 3 link: 0
1917 12:43:04.768054 PCI: 00:0d.3 assign_resources, bus 3 link: 0 done
1918 12:43:04.778064 PCI: 00:14.0 10 <- [0x00808b0000 - 0x00808bffff] size 0x00010000 gran 0x10 mem64
1919 12:43:04.781542 PCI: 00:14.0 assign_resources, bus 0 link: 0
1920 12:43:04.784881 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1921 12:43:04.794469 PCI: 00:14.2 10 <- [0x00808c8000 - 0x00808cbfff] size 0x00004000 gran 0x0e mem64
1922 12:43:04.801563 PCI: 00:14.2 18 <- [0x00808d6000 - 0x00808d6fff] size 0x00001000 gran 0x0c mem64
1923 12:43:04.811151 PCI: 00:14.3 10 <- [0x00808cc000 - 0x00808cffff] size 0x00004000 gran 0x0e mem64
1924 12:43:04.814760 PCI: 00:14.3 assign_resources, bus 0 link: 0
1925 12:43:04.821150 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1926 12:43:04.828032 PCI: 00:15.0 10 <- [0x00808d7000 - 0x00808d7fff] size 0x00001000 gran 0x0c mem64
1927 12:43:04.831193 PCI: 00:15.0 assign_resources, bus 0 link: 0
1928 12:43:04.837897 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1929 12:43:04.844403 PCI: 00:15.1 10 <- [0x00808d8000 - 0x00808d8fff] size 0x00001000 gran 0x0c mem64
1930 12:43:04.851244 PCI: 00:15.1 assign_resources, bus 0 link: 0
1931 12:43:04.854621 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1932 12:43:04.864889 PCI: 00:16.0 10 <- [0x00808d9000 - 0x00808d9fff] size 0x00001000 gran 0x0c mem64
1933 12:43:04.871569 PCI: 00:1c.0 1c <- [0x0000008000 - 0x0000008fff] size 0x00001000 gran 0x0c bus 82 io
1934 12:43:04.881569 PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 82 prefmem
1935 12:43:04.891743 PCI: 00:1c.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 82 mem
1936 12:43:04.894745 PCI: 00:1c.0 assign_resources, bus 130 link: 0
1937 12:43:04.900842 PCI: 82:00.0 10 <- [0x0000008000 - 0x00000080ff] size 0x00000100 gran 0x08 io
1938 12:43:04.910881 PCI: 82:00.0 18 <- [0x0080404000 - 0x0080404fff] size 0x00001000 gran 0x0c mem64
1939 12:43:04.918082 PCI: 82:00.0 20 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1940 12:43:04.924955 PCI: 00:1c.0 assign_resources, bus 130 link: 0 done
1941 12:43:04.930863 PCI: 00:1c.7 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 83 io
1942 12:43:04.941071 PCI: 00:1c.7 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 83 prefmem
1943 12:43:04.951103 PCI: 00:1c.7 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 bus 83 mem
1944 12:43:04.954065 PCI: 00:1c.7 assign_resources, bus 131 link: 0
1945 12:43:04.964211 PCI: 83:00.0 10 <- [0x0080500000 - 0x0080500fff] size 0x00001000 gran 0x0c mem
1946 12:43:04.967687 PCI: 00:1c.7 assign_resources, bus 131 link: 0 done
1947 12:43:04.977601 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 84 io
1948 12:43:04.987545 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 84 prefmem
1949 12:43:04.994362 PCI: 00:1d.0 20 <- [0x0080600000 - 0x00806fffff] size 0x00100000 gran 0x14 bus 84 mem
1950 12:43:05.000898 PCI: 00:1d.0 assign_resources, bus 132 link: 0
1951 12:43:05.006777 PCI: 84:00.0 10 <- [0x0080600000 - 0x0080603fff] size 0x00004000 gran 0x0e mem64
1952 12:43:05.013599 PCI: 00:1d.0 assign_resources, bus 132 link: 0 done
1953 12:43:05.020483 PCI: 00:1e.3 10 <- [0x00808da000 - 0x00808dafff] size 0x00001000 gran 0x0c mem64
1954 12:43:05.027460 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1955 12:43:05.030661 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1956 12:43:05.037209 LPC: Trying to open IO window from 800 size 1ff
1957 12:43:05.043564 PCI: 00:1f.3 10 <- [0x00808d0000 - 0x00808d3fff] size 0x00004000 gran 0x0e mem64
1958 12:43:05.050511 PCI: 00:1f.3 20 <- [0x0080700000 - 0x00807fffff] size 0x00100000 gran 0x14 mem64
1959 12:43:05.060332 PCI: 00:1f.4 10 <- [0x00808dc000 - 0x00808dc0ff] size 0x00000100 gran 0x08 mem64
1960 12:43:05.067068 PCI: 00:1f.5 10 <- [0x00808db000 - 0x00808dbfff] size 0x00001000 gran 0x0c mem
1961 12:43:05.073583 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1962 12:43:05.077061 Root Device assign_resources, bus 0 link: 0 done
1963 12:43:05.080086 Done setting resources.
1964 12:43:05.086730 Show resources in subtree (Root Device)...After assigning values.
1965 12:43:05.090072 Root Device child on link 0 CPU_CLUSTER: 0
1966 12:43:05.093536 CPU_CLUSTER: 0 child on link 0 APIC: 00
1967 12:43:05.096886 APIC: 00
1968 12:43:05.097340 APIC: 12
1969 12:43:05.099894 APIC: 14
1970 12:43:05.100351 APIC: 16
1971 12:43:05.100598 APIC: 10
1972 12:43:05.106812 DOMAIN: 0000 child on link 0 GPIO: 0
1973 12:43:05.113036 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1974 12:43:05.122959 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1975 12:43:05.126516 GPIO: 0
1976 12:43:05.127039 PCI: 00:00.0
1977 12:43:05.136281 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1978 12:43:05.146283 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1979 12:43:05.156011 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1980 12:43:05.165789 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1981 12:43:05.172586 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1982 12:43:05.182898 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1983 12:43:05.192847 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1984 12:43:05.202521 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1985 12:43:05.212148 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1986 12:43:05.222313 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1987 12:43:05.232426 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1988 12:43:05.238789 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1989 12:43:05.248868 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1990 12:43:05.258792 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1991 12:43:05.268453 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1992 12:43:05.278900 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1993 12:43:05.288717 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1994 12:43:05.298883 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1995 12:43:05.305466 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1996 12:43:05.315110 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1997 12:43:05.325351 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1998 12:43:05.335032 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1999 12:43:05.344805 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
2000 12:43:05.354951 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
2001 12:43:05.364851 PCI: 00:00.0 resource base 100000000 size 7fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
2002 12:43:05.374757 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
2003 12:43:05.381504 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
2004 12:43:05.391544 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
2005 12:43:05.394799 PCI: 00:02.0
2006 12:43:05.404934 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
2007 12:43:05.414381 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
2008 12:43:05.424032 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
2009 12:43:05.427425 PCI: 00:04.0 child on link 0 GENERIC: 0.0
2010 12:43:05.440499 PCI: 00:04.0 resource base 80880000 size 20000 align 17 gran 17 limit 8089ffff flags 60000201 index 10
2011 12:43:05.440642 GENERIC: 0.0
2012 12:43:05.443815 PCI: 00:07.0 child on link 0 GENERIC: 0.0
2013 12:43:05.453781 PCI: 00:07.0 resource base 2000 size 2000 align 12 gran 12 limit 3fff flags 60080102 index 1c
2014 12:43:05.467867 PCI: 00:07.0 resource base 17fc00000 size 1c000000 align 20 gran 20 limit 19bbfffff flags 60181202 index 24
2015 12:43:05.477193 PCI: 00:07.0 resource base 82000000 size c200000 align 20 gran 20 limit 8e1fffff flags 60080202 index 20
2016 12:43:05.477596 GENERIC: 0.0
2017 12:43:05.480631 NONE
2018 12:43:05.490389 NONE resource base 82000000 size c200000 align 12 gran 12 limit 8e1fffff flags 40000200 index 10
2019 12:43:05.500828 NONE resource base 17fc00000 size 1c000000 align 12 gran 12 limit 19bbfffff flags 40101200 index 14
2020 12:43:05.507476 NONE resource base 2000 size 2000 align 12 gran 12 limit 3fff flags 40000100 index 18
2021 12:43:05.513905 PCI: 00:07.1 child on link 0 GENERIC: 1.0
2022 12:43:05.523946 PCI: 00:07.1 resource base 4000 size 2000 align 12 gran 12 limit 5fff flags 60080102 index 1c
2023 12:43:05.534032 PCI: 00:07.1 resource base 19bc00000 size 1c000000 align 20 gran 20 limit 1b7bfffff flags 60181202 index 24
2024 12:43:05.543556 PCI: 00:07.1 resource base a0000000 size c200000 align 20 gran 20 limit ac1fffff flags 60080202 index 20
2025 12:43:05.546861 GENERIC: 1.0
2026 12:43:05.547271 NONE
2027 12:43:05.557194 NONE resource base a0000000 size c200000 align 12 gran 12 limit ac1fffff flags 40000200 index 10
2028 12:43:05.566734 NONE resource base 19bc00000 size 1c000000 align 12 gran 12 limit 1b7bfffff flags 40101200 index 14
2029 12:43:05.577016 NONE resource base 4000 size 2000 align 12 gran 12 limit 5fff flags 40000100 index 18
2030 12:43:05.580042 PCI: 00:07.2 child on link 0 GENERIC: 0.0
2031 12:43:05.589949 PCI: 00:07.2 resource base 6000 size 2000 align 12 gran 12 limit 7fff flags 60080102 index 1c
2032 12:43:05.600220 PCI: 00:07.2 resource base 1b7c00000 size 1c000000 align 20 gran 20 limit 1d3bfffff flags 60181202 index 24
2033 12:43:05.613362 PCI: 00:07.2 resource base ac200000 size c200000 align 20 gran 20 limit b83fffff flags 60080202 index 20
2034 12:43:05.613833 GENERIC: 0.0
2035 12:43:05.614095 NONE
2036 12:43:05.623384 NONE resource base ac200000 size c200000 align 12 gran 12 limit b83fffff flags 40000200 index 10
2037 12:43:05.632878 NONE resource base 1b7c00000 size 1c000000 align 12 gran 12 limit 1d3bfffff flags 40101200 index 14
2038 12:43:05.642753 NONE resource base 6000 size 2000 align 12 gran 12 limit 7fff flags 40000100 index 18
2039 12:43:05.646642 PCI: 00:08.0
2040 12:43:05.647134 PCI: 00:0a.0
2041 12:43:05.656141 PCI: 00:0a.0 resource base 808c0000 size 8000 align 15 gran 15 limit 808c7fff flags 60000201 index 10
2042 12:43:05.663025 PCI: 00:0d.0 child on link 0 USB0 port 0
2043 12:43:05.672932 PCI: 00:0d.0 resource base 808a0000 size 10000 align 16 gran 16 limit 808affff flags 60000201 index 10
2044 12:43:05.676433 USB0 port 0 child on link 0 USB3 port 0
2045 12:43:05.679760 USB3 port 0
2046 12:43:05.680115 USB3 port 1
2047 12:43:05.682783 USB3 port 2
2048 12:43:05.683268 USB3 port 3
2049 12:43:05.689560 PCI: 00:0d.2 child on link 0 GENERIC: 0.0
2050 12:43:05.699567 PCI: 00:0d.2 resource base 80800000 size 40000 align 18 gran 18 limit 8083ffff flags 60000201 index 10
2051 12:43:05.709668 PCI: 00:0d.2 resource base 808d4000 size 1000 align 12 gran 12 limit 808d4fff flags 60000201 index 18
2052 12:43:05.710137 GENERIC: 0.0
2053 12:43:05.715770 PCI: 00:0d.3 child on link 0 GENERIC: 0.0
2054 12:43:05.726023 PCI: 00:0d.3 resource base 80840000 size 40000 align 18 gran 18 limit 8087ffff flags 60000201 index 10
2055 12:43:05.735932 PCI: 00:0d.3 resource base 808d5000 size 1000 align 12 gran 12 limit 808d5fff flags 60000201 index 18
2056 12:43:05.739444 GENERIC: 0.0
2057 12:43:05.742320 PCI: 00:14.0 child on link 0 USB0 port 0
2058 12:43:05.752502 PCI: 00:14.0 resource base 808b0000 size 10000 align 16 gran 16 limit 808bffff flags 60000201 index 10
2059 12:43:05.755781 USB0 port 0 child on link 0 USB2 port 0
2060 12:43:05.759416 USB2 port 0
2061 12:43:05.759902 USB2 port 1
2062 12:43:05.762378 USB2 port 2
2063 12:43:05.762724 USB2 port 3
2064 12:43:05.765649 USB2 port 4
2065 12:43:05.765993 USB2 port 5
2066 12:43:05.768898 USB2 port 6
2067 12:43:05.772439 USB2 port 7
2068 12:43:05.772783 USB2 port 8
2069 12:43:05.775627 USB2 port 9
2070 12:43:05.775972 USB3 port 0
2071 12:43:05.779159 USB3 port 1
2072 12:43:05.779603 USB3 port 2
2073 12:43:05.783062 USB3 port 3
2074 12:43:05.783498 PCI: 00:14.2
2075 12:43:05.792616 PCI: 00:14.2 resource base 808c8000 size 4000 align 14 gran 14 limit 808cbfff flags 60000201 index 10
2076 12:43:05.805596 PCI: 00:14.2 resource base 808d6000 size 1000 align 12 gran 12 limit 808d6fff flags 60000201 index 18
2077 12:43:05.808914 PCI: 00:14.3 child on link 0 GENERIC: 0.0
2078 12:43:05.818790 PCI: 00:14.3 resource base 808cc000 size 4000 align 14 gran 14 limit 808cffff flags 60000201 index 10
2079 12:43:05.822467 GENERIC: 0.0
2080 12:43:05.825740 PCI: 00:15.0 child on link 0 I2C: 00:1a
2081 12:43:05.835589 PCI: 00:15.0 resource base 808d7000 size 1000 align 12 gran 12 limit 808d7fff flags 60000201 index 10
2082 12:43:05.836057 I2C: 00:1a
2083 12:43:05.841984 PCI: 00:15.1 child on link 0 I2C: 00:50
2084 12:43:05.852672 PCI: 00:15.1 resource base 808d8000 size 1000 align 12 gran 12 limit 808d8fff flags 60000201 index 10
2085 12:43:05.853127 I2C: 00:50
2086 12:43:05.856971 PCI: 00:16.0
2087 12:43:05.864101 PCI: 00:16.0 resource base 808d9000 size 1000 align 12 gran 12 limit 808d9fff flags 60000201 index 10
2088 12:43:05.872168 PCI: 00:1c.0 child on link 0 PCI: 82:00.0
2089 12:43:05.879051 PCI: 00:1c.0 resource base 8000 size 1000 align 12 gran 12 limit 8fff flags 60080102 index 1c
2090 12:43:05.889548 PCI: 00:1c.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
2091 12:43:05.900898 PCI: 00:1c.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
2092 12:43:05.904215 PCI: 82:00.0
2093 12:43:05.910906 PCI: 82:00.0 resource base 8000 size 100 align 8 gran 8 limit 80ff flags 60000100 index 10
2094 12:43:05.924109 PCI: 82:00.0 resource base 80404000 size 1000 align 12 gran 12 limit 80404fff flags 60000201 index 18
2095 12:43:05.934248 PCI: 82:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 20
2096 12:43:05.937322 PCI: 00:1c.7 child on link 0 GENERIC: 0.0
2097 12:43:05.947537 PCI: 00:1c.7 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
2098 12:43:05.957388 PCI: 00:1c.7 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
2099 12:43:05.970556 PCI: 00:1c.7 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60080202 index 20
2100 12:43:05.971041 GENERIC: 0.0
2101 12:43:05.973907 PCI: 83:00.0
2102 12:43:05.984215 PCI: 83:00.0 resource base 80500000 size 1000 align 12 gran 12 limit 80500fff flags 60000200 index 10
2103 12:43:05.986929 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
2104 12:43:05.997197 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
2105 12:43:06.006840 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
2106 12:43:06.020445 PCI: 00:1d.0 resource base 80600000 size 100000 align 20 gran 20 limit 806fffff flags 60080202 index 20
2107 12:43:06.020919 GENERIC: 0.0
2108 12:43:06.023648 PCI: 84:00.0
2109 12:43:06.033898 PCI: 84:00.0 resource base 80600000 size 4000 align 14 gran 14 limit 80603fff flags 60000201 index 10
2110 12:43:06.034367 PCI: 00:1e.0
2111 12:43:06.046869 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
2112 12:43:06.047357 PCI: 00:1e.3
2113 12:43:06.056874 PCI: 00:1e.3 resource base 808da000 size 1000 align 12 gran 12 limit 808dafff flags 60000201 index 10
2114 12:43:06.063517 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
2115 12:43:06.070046 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
2116 12:43:06.073518 PNP: 0c09.0
2117 12:43:06.080018 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
2118 12:43:06.086858 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
2119 12:43:06.096884 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
2120 12:43:06.103499 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
2121 12:43:06.110063 GENERIC: 0.0 child on link 0 GENERIC: 0.0
2122 12:43:06.110522 GENERIC: 0.0
2123 12:43:06.113260 GENERIC: 1.0
2124 12:43:06.113721 PCI: 00:1f.3
2125 12:43:06.123043 PCI: 00:1f.3 resource base 808d0000 size 4000 align 14 gran 14 limit 808d3fff flags 60000201 index 10
2126 12:43:06.136622 PCI: 00:1f.3 resource base 80700000 size 100000 align 20 gran 20 limit 807fffff flags 60000201 index 20
2127 12:43:06.137083 PCI: 00:1f.4
2128 12:43:06.146502 PCI: 00:1f.4 resource base 808dc000 size 100 align 12 gran 8 limit 808dc0ff flags 60000201 index 10
2129 12:43:06.156353 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
2130 12:43:06.156786 PCI: 00:1f.5
2131 12:43:06.169600 PCI: 00:1f.5 resource base 808db000 size 1000 align 12 gran 12 limit 808dbfff flags 60000200 index 10
2132 12:43:06.170031 Done allocating resources.
2133 12:43:06.176348 BS: BS_DEV_RESOURCES run times (exec / console): 5 / 4329 ms
2134 12:43:06.182850 coreboot skipped calling FSP notify phase: 00000020.
2135 12:43:06.186261 fw_config match found: AUDIO=NAU88L25B_I2S
2136 12:43:06.189282 BT offload enabled over I2S with NAU88L25B
2137 12:43:06.197336 BS: BS_DEV_ENABLE entry times (exec / console): 1 / 14 ms
2138 12:43:06.200508 Enabling resources...
2139 12:43:06.203715 PCI: 00:00.0 subsystem <- 8086/4619
2140 12:43:06.207036 PCI: 00:00.0 cmd <- 06
2141 12:43:06.210175 PCI: 00:02.0 subsystem <- 8086/46b3
2142 12:43:06.210533 PCI: 00:02.0 cmd <- 03
2143 12:43:06.216922 PCI: 00:04.0 subsystem <- 8086/461d
2144 12:43:06.217229 PCI: 00:04.0 cmd <- 02
2145 12:43:06.220269 PCI: 00:07.0 bridge ctrl <- 0013
2146 12:43:06.223635 PCI: 00:07.0 cmd <- 07
2147 12:43:06.227300 PCI: 00:07.1 bridge ctrl <- 0013
2148 12:43:06.230426 PCI: 00:07.1 cmd <- 07
2149 12:43:06.234062 PCI: 00:07.2 bridge ctrl <- 0013
2150 12:43:06.234523 PCI: 00:07.2 cmd <- 07
2151 12:43:06.237229 PCI: 00:0a.0 subsystem <- 8086/467d
2152 12:43:06.240391 PCI: 00:0a.0 cmd <- 02
2153 12:43:06.243369 PCI: 00:0d.0 subsystem <- 8086/461e
2154 12:43:06.247304 PCI: 00:0d.0 cmd <- 02
2155 12:43:06.250273 PCI: 00:0d.2 subsystem <- 8086/463e
2156 12:43:06.254004 PCI: 00:0d.2 cmd <- 02
2157 12:43:06.257121 PCI: 00:0d.3 subsystem <- 8086/466d
2158 12:43:06.260128 PCI: 00:0d.3 cmd <- 02
2159 12:43:06.263597 PCI: 00:14.0 subsystem <- 8086/51ed
2160 12:43:06.264057 PCI: 00:14.0 cmd <- 02
2161 12:43:06.269912 PCI: 00:14.2 subsystem <- 8086/51ef
2162 12:43:06.270368 PCI: 00:14.2 cmd <- 02
2163 12:43:06.273644 PCI: 00:14.3 subsystem <- 8086/51f0
2164 12:43:06.276987 PCI: 00:14.3 cmd <- 02
2165 12:43:06.280288 PCI: 00:15.0 subsystem <- 8086/51e8
2166 12:43:06.283627 PCI: 00:15.0 cmd <- 02
2167 12:43:06.287064 PCI: 00:15.1 subsystem <- 8086/51e9
2168 12:43:06.290185 PCI: 00:15.1 cmd <- 06
2169 12:43:06.293665 PCI: 00:16.0 subsystem <- 8086/51e0
2170 12:43:06.294126 PCI: 00:16.0 cmd <- 02
2171 12:43:06.296929 PCI: 00:1c.0 bridge ctrl <- 0013
2172 12:43:06.303508 PCI: 00:1c.0 subsystem <- 8086/51be
2173 12:43:06.303967 PCI: 00:1c.0 cmd <- 07
2174 12:43:06.306676 PCI: 00:1c.7 bridge ctrl <- 0013
2175 12:43:06.310074 PCI: 00:1c.7 subsystem <- 8086/51bf
2176 12:43:06.313353 PCI: 00:1c.7 cmd <- 06
2177 12:43:06.316682 PCI: 00:1d.0 bridge ctrl <- 0013
2178 12:43:06.320091 PCI: 00:1d.0 subsystem <- 8086/51b3
2179 12:43:06.323036 PCI: 00:1d.0 cmd <- 06
2180 12:43:06.326615 PCI: 00:1e.0 subsystem <- 8086/51a8
2181 12:43:06.329695 PCI: 00:1e.0 cmd <- 06
2182 12:43:06.333343 PCI: 00:1e.3 subsystem <- 8086/51ab
2183 12:43:06.333809 PCI: 00:1e.3 cmd <- 02
2184 12:43:06.339786 PCI: 00:1f.0 subsystem <- 8086/5182
2185 12:43:06.340248 PCI: 00:1f.0 cmd <- 407
2186 12:43:06.343097 PCI: 00:1f.3 subsystem <- 8086/51c8
2187 12:43:06.346384 PCI: 00:1f.3 cmd <- 02
2188 12:43:06.350077 PCI: 00:1f.4 subsystem <- 8086/51a3
2189 12:43:06.352970 PCI: 00:1f.4 cmd <- 03
2190 12:43:06.356649 PCI: 00:1f.5 subsystem <- 8086/51a4
2191 12:43:06.360007 PCI: 00:1f.5 cmd <- 406
2192 12:43:06.360463 PCI: 82:00.0 cmd <- 03
2193 12:43:06.363037 PCI: 83:00.0 cmd <- 06
2194 12:43:06.365997 PCI: 84:00.0 cmd <- 02
2195 12:43:06.366345 done.
2196 12:43:06.373161 BS: BS_DEV_ENABLE run times (exec / console): 1 / 168 ms
2197 12:43:06.376322 ME: Version: Unavailable
2198 12:43:06.379626 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
2199 12:43:06.382880 Initializing devices...
2200 12:43:06.386552 Root Device init
2201 12:43:06.387042 mainboard: EC init
2202 12:43:06.393122 Chrome EC: Set SMI mask to 0x0000000000000000
2203 12:43:06.393587 Chrome EC: UHEPI supported
2204 12:43:06.399648 Chrome EC: clear events_b mask to 0x0000000000000000
2205 12:43:06.406534 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000004
2206 12:43:06.413133 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000000000004
2207 12:43:06.416288 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000008080004
2208 12:43:06.423321 Chrome EC: Set WAKE mask to 0x0000000000000000
2209 12:43:06.426516 Root Device init finished in 38 msecs
2210 12:43:06.429592 PCI: 00:00.0 init
2211 12:43:06.429947 CPU TDP = 15 Watts
2212 12:43:06.432555 CPU PL1 = 55 Watts
2213 12:43:06.432829 CPU PL2 = 55 Watts
2214 12:43:06.436448 CPU PsysPL2 = 90 Watts
2215 12:43:06.439574 CPU PL4 = 123 Watts
2216 12:43:06.442805 PCI: 00:00.0 init finished in 10 msecs
2217 12:43:06.443232 PCI: 00:02.0 init
2218 12:43:06.446179 GMA: Found VBT in CBFS
2219 12:43:06.449797 GMA: Found valid VBT in CBFS
2220 12:43:06.453036 Graphics hand-off block not found
2221 12:43:06.456389 PCI: 00:02.0 init finished in 8 msecs
2222 12:43:06.459688 PCI: 00:0a.0 init
2223 12:43:06.462925 PCI: 00:0a.0 init finished in 0 msecs
2224 12:43:06.463398 PCI: 00:14.0 init
2225 12:43:06.470058 PCI: 00:14.0 init finished in 0 msecs
2226 12:43:06.470512 PCI: 00:14.2 init
2227 12:43:06.473342 PCI: 00:14.2 init finished in 0 msecs
2228 12:43:06.476516 PCI: 00:15.0 init
2229 12:43:06.479595 I2C bus 0 version 0x3230302a
2230 12:43:06.482920 DW I2C bus 0 at 0x808d7000 (400 KHz)
2231 12:43:06.486172 PCI: 00:15.0 init finished in 6 msecs
2232 12:43:06.489927 PCI: 00:15.1 init
2233 12:43:06.490397 I2C bus 1 version 0x3230302a
2234 12:43:06.496227 DW I2C bus 1 at 0x808d8000 (400 KHz)
2235 12:43:06.499672 PCI: 00:15.1 init finished in 6 msecs
2236 12:43:06.500033 PCI: 00:16.0 init
2237 12:43:06.503027 PCI: 00:16.0 init finished in 0 msecs
2238 12:43:06.506346 PCI: 00:1c.0 init
2239 12:43:06.509608 Initializing PCH PCIe bridge.
2240 12:43:06.513022 PCI: 00:1c.0 init finished in 3 msecs
2241 12:43:06.516073 PCI: 00:1c.7 init
2242 12:43:06.519407 Initializing PCH PCIe bridge.
2243 12:43:06.522981 PCI: 00:1c.7 init finished in 3 msecs
2244 12:43:06.523469 PCI: 00:1d.0 init
2245 12:43:06.526083 Initializing PCH PCIe bridge.
2246 12:43:06.529907 PCI: 00:1d.0 init finished in 3 msecs
2247 12:43:06.533060 PCI: 00:1f.0 init
2248 12:43:06.536184 IOAPIC: Initializing IOAPIC at 0xfec00000
2249 12:43:06.539308 IOAPIC: ID = 0x02
2250 12:43:06.542669 IOAPIC: Dumping registers
2251 12:43:06.543067 reg 0x0000: 0x02000000
2252 12:43:06.545951 reg 0x0001: 0x00770020
2253 12:43:06.549652 reg 0x0002: 0x00000000
2254 12:43:06.553055 IOAPIC: 120 interrupts
2255 12:43:06.556051 IOAPIC: Clearing IOAPIC at 0xfec00000
2256 12:43:06.559549 IOAPIC: vector 0x00 value 0x00000000 0x00010000
2257 12:43:06.566325 IOAPIC: vector 0x01 value 0x00000000 0x00010000
2258 12:43:06.569532 IOAPIC: vector 0x02 value 0x00000000 0x00010000
2259 12:43:06.573037 IOAPIC: vector 0x03 value 0x00000000 0x00010000
2260 12:43:06.579553 IOAPIC: vector 0x04 value 0x00000000 0x00010000
2261 12:43:06.582707 IOAPIC: vector 0x05 value 0x00000000 0x00010000
2262 12:43:06.589666 IOAPIC: vector 0x06 value 0x00000000 0x00010000
2263 12:43:06.592985 IOAPIC: vector 0x07 value 0x00000000 0x00010000
2264 12:43:06.599519 IOAPIC: vector 0x08 value 0x00000000 0x00010000
2265 12:43:06.603035 IOAPIC: vector 0x09 value 0x00000000 0x00010000
2266 12:43:06.609268 IOAPIC: vector 0x0a value 0x00000000 0x00010000
2267 12:43:06.612688 IOAPIC: vector 0x0b value 0x00000000 0x00010000
2268 12:43:06.616068 IOAPIC: vector 0x0c value 0x00000000 0x00010000
2269 12:43:06.622795 IOAPIC: vector 0x0d value 0x00000000 0x00010000
2270 12:43:06.625889 IOAPIC: vector 0x0e value 0x00000000 0x00010000
2271 12:43:06.632627 IOAPIC: vector 0x0f value 0x00000000 0x00010000
2272 12:43:06.635887 IOAPIC: vector 0x10 value 0x00000000 0x00010000
2273 12:43:06.642755 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2274 12:43:06.645697 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2275 12:43:06.648828 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2276 12:43:06.655286 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2277 12:43:06.658752 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2278 12:43:06.665572 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2279 12:43:06.668632 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2280 12:43:06.675641 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2281 12:43:06.678860 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2282 12:43:06.685827 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2283 12:43:06.688962 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2284 12:43:06.692315 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2285 12:43:06.698932 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2286 12:43:06.702381 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2287 12:43:06.708698 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2288 12:43:06.712199 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2289 12:43:06.718647 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2290 12:43:06.721726 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2291 12:43:06.728468 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2292 12:43:06.731635 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2293 12:43:06.735094 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2294 12:43:06.741591 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2295 12:43:06.745302 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2296 12:43:06.752320 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2297 12:43:06.755507 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2298 12:43:06.762139 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2299 12:43:06.765552 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2300 12:43:06.772104 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2301 12:43:06.775385 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2302 12:43:06.778892 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2303 12:43:06.785221 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2304 12:43:06.788770 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2305 12:43:06.795639 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2306 12:43:06.798735 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2307 12:43:06.805514 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2308 12:43:06.808465 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2309 12:43:06.811813 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2310 12:43:06.818308 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2311 12:43:06.821773 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2312 12:43:06.828676 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2313 12:43:06.832047 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2314 12:43:06.838165 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2315 12:43:06.841312 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2316 12:43:06.848160 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2317 12:43:06.851449 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2318 12:43:06.855240 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2319 12:43:06.861750 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2320 12:43:06.865032 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2321 12:43:06.871624 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2322 12:43:06.875208 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2323 12:43:06.881803 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2324 12:43:06.885125 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2325 12:43:06.891774 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2326 12:43:06.895100 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2327 12:43:06.898447 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2328 12:43:06.905287 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2329 12:43:06.908375 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2330 12:43:06.914936 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2331 12:43:06.918053 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2332 12:43:06.924996 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2333 12:43:06.928514 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2334 12:43:06.934935 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2335 12:43:06.938251 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2336 12:43:06.941806 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2337 12:43:06.948178 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2338 12:43:06.951616 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2339 12:43:06.958167 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2340 12:43:06.961556 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2341 12:43:06.967924 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2342 12:43:06.971092 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2343 12:43:06.974519 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2344 12:43:06.980716 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2345 12:43:06.984224 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2346 12:43:06.990691 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2347 12:43:06.994043 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2348 12:43:07.000801 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2349 12:43:07.004213 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2350 12:43:07.010772 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2351 12:43:07.014042 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2352 12:43:07.017367 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2353 12:43:07.024233 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2354 12:43:07.027489 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2355 12:43:07.034143 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2356 12:43:07.037543 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2357 12:43:07.043846 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2358 12:43:07.047294 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2359 12:43:07.054384 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2360 12:43:07.057401 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2361 12:43:07.060793 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2362 12:43:07.067296 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2363 12:43:07.070797 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2364 12:43:07.077614 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2365 12:43:07.080771 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2366 12:43:07.087393 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2367 12:43:07.090963 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2368 12:43:07.094045 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2369 12:43:07.100642 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2370 12:43:07.104111 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2371 12:43:07.110534 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2372 12:43:07.113900 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2373 12:43:07.120379 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2374 12:43:07.123924 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2375 12:43:07.130517 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2376 12:43:07.133870 IOAPIC: Bootstrap Processor Local APIC = 0x00
2377 12:43:07.137017 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2378 12:43:07.143802 PCI: 00:1f.0 init finished in 607 msecs
2379 12:43:07.143878 PCI: 00:1f.2 init
2380 12:43:07.147043 apm_control: Disabling ACPI.
2381 12:43:07.151402 APMC done.
2382 12:43:07.154421 PCI: 00:1f.2 init finished in 5 msecs
2383 12:43:07.157674 PCI: 00:1f.3 init
2384 12:43:07.161350 PCI: 00:1f.3 init finished in 0 msecs
2385 12:43:07.161423 PCI: 00:1f.4 init
2386 12:43:07.164711 PCI: 00:1f.4 init finished in 0 msecs
2387 12:43:07.167839 PCI: 82:00.0 init
2388 12:43:07.171383 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
2389 12:43:07.174653 Located 'ethernet_mac0' in VPD
2390 12:43:07.178132 r8168: Resetting NIC...done
2391 12:43:07.181221 r8168: Programming MAC Address...done
2392 12:43:07.184734 r8168: Customized LED 0x482
2393 12:43:07.187861 r8168: read back LED setting as 0x482
2394 12:43:07.194618 PCI: 82:00.0 init finished in 21 msecs
2395 12:43:07.194694 PCI: 83:00.0 init
2396 12:43:07.198200 PCI: 83:00.0 init finished in 0 msecs
2397 12:43:07.201371 PCI: 84:00.0 init
2398 12:43:07.204579 PCI: 84:00.0 init finished in 0 msecs
2399 12:43:07.207795 PNP: 0c09.0 init
2400 12:43:07.211056 Google Chrome EC uptime: 13.374 seconds
2401 12:43:07.214298 Google Chrome AP resets since EC boot: 1
2402 12:43:07.217735 Google Chrome most recent AP reset causes:
2403 12:43:07.224603 0.311: 32775 shutdown: entering G3
2404 12:43:07.230942 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2405 12:43:07.234417 PNP: 0c09.0 init finished in 23 msecs
2406 12:43:07.234492 GENERIC: 0.0 init
2407 12:43:07.237677 GENERIC: 0.0 init finished in 0 msecs
2408 12:43:07.241247 GENERIC: 1.0 init
2409 12:43:07.244554 GENERIC: 1.0 init finished in 0 msecs
2410 12:43:07.247704 Devices initialized
2411 12:43:07.250878 Show all devs... After init.
2412 12:43:07.250953 Root Device: enabled 1
2413 12:43:07.254316 CPU_CLUSTER: 0: enabled 1
2414 12:43:07.257892 DOMAIN: 0000: enabled 1
2415 12:43:07.257965 GPIO: 0: enabled 1
2416 12:43:07.261184 PCI: 00:00.0: enabled 1
2417 12:43:07.264329 PCI: 00:01.0: enabled 0
2418 12:43:07.267488 PCI: 00:01.1: enabled 0
2419 12:43:07.267561 PCI: 00:02.0: enabled 1
2420 12:43:07.271205 PCI: 00:04.0: enabled 1
2421 12:43:07.274215 PCI: 00:05.0: enabled 0
2422 12:43:07.277659 PCI: 00:06.0: enabled 0
2423 12:43:07.277734 PCI: 00:06.2: enabled 0
2424 12:43:07.280831 PCI: 00:07.0: enabled 1
2425 12:43:07.284368 PCI: 00:07.1: enabled 1
2426 12:43:07.284441 PCI: 00:07.2: enabled 1
2427 12:43:07.287410 PCI: 00:07.3: enabled 0
2428 12:43:07.290995 PCI: 00:08.0: enabled 0
2429 12:43:07.294224 PCI: 00:09.0: enabled 0
2430 12:43:07.294299 PCI: 00:0a.0: enabled 1
2431 12:43:07.297641 PCI: 00:0d.0: enabled 1
2432 12:43:07.300638 PCI: 00:0d.1: enabled 0
2433 12:43:07.304340 PCI: 00:0d.2: enabled 1
2434 12:43:07.304414 PCI: 00:0d.3: enabled 1
2435 12:43:07.307370 PCI: 00:0e.0: enabled 0
2436 12:43:07.310666 PCI: 00:10.0: enabled 0
2437 12:43:07.314040 PCI: 00:10.1: enabled 0
2438 12:43:07.314118 PCI: 00:10.6: enabled 0
2439 12:43:07.317330 PCI: 00:10.7: enabled 0
2440 12:43:07.320755 PCI: 00:12.0: enabled 0
2441 12:43:07.324057 PCI: 00:12.6: enabled 0
2442 12:43:07.324130 PCI: 00:12.7: enabled 0
2443 12:43:07.327318 PCI: 00:13.0: enabled 0
2444 12:43:07.330627 PCI: 00:14.0: enabled 1
2445 12:43:07.330701 PCI: 00:14.1: enabled 0
2446 12:43:07.334231 PCI: 00:14.2: enabled 1
2447 12:43:07.337598 PCI: 00:14.3: enabled 1
2448 12:43:07.340712 PCI: 00:15.0: enabled 1
2449 12:43:07.340786 PCI: 00:15.1: enabled 1
2450 12:43:07.343930 PCI: 00:15.2: enabled 0
2451 12:43:07.347171 PCI: 00:15.3: enabled 0
2452 12:43:07.350782 PCI: 00:16.0: enabled 1
2453 12:43:07.350857 PCI: 00:16.1: enabled 0
2454 12:43:07.353914 PCI: 00:16.2: enabled 0
2455 12:43:07.357282 PCI: 00:16.3: enabled 0
2456 12:43:07.360796 PCI: 00:16.4: enabled 0
2457 12:43:07.360871 PCI: 00:16.5: enabled 0
2458 12:43:07.363944 PCI: 00:17.0: enabled 0
2459 12:43:07.367279 PCI: 00:19.0: enabled 0
2460 12:43:07.367353 PCI: 00:19.1: enabled 0
2461 12:43:07.370474 PCI: 00:19.2: enabled 0
2462 12:43:07.373756 PCI: 00:1a.0: enabled 0
2463 12:43:07.377361 PCI: 00:1c.0: enabled 0
2464 12:43:07.377435 PCI: 00:1c.1: enabled 0
2465 12:43:07.380432 PCI: 00:1c.2: enabled 0
2466 12:43:07.383899 PCI: 00:1c.3: enabled 0
2467 12:43:07.387249 PCI: 00:1c.4: enabled 0
2468 12:43:07.387322 PCI: 00:1c.5: enabled 1
2469 12:43:07.390361 PCI: 00:1c.0: enabled 1
2470 12:43:07.394359 PCI: 00:1c.7: enabled 1
2471 12:43:07.397439 PCI: 00:1d.0: enabled 0
2472 12:43:07.397520 PCI: 00:1d.1: enabled 0
2473 12:43:07.400846 PCI: 00:1d.2: enabled 0
2474 12:43:07.403763 PCI: 00:1d.0: enabled 1
2475 12:43:07.406964 PCI: 00:1e.0: enabled 1
2476 12:43:07.407045 PCI: 00:1e.1: enabled 0
2477 12:43:07.410497 PCI: 00:1e.2: enabled 0
2478 12:43:07.413575 PCI: 00:1e.3: enabled 1
2479 12:43:07.413649 PCI: 00:1f.0: enabled 1
2480 12:43:07.416915 PCI: 00:1f.1: enabled 0
2481 12:43:07.420293 PCI: 00:1f.2: enabled 1
2482 12:43:07.423571 PCI: 00:1f.3: enabled 1
2483 12:43:07.423644 PCI: 00:1f.4: enabled 1
2484 12:43:07.427002 PCI: 00:1f.5: enabled 1
2485 12:43:07.430504 PCI: 00:1f.6: enabled 0
2486 12:43:07.433824 PCI: 00:1f.7: enabled 0
2487 12:43:07.433897 GENERIC: 0.0: enabled 1
2488 12:43:07.437087 GENERIC: 0.0: enabled 1
2489 12:43:07.440538 GENERIC: 1.0: enabled 1
2490 12:43:07.443639 GENERIC: 0.0: enabled 1
2491 12:43:07.443713 GENERIC: 1.0: enabled 1
2492 12:43:07.446981 USB0 port 0: enabled 1
2493 12:43:07.450302 GENERIC: 0.0: enabled 1
2494 12:43:07.450377 GENERIC: 0.0: enabled 1
2495 12:43:07.453808 USB0 port 0: enabled 1
2496 12:43:07.457307 GENERIC: 0.0: enabled 1
2497 12:43:07.460165 I2C: 00:1a: enabled 1
2498 12:43:07.460239 I2C: 00:50: enabled 1
2499 12:43:07.463681 PCI: 00:00.0: enabled 1
2500 12:43:07.466757 PCI: 82:00.0: enabled 1
2501 12:43:07.466833 GENERIC: 0.0: enabled 1
2502 12:43:07.470012 GENERIC: 0.0: enabled 1
2503 12:43:07.473415 PNP: 0c09.0: enabled 1
2504 12:43:07.476948 GENERIC: 0.0: enabled 1
2505 12:43:07.477023 USB3 port 0: enabled 1
2506 12:43:07.480513 USB3 port 1: enabled 0
2507 12:43:07.483598 USB3 port 2: enabled 1
2508 12:43:07.483672 USB3 port 3: enabled 0
2509 12:43:07.486818 USB2 port 0: enabled 1
2510 12:43:07.490115 USB2 port 1: enabled 0
2511 12:43:07.493382 USB2 port 2: enabled 1
2512 12:43:07.493454 USB2 port 3: enabled 1
2513 12:43:07.496725 USB2 port 4: enabled 1
2514 12:43:07.500049 USB2 port 5: enabled 1
2515 12:43:07.500121 USB2 port 6: enabled 1
2516 12:43:07.503544 USB2 port 7: enabled 1
2517 12:43:07.506597 USB2 port 8: enabled 0
2518 12:43:07.506670 USB2 port 9: enabled 1
2519 12:43:07.509974 USB3 port 0: enabled 1
2520 12:43:07.513449 USB3 port 1: enabled 1
2521 12:43:07.516762 USB3 port 2: enabled 1
2522 12:43:07.516835 USB3 port 3: enabled 1
2523 12:43:07.519813 GENERIC: 0.0: enabled 1
2524 12:43:07.523532 GENERIC: 1.0: enabled 1
2525 12:43:07.523606 APIC: 00: enabled 1
2526 12:43:07.526816 APIC: 12: enabled 1
2527 12:43:07.530017 APIC: 14: enabled 1
2528 12:43:07.530090 APIC: 16: enabled 1
2529 12:43:07.533165 APIC: 10: enabled 1
2530 12:43:07.533246 NONE: enabled 1
2531 12:43:07.536770 NONE: enabled 1
2532 12:43:07.536843 NONE: enabled 1
2533 12:43:07.539910 PCI: 83:00.0: enabled 1
2534 12:43:07.543223 PCI: 84:00.0: enabled 1
2535 12:43:07.550006 BS: BS_DEV_INIT run times (exec / console): 6 / 1157 ms
2536 12:43:07.553306 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2537 12:43:07.556526 ELOG: NV offset 0xf20000 size 0x4000
2538 12:43:07.564332 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2539 12:43:07.570943 ELOG: Event(17) added with size 13 at 2024-03-05 12:43:07 UTC
2540 12:43:07.577668 ELOG: Event(9E) added with size 10 at 2024-03-05 12:43:07 UTC
2541 12:43:07.584672 ELOG: Event(9F) added with size 14 at 2024-03-05 12:43:07 UTC
2542 12:43:07.590977 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2543 12:43:07.597690 ELOG: Event(A0) added with size 9 at 2024-03-05 12:43:07 UTC
2544 12:43:07.600990 elog_add_boot_reason: Logged dev mode boot
2545 12:43:07.607374 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2546 12:43:07.607449 Finalize devices...
2547 12:43:07.610781 PCI: 00:16.0 final
2548 12:43:07.613987 CSE RW Firmware Version: 16.1.25.2049
2549 12:43:07.617529 PCI: 00:1f.2 final
2550 12:43:07.617617 PCI: 00:1f.4 final
2551 12:43:07.620874 GENERIC: 0.0 final
2552 12:43:07.627255 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2553 12:43:07.627328 GENERIC: 1.0 final
2554 12:43:07.633926 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2555 12:43:07.637324 Devices finalized
2556 12:43:07.640699 BS: BS_POST_DEVICE run times (exec / console): 0 / 30 ms
2557 12:43:07.647219 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2558 12:43:07.653922 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2559 12:43:07.657596 ME: HFSTS1 : 0x90000245
2560 12:43:07.661070 ME: HFSTS2 : 0x32850116
2561 12:43:07.667241 ME: HFSTS3 : 0x00000050
2562 12:43:07.670620 ME: HFSTS4 : 0x00004000
2563 12:43:07.673848 ME: HFSTS5 : 0x00000000
2564 12:43:07.680538 ME: HFSTS6 : 0x40600006
2565 12:43:07.683659 ME: Manufacturing Mode : NO
2566 12:43:07.687165 ME: SPI Protection Mode Enabled : YES
2567 12:43:07.690354 ME: FPFs Committed : YES
2568 12:43:07.693647 ME: Manufacturing Vars Locked : YES
2569 12:43:07.700485 ME: FW Partition Table : OK
2570 12:43:07.703803 ME: Bringup Loader Failure : NO
2571 12:43:07.706919 ME: Firmware Init Complete : YES
2572 12:43:07.710288 ME: Boot Options Present : NO
2573 12:43:07.713777 ME: Update In Progress : NO
2574 12:43:07.717084 ME: D0i3 Support : YES
2575 12:43:07.720311 ME: Low Power State Enabled : NO
2576 12:43:07.723537 ME: CPU Replaced : YES
2577 12:43:07.730371 ME: CPU Replacement Valid : YES
2578 12:43:07.733502 ME: Current Working State : 5
2579 12:43:07.736806 ME: Current Operation State : 1
2580 12:43:07.740170 ME: Current Operation Mode : 0
2581 12:43:07.743610 ME: Error Code : 0
2582 12:43:07.746975 ME: Enhanced Debug Mode : NO
2583 12:43:07.750340 ME: CPU Debug Disabled : YES
2584 12:43:07.753546 ME: TXT Support : NO
2585 12:43:07.756775 ME: WP for RO is enabled : YES
2586 12:43:07.763429 ME: RO write protection scope - Start=0x1000, End=0x1A6FFF
2587 12:43:07.769964 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2588 12:43:07.773417 Ramoops buffer: 0x100000@0x76898000.
2589 12:43:07.779993 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2590 12:43:07.786530 CBFS: Found 'fallback/dsdt.aml' @0x799c0 size 0x4f3a in mcache @0x76add16c
2591 12:43:07.789999 CBFS: 'fallback/slic' not found.
2592 12:43:07.793465 ACPI: Writing ACPI tables at 7686c000.
2593 12:43:07.796744 ACPI: * FACS
2594 12:43:07.796818 ACPI: * DSDT
2595 12:43:07.802912 PCI space above 4GB MMIO is at 0x17fc00000, len = 0x7e80400000
2596 12:43:07.808430 ACPI: * FADT
2597 12:43:07.808506 SCI is IRQ9
2598 12:43:07.815254 ACPI: added table 1/32, length now 40
2599 12:43:07.815328 ACPI: * SSDT
2600 12:43:07.821747 Found 1 CPU(s) with 5/5 physical/logical core(s) each.
2601 12:43:07.824904 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2602 12:43:07.831452 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2603 12:43:07.834718 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2604 12:43:07.841359 \_SB.PCI0.TRP0: Intel USB4 PCIe Root Port at PCI: 00:07.0
2605 12:43:07.844540 \_SB.PCI0.TRP1: Intel USB4 PCIe Root Port at PCI: 00:07.1
2606 12:43:07.851306 \_SB.PCI0.TRP2: Intel USB4 PCIe Root Port at PCI: 00:07.2
2607 12:43:07.854807 USB Type-C 0 mapped to EC port 0
2608 12:43:07.861405 usb4_retimer_fill_ssdt: No DFP1 power GPIO for GENERIC: 0.0
2609 12:43:07.864554 \_SB.PCI0.TDM0.HR: Intel USB4 Retimer at GENERIC: 0.0
2610 12:43:07.867851 USB Type-C 2 mapped to EC port 1
2611 12:43:07.874807 usb4_retimer_fill_ssdt: No DFP1 power GPIO for GENERIC: 0.0
2612 12:43:07.881067 \_SB.PCI0.TDM1.HR: Intel USB4 Retimer at GENERIC: 0.0
2613 12:43:07.884688 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2614 12:43:07.891305 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2615 12:43:07.894428 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2616 12:43:07.901076 \_SB.PCI0.RP01.RLTK.RLTK: Realtek r8168 PCI: 82:00.0
2617 12:43:07.907878 \_SB.PCI0.RP08: Enable RTD3 for PCI: 00:1c.7 (Intel PCIe Runtime D3)
2618 12:43:07.914243 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
2619 12:43:07.917720 \_SB.PCI0.RP09: Added StorageD3Enable property
2620 12:43:07.922963 EC returned error result code 1
2621 12:43:07.929570 PS2K: Bad resp from EC. Vivaldi disabled!
2622 12:43:07.936117 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2623 12:43:07.942603 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C2 (MLB) at USB3 port 2
2624 12:43:07.949563 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2625 12:43:07.956117 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C2 (MLB) at USB2 port 2
2626 12:43:07.962826 \_SB.PCI0.XHCI.RHUB.HS04: USB2 Type-A Port A4 (MLB) at USB2 port 3
2627 12:43:07.966201 \_SB.PCI0.XHCI.RHUB.HS05: USB2 NFC at USB2 port 4
2628 12:43:07.972696 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Type-A Port A3 (MLB) at USB2 port 5
2629 12:43:07.979205 \_SB.PCI0.XHCI.RHUB.HS07: USB2 Type-A Port A2 (MLB) at USB2 port 6
2630 12:43:07.985962 \_SB.PCI0.XHCI.RHUB.HS08: USB2 Type-A Port A1 (MLB) at USB2 port 7
2631 12:43:07.992571 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2632 12:43:07.999278 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A1 (MLB) at USB3 port 0
2633 12:43:08.006030 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A2 (MLB) at USB3 port 1
2634 12:43:08.012744 \_SB.PCI0.XHCI.RHUB.SS03: USB3 Type-A Port A3 (MLB) at USB3 port 2
2635 12:43:08.019323 \_SB.PCI0.XHCI.RHUB.SS04: USB3 Type-A Port A4 (MLB) at USB3 port 3
2636 12:43:08.025800 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2637 12:43:08.032415 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2638 12:43:08.035694 ACPI: added table 2/32, length now 44
2639 12:43:08.035772 ACPI: * MCFG
2640 12:43:08.042570 ACPI: added table 3/32, length now 48
2641 12:43:08.042645 ACPI: * TPM2
2642 12:43:08.045783 TPM2 log created at 0x7685c000
2643 12:43:08.049170 ACPI: added table 4/32, length now 52
2644 12:43:08.052423 ACPI: * LPIT
2645 12:43:08.055978 ACPI: added table 5/32, length now 56
2646 12:43:08.056049 ACPI: * MADT
2647 12:43:08.058935 SCI is IRQ9
2648 12:43:08.062382 ACPI: added table 6/32, length now 60
2649 12:43:08.065483 cmd_reg from pmc_make_ipc_cmd 1052838
2650 12:43:08.072410 CL PMC desc table: numb of regions is 0x2 at addr 0x808ca1bc
2651 12:43:08.078914 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2652 12:43:08.085721 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2653 12:43:08.088921 PMC CrashLog size in discovery mode: 0xC00
2654 12:43:08.092360 cpu crashlog bar addr: 0x808C0000
2655 12:43:08.095512 cpu discovery table offset: 0x6030
2656 12:43:08.098843 cpu_crashlog_discovery_table buffer count: 0x3
2657 12:43:08.105677 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2658 12:43:08.112413 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2659 12:43:08.118877 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2660 12:43:08.125930 PMC crashLog size in discovery mode : 0xC00
2661 12:43:08.131929 Invalid data 0x0 at offset 0x2200 from addr 0x808c8000 of PMC SRAM.
2662 12:43:08.135407 discover mode PMC crashlog size adjusted to: 0x200
2663 12:43:08.142060 Invalid data 0x0 at offset 0x3e00 from addr 0x808c8000 of PMC SRAM.
2664 12:43:08.148784 discover mode PMC crashlog size adjusted to: 0x0
2665 12:43:08.151995 m_cpu_crashLog_size : 0x3480 bytes
2666 12:43:08.155188 CPU crashLog present.
2667 12:43:08.158556 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2668 12:43:08.165233 Invalid data 0x0 at offset 0x0 from addr 0x808c0000 of telemetry SRAM.
2669 12:43:08.168757 current = 76875cf0
2670 12:43:08.168831 ACPI: * DMAR
2671 12:43:08.171859 ACPI: added table 7/32, length now 64
2672 12:43:08.178367 ACPI: added table 8/32, length now 68
2673 12:43:08.178443 ACPI: * HPET
2674 12:43:08.182063 ACPI: added table 9/32, length now 72
2675 12:43:08.185365 ACPI: done.
2676 12:43:08.185439 ACPI tables: 40480 bytes.
2677 12:43:08.188514 smbios_write_tables: 76856000
2678 12:43:08.191864 EC returned error result code 3
2679 12:43:08.195299 Couldn't obtain OEM name from CBI
2680 12:43:08.198672 Create SMBIOS type 16
2681 12:43:08.201826 Create SMBIOS type 17
2682 12:43:08.205273 Create SMBIOS type 20
2683 12:43:08.205348 GENERIC: 0.0 (WIFI Device)
2684 12:43:08.208735 SMBIOS tables: 982 bytes.
2685 12:43:08.212125 Writing table forward entry at 0x00000500
2686 12:43:08.218644 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 8955
2687 12:43:08.222226 Writing coreboot table at 0x76890000
2688 12:43:08.228649 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2689 12:43:08.231874 1. 0000000000001000-000000000009ffff: RAM
2690 12:43:08.238501 2. 00000000000a0000-00000000000fffff: RESERVED
2691 12:43:08.241739 3. 0000000000100000-0000000076855fff: RAM
2692 12:43:08.248359 4. 0000000076856000-0000000076a2dfff: CONFIGURATION TABLES
2693 12:43:08.252000 5. 0000000076a2e000-0000000076ab7fff: RAMSTAGE
2694 12:43:08.258273 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2695 12:43:08.265044 7. 0000000077000000-00000000803fffff: RESERVED
2696 12:43:08.268398 8. 00000000c0000000-00000000cfffffff: RESERVED
2697 12:43:08.275270 9. 00000000f8000000-00000000f9ffffff: RESERVED
2698 12:43:08.278731 10. 00000000fb000000-00000000fb000fff: RESERVED
2699 12:43:08.281787 11. 00000000fc800000-00000000fe7fffff: RESERVED
2700 12:43:08.288405 12. 00000000feb00000-00000000feb7ffff: RESERVED
2701 12:43:08.291740 13. 00000000fec00000-00000000fecfffff: RESERVED
2702 12:43:08.298313 14. 00000000fed40000-00000000fed6ffff: RESERVED
2703 12:43:08.301858 15. 00000000fed80000-00000000fed87fff: RESERVED
2704 12:43:08.308352 16. 00000000fed90000-00000000fed92fff: RESERVED
2705 12:43:08.311803 17. 00000000feda0000-00000000feda1fff: RESERVED
2706 12:43:08.318337 18. 00000000fedc0000-00000000feddffff: RESERVED
2707 12:43:08.321418 19. 0000000100000000-000000017fbfffff: RAM
2708 12:43:08.324956 Passing 4 GPIOs to payload:
2709 12:43:08.328418 NAME | PORT | POLARITY | VALUE
2710 12:43:08.334852 lid | undefined | high | high
2711 12:43:08.338280 power | undefined | high | low
2712 12:43:08.344815 oprom | undefined | high | low
2713 12:43:08.351490 EC in RW | 0x00000151 | high | high
2714 12:43:08.351569 Board ID: 3
2715 12:43:08.351621 FW config: 0x64
2716 12:43:08.358322 Wrote coreboot table at: 0x76890000, 0x6e4 bytes, checksum 4221
2717 12:43:08.361327 coreboot table: 1788 bytes.
2718 12:43:08.364907 IMD ROOT 0. 0x76fff000 0x00001000
2719 12:43:08.368175 IMD SMALL 1. 0x76ffe000 0x00001000
2720 12:43:08.374856 FSP MEMORY 2. 0x76afe000 0x00500000
2721 12:43:08.378275 CONSOLE 3. 0x76ade000 0x00020000
2722 12:43:08.381437 RW MCACHE 4. 0x76add000 0x00000464
2723 12:43:08.384754 RO MCACHE 5. 0x76adc000 0x00001000
2724 12:43:08.388168 FMAP 6. 0x76adb000 0x0000064a
2725 12:43:08.391538 TIME STAMP 7. 0x76ada000 0x00000910
2726 12:43:08.395207 VBOOT WORK 8. 0x76ac6000 0x00014000
2727 12:43:08.398335 MEM INFO 9. 0x76ac5000 0x000003b8
2728 12:43:08.405154 ROMSTG STCK10. 0x76ac4000 0x00001000
2729 12:43:08.408549 AFTER CAR 11. 0x76ab8000 0x0000c000
2730 12:43:08.411866 RAMSTAGE 12. 0x76a2d000 0x0008b000
2731 12:43:08.415058 ACPI BERT 13. 0x76a1d000 0x00010000
2732 12:43:08.418290 CHROMEOS NVS14. 0x76a1c000 0x00000f00
2733 12:43:08.421725 REFCODE 15. 0x769ad000 0x0006f000
2734 12:43:08.425303 SMM BACKUP 16. 0x7699d000 0x00010000
2735 12:43:08.428409 IGD OPREGION17. 0x76998000 0x000041fd
2736 12:43:08.435058 RAMOOPS 18. 0x76898000 0x00100000
2737 12:43:08.438262 COREBOOT 19. 0x76890000 0x00008000
2738 12:43:08.441587 ACPI 20. 0x7686c000 0x00024000
2739 12:43:08.445246 TPM2 TCGLOG21. 0x7685c000 0x00010000
2740 12:43:08.448640 PMC CRASHLOG22. 0x7685b000 0x00000c00
2741 12:43:08.451832 CPU CRASHLOG23. 0x76857000 0x00003480
2742 12:43:08.455175 SMBIOS 24. 0x76856000 0x00001000
2743 12:43:08.458681 IMD small region:
2744 12:43:08.461919 IMD ROOT 0. 0x76ffec00 0x00000400
2745 12:43:08.465287 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2746 12:43:08.468311 VPD 2. 0x76ffeba0 0x00000032
2747 12:43:08.475233 CSE SPECIFIC INFORMATION 3. 0x76ffeb80 0x00000020
2748 12:43:08.478438 POWER STATE 4. 0x76ffeb20 0x00000044
2749 12:43:08.482517 ROMSTAGE 5. 0x76ffeb00 0x00000004
2750 12:43:08.485203 ACPI GNVS 6. 0x76ffeaa0 0x00000048
2751 12:43:08.492048 TYPE_C INFO 7. 0x76ffea80 0x0000000c
2752 12:43:08.495212 BS: BS_WRITE_TABLES run times (exec / console): 7 / 704 ms
2753 12:43:08.498664 MTRR: Physical address space:
2754 12:43:08.505262 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2755 12:43:08.512163 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2756 12:43:08.518460 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2757 12:43:08.525323 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2758 12:43:08.531742 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2759 12:43:08.538333 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2760 12:43:08.541817 0x0000000100000000 - 0x000000017fc00000 size 0x7fc00000 type 6
2761 12:43:08.548411 0x000000017fc00000 - 0x00000001d3c00000 size 0x54000000 type 0
2762 12:43:08.555057 MTRR: Fixed MSR 0x250 0x0606060606060606
2763 12:43:08.558558 MTRR: Fixed MSR 0x258 0x0606060606060606
2764 12:43:08.561543 MTRR: Fixed MSR 0x259 0x0000000000000000
2765 12:43:08.564969 MTRR: Fixed MSR 0x268 0x0606060606060606
2766 12:43:08.571833 MTRR: Fixed MSR 0x269 0x0606060606060606
2767 12:43:08.574808 MTRR: Fixed MSR 0x26a 0x0606060606060606
2768 12:43:08.578299 MTRR: Fixed MSR 0x26b 0x0606060606060606
2769 12:43:08.581547 MTRR: Fixed MSR 0x26c 0x0606060606060606
2770 12:43:08.588429 MTRR: Fixed MSR 0x26d 0x0606060606060606
2771 12:43:08.591272 MTRR: Fixed MSR 0x26e 0x0606060606060606
2772 12:43:08.594768 MTRR: Fixed MSR 0x26f 0x0606060606060606
2773 12:43:08.598002 call enable_fixed_mtrr()
2774 12:43:08.601262 CPU physical address size: 39 bits
2775 12:43:08.604760 MTRR: default type WB/UC MTRR counts: 13/6.
2776 12:43:08.608389 MTRR: UC selected as default type.
2777 12:43:08.614834 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2778 12:43:08.621324 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2779 12:43:08.627924 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2780 12:43:08.634722 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2781 12:43:08.641214 MTRR: 4 base 0x0000000100000000 mask 0x0000007f80000000 type 6
2782 12:43:08.647731 MTRR: 5 base 0x000000017fc00000 mask 0x0000007fffc00000 type 0
2783 12:43:08.651087 MTRR: Fixed MSR 0x250 0x0606060606060606
2784 12:43:08.654714 MTRR: Fixed MSR 0x258 0x0606060606060606
2785 12:43:08.658041 MTRR: Fixed MSR 0x259 0x0000000000000000
2786 12:43:08.661385 MTRR: Fixed MSR 0x268 0x0606060606060606
2787 12:43:08.668043 MTRR: Fixed MSR 0x269 0x0606060606060606
2788 12:43:08.670981 MTRR: Fixed MSR 0x26a 0x0606060606060606
2789 12:43:08.674382 MTRR: Fixed MSR 0x26b 0x0606060606060606
2790 12:43:08.678042 MTRR: Fixed MSR 0x26c 0x0606060606060606
2791 12:43:08.684397 MTRR: Fixed MSR 0x26d 0x0606060606060606
2792 12:43:08.687788 MTRR: Fixed MSR 0x26e 0x0606060606060606
2793 12:43:08.691182 MTRR: Fixed MSR 0x26f 0x0606060606060606
2794 12:43:08.694439 MTRR: Fixed MSR 0x250 0x0606060606060606
2795 12:43:08.701031 MTRR: Fixed MSR 0x258 0x0606060606060606
2796 12:43:08.704354 MTRR: Fixed MSR 0x259 0x0000000000000000
2797 12:43:08.707541 MTRR: Fixed MSR 0x268 0x0606060606060606
2798 12:43:08.710888 MTRR: Fixed MSR 0x269 0x0606060606060606
2799 12:43:08.717436 MTRR: Fixed MSR 0x26a 0x0606060606060606
2800 12:43:08.720638 MTRR: Fixed MSR 0x26b 0x0606060606060606
2801 12:43:08.724022 MTRR: Fixed MSR 0x26c 0x0606060606060606
2802 12:43:08.727398 MTRR: Fixed MSR 0x26d 0x0606060606060606
2803 12:43:08.734304 MTRR: Fixed MSR 0x26e 0x0606060606060606
2804 12:43:08.737312 MTRR: Fixed MSR 0x26f 0x0606060606060606
2805 12:43:08.740452 call enable_fixed_mtrr()
2806 12:43:08.740524 call enable_fixed_mtrr()
2807 12:43:08.744046 CPU physical address size: 39 bits
2808 12:43:08.746848 CPU physical address size: 39 bits
2809 12:43:08.753764 MTRR: Fixed MSR 0x250 0x0606060606060606
2810 12:43:08.757063 MTRR: Fixed MSR 0x258 0x0606060606060606
2811 12:43:08.760322 MTRR: Fixed MSR 0x259 0x0000000000000000
2812 12:43:08.763669 MTRR: Fixed MSR 0x268 0x0606060606060606
2813 12:43:08.770259 MTRR: Fixed MSR 0x269 0x0606060606060606
2814 12:43:08.773597 MTRR: Fixed MSR 0x26a 0x0606060606060606
2815 12:43:08.776785 MTRR: Fixed MSR 0x26b 0x0606060606060606
2816 12:43:08.780185 MTRR: Fixed MSR 0x26c 0x0606060606060606
2817 12:43:08.786909 MTRR: Fixed MSR 0x26d 0x0606060606060606
2818 12:43:08.790490 MTRR: Fixed MSR 0x26e 0x0606060606060606
2819 12:43:08.793571 MTRR: Fixed MSR 0x26f 0x0606060606060606
2820 12:43:08.796726 MTRR: Fixed MSR 0x250 0x0606060606060606
2821 12:43:08.803599 MTRR: Fixed MSR 0x258 0x0606060606060606
2822 12:43:08.806591 MTRR: Fixed MSR 0x259 0x0000000000000000
2823 12:43:08.810041 MTRR: Fixed MSR 0x268 0x0606060606060606
2824 12:43:08.813413 MTRR: Fixed MSR 0x269 0x0606060606060606
2825 12:43:08.817120 MTRR: Fixed MSR 0x26a 0x0606060606060606
2826 12:43:08.823332 MTRR: Fixed MSR 0x26b 0x0606060606060606
2827 12:43:08.826667 MTRR: Fixed MSR 0x26c 0x0606060606060606
2828 12:43:08.830090 MTRR: Fixed MSR 0x26d 0x0606060606060606
2829 12:43:08.833332 MTRR: Fixed MSR 0x26e 0x0606060606060606
2830 12:43:08.839912 MTRR: Fixed MSR 0x26f 0x0606060606060606
2831 12:43:08.839984 call enable_fixed_mtrr()
2832 12:43:08.843177 call enable_fixed_mtrr()
2833 12:43:08.846590 CPU physical address size: 39 bits
2834 12:43:08.849721 CPU physical address size: 39 bits
2835 12:43:08.849791
2836 12:43:08.853274 MTRR check
2837 12:43:08.853335 Fixed MTRRs : Enabled
2838 12:43:08.856945 Variable MTRRs: Enabled
2839 12:43:08.857004
2840 12:43:08.863109 BS: BS_WRITE_TABLES exit times (exec / console): 140 / 156 ms
2841 12:43:08.866447 Checking cr50 for pending updates
2842 12:43:08.878196 Reading cr50 TPM mode
2843 12:43:08.893577 BS: BS_PAYLOAD_LOAD entry times (exec / console): 17 / 6 ms
2844 12:43:08.903097 CBFS: Found 'fallback/payload' @0x1e0380 size 0x2425e in mcache @0x76add434
2845 12:43:08.906464 Checking segment from ROM address 0xff1f03ac
2846 12:43:08.909632 Checking segment from ROM address 0xff1f03c8
2847 12:43:08.916316 Loading segment from ROM address 0xff1f03ac
2848 12:43:08.916375 code (compression=1)
2849 12:43:08.926326 New segment dstaddr 0x30000000 memsize 0x2665e30 srcaddr 0xff1f03e4 filesize 0x24226
2850 12:43:08.933015 Loading Segment: addr: 0x30000000 memsz: 0x0000000002665e30 filesz: 0x0000000000024226
2851 12:43:08.936434 using LZMA
2852 12:43:08.980380 [ 0x30000000, 3004e1a8, 0x32665e30) <- ff1f03e4
2853 12:43:08.986726 Clearing Segment: addr: 0x000000003004e1a8 memsz: 0x0000000002617c88
2854 12:43:08.997766 Loading segment from ROM address 0xff1f03c8
2855 12:43:09.001373 Entry Point 0x30000000
2856 12:43:09.001431 Loaded segments
2857 12:43:09.007938 BS: BS_PAYLOAD_LOAD run times (exec / console): 45 / 62 ms
2858 12:43:09.011199 coreboot skipped calling FSP notify phase: 00000040.
2859 12:43:09.018197 coreboot skipped calling FSP notify phase: 000000f0.
2860 12:43:09.024404 BS: BS_PAYLOAD_LOAD exit times (exec / console): 0 / 11 ms
2861 12:43:09.024460 Finalizing chipset.
2862 12:43:09.027945 apm_control: Finalizing SMM.
2863 12:43:09.031442 APMC done.
2864 12:43:09.034352 CSE: EOP requested action: continue boot
2865 12:43:09.037811 HECI: CSE device 16.1 is disabled
2866 12:43:09.041015 HECI: CSE device 16.2 is disabled
2867 12:43:09.044577 HECI: CSE device 16.3 is disabled
2868 12:43:09.047619 HECI: CSE device 16.4 is disabled
2869 12:43:09.050774 HECI: CSE device 16.5 is disabled
2870 12:43:09.057698 BS: BS_PAYLOAD_BOOT entry times (exec / console): 1 / 27 ms
2871 12:43:09.061085 mp_park_aps done after 0 msecs.
2872 12:43:09.064489 Jumping to boot code at 0x30000000(0x76890000)
2873 12:43:09.074416 CPU0: stack: 0x76a9a000 - 0x76a9b000, lowest used address 0x76a9a3dc, stack used: 3108 bytes
2874 12:43:09.079860
2875 12:43:09.079933
2876 12:43:09.079984
2877 12:43:09.083343 Starting depthcharge on Moli...
2878 12:43:09.083417
2879 12:43:09.083754 end: 2.2.3 depthcharge-start (duration 00:00:15) [common]
2880 12:43:09.083830 start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
2881 12:43:09.083892 Setting prompt string to ['brask:']
2882 12:43:09.083951 bootloader-commands: Wait for prompt ['brask:'] (timeout 00:04:40)
2883 12:43:09.089700 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2884 12:43:09.089780
2885 12:43:09.097155 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2886 12:43:09.097229
2887 12:43:09.103056 Looking for NVMe Controller 0x30062398 @ 00:06:00
2888 12:43:09.103144
2889 12:43:09.106546 Looking for NVMe Controller 0x30062440 @ 00:1d:00
2890 12:43:09.106621
2891 12:43:09.109734 Wipe memory regions:
2892 12:43:09.109808
2893 12:43:09.113021 [0x00000000001000, 0x000000000a0000)
2894 12:43:09.113095
2895 12:43:09.116460 [0x00000000100000, 0x00000030000000)
2896 12:43:09.484815
2897 12:43:09.487814 [0x00000032665e30, 0x00000076856000)
2898 12:43:10.008922
2899 12:43:10.012134 [0x00000100000000, 0x0000017fc00000)
2900 12:43:10.990173
2901 12:43:10.993698 ec_init: CrosEC protocol v3 supported (256, 256)
2902 12:43:11.425612
2903 12:43:11.425741 R8152: Initializing
2904 12:43:11.425799
2905 12:43:11.429002 Version 6 (ocp_data = 5c30)
2906 12:43:11.429094
2907 12:43:11.432215 R8152: Done initializing
2908 12:43:11.432290
2909 12:43:11.435222 Adding net device
2910 12:43:11.736536
2911 12:43:11.739831 [firmware-brya-14505.B-collabora] Sep 8 2023 15:56:17
2912 12:43:11.740122
2913 12:43:11.740332
2914 12:43:11.740515
2915 12:43:11.741011 Setting prompt string to ['brask:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2917 12:43:11.841758 brask: tftpboot 192.168.201.1 12948308/tftp-deploy-db5ynl4e/kernel/bzImage 12948308/tftp-deploy-db5ynl4e/kernel/cmdline 12948308/tftp-deploy-db5ynl4e/ramdisk/ramdisk.cpio.gz
2918 12:43:11.842187 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2919 12:43:11.842527 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:37)
2920 12:43:11.846528 tftpboot 192.168.201.1 12948308/tftp-deploy-db5ynl4e/kernel/bzIploy-db5ynl4e/kernel/cmdline 12948308/tftp-deploy-db5ynl4e/ramdisk/ramdisk.cpio.gz
2921 12:43:11.846836
2922 12:43:11.847074 Waiting for link
2923 12:43:12.048690
2924 12:43:12.048824 done.
2925 12:43:12.048886
2926 12:43:12.048934 MAC: 00:13:3b:00:0f:bb
2927 12:43:12.048980
2928 12:43:12.052327 Sending DHCP discover... done.
2929 12:43:12.052410
2930 12:43:12.055557 Waiting for reply... done.
2931 12:43:12.055633
2932 12:43:12.058653 Sending DHCP request... done.
2933 12:43:12.058730
2934 12:43:12.062379 Waiting for reply... done.
2935 12:43:12.062455
2936 12:43:12.065374 My ip is 192.168.201.196
2937 12:43:12.065456
2938 12:43:12.068791 The DHCP server ip is 192.168.201.1
2939 12:43:12.068868
2940 12:43:12.072322 TFTP server IP predefined by user: 192.168.201.1
2941 12:43:12.072401
2942 12:43:12.078405 Bootfile predefined by user: 12948308/tftp-deploy-db5ynl4e/kernel/bzImage
2943 12:43:12.078490
2944 12:43:12.082068 Sending tftp read request... done.
2945 12:43:12.085290
2946 12:43:12.089036 Waiting for the transfer...
2947 12:43:12.089109
2948 12:43:12.620544 00000000 ################################################################
2949 12:43:12.620679
2950 12:43:13.150253 00080000 ################################################################
2951 12:43:13.150398
2952 12:43:13.684541 00100000 ################################################################
2953 12:43:13.684679
2954 12:43:14.219140 00180000 ################################################################
2955 12:43:14.219276
2956 12:43:14.747366 00200000 ################################################################
2957 12:43:14.747500
2958 12:43:15.267836 00280000 ################################################################
2959 12:43:15.267992
2960 12:43:15.810413 00300000 ################################################################
2961 12:43:15.810549
2962 12:43:16.334191 00380000 ################################################################
2963 12:43:16.334351
2964 12:43:16.851207 00400000 ################################################################
2965 12:43:16.851344
2966 12:43:17.368766 00480000 ################################################################
2967 12:43:17.368901
2968 12:43:17.892561 00500000 ################################################################
2969 12:43:17.892733
2970 12:43:18.413049 00580000 ################################################################
2971 12:43:18.413188
2972 12:43:18.931859 00600000 ################################################################
2973 12:43:18.931995
2974 12:43:19.445474 00680000 ################################################################
2975 12:43:19.445611
2976 12:43:19.959568 00700000 ################################################################
2977 12:43:19.959703
2978 12:43:20.475897 00780000 ################################################################
2979 12:43:20.476051
2980 12:43:20.992269 00800000 ################################################################
2981 12:43:20.992422
2982 12:43:21.447540 00880000 ######################################################## done.
2983 12:43:21.447670
2984 12:43:21.450770 The bootfile was 9367440 bytes long.
2985 12:43:21.450853
2986 12:43:21.454096 Sending tftp read request... done.
2987 12:43:21.454173
2988 12:43:21.457165 Waiting for the transfer...
2989 12:43:21.457239
2990 12:43:21.984169 00000000 ################################################################
2991 12:43:21.984306
2992 12:43:22.513272 00080000 ################################################################
2993 12:43:22.513404
2994 12:43:23.054796 00100000 ################################################################
2995 12:43:23.054940
2996 12:43:23.576088 00180000 ################################################################
2997 12:43:23.576224
2998 12:43:24.108203 00200000 ################################################################
2999 12:43:24.108333
3000 12:43:24.653235 00280000 ################################################################
3001 12:43:24.653384
3002 12:43:25.191573 00300000 ################################################################
3003 12:43:25.191714
3004 12:43:25.733914 00380000 ################################################################
3005 12:43:25.734078
3006 12:43:26.264152 00400000 ################################################################
3007 12:43:26.264288
3008 12:43:26.802119 00480000 ################################################################
3009 12:43:26.802257
3010 12:43:27.342696 00500000 ################################################################
3011 12:43:27.342831
3012 12:43:27.927579 00580000 ################################################################
3013 12:43:27.927952
3014 12:43:28.509978 00600000 ################################################################
3015 12:43:28.510117
3016 12:43:29.048843 00680000 ################################################################
3017 12:43:29.048968
3018 12:43:29.553447 00700000 ################################################################
3019 12:43:29.553581
3020 12:43:30.061192 00780000 ################################################################
3021 12:43:30.061313
3022 12:43:30.485768 00800000 ###################################################### done.
3023 12:43:30.485900
3024 12:43:30.489093 Sending tftp read request... done.
3025 12:43:30.489155
3026 12:43:30.492346 Waiting for the transfer...
3027 12:43:30.492402
3028 12:43:30.492448 00000000 # done.
3029 12:43:30.492495
3030 12:43:30.502513 Command line loaded dynamically from TFTP file: 12948308/tftp-deploy-db5ynl4e/kernel/cmdline
3031 12:43:30.502607
3032 12:43:30.519052 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
3033 12:43:30.524681
3034 12:43:30.528046 Shutting down all USB controllers.
3035 12:43:30.528122
3036 12:43:30.528176 Removing current net device
3037 12:43:30.528224
3038 12:43:30.531316 Finalizing coreboot
3039 12:43:30.531391
3040 12:43:30.538022 Exiting depthcharge with code 4 at timestamp: 33149874
3041 12:43:30.538097
3042 12:43:30.538151
3043 12:43:30.538197 Starting kernel ...
3044 12:43:30.538242
3045 12:43:30.538287
3046 12:43:30.538606 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
3047 12:43:30.538681 start: 2.2.5 auto-login-action (timeout 00:04:18) [common]
3048 12:43:30.538738 Setting prompt string to ['Linux version [0-9]']
3049 12:43:30.538790 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
3050 12:43:30.538844 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
3052 12:47:48.539546 end: 2.2.5 auto-login-action (duration 00:04:18) [common]
3054 12:47:48.540332 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 258 seconds'
3056 12:47:48.540870 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
3059 12:47:48.541748 end: 2 depthcharge-action (duration 00:05:00) [common]
3061 12:47:48.542481 Cleaning after the job
3062 12:47:48.542777 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12948308/tftp-deploy-db5ynl4e/ramdisk
3063 12:47:48.543607 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12948308/tftp-deploy-db5ynl4e/kernel
3064 12:47:48.544418 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12948308/tftp-deploy-db5ynl4e/modules
3065 12:47:48.544650 start: 5.1 power-off (timeout 00:00:30) [common]
3066 12:47:48.544794 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-chromebox-cxi5-brask-cbg-4' '--port=1' '--command=off'
3067 12:47:48.625303 >> Command sent successfully.
3068 12:47:48.632560 Returned 0 in 0 seconds
3069 12:47:48.733283 end: 5.1 power-off (duration 00:00:00) [common]
3071 12:47:48.733566 start: 5.2 read-feedback (timeout 00:10:00) [common]
3072 12:47:48.733752 Listened to connection for namespace 'common' for up to 1s
3073 12:47:49.734739 Finalising connection for namespace 'common'
3074 12:47:49.734904 Disconnecting from shell: Finalise
3075 12:47:49.734990
3076 12:47:49.835308 end: 5.2 read-feedback (duration 00:00:01) [common]
3077 12:47:49.835509 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12948308
3078 12:47:49.843857 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12948308
3079 12:47:49.844029 JobError: Your job cannot terminate cleanly.