Boot log: dell-latitude-5400-4305U-sarien
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 12:45:20.619583 lava-dispatcher, installed at version: 2024.01
2 12:45:20.619812 start: 0 validate
3 12:45:20.619954 Start time: 2024-03-05 12:45:20.619946+00:00 (UTC)
4 12:45:20.620087 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:45:20.620224 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 12:45:20.887129 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:45:20.887305 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2247-g140bf69dc64d%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:45:25.891286 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:45:25.891490 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2247-g140bf69dc64d%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 12:45:26.151195 validate duration: 5.53
12 12:45:26.151459 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:45:26.151562 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:45:26.151664 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:45:26.151794 Not decompressing ramdisk as can be used compressed.
16 12:45:26.151880 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 12:45:26.151948 saving as /var/lib/lava/dispatcher/tmp/12948302/tftp-deploy-xxxrsyyr/ramdisk/rootfs.cpio.gz
18 12:45:26.152014 total size: 8418130 (8 MB)
19 12:45:26.663043 progress 0 % (0 MB)
20 12:45:26.665489 progress 5 % (0 MB)
21 12:45:26.667805 progress 10 % (0 MB)
22 12:45:26.670083 progress 15 % (1 MB)
23 12:45:26.672477 progress 20 % (1 MB)
24 12:45:26.674741 progress 25 % (2 MB)
25 12:45:26.677100 progress 30 % (2 MB)
26 12:45:26.679261 progress 35 % (2 MB)
27 12:45:26.681585 progress 40 % (3 MB)
28 12:45:26.684004 progress 45 % (3 MB)
29 12:45:26.686304 progress 50 % (4 MB)
30 12:45:26.688597 progress 55 % (4 MB)
31 12:45:26.690954 progress 60 % (4 MB)
32 12:45:26.693154 progress 65 % (5 MB)
33 12:45:26.695382 progress 70 % (5 MB)
34 12:45:26.697941 progress 75 % (6 MB)
35 12:45:26.700420 progress 80 % (6 MB)
36 12:45:26.702785 progress 85 % (6 MB)
37 12:45:26.705115 progress 90 % (7 MB)
38 12:45:26.707388 progress 95 % (7 MB)
39 12:45:26.709510 progress 100 % (8 MB)
40 12:45:26.709743 8 MB downloaded in 0.56 s (14.39 MB/s)
41 12:45:26.709901 end: 1.1.1 http-download (duration 00:00:01) [common]
43 12:45:26.710139 end: 1.1 download-retry (duration 00:00:01) [common]
44 12:45:26.710228 start: 1.2 download-retry (timeout 00:09:59) [common]
45 12:45:26.710313 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 12:45:26.710450 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2247-g140bf69dc64d/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 12:45:26.710521 saving as /var/lib/lava/dispatcher/tmp/12948302/tftp-deploy-xxxrsyyr/kernel/bzImage
48 12:45:26.710582 total size: 9367440 (8 MB)
49 12:45:26.710643 No compression specified
50 12:45:26.711817 progress 0 % (0 MB)
51 12:45:26.714518 progress 5 % (0 MB)
52 12:45:26.717030 progress 10 % (0 MB)
53 12:45:26.719518 progress 15 % (1 MB)
54 12:45:26.722144 progress 20 % (1 MB)
55 12:45:26.724611 progress 25 % (2 MB)
56 12:45:26.727114 progress 30 % (2 MB)
57 12:45:26.729740 progress 35 % (3 MB)
58 12:45:26.732194 progress 40 % (3 MB)
59 12:45:26.734658 progress 45 % (4 MB)
60 12:45:26.737151 progress 50 % (4 MB)
61 12:45:26.739755 progress 55 % (4 MB)
62 12:45:26.742194 progress 60 % (5 MB)
63 12:45:26.744608 progress 65 % (5 MB)
64 12:45:26.747229 progress 70 % (6 MB)
65 12:45:26.749685 progress 75 % (6 MB)
66 12:45:26.752103 progress 80 % (7 MB)
67 12:45:26.754490 progress 85 % (7 MB)
68 12:45:26.757083 progress 90 % (8 MB)
69 12:45:26.759550 progress 95 % (8 MB)
70 12:45:26.761996 progress 100 % (8 MB)
71 12:45:26.762224 8 MB downloaded in 0.05 s (173.00 MB/s)
72 12:45:26.762370 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:45:26.762598 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:45:26.762690 start: 1.3 download-retry (timeout 00:09:59) [common]
76 12:45:26.762775 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 12:45:26.762921 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2247-g140bf69dc64d/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 12:45:26.762989 saving as /var/lib/lava/dispatcher/tmp/12948302/tftp-deploy-xxxrsyyr/modules/modules.tar
79 12:45:26.763050 total size: 251176 (0 MB)
80 12:45:26.763112 Using unxz to decompress xz
81 12:45:26.767362 progress 13 % (0 MB)
82 12:45:26.767783 progress 26 % (0 MB)
83 12:45:26.768029 progress 39 % (0 MB)
84 12:45:26.769645 progress 52 % (0 MB)
85 12:45:26.771550 progress 65 % (0 MB)
86 12:45:26.773519 progress 78 % (0 MB)
87 12:45:26.775395 progress 91 % (0 MB)
88 12:45:26.777257 progress 100 % (0 MB)
89 12:45:26.782875 0 MB downloaded in 0.02 s (12.09 MB/s)
90 12:45:26.783114 end: 1.3.1 http-download (duration 00:00:00) [common]
92 12:45:26.783388 end: 1.3 download-retry (duration 00:00:00) [common]
93 12:45:26.783482 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 12:45:26.783593 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 12:45:26.783678 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 12:45:26.783766 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 12:45:26.783985 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12948302/lava-overlay-q5430r8e
98 12:45:26.784125 makedir: /var/lib/lava/dispatcher/tmp/12948302/lava-overlay-q5430r8e/lava-12948302/bin
99 12:45:26.784231 makedir: /var/lib/lava/dispatcher/tmp/12948302/lava-overlay-q5430r8e/lava-12948302/tests
100 12:45:26.784376 makedir: /var/lib/lava/dispatcher/tmp/12948302/lava-overlay-q5430r8e/lava-12948302/results
101 12:45:26.784496 Creating /var/lib/lava/dispatcher/tmp/12948302/lava-overlay-q5430r8e/lava-12948302/bin/lava-add-keys
102 12:45:26.784647 Creating /var/lib/lava/dispatcher/tmp/12948302/lava-overlay-q5430r8e/lava-12948302/bin/lava-add-sources
103 12:45:26.784785 Creating /var/lib/lava/dispatcher/tmp/12948302/lava-overlay-q5430r8e/lava-12948302/bin/lava-background-process-start
104 12:45:26.784920 Creating /var/lib/lava/dispatcher/tmp/12948302/lava-overlay-q5430r8e/lava-12948302/bin/lava-background-process-stop
105 12:45:26.785051 Creating /var/lib/lava/dispatcher/tmp/12948302/lava-overlay-q5430r8e/lava-12948302/bin/lava-common-functions
106 12:45:26.785181 Creating /var/lib/lava/dispatcher/tmp/12948302/lava-overlay-q5430r8e/lava-12948302/bin/lava-echo-ipv4
107 12:45:26.785310 Creating /var/lib/lava/dispatcher/tmp/12948302/lava-overlay-q5430r8e/lava-12948302/bin/lava-install-packages
108 12:45:26.785440 Creating /var/lib/lava/dispatcher/tmp/12948302/lava-overlay-q5430r8e/lava-12948302/bin/lava-installed-packages
109 12:45:26.785568 Creating /var/lib/lava/dispatcher/tmp/12948302/lava-overlay-q5430r8e/lava-12948302/bin/lava-os-build
110 12:45:26.785696 Creating /var/lib/lava/dispatcher/tmp/12948302/lava-overlay-q5430r8e/lava-12948302/bin/lava-probe-channel
111 12:45:26.785826 Creating /var/lib/lava/dispatcher/tmp/12948302/lava-overlay-q5430r8e/lava-12948302/bin/lava-probe-ip
112 12:45:26.785953 Creating /var/lib/lava/dispatcher/tmp/12948302/lava-overlay-q5430r8e/lava-12948302/bin/lava-target-ip
113 12:45:26.786081 Creating /var/lib/lava/dispatcher/tmp/12948302/lava-overlay-q5430r8e/lava-12948302/bin/lava-target-mac
114 12:45:26.786208 Creating /var/lib/lava/dispatcher/tmp/12948302/lava-overlay-q5430r8e/lava-12948302/bin/lava-target-storage
115 12:45:26.786344 Creating /var/lib/lava/dispatcher/tmp/12948302/lava-overlay-q5430r8e/lava-12948302/bin/lava-test-case
116 12:45:26.786474 Creating /var/lib/lava/dispatcher/tmp/12948302/lava-overlay-q5430r8e/lava-12948302/bin/lava-test-event
117 12:45:26.786602 Creating /var/lib/lava/dispatcher/tmp/12948302/lava-overlay-q5430r8e/lava-12948302/bin/lava-test-feedback
118 12:45:26.786730 Creating /var/lib/lava/dispatcher/tmp/12948302/lava-overlay-q5430r8e/lava-12948302/bin/lava-test-raise
119 12:45:26.786860 Creating /var/lib/lava/dispatcher/tmp/12948302/lava-overlay-q5430r8e/lava-12948302/bin/lava-test-reference
120 12:45:26.786992 Creating /var/lib/lava/dispatcher/tmp/12948302/lava-overlay-q5430r8e/lava-12948302/bin/lava-test-runner
121 12:45:26.787121 Creating /var/lib/lava/dispatcher/tmp/12948302/lava-overlay-q5430r8e/lava-12948302/bin/lava-test-set
122 12:45:26.787254 Creating /var/lib/lava/dispatcher/tmp/12948302/lava-overlay-q5430r8e/lava-12948302/bin/lava-test-shell
123 12:45:26.787389 Updating /var/lib/lava/dispatcher/tmp/12948302/lava-overlay-q5430r8e/lava-12948302/bin/lava-install-packages (oe)
124 12:45:26.787552 Updating /var/lib/lava/dispatcher/tmp/12948302/lava-overlay-q5430r8e/lava-12948302/bin/lava-installed-packages (oe)
125 12:45:26.787732 Creating /var/lib/lava/dispatcher/tmp/12948302/lava-overlay-q5430r8e/lava-12948302/environment
126 12:45:26.787834 LAVA metadata
127 12:45:26.787910 - LAVA_JOB_ID=12948302
128 12:45:26.787979 - LAVA_DISPATCHER_IP=192.168.201.1
129 12:45:26.788085 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 12:45:26.788151 skipped lava-vland-overlay
131 12:45:26.788229 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 12:45:26.788334 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 12:45:26.788414 skipped lava-multinode-overlay
134 12:45:26.788487 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 12:45:26.788571 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 12:45:26.788646 Loading test definitions
137 12:45:26.788750 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 12:45:26.788831 Using /lava-12948302 at stage 0
139 12:45:26.789144 uuid=12948302_1.4.2.3.1 testdef=None
140 12:45:26.789233 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 12:45:26.789318 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 12:45:26.790058 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 12:45:26.790422 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 12:45:26.791368 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 12:45:26.791700 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 12:45:26.792363 runner path: /var/lib/lava/dispatcher/tmp/12948302/lava-overlay-q5430r8e/lava-12948302/0/tests/0_dmesg test_uuid 12948302_1.4.2.3.1
149 12:45:26.792524 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 12:45:26.792751 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 12:45:26.792824 Using /lava-12948302 at stage 1
153 12:45:26.793180 uuid=12948302_1.4.2.3.5 testdef=None
154 12:45:26.793277 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 12:45:26.793380 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 12:45:26.793928 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 12:45:26.794281 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 12:45:26.795110 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 12:45:26.795497 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 12:45:26.796437 runner path: /var/lib/lava/dispatcher/tmp/12948302/lava-overlay-q5430r8e/lava-12948302/1/tests/1_bootrr test_uuid 12948302_1.4.2.3.5
163 12:45:26.796593 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 12:45:26.796800 Creating lava-test-runner.conf files
166 12:45:26.796865 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12948302/lava-overlay-q5430r8e/lava-12948302/0 for stage 0
167 12:45:26.796959 - 0_dmesg
168 12:45:26.797047 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12948302/lava-overlay-q5430r8e/lava-12948302/1 for stage 1
169 12:45:26.797140 - 1_bootrr
170 12:45:26.797237 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 12:45:26.797321 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 12:45:26.805535 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 12:45:26.805748 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 12:45:26.805916 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 12:45:26.806019 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 12:45:26.806108 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 12:45:27.077943 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 12:45:27.078345 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 12:45:27.078481 extracting modules file /var/lib/lava/dispatcher/tmp/12948302/tftp-deploy-xxxrsyyr/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12948302/extract-overlay-ramdisk-bvxwavwy/ramdisk
180 12:45:27.092217 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 12:45:27.092406 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 12:45:27.092515 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12948302/compress-overlay-vvps72m_/overlay-1.4.2.4.tar.gz to ramdisk
183 12:45:27.092604 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12948302/compress-overlay-vvps72m_/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12948302/extract-overlay-ramdisk-bvxwavwy/ramdisk
184 12:45:27.100980 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 12:45:27.101114 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 12:45:27.101223 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 12:45:27.101333 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 12:45:27.101426 Building ramdisk /var/lib/lava/dispatcher/tmp/12948302/extract-overlay-ramdisk-bvxwavwy/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12948302/extract-overlay-ramdisk-bvxwavwy/ramdisk
189 12:45:27.238504 >> 49788 blocks
190 12:45:28.102415 rename /var/lib/lava/dispatcher/tmp/12948302/extract-overlay-ramdisk-bvxwavwy/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12948302/tftp-deploy-xxxrsyyr/ramdisk/ramdisk.cpio.gz
191 12:45:28.102883 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 12:45:28.103029 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 12:45:28.103174 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 12:45:28.103310 No mkimage arch provided, not using FIT.
195 12:45:28.103416 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 12:45:28.103526 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 12:45:28.103676 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 12:45:28.103813 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 12:45:28.103939 No LXC device requested
200 12:45:28.104068 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 12:45:28.104208 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 12:45:28.104338 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 12:45:28.104440 Checking files for TFTP limit of 4294967296 bytes.
204 12:45:28.104880 end: 1 tftp-deploy (duration 00:00:02) [common]
205 12:45:28.104993 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 12:45:28.105107 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 12:45:28.105275 substitutions:
208 12:45:28.105378 - {DTB}: None
209 12:45:28.105484 - {INITRD}: 12948302/tftp-deploy-xxxrsyyr/ramdisk/ramdisk.cpio.gz
210 12:45:28.105586 - {KERNEL}: 12948302/tftp-deploy-xxxrsyyr/kernel/bzImage
211 12:45:28.105685 - {LAVA_MAC}: None
212 12:45:28.105785 - {PRESEED_CONFIG}: None
213 12:45:28.105883 - {PRESEED_LOCAL}: None
214 12:45:28.105981 - {RAMDISK}: 12948302/tftp-deploy-xxxrsyyr/ramdisk/ramdisk.cpio.gz
215 12:45:28.106079 - {ROOT_PART}: None
216 12:45:28.106176 - {ROOT}: None
217 12:45:28.106285 - {SERVER_IP}: 192.168.201.1
218 12:45:28.106410 - {TEE}: None
219 12:45:28.106535 Parsed boot commands:
220 12:45:28.106629 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 12:45:28.106866 Parsed boot commands: tftpboot 192.168.201.1 12948302/tftp-deploy-xxxrsyyr/kernel/bzImage 12948302/tftp-deploy-xxxrsyyr/kernel/cmdline 12948302/tftp-deploy-xxxrsyyr/ramdisk/ramdisk.cpio.gz
222 12:45:28.106993 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 12:45:28.107121 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 12:45:28.107252 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 12:45:28.107429 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 12:45:28.107588 Not connected, no need to disconnect.
227 12:45:28.107705 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 12:45:28.107969 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 12:45:28.108079 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh dell-latitude-5400-4305U-sarien-cbg-0'
230 12:45:28.112489 Setting prompt string to ['lava-test: # ']
231 12:45:28.112895 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 12:45:28.113056 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 12:45:28.113199 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 12:45:28.113324 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 12:45:28.113568 Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-4305U-sarien-cbg-0' '--port=1' '--command=reboot'
236 12:45:44.990279 >> Command sent successfully.
237 12:45:44.992716 Returned 0 in 16 seconds
238 12:45:45.093114 end: 2.2.2.1 pdu-reboot (duration 00:00:17) [common]
240 12:45:45.093460 end: 2.2.2 reset-device (duration 00:00:17) [common]
241 12:45:45.093567 start: 2.2.3 depthcharge-start (timeout 00:04:43) [common]
242 12:45:45.093656 Setting prompt string to 'Starting depthcharge on sarien...'
243 12:45:45.093725 Changing prompt to 'Starting depthcharge on sarien...'
244 12:45:45.093790 depthcharge-start: Wait for prompt Starting depthcharge on sarien... (timeout 00:05:00)
245 12:45:45.094049 [Enter `^Ec?' for help]
246 12:45:45.094127
247 12:45:45.094195
248 12:45:45.094259 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
249 12:45:45.094323 CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz
250 12:45:45.094384 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
251 12:45:45.094442 CPU: AES supported, TXT NOT supported, VT supported
252 12:45:45.094498 MCH: device id 3e35 (rev 0c) is Whiskeylake W (2+2)
253 12:45:45.094552 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
254 12:45:45.094606 IGD: device id 3ea1 (rev 02) is Unknown
255 12:45:45.094660 VBOOT: Loading verstage.
256 12:45:45.094716 CBFS @ 1d00000 size 300000
257 12:45:45.094769 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
258 12:45:45.094823 CBFS: Locating 'fallback/verstage'
259 12:45:45.094876 CBFS: Found @ offset 10f6c0 size 1435c
260 12:45:45.094929
261 12:45:45.094981
262 12:45:45.095033 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
263 12:45:45.095087 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
264 12:45:45.095140 done! DID_VID 0x00281ae0
265 12:45:45.095193 TPM ready after 0 ms
266 12:45:45.095247 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
267 12:45:45.095300 tlcl_send_startup: Startup return code is 0
268 12:45:45.095353 TPM: setup succeeded
269 12:45:45.095406 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
270 12:45:45.095459 Checking cr50 for recovery request
271 12:45:45.095512 Phase 1
272 12:45:45.095565 FMAP: Found "FLASH" version 1.1 at 1c10000.
273 12:45:45.095618 FMAP: base = fe000000 size = 2000000 #areas = 37
274 12:45:45.095671 FMAP: area GBB found @ 1c11000 (978944 bytes)
275 12:45:45.095725 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
276 12:45:45.095779 Phase 2
277 12:45:45.095831 Phase 3
278 12:45:45.095883 FMAP: area GBB found @ 1c11000 (978944 bytes)
279 12:45:45.095937 VB2:vb2_report_dev_firmware() This is developer signed firmware
280 12:45:45.095990 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
281 12:45:45.096043 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
282 12:45:45.096113 VB2:vb2_verify_keyblock() Checking key block signature...
283 12:45:45.096167 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
284 12:45:45.096221 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
285 12:45:45.096275 VB2:vb2_verify_fw_preamble() Verifying preamble.
286 12:45:45.096398 Phase 4
287 12:45:45.096452 FMAP: area FW_MAIN_A found @ 16e0000 (2555840 bytes)
288 12:45:45.096505 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
289 12:45:45.096559 VB2:vb2_rsa_verify_digest() Digest check failed!
290 12:45:45.096613 VB2:vb2_fail() Need recovery, reason: 0x1b / 0x7
291 12:45:45.096666 Saving nvdata
292 12:45:45.096718 Reboot requested (10020007)
293 12:45:45.096771 board_reset() called!
294 12:45:45.096824 full_reset() called!
295 12:45:49.265322
296 12:45:49.265503
297 12:45:49.272863 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
298 12:45:49.277911 CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz
299 12:45:49.282058 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
300 12:45:49.287615 CPU: AES supported, TXT NOT supported, VT supported
301 12:45:49.293162 MCH: device id 3e35 (rev 0c) is Whiskeylake W (2+2)
302 12:45:49.298255 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
303 12:45:49.301663 IGD: device id 3ea1 (rev 02) is Unknown
304 12:45:49.305735 VBOOT: Loading verstage.
305 12:45:49.308491 CBFS @ 1d00000 size 300000
306 12:45:49.314675 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
307 12:45:49.318234 CBFS: Locating 'fallback/verstage'
308 12:45:49.322344 CBFS: Found @ offset 10f6c0 size 1435c
309 12:45:49.336979
310 12:45:49.337110
311 12:45:49.344659 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
312 12:45:49.351749 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
313 12:45:49.354511 done! DID_VID 0x00281ae0
314 12:45:49.357737 TPM ready after 0 ms
315 12:45:49.361029 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
316 12:45:49.442289 tlcl_send_startup: Startup return code is 0
317 12:45:49.444225 TPM: setup succeeded
318 12:45:49.462319 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
319 12:45:49.465657 Checking cr50 for recovery request
320 12:45:49.476356 Phase 1
321 12:45:49.481056 FMAP: Found "FLASH" version 1.1 at 1c10000.
322 12:45:49.485477 FMAP: base = fe000000 size = 2000000 #areas = 37
323 12:45:49.490346 FMAP: area GBB found @ 1c11000 (978944 bytes)
324 12:45:49.497084 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
325 12:45:49.503984 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
326 12:45:49.506524 Recovery requested (1009000e)
327 12:45:49.507706 Saving nvdata
328 12:45:49.523075 tlcl_extend: response is 0
329 12:45:49.537646 tlcl_extend: response is 0
330 12:45:49.540676 CBFS @ 1d00000 size 300000
331 12:45:49.547468 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
332 12:45:49.550899 CBFS: Locating 'fallback/romstage'
333 12:45:49.554454 CBFS: Found @ offset 80 size 15b2c
334 12:45:49.555792
335 12:45:49.555896
336 12:45:49.564207 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 romstage starting (log level: 8)...
337 12:45:49.570230 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
338 12:45:49.573745 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
339 12:45:49.578086 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
340 12:45:49.582135 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
341 12:45:49.586849 gpe0_sts[3]: 00004000 gpe0_en[3]: 00000000
342 12:45:49.588307 TCO_STS: 0000 0004
343 12:45:49.591664 GEN_PMCON: d0015209 00002200
344 12:45:49.594575 GBLRST_CAUSE: 00000000 00000000
345 12:45:49.596527 prev_sleep_state 5
346 12:45:49.600132 Boot Count incremented to 51938
347 12:45:49.603566 CBFS @ 1d00000 size 300000
348 12:45:49.609627 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
349 12:45:49.612462 CBFS: Locating 'fspm.bin'
350 12:45:49.616735 CBFS: Found @ offset 60fc0 size 70000
351 12:45:49.621754 FMAP: Found "FLASH" version 1.1 at 1c10000.
352 12:45:49.626806 FMAP: base = fe000000 size = 2000000 #areas = 37
353 12:45:49.632736 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
354 12:45:49.638491 Probing TPM I2C: done! DID_VID 0x00281ae0
355 12:45:49.641751 Locality already claimed
356 12:45:49.645098 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
357 12:45:49.665107 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
358 12:45:49.670393 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
359 12:45:49.673709 MRC cache found, size 18e0
360 12:45:49.676047 bootmode is set to :2
361 12:45:49.765979 CBMEM:
362 12:45:49.769535 IMD: root @ 89fff000 254 entries.
363 12:45:49.772887 IMD: root @ 89ffec00 62 entries.
364 12:45:49.775312 External stage cache:
365 12:45:49.778902 IMD: root @ 8abff000 254 entries.
366 12:45:49.781604 IMD: root @ 8abfec00 62 entries.
367 12:45:49.787817 VBOOT: copying vboot_working_data (12288 bytes) to CBMEM...
368 12:45:49.791714 creating vboot_handoff structure
369 12:45:49.812449 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
370 12:45:49.827981 tlcl_write: response is 0
371 12:45:49.846788 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
372 12:45:49.850742 MRC: TPM MRC hash updated successfully.
373 12:45:49.852996 1 DIMMs found
374 12:45:49.855354 top_of_ram = 0x8a000000
375 12:45:49.860656 MTRR Range: Start=89000000 End=8a000000 (Size 1000000)
376 12:45:49.865563 MTRR Range: Start=ff000000 End=0 (Size 1000000)
377 12:45:49.867552 CBFS @ 1d00000 size 300000
378 12:45:49.874350 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
379 12:45:49.877822 CBFS: Locating 'fallback/postcar'
380 12:45:49.881822 CBFS: Found @ offset 107000 size 41a4
381 12:45:49.887298 Decompressing stage fallback/postcar @ 0x89cdcfc0 (33360 bytes)
382 12:45:49.897818 Loading module at 89cdd000 with entry 89cdd000. filesize: 0x3f50 memsize: 0x8210
383 12:45:49.902381 Processing 126 relocs. Offset value of 0x87cdd000
384 12:45:49.905560
385 12:45:49.905823
386 12:45:49.913501 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 postcar starting (log level: 8)...
387 12:45:49.916230 CBFS @ 1d00000 size 300000
388 12:45:49.922976 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
389 12:45:49.926074 CBFS: Locating 'fallback/ramstage'
390 12:45:49.930386 CBFS: Found @ offset 458c0 size 1a8a8
391 12:45:49.937003 Decompressing stage fallback/ramstage @ 0x89c80fc0 (372256 bytes)
392 12:45:49.963252 Loading module at 89c81000 with entry 89c81000. filesize: 0x400e0 memsize: 0x5ade0
393 12:45:49.968275 Processing 3754 relocs. Offset value of 0x88e81000
394 12:45:49.974534
395 12:45:49.974618
396 12:45:49.983141 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 ramstage starting (log level: 8)...
397 12:45:49.987456 FMAP: Found "FLASH" version 1.1 at 1c10000.
398 12:45:49.991937 FMAP: base = fe000000 size = 2000000 #areas = 37
399 12:45:49.997928 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
400 12:45:50.001523 WARNING: RO_VPD is uninitialized or empty.
401 12:45:50.006994 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
402 12:45:50.010658 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
403 12:45:50.011987 Normal boot.
404 12:45:50.018958 BS: BS_PRE_DEVICE times (us): entry 0 run 57 exit 1163
405 12:45:50.021791 CBFS @ 1d00000 size 300000
406 12:45:50.027821 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
407 12:45:50.031953 CBFS: Locating 'cpu_microcode_blob.bin'
408 12:45:50.036000 CBFS: Found @ offset 15c40 size 2fc00
409 12:45:50.040166 microcode: sig=0x806ec pf=0x80 revision=0xb7
410 12:45:50.042680 Skip microcode update
411 12:45:50.045139 CBFS @ 1d00000 size 300000
412 12:45:50.051389 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
413 12:45:50.053979 CBFS: Locating 'fsps.bin'
414 12:45:50.058719 CBFS: Found @ offset d1fc0 size 35000
415 12:45:50.092630 Detected 2 core, 2 thread CPU.
416 12:45:50.094702 Setting up SMI for CPU
417 12:45:50.096654 IED base = 0x8ac00000
418 12:45:50.099387 IED size = 0x00400000
419 12:45:50.101955 Will perform SMM setup.
420 12:45:50.106851 CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz.
421 12:45:50.114237 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
422 12:45:50.119164 Processing 16 relocs. Offset value of 0x00030000
423 12:45:50.122136 Attempting to start 1 APs
424 12:45:50.126111 Waiting for 10ms after sending INIT.
425 12:45:50.140179 Waiting for 1st SIPI to complete...done.
426 12:45:50.142077 AP: slot 1 apic_id 2.
427 12:45:50.146235 Waiting for 2nd SIPI to complete...done.
428 12:45:50.154718 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
429 12:45:50.158977 Processing 13 relocs. Offset value of 0x00038000
430 12:45:50.165693 SMM Module: stub loaded at 00038000. Will call 89c9b6bd(00000000)
431 12:45:50.169482 Installing SMM handler to 0x8a000000
432 12:45:50.177215 Loading module at 8a010000 with entry 8a010a27. filesize: 0xa988 memsize: 0xfa40
433 12:45:50.182870 Processing 867 relocs. Offset value of 0x8a010000
434 12:45:50.190800 Loading module at 8a008000 with entry 8a008000. filesize: 0x1a8 memsize: 0x1a8
435 12:45:50.196095 Processing 13 relocs. Offset value of 0x8a008000
436 12:45:50.201060 SMM Module: placing jmp sequence at 8a007c00 rel16 0x03fd
437 12:45:50.208418 SMM Module: stub loaded at 8a008000. Will call 8a010a27(00000000)
438 12:45:50.210981 Clearing SMI status registers
439 12:45:50.212916 SMI_STS: PM1
440 12:45:50.214768 PM1_STS: WAK PWRBTN
441 12:45:50.217982 TCO_STS: BOOT SECOND_TO
442 12:45:50.219462 GPE0 STD STS: eSPI
443 12:45:50.221850 New SMBASE 0x8a000000
444 12:45:50.224996 In relocation handler: CPU 0
445 12:45:50.228867 New SMBASE=0x8a000000 IEDBASE=0x8ac00000
446 12:45:50.233087 Writing SMRR. base = 0x8a000006, mask=0xff000800
447 12:45:50.235714 Relocation complete.
448 12:45:50.238109 New SMBASE 0x89fffc00
449 12:45:50.241575 In relocation handler: CPU 1
450 12:45:50.245021 New SMBASE=0x89fffc00 IEDBASE=0x8ac00000
451 12:45:50.249745 Writing SMRR. base = 0x8a000006, mask=0xff000800
452 12:45:50.251974 Relocation complete.
453 12:45:50.254047 Initializing CPU #0
454 12:45:50.257654 CPU: vendor Intel device 806ec
455 12:45:50.260740 CPU: family 06, model 8e, stepping 0c
456 12:45:50.263305 Clearing out pending MCEs
457 12:45:50.267942 Setting up local APIC... apic_id: 0x00 done.
458 12:45:50.271062 Turbo is available but hidden
459 12:45:50.273654 Turbo has been enabled
460 12:45:50.275312 VMX status: enabled
461 12:45:50.279835 IA32_FEATURE_CONTROL status: locked
462 12:45:50.281437 Skip microcode update
463 12:45:50.284041 CPU #0 initialized
464 12:45:50.285607 Initializing CPU #1
465 12:45:50.289426 CPU: vendor Intel device 806ec
466 12:45:50.293341 CPU: family 06, model 8e, stepping 0c
467 12:45:50.295155 Clearing out pending MCEs
468 12:45:50.299487 Setting up local APIC... apic_id: 0x02 done.
469 12:45:50.301600 VMX status: enabled
470 12:45:50.305744 IA32_FEATURE_CONTROL status: locked
471 12:45:50.308504 Skip microcode update
472 12:45:50.309470 CPU #1 initialized
473 12:45:50.314144 bsp_do_flight_plan done after 163 msecs.
474 12:45:50.316858 CPU: frequency set to 2200 MHz
475 12:45:50.318609 Enabling SMIs.
476 12:45:50.320236 Locking SMM.
477 12:45:50.323546 CBFS @ 1d00000 size 300000
478 12:45:50.329073 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
479 12:45:50.331797 CBFS: Locating 'vbt.bin'
480 12:45:50.335681 CBFS: Found @ offset 60a40 size 4a0
481 12:45:50.340508 Found a VBT of 4608 bytes after decompression
482 12:45:50.354038 FMAP: area GBB found @ 1c11000 (978944 bytes)
483 12:45:50.465321 Detected 2 core, 2 thread CPU.
484 12:45:50.467706 Detected 2 core, 2 thread CPU.
485 12:45:50.697606 Display FSP Version Info HOB
486 12:45:50.701091 Reference Code - CPU = 7.0.5e.40
487 12:45:50.703326 uCode Version = 0.0.0.b8
488 12:45:50.706272 Display FSP Version Info HOB
489 12:45:50.709593 Reference Code - ME = 7.0.5e.40
490 12:45:50.711870 MEBx version = 0.0.0.0
491 12:45:50.714985 ME Firmware Version = Consumer SKU
492 12:45:50.718437 Display FSP Version Info HOB
493 12:45:50.721891 Reference Code - CNL PCH = 7.0.5e.40
494 12:45:50.724373 PCH-CRID Status = Disabled
495 12:45:50.728083 CNL PCH H A0 Hsio Version = 2.0.0.0
496 12:45:50.731697 CNL PCH H Ax Hsio Version = 9.0.0.0
497 12:45:50.735198 CNL PCH H Bx Hsio Version = a.0.0.0
498 12:45:50.739048 CNL PCH LP B0 Hsio Version = 7.0.0.0
499 12:45:50.742324 CNL PCH LP Bx Hsio Version = 6.0.0.0
500 12:45:50.746042 CNL PCH LP Dx Hsio Version = 7.0.0.0
501 12:45:50.750011 Display FSP Version Info HOB
502 12:45:50.753693 Reference Code - SA - System Agent = 7.0.5e.40
503 12:45:50.757552 Reference Code - MRC = 0.7.1.68
504 12:45:50.759811 SA - PCIe Version = 7.0.5e.40
505 12:45:50.763386 SA-CRID Status = Disabled
506 12:45:50.766820 SA-CRID Original Value = 0.0.0.c
507 12:45:50.769238 SA-CRID New Value = 0.0.0.c
508 12:45:50.787230 RTC Init
509 12:45:50.791697 Set power off after power failure.
510 12:45:50.792734 Disabling Deep S3
511 12:45:50.795040 Disabling Deep S3
512 12:45:50.796716 Disabling Deep S4
513 12:45:50.799125 Disabling Deep S4
514 12:45:50.800210 Disabling Deep S5
515 12:45:50.802081 Disabling Deep S5
516 12:45:50.809082 BS: BS_DEV_INIT_CHIPS times (us): entry 300903 run 466144 exit 16233
517 12:45:50.811626 Enumerating buses...
518 12:45:50.815842 Show all devs... Before device enumeration.
519 12:45:50.818118 Root Device: enabled 1
520 12:45:50.820842 CPU_CLUSTER: 0: enabled 1
521 12:45:50.823333 DOMAIN: 0000: enabled 1
522 12:45:50.824906 APIC: 00: enabled 1
523 12:45:50.827519 PCI: 00:00.0: enabled 1
524 12:45:50.830568 PCI: 00:02.0: enabled 1
525 12:45:50.832551 PCI: 00:04.0: enabled 1
526 12:45:50.835057 PCI: 00:12.0: enabled 1
527 12:45:50.837490 PCI: 00:12.5: enabled 0
528 12:45:50.839589 PCI: 00:12.6: enabled 0
529 12:45:50.842642 PCI: 00:13.0: enabled 0
530 12:45:50.844294 PCI: 00:14.0: enabled 1
531 12:45:50.847072 PCI: 00:14.1: enabled 0
532 12:45:50.849602 PCI: 00:14.3: enabled 1
533 12:45:50.852137 PCI: 00:14.5: enabled 0
534 12:45:50.854266 PCI: 00:15.0: enabled 1
535 12:45:50.856649 PCI: 00:15.1: enabled 1
536 12:45:50.859559 PCI: 00:15.2: enabled 0
537 12:45:50.861653 PCI: 00:15.3: enabled 0
538 12:45:50.864379 PCI: 00:16.0: enabled 1
539 12:45:50.866373 PCI: 00:16.1: enabled 0
540 12:45:50.868791 PCI: 00:16.2: enabled 0
541 12:45:50.871759 PCI: 00:16.3: enabled 0
542 12:45:50.874188 PCI: 00:16.4: enabled 0
543 12:45:50.876308 PCI: 00:16.5: enabled 0
544 12:45:50.878356 PCI: 00:17.0: enabled 1
545 12:45:50.881214 PCI: 00:19.0: enabled 1
546 12:45:50.883358 PCI: 00:19.1: enabled 0
547 12:45:50.885677 PCI: 00:19.2: enabled 1
548 12:45:50.888068 PCI: 00:1a.0: enabled 0
549 12:45:50.891263 PCI: 00:1c.0: enabled 1
550 12:45:50.893376 PCI: 00:1c.1: enabled 0
551 12:45:50.895584 PCI: 00:1c.2: enabled 0
552 12:45:50.898085 PCI: 00:1c.3: enabled 0
553 12:45:50.900411 PCI: 00:1c.4: enabled 0
554 12:45:50.903120 PCI: 00:1c.5: enabled 0
555 12:45:50.905098 PCI: 00:1c.6: enabled 0
556 12:45:50.907818 PCI: 00:1c.7: enabled 1
557 12:45:50.910693 PCI: 00:1d.0: enabled 1
558 12:45:50.912769 PCI: 00:1d.1: enabled 1
559 12:45:50.916145 PCI: 00:1d.2: enabled 0
560 12:45:50.917268 PCI: 00:1d.3: enabled 0
561 12:45:50.919858 PCI: 00:1d.4: enabled 1
562 12:45:50.922647 PCI: 00:1e.0: enabled 0
563 12:45:50.924605 PCI: 00:1e.1: enabled 0
564 12:45:50.927667 PCI: 00:1e.2: enabled 0
565 12:45:50.929714 PCI: 00:1e.3: enabled 0
566 12:45:50.931818 PCI: 00:1f.0: enabled 1
567 12:45:50.935008 PCI: 00:1f.1: enabled 1
568 12:45:50.936706 PCI: 00:1f.2: enabled 1
569 12:45:50.940380 PCI: 00:1f.3: enabled 1
570 12:45:50.941760 PCI: 00:1f.4: enabled 1
571 12:45:50.944741 PCI: 00:1f.5: enabled 1
572 12:45:50.947375 PCI: 00:1f.6: enabled 1
573 12:45:50.948846 USB0 port 0: enabled 1
574 12:45:50.951518 I2C: 00:10: enabled 1
575 12:45:50.953343 I2C: 00:10: enabled 1
576 12:45:50.955721 I2C: 00:34: enabled 1
577 12:45:50.958407 I2C: 00:2c: enabled 1
578 12:45:50.960072 I2C: 00:50: enabled 1
579 12:45:50.962773 PNP: 0c09.0: enabled 1
580 12:45:50.965166 USB2 port 0: enabled 1
581 12:45:50.967616 USB2 port 1: enabled 1
582 12:45:50.970122 USB2 port 2: enabled 1
583 12:45:50.972662 USB2 port 4: enabled 1
584 12:45:50.974020 USB2 port 5: enabled 1
585 12:45:50.976520 USB2 port 6: enabled 1
586 12:45:50.978550 USB2 port 7: enabled 1
587 12:45:50.981350 USB2 port 8: enabled 1
588 12:45:50.983862 USB2 port 9: enabled 1
589 12:45:50.986198 USB3 port 0: enabled 1
590 12:45:50.989130 USB3 port 1: enabled 1
591 12:45:50.990617 USB3 port 2: enabled 1
592 12:45:50.992735 USB3 port 3: enabled 1
593 12:45:50.995948 USB3 port 4: enabled 1
594 12:45:50.997777 APIC: 02: enabled 1
595 12:45:50.999531 Compare with tree...
596 12:45:51.001835 Root Device: enabled 1
597 12:45:51.004182 CPU_CLUSTER: 0: enabled 1
598 12:45:51.006747 APIC: 00: enabled 1
599 12:45:51.009603 APIC: 02: enabled 1
600 12:45:51.011180 DOMAIN: 0000: enabled 1
601 12:45:51.014003 PCI: 00:00.0: enabled 1
602 12:45:51.016713 PCI: 00:02.0: enabled 1
603 12:45:51.019370 PCI: 00:04.0: enabled 1
604 12:45:51.022133 PCI: 00:12.0: enabled 1
605 12:45:51.025330 PCI: 00:12.5: enabled 0
606 12:45:51.026911 PCI: 00:12.6: enabled 0
607 12:45:51.030424 PCI: 00:13.0: enabled 0
608 12:45:51.032589 PCI: 00:14.0: enabled 1
609 12:45:51.035382 USB0 port 0: enabled 1
610 12:45:51.038120 USB2 port 0: enabled 1
611 12:45:51.040232 USB2 port 1: enabled 1
612 12:45:51.043075 USB2 port 2: enabled 1
613 12:45:51.046287 USB2 port 4: enabled 1
614 12:45:51.048921 USB2 port 5: enabled 1
615 12:45:51.051535 USB2 port 6: enabled 1
616 12:45:51.053964 USB2 port 7: enabled 1
617 12:45:51.057420 USB2 port 8: enabled 1
618 12:45:51.059576 USB2 port 9: enabled 1
619 12:45:51.062727 USB3 port 0: enabled 1
620 12:45:51.065089 USB3 port 1: enabled 1
621 12:45:51.068263 USB3 port 2: enabled 1
622 12:45:51.071003 USB3 port 3: enabled 1
623 12:45:51.073187 USB3 port 4: enabled 1
624 12:45:51.075818 PCI: 00:14.1: enabled 0
625 12:45:51.078237 PCI: 00:14.3: enabled 1
626 12:45:51.081502 PCI: 00:14.5: enabled 0
627 12:45:51.083582 PCI: 00:15.0: enabled 1
628 12:45:51.086097 I2C: 00:10: enabled 1
629 12:45:51.089545 I2C: 00:10: enabled 1
630 12:45:51.091629 I2C: 00:34: enabled 1
631 12:45:51.094678 PCI: 00:15.1: enabled 1
632 12:45:51.096418 I2C: 00:2c: enabled 1
633 12:45:51.099405 PCI: 00:15.2: enabled 0
634 12:45:51.101728 PCI: 00:15.3: enabled 0
635 12:45:51.104114 PCI: 00:16.0: enabled 1
636 12:45:51.107741 PCI: 00:16.1: enabled 0
637 12:45:51.109309 PCI: 00:16.2: enabled 0
638 12:45:51.111897 PCI: 00:16.3: enabled 0
639 12:45:51.115230 PCI: 00:16.4: enabled 0
640 12:45:51.117553 PCI: 00:16.5: enabled 0
641 12:45:51.120263 PCI: 00:17.0: enabled 1
642 12:45:51.123243 PCI: 00:19.0: enabled 1
643 12:45:51.125453 I2C: 00:50: enabled 1
644 12:45:51.127547 PCI: 00:19.1: enabled 0
645 12:45:51.130223 PCI: 00:19.2: enabled 1
646 12:45:51.133172 PCI: 00:1a.0: enabled 0
647 12:45:51.136407 PCI: 00:1c.0: enabled 1
648 12:45:51.138528 PCI: 00:1c.1: enabled 0
649 12:45:51.141222 PCI: 00:1c.2: enabled 0
650 12:45:51.143914 PCI: 00:1c.3: enabled 0
651 12:45:51.146337 PCI: 00:1c.4: enabled 0
652 12:45:51.148430 PCI: 00:1c.5: enabled 0
653 12:45:51.151410 PCI: 00:1c.6: enabled 0
654 12:45:51.153980 PCI: 00:1c.7: enabled 1
655 12:45:51.157252 PCI: 00:1d.0: enabled 1
656 12:45:51.159021 PCI: 00:1d.1: enabled 1
657 12:45:51.161802 PCI: 00:1d.2: enabled 0
658 12:45:51.164794 PCI: 00:1d.3: enabled 0
659 12:45:51.167339 PCI: 00:1d.4: enabled 1
660 12:45:51.170549 PCI: 00:1e.0: enabled 0
661 12:45:51.172583 PCI: 00:1e.1: enabled 0
662 12:45:51.174846 PCI: 00:1e.2: enabled 0
663 12:45:51.178213 PCI: 00:1e.3: enabled 0
664 12:45:51.180526 PCI: 00:1f.0: enabled 1
665 12:45:51.183231 PNP: 0c09.0: enabled 1
666 12:45:51.185308 PCI: 00:1f.1: enabled 1
667 12:45:51.188328 PCI: 00:1f.2: enabled 1
668 12:45:51.190735 PCI: 00:1f.3: enabled 1
669 12:45:51.194075 PCI: 00:1f.4: enabled 1
670 12:45:51.196827 PCI: 00:1f.5: enabled 1
671 12:45:51.198829 PCI: 00:1f.6: enabled 1
672 12:45:51.201558 Root Device scanning...
673 12:45:51.204900 root_dev_scan_bus for Root Device
674 12:45:51.207655 CPU_CLUSTER: 0 enabled
675 12:45:51.209347 DOMAIN: 0000 enabled
676 12:45:51.211947 DOMAIN: 0000 scanning...
677 12:45:51.214765 PCI: pci_scan_bus for bus 00
678 12:45:51.217987 PCI: 00:00.0 [8086/0000] ops
679 12:45:51.221793 PCI: 00:00.0 [8086/3e35] enabled
680 12:45:51.224192 PCI: 00:02.0 [8086/0000] ops
681 12:45:51.228227 PCI: 00:02.0 [8086/3ea1] enabled
682 12:45:51.230640 PCI: 00:04.0 [8086/1903] enabled
683 12:45:51.234158 PCI: 00:08.0 [8086/1911] enabled
684 12:45:51.237789 PCI: 00:12.0 [8086/9df9] enabled
685 12:45:51.240760 PCI: 00:14.0 [8086/0000] bus ops
686 12:45:51.244933 PCI: 00:14.0 [8086/9ded] enabled
687 12:45:51.247964 PCI: 00:14.2 [8086/9def] enabled
688 12:45:51.251701 PCI: 00:14.3 [8086/9df0] enabled
689 12:45:51.255022 PCI: 00:15.0 [8086/0000] bus ops
690 12:45:51.258098 PCI: 00:15.0 [8086/9de8] enabled
691 12:45:51.261198 PCI: 00:15.1 [8086/0000] bus ops
692 12:45:51.264215 PCI: 00:15.1 [8086/9de9] enabled
693 12:45:51.267264 PCI: 00:16.0 [8086/0000] ops
694 12:45:51.271190 PCI: 00:16.0 [8086/9de0] enabled
695 12:45:51.273301 PCI: 00:17.0 [8086/0000] ops
696 12:45:51.276860 PCI: 00:17.0 [8086/9dd3] enabled
697 12:45:51.279881 PCI: 00:19.0 [8086/0000] bus ops
698 12:45:51.283331 PCI: 00:19.0 [8086/9dc5] enabled
699 12:45:51.286676 PCI: 00:19.2 [8086/0000] ops
700 12:45:51.289499 PCI: 00:19.2 [8086/9dc7] enabled
701 12:45:51.293016 PCI: 00:1c.0 [8086/0000] bus ops
702 12:45:51.296981 PCI: 00:1c.0 [8086/9dbf] enabled
703 12:45:51.302094 PCI: Static device PCI: 00:1c.7 not found, disabling it.
704 12:45:51.305021 PCI: 00:1d.0 [8086/0000] bus ops
705 12:45:51.308850 PCI: 00:1d.0 [8086/9db4] enabled
706 12:45:51.314701 PCI: Static device PCI: 00:1d.1 not found, disabling it.
707 12:45:51.320265 PCI: Static device PCI: 00:1d.4 not found, disabling it.
708 12:45:51.323116 PCI: 00:1f.0 [8086/0000] bus ops
709 12:45:51.326673 PCI: 00:1f.0 [8086/9d84] enabled
710 12:45:51.331896 PCI: Static device PCI: 00:1f.1 not found, disabling it.
711 12:45:51.337583 PCI: Static device PCI: 00:1f.2 not found, disabling it.
712 12:45:51.341175 PCI: 00:1f.3 [8086/0000] bus ops
713 12:45:51.344644 PCI: 00:1f.3 [8086/9dc8] enabled
714 12:45:51.347493 PCI: 00:1f.4 [8086/0000] bus ops
715 12:45:51.351455 PCI: 00:1f.4 [8086/9da3] enabled
716 12:45:51.354161 PCI: 00:1f.5 [8086/0000] bus ops
717 12:45:51.357678 PCI: 00:1f.5 [8086/9da4] enabled
718 12:45:51.361310 PCI: 00:1f.6 [8086/15be] enabled
719 12:45:51.364229 PCI: Leftover static devices:
720 12:45:51.365381 PCI: 00:12.5
721 12:45:51.366761 PCI: 00:12.6
722 12:45:51.368194 PCI: 00:13.0
723 12:45:51.369555 PCI: 00:14.1
724 12:45:51.371352 PCI: 00:14.5
725 12:45:51.372637 PCI: 00:15.2
726 12:45:51.373690 PCI: 00:15.3
727 12:45:51.374832 PCI: 00:16.1
728 12:45:51.376213 PCI: 00:16.2
729 12:45:51.378088 PCI: 00:16.3
730 12:45:51.379133 PCI: 00:16.4
731 12:45:51.380926 PCI: 00:16.5
732 12:45:51.381806 PCI: 00:19.1
733 12:45:51.383475 PCI: 00:1a.0
734 12:45:51.384409 PCI: 00:1c.1
735 12:45:51.386649 PCI: 00:1c.2
736 12:45:51.387819 PCI: 00:1c.3
737 12:45:51.389212 PCI: 00:1c.4
738 12:45:51.390535 PCI: 00:1c.5
739 12:45:51.392032 PCI: 00:1c.6
740 12:45:51.392796 PCI: 00:1c.7
741 12:45:51.394420 PCI: 00:1d.1
742 12:45:51.395515 PCI: 00:1d.2
743 12:45:51.396873 PCI: 00:1d.3
744 12:45:51.398207 PCI: 00:1d.4
745 12:45:51.399611 PCI: 00:1e.0
746 12:45:51.401064 PCI: 00:1e.1
747 12:45:51.402000 PCI: 00:1e.2
748 12:45:51.403933 PCI: 00:1e.3
749 12:45:51.405276 PCI: 00:1f.1
750 12:45:51.406715 PCI: 00:1f.2
751 12:45:51.409598 PCI: Check your devicetree.cb.
752 12:45:51.412221 PCI: 00:14.0 scanning...
753 12:45:51.415071 scan_usb_bus for PCI: 00:14.0
754 12:45:51.417686 USB0 port 0 enabled
755 12:45:51.419653 USB0 port 0 scanning...
756 12:45:51.423048 scan_usb_bus for USB0 port 0
757 12:45:51.424991 USB2 port 0 enabled
758 12:45:51.427599 USB2 port 1 enabled
759 12:45:51.429788 USB2 port 2 enabled
760 12:45:51.431810 USB2 port 4 enabled
761 12:45:51.432936 USB2 port 5 enabled
762 12:45:51.435790 USB2 port 6 enabled
763 12:45:51.438054 USB2 port 7 enabled
764 12:45:51.439372 USB2 port 8 enabled
765 12:45:51.441040 USB2 port 9 enabled
766 12:45:51.443586 USB3 port 0 enabled
767 12:45:51.445822 USB3 port 1 enabled
768 12:45:51.447355 USB3 port 2 enabled
769 12:45:51.449263 USB3 port 3 enabled
770 12:45:51.451326 USB3 port 4 enabled
771 12:45:51.454091 USB2 port 0 scanning...
772 12:45:51.456944 scan_usb_bus for USB2 port 0
773 12:45:51.460431 scan_usb_bus for USB2 port 0 done
774 12:45:51.466198 scan_bus: scanning of bus USB2 port 0 took 9063 usecs
775 12:45:51.468413 USB2 port 1 scanning...
776 12:45:51.471379 scan_usb_bus for USB2 port 1
777 12:45:51.475160 scan_usb_bus for USB2 port 1 done
778 12:45:51.480089 scan_bus: scanning of bus USB2 port 1 took 9061 usecs
779 12:45:51.482991 USB2 port 2 scanning...
780 12:45:51.486799 scan_usb_bus for USB2 port 2
781 12:45:51.489953 scan_usb_bus for USB2 port 2 done
782 12:45:51.494828 scan_bus: scanning of bus USB2 port 2 took 9061 usecs
783 12:45:51.497178 USB2 port 4 scanning...
784 12:45:51.500271 scan_usb_bus for USB2 port 4
785 12:45:51.504356 scan_usb_bus for USB2 port 4 done
786 12:45:51.510014 scan_bus: scanning of bus USB2 port 4 took 9061 usecs
787 12:45:51.511458 USB2 port 5 scanning...
788 12:45:51.515080 scan_usb_bus for USB2 port 5
789 12:45:51.517884 scan_usb_bus for USB2 port 5 done
790 12:45:51.523751 scan_bus: scanning of bus USB2 port 5 took 9062 usecs
791 12:45:51.526470 USB2 port 6 scanning...
792 12:45:51.528995 scan_usb_bus for USB2 port 6
793 12:45:51.532827 scan_usb_bus for USB2 port 6 done
794 12:45:51.537878 scan_bus: scanning of bus USB2 port 6 took 9062 usecs
795 12:45:51.540813 USB2 port 7 scanning...
796 12:45:51.543568 scan_usb_bus for USB2 port 7
797 12:45:51.547316 scan_usb_bus for USB2 port 7 done
798 12:45:51.553023 scan_bus: scanning of bus USB2 port 7 took 9060 usecs
799 12:45:51.555283 USB2 port 8 scanning...
800 12:45:51.557855 scan_usb_bus for USB2 port 8
801 12:45:51.561253 scan_usb_bus for USB2 port 8 done
802 12:45:51.567229 scan_bus: scanning of bus USB2 port 8 took 9063 usecs
803 12:45:51.569647 USB2 port 9 scanning...
804 12:45:51.572997 scan_usb_bus for USB2 port 9
805 12:45:51.576422 scan_usb_bus for USB2 port 9 done
806 12:45:51.580947 scan_bus: scanning of bus USB2 port 9 took 9062 usecs
807 12:45:51.583832 USB3 port 0 scanning...
808 12:45:51.586705 scan_usb_bus for USB3 port 0
809 12:45:51.590150 scan_usb_bus for USB3 port 0 done
810 12:45:51.596055 scan_bus: scanning of bus USB3 port 0 took 9060 usecs
811 12:45:51.598735 USB3 port 1 scanning...
812 12:45:51.601389 scan_usb_bus for USB3 port 1
813 12:45:51.605073 scan_usb_bus for USB3 port 1 done
814 12:45:51.609807 scan_bus: scanning of bus USB3 port 1 took 9062 usecs
815 12:45:51.612564 USB3 port 2 scanning...
816 12:45:51.616058 scan_usb_bus for USB3 port 2
817 12:45:51.619247 scan_usb_bus for USB3 port 2 done
818 12:45:51.624447 scan_bus: scanning of bus USB3 port 2 took 9054 usecs
819 12:45:51.627797 USB3 port 3 scanning...
820 12:45:51.629920 scan_usb_bus for USB3 port 3
821 12:45:51.633474 scan_usb_bus for USB3 port 3 done
822 12:45:51.639536 scan_bus: scanning of bus USB3 port 3 took 9060 usecs
823 12:45:51.641141 USB3 port 4 scanning...
824 12:45:51.645476 scan_usb_bus for USB3 port 4
825 12:45:51.648105 scan_usb_bus for USB3 port 4 done
826 12:45:51.653179 scan_bus: scanning of bus USB3 port 4 took 9061 usecs
827 12:45:51.656513 scan_usb_bus for USB0 port 0 done
828 12:45:51.662871 scan_bus: scanning of bus USB0 port 0 took 239321 usecs
829 12:45:51.665714 scan_usb_bus for PCI: 00:14.0 done
830 12:45:51.671352 scan_bus: scanning of bus PCI: 00:14.0 took 256253 usecs
831 12:45:51.674487 PCI: 00:15.0 scanning...
832 12:45:51.678464 scan_generic_bus for PCI: 00:15.0
833 12:45:51.682060 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
834 12:45:51.685960 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
835 12:45:51.690131 bus: PCI: 00:15.0[0]->I2C: 01:34 enabled
836 12:45:51.693833 scan_generic_bus for PCI: 00:15.0 done
837 12:45:51.699964 scan_bus: scanning of bus PCI: 00:15.0 took 22384 usecs
838 12:45:51.702272 PCI: 00:15.1 scanning...
839 12:45:51.705685 scan_generic_bus for PCI: 00:15.1
840 12:45:51.709783 bus: PCI: 00:15.1[0]->I2C: 02:2c enabled
841 12:45:51.714561 scan_generic_bus for PCI: 00:15.1 done
842 12:45:51.719406 scan_bus: scanning of bus PCI: 00:15.1 took 14213 usecs
843 12:45:51.721783 PCI: 00:19.0 scanning...
844 12:45:51.725567 scan_generic_bus for PCI: 00:19.0
845 12:45:51.728935 bus: PCI: 00:19.0[0]->I2C: 03:50 enabled
846 12:45:51.733407 scan_generic_bus for PCI: 00:19.0 done
847 12:45:51.738475 scan_bus: scanning of bus PCI: 00:19.0 took 14211 usecs
848 12:45:51.741091 PCI: 00:1c.0 scanning...
849 12:45:51.745533 do_pci_scan_bridge for PCI: 00:1c.0
850 12:45:51.748092 PCI: pci_scan_bus for bus 01
851 12:45:51.751647 PCI: 01:00.0 [10ec/525a] enabled
852 12:45:51.755092 Capability: type 0x01 @ 0x80
853 12:45:51.757578 Capability: type 0x05 @ 0x90
854 12:45:51.760330 Capability: type 0x10 @ 0xb0
855 12:45:51.763804 Capability: type 0x10 @ 0x40
856 12:45:51.766822 Enabling Common Clock Configuration
857 12:45:51.771232 L1 Sub-State supported from root port 28
858 12:45:51.773754 L1 Sub-State Support = 0xf
859 12:45:51.776871 CommonModeRestoreTime = 0x3c
860 12:45:51.781838 Power On Value = 0x6, Power On Scale = 0x1
861 12:45:51.783996 ASPM: Enabled L0s and L1
862 12:45:51.786958 Capability: type 0x01 @ 0x80
863 12:45:51.789419 Capability: type 0x05 @ 0x90
864 12:45:51.792927 Capability: type 0x10 @ 0xb0
865 12:45:51.797759 scan_bus: scanning of bus PCI: 00:1c.0 took 53662 usecs
866 12:45:51.800256 PCI: 00:1d.0 scanning...
867 12:45:51.804630 do_pci_scan_bridge for PCI: 00:1d.0
868 12:45:51.807704 PCI: pci_scan_bus for bus 02
869 12:45:51.810658 PCI: 02:00.0 [15b7/5004] enabled
870 12:45:51.814173 Capability: type 0x01 @ 0x80
871 12:45:51.816931 Capability: type 0x05 @ 0x90
872 12:45:51.819943 Capability: type 0x11 @ 0xb0
873 12:45:51.822774 Capability: type 0x10 @ 0xc0
874 12:45:51.826026 Capability: type 0x10 @ 0x40
875 12:45:51.829643 Enabling Common Clock Configuration
876 12:45:51.833868 L1 Sub-State supported from root port 29
877 12:45:51.836168 L1 Sub-State Support = 0x5
878 12:45:51.839362 CommonModeRestoreTime = 0xff
879 12:45:51.843162 Power On Value = 0x16, Power On Scale = 0x0
880 12:45:51.845621 ASPM: Enabled L1
881 12:45:51.848046 Capability: type 0x01 @ 0x80
882 12:45:51.850722 Capability: type 0x05 @ 0x90
883 12:45:51.854690 Capability: type 0x11 @ 0xb0
884 12:45:51.857077 Capability: type 0x10 @ 0xc0
885 12:45:51.862055 scan_bus: scanning of bus PCI: 00:1d.0 took 58813 usecs
886 12:45:51.864707 PCI: 00:1f.0 scanning...
887 12:45:51.868705 scan_lpc_bus for PCI: 00:1f.0
888 12:45:51.870164 PNP: 0c09.0 enabled
889 12:45:51.873393 scan_lpc_bus for PCI: 00:1f.0 done
890 12:45:51.879357 scan_bus: scanning of bus PCI: 00:1f.0 took 11396 usecs
891 12:45:51.881706 PCI: 00:1f.3 scanning...
892 12:45:51.887448 scan_bus: scanning of bus PCI: 00:1f.3 took 2841 usecs
893 12:45:51.890209 PCI: 00:1f.4 scanning...
894 12:45:51.894135 scan_generic_bus for PCI: 00:1f.4
895 12:45:51.897861 scan_generic_bus for PCI: 00:1f.4 done
896 12:45:51.903964 scan_bus: scanning of bus PCI: 00:1f.4 took 10131 usecs
897 12:45:51.906161 PCI: 00:1f.5 scanning...
898 12:45:51.909580 scan_generic_bus for PCI: 00:1f.5
899 12:45:51.913893 scan_generic_bus for PCI: 00:1f.5 done
900 12:45:51.919101 scan_bus: scanning of bus PCI: 00:1f.5 took 10131 usecs
901 12:45:51.925237 scan_bus: scanning of bus DOMAIN: 0000 took 709575 usecs
902 12:45:51.928475 root_dev_scan_bus for Root Device done
903 12:45:51.934326 scan_bus: scanning of bus Root Device took 729716 usecs
904 12:45:51.935368 done
905 12:45:51.940521 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
906 12:45:51.946592 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
907 12:45:51.955324 SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x2000000
908 12:45:51.961133 FMAP: area UNIFIED_MRC_CACHE found @ 1bd0000 (131072 bytes)
909 12:45:51.965750 SPI flash protection: WPSW=0 SRP0=0
910 12:45:51.970441 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
911 12:45:51.976329 BS: BS_DEV_ENUMERATE times (us): entry 0 run 1125789 exit 34823
912 12:45:51.978963 found VGA at PCI: 00:02.0
913 12:45:51.982831 Setting up VGA for PCI: 00:02.0
914 12:45:51.987247 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
915 12:45:51.991953 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
916 12:45:51.994507 Allocating resources...
917 12:45:51.996615 Reading resources...
918 12:45:52.000919 Root Device read_resources bus 0 link: 0
919 12:45:52.005382 CPU_CLUSTER: 0 read_resources bus 0 link: 0
920 12:45:52.010516 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
921 12:45:52.015219 DOMAIN: 0000 read_resources bus 0 link: 0
922 12:45:52.020833 PCI: 00:14.0 read_resources bus 0 link: 0
923 12:45:52.025331 USB0 port 0 read_resources bus 0 link: 0
924 12:45:52.035527 USB0 port 0 read_resources bus 0 link: 0 done
925 12:45:52.040556 PCI: 00:14.0 read_resources bus 0 link: 0 done
926 12:45:52.045774 PCI: 00:15.0 read_resources bus 1 link: 0
927 12:45:52.050969 PCI: 00:15.0 read_resources bus 1 link: 0 done
928 12:45:52.055313 PCI: 00:15.1 read_resources bus 2 link: 0
929 12:45:52.060840 PCI: 00:15.1 read_resources bus 2 link: 0 done
930 12:45:52.065921 PCI: 00:19.0 read_resources bus 3 link: 0
931 12:45:52.071868 PCI: 00:19.0 read_resources bus 3 link: 0 done
932 12:45:52.076872 PCI: 00:1c.0 read_resources bus 1 link: 0
933 12:45:52.081992 PCI: 00:1c.0 read_resources bus 1 link: 0 done
934 12:45:52.086942 PCI: 00:1d.0 read_resources bus 2 link: 0
935 12:45:52.091816 PCI: 00:1d.0 read_resources bus 2 link: 0 done
936 12:45:52.096413 PCI: 00:1f.0 read_resources bus 0 link: 0
937 12:45:52.101131 PCI: 00:1f.0 read_resources bus 0 link: 0 done
938 12:45:52.107603 DOMAIN: 0000 read_resources bus 0 link: 0 done
939 12:45:52.112720 Root Device read_resources bus 0 link: 0 done
940 12:45:52.116225 Done reading resources.
941 12:45:52.121199 Show resources in subtree (Root Device)...After reading.
942 12:45:52.125742 Root Device child on link 0 CPU_CLUSTER: 0
943 12:45:52.129514 CPU_CLUSTER: 0 child on link 0 APIC: 00
944 12:45:52.130445 APIC: 00
945 12:45:52.132471 APIC: 02
946 12:45:52.136364 DOMAIN: 0000 child on link 0 PCI: 00:00.0
947 12:45:52.145794 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
948 12:45:52.154965 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
949 12:45:52.156878 PCI: 00:00.0
950 12:45:52.167373 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
951 12:45:52.176695 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
952 12:45:52.185648 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
953 12:45:52.194844 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
954 12:45:52.203665 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
955 12:45:52.213766 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
956 12:45:52.222524 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
957 12:45:52.231620 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
958 12:45:52.240914 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
959 12:45:52.250140 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
960 12:45:52.260166 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
961 12:45:52.270552 PCI: 00:00.0 resource base 100000000 size 6e800000 align 0 gran 0 limit 0 flags e0004200 index c
962 12:45:52.278741 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
963 12:45:52.288555 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
964 12:45:52.289268 PCI: 00:02.0
965 12:45:52.300050 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
966 12:45:52.311066 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
967 12:45:52.318398 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
968 12:45:52.320733 PCI: 00:04.0
969 12:45:52.330176 PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
970 12:45:52.331621 PCI: 00:08.0
971 12:45:52.341832 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
972 12:45:52.343241 PCI: 00:12.0
973 12:45:52.353336 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
974 12:45:52.358480 PCI: 00:14.0 child on link 0 USB0 port 0
975 12:45:52.368218 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
976 12:45:52.371852 USB0 port 0 child on link 0 USB2 port 0
977 12:45:52.373743 USB2 port 0
978 12:45:52.375312 USB2 port 1
979 12:45:52.377128 USB2 port 2
980 12:45:52.379397 USB2 port 4
981 12:45:52.380685 USB2 port 5
982 12:45:52.382496 USB2 port 6
983 12:45:52.384035 USB2 port 7
984 12:45:52.386024 USB2 port 8
985 12:45:52.388273 USB2 port 9
986 12:45:52.389982 USB3 port 0
987 12:45:52.391571 USB3 port 1
988 12:45:52.393204 USB3 port 2
989 12:45:52.394632 USB3 port 3
990 12:45:52.396857 USB3 port 4
991 12:45:52.398748 PCI: 00:14.2
992 12:45:52.408321 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
993 12:45:52.417981 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
994 12:45:52.419550 PCI: 00:14.3
995 12:45:52.429363 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
996 12:45:52.434198 PCI: 00:15.0 child on link 0 I2C: 01:10
997 12:45:52.444664 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
998 12:45:52.445458 I2C: 01:10
999 12:45:52.447371 I2C: 01:10
1000 12:45:52.449365 I2C: 01:34
1001 12:45:52.453573 PCI: 00:15.1 child on link 0 I2C: 02:2c
1002 12:45:52.462790 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1003 12:45:52.464904 I2C: 02:2c
1004 12:45:52.466339 PCI: 00:16.0
1005 12:45:52.476221 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1006 12:45:52.477197 PCI: 00:17.0
1007 12:45:52.486979 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1008 12:45:52.495675 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1009 12:45:52.504026 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1010 12:45:52.512092 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1011 12:45:52.520409 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1012 12:45:52.529820 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1013 12:45:52.533581 PCI: 00:19.0 child on link 0 I2C: 03:50
1014 12:45:52.543693 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1015 12:45:52.553754 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1016 12:45:52.554796 I2C: 03:50
1017 12:45:52.556729 PCI: 00:19.2
1018 12:45:52.567661 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1019 12:45:52.577839 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1020 12:45:52.582144 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1021 12:45:52.590633 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1022 12:45:52.600694 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1023 12:45:52.609503 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1024 12:45:52.612075 PCI: 01:00.0
1025 12:45:52.620509 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
1026 12:45:52.625135 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1027 12:45:52.634147 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1028 12:45:52.644248 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1029 12:45:52.652893 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1030 12:45:52.654062 PCI: 02:00.0
1031 12:45:52.664515 PCI: 02:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1032 12:45:52.669303 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1033 12:45:52.677424 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1034 12:45:52.686675 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1035 12:45:52.688093 PNP: 0c09.0
1036 12:45:52.697013 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1037 12:45:52.705758 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1038 12:45:52.713818 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1039 12:45:52.716347 PCI: 00:1f.3
1040 12:45:52.725689 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1041 12:45:52.735734 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1042 12:45:52.737275 PCI: 00:1f.4
1043 12:45:52.746413 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1044 12:45:52.755682 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1045 12:45:52.757272 PCI: 00:1f.5
1046 12:45:52.766606 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1047 12:45:52.768179 PCI: 00:1f.6
1048 12:45:52.778345 PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
1049 12:45:52.784313 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1050 12:45:52.790145 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1051 12:45:52.797326 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1052 12:45:52.803433 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1053 12:45:52.811116 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1054 12:45:52.813545 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1055 12:45:52.817665 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1056 12:45:52.821727 PCI: 00:17.0 18 * [0x60 - 0x67] io
1057 12:45:52.824904 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1058 12:45:52.831454 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1059 12:45:52.837634 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1060 12:45:52.845935 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1061 12:45:52.854454 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1062 12:45:52.861144 PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1063 12:45:52.865174 PCI: 01:00.0 14 * [0x0 - 0xfff] mem
1064 12:45:52.873715 PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1065 12:45:52.880857 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1066 12:45:52.889661 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1067 12:45:52.895818 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1068 12:45:52.899960 PCI: 02:00.0 10 * [0x0 - 0x3fff] mem
1069 12:45:52.908067 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1070 12:45:52.912655 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1071 12:45:52.917127 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1072 12:45:52.922057 PCI: 00:1c.0 20 * [0x11000000 - 0x110fffff] mem
1073 12:45:52.927514 PCI: 00:1d.0 20 * [0x11100000 - 0x111fffff] mem
1074 12:45:52.932526 PCI: 00:1f.3 20 * [0x11200000 - 0x112fffff] mem
1075 12:45:52.937011 PCI: 00:1f.6 10 * [0x11300000 - 0x1131ffff] mem
1076 12:45:52.942339 PCI: 00:14.0 10 * [0x11320000 - 0x1132ffff] mem
1077 12:45:52.946313 PCI: 00:04.0 10 * [0x11330000 - 0x11337fff] mem
1078 12:45:52.951940 PCI: 00:14.3 10 * [0x11338000 - 0x1133bfff] mem
1079 12:45:52.956907 PCI: 00:1f.3 10 * [0x1133c000 - 0x1133ffff] mem
1080 12:45:52.962086 PCI: 00:14.2 10 * [0x11340000 - 0x11341fff] mem
1081 12:45:52.965772 PCI: 00:17.0 10 * [0x11342000 - 0x11343fff] mem
1082 12:45:52.970836 PCI: 00:08.0 10 * [0x11344000 - 0x11344fff] mem
1083 12:45:52.976291 PCI: 00:12.0 10 * [0x11345000 - 0x11345fff] mem
1084 12:45:52.980846 PCI: 00:14.2 18 * [0x11346000 - 0x11346fff] mem
1085 12:45:52.985902 PCI: 00:15.0 10 * [0x11347000 - 0x11347fff] mem
1086 12:45:52.990548 PCI: 00:15.1 10 * [0x11348000 - 0x11348fff] mem
1087 12:45:52.995154 PCI: 00:16.0 10 * [0x11349000 - 0x11349fff] mem
1088 12:45:53.000224 PCI: 00:19.0 10 * [0x1134a000 - 0x1134afff] mem
1089 12:45:53.004863 PCI: 00:19.0 18 * [0x1134b000 - 0x1134bfff] mem
1090 12:45:53.009668 PCI: 00:19.2 18 * [0x1134c000 - 0x1134cfff] mem
1091 12:45:53.014683 PCI: 00:1f.5 10 * [0x1134d000 - 0x1134dfff] mem
1092 12:45:53.019280 PCI: 00:17.0 24 * [0x1134e000 - 0x1134e7ff] mem
1093 12:45:53.025032 PCI: 00:17.0 14 * [0x1134f000 - 0x1134f0ff] mem
1094 12:45:53.029311 PCI: 00:1f.4 10 * [0x11350000 - 0x113500ff] mem
1095 12:45:53.037947 DOMAIN: 0000 mem: base: 11350100 size: 11350100 align: 28 gran: 0 limit: ffffffff done
1096 12:45:53.042205 avoid_fixed_resources: DOMAIN: 0000
1097 12:45:53.047230 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1098 12:45:53.053404 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1099 12:45:53.060672 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1100 12:45:53.069196 constrain_resources: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)
1101 12:45:53.076489 constrain_resources: PCI: 00:00.0 08 base 000c0000 limit 89ffffff mem (fixed)
1102 12:45:53.084035 constrain_resources: PCI: 00:00.0 0a base 8a000000 limit 8affffff mem (fixed)
1103 12:45:53.091387 constrain_resources: PCI: 00:00.0 0b base 8b000000 limit 8f7fffff mem (fixed)
1104 12:45:53.099513 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1105 12:45:53.106411 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1106 12:45:53.114341 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1107 12:45:53.121694 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1108 12:45:53.128877 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1109 12:45:53.130886 Setting resources...
1110 12:45:53.137853 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1111 12:45:53.142253 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1112 12:45:53.145195 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1113 12:45:53.149705 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1114 12:45:53.153326 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1115 12:45:53.159397 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1116 12:45:53.165535 PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1117 12:45:53.172343 PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1118 12:45:53.178446 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1119 12:45:53.184635 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1120 12:45:53.192487 DOMAIN: 0000 mem: base:c0000000 size:11350100 align:28 gran:0 limit:dfffffff
1121 12:45:53.197646 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1122 12:45:53.202802 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1123 12:45:53.207595 PCI: 00:1c.0 20 * [0xd1000000 - 0xd10fffff] mem
1124 12:45:53.212218 PCI: 00:1d.0 20 * [0xd1100000 - 0xd11fffff] mem
1125 12:45:53.217006 PCI: 00:1f.3 20 * [0xd1200000 - 0xd12fffff] mem
1126 12:45:53.221576 PCI: 00:1f.6 10 * [0xd1300000 - 0xd131ffff] mem
1127 12:45:53.226287 PCI: 00:14.0 10 * [0xd1320000 - 0xd132ffff] mem
1128 12:45:53.231422 PCI: 00:04.0 10 * [0xd1330000 - 0xd1337fff] mem
1129 12:45:53.237219 PCI: 00:14.3 10 * [0xd1338000 - 0xd133bfff] mem
1130 12:45:53.241050 PCI: 00:1f.3 10 * [0xd133c000 - 0xd133ffff] mem
1131 12:45:53.246141 PCI: 00:14.2 10 * [0xd1340000 - 0xd1341fff] mem
1132 12:45:53.251161 PCI: 00:17.0 10 * [0xd1342000 - 0xd1343fff] mem
1133 12:45:53.255445 PCI: 00:08.0 10 * [0xd1344000 - 0xd1344fff] mem
1134 12:45:53.260664 PCI: 00:12.0 10 * [0xd1345000 - 0xd1345fff] mem
1135 12:45:53.265622 PCI: 00:14.2 18 * [0xd1346000 - 0xd1346fff] mem
1136 12:45:53.270191 PCI: 00:15.0 10 * [0xd1347000 - 0xd1347fff] mem
1137 12:45:53.275078 PCI: 00:15.1 10 * [0xd1348000 - 0xd1348fff] mem
1138 12:45:53.280364 PCI: 00:16.0 10 * [0xd1349000 - 0xd1349fff] mem
1139 12:45:53.285666 PCI: 00:19.0 10 * [0xd134a000 - 0xd134afff] mem
1140 12:45:53.289515 PCI: 00:19.0 18 * [0xd134b000 - 0xd134bfff] mem
1141 12:45:53.294305 PCI: 00:19.2 18 * [0xd134c000 - 0xd134cfff] mem
1142 12:45:53.299329 PCI: 00:1f.5 10 * [0xd134d000 - 0xd134dfff] mem
1143 12:45:53.304319 PCI: 00:17.0 24 * [0xd134e000 - 0xd134e7ff] mem
1144 12:45:53.309305 PCI: 00:17.0 14 * [0xd134f000 - 0xd134f0ff] mem
1145 12:45:53.313838 PCI: 00:1f.4 10 * [0xd1350000 - 0xd13500ff] mem
1146 12:45:53.321828 DOMAIN: 0000 mem: next_base: d1350100 size: 11350100 align: 28 gran: 0 done
1147 12:45:53.328957 PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1148 12:45:53.336536 PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1149 12:45:53.343406 PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1150 12:45:53.349437 PCI: 01:00.0 14 * [0xd1000000 - 0xd1000fff] mem
1151 12:45:53.356024 PCI: 00:1c.0 mem: next_base: d1001000 size: 100000 align: 20 gran: 20 done
1152 12:45:53.363715 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1153 12:45:53.371155 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1154 12:45:53.378104 PCI: 00:1d.0 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff
1155 12:45:53.383737 PCI: 02:00.0 10 * [0xd1100000 - 0xd1103fff] mem
1156 12:45:53.390344 PCI: 00:1d.0 mem: next_base: d1104000 size: 100000 align: 20 gran: 20 done
1157 12:45:53.394335 Root Device assign_resources, bus 0 link: 0
1158 12:45:53.399570 DOMAIN: 0000 assign_resources, bus 0 link: 0
1159 12:45:53.407823 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1160 12:45:53.416225 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1161 12:45:53.424610 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1162 12:45:53.432843 PCI: 00:04.0 10 <- [0x00d1330000 - 0x00d1337fff] size 0x00008000 gran 0x0f mem64
1163 12:45:53.441435 PCI: 00:08.0 10 <- [0x00d1344000 - 0x00d1344fff] size 0x00001000 gran 0x0c mem64
1164 12:45:53.449287 PCI: 00:12.0 10 <- [0x00d1345000 - 0x00d1345fff] size 0x00001000 gran 0x0c mem64
1165 12:45:53.457428 PCI: 00:14.0 10 <- [0x00d1320000 - 0x00d132ffff] size 0x00010000 gran 0x10 mem64
1166 12:45:53.462099 PCI: 00:14.0 assign_resources, bus 0 link: 0
1167 12:45:53.466411 PCI: 00:14.0 assign_resources, bus 0 link: 0
1168 12:45:53.474636 PCI: 00:14.2 10 <- [0x00d1340000 - 0x00d1341fff] size 0x00002000 gran 0x0d mem64
1169 12:45:53.482723 PCI: 00:14.2 18 <- [0x00d1346000 - 0x00d1346fff] size 0x00001000 gran 0x0c mem64
1170 12:45:53.491866 PCI: 00:14.3 10 <- [0x00d1338000 - 0x00d133bfff] size 0x00004000 gran 0x0e mem64
1171 12:45:53.499424 PCI: 00:15.0 10 <- [0x00d1347000 - 0x00d1347fff] size 0x00001000 gran 0x0c mem64
1172 12:45:53.503524 PCI: 00:15.0 assign_resources, bus 1 link: 0
1173 12:45:53.508551 PCI: 00:15.0 assign_resources, bus 1 link: 0
1174 12:45:53.517161 PCI: 00:15.1 10 <- [0x00d1348000 - 0x00d1348fff] size 0x00001000 gran 0x0c mem64
1175 12:45:53.522177 PCI: 00:15.1 assign_resources, bus 2 link: 0
1176 12:45:53.526533 PCI: 00:15.1 assign_resources, bus 2 link: 0
1177 12:45:53.535060 PCI: 00:16.0 10 <- [0x00d1349000 - 0x00d1349fff] size 0x00001000 gran 0x0c mem64
1178 12:45:53.542370 PCI: 00:17.0 10 <- [0x00d1342000 - 0x00d1343fff] size 0x00002000 gran 0x0d mem
1179 12:45:53.550421 PCI: 00:17.0 14 <- [0x00d134f000 - 0x00d134f0ff] size 0x00000100 gran 0x08 mem
1180 12:45:53.557810 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1181 12:45:53.566345 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1182 12:45:53.573082 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1183 12:45:53.581745 PCI: 00:17.0 24 <- [0x00d134e000 - 0x00d134e7ff] size 0x00000800 gran 0x0b mem
1184 12:45:53.589995 PCI: 00:19.0 10 <- [0x00d134a000 - 0x00d134afff] size 0x00001000 gran 0x0c mem64
1185 12:45:53.597293 PCI: 00:19.0 18 <- [0x00d134b000 - 0x00d134bfff] size 0x00001000 gran 0x0c mem64
1186 12:45:53.602191 PCI: 00:19.0 assign_resources, bus 3 link: 0
1187 12:45:53.607128 PCI: 00:19.0 assign_resources, bus 3 link: 0
1188 12:45:53.615108 PCI: 00:19.2 18 <- [0x00d134c000 - 0x00d134cfff] size 0x00001000 gran 0x0c mem64
1189 12:45:53.623482 PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1190 12:45:53.632694 PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1191 12:45:53.640719 PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1192 12:45:53.645455 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1193 12:45:53.653888 PCI: 01:00.0 14 <- [0x00d1000000 - 0x00d1000fff] size 0x00001000 gran 0x0c mem
1194 12:45:53.658343 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1195 12:45:53.667135 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io
1196 12:45:53.675984 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
1197 12:45:53.684431 PCI: 00:1d.0 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem
1198 12:45:53.688926 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1199 12:45:53.697669 PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d1103fff] size 0x00004000 gran 0x0e mem64
1200 12:45:53.702226 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1201 12:45:53.707107 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1202 12:45:53.711280 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1203 12:45:53.715977 LPC: Trying to open IO window from 930 size 8
1204 12:45:53.720451 LPC: Trying to open IO window from 940 size 8
1205 12:45:53.725973 LPC: Trying to open IO window from 950 size 10
1206 12:45:53.733357 PCI: 00:1f.3 10 <- [0x00d133c000 - 0x00d133ffff] size 0x00004000 gran 0x0e mem64
1207 12:45:53.741897 PCI: 00:1f.3 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 mem64
1208 12:45:53.750555 PCI: 00:1f.4 10 <- [0x00d1350000 - 0x00d13500ff] size 0x00000100 gran 0x08 mem64
1209 12:45:53.758474 PCI: 00:1f.5 10 <- [0x00d134d000 - 0x00d134dfff] size 0x00001000 gran 0x0c mem
1210 12:45:53.766230 PCI: 00:1f.6 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem
1211 12:45:53.771048 DOMAIN: 0000 assign_resources, bus 0 link: 0
1212 12:45:53.776296 Root Device assign_resources, bus 0 link: 0
1213 12:45:53.778773 Done setting resources.
1214 12:45:53.784873 Show resources in subtree (Root Device)...After assigning values.
1215 12:45:53.789700 Root Device child on link 0 CPU_CLUSTER: 0
1216 12:45:53.792724 CPU_CLUSTER: 0 child on link 0 APIC: 00
1217 12:45:53.794608 APIC: 00
1218 12:45:53.796071 APIC: 02
1219 12:45:53.800920 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1220 12:45:53.809821 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1221 12:45:53.820661 DOMAIN: 0000 resource base c0000000 size 11350100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1222 12:45:53.822482 PCI: 00:00.0
1223 12:45:53.831955 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1224 12:45:53.841842 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1225 12:45:53.850733 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1226 12:45:53.860051 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1227 12:45:53.869309 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1228 12:45:53.879113 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1229 12:45:53.888264 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1230 12:45:53.897059 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1231 12:45:53.906341 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1232 12:45:53.915947 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1233 12:45:53.925926 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1234 12:45:53.935431 PCI: 00:00.0 resource base 100000000 size 6e800000 align 0 gran 0 limit 0 flags e0004200 index c
1235 12:45:53.944430 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1236 12:45:53.953683 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1237 12:45:53.955621 PCI: 00:02.0
1238 12:45:53.965689 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1239 12:45:53.976335 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1240 12:45:53.985482 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1241 12:45:53.987448 PCI: 00:04.0
1242 12:45:53.997473 PCI: 00:04.0 resource base d1330000 size 8000 align 15 gran 15 limit d1337fff flags 60000201 index 10
1243 12:45:53.999608 PCI: 00:08.0
1244 12:45:54.009664 PCI: 00:08.0 resource base d1344000 size 1000 align 12 gran 12 limit d1344fff flags 60000201 index 10
1245 12:45:54.011295 PCI: 00:12.0
1246 12:45:54.021244 PCI: 00:12.0 resource base d1345000 size 1000 align 12 gran 12 limit d1345fff flags 60000201 index 10
1247 12:45:54.026064 PCI: 00:14.0 child on link 0 USB0 port 0
1248 12:45:54.036951 PCI: 00:14.0 resource base d1320000 size 10000 align 16 gran 16 limit d132ffff flags 60000201 index 10
1249 12:45:54.041331 USB0 port 0 child on link 0 USB2 port 0
1250 12:45:54.042664 USB2 port 0
1251 12:45:54.044112 USB2 port 1
1252 12:45:54.046101 USB2 port 2
1253 12:45:54.047819 USB2 port 4
1254 12:45:54.049237 USB2 port 5
1255 12:45:54.051832 USB2 port 6
1256 12:45:54.053424 USB2 port 7
1257 12:45:54.055056 USB2 port 8
1258 12:45:54.056264 USB2 port 9
1259 12:45:54.057929 USB3 port 0
1260 12:45:54.059979 USB3 port 1
1261 12:45:54.061641 USB3 port 2
1262 12:45:54.063459 USB3 port 3
1263 12:45:54.065105 USB3 port 4
1264 12:45:54.066708 PCI: 00:14.2
1265 12:45:54.077180 PCI: 00:14.2 resource base d1340000 size 2000 align 13 gran 13 limit d1341fff flags 60000201 index 10
1266 12:45:54.087371 PCI: 00:14.2 resource base d1346000 size 1000 align 12 gran 12 limit d1346fff flags 60000201 index 18
1267 12:45:54.089668 PCI: 00:14.3
1268 12:45:54.099934 PCI: 00:14.3 resource base d1338000 size 4000 align 14 gran 14 limit d133bfff flags 60000201 index 10
1269 12:45:54.103692 PCI: 00:15.0 child on link 0 I2C: 01:10
1270 12:45:54.114420 PCI: 00:15.0 resource base d1347000 size 1000 align 12 gran 12 limit d1347fff flags 60000201 index 10
1271 12:45:54.115766 I2C: 01:10
1272 12:45:54.117754 I2C: 01:10
1273 12:45:54.118716 I2C: 01:34
1274 12:45:54.123376 PCI: 00:15.1 child on link 0 I2C: 02:2c
1275 12:45:54.133464 PCI: 00:15.1 resource base d1348000 size 1000 align 12 gran 12 limit d1348fff flags 60000201 index 10
1276 12:45:54.134468 I2C: 02:2c
1277 12:45:54.136480 PCI: 00:16.0
1278 12:45:54.147127 PCI: 00:16.0 resource base d1349000 size 1000 align 12 gran 12 limit d1349fff flags 60000201 index 10
1279 12:45:54.148609 PCI: 00:17.0
1280 12:45:54.159083 PCI: 00:17.0 resource base d1342000 size 2000 align 13 gran 13 limit d1343fff flags 60000200 index 10
1281 12:45:54.168514 PCI: 00:17.0 resource base d134f000 size 100 align 12 gran 8 limit d134f0ff flags 60000200 index 14
1282 12:45:54.178511 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1283 12:45:54.186795 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1284 12:45:54.195891 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1285 12:45:54.206222 PCI: 00:17.0 resource base d134e000 size 800 align 12 gran 11 limit d134e7ff flags 60000200 index 24
1286 12:45:54.210524 PCI: 00:19.0 child on link 0 I2C: 03:50
1287 12:45:54.221497 PCI: 00:19.0 resource base d134a000 size 1000 align 12 gran 12 limit d134afff flags 60000201 index 10
1288 12:45:54.231715 PCI: 00:19.0 resource base d134b000 size 1000 align 12 gran 12 limit d134bfff flags 60000201 index 18
1289 12:45:54.232661 I2C: 03:50
1290 12:45:54.233999 PCI: 00:19.2
1291 12:45:54.245419 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1292 12:45:54.256319 PCI: 00:19.2 resource base d134c000 size 1000 align 12 gran 12 limit d134cfff flags 60000201 index 18
1293 12:45:54.260756 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1294 12:45:54.269431 PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1295 12:45:54.279583 PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1296 12:45:54.290227 PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1297 12:45:54.291766 PCI: 01:00.0
1298 12:45:54.301933 PCI: 01:00.0 resource base d1000000 size 1000 align 12 gran 12 limit d1000fff flags 60000200 index 14
1299 12:45:54.306188 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1300 12:45:54.315587 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1301 12:45:54.325405 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1302 12:45:54.336139 PCI: 00:1d.0 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20
1303 12:45:54.338040 PCI: 02:00.0
1304 12:45:54.349081 PCI: 02:00.0 resource base d1100000 size 4000 align 14 gran 14 limit d1103fff flags 60000201 index 10
1305 12:45:54.353256 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1306 12:45:54.361452 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1307 12:45:54.370621 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1308 12:45:54.372221 PNP: 0c09.0
1309 12:45:54.381291 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1310 12:45:54.389248 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1311 12:45:54.397710 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1312 12:45:54.399782 PCI: 00:1f.3
1313 12:45:54.409559 PCI: 00:1f.3 resource base d133c000 size 4000 align 14 gran 14 limit d133ffff flags 60000201 index 10
1314 12:45:54.419997 PCI: 00:1f.3 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60000201 index 20
1315 12:45:54.421663 PCI: 00:1f.4
1316 12:45:54.431422 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1317 12:45:54.441390 PCI: 00:1f.4 resource base d1350000 size 100 align 12 gran 8 limit d13500ff flags 60000201 index 10
1318 12:45:54.442902 PCI: 00:1f.5
1319 12:45:54.453465 PCI: 00:1f.5 resource base d134d000 size 1000 align 12 gran 12 limit d134dfff flags 60000200 index 10
1320 12:45:54.455057 PCI: 00:1f.6
1321 12:45:54.464959 PCI: 00:1f.6 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10
1322 12:45:54.468210 Done allocating resources.
1323 12:45:54.474219 BS: BS_DEV_RESOURCES times (us): entry 0 run 2491715 exit 13
1324 12:45:54.476892 Enabling resources...
1325 12:45:54.480982 PCI: 00:00.0 subsystem <- 1028/3e35
1326 12:45:54.483586 PCI: 00:00.0 cmd <- 06
1327 12:45:54.487491 PCI: 00:02.0 subsystem <- 1028/3ea1
1328 12:45:54.489370 PCI: 00:02.0 cmd <- 03
1329 12:45:54.494080 PCI: 00:04.0 subsystem <- 1028/1903
1330 12:45:54.495810 PCI: 00:04.0 cmd <- 02
1331 12:45:54.498614 PCI: 00:08.0 cmd <- 06
1332 12:45:54.502865 PCI: 00:12.0 subsystem <- 1028/9df9
1333 12:45:54.504558 PCI: 00:12.0 cmd <- 02
1334 12:45:54.509081 PCI: 00:14.0 subsystem <- 1028/9ded
1335 12:45:54.511170 PCI: 00:14.0 cmd <- 02
1336 12:45:54.513523 PCI: 00:14.2 cmd <- 02
1337 12:45:54.517716 PCI: 00:14.3 subsystem <- 1028/9df0
1338 12:45:54.519936 PCI: 00:14.3 cmd <- 02
1339 12:45:54.523975 PCI: 00:15.0 subsystem <- 1028/9de8
1340 12:45:54.526378 PCI: 00:15.0 cmd <- 02
1341 12:45:54.530060 PCI: 00:15.1 subsystem <- 1028/9de9
1342 12:45:54.532461 PCI: 00:15.1 cmd <- 02
1343 12:45:54.536979 PCI: 00:16.0 subsystem <- 1028/9de0
1344 12:45:54.538715 PCI: 00:16.0 cmd <- 02
1345 12:45:54.542722 PCI: 00:17.0 subsystem <- 1028/9dd3
1346 12:45:54.545033 PCI: 00:17.0 cmd <- 03
1347 12:45:54.548786 PCI: 00:19.0 subsystem <- 1028/9dc5
1348 12:45:54.551791 PCI: 00:19.0 cmd <- 06
1349 12:45:54.555353 PCI: 00:19.2 subsystem <- 1028/9dc7
1350 12:45:54.557746 PCI: 00:19.2 cmd <- 06
1351 12:45:54.561442 PCI: 00:1c.0 bridge ctrl <- 0003
1352 12:45:54.564327 PCI: 00:1c.0 subsystem <- 1028/9dbf
1353 12:45:54.567443 Capability: type 0x10 @ 0x40
1354 12:45:54.570980 Capability: type 0x05 @ 0x80
1355 12:45:54.573876 Capability: type 0x0d @ 0x90
1356 12:45:54.575835 PCI: 00:1c.0 cmd <- 06
1357 12:45:54.579443 PCI: 00:1d.0 bridge ctrl <- 0003
1358 12:45:54.582844 PCI: 00:1d.0 subsystem <- 1028/9db4
1359 12:45:54.586095 Capability: type 0x10 @ 0x40
1360 12:45:54.589314 Capability: type 0x05 @ 0x80
1361 12:45:54.592019 Capability: type 0x0d @ 0x90
1362 12:45:54.594202 PCI: 00:1d.0 cmd <- 06
1363 12:45:54.597869 PCI: 00:1f.0 subsystem <- 1028/9d84
1364 12:45:54.600105 PCI: 00:1f.0 cmd <- 407
1365 12:45:54.604401 PCI: 00:1f.3 subsystem <- 1028/9dc8
1366 12:45:54.606543 PCI: 00:1f.3 cmd <- 02
1367 12:45:54.611452 PCI: 00:1f.4 subsystem <- 1028/9da3
1368 12:45:54.613475 PCI: 00:1f.4 cmd <- 03
1369 12:45:54.616676 PCI: 00:1f.5 subsystem <- 1028/9da4
1370 12:45:54.619951 PCI: 00:1f.5 cmd <- 406
1371 12:45:54.622960 PCI: 00:1f.6 subsystem <- 1028/15be
1372 12:45:54.625884 PCI: 00:1f.6 cmd <- 02
1373 12:45:54.636015 PCI: 01:00.0 cmd <- 02
1374 12:45:54.639565 PCI: 02:00.0 cmd <- 02
1375 12:45:54.641375 done.
1376 12:45:54.646890 BS: BS_DEV_ENABLE times (us): entry 396 run 167082 exit 0
1377 12:45:54.650559 Initializing devices...
1378 12:45:54.652066 Root Device init ...
1379 12:45:54.656283 Root Device init finished in 2139 usecs
1380 12:45:54.658560 CPU_CLUSTER: 0 init ...
1381 12:45:54.662628 CPU_CLUSTER: 0 init finished in 2429 usecs
1382 12:45:54.666665 PCI: 00:00.0 init ...
1383 12:45:54.669795 CPU TDP: 15 Watts
1384 12:45:54.671164 CPU PL2 = 51 Watts
1385 12:45:54.675485 PCI: 00:00.0 init finished in 7036 usecs
1386 12:45:54.678335 PCI: 00:02.0 init ...
1387 12:45:54.682640 PCI: 00:02.0 init finished in 2228 usecs
1388 12:45:54.685692 PCI: 00:04.0 init ...
1389 12:45:54.688985 PCI: 00:04.0 init finished in 2236 usecs
1390 12:45:54.691972 PCI: 00:08.0 init ...
1391 12:45:54.695863 PCI: 00:08.0 init finished in 2235 usecs
1392 12:45:54.698625 PCI: 00:12.0 init ...
1393 12:45:54.702732 PCI: 00:12.0 init finished in 2236 usecs
1394 12:45:54.704809 PCI: 00:14.0 init ...
1395 12:45:54.709453 PCI: 00:14.0 init finished in 2236 usecs
1396 12:45:54.711541 PCI: 00:14.2 init ...
1397 12:45:54.716230 PCI: 00:14.2 init finished in 2235 usecs
1398 12:45:54.718911 PCI: 00:14.3 init ...
1399 12:45:54.722939 PCI: 00:14.3 init finished in 2241 usecs
1400 12:45:54.725354 PCI: 00:15.0 init ...
1401 12:45:54.729311 DW I2C bus 0 at 0xd1347000 (400 KHz)
1402 12:45:54.733237 PCI: 00:15.0 init finished in 5934 usecs
1403 12:45:54.735343 PCI: 00:15.1 init ...
1404 12:45:54.739309 DW I2C bus 1 at 0xd1348000 (400 KHz)
1405 12:45:54.743213 PCI: 00:15.1 init finished in 5925 usecs
1406 12:45:54.746114 PCI: 00:16.0 init ...
1407 12:45:54.750280 PCI: 00:16.0 init finished in 2236 usecs
1408 12:45:54.753032 PCI: 00:19.0 init ...
1409 12:45:54.757478 DW I2C bus 4 at 0xd134a000 (400 KHz)
1410 12:45:54.761433 PCI: 00:19.0 init finished in 5935 usecs
1411 12:45:54.764559 PCI: 00:1c.0 init ...
1412 12:45:54.766916 Initializing PCH PCIe bridge.
1413 12:45:54.770839 PCI: 00:1c.0 init finished in 5240 usecs
1414 12:45:54.773856 PCI: 00:1d.0 init ...
1415 12:45:54.776601 Initializing PCH PCIe bridge.
1416 12:45:54.781555 PCI: 00:1d.0 init finished in 5250 usecs
1417 12:45:54.783801 PCI: 00:1f.0 init ...
1418 12:45:54.787530 IOAPIC: Initializing IOAPIC at 0xfec00000
1419 12:45:54.792281 IOAPIC: Bootstrap Processor Local APIC = 0x00
1420 12:45:54.794460 IOAPIC: ID = 0x02
1421 12:45:54.796826 IOAPIC: Dumping registers
1422 12:45:54.800103 reg 0x0000: 0x02000000
1423 12:45:54.801779 reg 0x0001: 0x00770020
1424 12:45:54.804771 reg 0x0002: 0x00000000
1425 12:45:54.809225 PCI: 00:1f.0 init finished in 23306 usecs
1426 12:45:54.811298 PCI: 00:1f.3 init ...
1427 12:45:54.816614 HDA: codec_mask = 05
1428 12:45:54.819695 HDA: Initializing codec #2
1429 12:45:54.821965 HDA: codec viddid: 8086280b
1430 12:45:54.825948 HDA: No verb table entry found
1431 12:45:54.828115 HDA: Initializing codec #0
1432 12:45:54.831414 HDA: codec viddid: 10ec0236
1433 12:45:54.838525 HDA: verb loaded.
1434 12:45:54.842324 PCI: 00:1f.3 init finished in 28831 usecs
1435 12:45:54.845172 PCI: 00:1f.4 init ...
1436 12:45:54.848863 PCI: 00:1f.4 init finished in 2246 usecs
1437 12:45:54.852734 PCI: 00:1f.6 init ...
1438 12:45:54.855741 PCI: 00:1f.6 init finished in 2236 usecs
1439 12:45:54.866961 PCI: 01:00.0 init ...
1440 12:45:54.871142 PCI: 01:00.0 init finished in 2235 usecs
1441 12:45:54.874039 PCI: 02:00.0 init ...
1442 12:45:54.877471 PCI: 02:00.0 init finished in 2237 usecs
1443 12:45:54.880328 PNP: 0c09.0 init ...
1444 12:45:54.884192 EC Label : 00.00.20
1445 12:45:54.888207 EC Revision : 9ca674bba
1446 12:45:54.891706 EC Model Num : 08B9
1447 12:45:54.895405 EC Build Date : 05/10/19
1448 12:45:54.904823 PNP: 0c09.0 init finished in 21760 usecs
1449 12:45:54.906337 Devices initialized
1450 12:45:54.909647 Show all devs... After init.
1451 12:45:54.911774 Root Device: enabled 1
1452 12:45:54.914066 CPU_CLUSTER: 0: enabled 1
1453 12:45:54.917010 DOMAIN: 0000: enabled 1
1454 12:45:54.918498 APIC: 00: enabled 1
1455 12:45:54.921396 PCI: 00:00.0: enabled 1
1456 12:45:54.923559 PCI: 00:02.0: enabled 1
1457 12:45:54.925803 PCI: 00:04.0: enabled 1
1458 12:45:54.928962 PCI: 00:12.0: enabled 1
1459 12:45:54.930787 PCI: 00:12.5: enabled 0
1460 12:45:54.933863 PCI: 00:12.6: enabled 0
1461 12:45:54.936677 PCI: 00:13.0: enabled 0
1462 12:45:54.938456 PCI: 00:14.0: enabled 1
1463 12:45:54.941153 PCI: 00:14.1: enabled 0
1464 12:45:54.943747 PCI: 00:14.3: enabled 1
1465 12:45:54.945488 PCI: 00:14.5: enabled 0
1466 12:45:54.948172 PCI: 00:15.0: enabled 1
1467 12:45:54.950860 PCI: 00:15.1: enabled 1
1468 12:45:54.952702 PCI: 00:15.2: enabled 0
1469 12:45:54.955437 PCI: 00:15.3: enabled 0
1470 12:45:54.957808 PCI: 00:16.0: enabled 1
1471 12:45:54.960577 PCI: 00:16.1: enabled 0
1472 12:45:54.962839 PCI: 00:16.2: enabled 0
1473 12:45:54.965023 PCI: 00:16.3: enabled 0
1474 12:45:54.967060 PCI: 00:16.4: enabled 0
1475 12:45:54.970044 PCI: 00:16.5: enabled 0
1476 12:45:54.972195 PCI: 00:17.0: enabled 1
1477 12:45:54.974463 PCI: 00:19.0: enabled 1
1478 12:45:54.977271 PCI: 00:19.1: enabled 0
1479 12:45:54.979431 PCI: 00:19.2: enabled 1
1480 12:45:54.982108 PCI: 00:1a.0: enabled 0
1481 12:45:54.985106 PCI: 00:1c.0: enabled 1
1482 12:45:54.986807 PCI: 00:1c.1: enabled 0
1483 12:45:54.989476 PCI: 00:1c.2: enabled 0
1484 12:45:54.991809 PCI: 00:1c.3: enabled 0
1485 12:45:54.994115 PCI: 00:1c.4: enabled 0
1486 12:45:54.996393 PCI: 00:1c.5: enabled 0
1487 12:45:54.998654 PCI: 00:1c.6: enabled 0
1488 12:45:55.001479 PCI: 00:1c.7: enabled 0
1489 12:45:55.004272 PCI: 00:1d.0: enabled 1
1490 12:45:55.006135 PCI: 00:1d.1: enabled 0
1491 12:45:55.008997 PCI: 00:1d.2: enabled 0
1492 12:45:55.010848 PCI: 00:1d.3: enabled 0
1493 12:45:55.014077 PCI: 00:1d.4: enabled 0
1494 12:45:55.016137 PCI: 00:1e.0: enabled 0
1495 12:45:55.018068 PCI: 00:1e.1: enabled 0
1496 12:45:55.020563 PCI: 00:1e.2: enabled 0
1497 12:45:55.023223 PCI: 00:1e.3: enabled 0
1498 12:45:55.025327 PCI: 00:1f.0: enabled 1
1499 12:45:55.028499 PCI: 00:1f.1: enabled 0
1500 12:45:55.030824 PCI: 00:1f.2: enabled 0
1501 12:45:55.033010 PCI: 00:1f.3: enabled 1
1502 12:45:55.035229 PCI: 00:1f.4: enabled 1
1503 12:45:55.037905 PCI: 00:1f.5: enabled 1
1504 12:45:55.040279 PCI: 00:1f.6: enabled 1
1505 12:45:55.043018 USB0 port 0: enabled 1
1506 12:45:55.045852 I2C: 01:10: enabled 1
1507 12:45:55.047176 I2C: 01:10: enabled 1
1508 12:45:55.049090 I2C: 01:34: enabled 1
1509 12:45:55.051645 I2C: 02:2c: enabled 1
1510 12:45:55.054377 I2C: 03:50: enabled 1
1511 12:45:55.055827 PNP: 0c09.0: enabled 1
1512 12:45:55.058540 USB2 port 0: enabled 1
1513 12:45:55.060676 USB2 port 1: enabled 1
1514 12:45:55.063295 USB2 port 2: enabled 1
1515 12:45:55.065316 USB2 port 4: enabled 1
1516 12:45:55.067621 USB2 port 5: enabled 1
1517 12:45:55.071093 USB2 port 6: enabled 1
1518 12:45:55.072504 USB2 port 7: enabled 1
1519 12:45:55.075527 USB2 port 8: enabled 1
1520 12:45:55.077106 USB2 port 9: enabled 1
1521 12:45:55.079161 USB3 port 0: enabled 1
1522 12:45:55.081701 USB3 port 1: enabled 1
1523 12:45:55.084272 USB3 port 2: enabled 1
1524 12:45:55.086198 USB3 port 3: enabled 1
1525 12:45:55.088727 USB3 port 4: enabled 1
1526 12:45:55.090900 APIC: 02: enabled 1
1527 12:45:55.093100 PCI: 00:08.0: enabled 1
1528 12:45:55.095438 PCI: 00:14.2: enabled 1
1529 12:45:55.098672 PCI: 01:00.0: enabled 1
1530 12:45:55.100297 PCI: 02:00.0: enabled 1
1531 12:45:55.106486 Disabling ACPI via APMC:
1532 12:45:55.107517 done.
1533 12:45:55.112586 FMAP: area RW_ELOG found @ 1bf0000 (16384 bytes)
1534 12:45:55.117098 ELOG: NV offset 0x1bf0000 size 0x4000
1535 12:45:55.124104 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1536 12:45:55.131044 ELOG: Event(17) added with size 13 at 2024-03-05 12:43:05 UTC
1537 12:45:55.135725 POST: Unexpected post code in previous boot: 0x73
1538 12:45:55.141881 ELOG: Event(A3) added with size 11 at 2024-03-05 12:43:05 UTC
1539 12:45:55.149117 ELOG: Event(92) added with size 9 at 2024-03-05 12:43:05 UTC
1540 12:45:55.154761 ELOG: Event(93) added with size 9 at 2024-03-05 12:43:05 UTC
1541 12:45:55.160633 ELOG: Event(9A) added with size 9 at 2024-03-05 12:43:05 UTC
1542 12:45:55.167271 ELOG: Event(9E) added with size 10 at 2024-03-05 12:43:05 UTC
1543 12:45:55.173212 ELOG: Event(9F) added with size 14 at 2024-03-05 12:43:05 UTC
1544 12:45:55.178902 BS: BS_DEV_INIT times (us): entry 0 run 453497 exit 72541
1545 12:45:55.185811 ELOG: Event(A1) added with size 10 at 2024-03-05 12:43:05 UTC
1546 12:45:55.193922 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1547 12:45:55.199556 ELOG: Event(A0) added with size 9 at 2024-03-05 12:43:05 UTC
1548 12:45:55.203738 elog_add_boot_reason: Logged dev mode boot
1549 12:45:55.205835 Finalize devices...
1550 12:45:55.207849 PCI: 00:17.0 final
1551 12:45:55.210601 Devices finalized
1552 12:45:55.215057 FMAP: area RW_NVRAM found @ 1bfa000 (24576 bytes)
1553 12:45:55.221373 BS: BS_POST_DEVICE times (us): entry 24776 run 5936 exit 5370
1554 12:45:55.227290 BS: BS_OS_RESUME_CHECK times (us): entry 0 run 96 exit 0
1555 12:45:55.235932 disable_unused_touchscreen: VPD key 'touchscreen_hid' not found, default to ELAN900C
1556 12:45:55.240126 disable_unused_touchscreen: Disable ACPI0C50
1557 12:45:55.244414 disable_unused_touchscreen: Enable ELAN900C
1558 12:45:55.247631 CBFS @ 1d00000 size 300000
1559 12:45:55.253415 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1560 12:45:55.257570 CBFS: Locating 'fallback/dsdt.aml'
1561 12:45:55.261665 CBFS: Found @ offset 10b200 size 4448
1562 12:45:55.263743 CBFS @ 1d00000 size 300000
1563 12:45:55.269888 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1564 12:45:55.273796 CBFS: Locating 'fallback/slic'
1565 12:45:55.278098 CBFS: 'fallback/slic' not found.
1566 12:45:55.282208 ACPI: Writing ACPI tables at 89c0f000.
1567 12:45:55.284257 ACPI: * FACS
1568 12:45:55.285642 ACPI: * DSDT
1569 12:45:55.289855 Ramoops buffer: 0x100000@0x89b0e000.
1570 12:45:55.294413 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
1571 12:45:55.298489 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
1572 12:45:55.302437 ACPI: * FADT
1573 12:45:55.304268 SCI is IRQ9
1574 12:45:55.307853 ACPI: added table 1/32, length now 40
1575 12:45:55.309275 ACPI: * SSDT
1576 12:45:55.312844 Found 1 CPU(s) with 2 core(s) each.
1577 12:45:55.316966 Error: Could not locate 'wifi_sar' in VPD.
1578 12:45:55.321095 Error: failed from getting SAR limits!
1579 12:45:55.325106 \_SB.PCI0.WIFI: Intel WiFi PCI: 00:14.3
1580 12:45:55.329768 dw_i2c: bad counts. hcnt = -14 lcnt = 30
1581 12:45:55.333375 dw_i2c: bad counts. hcnt = -20 lcnt = 40
1582 12:45:55.337256 dw_i2c: bad counts. hcnt = -18 lcnt = 48
1583 12:45:55.342395 \_SB.PCI0.I2C0.H010: ELAN Touchscreen at I2C: 01:10
1584 12:45:55.348181 \_SB.PCI0.I2C0.D034: Melfas Touchscreen at I2C: 01:34
1585 12:45:55.352949 \_SB.PCI0.I2C1.D02C: ELAN Touchpad at I2C: 02:2c
1586 12:45:55.357309 \_SB.PCI0.I2C4.TPMI: I2C TPM at I2C: 03:50
1587 12:45:55.362640 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1588 12:45:55.368624 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-A Port 1 at USB2 port 1
1589 12:45:55.374957 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1590 12:45:55.380569 \_SB.PCI0.XHCI.RHUB.HS05: Right Type-A Port 2 at USB2 port 4
1591 12:45:55.385537 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1592 12:45:55.389827 \_SB.PCI0.XHCI.RHUB.HS07: WWAN at USB2 port 6
1593 12:45:55.394353 \_SB.PCI0.XHCI.RHUB.HS08: USH at USB2 port 7
1594 12:45:55.399409 \_SB.PCI0.XHCI.RHUB.HS09: Fingerprint at USB2 port 8
1595 12:45:55.404953 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1596 12:45:55.411245 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1597 12:45:55.416301 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-A Port 1 at USB3 port 1
1598 12:45:55.422813 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1599 12:45:55.427996 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 2 at USB3 port 3
1600 12:45:55.432541 \_SB.PCI0.XHCI.RHUB.SS05: WWAN at USB3 port 4
1601 12:45:55.436808 ACPI: added table 2/32, length now 44
1602 12:45:55.438844 ACPI: * MCFG
1603 12:45:55.442796 ACPI: added table 3/32, length now 48
1604 12:45:55.443678 ACPI: * TPM2
1605 12:45:55.447207 TPM2 log created at 89afe000
1606 12:45:55.450782 ACPI: added table 4/32, length now 52
1607 12:45:55.452843 ACPI: * MADT
1608 12:45:55.453543 SCI is IRQ9
1609 12:45:55.457254 ACPI: added table 5/32, length now 56
1610 12:45:55.459227 current = 89c14720
1611 12:45:55.461330 ACPI: * IGD OpRegion
1612 12:45:55.463943 GMA: Found VBT in CBFS
1613 12:45:55.466759 GMA: Found valid VBT in CBFS
1614 12:45:55.470847 ACPI: added table 6/32, length now 60
1615 12:45:55.472201 ACPI: * HPET
1616 12:45:55.475931 ACPI: added table 7/32, length now 64
1617 12:45:55.477984 ACPI: done.
1618 12:45:55.479655 ACPI tables: 30672 bytes.
1619 12:45:55.482565 smbios_write_tables: 89afd000
1620 12:45:55.485960 recv_ec_data: 0x01
1621 12:45:55.488039 Create SMBIOS type 17
1622 12:45:55.490618 PCI: 00:14.3 (Intel WiFi)
1623 12:45:55.492596 SMBIOS tables: 708 bytes.
1624 12:45:55.497249 Writing table forward entry at 0x00000500
1625 12:45:55.502831 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 461b
1626 12:45:55.506167 Writing coreboot table at 0x89c33000
1627 12:45:55.512792 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1628 12:45:55.517366 1. 0000000000001000-000000000009ffff: RAM
1629 12:45:55.521767 2. 00000000000a0000-00000000000fffff: RESERVED
1630 12:45:55.525569 3. 0000000000100000-0000000089afcfff: RAM
1631 12:45:55.531977 4. 0000000089afd000-0000000089c80fff: CONFIGURATION TABLES
1632 12:45:55.536429 5. 0000000089c81000-0000000089cdbfff: RAMSTAGE
1633 12:45:55.542312 6. 0000000089cdc000-0000000089ffffff: CONFIGURATION TABLES
1634 12:45:55.547280 7. 000000008a000000-000000008f7fffff: RESERVED
1635 12:45:55.551588 8. 00000000e0000000-00000000efffffff: RESERVED
1636 12:45:55.556804 9. 00000000fc000000-00000000fc000fff: RESERVED
1637 12:45:55.562257 10. 00000000fe000000-00000000fe00ffff: RESERVED
1638 12:45:55.565937 11. 00000000fed10000-00000000fed17fff: RESERVED
1639 12:45:55.571305 12. 00000000fed80000-00000000fed83fff: RESERVED
1640 12:45:55.575611 13. 00000000feda0000-00000000feda1fff: RESERVED
1641 12:45:55.579661 14. 0000000100000000-000000016e7fffff: RAM
1642 12:45:55.585082 Graphics framebuffer located at 0xc0000000
1643 12:45:55.587908 Passing 6 GPIOs to payload:
1644 12:45:55.592753 NAME | PORT | POLARITY | VALUE
1645 12:45:55.598242 write protect | 0x000000dc | high | low
1646 12:45:55.603752 recovery | 0x000000d5 | low | high
1647 12:45:55.608709 lid | undefined | high | high
1648 12:45:55.613149 power | undefined | high | low
1649 12:45:55.619205 oprom | undefined | high | low
1650 12:45:55.624187 EC in RW | undefined | high | low
1651 12:45:55.626872 recv_ec_data: 0x01
1652 12:45:55.627195 SKU ID: 3
1653 12:45:55.629945 CBFS @ 1d00000 size 300000
1654 12:45:55.636588 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1655 12:45:55.642712 Wrote coreboot table at: 89c33000, 0x5b4 bytes, checksum 3918
1656 12:45:55.645204 coreboot table: 1484 bytes.
1657 12:45:55.648202 IMD ROOT 0. 89fff000 00001000
1658 12:45:55.652006 IMD SMALL 1. 89ffe000 00001000
1659 12:45:55.655600 FSP MEMORY 2. 89d0e000 002f0000
1660 12:45:55.658641 CONSOLE 3. 89cee000 00020000
1661 12:45:55.661906 TIME STAMP 4. 89ced000 00000910
1662 12:45:55.665338 VBOOT WORK 5. 89cea000 00003000
1663 12:45:55.668244 VBOOT 6. 89ce9000 00000c0c
1664 12:45:55.671896 MRC DATA 7. 89ce7000 000018f0
1665 12:45:55.674915 ROMSTG STCK 8. 89ce6000 00000400
1666 12:45:55.678635 AFTER CAR 9. 89cdc000 0000a000
1667 12:45:55.681549 RAMSTAGE 10. 89c80000 0005c000
1668 12:45:55.684881 REFCODE 11. 89c4b000 00035000
1669 12:45:55.688185 SMM BACKUP 12. 89c3b000 00010000
1670 12:45:55.691990 COREBOOT 13. 89c33000 00008000
1671 12:45:55.694708 ACPI 14. 89c0f000 00024000
1672 12:45:55.698470 ACPI GNVS 15. 89c0e000 00001000
1673 12:45:55.701815 RAMOOPS 16. 89b0e000 00100000
1674 12:45:55.705101 TPM2 TCGLOG17. 89afe000 00010000
1675 12:45:55.708566 SMBIOS 18. 89afd000 00000800
1676 12:45:55.710703 IMD small region:
1677 12:45:55.713551 IMD ROOT 0. 89ffec00 00000400
1678 12:45:55.717958 FSP RUNTIME 1. 89ffebe0 00000004
1679 12:45:55.721113 POWER STATE 2. 89ffeba0 00000040
1680 12:45:55.723710 ROMSTAGE 3. 89ffeb80 00000004
1681 12:45:55.728347 MEM INFO 4. 89ffe9c0 000001a9
1682 12:45:55.731432 VPD 5. 89ffe960 00000058
1683 12:45:55.734241 COREBOOTFWD 6. 89ffe920 00000028
1684 12:45:55.738012 MTRR: Physical address space:
1685 12:45:55.743763 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1686 12:45:55.750752 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1687 12:45:55.756474 0x00000000000c0000 - 0x000000008b000000 size 0x8af40000 type 6
1688 12:45:55.762282 0x000000008b000000 - 0x00000000c0000000 size 0x35000000 type 0
1689 12:45:55.769633 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1690 12:45:55.775162 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1691 12:45:55.781675 0x0000000100000000 - 0x000000016e800000 size 0x6e800000 type 6
1692 12:45:55.785043 MTRR: Fixed MSR 0x250 0x0606060606060606
1693 12:45:55.789947 MTRR: Fixed MSR 0x258 0x0606060606060606
1694 12:45:55.793236 MTRR: Fixed MSR 0x259 0x0000000000000000
1695 12:45:55.797477 MTRR: Fixed MSR 0x268 0x0606060606060606
1696 12:45:55.801974 MTRR: Fixed MSR 0x269 0x0606060606060606
1697 12:45:55.805335 MTRR: Fixed MSR 0x26a 0x0606060606060606
1698 12:45:55.810611 MTRR: Fixed MSR 0x26b 0x0606060606060606
1699 12:45:55.814167 MTRR: Fixed MSR 0x26c 0x0606060606060606
1700 12:45:55.818422 MTRR: Fixed MSR 0x26d 0x0606060606060606
1701 12:45:55.822730 MTRR: Fixed MSR 0x26e 0x0606060606060606
1702 12:45:55.826543 MTRR: Fixed MSR 0x26f 0x0606060606060606
1703 12:45:55.829127 call enable_fixed_mtrr()
1704 12:45:55.832664 CPU physical address size: 39 bits
1705 12:45:55.837123 MTRR: default type WB/UC MTRR counts: 7/6.
1706 12:45:55.840006 MTRR: UC selected as default type.
1707 12:45:55.846630 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1708 12:45:55.853111 MTRR: 1 base 0x0000000080000000 mask 0x0000007ff8000000 type 6
1709 12:45:55.858731 MTRR: 2 base 0x0000000088000000 mask 0x0000007ffe000000 type 6
1710 12:45:55.865725 MTRR: 3 base 0x000000008a000000 mask 0x0000007fff000000 type 6
1711 12:45:55.871493 MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1712 12:45:55.877881 MTRR: 5 base 0x0000000100000000 mask 0x0000007f80000000 type 6
1713 12:45:55.878155
1714 12:45:55.880207 MTRR check
1715 12:45:55.881829 Fixed MTRRs : Enabled
1716 12:45:55.885141 Variable MTRRs: Enabled
1717 12:45:55.885248
1718 12:45:55.888511 MTRR: Fixed MSR 0x250 0x0606060606060606
1719 12:45:55.892676 MTRR: Fixed MSR 0x258 0x0606060606060606
1720 12:45:55.897207 MTRR: Fixed MSR 0x259 0x0000000000000000
1721 12:45:55.901586 MTRR: Fixed MSR 0x268 0x0606060606060606
1722 12:45:55.905305 MTRR: Fixed MSR 0x269 0x0606060606060606
1723 12:45:55.909526 MTRR: Fixed MSR 0x26a 0x0606060606060606
1724 12:45:55.913740 MTRR: Fixed MSR 0x26b 0x0606060606060606
1725 12:45:55.917408 MTRR: Fixed MSR 0x26c 0x0606060606060606
1726 12:45:55.921216 MTRR: Fixed MSR 0x26d 0x0606060606060606
1727 12:45:55.925527 MTRR: Fixed MSR 0x26e 0x0606060606060606
1728 12:45:55.929839 MTRR: Fixed MSR 0x26f 0x0606060606060606
1729 12:45:55.936436 BS: BS_WRITE_TABLES times (us): entry 17198 run 490287 exit 150048
1730 12:45:55.939078 call enable_fixed_mtrr()
1731 12:45:55.941198 CBFS @ 1d00000 size 300000
1732 12:45:55.947733 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1733 12:45:55.951379 CBFS: Locating 'fallback/payload'
1734 12:45:55.954966 CPU physical address size: 39 bits
1735 12:45:55.958810 CBFS: Found @ offset 1cf4c0 size 3a954
1736 12:45:55.962626 Checking segment from ROM address 0xffecf4f8
1737 12:45:55.967467 Checking segment from ROM address 0xffecf514
1738 12:45:55.971720 Loading segment from ROM address 0xffecf4f8
1739 12:45:55.974610 code (compression=0)
1740 12:45:55.982558 New segment dstaddr 0x30100018 memsize 0x26518f8 srcaddr 0xffecf530 filesize 0x3a91c
1741 12:45:55.991125 Loading Segment: addr: 0x30100018 memsz: 0x00000000026518f8 filesz: 0x000000000003a91c
1742 12:45:55.993291 it's not compressed!
1743 12:45:56.075270 [ 0x30100018, 3013a934, 0x32751910) <- ffecf530
1744 12:45:56.082316 Clearing Segment: addr: 0x000000003013a934 memsz: 0x0000000002616fdc
1745 12:45:56.090705 Loading segment from ROM address 0xffecf514
1746 12:45:56.093530 Entry Point 0x30100018
1747 12:45:56.094871 Loaded segments
1748 12:45:56.105079 Finalizing chipset.
1749 12:45:56.106712 Finalizing SMM.
1750 12:45:56.112438 BS: BS_PAYLOAD_LOAD times (us): entry 1 run 158762 exit 11534
1751 12:45:56.116003 mp_park_aps done after 0 msecs.
1752 12:45:56.120063 Jumping to boot code at 30100018(89c33000)
1753 12:45:56.128492 CPU0: stack: 89cca000 - 89ccb000, lowest used address 89ccaa9c, stack used: 1380 bytes
1754 12:45:56.128603
1755 12:45:56.129249
1756 12:45:56.129527
1757 12:45:56.132628 Starting depthcharge on sarien...
1758 12:45:56.133216 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
1759 12:45:56.133322 start: 2.2.4 bootloader-commands (timeout 00:04:32) [common]
1760 12:45:56.133407 Setting prompt string to ['sarien:']
1761 12:45:56.133488 bootloader-commands: Wait for prompt ['sarien:'] (timeout 00:04:32)
1762 12:45:56.133632
1763 12:45:56.139870 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1764 12:45:56.140715
1765 12:45:56.147971 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1766 12:45:56.148228
1767 12:45:56.155304 WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime!
1768 12:45:56.155860
1769 12:45:56.157351 BIOS MMAP details:
1770 12:45:56.157432
1771 12:45:56.160595 IFD Base Offset : 0x1000000
1772 12:45:56.160702
1773 12:45:56.163677 IFD End Offset : 0x2000000
1774 12:45:56.164422
1775 12:45:56.166098 MMAP Size : 0x1000000
1776 12:45:56.166179
1777 12:45:56.169778 MMAP Start : 0xff000000
1778 12:45:56.169859
1779 12:45:56.176416 Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff
1780 12:45:56.179069
1781 12:45:56.183312 Failed to find BH720 with VID/DID 1217:8620
1782 12:45:56.183570
1783 12:45:56.187169 New NVMe Controller 0x3214e068 @ 00:1d:04
1784 12:45:56.187281
1785 12:45:56.191365 New NVMe Controller 0x3214e130 @ 00:1d:00
1786 12:45:56.192497
1787 12:45:56.197635 The GBB signature is at 0x30000014 and is: 24 47 42 42
1788 12:45:56.201902
1789 12:45:56.204087 Wipe memory regions:
1790 12:45:56.204367
1791 12:45:56.207128 [0x00000000001000, 0x000000000a0000)
1792 12:45:56.207789
1793 12:45:56.210977 [0x00000000100000, 0x00000030000000)
1794 12:45:56.293446
1795 12:45:56.297191 [0x00000032751910, 0x00000089afd000)
1796 12:45:56.447834
1797 12:45:56.451299 [0x00000100000000, 0x0000016e800000)
1798 12:45:57.072111
1799 12:45:57.073635 R8152: Initializing
1800 12:45:57.073728
1801 12:45:57.076524 Version 9 (ocp_data = 6010)
1802 12:45:57.077955
1803 12:45:57.079501 R8152: Done initializing
1804 12:45:57.080695
1805 12:45:57.081466 Adding net device
1806 12:45:57.082372
1807 12:45:57.087966 [firmware-sarien-12200.B-collabora] Apr 9 2021 09:49:38
1808 12:45:57.088546
1809 12:45:57.088627
1810 12:45:57.088693
1811 12:45:57.088980 Setting prompt string to ['sarien:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1813 12:45:57.189351 sarien: tftpboot 192.168.201.1 12948302/tftp-deploy-xxxrsyyr/kernel/bzImage 12948302/tftp-deploy-xxxrsyyr/kernel/cmdline 12948302/tftp-deploy-xxxrsyyr/ramdisk/ramdisk.cpio.gz
1814 12:45:57.189512 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1815 12:45:57.189633 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:31)
1816 12:45:57.190543 tftpboot 192.168.201.1 12948302/tftp-deploy-xxxrsyyr/kernel/bzImage 12948302/tftp-deploy-xxxrsyyr/kernel/cmdline 12948302/tftp-deploy-xxxrsyyr/ramdisk/ramdisk.cpio.gz
1817 12:45:57.190653
1818 12:45:57.232431 Waiting for link
1819 12:45:57.392764
1820 12:45:57.393272 done.
1821 12:45:57.393968
1822 12:45:57.396070 MAC: 00:e0:4c:78:7f:db
1823 12:45:57.396197
1824 12:45:57.398359 Sending DHCP discover... done.
1825 12:45:57.398451
1826 12:45:57.401279 Waiting for reply... done.
1827 12:45:57.401410
1828 12:45:57.404054 Sending DHCP request... done.
1829 12:45:57.404168
1830 12:45:57.406786 Waiting for reply... done.
1831 12:45:57.406862
1832 12:45:57.409554 My ip is 192.168.201.112
1833 12:45:57.409631
1834 12:45:57.413461 The DHCP server ip is 192.168.201.1
1835 12:45:57.413540
1836 12:45:57.417953 TFTP server IP predefined by user: 192.168.201.1
1837 12:45:57.418038
1838 12:45:57.424908 Bootfile predefined by user: 12948302/tftp-deploy-xxxrsyyr/kernel/bzImage
1839 12:45:57.425031
1840 12:45:57.428249 Sending tftp read request... done.
1841 12:45:57.428919
1842 12:45:57.432193 Waiting for the transfer...
1843 12:45:57.432454
1844 12:45:57.683375 00000000 ################################################################
1845 12:45:57.684244
1846 12:45:57.929262 00080000 ################################################################
1847 12:45:57.929887
1848 12:45:58.173588 00100000 ################################################################
1849 12:45:58.174288
1850 12:45:58.424671 00180000 ################################################################
1851 12:45:58.424833
1852 12:45:58.689212 00200000 ################################################################
1853 12:45:58.689667
1854 12:45:58.959473 00280000 ################################################################
1855 12:45:58.959898
1856 12:45:59.229076 00300000 ################################################################
1857 12:45:59.230423
1858 12:45:59.489863 00380000 ################################################################
1859 12:45:59.490066
1860 12:45:59.738462 00400000 ################################################################
1861 12:45:59.739555
1862 12:45:59.988476 00480000 ################################################################
1863 12:45:59.989297
1864 12:46:00.241777 00500000 ################################################################
1865 12:46:00.242607
1866 12:46:00.498482 00580000 ################################################################
1867 12:46:00.499080
1868 12:46:00.751375 00600000 ################################################################
1869 12:46:00.751962
1870 12:46:01.011690 00680000 ################################################################
1871 12:46:01.012040
1872 12:46:01.277595 00700000 ################################################################
1873 12:46:01.278039
1874 12:46:01.536807 00780000 ################################################################
1875 12:46:01.537297
1876 12:46:01.793333 00800000 ################################################################
1877 12:46:01.793976
1878 12:46:02.021797 00880000 ######################################################## done.
1879 12:46:02.021941
1880 12:46:02.025607 The bootfile was 9367440 bytes long.
1881 12:46:02.025712
1882 12:46:02.028350 Sending tftp read request... done.
1883 12:46:02.028462
1884 12:46:02.032011 Waiting for the transfer...
1885 12:46:02.032122
1886 12:46:02.279105 00000000 ################################################################
1887 12:46:02.279846
1888 12:46:02.529985 00080000 ################################################################
1889 12:46:02.530797
1890 12:46:02.780961 00100000 ################################################################
1891 12:46:02.781364
1892 12:46:03.029086 00180000 ################################################################
1893 12:46:03.029222
1894 12:46:03.275631 00200000 ################################################################
1895 12:46:03.276270
1896 12:46:03.532461 00280000 ################################################################
1897 12:46:03.533081
1898 12:46:03.806715 00300000 ################################################################
1899 12:46:03.807927
1900 12:46:04.064866 00380000 ################################################################
1901 12:46:04.065442
1902 12:46:04.315244 00400000 ################################################################
1903 12:46:04.315746
1904 12:46:04.564172 00480000 ################################################################
1905 12:46:04.565206
1906 12:46:04.814948 00500000 ################################################################
1907 12:46:04.815783
1908 12:46:05.067042 00580000 ################################################################
1909 12:46:05.067609
1910 12:46:05.313621 00600000 ################################################################
1911 12:46:05.314247
1912 12:46:05.566798 00680000 ################################################################
1913 12:46:05.567369
1914 12:46:05.832950 00700000 ################################################################
1915 12:46:05.833768
1916 12:46:06.091390 00780000 ################################################################
1917 12:46:06.092067
1918 12:46:06.301311 00800000 ####################################################### done.
1919 12:46:06.301461
1920 12:46:06.305640 Sending tftp read request... done.
1921 12:46:06.305806
1922 12:46:06.307613 Waiting for the transfer...
1923 12:46:06.308101
1924 12:46:06.309699 00000000 # done.
1925 12:46:06.309826
1926 12:46:06.318557 Command line loaded dynamically from TFTP file: 12948302/tftp-deploy-xxxrsyyr/kernel/cmdline
1927 12:46:06.318733
1928 12:46:06.338958 The command line is: earlyprintk=uart8250,mmio32,0xde000000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1929 12:46:06.342861
1930 12:46:06.345978 Shutting down all USB controllers.
1931 12:46:06.346083
1932 12:46:06.349030 Removing current net device
1933 12:46:06.350556
1934 12:46:06.352897 EC: exit firmware mode
1935 12:46:06.353895
1936 12:46:06.356516 Finalizing coreboot
1937 12:46:06.356971
1938 12:46:06.363319 Exiting depthcharge with code 4 at timestamp: 17118183
1939 12:46:06.363412
1940 12:46:06.363480
1941 12:46:06.364389 end: 2.2.4 bootloader-commands (duration 00:00:10) [common]
1942 12:46:06.364495 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
1943 12:46:06.364579 Setting prompt string to ['Linux version [0-9]']
1944 12:46:06.364653 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1945 12:46:06.364723 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1946 12:46:06.365368 Starting kernel ...
1947 12:46:06.365454
1948 12:46:06.365521
1950 12:50:28.365279 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
1952 12:50:28.366262 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
1954 12:50:28.367024 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1957 12:50:28.368373 end: 2 depthcharge-action (duration 00:05:00) [common]
1959 12:50:28.369676 Cleaning after the job
1960 12:50:28.370177 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12948302/tftp-deploy-xxxrsyyr/ramdisk
1961 12:50:28.376229 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12948302/tftp-deploy-xxxrsyyr/kernel
1962 12:50:28.383347 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12948302/tftp-deploy-xxxrsyyr/modules
1963 12:50:28.385114 start: 5.1 power-off (timeout 00:00:30) [common]
1964 12:50:28.385973 Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-4305U-sarien-cbg-0' '--port=1' '--command=off'
1965 12:50:33.563483 >> Command sent successfully.
1966 12:50:33.565961 Returned 0 in 5 seconds
1967 12:50:33.666380 end: 5.1 power-off (duration 00:00:05) [common]
1969 12:50:33.666704 start: 5.2 read-feedback (timeout 00:09:55) [common]
1970 12:50:33.667007 Listened to connection for namespace 'common' for up to 1s
1971 12:50:34.667936 Finalising connection for namespace 'common'
1972 12:50:34.668103 Disconnecting from shell: Finalise
1973 12:50:34.668188
1974 12:50:34.768445 end: 5.2 read-feedback (duration 00:00:01) [common]
1975 12:50:34.768620 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12948302
1976 12:50:34.785368 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12948302
1977 12:50:34.785519 JobError: Your job cannot terminate cleanly.