Boot log: acer-cb317-1h-c3z6-dedede
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 12:47:45.632869 lava-dispatcher, installed at version: 2024.01
2 12:47:45.633069 start: 0 validate
3 12:47:45.633202 Start time: 2024-03-05 12:47:45.633194+00:00 (UTC)
4 12:47:45.633318 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:47:45.633445 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20240129.0%2Famd64%2Finitrd.cpio.gz exists
6 12:47:45.903232 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:47:45.904052 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2247-g140bf69dc64d%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:47:46.167597 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:47:46.168303 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20240129.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:47:51.015306 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:47:51.016043 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2247-g140bf69dc64d%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 12:47:51.285219 validate duration: 5.65
14 12:47:51.286506 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:47:51.287070 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:47:51.287522 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:47:51.288124 Not decompressing ramdisk as can be used compressed.
18 12:47:51.288553 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20240129.0/amd64/initrd.cpio.gz
19 12:47:51.288876 saving as /var/lib/lava/dispatcher/tmp/12948267/tftp-deploy-jerob31b/ramdisk/initrd.cpio.gz
20 12:47:51.289198 total size: 5431448 (5 MB)
21 12:47:51.797190 progress 0 % (0 MB)
22 12:47:51.806312 progress 5 % (0 MB)
23 12:47:51.813728 progress 10 % (0 MB)
24 12:47:51.821196 progress 15 % (0 MB)
25 12:47:51.827685 progress 20 % (1 MB)
26 12:47:51.831889 progress 25 % (1 MB)
27 12:47:51.835384 progress 30 % (1 MB)
28 12:47:51.838801 progress 35 % (1 MB)
29 12:47:51.841364 progress 40 % (2 MB)
30 12:47:51.843921 progress 45 % (2 MB)
31 12:47:51.846139 progress 50 % (2 MB)
32 12:47:51.848615 progress 55 % (2 MB)
33 12:47:51.850676 progress 60 % (3 MB)
34 12:47:51.852609 progress 65 % (3 MB)
35 12:47:51.854723 progress 70 % (3 MB)
36 12:47:51.856443 progress 75 % (3 MB)
37 12:47:51.858159 progress 80 % (4 MB)
38 12:47:51.859784 progress 85 % (4 MB)
39 12:47:51.861511 progress 90 % (4 MB)
40 12:47:51.863078 progress 95 % (4 MB)
41 12:47:51.864580 progress 100 % (5 MB)
42 12:47:51.864790 5 MB downloaded in 0.58 s (9.00 MB/s)
43 12:47:51.864948 end: 1.1.1 http-download (duration 00:00:01) [common]
45 12:47:51.865194 end: 1.1 download-retry (duration 00:00:01) [common]
46 12:47:51.865280 start: 1.2 download-retry (timeout 00:09:59) [common]
47 12:47:51.865365 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 12:47:51.865506 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2247-g140bf69dc64d/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 12:47:51.865577 saving as /var/lib/lava/dispatcher/tmp/12948267/tftp-deploy-jerob31b/kernel/bzImage
50 12:47:51.865640 total size: 9367440 (8 MB)
51 12:47:51.865702 No compression specified
52 12:47:51.866819 progress 0 % (0 MB)
53 12:47:51.869342 progress 5 % (0 MB)
54 12:47:51.871813 progress 10 % (0 MB)
55 12:47:51.874235 progress 15 % (1 MB)
56 12:47:51.876819 progress 20 % (1 MB)
57 12:47:51.879304 progress 25 % (2 MB)
58 12:47:51.881753 progress 30 % (2 MB)
59 12:47:51.884467 progress 35 % (3 MB)
60 12:47:51.886985 progress 40 % (3 MB)
61 12:47:51.889409 progress 45 % (4 MB)
62 12:47:51.891903 progress 50 % (4 MB)
63 12:47:51.894541 progress 55 % (4 MB)
64 12:47:51.896941 progress 60 % (5 MB)
65 12:47:51.899402 progress 65 % (5 MB)
66 12:47:51.901935 progress 70 % (6 MB)
67 12:47:51.904354 progress 75 % (6 MB)
68 12:47:51.906770 progress 80 % (7 MB)
69 12:47:51.909161 progress 85 % (7 MB)
70 12:47:51.911740 progress 90 % (8 MB)
71 12:47:51.914097 progress 95 % (8 MB)
72 12:47:51.916550 progress 100 % (8 MB)
73 12:47:51.916774 8 MB downloaded in 0.05 s (174.72 MB/s)
74 12:47:51.916943 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:47:51.917179 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:47:51.917266 start: 1.3 download-retry (timeout 00:09:59) [common]
78 12:47:51.917349 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 12:47:51.917489 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20240129.0/amd64/full.rootfs.tar.xz
80 12:47:51.917555 saving as /var/lib/lava/dispatcher/tmp/12948267/tftp-deploy-jerob31b/nfsrootfs/full.rootfs.tar
81 12:47:51.917616 total size: 133429172 (127 MB)
82 12:47:51.917676 Using unxz to decompress xz
83 12:47:51.921962 progress 0 % (0 MB)
84 12:47:52.264041 progress 5 % (6 MB)
85 12:47:52.617037 progress 10 % (12 MB)
86 12:47:52.907085 progress 15 % (19 MB)
87 12:47:53.088702 progress 20 % (25 MB)
88 12:47:53.331147 progress 25 % (31 MB)
89 12:47:53.681370 progress 30 % (38 MB)
90 12:47:54.024235 progress 35 % (44 MB)
91 12:47:54.428538 progress 40 % (50 MB)
92 12:47:54.816591 progress 45 % (57 MB)
93 12:47:55.174742 progress 50 % (63 MB)
94 12:47:55.557211 progress 55 % (70 MB)
95 12:47:55.918633 progress 60 % (76 MB)
96 12:47:56.283492 progress 65 % (82 MB)
97 12:47:56.652833 progress 70 % (89 MB)
98 12:47:57.018636 progress 75 % (95 MB)
99 12:47:57.457811 progress 80 % (101 MB)
100 12:47:57.894392 progress 85 % (108 MB)
101 12:47:58.159139 progress 90 % (114 MB)
102 12:47:58.506543 progress 95 % (120 MB)
103 12:47:58.896035 progress 100 % (127 MB)
104 12:47:58.902341 127 MB downloaded in 6.98 s (18.22 MB/s)
105 12:47:58.902645 end: 1.3.1 http-download (duration 00:00:07) [common]
107 12:47:58.902914 end: 1.3 download-retry (duration 00:00:07) [common]
108 12:47:58.903003 start: 1.4 download-retry (timeout 00:09:52) [common]
109 12:47:58.903093 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 12:47:58.903243 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2247-g140bf69dc64d/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 12:47:58.903316 saving as /var/lib/lava/dispatcher/tmp/12948267/tftp-deploy-jerob31b/modules/modules.tar
112 12:47:58.903376 total size: 251176 (0 MB)
113 12:47:58.903440 Using unxz to decompress xz
114 12:47:58.907742 progress 13 % (0 MB)
115 12:47:58.908144 progress 26 % (0 MB)
116 12:47:58.908389 progress 39 % (0 MB)
117 12:47:58.910013 progress 52 % (0 MB)
118 12:47:58.911950 progress 65 % (0 MB)
119 12:47:58.913770 progress 78 % (0 MB)
120 12:47:58.915675 progress 91 % (0 MB)
121 12:47:58.917480 progress 100 % (0 MB)
122 12:47:58.922947 0 MB downloaded in 0.02 s (12.24 MB/s)
123 12:47:58.923181 end: 1.4.1 http-download (duration 00:00:00) [common]
125 12:47:58.923440 end: 1.4 download-retry (duration 00:00:00) [common]
126 12:47:58.923533 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
127 12:47:58.923630 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
128 12:48:01.080206 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12948267/extract-nfsrootfs-i6rbi_5e
129 12:48:01.080408 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 12:48:01.080510 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
131 12:48:01.080680 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12948267/lava-overlay-sv4kbdkk
132 12:48:01.080815 makedir: /var/lib/lava/dispatcher/tmp/12948267/lava-overlay-sv4kbdkk/lava-12948267/bin
133 12:48:01.080918 makedir: /var/lib/lava/dispatcher/tmp/12948267/lava-overlay-sv4kbdkk/lava-12948267/tests
134 12:48:01.081017 makedir: /var/lib/lava/dispatcher/tmp/12948267/lava-overlay-sv4kbdkk/lava-12948267/results
135 12:48:01.081118 Creating /var/lib/lava/dispatcher/tmp/12948267/lava-overlay-sv4kbdkk/lava-12948267/bin/lava-add-keys
136 12:48:01.081265 Creating /var/lib/lava/dispatcher/tmp/12948267/lava-overlay-sv4kbdkk/lava-12948267/bin/lava-add-sources
137 12:48:01.081399 Creating /var/lib/lava/dispatcher/tmp/12948267/lava-overlay-sv4kbdkk/lava-12948267/bin/lava-background-process-start
138 12:48:01.081532 Creating /var/lib/lava/dispatcher/tmp/12948267/lava-overlay-sv4kbdkk/lava-12948267/bin/lava-background-process-stop
139 12:48:01.081660 Creating /var/lib/lava/dispatcher/tmp/12948267/lava-overlay-sv4kbdkk/lava-12948267/bin/lava-common-functions
140 12:48:01.081787 Creating /var/lib/lava/dispatcher/tmp/12948267/lava-overlay-sv4kbdkk/lava-12948267/bin/lava-echo-ipv4
141 12:48:01.081915 Creating /var/lib/lava/dispatcher/tmp/12948267/lava-overlay-sv4kbdkk/lava-12948267/bin/lava-install-packages
142 12:48:01.082041 Creating /var/lib/lava/dispatcher/tmp/12948267/lava-overlay-sv4kbdkk/lava-12948267/bin/lava-installed-packages
143 12:48:01.082168 Creating /var/lib/lava/dispatcher/tmp/12948267/lava-overlay-sv4kbdkk/lava-12948267/bin/lava-os-build
144 12:48:01.082296 Creating /var/lib/lava/dispatcher/tmp/12948267/lava-overlay-sv4kbdkk/lava-12948267/bin/lava-probe-channel
145 12:48:01.082431 Creating /var/lib/lava/dispatcher/tmp/12948267/lava-overlay-sv4kbdkk/lava-12948267/bin/lava-probe-ip
146 12:48:01.082560 Creating /var/lib/lava/dispatcher/tmp/12948267/lava-overlay-sv4kbdkk/lava-12948267/bin/lava-target-ip
147 12:48:01.082687 Creating /var/lib/lava/dispatcher/tmp/12948267/lava-overlay-sv4kbdkk/lava-12948267/bin/lava-target-mac
148 12:48:01.082813 Creating /var/lib/lava/dispatcher/tmp/12948267/lava-overlay-sv4kbdkk/lava-12948267/bin/lava-target-storage
149 12:48:01.082942 Creating /var/lib/lava/dispatcher/tmp/12948267/lava-overlay-sv4kbdkk/lava-12948267/bin/lava-test-case
150 12:48:01.083073 Creating /var/lib/lava/dispatcher/tmp/12948267/lava-overlay-sv4kbdkk/lava-12948267/bin/lava-test-event
151 12:48:01.083200 Creating /var/lib/lava/dispatcher/tmp/12948267/lava-overlay-sv4kbdkk/lava-12948267/bin/lava-test-feedback
152 12:48:01.083327 Creating /var/lib/lava/dispatcher/tmp/12948267/lava-overlay-sv4kbdkk/lava-12948267/bin/lava-test-raise
153 12:48:01.083453 Creating /var/lib/lava/dispatcher/tmp/12948267/lava-overlay-sv4kbdkk/lava-12948267/bin/lava-test-reference
154 12:48:01.083581 Creating /var/lib/lava/dispatcher/tmp/12948267/lava-overlay-sv4kbdkk/lava-12948267/bin/lava-test-runner
155 12:48:01.083707 Creating /var/lib/lava/dispatcher/tmp/12948267/lava-overlay-sv4kbdkk/lava-12948267/bin/lava-test-set
156 12:48:01.083833 Creating /var/lib/lava/dispatcher/tmp/12948267/lava-overlay-sv4kbdkk/lava-12948267/bin/lava-test-shell
157 12:48:01.083961 Updating /var/lib/lava/dispatcher/tmp/12948267/lava-overlay-sv4kbdkk/lava-12948267/bin/lava-install-packages (oe)
158 12:48:01.084116 Updating /var/lib/lava/dispatcher/tmp/12948267/lava-overlay-sv4kbdkk/lava-12948267/bin/lava-installed-packages (oe)
159 12:48:01.084241 Creating /var/lib/lava/dispatcher/tmp/12948267/lava-overlay-sv4kbdkk/lava-12948267/environment
160 12:48:01.084337 LAVA metadata
161 12:48:01.084409 - LAVA_JOB_ID=12948267
162 12:48:01.084472 - LAVA_DISPATCHER_IP=192.168.201.1
163 12:48:01.084574 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
164 12:48:01.084641 skipped lava-vland-overlay
165 12:48:01.084715 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 12:48:01.084793 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
167 12:48:01.084854 skipped lava-multinode-overlay
168 12:48:01.084925 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 12:48:01.085003 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
170 12:48:01.085075 Loading test definitions
171 12:48:01.085162 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
172 12:48:01.085231 Using /lava-12948267 at stage 0
173 12:48:01.085552 uuid=12948267_1.5.2.3.1 testdef=None
174 12:48:01.085642 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 12:48:01.085727 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
176 12:48:01.086236 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 12:48:01.086468 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
179 12:48:01.087127 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 12:48:01.087355 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
182 12:48:01.087992 runner path: /var/lib/lava/dispatcher/tmp/12948267/lava-overlay-sv4kbdkk/lava-12948267/0/tests/0_dmesg test_uuid 12948267_1.5.2.3.1
183 12:48:01.088154 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 12:48:01.088379 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
186 12:48:01.088451 Using /lava-12948267 at stage 1
187 12:48:01.088752 uuid=12948267_1.5.2.3.5 testdef=None
188 12:48:01.088841 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 12:48:01.088924 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
190 12:48:01.089394 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 12:48:01.089608 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
193 12:48:01.090346 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 12:48:01.090723 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
196 12:48:01.091372 runner path: /var/lib/lava/dispatcher/tmp/12948267/lava-overlay-sv4kbdkk/lava-12948267/1/tests/1_bootrr test_uuid 12948267_1.5.2.3.5
197 12:48:01.091528 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 12:48:01.091731 Creating lava-test-runner.conf files
200 12:48:01.091794 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12948267/lava-overlay-sv4kbdkk/lava-12948267/0 for stage 0
201 12:48:01.091883 - 0_dmesg
202 12:48:01.091962 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12948267/lava-overlay-sv4kbdkk/lava-12948267/1 for stage 1
203 12:48:01.092054 - 1_bootrr
204 12:48:01.092148 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 12:48:01.092231 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
206 12:48:01.099598 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 12:48:01.099700 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
208 12:48:01.099786 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 12:48:01.099870 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 12:48:01.099954 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
211 12:48:01.238316 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 12:48:01.238726 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
213 12:48:01.238840 extracting modules file /var/lib/lava/dispatcher/tmp/12948267/tftp-deploy-jerob31b/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12948267/extract-nfsrootfs-i6rbi_5e
214 12:48:01.252340 extracting modules file /var/lib/lava/dispatcher/tmp/12948267/tftp-deploy-jerob31b/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12948267/extract-overlay-ramdisk-6iy5dt45/ramdisk
215 12:48:01.268192 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 12:48:01.268320 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
217 12:48:01.268408 [common] Applying overlay to NFS
218 12:48:01.268482 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12948267/compress-overlay-2hplqwgj/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12948267/extract-nfsrootfs-i6rbi_5e
219 12:48:01.276603 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 12:48:01.276714 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
221 12:48:01.276804 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 12:48:01.276893 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
223 12:48:01.276971 Building ramdisk /var/lib/lava/dispatcher/tmp/12948267/extract-overlay-ramdisk-6iy5dt45/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12948267/extract-overlay-ramdisk-6iy5dt45/ramdisk
224 12:48:01.358611 >> 26151 blocks
225 12:48:01.909950 rename /var/lib/lava/dispatcher/tmp/12948267/extract-overlay-ramdisk-6iy5dt45/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12948267/tftp-deploy-jerob31b/ramdisk/ramdisk.cpio.gz
226 12:48:01.910481 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 12:48:01.910646 start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
228 12:48:01.910801 start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
229 12:48:01.910955 No mkimage arch provided, not using FIT.
230 12:48:01.911049 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 12:48:01.911136 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 12:48:01.911246 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 12:48:01.911341 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
234 12:48:01.911429 No LXC device requested
235 12:48:01.911511 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 12:48:01.911608 start: 1.7 deploy-device-env (timeout 00:09:49) [common]
237 12:48:01.911722 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 12:48:01.911797 Checking files for TFTP limit of 4294967296 bytes.
239 12:48:01.912215 end: 1 tftp-deploy (duration 00:00:11) [common]
240 12:48:01.912316 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 12:48:01.912407 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 12:48:01.912577 substitutions:
243 12:48:01.912672 - {DTB}: None
244 12:48:01.912764 - {INITRD}: 12948267/tftp-deploy-jerob31b/ramdisk/ramdisk.cpio.gz
245 12:48:01.912851 - {KERNEL}: 12948267/tftp-deploy-jerob31b/kernel/bzImage
246 12:48:01.912944 - {LAVA_MAC}: None
247 12:48:01.913030 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12948267/extract-nfsrootfs-i6rbi_5e
248 12:48:01.913119 - {NFS_SERVER_IP}: 192.168.201.1
249 12:48:01.913203 - {PRESEED_CONFIG}: None
250 12:48:01.913287 - {PRESEED_LOCAL}: None
251 12:48:01.913370 - {RAMDISK}: 12948267/tftp-deploy-jerob31b/ramdisk/ramdisk.cpio.gz
252 12:48:01.913454 - {ROOT_PART}: None
253 12:48:01.913537 - {ROOT}: None
254 12:48:01.913620 - {SERVER_IP}: 192.168.201.1
255 12:48:01.913708 - {TEE}: None
256 12:48:01.913791 Parsed boot commands:
257 12:48:01.913873 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 12:48:01.914094 Parsed boot commands: tftpboot 192.168.201.1 12948267/tftp-deploy-jerob31b/kernel/bzImage 12948267/tftp-deploy-jerob31b/kernel/cmdline 12948267/tftp-deploy-jerob31b/ramdisk/ramdisk.cpio.gz
259 12:48:01.914213 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 12:48:01.914338 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 12:48:01.914499 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 12:48:01.914587 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 12:48:01.914656 Not connected, no need to disconnect.
264 12:48:01.914731 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 12:48:01.914821 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 12:48:01.914899 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cb317-1h-c3z6-dedede-cbg-3'
267 12:48:01.919164 Setting prompt string to ['lava-test: # ']
268 12:48:01.919644 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 12:48:01.919823 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 12:48:01.919980 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 12:48:01.920131 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 12:48:01.920544 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-3' '--port=1' '--command=reboot'
273 12:48:07.059948 >> Command sent successfully.
274 12:48:07.070744 Returned 0 in 5 seconds
275 12:48:07.172027 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 12:48:07.173495 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 12:48:07.174059 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 12:48:07.174549 Setting prompt string to 'Starting depthcharge on Magolor...'
280 12:48:07.174912 Changing prompt to 'Starting depthcharge on Magolor...'
281 12:48:07.175270 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
282 12:48:07.176686 [Enter `^Ec?' for help]
283 12:48:08.334530
284 12:48:08.335131
285 12:48:08.344540 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
286 12:48:08.347971 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
287 12:48:08.351684 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
288 12:48:08.358340 CPU: AES supported, TXT NOT supported, VT supported
289 12:48:08.361703 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
290 12:48:08.367847 PCH: device id 4d87 (rev 01) is Jasperlake Super
291 12:48:08.371054 IGD: device id 4e55 (rev 01) is Jasperlake GT4
292 12:48:08.374816 VBOOT: Loading verstage.
293 12:48:08.381060 FMAP: Found "FLASH" version 1.1 at 0xc04000.
294 12:48:08.384951 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
295 12:48:08.389305 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
296 12:48:08.395818 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
297 12:48:08.396347
298 12:48:08.396696
299 12:48:08.409169 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
300 12:48:08.422601 Probing TPM: . done!
301 12:48:08.426748 TPM ready after 0 ms
302 12:48:08.429513 Connected to device vid:did:rid of 1ae0:0028:00
303 12:48:08.440810 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
304 12:48:08.447871 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
305 12:48:08.450857 Initialized TPM device CR50 revision 0
306 12:48:08.507164 tlcl_send_startup: Startup return code is 0
307 12:48:08.507681 TPM: setup succeeded
308 12:48:08.521685 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
309 12:48:08.535204 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
310 12:48:08.553504 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
311 12:48:08.560369 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
312 12:48:08.563947 Chrome EC: UHEPI supported
313 12:48:08.567341 Phase 1
314 12:48:08.570660 FMAP: area GBB found @ c05000 (12288 bytes)
315 12:48:08.577284 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
316 12:48:08.583982 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
317 12:48:08.587675 Recovery requested (1009000e)
318 12:48:08.596427 TPM: Extending digest for VBOOT: boot mode into PCR 0
319 12:48:08.603031 tlcl_extend: response is 0
320 12:48:08.609627 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
321 12:48:08.619116 tlcl_extend: response is 0
322 12:48:08.626267 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
323 12:48:08.629470 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
324 12:48:08.636923 BS: verstage times (exec / console): total (unknown) / 124 ms
325 12:48:08.637524
326 12:48:08.637911
327 12:48:08.646521 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
328 12:48:08.653265 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
329 12:48:08.659887 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
330 12:48:08.663281 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
331 12:48:08.666219 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
332 12:48:08.672638 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
333 12:48:08.676526 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
334 12:48:08.679669 TCO_STS: 0000 0001
335 12:48:08.679902 GEN_PMCON: d0015038 00002200
336 12:48:08.682849 GBLRST_CAUSE: 00000000 00000000
337 12:48:08.686165 prev_sleep_state 5
338 12:48:08.689336 Boot Count incremented to 9456
339 12:48:08.696144 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
340 12:48:08.699367 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
341 12:48:08.703494 Chrome EC: UHEPI supported
342 12:48:08.709776 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
343 12:48:08.717076 Probing TPM: done!
344 12:48:08.723105 Connected to device vid:did:rid of 1ae0:0028:00
345 12:48:08.733118 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
346 12:48:08.744350 Initialized TPM device CR50 revision 0
347 12:48:08.753970 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
348 12:48:08.760969 MRC: Hash idx 0x100b comparison successful.
349 12:48:08.761425 MRC cache found, size 5458
350 12:48:08.764757 bootmode is set to: 2
351 12:48:08.767732 SPD INDEX = 0
352 12:48:08.771190 CBFS: Found 'spd.bin' @0x40c40 size 0x600
353 12:48:08.774668 SPD: module type is LPDDR4X
354 12:48:08.781092 SPD: module part number is MT53E512M32D2NP-046 WT:E
355 12:48:08.784425 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
356 12:48:08.791024 SPD: device width 16 bits, bus width 32 bits
357 12:48:08.794080 SPD: module size is 4096 MB (per channel)
358 12:48:08.797286 meminit_channels: DRAM half-populated
359 12:48:08.880522 CBMEM:
360 12:48:08.883565 IMD: root @ 0x76fff000 254 entries.
361 12:48:08.886820 IMD: root @ 0x76ffec00 62 entries.
362 12:48:08.890805 FMAP: area RO_VPD found @ c00000 (16384 bytes)
363 12:48:08.897370 WARNING: RO_VPD is uninitialized or empty.
364 12:48:08.900925 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
365 12:48:08.904157 External stage cache:
366 12:48:08.907252 IMD: root @ 0x7b3ff000 254 entries.
367 12:48:08.910277 IMD: root @ 0x7b3fec00 62 entries.
368 12:48:08.920631 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
369 12:48:08.927562 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
370 12:48:08.934175 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
371 12:48:08.942677 MRC: 'RECOVERY_MRC_CACHE' does not need update.
372 12:48:08.948844 cse_lite: Skip switching to RW in the recovery path
373 12:48:08.949415 1 DIMMs found
374 12:48:08.949802 SMM Memory Map
375 12:48:08.952130 SMRAM : 0x7b000000 0x800000
376 12:48:08.958495 Subregion 0: 0x7b000000 0x200000
377 12:48:08.961827 Subregion 1: 0x7b200000 0x200000
378 12:48:08.964957 Subregion 2: 0x7b400000 0x400000
379 12:48:08.965385 top_of_ram = 0x77000000
380 12:48:08.972126 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
381 12:48:08.978674 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
382 12:48:08.981877 MTRR Range: Start=ff000000 End=0 (Size 1000000)
383 12:48:08.988634 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
384 12:48:08.991806 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
385 12:48:09.004582 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
386 12:48:09.010944 Processing 188 relocs. Offset value of 0x74c0e000
387 12:48:09.017448 BS: romstage times (exec / console): total (unknown) / 255 ms
388 12:48:09.022276
389 12:48:09.022853
390 12:48:09.031922 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
391 12:48:09.035091 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
392 12:48:09.042477 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
393 12:48:09.048808 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
394 12:48:09.104741 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
395 12:48:09.111051 Processing 4805 relocs. Offset value of 0x75da8000
396 12:48:09.117755 BS: postcar times (exec / console): total (unknown) / 42 ms
397 12:48:09.118299
398 12:48:09.118704
399 12:48:09.127499 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
400 12:48:09.128020 Normal boot
401 12:48:09.131990 EC returned error result code 3
402 12:48:09.135620 FW_CONFIG value is 0x204
403 12:48:09.138596 GENERIC: 0.0 disabled by fw_config
404 12:48:09.145331 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
405 12:48:09.148543 I2C: 00:10 disabled by fw_config
406 12:48:09.151849 I2C: 00:10 disabled by fw_config
407 12:48:09.155704 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
408 12:48:09.162048 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
409 12:48:09.165366 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
410 12:48:09.171656 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
411 12:48:09.175541 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
412 12:48:09.178330 I2C: 00:10 disabled by fw_config
413 12:48:09.184750 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
414 12:48:09.191953 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
415 12:48:09.195257 I2C: 00:1a disabled by fw_config
416 12:48:09.198365 I2C: 00:1a disabled by fw_config
417 12:48:09.204866 fw_config match found: AUDIO_AMP=UNPROVISIONED
418 12:48:09.208142 fw_config match found: AUDIO_AMP=UNPROVISIONED
419 12:48:09.211965 GENERIC: 0.0 disabled by fw_config
420 12:48:09.218121 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
421 12:48:09.222102 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
422 12:48:09.228167 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
423 12:48:09.231333 microcode: Update skipped, already up-to-date
424 12:48:09.238468 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
425 12:48:09.264467 Detected 2 core, 2 thread CPU.
426 12:48:09.267585 Setting up SMI for CPU
427 12:48:09.270842 IED base = 0x7b400000
428 12:48:09.271379 IED size = 0x00400000
429 12:48:09.274009 Will perform SMM setup.
430 12:48:09.277878 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
431 12:48:09.287070 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
432 12:48:09.290552 Processing 16 relocs. Offset value of 0x00030000
433 12:48:09.294381 Attempting to start 1 APs
434 12:48:09.297620 Waiting for 10ms after sending INIT.
435 12:48:09.313854 Waiting for 1st SIPI to complete...done.
436 12:48:09.314380 AP: slot 1 apic_id 2.
437 12:48:09.320613 Waiting for 2nd SIPI to complete...done.
438 12:48:09.327164 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
439 12:48:09.333492 Processing 13 relocs. Offset value of 0x00038000
440 12:48:09.334005 Unable to locate Global NVS
441 12:48:09.343598 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
442 12:48:09.347213 Installing permanent SMM handler to 0x7b000000
443 12:48:09.356934 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
444 12:48:09.360369 Processing 704 relocs. Offset value of 0x7b010000
445 12:48:09.370195 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
446 12:48:09.374154 Processing 13 relocs. Offset value of 0x7b008000
447 12:48:09.379917 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
448 12:48:09.383186 Unable to locate Global NVS
449 12:48:09.390455 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
450 12:48:09.393645 Clearing SMI status registers
451 12:48:09.394198 SMI_STS: PM1
452 12:48:09.397003 PM1_STS: PWRBTN
453 12:48:09.397525 TCO_STS: INTRD_DET
454 12:48:09.406536 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
455 12:48:09.409902 In relocation handler: CPU 0
456 12:48:09.413238 New SMBASE=0x7b000000 IEDBASE=0x7b400000
457 12:48:09.417109 Writing SMRR. base = 0x7b000006, mask=0xff800800
458 12:48:09.421547 Relocation complete.
459 12:48:09.427889 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
460 12:48:09.428403 In relocation handler: CPU 1
461 12:48:09.434747 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
462 12:48:09.438544 Writing SMRR. base = 0x7b000006, mask=0xff800800
463 12:48:09.441619 Relocation complete.
464 12:48:09.442160 Initializing CPU #0
465 12:48:09.444827 CPU: vendor Intel device 906c0
466 12:48:09.451239 CPU: family 06, model 9c, stepping 00
467 12:48:09.451671 Clearing out pending MCEs
468 12:48:09.454464 Setting up local APIC...
469 12:48:09.458102 apic_id: 0x00 done.
470 12:48:09.461314 Turbo is available but hidden
471 12:48:09.464562 Turbo is available and visible
472 12:48:09.467993 microcode: Update skipped, already up-to-date
473 12:48:09.471093 CPU #0 initialized
474 12:48:09.471523 Initializing CPU #1
475 12:48:09.474723 CPU: vendor Intel device 906c0
476 12:48:09.477551 CPU: family 06, model 9c, stepping 00
477 12:48:09.481191 Clearing out pending MCEs
478 12:48:09.484765 Setting up local APIC...
479 12:48:09.487570 apic_id: 0x02 done.
480 12:48:09.490802 microcode: Update skipped, already up-to-date
481 12:48:09.494177 CPU #1 initialized
482 12:48:09.497267 bsp_do_flight_plan done after 174 msecs.
483 12:48:09.501327 CPU: frequency set to 2800 MHz
484 12:48:09.501856 Enabling SMIs.
485 12:48:09.507589 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 86 / 287 ms
486 12:48:09.518571 Probing TPM: done!
487 12:48:09.525553 Connected to device vid:did:rid of 1ae0:0028:00
488 12:48:09.534933 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
489 12:48:09.538259 Initialized TPM device CR50 revision 0
490 12:48:09.544772 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
491 12:48:09.547971 Found a VBT of 7680 bytes after decompression
492 12:48:09.558129 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
493 12:48:09.590814 Detected 2 core, 2 thread CPU.
494 12:48:09.593994 Detected 2 core, 2 thread CPU.
495 12:48:09.956966 Display FSP Version Info HOB
496 12:48:09.959953 Reference Code - CPU = 8.7.22.30
497 12:48:09.963086 uCode Version = 24.0.0.1f
498 12:48:09.966619 TXT ACM version = ff.ff.ff.ffff
499 12:48:09.969895 Reference Code - ME = 8.7.22.30
500 12:48:09.973054 MEBx version = 0.0.0.0
501 12:48:09.976105 ME Firmware Version = Consumer SKU
502 12:48:09.979629 Reference Code - PCH = 8.7.22.30
503 12:48:09.982794 PCH-CRID Status = Disabled
504 12:48:09.985979 PCH-CRID Original Value = ff.ff.ff.ffff
505 12:48:09.989945 PCH-CRID New Value = ff.ff.ff.ffff
506 12:48:09.993716 OPROM - RST - RAID = ff.ff.ff.ffff
507 12:48:09.997444 PCH Hsio Version = 4.0.0.0
508 12:48:10.000907 Reference Code - SA - System Agent = 8.7.22.30
509 12:48:10.004219 Reference Code - MRC = 0.0.4.68
510 12:48:10.007663 SA - PCIe Version = 8.7.22.30
511 12:48:10.008022 SA-CRID Status = Disabled
512 12:48:10.011141 SA-CRID Original Value = 0.0.0.0
513 12:48:10.015223 SA-CRID New Value = 0.0.0.0
514 12:48:10.018777 OPROM - VBIOS = ff.ff.ff.ffff
515 12:48:10.022050 IO Manageability Engine FW Version = ff.ff.ff.ffff
516 12:48:10.025389 PHY Build Version = ff.ff.ff.ffff
517 12:48:10.032165 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
518 12:48:10.038715 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
519 12:48:10.038931 ITSS IRQ Polarities Before:
520 12:48:10.041516 IPC0: 0xffffffff
521 12:48:10.041686 IPC1: 0xffffffff
522 12:48:10.045798 IPC2: 0xffffffff
523 12:48:10.046013 IPC3: 0xffffffff
524 12:48:10.048689 ITSS IRQ Polarities After:
525 12:48:10.051625 IPC0: 0xffffffff
526 12:48:10.051835 IPC1: 0xffffffff
527 12:48:10.055480 IPC2: 0xffffffff
528 12:48:10.055660 IPC3: 0xffffffff
529 12:48:10.068342 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
530 12:48:10.075444 BS: BS_DEV_INIT_CHIPS run times (exec / console): 405 / 156 ms
531 12:48:10.078716 Enumerating buses...
532 12:48:10.081998 Show all devs... Before device enumeration.
533 12:48:10.084957 Root Device: enabled 1
534 12:48:10.085217 CPU_CLUSTER: 0: enabled 1
535 12:48:10.088088 DOMAIN: 0000: enabled 1
536 12:48:10.091570 PCI: 00:00.0: enabled 1
537 12:48:10.094663 PCI: 00:02.0: enabled 1
538 12:48:10.095029 PCI: 00:04.0: enabled 1
539 12:48:10.098467 PCI: 00:05.0: enabled 1
540 12:48:10.101321 PCI: 00:09.0: enabled 0
541 12:48:10.105113 PCI: 00:12.6: enabled 0
542 12:48:10.105640 PCI: 00:14.0: enabled 1
543 12:48:10.108542 PCI: 00:14.1: enabled 0
544 12:48:10.111333 PCI: 00:14.2: enabled 0
545 12:48:10.114957 PCI: 00:14.3: enabled 1
546 12:48:10.115385 PCI: 00:14.5: enabled 1
547 12:48:10.118319 PCI: 00:15.0: enabled 1
548 12:48:10.121528 PCI: 00:15.1: enabled 1
549 12:48:10.125497 PCI: 00:15.2: enabled 1
550 12:48:10.126023 PCI: 00:15.3: enabled 1
551 12:48:10.128485 PCI: 00:16.0: enabled 1
552 12:48:10.131218 PCI: 00:16.1: enabled 0
553 12:48:10.131646 PCI: 00:16.4: enabled 0
554 12:48:10.134741 PCI: 00:16.5: enabled 0
555 12:48:10.138161 PCI: 00:17.0: enabled 0
556 12:48:10.141462 PCI: 00:19.0: enabled 1
557 12:48:10.141984 PCI: 00:19.1: enabled 0
558 12:48:10.144751 PCI: 00:19.2: enabled 1
559 12:48:10.147735 PCI: 00:1a.0: enabled 1
560 12:48:10.151203 PCI: 00:1c.0: enabled 0
561 12:48:10.151630 PCI: 00:1c.1: enabled 0
562 12:48:10.154593 PCI: 00:1c.2: enabled 0
563 12:48:10.158127 PCI: 00:1c.3: enabled 0
564 12:48:10.161151 PCI: 00:1c.4: enabled 0
565 12:48:10.161681 PCI: 00:1c.5: enabled 0
566 12:48:10.164710 PCI: 00:1c.6: enabled 0
567 12:48:10.167998 PCI: 00:1c.7: enabled 1
568 12:48:10.168422 PCI: 00:1e.0: enabled 0
569 12:48:10.171180 PCI: 00:1e.1: enabled 0
570 12:48:10.174459 PCI: 00:1e.2: enabled 1
571 12:48:10.177958 PCI: 00:1e.3: enabled 0
572 12:48:10.178548 PCI: 00:1f.0: enabled 1
573 12:48:10.181113 PCI: 00:1f.1: enabled 1
574 12:48:10.184021 PCI: 00:1f.2: enabled 1
575 12:48:10.187824 PCI: 00:1f.3: enabled 1
576 12:48:10.188248 PCI: 00:1f.4: enabled 0
577 12:48:10.190600 PCI: 00:1f.5: enabled 1
578 12:48:10.194731 PCI: 00:1f.7: enabled 0
579 12:48:10.197829 GENERIC: 0.0: enabled 1
580 12:48:10.198351 GENERIC: 0.0: enabled 1
581 12:48:10.200742 USB0 port 0: enabled 1
582 12:48:10.204340 GENERIC: 0.0: enabled 1
583 12:48:10.204867 I2C: 00:2c: enabled 1
584 12:48:10.208008 I2C: 00:15: enabled 1
585 12:48:10.211042 GENERIC: 0.0: enabled 0
586 12:48:10.214019 I2C: 00:15: enabled 1
587 12:48:10.214476 I2C: 00:10: enabled 0
588 12:48:10.217419 I2C: 00:10: enabled 0
589 12:48:10.220826 I2C: 00:2c: enabled 1
590 12:48:10.221253 I2C: 00:40: enabled 1
591 12:48:10.223802 I2C: 00:10: enabled 1
592 12:48:10.227529 I2C: 00:39: enabled 1
593 12:48:10.228053 I2C: 00:36: enabled 1
594 12:48:10.230695 I2C: 00:10: enabled 0
595 12:48:10.234327 I2C: 00:0c: enabled 1
596 12:48:10.234886 I2C: 00:50: enabled 1
597 12:48:10.237386 I2C: 00:1a: enabled 1
598 12:48:10.240571 I2C: 00:1a: enabled 0
599 12:48:10.241015 I2C: 00:1a: enabled 0
600 12:48:10.244011 I2C: 00:28: enabled 1
601 12:48:10.247471 I2C: 00:29: enabled 1
602 12:48:10.248007 PCI: 00:00.0: enabled 1
603 12:48:10.250258 SPI: 00: enabled 1
604 12:48:10.253728 PNP: 0c09.0: enabled 1
605 12:48:10.254156 GENERIC: 0.0: enabled 0
606 12:48:10.256918 USB2 port 0: enabled 1
607 12:48:10.260878 USB2 port 1: enabled 1
608 12:48:10.263833 USB2 port 2: enabled 1
609 12:48:10.264264 USB2 port 3: enabled 1
610 12:48:10.266849 USB2 port 4: enabled 0
611 12:48:10.270642 USB2 port 5: enabled 1
612 12:48:10.271336 USB2 port 6: enabled 0
613 12:48:10.273508 USB2 port 7: enabled 1
614 12:48:10.277313 USB3 port 0: enabled 1
615 12:48:10.277837 USB3 port 1: enabled 1
616 12:48:10.280412 USB3 port 2: enabled 1
617 12:48:10.283679 USB3 port 3: enabled 1
618 12:48:10.286870 APIC: 00: enabled 1
619 12:48:10.287304 APIC: 02: enabled 1
620 12:48:10.290357 Compare with tree...
621 12:48:10.290926 Root Device: enabled 1
622 12:48:10.293528 CPU_CLUSTER: 0: enabled 1
623 12:48:10.297358 APIC: 00: enabled 1
624 12:48:10.300444 APIC: 02: enabled 1
625 12:48:10.300970 DOMAIN: 0000: enabled 1
626 12:48:10.303456 PCI: 00:00.0: enabled 1
627 12:48:10.306719 PCI: 00:02.0: enabled 1
628 12:48:10.310702 PCI: 00:04.0: enabled 1
629 12:48:10.313693 GENERIC: 0.0: enabled 1
630 12:48:10.314211 PCI: 00:05.0: enabled 1
631 12:48:10.317097 GENERIC: 0.0: enabled 1
632 12:48:10.320255 PCI: 00:09.0: enabled 0
633 12:48:10.323128 PCI: 00:12.6: enabled 0
634 12:48:10.327329 PCI: 00:14.0: enabled 1
635 12:48:10.327847 USB0 port 0: enabled 1
636 12:48:10.330068 USB2 port 0: enabled 1
637 12:48:10.333161 USB2 port 1: enabled 1
638 12:48:10.337020 USB2 port 2: enabled 1
639 12:48:10.340164 USB2 port 3: enabled 1
640 12:48:10.342949 USB2 port 4: enabled 0
641 12:48:10.343378 USB2 port 5: enabled 1
642 12:48:10.346838 USB2 port 6: enabled 0
643 12:48:10.350167 USB2 port 7: enabled 1
644 12:48:10.353578 USB3 port 0: enabled 1
645 12:48:10.356302 USB3 port 1: enabled 1
646 12:48:10.356735 USB3 port 2: enabled 1
647 12:48:10.360371 USB3 port 3: enabled 1
648 12:48:10.363000 PCI: 00:14.1: enabled 0
649 12:48:10.366754 PCI: 00:14.2: enabled 0
650 12:48:10.369555 PCI: 00:14.3: enabled 1
651 12:48:10.370159 GENERIC: 0.0: enabled 1
652 12:48:10.373142 PCI: 00:14.5: enabled 1
653 12:48:10.376062 PCI: 00:15.0: enabled 1
654 12:48:10.380058 I2C: 00:2c: enabled 1
655 12:48:10.383025 I2C: 00:15: enabled 1
656 12:48:10.383493 PCI: 00:15.1: enabled 1
657 12:48:10.386109 PCI: 00:15.2: enabled 1
658 12:48:10.389566 GENERIC: 0.0: enabled 0
659 12:48:10.393057 I2C: 00:15: enabled 1
660 12:48:10.396672 I2C: 00:10: enabled 0
661 12:48:10.397210 I2C: 00:10: enabled 0
662 12:48:10.399584 I2C: 00:2c: enabled 1
663 12:48:10.402725 I2C: 00:40: enabled 1
664 12:48:10.406387 I2C: 00:10: enabled 1
665 12:48:10.406874 I2C: 00:39: enabled 1
666 12:48:10.409294 PCI: 00:15.3: enabled 1
667 12:48:10.412524 I2C: 00:36: enabled 1
668 12:48:10.415717 I2C: 00:10: enabled 0
669 12:48:10.416148 I2C: 00:0c: enabled 1
670 12:48:10.419668 I2C: 00:50: enabled 1
671 12:48:10.422991 PCI: 00:16.0: enabled 1
672 12:48:10.426159 PCI: 00:16.1: enabled 0
673 12:48:10.428920 PCI: 00:16.4: enabled 0
674 12:48:10.429354 PCI: 00:16.5: enabled 0
675 12:48:10.432712 PCI: 00:17.0: enabled 0
676 12:48:10.436450 PCI: 00:19.0: enabled 1
677 12:48:10.439283 I2C: 00:1a: enabled 1
678 12:48:10.442692 I2C: 00:1a: enabled 0
679 12:48:10.443092 I2C: 00:1a: enabled 0
680 12:48:10.445788 I2C: 00:28: enabled 1
681 12:48:10.449254 I2C: 00:29: enabled 1
682 12:48:10.452138 PCI: 00:19.1: enabled 0
683 12:48:10.452635 PCI: 00:19.2: enabled 1
684 12:48:10.455730 PCI: 00:1a.0: enabled 1
685 12:48:10.458752 PCI: 00:1e.0: enabled 0
686 12:48:10.462454 PCI: 00:1e.1: enabled 0
687 12:48:10.465398 PCI: 00:1e.2: enabled 1
688 12:48:10.465824 SPI: 00: enabled 1
689 12:48:10.469103 PCI: 00:1e.3: enabled 0
690 12:48:10.472093 PCI: 00:1f.0: enabled 1
691 12:48:10.475895 PNP: 0c09.0: enabled 1
692 12:48:10.476343 PCI: 00:1f.1: enabled 1
693 12:48:10.478867 PCI: 00:1f.2: enabled 1
694 12:48:10.481804 PCI: 00:1f.3: enabled 1
695 12:48:10.485484 GENERIC: 0.0: enabled 0
696 12:48:10.488988 PCI: 00:1f.4: enabled 0
697 12:48:10.489417 PCI: 00:1f.5: enabled 1
698 12:48:10.492347 PCI: 00:1f.7: enabled 0
699 12:48:10.495473 Root Device scanning...
700 12:48:10.498688 scan_static_bus for Root Device
701 12:48:10.502057 CPU_CLUSTER: 0 enabled
702 12:48:10.502628 DOMAIN: 0000 enabled
703 12:48:10.505285 DOMAIN: 0000 scanning...
704 12:48:10.508656 PCI: pci_scan_bus for bus 00
705 12:48:10.512168 PCI: 00:00.0 [8086/0000] ops
706 12:48:10.515376 PCI: 00:00.0 [8086/4e22] enabled
707 12:48:10.518769 PCI: 00:02.0 [8086/0000] bus ops
708 12:48:10.522569 PCI: 00:02.0 [8086/4e55] enabled
709 12:48:10.525686 PCI: 00:04.0 [8086/0000] bus ops
710 12:48:10.528552 PCI: 00:04.0 [8086/4e03] enabled
711 12:48:10.531761 PCI: 00:05.0 [8086/0000] bus ops
712 12:48:10.535348 PCI: 00:05.0 [8086/4e19] enabled
713 12:48:10.538625 PCI: 00:08.0 [8086/4e11] enabled
714 12:48:10.542263 PCI: 00:14.0 [8086/0000] bus ops
715 12:48:10.545499 PCI: 00:14.0 [8086/4ded] enabled
716 12:48:10.548791 PCI: 00:14.2 [8086/4def] disabled
717 12:48:10.551785 PCI: 00:14.3 [8086/0000] bus ops
718 12:48:10.554951 PCI: 00:14.3 [8086/4df0] enabled
719 12:48:10.559037 PCI: 00:14.5 [8086/0000] ops
720 12:48:10.561592 PCI: 00:14.5 [8086/4df8] enabled
721 12:48:10.565394 PCI: 00:15.0 [8086/0000] bus ops
722 12:48:10.568566 PCI: 00:15.0 [8086/4de8] enabled
723 12:48:10.571857 PCI: 00:15.1 [8086/0000] bus ops
724 12:48:10.575332 PCI: 00:15.1 [8086/4de9] enabled
725 12:48:10.578011 PCI: 00:15.2 [8086/0000] bus ops
726 12:48:10.582497 PCI: 00:15.2 [8086/4dea] enabled
727 12:48:10.584765 PCI: 00:15.3 [8086/0000] bus ops
728 12:48:10.588361 PCI: 00:15.3 [8086/4deb] enabled
729 12:48:10.591793 PCI: 00:16.0 [8086/0000] ops
730 12:48:10.594899 PCI: 00:16.0 [8086/4de0] enabled
731 12:48:10.598317 PCI: 00:19.0 [8086/0000] bus ops
732 12:48:10.601403 PCI: 00:19.0 [8086/4dc5] enabled
733 12:48:10.605533 PCI: 00:19.2 [8086/0000] ops
734 12:48:10.608854 PCI: 00:19.2 [8086/4dc7] enabled
735 12:48:10.609378 PCI: 00:1a.0 [8086/0000] ops
736 12:48:10.611405 PCI: 00:1a.0 [8086/4dc4] enabled
737 12:48:10.614726 PCI: 00:1e.0 [8086/0000] ops
738 12:48:10.618520 PCI: 00:1e.0 [8086/4da8] disabled
739 12:48:10.622289 PCI: 00:1e.2 [8086/0000] bus ops
740 12:48:10.625309 PCI: 00:1e.2 [8086/4daa] enabled
741 12:48:10.628075 PCI: 00:1f.0 [8086/0000] bus ops
742 12:48:10.631454 PCI: 00:1f.0 [8086/4d87] enabled
743 12:48:10.638181 PCI: Static device PCI: 00:1f.1 not found, disabling it.
744 12:48:10.638750 RTC Init
745 12:48:10.644813 Set power on after power failure.
746 12:48:10.645347 Disabling Deep S3
747 12:48:10.647762 Disabling Deep S3
748 12:48:10.648193 Disabling Deep S4
749 12:48:10.651093 Disabling Deep S4
750 12:48:10.651521 Disabling Deep S5
751 12:48:10.654940 Disabling Deep S5
752 12:48:10.658062 PCI: 00:1f.2 [0000/0000] hidden
753 12:48:10.661592 PCI: 00:1f.3 [8086/0000] bus ops
754 12:48:10.664877 PCI: 00:1f.3 [8086/4dc8] enabled
755 12:48:10.668043 PCI: 00:1f.5 [8086/0000] bus ops
756 12:48:10.671298 PCI: 00:1f.5 [8086/4da4] enabled
757 12:48:10.674654 PCI: Leftover static devices:
758 12:48:10.675087 PCI: 00:12.6
759 12:48:10.678901 PCI: 00:09.0
760 12:48:10.679331 PCI: 00:14.1
761 12:48:10.679672 PCI: 00:16.1
762 12:48:10.682455 PCI: 00:16.4
763 12:48:10.683083 PCI: 00:16.5
764 12:48:10.683445 PCI: 00:17.0
765 12:48:10.685533 PCI: 00:19.1
766 12:48:10.685964 PCI: 00:1e.1
767 12:48:10.689424 PCI: 00:1e.3
768 12:48:10.689854 PCI: 00:1f.1
769 12:48:10.690196 PCI: 00:1f.4
770 12:48:10.692125 PCI: 00:1f.7
771 12:48:10.695773 PCI: Check your devicetree.cb.
772 12:48:10.696207 PCI: 00:02.0 scanning...
773 12:48:10.702295 scan_generic_bus for PCI: 00:02.0
774 12:48:10.705452 scan_generic_bus for PCI: 00:02.0 done
775 12:48:10.708615 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
776 12:48:10.711928 PCI: 00:04.0 scanning...
777 12:48:10.715305 scan_generic_bus for PCI: 00:04.0
778 12:48:10.718824 GENERIC: 0.0 enabled
779 12:48:10.721857 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
780 12:48:10.728640 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
781 12:48:10.731751 PCI: 00:05.0 scanning...
782 12:48:10.735414 scan_generic_bus for PCI: 00:05.0
783 12:48:10.735723 GENERIC: 0.0 enabled
784 12:48:10.741871 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
785 12:48:10.748297 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
786 12:48:10.748568 PCI: 00:14.0 scanning...
787 12:48:10.751997 scan_static_bus for PCI: 00:14.0
788 12:48:10.755163 USB0 port 0 enabled
789 12:48:10.758235 USB0 port 0 scanning...
790 12:48:10.761447 scan_static_bus for USB0 port 0
791 12:48:10.761636 USB2 port 0 enabled
792 12:48:10.764896 USB2 port 1 enabled
793 12:48:10.768601 USB2 port 2 enabled
794 12:48:10.768894 USB2 port 3 enabled
795 12:48:10.771729 USB2 port 4 disabled
796 12:48:10.774842 USB2 port 5 enabled
797 12:48:10.775105 USB2 port 6 disabled
798 12:48:10.778001 USB2 port 7 enabled
799 12:48:10.778264 USB3 port 0 enabled
800 12:48:10.782047 USB3 port 1 enabled
801 12:48:10.784899 USB3 port 2 enabled
802 12:48:10.785342 USB3 port 3 enabled
803 12:48:10.788440 USB2 port 0 scanning...
804 12:48:10.791957 scan_static_bus for USB2 port 0
805 12:48:10.794589 scan_static_bus for USB2 port 0 done
806 12:48:10.802047 scan_bus: bus USB2 port 0 finished in 6 msecs
807 12:48:10.802631 USB2 port 1 scanning...
808 12:48:10.804921 scan_static_bus for USB2 port 1
809 12:48:10.808394 scan_static_bus for USB2 port 1 done
810 12:48:10.814525 scan_bus: bus USB2 port 1 finished in 6 msecs
811 12:48:10.818019 USB2 port 2 scanning...
812 12:48:10.821589 scan_static_bus for USB2 port 2
813 12:48:10.825059 scan_static_bus for USB2 port 2 done
814 12:48:10.828027 scan_bus: bus USB2 port 2 finished in 6 msecs
815 12:48:10.831229 USB2 port 3 scanning...
816 12:48:10.834857 scan_static_bus for USB2 port 3
817 12:48:10.837946 scan_static_bus for USB2 port 3 done
818 12:48:10.841448 scan_bus: bus USB2 port 3 finished in 6 msecs
819 12:48:10.844814 USB2 port 5 scanning...
820 12:48:10.847695 scan_static_bus for USB2 port 5
821 12:48:10.850936 scan_static_bus for USB2 port 5 done
822 12:48:10.857797 scan_bus: bus USB2 port 5 finished in 6 msecs
823 12:48:10.858233 USB2 port 7 scanning...
824 12:48:10.861171 scan_static_bus for USB2 port 7
825 12:48:10.867557 scan_static_bus for USB2 port 7 done
826 12:48:10.871108 scan_bus: bus USB2 port 7 finished in 6 msecs
827 12:48:10.874245 USB3 port 0 scanning...
828 12:48:10.877418 scan_static_bus for USB3 port 0
829 12:48:10.880564 scan_static_bus for USB3 port 0 done
830 12:48:10.884263 scan_bus: bus USB3 port 0 finished in 6 msecs
831 12:48:10.887402 USB3 port 1 scanning...
832 12:48:10.890614 scan_static_bus for USB3 port 1
833 12:48:10.894300 scan_static_bus for USB3 port 1 done
834 12:48:10.897399 scan_bus: bus USB3 port 1 finished in 6 msecs
835 12:48:10.900594 USB3 port 2 scanning...
836 12:48:10.903948 scan_static_bus for USB3 port 2
837 12:48:10.907097 scan_static_bus for USB3 port 2 done
838 12:48:10.913747 scan_bus: bus USB3 port 2 finished in 6 msecs
839 12:48:10.914186 USB3 port 3 scanning...
840 12:48:10.916722 scan_static_bus for USB3 port 3
841 12:48:10.923509 scan_static_bus for USB3 port 3 done
842 12:48:10.926796 scan_bus: bus USB3 port 3 finished in 6 msecs
843 12:48:10.930544 scan_static_bus for USB0 port 0 done
844 12:48:10.937082 scan_bus: bus USB0 port 0 finished in 172 msecs
845 12:48:10.940060 scan_static_bus for PCI: 00:14.0 done
846 12:48:10.943286 scan_bus: bus PCI: 00:14.0 finished in 189 msecs
847 12:48:10.947248 PCI: 00:14.3 scanning...
848 12:48:10.950037 scan_static_bus for PCI: 00:14.3
849 12:48:10.953426 GENERIC: 0.0 enabled
850 12:48:10.956991 scan_static_bus for PCI: 00:14.3 done
851 12:48:10.960119 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
852 12:48:10.963672 PCI: 00:15.0 scanning...
853 12:48:10.966955 scan_static_bus for PCI: 00:15.0
854 12:48:10.969880 I2C: 00:2c enabled
855 12:48:10.970305 I2C: 00:15 enabled
856 12:48:10.974140 scan_static_bus for PCI: 00:15.0 done
857 12:48:10.980351 scan_bus: bus PCI: 00:15.0 finished in 11 msecs
858 12:48:10.980875 PCI: 00:15.1 scanning...
859 12:48:10.983409 scan_static_bus for PCI: 00:15.1
860 12:48:10.990229 scan_static_bus for PCI: 00:15.1 done
861 12:48:10.993304 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
862 12:48:10.996940 PCI: 00:15.2 scanning...
863 12:48:11.000331 scan_static_bus for PCI: 00:15.2
864 12:48:11.003468 GENERIC: 0.0 disabled
865 12:48:11.003999 I2C: 00:15 enabled
866 12:48:11.006815 I2C: 00:10 disabled
867 12:48:11.007338 I2C: 00:10 disabled
868 12:48:11.010258 I2C: 00:2c enabled
869 12:48:11.013157 I2C: 00:40 enabled
870 12:48:11.013635 I2C: 00:10 enabled
871 12:48:11.016869 I2C: 00:39 enabled
872 12:48:11.020187 scan_static_bus for PCI: 00:15.2 done
873 12:48:11.023263 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
874 12:48:11.026590 PCI: 00:15.3 scanning...
875 12:48:11.030187 scan_static_bus for PCI: 00:15.3
876 12:48:11.033462 I2C: 00:36 enabled
877 12:48:11.034063 I2C: 00:10 disabled
878 12:48:11.036228 I2C: 00:0c enabled
879 12:48:11.040134 I2C: 00:50 enabled
880 12:48:11.043230 scan_static_bus for PCI: 00:15.3 done
881 12:48:11.046845 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
882 12:48:11.050271 PCI: 00:19.0 scanning...
883 12:48:11.052892 scan_static_bus for PCI: 00:19.0
884 12:48:11.056344 I2C: 00:1a enabled
885 12:48:11.056770 I2C: 00:1a disabled
886 12:48:11.059460 I2C: 00:1a disabled
887 12:48:11.059936 I2C: 00:28 enabled
888 12:48:11.062925 I2C: 00:29 enabled
889 12:48:11.066188 scan_static_bus for PCI: 00:19.0 done
890 12:48:11.072745 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
891 12:48:11.073169 PCI: 00:1e.2 scanning...
892 12:48:11.076222 scan_generic_bus for PCI: 00:1e.2
893 12:48:11.079597 SPI: 00 enabled
894 12:48:11.085873 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
895 12:48:11.089233 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
896 12:48:11.093037 PCI: 00:1f.0 scanning...
897 12:48:11.096519 scan_static_bus for PCI: 00:1f.0
898 12:48:11.099080 PNP: 0c09.0 enabled
899 12:48:11.099605 PNP: 0c09.0 scanning...
900 12:48:11.102500 scan_static_bus for PNP: 0c09.0
901 12:48:11.105692 scan_static_bus for PNP: 0c09.0 done
902 12:48:11.112889 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
903 12:48:11.115821 scan_static_bus for PCI: 00:1f.0 done
904 12:48:11.119340 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
905 12:48:11.122775 PCI: 00:1f.3 scanning...
906 12:48:11.126185 scan_static_bus for PCI: 00:1f.3
907 12:48:11.129465 GENERIC: 0.0 disabled
908 12:48:11.132970 scan_static_bus for PCI: 00:1f.3 done
909 12:48:11.139063 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
910 12:48:11.139508 PCI: 00:1f.5 scanning...
911 12:48:11.142373 scan_generic_bus for PCI: 00:1f.5
912 12:48:11.148799 scan_generic_bus for PCI: 00:1f.5 done
913 12:48:11.152849 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
914 12:48:11.155697 scan_bus: bus DOMAIN: 0000 finished in 646 msecs
915 12:48:11.162465 scan_static_bus for Root Device done
916 12:48:11.165272 scan_bus: bus Root Device finished in 665 msecs
917 12:48:11.165806 done
918 12:48:11.172291 BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 1085 ms
919 12:48:11.175687 Chrome EC: UHEPI supported
920 12:48:11.182249 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
921 12:48:11.188634 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
922 12:48:11.191940 SPI flash protection: WPSW=0 SRP0=0
923 12:48:11.195344 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
924 12:48:11.202259 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
925 12:48:11.205779 found VGA at PCI: 00:02.0
926 12:48:11.208981 Setting up VGA for PCI: 00:02.0
927 12:48:11.212167 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
928 12:48:11.218443 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
929 12:48:11.218889 Allocating resources...
930 12:48:11.222046 Reading resources...
931 12:48:11.225552 Root Device read_resources bus 0 link: 0
932 12:48:11.231934 CPU_CLUSTER: 0 read_resources bus 0 link: 0
933 12:48:11.234849 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
934 12:48:11.241766 DOMAIN: 0000 read_resources bus 0 link: 0
935 12:48:11.245513 PCI: 00:04.0 read_resources bus 1 link: 0
936 12:48:11.252241 PCI: 00:04.0 read_resources bus 1 link: 0 done
937 12:48:11.255443 PCI: 00:05.0 read_resources bus 2 link: 0
938 12:48:11.259575 PCI: 00:05.0 read_resources bus 2 link: 0 done
939 12:48:11.266173 PCI: 00:14.0 read_resources bus 0 link: 0
940 12:48:11.269252 USB0 port 0 read_resources bus 0 link: 0
941 12:48:11.276848 USB0 port 0 read_resources bus 0 link: 0 done
942 12:48:11.280103 PCI: 00:14.0 read_resources bus 0 link: 0 done
943 12:48:11.336270 PCI: 00:14.3 read_resources bus 0 link: 0
944 12:48:11.336841 PCI: 00:14.3 read_resources bus 0 link: 0 done
945 12:48:11.337294 PCI: 00:15.0 read_resources bus 0 link: 0
946 12:48:11.338071 PCI: 00:15.0 read_resources bus 0 link: 0 done
947 12:48:11.338475 PCI: 00:15.2 read_resources bus 0 link: 0
948 12:48:11.338905 PCI: 00:15.2 read_resources bus 0 link: 0 done
949 12:48:11.339320 PCI: 00:15.3 read_resources bus 0 link: 0
950 12:48:11.339727 PCI: 00:15.3 read_resources bus 0 link: 0 done
951 12:48:11.340125 PCI: 00:19.0 read_resources bus 0 link: 0
952 12:48:11.340614 PCI: 00:19.0 read_resources bus 0 link: 0 done
953 12:48:11.341106 PCI: 00:1e.2 read_resources bus 3 link: 0
954 12:48:11.345621 PCI: 00:1e.2 read_resources bus 3 link: 0 done
955 12:48:11.346176 PCI: 00:1f.0 read_resources bus 0 link: 0
956 12:48:11.348901 PCI: 00:1f.0 read_resources bus 0 link: 0 done
957 12:48:11.355310 PCI: 00:1f.3 read_resources bus 0 link: 0
958 12:48:11.359186 PCI: 00:1f.3 read_resources bus 0 link: 0 done
959 12:48:11.365633 DOMAIN: 0000 read_resources bus 0 link: 0 done
960 12:48:11.368564 Root Device read_resources bus 0 link: 0 done
961 12:48:11.371798 Done reading resources.
962 12:48:11.374926 Show resources in subtree (Root Device)...After reading.
963 12:48:11.381679 Root Device child on link 0 CPU_CLUSTER: 0
964 12:48:11.384916 CPU_CLUSTER: 0 child on link 0 APIC: 00
965 12:48:11.385341 APIC: 00
966 12:48:11.388794 APIC: 02
967 12:48:11.392064 DOMAIN: 0000 child on link 0 PCI: 00:00.0
968 12:48:11.401737 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
969 12:48:11.411483 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
970 12:48:11.412010 PCI: 00:00.0
971 12:48:11.421827 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
972 12:48:11.431654 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
973 12:48:11.441249 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
974 12:48:11.451249 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
975 12:48:11.461475 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
976 12:48:11.467758 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
977 12:48:11.477541 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
978 12:48:11.487581 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
979 12:48:11.497487 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
980 12:48:11.507383 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
981 12:48:11.517399 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
982 12:48:11.523702 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
983 12:48:11.533371 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
984 12:48:11.543829 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
985 12:48:11.553708 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
986 12:48:11.563648 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
987 12:48:11.573529 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
988 12:48:11.580313 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
989 12:48:11.590143 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
990 12:48:11.593295 PCI: 00:02.0
991 12:48:11.603519 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
992 12:48:11.613243 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
993 12:48:11.619857 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
994 12:48:11.626052 PCI: 00:04.0 child on link 0 GENERIC: 0.0
995 12:48:11.636409 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
996 12:48:11.636981 GENERIC: 0.0
997 12:48:11.643256 PCI: 00:05.0 child on link 0 GENERIC: 0.0
998 12:48:11.652615 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
999 12:48:11.653182 GENERIC: 0.0
1000 12:48:11.656092 PCI: 00:08.0
1001 12:48:11.665677 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1002 12:48:11.668869 PCI: 00:14.0 child on link 0 USB0 port 0
1003 12:48:11.678711 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1004 12:48:11.685640 USB0 port 0 child on link 0 USB2 port 0
1005 12:48:11.686096 USB2 port 0
1006 12:48:11.689273 USB2 port 1
1007 12:48:11.689811 USB2 port 2
1008 12:48:11.692538 USB2 port 3
1009 12:48:11.692970 USB2 port 4
1010 12:48:11.695580 USB2 port 5
1011 12:48:11.696115 USB2 port 6
1012 12:48:11.698966 USB2 port 7
1013 12:48:11.699395 USB3 port 0
1014 12:48:11.702329 USB3 port 1
1015 12:48:11.702801 USB3 port 2
1016 12:48:11.705449 USB3 port 3
1017 12:48:11.705982 PCI: 00:14.2
1018 12:48:11.711925 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1019 12:48:11.722242 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1020 12:48:11.722836 GENERIC: 0.0
1021 12:48:11.725534 PCI: 00:14.5
1022 12:48:11.735509 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1023 12:48:11.738471 PCI: 00:15.0 child on link 0 I2C: 00:2c
1024 12:48:11.749029 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1025 12:48:11.752238 I2C: 00:2c
1026 12:48:11.752762 I2C: 00:15
1027 12:48:11.753102 PCI: 00:15.1
1028 12:48:11.761427 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1029 12:48:11.768357 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1030 12:48:11.778067 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1031 12:48:11.778689 GENERIC: 0.0
1032 12:48:11.782155 I2C: 00:15
1033 12:48:11.782753 I2C: 00:10
1034 12:48:11.785247 I2C: 00:10
1035 12:48:11.785704 I2C: 00:2c
1036 12:48:11.788494 I2C: 00:40
1037 12:48:11.789022 I2C: 00:10
1038 12:48:11.791686 I2C: 00:39
1039 12:48:11.795001 PCI: 00:15.3 child on link 0 I2C: 00:36
1040 12:48:11.805084 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1041 12:48:11.805615 I2C: 00:36
1042 12:48:11.808483 I2C: 00:10
1043 12:48:11.809011 I2C: 00:0c
1044 12:48:11.811876 I2C: 00:50
1045 12:48:11.812299 PCI: 00:16.0
1046 12:48:11.821258 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1047 12:48:11.828668 PCI: 00:19.0 child on link 0 I2C: 00:1a
1048 12:48:11.838561 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1049 12:48:11.839091 I2C: 00:1a
1050 12:48:11.841779 I2C: 00:1a
1051 12:48:11.842305 I2C: 00:1a
1052 12:48:11.842688 I2C: 00:28
1053 12:48:11.844845 I2C: 00:29
1054 12:48:11.845368 PCI: 00:19.2
1055 12:48:11.858206 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1056 12:48:11.868010 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1057 12:48:11.868470 PCI: 00:1a.0
1058 12:48:11.878262 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1059 12:48:11.881325 PCI: 00:1e.0
1060 12:48:11.884423 PCI: 00:1e.2 child on link 0 SPI: 00
1061 12:48:11.894385 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1062 12:48:11.894945 SPI: 00
1063 12:48:11.901352 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1064 12:48:11.906995 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1065 12:48:11.910268 PNP: 0c09.0
1066 12:48:11.920578 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1067 12:48:11.921007 PCI: 00:1f.2
1068 12:48:11.930746 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1069 12:48:11.938012 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1070 12:48:11.945016 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1071 12:48:11.954480 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1072 12:48:11.964683 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1073 12:48:11.965149 GENERIC: 0.0
1074 12:48:11.967809 PCI: 00:1f.5
1075 12:48:11.977582 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1076 12:48:11.984232 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1077 12:48:11.991201 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1078 12:48:11.998060 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1079 12:48:12.004352 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1080 12:48:12.010857 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1081 12:48:12.021042 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1082 12:48:12.024162 DOMAIN: 0000: Resource ranges:
1083 12:48:12.027205 * Base: 1000, Size: 800, Tag: 100
1084 12:48:12.030801 * Base: 1900, Size: e700, Tag: 100
1085 12:48:12.034088 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1086 12:48:12.040479 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1087 12:48:12.050296 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1088 12:48:12.057061 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1089 12:48:12.063576 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1090 12:48:12.073712 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1091 12:48:12.080718 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1092 12:48:12.086972 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1093 12:48:12.093404 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1094 12:48:12.103668 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1095 12:48:12.110232 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1096 12:48:12.116227 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1097 12:48:12.126313 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1098 12:48:12.133391 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1099 12:48:12.139525 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1100 12:48:12.149821 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1101 12:48:12.156255 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1102 12:48:12.162830 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1103 12:48:12.172782 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1104 12:48:12.179376 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1105 12:48:12.185594 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1106 12:48:12.196458 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1107 12:48:12.203089 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1108 12:48:12.209751 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1109 12:48:12.212891 DOMAIN: 0000: Resource ranges:
1110 12:48:12.219367 * Base: 7fc00000, Size: 40400000, Tag: 200
1111 12:48:12.222380 * Base: d0000000, Size: 2b000000, Tag: 200
1112 12:48:12.225812 * Base: fb001000, Size: 2fff000, Tag: 200
1113 12:48:12.233582 * Base: fe010000, Size: 22000, Tag: 200
1114 12:48:12.235616 * Base: fe033000, Size: a4d000, Tag: 200
1115 12:48:12.239177 * Base: fea88000, Size: 2f8000, Tag: 200
1116 12:48:12.242912 * Base: fed88000, Size: 8000, Tag: 200
1117 12:48:12.245562 * Base: fed93000, Size: d000, Tag: 200
1118 12:48:12.252541 * Base: feda2000, Size: 125e000, Tag: 200
1119 12:48:12.255967 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1120 12:48:12.261957 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1121 12:48:12.268893 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1122 12:48:12.275179 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1123 12:48:12.282225 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1124 12:48:12.288306 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1125 12:48:12.295110 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1126 12:48:12.302141 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1127 12:48:12.308694 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1128 12:48:12.315137 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1129 12:48:12.322143 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1130 12:48:12.328627 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1131 12:48:12.335040 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1132 12:48:12.341801 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1133 12:48:12.348483 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1134 12:48:12.354939 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1135 12:48:12.361381 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1136 12:48:12.367459 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1137 12:48:12.374269 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1138 12:48:12.381026 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1139 12:48:12.387439 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1140 12:48:12.397412 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1141 12:48:12.404653 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1142 12:48:12.407352 Root Device assign_resources, bus 0 link: 0
1143 12:48:12.410872 DOMAIN: 0000 assign_resources, bus 0 link: 0
1144 12:48:12.421008 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1145 12:48:12.427624 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1146 12:48:12.437797 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1147 12:48:12.444322 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1148 12:48:12.451271 PCI: 00:04.0 assign_resources, bus 1 link: 0
1149 12:48:12.454349 PCI: 00:04.0 assign_resources, bus 1 link: 0
1150 12:48:12.461105 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1151 12:48:12.467650 PCI: 00:05.0 assign_resources, bus 2 link: 0
1152 12:48:12.470998 PCI: 00:05.0 assign_resources, bus 2 link: 0
1153 12:48:12.481002 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1154 12:48:12.487580 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1155 12:48:12.490778 PCI: 00:14.0 assign_resources, bus 0 link: 0
1156 12:48:12.497597 PCI: 00:14.0 assign_resources, bus 0 link: 0
1157 12:48:12.504151 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1158 12:48:12.508163 PCI: 00:14.3 assign_resources, bus 0 link: 0
1159 12:48:12.515125 PCI: 00:14.3 assign_resources, bus 0 link: 0
1160 12:48:12.522264 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1161 12:48:12.531767 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1162 12:48:12.534585 PCI: 00:15.0 assign_resources, bus 0 link: 0
1163 12:48:12.538606 PCI: 00:15.0 assign_resources, bus 0 link: 0
1164 12:48:12.548259 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1165 12:48:12.554631 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1166 12:48:12.561449 PCI: 00:15.2 assign_resources, bus 0 link: 0
1167 12:48:12.564523 PCI: 00:15.2 assign_resources, bus 0 link: 0
1168 12:48:12.574459 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1169 12:48:12.578262 PCI: 00:15.3 assign_resources, bus 0 link: 0
1170 12:48:12.581109 PCI: 00:15.3 assign_resources, bus 0 link: 0
1171 12:48:12.591055 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1172 12:48:12.598089 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1173 12:48:12.604754 PCI: 00:19.0 assign_resources, bus 0 link: 0
1174 12:48:12.607657 PCI: 00:19.0 assign_resources, bus 0 link: 0
1175 12:48:12.617938 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1176 12:48:12.624189 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1177 12:48:12.631353 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1178 12:48:12.637644 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1179 12:48:12.641169 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1180 12:48:12.647912 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1181 12:48:12.651059 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1182 12:48:12.657342 LPC: Trying to open IO window from 800 size 1ff
1183 12:48:12.663839 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1184 12:48:12.670912 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1185 12:48:12.676841 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1186 12:48:12.680229 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1187 12:48:12.690531 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1188 12:48:12.693392 DOMAIN: 0000 assign_resources, bus 0 link: 0
1189 12:48:12.697125 Root Device assign_resources, bus 0 link: 0
1190 12:48:12.701055 Done setting resources.
1191 12:48:12.707273 Show resources in subtree (Root Device)...After assigning values.
1192 12:48:12.710264 Root Device child on link 0 CPU_CLUSTER: 0
1193 12:48:12.716669 CPU_CLUSTER: 0 child on link 0 APIC: 00
1194 12:48:12.717149 APIC: 00
1195 12:48:12.719992 APIC: 02
1196 12:48:12.723729 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1197 12:48:12.733354 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1198 12:48:12.743814 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1199 12:48:12.744332 PCI: 00:00.0
1200 12:48:12.753000 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1201 12:48:12.763108 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1202 12:48:12.773244 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1203 12:48:12.783341 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1204 12:48:12.789783 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1205 12:48:12.799326 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1206 12:48:12.809471 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1207 12:48:12.819691 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1208 12:48:12.829385 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1209 12:48:12.836224 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1210 12:48:12.845677 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1211 12:48:12.856180 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1212 12:48:12.865582 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1213 12:48:12.875819 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1214 12:48:12.882506 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1215 12:48:12.892305 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1216 12:48:12.902290 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1217 12:48:12.911820 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1218 12:48:12.922224 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1219 12:48:12.922806 PCI: 00:02.0
1220 12:48:12.934993 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1221 12:48:12.945022 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1222 12:48:12.955001 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1223 12:48:12.958331 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1224 12:48:12.968275 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1225 12:48:12.971520 GENERIC: 0.0
1226 12:48:12.974853 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1227 12:48:12.984717 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1228 12:48:12.987623 GENERIC: 0.0
1229 12:48:12.988149 PCI: 00:08.0
1230 12:48:12.997727 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1231 12:48:13.004753 PCI: 00:14.0 child on link 0 USB0 port 0
1232 12:48:13.014638 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1233 12:48:13.017626 USB0 port 0 child on link 0 USB2 port 0
1234 12:48:13.021164 USB2 port 0
1235 12:48:13.021683 USB2 port 1
1236 12:48:13.024597 USB2 port 2
1237 12:48:13.025011 USB2 port 3
1238 12:48:13.027708 USB2 port 4
1239 12:48:13.028222 USB2 port 5
1240 12:48:13.031066 USB2 port 6
1241 12:48:13.031483 USB2 port 7
1242 12:48:13.034445 USB3 port 0
1243 12:48:13.034866 USB3 port 1
1244 12:48:13.038225 USB3 port 2
1245 12:48:13.038775 USB3 port 3
1246 12:48:13.040788 PCI: 00:14.2
1247 12:48:13.044730 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1248 12:48:13.054758 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1249 12:48:13.057579 GENERIC: 0.0
1250 12:48:13.058095 PCI: 00:14.5
1251 12:48:13.071284 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1252 12:48:13.074484 PCI: 00:15.0 child on link 0 I2C: 00:2c
1253 12:48:13.084832 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1254 12:48:13.085347 I2C: 00:2c
1255 12:48:13.087226 I2C: 00:15
1256 12:48:13.087669 PCI: 00:15.1
1257 12:48:13.100675 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1258 12:48:13.104145 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1259 12:48:13.113658 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1260 12:48:13.117614 GENERIC: 0.0
1261 12:48:13.118039 I2C: 00:15
1262 12:48:13.118368 I2C: 00:10
1263 12:48:13.120543 I2C: 00:10
1264 12:48:13.120971 I2C: 00:2c
1265 12:48:13.123945 I2C: 00:40
1266 12:48:13.124483 I2C: 00:10
1267 12:48:13.126951 I2C: 00:39
1268 12:48:13.130025 PCI: 00:15.3 child on link 0 I2C: 00:36
1269 12:48:13.140028 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1270 12:48:13.143607 I2C: 00:36
1271 12:48:13.144022 I2C: 00:10
1272 12:48:13.147191 I2C: 00:0c
1273 12:48:13.147898 I2C: 00:50
1274 12:48:13.150170 PCI: 00:16.0
1275 12:48:13.160352 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1276 12:48:13.163272 PCI: 00:19.0 child on link 0 I2C: 00:1a
1277 12:48:13.173529 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1278 12:48:13.176677 I2C: 00:1a
1279 12:48:13.177098 I2C: 00:1a
1280 12:48:13.180048 I2C: 00:1a
1281 12:48:13.180462 I2C: 00:28
1282 12:48:13.180876 I2C: 00:29
1283 12:48:13.183107 PCI: 00:19.2
1284 12:48:13.193526 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1285 12:48:13.203013 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1286 12:48:13.206313 PCI: 00:1a.0
1287 12:48:13.216558 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1288 12:48:13.220146 PCI: 00:1e.0
1289 12:48:13.222926 PCI: 00:1e.2 child on link 0 SPI: 00
1290 12:48:13.233581 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1291 12:48:13.234109 SPI: 00
1292 12:48:13.239816 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1293 12:48:13.245927 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1294 12:48:13.249815 PNP: 0c09.0
1295 12:48:13.256529 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1296 12:48:13.259639 PCI: 00:1f.2
1297 12:48:13.269700 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1298 12:48:13.275587 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1299 12:48:13.282602 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1300 12:48:13.292907 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1301 12:48:13.302633 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1302 12:48:13.305786 GENERIC: 0.0
1303 12:48:13.306342 PCI: 00:1f.5
1304 12:48:13.315557 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1305 12:48:13.318767 Done allocating resources.
1306 12:48:13.325754 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2097 ms
1307 12:48:13.329307 Enabling resources...
1308 12:48:13.332279 PCI: 00:00.0 subsystem <- 8086/4e22
1309 12:48:13.335314 PCI: 00:00.0 cmd <- 06
1310 12:48:13.339248 PCI: 00:02.0 subsystem <- 8086/4e55
1311 12:48:13.342034 PCI: 00:02.0 cmd <- 03
1312 12:48:13.345628 PCI: 00:04.0 subsystem <- 8086/4e03
1313 12:48:13.346063 PCI: 00:04.0 cmd <- 02
1314 12:48:13.349068 PCI: 00:05.0 bridge ctrl <- 0003
1315 12:48:13.355323 PCI: 00:05.0 subsystem <- 8086/4e19
1316 12:48:13.355841 PCI: 00:05.0 cmd <- 02
1317 12:48:13.359190 PCI: 00:08.0 cmd <- 06
1318 12:48:13.362194 PCI: 00:14.0 subsystem <- 8086/4ded
1319 12:48:13.365288 PCI: 00:14.0 cmd <- 02
1320 12:48:13.368268 PCI: 00:14.3 subsystem <- 8086/4df0
1321 12:48:13.371895 PCI: 00:14.3 cmd <- 02
1322 12:48:13.375393 PCI: 00:14.5 subsystem <- 8086/4df8
1323 12:48:13.378634 PCI: 00:14.5 cmd <- 06
1324 12:48:13.382024 PCI: 00:15.0 subsystem <- 8086/4de8
1325 12:48:13.382480 PCI: 00:15.0 cmd <- 02
1326 12:48:13.388613 PCI: 00:15.1 subsystem <- 8086/4de9
1327 12:48:13.389029 PCI: 00:15.1 cmd <- 02
1328 12:48:13.391924 PCI: 00:15.2 subsystem <- 8086/4dea
1329 12:48:13.395082 PCI: 00:15.2 cmd <- 02
1330 12:48:13.398522 PCI: 00:15.3 subsystem <- 8086/4deb
1331 12:48:13.401792 PCI: 00:15.3 cmd <- 02
1332 12:48:13.405559 PCI: 00:16.0 subsystem <- 8086/4de0
1333 12:48:13.408696 PCI: 00:16.0 cmd <- 02
1334 12:48:13.411900 PCI: 00:19.0 subsystem <- 8086/4dc5
1335 12:48:13.415133 PCI: 00:19.0 cmd <- 02
1336 12:48:13.418170 PCI: 00:19.2 subsystem <- 8086/4dc7
1337 12:48:13.421820 PCI: 00:19.2 cmd <- 06
1338 12:48:13.425184 PCI: 00:1a.0 subsystem <- 8086/4dc4
1339 12:48:13.425692 PCI: 00:1a.0 cmd <- 06
1340 12:48:13.431241 PCI: 00:1e.2 subsystem <- 8086/4daa
1341 12:48:13.431769 PCI: 00:1e.2 cmd <- 06
1342 12:48:13.434643 PCI: 00:1f.0 subsystem <- 8086/4d87
1343 12:48:13.438372 PCI: 00:1f.0 cmd <- 407
1344 12:48:13.441572 PCI: 00:1f.3 subsystem <- 8086/4dc8
1345 12:48:13.444361 PCI: 00:1f.3 cmd <- 02
1346 12:48:13.448269 PCI: 00:1f.5 subsystem <- 8086/4da4
1347 12:48:13.451770 PCI: 00:1f.5 cmd <- 406
1348 12:48:13.454998 done.
1349 12:48:13.458544 BS: BS_DEV_ENABLE run times (exec / console): 6 / 122 ms
1350 12:48:13.461859 Initializing devices...
1351 12:48:13.465061 Root Device init
1352 12:48:13.465573 mainboard: EC init
1353 12:48:13.471658 Chrome EC: Set SMI mask to 0x0000000000000000
1354 12:48:13.478165 Chrome EC: clear events_b mask to 0x0000000000000000
1355 12:48:13.481770 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1356 12:48:13.488441 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1357 12:48:13.495049 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1358 12:48:13.502097 Chrome EC: Set WAKE mask to 0x0000000000000000
1359 12:48:13.505213 Root Device init finished in 37 msecs
1360 12:48:13.508919 PCI: 00:00.0 init
1361 12:48:13.512140 CPU TDP = 6 Watts
1362 12:48:13.512646 CPU PL1 = 7 Watts
1363 12:48:13.515304 CPU PL2 = 12 Watts
1364 12:48:13.518489 PCI: 00:00.0 init finished in 6 msecs
1365 12:48:13.521796 PCI: 00:02.0 init
1366 12:48:13.522308 GMA: Found VBT in CBFS
1367 12:48:13.525732 GMA: Found valid VBT in CBFS
1368 12:48:13.531748 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1369 12:48:13.538693 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1370 12:48:13.545306 PCI: 00:02.0 init finished in 18 msecs
1371 12:48:13.545822 PCI: 00:08.0 init
1372 12:48:13.548045 PCI: 00:08.0 init finished in 0 msecs
1373 12:48:13.552153 PCI: 00:14.0 init
1374 12:48:13.554945 XHCI: Updated LFPS sampling OFF time to 9 ms
1375 12:48:13.562138 PCI: 00:14.0 init finished in 4 msecs
1376 12:48:13.562769 PCI: 00:15.0 init
1377 12:48:13.564973 I2C bus 0 version 0x3230302a
1378 12:48:13.568402 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1379 12:48:13.575237 PCI: 00:15.0 init finished in 6 msecs
1380 12:48:13.575780 PCI: 00:15.1 init
1381 12:48:13.578506 I2C bus 1 version 0x3230302a
1382 12:48:13.581342 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1383 12:48:13.585459 PCI: 00:15.1 init finished in 6 msecs
1384 12:48:13.588328 PCI: 00:15.2 init
1385 12:48:13.591891 I2C bus 2 version 0x3230302a
1386 12:48:13.594874 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1387 12:48:13.597875 PCI: 00:15.2 init finished in 6 msecs
1388 12:48:13.602207 PCI: 00:15.3 init
1389 12:48:13.604443 I2C bus 3 version 0x3230302a
1390 12:48:13.607903 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1391 12:48:13.611831 PCI: 00:15.3 init finished in 6 msecs
1392 12:48:13.614569 PCI: 00:16.0 init
1393 12:48:13.617742 PCI: 00:16.0 init finished in 0 msecs
1394 12:48:13.618160 PCI: 00:19.0 init
1395 12:48:13.621931 I2C bus 4 version 0x3230302a
1396 12:48:13.624990 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1397 12:48:13.628315 PCI: 00:19.0 init finished in 6 msecs
1398 12:48:13.631954 PCI: 00:1a.0 init
1399 12:48:13.635181 PCI: 00:1a.0 init finished in 0 msecs
1400 12:48:13.638377 PCI: 00:1f.0 init
1401 12:48:13.641770 IOAPIC: Initializing IOAPIC at 0xfec00000
1402 12:48:13.648722 IOAPIC: Bootstrap Processor Local APIC = 0x00
1403 12:48:13.649283 IOAPIC: ID = 0x02
1404 12:48:13.652071 IOAPIC: Dumping registers
1405 12:48:13.655323 reg 0x0000: 0x02000000
1406 12:48:13.655886 reg 0x0001: 0x00770020
1407 12:48:13.658788 reg 0x0002: 0x00000000
1408 12:48:13.662014 PCI: 00:1f.0 init finished in 21 msecs
1409 12:48:13.665139 PCI: 00:1f.2 init
1410 12:48:13.668460 Disabling ACPI via APMC.
1411 12:48:13.672125 APMC done.
1412 12:48:13.675041 PCI: 00:1f.2 init finished in 5 msecs
1413 12:48:13.685987 PNP: 0c09.0 init
1414 12:48:13.689052 Google Chrome EC uptime: 6.587 seconds
1415 12:48:13.696148 Google Chrome AP resets since EC boot: 0
1416 12:48:13.699185 Google Chrome most recent AP reset causes:
1417 12:48:13.705822 Google Chrome EC reset flags at last EC boot: reset-pin
1418 12:48:13.708978 PNP: 0c09.0 init finished in 18 msecs
1419 12:48:13.709393 Devices initialized
1420 12:48:13.712531 Show all devs... After init.
1421 12:48:13.715852 Root Device: enabled 1
1422 12:48:13.719115 CPU_CLUSTER: 0: enabled 1
1423 12:48:13.722310 DOMAIN: 0000: enabled 1
1424 12:48:13.722766 PCI: 00:00.0: enabled 1
1425 12:48:13.725942 PCI: 00:02.0: enabled 1
1426 12:48:13.729117 PCI: 00:04.0: enabled 1
1427 12:48:13.729628 PCI: 00:05.0: enabled 1
1428 12:48:13.732569 PCI: 00:09.0: enabled 0
1429 12:48:13.735651 PCI: 00:12.6: enabled 0
1430 12:48:13.739112 PCI: 00:14.0: enabled 1
1431 12:48:13.739627 PCI: 00:14.1: enabled 0
1432 12:48:13.741965 PCI: 00:14.2: enabled 0
1433 12:48:13.746050 PCI: 00:14.3: enabled 1
1434 12:48:13.748859 PCI: 00:14.5: enabled 1
1435 12:48:13.749275 PCI: 00:15.0: enabled 1
1436 12:48:13.752284 PCI: 00:15.1: enabled 1
1437 12:48:13.755533 PCI: 00:15.2: enabled 1
1438 12:48:13.759044 PCI: 00:15.3: enabled 1
1439 12:48:13.759557 PCI: 00:16.0: enabled 1
1440 12:48:13.762318 PCI: 00:16.1: enabled 0
1441 12:48:13.765175 PCI: 00:16.4: enabled 0
1442 12:48:13.768550 PCI: 00:16.5: enabled 0
1443 12:48:13.769216 PCI: 00:17.0: enabled 0
1444 12:48:13.772232 PCI: 00:19.0: enabled 1
1445 12:48:13.775451 PCI: 00:19.1: enabled 0
1446 12:48:13.775863 PCI: 00:19.2: enabled 1
1447 12:48:13.778473 PCI: 00:1a.0: enabled 1
1448 12:48:13.782180 PCI: 00:1c.0: enabled 0
1449 12:48:13.785270 PCI: 00:1c.1: enabled 0
1450 12:48:13.785896 PCI: 00:1c.2: enabled 0
1451 12:48:13.788529 PCI: 00:1c.3: enabled 0
1452 12:48:13.791850 PCI: 00:1c.4: enabled 0
1453 12:48:13.795408 PCI: 00:1c.5: enabled 0
1454 12:48:13.795921 PCI: 00:1c.6: enabled 0
1455 12:48:13.798616 PCI: 00:1c.7: enabled 1
1456 12:48:13.801865 PCI: 00:1e.0: enabled 0
1457 12:48:13.804710 PCI: 00:1e.1: enabled 0
1458 12:48:13.805213 PCI: 00:1e.2: enabled 1
1459 12:48:13.808665 PCI: 00:1e.3: enabled 0
1460 12:48:13.811824 PCI: 00:1f.0: enabled 1
1461 12:48:13.812316 PCI: 00:1f.1: enabled 0
1462 12:48:13.814856 PCI: 00:1f.2: enabled 1
1463 12:48:13.818111 PCI: 00:1f.3: enabled 1
1464 12:48:13.821878 PCI: 00:1f.4: enabled 0
1465 12:48:13.822380 PCI: 00:1f.5: enabled 1
1466 12:48:13.824697 PCI: 00:1f.7: enabled 0
1467 12:48:13.828539 GENERIC: 0.0: enabled 1
1468 12:48:13.831126 GENERIC: 0.0: enabled 1
1469 12:48:13.831538 USB0 port 0: enabled 1
1470 12:48:13.835299 GENERIC: 0.0: enabled 1
1471 12:48:13.838277 I2C: 00:2c: enabled 1
1472 12:48:13.838873 I2C: 00:15: enabled 1
1473 12:48:13.841497 GENERIC: 0.0: enabled 0
1474 12:48:13.844634 I2C: 00:15: enabled 1
1475 12:48:13.848476 I2C: 00:10: enabled 0
1476 12:48:13.848987 I2C: 00:10: enabled 0
1477 12:48:13.851112 I2C: 00:2c: enabled 1
1478 12:48:13.854510 I2C: 00:40: enabled 1
1479 12:48:13.855013 I2C: 00:10: enabled 1
1480 12:48:13.858190 I2C: 00:39: enabled 1
1481 12:48:13.861290 I2C: 00:36: enabled 1
1482 12:48:13.861935 I2C: 00:10: enabled 0
1483 12:48:13.864468 I2C: 00:0c: enabled 1
1484 12:48:13.868190 I2C: 00:50: enabled 1
1485 12:48:13.868707 I2C: 00:1a: enabled 1
1486 12:48:13.871200 I2C: 00:1a: enabled 0
1487 12:48:13.874460 I2C: 00:1a: enabled 0
1488 12:48:13.874875 I2C: 00:28: enabled 1
1489 12:48:13.877482 I2C: 00:29: enabled 1
1490 12:48:13.881603 PCI: 00:00.0: enabled 1
1491 12:48:13.882115 SPI: 00: enabled 1
1492 12:48:13.884463 PNP: 0c09.0: enabled 1
1493 12:48:13.887535 GENERIC: 0.0: enabled 0
1494 12:48:13.887975 USB2 port 0: enabled 1
1495 12:48:13.891068 USB2 port 1: enabled 1
1496 12:48:13.894164 USB2 port 2: enabled 1
1497 12:48:13.897684 USB2 port 3: enabled 1
1498 12:48:13.898101 USB2 port 4: enabled 0
1499 12:48:13.900999 USB2 port 5: enabled 1
1500 12:48:13.904202 USB2 port 6: enabled 0
1501 12:48:13.904722 USB2 port 7: enabled 1
1502 12:48:13.907318 USB3 port 0: enabled 1
1503 12:48:13.911192 USB3 port 1: enabled 1
1504 12:48:13.914199 USB3 port 2: enabled 1
1505 12:48:13.914670 USB3 port 3: enabled 1
1506 12:48:13.917215 APIC: 00: enabled 1
1507 12:48:13.917811 APIC: 02: enabled 1
1508 12:48:13.920707 PCI: 00:08.0: enabled 1
1509 12:48:13.927353 BS: BS_DEV_INIT run times (exec / console): 25 / 437 ms
1510 12:48:13.930766 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1511 12:48:13.933792 ELOG: NV offset 0xbfa000 size 0x1000
1512 12:48:13.942449 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1513 12:48:13.948715 ELOG: Event(17) added with size 13 at 2024-03-05 12:48:14 UTC
1514 12:48:13.955341 ELOG: Event(92) added with size 9 at 2024-03-05 12:48:14 UTC
1515 12:48:13.962279 ELOG: Event(93) added with size 9 at 2024-03-05 12:48:14 UTC
1516 12:48:13.968182 ELOG: Event(9E) added with size 10 at 2024-03-05 12:48:14 UTC
1517 12:48:13.974668 ELOG: Event(9F) added with size 14 at 2024-03-05 12:48:14 UTC
1518 12:48:13.981777 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1519 12:48:13.987799 ELOG: Event(A1) added with size 10 at 2024-03-05 12:48:14 UTC
1520 12:48:13.994717 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1521 12:48:14.001141 ELOG: Event(A0) added with size 9 at 2024-03-05 12:48:14 UTC
1522 12:48:14.004833 elog_add_boot_reason: Logged dev mode boot
1523 12:48:14.011239 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1524 12:48:14.011742 Finalize devices...
1525 12:48:14.014874 Devices finalized
1526 12:48:14.021500 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1527 12:48:14.024368 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1528 12:48:14.031483 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1529 12:48:14.034685 ME: HFSTS1 : 0x80030045
1530 12:48:14.037683 ME: HFSTS2 : 0x30280136
1531 12:48:14.043723 ME: HFSTS3 : 0x00000050
1532 12:48:14.047095 ME: HFSTS4 : 0x00004000
1533 12:48:14.050635 ME: HFSTS5 : 0x00000000
1534 12:48:14.054016 ME: HFSTS6 : 0x40400006
1535 12:48:14.057216 ME: Manufacturing Mode : NO
1536 12:48:14.060675 ME: FW Partition Table : OK
1537 12:48:14.064119 ME: Bringup Loader Failure : NO
1538 12:48:14.067291 ME: Firmware Init Complete : NO
1539 12:48:14.070520 ME: Boot Options Present : NO
1540 12:48:14.074037 ME: Update In Progress : NO
1541 12:48:14.076921 ME: D0i3 Support : YES
1542 12:48:14.080505 ME: Low Power State Enabled : NO
1543 12:48:14.083378 ME: CPU Replaced : YES
1544 12:48:14.090499 ME: CPU Replacement Valid : YES
1545 12:48:14.091012 ME: Current Working State : 5
1546 12:48:14.093629 ME: Current Operation State : 1
1547 12:48:14.097347 ME: Current Operation Mode : 3
1548 12:48:14.100577 ME: Error Code : 0
1549 12:48:14.103905 ME: CPU Debug Disabled : YES
1550 12:48:14.106585 ME: TXT Support : NO
1551 12:48:14.113700 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1552 12:48:14.119653 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1553 12:48:14.123034 ACPI: Writing ACPI tables at 76b27000.
1554 12:48:14.127216 ACPI: * FACS
1555 12:48:14.127740 ACPI: * DSDT
1556 12:48:14.129956 Ramoops buffer: 0x100000@0x76a26000.
1557 12:48:14.136459 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1558 12:48:14.139782 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1559 12:48:14.143161 Google Chrome EC: version:
1560 12:48:14.146588 ro: magolor_1.1.9999-103b6f9
1561 12:48:14.150253 rw: magolor_1.1.9999-103b6f9
1562 12:48:14.153460 running image: 1
1563 12:48:14.159495 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1564 12:48:14.162978 ACPI: * FADT
1565 12:48:14.163534 SCI is IRQ9
1566 12:48:14.166219 ACPI: added table 1/32, length now 40
1567 12:48:14.169887 ACPI: * SSDT
1568 12:48:14.172757 Found 1 CPU(s) with 2 core(s) each.
1569 12:48:14.176255 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1570 12:48:14.182884 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1571 12:48:14.186072 Could not locate 'wifi_sar' in VPD.
1572 12:48:14.189084 Checking CBFS for default SAR values
1573 12:48:14.195966 wifi_sar_defaults.hex has bad len in CBFS
1574 12:48:14.199061 failed from getting SAR limits!
1575 12:48:14.202861 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1576 12:48:14.206085 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1577 12:48:14.212272 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1578 12:48:14.215984 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1579 12:48:14.222647 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1580 12:48:14.225621 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1581 12:48:14.232355 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1582 12:48:14.239170 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1583 12:48:14.245481 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1584 12:48:14.248996 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1585 12:48:14.255474 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1586 12:48:14.262033 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1587 12:48:14.265572 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1588 12:48:14.272446 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1589 12:48:14.275605 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1590 12:48:14.282346 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1591 12:48:14.286007 PS2K: Passing 101 keymaps to kernel
1592 12:48:14.292422 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1593 12:48:14.299617 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1594 12:48:14.302491 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1595 12:48:14.308885 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1596 12:48:14.313016 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1597 12:48:14.319365 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1598 12:48:14.325882 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1599 12:48:14.332358 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1600 12:48:14.336017 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1601 12:48:14.342833 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1602 12:48:14.345632 ACPI: added table 2/32, length now 44
1603 12:48:14.348548 ACPI: * MCFG
1604 12:48:14.352445 ACPI: added table 3/32, length now 48
1605 12:48:14.352961 ACPI: * TPM2
1606 12:48:14.355098 TPM2 log created at 0x76a16000
1607 12:48:14.359122 ACPI: added table 4/32, length now 52
1608 12:48:14.362341 ACPI: * MADT
1609 12:48:14.362920 SCI is IRQ9
1610 12:48:14.365483 ACPI: added table 5/32, length now 56
1611 12:48:14.369009 current = 76b2d580
1612 12:48:14.371927 ACPI: * DMAR
1613 12:48:14.375936 ACPI: added table 6/32, length now 60
1614 12:48:14.378793 ACPI: added table 7/32, length now 64
1615 12:48:14.379213 ACPI: * HPET
1616 12:48:14.381974 ACPI: added table 8/32, length now 68
1617 12:48:14.385691 ACPI: done.
1618 12:48:14.389027 ACPI tables: 26304 bytes.
1619 12:48:14.391720 smbios_write_tables: 76a15000
1620 12:48:14.395207 EC returned error result code 3
1621 12:48:14.398314 Couldn't obtain OEM name from CBI
1622 12:48:14.402498 Create SMBIOS type 16
1623 12:48:14.403035 Create SMBIOS type 17
1624 12:48:14.405634 GENERIC: 0.0 (WIFI Device)
1625 12:48:14.408878 SMBIOS tables: 913 bytes.
1626 12:48:14.411809 Writing table forward entry at 0x00000500
1627 12:48:14.418503 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1628 12:48:14.421465 Writing coreboot table at 0x76b4b000
1629 12:48:14.428753 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1630 12:48:14.431905 1. 0000000000001000-000000000009ffff: RAM
1631 12:48:14.438376 2. 00000000000a0000-00000000000fffff: RESERVED
1632 12:48:14.441661 3. 0000000000100000-0000000076a14fff: RAM
1633 12:48:14.448341 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1634 12:48:14.451596 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1635 12:48:14.457960 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1636 12:48:14.464509 7. 0000000077000000-000000007fbfffff: RESERVED
1637 12:48:14.468042 8. 00000000c0000000-00000000cfffffff: RESERVED
1638 12:48:14.474731 9. 00000000fb000000-00000000fb000fff: RESERVED
1639 12:48:14.477822 10. 00000000fe000000-00000000fe00ffff: RESERVED
1640 12:48:14.481666 11. 00000000fea80000-00000000fea87fff: RESERVED
1641 12:48:14.488252 12. 00000000fed80000-00000000fed87fff: RESERVED
1642 12:48:14.491091 13. 00000000fed90000-00000000fed92fff: RESERVED
1643 12:48:14.497615 14. 00000000feda0000-00000000feda1fff: RESERVED
1644 12:48:14.501352 15. 0000000100000000-00000001803fffff: RAM
1645 12:48:14.504528 Passing 4 GPIOs to payload:
1646 12:48:14.507921 NAME | PORT | POLARITY | VALUE
1647 12:48:14.514497 lid | undefined | high | high
1648 12:48:14.521240 power | undefined | high | low
1649 12:48:14.524277 oprom | undefined | high | low
1650 12:48:14.531238 EC in RW | 0x000000b9 | high | low
1651 12:48:14.538126 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum 85b9
1652 12:48:14.541124 coreboot table: 1504 bytes.
1653 12:48:14.544343 IMD ROOT 0. 0x76fff000 0x00001000
1654 12:48:14.547298 IMD SMALL 1. 0x76ffe000 0x00001000
1655 12:48:14.550993 FSP MEMORY 2. 0x76c4e000 0x003b0000
1656 12:48:14.554629 CONSOLE 3. 0x76c2e000 0x00020000
1657 12:48:14.557612 FMAP 4. 0x76c2d000 0x00000578
1658 12:48:14.560985 TIME STAMP 5. 0x76c2c000 0x00000910
1659 12:48:14.564508 VBOOT WORK 6. 0x76c18000 0x00014000
1660 12:48:14.567232 ROMSTG STCK 7. 0x76c17000 0x00001000
1661 12:48:14.573645 AFTER CAR 8. 0x76c0d000 0x0000a000
1662 12:48:14.577307 RAMSTAGE 9. 0x76ba7000 0x00066000
1663 12:48:14.580278 REFCODE 10. 0x76b67000 0x00040000
1664 12:48:14.583661 SMM BACKUP 11. 0x76b57000 0x00010000
1665 12:48:14.587175 4f444749 12. 0x76b55000 0x00002000
1666 12:48:14.590692 EXT VBT13. 0x76b53000 0x00001c43
1667 12:48:14.594123 COREBOOT 14. 0x76b4b000 0x00008000
1668 12:48:14.597545 ACPI 15. 0x76b27000 0x00024000
1669 12:48:14.600864 ACPI GNVS 16. 0x76b26000 0x00001000
1670 12:48:14.606644 RAMOOPS 17. 0x76a26000 0x00100000
1671 12:48:14.610371 TPM2 TCGLOG18. 0x76a16000 0x00010000
1672 12:48:14.614082 SMBIOS 19. 0x76a15000 0x00000800
1673 12:48:14.614660 IMD small region:
1674 12:48:14.620441 IMD ROOT 0. 0x76ffec00 0x00000400
1675 12:48:14.623834 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1676 12:48:14.627141 VPD 2. 0x76ffeb60 0x0000006c
1677 12:48:14.630311 POWER STATE 3. 0x76ffeb20 0x00000040
1678 12:48:14.633520 ROMSTAGE 4. 0x76ffeb00 0x00000004
1679 12:48:14.639989 MEM INFO 5. 0x76ffe920 0x000001e0
1680 12:48:14.643798 BS: BS_WRITE_TABLES run times (exec / console): 7 / 517 ms
1681 12:48:14.647113 MTRR: Physical address space:
1682 12:48:14.653944 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1683 12:48:14.660472 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1684 12:48:14.666741 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1685 12:48:14.673117 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1686 12:48:14.679919 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1687 12:48:14.686960 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1688 12:48:14.689688 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1689 12:48:14.696455 MTRR: Fixed MSR 0x250 0x0606060606060606
1690 12:48:14.699803 MTRR: Fixed MSR 0x258 0x0606060606060606
1691 12:48:14.702724 MTRR: Fixed MSR 0x259 0x0000000000000000
1692 12:48:14.705944 MTRR: Fixed MSR 0x268 0x0606060606060606
1693 12:48:14.713431 MTRR: Fixed MSR 0x269 0x0606060606060606
1694 12:48:14.716583 MTRR: Fixed MSR 0x26a 0x0606060606060606
1695 12:48:14.719223 MTRR: Fixed MSR 0x26b 0x0606060606060606
1696 12:48:14.722874 MTRR: Fixed MSR 0x26c 0x0606060606060606
1697 12:48:14.729568 MTRR: Fixed MSR 0x26d 0x0606060606060606
1698 12:48:14.732490 MTRR: Fixed MSR 0x26e 0x0606060606060606
1699 12:48:14.736010 MTRR: Fixed MSR 0x26f 0x0606060606060606
1700 12:48:14.739854 call enable_fixed_mtrr()
1701 12:48:14.742993 CPU physical address size: 39 bits
1702 12:48:14.746853 MTRR: default type WB/UC MTRR counts: 6/5.
1703 12:48:14.749256 MTRR: UC selected as default type.
1704 12:48:14.755676 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1705 12:48:14.763080 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1706 12:48:14.769537 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1707 12:48:14.775432 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1708 12:48:14.782266 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1709 12:48:14.782736
1710 12:48:14.783068 MTRR check
1711 12:48:14.785487 Fixed MTRRs : Enabled
1712 12:48:14.788977 Variable MTRRs: Enabled
1713 12:48:14.789500
1714 12:48:14.792325 MTRR: Fixed MSR 0x250 0x0606060606060606
1715 12:48:14.795807 MTRR: Fixed MSR 0x258 0x0606060606060606
1716 12:48:14.802541 MTRR: Fixed MSR 0x259 0x0000000000000000
1717 12:48:14.805653 MTRR: Fixed MSR 0x268 0x0606060606060606
1718 12:48:14.809202 MTRR: Fixed MSR 0x269 0x0606060606060606
1719 12:48:14.812095 MTRR: Fixed MSR 0x26a 0x0606060606060606
1720 12:48:14.815746 MTRR: Fixed MSR 0x26b 0x0606060606060606
1721 12:48:14.821850 MTRR: Fixed MSR 0x26c 0x0606060606060606
1722 12:48:14.825242 MTRR: Fixed MSR 0x26d 0x0606060606060606
1723 12:48:14.828724 MTRR: Fixed MSR 0x26e 0x0606060606060606
1724 12:48:14.832458 MTRR: Fixed MSR 0x26f 0x0606060606060606
1725 12:48:14.839081 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1726 12:48:14.841925 call enable_fixed_mtrr()
1727 12:48:14.846069 Checking cr50 for pending updates
1728 12:48:14.849239 CPU physical address size: 39 bits
1729 12:48:14.852425 Reading cr50 TPM mode
1730 12:48:14.862424 BS: BS_PAYLOAD_LOAD entry times (exec / console): 12 / 6 ms
1731 12:48:14.869820 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1732 12:48:14.873032 Checking segment from ROM address 0xfff9d5b8
1733 12:48:14.879759 Checking segment from ROM address 0xfff9d5d4
1734 12:48:14.882987 Loading segment from ROM address 0xfff9d5b8
1735 12:48:14.886897 code (compression=0)
1736 12:48:14.893147 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1737 12:48:14.903204 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1738 12:48:14.906255 it's not compressed!
1739 12:48:15.032223 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1740 12:48:15.038100 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1741 12:48:15.045897 Loading segment from ROM address 0xfff9d5d4
1742 12:48:15.049161 Entry Point 0x30000000
1743 12:48:15.049638 Loaded segments
1744 12:48:15.056265 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms
1745 12:48:15.072961 Finalizing chipset.
1746 12:48:15.075589 Finalizing SMM.
1747 12:48:15.076063 APMC done.
1748 12:48:15.082601 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1749 12:48:15.085967 mp_park_aps done after 0 msecs.
1750 12:48:15.089191 Jumping to boot code at 0x30000000(0x76b4b000)
1751 12:48:15.098997 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1752 12:48:15.099577
1753 12:48:15.099949
1754 12:48:15.100289
1755 12:48:15.102236 Starting depthcharge on Magolor...
1756 12:48:15.102859
1757 12:48:15.103956 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1758 12:48:15.104497 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1759 12:48:15.104937 Setting prompt string to ['dedede:']
1760 12:48:15.105364 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1761 12:48:15.112675 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1762 12:48:15.113217
1763 12:48:15.118864 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1764 12:48:15.119519
1765 12:48:15.122188 fw_config match found: AUDIO_AMP=UNPROVISIONED
1766 12:48:15.122667
1767 12:48:15.125413 Wipe memory regions:
1768 12:48:15.125831
1769 12:48:15.128645 [0x00000000001000, 0x000000000a0000)
1770 12:48:15.129067
1771 12:48:15.131923 [0x00000000100000, 0x00000030000000)
1772 12:48:15.261449
1773 12:48:15.264740 [0x00000031062170, 0x00000076a15000)
1774 12:48:15.433514
1775 12:48:15.436615 [0x00000100000000, 0x00000180400000)
1776 12:48:16.498891
1777 12:48:16.499412 R8152: Initializing
1778 12:48:16.499753
1779 12:48:16.501959 Version 9 (ocp_data = 6010)
1780 12:48:16.502376
1781 12:48:16.505102 R8152: Done initializing
1782 12:48:16.505519
1783 12:48:16.508752 Adding net device
1784 12:48:16.509172
1785 12:48:16.512602 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1786 12:48:16.513130
1787 12:48:16.515027
1788 12:48:16.515447
1789 12:48:16.516235 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1791 12:48:16.617740 dedede: tftpboot 192.168.201.1 12948267/tftp-deploy-jerob31b/kernel/bzImage 12948267/tftp-deploy-jerob31b/kernel/cmdline 12948267/tftp-deploy-jerob31b/ramdisk/ramdisk.cpio.gz
1792 12:48:16.618441 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1793 12:48:16.618911 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1794 12:48:16.623273 tftpboot 192.168.201.1 12948267/tftp-deploy-jerob31b/kernel/bzIploy-jerob31b/kernel/cmdline 12948267/tftp-deploy-jerob31b/ramdisk/ramdisk.cpio.gz
1795 12:48:16.623763
1796 12:48:16.624124 Waiting for link
1797 12:48:16.825413
1798 12:48:16.825970 done.
1799 12:48:16.826556
1800 12:48:16.826925 MAC: 00:e0:4c:75:0d:b4
1801 12:48:16.827257
1802 12:48:16.828508 Sending DHCP discover... done.
1803 12:48:16.828978
1804 12:48:16.831883 Waiting for reply... done.
1805 12:48:16.832457
1806 12:48:16.834915 Sending DHCP request... done.
1807 12:48:16.835517
1808 12:48:16.842369 Waiting for reply... done.
1809 12:48:16.842954
1810 12:48:16.843313 My ip is 192.168.201.20
1811 12:48:16.843644
1812 12:48:16.845501 The DHCP server ip is 192.168.201.1
1813 12:48:16.846060
1814 12:48:16.851531 TFTP server IP predefined by user: 192.168.201.1
1815 12:48:16.851989
1816 12:48:16.858844 Bootfile predefined by user: 12948267/tftp-deploy-jerob31b/kernel/bzImage
1817 12:48:16.859409
1818 12:48:16.862318 Sending tftp read request... done.
1819 12:48:16.862937
1820 12:48:16.871064 Waiting for the transfer...
1821 12:48:16.871641
1822 12:48:17.193728 00000000 ################################################################
1823 12:48:17.193865
1824 12:48:17.496844 00080000 ################################################################
1825 12:48:17.496982
1826 12:48:17.765304 00100000 ################################################################
1827 12:48:17.765449
1828 12:48:18.032657 00180000 ################################################################
1829 12:48:18.032794
1830 12:48:18.301796 00200000 ################################################################
1831 12:48:18.301982
1832 12:48:18.593421 00280000 ################################################################
1833 12:48:18.593560
1834 12:48:18.874140 00300000 ################################################################
1835 12:48:18.874284
1836 12:48:19.172943 00380000 ################################################################
1837 12:48:19.173095
1838 12:48:19.447310 00400000 ################################################################
1839 12:48:19.447456
1840 12:48:19.705498 00480000 ################################################################
1841 12:48:19.705645
1842 12:48:19.987094 00500000 ################################################################
1843 12:48:19.987236
1844 12:48:20.265606 00580000 ################################################################
1845 12:48:20.265752
1846 12:48:20.567075 00600000 ################################################################
1847 12:48:20.567226
1848 12:48:20.835459 00680000 ################################################################
1849 12:48:20.835597
1850 12:48:21.094737 00700000 ################################################################
1851 12:48:21.094888
1852 12:48:21.393671 00780000 ################################################################
1853 12:48:21.393810
1854 12:48:21.680221 00800000 ################################################################
1855 12:48:21.680367
1856 12:48:21.931159 00880000 ######################################################## done.
1857 12:48:21.931304
1858 12:48:21.934933 The bootfile was 9367440 bytes long.
1859 12:48:21.935021
1860 12:48:21.938135 Sending tftp read request... done.
1861 12:48:21.941258
1862 12:48:21.941351 Waiting for the transfer...
1863 12:48:21.941426
1864 12:48:22.300725 00000000 ################################################################
1865 12:48:22.300873
1866 12:48:22.597493 00080000 ################################################################
1867 12:48:22.597640
1868 12:48:22.953566 00100000 ################################################################
1869 12:48:22.954085
1870 12:48:23.279244 00180000 ################################################################
1871 12:48:23.279394
1872 12:48:23.580611 00200000 ################################################################
1873 12:48:23.580755
1874 12:48:23.864127 00280000 ################################################################
1875 12:48:23.864276
1876 12:48:24.146613 00300000 ################################################################
1877 12:48:24.146762
1878 12:48:24.443922 00380000 ################################################################
1879 12:48:24.444086
1880 12:48:24.767504 00400000 ################################################################
1881 12:48:24.768011
1882 12:48:25.146851 00480000 ################################################################
1883 12:48:25.146993
1884 12:48:25.410008 00500000 ################################################################ done.
1885 12:48:25.410544
1886 12:48:25.413104 Sending tftp read request... done.
1887 12:48:25.413527
1888 12:48:25.416248 Waiting for the transfer...
1889 12:48:25.416672
1890 12:48:25.417002 00000000 # done.
1891 12:48:25.417319
1892 12:48:25.426882 Command line loaded dynamically from TFTP file: 12948267/tftp-deploy-jerob31b/kernel/cmdline
1893 12:48:25.427382
1894 12:48:25.452823 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12948267/extract-nfsrootfs-i6rbi_5e,tcp,hard ip=dhcp tftpserverip=192.168.201.1
1895 12:48:25.453364
1896 12:48:25.455883 ec_init: CrosEC protocol v3 supported (256, 256)
1897 12:48:25.462539
1898 12:48:25.465583 Shutting down all USB controllers.
1899 12:48:25.466001
1900 12:48:25.466371 Removing current net device
1901 12:48:25.466723
1902 12:48:25.468976 Finalizing coreboot
1903 12:48:25.469396
1904 12:48:25.475822 Exiting depthcharge with code 4 at timestamp: 17178742
1905 12:48:25.476310
1906 12:48:25.476643
1907 12:48:25.476952 Starting kernel ...
1908 12:48:25.477248
1909 12:48:25.477537
1910 12:48:25.478706 end: 2.2.4 bootloader-commands (duration 00:00:10) [common]
1911 12:48:25.479186 start: 2.2.5 auto-login-action (timeout 00:04:36) [common]
1912 12:48:25.479564 Setting prompt string to ['Linux version [0-9]']
1913 12:48:25.479911 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1914 12:48:25.480265 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1916 12:53:01.480112 end: 2.2.5 auto-login-action (duration 00:04:36) [common]
1918 12:53:01.481149 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 276 seconds'
1920 12:53:01.481914 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1923 12:53:01.483254 end: 2 depthcharge-action (duration 00:05:00) [common]
1925 12:53:01.484335 Cleaning after the job
1926 12:53:01.484645 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12948267/tftp-deploy-jerob31b/ramdisk
1927 12:53:01.485570 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12948267/tftp-deploy-jerob31b/kernel
1928 12:53:01.487028 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12948267/tftp-deploy-jerob31b/nfsrootfs
1929 12:53:01.562889 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12948267/tftp-deploy-jerob31b/modules
1930 12:53:01.563342 start: 5.1 power-off (timeout 00:00:30) [common]
1931 12:53:01.563509 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-3' '--port=1' '--command=off'
1932 12:53:01.637422 >> Command sent successfully.
1933 12:53:01.640140 Returned 0 in 0 seconds
1934 12:53:01.740972 end: 5.1 power-off (duration 00:00:00) [common]
1936 12:53:01.742464 start: 5.2 read-feedback (timeout 00:10:00) [common]
1937 12:53:01.743668 Listened to connection for namespace 'common' for up to 1s
1939 12:53:01.745016 Listened to connection for namespace 'common' for up to 1s
1940 12:53:02.744345 Finalising connection for namespace 'common'
1941 12:53:02.745015 Disconnecting from shell: Finalise
1942 12:53:02.745401
1943 12:53:02.846545 end: 5.2 read-feedback (duration 00:00:01) [common]
1944 12:53:02.847122 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12948267
1945 12:53:03.198159 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12948267
1946 12:53:03.198359 JobError: Your job cannot terminate cleanly.