Boot log: acer-cbv514-1h-34uz-brya
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 12:42:49.148178 lava-dispatcher, installed at version: 2024.01
2 12:42:49.148409 start: 0 validate
3 12:42:49.148577 Start time: 2024-03-05 12:42:49.148568+00:00 (UTC)
4 12:42:49.148747 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:42:49.148932 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20240129.0%2Famd64%2Finitrd.cpio.gz exists
6 12:42:49.408669 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:42:49.408836 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2247-g140bf69dc64d%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:42:49.673600 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:42:49.673808 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20240129.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:42:49.932160 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:42:49.932355 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2247-g140bf69dc64d%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 12:42:50.192070 validate duration: 1.04
14 12:42:50.192388 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:42:50.192493 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:42:50.192589 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:42:50.192732 Not decompressing ramdisk as can be used compressed.
18 12:42:50.192821 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20240129.0/amd64/initrd.cpio.gz
19 12:42:50.192885 saving as /var/lib/lava/dispatcher/tmp/12948314/tftp-deploy-rz6b3823/ramdisk/initrd.cpio.gz
20 12:42:50.192963 total size: 5431448 (5 MB)
21 12:42:50.194025 progress 0 % (0 MB)
22 12:42:50.195810 progress 5 % (0 MB)
23 12:42:50.197349 progress 10 % (0 MB)
24 12:42:50.198878 progress 15 % (0 MB)
25 12:42:50.200598 progress 20 % (1 MB)
26 12:42:50.202201 progress 25 % (1 MB)
27 12:42:50.203751 progress 30 % (1 MB)
28 12:42:50.205533 progress 35 % (1 MB)
29 12:42:50.207109 progress 40 % (2 MB)
30 12:42:50.208765 progress 45 % (2 MB)
31 12:42:50.210394 progress 50 % (2 MB)
32 12:42:50.212139 progress 55 % (2 MB)
33 12:42:50.213626 progress 60 % (3 MB)
34 12:42:50.215116 progress 65 % (3 MB)
35 12:42:50.216815 progress 70 % (3 MB)
36 12:42:50.218318 progress 75 % (3 MB)
37 12:42:50.219823 progress 80 % (4 MB)
38 12:42:50.221345 progress 85 % (4 MB)
39 12:42:50.223004 progress 90 % (4 MB)
40 12:42:50.224539 progress 95 % (4 MB)
41 12:42:50.226084 progress 100 % (5 MB)
42 12:42:50.226315 5 MB downloaded in 0.03 s (155.34 MB/s)
43 12:42:50.226483 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:42:50.226757 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:42:50.226847 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:42:50.226946 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:42:50.227091 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2247-g140bf69dc64d/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 12:42:50.227166 saving as /var/lib/lava/dispatcher/tmp/12948314/tftp-deploy-rz6b3823/kernel/bzImage
50 12:42:50.227229 total size: 9367440 (8 MB)
51 12:42:50.227300 No compression specified
52 12:42:50.228501 progress 0 % (0 MB)
53 12:42:50.231156 progress 5 % (0 MB)
54 12:42:50.233830 progress 10 % (0 MB)
55 12:42:50.236529 progress 15 % (1 MB)
56 12:42:50.239298 progress 20 % (1 MB)
57 12:42:50.241947 progress 25 % (2 MB)
58 12:42:50.244621 progress 30 % (2 MB)
59 12:42:50.247579 progress 35 % (3 MB)
60 12:42:50.250343 progress 40 % (3 MB)
61 12:42:50.253235 progress 45 % (4 MB)
62 12:42:50.256010 progress 50 % (4 MB)
63 12:42:50.258875 progress 55 % (4 MB)
64 12:42:50.261570 progress 60 % (5 MB)
65 12:42:50.264199 progress 65 % (5 MB)
66 12:42:50.266928 progress 70 % (6 MB)
67 12:42:50.269518 progress 75 % (6 MB)
68 12:42:50.272073 progress 80 % (7 MB)
69 12:42:50.274613 progress 85 % (7 MB)
70 12:42:50.277427 progress 90 % (8 MB)
71 12:42:50.280000 progress 95 % (8 MB)
72 12:42:50.282668 progress 100 % (8 MB)
73 12:42:50.282914 8 MB downloaded in 0.06 s (160.44 MB/s)
74 12:42:50.283073 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:42:50.283329 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:42:50.283469 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:42:50.283595 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:42:50.283780 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20240129.0/amd64/full.rootfs.tar.xz
80 12:42:50.283853 saving as /var/lib/lava/dispatcher/tmp/12948314/tftp-deploy-rz6b3823/nfsrootfs/full.rootfs.tar
81 12:42:50.283915 total size: 133429172 (127 MB)
82 12:42:50.283987 Using unxz to decompress xz
83 12:42:50.288393 progress 0 % (0 MB)
84 12:42:50.642542 progress 5 % (6 MB)
85 12:42:51.003421 progress 10 % (12 MB)
86 12:42:51.304194 progress 15 % (19 MB)
87 12:42:51.495463 progress 20 % (25 MB)
88 12:42:51.746390 progress 25 % (31 MB)
89 12:42:52.103392 progress 30 % (38 MB)
90 12:42:52.457283 progress 35 % (44 MB)
91 12:42:52.869226 progress 40 % (50 MB)
92 12:42:53.265558 progress 45 % (57 MB)
93 12:42:53.629370 progress 50 % (63 MB)
94 12:42:54.019460 progress 55 % (70 MB)
95 12:42:54.396180 progress 60 % (76 MB)
96 12:42:54.780001 progress 65 % (82 MB)
97 12:42:55.162336 progress 70 % (89 MB)
98 12:42:55.541456 progress 75 % (95 MB)
99 12:42:55.996148 progress 80 % (101 MB)
100 12:42:56.459090 progress 85 % (108 MB)
101 12:42:56.728618 progress 90 % (114 MB)
102 12:42:57.091411 progress 95 % (120 MB)
103 12:42:57.498384 progress 100 % (127 MB)
104 12:42:57.505006 127 MB downloaded in 7.22 s (17.62 MB/s)
105 12:42:57.505357 end: 1.3.1 http-download (duration 00:00:07) [common]
107 12:42:57.505795 end: 1.3 download-retry (duration 00:00:07) [common]
108 12:42:57.505936 start: 1.4 download-retry (timeout 00:09:53) [common]
109 12:42:57.506074 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 12:42:57.506273 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2247-g140bf69dc64d/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 12:42:57.506431 saving as /var/lib/lava/dispatcher/tmp/12948314/tftp-deploy-rz6b3823/modules/modules.tar
112 12:42:57.506502 total size: 251176 (0 MB)
113 12:42:57.506569 Using unxz to decompress xz
114 12:42:57.511570 progress 13 % (0 MB)
115 12:42:57.512039 progress 26 % (0 MB)
116 12:42:57.512322 progress 39 % (0 MB)
117 12:42:57.513908 progress 52 % (0 MB)
118 12:42:57.515866 progress 65 % (0 MB)
119 12:42:57.517620 progress 78 % (0 MB)
120 12:42:57.519550 progress 91 % (0 MB)
121 12:42:57.521386 progress 100 % (0 MB)
122 12:42:57.526826 0 MB downloaded in 0.02 s (11.79 MB/s)
123 12:42:57.527123 end: 1.4.1 http-download (duration 00:00:00) [common]
125 12:42:57.527602 end: 1.4 download-retry (duration 00:00:00) [common]
126 12:42:57.527735 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
127 12:42:57.527865 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
128 12:43:00.065916 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12948314/extract-nfsrootfs-hlbcjyow
129 12:43:00.066119 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
130 12:43:00.066225 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
131 12:43:00.066390 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12948314/lava-overlay-ureymn5i
132 12:43:00.066526 makedir: /var/lib/lava/dispatcher/tmp/12948314/lava-overlay-ureymn5i/lava-12948314/bin
133 12:43:00.066628 makedir: /var/lib/lava/dispatcher/tmp/12948314/lava-overlay-ureymn5i/lava-12948314/tests
134 12:43:00.066727 makedir: /var/lib/lava/dispatcher/tmp/12948314/lava-overlay-ureymn5i/lava-12948314/results
135 12:43:00.066829 Creating /var/lib/lava/dispatcher/tmp/12948314/lava-overlay-ureymn5i/lava-12948314/bin/lava-add-keys
136 12:43:00.066971 Creating /var/lib/lava/dispatcher/tmp/12948314/lava-overlay-ureymn5i/lava-12948314/bin/lava-add-sources
137 12:43:00.067103 Creating /var/lib/lava/dispatcher/tmp/12948314/lava-overlay-ureymn5i/lava-12948314/bin/lava-background-process-start
138 12:43:00.067233 Creating /var/lib/lava/dispatcher/tmp/12948314/lava-overlay-ureymn5i/lava-12948314/bin/lava-background-process-stop
139 12:43:00.067370 Creating /var/lib/lava/dispatcher/tmp/12948314/lava-overlay-ureymn5i/lava-12948314/bin/lava-common-functions
140 12:43:00.067499 Creating /var/lib/lava/dispatcher/tmp/12948314/lava-overlay-ureymn5i/lava-12948314/bin/lava-echo-ipv4
141 12:43:00.067626 Creating /var/lib/lava/dispatcher/tmp/12948314/lava-overlay-ureymn5i/lava-12948314/bin/lava-install-packages
142 12:43:00.067752 Creating /var/lib/lava/dispatcher/tmp/12948314/lava-overlay-ureymn5i/lava-12948314/bin/lava-installed-packages
143 12:43:00.067877 Creating /var/lib/lava/dispatcher/tmp/12948314/lava-overlay-ureymn5i/lava-12948314/bin/lava-os-build
144 12:43:00.068002 Creating /var/lib/lava/dispatcher/tmp/12948314/lava-overlay-ureymn5i/lava-12948314/bin/lava-probe-channel
145 12:43:00.068127 Creating /var/lib/lava/dispatcher/tmp/12948314/lava-overlay-ureymn5i/lava-12948314/bin/lava-probe-ip
146 12:43:00.068256 Creating /var/lib/lava/dispatcher/tmp/12948314/lava-overlay-ureymn5i/lava-12948314/bin/lava-target-ip
147 12:43:00.068382 Creating /var/lib/lava/dispatcher/tmp/12948314/lava-overlay-ureymn5i/lava-12948314/bin/lava-target-mac
148 12:43:00.068507 Creating /var/lib/lava/dispatcher/tmp/12948314/lava-overlay-ureymn5i/lava-12948314/bin/lava-target-storage
149 12:43:00.068642 Creating /var/lib/lava/dispatcher/tmp/12948314/lava-overlay-ureymn5i/lava-12948314/bin/lava-test-case
150 12:43:00.068769 Creating /var/lib/lava/dispatcher/tmp/12948314/lava-overlay-ureymn5i/lava-12948314/bin/lava-test-event
151 12:43:00.068895 Creating /var/lib/lava/dispatcher/tmp/12948314/lava-overlay-ureymn5i/lava-12948314/bin/lava-test-feedback
152 12:43:00.069058 Creating /var/lib/lava/dispatcher/tmp/12948314/lava-overlay-ureymn5i/lava-12948314/bin/lava-test-raise
153 12:43:00.069183 Creating /var/lib/lava/dispatcher/tmp/12948314/lava-overlay-ureymn5i/lava-12948314/bin/lava-test-reference
154 12:43:00.069312 Creating /var/lib/lava/dispatcher/tmp/12948314/lava-overlay-ureymn5i/lava-12948314/bin/lava-test-runner
155 12:43:00.069436 Creating /var/lib/lava/dispatcher/tmp/12948314/lava-overlay-ureymn5i/lava-12948314/bin/lava-test-set
156 12:43:00.069560 Creating /var/lib/lava/dispatcher/tmp/12948314/lava-overlay-ureymn5i/lava-12948314/bin/lava-test-shell
157 12:43:00.069686 Updating /var/lib/lava/dispatcher/tmp/12948314/lava-overlay-ureymn5i/lava-12948314/bin/lava-install-packages (oe)
158 12:43:00.069838 Updating /var/lib/lava/dispatcher/tmp/12948314/lava-overlay-ureymn5i/lava-12948314/bin/lava-installed-packages (oe)
159 12:43:00.069962 Creating /var/lib/lava/dispatcher/tmp/12948314/lava-overlay-ureymn5i/lava-12948314/environment
160 12:43:00.070059 LAVA metadata
161 12:43:00.070130 - LAVA_JOB_ID=12948314
162 12:43:00.070193 - LAVA_DISPATCHER_IP=192.168.201.1
163 12:43:00.070294 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
164 12:43:00.070361 skipped lava-vland-overlay
165 12:43:00.070435 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 12:43:00.070513 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
167 12:43:00.070574 skipped lava-multinode-overlay
168 12:43:00.070646 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 12:43:00.070724 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
170 12:43:00.070796 Loading test definitions
171 12:43:00.070881 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
172 12:43:00.070950 Using /lava-12948314 at stage 0
173 12:43:00.071262 uuid=12948314_1.5.2.3.1 testdef=None
174 12:43:00.071579 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 12:43:00.071671 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
176 12:43:00.072185 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 12:43:00.072405 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
179 12:43:00.073073 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 12:43:00.073300 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
182 12:43:00.073910 runner path: /var/lib/lava/dispatcher/tmp/12948314/lava-overlay-ureymn5i/lava-12948314/0/tests/0_dmesg test_uuid 12948314_1.5.2.3.1
183 12:43:00.074070 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 12:43:00.074294 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
186 12:43:00.074366 Using /lava-12948314 at stage 1
187 12:43:00.074664 uuid=12948314_1.5.2.3.5 testdef=None
188 12:43:00.074753 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 12:43:00.074837 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
190 12:43:00.075309 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 12:43:00.075569 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
193 12:43:00.076212 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 12:43:00.076438 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
196 12:43:00.077055 runner path: /var/lib/lava/dispatcher/tmp/12948314/lava-overlay-ureymn5i/lava-12948314/1/tests/1_bootrr test_uuid 12948314_1.5.2.3.5
197 12:43:00.077207 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 12:43:00.077465 Creating lava-test-runner.conf files
200 12:43:00.077529 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12948314/lava-overlay-ureymn5i/lava-12948314/0 for stage 0
201 12:43:00.077619 - 0_dmesg
202 12:43:00.077700 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12948314/lava-overlay-ureymn5i/lava-12948314/1 for stage 1
203 12:43:00.077791 - 1_bootrr
204 12:43:00.077887 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 12:43:00.077973 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
206 12:43:00.085393 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 12:43:00.085499 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
208 12:43:00.085584 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 12:43:00.085668 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 12:43:00.085752 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
211 12:43:00.226313 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 12:43:00.226718 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
213 12:43:00.226837 extracting modules file /var/lib/lava/dispatcher/tmp/12948314/tftp-deploy-rz6b3823/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12948314/extract-nfsrootfs-hlbcjyow
214 12:43:00.243310 extracting modules file /var/lib/lava/dispatcher/tmp/12948314/tftp-deploy-rz6b3823/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12948314/extract-overlay-ramdisk-ghl08d0o/ramdisk
215 12:43:00.256774 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 12:43:00.256905 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
217 12:43:00.256993 [common] Applying overlay to NFS
218 12:43:00.257068 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12948314/compress-overlay-k0knwk2p/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12948314/extract-nfsrootfs-hlbcjyow
219 12:43:00.265614 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 12:43:00.265725 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
221 12:43:00.265821 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 12:43:00.265907 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
223 12:43:00.265981 Building ramdisk /var/lib/lava/dispatcher/tmp/12948314/extract-overlay-ramdisk-ghl08d0o/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12948314/extract-overlay-ramdisk-ghl08d0o/ramdisk
224 12:43:00.334585 >> 26151 blocks
225 12:43:00.878958 rename /var/lib/lava/dispatcher/tmp/12948314/extract-overlay-ramdisk-ghl08d0o/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12948314/tftp-deploy-rz6b3823/ramdisk/ramdisk.cpio.gz
226 12:43:00.879456 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 12:43:00.879585 start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
228 12:43:00.879686 start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
229 12:43:00.879779 No mkimage arch provided, not using FIT.
230 12:43:00.879871 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 12:43:00.879959 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 12:43:00.880061 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 12:43:00.880157 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
234 12:43:00.880238 No LXC device requested
235 12:43:00.880318 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 12:43:00.880410 start: 1.7 deploy-device-env (timeout 00:09:49) [common]
237 12:43:00.880512 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 12:43:00.880593 Checking files for TFTP limit of 4294967296 bytes.
239 12:43:00.880993 end: 1 tftp-deploy (duration 00:00:11) [common]
240 12:43:00.881098 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 12:43:00.881195 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 12:43:00.881318 substitutions:
243 12:43:00.881384 - {DTB}: None
244 12:43:00.881447 - {INITRD}: 12948314/tftp-deploy-rz6b3823/ramdisk/ramdisk.cpio.gz
245 12:43:00.881507 - {KERNEL}: 12948314/tftp-deploy-rz6b3823/kernel/bzImage
246 12:43:00.881564 - {LAVA_MAC}: None
247 12:43:00.881626 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12948314/extract-nfsrootfs-hlbcjyow
248 12:43:00.881712 - {NFS_SERVER_IP}: 192.168.201.1
249 12:43:00.881770 - {PRESEED_CONFIG}: None
250 12:43:00.881868 - {PRESEED_LOCAL}: None
251 12:43:00.881926 - {RAMDISK}: 12948314/tftp-deploy-rz6b3823/ramdisk/ramdisk.cpio.gz
252 12:43:00.882015 - {ROOT_PART}: None
253 12:43:00.882074 - {ROOT}: None
254 12:43:00.882129 - {SERVER_IP}: 192.168.201.1
255 12:43:00.882183 - {TEE}: None
256 12:43:00.882237 Parsed boot commands:
257 12:43:00.882290 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 12:43:00.882469 Parsed boot commands: tftpboot 192.168.201.1 12948314/tftp-deploy-rz6b3823/kernel/bzImage 12948314/tftp-deploy-rz6b3823/kernel/cmdline 12948314/tftp-deploy-rz6b3823/ramdisk/ramdisk.cpio.gz
259 12:43:00.882558 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 12:43:00.882646 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 12:43:00.882739 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 12:43:00.882825 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 12:43:00.882894 Not connected, no need to disconnect.
264 12:43:00.882968 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 12:43:00.883052 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 12:43:00.883123 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-6'
267 12:43:00.887173 Setting prompt string to ['lava-test: # ']
268 12:43:00.887583 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 12:43:00.887701 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 12:43:00.887801 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 12:43:00.887891 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 12:43:00.888088 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-6' '--port=1' '--command=reboot'
273 12:43:06.014145 >> Command sent successfully.
274 12:43:06.016669 Returned 0 in 5 seconds
275 12:43:06.117487 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 12:43:06.118858 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 12:43:06.119389 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 12:43:06.120055 Setting prompt string to 'Starting depthcharge on Volmar...'
280 12:43:06.120441 Changing prompt to 'Starting depthcharge on Volmar...'
281 12:43:06.120809 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
282 12:43:06.122156 [Enter `^Ec?' for help]
283 12:43:07.496285
284 12:43:07.497005
285 12:43:07.503859 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
286 12:43:07.507724 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
287 12:43:07.510958 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
288 12:43:07.518572 CPU: AES supported, TXT NOT supported, VT supported
289 12:43:07.526098 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
290 12:43:07.526757 Cache size = 10 MiB
291 12:43:07.534418 MCH: device id 4609 (rev 04) is Alderlake-P
292 12:43:07.537822 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
293 12:43:07.542191 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
294 12:43:07.545140 VBOOT: Loading verstage.
295 12:43:07.549469 FMAP: Found "FLASH" version 1.1 at 0x1804000.
296 12:43:07.553492 FMAP: base = 0x0 size = 0x2000000 #areas = 37
297 12:43:07.560629 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
298 12:43:07.568535 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
299 12:43:07.576338 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
300 12:43:07.576795
301 12:43:07.577142
302 12:43:07.583110 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
303 12:43:07.591622 Probing TPM I2C: I2C bus 1 version 0x3230302a
304 12:43:07.595514 DW I2C bus 1 at 0xfe022000 (400 KHz)
305 12:43:07.599490 I2C TX abort detected (00000001)
306 12:43:07.602655 cr50_i2c_read: Address write failed
307 12:43:07.613746 .done! DID_VID 0x00281ae0
308 12:43:07.617429 TPM ready after 0 ms
309 12:43:07.621124 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
310 12:43:07.631127 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
311 12:43:07.637630 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
312 12:43:07.692547 tlcl_send_startup: Startup return code is 0
313 12:43:07.693050 TPM: setup succeeded
314 12:43:07.717113 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
315 12:43:07.738341 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
316 12:43:07.742305 Chrome EC: UHEPI supported
317 12:43:07.745610 Reading cr50 boot mode
318 12:43:07.761485 Cr50 says boot_mode is VERIFIED_RW(0x00).
319 12:43:07.761878 Phase 1
320 12:43:07.764324 FMAP: area GBB found @ 1805000 (458752 bytes)
321 12:43:07.775474 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
322 12:43:07.781989 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
323 12:43:07.788705 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
324 12:43:07.789001 Phase 2
325 12:43:07.789241 Phase 3
326 12:43:07.795522 FMAP: area GBB found @ 1805000 (458752 bytes)
327 12:43:07.799064 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
328 12:43:07.805244 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
329 12:43:07.808622 VB2:vb2_verify_keyblock() Checking keyblock signature...
330 12:43:07.815437 VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW
331 12:43:07.822758 VB2:vb2_verify_digest() HW RSA forbidden, using SW
332 12:43:07.826414 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
333 12:43:07.841762 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
334 12:43:07.845496 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
335 12:43:07.852257 VB2:vb2_verify_fw_preamble() Verifying preamble.
336 12:43:07.858504 VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW
337 12:43:07.861802 VB2:vb2_verify_digest() HW RSA forbidden, using SW
338 12:43:07.868684 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
339 12:43:07.872305 Phase 4
340 12:43:07.875632 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
341 12:43:07.881653 VB2:vb2api_init_hash() HW crypto forbidden by TPM flag, using SW
342 12:43:08.107820 VB2:vb2_verify_digest() HW RSA forbidden, using SW
343 12:43:08.114983 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
344 12:43:08.118151 Saving vboot hash.
345 12:43:08.124355 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
346 12:43:08.140493 tlcl_extend: response is 0
347 12:43:08.146941 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
348 12:43:08.153244 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
349 12:43:08.167854 tlcl_extend: response is 0
350 12:43:08.175048 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
351 12:43:08.194991 tlcl_lock_nv_write: response is 0
352 12:43:08.214236 tlcl_lock_nv_write: response is 0
353 12:43:08.214649 Slot A is selected
354 12:43:08.221032 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
355 12:43:08.227743 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
356 12:43:08.234027 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
357 12:43:08.240483 BS: verstage times (exec / console): total (unknown) / 253 ms
358 12:43:08.240990
359 12:43:08.241320
360 12:43:08.246987 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
361 12:43:08.251376 Google Chrome EC: version:
362 12:43:08.254360 ro: volmar_v2.0.14126-e605144e9c
363 12:43:08.258148 rw: volmar_v0.0.55-22d1557
364 12:43:08.261481 running image: 2
365 12:43:08.264737 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
366 12:43:08.274702 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
367 12:43:08.281413 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
368 12:43:08.288266 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
369 12:43:08.298172 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
370 12:43:08.307666 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
371 12:43:08.311163 EC took 941us to calculate image hash
372 12:43:08.320852 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
373 12:43:08.324113 VB2:sync_ec() select_rw=RW(active)
374 12:43:08.337530 Waited 275us to clear limit power flag.
375 12:43:08.340639 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
376 12:43:08.343825 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
377 12:43:08.347103 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
378 12:43:08.353645 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
379 12:43:08.357161 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
380 12:43:08.360105 TCO_STS: 0000 0000
381 12:43:08.363611 GEN_PMCON: d0015038 00002200
382 12:43:08.367093 GBLRST_CAUSE: 00000000 00000000
383 12:43:08.367592 HPR_CAUSE0: 00000000
384 12:43:08.370683 prev_sleep_state 5
385 12:43:08.374010 Abort disabling TXT, as CPU is not TXT capable.
386 12:43:08.381978 cse_lite: Number of partitions = 3
387 12:43:08.385206 cse_lite: Current partition = RO
388 12:43:08.385655 cse_lite: Next partition = RO
389 12:43:08.388561 cse_lite: Flags = 0x7
390 12:43:08.395054 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
391 12:43:08.405212 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
392 12:43:08.408590 FMAP: area SI_ME found @ 1000 (5238784 bytes)
393 12:43:08.415160 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
394 12:43:08.421863 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
395 12:43:08.428427 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
396 12:43:08.431740 cse_lite: CSE CBFS RW version : 16.1.25.2049
397 12:43:08.438248 cse_lite: Set Boot Partition Info Command (RW)
398 12:43:08.441691 HECI: Global Reset(Type:1) Command
399 12:43:09.875461 T supported
400 12:43:09.882203 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
401 12:43:09.885189 Cache size = 10 MiB
402 12:43:09.888951 MCH: device id 4609 (rev 04) is Alderlake-P
403 12:43:09.895711 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
404 12:43:09.898848 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
405 12:43:09.903222 VBOOT: Loading verstage.
406 12:43:09.906166 FMAP: Found "FLASH" version 1.1 at 0x1804000.
407 12:43:09.909588 FMAP: base = 0x0 size = 0x2000000 #areas = 37
408 12:43:09.916898 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
409 12:43:09.924117 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
410 12:43:09.930474 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
411 12:43:09.934330
412 12:43:09.934761
413 12:43:09.940907 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
414 12:43:09.948079 Probing TPM I2C: I2C bus 1 version 0x3230302a
415 12:43:09.951607 DW I2C bus 1 at 0xfe022000 (400 KHz)
416 12:43:09.954955 done! DID_VID 0x00281ae0
417 12:43:09.958233 TPM ready after 0 ms
418 12:43:09.962137 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
419 12:43:09.974143 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
420 12:43:09.977478 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
421 12:43:10.033691 tlcl_send_startup: Startup return code is 0
422 12:43:10.034285 TPM: setup succeeded
423 12:43:10.055262 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
424 12:43:10.075495 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
425 12:43:10.079287 Chrome EC: UHEPI supported
426 12:43:10.082529 Reading cr50 boot mode
427 12:43:10.097928 Cr50 says boot_mode is VERIFIED_RW(0x00).
428 12:43:10.098476 Phase 1
429 12:43:10.104272 FMAP: area GBB found @ 1805000 (458752 bytes)
430 12:43:10.111044 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
431 12:43:10.117421 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
432 12:43:10.123978 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
433 12:43:10.127584 Phase 2
434 12:43:10.128017 Phase 3
435 12:43:10.130488 FMAP: area GBB found @ 1805000 (458752 bytes)
436 12:43:10.137345 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
437 12:43:10.140391 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
438 12:43:10.147505 VB2:vb2_verify_keyblock() Checking keyblock signature...
439 12:43:10.154327 VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW
440 12:43:10.160815 VB2:vb2_verify_digest() HW RSA forbidden, using SW
441 12:43:10.164217 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
442 12:43:10.178182 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
443 12:43:10.181345 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
444 12:43:10.188560 VB2:vb2_verify_fw_preamble() Verifying preamble.
445 12:43:10.195211 VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW
446 12:43:10.198536 VB2:vb2_verify_digest() HW RSA forbidden, using SW
447 12:43:10.205131 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
448 12:43:10.209361 Phase 4
449 12:43:10.212515 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
450 12:43:10.219441 VB2:vb2api_init_hash() HW crypto forbidden by TPM flag, using SW
451 12:43:10.445434 VB2:vb2_verify_digest() HW RSA forbidden, using SW
452 12:43:10.451867 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
453 12:43:10.455684 Saving vboot hash.
454 12:43:10.461907 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
455 12:43:10.477873 tlcl_extend: response is 0
456 12:43:10.484380 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
457 12:43:10.490858 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
458 12:43:10.505264 tlcl_extend: response is 0
459 12:43:10.511875 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
460 12:43:10.532268 tlcl_lock_nv_write: response is 0
461 12:43:10.550989 tlcl_lock_nv_write: response is 0
462 12:43:10.551590 Slot A is selected
463 12:43:10.558105 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
464 12:43:10.563970 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
465 12:43:10.571063 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
466 12:43:10.577416 BS: verstage times (exec / console): total (unknown) / 246 ms
467 12:43:10.578041
468 12:43:10.578575
469 12:43:10.584549 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
470 12:43:10.588668 Google Chrome EC: version:
471 12:43:10.591877 ro: volmar_v2.0.14126-e605144e9c
472 12:43:10.594982 rw: volmar_v0.0.55-22d1557
473 12:43:10.598216 running image: 2
474 12:43:10.601788 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
475 12:43:10.611494 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
476 12:43:10.618416 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
477 12:43:10.625012 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
478 12:43:10.634654 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
479 12:43:10.644732 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
480 12:43:10.648518 EC took 1038us to calculate image hash
481 12:43:10.658644 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
482 12:43:10.661813 VB2:sync_ec() select_rw=RW(active)
483 12:43:10.677386 Waited 280us to clear limit power flag.
484 12:43:10.680653 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
485 12:43:10.683750 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
486 12:43:10.690696 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
487 12:43:10.693665 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
488 12:43:10.696962 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
489 12:43:10.700808 TCO_STS: 0000 0000
490 12:43:10.703392 GEN_PMCON: d1001038 00002200
491 12:43:10.706658 GBLRST_CAUSE: 00000040 00000000
492 12:43:10.707095 HPR_CAUSE0: 00000000
493 12:43:10.710837 prev_sleep_state 5
494 12:43:10.717341 Abort disabling TXT, as CPU is not TXT capable.
495 12:43:10.720600 cse_lite: Number of partitions = 3
496 12:43:10.723829 cse_lite: Current partition = RW
497 12:43:10.726954 cse_lite: Next partition = RW
498 12:43:10.730248 cse_lite: Flags = 0x7
499 12:43:10.736802 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
500 12:43:10.743325 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
501 12:43:10.750404 FMAP: area SI_ME found @ 1000 (5238784 bytes)
502 12:43:10.756820 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
503 12:43:10.763571 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
504 12:43:10.770005 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
505 12:43:10.773296 cse_lite: CSE CBFS RW version : 16.1.25.2049
506 12:43:10.776832 Boot Count incremented to 5577
507 12:43:10.783308 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
508 12:43:10.789784 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
509 12:43:10.802130 Probing TPM I2C: done! DID_VID 0x00281ae0
510 12:43:10.805942 Locality already claimed
511 12:43:10.808536 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
512 12:43:10.828549 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
513 12:43:10.835075 MRC: Hash idx 0x100d comparison successful.
514 12:43:10.837791 MRC cache found, size f6c8
515 12:43:10.838292 bootmode is set to: 2
516 12:43:10.841503 EC returned error result code 3
517 12:43:10.844959 FW_CONFIG value from CBI is 0x131
518 12:43:10.851521 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
519 12:43:10.854706 SPD index = 0
520 12:43:10.861581 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
521 12:43:10.862171 SPD: module type is LPDDR4X
522 12:43:10.868573 SPD: module part number is K4U6E3S4AB-MGCL
523 12:43:10.875085 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
524 12:43:10.878474 SPD: device width 16 bits, bus width 16 bits
525 12:43:10.881511 SPD: module size is 1024 MB (per channel)
526 12:43:10.952527 CBMEM:
527 12:43:10.955683 IMD: root @ 0x76fff000 254 entries.
528 12:43:10.958947 IMD: root @ 0x76ffec00 62 entries.
529 12:43:10.966550 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
530 12:43:10.970208 RO_VPD is uninitialized or empty.
531 12:43:10.973327 FMAP: area RW_VPD found @ f29000 (8192 bytes)
532 12:43:10.979739 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
533 12:43:10.983290 External stage cache:
534 12:43:10.986518 IMD: root @ 0x7bbff000 254 entries.
535 12:43:10.989770 IMD: root @ 0x7bbfec00 62 entries.
536 12:43:10.996480 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
537 12:43:11.003246 MRC: Checking cached data update for 'RW_MRC_CACHE'.
538 12:43:11.006453 MRC: 'RW_MRC_CACHE' does not need update.
539 12:43:11.006883 8 DIMMs found
540 12:43:11.010049 SMM Memory Map
541 12:43:11.013076 SMRAM : 0x7b800000 0x800000
542 12:43:11.016344 Subregion 0: 0x7b800000 0x200000
543 12:43:11.019788 Subregion 1: 0x7ba00000 0x200000
544 12:43:11.022999 Subregion 2: 0x7bc00000 0x400000
545 12:43:11.026205 top_of_ram = 0x77000000
546 12:43:11.030206 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
547 12:43:11.036378 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
548 12:43:11.042856 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
549 12:43:11.046344 MTRR Range: Start=ff000000 End=0 (Size 1000000)
550 12:43:11.046782 Normal boot
551 12:43:11.056827 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
552 12:43:11.063003 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
553 12:43:11.069624 Processing 237 relocs. Offset value of 0x74ab9000
554 12:43:11.078092 BS: romstage times (exec / console): total (unknown) / 377 ms
555 12:43:11.085349
556 12:43:11.085777
557 12:43:11.092093 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
558 12:43:11.092787 Normal boot
559 12:43:11.098529 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
560 12:43:11.105147 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
561 12:43:11.112002 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
562 12:43:11.121988 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
563 12:43:11.170195 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
564 12:43:11.176986 Processing 5931 relocs. Offset value of 0x72a2f000
565 12:43:11.180312 BS: postcar times (exec / console): total (unknown) / 51 ms
566 12:43:11.183622
567 12:43:11.184123
568 12:43:11.190007 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
569 12:43:11.193317 Reserving BERT start 76a1e000, size 10000
570 12:43:11.196867 Normal boot
571 12:43:11.200572 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
572 12:43:11.207137 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
573 12:43:11.217014 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
574 12:43:11.220314 FMAP: area RW_VPD found @ f29000 (8192 bytes)
575 12:43:11.222882 Google Chrome EC: version:
576 12:43:11.226471 ro: volmar_v2.0.14126-e605144e9c
577 12:43:11.230319 rw: volmar_v0.0.55-22d1557
578 12:43:11.230795 running image: 2
579 12:43:11.237219 ACPI _SWS is PM1 Index 8 GPE Index -1
580 12:43:11.241239 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
581 12:43:11.244484 EC returned error result code 3
582 12:43:11.247826 FW_CONFIG value from CBI is 0x131
583 12:43:11.254484 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
584 12:43:11.257814 PCI: 00:1c.2 disabled by fw_config
585 12:43:11.264433 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
586 12:43:11.267622 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
587 12:43:11.274418 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
588 12:43:11.277822 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
589 12:43:11.284027 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
590 12:43:11.290396 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
591 12:43:11.296740 microcode: sig=0x906a4 pf=0x80 revision=0x423
592 12:43:11.300081 microcode: Update skipped, already up-to-date
593 12:43:11.306782 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
594 12:43:11.339304 Detected 6 core, 8 thread CPU.
595 12:43:11.342547 Setting up SMI for CPU
596 12:43:11.345668 IED base = 0x7bc00000
597 12:43:11.345805 IED size = 0x00400000
598 12:43:11.348664 Will perform SMM setup.
599 12:43:11.352601 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
600 12:43:11.355366 LAPIC 0x0 in XAPIC mode.
601 12:43:11.365521 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
602 12:43:11.368985 Processing 18 relocs. Offset value of 0x00030000
603 12:43:11.373904 Attempting to start 7 APs
604 12:43:11.376572 Waiting for 10ms after sending INIT.
605 12:43:11.389643 Waiting for SIPI to complete...
606 12:43:11.393515 done.
607 12:43:11.393617 LAPIC 0x1 in XAPIC mode.
608 12:43:11.396321 LAPIC 0x10 in XAPIC mode.
609 12:43:11.400065 LAPIC 0x9 in XAPIC mode.
610 12:43:11.403199 LAPIC 0x16 in XAPIC mode.
611 12:43:11.406336 LAPIC 0x12 in XAPIC mode.
612 12:43:11.409683 AP: slot 3 apic_id 16, MCU rev: 0x00000423
613 12:43:11.412926 LAPIC 0x14 in XAPIC mode.
614 12:43:11.416166 AP: slot 4 apic_id 10, MCU rev: 0x00000423
615 12:43:11.419556 AP: slot 1 apic_id 12, MCU rev: 0x00000423
616 12:43:11.426130 AP: slot 2 apic_id 14, MCU rev: 0x00000423
617 12:43:11.429739 Waiting for SIPI to complete...
618 12:43:11.429857 done.
619 12:43:11.433218 AP: slot 7 apic_id 1, MCU rev: 0x00000423
620 12:43:11.436107 AP: slot 5 apic_id 9, MCU rev: 0x00000423
621 12:43:11.439623 LAPIC 0x8 in XAPIC mode.
622 12:43:11.442988 AP: slot 6 apic_id 8, MCU rev: 0x00000423
623 12:43:11.446650 smm_setup_relocation_handler: enter
624 12:43:11.449425 smm_setup_relocation_handler: exit
625 12:43:11.459452 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
626 12:43:11.462952 Processing 11 relocs. Offset value of 0x00038000
627 12:43:11.469793 smm_module_setup_stub: stack_top = 0x7b804000
628 12:43:11.473205 smm_module_setup_stub: per cpu stack_size = 0x800
629 12:43:11.479330 smm_module_setup_stub: runtime.start32_offset = 0x4c
630 12:43:11.482816 smm_module_setup_stub: runtime.smm_size = 0x10000
631 12:43:11.489210 SMM Module: stub loaded at 38000. Will call 0x76a52094
632 12:43:11.492717 Installing permanent SMM handler to 0x7b800000
633 12:43:11.499732 smm_load_module: total_smm_space_needed e468, available -> 200000
634 12:43:11.509315 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
635 12:43:11.512564 Processing 255 relocs. Offset value of 0x7b9f6000
636 12:43:11.519484 smm_load_module: smram_start: 0x7b800000
637 12:43:11.522557 smm_load_module: smram_end: 7ba00000
638 12:43:11.526063 smm_load_module: handler start 0x7b9f6d5f
639 12:43:11.529007 smm_load_module: handler_size 98d0
640 12:43:11.532300 smm_load_module: fxsave_area 0x7b9ff000
641 12:43:11.535706 smm_load_module: fxsave_size 1000
642 12:43:11.539288 smm_load_module: CONFIG_MSEG_SIZE 0x0
643 12:43:11.545686 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
644 12:43:11.552662 smm_load_module: handler_mod_params.smbase = 0x7b800000
645 12:43:11.556025 smm_load_module: per_cpu_save_state_size = 0x400
646 12:43:11.559654 smm_load_module: num_cpus = 0x8
647 12:43:11.566225 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
648 12:43:11.569021 smm_load_module: total_save_state_size = 0x2000
649 12:43:11.572386 smm_load_module: cpu0 entry: 7b9e6000
650 12:43:11.579253 smm_create_map: cpus allowed in one segment 30
651 12:43:11.582258 smm_create_map: min # of segments needed 1
652 12:43:11.582376 CPU 0x0
653 12:43:11.589315 smbase 7b9e6000 entry 7b9ee000
654 12:43:11.592293 ss_start 7b9f5c00 code_end 7b9ee208
655 12:43:11.592417 CPU 0x1
656 12:43:11.595484 smbase 7b9e5c00 entry 7b9edc00
657 12:43:11.602622 ss_start 7b9f5800 code_end 7b9ede08
658 12:43:11.602744 CPU 0x2
659 12:43:11.606100 smbase 7b9e5800 entry 7b9ed800
660 12:43:11.612204 ss_start 7b9f5400 code_end 7b9eda08
661 12:43:11.612403 CPU 0x3
662 12:43:11.615663 smbase 7b9e5400 entry 7b9ed400
663 12:43:11.619112 ss_start 7b9f5000 code_end 7b9ed608
664 12:43:11.622457 CPU 0x4
665 12:43:11.625737 smbase 7b9e5000 entry 7b9ed000
666 12:43:11.628950 ss_start 7b9f4c00 code_end 7b9ed208
667 12:43:11.629174 CPU 0x5
668 12:43:11.635608 smbase 7b9e4c00 entry 7b9ecc00
669 12:43:11.638853 ss_start 7b9f4800 code_end 7b9ece08
670 12:43:11.639238 CPU 0x6
671 12:43:11.642359 smbase 7b9e4800 entry 7b9ec800
672 12:43:11.649266 ss_start 7b9f4400 code_end 7b9eca08
673 12:43:11.649641 CPU 0x7
674 12:43:11.652044 smbase 7b9e4400 entry 7b9ec400
675 12:43:11.658928 ss_start 7b9f4000 code_end 7b9ec608
676 12:43:11.665963 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
677 12:43:11.668683 Processing 11 relocs. Offset value of 0x7b9ee000
678 12:43:11.675469 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
679 12:43:11.682617 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
680 12:43:11.688691 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
681 12:43:11.695250 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
682 12:43:11.702193 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
683 12:43:11.708690 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
684 12:43:11.715256 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
685 12:43:11.718608 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
686 12:43:11.725107 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
687 12:43:11.732032 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
688 12:43:11.738368 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
689 12:43:11.745174 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
690 12:43:11.751674 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
691 12:43:11.758455 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
692 12:43:11.765529 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
693 12:43:11.769030 smm_module_setup_stub: stack_top = 0x7b804000
694 12:43:11.775183 smm_module_setup_stub: per cpu stack_size = 0x800
695 12:43:11.778664 smm_module_setup_stub: runtime.start32_offset = 0x4c
696 12:43:11.784964 smm_module_setup_stub: runtime.smm_size = 0x200000
697 12:43:11.788447 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
698 12:43:11.793678 Clearing SMI status registers
699 12:43:11.797093 SMI_STS: PM1
700 12:43:11.797355 PM1_STS: WAK PWRBTN
701 12:43:11.807261 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
702 12:43:11.807641 In relocation handler: CPU 0
703 12:43:11.814103 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
704 12:43:11.817487 Writing SMRR. base = 0x7b800006, mask=0xff800c00
705 12:43:11.820653 Relocation complete.
706 12:43:11.827196 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
707 12:43:11.830669 In relocation handler: CPU 7
708 12:43:11.833419 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
709 12:43:11.836831 Relocation complete.
710 12:43:11.843545 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
711 12:43:11.846679 In relocation handler: CPU 2
712 12:43:11.850250 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
713 12:43:11.857022 Writing SMRR. base = 0x7b800006, mask=0xff800c00
714 12:43:11.857140 Relocation complete.
715 12:43:11.863605 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
716 12:43:11.866666 In relocation handler: CPU 4
717 12:43:11.870063 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
718 12:43:11.876979 Writing SMRR. base = 0x7b800006, mask=0xff800c00
719 12:43:11.880306 Relocation complete.
720 12:43:11.886564 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
721 12:43:11.890045 In relocation handler: CPU 1
722 12:43:11.893440 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
723 12:43:11.896945 Writing SMRR. base = 0x7b800006, mask=0xff800c00
724 12:43:11.900181 Relocation complete.
725 12:43:11.906330 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
726 12:43:11.909692 In relocation handler: CPU 3
727 12:43:11.913082 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
728 12:43:11.920059 Writing SMRR. base = 0x7b800006, mask=0xff800c00
729 12:43:11.920183 Relocation complete.
730 12:43:11.926960 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
731 12:43:11.930120 In relocation handler: CPU 6
732 12:43:11.936868 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
733 12:43:11.939882 Writing SMRR. base = 0x7b800006, mask=0xff800c00
734 12:43:11.943079 Relocation complete.
735 12:43:11.949827 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
736 12:43:11.953150 In relocation handler: CPU 5
737 12:43:11.956501 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
738 12:43:11.960181 Relocation complete.
739 12:43:11.960269 Initializing CPU #0
740 12:43:11.962975 CPU: vendor Intel device 906a4
741 12:43:11.966455 CPU: family 06, model 9a, stepping 04
742 12:43:11.969863 Clearing out pending MCEs
743 12:43:11.973118 cpu: energy policy set to 7
744 12:43:11.976662 Turbo is available but hidden
745 12:43:11.979670 Turbo is available and visible
746 12:43:11.982901 microcode: Update skipped, already up-to-date
747 12:43:11.986194 CPU #0 initialized
748 12:43:11.989661 Initializing CPU #7
749 12:43:11.989780 Initializing CPU #1
750 12:43:11.993018 Initializing CPU #3
751 12:43:11.993106 Initializing CPU #4
752 12:43:11.996500 Initializing CPU #2
753 12:43:11.999817 CPU: vendor Intel device 906a4
754 12:43:12.003225 CPU: family 06, model 9a, stepping 04
755 12:43:12.006541 Initializing CPU #6
756 12:43:12.009784 CPU: vendor Intel device 906a4
757 12:43:12.013054 CPU: family 06, model 9a, stepping 04
758 12:43:12.016377 Clearing out pending MCEs
759 12:43:12.016474 Clearing out pending MCEs
760 12:43:12.019968 Initializing CPU #5
761 12:43:12.022937 cpu: energy policy set to 7
762 12:43:12.026513 CPU: vendor Intel device 906a4
763 12:43:12.029455 CPU: family 06, model 9a, stepping 04
764 12:43:12.032951 cpu: energy policy set to 7
765 12:43:12.036314 microcode: Update skipped, already up-to-date
766 12:43:12.039842 CPU #1 initialized
767 12:43:12.043118 microcode: Update skipped, already up-to-date
768 12:43:12.046451 CPU #3 initialized
769 12:43:12.049678 CPU: vendor Intel device 906a4
770 12:43:12.052768 CPU: family 06, model 9a, stepping 04
771 12:43:12.056047 CPU: vendor Intel device 906a4
772 12:43:12.059856 CPU: family 06, model 9a, stepping 04
773 12:43:12.062950 Clearing out pending MCEs
774 12:43:12.063064 Clearing out pending MCEs
775 12:43:12.066240 cpu: energy policy set to 7
776 12:43:12.069295 cpu: energy policy set to 7
777 12:43:12.076074 microcode: Update skipped, already up-to-date
778 12:43:12.076201 CPU #4 initialized
779 12:43:12.082736 microcode: Update skipped, already up-to-date
780 12:43:12.082840 CPU #2 initialized
781 12:43:12.085911 Clearing out pending MCEs
782 12:43:12.089326 CPU: vendor Intel device 906a4
783 12:43:12.092593 CPU: family 06, model 9a, stepping 04
784 12:43:12.096060 cpu: energy policy set to 7
785 12:43:12.099666 CPU: vendor Intel device 906a4
786 12:43:12.102952 CPU: family 06, model 9a, stepping 04
787 12:43:12.105638 Clearing out pending MCEs
788 12:43:12.109313 Clearing out pending MCEs
789 12:43:12.109407 cpu: energy policy set to 7
790 12:43:12.115749 microcode: Update skipped, already up-to-date
791 12:43:12.115843 CPU #7 initialized
792 12:43:12.119036 cpu: energy policy set to 7
793 12:43:12.126133 microcode: Update skipped, already up-to-date
794 12:43:12.126248 CPU #5 initialized
795 12:43:12.132429 microcode: Update skipped, already up-to-date
796 12:43:12.132540 CPU #6 initialized
797 12:43:12.135768 bsp_do_flight_plan done after 704 msecs.
798 12:43:12.139130 CPU: frequency set to 4400 MHz
799 12:43:12.142484 Enabling SMIs.
800 12:43:12.148927 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms
801 12:43:12.164227 Probing TPM I2C: done! DID_VID 0x00281ae0
802 12:43:12.167551 Locality already claimed
803 12:43:12.170980 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
804 12:43:12.182420 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
805 12:43:12.185747 Enabling GPIO PM b/c CR50 has long IRQ pulse support
806 12:43:12.192068 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
807 12:43:12.198985 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
808 12:43:12.202203 Found a VBT of 9216 bytes after decompression
809 12:43:12.205369 PCI 1.0, PIN A, using IRQ #16
810 12:43:12.208789 PCI 2.0, PIN A, using IRQ #17
811 12:43:12.212304 PCI 4.0, PIN A, using IRQ #18
812 12:43:12.215619 PCI 5.0, PIN A, using IRQ #16
813 12:43:12.219095 PCI 6.0, PIN A, using IRQ #16
814 12:43:12.222239 PCI 6.2, PIN C, using IRQ #18
815 12:43:12.225694 PCI 7.0, PIN A, using IRQ #19
816 12:43:12.228506 PCI 7.1, PIN B, using IRQ #20
817 12:43:12.232124 PCI 7.2, PIN C, using IRQ #21
818 12:43:12.235554 PCI 7.3, PIN D, using IRQ #22
819 12:43:12.239123 PCI 8.0, PIN A, using IRQ #23
820 12:43:12.241937 PCI D.0, PIN A, using IRQ #17
821 12:43:12.245394 PCI D.1, PIN B, using IRQ #19
822 12:43:12.245529 PCI 10.0, PIN A, using IRQ #24
823 12:43:12.248937 PCI 10.1, PIN B, using IRQ #25
824 12:43:12.252395 PCI 10.6, PIN C, using IRQ #20
825 12:43:12.255127 PCI 10.7, PIN D, using IRQ #21
826 12:43:12.258622 PCI 11.0, PIN A, using IRQ #26
827 12:43:12.262167 PCI 11.1, PIN B, using IRQ #27
828 12:43:12.265655 PCI 11.2, PIN C, using IRQ #28
829 12:43:12.268438 PCI 11.3, PIN D, using IRQ #29
830 12:43:12.271853 PCI 12.0, PIN A, using IRQ #30
831 12:43:12.275328 PCI 12.6, PIN B, using IRQ #31
832 12:43:12.278698 PCI 12.7, PIN C, using IRQ #22
833 12:43:12.282079 PCI 13.0, PIN A, using IRQ #32
834 12:43:12.285106 PCI 13.1, PIN B, using IRQ #33
835 12:43:12.288356 PCI 13.2, PIN C, using IRQ #34
836 12:43:12.292059 PCI 13.3, PIN D, using IRQ #35
837 12:43:12.295221 PCI 14.0, PIN B, using IRQ #23
838 12:43:12.298841 PCI 14.1, PIN A, using IRQ #36
839 12:43:12.298958 PCI 14.3, PIN C, using IRQ #17
840 12:43:12.301743 PCI 15.0, PIN A, using IRQ #37
841 12:43:12.305291 PCI 15.1, PIN B, using IRQ #38
842 12:43:12.308524 PCI 15.2, PIN C, using IRQ #39
843 12:43:12.312081 PCI 15.3, PIN D, using IRQ #40
844 12:43:12.315107 PCI 16.0, PIN A, using IRQ #18
845 12:43:12.318607 PCI 16.1, PIN B, using IRQ #19
846 12:43:12.322045 PCI 16.2, PIN C, using IRQ #20
847 12:43:12.325408 PCI 16.3, PIN D, using IRQ #21
848 12:43:12.328514 PCI 16.4, PIN A, using IRQ #18
849 12:43:12.331811 PCI 16.5, PIN B, using IRQ #19
850 12:43:12.335168 PCI 17.0, PIN A, using IRQ #22
851 12:43:12.338529 PCI 19.0, PIN A, using IRQ #41
852 12:43:12.342003 PCI 19.1, PIN B, using IRQ #42
853 12:43:12.345366 PCI 19.2, PIN C, using IRQ #43
854 12:43:12.348137 PCI 1C.0, PIN A, using IRQ #16
855 12:43:12.351611 PCI 1C.1, PIN B, using IRQ #17
856 12:43:12.351727 PCI 1C.2, PIN C, using IRQ #18
857 12:43:12.355122 PCI 1C.3, PIN D, using IRQ #19
858 12:43:12.358637 PCI 1C.4, PIN A, using IRQ #16
859 12:43:12.361398 PCI 1C.5, PIN B, using IRQ #17
860 12:43:12.365317 PCI 1C.6, PIN C, using IRQ #18
861 12:43:12.368611 PCI 1C.7, PIN D, using IRQ #19
862 12:43:12.371390 PCI 1D.0, PIN A, using IRQ #16
863 12:43:12.374931 PCI 1D.1, PIN B, using IRQ #17
864 12:43:12.378412 PCI 1D.2, PIN C, using IRQ #18
865 12:43:12.381802 PCI 1D.3, PIN D, using IRQ #19
866 12:43:12.384605 PCI 1E.0, PIN A, using IRQ #23
867 12:43:12.388109 PCI 1E.1, PIN B, using IRQ #20
868 12:43:12.391647 PCI 1E.2, PIN C, using IRQ #44
869 12:43:12.394842 PCI 1E.3, PIN D, using IRQ #45
870 12:43:12.398135 PCI 1F.3, PIN B, using IRQ #22
871 12:43:12.401480 PCI 1F.4, PIN C, using IRQ #23
872 12:43:12.405041 PCI 1F.6, PIN D, using IRQ #20
873 12:43:12.405164 PCI 1F.7, PIN A, using IRQ #21
874 12:43:12.411786 IRQ: Using dynamically assigned PCI IO-APIC IRQs
875 12:43:12.418291 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
876 12:43:12.598059 FSPS returned 0
877 12:43:12.601547 Executing Phase 1 of FspMultiPhaseSiInit
878 12:43:12.611025 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
879 12:43:12.614866 port C0 DISC req: usage 1 usb3 1 usb2 1
880 12:43:12.617643 Raw Buffer output 0 00000111
881 12:43:12.621199 Raw Buffer output 1 00000000
882 12:43:12.625151 pmc_send_ipc_cmd succeeded
883 12:43:12.631758 port C1 DISC req: usage 1 usb3 3 usb2 3
884 12:43:12.631973 Raw Buffer output 0 00000331
885 12:43:12.635180 Raw Buffer output 1 00000000
886 12:43:12.639226 pmc_send_ipc_cmd succeeded
887 12:43:12.642508 Detected 6 core, 8 thread CPU.
888 12:43:12.646004 Detected 6 core, 8 thread CPU.
889 12:43:12.651463 Detected 6 core, 8 thread CPU.
890 12:43:12.654741 Detected 6 core, 8 thread CPU.
891 12:43:12.658081 Detected 6 core, 8 thread CPU.
892 12:43:12.661715 Detected 6 core, 8 thread CPU.
893 12:43:12.665005 Detected 6 core, 8 thread CPU.
894 12:43:12.668458 Detected 6 core, 8 thread CPU.
895 12:43:12.671125 Detected 6 core, 8 thread CPU.
896 12:43:12.674598 Detected 6 core, 8 thread CPU.
897 12:43:12.677906 Detected 6 core, 8 thread CPU.
898 12:43:12.681159 Detected 6 core, 8 thread CPU.
899 12:43:12.684837 Detected 6 core, 8 thread CPU.
900 12:43:12.687825 Detected 6 core, 8 thread CPU.
901 12:43:12.691296 Detected 6 core, 8 thread CPU.
902 12:43:12.694661 Detected 6 core, 8 thread CPU.
903 12:43:12.698235 Detected 6 core, 8 thread CPU.
904 12:43:12.701646 Detected 6 core, 8 thread CPU.
905 12:43:12.704543 Detected 6 core, 8 thread CPU.
906 12:43:12.708070 Detected 6 core, 8 thread CPU.
907 12:43:12.711637 Detected 6 core, 8 thread CPU.
908 12:43:12.714471 Detected 6 core, 8 thread CPU.
909 12:43:12.994346 Detected 6 core, 8 thread CPU.
910 12:43:12.997776 Detected 6 core, 8 thread CPU.
911 12:43:13.001128 Detected 6 core, 8 thread CPU.
912 12:43:13.004733 Detected 6 core, 8 thread CPU.
913 12:43:13.008021 Detected 6 core, 8 thread CPU.
914 12:43:13.011475 Detected 6 core, 8 thread CPU.
915 12:43:13.014930 Detected 6 core, 8 thread CPU.
916 12:43:13.017685 Detected 6 core, 8 thread CPU.
917 12:43:13.021084 Detected 6 core, 8 thread CPU.
918 12:43:13.024458 Detected 6 core, 8 thread CPU.
919 12:43:13.027505 Detected 6 core, 8 thread CPU.
920 12:43:13.031009 Detected 6 core, 8 thread CPU.
921 12:43:13.034632 Detected 6 core, 8 thread CPU.
922 12:43:13.037989 Detected 6 core, 8 thread CPU.
923 12:43:13.040783 Detected 6 core, 8 thread CPU.
924 12:43:13.044359 Detected 6 core, 8 thread CPU.
925 12:43:13.047622 Detected 6 core, 8 thread CPU.
926 12:43:13.050924 Detected 6 core, 8 thread CPU.
927 12:43:13.054013 Detected 6 core, 8 thread CPU.
928 12:43:13.057814 Detected 6 core, 8 thread CPU.
929 12:43:13.061221 Display FSP Version Info HOB
930 12:43:13.064475 Reference Code - CPU = c.0.65.70
931 12:43:13.064845 uCode Version = 0.0.4.23
932 12:43:13.067935 TXT ACM version = ff.ff.ff.ffff
933 12:43:13.070675 Reference Code - ME = c.0.65.70
934 12:43:13.074086 MEBx version = 0.0.0.0
935 12:43:13.077616 ME Firmware Version = Lite SKU
936 12:43:13.081148 Reference Code - PCH = c.0.65.70
937 12:43:13.084576 PCH-CRID Status = Disabled
938 12:43:13.087926 PCH-CRID Original Value = ff.ff.ff.ffff
939 12:43:13.091286 PCH-CRID New Value = ff.ff.ff.ffff
940 12:43:13.094547 OPROM - RST - RAID = ff.ff.ff.ffff
941 12:43:13.097399 PCH Hsio Version = 4.0.0.0
942 12:43:13.100874 Reference Code - SA - System Agent = c.0.65.70
943 12:43:13.104222 Reference Code - MRC = 0.0.3.80
944 12:43:13.107435 SA - PCIe Version = c.0.65.70
945 12:43:13.110568 SA-CRID Status = Disabled
946 12:43:13.113976 SA-CRID Original Value = 0.0.0.4
947 12:43:13.117578 SA-CRID New Value = 0.0.0.4
948 12:43:13.121063 OPROM - VBIOS = ff.ff.ff.ffff
949 12:43:13.124620 IO Manageability Engine FW Version = 24.0.4.0
950 12:43:13.127168 PHY Build Version = 0.0.0.2016
951 12:43:13.130554 Thunderbolt(TM) FW Version = 0.0.0.0
952 12:43:13.137271 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
953 12:43:13.143661 BS: BS_DEV_INIT_CHIPS run times (exec / console): 481 / 507 ms
954 12:43:13.147238 Enumerating buses...
955 12:43:13.150347 Show all devs... Before device enumeration.
956 12:43:13.153932 Root Device: enabled 1
957 12:43:13.154245 CPU_CLUSTER: 0: enabled 1
958 12:43:13.157391 DOMAIN: 0000: enabled 1
959 12:43:13.160744 GPIO: 0: enabled 1
960 12:43:13.163949 PCI: 00:00.0: enabled 1
961 12:43:13.164231 PCI: 00:01.0: enabled 0
962 12:43:13.167188 PCI: 00:01.1: enabled 0
963 12:43:13.170376 PCI: 00:02.0: enabled 1
964 12:43:13.170686 PCI: 00:04.0: enabled 1
965 12:43:13.174266 PCI: 00:05.0: enabled 0
966 12:43:13.178624 PCI: 00:06.0: enabled 1
967 12:43:13.180394 PCI: 00:06.2: enabled 0
968 12:43:13.180763 PCI: 00:07.0: enabled 0
969 12:43:13.183678 PCI: 00:07.1: enabled 0
970 12:43:13.186960 PCI: 00:07.2: enabled 0
971 12:43:13.190386 PCI: 00:07.3: enabled 0
972 12:43:13.190755 PCI: 00:08.0: enabled 0
973 12:43:13.193849 PCI: 00:09.0: enabled 0
974 12:43:13.197207 PCI: 00:0a.0: enabled 1
975 12:43:13.200602 PCI: 00:0d.0: enabled 1
976 12:43:13.200904 PCI: 00:0d.1: enabled 0
977 12:43:13.203446 PCI: 00:0d.2: enabled 0
978 12:43:13.206906 PCI: 00:0d.3: enabled 0
979 12:43:13.210281 PCI: 00:0e.0: enabled 0
980 12:43:13.210573 PCI: 00:10.0: enabled 0
981 12:43:13.213435 PCI: 00:10.1: enabled 0
982 12:43:13.217401 PCI: 00:10.6: enabled 0
983 12:43:13.217781 PCI: 00:10.7: enabled 0
984 12:43:13.220237 PCI: 00:12.0: enabled 0
985 12:43:13.223660 PCI: 00:12.6: enabled 0
986 12:43:13.227060 PCI: 00:12.7: enabled 0
987 12:43:13.227496 PCI: 00:13.0: enabled 0
988 12:43:13.230540 PCI: 00:14.0: enabled 1
989 12:43:13.233265 PCI: 00:14.1: enabled 0
990 12:43:13.236847 PCI: 00:14.2: enabled 1
991 12:43:13.237204 PCI: 00:14.3: enabled 1
992 12:43:13.240235 PCI: 00:15.0: enabled 1
993 12:43:13.243745 PCI: 00:15.1: enabled 1
994 12:43:13.247125 PCI: 00:15.2: enabled 0
995 12:43:13.247530 PCI: 00:15.3: enabled 1
996 12:43:13.250378 PCI: 00:16.0: enabled 1
997 12:43:13.253679 PCI: 00:16.1: enabled 0
998 12:43:13.254142 PCI: 00:16.2: enabled 0
999 12:43:13.256769 PCI: 00:16.3: enabled 0
1000 12:43:13.260428 PCI: 00:16.4: enabled 0
1001 12:43:13.263441 PCI: 00:16.5: enabled 0
1002 12:43:13.263878 PCI: 00:17.0: enabled 1
1003 12:43:13.267176 PCI: 00:19.0: enabled 0
1004 12:43:13.270501 PCI: 00:19.1: enabled 1
1005 12:43:13.273720 PCI: 00:19.2: enabled 0
1006 12:43:13.274006 PCI: 00:1a.0: enabled 0
1007 12:43:13.277123 PCI: 00:1c.0: enabled 0
1008 12:43:13.280267 PCI: 00:1c.1: enabled 0
1009 12:43:13.283801 PCI: 00:1c.2: enabled 0
1010 12:43:13.284178 PCI: 00:1c.3: enabled 0
1011 12:43:13.286892 PCI: 00:1c.4: enabled 0
1012 12:43:13.290096 PCI: 00:1c.5: enabled 0
1013 12:43:13.290508 PCI: 00:1c.6: enabled 0
1014 12:43:13.293837 PCI: 00:1c.7: enabled 0
1015 12:43:13.296826 PCI: 00:1d.0: enabled 0
1016 12:43:13.300219 PCI: 00:1d.1: enabled 0
1017 12:43:13.300495 PCI: 00:1d.2: enabled 0
1018 12:43:13.303564 PCI: 00:1d.3: enabled 0
1019 12:43:13.307002 PCI: 00:1e.0: enabled 1
1020 12:43:13.310242 PCI: 00:1e.1: enabled 0
1021 12:43:13.310531 PCI: 00:1e.2: enabled 0
1022 12:43:13.313643 PCI: 00:1e.3: enabled 1
1023 12:43:13.317113 PCI: 00:1f.0: enabled 1
1024 12:43:13.320251 PCI: 00:1f.1: enabled 0
1025 12:43:13.320634 PCI: 00:1f.2: enabled 1
1026 12:43:13.323631 PCI: 00:1f.3: enabled 1
1027 12:43:13.327078 PCI: 00:1f.4: enabled 0
1028 12:43:13.327394 PCI: 00:1f.5: enabled 1
1029 12:43:13.329787 PCI: 00:1f.6: enabled 0
1030 12:43:13.333120 PCI: 00:1f.7: enabled 0
1031 12:43:13.336662 GENERIC: 0.0: enabled 1
1032 12:43:13.337048 GENERIC: 0.0: enabled 1
1033 12:43:13.340073 GENERIC: 1.0: enabled 1
1034 12:43:13.343546 GENERIC: 0.0: enabled 1
1035 12:43:13.346808 GENERIC: 1.0: enabled 1
1036 12:43:13.347393 USB0 port 0: enabled 1
1037 12:43:13.350279 USB0 port 0: enabled 1
1038 12:43:13.353109 GENERIC: 0.0: enabled 1
1039 12:43:13.353477 I2C: 00:1a: enabled 1
1040 12:43:13.356399 I2C: 00:31: enabled 1
1041 12:43:13.359710 I2C: 00:32: enabled 1
1042 12:43:13.360167 I2C: 00:50: enabled 1
1043 12:43:13.363005 I2C: 00:10: enabled 1
1044 12:43:13.366335 I2C: 00:15: enabled 1
1045 12:43:13.370207 I2C: 00:2c: enabled 1
1046 12:43:13.370674 GENERIC: 0.0: enabled 1
1047 12:43:13.373329 SPI: 00: enabled 1
1048 12:43:13.376685 PNP: 0c09.0: enabled 1
1049 12:43:13.377112 GENERIC: 0.0: enabled 1
1050 12:43:13.380384 USB3 port 0: enabled 1
1051 12:43:13.382988 USB3 port 1: enabled 0
1052 12:43:13.383373 USB3 port 2: enabled 1
1053 12:43:13.387001 USB3 port 3: enabled 0
1054 12:43:13.389564 USB2 port 0: enabled 1
1055 12:43:13.393457 USB2 port 1: enabled 0
1056 12:43:13.393822 USB2 port 2: enabled 1
1057 12:43:13.396316 USB2 port 3: enabled 0
1058 12:43:13.399844 USB2 port 4: enabled 0
1059 12:43:13.400119 USB2 port 5: enabled 1
1060 12:43:13.402893 USB2 port 6: enabled 0
1061 12:43:13.406540 USB2 port 7: enabled 0
1062 12:43:13.406624 USB2 port 8: enabled 1
1063 12:43:13.409621 USB2 port 9: enabled 1
1064 12:43:13.412724 USB3 port 0: enabled 1
1065 12:43:13.416503 USB3 port 1: enabled 0
1066 12:43:13.416588 USB3 port 2: enabled 0
1067 12:43:13.419846 USB3 port 3: enabled 0
1068 12:43:13.422886 GENERIC: 0.0: enabled 1
1069 12:43:13.422985 GENERIC: 1.0: enabled 1
1070 12:43:13.426034 APIC: 00: enabled 1
1071 12:43:13.429978 APIC: 12: enabled 1
1072 12:43:13.430093 APIC: 14: enabled 1
1073 12:43:13.432760 APIC: 16: enabled 1
1074 12:43:13.436405 APIC: 10: enabled 1
1075 12:43:13.436519 APIC: 09: enabled 1
1076 12:43:13.439791 APIC: 08: enabled 1
1077 12:43:13.439899 APIC: 01: enabled 1
1078 12:43:13.443251 Compare with tree...
1079 12:43:13.446064 Root Device: enabled 1
1080 12:43:13.449635 CPU_CLUSTER: 0: enabled 1
1081 12:43:13.449724 APIC: 00: enabled 1
1082 12:43:13.453070 APIC: 12: enabled 1
1083 12:43:13.456551 APIC: 14: enabled 1
1084 12:43:13.456664 APIC: 16: enabled 1
1085 12:43:13.459461 APIC: 10: enabled 1
1086 12:43:13.462695 APIC: 09: enabled 1
1087 12:43:13.462797 APIC: 08: enabled 1
1088 12:43:13.466186 APIC: 01: enabled 1
1089 12:43:13.469743 DOMAIN: 0000: enabled 1
1090 12:43:13.469827 GPIO: 0: enabled 1
1091 12:43:13.472670 PCI: 00:00.0: enabled 1
1092 12:43:13.476045 PCI: 00:01.0: enabled 0
1093 12:43:13.479583 PCI: 00:01.1: enabled 0
1094 12:43:13.483021 PCI: 00:02.0: enabled 1
1095 12:43:13.483105 PCI: 00:04.0: enabled 1
1096 12:43:13.486229 GENERIC: 0.0: enabled 1
1097 12:43:13.489403 PCI: 00:05.0: enabled 0
1098 12:43:13.492731 PCI: 00:06.0: enabled 1
1099 12:43:13.492814 PCI: 00:06.2: enabled 0
1100 12:43:13.496051 PCI: 00:08.0: enabled 0
1101 12:43:13.499497 PCI: 00:09.0: enabled 0
1102 12:43:13.503084 PCI: 00:0a.0: enabled 1
1103 12:43:13.506339 PCI: 00:0d.0: enabled 1
1104 12:43:13.506424 USB0 port 0: enabled 1
1105 12:43:13.509660 USB3 port 0: enabled 1
1106 12:43:13.513261 USB3 port 1: enabled 0
1107 12:43:13.516628 USB3 port 2: enabled 1
1108 12:43:13.520069 USB3 port 3: enabled 0
1109 12:43:13.522726 PCI: 00:0d.1: enabled 0
1110 12:43:13.522811 PCI: 00:0d.2: enabled 0
1111 12:43:13.525998 PCI: 00:0d.3: enabled 0
1112 12:43:13.529544 PCI: 00:0e.0: enabled 0
1113 12:43:13.532672 PCI: 00:10.0: enabled 0
1114 12:43:13.536015 PCI: 00:10.1: enabled 0
1115 12:43:13.536099 PCI: 00:10.6: enabled 0
1116 12:43:13.539323 PCI: 00:10.7: enabled 0
1117 12:43:13.542643 PCI: 00:12.0: enabled 0
1118 12:43:13.546323 PCI: 00:12.6: enabled 0
1119 12:43:13.546407 PCI: 00:12.7: enabled 0
1120 12:43:13.549800 PCI: 00:13.0: enabled 0
1121 12:43:13.552588 PCI: 00:14.0: enabled 1
1122 12:43:13.556031 USB0 port 0: enabled 1
1123 12:43:13.559639 USB2 port 0: enabled 1
1124 12:43:13.559722 USB2 port 1: enabled 0
1125 12:43:13.562996 USB2 port 2: enabled 1
1126 12:43:13.566430 USB2 port 3: enabled 0
1127 12:43:13.569257 USB2 port 4: enabled 0
1128 12:43:13.572558 USB2 port 5: enabled 1
1129 12:43:13.576177 USB2 port 6: enabled 0
1130 12:43:13.576260 USB2 port 7: enabled 0
1131 12:43:13.579533 USB2 port 8: enabled 1
1132 12:43:13.582970 USB2 port 9: enabled 1
1133 12:43:13.585842 USB3 port 0: enabled 1
1134 12:43:13.589198 USB3 port 1: enabled 0
1135 12:43:13.592693 USB3 port 2: enabled 0
1136 12:43:13.592775 USB3 port 3: enabled 0
1137 12:43:13.596213 PCI: 00:14.1: enabled 0
1138 12:43:13.599590 PCI: 00:14.2: enabled 1
1139 12:43:13.602822 PCI: 00:14.3: enabled 1
1140 12:43:13.606089 GENERIC: 0.0: enabled 1
1141 12:43:13.606177 PCI: 00:15.0: enabled 1
1142 12:43:13.609051 I2C: 00:1a: enabled 1
1143 12:43:13.612590 I2C: 00:31: enabled 1
1144 12:43:13.615906 I2C: 00:32: enabled 1
1145 12:43:13.615989 PCI: 00:15.1: enabled 1
1146 12:43:13.619174 I2C: 00:50: enabled 1
1147 12:43:13.622495 PCI: 00:15.2: enabled 0
1148 12:43:13.625650 PCI: 00:15.3: enabled 1
1149 12:43:13.629097 I2C: 00:10: enabled 1
1150 12:43:13.629181 PCI: 00:16.0: enabled 1
1151 12:43:13.632502 PCI: 00:16.1: enabled 0
1152 12:43:13.636112 PCI: 00:16.2: enabled 0
1153 12:43:13.639441 PCI: 00:16.3: enabled 0
1154 12:43:13.642835 PCI: 00:16.4: enabled 0
1155 12:43:13.642917 PCI: 00:16.5: enabled 0
1156 12:43:13.645633 PCI: 00:17.0: enabled 1
1157 12:43:13.648958 PCI: 00:19.0: enabled 0
1158 12:43:13.652792 PCI: 00:19.1: enabled 1
1159 12:43:13.652874 I2C: 00:15: enabled 1
1160 12:43:13.655981 I2C: 00:2c: enabled 1
1161 12:43:13.659266 PCI: 00:19.2: enabled 0
1162 12:43:13.662191 PCI: 00:1a.0: enabled 0
1163 12:43:13.665977 PCI: 00:1e.0: enabled 1
1164 12:43:13.666062 PCI: 00:1e.1: enabled 0
1165 12:43:13.669000 PCI: 00:1e.2: enabled 0
1166 12:43:13.672206 PCI: 00:1e.3: enabled 1
1167 12:43:13.675696 SPI: 00: enabled 1
1168 12:43:13.675779 PCI: 00:1f.0: enabled 1
1169 12:43:13.679299 PNP: 0c09.0: enabled 1
1170 12:43:13.682211 PCI: 00:1f.1: enabled 0
1171 12:43:13.685815 PCI: 00:1f.2: enabled 1
1172 12:43:13.689279 GENERIC: 0.0: enabled 1
1173 12:43:13.692083 GENERIC: 0.0: enabled 1
1174 12:43:13.692165 GENERIC: 1.0: enabled 1
1175 12:43:13.695640 PCI: 00:1f.3: enabled 1
1176 12:43:13.699184 PCI: 00:1f.4: enabled 0
1177 12:43:13.701970 PCI: 00:1f.5: enabled 1
1178 12:43:13.705278 PCI: 00:1f.6: enabled 0
1179 12:43:13.705388 PCI: 00:1f.7: enabled 0
1180 12:43:13.708787 Root Device scanning...
1181 12:43:13.712057 scan_static_bus for Root Device
1182 12:43:13.715323 CPU_CLUSTER: 0 enabled
1183 12:43:13.715425 DOMAIN: 0000 enabled
1184 12:43:13.718739 DOMAIN: 0000 scanning...
1185 12:43:13.721904 PCI: pci_scan_bus for bus 00
1186 12:43:13.725946 PCI: 00:00.0 [8086/0000] ops
1187 12:43:13.729117 PCI: 00:00.0 [8086/4609] enabled
1188 12:43:13.732179 PCI: 00:02.0 [8086/0000] bus ops
1189 12:43:13.735576 PCI: 00:02.0 [8086/46b3] enabled
1190 12:43:13.739209 PCI: 00:04.0 [8086/0000] bus ops
1191 12:43:13.742268 PCI: 00:04.0 [8086/461d] enabled
1192 12:43:13.745858 PCI: 00:06.0 [8086/0000] bus ops
1193 12:43:13.748870 PCI: 00:06.0 [8086/464d] enabled
1194 12:43:13.752376 PCI: 00:08.0 [8086/464f] disabled
1195 12:43:13.755717 PCI: 00:0a.0 [8086/467d] enabled
1196 12:43:13.759307 PCI: 00:0d.0 [8086/0000] bus ops
1197 12:43:13.762614 PCI: 00:0d.0 [8086/461e] enabled
1198 12:43:13.765306 PCI: 00:14.0 [8086/0000] bus ops
1199 12:43:13.768672 PCI: 00:14.0 [8086/51ed] enabled
1200 12:43:13.772434 PCI: 00:14.2 [8086/51ef] enabled
1201 12:43:13.775509 PCI: 00:14.3 [8086/0000] bus ops
1202 12:43:13.778998 PCI: 00:14.3 [8086/51f0] enabled
1203 12:43:13.782311 PCI: 00:15.0 [8086/0000] bus ops
1204 12:43:13.785743 PCI: 00:15.0 [8086/51e8] enabled
1205 12:43:13.789021 PCI: 00:15.1 [8086/0000] bus ops
1206 12:43:13.792158 PCI: 00:15.1 [8086/51e9] enabled
1207 12:43:13.795723 PCI: 00:15.2 [8086/0000] bus ops
1208 12:43:13.799170 PCI: 00:15.2 [8086/51ea] disabled
1209 12:43:13.802655 PCI: 00:15.3 [8086/0000] bus ops
1210 12:43:13.805425 PCI: 00:15.3 [8086/51eb] enabled
1211 12:43:13.808854 PCI: 00:16.0 [8086/0000] ops
1212 12:43:13.812418 PCI: 00:16.0 [8086/51e0] enabled
1213 12:43:13.818618 PCI: Static device PCI: 00:17.0 not found, disabling it.
1214 12:43:13.822174 PCI: 00:19.0 [8086/0000] bus ops
1215 12:43:13.825419 PCI: 00:19.0 [8086/51c5] disabled
1216 12:43:13.828796 PCI: 00:19.1 [8086/0000] bus ops
1217 12:43:13.832284 PCI: 00:19.1 [8086/51c6] enabled
1218 12:43:13.835844 PCI: 00:1e.0 [8086/0000] ops
1219 12:43:13.838719 PCI: 00:1e.0 [8086/51a8] enabled
1220 12:43:13.841972 PCI: 00:1e.3 [8086/0000] bus ops
1221 12:43:13.845688 PCI: 00:1e.3 [8086/51ab] enabled
1222 12:43:13.848773 PCI: 00:1f.0 [8086/0000] bus ops
1223 12:43:13.851844 PCI: 00:1f.0 [8086/5182] enabled
1224 12:43:13.851941 RTC Init
1225 12:43:13.858973 Set power on after power failure.
1226 12:43:13.859057 Disabling Deep S3
1227 12:43:13.862209 Disabling Deep S3
1228 12:43:13.862291 Disabling Deep S4
1229 12:43:13.865947 Disabling Deep S4
1230 12:43:13.866029 Disabling Deep S5
1231 12:43:13.869447 Disabling Deep S5
1232 12:43:13.872301 PCI: 00:1f.2 [0000/0000] hidden
1233 12:43:13.875690 PCI: 00:1f.3 [8086/0000] bus ops
1234 12:43:13.879113 PCI: 00:1f.3 [8086/51c8] enabled
1235 12:43:13.882501 PCI: 00:1f.5 [8086/0000] bus ops
1236 12:43:13.885785 PCI: 00:1f.5 [8086/51a4] enabled
1237 12:43:13.885869 GPIO: 0 enabled
1238 12:43:13.888986 PCI: Leftover static devices:
1239 12:43:13.892138 PCI: 00:01.0
1240 12:43:13.892221 PCI: 00:01.1
1241 12:43:13.895906 PCI: 00:05.0
1242 12:43:13.895989 PCI: 00:06.2
1243 12:43:13.896054 PCI: 00:09.0
1244 12:43:13.898755 PCI: 00:0d.1
1245 12:43:13.898837 PCI: 00:0d.2
1246 12:43:13.902340 PCI: 00:0d.3
1247 12:43:13.902422 PCI: 00:0e.0
1248 12:43:13.902488 PCI: 00:10.0
1249 12:43:13.905507 PCI: 00:10.1
1250 12:43:13.905588 PCI: 00:10.6
1251 12:43:13.909281 PCI: 00:10.7
1252 12:43:13.909364 PCI: 00:12.0
1253 12:43:13.912653 PCI: 00:12.6
1254 12:43:13.912736 PCI: 00:12.7
1255 12:43:13.912818 PCI: 00:13.0
1256 12:43:13.915993 PCI: 00:14.1
1257 12:43:13.916156 PCI: 00:16.1
1258 12:43:13.918782 PCI: 00:16.2
1259 12:43:13.918864 PCI: 00:16.3
1260 12:43:13.918945 PCI: 00:16.4
1261 12:43:13.922233 PCI: 00:16.5
1262 12:43:13.922315 PCI: 00:17.0
1263 12:43:13.925758 PCI: 00:19.2
1264 12:43:13.925857 PCI: 00:1a.0
1265 12:43:13.925953 PCI: 00:1e.1
1266 12:43:13.929040 PCI: 00:1e.2
1267 12:43:13.929138 PCI: 00:1f.1
1268 12:43:13.932473 PCI: 00:1f.4
1269 12:43:13.932557 PCI: 00:1f.6
1270 12:43:13.935307 PCI: 00:1f.7
1271 12:43:13.935428 PCI: Check your devicetree.cb.
1272 12:43:13.938731 PCI: 00:02.0 scanning...
1273 12:43:13.942178 scan_generic_bus for PCI: 00:02.0
1274 12:43:13.945708 scan_generic_bus for PCI: 00:02.0 done
1275 12:43:13.951964 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1276 12:43:13.955353 PCI: 00:04.0 scanning...
1277 12:43:13.958727 scan_generic_bus for PCI: 00:04.0
1278 12:43:13.958810 GENERIC: 0.0 enabled
1279 12:43:13.965777 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1280 12:43:13.972170 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1281 12:43:13.972252 PCI: 00:06.0 scanning...
1282 12:43:13.975701 do_pci_scan_bridge for PCI: 00:06.0
1283 12:43:13.978668 PCI: pci_scan_bus for bus 01
1284 12:43:13.982592 PCI: 01:00.0 [15b7/5009] enabled
1285 12:43:13.985449 Enabling Common Clock Configuration
1286 12:43:13.992300 L1 Sub-State supported from root port 6
1287 12:43:13.992382 L1 Sub-State Support = 0x5
1288 12:43:13.995651 CommonModeRestoreTime = 0x6e
1289 12:43:14.002459 Power On Value = 0x5, Power On Scale = 0x2
1290 12:43:14.002540 ASPM: Enabled L1
1291 12:43:14.005758 PCIe: Max_Payload_Size adjusted to 256
1292 12:43:14.009032 PCI: 01:00.0: Enabled LTR
1293 12:43:14.012211 PCI: 01:00.0: Programmed LTR max latencies
1294 12:43:14.019269 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1295 12:43:14.022432 PCI: 00:0d.0 scanning...
1296 12:43:14.025645 scan_static_bus for PCI: 00:0d.0
1297 12:43:14.025728 USB0 port 0 enabled
1298 12:43:14.028799 USB0 port 0 scanning...
1299 12:43:14.032070 scan_static_bus for USB0 port 0
1300 12:43:14.035337 USB3 port 0 enabled
1301 12:43:14.035442 USB3 port 1 disabled
1302 12:43:14.038705 USB3 port 2 enabled
1303 12:43:14.038789 USB3 port 3 disabled
1304 12:43:14.042130 USB3 port 0 scanning...
1305 12:43:14.045670 scan_static_bus for USB3 port 0
1306 12:43:14.048478 scan_static_bus for USB3 port 0 done
1307 12:43:14.055330 scan_bus: bus USB3 port 0 finished in 6 msecs
1308 12:43:14.055455 USB3 port 2 scanning...
1309 12:43:14.058983 scan_static_bus for USB3 port 2
1310 12:43:14.062451 scan_static_bus for USB3 port 2 done
1311 12:43:14.068794 scan_bus: bus USB3 port 2 finished in 6 msecs
1312 12:43:14.072380 scan_static_bus for USB0 port 0 done
1313 12:43:14.075643 scan_bus: bus USB0 port 0 finished in 43 msecs
1314 12:43:14.082053 scan_static_bus for PCI: 00:0d.0 done
1315 12:43:14.085156 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1316 12:43:14.088378 PCI: 00:14.0 scanning...
1317 12:43:14.092043 scan_static_bus for PCI: 00:14.0
1318 12:43:14.092124 USB0 port 0 enabled
1319 12:43:14.095041 USB0 port 0 scanning...
1320 12:43:14.098514 scan_static_bus for USB0 port 0
1321 12:43:14.101758 USB2 port 0 enabled
1322 12:43:14.101867 USB2 port 1 disabled
1323 12:43:14.105161 USB2 port 2 enabled
1324 12:43:14.108576 USB2 port 3 disabled
1325 12:43:14.108671 USB2 port 4 disabled
1326 12:43:14.112008 USB2 port 5 enabled
1327 12:43:14.112116 USB2 port 6 disabled
1328 12:43:14.115314 USB2 port 7 disabled
1329 12:43:14.118662 USB2 port 8 enabled
1330 12:43:14.118768 USB2 port 9 enabled
1331 12:43:14.121918 USB3 port 0 enabled
1332 12:43:14.125000 USB3 port 1 disabled
1333 12:43:14.125113 USB3 port 2 disabled
1334 12:43:14.128480 USB3 port 3 disabled
1335 12:43:14.131865 USB2 port 0 scanning...
1336 12:43:14.135107 scan_static_bus for USB2 port 0
1337 12:43:14.138289 scan_static_bus for USB2 port 0 done
1338 12:43:14.141425 scan_bus: bus USB2 port 0 finished in 6 msecs
1339 12:43:14.145339 USB2 port 2 scanning...
1340 12:43:14.148290 scan_static_bus for USB2 port 2
1341 12:43:14.151491 scan_static_bus for USB2 port 2 done
1342 12:43:14.154821 scan_bus: bus USB2 port 2 finished in 6 msecs
1343 12:43:14.158075 USB2 port 5 scanning...
1344 12:43:14.161498 scan_static_bus for USB2 port 5
1345 12:43:14.164991 scan_static_bus for USB2 port 5 done
1346 12:43:14.171916 scan_bus: bus USB2 port 5 finished in 6 msecs
1347 12:43:14.172015 USB2 port 8 scanning...
1348 12:43:14.174802 scan_static_bus for USB2 port 8
1349 12:43:14.178442 scan_static_bus for USB2 port 8 done
1350 12:43:14.185023 scan_bus: bus USB2 port 8 finished in 6 msecs
1351 12:43:14.185142 USB2 port 9 scanning...
1352 12:43:14.188461 scan_static_bus for USB2 port 9
1353 12:43:14.194937 scan_static_bus for USB2 port 9 done
1354 12:43:14.198217 scan_bus: bus USB2 port 9 finished in 6 msecs
1355 12:43:14.201331 USB3 port 0 scanning...
1356 12:43:14.204736 scan_static_bus for USB3 port 0
1357 12:43:14.208463 scan_static_bus for USB3 port 0 done
1358 12:43:14.211343 scan_bus: bus USB3 port 0 finished in 6 msecs
1359 12:43:14.214490 scan_static_bus for USB0 port 0 done
1360 12:43:14.221246 scan_bus: bus USB0 port 0 finished in 120 msecs
1361 12:43:14.224648 scan_static_bus for PCI: 00:14.0 done
1362 12:43:14.228060 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1363 12:43:14.231291 PCI: 00:14.3 scanning...
1364 12:43:14.234498 scan_static_bus for PCI: 00:14.3
1365 12:43:14.238100 GENERIC: 0.0 enabled
1366 12:43:14.241359 scan_static_bus for PCI: 00:14.3 done
1367 12:43:14.244805 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1368 12:43:14.247665 PCI: 00:15.0 scanning...
1369 12:43:14.251559 scan_static_bus for PCI: 00:15.0
1370 12:43:14.254763 I2C: 00:1a enabled
1371 12:43:14.254864 I2C: 00:31 enabled
1372 12:43:14.257957 I2C: 00:32 enabled
1373 12:43:14.261093 scan_static_bus for PCI: 00:15.0 done
1374 12:43:14.264663 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1375 12:43:14.267717 PCI: 00:15.1 scanning...
1376 12:43:14.271155 scan_static_bus for PCI: 00:15.1
1377 12:43:14.274719 I2C: 00:50 enabled
1378 12:43:14.277492 scan_static_bus for PCI: 00:15.1 done
1379 12:43:14.281019 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1380 12:43:14.284311 PCI: 00:15.3 scanning...
1381 12:43:14.287867 scan_static_bus for PCI: 00:15.3
1382 12:43:14.290689 I2C: 00:10 enabled
1383 12:43:14.294298 scan_static_bus for PCI: 00:15.3 done
1384 12:43:14.297777 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1385 12:43:14.301125 PCI: 00:19.1 scanning...
1386 12:43:14.304615 scan_static_bus for PCI: 00:19.1
1387 12:43:14.307357 I2C: 00:15 enabled
1388 12:43:14.307448 I2C: 00:2c enabled
1389 12:43:14.310808 scan_static_bus for PCI: 00:19.1 done
1390 12:43:14.317570 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1391 12:43:14.320945 PCI: 00:1e.3 scanning...
1392 12:43:14.324115 scan_generic_bus for PCI: 00:1e.3
1393 12:43:14.324215 SPI: 00 enabled
1394 12:43:14.331139 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1395 12:43:14.334030 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1396 12:43:14.337431 PCI: 00:1f.0 scanning...
1397 12:43:14.340687 scan_static_bus for PCI: 00:1f.0
1398 12:43:14.344341 PNP: 0c09.0 enabled
1399 12:43:14.344452 PNP: 0c09.0 scanning...
1400 12:43:14.347478 scan_static_bus for PNP: 0c09.0
1401 12:43:14.353924 scan_static_bus for PNP: 0c09.0 done
1402 12:43:14.357449 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1403 12:43:14.360841 scan_static_bus for PCI: 00:1f.0 done
1404 12:43:14.367570 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1405 12:43:14.367655 PCI: 00:1f.2 scanning...
1406 12:43:14.370748 scan_static_bus for PCI: 00:1f.2
1407 12:43:14.373973 GENERIC: 0.0 enabled
1408 12:43:14.377056 GENERIC: 0.0 scanning...
1409 12:43:14.380960 scan_static_bus for GENERIC: 0.0
1410 12:43:14.381044 GENERIC: 0.0 enabled
1411 12:43:14.384081 GENERIC: 1.0 enabled
1412 12:43:14.387403 scan_static_bus for GENERIC: 0.0 done
1413 12:43:14.394317 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1414 12:43:14.397114 scan_static_bus for PCI: 00:1f.2 done
1415 12:43:14.400466 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1416 12:43:14.404014 PCI: 00:1f.3 scanning...
1417 12:43:14.407355 scan_static_bus for PCI: 00:1f.3
1418 12:43:14.410745 scan_static_bus for PCI: 00:1f.3 done
1419 12:43:14.417640 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1420 12:43:14.417721 PCI: 00:1f.5 scanning...
1421 12:43:14.420747 scan_generic_bus for PCI: 00:1f.5
1422 12:43:14.424249 scan_generic_bus for PCI: 00:1f.5 done
1423 12:43:14.430413 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1424 12:43:14.433786 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1425 12:43:14.436922 scan_static_bus for Root Device done
1426 12:43:14.443748 scan_bus: bus Root Device finished in 729 msecs
1427 12:43:14.443828 done
1428 12:43:14.450538 BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 1296 ms
1429 12:43:14.457150 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1430 12:43:14.463791 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1431 12:43:14.467056 SPI flash protection: WPSW=1 SRP0=0
1432 12:43:14.470633 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1433 12:43:14.477480 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1434 12:43:14.480264 found VGA at PCI: 00:02.0
1435 12:43:14.483598 Setting up VGA for PCI: 00:02.0
1436 12:43:14.486880 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1437 12:43:14.493612 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1438 12:43:14.493730 Allocating resources...
1439 12:43:14.496853 Reading resources...
1440 12:43:14.500329 Root Device read_resources bus 0 link: 0
1441 12:43:14.507132 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1442 12:43:14.510423 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1443 12:43:14.513725 DOMAIN: 0000 read_resources bus 0 link: 0
1444 12:43:14.520700 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1445 12:43:14.527504 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1446 12:43:14.533820 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1447 12:43:14.540073 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1448 12:43:14.547052 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1449 12:43:14.553306 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1450 12:43:14.556923 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1451 12:43:14.563624 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1452 12:43:14.570207 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1453 12:43:14.576698 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1454 12:43:14.583482 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1455 12:43:14.589629 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1456 12:43:14.596912 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1457 12:43:14.603373 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1458 12:43:14.609868 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1459 12:43:14.616565 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1460 12:43:14.623392 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1461 12:43:14.630160 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1462 12:43:14.636725 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1463 12:43:14.639629 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1464 12:43:14.646386 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1465 12:43:14.649762 PCI: 00:04.0 read_resources bus 1 link: 0
1466 12:43:14.656415 PCI: 00:04.0 read_resources bus 1 link: 0 done
1467 12:43:14.659995 PCI: 00:06.0 read_resources bus 1 link: 0
1468 12:43:14.665939 PCI: 00:06.0 read_resources bus 1 link: 0 done
1469 12:43:14.669700 PCI: 00:0d.0 read_resources bus 0 link: 0
1470 12:43:14.672623 USB0 port 0 read_resources bus 0 link: 0
1471 12:43:14.676414 USB0 port 0 read_resources bus 0 link: 0 done
1472 12:43:14.682628 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1473 12:43:14.686338 PCI: 00:14.0 read_resources bus 0 link: 0
1474 12:43:14.689455 USB0 port 0 read_resources bus 0 link: 0
1475 12:43:14.696331 USB0 port 0 read_resources bus 0 link: 0 done
1476 12:43:14.699245 PCI: 00:14.0 read_resources bus 0 link: 0 done
1477 12:43:14.706495 PCI: 00:14.3 read_resources bus 0 link: 0
1478 12:43:14.709269 PCI: 00:14.3 read_resources bus 0 link: 0 done
1479 12:43:14.712697 PCI: 00:15.0 read_resources bus 0 link: 0
1480 12:43:14.719235 PCI: 00:15.0 read_resources bus 0 link: 0 done
1481 12:43:14.722669 PCI: 00:15.1 read_resources bus 0 link: 0
1482 12:43:14.725999 PCI: 00:15.1 read_resources bus 0 link: 0 done
1483 12:43:14.732465 PCI: 00:15.3 read_resources bus 0 link: 0
1484 12:43:14.735879 PCI: 00:15.3 read_resources bus 0 link: 0 done
1485 12:43:14.741983 PCI: 00:19.1 read_resources bus 0 link: 0
1486 12:43:14.745513 PCI: 00:19.1 read_resources bus 0 link: 0 done
1487 12:43:14.748905 PCI: 00:1e.3 read_resources bus 2 link: 0
1488 12:43:14.755788 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1489 12:43:14.759108 PCI: 00:1f.0 read_resources bus 0 link: 0
1490 12:43:14.762376 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1491 12:43:14.768990 PCI: 00:1f.2 read_resources bus 0 link: 0
1492 12:43:14.772320 GENERIC: 0.0 read_resources bus 0 link: 0
1493 12:43:14.775582 GENERIC: 0.0 read_resources bus 0 link: 0 done
1494 12:43:14.781959 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1495 12:43:14.785017 DOMAIN: 0000 read_resources bus 0 link: 0 done
1496 12:43:14.791677 Root Device read_resources bus 0 link: 0 done
1497 12:43:14.791762 Done reading resources.
1498 12:43:14.798546 Show resources in subtree (Root Device)...After reading.
1499 12:43:14.805371 Root Device child on link 0 CPU_CLUSTER: 0
1500 12:43:14.808278 CPU_CLUSTER: 0 child on link 0 APIC: 00
1501 12:43:14.808393 APIC: 00
1502 12:43:14.811647 APIC: 12
1503 12:43:14.811773 APIC: 14
1504 12:43:14.811838 APIC: 16
1505 12:43:14.815005 APIC: 10
1506 12:43:14.815086 APIC: 09
1507 12:43:14.815151 APIC: 08
1508 12:43:14.818351 APIC: 01
1509 12:43:14.821641 DOMAIN: 0000 child on link 0 GPIO: 0
1510 12:43:14.831978 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1511 12:43:14.841671 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1512 12:43:14.841757 GPIO: 0
1513 12:43:14.845050 PCI: 00:00.0
1514 12:43:14.854923 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1515 12:43:14.861792 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1516 12:43:14.871283 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1517 12:43:14.881403 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1518 12:43:14.891580 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1519 12:43:14.901531 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1520 12:43:14.907840 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1521 12:43:14.918113 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1522 12:43:14.928408 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1523 12:43:14.938083 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1524 12:43:14.947913 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1525 12:43:14.958158 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1526 12:43:14.967592 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1527 12:43:14.974502 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1528 12:43:14.984749 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1529 12:43:14.994308 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1530 12:43:15.004741 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1531 12:43:15.014216 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1532 12:43:15.024540 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1533 12:43:15.034043 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1534 12:43:15.044053 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1535 12:43:15.050908 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1536 12:43:15.061107 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1537 12:43:15.070734 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1538 12:43:15.081119 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1539 12:43:15.090850 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1540 12:43:15.100878 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1541 12:43:15.110437 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1542 12:43:15.110578 PCI: 00:02.0
1543 12:43:15.120705 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1544 12:43:15.130293 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1545 12:43:15.140319 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1546 12:43:15.143814 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1547 12:43:15.153710 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1548 12:43:15.157250 GENERIC: 0.0
1549 12:43:15.160664 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1550 12:43:15.170406 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1551 12:43:15.180546 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1552 12:43:15.186977 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1553 12:43:15.190349 PCI: 01:00.0
1554 12:43:15.200426 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1555 12:43:15.210278 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1556 12:43:15.213478 PCI: 00:08.0
1557 12:43:15.213586 PCI: 00:0a.0
1558 12:43:15.223440 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1559 12:43:15.226924 PCI: 00:0d.0 child on link 0 USB0 port 0
1560 12:43:15.236651 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1561 12:43:15.243488 USB0 port 0 child on link 0 USB3 port 0
1562 12:43:15.243587 USB3 port 0
1563 12:43:15.246901 USB3 port 1
1564 12:43:15.246984 USB3 port 2
1565 12:43:15.250206 USB3 port 3
1566 12:43:15.253706 PCI: 00:14.0 child on link 0 USB0 port 0
1567 12:43:15.263280 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1568 12:43:15.266736 USB0 port 0 child on link 0 USB2 port 0
1569 12:43:15.269977 USB2 port 0
1570 12:43:15.273531 USB2 port 1
1571 12:43:15.273613 USB2 port 2
1572 12:43:15.276688 USB2 port 3
1573 12:43:15.276787 USB2 port 4
1574 12:43:15.279967 USB2 port 5
1575 12:43:15.280066 USB2 port 6
1576 12:43:15.283259 USB2 port 7
1577 12:43:15.283345 USB2 port 8
1578 12:43:15.286844 USB2 port 9
1579 12:43:15.286927 USB3 port 0
1580 12:43:15.289972 USB3 port 1
1581 12:43:15.290055 USB3 port 2
1582 12:43:15.293824 USB3 port 3
1583 12:43:15.293906 PCI: 00:14.2
1584 12:43:15.303219 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1585 12:43:15.313415 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1586 12:43:15.319931 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1587 12:43:15.329490 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1588 12:43:15.329612 GENERIC: 0.0
1589 12:43:15.336402 PCI: 00:15.0 child on link 0 I2C: 00:1a
1590 12:43:15.346169 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1591 12:43:15.346257 I2C: 00:1a
1592 12:43:15.349625 I2C: 00:31
1593 12:43:15.349709 I2C: 00:32
1594 12:43:15.353028 PCI: 00:15.1 child on link 0 I2C: 00:50
1595 12:43:15.363486 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1596 12:43:15.366738 I2C: 00:50
1597 12:43:15.366828 PCI: 00:15.2
1598 12:43:15.372918 PCI: 00:15.3 child on link 0 I2C: 00:10
1599 12:43:15.383381 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1600 12:43:15.383474 I2C: 00:10
1601 12:43:15.383562 PCI: 00:16.0
1602 12:43:15.393043 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1603 12:43:15.396521 PCI: 00:19.0
1604 12:43:15.399855 PCI: 00:19.1 child on link 0 I2C: 00:15
1605 12:43:15.409759 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1606 12:43:15.412900 I2C: 00:15
1607 12:43:15.413003 I2C: 00:2c
1608 12:43:15.416685 PCI: 00:1e.0
1609 12:43:15.426125 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1610 12:43:15.429179 PCI: 00:1e.3 child on link 0 SPI: 00
1611 12:43:15.439857 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1612 12:43:15.442703 SPI: 00
1613 12:43:15.446243 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1614 12:43:15.455981 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1615 12:43:15.456069 PNP: 0c09.0
1616 12:43:15.466066 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1617 12:43:15.469526 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1618 12:43:15.479209 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1619 12:43:15.489511 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1620 12:43:15.492693 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1621 12:43:15.495974 GENERIC: 0.0
1622 12:43:15.496062 GENERIC: 1.0
1623 12:43:15.499532 PCI: 00:1f.3
1624 12:43:15.509359 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1625 12:43:15.519639 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1626 12:43:15.519762 PCI: 00:1f.5
1627 12:43:15.529108 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1628 12:43:15.536092 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1629 12:43:15.542533 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1630 12:43:15.549009 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1631 12:43:15.556050 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1632 12:43:15.559425 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1633 12:43:15.562316 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1634 12:43:15.569230 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1635 12:43:15.579340 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1636 12:43:15.585611 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1637 12:43:15.592399 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1638 12:43:15.599092 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1639 12:43:15.605892 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1640 12:43:15.612489 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1641 12:43:15.622139 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1642 12:43:15.625613 DOMAIN: 0000: Resource ranges:
1643 12:43:15.628521 * Base: 1000, Size: 800, Tag: 100
1644 12:43:15.632098 * Base: 1900, Size: e700, Tag: 100
1645 12:43:15.635759 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1646 12:43:15.642347 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1647 12:43:15.649147 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1648 12:43:15.658789 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1649 12:43:15.665338 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1650 12:43:15.672168 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1651 12:43:15.682025 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1652 12:43:15.688428 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1653 12:43:15.695170 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1654 12:43:15.704973 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1655 12:43:15.711948 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1656 12:43:15.718449 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1657 12:43:15.728515 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1658 12:43:15.735166 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1659 12:43:15.741730 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1660 12:43:15.751846 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1661 12:43:15.758699 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1662 12:43:15.765253 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1663 12:43:15.775120 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1664 12:43:15.781475 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1665 12:43:15.788106 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1666 12:43:15.798361 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1667 12:43:15.804724 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1668 12:43:15.811608 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1669 12:43:15.821245 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1670 12:43:15.827912 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1671 12:43:15.834595 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1672 12:43:15.844565 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1673 12:43:15.851476 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1674 12:43:15.858006 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1675 12:43:15.868449 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1676 12:43:15.874531 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1677 12:43:15.880995 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1678 12:43:15.884708 DOMAIN: 0000: Resource ranges:
1679 12:43:15.887627 * Base: 80400000, Size: 3fc00000, Tag: 200
1680 12:43:15.894317 * Base: d0000000, Size: 28000000, Tag: 200
1681 12:43:15.897862 * Base: fa000000, Size: 1000000, Tag: 200
1682 12:43:15.901106 * Base: fb001000, Size: 17ff000, Tag: 200
1683 12:43:15.907914 * Base: fe800000, Size: 300000, Tag: 200
1684 12:43:15.911292 * Base: feb80000, Size: 80000, Tag: 200
1685 12:43:15.914878 * Base: fed00000, Size: 40000, Tag: 200
1686 12:43:15.917581 * Base: fed70000, Size: 10000, Tag: 200
1687 12:43:15.924435 * Base: fed88000, Size: 8000, Tag: 200
1688 12:43:15.927733 * Base: fed93000, Size: d000, Tag: 200
1689 12:43:15.931179 * Base: feda2000, Size: 1e000, Tag: 200
1690 12:43:15.934518 * Base: fede0000, Size: 1220000, Tag: 200
1691 12:43:15.940775 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1692 12:43:15.947515 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1693 12:43:15.954565 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1694 12:43:15.961008 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1695 12:43:15.967928 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1696 12:43:15.974006 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1697 12:43:15.981002 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1698 12:43:15.987128 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1699 12:43:15.994222 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1700 12:43:16.000963 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1701 12:43:16.007493 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1702 12:43:16.014037 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1703 12:43:16.020312 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1704 12:43:16.027234 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1705 12:43:16.034265 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1706 12:43:16.040251 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1707 12:43:16.047474 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1708 12:43:16.053542 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1709 12:43:16.060169 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1710 12:43:16.066706 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1711 12:43:16.073342 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1712 12:43:16.080316 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1713 12:43:16.083507 PCI: 00:06.0: Resource ranges:
1714 12:43:16.090125 * Base: 80400000, Size: 100000, Tag: 200
1715 12:43:16.097088 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1716 12:43:16.103465 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1717 12:43:16.110111 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1718 12:43:16.116659 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1719 12:43:16.123635 Root Device assign_resources, bus 0 link: 0
1720 12:43:16.126766 DOMAIN: 0000 assign_resources, bus 0 link: 0
1721 12:43:16.133336 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1722 12:43:16.143622 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1723 12:43:16.149985 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1724 12:43:16.160328 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1725 12:43:16.163729 PCI: 00:04.0 assign_resources, bus 1 link: 0
1726 12:43:16.170041 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1727 12:43:16.177004 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1728 12:43:16.186546 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1729 12:43:16.196377 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1730 12:43:16.199811 PCI: 00:06.0 assign_resources, bus 1 link: 0
1731 12:43:16.206783 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1732 12:43:16.216587 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1733 12:43:16.219919 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1734 12:43:16.229678 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1735 12:43:16.236387 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1736 12:43:16.242859 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1737 12:43:16.246065 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1738 12:43:16.256398 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1739 12:43:16.259083 PCI: 00:14.0 assign_resources, bus 0 link: 0
1740 12:43:16.262575 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1741 12:43:16.272711 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1742 12:43:16.279041 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1743 12:43:16.289315 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1744 12:43:16.292198 PCI: 00:14.3 assign_resources, bus 0 link: 0
1745 12:43:16.298913 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1746 12:43:16.305562 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1747 12:43:16.308954 PCI: 00:15.0 assign_resources, bus 0 link: 0
1748 12:43:16.315876 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1749 12:43:16.322197 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1750 12:43:16.329077 PCI: 00:15.1 assign_resources, bus 0 link: 0
1751 12:43:16.332441 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1752 12:43:16.342474 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1753 12:43:16.345717 PCI: 00:15.3 assign_resources, bus 0 link: 0
1754 12:43:16.348987 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1755 12:43:16.358422 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1756 12:43:16.365495 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1757 12:43:16.372109 PCI: 00:19.1 assign_resources, bus 0 link: 0
1758 12:43:16.375436 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1759 12:43:16.382189 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1760 12:43:16.388562 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1761 12:43:16.392045 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1762 12:43:16.398958 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1763 12:43:16.402261 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1764 12:43:16.408419 LPC: Trying to open IO window from 800 size 1ff
1765 12:43:16.415307 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1766 12:43:16.421588 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1767 12:43:16.432087 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1768 12:43:16.434792 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1769 12:43:16.441585 Root Device assign_resources, bus 0 link: 0 done
1770 12:43:16.441670 Done setting resources.
1771 12:43:16.448236 Show resources in subtree (Root Device)...After assigning values.
1772 12:43:16.455318 Root Device child on link 0 CPU_CLUSTER: 0
1773 12:43:16.458379 CPU_CLUSTER: 0 child on link 0 APIC: 00
1774 12:43:16.458495 APIC: 00
1775 12:43:16.461619 APIC: 12
1776 12:43:16.461705 APIC: 14
1777 12:43:16.464964 APIC: 16
1778 12:43:16.465046 APIC: 10
1779 12:43:16.465112 APIC: 09
1780 12:43:16.468211 APIC: 08
1781 12:43:16.468293 APIC: 01
1782 12:43:16.471390 DOMAIN: 0000 child on link 0 GPIO: 0
1783 12:43:16.481315 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1784 12:43:16.491725 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1785 12:43:16.491810 GPIO: 0
1786 12:43:16.494599 PCI: 00:00.0
1787 12:43:16.505027 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1788 12:43:16.514698 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1789 12:43:16.521142 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1790 12:43:16.531358 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1791 12:43:16.541178 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1792 12:43:16.551312 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1793 12:43:16.560819 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1794 12:43:16.571259 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1795 12:43:16.580967 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1796 12:43:16.587452 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1797 12:43:16.597722 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1798 12:43:16.607267 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1799 12:43:16.617159 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1800 12:43:16.627363 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1801 12:43:16.637744 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1802 12:43:16.643941 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1803 12:43:16.653759 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1804 12:43:16.663646 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1805 12:43:16.674057 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1806 12:43:16.684047 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1807 12:43:16.693517 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1808 12:43:16.703676 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1809 12:43:16.713379 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1810 12:43:16.720512 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1811 12:43:16.730439 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1812 12:43:16.740129 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1813 12:43:16.750214 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1814 12:43:16.760152 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1815 12:43:16.763513 PCI: 00:02.0
1816 12:43:16.773398 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1817 12:43:16.783009 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1818 12:43:16.792962 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1819 12:43:16.796736 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1820 12:43:16.806496 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1821 12:43:16.809834 GENERIC: 0.0
1822 12:43:16.813050 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1823 12:43:16.822681 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1824 12:43:16.833095 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1825 12:43:16.846332 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1826 12:43:16.846417 PCI: 01:00.0
1827 12:43:16.856223 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1828 12:43:16.865980 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1829 12:43:16.869199 PCI: 00:08.0
1830 12:43:16.869280 PCI: 00:0a.0
1831 12:43:16.882794 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1832 12:43:16.885958 PCI: 00:0d.0 child on link 0 USB0 port 0
1833 12:43:16.895810 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1834 12:43:16.899607 USB0 port 0 child on link 0 USB3 port 0
1835 12:43:16.902848 USB3 port 0
1836 12:43:16.902929 USB3 port 1
1837 12:43:16.906160 USB3 port 2
1838 12:43:16.906241 USB3 port 3
1839 12:43:16.912531 PCI: 00:14.0 child on link 0 USB0 port 0
1840 12:43:16.922700 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1841 12:43:16.925756 USB0 port 0 child on link 0 USB2 port 0
1842 12:43:16.929111 USB2 port 0
1843 12:43:16.929193 USB2 port 1
1844 12:43:16.932353 USB2 port 2
1845 12:43:16.932434 USB2 port 3
1846 12:43:16.935647 USB2 port 4
1847 12:43:16.935728 USB2 port 5
1848 12:43:16.939090 USB2 port 6
1849 12:43:16.939199 USB2 port 7
1850 12:43:16.942413 USB2 port 8
1851 12:43:16.945858 USB2 port 9
1852 12:43:16.945944 USB3 port 0
1853 12:43:16.949162 USB3 port 1
1854 12:43:16.949246 USB3 port 2
1855 12:43:16.952599 USB3 port 3
1856 12:43:16.952680 PCI: 00:14.2
1857 12:43:16.962344 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1858 12:43:16.972195 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1859 12:43:16.979085 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1860 12:43:16.989036 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1861 12:43:16.989119 GENERIC: 0.0
1862 12:43:16.995636 PCI: 00:15.0 child on link 0 I2C: 00:1a
1863 12:43:17.005647 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1864 12:43:17.005755 I2C: 00:1a
1865 12:43:17.008816 I2C: 00:31
1866 12:43:17.008898 I2C: 00:32
1867 12:43:17.015252 PCI: 00:15.1 child on link 0 I2C: 00:50
1868 12:43:17.025081 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1869 12:43:17.025165 I2C: 00:50
1870 12:43:17.028809 PCI: 00:15.2
1871 12:43:17.031856 PCI: 00:15.3 child on link 0 I2C: 00:10
1872 12:43:17.041781 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1873 12:43:17.045014 I2C: 00:10
1874 12:43:17.045104 PCI: 00:16.0
1875 12:43:17.055042 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1876 12:43:17.058381 PCI: 00:19.0
1877 12:43:17.061749 PCI: 00:19.1 child on link 0 I2C: 00:15
1878 12:43:17.072057 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1879 12:43:17.075400 I2C: 00:15
1880 12:43:17.075484 I2C: 00:2c
1881 12:43:17.078104 PCI: 00:1e.0
1882 12:43:17.088279 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1883 12:43:17.091495 PCI: 00:1e.3 child on link 0 SPI: 00
1884 12:43:17.101335 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1885 12:43:17.105052 SPI: 00
1886 12:43:17.108278 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1887 12:43:17.118090 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1888 12:43:17.118172 PNP: 0c09.0
1889 12:43:17.127874 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1890 12:43:17.131213 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1891 12:43:17.141603 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1892 12:43:17.151617 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1893 12:43:17.154413 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1894 12:43:17.158335 GENERIC: 0.0
1895 12:43:17.158416 GENERIC: 1.0
1896 12:43:17.161561 PCI: 00:1f.3
1897 12:43:17.171614 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1898 12:43:17.181554 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1899 12:43:17.181637 PCI: 00:1f.5
1900 12:43:17.194871 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1901 12:43:17.194979 Done allocating resources.
1902 12:43:17.200964 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1903 12:43:17.207493 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1904 12:43:17.210739 Configure audio over I2S with MAX98373 NAU88L25B.
1905 12:43:17.216698 Enabling BT offload
1906 12:43:17.223980 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1907 12:43:17.227212 Enabling resources...
1908 12:43:17.230511 PCI: 00:00.0 subsystem <- 8086/4609
1909 12:43:17.234272 PCI: 00:00.0 cmd <- 06
1910 12:43:17.237309 PCI: 00:02.0 subsystem <- 8086/46b3
1911 12:43:17.240878 PCI: 00:02.0 cmd <- 03
1912 12:43:17.243977 PCI: 00:04.0 subsystem <- 8086/461d
1913 12:43:17.244058 PCI: 00:04.0 cmd <- 02
1914 12:43:17.247613 PCI: 00:06.0 bridge ctrl <- 0013
1915 12:43:17.250532 PCI: 00:06.0 subsystem <- 8086/464d
1916 12:43:17.253788 PCI: 00:06.0 cmd <- 106
1917 12:43:17.257449 PCI: 00:0a.0 subsystem <- 8086/467d
1918 12:43:17.260736 PCI: 00:0a.0 cmd <- 02
1919 12:43:17.263880 PCI: 00:0d.0 subsystem <- 8086/461e
1920 12:43:17.267244 PCI: 00:0d.0 cmd <- 02
1921 12:43:17.270617 PCI: 00:14.0 subsystem <- 8086/51ed
1922 12:43:17.273874 PCI: 00:14.0 cmd <- 02
1923 12:43:17.277336 PCI: 00:14.2 subsystem <- 8086/51ef
1924 12:43:17.277417 PCI: 00:14.2 cmd <- 02
1925 12:43:17.280620 PCI: 00:14.3 subsystem <- 8086/51f0
1926 12:43:17.283855 PCI: 00:14.3 cmd <- 02
1927 12:43:17.287270 PCI: 00:15.0 subsystem <- 8086/51e8
1928 12:43:17.290653 PCI: 00:15.0 cmd <- 02
1929 12:43:17.293949 PCI: 00:15.1 subsystem <- 8086/51e9
1930 12:43:17.297126 PCI: 00:15.1 cmd <- 06
1931 12:43:17.300439 PCI: 00:15.3 subsystem <- 8086/51eb
1932 12:43:17.303713 PCI: 00:15.3 cmd <- 02
1933 12:43:17.307035 PCI: 00:16.0 subsystem <- 8086/51e0
1934 12:43:17.307145 PCI: 00:16.0 cmd <- 02
1935 12:43:17.310133 PCI: 00:19.1 subsystem <- 8086/51c6
1936 12:43:17.313431 PCI: 00:19.1 cmd <- 02
1937 12:43:17.316720 PCI: 00:1e.0 subsystem <- 8086/51a8
1938 12:43:17.320076 PCI: 00:1e.0 cmd <- 06
1939 12:43:17.324034 PCI: 00:1e.3 subsystem <- 8086/51ab
1940 12:43:17.326747 PCI: 00:1e.3 cmd <- 02
1941 12:43:17.330083 PCI: 00:1f.0 subsystem <- 8086/5182
1942 12:43:17.333982 PCI: 00:1f.0 cmd <- 407
1943 12:43:17.337195 PCI: 00:1f.3 subsystem <- 8086/51c8
1944 12:43:17.337277 PCI: 00:1f.3 cmd <- 02
1945 12:43:17.343505 PCI: 00:1f.5 subsystem <- 8086/51a4
1946 12:43:17.343586 PCI: 00:1f.5 cmd <- 406
1947 12:43:17.347207 PCI: 01:00.0 cmd <- 02
1948 12:43:17.347288 done.
1949 12:43:17.353799 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1950 12:43:17.357116 ME: Version: Unavailable
1951 12:43:17.360375 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1952 12:43:17.363433 Initializing devices...
1953 12:43:17.367029 Root Device init
1954 12:43:17.367111 mainboard: EC init
1955 12:43:17.373188 Chrome EC: Set SMI mask to 0x0000000000000000
1956 12:43:17.376751 Chrome EC: UHEPI supported
1957 12:43:17.379824 Chrome EC: clear events_b mask to 0x0000000000000000
1958 12:43:17.386569 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1959 12:43:17.392997 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1960 12:43:17.400121 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1961 12:43:17.406693 Chrome EC: Set WAKE mask to 0x0000000000000000
1962 12:43:17.409467 Root Device init finished in 41 msecs
1963 12:43:17.412681 PCI: 00:00.0 init
1964 12:43:17.416070 CPU TDP = 15 Watts
1965 12:43:17.419792 CPU PL1 = 15 Watts
1966 12:43:17.419873 CPU PL2 = 55 Watts
1967 12:43:17.422851 CPU PL4 = 123 Watts
1968 12:43:17.426170 PCI: 00:00.0 init finished in 8 msecs
1969 12:43:17.426249 PCI: 00:02.0 init
1970 12:43:17.429551 GMA: Found VBT in CBFS
1971 12:43:17.432941 GMA: Found valid VBT in CBFS
1972 12:43:17.439331 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1973 12:43:17.445810 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1974 12:43:17.448969 PCI: 00:02.0 init finished in 18 msecs
1975 12:43:17.452187 PCI: 00:06.0 init
1976 12:43:17.455433 Initializing PCH PCIe bridge.
1977 12:43:17.458746 PCI: 00:06.0 init finished in 3 msecs
1978 12:43:17.462036 PCI: 00:0a.0 init
1979 12:43:17.465381 PCI: 00:0a.0 init finished in 0 msecs
1980 12:43:17.465466 PCI: 00:14.0 init
1981 12:43:17.468732 PCI: 00:14.0 init finished in 0 msecs
1982 12:43:17.472059 PCI: 00:14.2 init
1983 12:43:17.475989 PCI: 00:14.2 init finished in 0 msecs
1984 12:43:17.478720 PCI: 00:15.0 init
1985 12:43:17.481829 I2C bus 0 version 0x3230302a
1986 12:43:17.485209 DW I2C bus 0 at 0x80655000 (400 KHz)
1987 12:43:17.488552 PCI: 00:15.0 init finished in 6 msecs
1988 12:43:17.488637 PCI: 00:15.1 init
1989 12:43:17.492374 I2C bus 1 version 0x3230302a
1990 12:43:17.495283 DW I2C bus 1 at 0x80656000 (400 KHz)
1991 12:43:17.502111 PCI: 00:15.1 init finished in 6 msecs
1992 12:43:17.502237 PCI: 00:15.3 init
1993 12:43:17.505663 I2C bus 3 version 0x3230302a
1994 12:43:17.508824 DW I2C bus 3 at 0x80657000 (400 KHz)
1995 12:43:17.512299 PCI: 00:15.3 init finished in 6 msecs
1996 12:43:17.515194 PCI: 00:16.0 init
1997 12:43:17.518570 PCI: 00:16.0 init finished in 0 msecs
1998 12:43:17.521728 PCI: 00:19.1 init
1999 12:43:17.521811 I2C bus 5 version 0x3230302a
2000 12:43:17.528946 DW I2C bus 5 at 0x80659000 (400 KHz)
2001 12:43:17.532000 PCI: 00:19.1 init finished in 6 msecs
2002 12:43:17.532083 PCI: 00:1f.0 init
2003 12:43:17.538677 IOAPIC: Initializing IOAPIC at 0xfec00000
2004 12:43:17.538761 IOAPIC: ID = 0x02
2005 12:43:17.542002 IOAPIC: Dumping registers
2006 12:43:17.545172 reg 0x0000: 0x02000000
2007 12:43:17.545258 reg 0x0001: 0x00770020
2008 12:43:17.548396 reg 0x0002: 0x00000000
2009 12:43:17.551632 IOAPIC: 120 interrupts
2010 12:43:17.555694 IOAPIC: Clearing IOAPIC at 0xfec00000
2011 12:43:17.562063 IOAPIC: vector 0x00 value 0x00000000 0x00010000
2012 12:43:17.565436 IOAPIC: vector 0x01 value 0x00000000 0x00010000
2013 12:43:17.568713 IOAPIC: vector 0x02 value 0x00000000 0x00010000
2014 12:43:17.574879 IOAPIC: vector 0x03 value 0x00000000 0x00010000
2015 12:43:17.578278 IOAPIC: vector 0x04 value 0x00000000 0x00010000
2016 12:43:17.584960 IOAPIC: vector 0x05 value 0x00000000 0x00010000
2017 12:43:17.588212 IOAPIC: vector 0x06 value 0x00000000 0x00010000
2018 12:43:17.594953 IOAPIC: vector 0x07 value 0x00000000 0x00010000
2019 12:43:17.598299 IOAPIC: vector 0x08 value 0x00000000 0x00010000
2020 12:43:17.601689 IOAPIC: vector 0x09 value 0x00000000 0x00010000
2021 12:43:17.608648 IOAPIC: vector 0x0a value 0x00000000 0x00010000
2022 12:43:17.611589 IOAPIC: vector 0x0b value 0x00000000 0x00010000
2023 12:43:17.618613 IOAPIC: vector 0x0c value 0x00000000 0x00010000
2024 12:43:17.621605 IOAPIC: vector 0x0d value 0x00000000 0x00010000
2025 12:43:17.628509 IOAPIC: vector 0x0e value 0x00000000 0x00010000
2026 12:43:17.631802 IOAPIC: vector 0x0f value 0x00000000 0x00010000
2027 12:43:17.638306 IOAPIC: vector 0x10 value 0x00000000 0x00010000
2028 12:43:17.641705 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2029 12:43:17.644921 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2030 12:43:17.651504 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2031 12:43:17.654869 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2032 12:43:17.661250 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2033 12:43:17.664928 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2034 12:43:17.671345 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2035 12:43:17.674662 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2036 12:43:17.681129 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2037 12:43:17.684503 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2038 12:43:17.687816 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2039 12:43:17.694429 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2040 12:43:17.698341 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2041 12:43:17.704667 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2042 12:43:17.708136 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2043 12:43:17.714554 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2044 12:43:17.717995 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2045 12:43:17.724574 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2046 12:43:17.728226 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2047 12:43:17.731324 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2048 12:43:17.737661 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2049 12:43:17.741270 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2050 12:43:17.747835 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2051 12:43:17.751101 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2052 12:43:17.757658 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2053 12:43:17.760997 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2054 12:43:17.768019 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2055 12:43:17.771035 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2056 12:43:17.774731 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2057 12:43:17.781248 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2058 12:43:17.784423 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2059 12:43:17.790996 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2060 12:43:17.794307 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2061 12:43:17.801303 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2062 12:43:17.804624 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2063 12:43:17.807961 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2064 12:43:17.814359 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2065 12:43:17.817705 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2066 12:43:17.824514 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2067 12:43:17.827725 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2068 12:43:17.834482 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2069 12:43:17.837479 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2070 12:43:17.844251 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2071 12:43:17.847579 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2072 12:43:17.850781 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2073 12:43:17.857877 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2074 12:43:17.860658 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2075 12:43:17.867332 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2076 12:43:17.870594 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2077 12:43:17.877619 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2078 12:43:17.880718 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2079 12:43:17.887754 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2080 12:43:17.890993 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2081 12:43:17.894456 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2082 12:43:17.900983 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2083 12:43:17.904258 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2084 12:43:17.910912 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2085 12:43:17.914245 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2086 12:43:17.920782 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2087 12:43:17.924078 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2088 12:43:17.930696 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2089 12:43:17.933967 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2090 12:43:17.937327 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2091 12:43:17.943737 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2092 12:43:17.947443 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2093 12:43:17.953665 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2094 12:43:17.956958 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2095 12:43:17.963722 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2096 12:43:17.967564 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2097 12:43:17.970775 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2098 12:43:17.977331 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2099 12:43:17.980449 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2100 12:43:17.987014 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2101 12:43:17.990364 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2102 12:43:17.997110 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2103 12:43:18.000524 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2104 12:43:18.006961 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2105 12:43:18.010192 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2106 12:43:18.013618 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2107 12:43:18.020327 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2108 12:43:18.023714 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2109 12:43:18.030533 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2110 12:43:18.033839 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2111 12:43:18.040631 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2112 12:43:18.044011 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2113 12:43:18.050561 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2114 12:43:18.053669 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2115 12:43:18.056666 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2116 12:43:18.063888 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2117 12:43:18.067088 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2118 12:43:18.073715 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2119 12:43:18.076883 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2120 12:43:18.083762 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2121 12:43:18.086789 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2122 12:43:18.093596 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2123 12:43:18.097027 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2124 12:43:18.100377 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2125 12:43:18.106732 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2126 12:43:18.110418 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2127 12:43:18.116971 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2128 12:43:18.119911 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2129 12:43:18.127040 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2130 12:43:18.130384 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2131 12:43:18.133656 IOAPIC: Bootstrap Processor Local APIC = 0x00
2132 12:43:18.140395 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2133 12:43:18.143130 PCI: 00:1f.0 init finished in 607 msecs
2134 12:43:18.147014 PCI: 00:1f.2 init
2135 12:43:18.150375 apm_control: Disabling ACPI.
2136 12:43:18.153739 APMC done.
2137 12:43:18.156912 PCI: 00:1f.2 init finished in 6 msecs
2138 12:43:18.157029 PCI: 00:1f.3 init
2139 12:43:18.159983 PCI: 00:1f.3 init finished in 0 msecs
2140 12:43:18.163633 PCI: 01:00.0 init
2141 12:43:18.166899 PCI: 01:00.0 init finished in 0 msecs
2142 12:43:18.170127 PNP: 0c09.0 init
2143 12:43:18.173485 Google Chrome EC uptime: 12.120 seconds
2144 12:43:18.176710 Google Chrome AP resets since EC boot: 1
2145 12:43:18.183477 Google Chrome most recent AP reset causes:
2146 12:43:18.186626 0.341: 32775 shutdown: entering G3
2147 12:43:18.193551 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2148 12:43:18.196524 PNP: 0c09.0 init finished in 23 msecs
2149 12:43:18.196607 GENERIC: 0.0 init
2150 12:43:18.203194 GENERIC: 0.0 init finished in 0 msecs
2151 12:43:18.203277 GENERIC: 1.0 init
2152 12:43:18.206379 GENERIC: 1.0 init finished in 0 msecs
2153 12:43:18.209717 Devices initialized
2154 12:43:18.213014 Show all devs... After init.
2155 12:43:18.213096 Root Device: enabled 1
2156 12:43:18.216326 CPU_CLUSTER: 0: enabled 1
2157 12:43:18.220186 DOMAIN: 0000: enabled 1
2158 12:43:18.223253 GPIO: 0: enabled 1
2159 12:43:18.223361 PCI: 00:00.0: enabled 1
2160 12:43:18.226890 PCI: 00:01.0: enabled 0
2161 12:43:18.229932 PCI: 00:01.1: enabled 0
2162 12:43:18.232995 PCI: 00:02.0: enabled 1
2163 12:43:18.233077 PCI: 00:04.0: enabled 1
2164 12:43:18.236305 PCI: 00:05.0: enabled 0
2165 12:43:18.239489 PCI: 00:06.0: enabled 1
2166 12:43:18.239572 PCI: 00:06.2: enabled 0
2167 12:43:18.242839 PCI: 00:07.0: enabled 0
2168 12:43:18.246210 PCI: 00:07.1: enabled 0
2169 12:43:18.249577 PCI: 00:07.2: enabled 0
2170 12:43:18.249660 PCI: 00:07.3: enabled 0
2171 12:43:18.252962 PCI: 00:08.0: enabled 0
2172 12:43:18.256249 PCI: 00:09.0: enabled 0
2173 12:43:18.259571 PCI: 00:0a.0: enabled 1
2174 12:43:18.259682 PCI: 00:0d.0: enabled 1
2175 12:43:18.262891 PCI: 00:0d.1: enabled 0
2176 12:43:18.266155 PCI: 00:0d.2: enabled 0
2177 12:43:18.269794 PCI: 00:0d.3: enabled 0
2178 12:43:18.269877 PCI: 00:0e.0: enabled 0
2179 12:43:18.273035 PCI: 00:10.0: enabled 0
2180 12:43:18.276410 PCI: 00:10.1: enabled 0
2181 12:43:18.279656 PCI: 00:10.6: enabled 0
2182 12:43:18.279767 PCI: 00:10.7: enabled 0
2183 12:43:18.283010 PCI: 00:12.0: enabled 0
2184 12:43:18.286150 PCI: 00:12.6: enabled 0
2185 12:43:18.286233 PCI: 00:12.7: enabled 0
2186 12:43:18.289281 PCI: 00:13.0: enabled 0
2187 12:43:18.293079 PCI: 00:14.0: enabled 1
2188 12:43:18.296398 PCI: 00:14.1: enabled 0
2189 12:43:18.296481 PCI: 00:14.2: enabled 1
2190 12:43:18.299537 PCI: 00:14.3: enabled 1
2191 12:43:18.302645 PCI: 00:15.0: enabled 1
2192 12:43:18.305755 PCI: 00:15.1: enabled 1
2193 12:43:18.305838 PCI: 00:15.2: enabled 0
2194 12:43:18.309609 PCI: 00:15.3: enabled 1
2195 12:43:18.312452 PCI: 00:16.0: enabled 1
2196 12:43:18.315952 PCI: 00:16.1: enabled 0
2197 12:43:18.316065 PCI: 00:16.2: enabled 0
2198 12:43:18.319594 PCI: 00:16.3: enabled 0
2199 12:43:18.322893 PCI: 00:16.4: enabled 0
2200 12:43:18.326050 PCI: 00:16.5: enabled 0
2201 12:43:18.326133 PCI: 00:17.0: enabled 0
2202 12:43:18.329413 PCI: 00:19.0: enabled 0
2203 12:43:18.332787 PCI: 00:19.1: enabled 1
2204 12:43:18.332870 PCI: 00:19.2: enabled 0
2205 12:43:18.335991 PCI: 00:1a.0: enabled 0
2206 12:43:18.339039 PCI: 00:1c.0: enabled 0
2207 12:43:18.342676 PCI: 00:1c.1: enabled 0
2208 12:43:18.342760 PCI: 00:1c.2: enabled 0
2209 12:43:18.346004 PCI: 00:1c.3: enabled 0
2210 12:43:18.349383 PCI: 00:1c.4: enabled 0
2211 12:43:18.352647 PCI: 00:1c.5: enabled 0
2212 12:43:18.352759 PCI: 00:1c.6: enabled 0
2213 12:43:18.356029 PCI: 00:1c.7: enabled 0
2214 12:43:18.359387 PCI: 00:1d.0: enabled 0
2215 12:43:18.362533 PCI: 00:1d.1: enabled 0
2216 12:43:18.362616 PCI: 00:1d.2: enabled 0
2217 12:43:18.365917 PCI: 00:1d.3: enabled 0
2218 12:43:18.369230 PCI: 00:1e.0: enabled 1
2219 12:43:18.372373 PCI: 00:1e.1: enabled 0
2220 12:43:18.372456 PCI: 00:1e.2: enabled 0
2221 12:43:18.375453 PCI: 00:1e.3: enabled 1
2222 12:43:18.379151 PCI: 00:1f.0: enabled 1
2223 12:43:18.379233 PCI: 00:1f.1: enabled 0
2224 12:43:18.382477 PCI: 00:1f.2: enabled 1
2225 12:43:18.385707 PCI: 00:1f.3: enabled 1
2226 12:43:18.389037 PCI: 00:1f.4: enabled 0
2227 12:43:18.389131 PCI: 00:1f.5: enabled 1
2228 12:43:18.392186 PCI: 00:1f.6: enabled 0
2229 12:43:18.395901 PCI: 00:1f.7: enabled 0
2230 12:43:18.399080 GENERIC: 0.0: enabled 1
2231 12:43:18.399189 GENERIC: 0.0: enabled 1
2232 12:43:18.402358 GENERIC: 1.0: enabled 1
2233 12:43:18.405560 GENERIC: 0.0: enabled 1
2234 12:43:18.408892 GENERIC: 1.0: enabled 1
2235 12:43:18.408974 USB0 port 0: enabled 1
2236 12:43:18.412215 USB0 port 0: enabled 1
2237 12:43:18.415636 GENERIC: 0.0: enabled 1
2238 12:43:18.415721 I2C: 00:1a: enabled 1
2239 12:43:18.418849 I2C: 00:31: enabled 1
2240 12:43:18.422015 I2C: 00:32: enabled 1
2241 12:43:18.422097 I2C: 00:50: enabled 1
2242 12:43:18.425717 I2C: 00:10: enabled 1
2243 12:43:18.428693 I2C: 00:15: enabled 1
2244 12:43:18.428776 I2C: 00:2c: enabled 1
2245 12:43:18.432391 GENERIC: 0.0: enabled 1
2246 12:43:18.435405 SPI: 00: enabled 1
2247 12:43:18.435488 PNP: 0c09.0: enabled 1
2248 12:43:18.438947 GENERIC: 0.0: enabled 1
2249 12:43:18.442165 USB3 port 0: enabled 1
2250 12:43:18.445335 USB3 port 1: enabled 0
2251 12:43:18.445421 USB3 port 2: enabled 1
2252 12:43:18.448561 USB3 port 3: enabled 0
2253 12:43:18.452434 USB2 port 0: enabled 1
2254 12:43:18.452547 USB2 port 1: enabled 0
2255 12:43:18.455694 USB2 port 2: enabled 1
2256 12:43:18.458903 USB2 port 3: enabled 0
2257 12:43:18.462197 USB2 port 4: enabled 0
2258 12:43:18.462280 USB2 port 5: enabled 1
2259 12:43:18.465652 USB2 port 6: enabled 0
2260 12:43:18.468940 USB2 port 7: enabled 0
2261 12:43:18.469023 USB2 port 8: enabled 1
2262 12:43:18.472181 USB2 port 9: enabled 1
2263 12:43:18.475297 USB3 port 0: enabled 1
2264 12:43:18.475418 USB3 port 1: enabled 0
2265 12:43:18.478636 USB3 port 2: enabled 0
2266 12:43:18.481790 USB3 port 3: enabled 0
2267 12:43:18.485666 GENERIC: 0.0: enabled 1
2268 12:43:18.485791 GENERIC: 1.0: enabled 1
2269 12:43:18.488998 APIC: 00: enabled 1
2270 12:43:18.492130 APIC: 12: enabled 1
2271 12:43:18.492213 APIC: 14: enabled 1
2272 12:43:18.495393 APIC: 16: enabled 1
2273 12:43:18.495488 APIC: 10: enabled 1
2274 12:43:18.498498 APIC: 09: enabled 1
2275 12:43:18.502115 APIC: 08: enabled 1
2276 12:43:18.502197 APIC: 01: enabled 1
2277 12:43:18.505485 PCI: 01:00.0: enabled 1
2278 12:43:18.511910 BS: BS_DEV_INIT run times (exec / console): 11 / 1133 ms
2279 12:43:18.515196 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2280 12:43:18.518446 ELOG: NV offset 0xf20000 size 0x4000
2281 12:43:18.526162 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2282 12:43:18.533316 ELOG: Event(17) added with size 13 at 2024-03-05 12:43:18 UTC
2283 12:43:18.539582 ELOG: Event(9E) added with size 10 at 2024-03-05 12:43:18 UTC
2284 12:43:18.546288 ELOG: Event(9F) added with size 14 at 2024-03-05 12:43:18 UTC
2285 12:43:18.553331 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2286 12:43:18.559717 ELOG: Event(A0) added with size 9 at 2024-03-05 12:43:18 UTC
2287 12:43:18.563129 elog_add_boot_reason: Logged dev mode boot
2288 12:43:18.569729 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2289 12:43:18.573072 Finalize devices...
2290 12:43:18.573190 PCI: 00:16.0 final
2291 12:43:18.576385 PCI: 00:1f.2 final
2292 12:43:18.576467 GENERIC: 0.0 final
2293 12:43:18.582815 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2294 12:43:18.586124 GENERIC: 1.0 final
2295 12:43:18.593004 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2296 12:43:18.593089 Devices finalized
2297 12:43:18.599605 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2298 12:43:18.603012 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2299 12:43:18.609340 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2300 12:43:18.616039 ME: HFSTS1 : 0x90000245
2301 12:43:18.619230 ME: HFSTS2 : 0x82100116
2302 12:43:18.623126 ME: HFSTS3 : 0x00000050
2303 12:43:18.629686 ME: HFSTS4 : 0x00004000
2304 12:43:18.633047 ME: HFSTS5 : 0x00000000
2305 12:43:18.636155 ME: HFSTS6 : 0x40600006
2306 12:43:18.639401 ME: Manufacturing Mode : NO
2307 12:43:18.645846 ME: SPI Protection Mode Enabled : YES
2308 12:43:18.649653 ME: FPFs Committed : YES
2309 12:43:18.652732 ME: Manufacturing Vars Locked : YES
2310 12:43:18.656043 ME: FW Partition Table : OK
2311 12:43:18.659084 ME: Bringup Loader Failure : NO
2312 12:43:18.662360 ME: Firmware Init Complete : YES
2313 12:43:18.665949 ME: Boot Options Present : NO
2314 12:43:18.669126 ME: Update In Progress : NO
2315 12:43:18.675968 ME: D0i3 Support : YES
2316 12:43:18.679117 ME: Low Power State Enabled : NO
2317 12:43:18.682507 ME: CPU Replaced : YES
2318 12:43:18.685694 ME: CPU Replacement Valid : YES
2319 12:43:18.689030 ME: Current Working State : 5
2320 12:43:18.692400 ME: Current Operation State : 1
2321 12:43:18.695652 ME: Current Operation Mode : 0
2322 12:43:18.699407 ME: Error Code : 0
2323 12:43:18.705753 ME: Enhanced Debug Mode : NO
2324 12:43:18.709112 ME: CPU Debug Disabled : YES
2325 12:43:18.712303 ME: TXT Support : NO
2326 12:43:18.715480 ME: WP for RO is enabled : YES
2327 12:43:18.721987 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2328 12:43:18.728800 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2329 12:43:18.732218 Ramoops buffer: 0x100000@0x76899000.
2330 12:43:18.735556 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2331 12:43:18.745486 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2332 12:43:18.748657 CBFS: 'fallback/slic' not found.
2333 12:43:18.751939 ACPI: Writing ACPI tables at 7686d000.
2334 12:43:18.752021 ACPI: * FACS
2335 12:43:18.755229 ACPI: * DSDT
2336 12:43:18.761802 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2337 12:43:18.765709 ACPI: * FADT
2338 12:43:18.765798 SCI is IRQ9
2339 12:43:18.768938 ACPI: added table 1/32, length now 40
2340 12:43:18.772033 ACPI: * SSDT
2341 12:43:18.779162 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2342 12:43:18.782480 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2343 12:43:18.788994 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2344 12:43:18.791742 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2345 12:43:18.798424 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2346 12:43:18.801635 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2347 12:43:18.808739 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2348 12:43:18.815387 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2349 12:43:18.818669 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2350 12:43:18.825119 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2351 12:43:18.828415 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2352 12:43:18.834904 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2353 12:43:18.838179 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2354 12:43:18.844657 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2355 12:43:18.851993 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2356 12:43:18.855211 PS2K: Passing 80 keymaps to kernel
2357 12:43:18.861754 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2358 12:43:18.868421 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2359 12:43:18.875291 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2360 12:43:18.881576 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2361 12:43:18.887911 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2362 12:43:18.895132 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2363 12:43:18.898306 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2364 12:43:18.904795 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2365 12:43:18.911362 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2366 12:43:18.918461 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2367 12:43:18.921662 ACPI: added table 2/32, length now 44
2368 12:43:18.924786 ACPI: * MCFG
2369 12:43:18.927801 ACPI: added table 3/32, length now 48
2370 12:43:18.927887 ACPI: * TPM2
2371 12:43:18.931624 TPM2 log created at 0x7685d000
2372 12:43:18.938006 ACPI: added table 4/32, length now 52
2373 12:43:18.938116 ACPI: * LPIT
2374 12:43:18.941162 ACPI: added table 5/32, length now 56
2375 12:43:18.944421 ACPI: * MADT
2376 12:43:18.944506 SCI is IRQ9
2377 12:43:18.948380 ACPI: added table 6/32, length now 60
2378 12:43:18.951777 cmd_reg from pmc_make_ipc_cmd 1052838
2379 12:43:18.958278 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2380 12:43:18.964689 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2381 12:43:18.971441 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2382 12:43:18.974711 PMC CrashLog size in discovery mode: 0xC00
2383 12:43:18.978007 cpu crashlog bar addr: 0x80640000
2384 12:43:18.981077 cpu discovery table offset: 0x6030
2385 12:43:18.988047 cpu_crashlog_discovery_table buffer count: 0x3
2386 12:43:18.994440 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2387 12:43:19.000960 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2388 12:43:19.008036 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2389 12:43:19.011293 PMC crashLog size in discovery mode : 0xC00
2390 12:43:19.017906 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2391 12:43:19.024292 discover mode PMC crashlog size adjusted to: 0x200
2392 12:43:19.030805 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2393 12:43:19.033937 discover mode PMC crashlog size adjusted to: 0x0
2394 12:43:19.037674 m_cpu_crashLog_size : 0x3480 bytes
2395 12:43:19.040527 CPU crashLog present.
2396 12:43:19.044134 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2397 12:43:19.054165 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2398 12:43:19.054251 current = 76876550
2399 12:43:19.057383 ACPI: * DMAR
2400 12:43:19.060572 ACPI: added table 7/32, length now 64
2401 12:43:19.063896 ACPI: added table 8/32, length now 68
2402 12:43:19.067146 ACPI: * HPET
2403 12:43:19.070310 ACPI: added table 9/32, length now 72
2404 12:43:19.070394 ACPI: done.
2405 12:43:19.073632 ACPI tables: 38528 bytes.
2406 12:43:19.077663 smbios_write_tables: 76857000
2407 12:43:19.080849 EC returned error result code 3
2408 12:43:19.084137 Couldn't obtain OEM name from CBI
2409 12:43:19.087109 Create SMBIOS type 16
2410 12:43:19.087195 Create SMBIOS type 17
2411 12:43:19.090320 Create SMBIOS type 20
2412 12:43:19.094110 GENERIC: 0.0 (WIFI Device)
2413 12:43:19.097351 SMBIOS tables: 2156 bytes.
2414 12:43:19.100841 Writing table forward entry at 0x00000500
2415 12:43:19.107239 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2416 12:43:19.110720 Writing coreboot table at 0x76891000
2417 12:43:19.117191 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2418 12:43:19.120557 1. 0000000000001000-000000000009ffff: RAM
2419 12:43:19.127183 2. 00000000000a0000-00000000000fffff: RESERVED
2420 12:43:19.130498 3. 0000000000100000-0000000076856fff: RAM
2421 12:43:19.136934 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2422 12:43:19.140114 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2423 12:43:19.146703 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2424 12:43:19.150502 7. 0000000077000000-00000000803fffff: RESERVED
2425 12:43:19.157140 8. 00000000c0000000-00000000cfffffff: RESERVED
2426 12:43:19.160605 9. 00000000f8000000-00000000f9ffffff: RESERVED
2427 12:43:19.166703 10. 00000000fb000000-00000000fb000fff: RESERVED
2428 12:43:19.170009 11. 00000000fc800000-00000000fe7fffff: RESERVED
2429 12:43:19.177137 12. 00000000feb00000-00000000feb7ffff: RESERVED
2430 12:43:19.180350 13. 00000000fec00000-00000000fecfffff: RESERVED
2431 12:43:19.183610 14. 00000000fed40000-00000000fed6ffff: RESERVED
2432 12:43:19.190218 15. 00000000fed80000-00000000fed87fff: RESERVED
2433 12:43:19.193432 16. 00000000fed90000-00000000fed92fff: RESERVED
2434 12:43:19.199913 17. 00000000feda0000-00000000feda1fff: RESERVED
2435 12:43:19.203099 18. 00000000fedc0000-00000000feddffff: RESERVED
2436 12:43:19.209938 19. 0000000100000000-000000027fbfffff: RAM
2437 12:43:19.210029 Passing 4 GPIOs to payload:
2438 12:43:19.216603 NAME | PORT | POLARITY | VALUE
2439 12:43:19.223336 lid | undefined | high | high
2440 12:43:19.226696 power | undefined | high | low
2441 12:43:19.233233 oprom | undefined | high | low
2442 12:43:19.236390 EC in RW | 0x00000151 | high | high
2443 12:43:19.239683 Board ID: 3
2444 12:43:19.239776 FW config: 0x131
2445 12:43:19.246851 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum 5521
2446 12:43:19.250189 coreboot table: 1788 bytes.
2447 12:43:19.253483 IMD ROOT 0. 0x76fff000 0x00001000
2448 12:43:19.256792 IMD SMALL 1. 0x76ffe000 0x00001000
2449 12:43:19.259542 FSP MEMORY 2. 0x76afe000 0x00500000
2450 12:43:19.266586 CONSOLE 3. 0x76ade000 0x00020000
2451 12:43:19.269745 RW MCACHE 4. 0x76add000 0x0000043c
2452 12:43:19.272941 RO MCACHE 5. 0x76adc000 0x00000fd8
2453 12:43:19.276597 FMAP 6. 0x76adb000 0x0000064a
2454 12:43:19.279524 TIME STAMP 7. 0x76ada000 0x00000910
2455 12:43:19.283051 VBOOT WORK 8. 0x76ac6000 0x00014000
2456 12:43:19.286517 MEM INFO 9. 0x76ac5000 0x000003b8
2457 12:43:19.289870 ROMSTG STCK10. 0x76ac4000 0x00001000
2458 12:43:19.296521 AFTER CAR 11. 0x76ab8000 0x0000c000
2459 12:43:19.299809 RAMSTAGE 12. 0x76a2e000 0x0008a000
2460 12:43:19.303079 ACPI BERT 13. 0x76a1e000 0x00010000
2461 12:43:19.306332 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2462 12:43:19.309984 REFCODE 15. 0x769ae000 0x0006f000
2463 12:43:19.313319 SMM BACKUP 16. 0x7699e000 0x00010000
2464 12:43:19.315996 IGD OPREGION17. 0x76999000 0x00004203
2465 12:43:19.319650 RAMOOPS 18. 0x76899000 0x00100000
2466 12:43:19.326215 COREBOOT 19. 0x76891000 0x00008000
2467 12:43:19.329426 ACPI 20. 0x7686d000 0x00024000
2468 12:43:19.332839 TPM2 TCGLOG21. 0x7685d000 0x00010000
2469 12:43:19.336126 PMC CRASHLOG22. 0x7685c000 0x00000c00
2470 12:43:19.339452 CPU CRASHLOG23. 0x76858000 0x00003480
2471 12:43:19.342789 SMBIOS 24. 0x76857000 0x00001000
2472 12:43:19.346722 IMD small region:
2473 12:43:19.349415 IMD ROOT 0. 0x76ffec00 0x00000400
2474 12:43:19.353232 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2475 12:43:19.355933 VPD 2. 0x76ffeb60 0x0000006c
2476 12:43:19.362669 POWER STATE 3. 0x76ffeb00 0x00000044
2477 12:43:19.366056 ROMSTAGE 4. 0x76ffeae0 0x00000004
2478 12:43:19.369211 ACPI GNVS 5. 0x76ffea80 0x00000048
2479 12:43:19.372595 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2480 12:43:19.379149 BS: BS_WRITE_TABLES run times (exec / console): 7 / 628 ms
2481 12:43:19.382380 MTRR: Physical address space:
2482 12:43:19.389472 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2483 12:43:19.395886 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2484 12:43:19.399495 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2485 12:43:19.405486 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2486 12:43:19.412229 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2487 12:43:19.419166 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2488 12:43:19.425574 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2489 12:43:19.428731 MTRR: Fixed MSR 0x250 0x0606060606060606
2490 12:43:19.431989 MTRR: Fixed MSR 0x258 0x0606060606060606
2491 12:43:19.438884 MTRR: Fixed MSR 0x259 0x0000000000000000
2492 12:43:19.442435 MTRR: Fixed MSR 0x268 0x0606060606060606
2493 12:43:19.445543 MTRR: Fixed MSR 0x269 0x0606060606060606
2494 12:43:19.448829 MTRR: Fixed MSR 0x26a 0x0606060606060606
2495 12:43:19.455529 MTRR: Fixed MSR 0x26b 0x0606060606060606
2496 12:43:19.458906 MTRR: Fixed MSR 0x26c 0x0606060606060606
2497 12:43:19.462183 MTRR: Fixed MSR 0x26d 0x0606060606060606
2498 12:43:19.465636 MTRR: Fixed MSR 0x26e 0x0606060606060606
2499 12:43:19.468969 MTRR: Fixed MSR 0x26f 0x0606060606060606
2500 12:43:19.473561 call enable_fixed_mtrr()
2501 12:43:19.477508 CPU physical address size: 39 bits
2502 12:43:19.483622 MTRR: default type WB/UC MTRR counts: 6/6.
2503 12:43:19.486930 MTRR: UC selected as default type.
2504 12:43:19.493996 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2505 12:43:19.497347 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2506 12:43:19.504030 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2507 12:43:19.510132 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2508 12:43:19.516780 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2509 12:43:19.523307 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2510 12:43:19.529861 MTRR: Fixed MSR 0x250 0x0606060606060606
2511 12:43:19.533774 MTRR: Fixed MSR 0x258 0x0606060606060606
2512 12:43:19.536974 MTRR: Fixed MSR 0x259 0x0000000000000000
2513 12:43:19.540272 MTRR: Fixed MSR 0x268 0x0606060606060606
2514 12:43:19.546462 MTRR: Fixed MSR 0x269 0x0606060606060606
2515 12:43:19.550317 MTRR: Fixed MSR 0x26a 0x0606060606060606
2516 12:43:19.553499 MTRR: Fixed MSR 0x26b 0x0606060606060606
2517 12:43:19.556757 MTRR: Fixed MSR 0x26c 0x0606060606060606
2518 12:43:19.563273 MTRR: Fixed MSR 0x26d 0x0606060606060606
2519 12:43:19.566589 MTRR: Fixed MSR 0x26e 0x0606060606060606
2520 12:43:19.569970 MTRR: Fixed MSR 0x26f 0x0606060606060606
2521 12:43:19.573315 MTRR: Fixed MSR 0x250 0x0606060606060606
2522 12:43:19.576548 call enable_fixed_mtrr()
2523 12:43:19.579822 MTRR: Fixed MSR 0x258 0x0606060606060606
2524 12:43:19.583243 MTRR: Fixed MSR 0x259 0x0000000000000000
2525 12:43:19.589890 MTRR: Fixed MSR 0x268 0x0606060606060606
2526 12:43:19.593064 MTRR: Fixed MSR 0x269 0x0606060606060606
2527 12:43:19.596199 MTRR: Fixed MSR 0x26a 0x0606060606060606
2528 12:43:19.599721 MTRR: Fixed MSR 0x26b 0x0606060606060606
2529 12:43:19.606795 MTRR: Fixed MSR 0x26c 0x0606060606060606
2530 12:43:19.609516 MTRR: Fixed MSR 0x26d 0x0606060606060606
2531 12:43:19.612747 MTRR: Fixed MSR 0x26e 0x0606060606060606
2532 12:43:19.616051 MTRR: Fixed MSR 0x26f 0x0606060606060606
2533 12:43:19.623150 MTRR: Fixed MSR 0x250 0x0606060606060606
2534 12:43:19.626366 MTRR: Fixed MSR 0x250 0x0606060606060606
2535 12:43:19.629354 MTRR: Fixed MSR 0x258 0x0606060606060606
2536 12:43:19.632874 MTRR: Fixed MSR 0x259 0x0000000000000000
2537 12:43:19.639764 MTRR: Fixed MSR 0x268 0x0606060606060606
2538 12:43:19.642929 MTRR: Fixed MSR 0x269 0x0606060606060606
2539 12:43:19.646126 MTRR: Fixed MSR 0x258 0x0606060606060606
2540 12:43:19.649383 MTRR: Fixed MSR 0x259 0x0000000000000000
2541 12:43:19.653329 MTRR: Fixed MSR 0x268 0x0606060606060606
2542 12:43:19.659279 MTRR: Fixed MSR 0x269 0x0606060606060606
2543 12:43:19.663140 MTRR: Fixed MSR 0x250 0x0606060606060606
2544 12:43:19.666490 MTRR: Fixed MSR 0x26a 0x0606060606060606
2545 12:43:19.669758 MTRR: Fixed MSR 0x26b 0x0606060606060606
2546 12:43:19.676474 MTRR: Fixed MSR 0x26c 0x0606060606060606
2547 12:43:19.679625 MTRR: Fixed MSR 0x26d 0x0606060606060606
2548 12:43:19.682940 MTRR: Fixed MSR 0x26e 0x0606060606060606
2549 12:43:19.686359 MTRR: Fixed MSR 0x26f 0x0606060606060606
2550 12:43:19.689684 CPU physical address size: 39 bits
2551 12:43:19.692962 call enable_fixed_mtrr()
2552 12:43:19.696249 MTRR: Fixed MSR 0x26a 0x0606060606060606
2553 12:43:19.702945 MTRR: Fixed MSR 0x258 0x0606060606060606
2554 12:43:19.706019 CPU physical address size: 39 bits
2555 12:43:19.706124 call enable_fixed_mtrr()
2556 12:43:19.712760 MTRR: Fixed MSR 0x259 0x0000000000000000
2557 12:43:19.716124 CPU physical address size: 39 bits
2558 12:43:19.719568 MTRR: Fixed MSR 0x26b 0x0606060606060606
2559 12:43:19.722717 MTRR: Fixed MSR 0x268 0x0606060606060606
2560 12:43:19.725998 MTRR: Fixed MSR 0x269 0x0606060606060606
2561 12:43:19.732980 MTRR: Fixed MSR 0x26a 0x0606060606060606
2562 12:43:19.736119 MTRR: Fixed MSR 0x26b 0x0606060606060606
2563 12:43:19.739299 MTRR: Fixed MSR 0x26c 0x0606060606060606
2564 12:43:19.742331 MTRR: Fixed MSR 0x26d 0x0606060606060606
2565 12:43:19.749325 MTRR: Fixed MSR 0x26e 0x0606060606060606
2566 12:43:19.752418 MTRR: Fixed MSR 0x26f 0x0606060606060606
2567 12:43:19.756010 MTRR: Fixed MSR 0x26c 0x0606060606060606
2568 12:43:19.758989 call enable_fixed_mtrr()
2569 12:43:19.762418 MTRR: Fixed MSR 0x26d 0x0606060606060606
2570 12:43:19.765576 MTRR: Fixed MSR 0x26e 0x0606060606060606
2571 12:43:19.772294 MTRR: Fixed MSR 0x26f 0x0606060606060606
2572 12:43:19.775841 CPU physical address size: 39 bits
2573 12:43:19.775923 call enable_fixed_mtrr()
2574 12:43:19.782518 MTRR: Fixed MSR 0x250 0x0606060606060606
2575 12:43:19.785892 CPU physical address size: 39 bits
2576 12:43:19.789265 MTRR: Fixed MSR 0x258 0x0606060606060606
2577 12:43:19.792506 MTRR: Fixed MSR 0x250 0x0606060606060606
2578 12:43:19.795827 MTRR: Fixed MSR 0x259 0x0000000000000000
2579 12:43:19.802396 MTRR: Fixed MSR 0x268 0x0606060606060606
2580 12:43:19.805664 MTRR: Fixed MSR 0x269 0x0606060606060606
2581 12:43:19.808967 MTRR: Fixed MSR 0x258 0x0606060606060606
2582 12:43:19.812282 MTRR: Fixed MSR 0x259 0x0000000000000000
2583 12:43:19.818520 MTRR: Fixed MSR 0x268 0x0606060606060606
2584 12:43:19.822272 MTRR: Fixed MSR 0x269 0x0606060606060606
2585 12:43:19.825591 MTRR: Fixed MSR 0x26a 0x0606060606060606
2586 12:43:19.828910 MTRR: Fixed MSR 0x26b 0x0606060606060606
2587 12:43:19.832242 MTRR: Fixed MSR 0x26c 0x0606060606060606
2588 12:43:19.838995 MTRR: Fixed MSR 0x26d 0x0606060606060606
2589 12:43:19.842116 MTRR: Fixed MSR 0x26e 0x0606060606060606
2590 12:43:19.845494 MTRR: Fixed MSR 0x26f 0x0606060606060606
2591 12:43:19.849375 MTRR: Fixed MSR 0x26a 0x0606060606060606
2592 12:43:19.852682 call enable_fixed_mtrr()
2593 12:43:19.855666 MTRR: Fixed MSR 0x26b 0x0606060606060606
2594 12:43:19.862759 MTRR: Fixed MSR 0x26c 0x0606060606060606
2595 12:43:19.865927 MTRR: Fixed MSR 0x26d 0x0606060606060606
2596 12:43:19.868949 MTRR: Fixed MSR 0x26e 0x0606060606060606
2597 12:43:19.872186 MTRR: Fixed MSR 0x26f 0x0606060606060606
2598 12:43:19.878819 CPU physical address size: 39 bits
2599 12:43:19.882435 call enable_fixed_mtrr()
2600 12:43:19.885939 CPU physical address size: 39 bits
2601 12:43:19.886082
2602 12:43:19.888948 MTRR check
2603 12:43:19.889031 Fixed MTRRs : Enabled
2604 12:43:19.892461 Variable MTRRs: Enabled
2605 12:43:19.892540
2606 12:43:19.899134 BS: BS_WRITE_TABLES exit times (exec / console): 252 / 150 ms
2607 12:43:19.902530 Checking cr50 for pending updates
2608 12:43:19.913908 Reading cr50 TPM mode
2609 12:43:19.928898 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2610 12:43:19.938693 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2611 12:43:19.942009 Checking segment from ROM address 0xf96cbe6c
2612 12:43:19.945207 Checking segment from ROM address 0xf96cbe88
2613 12:43:19.952306 Loading segment from ROM address 0xf96cbe6c
2614 12:43:19.952389 code (compression=1)
2615 12:43:19.962104 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2616 12:43:19.968216 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2617 12:43:19.971532 using LZMA
2618 12:43:19.994429 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2619 12:43:20.000690 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2620 12:43:20.008786 Loading segment from ROM address 0xf96cbe88
2621 12:43:20.012225 Entry Point 0x30000000
2622 12:43:20.012311 Loaded segments
2623 12:43:20.018944 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2624 12:43:20.025560 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2625 12:43:20.028807 Finalizing chipset.
2626 12:43:20.028893 apm_control: Finalizing SMM.
2627 12:43:20.032276 APMC done.
2628 12:43:20.035939 HECI: CSE device 16.1 is disabled
2629 12:43:20.038969 HECI: CSE device 16.2 is disabled
2630 12:43:20.042113 HECI: CSE device 16.3 is disabled
2631 12:43:20.045394 HECI: CSE device 16.4 is disabled
2632 12:43:20.048817 HECI: CSE device 16.5 is disabled
2633 12:43:20.051978 HECI: Sending End-of-Post
2634 12:43:20.060637 CSE: EOP requested action: continue boot
2635 12:43:20.064065 CSE EOP successful, continuing boot
2636 12:43:20.070704 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2637 12:43:20.074014 mp_park_aps done after 0 msecs.
2638 12:43:20.077297 Jumping to boot code at 0x30000000(0x76891000)
2639 12:43:20.086740 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2640 12:43:20.091029
2641 12:43:20.091134
2642 12:43:20.091226
2643 12:43:20.094867 Starting depthcharge on Volmar...
2644 12:43:20.094981
2645 12:43:20.095514 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2646 12:43:20.095656 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2647 12:43:20.095810 Setting prompt string to ['brya:']
2648 12:43:20.095986 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2649 12:43:20.101254 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2650 12:43:20.101402
2651 12:43:20.107706 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2652 12:43:20.107824
2653 12:43:20.114572 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2654 12:43:20.114710
2655 12:43:20.118015 configure_storage: Failed to remap 1C:2
2656 12:43:20.118142
2657 12:43:20.121520 Wipe memory regions:
2658 12:43:20.121616
2659 12:43:20.124735 [0x00000000001000, 0x000000000a0000)
2660 12:43:20.124835
2661 12:43:20.128048 [0x00000000100000, 0x00000030000000)
2662 12:43:20.232974
2663 12:43:20.235586 [0x00000032668e60, 0x00000076857000)
2664 12:43:20.382973
2665 12:43:20.386162 [0x00000100000000, 0x0000027fc00000)
2666 12:43:21.206807
2667 12:43:21.210199 ec_init: CrosEC protocol v3 supported (256, 256)
2668 12:43:21.819299
2669 12:43:21.819472 R8152: Initializing
2670 12:43:21.819571
2671 12:43:21.822460 Version 9 (ocp_data = 6010)
2672 12:43:21.822571
2673 12:43:21.825627 R8152: Done initializing
2674 12:43:21.825729
2675 12:43:21.828955 Adding net device
2676 12:43:22.130337
2677 12:43:22.133015 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2678 12:43:22.133130
2679 12:43:22.133238
2680 12:43:22.133331
2681 12:43:22.133656 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2683 12:43:22.234048 brya: tftpboot 192.168.201.1 12948314/tftp-deploy-rz6b3823/kernel/bzImage 12948314/tftp-deploy-rz6b3823/kernel/cmdline 12948314/tftp-deploy-rz6b3823/ramdisk/ramdisk.cpio.gz
2684 12:43:22.234206 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2685 12:43:22.234291 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2686 12:43:22.238389 tftpboot 192.168.201.1 12948314/tftp-deploy-rz6b3823/kernel/bzImaploy-rz6b3823/kernel/cmdline 12948314/tftp-deploy-rz6b3823/ramdisk/ramdisk.cpio.gz
2687 12:43:22.238477
2688 12:43:22.238543 Waiting for link
2689 12:43:22.442112
2690 12:43:22.442276 done.
2691 12:43:22.442376
2692 12:43:22.442464 MAC: 00:e0:4c:68:02:be
2693 12:43:22.442526
2694 12:43:22.445497 Sending DHCP discover... done.
2695 12:43:22.445582
2696 12:43:22.448912 Waiting for reply... done.
2697 12:43:22.448995
2698 12:43:22.453364 Sending DHCP request... done.
2699 12:43:22.453461
2700 12:43:22.458214 Waiting for reply... done.
2701 12:43:22.458296
2702 12:43:22.458360 My ip is 192.168.201.17
2703 12:43:22.458420
2704 12:43:22.461454 The DHCP server ip is 192.168.201.1
2705 12:43:22.461567
2706 12:43:22.468515 TFTP server IP predefined by user: 192.168.201.1
2707 12:43:22.468620
2708 12:43:22.474869 Bootfile predefined by user: 12948314/tftp-deploy-rz6b3823/kernel/bzImage
2709 12:43:22.474953
2710 12:43:22.478126 Sending tftp read request... done.
2711 12:43:22.478208
2712 12:43:22.481372 Waiting for the transfer...
2713 12:43:22.481472
2714 12:43:22.734065 00000000 ################################################################
2715 12:43:22.734248
2716 12:43:22.976242 00080000 ################################################################
2717 12:43:22.976379
2718 12:43:23.220261 00100000 ################################################################
2719 12:43:23.220413
2720 12:43:23.483195 00180000 ################################################################
2721 12:43:23.483443
2722 12:43:23.732914 00200000 ################################################################
2723 12:43:23.733091
2724 12:43:24.056134 00280000 ################################################################
2725 12:43:24.056335
2726 12:43:24.238442 00300000 ################################################################
2727 12:43:24.238618
2728 12:43:24.490580 00380000 ################################################################
2729 12:43:24.490723
2730 12:43:24.738391 00400000 ################################################################
2731 12:43:24.738534
2732 12:43:24.983176 00480000 ################################################################
2733 12:43:24.983363
2734 12:43:25.229903 00500000 ################################################################
2735 12:43:25.230090
2736 12:43:25.505197 00580000 ################################################################
2737 12:43:25.505339
2738 12:43:25.784597 00600000 ################################################################
2739 12:43:25.784738
2740 12:43:26.044493 00680000 ################################################################
2741 12:43:26.044643
2742 12:43:26.288573 00700000 ################################################################
2743 12:43:26.288712
2744 12:43:26.536416 00780000 ################################################################
2745 12:43:26.536553
2746 12:43:26.785140 00800000 ################################################################
2747 12:43:26.785305
2748 12:43:26.998489 00880000 ######################################################## done.
2749 12:43:26.998651
2750 12:43:27.001805 The bootfile was 9367440 bytes long.
2751 12:43:27.001910
2752 12:43:27.005132 Sending tftp read request... done.
2753 12:43:27.005237
2754 12:43:27.008480 Waiting for the transfer...
2755 12:43:27.008583
2756 12:43:27.265918 00000000 ################################################################
2757 12:43:27.266057
2758 12:43:27.511497 00080000 ################################################################
2759 12:43:27.511638
2760 12:43:27.766905 00100000 ################################################################
2761 12:43:27.767045
2762 12:43:28.017424 00180000 ################################################################
2763 12:43:28.017576
2764 12:43:28.264460 00200000 ################################################################
2765 12:43:28.264592
2766 12:43:28.510583 00280000 ################################################################
2767 12:43:28.510715
2768 12:43:28.763371 00300000 ################################################################
2769 12:43:28.763507
2770 12:43:29.017683 00380000 ################################################################
2771 12:43:29.017861
2772 12:43:29.264313 00400000 ################################################################
2773 12:43:29.264454
2774 12:43:29.511640 00480000 ################################################################
2775 12:43:29.511780
2776 12:43:29.753301 00500000 ############################################################### done.
2777 12:43:29.756866
2778 12:43:29.759680 Sending tftp read request... done.
2779 12:43:29.759761
2780 12:43:29.759834 Waiting for the transfer...
2781 12:43:29.759904
2782 12:43:29.763421 00000000 # done.
2783 12:43:29.763515
2784 12:43:29.773575 Command line loaded dynamically from TFTP file: 12948314/tftp-deploy-rz6b3823/kernel/cmdline
2785 12:43:29.773693
2786 12:43:29.796283 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12948314/extract-nfsrootfs-hlbcjyow,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2787 12:43:29.802461
2788 12:43:29.805595 Shutting down all USB controllers.
2789 12:43:29.805704
2790 12:43:29.805806 Removing current net device
2791 12:43:29.805897
2792 12:43:29.809008 Finalizing coreboot
2793 12:43:29.809122
2794 12:43:29.815609 Exiting depthcharge with code 4 at timestamp: 19973195
2795 12:43:29.815727
2796 12:43:29.815821
2797 12:43:29.815911 Starting kernel ...
2798 12:43:29.816010
2799 12:43:29.816078
2800 12:43:29.816455 end: 2.2.4 bootloader-commands (duration 00:00:10) [common]
2801 12:43:29.816559 start: 2.2.5 auto-login-action (timeout 00:04:31) [common]
2802 12:43:29.816636 Setting prompt string to ['Linux version [0-9]']
2803 12:43:29.816705 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2804 12:43:29.816773 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2806 12:48:00.816795 end: 2.2.5 auto-login-action (duration 00:04:31) [common]
2808 12:48:00.817100 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 271 seconds'
2810 12:48:00.817358 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2813 12:48:00.817799 end: 2 depthcharge-action (duration 00:05:00) [common]
2815 12:48:00.818051 Cleaning after the job
2816 12:48:00.818150 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12948314/tftp-deploy-rz6b3823/ramdisk
2817 12:48:00.819117 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12948314/tftp-deploy-rz6b3823/kernel
2818 12:48:00.820720 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12948314/tftp-deploy-rz6b3823/nfsrootfs
2819 12:48:00.904105 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12948314/tftp-deploy-rz6b3823/modules
2820 12:48:00.904578 start: 5.1 power-off (timeout 00:00:30) [common]
2821 12:48:00.904753 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-6' '--port=1' '--command=off'
2822 12:48:00.980381 >> Command sent successfully.
2823 12:48:00.982747 Returned 0 in 0 seconds
2824 12:48:01.083159 end: 5.1 power-off (duration 00:00:00) [common]
2826 12:48:01.083530 start: 5.2 read-feedback (timeout 00:10:00) [common]
2827 12:48:01.083811 Listened to connection for namespace 'common' for up to 1s
2829 12:48:01.084213 Listened to connection for namespace 'common' for up to 1s
2830 12:48:02.084736 Finalising connection for namespace 'common'
2831 12:48:02.084925 Disconnecting from shell: Finalise
2832 12:48:02.085027
2833 12:48:02.185811 end: 5.2 read-feedback (duration 00:00:01) [common]
2834 12:48:02.186420 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12948314
2835 12:48:02.531580 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12948314
2836 12:48:02.531776 JobError: Your job cannot terminate cleanly.