Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 12:45:08.524779 lava-dispatcher, installed at version: 2024.01
2 12:45:08.525002 start: 0 validate
3 12:45:08.525146 Start time: 2024-03-05 12:45:08.525137+00:00 (UTC)
4 12:45:08.525282 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:45:08.525421 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20240129.0%2Famd64%2Finitrd.cpio.gz exists
6 12:45:08.794139 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:45:08.794796 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2247-g140bf69dc64d%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:45:09.058108 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:45:09.058781 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20240129.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:45:13.228731 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:45:13.229485 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2247-g140bf69dc64d%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 12:45:13.494666 validate duration: 4.97
14 12:45:13.494985 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:45:13.495093 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:45:13.495190 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:45:13.495324 Not decompressing ramdisk as can be used compressed.
18 12:45:13.495419 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20240129.0/amd64/initrd.cpio.gz
19 12:45:13.495490 saving as /var/lib/lava/dispatcher/tmp/12948281/tftp-deploy-sb4vjq43/ramdisk/initrd.cpio.gz
20 12:45:13.495562 total size: 5431448 (5 MB)
21 12:45:14.002428 progress 0 % (0 MB)
22 12:45:14.009860 progress 5 % (0 MB)
23 12:45:14.014683 progress 10 % (0 MB)
24 12:45:14.018521 progress 15 % (0 MB)
25 12:45:14.022033 progress 20 % (1 MB)
26 12:45:14.024926 progress 25 % (1 MB)
27 12:45:14.027446 progress 30 % (1 MB)
28 12:45:14.030143 progress 35 % (1 MB)
29 12:45:14.032277 progress 40 % (2 MB)
30 12:45:14.034331 progress 45 % (2 MB)
31 12:45:14.036449 progress 50 % (2 MB)
32 12:45:14.038534 progress 55 % (2 MB)
33 12:45:14.040422 progress 60 % (3 MB)
34 12:45:14.042191 progress 65 % (3 MB)
35 12:45:14.044138 progress 70 % (3 MB)
36 12:45:14.045872 progress 75 % (3 MB)
37 12:45:14.047522 progress 80 % (4 MB)
38 12:45:14.049164 progress 85 % (4 MB)
39 12:45:14.051019 progress 90 % (4 MB)
40 12:45:14.052591 progress 95 % (4 MB)
41 12:45:14.054177 progress 100 % (5 MB)
42 12:45:14.054407 5 MB downloaded in 0.56 s (9.27 MB/s)
43 12:45:14.054582 end: 1.1.1 http-download (duration 00:00:01) [common]
45 12:45:14.054852 end: 1.1 download-retry (duration 00:00:01) [common]
46 12:45:14.054947 start: 1.2 download-retry (timeout 00:09:59) [common]
47 12:45:14.055039 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 12:45:14.055191 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2247-g140bf69dc64d/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 12:45:14.055271 saving as /var/lib/lava/dispatcher/tmp/12948281/tftp-deploy-sb4vjq43/kernel/bzImage
50 12:45:14.055337 total size: 9367440 (8 MB)
51 12:45:14.055404 No compression specified
52 12:45:14.056885 progress 0 % (0 MB)
53 12:45:14.059701 progress 5 % (0 MB)
54 12:45:14.062490 progress 10 % (0 MB)
55 12:45:14.065250 progress 15 % (1 MB)
56 12:45:14.068175 progress 20 % (1 MB)
57 12:45:14.070909 progress 25 % (2 MB)
58 12:45:14.073641 progress 30 % (2 MB)
59 12:45:14.076582 progress 35 % (3 MB)
60 12:45:14.079304 progress 40 % (3 MB)
61 12:45:14.082043 progress 45 % (4 MB)
62 12:45:14.084795 progress 50 % (4 MB)
63 12:45:14.087670 progress 55 % (4 MB)
64 12:45:14.090385 progress 60 % (5 MB)
65 12:45:14.093052 progress 65 % (5 MB)
66 12:45:14.095951 progress 70 % (6 MB)
67 12:45:14.098652 progress 75 % (6 MB)
68 12:45:14.101319 progress 80 % (7 MB)
69 12:45:14.104006 progress 85 % (7 MB)
70 12:45:14.106861 progress 90 % (8 MB)
71 12:45:14.109588 progress 95 % (8 MB)
72 12:45:14.112318 progress 100 % (8 MB)
73 12:45:14.112570 8 MB downloaded in 0.06 s (156.10 MB/s)
74 12:45:14.112730 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:45:14.112995 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:45:14.113093 start: 1.3 download-retry (timeout 00:09:59) [common]
78 12:45:14.113186 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 12:45:14.113337 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20240129.0/amd64/full.rootfs.tar.xz
80 12:45:14.113412 saving as /var/lib/lava/dispatcher/tmp/12948281/tftp-deploy-sb4vjq43/nfsrootfs/full.rootfs.tar
81 12:45:14.113479 total size: 133429172 (127 MB)
82 12:45:14.113545 Using unxz to decompress xz
83 12:45:14.118361 progress 0 % (0 MB)
84 12:45:14.496864 progress 5 % (6 MB)
85 12:45:14.891832 progress 10 % (12 MB)
86 12:45:15.217266 progress 15 % (19 MB)
87 12:45:15.420134 progress 20 % (25 MB)
88 12:45:15.690180 progress 25 % (31 MB)
89 12:45:16.081097 progress 30 % (38 MB)
90 12:45:16.464541 progress 35 % (44 MB)
91 12:45:16.913391 progress 40 % (50 MB)
92 12:45:17.350660 progress 45 % (57 MB)
93 12:45:17.751457 progress 50 % (63 MB)
94 12:45:18.176962 progress 55 % (70 MB)
95 12:45:18.583399 progress 60 % (76 MB)
96 12:45:19.001880 progress 65 % (82 MB)
97 12:45:19.413081 progress 70 % (89 MB)
98 12:45:19.822976 progress 75 % (95 MB)
99 12:45:20.318518 progress 80 % (101 MB)
100 12:45:20.810335 progress 85 % (108 MB)
101 12:45:21.107823 progress 90 % (114 MB)
102 12:45:21.497803 progress 95 % (120 MB)
103 12:45:21.937024 progress 100 % (127 MB)
104 12:45:21.943977 127 MB downloaded in 7.83 s (16.25 MB/s)
105 12:45:21.944278 end: 1.3.1 http-download (duration 00:00:08) [common]
107 12:45:21.944581 end: 1.3 download-retry (duration 00:00:08) [common]
108 12:45:21.944683 start: 1.4 download-retry (timeout 00:09:52) [common]
109 12:45:21.944783 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 12:45:21.944953 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2247-g140bf69dc64d/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 12:45:21.945036 saving as /var/lib/lava/dispatcher/tmp/12948281/tftp-deploy-sb4vjq43/modules/modules.tar
112 12:45:21.945105 total size: 251176 (0 MB)
113 12:45:21.945177 Using unxz to decompress xz
114 12:45:21.949891 progress 13 % (0 MB)
115 12:45:21.950340 progress 26 % (0 MB)
116 12:45:21.950613 progress 39 % (0 MB)
117 12:45:21.952348 progress 52 % (0 MB)
118 12:45:21.954529 progress 65 % (0 MB)
119 12:45:21.956602 progress 78 % (0 MB)
120 12:45:21.958764 progress 91 % (0 MB)
121 12:45:21.960800 progress 100 % (0 MB)
122 12:45:21.966862 0 MB downloaded in 0.02 s (11.01 MB/s)
123 12:45:21.967120 end: 1.4.1 http-download (duration 00:00:00) [common]
125 12:45:21.967419 end: 1.4 download-retry (duration 00:00:00) [common]
126 12:45:21.967528 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
127 12:45:21.967637 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
128 12:45:24.416978 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12948281/extract-nfsrootfs-_0oezat8
129 12:45:24.417195 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 12:45:24.417312 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
131 12:45:24.417489 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12948281/lava-overlay-2q6q064s
132 12:45:24.417635 makedir: /var/lib/lava/dispatcher/tmp/12948281/lava-overlay-2q6q064s/lava-12948281/bin
133 12:45:24.417751 makedir: /var/lib/lava/dispatcher/tmp/12948281/lava-overlay-2q6q064s/lava-12948281/tests
134 12:45:24.417862 makedir: /var/lib/lava/dispatcher/tmp/12948281/lava-overlay-2q6q064s/lava-12948281/results
135 12:45:24.417973 Creating /var/lib/lava/dispatcher/tmp/12948281/lava-overlay-2q6q064s/lava-12948281/bin/lava-add-keys
136 12:45:24.418135 Creating /var/lib/lava/dispatcher/tmp/12948281/lava-overlay-2q6q064s/lava-12948281/bin/lava-add-sources
137 12:45:24.418282 Creating /var/lib/lava/dispatcher/tmp/12948281/lava-overlay-2q6q064s/lava-12948281/bin/lava-background-process-start
138 12:45:24.418431 Creating /var/lib/lava/dispatcher/tmp/12948281/lava-overlay-2q6q064s/lava-12948281/bin/lava-background-process-stop
139 12:45:24.418574 Creating /var/lib/lava/dispatcher/tmp/12948281/lava-overlay-2q6q064s/lava-12948281/bin/lava-common-functions
140 12:45:24.418716 Creating /var/lib/lava/dispatcher/tmp/12948281/lava-overlay-2q6q064s/lava-12948281/bin/lava-echo-ipv4
141 12:45:24.418859 Creating /var/lib/lava/dispatcher/tmp/12948281/lava-overlay-2q6q064s/lava-12948281/bin/lava-install-packages
142 12:45:24.419001 Creating /var/lib/lava/dispatcher/tmp/12948281/lava-overlay-2q6q064s/lava-12948281/bin/lava-installed-packages
143 12:45:24.419145 Creating /var/lib/lava/dispatcher/tmp/12948281/lava-overlay-2q6q064s/lava-12948281/bin/lava-os-build
144 12:45:24.419287 Creating /var/lib/lava/dispatcher/tmp/12948281/lava-overlay-2q6q064s/lava-12948281/bin/lava-probe-channel
145 12:45:24.419429 Creating /var/lib/lava/dispatcher/tmp/12948281/lava-overlay-2q6q064s/lava-12948281/bin/lava-probe-ip
146 12:45:24.419570 Creating /var/lib/lava/dispatcher/tmp/12948281/lava-overlay-2q6q064s/lava-12948281/bin/lava-target-ip
147 12:45:24.419709 Creating /var/lib/lava/dispatcher/tmp/12948281/lava-overlay-2q6q064s/lava-12948281/bin/lava-target-mac
148 12:45:24.419853 Creating /var/lib/lava/dispatcher/tmp/12948281/lava-overlay-2q6q064s/lava-12948281/bin/lava-target-storage
149 12:45:24.419999 Creating /var/lib/lava/dispatcher/tmp/12948281/lava-overlay-2q6q064s/lava-12948281/bin/lava-test-case
150 12:45:24.420146 Creating /var/lib/lava/dispatcher/tmp/12948281/lava-overlay-2q6q064s/lava-12948281/bin/lava-test-event
151 12:45:24.420300 Creating /var/lib/lava/dispatcher/tmp/12948281/lava-overlay-2q6q064s/lava-12948281/bin/lava-test-feedback
152 12:45:24.420445 Creating /var/lib/lava/dispatcher/tmp/12948281/lava-overlay-2q6q064s/lava-12948281/bin/lava-test-raise
153 12:45:24.420592 Creating /var/lib/lava/dispatcher/tmp/12948281/lava-overlay-2q6q064s/lava-12948281/bin/lava-test-reference
154 12:45:24.420736 Creating /var/lib/lava/dispatcher/tmp/12948281/lava-overlay-2q6q064s/lava-12948281/bin/lava-test-runner
155 12:45:24.420879 Creating /var/lib/lava/dispatcher/tmp/12948281/lava-overlay-2q6q064s/lava-12948281/bin/lava-test-set
156 12:45:24.421020 Creating /var/lib/lava/dispatcher/tmp/12948281/lava-overlay-2q6q064s/lava-12948281/bin/lava-test-shell
157 12:45:24.421162 Updating /var/lib/lava/dispatcher/tmp/12948281/lava-overlay-2q6q064s/lava-12948281/bin/lava-install-packages (oe)
158 12:45:24.421333 Updating /var/lib/lava/dispatcher/tmp/12948281/lava-overlay-2q6q064s/lava-12948281/bin/lava-installed-packages (oe)
159 12:45:24.421472 Creating /var/lib/lava/dispatcher/tmp/12948281/lava-overlay-2q6q064s/lava-12948281/environment
160 12:45:24.421585 LAVA metadata
161 12:45:24.421664 - LAVA_JOB_ID=12948281
162 12:45:24.421735 - LAVA_DISPATCHER_IP=192.168.201.1
163 12:45:24.421851 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
164 12:45:24.421926 skipped lava-vland-overlay
165 12:45:24.422009 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 12:45:24.422098 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
167 12:45:24.422165 skipped lava-multinode-overlay
168 12:45:24.422255 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 12:45:24.422342 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
170 12:45:24.422423 Loading test definitions
171 12:45:24.422520 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:49) [common]
172 12:45:24.422599 Using /lava-12948281 at stage 0
173 12:45:24.422937 uuid=12948281_1.5.2.3.1 testdef=None
174 12:45:24.423037 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 12:45:24.423132 start: 1.5.2.3.2 test-overlay (timeout 00:09:49) [common]
176 12:45:24.423700 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 12:45:24.423944 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:49) [common]
179 12:45:24.424740 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 12:45:24.424996 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
182 12:45:24.425695 runner path: /var/lib/lava/dispatcher/tmp/12948281/lava-overlay-2q6q064s/lava-12948281/0/tests/0_dmesg test_uuid 12948281_1.5.2.3.1
183 12:45:24.425876 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 12:45:24.426126 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:49) [common]
186 12:45:24.426207 Using /lava-12948281 at stage 1
187 12:45:24.426539 uuid=12948281_1.5.2.3.5 testdef=None
188 12:45:24.426637 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 12:45:24.426730 start: 1.5.2.3.6 test-overlay (timeout 00:09:49) [common]
190 12:45:24.427254 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 12:45:24.427492 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:49) [common]
193 12:45:24.428215 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 12:45:24.428483 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:49) [common]
196 12:45:24.429185 runner path: /var/lib/lava/dispatcher/tmp/12948281/lava-overlay-2q6q064s/lava-12948281/1/tests/1_bootrr test_uuid 12948281_1.5.2.3.5
197 12:45:24.429355 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 12:45:24.429582 Creating lava-test-runner.conf files
200 12:45:24.429652 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12948281/lava-overlay-2q6q064s/lava-12948281/0 for stage 0
201 12:45:24.429753 - 0_dmesg
202 12:45:24.429840 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12948281/lava-overlay-2q6q064s/lava-12948281/1 for stage 1
203 12:45:24.429942 - 1_bootrr
204 12:45:24.430046 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 12:45:24.430140 start: 1.5.2.4 compress-overlay (timeout 00:09:49) [common]
206 12:45:24.438300 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 12:45:24.438413 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:49) [common]
208 12:45:24.438523 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 12:45:24.438620 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 12:45:24.438715 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:49) [common]
211 12:45:24.590914 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 12:45:24.591347 start: 1.5.4 extract-modules (timeout 00:09:49) [common]
213 12:45:24.591480 extracting modules file /var/lib/lava/dispatcher/tmp/12948281/tftp-deploy-sb4vjq43/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12948281/extract-nfsrootfs-_0oezat8
214 12:45:24.606642 extracting modules file /var/lib/lava/dispatcher/tmp/12948281/tftp-deploy-sb4vjq43/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12948281/extract-overlay-ramdisk-mphi1j25/ramdisk
215 12:45:24.621867 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 12:45:24.622021 start: 1.5.5 apply-overlay-tftp (timeout 00:09:49) [common]
217 12:45:24.622130 [common] Applying overlay to NFS
218 12:45:24.622214 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12948281/compress-overlay-x47lztel/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12948281/extract-nfsrootfs-_0oezat8
219 12:45:24.631397 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 12:45:24.631524 start: 1.5.6 configure-preseed-file (timeout 00:09:49) [common]
221 12:45:24.631627 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 12:45:24.631729 start: 1.5.7 compress-ramdisk (timeout 00:09:49) [common]
223 12:45:24.631817 Building ramdisk /var/lib/lava/dispatcher/tmp/12948281/extract-overlay-ramdisk-mphi1j25/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12948281/extract-overlay-ramdisk-mphi1j25/ramdisk
224 12:45:24.710148 >> 26151 blocks
225 12:45:25.307521 rename /var/lib/lava/dispatcher/tmp/12948281/extract-overlay-ramdisk-mphi1j25/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12948281/tftp-deploy-sb4vjq43/ramdisk/ramdisk.cpio.gz
226 12:45:25.308006 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 12:45:25.308153 start: 1.5.8 prepare-kernel (timeout 00:09:48) [common]
228 12:45:25.308276 start: 1.5.8.1 prepare-fit (timeout 00:09:48) [common]
229 12:45:25.308386 No mkimage arch provided, not using FIT.
230 12:45:25.308491 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 12:45:25.308588 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 12:45:25.308715 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 12:45:25.308819 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:48) [common]
234 12:45:25.308918 No LXC device requested
235 12:45:25.309009 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 12:45:25.309111 start: 1.7 deploy-device-env (timeout 00:09:48) [common]
237 12:45:25.309203 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 12:45:25.309287 Checking files for TFTP limit of 4294967296 bytes.
239 12:45:25.309751 end: 1 tftp-deploy (duration 00:00:12) [common]
240 12:45:25.309870 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 12:45:25.309970 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 12:45:25.310112 substitutions:
243 12:45:25.310186 - {DTB}: None
244 12:45:25.310255 - {INITRD}: 12948281/tftp-deploy-sb4vjq43/ramdisk/ramdisk.cpio.gz
245 12:45:25.310322 - {KERNEL}: 12948281/tftp-deploy-sb4vjq43/kernel/bzImage
246 12:45:25.310387 - {LAVA_MAC}: None
247 12:45:25.310454 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12948281/extract-nfsrootfs-_0oezat8
248 12:45:25.310521 - {NFS_SERVER_IP}: 192.168.201.1
249 12:45:25.310584 - {PRESEED_CONFIG}: None
250 12:45:25.310647 - {PRESEED_LOCAL}: None
251 12:45:25.310710 - {RAMDISK}: 12948281/tftp-deploy-sb4vjq43/ramdisk/ramdisk.cpio.gz
252 12:45:25.310772 - {ROOT_PART}: None
253 12:45:25.310834 - {ROOT}: None
254 12:45:25.310896 - {SERVER_IP}: 192.168.201.1
255 12:45:25.310956 - {TEE}: None
256 12:45:25.311017 Parsed boot commands:
257 12:45:25.311077 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 12:45:25.311282 Parsed boot commands: tftpboot 192.168.201.1 12948281/tftp-deploy-sb4vjq43/kernel/bzImage 12948281/tftp-deploy-sb4vjq43/kernel/cmdline 12948281/tftp-deploy-sb4vjq43/ramdisk/ramdisk.cpio.gz
259 12:45:25.311381 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 12:45:25.311481 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 12:45:25.311588 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 12:45:25.311684 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 12:45:25.311762 Not connected, no need to disconnect.
264 12:45:25.311847 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 12:45:25.311941 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 12:45:25.312018 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-4'
267 12:45:25.316371 Setting prompt string to ['lava-test: # ']
268 12:45:25.316781 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 12:45:25.316908 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 12:45:25.317020 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 12:45:25.317122 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 12:45:25.317336 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
273 12:45:30.472693 >> Command sent successfully.
274 12:45:30.482849 Returned 0 in 5 seconds
275 12:45:30.584022 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 12:45:30.585379 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 12:45:30.585849 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 12:45:30.586262 Setting prompt string to 'Starting depthcharge on Helios...'
280 12:45:30.586591 Changing prompt to 'Starting depthcharge on Helios...'
281 12:45:30.586921 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
282 12:45:30.588053 [Enter `^Ec?' for help]
283 12:45:31.198448
284 12:45:31.198991
285 12:45:31.208618 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
286 12:45:31.212322 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
287 12:45:31.218674 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
288 12:45:31.221861 CPU: AES supported, TXT NOT supported, VT supported
289 12:45:31.229022 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
290 12:45:31.232368 PCH: device id 0284 (rev 00) is Cometlake-U Premium
291 12:45:31.239751 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
292 12:45:31.242982 VBOOT: Loading verstage.
293 12:45:31.246128 FMAP: Found "FLASH" version 1.1 at 0xc04000.
294 12:45:31.252552 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
295 12:45:31.256031 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
296 12:45:31.258847 CBFS @ c08000 size 3f8000
297 12:45:31.266269 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
298 12:45:31.269122 CBFS: Locating 'fallback/verstage'
299 12:45:31.272393 CBFS: Found @ offset 10fb80 size 1072c
300 12:45:31.272828
301 12:45:31.273168
302 12:45:31.285745 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
303 12:45:31.299837 Probing TPM: . done!
304 12:45:31.302982 TPM ready after 0 ms
305 12:45:31.306223 Connected to device vid:did:rid of 1ae0:0028:00
306 12:45:31.316369 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
307 12:45:31.319781 Initialized TPM device CR50 revision 0
308 12:45:31.365729 tlcl_send_startup: Startup return code is 0
309 12:45:31.366250 TPM: setup succeeded
310 12:45:31.378325 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
311 12:45:31.381979 Chrome EC: UHEPI supported
312 12:45:31.385075 Phase 1
313 12:45:31.388514 FMAP: area GBB found @ c05000 (12288 bytes)
314 12:45:31.395152 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
315 12:45:31.395547 Phase 2
316 12:45:31.398837 Phase 3
317 12:45:31.401937 FMAP: area GBB found @ c05000 (12288 bytes)
318 12:45:31.408562 VB2:vb2_report_dev_firmware() This is developer signed firmware
319 12:45:31.415460 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
320 12:45:31.418576 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
321 12:45:31.425329 VB2:vb2_verify_keyblock() Checking keyblock signature...
322 12:45:31.440731 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
323 12:45:31.443905 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
324 12:45:31.450582 VB2:vb2_verify_fw_preamble() Verifying preamble.
325 12:45:31.455120 Phase 4
326 12:45:31.458043 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
327 12:45:31.464601 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
328 12:45:31.644377 VB2:vb2_rsa_verify_digest() Digest check failed!
329 12:45:31.648305 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
330 12:45:31.651400 Saving nvdata
331 12:45:31.654406 Reboot requested (10020007)
332 12:45:31.657651 board_reset() called!
333 12:45:31.658078 full_reset() called!
334 12:45:36.166364
335 12:45:36.166889
336 12:45:36.176581 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
337 12:45:36.179734 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
338 12:45:36.186113 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
339 12:45:36.189776 CPU: AES supported, TXT NOT supported, VT supported
340 12:45:36.196399 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
341 12:45:36.200079 PCH: device id 0284 (rev 00) is Cometlake-U Premium
342 12:45:36.206301 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
343 12:45:36.209550 VBOOT: Loading verstage.
344 12:45:36.213567 FMAP: Found "FLASH" version 1.1 at 0xc04000.
345 12:45:36.219612 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
346 12:45:36.223135 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
347 12:45:36.226277 CBFS @ c08000 size 3f8000
348 12:45:36.233206 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
349 12:45:36.236871 CBFS: Locating 'fallback/verstage'
350 12:45:36.239283 CBFS: Found @ offset 10fb80 size 1072c
351 12:45:36.243238
352 12:45:36.243663
353 12:45:36.253436 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
354 12:45:36.267721 Probing TPM: . done!
355 12:45:36.271009 TPM ready after 0 ms
356 12:45:36.274377 Connected to device vid:did:rid of 1ae0:0028:00
357 12:45:36.284399 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
358 12:45:36.288599 Initialized TPM device CR50 revision 0
359 12:45:36.333987 tlcl_send_startup: Startup return code is 0
360 12:45:36.334513 TPM: setup succeeded
361 12:45:36.346423 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
362 12:45:36.349797 Chrome EC: UHEPI supported
363 12:45:36.353374 Phase 1
364 12:45:36.356626 FMAP: area GBB found @ c05000 (12288 bytes)
365 12:45:36.363521 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
366 12:45:36.370037 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
367 12:45:36.373522 Recovery requested (1009000e)
368 12:45:36.379158 Saving nvdata
369 12:45:36.384931 tlcl_extend: response is 0
370 12:45:36.393919 tlcl_extend: response is 0
371 12:45:36.401210 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
372 12:45:36.404722 CBFS @ c08000 size 3f8000
373 12:45:36.408376 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
374 12:45:36.414813 CBFS: Locating 'fallback/romstage'
375 12:45:36.417821 CBFS: Found @ offset 80 size 145fc
376 12:45:36.420658 Accumulated console time in verstage 98 ms
377 12:45:36.421087
378 12:45:36.421423
379 12:45:36.434072 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
380 12:45:36.440633 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
381 12:45:36.444287 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
382 12:45:36.447303 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
383 12:45:36.453956 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
384 12:45:36.457013 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
385 12:45:36.460188 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
386 12:45:36.463703 TCO_STS: 0000 0000
387 12:45:36.466644 GEN_PMCON: e0015238 00000200
388 12:45:36.470351 GBLRST_CAUSE: 00000000 00000000
389 12:45:36.470746 prev_sleep_state 5
390 12:45:36.473934 Boot Count incremented to 71478
391 12:45:36.480806 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
392 12:45:36.484090 CBFS @ c08000 size 3f8000
393 12:45:36.491049 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
394 12:45:36.491570 CBFS: Locating 'fspm.bin'
395 12:45:36.493573 CBFS: Found @ offset 5ffc0 size 71000
396 12:45:36.498714 Chrome EC: UHEPI supported
397 12:45:36.505002 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
398 12:45:36.510421 Probing TPM: done!
399 12:45:36.517046 Connected to device vid:did:rid of 1ae0:0028:00
400 12:45:36.526947 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
401 12:45:36.532812 Initialized TPM device CR50 revision 0
402 12:45:36.541422 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
403 12:45:36.548472 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
404 12:45:36.551733 MRC cache found, size 1948
405 12:45:36.555017 bootmode is set to: 2
406 12:45:36.558221 PRMRR disabled by config.
407 12:45:36.558372 SPD INDEX = 1
408 12:45:36.565269 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
409 12:45:36.568482 CBFS @ c08000 size 3f8000
410 12:45:36.574690 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
411 12:45:36.574939 CBFS: Locating 'spd.bin'
412 12:45:36.578489 CBFS: Found @ offset 5fb80 size 400
413 12:45:36.581671 SPD: module type is LPDDR3
414 12:45:36.584764 SPD: module part is
415 12:45:36.591355 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
416 12:45:36.595082 SPD: device width 4 bits, bus width 8 bits
417 12:45:36.598335 SPD: module size is 4096 MB (per channel)
418 12:45:36.601392 memory slot: 0 configuration done.
419 12:45:36.604817 memory slot: 2 configuration done.
420 12:45:36.657185 CBMEM:
421 12:45:36.660896 IMD: root @ 99fff000 254 entries.
422 12:45:36.663241 IMD: root @ 99ffec00 62 entries.
423 12:45:36.666762 External stage cache:
424 12:45:36.669753 IMD: root @ 9abff000 254 entries.
425 12:45:36.673405 IMD: root @ 9abfec00 62 entries.
426 12:45:36.676745 Chrome EC: clear events_b mask to 0x0000000020004000
427 12:45:36.692830 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
428 12:45:36.706238 tlcl_write: response is 0
429 12:45:36.715792 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
430 12:45:36.721728 MRC: TPM MRC hash updated successfully.
431 12:45:36.722261 2 DIMMs found
432 12:45:36.725137 SMM Memory Map
433 12:45:36.728487 SMRAM : 0x9a000000 0x1000000
434 12:45:36.731521 Subregion 0: 0x9a000000 0xa00000
435 12:45:36.734942 Subregion 1: 0x9aa00000 0x200000
436 12:45:36.738069 Subregion 2: 0x9ac00000 0x400000
437 12:45:36.741821 top_of_ram = 0x9a000000
438 12:45:36.744639 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
439 12:45:36.751786 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
440 12:45:36.754824 MTRR Range: Start=ff000000 End=0 (Size 1000000)
441 12:45:36.761613 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 12:45:36.764932 CBFS @ c08000 size 3f8000
443 12:45:36.768466 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 12:45:36.771684 CBFS: Locating 'fallback/postcar'
445 12:45:36.778014 CBFS: Found @ offset 107000 size 4b44
446 12:45:36.781442 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
447 12:45:36.793465 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
448 12:45:36.796698 Processing 180 relocs. Offset value of 0x97c0c000
449 12:45:36.805455 Accumulated console time in romstage 286 ms
450 12:45:36.806044
451 12:45:36.806447
452 12:45:36.815306 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
453 12:45:36.822401 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
454 12:45:36.825241 CBFS @ c08000 size 3f8000
455 12:45:36.828562 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
456 12:45:36.835550 CBFS: Locating 'fallback/ramstage'
457 12:45:36.839219 CBFS: Found @ offset 43380 size 1b9e8
458 12:45:36.845080 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
459 12:45:36.877153 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
460 12:45:36.880417 Processing 3976 relocs. Offset value of 0x98db0000
461 12:45:36.887517 Accumulated console time in postcar 52 ms
462 12:45:36.888092
463 12:45:36.888513
464 12:45:36.897203 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
465 12:45:36.903802 FMAP: area RO_VPD found @ c00000 (16384 bytes)
466 12:45:36.906943 WARNING: RO_VPD is uninitialized or empty.
467 12:45:36.910587 FMAP: area RW_VPD found @ af8000 (8192 bytes)
468 12:45:36.917725 FMAP: area RW_VPD found @ af8000 (8192 bytes)
469 12:45:36.918257 Normal boot.
470 12:45:36.924513 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
471 12:45:36.927024 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
472 12:45:36.930181 CBFS @ c08000 size 3f8000
473 12:45:36.936974 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
474 12:45:36.940508 CBFS: Locating 'cpu_microcode_blob.bin'
475 12:45:36.943857 CBFS: Found @ offset 14700 size 2ec00
476 12:45:36.947234 microcode: sig=0x806ec pf=0x4 revision=0xc9
477 12:45:36.950211 Skip microcode update
478 12:45:36.953487 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
479 12:45:36.956881 CBFS @ c08000 size 3f8000
480 12:45:36.963738 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
481 12:45:36.966926 CBFS: Locating 'fsps.bin'
482 12:45:36.970073 CBFS: Found @ offset d1fc0 size 35000
483 12:45:36.995429 Detected 4 core, 8 thread CPU.
484 12:45:36.999208 Setting up SMI for CPU
485 12:45:37.002171 IED base = 0x9ac00000
486 12:45:37.002700 IED size = 0x00400000
487 12:45:37.005298 Will perform SMM setup.
488 12:45:37.012300 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
489 12:45:37.018633 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
490 12:45:37.022408 Processing 16 relocs. Offset value of 0x00030000
491 12:45:37.025350 Attempting to start 7 APs
492 12:45:37.028872 Waiting for 10ms after sending INIT.
493 12:45:37.045486 Waiting for 1st SIPI to complete...AP: slot 5 apic_id 1.
494 12:45:37.046023 done.
495 12:45:37.047933 AP: slot 7 apic_id 7.
496 12:45:37.051297 AP: slot 6 apic_id 6.
497 12:45:37.054630 Waiting for 2nd SIPI to complete...done.
498 12:45:37.058456 AP: slot 1 apic_id 2.
499 12:45:37.058953 AP: slot 3 apic_id 3.
500 12:45:37.061590 AP: slot 2 apic_id 5.
501 12:45:37.064936 AP: slot 4 apic_id 4.
502 12:45:37.071693 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
503 12:45:37.077979 Processing 13 relocs. Offset value of 0x00038000
504 12:45:37.081542 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
505 12:45:37.087846 Installing SMM handler to 0x9a000000
506 12:45:37.094851 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
507 12:45:37.098035 Processing 658 relocs. Offset value of 0x9a010000
508 12:45:37.107963 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
509 12:45:37.111203 Processing 13 relocs. Offset value of 0x9a008000
510 12:45:37.117745 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
511 12:45:37.124811 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
512 12:45:37.127567 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
513 12:45:37.134255 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
514 12:45:37.141509 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
515 12:45:37.147967 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
516 12:45:37.151241 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
517 12:45:37.157519 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
518 12:45:37.161250 Clearing SMI status registers
519 12:45:37.164504 SMI_STS: PM1
520 12:45:37.164902 PM1_STS: PWRBTN
521 12:45:37.167406 TCO_STS: SECOND_TO
522 12:45:37.170763 New SMBASE 0x9a000000
523 12:45:37.174183 In relocation handler: CPU 0
524 12:45:37.177561 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
525 12:45:37.181121 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 12:45:37.184502 Relocation complete.
527 12:45:37.187774 New SMBASE 0x99ffec00
528 12:45:37.188171 In relocation handler: CPU 5
529 12:45:37.194452 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
530 12:45:37.197286 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 12:45:37.201155 Relocation complete.
532 12:45:37.201541 New SMBASE 0x99fff800
533 12:45:37.204570 In relocation handler: CPU 2
534 12:45:37.210964 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
535 12:45:37.214461 Writing SMRR. base = 0x9a000006, mask=0xff000800
536 12:45:37.218720 Relocation complete.
537 12:45:37.219218 New SMBASE 0x99fff000
538 12:45:37.220663 In relocation handler: CPU 4
539 12:45:37.227378 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
540 12:45:37.230677 Writing SMRR. base = 0x9a000006, mask=0xff000800
541 12:45:37.234271 Relocation complete.
542 12:45:37.234789 New SMBASE 0x99fffc00
543 12:45:37.237534 In relocation handler: CPU 1
544 12:45:37.240698 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
545 12:45:37.247249 Writing SMRR. base = 0x9a000006, mask=0xff000800
546 12:45:37.250697 Relocation complete.
547 12:45:37.251088 New SMBASE 0x99fff400
548 12:45:37.254065 In relocation handler: CPU 3
549 12:45:37.257533 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
550 12:45:37.264040 Writing SMRR. base = 0x9a000006, mask=0xff000800
551 12:45:37.267224 Relocation complete.
552 12:45:37.267616 New SMBASE 0x99ffe800
553 12:45:37.270884 In relocation handler: CPU 6
554 12:45:37.274070 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
555 12:45:37.280442 Writing SMRR. base = 0x9a000006, mask=0xff000800
556 12:45:37.280833 Relocation complete.
557 12:45:37.283785 New SMBASE 0x99ffe400
558 12:45:37.287098 In relocation handler: CPU 7
559 12:45:37.290887 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
560 12:45:37.297426 Writing SMRR. base = 0x9a000006, mask=0xff000800
561 12:45:37.297973 Relocation complete.
562 12:45:37.300701 Initializing CPU #0
563 12:45:37.303888 CPU: vendor Intel device 806ec
564 12:45:37.307476 CPU: family 06, model 8e, stepping 0c
565 12:45:37.310914 Clearing out pending MCEs
566 12:45:37.313782 Setting up local APIC...
567 12:45:37.314212 apic_id: 0x00 done.
568 12:45:37.317064 Turbo is available but hidden
569 12:45:37.320454 Turbo is available and visible
570 12:45:37.323789 VMX status: enabled
571 12:45:37.326979 IA32_FEATURE_CONTROL status: locked
572 12:45:37.330847 Skip microcode update
573 12:45:37.331364 CPU #0 initialized
574 12:45:37.334504 Initializing CPU #5
575 12:45:37.334995 Initializing CPU #3
576 12:45:37.337497 Initializing CPU #1
577 12:45:37.341027 CPU: vendor Intel device 806ec
578 12:45:37.344056 CPU: family 06, model 8e, stepping 0c
579 12:45:37.347146 CPU: vendor Intel device 806ec
580 12:45:37.350956 CPU: family 06, model 8e, stepping 0c
581 12:45:37.353935 Clearing out pending MCEs
582 12:45:37.357108 Clearing out pending MCEs
583 12:45:37.357640 Setting up local APIC...
584 12:45:37.360890 Initializing CPU #4
585 12:45:37.364045 Initializing CPU #2
586 12:45:37.367594 CPU: vendor Intel device 806ec
587 12:45:37.370474 CPU: family 06, model 8e, stepping 0c
588 12:45:37.373674 CPU: vendor Intel device 806ec
589 12:45:37.377124 CPU: family 06, model 8e, stepping 0c
590 12:45:37.380956 Clearing out pending MCEs
591 12:45:37.381382 Clearing out pending MCEs
592 12:45:37.384582 Setting up local APIC...
593 12:45:37.387364 Setting up local APIC...
594 12:45:37.391123 CPU: vendor Intel device 806ec
595 12:45:37.394507 CPU: family 06, model 8e, stepping 0c
596 12:45:37.397556 Clearing out pending MCEs
597 12:45:37.400353 Setting up local APIC...
598 12:45:37.400796 apic_id: 0x02 done.
599 12:45:37.403994 apic_id: 0x03 done.
600 12:45:37.407249 VMX status: enabled
601 12:45:37.407793 VMX status: enabled
602 12:45:37.411038 IA32_FEATURE_CONTROL status: locked
603 12:45:37.414271 IA32_FEATURE_CONTROL status: locked
604 12:45:37.417750 Skip microcode update
605 12:45:37.420743 Skip microcode update
606 12:45:37.421200 CPU #1 initialized
607 12:45:37.423851 CPU #3 initialized
608 12:45:37.427286 Setting up local APIC...
609 12:45:37.427675 apic_id: 0x05 done.
610 12:45:37.430717 apic_id: 0x04 done.
611 12:45:37.431160 VMX status: enabled
612 12:45:37.434365 VMX status: enabled
613 12:45:37.437366 IA32_FEATURE_CONTROL status: locked
614 12:45:37.440590 IA32_FEATURE_CONTROL status: locked
615 12:45:37.444381 Skip microcode update
616 12:45:37.447388 Skip microcode update
617 12:45:37.447882 CPU #2 initialized
618 12:45:37.450990 CPU #4 initialized
619 12:45:37.451482 apic_id: 0x01 done.
620 12:45:37.453846 Initializing CPU #7
621 12:45:37.457135 Initializing CPU #6
622 12:45:37.460304 CPU: vendor Intel device 806ec
623 12:45:37.463991 CPU: family 06, model 8e, stepping 0c
624 12:45:37.467134 CPU: vendor Intel device 806ec
625 12:45:37.470378 CPU: family 06, model 8e, stepping 0c
626 12:45:37.473703 Clearing out pending MCEs
627 12:45:37.474110 Clearing out pending MCEs
628 12:45:37.476960 Setting up local APIC...
629 12:45:37.480341 VMX status: enabled
630 12:45:37.480774 apic_id: 0x07 done.
631 12:45:37.483524 Setting up local APIC...
632 12:45:37.486514 IA32_FEATURE_CONTROL status: locked
633 12:45:37.490160 VMX status: enabled
634 12:45:37.493099 apic_id: 0x06 done.
635 12:45:37.496833 IA32_FEATURE_CONTROL status: locked
636 12:45:37.497366 VMX status: enabled
637 12:45:37.499971 Skip microcode update
638 12:45:37.503743 IA32_FEATURE_CONTROL status: locked
639 12:45:37.507190 CPU #7 initialized
640 12:45:37.507724 Skip microcode update
641 12:45:37.509999 Skip microcode update
642 12:45:37.512966 CPU #6 initialized
643 12:45:37.513355 CPU #5 initialized
644 12:45:37.516367 bsp_do_flight_plan done after 461 msecs.
645 12:45:37.519847 CPU: frequency set to 4200 MHz
646 12:45:37.523425 Enabling SMIs.
647 12:45:37.523926 Locking SMM.
648 12:45:37.539012 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
649 12:45:37.541766 CBFS @ c08000 size 3f8000
650 12:45:37.548812 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
651 12:45:37.549426 CBFS: Locating 'vbt.bin'
652 12:45:37.552297 CBFS: Found @ offset 5f5c0 size 499
653 12:45:37.558761 Found a VBT of 4608 bytes after decompression
654 12:45:37.742367 Display FSP Version Info HOB
655 12:45:37.745921 Reference Code - CPU = 9.0.1e.30
656 12:45:37.748637 uCode Version = 0.0.0.ca
657 12:45:37.752175 TXT ACM version = ff.ff.ff.ffff
658 12:45:37.755066 Display FSP Version Info HOB
659 12:45:37.758596 Reference Code - ME = 9.0.1e.30
660 12:45:37.762234 MEBx version = 0.0.0.0
661 12:45:37.765397 ME Firmware Version = Consumer SKU
662 12:45:37.768621 Display FSP Version Info HOB
663 12:45:37.771907 Reference Code - CML PCH = 9.0.1e.30
664 12:45:37.775036 PCH-CRID Status = Disabled
665 12:45:37.778571 PCH-CRID Original Value = ff.ff.ff.ffff
666 12:45:37.781608 PCH-CRID New Value = ff.ff.ff.ffff
667 12:45:37.785235 OPROM - RST - RAID = ff.ff.ff.ffff
668 12:45:37.788140 ChipsetInit Base Version = ff.ff.ff.ffff
669 12:45:37.791376 ChipsetInit Oem Version = ff.ff.ff.ffff
670 12:45:37.795096 Display FSP Version Info HOB
671 12:45:37.801730 Reference Code - SA - System Agent = 9.0.1e.30
672 12:45:37.804949 Reference Code - MRC = 0.7.1.6c
673 12:45:37.805374 SA - PCIe Version = 9.0.1e.30
674 12:45:37.808302 SA-CRID Status = Disabled
675 12:45:37.811381 SA-CRID Original Value = 0.0.0.c
676 12:45:37.814676 SA-CRID New Value = 0.0.0.c
677 12:45:37.818237 OPROM - VBIOS = ff.ff.ff.ffff
678 12:45:37.821125 RTC Init
679 12:45:37.824829 Set power on after power failure.
680 12:45:37.825351 Disabling Deep S3
681 12:45:37.828024 Disabling Deep S3
682 12:45:37.828510 Disabling Deep S4
683 12:45:37.831457 Disabling Deep S4
684 12:45:37.831877 Disabling Deep S5
685 12:45:37.835257 Disabling Deep S5
686 12:45:37.841562 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 194 exit 1
687 12:45:37.842091 Enumerating buses...
688 12:45:37.848486 Show all devs... Before device enumeration.
689 12:45:37.849014 Root Device: enabled 1
690 12:45:37.851649 CPU_CLUSTER: 0: enabled 1
691 12:45:37.854795 DOMAIN: 0000: enabled 1
692 12:45:37.858088 APIC: 00: enabled 1
693 12:45:37.858515 PCI: 00:00.0: enabled 1
694 12:45:37.861378 PCI: 00:02.0: enabled 1
695 12:45:37.864157 PCI: 00:04.0: enabled 0
696 12:45:37.868031 PCI: 00:05.0: enabled 0
697 12:45:37.868621 PCI: 00:12.0: enabled 1
698 12:45:37.871095 PCI: 00:12.5: enabled 0
699 12:45:37.874271 PCI: 00:12.6: enabled 0
700 12:45:37.874701 PCI: 00:14.0: enabled 1
701 12:45:37.877833 PCI: 00:14.1: enabled 0
702 12:45:37.880854 PCI: 00:14.3: enabled 1
703 12:45:37.884517 PCI: 00:14.5: enabled 0
704 12:45:37.884928 PCI: 00:15.0: enabled 1
705 12:45:37.887662 PCI: 00:15.1: enabled 1
706 12:45:37.891001 PCI: 00:15.2: enabled 0
707 12:45:37.894220 PCI: 00:15.3: enabled 0
708 12:45:37.894643 PCI: 00:16.0: enabled 1
709 12:45:37.897503 PCI: 00:16.1: enabled 0
710 12:45:37.900953 PCI: 00:16.2: enabled 0
711 12:45:37.904575 PCI: 00:16.3: enabled 0
712 12:45:37.905097 PCI: 00:16.4: enabled 0
713 12:45:37.907954 PCI: 00:16.5: enabled 0
714 12:45:37.911231 PCI: 00:17.0: enabled 1
715 12:45:37.911736 PCI: 00:19.0: enabled 1
716 12:45:37.914616 PCI: 00:19.1: enabled 0
717 12:45:37.917631 PCI: 00:19.2: enabled 0
718 12:45:37.920625 PCI: 00:1a.0: enabled 0
719 12:45:37.921016 PCI: 00:1c.0: enabled 0
720 12:45:37.924074 PCI: 00:1c.1: enabled 0
721 12:45:37.927568 PCI: 00:1c.2: enabled 0
722 12:45:37.931215 PCI: 00:1c.3: enabled 0
723 12:45:37.931719 PCI: 00:1c.4: enabled 0
724 12:45:37.934128 PCI: 00:1c.5: enabled 0
725 12:45:37.937485 PCI: 00:1c.6: enabled 0
726 12:45:37.940815 PCI: 00:1c.7: enabled 0
727 12:45:37.941317 PCI: 00:1d.0: enabled 1
728 12:45:37.943929 PCI: 00:1d.1: enabled 0
729 12:45:37.947420 PCI: 00:1d.2: enabled 0
730 12:45:37.950776 PCI: 00:1d.3: enabled 0
731 12:45:37.951188 PCI: 00:1d.4: enabled 0
732 12:45:37.954626 PCI: 00:1d.5: enabled 1
733 12:45:37.957387 PCI: 00:1e.0: enabled 1
734 12:45:37.957776 PCI: 00:1e.1: enabled 0
735 12:45:37.960770 PCI: 00:1e.2: enabled 1
736 12:45:37.964013 PCI: 00:1e.3: enabled 1
737 12:45:37.967555 PCI: 00:1f.0: enabled 1
738 12:45:37.967944 PCI: 00:1f.1: enabled 1
739 12:45:37.970881 PCI: 00:1f.2: enabled 1
740 12:45:37.974148 PCI: 00:1f.3: enabled 1
741 12:45:37.976973 PCI: 00:1f.4: enabled 1
742 12:45:37.977408 PCI: 00:1f.5: enabled 1
743 12:45:37.980555 PCI: 00:1f.6: enabled 0
744 12:45:37.983787 USB0 port 0: enabled 1
745 12:45:37.984230 I2C: 00:15: enabled 1
746 12:45:37.987022 I2C: 00:5d: enabled 1
747 12:45:37.990150 GENERIC: 0.0: enabled 1
748 12:45:37.993623 I2C: 00:1a: enabled 1
749 12:45:37.994143 I2C: 00:38: enabled 1
750 12:45:37.997306 I2C: 00:39: enabled 1
751 12:45:38.000347 I2C: 00:3a: enabled 1
752 12:45:38.000868 I2C: 00:3b: enabled 1
753 12:45:38.003574 PCI: 00:00.0: enabled 1
754 12:45:38.007192 SPI: 00: enabled 1
755 12:45:38.007554 SPI: 01: enabled 1
756 12:45:38.010857 PNP: 0c09.0: enabled 1
757 12:45:38.013805 USB2 port 0: enabled 1
758 12:45:38.014180 USB2 port 1: enabled 1
759 12:45:38.017329 USB2 port 2: enabled 0
760 12:45:38.019971 USB2 port 3: enabled 0
761 12:45:38.020379 USB2 port 5: enabled 0
762 12:45:38.023307 USB2 port 6: enabled 1
763 12:45:38.027409 USB2 port 9: enabled 1
764 12:45:38.027905 USB3 port 0: enabled 1
765 12:45:38.030372 USB3 port 1: enabled 1
766 12:45:38.033747 USB3 port 2: enabled 1
767 12:45:38.036481 USB3 port 3: enabled 1
768 12:45:38.036869 USB3 port 4: enabled 0
769 12:45:38.040475 APIC: 02: enabled 1
770 12:45:38.043348 APIC: 05: enabled 1
771 12:45:38.043738 APIC: 03: enabled 1
772 12:45:38.046827 APIC: 04: enabled 1
773 12:45:38.047217 APIC: 01: enabled 1
774 12:45:38.049987 APIC: 06: enabled 1
775 12:45:38.053225 APIC: 07: enabled 1
776 12:45:38.053613 Compare with tree...
777 12:45:38.056450 Root Device: enabled 1
778 12:45:38.060239 CPU_CLUSTER: 0: enabled 1
779 12:45:38.060785 APIC: 00: enabled 1
780 12:45:38.063368 APIC: 02: enabled 1
781 12:45:38.066519 APIC: 05: enabled 1
782 12:45:38.066998 APIC: 03: enabled 1
783 12:45:38.070091 APIC: 04: enabled 1
784 12:45:38.073283 APIC: 01: enabled 1
785 12:45:38.073676 APIC: 06: enabled 1
786 12:45:38.076701 APIC: 07: enabled 1
787 12:45:38.080366 DOMAIN: 0000: enabled 1
788 12:45:38.083457 PCI: 00:00.0: enabled 1
789 12:45:38.084017 PCI: 00:02.0: enabled 1
790 12:45:38.086744 PCI: 00:04.0: enabled 0
791 12:45:38.090192 PCI: 00:05.0: enabled 0
792 12:45:38.093609 PCI: 00:12.0: enabled 1
793 12:45:38.096815 PCI: 00:12.5: enabled 0
794 12:45:38.097232 PCI: 00:12.6: enabled 0
795 12:45:38.100279 PCI: 00:14.0: enabled 1
796 12:45:38.103864 USB0 port 0: enabled 1
797 12:45:38.106992 USB2 port 0: enabled 1
798 12:45:38.110223 USB2 port 1: enabled 1
799 12:45:38.110738 USB2 port 2: enabled 0
800 12:45:38.113161 USB2 port 3: enabled 0
801 12:45:38.117070 USB2 port 5: enabled 0
802 12:45:38.120132 USB2 port 6: enabled 1
803 12:45:38.123837 USB2 port 9: enabled 1
804 12:45:38.127279 USB3 port 0: enabled 1
805 12:45:38.127792 USB3 port 1: enabled 1
806 12:45:38.130205 USB3 port 2: enabled 1
807 12:45:38.133468 USB3 port 3: enabled 1
808 12:45:38.136863 USB3 port 4: enabled 0
809 12:45:38.139821 PCI: 00:14.1: enabled 0
810 12:45:38.140437 PCI: 00:14.3: enabled 1
811 12:45:38.143066 PCI: 00:14.5: enabled 0
812 12:45:38.146343 PCI: 00:15.0: enabled 1
813 12:45:38.149532 I2C: 00:15: enabled 1
814 12:45:38.153028 PCI: 00:15.1: enabled 1
815 12:45:38.153459 I2C: 00:5d: enabled 1
816 12:45:38.156389 GENERIC: 0.0: enabled 1
817 12:45:38.159449 PCI: 00:15.2: enabled 0
818 12:45:38.162900 PCI: 00:15.3: enabled 0
819 12:45:38.166309 PCI: 00:16.0: enabled 1
820 12:45:38.166699 PCI: 00:16.1: enabled 0
821 12:45:38.169500 PCI: 00:16.2: enabled 0
822 12:45:38.172774 PCI: 00:16.3: enabled 0
823 12:45:38.176110 PCI: 00:16.4: enabled 0
824 12:45:38.179865 PCI: 00:16.5: enabled 0
825 12:45:38.180427 PCI: 00:17.0: enabled 1
826 12:45:38.183318 PCI: 00:19.0: enabled 1
827 12:45:38.186803 I2C: 00:1a: enabled 1
828 12:45:38.189219 I2C: 00:38: enabled 1
829 12:45:38.189621 I2C: 00:39: enabled 1
830 12:45:38.192613 I2C: 00:3a: enabled 1
831 12:45:38.196302 I2C: 00:3b: enabled 1
832 12:45:38.199373 PCI: 00:19.1: enabled 0
833 12:45:38.203643 PCI: 00:19.2: enabled 0
834 12:45:38.204180 PCI: 00:1a.0: enabled 0
835 12:45:38.205863 PCI: 00:1c.0: enabled 0
836 12:45:38.209228 PCI: 00:1c.1: enabled 0
837 12:45:38.213068 PCI: 00:1c.2: enabled 0
838 12:45:38.213609 PCI: 00:1c.3: enabled 0
839 12:45:38.216136 PCI: 00:1c.4: enabled 0
840 12:45:38.219754 PCI: 00:1c.5: enabled 0
841 12:45:38.222870 PCI: 00:1c.6: enabled 0
842 12:45:38.226124 PCI: 00:1c.7: enabled 0
843 12:45:38.226623 PCI: 00:1d.0: enabled 1
844 12:45:38.229326 PCI: 00:1d.1: enabled 0
845 12:45:38.232525 PCI: 00:1d.2: enabled 0
846 12:45:38.236155 PCI: 00:1d.3: enabled 0
847 12:45:38.239412 PCI: 00:1d.4: enabled 0
848 12:45:38.239914 PCI: 00:1d.5: enabled 1
849 12:45:38.242491 PCI: 00:00.0: enabled 1
850 12:45:38.246721 PCI: 00:1e.0: enabled 1
851 12:45:38.249417 PCI: 00:1e.1: enabled 0
852 12:45:38.252788 PCI: 00:1e.2: enabled 1
853 12:45:38.253225 SPI: 00: enabled 1
854 12:45:38.256047 PCI: 00:1e.3: enabled 1
855 12:45:38.259299 SPI: 01: enabled 1
856 12:45:38.262347 PCI: 00:1f.0: enabled 1
857 12:45:38.262773 PNP: 0c09.0: enabled 1
858 12:45:38.266043 PCI: 00:1f.1: enabled 1
859 12:45:38.269135 PCI: 00:1f.2: enabled 1
860 12:45:38.272551 PCI: 00:1f.3: enabled 1
861 12:45:38.272954 PCI: 00:1f.4: enabled 1
862 12:45:38.275912 PCI: 00:1f.5: enabled 1
863 12:45:38.279409 PCI: 00:1f.6: enabled 0
864 12:45:38.282883 Root Device scanning...
865 12:45:38.285952 scan_static_bus for Root Device
866 12:45:38.289333 CPU_CLUSTER: 0 enabled
867 12:45:38.289817 DOMAIN: 0000 enabled
868 12:45:38.292755 DOMAIN: 0000 scanning...
869 12:45:38.295987 PCI: pci_scan_bus for bus 00
870 12:45:38.298837 PCI: 00:00.0 [8086/0000] ops
871 12:45:38.302439 PCI: 00:00.0 [8086/9b61] enabled
872 12:45:38.305766 PCI: 00:02.0 [8086/0000] bus ops
873 12:45:38.309237 PCI: 00:02.0 [8086/9b41] enabled
874 12:45:38.312483 PCI: 00:04.0 [8086/1903] disabled
875 12:45:38.315817 PCI: 00:08.0 [8086/1911] enabled
876 12:45:38.319319 PCI: 00:12.0 [8086/02f9] enabled
877 12:45:38.322457 PCI: 00:14.0 [8086/0000] bus ops
878 12:45:38.325667 PCI: 00:14.0 [8086/02ed] enabled
879 12:45:38.329063 PCI: 00:14.2 [8086/02ef] enabled
880 12:45:38.332226 PCI: 00:14.3 [8086/02f0] enabled
881 12:45:38.335485 PCI: 00:15.0 [8086/0000] bus ops
882 12:45:38.338702 PCI: 00:15.0 [8086/02e8] enabled
883 12:45:38.342581 PCI: 00:15.1 [8086/0000] bus ops
884 12:45:38.345608 PCI: 00:15.1 [8086/02e9] enabled
885 12:45:38.349093 PCI: 00:16.0 [8086/0000] ops
886 12:45:38.352399 PCI: 00:16.0 [8086/02e0] enabled
887 12:45:38.355638 PCI: 00:17.0 [8086/0000] ops
888 12:45:38.358836 PCI: 00:17.0 [8086/02d3] enabled
889 12:45:38.362264 PCI: 00:19.0 [8086/0000] bus ops
890 12:45:38.365636 PCI: 00:19.0 [8086/02c5] enabled
891 12:45:38.369046 PCI: 00:1d.0 [8086/0000] bus ops
892 12:45:38.372216 PCI: 00:1d.0 [8086/02b0] enabled
893 12:45:38.375920 PCI: Static device PCI: 00:1d.5 not found, disabling it.
894 12:45:38.379208 PCI: 00:1e.0 [8086/0000] ops
895 12:45:38.381935 PCI: 00:1e.0 [8086/02a8] enabled
896 12:45:38.385298 PCI: 00:1e.2 [8086/0000] bus ops
897 12:45:38.389310 PCI: 00:1e.2 [8086/02aa] enabled
898 12:45:38.392311 PCI: 00:1e.3 [8086/0000] bus ops
899 12:45:38.395349 PCI: 00:1e.3 [8086/02ab] enabled
900 12:45:38.398935 PCI: 00:1f.0 [8086/0000] bus ops
901 12:45:38.402319 PCI: 00:1f.0 [8086/0284] enabled
902 12:45:38.409276 PCI: Static device PCI: 00:1f.1 not found, disabling it.
903 12:45:38.415802 PCI: Static device PCI: 00:1f.2 not found, disabling it.
904 12:45:38.419167 PCI: 00:1f.3 [8086/0000] bus ops
905 12:45:38.422523 PCI: 00:1f.3 [8086/02c8] enabled
906 12:45:38.425522 PCI: 00:1f.4 [8086/0000] bus ops
907 12:45:38.428970 PCI: 00:1f.4 [8086/02a3] enabled
908 12:45:38.432380 PCI: 00:1f.5 [8086/0000] bus ops
909 12:45:38.435654 PCI: 00:1f.5 [8086/02a4] enabled
910 12:45:38.438823 PCI: Leftover static devices:
911 12:45:38.439256 PCI: 00:05.0
912 12:45:38.439597 PCI: 00:12.5
913 12:45:38.442004 PCI: 00:12.6
914 12:45:38.442452 PCI: 00:14.1
915 12:45:38.445090 PCI: 00:14.5
916 12:45:38.445669 PCI: 00:15.2
917 12:45:38.446193 PCI: 00:15.3
918 12:45:38.448430 PCI: 00:16.1
919 12:45:38.449004 PCI: 00:16.2
920 12:45:38.451937 PCI: 00:16.3
921 12:45:38.452393 PCI: 00:16.4
922 12:45:38.455263 PCI: 00:16.5
923 12:45:38.455712 PCI: 00:19.1
924 12:45:38.456129 PCI: 00:19.2
925 12:45:38.458422 PCI: 00:1a.0
926 12:45:38.458853 PCI: 00:1c.0
927 12:45:38.461718 PCI: 00:1c.1
928 12:45:38.462135 PCI: 00:1c.2
929 12:45:38.462455 PCI: 00:1c.3
930 12:45:38.465019 PCI: 00:1c.4
931 12:45:38.465413 PCI: 00:1c.5
932 12:45:38.468359 PCI: 00:1c.6
933 12:45:38.468751 PCI: 00:1c.7
934 12:45:38.469066 PCI: 00:1d.1
935 12:45:38.471470 PCI: 00:1d.2
936 12:45:38.471858 PCI: 00:1d.3
937 12:45:38.474890 PCI: 00:1d.4
938 12:45:38.475284 PCI: 00:1d.5
939 12:45:38.478682 PCI: 00:1e.1
940 12:45:38.479201 PCI: 00:1f.1
941 12:45:38.479534 PCI: 00:1f.2
942 12:45:38.481478 PCI: 00:1f.6
943 12:45:38.484702 PCI: Check your devicetree.cb.
944 12:45:38.485094 PCI: 00:02.0 scanning...
945 12:45:38.492184 scan_generic_bus for PCI: 00:02.0
946 12:45:38.495452 scan_generic_bus for PCI: 00:02.0 done
947 12:45:38.498385 scan_bus: scanning of bus PCI: 00:02.0 took 10196 usecs
948 12:45:38.501625 PCI: 00:14.0 scanning...
949 12:45:38.505036 scan_static_bus for PCI: 00:14.0
950 12:45:38.508395 USB0 port 0 enabled
951 12:45:38.512149 USB0 port 0 scanning...
952 12:45:38.515429 scan_static_bus for USB0 port 0
953 12:45:38.515966 USB2 port 0 enabled
954 12:45:38.518690 USB2 port 1 enabled
955 12:45:38.521993 USB2 port 2 disabled
956 12:45:38.522533 USB2 port 3 disabled
957 12:45:38.525135 USB2 port 5 disabled
958 12:45:38.525591 USB2 port 6 enabled
959 12:45:38.528347 USB2 port 9 enabled
960 12:45:38.531546 USB3 port 0 enabled
961 12:45:38.532007 USB3 port 1 enabled
962 12:45:38.534629 USB3 port 2 enabled
963 12:45:38.538017 USB3 port 3 enabled
964 12:45:38.538408 USB3 port 4 disabled
965 12:45:38.541596 USB2 port 0 scanning...
966 12:45:38.544597 scan_static_bus for USB2 port 0
967 12:45:38.548225 scan_static_bus for USB2 port 0 done
968 12:45:38.555152 scan_bus: scanning of bus USB2 port 0 took 9709 usecs
969 12:45:38.555689 USB2 port 1 scanning...
970 12:45:38.558516 scan_static_bus for USB2 port 1
971 12:45:38.564937 scan_static_bus for USB2 port 1 done
972 12:45:38.568286 scan_bus: scanning of bus USB2 port 1 took 9709 usecs
973 12:45:38.571371 USB2 port 6 scanning...
974 12:45:38.574744 scan_static_bus for USB2 port 6
975 12:45:38.578109 scan_static_bus for USB2 port 6 done
976 12:45:38.584588 scan_bus: scanning of bus USB2 port 6 took 9700 usecs
977 12:45:38.585020 USB2 port 9 scanning...
978 12:45:38.588039 scan_static_bus for USB2 port 9
979 12:45:38.594399 scan_static_bus for USB2 port 9 done
980 12:45:38.597910 scan_bus: scanning of bus USB2 port 9 took 9693 usecs
981 12:45:38.601409 USB3 port 0 scanning...
982 12:45:38.604484 scan_static_bus for USB3 port 0
983 12:45:38.608060 scan_static_bus for USB3 port 0 done
984 12:45:38.614757 scan_bus: scanning of bus USB3 port 0 took 9701 usecs
985 12:45:38.615151 USB3 port 1 scanning...
986 12:45:38.618278 scan_static_bus for USB3 port 1
987 12:45:38.624908 scan_static_bus for USB3 port 1 done
988 12:45:38.628311 scan_bus: scanning of bus USB3 port 1 took 9701 usecs
989 12:45:38.631376 USB3 port 2 scanning...
990 12:45:38.634676 scan_static_bus for USB3 port 2
991 12:45:38.637886 scan_static_bus for USB3 port 2 done
992 12:45:38.644836 scan_bus: scanning of bus USB3 port 2 took 9692 usecs
993 12:45:38.645335 USB3 port 3 scanning...
994 12:45:38.648379 scan_static_bus for USB3 port 3
995 12:45:38.655190 scan_static_bus for USB3 port 3 done
996 12:45:38.658500 scan_bus: scanning of bus USB3 port 3 took 9709 usecs
997 12:45:38.661455 scan_static_bus for USB0 port 0 done
998 12:45:38.667933 scan_bus: scanning of bus USB0 port 0 took 155375 usecs
999 12:45:38.671587 scan_static_bus for PCI: 00:14.0 done
1000 12:45:38.677684 scan_bus: scanning of bus PCI: 00:14.0 took 173003 usecs
1001 12:45:38.681500 PCI: 00:15.0 scanning...
1002 12:45:38.684572 scan_generic_bus for PCI: 00:15.0
1003 12:45:38.688365 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1004 12:45:38.690877 scan_generic_bus for PCI: 00:15.0 done
1005 12:45:38.698459 scan_bus: scanning of bus PCI: 00:15.0 took 14296 usecs
1006 12:45:38.701466 PCI: 00:15.1 scanning...
1007 12:45:38.704179 scan_generic_bus for PCI: 00:15.1
1008 12:45:38.707432 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1009 12:45:38.710760 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1010 12:45:38.714998 scan_generic_bus for PCI: 00:15.1 done
1011 12:45:38.721306 scan_bus: scanning of bus PCI: 00:15.1 took 18604 usecs
1012 12:45:38.724557 PCI: 00:19.0 scanning...
1013 12:45:38.728182 scan_generic_bus for PCI: 00:19.0
1014 12:45:38.730590 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1015 12:45:38.734243 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1016 12:45:38.740682 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1017 12:45:38.744075 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1018 12:45:38.747254 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1019 12:45:38.750953 scan_generic_bus for PCI: 00:19.0 done
1020 12:45:38.757389 scan_bus: scanning of bus PCI: 00:19.0 took 30728 usecs
1021 12:45:38.761152 PCI: 00:1d.0 scanning...
1022 12:45:38.764074 do_pci_scan_bridge for PCI: 00:1d.0
1023 12:45:38.767644 PCI: pci_scan_bus for bus 01
1024 12:45:38.771048 PCI: 01:00.0 [1c5c/1327] enabled
1025 12:45:38.774134 Enabling Common Clock Configuration
1026 12:45:38.777635 L1 Sub-State supported from root port 29
1027 12:45:38.780947 L1 Sub-State Support = 0xf
1028 12:45:38.784041 CommonModeRestoreTime = 0x28
1029 12:45:38.787945 Power On Value = 0x16, Power On Scale = 0x0
1030 12:45:38.790639 ASPM: Enabled L1
1031 12:45:38.794180 scan_bus: scanning of bus PCI: 00:1d.0 took 32791 usecs
1032 12:45:38.797433 PCI: 00:1e.2 scanning...
1033 12:45:38.801014 scan_generic_bus for PCI: 00:1e.2
1034 12:45:38.804001 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1035 12:45:38.810700 scan_generic_bus for PCI: 00:1e.2 done
1036 12:45:38.813845 scan_bus: scanning of bus PCI: 00:1e.2 took 14017 usecs
1037 12:45:38.817192 PCI: 00:1e.3 scanning...
1038 12:45:38.820604 scan_generic_bus for PCI: 00:1e.3
1039 12:45:38.824151 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1040 12:45:38.831038 scan_generic_bus for PCI: 00:1e.3 done
1041 12:45:38.833613 scan_bus: scanning of bus PCI: 00:1e.3 took 14000 usecs
1042 12:45:38.836905 PCI: 00:1f.0 scanning...
1043 12:45:38.840392 scan_static_bus for PCI: 00:1f.0
1044 12:45:38.843769 PNP: 0c09.0 enabled
1045 12:45:38.847673 scan_static_bus for PCI: 00:1f.0 done
1046 12:45:38.850811 scan_bus: scanning of bus PCI: 00:1f.0 took 12052 usecs
1047 12:45:38.853994 PCI: 00:1f.3 scanning...
1048 12:45:38.860571 scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs
1049 12:45:38.864026 PCI: 00:1f.4 scanning...
1050 12:45:38.867124 scan_generic_bus for PCI: 00:1f.4
1051 12:45:38.870527 scan_generic_bus for PCI: 00:1f.4 done
1052 12:45:38.877142 scan_bus: scanning of bus PCI: 00:1f.4 took 10188 usecs
1053 12:45:38.877566 PCI: 00:1f.5 scanning...
1054 12:45:38.883915 scan_generic_bus for PCI: 00:1f.5
1055 12:45:38.887360 scan_generic_bus for PCI: 00:1f.5 done
1056 12:45:38.890292 scan_bus: scanning of bus PCI: 00:1f.5 took 10198 usecs
1057 12:45:38.896862 scan_bus: scanning of bus DOMAIN: 0000 took 605094 usecs
1058 12:45:38.902166 scan_static_bus for Root Device done
1059 12:45:38.906771 scan_bus: scanning of bus Root Device took 624981 usecs
1060 12:45:38.907201 done
1061 12:45:38.909858 Chrome EC: UHEPI supported
1062 12:45:38.916633 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1063 12:45:38.923127 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1064 12:45:38.929760 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1065 12:45:38.936812 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1066 12:45:38.940200 SPI flash protection: WPSW=0 SRP0=0
1067 12:45:38.943021 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1068 12:45:38.949771 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1069 12:45:38.953057 found VGA at PCI: 00:02.0
1070 12:45:38.956126 Setting up VGA for PCI: 00:02.0
1071 12:45:38.959394 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1072 12:45:38.966067 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1073 12:45:38.966257 Allocating resources...
1074 12:45:38.969367 Reading resources...
1075 12:45:38.973179 Root Device read_resources bus 0 link: 0
1076 12:45:38.979988 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1077 12:45:38.982740 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1078 12:45:38.989353 DOMAIN: 0000 read_resources bus 0 link: 0
1079 12:45:38.992784 PCI: 00:14.0 read_resources bus 0 link: 0
1080 12:45:38.999611 USB0 port 0 read_resources bus 0 link: 0
1081 12:45:39.006467 USB0 port 0 read_resources bus 0 link: 0 done
1082 12:45:39.009851 PCI: 00:14.0 read_resources bus 0 link: 0 done
1083 12:45:39.017184 PCI: 00:15.0 read_resources bus 1 link: 0
1084 12:45:39.020454 PCI: 00:15.0 read_resources bus 1 link: 0 done
1085 12:45:39.027227 PCI: 00:15.1 read_resources bus 2 link: 0
1086 12:45:39.030129 PCI: 00:15.1 read_resources bus 2 link: 0 done
1087 12:45:39.038321 PCI: 00:19.0 read_resources bus 3 link: 0
1088 12:45:39.044337 PCI: 00:19.0 read_resources bus 3 link: 0 done
1089 12:45:39.047951 PCI: 00:1d.0 read_resources bus 1 link: 0
1090 12:45:39.054367 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1091 12:45:39.057677 PCI: 00:1e.2 read_resources bus 4 link: 0
1092 12:45:39.064719 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1093 12:45:39.067949 PCI: 00:1e.3 read_resources bus 5 link: 0
1094 12:45:39.074254 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1095 12:45:39.077917 PCI: 00:1f.0 read_resources bus 0 link: 0
1096 12:45:39.084431 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1097 12:45:39.090998 DOMAIN: 0000 read_resources bus 0 link: 0 done
1098 12:45:39.094253 Root Device read_resources bus 0 link: 0 done
1099 12:45:39.097763 Done reading resources.
1100 12:45:39.101220 Show resources in subtree (Root Device)...After reading.
1101 12:45:39.107931 Root Device child on link 0 CPU_CLUSTER: 0
1102 12:45:39.111237 CPU_CLUSTER: 0 child on link 0 APIC: 00
1103 12:45:39.111614 APIC: 00
1104 12:45:39.114454 APIC: 02
1105 12:45:39.114941 APIC: 05
1106 12:45:39.118052 APIC: 03
1107 12:45:39.118427 APIC: 04
1108 12:45:39.118811 APIC: 01
1109 12:45:39.120708 APIC: 06
1110 12:45:39.121080 APIC: 07
1111 12:45:39.124161 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1112 12:45:39.180514 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1113 12:45:39.181013 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1114 12:45:39.181350 PCI: 00:00.0
1115 12:45:39.182082 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1116 12:45:39.182409 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1117 12:45:39.182699 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1118 12:45:39.216689 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1119 12:45:39.217607 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1120 12:45:39.217979 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1121 12:45:39.218305 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1122 12:45:39.224290 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1123 12:45:39.230978 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1124 12:45:39.240775 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1125 12:45:39.247413 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1126 12:45:39.257581 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1127 12:45:39.266880 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1128 12:45:39.276981 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1129 12:45:39.286902 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1130 12:45:39.296984 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1131 12:45:39.297516 PCI: 00:02.0
1132 12:45:39.307434 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1133 12:45:39.320050 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1134 12:45:39.326911 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1135 12:45:39.330109 PCI: 00:04.0
1136 12:45:39.330646 PCI: 00:08.0
1137 12:45:39.339993 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1138 12:45:39.343128 PCI: 00:12.0
1139 12:45:39.353391 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1140 12:45:39.356735 PCI: 00:14.0 child on link 0 USB0 port 0
1141 12:45:39.367125 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1142 12:45:39.370547 USB0 port 0 child on link 0 USB2 port 0
1143 12:45:39.373378 USB2 port 0
1144 12:45:39.373806 USB2 port 1
1145 12:45:39.376662 USB2 port 2
1146 12:45:39.377111 USB2 port 3
1147 12:45:39.379541 USB2 port 5
1148 12:45:39.380099 USB2 port 6
1149 12:45:39.383228 USB2 port 9
1150 12:45:39.383759 USB3 port 0
1151 12:45:39.386282 USB3 port 1
1152 12:45:39.386822 USB3 port 2
1153 12:45:39.389433 USB3 port 3
1154 12:45:39.393022 USB3 port 4
1155 12:45:39.393454 PCI: 00:14.2
1156 12:45:39.403008 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1157 12:45:39.412944 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1158 12:45:39.413181 PCI: 00:14.3
1159 12:45:39.422917 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1160 12:45:39.429476 PCI: 00:15.0 child on link 0 I2C: 01:15
1161 12:45:39.439120 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1162 12:45:39.439433 I2C: 01:15
1163 12:45:39.445938 PCI: 00:15.1 child on link 0 I2C: 02:5d
1164 12:45:39.456305 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 12:45:39.456864 I2C: 02:5d
1166 12:45:39.459526 GENERIC: 0.0
1167 12:45:39.460013 PCI: 00:16.0
1168 12:45:39.469680 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 12:45:39.472894 PCI: 00:17.0
1170 12:45:39.479246 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1171 12:45:39.489036 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1172 12:45:39.495829 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1173 12:45:39.505391 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1174 12:45:39.515342 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1175 12:45:39.522081 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1176 12:45:39.528683 PCI: 00:19.0 child on link 0 I2C: 03:1a
1177 12:45:39.538691 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1178 12:45:39.539106 I2C: 03:1a
1179 12:45:39.539467 I2C: 03:38
1180 12:45:39.541932 I2C: 03:39
1181 12:45:39.542287 I2C: 03:3a
1182 12:45:39.545539 I2C: 03:3b
1183 12:45:39.548833 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1184 12:45:39.558420 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1185 12:45:39.568708 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1186 12:45:39.578589 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1187 12:45:39.579093 PCI: 01:00.0
1188 12:45:39.588392 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1189 12:45:39.591250 PCI: 00:1e.0
1190 12:45:39.601488 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1191 12:45:39.611085 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1192 12:45:39.614710 PCI: 00:1e.2 child on link 0 SPI: 00
1193 12:45:39.624540 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 12:45:39.627688 SPI: 00
1195 12:45:39.631352 PCI: 00:1e.3 child on link 0 SPI: 01
1196 12:45:39.640963 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 12:45:39.641377 SPI: 01
1198 12:45:39.647475 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1199 12:45:39.654505 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1200 12:45:39.663921 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1201 12:45:39.664448 PNP: 0c09.0
1202 12:45:39.674144 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1203 12:45:39.677537 PCI: 00:1f.3
1204 12:45:39.687390 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1205 12:45:39.697512 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1206 12:45:39.698062 PCI: 00:1f.4
1207 12:45:39.707547 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1208 12:45:39.716938 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1209 12:45:39.717496 PCI: 00:1f.5
1210 12:45:39.726615 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1211 12:45:39.733624 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1212 12:45:39.740418 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1213 12:45:39.746960 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1214 12:45:39.750609 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1215 12:45:39.753435 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1216 12:45:39.756506 PCI: 00:17.0 18 * [0x60 - 0x67] io
1217 12:45:39.760408 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1218 12:45:39.767117 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1219 12:45:39.773107 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1220 12:45:39.783270 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1221 12:45:39.789438 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1222 12:45:39.796472 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1223 12:45:39.803492 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1224 12:45:39.809446 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1225 12:45:39.812686 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1226 12:45:39.819578 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1227 12:45:39.822922 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1228 12:45:39.829636 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1229 12:45:39.832969 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1230 12:45:39.839865 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1231 12:45:39.842923 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1232 12:45:39.849734 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1233 12:45:39.853208 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1234 12:45:39.859362 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1235 12:45:39.862962 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1236 12:45:39.866209 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1237 12:45:39.872766 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1238 12:45:39.875932 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1239 12:45:39.883074 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1240 12:45:39.885872 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1241 12:45:39.892423 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1242 12:45:39.895807 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1243 12:45:39.902578 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1244 12:45:39.906429 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1245 12:45:39.913152 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1246 12:45:39.916242 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1247 12:45:39.923172 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1248 12:45:39.929124 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1249 12:45:39.932590 avoid_fixed_resources: DOMAIN: 0000
1250 12:45:39.939314 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1251 12:45:39.945863 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1252 12:45:39.952160 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1253 12:45:39.958940 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1254 12:45:39.968643 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1255 12:45:39.975528 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1256 12:45:39.982282 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1257 12:45:39.991895 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1258 12:45:39.998430 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1259 12:45:40.005128 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1260 12:45:40.012082 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1261 12:45:40.021796 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1262 12:45:40.022232 Setting resources...
1263 12:45:40.028429 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1264 12:45:40.031901 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1265 12:45:40.038515 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1266 12:45:40.041331 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1267 12:45:40.044677 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1268 12:45:40.051909 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1269 12:45:40.058138 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1270 12:45:40.064982 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1271 12:45:40.071585 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1272 12:45:40.078096 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1273 12:45:40.081757 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1274 12:45:40.088142 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1275 12:45:40.091393 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1276 12:45:40.097779 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1277 12:45:40.101198 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1278 12:45:40.104967 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1279 12:45:40.111662 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1280 12:45:40.114911 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1281 12:45:40.121078 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1282 12:45:40.124386 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1283 12:45:40.131478 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1284 12:45:40.134211 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1285 12:45:40.140910 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1286 12:45:40.144396 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1287 12:45:40.151342 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1288 12:45:40.154734 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1289 12:45:40.161190 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1290 12:45:40.164220 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1291 12:45:40.170831 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1292 12:45:40.174065 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1293 12:45:40.177374 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1294 12:45:40.183998 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1295 12:45:40.191168 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1296 12:45:40.196979 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1297 12:45:40.207497 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1298 12:45:40.214003 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1299 12:45:40.217143 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1300 12:45:40.227727 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1301 12:45:40.231119 Root Device assign_resources, bus 0 link: 0
1302 12:45:40.234136 DOMAIN: 0000 assign_resources, bus 0 link: 0
1303 12:45:40.244070 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1304 12:45:40.250673 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1305 12:45:40.261039 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1306 12:45:40.267662 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1307 12:45:40.277201 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1308 12:45:40.284030 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1309 12:45:40.290853 PCI: 00:14.0 assign_resources, bus 0 link: 0
1310 12:45:40.293587 PCI: 00:14.0 assign_resources, bus 0 link: 0
1311 12:45:40.300123 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1312 12:45:40.310380 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1313 12:45:40.316952 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1314 12:45:40.327381 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1315 12:45:40.330070 PCI: 00:15.0 assign_resources, bus 1 link: 0
1316 12:45:40.336878 PCI: 00:15.0 assign_resources, bus 1 link: 0
1317 12:45:40.344128 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1318 12:45:40.350545 PCI: 00:15.1 assign_resources, bus 2 link: 0
1319 12:45:40.353075 PCI: 00:15.1 assign_resources, bus 2 link: 0
1320 12:45:40.359782 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1321 12:45:40.370042 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1322 12:45:40.377215 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1323 12:45:40.387138 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1324 12:45:40.393219 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1325 12:45:40.399905 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1326 12:45:40.410538 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1327 12:45:40.416595 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1328 12:45:40.419840 PCI: 00:19.0 assign_resources, bus 3 link: 0
1329 12:45:40.426765 PCI: 00:19.0 assign_resources, bus 3 link: 0
1330 12:45:40.433150 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1331 12:45:40.442769 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1332 12:45:40.452982 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1333 12:45:40.456195 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1334 12:45:40.466514 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1335 12:45:40.469596 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1336 12:45:40.479166 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1337 12:45:40.486141 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1338 12:45:40.489115 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1339 12:45:40.495751 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1340 12:45:40.502413 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1341 12:45:40.509232 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1342 12:45:40.512512 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1343 12:45:40.519000 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1344 12:45:40.522410 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1345 12:45:40.528742 LPC: Trying to open IO window from 800 size 1ff
1346 12:45:40.535021 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1347 12:45:40.545433 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1348 12:45:40.551579 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1349 12:45:40.558417 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1350 12:45:40.565537 DOMAIN: 0000 assign_resources, bus 0 link: 0
1351 12:45:40.568981 Root Device assign_resources, bus 0 link: 0
1352 12:45:40.572427 Done setting resources.
1353 12:45:40.578500 Show resources in subtree (Root Device)...After assigning values.
1354 12:45:40.581636 Root Device child on link 0 CPU_CLUSTER: 0
1355 12:45:40.588410 CPU_CLUSTER: 0 child on link 0 APIC: 00
1356 12:45:40.588921 APIC: 00
1357 12:45:40.589257 APIC: 02
1358 12:45:40.591887 APIC: 05
1359 12:45:40.592351 APIC: 03
1360 12:45:40.592693 APIC: 04
1361 12:45:40.594933 APIC: 01
1362 12:45:40.595352 APIC: 06
1363 12:45:40.598457 APIC: 07
1364 12:45:40.602248 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1365 12:45:40.612141 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1366 12:45:40.621445 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1367 12:45:40.625118 PCI: 00:00.0
1368 12:45:40.635007 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1369 12:45:40.641722 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1370 12:45:40.651584 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1371 12:45:40.661381 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1372 12:45:40.671226 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1373 12:45:40.681025 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1374 12:45:40.690863 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1375 12:45:40.697687 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1376 12:45:40.707336 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1377 12:45:40.717840 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1378 12:45:40.727046 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1379 12:45:40.736922 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1380 12:45:40.746751 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1381 12:45:40.757592 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1382 12:45:40.764027 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1383 12:45:40.773122 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1384 12:45:40.776473 PCI: 00:02.0
1385 12:45:40.786778 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1386 12:45:40.796507 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1387 12:45:40.806402 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1388 12:45:40.806909 PCI: 00:04.0
1389 12:45:40.809601 PCI: 00:08.0
1390 12:45:40.819583 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1391 12:45:40.823162 PCI: 00:12.0
1392 12:45:40.832745 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1393 12:45:40.835827 PCI: 00:14.0 child on link 0 USB0 port 0
1394 12:45:40.846051 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1395 12:45:40.849335 USB0 port 0 child on link 0 USB2 port 0
1396 12:45:40.852807 USB2 port 0
1397 12:45:40.856110 USB2 port 1
1398 12:45:40.856563 USB2 port 2
1399 12:45:40.859452 USB2 port 3
1400 12:45:40.859968 USB2 port 5
1401 12:45:40.862557 USB2 port 6
1402 12:45:40.862974 USB2 port 9
1403 12:45:40.865835 USB3 port 0
1404 12:45:40.866351 USB3 port 1
1405 12:45:40.868913 USB3 port 2
1406 12:45:40.869292 USB3 port 3
1407 12:45:40.872133 USB3 port 4
1408 12:45:40.872564 PCI: 00:14.2
1409 12:45:40.882392 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1410 12:45:40.895528 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1411 12:45:40.895914 PCI: 00:14.3
1412 12:45:40.905492 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1413 12:45:40.911871 PCI: 00:15.0 child on link 0 I2C: 01:15
1414 12:45:40.921813 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1415 12:45:40.922298 I2C: 01:15
1416 12:45:40.925331 PCI: 00:15.1 child on link 0 I2C: 02:5d
1417 12:45:40.938607 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1418 12:45:40.939279 I2C: 02:5d
1419 12:45:40.941556 GENERIC: 0.0
1420 12:45:40.942074 PCI: 00:16.0
1421 12:45:40.951916 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1422 12:45:40.955230 PCI: 00:17.0
1423 12:45:40.964500 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1424 12:45:40.975293 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1425 12:45:40.984623 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1426 12:45:40.991482 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1427 12:45:41.000769 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1428 12:45:41.011243 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1429 12:45:41.014441 PCI: 00:19.0 child on link 0 I2C: 03:1a
1430 12:45:41.028212 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1431 12:45:41.028782 I2C: 03:1a
1432 12:45:41.030642 I2C: 03:38
1433 12:45:41.031062 I2C: 03:39
1434 12:45:41.031394 I2C: 03:3a
1435 12:45:41.034069 I2C: 03:3b
1436 12:45:41.037473 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1437 12:45:41.047691 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1438 12:45:41.057118 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1439 12:45:41.067166 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1440 12:45:41.070262 PCI: 01:00.0
1441 12:45:41.080282 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1442 12:45:41.083957 PCI: 00:1e.0
1443 12:45:41.093395 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1444 12:45:41.103249 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1445 12:45:41.106632 PCI: 00:1e.2 child on link 0 SPI: 00
1446 12:45:41.116489 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1447 12:45:41.119897 SPI: 00
1448 12:45:41.123504 PCI: 00:1e.3 child on link 0 SPI: 01
1449 12:45:41.133486 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1450 12:45:41.134006 SPI: 01
1451 12:45:41.139695 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1452 12:45:41.146503 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1453 12:45:41.156673 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1454 12:45:41.159282 PNP: 0c09.0
1455 12:45:41.165740 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1456 12:45:41.169156 PCI: 00:1f.3
1457 12:45:41.179219 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1458 12:45:41.189376 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1459 12:45:41.192514 PCI: 00:1f.4
1460 12:45:41.199474 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1461 12:45:41.209148 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1462 12:45:41.212207 PCI: 00:1f.5
1463 12:45:41.222313 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1464 12:45:41.225529 Done allocating resources.
1465 12:45:41.228861 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1466 12:45:41.232380 Enabling resources...
1467 12:45:41.239937 PCI: 00:00.0 subsystem <- 8086/9b61
1468 12:45:41.240456 PCI: 00:00.0 cmd <- 06
1469 12:45:41.242566 PCI: 00:02.0 subsystem <- 8086/9b41
1470 12:45:41.246195 PCI: 00:02.0 cmd <- 03
1471 12:45:41.249337 PCI: 00:08.0 cmd <- 06
1472 12:45:41.252198 PCI: 00:12.0 subsystem <- 8086/02f9
1473 12:45:41.255580 PCI: 00:12.0 cmd <- 02
1474 12:45:41.259174 PCI: 00:14.0 subsystem <- 8086/02ed
1475 12:45:41.262741 PCI: 00:14.0 cmd <- 02
1476 12:45:41.266104 PCI: 00:14.2 cmd <- 02
1477 12:45:41.269108 PCI: 00:14.3 subsystem <- 8086/02f0
1478 12:45:41.269528 PCI: 00:14.3 cmd <- 02
1479 12:45:41.275723 PCI: 00:15.0 subsystem <- 8086/02e8
1480 12:45:41.276283 PCI: 00:15.0 cmd <- 02
1481 12:45:41.279095 PCI: 00:15.1 subsystem <- 8086/02e9
1482 12:45:41.282731 PCI: 00:15.1 cmd <- 02
1483 12:45:41.285718 PCI: 00:16.0 subsystem <- 8086/02e0
1484 12:45:41.289233 PCI: 00:16.0 cmd <- 02
1485 12:45:41.292454 PCI: 00:17.0 subsystem <- 8086/02d3
1486 12:45:41.295909 PCI: 00:17.0 cmd <- 03
1487 12:45:41.299200 PCI: 00:19.0 subsystem <- 8086/02c5
1488 12:45:41.302429 PCI: 00:19.0 cmd <- 02
1489 12:45:41.306067 PCI: 00:1d.0 bridge ctrl <- 0013
1490 12:45:41.308820 PCI: 00:1d.0 subsystem <- 8086/02b0
1491 12:45:41.312330 PCI: 00:1d.0 cmd <- 06
1492 12:45:41.315328 PCI: 00:1e.0 subsystem <- 8086/02a8
1493 12:45:41.318471 PCI: 00:1e.0 cmd <- 06
1494 12:45:41.321893 PCI: 00:1e.2 subsystem <- 8086/02aa
1495 12:45:41.322337 PCI: 00:1e.2 cmd <- 06
1496 12:45:41.328856 PCI: 00:1e.3 subsystem <- 8086/02ab
1497 12:45:41.329382 PCI: 00:1e.3 cmd <- 02
1498 12:45:41.332483 PCI: 00:1f.0 subsystem <- 8086/0284
1499 12:45:41.335710 PCI: 00:1f.0 cmd <- 407
1500 12:45:41.338746 PCI: 00:1f.3 subsystem <- 8086/02c8
1501 12:45:41.342168 PCI: 00:1f.3 cmd <- 02
1502 12:45:41.345491 PCI: 00:1f.4 subsystem <- 8086/02a3
1503 12:45:41.349422 PCI: 00:1f.4 cmd <- 03
1504 12:45:41.352287 PCI: 00:1f.5 subsystem <- 8086/02a4
1505 12:45:41.355549 PCI: 00:1f.5 cmd <- 406
1506 12:45:41.364360 PCI: 01:00.0 cmd <- 02
1507 12:45:41.369153 done.
1508 12:45:41.379913 ME: Version: 14.0.39.1367
1509 12:45:41.386392 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 10
1510 12:45:41.390350 Initializing devices...
1511 12:45:41.390768 Root Device init ...
1512 12:45:41.396397 Chrome EC: Set SMI mask to 0x0000000000000000
1513 12:45:41.399672 Chrome EC: clear events_b mask to 0x0000000000000000
1514 12:45:41.406398 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1515 12:45:41.413183 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1516 12:45:41.419630 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1517 12:45:41.423367 Chrome EC: Set WAKE mask to 0x0000000000000000
1518 12:45:41.426608 Root Device init finished in 35161 usecs
1519 12:45:41.429918 CPU_CLUSTER: 0 init ...
1520 12:45:41.436781 CPU_CLUSTER: 0 init finished in 2447 usecs
1521 12:45:41.440977 PCI: 00:00.0 init ...
1522 12:45:41.443977 CPU TDP: 15 Watts
1523 12:45:41.447750 CPU PL2 = 64 Watts
1524 12:45:41.450598 PCI: 00:00.0 init finished in 7077 usecs
1525 12:45:41.454574 PCI: 00:02.0 init ...
1526 12:45:41.456868 PCI: 00:02.0 init finished in 2252 usecs
1527 12:45:41.460544 PCI: 00:08.0 init ...
1528 12:45:41.463993 PCI: 00:08.0 init finished in 2252 usecs
1529 12:45:41.467443 PCI: 00:12.0 init ...
1530 12:45:41.471077 PCI: 00:12.0 init finished in 2250 usecs
1531 12:45:41.474109 PCI: 00:14.0 init ...
1532 12:45:41.477291 PCI: 00:14.0 init finished in 2251 usecs
1533 12:45:41.480860 PCI: 00:14.2 init ...
1534 12:45:41.483682 PCI: 00:14.2 init finished in 2252 usecs
1535 12:45:41.487172 PCI: 00:14.3 init ...
1536 12:45:41.490717 PCI: 00:14.3 init finished in 2270 usecs
1537 12:45:41.493921 PCI: 00:15.0 init ...
1538 12:45:41.497294 DW I2C bus 0 at 0xd121f000 (400 KHz)
1539 12:45:41.500665 PCI: 00:15.0 init finished in 5973 usecs
1540 12:45:41.503708 PCI: 00:15.1 init ...
1541 12:45:41.506709 DW I2C bus 1 at 0xd1220000 (400 KHz)
1542 12:45:41.510504 PCI: 00:15.1 init finished in 5976 usecs
1543 12:45:41.514684 PCI: 00:16.0 init ...
1544 12:45:41.517048 PCI: 00:16.0 init finished in 2252 usecs
1545 12:45:41.520938 PCI: 00:19.0 init ...
1546 12:45:41.524349 DW I2C bus 4 at 0xd1222000 (400 KHz)
1547 12:45:41.531370 PCI: 00:19.0 init finished in 5974 usecs
1548 12:45:41.531894 PCI: 00:1d.0 init ...
1549 12:45:41.534818 Initializing PCH PCIe bridge.
1550 12:45:41.537704 PCI: 00:1d.0 init finished in 5276 usecs
1551 12:45:41.542684 PCI: 00:1f.0 init ...
1552 12:45:41.546404 IOAPIC: Initializing IOAPIC at 0xfec00000
1553 12:45:41.552671 IOAPIC: Bootstrap Processor Local APIC = 0x00
1554 12:45:41.553101 IOAPIC: ID = 0x02
1555 12:45:41.555490 IOAPIC: Dumping registers
1556 12:45:41.558999 reg 0x0000: 0x02000000
1557 12:45:41.562356 reg 0x0001: 0x00770020
1558 12:45:41.562774 reg 0x0002: 0x00000000
1559 12:45:41.569557 PCI: 00:1f.0 init finished in 23544 usecs
1560 12:45:41.572967 PCI: 00:1f.4 init ...
1561 12:45:41.575972 PCI: 00:1f.4 init finished in 2263 usecs
1562 12:45:41.587234 PCI: 01:00.0 init ...
1563 12:45:41.589899 PCI: 01:00.0 init finished in 2252 usecs
1564 12:45:41.594598 PNP: 0c09.0 init ...
1565 12:45:41.598017 Google Chrome EC uptime: 11.053 seconds
1566 12:45:41.604010 Google Chrome AP resets since EC boot: 0
1567 12:45:41.607278 Google Chrome most recent AP reset causes:
1568 12:45:41.614663 Google Chrome EC reset flags at last EC boot: reset-pin
1569 12:45:41.617369 PNP: 0c09.0 init finished in 20541 usecs
1570 12:45:41.620775 Devices initialized
1571 12:45:41.621183 Show all devs... After init.
1572 12:45:41.624513 Root Device: enabled 1
1573 12:45:41.628007 CPU_CLUSTER: 0: enabled 1
1574 12:45:41.631414 DOMAIN: 0000: enabled 1
1575 12:45:41.631931 APIC: 00: enabled 1
1576 12:45:41.634822 PCI: 00:00.0: enabled 1
1577 12:45:41.638004 PCI: 00:02.0: enabled 1
1578 12:45:41.638422 PCI: 00:04.0: enabled 0
1579 12:45:41.640844 PCI: 00:05.0: enabled 0
1580 12:45:41.644528 PCI: 00:12.0: enabled 1
1581 12:45:41.647283 PCI: 00:12.5: enabled 0
1582 12:45:41.647719 PCI: 00:12.6: enabled 0
1583 12:45:41.650657 PCI: 00:14.0: enabled 1
1584 12:45:41.654624 PCI: 00:14.1: enabled 0
1585 12:45:41.657566 PCI: 00:14.3: enabled 1
1586 12:45:41.658089 PCI: 00:14.5: enabled 0
1587 12:45:41.661145 PCI: 00:15.0: enabled 1
1588 12:45:41.664477 PCI: 00:15.1: enabled 1
1589 12:45:41.667791 PCI: 00:15.2: enabled 0
1590 12:45:41.668378 PCI: 00:15.3: enabled 0
1591 12:45:41.671091 PCI: 00:16.0: enabled 1
1592 12:45:41.674214 PCI: 00:16.1: enabled 0
1593 12:45:41.677625 PCI: 00:16.2: enabled 0
1594 12:45:41.678150 PCI: 00:16.3: enabled 0
1595 12:45:41.680651 PCI: 00:16.4: enabled 0
1596 12:45:41.684016 PCI: 00:16.5: enabled 0
1597 12:45:41.684577 PCI: 00:17.0: enabled 1
1598 12:45:41.686998 PCI: 00:19.0: enabled 1
1599 12:45:41.690165 PCI: 00:19.1: enabled 0
1600 12:45:41.693695 PCI: 00:19.2: enabled 0
1601 12:45:41.694140 PCI: 00:1a.0: enabled 0
1602 12:45:41.697221 PCI: 00:1c.0: enabled 0
1603 12:45:41.700539 PCI: 00:1c.1: enabled 0
1604 12:45:41.703507 PCI: 00:1c.2: enabled 0
1605 12:45:41.703968 PCI: 00:1c.3: enabled 0
1606 12:45:41.707150 PCI: 00:1c.4: enabled 0
1607 12:45:41.710406 PCI: 00:1c.5: enabled 0
1608 12:45:41.713815 PCI: 00:1c.6: enabled 0
1609 12:45:41.714241 PCI: 00:1c.7: enabled 0
1610 12:45:41.716724 PCI: 00:1d.0: enabled 1
1611 12:45:41.719999 PCI: 00:1d.1: enabled 0
1612 12:45:41.720429 PCI: 00:1d.2: enabled 0
1613 12:45:41.723757 PCI: 00:1d.3: enabled 0
1614 12:45:41.726929 PCI: 00:1d.4: enabled 0
1615 12:45:41.730309 PCI: 00:1d.5: enabled 0
1616 12:45:41.730699 PCI: 00:1e.0: enabled 1
1617 12:45:41.733975 PCI: 00:1e.1: enabled 0
1618 12:45:41.736432 PCI: 00:1e.2: enabled 1
1619 12:45:41.739823 PCI: 00:1e.3: enabled 1
1620 12:45:41.740214 PCI: 00:1f.0: enabled 1
1621 12:45:41.743431 PCI: 00:1f.1: enabled 0
1622 12:45:41.746768 PCI: 00:1f.2: enabled 0
1623 12:45:41.750248 PCI: 00:1f.3: enabled 1
1624 12:45:41.750768 PCI: 00:1f.4: enabled 1
1625 12:45:41.753653 PCI: 00:1f.5: enabled 1
1626 12:45:41.756561 PCI: 00:1f.6: enabled 0
1627 12:45:41.760558 USB0 port 0: enabled 1
1628 12:45:41.761084 I2C: 01:15: enabled 1
1629 12:45:41.763341 I2C: 02:5d: enabled 1
1630 12:45:41.766754 GENERIC: 0.0: enabled 1
1631 12:45:41.767290 I2C: 03:1a: enabled 1
1632 12:45:41.769528 I2C: 03:38: enabled 1
1633 12:45:41.773334 I2C: 03:39: enabled 1
1634 12:45:41.773752 I2C: 03:3a: enabled 1
1635 12:45:41.776456 I2C: 03:3b: enabled 1
1636 12:45:41.779524 PCI: 00:00.0: enabled 1
1637 12:45:41.779948 SPI: 00: enabled 1
1638 12:45:41.783050 SPI: 01: enabled 1
1639 12:45:41.786292 PNP: 0c09.0: enabled 1
1640 12:45:41.786714 USB2 port 0: enabled 1
1641 12:45:41.789838 USB2 port 1: enabled 1
1642 12:45:41.793243 USB2 port 2: enabled 0
1643 12:45:41.793766 USB2 port 3: enabled 0
1644 12:45:41.795742 USB2 port 5: enabled 0
1645 12:45:41.799446 USB2 port 6: enabled 1
1646 12:45:41.802793 USB2 port 9: enabled 1
1647 12:45:41.803216 USB3 port 0: enabled 1
1648 12:45:41.806069 USB3 port 1: enabled 1
1649 12:45:41.809328 USB3 port 2: enabled 1
1650 12:45:41.809838 USB3 port 3: enabled 1
1651 12:45:41.812554 USB3 port 4: enabled 0
1652 12:45:41.815882 APIC: 02: enabled 1
1653 12:45:41.816332 APIC: 05: enabled 1
1654 12:45:41.819478 APIC: 03: enabled 1
1655 12:45:41.822541 APIC: 04: enabled 1
1656 12:45:41.823068 APIC: 01: enabled 1
1657 12:45:41.825901 APIC: 06: enabled 1
1658 12:45:41.826323 APIC: 07: enabled 1
1659 12:45:41.828888 PCI: 00:08.0: enabled 1
1660 12:45:41.832063 PCI: 00:14.2: enabled 1
1661 12:45:41.835417 PCI: 01:00.0: enabled 1
1662 12:45:41.838874 Disabling ACPI via APMC:
1663 12:45:41.839267 done.
1664 12:45:41.845598 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1665 12:45:41.848993 ELOG: NV offset 0xaf0000 size 0x4000
1666 12:45:41.856382 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1667 12:45:41.863322 ELOG: Event(17) added with size 13 at 2024-03-05 12:45:00 UTC
1668 12:45:41.868913 ELOG: Event(92) added with size 9 at 2024-03-05 12:45:00 UTC
1669 12:45:41.876411 ELOG: Event(93) added with size 9 at 2024-03-05 12:45:00 UTC
1670 12:45:41.882124 ELOG: Event(9A) added with size 9 at 2024-03-05 12:45:00 UTC
1671 12:45:41.888863 ELOG: Event(9E) added with size 10 at 2024-03-05 12:45:00 UTC
1672 12:45:41.895844 ELOG: Event(9F) added with size 14 at 2024-03-05 12:45:00 UTC
1673 12:45:41.898663 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1674 12:45:41.906514 ELOG: Event(A1) added with size 10 at 2024-03-05 12:45:00 UTC
1675 12:45:41.916385 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1676 12:45:41.923317 ELOG: Event(A0) added with size 9 at 2024-03-05 12:45:00 UTC
1677 12:45:41.926792 elog_add_boot_reason: Logged dev mode boot
1678 12:45:41.927312 Finalize devices...
1679 12:45:41.929797 PCI: 00:17.0 final
1680 12:45:41.933079 Devices finalized
1681 12:45:41.936305 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1682 12:45:41.942408 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1683 12:45:41.945817 ME: HFSTS1 : 0x90000245
1684 12:45:41.949296 ME: HFSTS2 : 0x3B850126
1685 12:45:41.955772 ME: HFSTS3 : 0x00000020
1686 12:45:41.959683 ME: HFSTS4 : 0x00004800
1687 12:45:41.962494 ME: HFSTS5 : 0x00000000
1688 12:45:41.966044 ME: HFSTS6 : 0x40400006
1689 12:45:41.969021 ME: Manufacturing Mode : NO
1690 12:45:41.972529 ME: FW Partition Table : OK
1691 12:45:41.976031 ME: Bringup Loader Failure : NO
1692 12:45:41.979374 ME: Firmware Init Complete : YES
1693 12:45:41.981940 ME: Boot Options Present : NO
1694 12:45:41.985596 ME: Update In Progress : NO
1695 12:45:41.989228 ME: D0i3 Support : YES
1696 12:45:41.992058 ME: Low Power State Enabled : NO
1697 12:45:41.995375 ME: CPU Replaced : NO
1698 12:45:41.998526 ME: CPU Replacement Valid : YES
1699 12:45:42.001887 ME: Current Working State : 5
1700 12:45:42.005859 ME: Current Operation State : 1
1701 12:45:42.008770 ME: Current Operation Mode : 0
1702 12:45:42.012169 ME: Error Code : 0
1703 12:45:42.015804 ME: CPU Debug Disabled : YES
1704 12:45:42.019060 ME: TXT Support : NO
1705 12:45:42.025581 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1706 12:45:42.032202 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1707 12:45:42.032744 CBFS @ c08000 size 3f8000
1708 12:45:42.038207 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1709 12:45:42.042482 CBFS: Locating 'fallback/dsdt.aml'
1710 12:45:42.045629 CBFS: Found @ offset 10bb80 size 3fa5
1711 12:45:42.052086 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1712 12:45:42.055425 CBFS @ c08000 size 3f8000
1713 12:45:42.058398 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1714 12:45:42.062087 CBFS: Locating 'fallback/slic'
1715 12:45:42.066897 CBFS: 'fallback/slic' not found.
1716 12:45:42.073683 ACPI: Writing ACPI tables at 99b3e000.
1717 12:45:42.074264 ACPI: * FACS
1718 12:45:42.076478 ACPI: * DSDT
1719 12:45:42.079815 Ramoops buffer: 0x100000@0x99a3d000.
1720 12:45:42.083685 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1721 12:45:42.089992 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1722 12:45:42.092983 Google Chrome EC: version:
1723 12:45:42.096584 ro: helios_v2.0.2659-56403530b
1724 12:45:42.100001 rw: helios_v2.0.2849-c41de27e7d
1725 12:45:42.100597 running image: 1
1726 12:45:42.104314 ACPI: * FADT
1727 12:45:42.104834 SCI is IRQ9
1728 12:45:42.110663 ACPI: added table 1/32, length now 40
1729 12:45:42.111385 ACPI: * SSDT
1730 12:45:42.113930 Found 1 CPU(s) with 8 core(s) each.
1731 12:45:42.117129 Error: Could not locate 'wifi_sar' in VPD.
1732 12:45:42.123910 Checking CBFS for default SAR values
1733 12:45:42.127359 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1734 12:45:42.130171 CBFS @ c08000 size 3f8000
1735 12:45:42.137197 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1736 12:45:42.140713 CBFS: Locating 'wifi_sar_defaults.hex'
1737 12:45:42.143345 CBFS: Found @ offset 5fac0 size 77
1738 12:45:42.146766 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1739 12:45:42.153404 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1740 12:45:42.156818 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1741 12:45:42.163850 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1742 12:45:42.166960 failed to find key in VPD: dsm_calib_r0_0
1743 12:45:42.176860 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1744 12:45:42.180206 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1745 12:45:42.183605 failed to find key in VPD: dsm_calib_r0_1
1746 12:45:42.193416 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1747 12:45:42.199727 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1748 12:45:42.202780 failed to find key in VPD: dsm_calib_r0_2
1749 12:45:42.212864 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1750 12:45:42.216424 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1751 12:45:42.223104 failed to find key in VPD: dsm_calib_r0_3
1752 12:45:42.229813 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1753 12:45:42.236289 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1754 12:45:42.239200 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1755 12:45:42.242560 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1756 12:45:42.246565 EC returned error result code 1
1757 12:45:42.250836 EC returned error result code 1
1758 12:45:42.254623 EC returned error result code 1
1759 12:45:42.260664 PS2K: Bad resp from EC. Vivaldi disabled!
1760 12:45:42.264105 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1761 12:45:42.271169 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1762 12:45:42.277552 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1763 12:45:42.280898 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1764 12:45:42.288040 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1765 12:45:42.294328 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1766 12:45:42.300793 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1767 12:45:42.303786 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1768 12:45:42.310535 ACPI: added table 2/32, length now 44
1769 12:45:42.311183 ACPI: * MCFG
1770 12:45:42.313794 ACPI: added table 3/32, length now 48
1771 12:45:42.316832 ACPI: * TPM2
1772 12:45:42.320107 TPM2 log created at 99a2d000
1773 12:45:42.323460 ACPI: added table 4/32, length now 52
1774 12:45:42.323877 ACPI: * MADT
1775 12:45:42.327191 SCI is IRQ9
1776 12:45:42.330535 ACPI: added table 5/32, length now 56
1777 12:45:42.331001 current = 99b43ac0
1778 12:45:42.333421 ACPI: * DMAR
1779 12:45:42.336728 ACPI: added table 6/32, length now 60
1780 12:45:42.339784 ACPI: * IGD OpRegion
1781 12:45:42.340337 GMA: Found VBT in CBFS
1782 12:45:42.343591 GMA: Found valid VBT in CBFS
1783 12:45:42.350298 ACPI: added table 7/32, length now 64
1784 12:45:42.350781 ACPI: * HPET
1785 12:45:42.353528 ACPI: added table 8/32, length now 68
1786 12:45:42.356225 ACPI: done.
1787 12:45:42.356765 ACPI tables: 31744 bytes.
1788 12:45:42.360174 smbios_write_tables: 99a2c000
1789 12:45:42.363622 EC returned error result code 3
1790 12:45:42.367278 Couldn't obtain OEM name from CBI
1791 12:45:42.370447 Create SMBIOS type 17
1792 12:45:42.373954 PCI: 00:00.0 (Intel Cannonlake)
1793 12:45:42.377181 PCI: 00:14.3 (Intel WiFi)
1794 12:45:42.380333 SMBIOS tables: 939 bytes.
1795 12:45:42.383826 Writing table forward entry at 0x00000500
1796 12:45:42.390277 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1797 12:45:42.393762 Writing coreboot table at 0x99b62000
1798 12:45:42.400235 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1799 12:45:42.403587 1. 0000000000001000-000000000009ffff: RAM
1800 12:45:42.406308 2. 00000000000a0000-00000000000fffff: RESERVED
1801 12:45:42.412967 3. 0000000000100000-0000000099a2bfff: RAM
1802 12:45:42.416474 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1803 12:45:42.423234 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1804 12:45:42.430073 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1805 12:45:42.433151 7. 000000009a000000-000000009f7fffff: RESERVED
1806 12:45:42.439688 8. 00000000e0000000-00000000efffffff: RESERVED
1807 12:45:42.442877 9. 00000000fc000000-00000000fc000fff: RESERVED
1808 12:45:42.446273 10. 00000000fe000000-00000000fe00ffff: RESERVED
1809 12:45:42.453087 11. 00000000fed10000-00000000fed17fff: RESERVED
1810 12:45:42.456793 12. 00000000fed80000-00000000fed83fff: RESERVED
1811 12:45:42.463381 13. 00000000fed90000-00000000fed91fff: RESERVED
1812 12:45:42.466528 14. 00000000feda0000-00000000feda1fff: RESERVED
1813 12:45:42.473514 15. 0000000100000000-000000045e7fffff: RAM
1814 12:45:42.476658 Graphics framebuffer located at 0xc0000000
1815 12:45:42.479439 Passing 5 GPIOs to payload:
1816 12:45:42.483111 NAME | PORT | POLARITY | VALUE
1817 12:45:42.489709 write protect | undefined | high | low
1818 12:45:42.493259 lid | undefined | high | high
1819 12:45:42.499445 power | undefined | high | low
1820 12:45:42.506294 oprom | undefined | high | low
1821 12:45:42.509689 EC in RW | 0x000000cb | high | low
1822 12:45:42.513006 Board ID: 4
1823 12:45:42.516312 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1824 12:45:42.519492 CBFS @ c08000 size 3f8000
1825 12:45:42.526229 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1826 12:45:42.532499 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1827 12:45:42.533006 coreboot table: 1492 bytes.
1828 12:45:42.536167 IMD ROOT 0. 99fff000 00001000
1829 12:45:42.539264 IMD SMALL 1. 99ffe000 00001000
1830 12:45:42.542999 FSP MEMORY 2. 99c4e000 003b0000
1831 12:45:42.546129 CONSOLE 3. 99c2e000 00020000
1832 12:45:42.550009 FMAP 4. 99c2d000 0000054e
1833 12:45:42.553235 TIME STAMP 5. 99c2c000 00000910
1834 12:45:42.555913 VBOOT WORK 6. 99c18000 00014000
1835 12:45:42.558846 MRC DATA 7. 99c16000 00001958
1836 12:45:42.562227 ROMSTG STCK 8. 99c15000 00001000
1837 12:45:42.566165 AFTER CAR 9. 99c0b000 0000a000
1838 12:45:42.569181 RAMSTAGE 10. 99baf000 0005c000
1839 12:45:42.572903 REFCODE 11. 99b7a000 00035000
1840 12:45:42.575932 SMM BACKUP 12. 99b6a000 00010000
1841 12:45:42.579072 COREBOOT 13. 99b62000 00008000
1842 12:45:42.582529 ACPI 14. 99b3e000 00024000
1843 12:45:42.585705 ACPI GNVS 15. 99b3d000 00001000
1844 12:45:42.588779 RAMOOPS 16. 99a3d000 00100000
1845 12:45:42.592343 TPM2 TCGLOG17. 99a2d000 00010000
1846 12:45:42.595871 SMBIOS 18. 99a2c000 00000800
1847 12:45:42.599313 IMD small region:
1848 12:45:42.602039 IMD ROOT 0. 99ffec00 00000400
1849 12:45:42.605244 FSP RUNTIME 1. 99ffebe0 00000004
1850 12:45:42.609097 EC HOSTEVENT 2. 99ffebc0 00000008
1851 12:45:42.612074 POWER STATE 3. 99ffeb80 00000040
1852 12:45:42.615701 ROMSTAGE 4. 99ffeb60 00000004
1853 12:45:42.619320 MEM INFO 5. 99ffe9a0 000001b9
1854 12:45:42.622992 VPD 6. 99ffe920 0000006c
1855 12:45:42.625410 MTRR: Physical address space:
1856 12:45:42.632492 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1857 12:45:42.638507 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1858 12:45:42.645350 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1859 12:45:42.652379 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1860 12:45:42.659103 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1861 12:45:42.665254 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1862 12:45:42.668871 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1863 12:45:42.675231 MTRR: Fixed MSR 0x250 0x0606060606060606
1864 12:45:42.678740 MTRR: Fixed MSR 0x258 0x0606060606060606
1865 12:45:42.681794 MTRR: Fixed MSR 0x259 0x0000000000000000
1866 12:45:42.684966 MTRR: Fixed MSR 0x268 0x0606060606060606
1867 12:45:42.692436 MTRR: Fixed MSR 0x269 0x0606060606060606
1868 12:45:42.695012 MTRR: Fixed MSR 0x26a 0x0606060606060606
1869 12:45:42.698145 MTRR: Fixed MSR 0x26b 0x0606060606060606
1870 12:45:42.701812 MTRR: Fixed MSR 0x26c 0x0606060606060606
1871 12:45:42.708469 MTRR: Fixed MSR 0x26d 0x0606060606060606
1872 12:45:42.711530 MTRR: Fixed MSR 0x26e 0x0606060606060606
1873 12:45:42.714750 MTRR: Fixed MSR 0x26f 0x0606060606060606
1874 12:45:42.718420 call enable_fixed_mtrr()
1875 12:45:42.721941 CPU physical address size: 39 bits
1876 12:45:42.724807 MTRR: default type WB/UC MTRR counts: 6/8.
1877 12:45:42.731628 MTRR: WB selected as default type.
1878 12:45:42.734951 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1879 12:45:42.741010 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1880 12:45:42.747800 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1881 12:45:42.754630 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1882 12:45:42.761118 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1883 12:45:42.767768 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1884 12:45:42.771427 MTRR: Fixed MSR 0x250 0x0606060606060606
1885 12:45:42.777384 MTRR: Fixed MSR 0x258 0x0606060606060606
1886 12:45:42.781202 MTRR: Fixed MSR 0x259 0x0000000000000000
1887 12:45:42.784554 MTRR: Fixed MSR 0x268 0x0606060606060606
1888 12:45:42.787908 MTRR: Fixed MSR 0x269 0x0606060606060606
1889 12:45:42.794607 MTRR: Fixed MSR 0x26a 0x0606060606060606
1890 12:45:42.797290 MTRR: Fixed MSR 0x26b 0x0606060606060606
1891 12:45:42.800910 MTRR: Fixed MSR 0x26c 0x0606060606060606
1892 12:45:42.804195 MTRR: Fixed MSR 0x26d 0x0606060606060606
1893 12:45:42.807726 MTRR: Fixed MSR 0x26e 0x0606060606060606
1894 12:45:42.814106 MTRR: Fixed MSR 0x26f 0x0606060606060606
1895 12:45:42.814616
1896 12:45:42.814955 MTRR check
1897 12:45:42.817449 Fixed MTRRs : Enabled
1898 12:45:42.820905 Variable MTRRs: Enabled
1899 12:45:42.821425
1900 12:45:42.821765 call enable_fixed_mtrr()
1901 12:45:42.827307 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1902 12:45:42.831038 CPU physical address size: 39 bits
1903 12:45:42.837013 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1904 12:45:42.840775 MTRR: Fixed MSR 0x250 0x0606060606060606
1905 12:45:42.844434 MTRR: Fixed MSR 0x258 0x0606060606060606
1906 12:45:42.847245 MTRR: Fixed MSR 0x259 0x0000000000000000
1907 12:45:42.853608 MTRR: Fixed MSR 0x268 0x0606060606060606
1908 12:45:42.857965 MTRR: Fixed MSR 0x269 0x0606060606060606
1909 12:45:42.860563 MTRR: Fixed MSR 0x26a 0x0606060606060606
1910 12:45:42.864013 MTRR: Fixed MSR 0x26b 0x0606060606060606
1911 12:45:42.870999 MTRR: Fixed MSR 0x26c 0x0606060606060606
1912 12:45:42.874509 MTRR: Fixed MSR 0x26d 0x0606060606060606
1913 12:45:42.876990 MTRR: Fixed MSR 0x26e 0x0606060606060606
1914 12:45:42.880086 MTRR: Fixed MSR 0x26f 0x0606060606060606
1915 12:45:42.887115 MTRR: Fixed MSR 0x250 0x0606060606060606
1916 12:45:42.887634 call enable_fixed_mtrr()
1917 12:45:42.893622 MTRR: Fixed MSR 0x258 0x0606060606060606
1918 12:45:42.897088 MTRR: Fixed MSR 0x259 0x0000000000000000
1919 12:45:42.900499 MTRR: Fixed MSR 0x268 0x0606060606060606
1920 12:45:42.903746 MTRR: Fixed MSR 0x269 0x0606060606060606
1921 12:45:42.910075 MTRR: Fixed MSR 0x26a 0x0606060606060606
1922 12:45:42.913122 MTRR: Fixed MSR 0x26b 0x0606060606060606
1923 12:45:42.916582 MTRR: Fixed MSR 0x26c 0x0606060606060606
1924 12:45:42.920369 MTRR: Fixed MSR 0x26d 0x0606060606060606
1925 12:45:42.926880 MTRR: Fixed MSR 0x26e 0x0606060606060606
1926 12:45:42.930279 MTRR: Fixed MSR 0x26f 0x0606060606060606
1927 12:45:42.933640 CPU physical address size: 39 bits
1928 12:45:42.937102 call enable_fixed_mtrr()
1929 12:45:42.940120 MTRR: Fixed MSR 0x250 0x0606060606060606
1930 12:45:42.943640 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 12:45:42.949981 MTRR: Fixed MSR 0x259 0x0000000000000000
1932 12:45:42.953219 MTRR: Fixed MSR 0x268 0x0606060606060606
1933 12:45:42.956525 MTRR: Fixed MSR 0x269 0x0606060606060606
1934 12:45:42.959969 MTRR: Fixed MSR 0x26a 0x0606060606060606
1935 12:45:42.963363 MTRR: Fixed MSR 0x26b 0x0606060606060606
1936 12:45:42.969735 MTRR: Fixed MSR 0x26c 0x0606060606060606
1937 12:45:42.973108 MTRR: Fixed MSR 0x26d 0x0606060606060606
1938 12:45:42.976542 MTRR: Fixed MSR 0x26e 0x0606060606060606
1939 12:45:42.979716 MTRR: Fixed MSR 0x26f 0x0606060606060606
1940 12:45:42.986013 MTRR: Fixed MSR 0x250 0x0606060606060606
1941 12:45:42.989381 call enable_fixed_mtrr()
1942 12:45:42.992690 MTRR: Fixed MSR 0x258 0x0606060606060606
1943 12:45:42.996015 MTRR: Fixed MSR 0x259 0x0000000000000000
1944 12:45:42.999727 MTRR: Fixed MSR 0x268 0x0606060606060606
1945 12:45:43.002820 MTRR: Fixed MSR 0x269 0x0606060606060606
1946 12:45:43.009249 MTRR: Fixed MSR 0x26a 0x0606060606060606
1947 12:45:43.012239 MTRR: Fixed MSR 0x26b 0x0606060606060606
1948 12:45:43.015408 MTRR: Fixed MSR 0x26c 0x0606060606060606
1949 12:45:43.019263 MTRR: Fixed MSR 0x26d 0x0606060606060606
1950 12:45:43.026041 MTRR: Fixed MSR 0x26e 0x0606060606060606
1951 12:45:43.029725 MTRR: Fixed MSR 0x26f 0x0606060606060606
1952 12:45:43.032671 CPU physical address size: 39 bits
1953 12:45:43.036306 call enable_fixed_mtrr()
1954 12:45:43.038768 MTRR: Fixed MSR 0x250 0x0606060606060606
1955 12:45:43.042084 MTRR: Fixed MSR 0x250 0x0606060606060606
1956 12:45:43.048841 MTRR: Fixed MSR 0x258 0x0606060606060606
1957 12:45:43.052191 MTRR: Fixed MSR 0x259 0x0000000000000000
1958 12:45:43.055325 MTRR: Fixed MSR 0x268 0x0606060606060606
1959 12:45:43.058612 MTRR: Fixed MSR 0x269 0x0606060606060606
1960 12:45:43.065584 MTRR: Fixed MSR 0x26a 0x0606060606060606
1961 12:45:43.069196 MTRR: Fixed MSR 0x26b 0x0606060606060606
1962 12:45:43.072287 MTRR: Fixed MSR 0x26c 0x0606060606060606
1963 12:45:43.075429 MTRR: Fixed MSR 0x26d 0x0606060606060606
1964 12:45:43.082182 MTRR: Fixed MSR 0x26e 0x0606060606060606
1965 12:45:43.085348 MTRR: Fixed MSR 0x26f 0x0606060606060606
1966 12:45:43.088469 MTRR: Fixed MSR 0x258 0x0606060606060606
1967 12:45:43.091780 call enable_fixed_mtrr()
1968 12:45:43.095413 MTRR: Fixed MSR 0x259 0x0000000000000000
1969 12:45:43.098643 MTRR: Fixed MSR 0x268 0x0606060606060606
1970 12:45:43.105169 MTRR: Fixed MSR 0x269 0x0606060606060606
1971 12:45:43.108645 MTRR: Fixed MSR 0x26a 0x0606060606060606
1972 12:45:43.111887 MTRR: Fixed MSR 0x26b 0x0606060606060606
1973 12:45:43.114798 MTRR: Fixed MSR 0x26c 0x0606060606060606
1974 12:45:43.118397 MTRR: Fixed MSR 0x26d 0x0606060606060606
1975 12:45:43.125047 MTRR: Fixed MSR 0x26e 0x0606060606060606
1976 12:45:43.128638 MTRR: Fixed MSR 0x26f 0x0606060606060606
1977 12:45:43.131945 CPU physical address size: 39 bits
1978 12:45:43.134899 call enable_fixed_mtrr()
1979 12:45:43.137946 CPU physical address size: 39 bits
1980 12:45:43.141402 CPU physical address size: 39 bits
1981 12:45:43.145098 CPU physical address size: 39 bits
1982 12:45:43.147846 CBFS @ c08000 size 3f8000
1983 12:45:43.154634 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1984 12:45:43.158080 CBFS: Locating 'fallback/payload'
1985 12:45:43.161757 CBFS: Found @ offset 1c96c0 size 3f798
1986 12:45:43.168020 Checking segment from ROM address 0xffdd16f8
1987 12:45:43.170992 Checking segment from ROM address 0xffdd1714
1988 12:45:43.174165 Loading segment from ROM address 0xffdd16f8
1989 12:45:43.177678 code (compression=0)
1990 12:45:43.184035 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1991 12:45:43.194760 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1992 12:45:43.197672 it's not compressed!
1993 12:45:43.289058 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1994 12:45:43.295662 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1995 12:45:43.298869 Loading segment from ROM address 0xffdd1714
1996 12:45:43.302259 Entry Point 0x30000000
1997 12:45:43.305477 Loaded segments
1998 12:45:43.311018 Finalizing chipset.
1999 12:45:43.314570 Finalizing SMM.
2000 12:45:43.317818 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
2001 12:45:43.321244 mp_park_aps done after 0 msecs.
2002 12:45:43.327914 Jumping to boot code at 30000000(99b62000)
2003 12:45:43.334273 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2004 12:45:43.334679
2005 12:45:43.335110
2006 12:45:43.335566
2007 12:45:43.337627 Starting depthcharge on Helios...
2008 12:45:43.338006
2009 12:45:43.338957 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2010 12:45:43.339400 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2011 12:45:43.339767 Setting prompt string to ['hatch:']
2012 12:45:43.340145 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2013 12:45:43.347600 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2014 12:45:43.348080
2015 12:45:43.354331 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2016 12:45:43.354888
2017 12:45:43.361165 board_setup: Info: eMMC controller not present; skipping
2018 12:45:43.361683
2019 12:45:43.364504 New NVMe Controller 0x30053ac0 @ 00:1d:00
2020 12:45:43.364909
2021 12:45:43.370717 board_setup: Info: SDHCI controller not present; skipping
2022 12:45:43.371207
2023 12:45:43.374191 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2024 12:45:43.377604
2025 12:45:43.378086 Wipe memory regions:
2026 12:45:43.378432
2027 12:45:43.380547 [0x00000000001000, 0x000000000a0000)
2028 12:45:43.380936
2029 12:45:43.383636 [0x00000000100000, 0x00000030000000)
2030 12:45:43.450579
2031 12:45:43.454064 [0x00000030657430, 0x00000099a2c000)
2032 12:45:43.599585
2033 12:45:43.603423 [0x00000100000000, 0x0000045e800000)
2034 12:45:45.059679
2035 12:45:45.060208 R8152: Initializing
2036 12:45:45.060616
2037 12:45:45.062123 Version 9 (ocp_data = 6010)
2038 12:45:45.066757
2039 12:45:45.067178 R8152: Done initializing
2040 12:45:45.067516
2041 12:45:45.070152 Adding net device
2042 12:45:45.552950
2043 12:45:45.553469 R8152: Initializing
2044 12:45:45.553825
2045 12:45:45.556327 Version 6 (ocp_data = 5c30)
2046 12:45:45.556842
2047 12:45:45.559687 R8152: Done initializing
2048 12:45:45.560103
2049 12:45:45.562403 net_add_device: Attemp to include the same device
2050 12:45:45.565918
2051 12:45:45.573475 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2052 12:45:45.573901
2053 12:45:45.574234
2054 12:45:45.574544
2055 12:45:45.575309 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2057 12:45:45.676512 hatch: tftpboot 192.168.201.1 12948281/tftp-deploy-sb4vjq43/kernel/bzImage 12948281/tftp-deploy-sb4vjq43/kernel/cmdline 12948281/tftp-deploy-sb4vjq43/ramdisk/ramdisk.cpio.gz
2058 12:45:45.677130 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2059 12:45:45.677522 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2060 12:45:45.682346 tftpboot 192.168.201.1 12948281/tftp-deploy-sb4vjq43/kernel/bzIploy-sb4vjq43/kernel/cmdline 12948281/tftp-deploy-sb4vjq43/ramdisk/ramdisk.cpio.gz
2061 12:45:45.682787
2062 12:45:45.683117 Waiting for link
2063 12:45:45.882734
2064 12:45:45.883288 done.
2065 12:45:45.883635
2066 12:45:45.883953 MAC: 00:24:32:50:1a:59
2067 12:45:45.884301
2068 12:45:45.886022 Sending DHCP discover... done.
2069 12:45:45.886447
2070 12:45:45.889223 Waiting for reply... done.
2071 12:45:45.889740
2072 12:45:45.892616 Sending DHCP request... done.
2073 12:45:45.893039
2074 12:45:45.896042 Waiting for reply... done.
2075 12:45:45.896480
2076 12:45:45.899777 My ip is 192.168.201.14
2077 12:45:45.900166
2078 12:45:45.902654 The DHCP server ip is 192.168.201.1
2079 12:45:45.903049
2080 12:45:45.905842 TFTP server IP predefined by user: 192.168.201.1
2081 12:45:45.906227
2082 12:45:45.915728 Bootfile predefined by user: 12948281/tftp-deploy-sb4vjq43/kernel/bzImage
2083 12:45:45.916208
2084 12:45:45.919027 Sending tftp read request... done.
2085 12:45:45.919430
2086 12:45:45.926506 Waiting for the transfer...
2087 12:45:45.927022
2088 12:45:46.634995 00000000 ################################################################
2089 12:45:46.635493
2090 12:45:47.337704 00080000 ################################################################
2091 12:45:47.338215
2092 12:45:48.068387 00100000 ################################################################
2093 12:45:48.068901
2094 12:45:48.794353 00180000 ################################################################
2095 12:45:48.794858
2096 12:45:49.507339 00200000 ################################################################
2097 12:45:49.507893
2098 12:45:50.167815 00280000 ################################################################
2099 12:45:50.168379
2100 12:45:50.888669 00300000 ################################################################
2101 12:45:50.889150
2102 12:45:51.601834 00380000 ################################################################
2103 12:45:51.602353
2104 12:45:52.305777 00400000 ################################################################
2105 12:45:52.306316
2106 12:45:53.023135 00480000 ################################################################
2107 12:45:53.023688
2108 12:45:53.742627 00500000 ################################################################
2109 12:45:53.743156
2110 12:45:54.443254 00580000 ################################################################
2111 12:45:54.443807
2112 12:45:55.061223 00600000 ################################################################
2113 12:45:55.061722
2114 12:45:55.769480 00680000 ################################################################
2115 12:45:55.769809
2116 12:45:56.479693 00700000 ################################################################
2117 12:45:56.480219
2118 12:45:57.178072 00780000 ################################################################
2119 12:45:57.178626
2120 12:45:57.902079 00800000 ################################################################
2121 12:45:57.902611
2122 12:45:58.520538 00880000 ######################################################## done.
2123 12:45:58.521383
2124 12:45:58.523818 The bootfile was 9367440 bytes long.
2125 12:45:58.524370
2126 12:45:58.527615 Sending tftp read request... done.
2127 12:45:58.528094
2128 12:45:58.530026 Waiting for the transfer...
2129 12:45:58.530452
2130 12:45:59.247460 00000000 ################################################################
2131 12:45:59.247986
2132 12:45:59.973038 00080000 ################################################################
2133 12:45:59.973518
2134 12:46:00.685906 00100000 ################################################################
2135 12:46:00.686436
2136 12:46:01.417333 00180000 ################################################################
2137 12:46:01.418025
2138 12:46:02.125723 00200000 ################################################################
2139 12:46:02.126206
2140 12:46:02.832845 00280000 ################################################################
2141 12:46:02.833320
2142 12:46:03.570014 00300000 ################################################################
2143 12:46:03.570543
2144 12:46:04.276125 00380000 ################################################################
2145 12:46:04.276796
2146 12:46:04.996642 00400000 ################################################################
2147 12:46:04.997170
2148 12:46:05.712029 00480000 ################################################################
2149 12:46:05.712617
2150 12:46:06.409172 00500000 ############################################################### done.
2151 12:46:06.409745
2152 12:46:06.412611 Sending tftp read request... done.
2153 12:46:06.413042
2154 12:46:06.415610 Waiting for the transfer...
2155 12:46:06.416163
2156 12:46:06.416740 00000000 # done.
2157 12:46:06.417310
2158 12:46:06.425788 Command line loaded dynamically from TFTP file: 12948281/tftp-deploy-sb4vjq43/kernel/cmdline
2159 12:46:06.426323
2160 12:46:06.455092 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12948281/extract-nfsrootfs-_0oezat8,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2161 12:46:06.455614
2162 12:46:06.461820 ec_init(0): CrosEC protocol v3 supported (256, 256)
2163 12:46:06.465370
2164 12:46:06.469436 Shutting down all USB controllers.
2165 12:46:06.469950
2166 12:46:06.470290 Removing current net device
2167 12:46:06.472871
2168 12:46:06.473296 Finalizing coreboot
2169 12:46:06.473635
2170 12:46:06.479458 Exiting depthcharge with code 4 at timestamp: 30499508
2171 12:46:06.479882
2172 12:46:06.480213
2173 12:46:06.480584 Starting kernel ...
2174 12:46:06.480884
2175 12:46:06.481169
2176 12:46:06.482319 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
2177 12:46:06.482843 start: 2.2.5 auto-login-action (timeout 00:04:19) [common]
2178 12:46:06.483227 Setting prompt string to ['Linux version [0-9]']
2179 12:46:06.483579 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2180 12:46:06.483917 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2182 12:50:25.483092 end: 2.2.5 auto-login-action (duration 00:04:19) [common]
2184 12:50:25.483318 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 259 seconds'
2186 12:50:25.483490 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2189 12:50:25.483765 end: 2 depthcharge-action (duration 00:05:00) [common]
2191 12:50:25.484018 Cleaning after the job
2192 12:50:25.484118 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12948281/tftp-deploy-sb4vjq43/ramdisk
2193 12:50:25.485115 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12948281/tftp-deploy-sb4vjq43/kernel
2194 12:50:25.486663 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12948281/tftp-deploy-sb4vjq43/nfsrootfs
2195 12:50:25.570086 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12948281/tftp-deploy-sb4vjq43/modules
2196 12:50:25.570573 start: 5.1 power-off (timeout 00:00:30) [common]
2197 12:50:25.570764 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2198 12:50:25.656820 >> Command sent successfully.
2199 12:50:25.669855 Returned 0 in 0 seconds
2200 12:50:25.771215 end: 5.1 power-off (duration 00:00:00) [common]
2202 12:50:25.772807 start: 5.2 read-feedback (timeout 00:10:00) [common]
2203 12:50:25.774189 Listened to connection for namespace 'common' for up to 1s
2205 12:50:25.775722 Listened to connection for namespace 'common' for up to 1s
2206 12:50:26.774658 Finalising connection for namespace 'common'
2207 12:50:26.774841 Disconnecting from shell: Finalise
2208 12:50:26.774928
2209 12:50:26.875372 end: 5.2 read-feedback (duration 00:00:01) [common]
2210 12:50:26.875523 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12948281
2211 12:50:27.222933 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12948281
2212 12:50:27.223120 JobError: Your job cannot terminate cleanly.