Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 12:44:31.598139 lava-dispatcher, installed at version: 2024.01
2 12:44:31.598357 start: 0 validate
3 12:44:31.598502 Start time: 2024-03-05 12:44:31.598494+00:00 (UTC)
4 12:44:31.598631 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:44:31.598764 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20240129.0%2Famd64%2Finitrd.cpio.gz exists
6 12:44:31.881192 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:44:31.881857 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2247-g140bf69dc64d%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:44:32.143673 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:44:32.144456 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20240129.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:44:32.405290 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:44:32.405997 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2247-g140bf69dc64d%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 12:44:32.680307 validate duration: 1.08
14 12:44:32.680585 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:44:32.680682 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:44:32.680769 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:44:32.680898 Not decompressing ramdisk as can be used compressed.
18 12:44:32.680985 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20240129.0/amd64/initrd.cpio.gz
19 12:44:32.681049 saving as /var/lib/lava/dispatcher/tmp/12948317/tftp-deploy-yamreqmo/ramdisk/initrd.cpio.gz
20 12:44:32.681112 total size: 5431448 (5 MB)
21 12:44:32.682176 progress 0 % (0 MB)
22 12:44:32.683769 progress 5 % (0 MB)
23 12:44:32.685247 progress 10 % (0 MB)
24 12:44:32.686731 progress 15 % (0 MB)
25 12:44:32.688482 progress 20 % (1 MB)
26 12:44:32.689954 progress 25 % (1 MB)
27 12:44:32.691366 progress 30 % (1 MB)
28 12:44:32.692974 progress 35 % (1 MB)
29 12:44:32.694369 progress 40 % (2 MB)
30 12:44:32.695768 progress 45 % (2 MB)
31 12:44:32.697320 progress 50 % (2 MB)
32 12:44:32.698889 progress 55 % (2 MB)
33 12:44:32.700332 progress 60 % (3 MB)
34 12:44:32.701729 progress 65 % (3 MB)
35 12:44:32.703302 progress 70 % (3 MB)
36 12:44:32.704740 progress 75 % (3 MB)
37 12:44:32.706131 progress 80 % (4 MB)
38 12:44:32.707615 progress 85 % (4 MB)
39 12:44:32.709218 progress 90 % (4 MB)
40 12:44:32.710627 progress 95 % (4 MB)
41 12:44:32.712046 progress 100 % (5 MB)
42 12:44:32.712296 5 MB downloaded in 0.03 s (166.10 MB/s)
43 12:44:32.712450 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:44:32.712698 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:44:32.712786 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:44:32.712872 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:44:32.712996 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2247-g140bf69dc64d/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 12:44:32.713076 saving as /var/lib/lava/dispatcher/tmp/12948317/tftp-deploy-yamreqmo/kernel/bzImage
50 12:44:32.713137 total size: 9367440 (8 MB)
51 12:44:32.713198 No compression specified
52 12:44:32.714325 progress 0 % (0 MB)
53 12:44:32.716922 progress 5 % (0 MB)
54 12:44:32.719383 progress 10 % (0 MB)
55 12:44:32.721873 progress 15 % (1 MB)
56 12:44:32.724482 progress 20 % (1 MB)
57 12:44:32.727090 progress 25 % (2 MB)
58 12:44:32.729582 progress 30 % (2 MB)
59 12:44:32.732250 progress 35 % (3 MB)
60 12:44:32.734804 progress 40 % (3 MB)
61 12:44:32.737325 progress 45 % (4 MB)
62 12:44:32.739835 progress 50 % (4 MB)
63 12:44:32.742474 progress 55 % (4 MB)
64 12:44:32.745086 progress 60 % (5 MB)
65 12:44:32.747478 progress 65 % (5 MB)
66 12:44:32.750065 progress 70 % (6 MB)
67 12:44:32.752659 progress 75 % (6 MB)
68 12:44:32.755087 progress 80 % (7 MB)
69 12:44:32.757664 progress 85 % (7 MB)
70 12:44:32.760261 progress 90 % (8 MB)
71 12:44:32.762765 progress 95 % (8 MB)
72 12:44:32.765219 progress 100 % (8 MB)
73 12:44:32.765449 8 MB downloaded in 0.05 s (170.79 MB/s)
74 12:44:32.765596 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:44:32.765833 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:44:32.765922 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:44:32.766008 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:44:32.766144 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20240129.0/amd64/full.rootfs.tar.xz
80 12:44:32.766212 saving as /var/lib/lava/dispatcher/tmp/12948317/tftp-deploy-yamreqmo/nfsrootfs/full.rootfs.tar
81 12:44:32.766272 total size: 133429172 (127 MB)
82 12:44:32.766337 Using unxz to decompress xz
83 12:44:32.770668 progress 0 % (0 MB)
84 12:44:33.113462 progress 5 % (6 MB)
85 12:44:33.465982 progress 10 % (12 MB)
86 12:44:33.767961 progress 15 % (19 MB)
87 12:44:33.955635 progress 20 % (25 MB)
88 12:44:34.200178 progress 25 % (31 MB)
89 12:44:34.546314 progress 30 % (38 MB)
90 12:44:34.890707 progress 35 % (44 MB)
91 12:44:35.288323 progress 40 % (50 MB)
92 12:44:35.694137 progress 45 % (57 MB)
93 12:44:36.048603 progress 50 % (63 MB)
94 12:44:36.425033 progress 55 % (70 MB)
95 12:44:36.785936 progress 60 % (76 MB)
96 12:44:37.148107 progress 65 % (82 MB)
97 12:44:37.508480 progress 70 % (89 MB)
98 12:44:37.869338 progress 75 % (95 MB)
99 12:44:38.305692 progress 80 % (101 MB)
100 12:44:38.735949 progress 85 % (108 MB)
101 12:44:38.999036 progress 90 % (114 MB)
102 12:44:39.349425 progress 95 % (120 MB)
103 12:44:39.739062 progress 100 % (127 MB)
104 12:44:39.745292 127 MB downloaded in 6.98 s (18.23 MB/s)
105 12:44:39.745550 end: 1.3.1 http-download (duration 00:00:07) [common]
107 12:44:39.745814 end: 1.3 download-retry (duration 00:00:07) [common]
108 12:44:39.745908 start: 1.4 download-retry (timeout 00:09:53) [common]
109 12:44:39.746000 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 12:44:39.746157 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2247-g140bf69dc64d/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 12:44:39.746230 saving as /var/lib/lava/dispatcher/tmp/12948317/tftp-deploy-yamreqmo/modules/modules.tar
112 12:44:39.746292 total size: 251176 (0 MB)
113 12:44:39.746361 Using unxz to decompress xz
114 12:44:39.750564 progress 13 % (0 MB)
115 12:44:39.750969 progress 26 % (0 MB)
116 12:44:39.751208 progress 39 % (0 MB)
117 12:44:39.752797 progress 52 % (0 MB)
118 12:44:39.754737 progress 65 % (0 MB)
119 12:44:39.756528 progress 78 % (0 MB)
120 12:44:39.758389 progress 91 % (0 MB)
121 12:44:39.760164 progress 100 % (0 MB)
122 12:44:39.765606 0 MB downloaded in 0.02 s (12.41 MB/s)
123 12:44:39.765839 end: 1.4.1 http-download (duration 00:00:00) [common]
125 12:44:39.766108 end: 1.4 download-retry (duration 00:00:00) [common]
126 12:44:39.766211 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
127 12:44:39.766311 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
128 12:44:41.950584 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/12948317/extract-nfsrootfs-2nn0xctz
129 12:44:41.950773 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 12:44:41.950878 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
131 12:44:41.951045 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12948317/lava-overlay-4nafn17v
132 12:44:41.951177 makedir: /var/lib/lava/dispatcher/tmp/12948317/lava-overlay-4nafn17v/lava-12948317/bin
133 12:44:41.951280 makedir: /var/lib/lava/dispatcher/tmp/12948317/lava-overlay-4nafn17v/lava-12948317/tests
134 12:44:41.951381 makedir: /var/lib/lava/dispatcher/tmp/12948317/lava-overlay-4nafn17v/lava-12948317/results
135 12:44:41.951482 Creating /var/lib/lava/dispatcher/tmp/12948317/lava-overlay-4nafn17v/lava-12948317/bin/lava-add-keys
136 12:44:41.951624 Creating /var/lib/lava/dispatcher/tmp/12948317/lava-overlay-4nafn17v/lava-12948317/bin/lava-add-sources
137 12:44:41.951755 Creating /var/lib/lava/dispatcher/tmp/12948317/lava-overlay-4nafn17v/lava-12948317/bin/lava-background-process-start
138 12:44:41.951887 Creating /var/lib/lava/dispatcher/tmp/12948317/lava-overlay-4nafn17v/lava-12948317/bin/lava-background-process-stop
139 12:44:41.952015 Creating /var/lib/lava/dispatcher/tmp/12948317/lava-overlay-4nafn17v/lava-12948317/bin/lava-common-functions
140 12:44:41.952185 Creating /var/lib/lava/dispatcher/tmp/12948317/lava-overlay-4nafn17v/lava-12948317/bin/lava-echo-ipv4
141 12:44:41.952313 Creating /var/lib/lava/dispatcher/tmp/12948317/lava-overlay-4nafn17v/lava-12948317/bin/lava-install-packages
142 12:44:41.952440 Creating /var/lib/lava/dispatcher/tmp/12948317/lava-overlay-4nafn17v/lava-12948317/bin/lava-installed-packages
143 12:44:41.952566 Creating /var/lib/lava/dispatcher/tmp/12948317/lava-overlay-4nafn17v/lava-12948317/bin/lava-os-build
144 12:44:41.952692 Creating /var/lib/lava/dispatcher/tmp/12948317/lava-overlay-4nafn17v/lava-12948317/bin/lava-probe-channel
145 12:44:41.952818 Creating /var/lib/lava/dispatcher/tmp/12948317/lava-overlay-4nafn17v/lava-12948317/bin/lava-probe-ip
146 12:44:41.952944 Creating /var/lib/lava/dispatcher/tmp/12948317/lava-overlay-4nafn17v/lava-12948317/bin/lava-target-ip
147 12:44:41.953071 Creating /var/lib/lava/dispatcher/tmp/12948317/lava-overlay-4nafn17v/lava-12948317/bin/lava-target-mac
148 12:44:41.953198 Creating /var/lib/lava/dispatcher/tmp/12948317/lava-overlay-4nafn17v/lava-12948317/bin/lava-target-storage
149 12:44:41.953325 Creating /var/lib/lava/dispatcher/tmp/12948317/lava-overlay-4nafn17v/lava-12948317/bin/lava-test-case
150 12:44:41.953453 Creating /var/lib/lava/dispatcher/tmp/12948317/lava-overlay-4nafn17v/lava-12948317/bin/lava-test-event
151 12:44:41.953579 Creating /var/lib/lava/dispatcher/tmp/12948317/lava-overlay-4nafn17v/lava-12948317/bin/lava-test-feedback
152 12:44:41.953706 Creating /var/lib/lava/dispatcher/tmp/12948317/lava-overlay-4nafn17v/lava-12948317/bin/lava-test-raise
153 12:44:41.953831 Creating /var/lib/lava/dispatcher/tmp/12948317/lava-overlay-4nafn17v/lava-12948317/bin/lava-test-reference
154 12:44:41.953957 Creating /var/lib/lava/dispatcher/tmp/12948317/lava-overlay-4nafn17v/lava-12948317/bin/lava-test-runner
155 12:44:41.954082 Creating /var/lib/lava/dispatcher/tmp/12948317/lava-overlay-4nafn17v/lava-12948317/bin/lava-test-set
156 12:44:41.954207 Creating /var/lib/lava/dispatcher/tmp/12948317/lava-overlay-4nafn17v/lava-12948317/bin/lava-test-shell
157 12:44:41.954334 Updating /var/lib/lava/dispatcher/tmp/12948317/lava-overlay-4nafn17v/lava-12948317/bin/lava-install-packages (oe)
158 12:44:41.954489 Updating /var/lib/lava/dispatcher/tmp/12948317/lava-overlay-4nafn17v/lava-12948317/bin/lava-installed-packages (oe)
159 12:44:41.954613 Creating /var/lib/lava/dispatcher/tmp/12948317/lava-overlay-4nafn17v/lava-12948317/environment
160 12:44:41.954711 LAVA metadata
161 12:44:41.954780 - LAVA_JOB_ID=12948317
162 12:44:41.954843 - LAVA_DISPATCHER_IP=192.168.201.1
163 12:44:41.954943 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
164 12:44:41.955016 skipped lava-vland-overlay
165 12:44:41.955090 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 12:44:41.955171 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
167 12:44:41.955233 skipped lava-multinode-overlay
168 12:44:41.955304 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 12:44:41.955380 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
170 12:44:41.955452 Loading test definitions
171 12:44:41.955538 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
172 12:44:41.955610 Using /lava-12948317 at stage 0
173 12:44:41.955923 uuid=12948317_1.5.2.3.1 testdef=None
174 12:44:41.956011 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 12:44:41.956319 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
176 12:44:41.956838 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 12:44:41.957060 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
179 12:44:41.957701 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 12:44:41.957930 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
182 12:44:41.958550 runner path: /var/lib/lava/dispatcher/tmp/12948317/lava-overlay-4nafn17v/lava-12948317/0/tests/0_dmesg test_uuid 12948317_1.5.2.3.1
183 12:44:41.958711 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 12:44:41.958935 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
186 12:44:41.959006 Using /lava-12948317 at stage 1
187 12:44:41.959305 uuid=12948317_1.5.2.3.5 testdef=None
188 12:44:41.959393 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 12:44:41.959477 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
190 12:44:41.959947 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 12:44:41.960195 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
193 12:44:41.960836 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 12:44:41.961063 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
196 12:44:41.961686 runner path: /var/lib/lava/dispatcher/tmp/12948317/lava-overlay-4nafn17v/lava-12948317/1/tests/1_bootrr test_uuid 12948317_1.5.2.3.5
197 12:44:41.961839 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 12:44:41.962039 Creating lava-test-runner.conf files
200 12:44:41.962101 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12948317/lava-overlay-4nafn17v/lava-12948317/0 for stage 0
201 12:44:41.962189 - 0_dmesg
202 12:44:41.962267 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12948317/lava-overlay-4nafn17v/lava-12948317/1 for stage 1
203 12:44:41.962357 - 1_bootrr
204 12:44:41.962451 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 12:44:41.962534 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
206 12:44:41.970049 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 12:44:41.970151 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
208 12:44:41.970233 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 12:44:41.970317 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 12:44:41.970401 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
211 12:44:42.109219 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 12:44:42.109601 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
213 12:44:42.109716 extracting modules file /var/lib/lava/dispatcher/tmp/12948317/tftp-deploy-yamreqmo/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12948317/extract-nfsrootfs-2nn0xctz
214 12:44:42.123280 extracting modules file /var/lib/lava/dispatcher/tmp/12948317/tftp-deploy-yamreqmo/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12948317/extract-overlay-ramdisk-a3uz1u38/ramdisk
215 12:44:42.136817 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 12:44:42.136940 start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
217 12:44:42.137031 [common] Applying overlay to NFS
218 12:44:42.137105 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12948317/compress-overlay-jaxdshsz/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12948317/extract-nfsrootfs-2nn0xctz
219 12:44:42.145360 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 12:44:42.145469 start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
221 12:44:42.145564 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 12:44:42.145655 start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
223 12:44:42.145732 Building ramdisk /var/lib/lava/dispatcher/tmp/12948317/extract-overlay-ramdisk-a3uz1u38/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12948317/extract-overlay-ramdisk-a3uz1u38/ramdisk
224 12:44:42.216656 >> 26151 blocks
225 12:44:42.762515 rename /var/lib/lava/dispatcher/tmp/12948317/extract-overlay-ramdisk-a3uz1u38/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12948317/tftp-deploy-yamreqmo/ramdisk/ramdisk.cpio.gz
226 12:44:42.762978 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 12:44:42.763102 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
228 12:44:42.763210 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
229 12:44:42.763305 No mkimage arch provided, not using FIT.
230 12:44:42.763397 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 12:44:42.763483 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 12:44:42.763589 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 12:44:42.763707 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
234 12:44:42.763805 No LXC device requested
235 12:44:42.763886 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 12:44:42.763977 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
237 12:44:42.764081 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 12:44:42.764173 Checking files for TFTP limit of 4294967296 bytes.
239 12:44:42.764583 end: 1 tftp-deploy (duration 00:00:10) [common]
240 12:44:42.764692 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 12:44:42.764783 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 12:44:42.764914 substitutions:
243 12:44:42.764983 - {DTB}: None
244 12:44:42.765044 - {INITRD}: 12948317/tftp-deploy-yamreqmo/ramdisk/ramdisk.cpio.gz
245 12:44:42.765103 - {KERNEL}: 12948317/tftp-deploy-yamreqmo/kernel/bzImage
246 12:44:42.765160 - {LAVA_MAC}: None
247 12:44:42.765215 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/12948317/extract-nfsrootfs-2nn0xctz
248 12:44:42.765271 - {NFS_SERVER_IP}: 192.168.201.1
249 12:44:42.765326 - {PRESEED_CONFIG}: None
250 12:44:42.765380 - {PRESEED_LOCAL}: None
251 12:44:42.765434 - {RAMDISK}: 12948317/tftp-deploy-yamreqmo/ramdisk/ramdisk.cpio.gz
252 12:44:42.765489 - {ROOT_PART}: None
253 12:44:42.765543 - {ROOT}: None
254 12:44:42.765597 - {SERVER_IP}: 192.168.201.1
255 12:44:42.765650 - {TEE}: None
256 12:44:42.765704 Parsed boot commands:
257 12:44:42.765758 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 12:44:42.765939 Parsed boot commands: tftpboot 192.168.201.1 12948317/tftp-deploy-yamreqmo/kernel/bzImage 12948317/tftp-deploy-yamreqmo/kernel/cmdline 12948317/tftp-deploy-yamreqmo/ramdisk/ramdisk.cpio.gz
259 12:44:42.766027 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 12:44:42.766114 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 12:44:42.766207 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 12:44:42.766293 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 12:44:42.766367 Not connected, no need to disconnect.
264 12:44:42.766442 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 12:44:42.766529 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 12:44:42.766601 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-9'
267 12:44:42.770751 Setting prompt string to ['lava-test: # ']
268 12:44:42.771114 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 12:44:42.771225 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 12:44:42.771324 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 12:44:42.771418 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 12:44:42.771615 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=reboot'
273 12:44:47.913023 >> Command sent successfully.
274 12:44:47.923839 Returned 0 in 5 seconds
275 12:44:48.025240 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 12:44:48.027093 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 12:44:48.027663 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 12:44:48.028280 Setting prompt string to 'Starting depthcharge on Voema...'
280 12:44:48.028677 Changing prompt to 'Starting depthcharge on Voema...'
281 12:44:48.029050 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
282 12:44:48.030811 [Enter `^Ec?' for help]
283 12:44:49.581923
284 12:44:49.582517
285 12:44:49.591942 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
286 12:44:49.595118 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
287 12:44:49.601670 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
288 12:44:49.605222 CPU: AES supported, TXT NOT supported, VT supported
289 12:44:49.611913 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
290 12:44:49.618563 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
291 12:44:49.621891 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
292 12:44:49.624861 VBOOT: Loading verstage.
293 12:44:49.628578 FMAP: Found "FLASH" version 1.1 at 0x1804000.
294 12:44:49.635169 FMAP: base = 0x0 size = 0x2000000 #areas = 32
295 12:44:49.638561 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
296 12:44:49.649126 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
297 12:44:49.655644 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
298 12:44:49.656111
299 12:44:49.656463
300 12:44:49.668821 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
301 12:44:49.682598 Probing TPM: . done!
302 12:44:49.685897 TPM ready after 0 ms
303 12:44:49.689194 Connected to device vid:did:rid of 1ae0:0028:00
304 12:44:49.700897 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
305 12:44:49.706841 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
306 12:44:49.710235 Initialized TPM device CR50 revision 0
307 12:44:49.760959 tlcl_send_startup: Startup return code is 0
308 12:44:49.761424 TPM: setup succeeded
309 12:44:49.776902 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
310 12:44:49.791830 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
311 12:44:49.805723 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
312 12:44:49.815690 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
313 12:44:49.819707 Chrome EC: UHEPI supported
314 12:44:49.823035 Phase 1
315 12:44:49.826249 FMAP: area GBB found @ 1805000 (458752 bytes)
316 12:44:49.835963 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
317 12:44:49.842821 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
318 12:44:49.849403 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
319 12:44:49.856024 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
320 12:44:49.859329 Recovery requested (1009000e)
321 12:44:49.862689 TPM: Extending digest for VBOOT: boot mode into PCR 0
322 12:44:49.874208 tlcl_extend: response is 0
323 12:44:49.880451 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
324 12:44:49.890218 tlcl_extend: response is 0
325 12:44:49.896814 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
326 12:44:49.903804 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
327 12:44:49.910368 BS: verstage times (exec / console): total (unknown) / 142 ms
328 12:44:49.910453
329 12:44:49.910520
330 12:44:49.923383 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
331 12:44:49.930486 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
332 12:44:49.933239 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
333 12:44:49.936612 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
334 12:44:49.943437 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
335 12:44:49.946875 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
336 12:44:49.950100 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
337 12:44:49.953376 TCO_STS: 0000 0000
338 12:44:49.956738 GEN_PMCON: d0015038 00002200
339 12:44:49.959990 GBLRST_CAUSE: 00000000 00000000
340 12:44:49.963459 HPR_CAUSE0: 00000000
341 12:44:49.963543 prev_sleep_state 5
342 12:44:49.966832 Boot Count incremented to 27253
343 12:44:49.973007 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
344 12:44:49.979943 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
345 12:44:49.989343 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
346 12:44:49.996003 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
347 12:44:49.999371 Chrome EC: UHEPI supported
348 12:44:50.005962 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
349 12:44:50.017843 Probing TPM: done!
350 12:44:50.025267 Connected to device vid:did:rid of 1ae0:0028:00
351 12:44:50.035209 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
352 12:44:50.038597 Initialized TPM device CR50 revision 0
353 12:44:50.053087 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
354 12:44:50.059337 MRC: Hash idx 0x100b comparison successful.
355 12:44:50.063211 MRC cache found, size faa8
356 12:44:50.063292 bootmode is set to: 2
357 12:44:50.065999 SPD index = 0
358 12:44:50.072854 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
359 12:44:50.076190 SPD: module type is LPDDR4X
360 12:44:50.079381 SPD: module part number is MT53E512M64D4NW-046
361 12:44:50.086029 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
362 12:44:50.089360 SPD: device width 16 bits, bus width 16 bits
363 12:44:50.096139 SPD: module size is 1024 MB (per channel)
364 12:44:50.529479 CBMEM:
365 12:44:50.532621 IMD: root @ 0x76fff000 254 entries.
366 12:44:50.535767 IMD: root @ 0x76ffec00 62 entries.
367 12:44:50.539507 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
368 12:44:50.545606 FMAP: area RW_VPD found @ f35000 (8192 bytes)
369 12:44:50.549460 External stage cache:
370 12:44:50.552741 IMD: root @ 0x7b3ff000 254 entries.
371 12:44:50.555682 IMD: root @ 0x7b3fec00 62 entries.
372 12:44:50.571096 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
373 12:44:50.577821 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
374 12:44:50.584564 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
375 12:44:50.598277 MRC: 'RECOVERY_MRC_CACHE' does not need update.
376 12:44:50.602443 cse_lite: Skip switching to RW in the recovery path
377 12:44:50.605904 8 DIMMs found
378 12:44:50.605980 SMM Memory Map
379 12:44:50.609183 SMRAM : 0x7b000000 0x800000
380 12:44:50.612547 Subregion 0: 0x7b000000 0x200000
381 12:44:50.616085 Subregion 1: 0x7b200000 0x200000
382 12:44:50.619273 Subregion 2: 0x7b400000 0x400000
383 12:44:50.622723 top_of_ram = 0x77000000
384 12:44:50.628950 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
385 12:44:50.632740 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
386 12:44:50.639187 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
387 12:44:50.642376 MTRR Range: Start=ff000000 End=0 (Size 1000000)
388 12:44:50.652552 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
389 12:44:50.658926 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
390 12:44:50.668752 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
391 12:44:50.672013 Processing 211 relocs. Offset value of 0x74c0b000
392 12:44:50.681457 BS: romstage times (exec / console): total (unknown) / 277 ms
393 12:44:50.687470
394 12:44:50.687571
395 12:44:50.697172 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
396 12:44:50.700511 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
397 12:44:50.710645 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
398 12:44:50.717164 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
399 12:44:50.723742 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
400 12:44:50.730354 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
401 12:44:50.777346 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
402 12:44:50.783749 Processing 5008 relocs. Offset value of 0x75d98000
403 12:44:50.787030 BS: postcar times (exec / console): total (unknown) / 59 ms
404 12:44:50.790275
405 12:44:50.790349
406 12:44:50.800375 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
407 12:44:50.800454 Normal boot
408 12:44:50.803812 FW_CONFIG value is 0x804c02
409 12:44:50.807170 PCI: 00:07.0 disabled by fw_config
410 12:44:50.810547 PCI: 00:07.1 disabled by fw_config
411 12:44:50.813841 PCI: 00:0d.2 disabled by fw_config
412 12:44:50.817168 PCI: 00:1c.7 disabled by fw_config
413 12:44:50.823667 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 12:44:50.830197 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
415 12:44:50.833685 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
416 12:44:50.836818 GENERIC: 0.0 disabled by fw_config
417 12:44:50.843526 GENERIC: 1.0 disabled by fw_config
418 12:44:50.847244 fw_config match found: DB_USB=USB3_ACTIVE
419 12:44:50.850072 fw_config match found: DB_USB=USB3_ACTIVE
420 12:44:50.853821 fw_config match found: DB_USB=USB3_ACTIVE
421 12:44:50.860121 fw_config match found: DB_USB=USB3_ACTIVE
422 12:44:50.863469 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
423 12:44:50.870206 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
424 12:44:50.880047 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
425 12:44:50.886750 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
426 12:44:50.889955 microcode: sig=0x806c1 pf=0x80 revision=0x86
427 12:44:50.896781 microcode: Update skipped, already up-to-date
428 12:44:50.903326 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
429 12:44:50.930582 Detected 4 core, 8 thread CPU.
430 12:44:50.934398 Setting up SMI for CPU
431 12:44:50.937698 IED base = 0x7b400000
432 12:44:50.940435 IED size = 0x00400000
433 12:44:50.940508 Will perform SMM setup.
434 12:44:50.947626 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
435 12:44:50.954018 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
436 12:44:50.960281 Processing 16 relocs. Offset value of 0x00030000
437 12:44:50.963891 Attempting to start 7 APs
438 12:44:50.967356 Waiting for 10ms after sending INIT.
439 12:44:50.982849 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
440 12:44:50.982959 done.
441 12:44:50.986302 AP: slot 6 apic_id 2.
442 12:44:50.989597 AP: slot 7 apic_id 7.
443 12:44:50.989698 AP: slot 3 apic_id 6.
444 12:44:50.992730 AP: slot 2 apic_id 3.
445 12:44:50.996348 AP: slot 5 apic_id 5.
446 12:44:50.999762 Waiting for 2nd SIPI to complete...done.
447 12:44:51.003044 AP: slot 4 apic_id 4.
448 12:44:51.009219 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
449 12:44:51.016002 Processing 13 relocs. Offset value of 0x00038000
450 12:44:51.016101 Unable to locate Global NVS
451 12:44:51.026548 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
452 12:44:51.029369 Installing permanent SMM handler to 0x7b000000
453 12:44:51.039151 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
454 12:44:51.042515 Processing 794 relocs. Offset value of 0x7b010000
455 12:44:51.052490 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
456 12:44:51.055784 Processing 13 relocs. Offset value of 0x7b008000
457 12:44:51.062190 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
458 12:44:51.068985 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
459 12:44:51.072496 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
460 12:44:51.078957 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
461 12:44:51.085463 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
462 12:44:51.091826 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
463 12:44:51.098701 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
464 12:44:51.101894 Unable to locate Global NVS
465 12:44:51.108547 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
466 12:44:51.111803 Clearing SMI status registers
467 12:44:51.115138 SMI_STS: PM1
468 12:44:51.115222 PM1_STS: PWRBTN
469 12:44:51.122035 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
470 12:44:51.125429 In relocation handler: CPU 0
471 12:44:51.128932 New SMBASE=0x7b000000 IEDBASE=0x7b400000
472 12:44:51.134938 Writing SMRR. base = 0x7b000006, mask=0xff800c00
473 12:44:51.138244 Relocation complete.
474 12:44:51.144734 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
475 12:44:51.148543 In relocation handler: CPU 1
476 12:44:51.151347 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
477 12:44:51.154893 Relocation complete.
478 12:44:51.161630 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
479 12:44:51.164859 In relocation handler: CPU 3
480 12:44:51.167945 New SMBASE=0x7afff400 IEDBASE=0x7b400000
481 12:44:51.171263 Writing SMRR. base = 0x7b000006, mask=0xff800c00
482 12:44:51.174611 Relocation complete.
483 12:44:51.181357 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
484 12:44:51.184603 In relocation handler: CPU 7
485 12:44:51.188069 New SMBASE=0x7affe400 IEDBASE=0x7b400000
486 12:44:51.191234 Relocation complete.
487 12:44:51.197865 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
488 12:44:51.200843 In relocation handler: CPU 2
489 12:44:51.204581 New SMBASE=0x7afff800 IEDBASE=0x7b400000
490 12:44:51.207974 Relocation complete.
491 12:44:51.214102 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
492 12:44:51.217637 In relocation handler: CPU 6
493 12:44:51.220791 New SMBASE=0x7affe800 IEDBASE=0x7b400000
494 12:44:51.227441 Writing SMRR. base = 0x7b000006, mask=0xff800c00
495 12:44:51.227526 Relocation complete.
496 12:44:51.237632 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
497 12:44:51.240950 In relocation handler: CPU 5
498 12:44:51.244086 New SMBASE=0x7affec00 IEDBASE=0x7b400000
499 12:44:51.244173 Relocation complete.
500 12:44:51.253982 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
501 12:44:51.254068 In relocation handler: CPU 4
502 12:44:51.260904 New SMBASE=0x7afff000 IEDBASE=0x7b400000
503 12:44:51.263773 Writing SMRR. base = 0x7b000006, mask=0xff800c00
504 12:44:51.267765 Relocation complete.
505 12:44:51.267875 Initializing CPU #0
506 12:44:51.271683 CPU: vendor Intel device 806c1
507 12:44:51.274967 CPU: family 06, model 8c, stepping 01
508 12:44:51.278164 Clearing out pending MCEs
509 12:44:51.281734 Setting up local APIC...
510 12:44:51.285012 apic_id: 0x00 done.
511 12:44:51.288499 Turbo is available but hidden
512 12:44:51.288587 Turbo is available and visible
513 12:44:51.294746 microcode: Update skipped, already up-to-date
514 12:44:51.298028 CPU #0 initialized
515 12:44:51.298112 Initializing CPU #1
516 12:44:51.301138 Initializing CPU #7
517 12:44:51.301292 Initializing CPU #3
518 12:44:51.304504 CPU: vendor Intel device 806c1
519 12:44:51.311402 CPU: family 06, model 8c, stepping 01
520 12:44:51.311487 CPU: vendor Intel device 806c1
521 12:44:51.317866 CPU: family 06, model 8c, stepping 01
522 12:44:51.317951 Clearing out pending MCEs
523 12:44:51.321429 Clearing out pending MCEs
524 12:44:51.324483 Setting up local APIC...
525 12:44:51.327686 Initializing CPU #4
526 12:44:51.327770 Setting up local APIC...
527 12:44:51.331134 CPU: vendor Intel device 806c1
528 12:44:51.334365 CPU: family 06, model 8c, stepping 01
529 12:44:51.337504 Initializing CPU #5
530 12:44:51.340864 Clearing out pending MCEs
531 12:44:51.344192 CPU: vendor Intel device 806c1
532 12:44:51.347556 CPU: family 06, model 8c, stepping 01
533 12:44:51.351181 Clearing out pending MCEs
534 12:44:51.354396 Setting up local APIC...
535 12:44:51.354481 apic_id: 0x06 done.
536 12:44:51.357298 apic_id: 0x07 done.
537 12:44:51.360505 microcode: Update skipped, already up-to-date
538 12:44:51.363861 CPU: vendor Intel device 806c1
539 12:44:51.367217 CPU: family 06, model 8c, stepping 01
540 12:44:51.370649 apic_id: 0x04 done.
541 12:44:51.373968 Setting up local APIC...
542 12:44:51.374052 CPU #3 initialized
543 12:44:51.377361 Initializing CPU #2
544 12:44:51.380787 Initializing CPU #6
545 12:44:51.384026 CPU: vendor Intel device 806c1
546 12:44:51.387491 CPU: family 06, model 8c, stepping 01
547 12:44:51.390347 CPU: vendor Intel device 806c1
548 12:44:51.393714 CPU: family 06, model 8c, stepping 01
549 12:44:51.396990 Clearing out pending MCEs
550 12:44:51.397074 Clearing out pending MCEs
551 12:44:51.400610 Setting up local APIC...
552 12:44:51.403658 Clearing out pending MCEs
553 12:44:51.406808 apic_id: 0x05 done.
554 12:44:51.410120 microcode: Update skipped, already up-to-date
555 12:44:51.413500 microcode: Update skipped, already up-to-date
556 12:44:51.416870 CPU #4 initialized
557 12:44:51.420679 CPU #5 initialized
558 12:44:51.420762 Setting up local APIC...
559 12:44:51.423464 Setting up local APIC...
560 12:44:51.426856 microcode: Update skipped, already up-to-date
561 12:44:51.430285 apic_id: 0x01 done.
562 12:44:51.433715 CPU #7 initialized
563 12:44:51.433799 apic_id: 0x03 done.
564 12:44:51.436913 apic_id: 0x02 done.
565 12:44:51.440159 microcode: Update skipped, already up-to-date
566 12:44:51.446498 microcode: Update skipped, already up-to-date
567 12:44:51.446583 CPU #2 initialized
568 12:44:51.450015 CPU #6 initialized
569 12:44:51.453566 microcode: Update skipped, already up-to-date
570 12:44:51.456648 CPU #1 initialized
571 12:44:51.460309 bsp_do_flight_plan done after 457 msecs.
572 12:44:51.463308 CPU: frequency set to 4000 MHz
573 12:44:51.466169 Enabling SMIs.
574 12:44:51.472807 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
575 12:44:51.487926 SATAXPCIE1 indicates PCIe NVMe is present
576 12:44:51.491442 Probing TPM: done!
577 12:44:51.494411 Connected to device vid:did:rid of 1ae0:0028:00
578 12:44:51.505391 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
579 12:44:51.508505 Initialized TPM device CR50 revision 0
580 12:44:51.511560 Enabling S0i3.4
581 12:44:51.518147 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
582 12:44:51.521514 Found a VBT of 8704 bytes after decompression
583 12:44:51.528076 cse_lite: CSE RO boot. HybridStorageMode disabled
584 12:44:51.534855 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
585 12:44:51.611577 FSPS returned 0
586 12:44:51.615235 Executing Phase 1 of FspMultiPhaseSiInit
587 12:44:51.625005 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
588 12:44:51.628301 port C0 DISC req: usage 1 usb3 1 usb2 5
589 12:44:51.631668 Raw Buffer output 0 00000511
590 12:44:51.635023 Raw Buffer output 1 00000000
591 12:44:51.638350 pmc_send_ipc_cmd succeeded
592 12:44:51.645029 port C1 DISC req: usage 1 usb3 2 usb2 3
593 12:44:51.645114 Raw Buffer output 0 00000321
594 12:44:51.648577 Raw Buffer output 1 00000000
595 12:44:51.652807 pmc_send_ipc_cmd succeeded
596 12:44:51.657912 Detected 4 core, 8 thread CPU.
597 12:44:51.661276 Detected 4 core, 8 thread CPU.
598 12:44:51.895307 Display FSP Version Info HOB
599 12:44:51.898217 Reference Code - CPU = a.0.4c.31
600 12:44:51.901933 uCode Version = 0.0.0.86
601 12:44:51.905191 TXT ACM version = ff.ff.ff.ffff
602 12:44:51.908595 Reference Code - ME = a.0.4c.31
603 12:44:51.911252 MEBx version = 0.0.0.0
604 12:44:51.914711 ME Firmware Version = Consumer SKU
605 12:44:51.917940 Reference Code - PCH = a.0.4c.31
606 12:44:51.921707 PCH-CRID Status = Disabled
607 12:44:51.924971 PCH-CRID Original Value = ff.ff.ff.ffff
608 12:44:51.928333 PCH-CRID New Value = ff.ff.ff.ffff
609 12:44:51.931079 OPROM - RST - RAID = ff.ff.ff.ffff
610 12:44:51.934412 PCH Hsio Version = 4.0.0.0
611 12:44:51.938083 Reference Code - SA - System Agent = a.0.4c.31
612 12:44:51.941181 Reference Code - MRC = 2.0.0.1
613 12:44:51.944747 SA - PCIe Version = a.0.4c.31
614 12:44:51.947850 SA-CRID Status = Disabled
615 12:44:51.951124 SA-CRID Original Value = 0.0.0.1
616 12:44:51.954653 SA-CRID New Value = 0.0.0.1
617 12:44:51.957848 OPROM - VBIOS = ff.ff.ff.ffff
618 12:44:51.961328 IO Manageability Engine FW Version = 11.1.4.0
619 12:44:51.964554 PHY Build Version = 0.0.0.e0
620 12:44:51.967792 Thunderbolt(TM) FW Version = 0.0.0.0
621 12:44:51.974697 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
622 12:44:51.978143 ITSS IRQ Polarities Before:
623 12:44:51.978227 IPC0: 0xffffffff
624 12:44:51.981392 IPC1: 0xffffffff
625 12:44:51.981476 IPC2: 0xffffffff
626 12:44:51.984654 IPC3: 0xffffffff
627 12:44:51.987817 ITSS IRQ Polarities After:
628 12:44:51.987901 IPC0: 0xffffffff
629 12:44:51.990953 IPC1: 0xffffffff
630 12:44:51.991037 IPC2: 0xffffffff
631 12:44:51.994294 IPC3: 0xffffffff
632 12:44:51.997544 Found PCIe Root Port #9 at PCI: 00:1d.0.
633 12:44:52.011122 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
634 12:44:52.021055 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
635 12:44:52.034319 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
636 12:44:52.040555 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
637 12:44:52.044458 Enumerating buses...
638 12:44:52.047072 Show all devs... Before device enumeration.
639 12:44:52.050749 Root Device: enabled 1
640 12:44:52.050834 DOMAIN: 0000: enabled 1
641 12:44:52.054121 CPU_CLUSTER: 0: enabled 1
642 12:44:52.057384 PCI: 00:00.0: enabled 1
643 12:44:52.060745 PCI: 00:02.0: enabled 1
644 12:44:52.060829 PCI: 00:04.0: enabled 1
645 12:44:52.063995 PCI: 00:05.0: enabled 1
646 12:44:52.067572 PCI: 00:06.0: enabled 0
647 12:44:52.070816 PCI: 00:07.0: enabled 0
648 12:44:52.070900 PCI: 00:07.1: enabled 0
649 12:44:52.073976 PCI: 00:07.2: enabled 0
650 12:44:52.077240 PCI: 00:07.3: enabled 0
651 12:44:52.080361 PCI: 00:08.0: enabled 1
652 12:44:52.080446 PCI: 00:09.0: enabled 0
653 12:44:52.083652 PCI: 00:0a.0: enabled 0
654 12:44:52.087122 PCI: 00:0d.0: enabled 1
655 12:44:52.087206 PCI: 00:0d.1: enabled 0
656 12:44:52.090648 PCI: 00:0d.2: enabled 0
657 12:44:52.093737 PCI: 00:0d.3: enabled 0
658 12:44:52.097001 PCI: 00:0e.0: enabled 0
659 12:44:52.097083 PCI: 00:10.2: enabled 1
660 12:44:52.100545 PCI: 00:10.6: enabled 0
661 12:44:52.103581 PCI: 00:10.7: enabled 0
662 12:44:52.106950 PCI: 00:12.0: enabled 0
663 12:44:52.107028 PCI: 00:12.6: enabled 0
664 12:44:52.110308 PCI: 00:13.0: enabled 0
665 12:44:52.113781 PCI: 00:14.0: enabled 1
666 12:44:52.117160 PCI: 00:14.1: enabled 0
667 12:44:52.117239 PCI: 00:14.2: enabled 1
668 12:44:52.120447 PCI: 00:14.3: enabled 1
669 12:44:52.123354 PCI: 00:15.0: enabled 1
670 12:44:52.126671 PCI: 00:15.1: enabled 1
671 12:44:52.126773 PCI: 00:15.2: enabled 1
672 12:44:52.129977 PCI: 00:15.3: enabled 1
673 12:44:52.133299 PCI: 00:16.0: enabled 1
674 12:44:52.136631 PCI: 00:16.1: enabled 0
675 12:44:52.136737 PCI: 00:16.2: enabled 0
676 12:44:52.140100 PCI: 00:16.3: enabled 0
677 12:44:52.143480 PCI: 00:16.4: enabled 0
678 12:44:52.143564 PCI: 00:16.5: enabled 0
679 12:44:52.146837 PCI: 00:17.0: enabled 1
680 12:44:52.150248 PCI: 00:19.0: enabled 0
681 12:44:52.153448 PCI: 00:19.1: enabled 1
682 12:44:52.153533 PCI: 00:19.2: enabled 0
683 12:44:52.156513 PCI: 00:1c.0: enabled 1
684 12:44:52.159896 PCI: 00:1c.1: enabled 0
685 12:44:52.163121 PCI: 00:1c.2: enabled 0
686 12:44:52.163205 PCI: 00:1c.3: enabled 0
687 12:44:52.166657 PCI: 00:1c.4: enabled 0
688 12:44:52.169992 PCI: 00:1c.5: enabled 0
689 12:44:52.173420 PCI: 00:1c.6: enabled 1
690 12:44:52.173505 PCI: 00:1c.7: enabled 0
691 12:44:52.176588 PCI: 00:1d.0: enabled 1
692 12:44:52.179842 PCI: 00:1d.1: enabled 0
693 12:44:52.183020 PCI: 00:1d.2: enabled 1
694 12:44:52.183104 PCI: 00:1d.3: enabled 0
695 12:44:52.186368 PCI: 00:1e.0: enabled 1
696 12:44:52.189531 PCI: 00:1e.1: enabled 0
697 12:44:52.193058 PCI: 00:1e.2: enabled 1
698 12:44:52.193143 PCI: 00:1e.3: enabled 1
699 12:44:52.196008 PCI: 00:1f.0: enabled 1
700 12:44:52.199663 PCI: 00:1f.1: enabled 0
701 12:44:52.199747 PCI: 00:1f.2: enabled 1
702 12:44:52.203036 PCI: 00:1f.3: enabled 1
703 12:44:52.206115 PCI: 00:1f.4: enabled 0
704 12:44:52.209322 PCI: 00:1f.5: enabled 1
705 12:44:52.209406 PCI: 00:1f.6: enabled 0
706 12:44:52.212730 PCI: 00:1f.7: enabled 0
707 12:44:52.216008 APIC: 00: enabled 1
708 12:44:52.219575 GENERIC: 0.0: enabled 1
709 12:44:52.219679 GENERIC: 0.0: enabled 1
710 12:44:52.222437 GENERIC: 1.0: enabled 1
711 12:44:52.225904 GENERIC: 0.0: enabled 1
712 12:44:52.229299 GENERIC: 1.0: enabled 1
713 12:44:52.229403 USB0 port 0: enabled 1
714 12:44:52.232565 GENERIC: 0.0: enabled 1
715 12:44:52.235682 USB0 port 0: enabled 1
716 12:44:52.235786 GENERIC: 0.0: enabled 1
717 12:44:52.239109 I2C: 00:1a: enabled 1
718 12:44:52.242448 I2C: 00:31: enabled 1
719 12:44:52.242550 I2C: 00:32: enabled 1
720 12:44:52.245797 I2C: 00:10: enabled 1
721 12:44:52.249192 I2C: 00:15: enabled 1
722 12:44:52.252466 GENERIC: 0.0: enabled 0
723 12:44:52.252572 GENERIC: 1.0: enabled 0
724 12:44:52.255846 GENERIC: 0.0: enabled 1
725 12:44:52.258940 SPI: 00: enabled 1
726 12:44:52.259042 SPI: 00: enabled 1
727 12:44:52.262010 PNP: 0c09.0: enabled 1
728 12:44:52.265448 GENERIC: 0.0: enabled 1
729 12:44:52.265528 USB3 port 0: enabled 1
730 12:44:52.268870 USB3 port 1: enabled 1
731 12:44:52.272264 USB3 port 2: enabled 0
732 12:44:52.272342 USB3 port 3: enabled 0
733 12:44:52.275570 USB2 port 0: enabled 0
734 12:44:52.278858 USB2 port 1: enabled 1
735 12:44:52.282177 USB2 port 2: enabled 1
736 12:44:52.282254 USB2 port 3: enabled 0
737 12:44:52.285414 USB2 port 4: enabled 1
738 12:44:52.288752 USB2 port 5: enabled 0
739 12:44:52.288855 USB2 port 6: enabled 0
740 12:44:52.291660 USB2 port 7: enabled 0
741 12:44:52.295067 USB2 port 8: enabled 0
742 12:44:52.298329 USB2 port 9: enabled 0
743 12:44:52.298410 USB3 port 0: enabled 0
744 12:44:52.302064 USB3 port 1: enabled 1
745 12:44:52.305342 USB3 port 2: enabled 0
746 12:44:52.305420 USB3 port 3: enabled 0
747 12:44:52.308668 GENERIC: 0.0: enabled 1
748 12:44:52.311993 GENERIC: 1.0: enabled 1
749 12:44:52.315309 APIC: 01: enabled 1
750 12:44:52.315412 APIC: 03: enabled 1
751 12:44:52.318358 APIC: 06: enabled 1
752 12:44:52.318444 APIC: 04: enabled 1
753 12:44:52.321646 APIC: 05: enabled 1
754 12:44:52.325135 APIC: 02: enabled 1
755 12:44:52.325218 APIC: 07: enabled 1
756 12:44:52.328076 Compare with tree...
757 12:44:52.331696 Root Device: enabled 1
758 12:44:52.331780 DOMAIN: 0000: enabled 1
759 12:44:52.334759 PCI: 00:00.0: enabled 1
760 12:44:52.338273 PCI: 00:02.0: enabled 1
761 12:44:52.341810 PCI: 00:04.0: enabled 1
762 12:44:52.344755 GENERIC: 0.0: enabled 1
763 12:44:52.344854 PCI: 00:05.0: enabled 1
764 12:44:52.348546 PCI: 00:06.0: enabled 0
765 12:44:52.351362 PCI: 00:07.0: enabled 0
766 12:44:52.354722 GENERIC: 0.0: enabled 1
767 12:44:52.358239 PCI: 00:07.1: enabled 0
768 12:44:52.358338 GENERIC: 1.0: enabled 1
769 12:44:52.361495 PCI: 00:07.2: enabled 0
770 12:44:52.364747 GENERIC: 0.0: enabled 1
771 12:44:52.368043 PCI: 00:07.3: enabled 0
772 12:44:52.371317 GENERIC: 1.0: enabled 1
773 12:44:52.374691 PCI: 00:08.0: enabled 1
774 12:44:52.374794 PCI: 00:09.0: enabled 0
775 12:44:52.378113 PCI: 00:0a.0: enabled 0
776 12:44:52.381055 PCI: 00:0d.0: enabled 1
777 12:44:52.384418 USB0 port 0: enabled 1
778 12:44:52.387584 USB3 port 0: enabled 1
779 12:44:52.387689 USB3 port 1: enabled 1
780 12:44:52.390854 USB3 port 2: enabled 0
781 12:44:52.394266 USB3 port 3: enabled 0
782 12:44:52.397641 PCI: 00:0d.1: enabled 0
783 12:44:52.400749 PCI: 00:0d.2: enabled 0
784 12:44:52.400855 GENERIC: 0.0: enabled 1
785 12:44:52.404026 PCI: 00:0d.3: enabled 0
786 12:44:52.407332 PCI: 00:0e.0: enabled 0
787 12:44:52.411353 PCI: 00:10.2: enabled 1
788 12:44:52.414207 PCI: 00:10.6: enabled 0
789 12:44:52.414286 PCI: 00:10.7: enabled 0
790 12:44:52.417384 PCI: 00:12.0: enabled 0
791 12:44:52.421045 PCI: 00:12.6: enabled 0
792 12:44:52.424083 PCI: 00:13.0: enabled 0
793 12:44:52.427408 PCI: 00:14.0: enabled 1
794 12:44:52.427490 USB0 port 0: enabled 1
795 12:44:52.430835 USB2 port 0: enabled 0
796 12:44:52.434099 USB2 port 1: enabled 1
797 12:44:52.437518 USB2 port 2: enabled 1
798 12:44:52.440842 USB2 port 3: enabled 0
799 12:44:52.443956 USB2 port 4: enabled 1
800 12:44:52.444067 USB2 port 5: enabled 0
801 12:44:52.447529 USB2 port 6: enabled 0
802 12:44:52.450808 USB2 port 7: enabled 0
803 12:44:52.453913 USB2 port 8: enabled 0
804 12:44:52.457037 USB2 port 9: enabled 0
805 12:44:52.460739 USB3 port 0: enabled 0
806 12:44:52.460841 USB3 port 1: enabled 1
807 12:44:52.463889 USB3 port 2: enabled 0
808 12:44:52.467067 USB3 port 3: enabled 0
809 12:44:52.470279 PCI: 00:14.1: enabled 0
810 12:44:52.473941 PCI: 00:14.2: enabled 1
811 12:44:52.474022 PCI: 00:14.3: enabled 1
812 12:44:52.477359 GENERIC: 0.0: enabled 1
813 12:44:52.480198 PCI: 00:15.0: enabled 1
814 12:44:52.483517 I2C: 00:1a: enabled 1
815 12:44:52.486815 I2C: 00:31: enabled 1
816 12:44:52.486916 I2C: 00:32: enabled 1
817 12:44:52.490220 PCI: 00:15.1: enabled 1
818 12:44:52.493395 I2C: 00:10: enabled 1
819 12:44:52.496842 PCI: 00:15.2: enabled 1
820 12:44:52.496942 PCI: 00:15.3: enabled 1
821 12:44:52.500247 PCI: 00:16.0: enabled 1
822 12:44:52.503534 PCI: 00:16.1: enabled 0
823 12:44:52.506746 PCI: 00:16.2: enabled 0
824 12:44:52.510450 PCI: 00:16.3: enabled 0
825 12:44:52.510528 PCI: 00:16.4: enabled 0
826 12:44:52.513681 PCI: 00:16.5: enabled 0
827 12:44:52.517601 PCI: 00:17.0: enabled 1
828 12:44:52.520978 PCI: 00:19.0: enabled 0
829 12:44:52.521053 PCI: 00:19.1: enabled 1
830 12:44:52.524264 I2C: 00:15: enabled 1
831 12:44:52.527476 PCI: 00:19.2: enabled 0
832 12:44:52.577455 PCI: 00:1d.0: enabled 1
833 12:44:52.577597 GENERIC: 0.0: enabled 1
834 12:44:52.577674 PCI: 00:1e.0: enabled 1
835 12:44:52.577932 PCI: 00:1e.1: enabled 0
836 12:44:52.578031 PCI: 00:1e.2: enabled 1
837 12:44:52.578122 SPI: 00: enabled 1
838 12:44:52.578225 PCI: 00:1e.3: enabled 1
839 12:44:52.578326 SPI: 00: enabled 1
840 12:44:52.578450 PCI: 00:1f.0: enabled 1
841 12:44:52.578545 PNP: 0c09.0: enabled 1
842 12:44:52.578634 PCI: 00:1f.1: enabled 0
843 12:44:52.578723 PCI: 00:1f.2: enabled 1
844 12:44:52.578810 GENERIC: 0.0: enabled 1
845 12:44:52.578906 GENERIC: 0.0: enabled 1
846 12:44:52.578997 GENERIC: 1.0: enabled 1
847 12:44:52.579083 PCI: 00:1f.3: enabled 1
848 12:44:52.579162 PCI: 00:1f.4: enabled 0
849 12:44:52.579246 PCI: 00:1f.5: enabled 1
850 12:44:52.579339 PCI: 00:1f.6: enabled 0
851 12:44:52.599622 PCI: 00:1f.7: enabled 0
852 12:44:52.599710 CPU_CLUSTER: 0: enabled 1
853 12:44:52.599776 APIC: 00: enabled 1
854 12:44:52.600120 APIC: 01: enabled 1
855 12:44:52.600231 APIC: 03: enabled 1
856 12:44:52.600295 APIC: 06: enabled 1
857 12:44:52.600657 APIC: 04: enabled 1
858 12:44:52.600739 APIC: 05: enabled 1
859 12:44:52.602906 APIC: 02: enabled 1
860 12:44:52.602989 APIC: 07: enabled 1
861 12:44:52.603054 Root Device scanning...
862 12:44:52.606323 scan_static_bus for Root Device
863 12:44:52.609780 DOMAIN: 0000 enabled
864 12:44:52.613014 CPU_CLUSTER: 0 enabled
865 12:44:52.616279 DOMAIN: 0000 scanning...
866 12:44:52.619678 PCI: pci_scan_bus for bus 00
867 12:44:52.619760 PCI: 00:00.0 [8086/0000] ops
868 12:44:52.623068 PCI: 00:00.0 [8086/9a12] enabled
869 12:44:52.626352 PCI: 00:02.0 [8086/0000] bus ops
870 12:44:52.629731 PCI: 00:02.0 [8086/9a40] enabled
871 12:44:52.632875 PCI: 00:04.0 [8086/0000] bus ops
872 12:44:52.635968 PCI: 00:04.0 [8086/9a03] enabled
873 12:44:52.639566 PCI: 00:05.0 [8086/9a19] enabled
874 12:44:52.642922 PCI: 00:07.0 [0000/0000] hidden
875 12:44:52.646247 PCI: 00:08.0 [8086/9a11] enabled
876 12:44:52.652555 PCI: 00:0a.0 [8086/9a0d] disabled
877 12:44:52.655977 PCI: 00:0d.0 [8086/0000] bus ops
878 12:44:52.659235 PCI: 00:0d.0 [8086/9a13] enabled
879 12:44:52.662542 PCI: 00:14.0 [8086/0000] bus ops
880 12:44:52.665796 PCI: 00:14.0 [8086/a0ed] enabled
881 12:44:52.669236 PCI: 00:14.2 [8086/a0ef] enabled
882 12:44:52.672372 PCI: 00:14.3 [8086/0000] bus ops
883 12:44:52.675614 PCI: 00:14.3 [8086/a0f0] enabled
884 12:44:52.679055 PCI: 00:15.0 [8086/0000] bus ops
885 12:44:52.682678 PCI: 00:15.0 [8086/a0e8] enabled
886 12:44:52.685899 PCI: 00:15.1 [8086/0000] bus ops
887 12:44:52.689061 PCI: 00:15.1 [8086/a0e9] enabled
888 12:44:52.692707 PCI: 00:15.2 [8086/0000] bus ops
889 12:44:52.695809 PCI: 00:15.2 [8086/a0ea] enabled
890 12:44:52.698880 PCI: 00:15.3 [8086/0000] bus ops
891 12:44:52.702283 PCI: 00:15.3 [8086/a0eb] enabled
892 12:44:52.705535 PCI: 00:16.0 [8086/0000] ops
893 12:44:52.708755 PCI: 00:16.0 [8086/a0e0] enabled
894 12:44:52.712032 PCI: Static device PCI: 00:17.0 not found, disabling it.
895 12:44:52.715732 PCI: 00:19.0 [8086/0000] bus ops
896 12:44:52.719073 PCI: 00:19.0 [8086/a0c5] disabled
897 12:44:52.722247 PCI: 00:19.1 [8086/0000] bus ops
898 12:44:52.725507 PCI: 00:19.1 [8086/a0c6] enabled
899 12:44:52.729152 PCI: 00:1d.0 [8086/0000] bus ops
900 12:44:52.731849 PCI: 00:1d.0 [8086/a0b0] enabled
901 12:44:52.735181 PCI: 00:1e.0 [8086/0000] ops
902 12:44:52.738715 PCI: 00:1e.0 [8086/a0a8] enabled
903 12:44:52.741776 PCI: 00:1e.2 [8086/0000] bus ops
904 12:44:52.745336 PCI: 00:1e.2 [8086/a0aa] enabled
905 12:44:52.748411 PCI: 00:1e.3 [8086/0000] bus ops
906 12:44:52.751921 PCI: 00:1e.3 [8086/a0ab] enabled
907 12:44:52.755270 PCI: 00:1f.0 [8086/0000] bus ops
908 12:44:52.758739 PCI: 00:1f.0 [8086/a087] enabled
909 12:44:52.761890 RTC Init
910 12:44:52.765252 Set power on after power failure.
911 12:44:52.765335 Disabling Deep S3
912 12:44:52.768607 Disabling Deep S3
913 12:44:52.768691 Disabling Deep S4
914 12:44:52.771959 Disabling Deep S4
915 12:44:52.775286 Disabling Deep S5
916 12:44:52.775388 Disabling Deep S5
917 12:44:52.778399 PCI: 00:1f.2 [0000/0000] hidden
918 12:44:52.781723 PCI: 00:1f.3 [8086/0000] bus ops
919 12:44:52.785164 PCI: 00:1f.3 [8086/a0c8] enabled
920 12:44:52.788192 PCI: 00:1f.5 [8086/0000] bus ops
921 12:44:52.791558 PCI: 00:1f.5 [8086/a0a4] enabled
922 12:44:52.794919 PCI: Leftover static devices:
923 12:44:52.798281 PCI: 00:10.2
924 12:44:52.798381 PCI: 00:10.6
925 12:44:52.798472 PCI: 00:10.7
926 12:44:52.801589 PCI: 00:06.0
927 12:44:52.801663 PCI: 00:07.1
928 12:44:52.805027 PCI: 00:07.2
929 12:44:52.805124 PCI: 00:07.3
930 12:44:52.805217 PCI: 00:09.0
931 12:44:52.808162 PCI: 00:0d.1
932 12:44:52.808233 PCI: 00:0d.2
933 12:44:52.811434 PCI: 00:0d.3
934 12:44:52.811503 PCI: 00:0e.0
935 12:44:52.814648 PCI: 00:12.0
936 12:44:52.814721 PCI: 00:12.6
937 12:44:52.814813 PCI: 00:13.0
938 12:44:52.817996 PCI: 00:14.1
939 12:44:52.818095 PCI: 00:16.1
940 12:44:52.821369 PCI: 00:16.2
941 12:44:52.821466 PCI: 00:16.3
942 12:44:52.821556 PCI: 00:16.4
943 12:44:52.824521 PCI: 00:16.5
944 12:44:52.824591 PCI: 00:17.0
945 12:44:52.827792 PCI: 00:19.2
946 12:44:52.827864 PCI: 00:1e.1
947 12:44:52.831273 PCI: 00:1f.1
948 12:44:52.831402 PCI: 00:1f.4
949 12:44:52.831492 PCI: 00:1f.6
950 12:44:52.834477 PCI: 00:1f.7
951 12:44:52.837988 PCI: Check your devicetree.cb.
952 12:44:52.838066 PCI: 00:02.0 scanning...
953 12:44:52.844682 scan_generic_bus for PCI: 00:02.0
954 12:44:52.847990 scan_generic_bus for PCI: 00:02.0 done
955 12:44:52.851172 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
956 12:44:52.854764 PCI: 00:04.0 scanning...
957 12:44:52.858131 scan_generic_bus for PCI: 00:04.0
958 12:44:52.861392 GENERIC: 0.0 enabled
959 12:44:52.864263 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
960 12:44:52.871408 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
961 12:44:52.874777 PCI: 00:0d.0 scanning...
962 12:44:52.878172 scan_static_bus for PCI: 00:0d.0
963 12:44:52.878250 USB0 port 0 enabled
964 12:44:52.881340 USB0 port 0 scanning...
965 12:44:52.884035 scan_static_bus for USB0 port 0
966 12:44:52.887429 USB3 port 0 enabled
967 12:44:52.887530 USB3 port 1 enabled
968 12:44:52.890717 USB3 port 2 disabled
969 12:44:52.894569 USB3 port 3 disabled
970 12:44:52.894670 USB3 port 0 scanning...
971 12:44:52.897937 scan_static_bus for USB3 port 0
972 12:44:52.903969 scan_static_bus for USB3 port 0 done
973 12:44:52.907376 scan_bus: bus USB3 port 0 finished in 6 msecs
974 12:44:52.910852 USB3 port 1 scanning...
975 12:44:52.914167 scan_static_bus for USB3 port 1
976 12:44:52.917574 scan_static_bus for USB3 port 1 done
977 12:44:52.920737 scan_bus: bus USB3 port 1 finished in 6 msecs
978 12:44:52.924006 scan_static_bus for USB0 port 0 done
979 12:44:52.930711 scan_bus: bus USB0 port 0 finished in 43 msecs
980 12:44:52.933806 scan_static_bus for PCI: 00:0d.0 done
981 12:44:52.937415 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
982 12:44:52.940470 PCI: 00:14.0 scanning...
983 12:44:52.943819 scan_static_bus for PCI: 00:14.0
984 12:44:52.946912 USB0 port 0 enabled
985 12:44:52.950126 USB0 port 0 scanning...
986 12:44:52.953927 scan_static_bus for USB0 port 0
987 12:44:52.954008 USB2 port 0 disabled
988 12:44:52.957338 USB2 port 1 enabled
989 12:44:52.960455 USB2 port 2 enabled
990 12:44:52.960537 USB2 port 3 disabled
991 12:44:52.963659 USB2 port 4 enabled
992 12:44:52.966695 USB2 port 5 disabled
993 12:44:52.966805 USB2 port 6 disabled
994 12:44:52.969993 USB2 port 7 disabled
995 12:44:52.970069 USB2 port 8 disabled
996 12:44:52.973694 USB2 port 9 disabled
997 12:44:52.977049 USB3 port 0 disabled
998 12:44:52.977151 USB3 port 1 enabled
999 12:44:52.980406 USB3 port 2 disabled
1000 12:44:52.983204 USB3 port 3 disabled
1001 12:44:52.983303 USB2 port 1 scanning...
1002 12:44:52.986848 scan_static_bus for USB2 port 1
1003 12:44:52.993699 scan_static_bus for USB2 port 1 done
1004 12:44:52.996865 scan_bus: bus USB2 port 1 finished in 6 msecs
1005 12:44:53.000178 USB2 port 2 scanning...
1006 12:44:53.003747 scan_static_bus for USB2 port 2
1007 12:44:53.006917 scan_static_bus for USB2 port 2 done
1008 12:44:53.009909 scan_bus: bus USB2 port 2 finished in 6 msecs
1009 12:44:53.013100 USB2 port 4 scanning...
1010 12:44:53.016607 scan_static_bus for USB2 port 4
1011 12:44:53.019991 scan_static_bus for USB2 port 4 done
1012 12:44:53.026288 scan_bus: bus USB2 port 4 finished in 6 msecs
1013 12:44:53.026483 USB3 port 1 scanning...
1014 12:44:53.030072 scan_static_bus for USB3 port 1
1015 12:44:53.036246 scan_static_bus for USB3 port 1 done
1016 12:44:53.040075 scan_bus: bus USB3 port 1 finished in 6 msecs
1017 12:44:53.043292 scan_static_bus for USB0 port 0 done
1018 12:44:53.046531 scan_bus: bus USB0 port 0 finished in 93 msecs
1019 12:44:53.053146 scan_static_bus for PCI: 00:14.0 done
1020 12:44:53.056757 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1021 12:44:53.059952 PCI: 00:14.3 scanning...
1022 12:44:53.063283 scan_static_bus for PCI: 00:14.3
1023 12:44:53.066533 GENERIC: 0.0 enabled
1024 12:44:53.070258 scan_static_bus for PCI: 00:14.3 done
1025 12:44:53.073348 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1026 12:44:53.076697 PCI: 00:15.0 scanning...
1027 12:44:53.079882 scan_static_bus for PCI: 00:15.0
1028 12:44:53.082935 I2C: 00:1a enabled
1029 12:44:53.083414 I2C: 00:31 enabled
1030 12:44:53.086287 I2C: 00:32 enabled
1031 12:44:53.090085 scan_static_bus for PCI: 00:15.0 done
1032 12:44:53.093416 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1033 12:44:53.096618 PCI: 00:15.1 scanning...
1034 12:44:53.099855 scan_static_bus for PCI: 00:15.1
1035 12:44:53.103057 I2C: 00:10 enabled
1036 12:44:53.106602 scan_static_bus for PCI: 00:15.1 done
1037 12:44:53.110050 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1038 12:44:53.113390 PCI: 00:15.2 scanning...
1039 12:44:53.116132 scan_static_bus for PCI: 00:15.2
1040 12:44:53.119496 scan_static_bus for PCI: 00:15.2 done
1041 12:44:53.126260 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1042 12:44:53.126659 PCI: 00:15.3 scanning...
1043 12:44:53.129679 scan_static_bus for PCI: 00:15.3
1044 12:44:53.136312 scan_static_bus for PCI: 00:15.3 done
1045 12:44:53.139600 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1046 12:44:53.143008 PCI: 00:19.1 scanning...
1047 12:44:53.146058 scan_static_bus for PCI: 00:19.1
1048 12:44:53.146484 I2C: 00:15 enabled
1049 12:44:53.152333 scan_static_bus for PCI: 00:19.1 done
1050 12:44:53.156072 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1051 12:44:53.159160 PCI: 00:1d.0 scanning...
1052 12:44:53.162385 do_pci_scan_bridge for PCI: 00:1d.0
1053 12:44:53.165851 PCI: pci_scan_bus for bus 01
1054 12:44:53.169007 PCI: 01:00.0 [1c5c/174a] enabled
1055 12:44:53.172390 GENERIC: 0.0 enabled
1056 12:44:53.175602 Enabling Common Clock Configuration
1057 12:44:53.178914 L1 Sub-State supported from root port 29
1058 12:44:53.182108 L1 Sub-State Support = 0xf
1059 12:44:53.185792 CommonModeRestoreTime = 0x28
1060 12:44:53.188982 Power On Value = 0x16, Power On Scale = 0x0
1061 12:44:53.192100 ASPM: Enabled L1
1062 12:44:53.195474 PCIe: Max_Payload_Size adjusted to 128
1063 12:44:53.198959 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1064 12:44:53.202091 PCI: 00:1e.2 scanning...
1065 12:44:53.205446 scan_generic_bus for PCI: 00:1e.2
1066 12:44:53.208705 SPI: 00 enabled
1067 12:44:53.211933 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1068 12:44:53.219026 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1069 12:44:53.222378 PCI: 00:1e.3 scanning...
1070 12:44:53.225841 scan_generic_bus for PCI: 00:1e.3
1071 12:44:53.226328 SPI: 00 enabled
1072 12:44:53.231584 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1073 12:44:53.238362 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1074 12:44:53.238439 PCI: 00:1f.0 scanning...
1075 12:44:53.241758 scan_static_bus for PCI: 00:1f.0
1076 12:44:53.245134 PNP: 0c09.0 enabled
1077 12:44:53.248375 PNP: 0c09.0 scanning...
1078 12:44:53.251550 scan_static_bus for PNP: 0c09.0
1079 12:44:53.255102 scan_static_bus for PNP: 0c09.0 done
1080 12:44:53.258428 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1081 12:44:53.261635 scan_static_bus for PCI: 00:1f.0 done
1082 12:44:53.267943 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1083 12:44:53.271735 PCI: 00:1f.2 scanning...
1084 12:44:53.275129 scan_static_bus for PCI: 00:1f.2
1085 12:44:53.275205 GENERIC: 0.0 enabled
1086 12:44:53.277907 GENERIC: 0.0 scanning...
1087 12:44:53.281606 scan_static_bus for GENERIC: 0.0
1088 12:44:53.285009 GENERIC: 0.0 enabled
1089 12:44:53.288162 GENERIC: 1.0 enabled
1090 12:44:53.291538 scan_static_bus for GENERIC: 0.0 done
1091 12:44:53.294819 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1092 12:44:53.298239 scan_static_bus for PCI: 00:1f.2 done
1093 12:44:53.304655 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1094 12:44:53.304758 PCI: 00:1f.3 scanning...
1095 12:44:53.307965 scan_static_bus for PCI: 00:1f.3
1096 12:44:53.314792 scan_static_bus for PCI: 00:1f.3 done
1097 12:44:53.318142 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1098 12:44:53.321370 PCI: 00:1f.5 scanning...
1099 12:44:53.324556 scan_generic_bus for PCI: 00:1f.5
1100 12:44:53.328133 scan_generic_bus for PCI: 00:1f.5 done
1101 12:44:53.334486 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1102 12:44:53.337804 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1103 12:44:53.341075 scan_static_bus for Root Device done
1104 12:44:53.347881 scan_bus: bus Root Device finished in 737 msecs
1105 12:44:53.347984 done
1106 12:44:53.354575 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1107 12:44:53.357784 Chrome EC: UHEPI supported
1108 12:44:53.364110 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1109 12:44:53.367403 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1110 12:44:53.370997 SPI flash protection: WPSW=0 SRP0=0
1111 12:44:53.377292 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1112 12:44:53.383883 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1113 12:44:53.387277 found VGA at PCI: 00:02.0
1114 12:44:53.387359 Setting up VGA for PCI: 00:02.0
1115 12:44:53.394222 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1116 12:44:53.400830 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1117 12:44:53.400907 Allocating resources...
1118 12:44:53.403664 Reading resources...
1119 12:44:53.407444 Root Device read_resources bus 0 link: 0
1120 12:44:53.410715 DOMAIN: 0000 read_resources bus 0 link: 0
1121 12:44:53.418082 PCI: 00:04.0 read_resources bus 1 link: 0
1122 12:44:53.421283 PCI: 00:04.0 read_resources bus 1 link: 0 done
1123 12:44:53.428270 PCI: 00:0d.0 read_resources bus 0 link: 0
1124 12:44:53.431642 USB0 port 0 read_resources bus 0 link: 0
1125 12:44:53.437729 USB0 port 0 read_resources bus 0 link: 0 done
1126 12:44:53.441163 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1127 12:44:53.447884 PCI: 00:14.0 read_resources bus 0 link: 0
1128 12:44:53.451023 USB0 port 0 read_resources bus 0 link: 0
1129 12:44:53.457692 USB0 port 0 read_resources bus 0 link: 0 done
1130 12:44:53.461172 PCI: 00:14.0 read_resources bus 0 link: 0 done
1131 12:44:53.467433 PCI: 00:14.3 read_resources bus 0 link: 0
1132 12:44:53.471249 PCI: 00:14.3 read_resources bus 0 link: 0 done
1133 12:44:53.474463 PCI: 00:15.0 read_resources bus 0 link: 0
1134 12:44:53.481793 PCI: 00:15.0 read_resources bus 0 link: 0 done
1135 12:44:53.485354 PCI: 00:15.1 read_resources bus 0 link: 0
1136 12:44:53.491913 PCI: 00:15.1 read_resources bus 0 link: 0 done
1137 12:44:53.495070 PCI: 00:19.1 read_resources bus 0 link: 0
1138 12:44:53.502063 PCI: 00:19.1 read_resources bus 0 link: 0 done
1139 12:44:53.505593 PCI: 00:1d.0 read_resources bus 1 link: 0
1140 12:44:53.512038 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1141 12:44:53.515304 PCI: 00:1e.2 read_resources bus 2 link: 0
1142 12:44:53.522126 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1143 12:44:53.525372 PCI: 00:1e.3 read_resources bus 3 link: 0
1144 12:44:53.531978 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1145 12:44:53.535649 PCI: 00:1f.0 read_resources bus 0 link: 0
1146 12:44:53.541750 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1147 12:44:53.545101 PCI: 00:1f.2 read_resources bus 0 link: 0
1148 12:44:53.548305 GENERIC: 0.0 read_resources bus 0 link: 0
1149 12:44:53.555602 GENERIC: 0.0 read_resources bus 0 link: 0 done
1150 12:44:53.558833 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1151 12:44:53.566319 DOMAIN: 0000 read_resources bus 0 link: 0 done
1152 12:44:53.569648 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1153 12:44:53.576228 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1154 12:44:53.579541 Root Device read_resources bus 0 link: 0 done
1155 12:44:53.582665 Done reading resources.
1156 12:44:53.589540 Show resources in subtree (Root Device)...After reading.
1157 12:44:53.592967 Root Device child on link 0 DOMAIN: 0000
1158 12:44:53.596172 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1159 12:44:53.605983 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1160 12:44:53.615924 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1161 12:44:53.619124 PCI: 00:00.0
1162 12:44:53.629017 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1163 12:44:53.635787 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1164 12:44:53.646061 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1165 12:44:53.655851 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1166 12:44:53.665698 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1167 12:44:53.675533 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1168 12:44:53.685876 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1169 12:44:53.692237 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1170 12:44:53.702239 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1171 12:44:53.712216 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1172 12:44:53.722347 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1173 12:44:53.732261 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1174 12:44:53.738495 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1175 12:44:53.748489 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1176 12:44:53.758709 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1177 12:44:53.768249 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1178 12:44:53.778562 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1179 12:44:53.788137 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1180 12:44:53.794765 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1181 12:44:53.805336 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1182 12:44:53.808081 PCI: 00:02.0
1183 12:44:53.818387 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1184 12:44:53.828129 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1185 12:44:53.838298 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1186 12:44:53.841522 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1187 12:44:53.851520 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1188 12:44:53.854641 GENERIC: 0.0
1189 12:44:53.854746 PCI: 00:05.0
1190 12:44:53.864645 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1191 12:44:53.870863 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1192 12:44:53.870970 GENERIC: 0.0
1193 12:44:53.874305 PCI: 00:08.0
1194 12:44:53.884503 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 12:44:53.884610 PCI: 00:0a.0
1196 12:44:53.890971 PCI: 00:0d.0 child on link 0 USB0 port 0
1197 12:44:53.900732 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1198 12:44:53.904511 USB0 port 0 child on link 0 USB3 port 0
1199 12:44:53.904595 USB3 port 0
1200 12:44:53.907602 USB3 port 1
1201 12:44:53.907705 USB3 port 2
1202 12:44:53.910967 USB3 port 3
1203 12:44:53.913992 PCI: 00:14.0 child on link 0 USB0 port 0
1204 12:44:53.924142 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1205 12:44:53.930639 USB0 port 0 child on link 0 USB2 port 0
1206 12:44:53.930724 USB2 port 0
1207 12:44:53.933823 USB2 port 1
1208 12:44:53.933898 USB2 port 2
1209 12:44:53.937296 USB2 port 3
1210 12:44:53.937367 USB2 port 4
1211 12:44:53.940569 USB2 port 5
1212 12:44:53.940640 USB2 port 6
1213 12:44:53.943977 USB2 port 7
1214 12:44:53.947328 USB2 port 8
1215 12:44:53.947427 USB2 port 9
1216 12:44:53.950738 USB3 port 0
1217 12:44:53.950837 USB3 port 1
1218 12:44:53.953969 USB3 port 2
1219 12:44:53.954075 USB3 port 3
1220 12:44:53.957355 PCI: 00:14.2
1221 12:44:53.967000 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1222 12:44:53.977133 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1223 12:44:53.980510 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1224 12:44:53.989987 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1225 12:44:53.993258 GENERIC: 0.0
1226 12:44:53.996676 PCI: 00:15.0 child on link 0 I2C: 00:1a
1227 12:44:54.006801 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1228 12:44:54.006877 I2C: 00:1a
1229 12:44:54.009894 I2C: 00:31
1230 12:44:54.009965 I2C: 00:32
1231 12:44:54.016538 PCI: 00:15.1 child on link 0 I2C: 00:10
1232 12:44:54.026578 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1233 12:44:54.026680 I2C: 00:10
1234 12:44:54.030061 PCI: 00:15.2
1235 12:44:54.039887 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1236 12:44:54.039976 PCI: 00:15.3
1237 12:44:54.049631 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1238 12:44:54.052855 PCI: 00:16.0
1239 12:44:54.062835 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1240 12:44:54.062942 PCI: 00:19.0
1241 12:44:54.066116 PCI: 00:19.1 child on link 0 I2C: 00:15
1242 12:44:54.076346 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 12:44:54.079244 I2C: 00:15
1244 12:44:54.082566 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1245 12:44:54.092888 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1246 12:44:54.102793 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1247 12:44:54.112401 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1248 12:44:54.112489 GENERIC: 0.0
1249 12:44:54.115621 PCI: 01:00.0
1250 12:44:54.126057 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1251 12:44:54.135556 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1252 12:44:54.142341 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1253 12:44:54.145553 PCI: 00:1e.0
1254 12:44:54.155493 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1255 12:44:54.158820 PCI: 00:1e.2 child on link 0 SPI: 00
1256 12:44:54.168735 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1257 12:44:54.171989 SPI: 00
1258 12:44:54.175406 PCI: 00:1e.3 child on link 0 SPI: 00
1259 12:44:54.185162 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1260 12:44:54.185247 SPI: 00
1261 12:44:54.191523 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1262 12:44:54.198192 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1263 12:44:54.201626 PNP: 0c09.0
1264 12:44:54.211695 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1265 12:44:54.214941 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1266 12:44:54.225067 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1267 12:44:54.234568 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1268 12:44:54.238330 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1269 12:44:54.241725 GENERIC: 0.0
1270 12:44:54.241800 GENERIC: 1.0
1271 12:44:54.244812 PCI: 00:1f.3
1272 12:44:54.254562 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1273 12:44:54.264700 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1274 12:44:54.264785 PCI: 00:1f.5
1275 12:44:54.274888 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1276 12:44:54.277790 CPU_CLUSTER: 0 child on link 0 APIC: 00
1277 12:44:54.281113 APIC: 00
1278 12:44:54.281187 APIC: 01
1279 12:44:54.281249 APIC: 03
1280 12:44:54.284371 APIC: 06
1281 12:44:54.284444 APIC: 04
1282 12:44:54.287706 APIC: 05
1283 12:44:54.287775 APIC: 02
1284 12:44:54.287835 APIC: 07
1285 12:44:54.297928 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1286 12:44:54.301263 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1287 12:44:54.307430 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1288 12:44:54.314072 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1289 12:44:54.317450 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1290 12:44:54.324294 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1291 12:44:54.327066 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1292 12:44:54.333794 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1293 12:44:54.340448 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1294 12:44:54.350662 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1295 12:44:54.356983 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1296 12:44:54.363954 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1297 12:44:54.370419 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1298 12:44:54.376740 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1299 12:44:54.386779 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1300 12:44:54.390193 DOMAIN: 0000: Resource ranges:
1301 12:44:54.393635 * Base: 1000, Size: 800, Tag: 100
1302 12:44:54.396834 * Base: 1900, Size: e700, Tag: 100
1303 12:44:54.400160 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1304 12:44:54.406546 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1305 12:44:54.413238 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1306 12:44:54.423323 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1307 12:44:54.430099 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1308 12:44:54.436618 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1309 12:44:54.446139 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1310 12:44:54.452702 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1311 12:44:54.459849 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1312 12:44:54.469470 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1313 12:44:54.476579 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1314 12:44:54.482633 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1315 12:44:54.492487 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1316 12:44:54.499478 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1317 12:44:54.505861 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1318 12:44:54.515798 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1319 12:44:54.522527 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1320 12:44:54.529316 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1321 12:44:54.538670 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1322 12:44:54.545958 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1323 12:44:54.552520 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1324 12:44:54.562370 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1325 12:44:54.568682 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1326 12:44:54.575332 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1327 12:44:54.584998 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1328 12:44:54.588645 DOMAIN: 0000: Resource ranges:
1329 12:44:54.591811 * Base: 7fc00000, Size: 40400000, Tag: 200
1330 12:44:54.595134 * Base: d0000000, Size: 28000000, Tag: 200
1331 12:44:54.601550 * Base: fa000000, Size: 1000000, Tag: 200
1332 12:44:54.604913 * Base: fb001000, Size: 2fff000, Tag: 200
1333 12:44:54.608447 * Base: fe010000, Size: 2e000, Tag: 200
1334 12:44:54.611742 * Base: fe03f000, Size: d41000, Tag: 200
1335 12:44:54.618211 * Base: fed88000, Size: 8000, Tag: 200
1336 12:44:54.621514 * Base: fed93000, Size: d000, Tag: 200
1337 12:44:54.624879 * Base: feda2000, Size: 1e000, Tag: 200
1338 12:44:54.628241 * Base: fede0000, Size: 1220000, Tag: 200
1339 12:44:54.635046 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1340 12:44:54.641690 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1341 12:44:54.647884 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1342 12:44:54.654801 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1343 12:44:54.661402 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1344 12:44:54.667788 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1345 12:44:54.674572 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1346 12:44:54.681233 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1347 12:44:54.687785 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1348 12:44:54.694523 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1349 12:44:54.701016 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1350 12:44:54.707709 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1351 12:44:54.714166 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1352 12:44:54.720945 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1353 12:44:54.727313 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1354 12:44:54.733874 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1355 12:44:54.740729 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1356 12:44:54.747003 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1357 12:44:54.754213 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1358 12:44:54.760787 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1359 12:44:54.767049 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1360 12:44:54.774145 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1361 12:44:54.780102 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1362 12:44:54.786831 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1363 12:44:54.796900 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1364 12:44:54.800166 PCI: 00:1d.0: Resource ranges:
1365 12:44:54.803687 * Base: 7fc00000, Size: 100000, Tag: 200
1366 12:44:54.809946 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1367 12:44:54.816909 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1368 12:44:54.823638 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1369 12:44:54.833206 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1370 12:44:54.839987 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1371 12:44:54.843354 Root Device assign_resources, bus 0 link: 0
1372 12:44:54.849534 DOMAIN: 0000 assign_resources, bus 0 link: 0
1373 12:44:54.856195 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1374 12:44:54.866212 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1375 12:44:54.872845 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1376 12:44:54.879320 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1377 12:44:54.886156 PCI: 00:04.0 assign_resources, bus 1 link: 0
1378 12:44:54.889060 PCI: 00:04.0 assign_resources, bus 1 link: 0
1379 12:44:54.899051 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1380 12:44:54.905852 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1381 12:44:54.915377 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1382 12:44:54.919072 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1383 12:44:54.925411 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1384 12:44:54.932044 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1385 12:44:54.935423 PCI: 00:14.0 assign_resources, bus 0 link: 0
1386 12:44:54.941789 PCI: 00:14.0 assign_resources, bus 0 link: 0
1387 12:44:54.948701 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1388 12:44:54.958411 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1389 12:44:54.965230 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1390 12:44:54.972101 PCI: 00:14.3 assign_resources, bus 0 link: 0
1391 12:44:54.974989 PCI: 00:14.3 assign_resources, bus 0 link: 0
1392 12:44:54.984895 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1393 12:44:54.988255 PCI: 00:15.0 assign_resources, bus 0 link: 0
1394 12:44:54.991568 PCI: 00:15.0 assign_resources, bus 0 link: 0
1395 12:44:55.001603 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1396 12:44:55.004980 PCI: 00:15.1 assign_resources, bus 0 link: 0
1397 12:44:55.011144 PCI: 00:15.1 assign_resources, bus 0 link: 0
1398 12:44:55.017905 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1399 12:44:55.027602 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1400 12:44:55.034610 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1401 12:44:55.044348 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1402 12:44:55.047687 PCI: 00:19.1 assign_resources, bus 0 link: 0
1403 12:44:55.051072 PCI: 00:19.1 assign_resources, bus 0 link: 0
1404 12:44:55.060883 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1405 12:44:55.070836 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1406 12:44:55.080840 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1407 12:44:55.084360 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1408 12:44:55.090774 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1409 12:44:55.100860 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1410 12:44:55.107018 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1411 12:44:55.113766 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1412 12:44:55.120529 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1413 12:44:55.126928 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1414 12:44:55.130519 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1415 12:44:55.136900 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1416 12:44:55.143427 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1417 12:44:55.146610 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1418 12:44:55.153055 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1419 12:44:55.156617 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1420 12:44:55.163434 LPC: Trying to open IO window from 800 size 1ff
1421 12:44:55.170111 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1422 12:44:55.179926 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1423 12:44:55.186211 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1424 12:44:55.192929 DOMAIN: 0000 assign_resources, bus 0 link: 0
1425 12:44:55.196208 Root Device assign_resources, bus 0 link: 0
1426 12:44:55.199293 Done setting resources.
1427 12:44:55.206056 Show resources in subtree (Root Device)...After assigning values.
1428 12:44:55.209421 Root Device child on link 0 DOMAIN: 0000
1429 12:44:55.213061 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1430 12:44:55.222690 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1431 12:44:55.232749 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1432 12:44:55.235681 PCI: 00:00.0
1433 12:44:55.245428 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1434 12:44:55.252284 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1435 12:44:55.262253 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1436 12:44:55.271912 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1437 12:44:55.282122 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1438 12:44:55.291809 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1439 12:44:55.301790 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1440 12:44:55.308554 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1441 12:44:55.318604 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1442 12:44:55.328158 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1443 12:44:55.338071 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1444 12:44:55.348094 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1445 12:44:55.357805 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1446 12:44:55.364695 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1447 12:44:55.374476 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1448 12:44:55.384548 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1449 12:44:55.394368 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1450 12:44:55.404448 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1451 12:44:55.414377 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1452 12:44:55.424547 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1453 12:44:55.424695 PCI: 00:02.0
1454 12:44:55.434400 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1455 12:44:55.447220 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1456 12:44:55.453649 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1457 12:44:55.460390 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1458 12:44:55.470329 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1459 12:44:55.473503 GENERIC: 0.0
1460 12:44:55.473604 PCI: 00:05.0
1461 12:44:55.483161 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1462 12:44:55.489801 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1463 12:44:55.489876 GENERIC: 0.0
1464 12:44:55.493143 PCI: 00:08.0
1465 12:44:55.502924 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1466 12:44:55.503004 PCI: 00:0a.0
1467 12:44:55.509579 PCI: 00:0d.0 child on link 0 USB0 port 0
1468 12:44:55.519700 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1469 12:44:55.523108 USB0 port 0 child on link 0 USB3 port 0
1470 12:44:55.526425 USB3 port 0
1471 12:44:55.526499 USB3 port 1
1472 12:44:55.529558 USB3 port 2
1473 12:44:55.529627 USB3 port 3
1474 12:44:55.536221 PCI: 00:14.0 child on link 0 USB0 port 0
1475 12:44:55.546275 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1476 12:44:55.549143 USB0 port 0 child on link 0 USB2 port 0
1477 12:44:55.552575 USB2 port 0
1478 12:44:55.552649 USB2 port 1
1479 12:44:55.555787 USB2 port 2
1480 12:44:55.555887 USB2 port 3
1481 12:44:55.559152 USB2 port 4
1482 12:44:55.559224 USB2 port 5
1483 12:44:55.562642 USB2 port 6
1484 12:44:55.562737 USB2 port 7
1485 12:44:55.566241 USB2 port 8
1486 12:44:55.566317 USB2 port 9
1487 12:44:55.569093 USB3 port 0
1488 12:44:55.569180 USB3 port 1
1489 12:44:55.572696 USB3 port 2
1490 12:44:55.575974 USB3 port 3
1491 12:44:55.576106 PCI: 00:14.2
1492 12:44:55.585899 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1493 12:44:55.595782 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1494 12:44:55.602375 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1495 12:44:55.611929 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1496 12:44:55.612035 GENERIC: 0.0
1497 12:44:55.619161 PCI: 00:15.0 child on link 0 I2C: 00:1a
1498 12:44:55.628634 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1499 12:44:55.628788 I2C: 00:1a
1500 12:44:55.632085 I2C: 00:31
1501 12:44:55.632175 I2C: 00:32
1502 12:44:55.635490 PCI: 00:15.1 child on link 0 I2C: 00:10
1503 12:44:55.648498 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1504 12:44:55.648587 I2C: 00:10
1505 12:44:55.651729 PCI: 00:15.2
1506 12:44:55.662114 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1507 12:44:55.662199 PCI: 00:15.3
1508 12:44:55.671934 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1509 12:44:55.675089 PCI: 00:16.0
1510 12:44:55.685172 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1511 12:44:55.685255 PCI: 00:19.0
1512 12:44:55.692033 PCI: 00:19.1 child on link 0 I2C: 00:15
1513 12:44:55.701474 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1514 12:44:55.701580 I2C: 00:15
1515 12:44:55.708089 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1516 12:44:55.714665 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1517 12:44:55.728175 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1518 12:44:55.738104 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1519 12:44:55.741523 GENERIC: 0.0
1520 12:44:55.741599 PCI: 01:00.0
1521 12:44:55.751410 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1522 12:44:55.761297 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1523 12:44:55.774755 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1524 12:44:55.774840 PCI: 00:1e.0
1525 12:44:55.784386 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1526 12:44:55.790943 PCI: 00:1e.2 child on link 0 SPI: 00
1527 12:44:55.800984 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1528 12:44:55.801085 SPI: 00
1529 12:44:55.804548 PCI: 00:1e.3 child on link 0 SPI: 00
1530 12:44:55.817649 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1531 12:44:55.817733 SPI: 00
1532 12:44:55.821123 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1533 12:44:55.830691 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1534 12:44:55.830774 PNP: 0c09.0
1535 12:44:55.840533 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1536 12:44:55.843978 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1537 12:44:55.853913 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1538 12:44:55.863977 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1539 12:44:55.867559 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1540 12:44:55.870837 GENERIC: 0.0
1541 12:44:55.874022 GENERIC: 1.0
1542 12:44:55.874105 PCI: 00:1f.3
1543 12:44:55.883629 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1544 12:44:55.893711 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1545 12:44:55.896714 PCI: 00:1f.5
1546 12:44:55.907101 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1547 12:44:55.910307 CPU_CLUSTER: 0 child on link 0 APIC: 00
1548 12:44:55.913694 APIC: 00
1549 12:44:55.913776 APIC: 01
1550 12:44:55.913840 APIC: 03
1551 12:44:55.917061 APIC: 06
1552 12:44:55.917143 APIC: 04
1553 12:44:55.920257 APIC: 05
1554 12:44:55.920338 APIC: 02
1555 12:44:55.920403 APIC: 07
1556 12:44:55.923440 Done allocating resources.
1557 12:44:55.930096 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1558 12:44:55.936695 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1559 12:44:55.939966 Configure GPIOs for I2S audio on UP4.
1560 12:44:55.946672 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1561 12:44:55.950006 Enabling resources...
1562 12:44:55.953248 PCI: 00:00.0 subsystem <- 8086/9a12
1563 12:44:55.956653 PCI: 00:00.0 cmd <- 06
1564 12:44:55.959937 PCI: 00:02.0 subsystem <- 8086/9a40
1565 12:44:55.962738 PCI: 00:02.0 cmd <- 03
1566 12:44:55.966141 PCI: 00:04.0 subsystem <- 8086/9a03
1567 12:44:55.969558 PCI: 00:04.0 cmd <- 02
1568 12:44:55.972812 PCI: 00:05.0 subsystem <- 8086/9a19
1569 12:44:55.972887 PCI: 00:05.0 cmd <- 02
1570 12:44:55.979592 PCI: 00:08.0 subsystem <- 8086/9a11
1571 12:44:55.979674 PCI: 00:08.0 cmd <- 06
1572 12:44:55.982874 PCI: 00:0d.0 subsystem <- 8086/9a13
1573 12:44:55.985956 PCI: 00:0d.0 cmd <- 02
1574 12:44:55.989315 PCI: 00:14.0 subsystem <- 8086/a0ed
1575 12:44:55.992832 PCI: 00:14.0 cmd <- 02
1576 12:44:55.996261 PCI: 00:14.2 subsystem <- 8086/a0ef
1577 12:44:55.999580 PCI: 00:14.2 cmd <- 02
1578 12:44:56.002967 PCI: 00:14.3 subsystem <- 8086/a0f0
1579 12:44:56.006242 PCI: 00:14.3 cmd <- 02
1580 12:44:56.009057 PCI: 00:15.0 subsystem <- 8086/a0e8
1581 12:44:56.012317 PCI: 00:15.0 cmd <- 02
1582 12:44:56.015845 PCI: 00:15.1 subsystem <- 8086/a0e9
1583 12:44:56.018987 PCI: 00:15.1 cmd <- 02
1584 12:44:56.022605 PCI: 00:15.2 subsystem <- 8086/a0ea
1585 12:44:56.022705 PCI: 00:15.2 cmd <- 02
1586 12:44:56.029370 PCI: 00:15.3 subsystem <- 8086/a0eb
1587 12:44:56.029447 PCI: 00:15.3 cmd <- 02
1588 12:44:56.032372 PCI: 00:16.0 subsystem <- 8086/a0e0
1589 12:44:56.036019 PCI: 00:16.0 cmd <- 02
1590 12:44:56.038963 PCI: 00:19.1 subsystem <- 8086/a0c6
1591 12:44:56.042739 PCI: 00:19.1 cmd <- 02
1592 12:44:56.045608 PCI: 00:1d.0 bridge ctrl <- 0013
1593 12:44:56.048877 PCI: 00:1d.0 subsystem <- 8086/a0b0
1594 12:44:56.052297 PCI: 00:1d.0 cmd <- 06
1595 12:44:56.055585 PCI: 00:1e.0 subsystem <- 8086/a0a8
1596 12:44:56.059318 PCI: 00:1e.0 cmd <- 06
1597 12:44:56.062256 PCI: 00:1e.2 subsystem <- 8086/a0aa
1598 12:44:56.065543 PCI: 00:1e.2 cmd <- 06
1599 12:44:56.068845 PCI: 00:1e.3 subsystem <- 8086/a0ab
1600 12:44:56.072237 PCI: 00:1e.3 cmd <- 02
1601 12:44:56.075135 PCI: 00:1f.0 subsystem <- 8086/a087
1602 12:44:56.078512 PCI: 00:1f.0 cmd <- 407
1603 12:44:56.081808 PCI: 00:1f.3 subsystem <- 8086/a0c8
1604 12:44:56.081879 PCI: 00:1f.3 cmd <- 02
1605 12:44:56.088645 PCI: 00:1f.5 subsystem <- 8086/a0a4
1606 12:44:56.088747 PCI: 00:1f.5 cmd <- 406
1607 12:44:56.094147 PCI: 01:00.0 cmd <- 02
1608 12:44:56.098515 done.
1609 12:44:56.101715 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1610 12:44:56.104763 Initializing devices...
1611 12:44:56.108232 Root Device init
1612 12:44:56.111519 Chrome EC: Set SMI mask to 0x0000000000000000
1613 12:44:56.118083 Chrome EC: clear events_b mask to 0x0000000000000000
1614 12:44:56.124528 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1615 12:44:56.131066 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1616 12:44:56.138003 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1617 12:44:56.141256 Chrome EC: Set WAKE mask to 0x0000000000000000
1618 12:44:56.148973 fw_config match found: DB_USB=USB3_ACTIVE
1619 12:44:56.152310 Configure Right Type-C port orientation for retimer
1620 12:44:56.155372 Root Device init finished in 45 msecs
1621 12:44:56.159669 PCI: 00:00.0 init
1622 12:44:56.163026 CPU TDP = 9 Watts
1623 12:44:56.163123 CPU PL1 = 9 Watts
1624 12:44:56.166283 CPU PL2 = 40 Watts
1625 12:44:56.169475 CPU PL4 = 83 Watts
1626 12:44:56.172701 PCI: 00:00.0 init finished in 8 msecs
1627 12:44:56.172777 PCI: 00:02.0 init
1628 12:44:56.176184 GMA: Found VBT in CBFS
1629 12:44:56.179409 GMA: Found valid VBT in CBFS
1630 12:44:56.186122 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1631 12:44:56.192863 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1632 12:44:56.196382 PCI: 00:02.0 init finished in 18 msecs
1633 12:44:56.199135 PCI: 00:05.0 init
1634 12:44:56.202416 PCI: 00:05.0 init finished in 0 msecs
1635 12:44:56.206375 PCI: 00:08.0 init
1636 12:44:56.209336 PCI: 00:08.0 init finished in 0 msecs
1637 12:44:56.212538 PCI: 00:14.0 init
1638 12:44:56.216267 PCI: 00:14.0 init finished in 0 msecs
1639 12:44:56.219342 PCI: 00:14.2 init
1640 12:44:56.222770 PCI: 00:14.2 init finished in 0 msecs
1641 12:44:56.225878 PCI: 00:15.0 init
1642 12:44:56.229061 I2C bus 0 version 0x3230302a
1643 12:44:56.232300 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1644 12:44:56.235755 PCI: 00:15.0 init finished in 6 msecs
1645 12:44:56.235837 PCI: 00:15.1 init
1646 12:44:56.238959 I2C bus 1 version 0x3230302a
1647 12:44:56.242207 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1648 12:44:56.248997 PCI: 00:15.1 init finished in 6 msecs
1649 12:44:56.249079 PCI: 00:15.2 init
1650 12:44:56.252347 I2C bus 2 version 0x3230302a
1651 12:44:56.255623 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1652 12:44:56.258721 PCI: 00:15.2 init finished in 6 msecs
1653 12:44:56.262227 PCI: 00:15.3 init
1654 12:44:56.265815 I2C bus 3 version 0x3230302a
1655 12:44:56.268938 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1656 12:44:56.272598 PCI: 00:15.3 init finished in 6 msecs
1657 12:44:56.275774 PCI: 00:16.0 init
1658 12:44:56.278653 PCI: 00:16.0 init finished in 0 msecs
1659 12:44:56.281914 PCI: 00:19.1 init
1660 12:44:56.285352 I2C bus 5 version 0x3230302a
1661 12:44:56.288659 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1662 12:44:56.291962 PCI: 00:19.1 init finished in 6 msecs
1663 12:44:56.295410 PCI: 00:1d.0 init
1664 12:44:56.298668 Initializing PCH PCIe bridge.
1665 12:44:56.301975 PCI: 00:1d.0 init finished in 3 msecs
1666 12:44:56.305335 PCI: 00:1f.0 init
1667 12:44:56.308772 IOAPIC: Initializing IOAPIC at 0xfec00000
1668 12:44:56.312113 IOAPIC: Bootstrap Processor Local APIC = 0x00
1669 12:44:56.315398 IOAPIC: ID = 0x02
1670 12:44:56.318582 IOAPIC: Dumping registers
1671 12:44:56.318664 reg 0x0000: 0x02000000
1672 12:44:56.321847 reg 0x0001: 0x00770020
1673 12:44:56.325167 reg 0x0002: 0x00000000
1674 12:44:56.328283 PCI: 00:1f.0 init finished in 21 msecs
1675 12:44:56.331618 PCI: 00:1f.2 init
1676 12:44:56.335211 Disabling ACPI via APMC.
1677 12:44:56.338557 APMC done.
1678 12:44:56.341829 PCI: 00:1f.2 init finished in 6 msecs
1679 12:44:56.353513 PCI: 01:00.0 init
1680 12:44:56.356818 PCI: 01:00.0 init finished in 0 msecs
1681 12:44:56.360291 PNP: 0c09.0 init
1682 12:44:56.366800 Google Chrome EC uptime: 8.411 seconds
1683 12:44:56.369936 Google Chrome AP resets since EC boot: 0
1684 12:44:56.373177 Google Chrome most recent AP reset causes:
1685 12:44:56.380231 Google Chrome EC reset flags at last EC boot: reset-pin
1686 12:44:56.383191 PNP: 0c09.0 init finished in 19 msecs
1687 12:44:56.388643 Devices initialized
1688 12:44:56.392142 Show all devs... After init.
1689 12:44:56.395533 Root Device: enabled 1
1690 12:44:56.395618 DOMAIN: 0000: enabled 1
1691 12:44:56.398407 CPU_CLUSTER: 0: enabled 1
1692 12:44:56.401839 PCI: 00:00.0: enabled 1
1693 12:44:56.405278 PCI: 00:02.0: enabled 1
1694 12:44:56.405360 PCI: 00:04.0: enabled 1
1695 12:44:56.408614 PCI: 00:05.0: enabled 1
1696 12:44:56.412043 PCI: 00:06.0: enabled 0
1697 12:44:56.415565 PCI: 00:07.0: enabled 0
1698 12:44:56.415648 PCI: 00:07.1: enabled 0
1699 12:44:56.418265 PCI: 00:07.2: enabled 0
1700 12:44:56.421607 PCI: 00:07.3: enabled 0
1701 12:44:56.424926 PCI: 00:08.0: enabled 1
1702 12:44:56.425008 PCI: 00:09.0: enabled 0
1703 12:44:56.428395 PCI: 00:0a.0: enabled 0
1704 12:44:56.431624 PCI: 00:0d.0: enabled 1
1705 12:44:56.434958 PCI: 00:0d.1: enabled 0
1706 12:44:56.435040 PCI: 00:0d.2: enabled 0
1707 12:44:56.438391 PCI: 00:0d.3: enabled 0
1708 12:44:56.441714 PCI: 00:0e.0: enabled 0
1709 12:44:56.444942 PCI: 00:10.2: enabled 1
1710 12:44:56.445024 PCI: 00:10.6: enabled 0
1711 12:44:56.448275 PCI: 00:10.7: enabled 0
1712 12:44:56.451562 PCI: 00:12.0: enabled 0
1713 12:44:56.454788 PCI: 00:12.6: enabled 0
1714 12:44:56.454870 PCI: 00:13.0: enabled 0
1715 12:44:56.457890 PCI: 00:14.0: enabled 1
1716 12:44:56.461363 PCI: 00:14.1: enabled 0
1717 12:44:56.461445 PCI: 00:14.2: enabled 1
1718 12:44:56.464592 PCI: 00:14.3: enabled 1
1719 12:44:56.467772 PCI: 00:15.0: enabled 1
1720 12:44:56.471193 PCI: 00:15.1: enabled 1
1721 12:44:56.471274 PCI: 00:15.2: enabled 1
1722 12:44:56.474675 PCI: 00:15.3: enabled 1
1723 12:44:56.477843 PCI: 00:16.0: enabled 1
1724 12:44:56.481117 PCI: 00:16.1: enabled 0
1725 12:44:56.481199 PCI: 00:16.2: enabled 0
1726 12:44:56.484423 PCI: 00:16.3: enabled 0
1727 12:44:56.488081 PCI: 00:16.4: enabled 0
1728 12:44:56.491074 PCI: 00:16.5: enabled 0
1729 12:44:56.491156 PCI: 00:17.0: enabled 0
1730 12:44:56.494288 PCI: 00:19.0: enabled 0
1731 12:44:56.497670 PCI: 00:19.1: enabled 1
1732 12:44:56.501053 PCI: 00:19.2: enabled 0
1733 12:44:56.501135 PCI: 00:1c.0: enabled 1
1734 12:44:56.504410 PCI: 00:1c.1: enabled 0
1735 12:44:56.507791 PCI: 00:1c.2: enabled 0
1736 12:44:56.507873 PCI: 00:1c.3: enabled 0
1737 12:44:56.511136 PCI: 00:1c.4: enabled 0
1738 12:44:56.514508 PCI: 00:1c.5: enabled 0
1739 12:44:56.517788 PCI: 00:1c.6: enabled 1
1740 12:44:56.517887 PCI: 00:1c.7: enabled 0
1741 12:44:56.521157 PCI: 00:1d.0: enabled 1
1742 12:44:56.524562 PCI: 00:1d.1: enabled 0
1743 12:44:56.527360 PCI: 00:1d.2: enabled 1
1744 12:44:56.527442 PCI: 00:1d.3: enabled 0
1745 12:44:56.530705 PCI: 00:1e.0: enabled 1
1746 12:44:56.534047 PCI: 00:1e.1: enabled 0
1747 12:44:56.537492 PCI: 00:1e.2: enabled 1
1748 12:44:56.537575 PCI: 00:1e.3: enabled 1
1749 12:44:56.540771 PCI: 00:1f.0: enabled 1
1750 12:44:56.544246 PCI: 00:1f.1: enabled 0
1751 12:44:56.547534 PCI: 00:1f.2: enabled 1
1752 12:44:56.547616 PCI: 00:1f.3: enabled 1
1753 12:44:56.551010 PCI: 00:1f.4: enabled 0
1754 12:44:56.553977 PCI: 00:1f.5: enabled 1
1755 12:44:56.554059 PCI: 00:1f.6: enabled 0
1756 12:44:56.557714 PCI: 00:1f.7: enabled 0
1757 12:44:56.560733 APIC: 00: enabled 1
1758 12:44:56.563915 GENERIC: 0.0: enabled 1
1759 12:44:56.563996 GENERIC: 0.0: enabled 1
1760 12:44:56.567525 GENERIC: 1.0: enabled 1
1761 12:44:56.570643 GENERIC: 0.0: enabled 1
1762 12:44:56.574068 GENERIC: 1.0: enabled 1
1763 12:44:56.574183 USB0 port 0: enabled 1
1764 12:44:56.577147 GENERIC: 0.0: enabled 1
1765 12:44:56.580699 USB0 port 0: enabled 1
1766 12:44:56.580776 GENERIC: 0.0: enabled 1
1767 12:44:56.583972 I2C: 00:1a: enabled 1
1768 12:44:56.587423 I2C: 00:31: enabled 1
1769 12:44:56.587527 I2C: 00:32: enabled 1
1770 12:44:56.590887 I2C: 00:10: enabled 1
1771 12:44:56.594064 I2C: 00:15: enabled 1
1772 12:44:56.597072 GENERIC: 0.0: enabled 0
1773 12:44:56.597142 GENERIC: 1.0: enabled 0
1774 12:44:56.600261 GENERIC: 0.0: enabled 1
1775 12:44:56.604140 SPI: 00: enabled 1
1776 12:44:56.604248 SPI: 00: enabled 1
1777 12:44:56.606934 PNP: 0c09.0: enabled 1
1778 12:44:56.610282 GENERIC: 0.0: enabled 1
1779 12:44:56.610389 USB3 port 0: enabled 1
1780 12:44:56.613639 USB3 port 1: enabled 1
1781 12:44:56.617046 USB3 port 2: enabled 0
1782 12:44:56.617155 USB3 port 3: enabled 0
1783 12:44:56.620380 USB2 port 0: enabled 0
1784 12:44:56.623723 USB2 port 1: enabled 1
1785 12:44:56.627216 USB2 port 2: enabled 1
1786 12:44:56.627318 USB2 port 3: enabled 0
1787 12:44:56.630519 USB2 port 4: enabled 1
1788 12:44:56.633940 USB2 port 5: enabled 0
1789 12:44:56.634041 USB2 port 6: enabled 0
1790 12:44:56.636750 USB2 port 7: enabled 0
1791 12:44:56.640031 USB2 port 8: enabled 0
1792 12:44:56.643505 USB2 port 9: enabled 0
1793 12:44:56.643602 USB3 port 0: enabled 0
1794 12:44:56.646991 USB3 port 1: enabled 1
1795 12:44:56.650218 USB3 port 2: enabled 0
1796 12:44:56.650321 USB3 port 3: enabled 0
1797 12:44:56.653548 GENERIC: 0.0: enabled 1
1798 12:44:56.656837 GENERIC: 1.0: enabled 1
1799 12:44:56.656944 APIC: 01: enabled 1
1800 12:44:56.660247 APIC: 03: enabled 1
1801 12:44:56.663722 APIC: 06: enabled 1
1802 12:44:56.663822 APIC: 04: enabled 1
1803 12:44:56.666878 APIC: 05: enabled 1
1804 12:44:56.670070 APIC: 02: enabled 1
1805 12:44:56.670176 APIC: 07: enabled 1
1806 12:44:56.673451 PCI: 01:00.0: enabled 1
1807 12:44:56.679995 BS: BS_DEV_INIT run times (exec / console): 34 / 536 ms
1808 12:44:56.683256 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1809 12:44:56.686492 ELOG: NV offset 0xf30000 size 0x1000
1810 12:44:56.694079 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1811 12:44:56.700362 ELOG: Event(17) added with size 13 at 2024-03-05 12:44:57 UTC
1812 12:44:56.707151 ELOG: Event(92) added with size 9 at 2024-03-05 12:44:57 UTC
1813 12:44:56.714000 ELOG: Event(93) added with size 9 at 2024-03-05 12:44:57 UTC
1814 12:44:56.720104 ELOG: Event(9E) added with size 10 at 2024-03-05 12:44:57 UTC
1815 12:44:56.726739 ELOG: Event(9F) added with size 14 at 2024-03-05 12:44:57 UTC
1816 12:44:56.733462 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1817 12:44:56.740261 ELOG: Event(A1) added with size 10 at 2024-03-05 12:44:57 UTC
1818 12:44:56.747035 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1819 12:44:56.753101 ELOG: Event(A0) added with size 9 at 2024-03-05 12:44:57 UTC
1820 12:44:56.756509 elog_add_boot_reason: Logged dev mode boot
1821 12:44:56.763196 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1822 12:44:56.763275 Finalize devices...
1823 12:44:56.766560 Devices finalized
1824 12:44:56.773304 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1825 12:44:56.776729 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1826 12:44:56.783115 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1827 12:44:56.786372 ME: HFSTS1 : 0x80030055
1828 12:44:56.793519 ME: HFSTS2 : 0x30280116
1829 12:44:56.796626 ME: HFSTS3 : 0x00000050
1830 12:44:56.799638 ME: HFSTS4 : 0x00004000
1831 12:44:56.806514 ME: HFSTS5 : 0x00000000
1832 12:44:56.809787 ME: HFSTS6 : 0x00400006
1833 12:44:56.813058 ME: Manufacturing Mode : YES
1834 12:44:56.816006 ME: SPI Protection Mode Enabled : NO
1835 12:44:56.822932 ME: FW Partition Table : OK
1836 12:44:56.826258 ME: Bringup Loader Failure : NO
1837 12:44:56.829429 ME: Firmware Init Complete : NO
1838 12:44:56.833049 ME: Boot Options Present : NO
1839 12:44:56.836178 ME: Update In Progress : NO
1840 12:44:56.839487 ME: D0i3 Support : YES
1841 12:44:56.842847 ME: Low Power State Enabled : NO
1842 12:44:56.846329 ME: CPU Replaced : YES
1843 12:44:56.852968 ME: CPU Replacement Valid : YES
1844 12:44:56.856479 ME: Current Working State : 5
1845 12:44:56.859640 ME: Current Operation State : 1
1846 12:44:56.862935 ME: Current Operation Mode : 3
1847 12:44:56.865863 ME: Error Code : 0
1848 12:44:56.869100 ME: Enhanced Debug Mode : NO
1849 12:44:56.872512 ME: CPU Debug Disabled : YES
1850 12:44:56.875830 ME: TXT Support : NO
1851 12:44:56.882621 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1852 12:44:56.892417 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1853 12:44:56.896044 CBFS: 'fallback/slic' not found.
1854 12:44:56.899207 ACPI: Writing ACPI tables at 76b01000.
1855 12:44:56.899308 ACPI: * FACS
1856 12:44:56.902573 ACPI: * DSDT
1857 12:44:56.905715 Ramoops buffer: 0x100000@0x76a00000.
1858 12:44:56.909181 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1859 12:44:56.915736 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1860 12:44:56.919101 Google Chrome EC: version:
1861 12:44:56.922221 ro: voema_v2.0.10114-a447f03e46
1862 12:44:56.925560 rw: voema_v2.0.10114-a447f03e46
1863 12:44:56.925639 running image: 1
1864 12:44:56.931724 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1865 12:44:56.936725 ACPI: * FADT
1866 12:44:56.936824 SCI is IRQ9
1867 12:44:56.943334 ACPI: added table 1/32, length now 40
1868 12:44:56.943419 ACPI: * SSDT
1869 12:44:56.946574 Found 1 CPU(s) with 8 core(s) each.
1870 12:44:56.953597 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1871 12:44:56.957097 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1872 12:44:56.959954 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1873 12:44:56.963332 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1874 12:44:56.970135 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1875 12:44:56.976774 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1876 12:44:56.980183 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1877 12:44:56.986823 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1878 12:44:56.993380 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1879 12:44:56.996822 \_SB.PCI0.RP09: Added StorageD3Enable property
1880 12:44:56.999815 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1881 12:44:57.006795 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1882 12:44:57.013337 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1883 12:44:57.016518 PS2K: Passing 80 keymaps to kernel
1884 12:44:57.023179 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1885 12:44:57.029595 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1886 12:44:57.036447 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1887 12:44:57.042597 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1888 12:44:57.049662 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1889 12:44:57.056385 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1890 12:44:57.062977 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1891 12:44:57.069310 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1892 12:44:57.072598 ACPI: added table 2/32, length now 44
1893 12:44:57.072680 ACPI: * MCFG
1894 12:44:57.079327 ACPI: added table 3/32, length now 48
1895 12:44:57.079408 ACPI: * TPM2
1896 12:44:57.082665 TPM2 log created at 0x769f0000
1897 12:44:57.086149 ACPI: added table 4/32, length now 52
1898 12:44:57.089584 ACPI: * MADT
1899 12:44:57.089664 SCI is IRQ9
1900 12:44:57.092848 ACPI: added table 5/32, length now 56
1901 12:44:57.096031 current = 76b09850
1902 12:44:57.096150 ACPI: * DMAR
1903 12:44:57.099328 ACPI: added table 6/32, length now 60
1904 12:44:57.106182 ACPI: added table 7/32, length now 64
1905 12:44:57.106288 ACPI: * HPET
1906 12:44:57.109281 ACPI: added table 8/32, length now 68
1907 12:44:57.112810 ACPI: done.
1908 12:44:57.112892 ACPI tables: 35216 bytes.
1909 12:44:57.116286 smbios_write_tables: 769ef000
1910 12:44:57.120098 EC returned error result code 3
1911 12:44:57.123278 Couldn't obtain OEM name from CBI
1912 12:44:57.127334 Create SMBIOS type 16
1913 12:44:57.130419 Create SMBIOS type 17
1914 12:44:57.133834 GENERIC: 0.0 (WIFI Device)
1915 12:44:57.137117 SMBIOS tables: 1750 bytes.
1916 12:44:57.140496 Writing table forward entry at 0x00000500
1917 12:44:57.147302 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1918 12:44:57.150735 Writing coreboot table at 0x76b25000
1919 12:44:57.157192 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1920 12:44:57.160490 1. 0000000000001000-000000000009ffff: RAM
1921 12:44:57.163647 2. 00000000000a0000-00000000000fffff: RESERVED
1922 12:44:57.170206 3. 0000000000100000-00000000769eefff: RAM
1923 12:44:57.173918 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1924 12:44:57.180347 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1925 12:44:57.186881 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1926 12:44:57.190163 7. 0000000077000000-000000007fbfffff: RESERVED
1927 12:44:57.196894 8. 00000000c0000000-00000000cfffffff: RESERVED
1928 12:44:57.200261 9. 00000000f8000000-00000000f9ffffff: RESERVED
1929 12:44:57.203342 10. 00000000fb000000-00000000fb000fff: RESERVED
1930 12:44:57.210192 11. 00000000fe000000-00000000fe00ffff: RESERVED
1931 12:44:57.213362 12. 00000000fed80000-00000000fed87fff: RESERVED
1932 12:44:57.219977 13. 00000000fed90000-00000000fed92fff: RESERVED
1933 12:44:57.223280 14. 00000000feda0000-00000000feda1fff: RESERVED
1934 12:44:57.229928 15. 00000000fedc0000-00000000feddffff: RESERVED
1935 12:44:57.233158 16. 0000000100000000-00000002803fffff: RAM
1936 12:44:57.236739 Passing 4 GPIOs to payload:
1937 12:44:57.240004 NAME | PORT | POLARITY | VALUE
1938 12:44:57.246562 lid | undefined | high | high
1939 12:44:57.252878 power | undefined | high | low
1940 12:44:57.256660 oprom | undefined | high | low
1941 12:44:57.263123 EC in RW | 0x000000e5 | high | low
1942 12:44:57.269452 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 4a43
1943 12:44:57.273120 coreboot table: 1576 bytes.
1944 12:44:57.275918 IMD ROOT 0. 0x76fff000 0x00001000
1945 12:44:57.279330 IMD SMALL 1. 0x76ffe000 0x00001000
1946 12:44:57.282631 FSP MEMORY 2. 0x76c4e000 0x003b0000
1947 12:44:57.285951 VPD 3. 0x76c4d000 0x00000367
1948 12:44:57.289237 RO MCACHE 4. 0x76c4c000 0x00000fdc
1949 12:44:57.292613 CONSOLE 5. 0x76c2c000 0x00020000
1950 12:44:57.295824 FMAP 6. 0x76c2b000 0x00000578
1951 12:44:57.302661 TIME STAMP 7. 0x76c2a000 0x00000910
1952 12:44:57.305837 VBOOT WORK 8. 0x76c16000 0x00014000
1953 12:44:57.309015 ROMSTG STCK 9. 0x76c15000 0x00001000
1954 12:44:57.312412 AFTER CAR 10. 0x76c0a000 0x0000b000
1955 12:44:57.315765 RAMSTAGE 11. 0x76b97000 0x00073000
1956 12:44:57.319153 REFCODE 12. 0x76b42000 0x00055000
1957 12:44:57.322506 SMM BACKUP 13. 0x76b32000 0x00010000
1958 12:44:57.328873 4f444749 14. 0x76b30000 0x00002000
1959 12:44:57.332527 EXT VBT15. 0x76b2d000 0x0000219f
1960 12:44:57.335816 COREBOOT 16. 0x76b25000 0x00008000
1961 12:44:57.338709 ACPI 17. 0x76b01000 0x00024000
1962 12:44:57.342474 ACPI GNVS 18. 0x76b00000 0x00001000
1963 12:44:57.345682 RAMOOPS 19. 0x76a00000 0x00100000
1964 12:44:57.348706 TPM2 TCGLOG20. 0x769f0000 0x00010000
1965 12:44:57.352482 SMBIOS 21. 0x769ef000 0x00000800
1966 12:44:57.355771 IMD small region:
1967 12:44:57.358557 IMD ROOT 0. 0x76ffec00 0x00000400
1968 12:44:57.361818 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1969 12:44:57.365162 POWER STATE 2. 0x76ffeb80 0x00000044
1970 12:44:57.372314 ROMSTAGE 3. 0x76ffeb60 0x00000004
1971 12:44:57.375467 MEM INFO 4. 0x76ffe980 0x000001e0
1972 12:44:57.382096 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1973 12:44:57.382180 MTRR: Physical address space:
1974 12:44:57.388750 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1975 12:44:57.395470 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1976 12:44:57.401847 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1977 12:44:57.408311 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1978 12:44:57.414832 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1979 12:44:57.421526 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1980 12:44:57.428406 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1981 12:44:57.431223 MTRR: Fixed MSR 0x250 0x0606060606060606
1982 12:44:57.434895 MTRR: Fixed MSR 0x258 0x0606060606060606
1983 12:44:57.438447 MTRR: Fixed MSR 0x259 0x0000000000000000
1984 12:44:57.444736 MTRR: Fixed MSR 0x268 0x0606060606060606
1985 12:44:57.448221 MTRR: Fixed MSR 0x269 0x0606060606060606
1986 12:44:57.451445 MTRR: Fixed MSR 0x26a 0x0606060606060606
1987 12:44:57.454566 MTRR: Fixed MSR 0x26b 0x0606060606060606
1988 12:44:57.461335 MTRR: Fixed MSR 0x26c 0x0606060606060606
1989 12:44:57.464651 MTRR: Fixed MSR 0x26d 0x0606060606060606
1990 12:44:57.468085 MTRR: Fixed MSR 0x26e 0x0606060606060606
1991 12:44:57.471219 MTRR: Fixed MSR 0x26f 0x0606060606060606
1992 12:44:57.475052 call enable_fixed_mtrr()
1993 12:44:57.478500 CPU physical address size: 39 bits
1994 12:44:57.485103 MTRR: default type WB/UC MTRR counts: 6/6.
1995 12:44:57.488388 MTRR: UC selected as default type.
1996 12:44:57.495120 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1997 12:44:57.498408 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1998 12:44:57.505046 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1999 12:44:57.511950 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2000 12:44:57.518068 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2001 12:44:57.524787 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2002 12:44:57.524895
2003 12:44:57.528145 MTRR check
2004 12:44:57.531483 Fixed MTRRs : Enabled
2005 12:44:57.531565 Variable MTRRs: Enabled
2006 12:44:57.531629
2007 12:44:57.538343 MTRR: Fixed MSR 0x250 0x0606060606060606
2008 12:44:57.541725 MTRR: Fixed MSR 0x258 0x0606060606060606
2009 12:44:57.544846 MTRR: Fixed MSR 0x259 0x0000000000000000
2010 12:44:57.547917 MTRR: Fixed MSR 0x268 0x0606060606060606
2011 12:44:57.554883 MTRR: Fixed MSR 0x269 0x0606060606060606
2012 12:44:57.558049 MTRR: Fixed MSR 0x26a 0x0606060606060606
2013 12:44:57.561188 MTRR: Fixed MSR 0x26b 0x0606060606060606
2014 12:44:57.564908 MTRR: Fixed MSR 0x26c 0x0606060606060606
2015 12:44:57.567923 MTRR: Fixed MSR 0x26d 0x0606060606060606
2016 12:44:57.574566 MTRR: Fixed MSR 0x26e 0x0606060606060606
2017 12:44:57.577806 MTRR: Fixed MSR 0x26f 0x0606060606060606
2018 12:44:57.584341 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2019 12:44:57.587769 call enable_fixed_mtrr()
2020 12:44:57.591041 Checking cr50 for pending updates
2021 12:44:57.595055 CPU physical address size: 39 bits
2022 12:44:57.598453 MTRR: Fixed MSR 0x250 0x0606060606060606
2023 12:44:57.601916 MTRR: Fixed MSR 0x250 0x0606060606060606
2024 12:44:57.604765 MTRR: Fixed MSR 0x258 0x0606060606060606
2025 12:44:57.611580 MTRR: Fixed MSR 0x259 0x0000000000000000
2026 12:44:57.615208 MTRR: Fixed MSR 0x268 0x0606060606060606
2027 12:44:57.618160 MTRR: Fixed MSR 0x269 0x0606060606060606
2028 12:44:57.621333 MTRR: Fixed MSR 0x26a 0x0606060606060606
2029 12:44:57.628317 MTRR: Fixed MSR 0x26b 0x0606060606060606
2030 12:44:57.631510 MTRR: Fixed MSR 0x26c 0x0606060606060606
2031 12:44:57.634832 MTRR: Fixed MSR 0x26d 0x0606060606060606
2032 12:44:57.638236 MTRR: Fixed MSR 0x26e 0x0606060606060606
2033 12:44:57.644824 MTRR: Fixed MSR 0x26f 0x0606060606060606
2034 12:44:57.648342 MTRR: Fixed MSR 0x258 0x0606060606060606
2035 12:44:57.651840 call enable_fixed_mtrr()
2036 12:44:57.654800 MTRR: Fixed MSR 0x259 0x0000000000000000
2037 12:44:57.658033 MTRR: Fixed MSR 0x268 0x0606060606060606
2038 12:44:57.665081 MTRR: Fixed MSR 0x269 0x0606060606060606
2039 12:44:57.668389 MTRR: Fixed MSR 0x26a 0x0606060606060606
2040 12:44:57.671458 MTRR: Fixed MSR 0x26b 0x0606060606060606
2041 12:44:57.674852 MTRR: Fixed MSR 0x26c 0x0606060606060606
2042 12:44:57.681916 MTRR: Fixed MSR 0x26d 0x0606060606060606
2043 12:44:57.684846 MTRR: Fixed MSR 0x26e 0x0606060606060606
2044 12:44:57.688044 MTRR: Fixed MSR 0x26f 0x0606060606060606
2045 12:44:57.692142 CPU physical address size: 39 bits
2046 12:44:57.696345 call enable_fixed_mtrr()
2047 12:44:57.699317 MTRR: Fixed MSR 0x250 0x0606060606060606
2048 12:44:57.706078 MTRR: Fixed MSR 0x250 0x0606060606060606
2049 12:44:57.709613 MTRR: Fixed MSR 0x258 0x0606060606060606
2050 12:44:57.712405 MTRR: Fixed MSR 0x259 0x0000000000000000
2051 12:44:57.716033 MTRR: Fixed MSR 0x268 0x0606060606060606
2052 12:44:57.722508 MTRR: Fixed MSR 0x269 0x0606060606060606
2053 12:44:57.725759 MTRR: Fixed MSR 0x26a 0x0606060606060606
2054 12:44:57.729636 MTRR: Fixed MSR 0x26b 0x0606060606060606
2055 12:44:57.732776 MTRR: Fixed MSR 0x26c 0x0606060606060606
2056 12:44:57.739053 MTRR: Fixed MSR 0x26d 0x0606060606060606
2057 12:44:57.742622 MTRR: Fixed MSR 0x26e 0x0606060606060606
2058 12:44:57.745934 MTRR: Fixed MSR 0x26f 0x0606060606060606
2059 12:44:57.752263 MTRR: Fixed MSR 0x258 0x0606060606060606
2060 12:44:57.756197 MTRR: Fixed MSR 0x259 0x0000000000000000
2061 12:44:57.759171 MTRR: Fixed MSR 0x268 0x0606060606060606
2062 12:44:57.762651 MTRR: Fixed MSR 0x269 0x0606060606060606
2063 12:44:57.768842 MTRR: Fixed MSR 0x26a 0x0606060606060606
2064 12:44:57.772181 MTRR: Fixed MSR 0x26b 0x0606060606060606
2065 12:44:57.776011 MTRR: Fixed MSR 0x26c 0x0606060606060606
2066 12:44:57.779101 MTRR: Fixed MSR 0x26d 0x0606060606060606
2067 12:44:57.782516 MTRR: Fixed MSR 0x26e 0x0606060606060606
2068 12:44:57.788845 MTRR: Fixed MSR 0x26f 0x0606060606060606
2069 12:44:57.792160 call enable_fixed_mtrr()
2070 12:44:57.795286 call enable_fixed_mtrr()
2071 12:44:57.798418 CPU physical address size: 39 bits
2072 12:44:57.802447 CPU physical address size: 39 bits
2073 12:44:57.804948 CPU physical address size: 39 bits
2074 12:44:57.809008 Reading cr50 TPM mode
2075 12:44:57.812295 MTRR: Fixed MSR 0x250 0x0606060606060606
2076 12:44:57.815744 MTRR: Fixed MSR 0x250 0x0606060606060606
2077 12:44:57.819199 MTRR: Fixed MSR 0x258 0x0606060606060606
2078 12:44:57.825873 MTRR: Fixed MSR 0x259 0x0000000000000000
2079 12:44:57.829562 MTRR: Fixed MSR 0x268 0x0606060606060606
2080 12:44:57.832678 MTRR: Fixed MSR 0x269 0x0606060606060606
2081 12:44:57.835562 MTRR: Fixed MSR 0x26a 0x0606060606060606
2082 12:44:57.838635 MTRR: Fixed MSR 0x26b 0x0606060606060606
2083 12:44:57.845256 MTRR: Fixed MSR 0x26c 0x0606060606060606
2084 12:44:57.848582 MTRR: Fixed MSR 0x26d 0x0606060606060606
2085 12:44:57.851730 MTRR: Fixed MSR 0x26e 0x0606060606060606
2086 12:44:57.855020 MTRR: Fixed MSR 0x26f 0x0606060606060606
2087 12:44:57.863429 MTRR: Fixed MSR 0x258 0x0606060606060606
2088 12:44:57.864076 call enable_fixed_mtrr()
2089 12:44:57.869784 MTRR: Fixed MSR 0x259 0x0000000000000000
2090 12:44:57.873150 MTRR: Fixed MSR 0x268 0x0606060606060606
2091 12:44:57.876656 MTRR: Fixed MSR 0x269 0x0606060606060606
2092 12:44:57.880087 MTRR: Fixed MSR 0x26a 0x0606060606060606
2093 12:44:57.886484 MTRR: Fixed MSR 0x26b 0x0606060606060606
2094 12:44:57.889686 MTRR: Fixed MSR 0x26c 0x0606060606060606
2095 12:44:57.892868 MTRR: Fixed MSR 0x26d 0x0606060606060606
2096 12:44:57.896460 MTRR: Fixed MSR 0x26e 0x0606060606060606
2097 12:44:57.903253 MTRR: Fixed MSR 0x26f 0x0606060606060606
2098 12:44:57.906429 CPU physical address size: 39 bits
2099 12:44:57.909697 call enable_fixed_mtrr()
2100 12:44:57.916166 BS: BS_PAYLOAD_LOAD entry times (exec / console): 221 / 6 ms
2101 12:44:57.919502 CPU physical address size: 39 bits
2102 12:44:57.926554 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2103 12:44:57.933104 Checking segment from ROM address 0xffc02b38
2104 12:44:57.936230 Checking segment from ROM address 0xffc02b54
2105 12:44:57.939818 Loading segment from ROM address 0xffc02b38
2106 12:44:57.942609 code (compression=0)
2107 12:44:57.952572 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2108 12:44:57.958985 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2109 12:44:57.962248 it's not compressed!
2110 12:44:58.100693 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2111 12:44:58.107213 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2112 12:44:58.114065 Loading segment from ROM address 0xffc02b54
2113 12:44:58.117060 Entry Point 0x30000000
2114 12:44:58.117524 Loaded segments
2115 12:44:58.123753 BS: BS_PAYLOAD_LOAD run times (exec / console): 139 / 63 ms
2116 12:44:58.167209 Finalizing chipset.
2117 12:44:58.170379 Finalizing SMM.
2118 12:44:58.170964 APMC done.
2119 12:44:58.176982 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2120 12:44:58.180448 mp_park_aps done after 0 msecs.
2121 12:44:58.183354 Jumping to boot code at 0x30000000(0x76b25000)
2122 12:44:58.193919 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2123 12:44:58.194479
2124 12:44:58.194847
2125 12:44:58.195184
2126 12:44:58.197258 Starting depthcharge on Voema...
2127 12:44:58.197720
2128 12:44:58.198887 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2129 12:44:58.199423 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2130 12:44:58.199857 Setting prompt string to ['volteer:']
2131 12:44:58.200356 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2132 12:44:58.206647 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2133 12:44:58.207226
2134 12:44:58.213212 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2135 12:44:58.213720
2136 12:44:58.220239 Looking for NVMe Controller 0x3005f238 @ 00:1d:00
2137 12:44:58.220716
2138 12:44:58.223188 Failed to find eMMC card reader
2139 12:44:58.223658
2140 12:44:58.224025 Wipe memory regions:
2141 12:44:58.224435
2142 12:44:58.229997 [0x00000000001000, 0x000000000a0000)
2143 12:44:58.230470
2144 12:44:58.233166 [0x00000000100000, 0x00000030000000)
2145 12:44:58.258463
2146 12:44:58.261600 [0x00000032662db0, 0x000000769ef000)
2147 12:44:58.297892
2148 12:44:58.300950 [0x00000100000000, 0x00000280400000)
2149 12:44:58.501539
2150 12:44:58.504809 ec_init: CrosEC protocol v3 supported (256, 256)
2151 12:44:58.936312
2152 12:44:58.936817 R8152: Initializing
2153 12:44:58.937147
2154 12:44:58.939107 Version 6 (ocp_data = 5c30)
2155 12:44:58.939525
2156 12:44:58.943061 R8152: Done initializing
2157 12:44:58.943549
2158 12:44:58.945740 Adding net device
2159 12:44:59.247238
2160 12:44:59.250567 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2161 12:44:59.250983
2162 12:44:59.251311
2163 12:44:59.251617
2164 12:44:59.253636 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2166 12:44:59.354949 volteer: tftpboot 192.168.201.1 12948317/tftp-deploy-yamreqmo/kernel/bzImage 12948317/tftp-deploy-yamreqmo/kernel/cmdline 12948317/tftp-deploy-yamreqmo/ramdisk/ramdisk.cpio.gz
2167 12:44:59.355550 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2168 12:44:59.356030 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2169 12:44:59.360305 tftpboot 192.168.201.1 12948317/tftp-deploy-yamreqmo/kernel/bzIploy-yamreqmo/kernel/cmdline 12948317/tftp-deploy-yamreqmo/ramdisk/ramdisk.cpio.gz
2170 12:44:59.360759
2171 12:44:59.361196 Waiting for link
2172 12:44:59.563048
2173 12:44:59.563550 done.
2174 12:44:59.563995
2175 12:44:59.564455 MAC: 00:24:32:30:77:76
2176 12:44:59.564886
2177 12:44:59.566556 Sending DHCP discover... done.
2178 12:44:59.566991
2179 12:44:59.570154 Waiting for reply... done.
2180 12:44:59.570875
2181 12:44:59.573268 Sending DHCP request... done.
2182 12:44:59.573846
2183 12:44:59.579965 Waiting for reply... done.
2184 12:44:59.580485
2185 12:44:59.580826 My ip is 192.168.201.16
2186 12:44:59.581143
2187 12:44:59.583318 The DHCP server ip is 192.168.201.1
2188 12:44:59.587078
2189 12:44:59.590025 TFTP server IP predefined by user: 192.168.201.1
2190 12:44:59.590456
2191 12:44:59.596790 Bootfile predefined by user: 12948317/tftp-deploy-yamreqmo/kernel/bzImage
2192 12:44:59.597363
2193 12:44:59.599674 Sending tftp read request... done.
2194 12:44:59.600149
2195 12:44:59.609354 Waiting for the transfer...
2196 12:44:59.609996
2197 12:45:00.313189 00000000 ################################################################
2198 12:45:00.313685
2199 12:45:01.047708 00080000 ################################################################
2200 12:45:01.048307
2201 12:45:01.789958 00100000 ################################################################
2202 12:45:01.790482
2203 12:45:02.539670 00180000 ################################################################
2204 12:45:02.540233
2205 12:45:03.266418 00200000 ################################################################
2206 12:45:03.266958
2207 12:45:04.001566 00280000 ################################################################
2208 12:45:04.002181
2209 12:45:04.735899 00300000 ################################################################
2210 12:45:04.736468
2211 12:45:05.484826 00380000 ################################################################
2212 12:45:05.485350
2213 12:45:06.234905 00400000 ################################################################
2214 12:45:06.235448
2215 12:45:06.972500 00480000 ################################################################
2216 12:45:06.973041
2217 12:45:07.676358 00500000 ################################################################
2218 12:45:07.676512
2219 12:45:08.336169 00580000 ################################################################
2220 12:45:08.336688
2221 12:45:09.086450 00600000 ################################################################
2222 12:45:09.087003
2223 12:45:09.822076 00680000 ################################################################
2224 12:45:09.822597
2225 12:45:10.569342 00700000 ################################################################
2226 12:45:10.569889
2227 12:45:11.304388 00780000 ################################################################
2228 12:45:11.304924
2229 12:45:12.067628 00800000 ################################################################
2230 12:45:12.068192
2231 12:45:12.709904 00880000 ######################################################## done.
2232 12:45:12.710445
2233 12:45:12.712761 The bootfile was 9367440 bytes long.
2234 12:45:12.713187
2235 12:45:12.716228 Sending tftp read request... done.
2236 12:45:12.716650
2237 12:45:12.719159 Waiting for the transfer...
2238 12:45:12.719591
2239 12:45:13.338893 00000000 ################################################################
2240 12:45:13.339211
2241 12:45:14.081630 00080000 ################################################################
2242 12:45:14.082169
2243 12:45:14.818034 00100000 ################################################################
2244 12:45:14.818580
2245 12:45:15.559286 00180000 ################################################################
2246 12:45:15.559823
2247 12:45:16.306539 00200000 ################################################################
2248 12:45:16.307096
2249 12:45:17.021841 00280000 ################################################################
2250 12:45:17.022382
2251 12:45:17.730965 00300000 ################################################################
2252 12:45:17.731488
2253 12:45:18.440742 00380000 ################################################################
2254 12:45:18.441290
2255 12:45:19.181244 00400000 ################################################################
2256 12:45:19.181791
2257 12:45:19.933797 00480000 ################################################################
2258 12:45:19.934388
2259 12:45:20.674704 00500000 ############################################################### done.
2260 12:45:20.675258
2261 12:45:20.677753 Sending tftp read request... done.
2262 12:45:20.678188
2263 12:45:20.681080 Waiting for the transfer...
2264 12:45:20.681516
2265 12:45:20.681967 00000000 # done.
2266 12:45:20.682397
2267 12:45:20.691525 Command line loaded dynamically from TFTP file: 12948317/tftp-deploy-yamreqmo/kernel/cmdline
2268 12:45:20.692121
2269 12:45:20.717297 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/12948317/extract-nfsrootfs-2nn0xctz,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2270 12:45:20.721591
2271 12:45:20.724623 Shutting down all USB controllers.
2272 12:45:20.725062
2273 12:45:20.725503 Removing current net device
2274 12:45:20.725920
2275 12:45:20.727972 Finalizing coreboot
2276 12:45:20.728460
2277 12:45:20.734249 Exiting depthcharge with code 4 at timestamp: 31192642
2278 12:45:20.734686
2279 12:45:20.735126
2280 12:45:20.735541 Starting kernel ...
2281 12:45:20.735950
2282 12:45:20.736392
2283 12:45:20.737653 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
2284 12:45:20.738189 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
2285 12:45:20.738607 Setting prompt string to ['Linux version [0-9]']
2286 12:45:20.739034 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2287 12:45:20.739582 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2289 12:49:42.738402 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
2291 12:49:42.738705 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
2293 12:49:42.738950 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2296 12:49:42.739368 end: 2 depthcharge-action (duration 00:05:00) [common]
2298 12:49:42.739613 Cleaning after the job
2299 12:49:42.739704 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12948317/tftp-deploy-yamreqmo/ramdisk
2300 12:49:42.740698 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12948317/tftp-deploy-yamreqmo/kernel
2301 12:49:42.742251 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12948317/tftp-deploy-yamreqmo/nfsrootfs
2302 12:49:42.823439 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12948317/tftp-deploy-yamreqmo/modules
2303 12:49:42.823875 start: 5.1 power-off (timeout 00:00:30) [common]
2304 12:49:42.824041 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=off'
2305 12:49:42.900936 >> Command sent successfully.
2306 12:49:42.903842 Returned 0 in 0 seconds
2307 12:49:43.004243 end: 5.1 power-off (duration 00:00:00) [common]
2309 12:49:43.004590 start: 5.2 read-feedback (timeout 00:10:00) [common]
2310 12:49:43.004867 Listened to connection for namespace 'common' for up to 1s
2311 12:49:44.005830 Finalising connection for namespace 'common'
2312 12:49:44.006001 Disconnecting from shell: Finalise
2313 12:49:44.006083
2314 12:49:44.106424 end: 5.2 read-feedback (duration 00:00:01) [common]
2315 12:49:44.106596 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12948317
2316 12:49:44.429981 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12948317
2317 12:49:44.430184 JobError: Your job cannot terminate cleanly.