Boot log: asus-cx9400-volteer
- Errors: 2
- Boot result: FAIL
- Kernel Warnings: 0
- Kernel Errors: 0
- Warnings: 0
1 20:06:11.827076 lava-dispatcher, installed at version: 2022.11
2 20:06:11.827261 start: 0 validate
3 20:06:11.827386 Start time: 2022-12-19 20:06:11.827380+00:00 (UTC)
4 20:06:11.827506 Using caching service: 'http://localhost/cache/?uri=%s'
5 20:06:11.827627 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20221216.0%2Fx86%2Frootfs.cpio.gz exists
6 20:06:12.118341 Using caching service: 'http://localhost/cache/?uri=%s'
7 20:06:12.118527 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-234-g4e6ec7162c8e%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 20:06:15.617631 Using caching service: 'http://localhost/cache/?uri=%s'
9 20:06:15.617838 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-234-g4e6ec7162c8e%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 20:06:15.620840 validate duration: 3.79
12 20:06:15.621226 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 20:06:15.621382 start: 1.1 download-retry (timeout 00:10:00) [common]
14 20:06:15.621533 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 20:06:15.621702 Not decompressing ramdisk as can be used compressed.
16 20:06:15.621836 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20221216.0/x86/rootfs.cpio.gz
17 20:06:15.621977 saving as /var/lib/lava/dispatcher/tmp/8411817/tftp-deploy-2ypstklr/ramdisk/rootfs.cpio.gz
18 20:06:15.622081 total size: 8415773 (8MB)
19 20:06:15.623499 progress 0% (0MB)
20 20:06:15.625682 progress 5% (0MB)
21 20:06:15.628989 progress 10% (0MB)
22 20:06:15.632921 progress 15% (1MB)
23 20:06:15.636288 progress 20% (1MB)
24 20:06:15.639761 progress 25% (2MB)
25 20:06:15.643233 progress 30% (2MB)
26 20:06:15.646536 progress 35% (2MB)
27 20:06:15.649994 progress 40% (3MB)
28 20:06:15.653433 progress 45% (3MB)
29 20:06:15.655904 progress 50% (4MB)
30 20:06:15.658173 progress 55% (4MB)
31 20:06:15.660335 progress 60% (4MB)
32 20:06:15.662333 progress 65% (5MB)
33 20:06:15.664440 progress 70% (5MB)
34 20:06:15.666579 progress 75% (6MB)
35 20:06:15.668908 progress 80% (6MB)
36 20:06:15.671056 progress 85% (6MB)
37 20:06:15.673169 progress 90% (7MB)
38 20:06:15.675151 progress 95% (7MB)
39 20:06:15.677278 progress 100% (8MB)
40 20:06:15.677562 8MB downloaded in 0.06s (144.67MB/s)
41 20:06:15.677722 end: 1.1.1 http-download (duration 00:00:00) [common]
43 20:06:15.677962 end: 1.1 download-retry (duration 00:00:00) [common]
44 20:06:15.678083 start: 1.2 download-retry (timeout 00:10:00) [common]
45 20:06:15.678171 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 20:06:15.678277 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-234-g4e6ec7162c8e/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 20:06:15.678346 saving as /var/lib/lava/dispatcher/tmp/8411817/tftp-deploy-2ypstklr/kernel/bzImage
48 20:06:15.678406 total size: 7573392 (7MB)
49 20:06:15.678482 No compression specified
50 20:06:15.679643 progress 0% (0MB)
51 20:06:15.681714 progress 5% (0MB)
52 20:06:15.683704 progress 10% (0MB)
53 20:06:15.685522 progress 15% (1MB)
54 20:06:15.687550 progress 20% (1MB)
55 20:06:15.689416 progress 25% (1MB)
56 20:06:15.691373 progress 30% (2MB)
57 20:06:15.693185 progress 35% (2MB)
58 20:06:15.695204 progress 40% (2MB)
59 20:06:15.697126 progress 45% (3MB)
60 20:06:15.698868 progress 50% (3MB)
61 20:06:15.700783 progress 55% (4MB)
62 20:06:15.702558 progress 60% (4MB)
63 20:06:15.704466 progress 65% (4MB)
64 20:06:15.706617 progress 70% (5MB)
65 20:06:15.709691 progress 75% (5MB)
66 20:06:15.712720 progress 80% (5MB)
67 20:06:15.716070 progress 85% (6MB)
68 20:06:15.719316 progress 90% (6MB)
69 20:06:15.722202 progress 95% (6MB)
70 20:06:15.725359 progress 100% (7MB)
71 20:06:15.725614 7MB downloaded in 0.05s (153.02MB/s)
72 20:06:15.725832 end: 1.2.1 http-download (duration 00:00:00) [common]
74 20:06:15.726208 end: 1.2 download-retry (duration 00:00:00) [common]
75 20:06:15.726340 start: 1.3 download-retry (timeout 00:10:00) [common]
76 20:06:15.726468 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 20:06:15.726615 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-234-g4e6ec7162c8e/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 20:06:15.726717 saving as /var/lib/lava/dispatcher/tmp/8411817/tftp-deploy-2ypstklr/modules/modules.tar
79 20:06:15.726813 total size: 51664 (0MB)
80 20:06:15.726911 Using unxz to decompress xz
81 20:06:15.730523 progress 63% (0MB)
82 20:06:15.730995 progress 100% (0MB)
83 20:06:15.734394 0MB downloaded in 0.01s (6.51MB/s)
84 20:06:15.734696 end: 1.3.1 http-download (duration 00:00:00) [common]
86 20:06:15.735023 end: 1.3 download-retry (duration 00:00:00) [common]
87 20:06:15.735124 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
88 20:06:15.735224 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
89 20:06:15.735311 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 20:06:15.735404 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
91 20:06:15.735590 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8411817/lava-overlay-z7m8__an
92 20:06:15.735701 makedir: /var/lib/lava/dispatcher/tmp/8411817/lava-overlay-z7m8__an/lava-8411817/bin
93 20:06:15.735789 makedir: /var/lib/lava/dispatcher/tmp/8411817/lava-overlay-z7m8__an/lava-8411817/tests
94 20:06:15.735871 makedir: /var/lib/lava/dispatcher/tmp/8411817/lava-overlay-z7m8__an/lava-8411817/results
95 20:06:15.735982 Creating /var/lib/lava/dispatcher/tmp/8411817/lava-overlay-z7m8__an/lava-8411817/bin/lava-add-keys
96 20:06:15.736135 Creating /var/lib/lava/dispatcher/tmp/8411817/lava-overlay-z7m8__an/lava-8411817/bin/lava-add-sources
97 20:06:15.736255 Creating /var/lib/lava/dispatcher/tmp/8411817/lava-overlay-z7m8__an/lava-8411817/bin/lava-background-process-start
98 20:06:15.736370 Creating /var/lib/lava/dispatcher/tmp/8411817/lava-overlay-z7m8__an/lava-8411817/bin/lava-background-process-stop
99 20:06:15.736484 Creating /var/lib/lava/dispatcher/tmp/8411817/lava-overlay-z7m8__an/lava-8411817/bin/lava-common-functions
100 20:06:15.736596 Creating /var/lib/lava/dispatcher/tmp/8411817/lava-overlay-z7m8__an/lava-8411817/bin/lava-echo-ipv4
101 20:06:15.736709 Creating /var/lib/lava/dispatcher/tmp/8411817/lava-overlay-z7m8__an/lava-8411817/bin/lava-install-packages
102 20:06:15.736835 Creating /var/lib/lava/dispatcher/tmp/8411817/lava-overlay-z7m8__an/lava-8411817/bin/lava-installed-packages
103 20:06:15.736951 Creating /var/lib/lava/dispatcher/tmp/8411817/lava-overlay-z7m8__an/lava-8411817/bin/lava-os-build
104 20:06:15.737104 Creating /var/lib/lava/dispatcher/tmp/8411817/lava-overlay-z7m8__an/lava-8411817/bin/lava-probe-channel
105 20:06:15.737226 Creating /var/lib/lava/dispatcher/tmp/8411817/lava-overlay-z7m8__an/lava-8411817/bin/lava-probe-ip
106 20:06:15.737355 Creating /var/lib/lava/dispatcher/tmp/8411817/lava-overlay-z7m8__an/lava-8411817/bin/lava-target-ip
107 20:06:15.737472 Creating /var/lib/lava/dispatcher/tmp/8411817/lava-overlay-z7m8__an/lava-8411817/bin/lava-target-mac
108 20:06:15.737584 Creating /var/lib/lava/dispatcher/tmp/8411817/lava-overlay-z7m8__an/lava-8411817/bin/lava-target-storage
109 20:06:15.737700 Creating /var/lib/lava/dispatcher/tmp/8411817/lava-overlay-z7m8__an/lava-8411817/bin/lava-test-case
110 20:06:15.737811 Creating /var/lib/lava/dispatcher/tmp/8411817/lava-overlay-z7m8__an/lava-8411817/bin/lava-test-event
111 20:06:15.737923 Creating /var/lib/lava/dispatcher/tmp/8411817/lava-overlay-z7m8__an/lava-8411817/bin/lava-test-feedback
112 20:06:15.738035 Creating /var/lib/lava/dispatcher/tmp/8411817/lava-overlay-z7m8__an/lava-8411817/bin/lava-test-raise
113 20:06:15.738151 Creating /var/lib/lava/dispatcher/tmp/8411817/lava-overlay-z7m8__an/lava-8411817/bin/lava-test-reference
114 20:06:15.738261 Creating /var/lib/lava/dispatcher/tmp/8411817/lava-overlay-z7m8__an/lava-8411817/bin/lava-test-runner
115 20:06:15.738368 Creating /var/lib/lava/dispatcher/tmp/8411817/lava-overlay-z7m8__an/lava-8411817/bin/lava-test-set
116 20:06:15.738476 Creating /var/lib/lava/dispatcher/tmp/8411817/lava-overlay-z7m8__an/lava-8411817/bin/lava-test-shell
117 20:06:15.738592 Updating /var/lib/lava/dispatcher/tmp/8411817/lava-overlay-z7m8__an/lava-8411817/bin/lava-install-packages (oe)
118 20:06:15.738726 Updating /var/lib/lava/dispatcher/tmp/8411817/lava-overlay-z7m8__an/lava-8411817/bin/lava-installed-packages (oe)
119 20:06:15.738829 Creating /var/lib/lava/dispatcher/tmp/8411817/lava-overlay-z7m8__an/lava-8411817/environment
120 20:06:15.738923 LAVA metadata
121 20:06:15.738997 - LAVA_JOB_ID=8411817
122 20:06:15.739069 - LAVA_DISPATCHER_IP=192.168.201.1
123 20:06:15.739238 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
124 20:06:15.739312 skipped lava-vland-overlay
125 20:06:15.739396 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 20:06:15.739497 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
127 20:06:15.739569 skipped lava-multinode-overlay
128 20:06:15.739650 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 20:06:15.739738 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
130 20:06:15.739821 Loading test definitions
131 20:06:15.739925 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
132 20:06:15.740021 Using /lava-8411817 at stage 0
133 20:06:15.740301 uuid=8411817_1.4.2.3.1 testdef=None
134 20:06:15.740394 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 20:06:15.740486 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
136 20:06:15.741002 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 20:06:15.741239 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
139 20:06:15.741886 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 20:06:15.742134 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
142 20:06:15.742689 runner path: /var/lib/lava/dispatcher/tmp/8411817/lava-overlay-z7m8__an/lava-8411817/0/tests/0_dmesg test_uuid 8411817_1.4.2.3.1
143 20:06:15.742840 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 20:06:15.743102 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
146 20:06:15.743177 Using /lava-8411817 at stage 1
147 20:06:15.743455 uuid=8411817_1.4.2.3.5 testdef=None
148 20:06:15.743580 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 20:06:15.743710 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
150 20:06:15.744349 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 20:06:15.744717 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
153 20:06:15.745726 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 20:06:15.746198 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
156 20:06:15.746924 runner path: /var/lib/lava/dispatcher/tmp/8411817/lava-overlay-z7m8__an/lava-8411817/1/tests/1_bootrr test_uuid 8411817_1.4.2.3.5
157 20:06:15.747076 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 20:06:15.747294 Creating lava-test-runner.conf files
160 20:06:15.747361 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8411817/lava-overlay-z7m8__an/lava-8411817/0 for stage 0
161 20:06:15.747445 - 0_dmesg
162 20:06:15.747525 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8411817/lava-overlay-z7m8__an/lava-8411817/1 for stage 1
163 20:06:15.747609 - 1_bootrr
164 20:06:15.747702 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 20:06:15.747796 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
166 20:06:15.754393 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 20:06:15.754552 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
168 20:06:15.754650 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 20:06:15.754742 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 20:06:15.754835 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
171 20:06:15.944489 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 20:06:15.944891 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
173 20:06:15.945038 extracting modules file /var/lib/lava/dispatcher/tmp/8411817/tftp-deploy-2ypstklr/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8411817/extract-overlay-ramdisk-u1z3ms9e/ramdisk
174 20:06:15.950828 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 20:06:15.951029 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
176 20:06:15.951155 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8411817/compress-overlay-2sdwbois/overlay-1.4.2.4.tar.gz to ramdisk
177 20:06:15.951269 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8411817/compress-overlay-2sdwbois/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8411817/extract-overlay-ramdisk-u1z3ms9e/ramdisk
178 20:06:15.957073 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 20:06:15.957258 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
180 20:06:15.957398 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 20:06:15.957535 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
182 20:06:15.957660 Building ramdisk /var/lib/lava/dispatcher/tmp/8411817/extract-overlay-ramdisk-u1z3ms9e/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8411817/extract-overlay-ramdisk-u1z3ms9e/ramdisk
183 20:06:16.041883 >> 48006 blocks
184 20:06:17.009359 rename /var/lib/lava/dispatcher/tmp/8411817/extract-overlay-ramdisk-u1z3ms9e/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8411817/tftp-deploy-2ypstklr/ramdisk/ramdisk.cpio.gz
185 20:06:17.009756 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 20:06:17.009886 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
187 20:06:17.009989 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
188 20:06:17.010082 No mkimage arch provided, not using FIT.
189 20:06:17.010178 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 20:06:17.010267 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 20:06:17.010365 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 20:06:17.010456 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
193 20:06:17.010534 No LXC device requested
194 20:06:17.010613 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 20:06:17.010743 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
196 20:06:17.010858 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 20:06:17.010938 Checking files for TFTP limit of 4294967296 bytes.
198 20:06:17.011326 end: 1 tftp-deploy (duration 00:00:01) [common]
199 20:06:17.011437 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 20:06:17.011533 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 20:06:17.011659 substitutions:
202 20:06:17.011727 - {DTB}: None
203 20:06:17.011790 - {INITRD}: 8411817/tftp-deploy-2ypstklr/ramdisk/ramdisk.cpio.gz
204 20:06:17.011850 - {KERNEL}: 8411817/tftp-deploy-2ypstklr/kernel/bzImage
205 20:06:17.011909 - {LAVA_MAC}: None
206 20:06:17.011966 - {PRESEED_CONFIG}: None
207 20:06:17.012027 - {PRESEED_LOCAL}: None
208 20:06:17.012083 - {RAMDISK}: 8411817/tftp-deploy-2ypstklr/ramdisk/ramdisk.cpio.gz
209 20:06:17.012139 - {ROOT_PART}: None
210 20:06:17.012194 - {ROOT}: None
211 20:06:17.012249 - {SERVER_IP}: 192.168.201.1
212 20:06:17.012303 - {TEE}: None
213 20:06:17.012358 Parsed boot commands:
214 20:06:17.012412 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 20:06:17.012596 Parsed boot commands: tftpboot 192.168.201.1 8411817/tftp-deploy-2ypstklr/kernel/bzImage 8411817/tftp-deploy-2ypstklr/kernel/cmdline 8411817/tftp-deploy-2ypstklr/ramdisk/ramdisk.cpio.gz
216 20:06:17.012720 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 20:06:17.012827 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 20:06:17.012922 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 20:06:17.013014 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 20:06:17.013084 Not connected, no need to disconnect.
221 20:06:17.013162 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 20:06:17.013245 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 20:06:17.013313 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-14'
224 20:06:17.015973 Setting prompt string to ['lava-test: # ']
225 20:06:17.016310 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 20:06:17.016446 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 20:06:17.016546 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 20:06:17.016637 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 20:06:17.016826 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-14' '--port=1' '--command=reboot'
230 20:06:17.036671 >> Command sent successfully.
231 20:06:17.038705 Returned 0 in 0 seconds
232 20:06:17.139514 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 20:06:17.139961 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 20:06:17.140109 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 20:06:17.140231 Setting prompt string to 'Starting depthcharge on Voema...'
237 20:06:17.140330 Changing prompt to 'Starting depthcharge on Voema...'
238 20:06:17.140432 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
239 20:06:17.140814 [Enter `^Ec?' for help]
240 20:06:25.632421
241 20:06:25.632577
242 20:06:25.641976 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
243 20:06:25.645740 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
244 20:06:25.652459 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
245 20:06:25.656487 CPU: AES supported, TXT NOT supported, VT supported
246 20:06:25.663603 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
247 20:06:25.666904 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
248 20:06:25.673347 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
249 20:06:25.676538 VBOOT: Loading verstage.
250 20:06:25.679788 FMAP: Found "FLASH" version 1.1 at 0x1804000.
251 20:06:25.686430 FMAP: base = 0x0 size = 0x2000000 #areas = 32
252 20:06:25.689611 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
253 20:06:25.696258 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
254 20:06:25.699595
255 20:06:25.706275 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
256 20:06:25.706367
257 20:06:25.706435
258 20:06:25.716844 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
259 20:06:25.732722 Probing TPM: . done!
260 20:06:25.736452 TPM ready after 0 ms
261 20:06:25.739822 Connected to device vid:did:rid of 1ae0:0028:00
262 20:06:25.750864 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
263 20:06:25.757814 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
264 20:06:25.761105 Initialized TPM device CR50 revision 0
265 20:06:25.817852 tlcl_send_startup: Startup return code is 0
266 20:06:25.818005 TPM: setup succeeded
267 20:06:25.831932 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
268 20:06:25.845996 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
269 20:06:25.859368 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
270 20:06:25.869914 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
271 20:06:25.873781 Chrome EC: UHEPI supported
272 20:06:25.877286 Phase 1
273 20:06:25.880461 FMAP: area GBB found @ 1805000 (458752 bytes)
274 20:06:25.886930 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
275 20:06:25.890247
276 20:06:25.896751 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
277 20:06:25.903445 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
278 20:06:25.909942 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
279 20:06:25.913384 Recovery requested (1009000e)
280 20:06:25.916701 TPM: Extending digest for VBOOT: boot mode into PCR 0
281 20:06:25.928626 tlcl_extend: response is 0
282 20:06:25.935300 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
283 20:06:25.945064 tlcl_extend: response is 0
284 20:06:25.951536 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
285 20:06:25.958101 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
286 20:06:25.964653 BS: verstage times (exec / console): total (unknown) / 142 ms
287 20:06:25.964819
288 20:06:25.964912
289 20:06:25.978298 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
290 20:06:25.984788 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
291 20:06:25.987924 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
292 20:06:25.991389 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
293 20:06:25.997848 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
294 20:06:26.001156 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
295 20:06:26.004385 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
296 20:06:26.007672 TCO_STS: 0000 0000
297 20:06:26.011061 GEN_PMCON: d0015038 00002200
298 20:06:26.014462 GBLRST_CAUSE: 00000000 00000000
299 20:06:26.017635 HPR_CAUSE0: 00000000
300 20:06:26.017726 prev_sleep_state 5
301 20:06:26.021099 Boot Count incremented to 916
302 20:06:26.027665 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
303 20:06:26.034389 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
304 20:06:26.040750 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
305 20:06:26.044246
306 20:06:26.050790 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
307 20:06:26.054059 Chrome EC: UHEPI supported
308 20:06:26.060475 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
309 20:06:26.071696 Probing TPM: done!
310 20:06:26.078151 Connected to device vid:did:rid of 1ae0:0028:00
311 20:06:26.088457 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
312 20:06:26.092392 Initialized TPM device CR50 revision 0
313 20:06:26.105700 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
314 20:06:26.112373 MRC: Hash idx 0x100b comparison successful.
315 20:06:26.115654 MRC cache found, size faa8
316 20:06:26.115762 bootmode is set to: 2
317 20:06:26.118357 SPD index = 2
318 20:06:26.124940 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
319 20:06:26.128280 SPD: module type is LPDDR4X
320 20:06:26.131803 SPD: module part number is MT53D1G64D4NW-046
321 20:06:26.138257 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
322 20:06:26.145541 SPD: device width 16 bits, bus width 16 bits
323 20:06:26.149307 SPD: module size is 2048 MB (per channel)
324 20:06:26.579037 CBMEM:
325 20:06:26.582168 IMD: root @ 0x76fff000 254 entries.
326 20:06:26.585704 IMD: root @ 0x76ffec00 62 entries.
327 20:06:26.588634 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
328 20:06:26.595436 FMAP: area RW_VPD found @ f35000 (8192 bytes)
329 20:06:26.598657 External stage cache:
330 20:06:26.601769 IMD: root @ 0x7b3ff000 254 entries.
331 20:06:26.605041 IMD: root @ 0x7b3fec00 62 entries.
332 20:06:26.620127 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
333 20:06:26.626674 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
334 20:06:26.633338 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
335 20:06:26.647383 MRC: 'RECOVERY_MRC_CACHE' does not need update.
336 20:06:26.653199 cse_lite: Skip switching to RW in the recovery path
337 20:06:26.653299 8 DIMMs found
338 20:06:26.653369 SMM Memory Map
339 20:06:26.656637
340 20:06:26.660354 SMRAM : 0x7b000000 0x800000
341 20:06:26.663076 Subregion 0: 0x7b000000 0x200000
342 20:06:26.666325 Subregion 1: 0x7b200000 0x200000
343 20:06:26.670290 Subregion 2: 0x7b400000 0x400000
344 20:06:26.670432 top_of_ram = 0x77000000
345 20:06:26.676641 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
346 20:06:26.683112 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
347 20:06:26.686888 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
348 20:06:26.693372 MTRR Range: Start=ff000000 End=0 (Size 1000000)
349 20:06:26.699887 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
350 20:06:26.706293 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
351 20:06:26.716864 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
352 20:06:26.720375 Processing 211 relocs. Offset value of 0x74c0b000
353 20:06:26.723651
354 20:06:26.730310 BS: romstage times (exec / console): total (unknown) / 276 ms
355 20:06:26.735623
356 20:06:26.735713
357 20:06:26.745789 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
358 20:06:26.749110 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
359 20:06:26.758423 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
360 20:06:26.765574 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
361 20:06:26.771868 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
362 20:06:26.778533 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
363 20:06:26.822578 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
364 20:06:26.829229 Processing 5008 relocs. Offset value of 0x75d98000
365 20:06:26.832603 BS: postcar times (exec / console): total (unknown) / 59 ms
366 20:06:26.832754
367 20:06:26.835209
368 20:06:26.835332
369 20:06:26.846074 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
370 20:06:26.846240 Normal boot
371 20:06:26.849321 FW_CONFIG value is 0x804c02
372 20:06:26.852555 PCI: 00:07.0 disabled by fw_config
373 20:06:26.855486 PCI: 00:07.1 disabled by fw_config
374 20:06:26.859188 PCI: 00:0d.2 disabled by fw_config
375 20:06:26.862371 PCI: 00:1c.7 disabled by fw_config
376 20:06:26.865456
377 20:06:26.868852 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
378 20:06:26.875232 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
379 20:06:26.878481 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
380 20:06:26.881928 GENERIC: 0.0 disabled by fw_config
381 20:06:26.885059
382 20:06:26.889031 GENERIC: 1.0 disabled by fw_config
383 20:06:26.892241 fw_config match found: DB_USB=USB3_ACTIVE
384 20:06:26.895307 fw_config match found: DB_USB=USB3_ACTIVE
385 20:06:26.898705 fw_config match found: DB_USB=USB3_ACTIVE
386 20:06:26.904974 fw_config match found: DB_USB=USB3_ACTIVE
387 20:06:26.908830 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
388 20:06:26.915434 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
389 20:06:26.925583 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
390 20:06:26.931648 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
391 20:06:26.935401 microcode: sig=0x806c1 pf=0x80 revision=0x86
392 20:06:26.941734 microcode: Update skipped, already up-to-date
393 20:06:26.948501 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
394 20:06:26.976009 Detected 4 core, 8 thread CPU.
395 20:06:26.979246 Setting up SMI for CPU
396 20:06:26.982387 IED base = 0x7b400000
397 20:06:26.982633 IED size = 0x00400000
398 20:06:26.985857 Will perform SMM setup.
399 20:06:26.992340 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
400 20:06:26.999436 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
401 20:06:27.005789 Processing 16 relocs. Offset value of 0x00030000
402 20:06:27.009670 Attempting to start 7 APs
403 20:06:27.012724 Waiting for 10ms after sending INIT.
404 20:06:27.028204 Waiting for 1st SIPI to complete...done.
405 20:06:27.028698 AP: slot 5 apic_id 6.
406 20:06:27.031543 AP: slot 2 apic_id 7.
407 20:06:27.034914 AP: slot 6 apic_id 2.
408 20:06:27.035415 AP: slot 3 apic_id 3.
409 20:06:27.037861 AP: slot 7 apic_id 5.
410 20:06:27.041312 AP: slot 4 apic_id 4.
411 20:06:27.044828 Waiting for 2nd SIPI to complete...done.
412 20:06:27.048247 AP: slot 1 apic_id 1.
413 20:06:27.054819 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
414 20:06:27.061423 Processing 13 relocs. Offset value of 0x00038000
415 20:06:27.064840 Unable to locate Global NVS
416 20:06:27.071227 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
417 20:06:27.074266 Installing permanent SMM handler to 0x7b000000
418 20:06:27.084466 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
419 20:06:27.087927 Processing 794 relocs. Offset value of 0x7b010000
420 20:06:27.097604 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
421 20:06:27.100850 Processing 13 relocs. Offset value of 0x7b008000
422 20:06:27.107776 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
423 20:06:27.114081 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
424 20:06:27.117574 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
425 20:06:27.124896 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
426 20:06:27.131220 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
427 20:06:27.137565 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
428 20:06:27.144288 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
429 20:06:27.144695 Unable to locate Global NVS
430 20:06:27.154535 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
431 20:06:27.157760 Clearing SMI status registers
432 20:06:27.158296 SMI_STS: PM1
433 20:06:27.160560 PM1_STS: PWRBTN
434 20:06:27.167270 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
435 20:06:27.170759 In relocation handler: CPU 0
436 20:06:27.174024 New SMBASE=0x7b000000 IEDBASE=0x7b400000
437 20:06:27.180519 Writing SMRR. base = 0x7b000006, mask=0xff800c00
438 20:06:27.181090 Relocation complete.
439 20:06:27.190507 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
440 20:06:27.191055 In relocation handler: CPU 1
441 20:06:27.193531
442 20:06:27.196872 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
443 20:06:27.197307 Relocation complete.
444 20:06:27.207115 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
445 20:06:27.207569 In relocation handler: CPU 7
446 20:06:27.210400
447 20:06:27.213421 New SMBASE=0x7affe400 IEDBASE=0x7b400000
448 20:06:27.213826 Relocation complete.
449 20:06:27.223553 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
450 20:06:27.224097 In relocation handler: CPU 4
451 20:06:27.230270 New SMBASE=0x7afff000 IEDBASE=0x7b400000
452 20:06:27.233646 Writing SMRR. base = 0x7b000006, mask=0xff800c00
453 20:06:27.236839 Relocation complete.
454 20:06:27.243812 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
455 20:06:27.246457 In relocation handler: CPU 5
456 20:06:27.249971 New SMBASE=0x7affec00 IEDBASE=0x7b400000
457 20:06:27.256532 Writing SMRR. base = 0x7b000006, mask=0xff800c00
458 20:06:27.257387 Relocation complete.
459 20:06:27.262796 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
460 20:06:27.266149
461 20:06:27.266591 In relocation handler: CPU 2
462 20:06:27.273315 New SMBASE=0x7afff800 IEDBASE=0x7b400000
463 20:06:27.273910 Relocation complete.
464 20:06:27.279815 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
465 20:06:27.283109 In relocation handler: CPU 3
466 20:06:27.289612 New SMBASE=0x7afff400 IEDBASE=0x7b400000
467 20:06:27.290050 Relocation complete.
468 20:06:27.295945 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
469 20:06:27.299571 In relocation handler: CPU 6
470 20:06:27.305947 New SMBASE=0x7affe800 IEDBASE=0x7b400000
471 20:06:27.309553 Writing SMRR. base = 0x7b000006, mask=0xff800c00
472 20:06:27.312836 Relocation complete.
473 20:06:27.313274 Initializing CPU #0
474 20:06:27.316171 CPU: vendor Intel device 806c1
475 20:06:27.319623 CPU: family 06, model 8c, stepping 01
476 20:06:27.322934
477 20:06:27.323469 Clearing out pending MCEs
478 20:06:27.326096 Setting up local APIC...
479 20:06:27.329409 apic_id: 0x00 done.
480 20:06:27.332626 Turbo is available but hidden
481 20:06:27.336267 Turbo is available and visible
482 20:06:27.339191 microcode: Update skipped, already up-to-date
483 20:06:27.342571 CPU #0 initialized
484 20:06:27.343009 Initializing CPU #4
485 20:06:27.345959 Initializing CPU #7
486 20:06:27.348653 CPU: vendor Intel device 806c1
487 20:06:27.352259 CPU: family 06, model 8c, stepping 01
488 20:06:27.355240 Initializing CPU #5
489 20:06:27.355667 Initializing CPU #2
490 20:06:27.358713 CPU: vendor Intel device 806c1
491 20:06:27.361938 CPU: family 06, model 8c, stepping 01
492 20:06:27.365142 Clearing out pending MCEs
493 20:06:27.368492 CPU: vendor Intel device 806c1
494 20:06:27.372418 CPU: family 06, model 8c, stepping 01
495 20:06:27.375521 Setting up local APIC...
496 20:06:27.378592 Initializing CPU #1
497 20:06:27.379050 Initializing CPU #6
498 20:06:27.381791 Initializing CPU #3
499 20:06:27.385111 CPU: vendor Intel device 806c1
500 20:06:27.388941 CPU: family 06, model 8c, stepping 01
501 20:06:27.393173 Clearing out pending MCEs
502 20:06:27.393355 CPU: vendor Intel device 806c1
503 20:06:27.396280 CPU: family 06, model 8c, stepping 01
504 20:06:27.399529 Clearing out pending MCEs
505 20:06:27.403449 CPU: vendor Intel device 806c1
506 20:06:27.406757 CPU: family 06, model 8c, stepping 01
507 20:06:27.409872 Setting up local APIC...
508 20:06:27.413214 Clearing out pending MCEs
509 20:06:27.416520 CPU: vendor Intel device 806c1
510 20:06:27.419625 CPU: family 06, model 8c, stepping 01
511 20:06:27.422738 Setting up local APIC...
512 20:06:27.426233 Clearing out pending MCEs
513 20:06:27.426389 apic_id: 0x04 done.
514 20:06:27.429468 apic_id: 0x06 done.
515 20:06:27.432840 Clearing out pending MCEs
516 20:06:27.436756 microcode: Update skipped, already up-to-date
517 20:06:27.440003 microcode: Update skipped, already up-to-date
518 20:06:27.442694 Setting up local APIC...
519 20:06:27.446065 apic_id: 0x01 done.
520 20:06:27.449303 Setting up local APIC...
521 20:06:27.452665 microcode: Update skipped, already up-to-date
522 20:06:27.455917 apic_id: 0x05 done.
523 20:06:27.456107 CPU #4 initialized
524 20:06:27.462642 microcode: Update skipped, already up-to-date
525 20:06:27.462728 Clearing out pending MCEs
526 20:06:27.466237 apic_id: 0x02 done.
527 20:06:27.469030 Setting up local APIC...
528 20:06:27.469119 CPU #7 initialized
529 20:06:27.473022 CPU #5 initialized
530 20:06:27.476168 Setting up local APIC...
531 20:06:27.476242 apic_id: 0x03 done.
532 20:06:27.479585 CPU #1 initialized
533 20:06:27.482862 apic_id: 0x07 done.
534 20:06:27.486206 microcode: Update skipped, already up-to-date
535 20:06:27.489439 microcode: Update skipped, already up-to-date
536 20:06:27.492599 CPU #3 initialized
537 20:06:27.496142 microcode: Update skipped, already up-to-date
538 20:06:27.499043 CPU #6 initialized
539 20:06:27.502264 CPU #2 initialized
540 20:06:27.505471 bsp_do_flight_plan done after 456 msecs.
541 20:06:27.508683 CPU: frequency set to 4400 MHz
542 20:06:27.508806 Enabling SMIs.
543 20:06:27.516078 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 346 / 317 ms
544 20:06:27.532232 SATAXPCIE1 indicates PCIe NVMe is present
545 20:06:27.535588 Probing TPM: done!
546 20:06:27.539093 Connected to device vid:did:rid of 1ae0:0028:00
547 20:06:27.549825 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
548 20:06:27.553088 Initialized TPM device CR50 revision 0
549 20:06:27.556698 Enabling S0i3.4
550 20:06:27.563169 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
551 20:06:27.566377 Found a VBT of 8704 bytes after decompression
552 20:06:27.572897 cse_lite: CSE RO boot. HybridStorageMode disabled
553 20:06:27.579458 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
554 20:06:27.654717 FSPS returned 0
555 20:06:27.657827 Executing Phase 1 of FspMultiPhaseSiInit
556 20:06:27.667558 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
557 20:06:27.670843 port C0 DISC req: usage 1 usb3 1 usb2 5
558 20:06:27.674286 Raw Buffer output 0 00000511
559 20:06:27.677320 Raw Buffer output 1 00000000
560 20:06:27.681342 pmc_send_ipc_cmd succeeded
561 20:06:27.688145 port C1 DISC req: usage 1 usb3 2 usb2 3
562 20:06:27.688326 Raw Buffer output 0 00000321
563 20:06:27.691244 Raw Buffer output 1 00000000
564 20:06:27.695047 pmc_send_ipc_cmd succeeded
565 20:06:27.700337 Detected 4 core, 8 thread CPU.
566 20:06:27.703632 Detected 4 core, 8 thread CPU.
567 20:06:27.904141 Display FSP Version Info HOB
568 20:06:27.907292 Reference Code - CPU = a.0.4c.31
569 20:06:27.910320 uCode Version = 0.0.0.86
570 20:06:27.913873 TXT ACM version = ff.ff.ff.ffff
571 20:06:27.917060 Reference Code - ME = a.0.4c.31
572 20:06:27.920269 MEBx version = 0.0.0.0
573 20:06:27.923758 ME Firmware Version = Consumer SKU
574 20:06:27.926795 Reference Code - PCH = a.0.4c.31
575 20:06:27.930303 PCH-CRID Status = Disabled
576 20:06:27.933864 PCH-CRID Original Value = ff.ff.ff.ffff
577 20:06:27.937029 PCH-CRID New Value = ff.ff.ff.ffff
578 20:06:27.940111 OPROM - RST - RAID = ff.ff.ff.ffff
579 20:06:27.943348 PCH Hsio Version = 4.0.0.0
580 20:06:27.946676 Reference Code - SA - System Agent = a.0.4c.31
581 20:06:27.950197 Reference Code - MRC = 2.0.0.1
582 20:06:27.953470 SA - PCIe Version = a.0.4c.31
583 20:06:27.957234 SA-CRID Status = Disabled
584 20:06:27.960675 SA-CRID Original Value = 0.0.0.1
585 20:06:27.963911 SA-CRID New Value = 0.0.0.1
586 20:06:27.967254 OPROM - VBIOS = ff.ff.ff.ffff
587 20:06:27.971293 IO Manageability Engine FW Version = 11.1.4.0
588 20:06:27.974747 PHY Build Version = 0.0.0.e0
589 20:06:27.978264 Thunderbolt(TM) FW Version = 0.0.0.0
590 20:06:27.981790 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
591 20:06:27.985313 ITSS IRQ Polarities Before:
592 20:06:27.988503 IPC0: 0xffffffff
593 20:06:27.988632 IPC1: 0xffffffff
594 20:06:27.991793 IPC2: 0xffffffff
595 20:06:27.991909 IPC3: 0xffffffff
596 20:06:27.994800 ITSS IRQ Polarities After:
597 20:06:27.998084 IPC0: 0xffffffff
598 20:06:27.998210 IPC1: 0xffffffff
599 20:06:28.001107 IPC2: 0xffffffff
600 20:06:28.001282 IPC3: 0xffffffff
601 20:06:28.007750 Found PCIe Root Port #9 at PCI: 00:1d.0.
602 20:06:28.018345 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
603 20:06:28.031417 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
604 20:06:28.044638 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
605 20:06:28.047897 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
606 20:06:28.051167
607 20:06:28.051604 Enumerating buses...
608 20:06:28.054386 Show all devs... Before device enumeration.
609 20:06:28.057783
610 20:06:28.058162 Root Device: enabled 1
611 20:06:28.061567 DOMAIN: 0000: enabled 1
612 20:06:28.064801 CPU_CLUSTER: 0: enabled 1
613 20:06:28.065283 PCI: 00:00.0: enabled 1
614 20:06:28.067930 PCI: 00:02.0: enabled 1
615 20:06:28.071338 PCI: 00:04.0: enabled 1
616 20:06:28.074578 PCI: 00:05.0: enabled 1
617 20:06:28.075011 PCI: 00:06.0: enabled 0
618 20:06:28.077965 PCI: 00:07.0: enabled 0
619 20:06:28.081075 PCI: 00:07.1: enabled 0
620 20:06:28.084445 PCI: 00:07.2: enabled 0
621 20:06:28.085036 PCI: 00:07.3: enabled 0
622 20:06:28.087665 PCI: 00:08.0: enabled 1
623 20:06:28.090903 PCI: 00:09.0: enabled 0
624 20:06:28.094480 PCI: 00:0a.0: enabled 0
625 20:06:28.094939 PCI: 00:0d.0: enabled 1
626 20:06:28.097606 PCI: 00:0d.1: enabled 0
627 20:06:28.100841 PCI: 00:0d.2: enabled 0
628 20:06:28.101274 PCI: 00:0d.3: enabled 0
629 20:06:28.104658
630 20:06:28.105175 PCI: 00:0e.0: enabled 0
631 20:06:28.107995 PCI: 00:10.2: enabled 1
632 20:06:28.111134 PCI: 00:10.6: enabled 0
633 20:06:28.111658 PCI: 00:10.7: enabled 0
634 20:06:28.114404 PCI: 00:12.0: enabled 0
635 20:06:28.117601 PCI: 00:12.6: enabled 0
636 20:06:28.120691 PCI: 00:13.0: enabled 0
637 20:06:28.121032 PCI: 00:14.0: enabled 1
638 20:06:28.124063 PCI: 00:14.1: enabled 0
639 20:06:28.127267 PCI: 00:14.2: enabled 1
640 20:06:28.131063 PCI: 00:14.3: enabled 1
641 20:06:28.131368 PCI: 00:15.0: enabled 1
642 20:06:28.134291 PCI: 00:15.1: enabled 1
643 20:06:28.137544 PCI: 00:15.2: enabled 1
644 20:06:28.140772 PCI: 00:15.3: enabled 1
645 20:06:28.141079 PCI: 00:16.0: enabled 1
646 20:06:28.144026 PCI: 00:16.1: enabled 0
647 20:06:28.147248 PCI: 00:16.2: enabled 0
648 20:06:28.147553 PCI: 00:16.3: enabled 0
649 20:06:28.150542 PCI: 00:16.4: enabled 0
650 20:06:28.154116 PCI: 00:16.5: enabled 0
651 20:06:28.157373 PCI: 00:17.0: enabled 1
652 20:06:28.157679 PCI: 00:19.0: enabled 0
653 20:06:28.160758 PCI: 00:19.1: enabled 1
654 20:06:28.163997 PCI: 00:19.2: enabled 0
655 20:06:28.167408 PCI: 00:1c.0: enabled 1
656 20:06:28.167786 PCI: 00:1c.1: enabled 0
657 20:06:28.170795 PCI: 00:1c.2: enabled 0
658 20:06:28.174148 PCI: 00:1c.3: enabled 0
659 20:06:28.177457 PCI: 00:1c.4: enabled 0
660 20:06:28.177825 PCI: 00:1c.5: enabled 0
661 20:06:28.180702 PCI: 00:1c.6: enabled 1
662 20:06:28.183987 PCI: 00:1c.7: enabled 0
663 20:06:28.184303 PCI: 00:1d.0: enabled 1
664 20:06:28.187244
665 20:06:28.187572 PCI: 00:1d.1: enabled 0
666 20:06:28.190568 PCI: 00:1d.2: enabled 1
667 20:06:28.193996 PCI: 00:1d.3: enabled 0
668 20:06:28.194307 PCI: 00:1e.0: enabled 1
669 20:06:28.197041 PCI: 00:1e.1: enabled 0
670 20:06:28.200252 PCI: 00:1e.2: enabled 1
671 20:06:28.203651 PCI: 00:1e.3: enabled 1
672 20:06:28.203957 PCI: 00:1f.0: enabled 1
673 20:06:28.206762 PCI: 00:1f.1: enabled 0
674 20:06:28.210758 PCI: 00:1f.2: enabled 1
675 20:06:28.213334 PCI: 00:1f.3: enabled 1
676 20:06:28.213567 PCI: 00:1f.4: enabled 0
677 20:06:28.216658 PCI: 00:1f.5: enabled 1
678 20:06:28.220046 PCI: 00:1f.6: enabled 0
679 20:06:28.223873 PCI: 00:1f.7: enabled 0
680 20:06:28.224105 APIC: 00: enabled 1
681 20:06:28.227116 GENERIC: 0.0: enabled 1
682 20:06:28.230622 GENERIC: 0.0: enabled 1
683 20:06:28.230852 GENERIC: 1.0: enabled 1
684 20:06:28.233821 GENERIC: 0.0: enabled 1
685 20:06:28.237010 GENERIC: 1.0: enabled 1
686 20:06:28.240200 USB0 port 0: enabled 1
687 20:06:28.240448 GENERIC: 0.0: enabled 1
688 20:06:28.243633 USB0 port 0: enabled 1
689 20:06:28.246840 GENERIC: 0.0: enabled 1
690 20:06:28.247071 I2C: 00:1a: enabled 1
691 20:06:28.249906 I2C: 00:31: enabled 1
692 20:06:28.253494 I2C: 00:32: enabled 1
693 20:06:28.253724 I2C: 00:10: enabled 1
694 20:06:28.256666 I2C: 00:15: enabled 1
695 20:06:28.260141 GENERIC: 0.0: enabled 0
696 20:06:28.263448 GENERIC: 1.0: enabled 0
697 20:06:28.263678 GENERIC: 0.0: enabled 1
698 20:06:28.266578 SPI: 00: enabled 1
699 20:06:28.266809 SPI: 00: enabled 1
700 20:06:28.270076 PNP: 0c09.0: enabled 1
701 20:06:28.273354 GENERIC: 0.0: enabled 1
702 20:06:28.276672 USB3 port 0: enabled 1
703 20:06:28.277000 USB3 port 1: enabled 1
704 20:06:28.280200 USB3 port 2: enabled 0
705 20:06:28.283389 USB3 port 3: enabled 0
706 20:06:28.283621 USB2 port 0: enabled 0
707 20:06:28.286953 USB2 port 1: enabled 1
708 20:06:28.290203 USB2 port 2: enabled 1
709 20:06:28.293403 USB2 port 3: enabled 0
710 20:06:28.293717 USB2 port 4: enabled 1
711 20:06:28.296604 USB2 port 5: enabled 0
712 20:06:28.300322 USB2 port 6: enabled 0
713 20:06:28.300553 USB2 port 7: enabled 0
714 20:06:28.303382 USB2 port 8: enabled 0
715 20:06:28.306651 USB2 port 9: enabled 0
716 20:06:28.309803 USB3 port 0: enabled 0
717 20:06:28.310112 USB3 port 1: enabled 1
718 20:06:28.313094 USB3 port 2: enabled 0
719 20:06:28.316307 USB3 port 3: enabled 0
720 20:06:28.316537 GENERIC: 0.0: enabled 1
721 20:06:28.319568 GENERIC: 1.0: enabled 1
722 20:06:28.323540 APIC: 01: enabled 1
723 20:06:28.323770 APIC: 07: enabled 1
724 20:06:28.326770 APIC: 03: enabled 1
725 20:06:28.330178 APIC: 04: enabled 1
726 20:06:28.330408 APIC: 06: enabled 1
727 20:06:28.333350 APIC: 02: enabled 1
728 20:06:28.333591 APIC: 05: enabled 1
729 20:06:28.336657 Compare with tree...
730 20:06:28.339708 Root Device: enabled 1
731 20:06:28.342840 DOMAIN: 0000: enabled 1
732 20:06:28.343103 PCI: 00:00.0: enabled 1
733 20:06:28.346807 PCI: 00:02.0: enabled 1
734 20:06:28.349659 PCI: 00:04.0: enabled 1
735 20:06:28.353394 GENERIC: 0.0: enabled 1
736 20:06:28.356152 PCI: 00:05.0: enabled 1
737 20:06:28.356399 PCI: 00:06.0: enabled 0
738 20:06:28.360194 PCI: 00:07.0: enabled 0
739 20:06:28.363449 GENERIC: 0.0: enabled 1
740 20:06:28.366280 PCI: 00:07.1: enabled 0
741 20:06:28.369450 GENERIC: 1.0: enabled 1
742 20:06:28.369703 PCI: 00:07.2: enabled 0
743 20:06:28.372919 GENERIC: 0.0: enabled 1
744 20:06:28.376094 PCI: 00:07.3: enabled 0
745 20:06:28.379255 GENERIC: 1.0: enabled 1
746 20:06:28.382612 PCI: 00:08.0: enabled 1
747 20:06:28.382851 PCI: 00:09.0: enabled 0
748 20:06:28.386384 PCI: 00:0a.0: enabled 0
749 20:06:28.389855 PCI: 00:0d.0: enabled 1
750 20:06:28.393031 USB0 port 0: enabled 1
751 20:06:28.396426 USB3 port 0: enabled 1
752 20:06:28.396664 USB3 port 1: enabled 1
753 20:06:28.399640 USB3 port 2: enabled 0
754 20:06:28.402974 USB3 port 3: enabled 0
755 20:06:28.406381 PCI: 00:0d.1: enabled 0
756 20:06:28.409543 PCI: 00:0d.2: enabled 0
757 20:06:28.409801 GENERIC: 0.0: enabled 1
758 20:06:28.412783
759 20:06:28.413018 PCI: 00:0d.3: enabled 0
760 20:06:28.416165 PCI: 00:0e.0: enabled 0
761 20:06:28.419374 PCI: 00:10.2: enabled 1
762 20:06:28.422741 PCI: 00:10.6: enabled 0
763 20:06:28.423055 PCI: 00:10.7: enabled 0
764 20:06:28.426148 PCI: 00:12.0: enabled 0
765 20:06:28.429571 PCI: 00:12.6: enabled 0
766 20:06:28.432799 PCI: 00:13.0: enabled 0
767 20:06:28.436170 PCI: 00:14.0: enabled 1
768 20:06:28.436400 USB0 port 0: enabled 1
769 20:06:28.439309 USB2 port 0: enabled 0
770 20:06:28.442356 USB2 port 1: enabled 1
771 20:06:28.445640 USB2 port 2: enabled 1
772 20:06:28.449399 USB2 port 3: enabled 0
773 20:06:28.452850 USB2 port 4: enabled 1
774 20:06:28.453072 USB2 port 5: enabled 0
775 20:06:28.455914 USB2 port 6: enabled 0
776 20:06:28.459258 USB2 port 7: enabled 0
777 20:06:28.462850 USB2 port 8: enabled 0
778 20:06:28.465947 USB2 port 9: enabled 0
779 20:06:28.466269 USB3 port 0: enabled 0
780 20:06:28.469173
781 20:06:28.469468 USB3 port 1: enabled 1
782 20:06:28.472474 USB3 port 2: enabled 0
783 20:06:28.476066 USB3 port 3: enabled 0
784 20:06:28.479170 PCI: 00:14.1: enabled 0
785 20:06:28.482434 PCI: 00:14.2: enabled 1
786 20:06:28.482820 PCI: 00:14.3: enabled 1
787 20:06:28.485906 GENERIC: 0.0: enabled 1
788 20:06:28.488916 PCI: 00:15.0: enabled 1
789 20:06:28.492333 I2C: 00:1a: enabled 1
790 20:06:28.495559 I2C: 00:31: enabled 1
791 20:06:28.495644 I2C: 00:32: enabled 1
792 20:06:28.498734 PCI: 00:15.1: enabled 1
793 20:06:28.502015 I2C: 00:10: enabled 1
794 20:06:28.505294 PCI: 00:15.2: enabled 1
795 20:06:28.505380 PCI: 00:15.3: enabled 1
796 20:06:28.509348 PCI: 00:16.0: enabled 1
797 20:06:28.511737 PCI: 00:16.1: enabled 0
798 20:06:28.515264 PCI: 00:16.2: enabled 0
799 20:06:28.518614 PCI: 00:16.3: enabled 0
800 20:06:28.518693 PCI: 00:16.4: enabled 0
801 20:06:28.521728 PCI: 00:16.5: enabled 0
802 20:06:28.525458 PCI: 00:17.0: enabled 1
803 20:06:28.528680 PCI: 00:19.0: enabled 0
804 20:06:28.531795 PCI: 00:19.1: enabled 1
805 20:06:28.531877 I2C: 00:15: enabled 1
806 20:06:28.535092 PCI: 00:19.2: enabled 0
807 20:06:28.538812 PCI: 00:1d.0: enabled 1
808 20:06:28.542231 GENERIC: 0.0: enabled 1
809 20:06:28.545401 PCI: 00:1e.0: enabled 1
810 20:06:28.545523 PCI: 00:1e.1: enabled 0
811 20:06:28.548356 PCI: 00:1e.2: enabled 1
812 20:06:28.551529 SPI: 00: enabled 1
813 20:06:28.555503 PCI: 00:1e.3: enabled 1
814 20:06:28.555584 SPI: 00: enabled 1
815 20:06:28.558323 PCI: 00:1f.0: enabled 1
816 20:06:28.562104 PNP: 0c09.0: enabled 1
817 20:06:28.565186 PCI: 00:1f.1: enabled 0
818 20:06:28.565697 PCI: 00:1f.2: enabled 1
819 20:06:28.568510
820 20:06:28.569140 GENERIC: 0.0: enabled 1
821 20:06:28.571819 GENERIC: 0.0: enabled 1
822 20:06:28.623847 GENERIC: 1.0: enabled 1
823 20:06:28.624555 PCI: 00:1f.3: enabled 1
824 20:06:28.625710 PCI: 00:1f.4: enabled 0
825 20:06:28.626446 PCI: 00:1f.5: enabled 1
826 20:06:28.626945 PCI: 00:1f.6: enabled 0
827 20:06:28.627394 PCI: 00:1f.7: enabled 0
828 20:06:28.627773 CPU_CLUSTER: 0: enabled 1
829 20:06:28.628178 APIC: 00: enabled 1
830 20:06:28.628530 APIC: 01: enabled 1
831 20:06:28.628959 APIC: 07: enabled 1
832 20:06:28.629442 APIC: 03: enabled 1
833 20:06:28.629900 APIC: 04: enabled 1
834 20:06:28.630238 APIC: 06: enabled 1
835 20:06:28.630556 APIC: 02: enabled 1
836 20:06:28.630856 APIC: 05: enabled 1
837 20:06:28.631646 Root Device scanning...
838 20:06:28.632240 scan_static_bus for Root Device
839 20:06:28.632974 DOMAIN: 0000 enabled
840 20:06:28.633523 CPU_CLUSTER: 0 enabled
841 20:06:28.634082 DOMAIN: 0000 scanning...
842 20:06:28.673990 PCI: pci_scan_bus for bus 00
843 20:06:28.674465 PCI: 00:00.0 [8086/0000] ops
844 20:06:28.675044 PCI: 00:00.0 [8086/9a12] enabled
845 20:06:28.675285 PCI: 00:02.0 [8086/0000] bus ops
846 20:06:28.675494 PCI: 00:02.0 [8086/9a40] enabled
847 20:06:28.675677 PCI: 00:04.0 [8086/0000] bus ops
848 20:06:28.675863 PCI: 00:04.0 [8086/9a03] enabled
849 20:06:28.676046 PCI: 00:05.0 [8086/9a19] enabled
850 20:06:28.676533 PCI: 00:07.0 [0000/0000] hidden
851 20:06:28.676724 PCI: 00:08.0 [8086/9a11] enabled
852 20:06:28.676932 PCI: 00:0a.0 [8086/9a0d] disabled
853 20:06:28.677187 PCI: 00:0d.0 [8086/0000] bus ops
854 20:06:28.677443 PCI: 00:0d.0 [8086/9a13] enabled
855 20:06:28.677696 PCI: 00:14.0 [8086/0000] bus ops
856 20:06:28.677965 PCI: 00:14.0 [8086/a0ed] enabled
857 20:06:28.706396 PCI: 00:14.2 [8086/a0ef] enabled
858 20:06:28.706674 PCI: 00:14.3 [8086/0000] bus ops
859 20:06:28.707147 PCI: 00:14.3 [8086/a0f0] enabled
860 20:06:28.707347 PCI: 00:15.0 [8086/0000] bus ops
861 20:06:28.707522 PCI: 00:15.0 [8086/a0e8] enabled
862 20:06:28.707686 PCI: 00:15.1 [8086/0000] bus ops
863 20:06:28.708090 PCI: 00:15.1 [8086/a0e9] enabled
864 20:06:28.708263 PCI: 00:15.2 [8086/0000] bus ops
865 20:06:28.708424 PCI: 00:15.2 [8086/a0ea] enabled
866 20:06:28.708582 PCI: 00:15.3 [8086/0000] bus ops
867 20:06:28.711046 PCI: 00:15.3 [8086/a0eb] enabled
868 20:06:28.711284 PCI: 00:16.0 [8086/0000] ops
869 20:06:28.714328 PCI: 00:16.0 [8086/a0e0] enabled
870 20:06:28.721179 PCI: Static device PCI: 00:17.0 not found, disabling it.
871 20:06:28.723831 PCI: 00:19.0 [8086/0000] bus ops
872 20:06:28.727678 PCI: 00:19.0 [8086/a0c5] disabled
873 20:06:28.730710 PCI: 00:19.1 [8086/0000] bus ops
874 20:06:28.734089 PCI: 00:19.1 [8086/a0c6] enabled
875 20:06:28.737715 PCI: 00:1d.0 [8086/0000] bus ops
876 20:06:28.740903 PCI: 00:1d.0 [8086/a0b0] enabled
877 20:06:28.744014 PCI: 00:1e.0 [8086/0000] ops
878 20:06:28.747238 PCI: 00:1e.0 [8086/a0a8] enabled
879 20:06:28.750461 PCI: 00:1e.2 [8086/0000] bus ops
880 20:06:28.754288 PCI: 00:1e.2 [8086/a0aa] enabled
881 20:06:28.757335 PCI: 00:1e.3 [8086/0000] bus ops
882 20:06:28.760435 PCI: 00:1e.3 [8086/a0ab] enabled
883 20:06:28.764446 PCI: 00:1f.0 [8086/0000] bus ops
884 20:06:28.767633 PCI: 00:1f.0 [8086/a087] enabled
885 20:06:28.770313 RTC Init
886 20:06:28.773511 Set power on after power failure.
887 20:06:28.773748 Disabling Deep S3
888 20:06:28.776827 Disabling Deep S3
889 20:06:28.777071 Disabling Deep S4
890 20:06:28.780073 Disabling Deep S4
891 20:06:28.780290 Disabling Deep S5
892 20:06:28.784225 Disabling Deep S5
893 20:06:28.787311 PCI: 00:1f.2 [0000/0000] hidden
894 20:06:28.790693 PCI: 00:1f.3 [8086/0000] bus ops
895 20:06:28.793519 PCI: 00:1f.3 [8086/a0c8] enabled
896 20:06:28.796615 PCI: 00:1f.5 [8086/0000] bus ops
897 20:06:28.799986 PCI: 00:1f.5 [8086/a0a4] enabled
898 20:06:28.803200 PCI: Leftover static devices:
899 20:06:28.803431 PCI: 00:10.2
900 20:06:28.806705 PCI: 00:10.6
901 20:06:28.806959 PCI: 00:10.7
902 20:06:28.810566 PCI: 00:06.0
903 20:06:28.810798 PCI: 00:07.1
904 20:06:28.810993 PCI: 00:07.2
905 20:06:28.813182 PCI: 00:07.3
906 20:06:28.813430 PCI: 00:09.0
907 20:06:28.816964 PCI: 00:0d.1
908 20:06:28.817267 PCI: 00:0d.2
909 20:06:28.817457 PCI: 00:0d.3
910 20:06:28.820132
911 20:06:28.820365 PCI: 00:0e.0
912 20:06:28.820547 PCI: 00:12.0
913 20:06:28.823175 PCI: 00:12.6
914 20:06:28.823489 PCI: 00:13.0
915 20:06:28.826507 PCI: 00:14.1
916 20:06:28.826806 PCI: 00:16.1
917 20:06:28.827076 PCI: 00:16.2
918 20:06:28.830312 PCI: 00:16.3
919 20:06:28.830545 PCI: 00:16.4
920 20:06:28.833613 PCI: 00:16.5
921 20:06:28.833845 PCI: 00:17.0
922 20:06:28.834051 PCI: 00:19.2
923 20:06:28.836701 PCI: 00:1e.1
924 20:06:28.837020 PCI: 00:1f.1
925 20:06:28.840128 PCI: 00:1f.4
926 20:06:28.840361 PCI: 00:1f.6
927 20:06:28.843221 PCI: 00:1f.7
928 20:06:28.843534 PCI: Check your devicetree.cb.
929 20:06:28.846584
930 20:06:28.846817 PCI: 00:02.0 scanning...
931 20:06:28.849765 scan_generic_bus for PCI: 00:02.0
932 20:06:28.856104 scan_generic_bus for PCI: 00:02.0 done
933 20:06:28.860046 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
934 20:06:28.863111 PCI: 00:04.0 scanning...
935 20:06:28.866624 scan_generic_bus for PCI: 00:04.0
936 20:06:28.866860 GENERIC: 0.0 enabled
937 20:06:28.869800
938 20:06:28.873318 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
939 20:06:28.879241 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
940 20:06:28.882605 PCI: 00:0d.0 scanning...
941 20:06:28.885766 scan_static_bus for PCI: 00:0d.0
942 20:06:28.886042 USB0 port 0 enabled
943 20:06:28.889260 USB0 port 0 scanning...
944 20:06:28.892490 scan_static_bus for USB0 port 0
945 20:06:28.895791 USB3 port 0 enabled
946 20:06:28.896027 USB3 port 1 enabled
947 20:06:28.899643 USB3 port 2 disabled
948 20:06:28.902379 USB3 port 3 disabled
949 20:06:28.902633 USB3 port 0 scanning...
950 20:06:28.906472 scan_static_bus for USB3 port 0
951 20:06:28.909825 scan_static_bus for USB3 port 0 done
952 20:06:28.916373 scan_bus: bus USB3 port 0 finished in 6 msecs
953 20:06:28.919344 USB3 port 1 scanning...
954 20:06:28.922359 scan_static_bus for USB3 port 1
955 20:06:28.925502 scan_static_bus for USB3 port 1 done
956 20:06:28.928927 scan_bus: bus USB3 port 1 finished in 6 msecs
957 20:06:28.932636 scan_static_bus for USB0 port 0 done
958 20:06:28.939098 scan_bus: bus USB0 port 0 finished in 43 msecs
959 20:06:28.942455 scan_static_bus for PCI: 00:0d.0 done
960 20:06:28.945985 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
961 20:06:28.949216 PCI: 00:14.0 scanning...
962 20:06:28.952351 scan_static_bus for PCI: 00:14.0
963 20:06:28.955519 USB0 port 0 enabled
964 20:06:28.955756 USB0 port 0 scanning...
965 20:06:28.959457 scan_static_bus for USB0 port 0
966 20:06:28.962603 USB2 port 0 disabled
967 20:06:28.965756 USB2 port 1 enabled
968 20:06:28.965990 USB2 port 2 enabled
969 20:06:28.969185 USB2 port 3 disabled
970 20:06:28.972437 USB2 port 4 enabled
971 20:06:28.972670 USB2 port 5 disabled
972 20:06:28.976080 USB2 port 6 disabled
973 20:06:28.979124 USB2 port 7 disabled
974 20:06:28.979357 USB2 port 8 disabled
975 20:06:28.982552 USB2 port 9 disabled
976 20:06:28.982793 USB3 port 0 disabled
977 20:06:28.985781 USB3 port 1 enabled
978 20:06:28.988991 USB3 port 2 disabled
979 20:06:28.989237 USB3 port 3 disabled
980 20:06:28.992420 USB2 port 1 scanning...
981 20:06:28.995722 scan_static_bus for USB2 port 1
982 20:06:28.998992 scan_static_bus for USB2 port 1 done
983 20:06:29.005645 scan_bus: bus USB2 port 1 finished in 6 msecs
984 20:06:29.005880 USB2 port 2 scanning...
985 20:06:29.009123 scan_static_bus for USB2 port 2
986 20:06:29.015639 scan_static_bus for USB2 port 2 done
987 20:06:29.018766 scan_bus: bus USB2 port 2 finished in 6 msecs
988 20:06:29.022031 USB2 port 4 scanning...
989 20:06:29.025289 scan_static_bus for USB2 port 4
990 20:06:29.029127 scan_static_bus for USB2 port 4 done
991 20:06:29.032383 scan_bus: bus USB2 port 4 finished in 6 msecs
992 20:06:29.035938 USB3 port 1 scanning...
993 20:06:29.039157 scan_static_bus for USB3 port 1
994 20:06:29.042319 scan_static_bus for USB3 port 1 done
995 20:06:29.048264 scan_bus: bus USB3 port 1 finished in 6 msecs
996 20:06:29.052260 scan_static_bus for USB0 port 0 done
997 20:06:29.055428 scan_bus: bus USB0 port 0 finished in 93 msecs
998 20:06:29.058683 scan_static_bus for PCI: 00:14.0 done
999 20:06:29.065241 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1000 20:06:29.065475 PCI: 00:14.3 scanning...
1001 20:06:29.068388 scan_static_bus for PCI: 00:14.3
1002 20:06:29.071829 GENERIC: 0.0 enabled
1003 20:06:29.075278 scan_static_bus for PCI: 00:14.3 done
1004 20:06:29.081798 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1005 20:06:29.081911 PCI: 00:15.0 scanning...
1006 20:06:29.085102 scan_static_bus for PCI: 00:15.0
1007 20:06:29.088514 I2C: 00:1a enabled
1008 20:06:29.091754 I2C: 00:31 enabled
1009 20:06:29.091839 I2C: 00:32 enabled
1010 20:06:29.095191 scan_static_bus for PCI: 00:15.0 done
1011 20:06:29.101918 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1012 20:06:29.105075 PCI: 00:15.1 scanning...
1013 20:06:29.108263 scan_static_bus for PCI: 00:15.1
1014 20:06:29.108348 I2C: 00:10 enabled
1015 20:06:29.111654 scan_static_bus for PCI: 00:15.1 done
1016 20:06:29.118774 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1017 20:06:29.121460 PCI: 00:15.2 scanning...
1018 20:06:29.125329 scan_static_bus for PCI: 00:15.2
1019 20:06:29.128487 scan_static_bus for PCI: 00:15.2 done
1020 20:06:29.131628 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1021 20:06:29.134928 PCI: 00:15.3 scanning...
1022 20:06:29.138013 scan_static_bus for PCI: 00:15.3
1023 20:06:29.141238 scan_static_bus for PCI: 00:15.3 done
1024 20:06:29.147788 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1025 20:06:29.147875 PCI: 00:19.1 scanning...
1026 20:06:29.151861 scan_static_bus for PCI: 00:19.1
1027 20:06:29.155055 I2C: 00:15 enabled
1028 20:06:29.158132 scan_static_bus for PCI: 00:19.1 done
1029 20:06:29.164681 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1030 20:06:29.164788 PCI: 00:1d.0 scanning...
1031 20:06:29.171265 do_pci_scan_bridge for PCI: 00:1d.0
1032 20:06:29.171349 PCI: pci_scan_bus for bus 01
1033 20:06:29.174734 PCI: 01:00.0 [15b7/5009] enabled
1034 20:06:29.177984 GENERIC: 0.0 enabled
1035 20:06:29.181538 Enabling Common Clock Configuration
1036 20:06:29.184656 L1 Sub-State supported from root port 29
1037 20:06:29.188058
1038 20:06:29.188142 L1 Sub-State Support = 0x5
1039 20:06:29.191329 CommonModeRestoreTime = 0x28
1040 20:06:29.197796 Power On Value = 0x16, Power On Scale = 0x0
1041 20:06:29.197880 ASPM: Enabled L1
1042 20:06:29.201336 PCIe: Max_Payload_Size adjusted to 128
1043 20:06:29.207956 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1044 20:06:29.208044 PCI: 00:1e.2 scanning...
1045 20:06:29.211772 scan_generic_bus for PCI: 00:1e.2
1046 20:06:29.215150 SPI: 00 enabled
1047 20:06:29.221648 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1048 20:06:29.224909 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1049 20:06:29.228574 PCI: 00:1e.3 scanning...
1050 20:06:29.231828 scan_generic_bus for PCI: 00:1e.3
1051 20:06:29.231920 SPI: 00 enabled
1052 20:06:29.234964
1053 20:06:29.238207 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1054 20:06:29.245234 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1055 20:06:29.248611 PCI: 00:1f.0 scanning...
1056 20:06:29.252052 scan_static_bus for PCI: 00:1f.0
1057 20:06:29.252138 PNP: 0c09.0 enabled
1058 20:06:29.255236 PNP: 0c09.0 scanning...
1059 20:06:29.258520 scan_static_bus for PNP: 0c09.0
1060 20:06:29.261179 scan_static_bus for PNP: 0c09.0 done
1061 20:06:29.268087 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1062 20:06:29.271394 scan_static_bus for PCI: 00:1f.0 done
1063 20:06:29.274639 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1064 20:06:29.278324 PCI: 00:1f.2 scanning...
1065 20:06:29.281357 scan_static_bus for PCI: 00:1f.2
1066 20:06:29.284702 GENERIC: 0.0 enabled
1067 20:06:29.284809 GENERIC: 0.0 scanning...
1068 20:06:29.288195 scan_static_bus for GENERIC: 0.0
1069 20:06:29.291415 GENERIC: 0.0 enabled
1070 20:06:29.294857 GENERIC: 1.0 enabled
1071 20:06:29.298057 scan_static_bus for GENERIC: 0.0 done
1072 20:06:29.301465 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1073 20:06:29.304919 scan_static_bus for PCI: 00:1f.2 done
1074 20:06:29.308071
1075 20:06:29.311386 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1076 20:06:29.314622 PCI: 00:1f.3 scanning...
1077 20:06:29.318013 scan_static_bus for PCI: 00:1f.3
1078 20:06:29.321147 scan_static_bus for PCI: 00:1f.3 done
1079 20:06:29.324393 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1080 20:06:29.327463 PCI: 00:1f.5 scanning...
1081 20:06:29.330633 scan_generic_bus for PCI: 00:1f.5
1082 20:06:29.333975 scan_generic_bus for PCI: 00:1f.5 done
1083 20:06:29.340901 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1084 20:06:29.344262 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1085 20:06:29.347374 scan_static_bus for Root Device done
1086 20:06:29.353877 scan_bus: bus Root Device finished in 735 msecs
1087 20:06:29.353982 done
1088 20:06:29.361091 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1089 20:06:29.364113 Chrome EC: UHEPI supported
1090 20:06:29.370638 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1091 20:06:29.377293 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1092 20:06:29.380838 SPI flash protection: WPSW=0 SRP0=1
1093 20:06:29.384183 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1094 20:06:29.391041 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1095 20:06:29.394382 found VGA at PCI: 00:02.0
1096 20:06:29.397088 Setting up VGA for PCI: 00:02.0
1097 20:06:29.400982 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1098 20:06:29.407368 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1099 20:06:29.410828 Allocating resources...
1100 20:06:29.411268 Reading resources...
1101 20:06:29.414060 Root Device read_resources bus 0 link: 0
1102 20:06:29.417389
1103 20:06:29.420695 DOMAIN: 0000 read_resources bus 0 link: 0
1104 20:06:29.423821 PCI: 00:04.0 read_resources bus 1 link: 0
1105 20:06:29.430268 PCI: 00:04.0 read_resources bus 1 link: 0 done
1106 20:06:29.433594 PCI: 00:0d.0 read_resources bus 0 link: 0
1107 20:06:29.440333 USB0 port 0 read_resources bus 0 link: 0
1108 20:06:29.443587 USB0 port 0 read_resources bus 0 link: 0 done
1109 20:06:29.450573 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1110 20:06:29.453128 PCI: 00:14.0 read_resources bus 0 link: 0
1111 20:06:29.457076 USB0 port 0 read_resources bus 0 link: 0
1112 20:06:29.464396 USB0 port 0 read_resources bus 0 link: 0 done
1113 20:06:29.467671 PCI: 00:14.0 read_resources bus 0 link: 0 done
1114 20:06:29.474653 PCI: 00:14.3 read_resources bus 0 link: 0
1115 20:06:29.477845 PCI: 00:14.3 read_resources bus 0 link: 0 done
1116 20:06:29.484603 PCI: 00:15.0 read_resources bus 0 link: 0
1117 20:06:29.487985 PCI: 00:15.0 read_resources bus 0 link: 0 done
1118 20:06:29.494620 PCI: 00:15.1 read_resources bus 0 link: 0
1119 20:06:29.497978 PCI: 00:15.1 read_resources bus 0 link: 0 done
1120 20:06:29.505290 PCI: 00:19.1 read_resources bus 0 link: 0
1121 20:06:29.508158 PCI: 00:19.1 read_resources bus 0 link: 0 done
1122 20:06:29.515238 PCI: 00:1d.0 read_resources bus 1 link: 0
1123 20:06:29.518572 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1124 20:06:29.524580 PCI: 00:1e.2 read_resources bus 2 link: 0
1125 20:06:29.528028 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1126 20:06:29.535068 PCI: 00:1e.3 read_resources bus 3 link: 0
1127 20:06:29.538292 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1128 20:06:29.544545 PCI: 00:1f.0 read_resources bus 0 link: 0
1129 20:06:29.547664 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1130 20:06:29.554150 PCI: 00:1f.2 read_resources bus 0 link: 0
1131 20:06:29.557564 GENERIC: 0.0 read_resources bus 0 link: 0
1132 20:06:29.564156 GENERIC: 0.0 read_resources bus 0 link: 0 done
1133 20:06:29.567364 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1134 20:06:29.573789 DOMAIN: 0000 read_resources bus 0 link: 0 done
1135 20:06:29.577063 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1136 20:06:29.583637 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1137 20:06:29.587015 Root Device read_resources bus 0 link: 0 done
1138 20:06:29.590295 Done reading resources.
1139 20:06:29.597306 Show resources in subtree (Root Device)...After reading.
1140 20:06:29.600372 Root Device child on link 0 DOMAIN: 0000
1141 20:06:29.603586 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1142 20:06:29.613632 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1143 20:06:29.623412 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1144 20:06:29.623500 PCI: 00:00.0
1145 20:06:29.626751
1146 20:06:29.633388 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1147 20:06:29.643727 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1148 20:06:29.653208 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1149 20:06:29.663169 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1150 20:06:29.673262 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1151 20:06:29.683008 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1152 20:06:29.689690 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1153 20:06:29.700384 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1154 20:06:29.709524 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1155 20:06:29.719629 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1156 20:06:29.729522 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1157 20:06:29.739862 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1158 20:06:29.746579 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1159 20:06:29.755865 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1160 20:06:29.766012 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1161 20:06:29.775673 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1162 20:06:29.786486 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1163 20:06:29.795712 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1164 20:06:29.802353 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1165 20:06:29.812260 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1166 20:06:29.816020 PCI: 00:02.0
1167 20:06:29.825529 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1168 20:06:29.835391 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1169 20:06:29.845892 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1170 20:06:29.849175 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1171 20:06:29.859123 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1172 20:06:29.859210 GENERIC: 0.0
1173 20:06:29.862298
1174 20:06:29.862380 PCI: 00:05.0
1175 20:06:29.872094 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1176 20:06:29.875215 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1177 20:06:29.878533 GENERIC: 0.0
1178 20:06:29.878619 PCI: 00:08.0
1179 20:06:29.881830
1180 20:06:29.888949 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1181 20:06:29.892279 PCI: 00:0a.0
1182 20:06:29.895525 PCI: 00:0d.0 child on link 0 USB0 port 0
1183 20:06:29.905587 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1184 20:06:29.912105 USB0 port 0 child on link 0 USB3 port 0
1185 20:06:29.912208 USB3 port 0
1186 20:06:29.915424 USB3 port 1
1187 20:06:29.915528 USB3 port 2
1188 20:06:29.918737 USB3 port 3
1189 20:06:29.921538 PCI: 00:14.0 child on link 0 USB0 port 0
1190 20:06:29.932204 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1191 20:06:29.938539 USB0 port 0 child on link 0 USB2 port 0
1192 20:06:29.938700 USB2 port 0
1193 20:06:29.941361 USB2 port 1
1194 20:06:29.941536 USB2 port 2
1195 20:06:29.945002 USB2 port 3
1196 20:06:29.945189 USB2 port 4
1197 20:06:29.948138 USB2 port 5
1198 20:06:29.948298 USB2 port 6
1199 20:06:29.951497 USB2 port 7
1200 20:06:29.951643 USB2 port 8
1201 20:06:29.954638 USB2 port 9
1202 20:06:29.954781 USB3 port 0
1203 20:06:29.957904 USB3 port 1
1204 20:06:29.961270 USB3 port 2
1205 20:06:29.961741 USB3 port 3
1206 20:06:29.965144 PCI: 00:14.2
1207 20:06:29.975183 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1208 20:06:29.984773 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1209 20:06:29.988081 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1210 20:06:29.998295 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1211 20:06:29.998741 GENERIC: 0.0
1212 20:06:30.005034 PCI: 00:15.0 child on link 0 I2C: 00:1a
1213 20:06:30.014823 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 20:06:30.015269 I2C: 00:1a
1215 20:06:30.018128 I2C: 00:31
1216 20:06:30.018587 I2C: 00:32
1217 20:06:30.021534 PCI: 00:15.1 child on link 0 I2C: 00:10
1218 20:06:30.031279 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1219 20:06:30.034599 I2C: 00:10
1220 20:06:30.034945 PCI: 00:15.2
1221 20:06:30.044280 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1222 20:06:30.047483 PCI: 00:15.3
1223 20:06:30.057558 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1224 20:06:30.057874 PCI: 00:16.0
1225 20:06:30.067532 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1226 20:06:30.070448 PCI: 00:19.0
1227 20:06:30.074345 PCI: 00:19.1 child on link 0 I2C: 00:15
1228 20:06:30.083951 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1229 20:06:30.087148 I2C: 00:15
1230 20:06:30.090469 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1231 20:06:30.100542 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1232 20:06:30.110525 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1233 20:06:30.117260 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1234 20:06:30.120443 GENERIC: 0.0
1235 20:06:30.120538 PCI: 01:00.0
1236 20:06:30.134036 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1237 20:06:30.140549 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1238 20:06:30.143855
1239 20:06:30.143989 PCI: 00:1e.0
1240 20:06:30.153536 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1241 20:06:30.159996 PCI: 00:1e.2 child on link 0 SPI: 00
1242 20:06:30.170187 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 20:06:30.170313 SPI: 00
1244 20:06:30.173325 PCI: 00:1e.3 child on link 0 SPI: 00
1245 20:06:30.182981 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1246 20:06:30.186841 SPI: 00
1247 20:06:30.190344 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1248 20:06:30.197096 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1249 20:06:30.199692 PNP: 0c09.0
1250 20:06:30.210038 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1251 20:06:30.213462 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1252 20:06:30.223234 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1253 20:06:30.233143 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1254 20:06:30.236491 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1255 20:06:30.240189 GENERIC: 0.0
1256 20:06:30.240278 GENERIC: 1.0
1257 20:06:30.243183 PCI: 00:1f.3
1258 20:06:30.252600 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1259 20:06:30.262617 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1260 20:06:30.262738 PCI: 00:1f.5
1261 20:06:30.272246 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1262 20:06:30.275994 CPU_CLUSTER: 0 child on link 0 APIC: 00
1263 20:06:30.279055 APIC: 00
1264 20:06:30.279141 APIC: 01
1265 20:06:30.279207 APIC: 07
1266 20:06:30.282428 APIC: 03
1267 20:06:30.282546 APIC: 04
1268 20:06:30.285559 APIC: 06
1269 20:06:30.285712 APIC: 02
1270 20:06:30.285820 APIC: 05
1271 20:06:30.295435 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1272 20:06:30.298701 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1273 20:06:30.305452 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1274 20:06:30.311941 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1275 20:06:30.315505 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1276 20:06:30.321833 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1277 20:06:30.328432 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1278 20:06:30.335286 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1279 20:06:30.341839 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1280 20:06:30.352109 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1281 20:06:30.355244 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1282 20:06:30.365373 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1283 20:06:30.371895 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1284 20:06:30.378350 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1285 20:06:30.381793 DOMAIN: 0000: Resource ranges:
1286 20:06:30.385017 * Base: 1000, Size: 800, Tag: 100
1287 20:06:30.388177 * Base: 1900, Size: e700, Tag: 100
1288 20:06:30.394688 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1289 20:06:30.401575 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1290 20:06:30.408634 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1291 20:06:30.414574 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1292 20:06:30.424615 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1293 20:06:30.431198 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1294 20:06:30.438469 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1295 20:06:30.447983 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1296 20:06:30.454685 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1297 20:06:30.461178 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1298 20:06:30.471778 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1299 20:06:30.478279 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1300 20:06:30.484584 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1301 20:06:30.494612 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1302 20:06:30.501096 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1303 20:06:30.507636 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1304 20:06:30.518059 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1305 20:06:30.524571 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1306 20:06:30.531283 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1307 20:06:30.540890 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1308 20:06:30.547773 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1309 20:06:30.554300 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1310 20:06:30.564490 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1311 20:06:30.570847 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1312 20:06:30.577287 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1313 20:06:30.580624 DOMAIN: 0000: Resource ranges:
1314 20:06:30.587467 * Base: 7fc00000, Size: 40400000, Tag: 200
1315 20:06:30.590604 * Base: d0000000, Size: 28000000, Tag: 200
1316 20:06:30.593867 * Base: fa000000, Size: 1000000, Tag: 200
1317 20:06:30.597329 * Base: fb001000, Size: 2fff000, Tag: 200
1318 20:06:30.603747 * Base: fe010000, Size: 2e000, Tag: 200
1319 20:06:30.607007 * Base: fe03f000, Size: d41000, Tag: 200
1320 20:06:30.610518 * Base: fed88000, Size: 8000, Tag: 200
1321 20:06:30.613828 * Base: fed93000, Size: d000, Tag: 200
1322 20:06:30.620439 * Base: feda2000, Size: 1e000, Tag: 200
1323 20:06:30.623832 * Base: fede0000, Size: 1220000, Tag: 200
1324 20:06:30.627048 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1325 20:06:30.637106 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1326 20:06:30.643735 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1327 20:06:30.650479 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1328 20:06:30.656669 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1329 20:06:30.663320 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1330 20:06:30.669787 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1331 20:06:30.676215 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1332 20:06:30.683086 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1333 20:06:30.689512 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1334 20:06:30.696449 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1335 20:06:30.702999 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1336 20:06:30.709629 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1337 20:06:30.716299 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1338 20:06:30.722986 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1339 20:06:30.729866 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1340 20:06:30.736243 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1341 20:06:30.742637 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1342 20:06:30.749273 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1343 20:06:30.755979 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1344 20:06:30.762440 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1345 20:06:30.769453 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1346 20:06:30.776220 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1347 20:06:30.782520 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1348 20:06:30.788927 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1349 20:06:30.792256 PCI: 00:1d.0: Resource ranges:
1350 20:06:30.795469 * Base: 7fc00000, Size: 100000, Tag: 200
1351 20:06:30.802114 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1352 20:06:30.809368 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1353 20:06:30.819348 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1354 20:06:30.825992 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1355 20:06:30.829559 Root Device assign_resources, bus 0 link: 0
1356 20:06:30.832093
1357 20:06:30.835671 DOMAIN: 0000 assign_resources, bus 0 link: 0
1358 20:06:30.842365 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1359 20:06:30.845563
1360 20:06:30.852156 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1361 20:06:30.858781 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1362 20:06:30.868358 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1363 20:06:30.871653 PCI: 00:04.0 assign_resources, bus 1 link: 0
1364 20:06:30.878213 PCI: 00:04.0 assign_resources, bus 1 link: 0
1365 20:06:30.884736 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1366 20:06:30.895090 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1367 20:06:30.901611 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1368 20:06:30.904978 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1369 20:06:30.911583 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1370 20:06:30.918252 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1371 20:06:30.924921 PCI: 00:14.0 assign_resources, bus 0 link: 0
1372 20:06:30.928168 PCI: 00:14.0 assign_resources, bus 0 link: 0
1373 20:06:30.938210 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1374 20:06:30.944749 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1375 20:06:30.951192 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1376 20:06:30.954676
1377 20:06:30.957967 PCI: 00:14.3 assign_resources, bus 0 link: 0
1378 20:06:30.961216 PCI: 00:14.3 assign_resources, bus 0 link: 0
1379 20:06:30.971064 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1380 20:06:30.974299 PCI: 00:15.0 assign_resources, bus 0 link: 0
1381 20:06:30.980797 PCI: 00:15.0 assign_resources, bus 0 link: 0
1382 20:06:30.987430 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1383 20:06:30.990654 PCI: 00:15.1 assign_resources, bus 0 link: 0
1384 20:06:30.997331 PCI: 00:15.1 assign_resources, bus 0 link: 0
1385 20:06:31.003953 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1386 20:06:31.013966 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1387 20:06:31.020586 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1388 20:06:31.030613 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1389 20:06:31.033788 PCI: 00:19.1 assign_resources, bus 0 link: 0
1390 20:06:31.040568 PCI: 00:19.1 assign_resources, bus 0 link: 0
1391 20:06:31.047037 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1392 20:06:31.056665 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1393 20:06:31.066805 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1394 20:06:31.070192 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1395 20:06:31.079805 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1396 20:06:31.086388 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1397 20:06:31.093441 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1398 20:06:31.100203 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1399 20:06:31.103294 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1400 20:06:31.109912 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1401 20:06:31.116437 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1402 20:06:31.123166 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1403 20:06:31.126660 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1404 20:06:31.133301 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1405 20:06:31.136609 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1406 20:06:31.139222 LPC: Trying to open IO window from 800 size 1ff
1407 20:06:31.149741 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1408 20:06:31.156838 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1409 20:06:31.166496 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1410 20:06:31.169769 DOMAIN: 0000 assign_resources, bus 0 link: 0
1411 20:06:31.176152 Root Device assign_resources, bus 0 link: 0
1412 20:06:31.176237 Done setting resources.
1413 20:06:31.183207 Show resources in subtree (Root Device)...After assigning values.
1414 20:06:31.189914 Root Device child on link 0 DOMAIN: 0000
1415 20:06:31.193163 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1416 20:06:31.202846 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1417 20:06:31.212799 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1418 20:06:31.212910 PCI: 00:00.0
1419 20:06:31.222933 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1420 20:06:31.232939 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1421 20:06:31.242884 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1422 20:06:31.252843 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1423 20:06:31.259276 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1424 20:06:31.269336 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1425 20:06:31.279116 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1426 20:06:31.288955 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1427 20:06:31.298780 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1428 20:06:31.308905 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1429 20:06:31.315280 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1430 20:06:31.325408 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1431 20:06:31.335250 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1432 20:06:31.345461 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1433 20:06:31.355672 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1434 20:06:31.362192 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1435 20:06:31.372365 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1436 20:06:31.382283 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1437 20:06:31.392070 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1438 20:06:31.402060 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1439 20:06:31.402576 PCI: 00:02.0
1440 20:06:31.405264
1441 20:06:31.415467 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1442 20:06:31.424995 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1443 20:06:31.435931 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1444 20:06:31.438472 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1445 20:06:31.448034 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1446 20:06:31.452018 GENERIC: 0.0
1447 20:06:31.452450 PCI: 00:05.0
1448 20:06:31.461877 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1449 20:06:31.468273 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1450 20:06:31.468880 GENERIC: 0.0
1451 20:06:31.471652 PCI: 00:08.0
1452 20:06:31.481271 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1453 20:06:31.481718 PCI: 00:0a.0
1454 20:06:31.488401 PCI: 00:0d.0 child on link 0 USB0 port 0
1455 20:06:31.498286 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1456 20:06:31.501632 USB0 port 0 child on link 0 USB3 port 0
1457 20:06:31.504954 USB3 port 0
1458 20:06:31.505582 USB3 port 1
1459 20:06:31.507893 USB3 port 2
1460 20:06:31.508332 USB3 port 3
1461 20:06:31.514371 PCI: 00:14.0 child on link 0 USB0 port 0
1462 20:06:31.524476 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1463 20:06:31.528115 USB0 port 0 child on link 0 USB2 port 0
1464 20:06:31.531413 USB2 port 0
1465 20:06:31.531854 USB2 port 1
1466 20:06:31.534777 USB2 port 2
1467 20:06:31.535224 USB2 port 3
1468 20:06:31.538047 USB2 port 4
1469 20:06:31.538523 USB2 port 5
1470 20:06:31.541588 USB2 port 6
1471 20:06:31.542064 USB2 port 7
1472 20:06:31.544658
1473 20:06:31.545141 USB2 port 8
1474 20:06:31.548136 USB2 port 9
1475 20:06:31.548561 USB3 port 0
1476 20:06:31.551108 USB3 port 1
1477 20:06:31.551457 USB3 port 2
1478 20:06:31.554437 USB3 port 3
1479 20:06:31.554755 PCI: 00:14.2
1480 20:06:31.564332 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1481 20:06:31.573922 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1482 20:06:31.580769 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1483 20:06:31.590634 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1484 20:06:31.590994 GENERIC: 0.0
1485 20:06:31.597553 PCI: 00:15.0 child on link 0 I2C: 00:1a
1486 20:06:31.606848 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1487 20:06:31.607161 I2C: 00:1a
1488 20:06:31.610215 I2C: 00:31
1489 20:06:31.610501 I2C: 00:32
1490 20:06:31.617158 PCI: 00:15.1 child on link 0 I2C: 00:10
1491 20:06:31.627109 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1492 20:06:31.627408 I2C: 00:10
1493 20:06:31.629768 PCI: 00:15.2
1494 20:06:31.640644 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1495 20:06:31.640924 PCI: 00:15.3
1496 20:06:31.649804 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1497 20:06:31.653304 PCI: 00:16.0
1498 20:06:31.663200 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1499 20:06:31.666415 PCI: 00:19.0
1500 20:06:31.669801 PCI: 00:19.1 child on link 0 I2C: 00:15
1501 20:06:31.679568 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1502 20:06:31.679661 I2C: 00:15
1503 20:06:31.686737 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1504 20:06:31.696078 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1505 20:06:31.706749 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1506 20:06:31.716408 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1507 20:06:31.719572 GENERIC: 0.0
1508 20:06:31.719684 PCI: 01:00.0
1509 20:06:31.729523 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1510 20:06:31.732791
1511 20:06:31.742966 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1512 20:06:31.743069 PCI: 00:1e.0
1513 20:06:31.752803 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1514 20:06:31.759433 PCI: 00:1e.2 child on link 0 SPI: 00
1515 20:06:31.769439 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1516 20:06:31.769548 SPI: 00
1517 20:06:31.772744 PCI: 00:1e.3 child on link 0 SPI: 00
1518 20:06:31.782426 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1519 20:06:31.785617 SPI: 00
1520 20:06:31.789006 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1521 20:06:31.798771 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1522 20:06:31.798877 PNP: 0c09.0
1523 20:06:31.808860 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1524 20:06:31.812139 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1525 20:06:31.822721 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1526 20:06:31.832150 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1527 20:06:31.835336 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1528 20:06:31.838792 GENERIC: 0.0
1529 20:06:31.838876 GENERIC: 1.0
1530 20:06:31.842173 PCI: 00:1f.3
1531 20:06:31.852506 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1532 20:06:31.862224 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1533 20:06:31.865853 PCI: 00:1f.5
1534 20:06:31.875499 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1535 20:06:31.878632 CPU_CLUSTER: 0 child on link 0 APIC: 00
1536 20:06:31.878718 APIC: 00
1537 20:06:31.881932 APIC: 01
1538 20:06:31.882012 APIC: 07
1539 20:06:31.885276 APIC: 03
1540 20:06:31.885358 APIC: 04
1541 20:06:31.885424 APIC: 06
1542 20:06:31.888395 APIC: 02
1543 20:06:31.888493 APIC: 05
1544 20:06:31.891993 Done allocating resources.
1545 20:06:31.898292 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1546 20:06:31.905331 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1547 20:06:31.908544 Configure GPIOs for I2S audio on UP4.
1548 20:06:31.915248 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1549 20:06:31.918332 Enabling resources...
1550 20:06:31.921599 PCI: 00:00.0 subsystem <- 8086/9a12
1551 20:06:31.924961 PCI: 00:00.0 cmd <- 06
1552 20:06:31.928289 PCI: 00:02.0 subsystem <- 8086/9a40
1553 20:06:31.928373 PCI: 00:02.0 cmd <- 03
1554 20:06:31.934984 PCI: 00:04.0 subsystem <- 8086/9a03
1555 20:06:31.935081 PCI: 00:04.0 cmd <- 02
1556 20:06:31.938452 PCI: 00:05.0 subsystem <- 8086/9a19
1557 20:06:31.941867 PCI: 00:05.0 cmd <- 02
1558 20:06:31.944707 PCI: 00:08.0 subsystem <- 8086/9a11
1559 20:06:31.947992 PCI: 00:08.0 cmd <- 06
1560 20:06:31.951654 PCI: 00:0d.0 subsystem <- 8086/9a13
1561 20:06:31.954404 PCI: 00:0d.0 cmd <- 02
1562 20:06:31.958237 PCI: 00:14.0 subsystem <- 8086/a0ed
1563 20:06:31.961723 PCI: 00:14.0 cmd <- 02
1564 20:06:31.965047 PCI: 00:14.2 subsystem <- 8086/a0ef
1565 20:06:31.968164 PCI: 00:14.2 cmd <- 02
1566 20:06:31.971486 PCI: 00:14.3 subsystem <- 8086/a0f0
1567 20:06:31.975040 PCI: 00:14.3 cmd <- 02
1568 20:06:31.977631 PCI: 00:15.0 subsystem <- 8086/a0e8
1569 20:06:31.977710 PCI: 00:15.0 cmd <- 02
1570 20:06:31.984860 PCI: 00:15.1 subsystem <- 8086/a0e9
1571 20:06:31.984957 PCI: 00:15.1 cmd <- 02
1572 20:06:31.987970 PCI: 00:15.2 subsystem <- 8086/a0ea
1573 20:06:31.991261 PCI: 00:15.2 cmd <- 02
1574 20:06:31.994574 PCI: 00:15.3 subsystem <- 8086/a0eb
1575 20:06:31.997769 PCI: 00:15.3 cmd <- 02
1576 20:06:32.001190 PCI: 00:16.0 subsystem <- 8086/a0e0
1577 20:06:32.004499 PCI: 00:16.0 cmd <- 02
1578 20:06:32.007612 PCI: 00:19.1 subsystem <- 8086/a0c6
1579 20:06:32.010899 PCI: 00:19.1 cmd <- 02
1580 20:06:32.014156 PCI: 00:1d.0 bridge ctrl <- 0013
1581 20:06:32.017321 PCI: 00:1d.0 subsystem <- 8086/a0b0
1582 20:06:32.021058 PCI: 00:1d.0 cmd <- 06
1583 20:06:32.024609 PCI: 00:1e.0 subsystem <- 8086/a0a8
1584 20:06:32.027828 PCI: 00:1e.0 cmd <- 06
1585 20:06:32.030452 PCI: 00:1e.2 subsystem <- 8086/a0aa
1586 20:06:32.030545 PCI: 00:1e.2 cmd <- 06
1587 20:06:32.037703 PCI: 00:1e.3 subsystem <- 8086/a0ab
1588 20:06:32.037813 PCI: 00:1e.3 cmd <- 02
1589 20:06:32.040983 PCI: 00:1f.0 subsystem <- 8086/a087
1590 20:06:32.044299 PCI: 00:1f.0 cmd <- 407
1591 20:06:32.047024 PCI: 00:1f.3 subsystem <- 8086/a0c8
1592 20:06:32.050421 PCI: 00:1f.3 cmd <- 02
1593 20:06:32.053757 PCI: 00:1f.5 subsystem <- 8086/a0a4
1594 20:06:32.057261 PCI: 00:1f.5 cmd <- 406
1595 20:06:32.061277 PCI: 01:00.0 cmd <- 02
1596 20:06:32.066078 done.
1597 20:06:32.068721 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1598 20:06:32.072062 Initializing devices...
1599 20:06:32.076055 Root Device init
1600 20:06:32.078660 Chrome EC: Set SMI mask to 0x0000000000000000
1601 20:06:32.085971 Chrome EC: clear events_b mask to 0x0000000000000000
1602 20:06:32.092241 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1603 20:06:32.095419 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1604 20:06:32.102251 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1605 20:06:32.109299 Chrome EC: Set WAKE mask to 0x0000000000000000
1606 20:06:32.111903 fw_config match found: DB_USB=USB3_ACTIVE
1607 20:06:32.118995 Configure Right Type-C port orientation for retimer
1608 20:06:32.122214 Root Device init finished in 44 msecs
1609 20:06:32.125423 PCI: 00:00.0 init
1610 20:06:32.128618 CPU TDP = 9 Watts
1611 20:06:32.128743 CPU PL1 = 9 Watts
1612 20:06:32.131889 CPU PL2 = 40 Watts
1613 20:06:32.135257 CPU PL4 = 83 Watts
1614 20:06:32.138565 PCI: 00:00.0 init finished in 8 msecs
1615 20:06:32.138685 PCI: 00:02.0 init
1616 20:06:32.142068 GMA: Found VBT in CBFS
1617 20:06:32.145336 GMA: Found valid VBT in CBFS
1618 20:06:32.151447 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1619 20:06:32.158170 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1620 20:06:32.161480 PCI: 00:02.0 init finished in 18 msecs
1621 20:06:32.165111 PCI: 00:05.0 init
1622 20:06:32.168254 PCI: 00:05.0 init finished in 0 msecs
1623 20:06:32.171719 PCI: 00:08.0 init
1624 20:06:32.174993 PCI: 00:08.0 init finished in 0 msecs
1625 20:06:32.178342 PCI: 00:14.0 init
1626 20:06:32.181780 PCI: 00:14.0 init finished in 0 msecs
1627 20:06:32.184988 PCI: 00:14.2 init
1628 20:06:32.188173 PCI: 00:14.2 init finished in 0 msecs
1629 20:06:32.191620 PCI: 00:15.0 init
1630 20:06:32.191731 I2C bus 0 version 0x3230302a
1631 20:06:32.194675
1632 20:06:32.198145 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1633 20:06:32.201393 PCI: 00:15.0 init finished in 6 msecs
1634 20:06:32.201480 PCI: 00:15.1 init
1635 20:06:32.204598 I2C bus 1 version 0x3230302a
1636 20:06:32.208061 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1637 20:06:32.214263 PCI: 00:15.1 init finished in 6 msecs
1638 20:06:32.214357 PCI: 00:15.2 init
1639 20:06:32.218263 I2C bus 2 version 0x3230302a
1640 20:06:32.220924 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1641 20:06:32.224156 PCI: 00:15.2 init finished in 6 msecs
1642 20:06:32.228312 PCI: 00:15.3 init
1643 20:06:32.231293 I2C bus 3 version 0x3230302a
1644 20:06:32.234674 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1645 20:06:32.237869 PCI: 00:15.3 init finished in 6 msecs
1646 20:06:32.241224 PCI: 00:16.0 init
1647 20:06:32.244594 PCI: 00:16.0 init finished in 0 msecs
1648 20:06:32.248003 PCI: 00:19.1 init
1649 20:06:32.251336 I2C bus 5 version 0x3230302a
1650 20:06:32.254661 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1651 20:06:32.257608 PCI: 00:19.1 init finished in 6 msecs
1652 20:06:32.260875 PCI: 00:1d.0 init
1653 20:06:32.260965 Initializing PCH PCIe bridge.
1654 20:06:32.264405
1655 20:06:32.267608 PCI: 00:1d.0 init finished in 3 msecs
1656 20:06:32.270979 PCI: 00:1f.0 init
1657 20:06:32.274064 IOAPIC: Initializing IOAPIC at 0xfec00000
1658 20:06:32.277293 IOAPIC: Bootstrap Processor Local APIC = 0x00
1659 20:06:32.280576 IOAPIC: ID = 0x02
1660 20:06:32.284037 IOAPIC: Dumping registers
1661 20:06:32.284119 reg 0x0000: 0x02000000
1662 20:06:32.287131 reg 0x0001: 0x00770020
1663 20:06:32.290346 reg 0x0002: 0x00000000
1664 20:06:32.293731 PCI: 00:1f.0 init finished in 21 msecs
1665 20:06:32.297007 PCI: 00:1f.2 init
1666 20:06:32.300143 Disabling ACPI via APMC.
1667 20:06:32.304411 APMC done.
1668 20:06:32.307472 PCI: 00:1f.2 init finished in 6 msecs
1669 20:06:32.319320 PCI: 01:00.0 init
1670 20:06:32.322683 PCI: 01:00.0 init finished in 0 msecs
1671 20:06:32.325886 PNP: 0c09.0 init
1672 20:06:32.332269 Google Chrome EC uptime: 8.294 seconds
1673 20:06:32.335745 Google Chrome AP resets since EC boot: 1
1674 20:06:32.338978 Google Chrome most recent AP reset causes:
1675 20:06:32.342489 0.454: 32775 shutdown: entering G3
1676 20:06:32.349263 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1677 20:06:32.351850 PNP: 0c09.0 init finished in 23 msecs
1678 20:06:32.358929 Devices initialized
1679 20:06:32.362176 Show all devs... After init.
1680 20:06:32.365551 Root Device: enabled 1
1681 20:06:32.365636 DOMAIN: 0000: enabled 1
1682 20:06:32.369046 CPU_CLUSTER: 0: enabled 1
1683 20:06:32.372178 PCI: 00:00.0: enabled 1
1684 20:06:32.375511 PCI: 00:02.0: enabled 1
1685 20:06:32.375598 PCI: 00:04.0: enabled 1
1686 20:06:32.378782 PCI: 00:05.0: enabled 1
1687 20:06:32.382191 PCI: 00:06.0: enabled 0
1688 20:06:32.385458 PCI: 00:07.0: enabled 0
1689 20:06:32.385543 PCI: 00:07.1: enabled 0
1690 20:06:32.389005 PCI: 00:07.2: enabled 0
1691 20:06:32.392115 PCI: 00:07.3: enabled 0
1692 20:06:32.395470 PCI: 00:08.0: enabled 1
1693 20:06:32.395595 PCI: 00:09.0: enabled 0
1694 20:06:32.398417 PCI: 00:0a.0: enabled 0
1695 20:06:32.401960 PCI: 00:0d.0: enabled 1
1696 20:06:32.405413 PCI: 00:0d.1: enabled 0
1697 20:06:32.405501 PCI: 00:0d.2: enabled 0
1698 20:06:32.408624 PCI: 00:0d.3: enabled 0
1699 20:06:32.412128 PCI: 00:0e.0: enabled 0
1700 20:06:32.412214 PCI: 00:10.2: enabled 1
1701 20:06:32.415018 PCI: 00:10.6: enabled 0
1702 20:06:32.418223 PCI: 00:10.7: enabled 0
1703 20:06:32.422109 PCI: 00:12.0: enabled 0
1704 20:06:32.422202 PCI: 00:12.6: enabled 0
1705 20:06:32.425543 PCI: 00:13.0: enabled 0
1706 20:06:32.428648 PCI: 00:14.0: enabled 1
1707 20:06:32.431966 PCI: 00:14.1: enabled 0
1708 20:06:32.432050 PCI: 00:14.2: enabled 1
1709 20:06:32.435313 PCI: 00:14.3: enabled 1
1710 20:06:32.438656 PCI: 00:15.0: enabled 1
1711 20:06:32.441895 PCI: 00:15.1: enabled 1
1712 20:06:32.441973 PCI: 00:15.2: enabled 1
1713 20:06:32.445191 PCI: 00:15.3: enabled 1
1714 20:06:32.448633 PCI: 00:16.0: enabled 1
1715 20:06:32.448717 PCI: 00:16.1: enabled 0
1716 20:06:32.451967
1717 20:06:32.452054 PCI: 00:16.2: enabled 0
1718 20:06:32.455306 PCI: 00:16.3: enabled 0
1719 20:06:32.458646 PCI: 00:16.4: enabled 0
1720 20:06:32.458730 PCI: 00:16.5: enabled 0
1721 20:06:32.461911 PCI: 00:17.0: enabled 0
1722 20:06:32.465367 PCI: 00:19.0: enabled 0
1723 20:06:32.468585 PCI: 00:19.1: enabled 1
1724 20:06:32.468688 PCI: 00:19.2: enabled 0
1725 20:06:32.471708 PCI: 00:1c.0: enabled 1
1726 20:06:32.475179 PCI: 00:1c.1: enabled 0
1727 20:06:32.478550 PCI: 00:1c.2: enabled 0
1728 20:06:32.478634 PCI: 00:1c.3: enabled 0
1729 20:06:32.481894 PCI: 00:1c.4: enabled 0
1730 20:06:32.484567 PCI: 00:1c.5: enabled 0
1731 20:06:32.488502 PCI: 00:1c.6: enabled 1
1732 20:06:32.488616 PCI: 00:1c.7: enabled 0
1733 20:06:32.491862 PCI: 00:1d.0: enabled 1
1734 20:06:32.495002 PCI: 00:1d.1: enabled 0
1735 20:06:32.495089 PCI: 00:1d.2: enabled 1
1736 20:06:32.498219
1737 20:06:32.498299 PCI: 00:1d.3: enabled 0
1738 20:06:32.501499 PCI: 00:1e.0: enabled 1
1739 20:06:32.504641 PCI: 00:1e.1: enabled 0
1740 20:06:32.504734 PCI: 00:1e.2: enabled 1
1741 20:06:32.507881 PCI: 00:1e.3: enabled 1
1742 20:06:32.511365 PCI: 00:1f.0: enabled 1
1743 20:06:32.515153 PCI: 00:1f.1: enabled 0
1744 20:06:32.515239 PCI: 00:1f.2: enabled 1
1745 20:06:32.518239 PCI: 00:1f.3: enabled 1
1746 20:06:32.521356 PCI: 00:1f.4: enabled 0
1747 20:06:32.524413 PCI: 00:1f.5: enabled 1
1748 20:06:32.524497 PCI: 00:1f.6: enabled 0
1749 20:06:32.528206 PCI: 00:1f.7: enabled 0
1750 20:06:32.531522 APIC: 00: enabled 1
1751 20:06:32.531607 GENERIC: 0.0: enabled 1
1752 20:06:32.534651 GENERIC: 0.0: enabled 1
1753 20:06:32.537832 GENERIC: 1.0: enabled 1
1754 20:06:32.541258 GENERIC: 0.0: enabled 1
1755 20:06:32.541343 GENERIC: 1.0: enabled 1
1756 20:06:32.544410 USB0 port 0: enabled 1
1757 20:06:32.547812 GENERIC: 0.0: enabled 1
1758 20:06:32.551183 USB0 port 0: enabled 1
1759 20:06:32.551267 GENERIC: 0.0: enabled 1
1760 20:06:32.554458 I2C: 00:1a: enabled 1
1761 20:06:32.557674 I2C: 00:31: enabled 1
1762 20:06:32.557790 I2C: 00:32: enabled 1
1763 20:06:32.561156 I2C: 00:10: enabled 1
1764 20:06:32.564527 I2C: 00:15: enabled 1
1765 20:06:32.564611 GENERIC: 0.0: enabled 0
1766 20:06:32.567857 GENERIC: 1.0: enabled 0
1767 20:06:32.570624 GENERIC: 0.0: enabled 1
1768 20:06:32.570708 SPI: 00: enabled 1
1769 20:06:32.573925 SPI: 00: enabled 1
1770 20:06:32.577886 PNP: 0c09.0: enabled 1
1771 20:06:32.580583 GENERIC: 0.0: enabled 1
1772 20:06:32.580662 USB3 port 0: enabled 1
1773 20:06:32.583954 USB3 port 1: enabled 1
1774 20:06:32.587199 USB3 port 2: enabled 0
1775 20:06:32.587311 USB3 port 3: enabled 0
1776 20:06:32.590531 USB2 port 0: enabled 0
1777 20:06:32.593927 USB2 port 1: enabled 1
1778 20:06:32.594013 USB2 port 2: enabled 1
1779 20:06:32.597236 USB2 port 3: enabled 0
1780 20:06:32.600560 USB2 port 4: enabled 1
1781 20:06:32.604154 USB2 port 5: enabled 0
1782 20:06:32.604238 USB2 port 6: enabled 0
1783 20:06:32.607178 USB2 port 7: enabled 0
1784 20:06:32.610291 USB2 port 8: enabled 0
1785 20:06:32.610383 USB2 port 9: enabled 0
1786 20:06:32.613642 USB3 port 0: enabled 0
1787 20:06:32.617043 USB3 port 1: enabled 1
1788 20:06:32.620162 USB3 port 2: enabled 0
1789 20:06:32.620248 USB3 port 3: enabled 0
1790 20:06:32.623991 GENERIC: 0.0: enabled 1
1791 20:06:32.627247 GENERIC: 1.0: enabled 1
1792 20:06:32.627331 APIC: 01: enabled 1
1793 20:06:32.630363 APIC: 07: enabled 1
1794 20:06:32.633909 APIC: 03: enabled 1
1795 20:06:32.634013 APIC: 04: enabled 1
1796 20:06:32.636914 APIC: 06: enabled 1
1797 20:06:32.636999 APIC: 02: enabled 1
1798 20:06:32.640646 APIC: 05: enabled 1
1799 20:06:32.644020 PCI: 01:00.0: enabled 1
1800 20:06:32.647176 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1801 20:06:32.654034 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1802 20:06:32.657444 ELOG: NV offset 0xf30000 size 0x1000
1803 20:06:32.663964 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1804 20:06:32.670664 ELOG: Event(17) added with size 13 at 2022-12-19 20:06:31 UTC
1805 20:06:32.677190 ELOG: Event(92) added with size 9 at 2022-12-19 20:06:31 UTC
1806 20:06:32.684019 ELOG: Event(93) added with size 9 at 2022-12-19 20:06:31 UTC
1807 20:06:32.690684 ELOG: Event(9E) added with size 10 at 2022-12-19 20:06:31 UTC
1808 20:06:32.697163 ELOG: Event(9F) added with size 14 at 2022-12-19 20:06:31 UTC
1809 20:06:32.703820 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1810 20:06:32.707307 ELOG: Event(A1) added with size 10 at 2022-12-19 20:06:31 UTC
1811 20:06:32.710435
1812 20:06:32.716942 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1813 20:06:32.723289 ELOG: Event(A0) added with size 9 at 2022-12-19 20:06:31 UTC
1814 20:06:32.727190 elog_add_boot_reason: Logged dev mode boot
1815 20:06:32.733444 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1816 20:06:32.733580 Finalize devices...
1817 20:06:32.736818 Devices finalized
1818 20:06:32.743193 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1819 20:06:32.746508 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1820 20:06:32.753763 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1821 20:06:32.757219 ME: HFSTS1 : 0x80030055
1822 20:06:32.763076 ME: HFSTS2 : 0x30280116
1823 20:06:32.766439 ME: HFSTS3 : 0x00000050
1824 20:06:32.770202 ME: HFSTS4 : 0x00004000
1825 20:06:32.776488 ME: HFSTS5 : 0x00000000
1826 20:06:32.780367 ME: HFSTS6 : 0x40400006
1827 20:06:32.783660 ME: Manufacturing Mode : YES
1828 20:06:32.786146 ME: SPI Protection Mode Enabled : NO
1829 20:06:32.790065 ME: FW Partition Table : OK
1830 20:06:32.796152 ME: Bringup Loader Failure : NO
1831 20:06:32.799459 ME: Firmware Init Complete : NO
1832 20:06:32.802811 ME: Boot Options Present : NO
1833 20:06:32.806096 ME: Update In Progress : NO
1834 20:06:32.809370 ME: D0i3 Support : YES
1835 20:06:32.813220 ME: Low Power State Enabled : NO
1836 20:06:32.816434 ME: CPU Replaced : YES
1837 20:06:32.822816 ME: CPU Replacement Valid : YES
1838 20:06:32.826116 ME: Current Working State : 5
1839 20:06:32.829182 ME: Current Operation State : 1
1840 20:06:32.833017 ME: Current Operation Mode : 3
1841 20:06:32.836154 ME: Error Code : 0
1842 20:06:32.839409 ME: Enhanced Debug Mode : NO
1843 20:06:32.842612 ME: CPU Debug Disabled : YES
1844 20:06:32.845847 ME: TXT Support : NO
1845 20:06:32.852369 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1846 20:06:32.859198 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1847 20:06:32.862467 CBFS: 'fallback/slic' not found.
1848 20:06:32.869200 ACPI: Writing ACPI tables at 76b01000.
1849 20:06:32.869312 ACPI: * FACS
1850 20:06:32.872669 ACPI: * DSDT
1851 20:06:32.875827 Ramoops buffer: 0x100000@0x76a00000.
1852 20:06:32.879275 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1853 20:06:32.885995 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1854 20:06:32.889179 Google Chrome EC: version:
1855 20:06:32.892469 ro: voema_v2.0.10114-a447f03e46
1856 20:06:32.895829 rw: voema_v2.0.10132-7b2059e3bc
1857 20:06:32.895935 running image: 2
1858 20:06:32.902557 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1859 20:06:32.907392 ACPI: * FADT
1860 20:06:32.907512 SCI is IRQ9
1861 20:06:32.910398 ACPI: added table 1/32, length now 40
1862 20:06:32.913772
1863 20:06:32.913876 ACPI: * SSDT
1864 20:06:32.917373 Found 1 CPU(s) with 8 core(s) each.
1865 20:06:32.923731 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1866 20:06:32.927003 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1867 20:06:32.930253 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1868 20:06:32.933465 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1869 20:06:32.940137 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1870 20:06:32.946350 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1871 20:06:32.950260 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1872 20:06:32.956959 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1873 20:06:32.963528 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1874 20:06:32.966259 \_SB.PCI0.RP09: Added StorageD3Enable property
1875 20:06:32.972996 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1876 20:06:32.976363 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1877 20:06:32.983634 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1878 20:06:32.986324 PS2K: Passing 80 keymaps to kernel
1879 20:06:32.993002 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1880 20:06:32.999481 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1881 20:06:33.006217 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1882 20:06:33.012957 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1883 20:06:33.020108 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1884 20:06:33.025847 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1885 20:06:33.033133 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1886 20:06:33.039434 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1887 20:06:33.042691 ACPI: added table 2/32, length now 44
1888 20:06:33.045945 ACPI: * MCFG
1889 20:06:33.049367 ACPI: added table 3/32, length now 48
1890 20:06:33.049501 ACPI: * TPM2
1891 20:06:33.052548 TPM2 log created at 0x769f0000
1892 20:06:33.056049 ACPI: added table 4/32, length now 52
1893 20:06:33.059114 ACPI: * MADT
1894 20:06:33.059221 SCI is IRQ9
1895 20:06:33.062531 ACPI: added table 5/32, length now 56
1896 20:06:33.066002 current = 76b09850
1897 20:06:33.066090 ACPI: * DMAR
1898 20:06:33.072843 ACPI: added table 6/32, length now 60
1899 20:06:33.076323 ACPI: added table 7/32, length now 64
1900 20:06:33.076428 ACPI: * HPET
1901 20:06:33.079341 ACPI: added table 8/32, length now 68
1902 20:06:33.082632 ACPI: done.
1903 20:06:33.085985 ACPI tables: 35216 bytes.
1904 20:06:33.086115 smbios_write_tables: 769ef000
1905 20:06:33.089469
1906 20:06:33.092490 EC returned error result code 3
1907 20:06:33.095679 Couldn't obtain OEM name from CBI
1908 20:06:33.099015 Create SMBIOS type 16
1909 20:06:33.099136 Create SMBIOS type 17
1910 20:06:33.102485 GENERIC: 0.0 (WIFI Device)
1911 20:06:33.105533 SMBIOS tables: 1734 bytes.
1912 20:06:33.108866 Writing table forward entry at 0x00000500
1913 20:06:33.115563 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1914 20:06:33.118852 Writing coreboot table at 0x76b25000
1915 20:06:33.125820 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1916 20:06:33.129028 1. 0000000000001000-000000000009ffff: RAM
1917 20:06:33.135471 2. 00000000000a0000-00000000000fffff: RESERVED
1918 20:06:33.138706 3. 0000000000100000-00000000769eefff: RAM
1919 20:06:33.145302 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1920 20:06:33.148311 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1921 20:06:33.155590 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1922 20:06:33.162210 7. 0000000077000000-000000007fbfffff: RESERVED
1923 20:06:33.165464 8. 00000000c0000000-00000000cfffffff: RESERVED
1924 20:06:33.172088 9. 00000000f8000000-00000000f9ffffff: RESERVED
1925 20:06:33.175354 10. 00000000fb000000-00000000fb000fff: RESERVED
1926 20:06:33.178702 11. 00000000fe000000-00000000fe00ffff: RESERVED
1927 20:06:33.185465 12. 00000000fed80000-00000000fed87fff: RESERVED
1928 20:06:33.188689 13. 00000000fed90000-00000000fed92fff: RESERVED
1929 20:06:33.195531 14. 00000000feda0000-00000000feda1fff: RESERVED
1930 20:06:33.199001 15. 00000000fedc0000-00000000feddffff: RESERVED
1931 20:06:33.201543 16. 0000000100000000-00000004803fffff: RAM
1932 20:06:33.204958
1933 20:06:33.205078 Passing 4 GPIOs to payload:
1934 20:06:33.211481 NAME | PORT | POLARITY | VALUE
1935 20:06:33.218158 lid | undefined | high | high
1936 20:06:33.221518 power | undefined | high | low
1937 20:06:33.228236 oprom | undefined | high | low
1938 20:06:33.231424 EC in RW | 0x000000e5 | high | high
1939 20:06:33.238081 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 7e26
1940 20:06:33.241617 coreboot table: 1576 bytes.
1941 20:06:33.244868 IMD ROOT 0. 0x76fff000 0x00001000
1942 20:06:33.248100 IMD SMALL 1. 0x76ffe000 0x00001000
1943 20:06:33.251757 FSP MEMORY 2. 0x76c4e000 0x003b0000
1944 20:06:33.258254 VPD 3. 0x76c4d000 0x00000367
1945 20:06:33.261647 RO MCACHE 4. 0x76c4c000 0x00000fdc
1946 20:06:33.265061 CONSOLE 5. 0x76c2c000 0x00020000
1947 20:06:33.268157 FMAP 6. 0x76c2b000 0x00000578
1948 20:06:33.271512 TIME STAMP 7. 0x76c2a000 0x00000910
1949 20:06:33.274873 VBOOT WORK 8. 0x76c16000 0x00014000
1950 20:06:33.278289 ROMSTG STCK 9. 0x76c15000 0x00001000
1951 20:06:33.281594 AFTER CAR 10. 0x76c0a000 0x0000b000
1952 20:06:33.288131 RAMSTAGE 11. 0x76b97000 0x00073000
1953 20:06:33.291736 REFCODE 12. 0x76b42000 0x00055000
1954 20:06:33.294179 SMM BACKUP 13. 0x76b32000 0x00010000
1955 20:06:33.297438 4f444749 14. 0x76b30000 0x00002000
1956 20:06:33.301318 EXT VBT15. 0x76b2d000 0x0000219f
1957 20:06:33.304287 COREBOOT 16. 0x76b25000 0x00008000
1958 20:06:33.307426 ACPI 17. 0x76b01000 0x00024000
1959 20:06:33.310829 ACPI GNVS 18. 0x76b00000 0x00001000
1960 20:06:33.317462 RAMOOPS 19. 0x76a00000 0x00100000
1961 20:06:33.320981 TPM2 TCGLOG20. 0x769f0000 0x00010000
1962 20:06:33.324191 SMBIOS 21. 0x769ef000 0x00000800
1963 20:06:33.324278 IMD small region:
1964 20:06:33.330641 IMD ROOT 0. 0x76ffec00 0x00000400
1965 20:06:33.333994 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1966 20:06:33.337208 POWER STATE 2. 0x76ffeb80 0x00000044
1967 20:06:33.340491 ROMSTAGE 3. 0x76ffeb60 0x00000004
1968 20:06:33.343830 MEM INFO 4. 0x76ffe980 0x000001e0
1969 20:06:33.350324 BS: BS_WRITE_TABLES run times (exec / console): 8 / 484 ms
1970 20:06:33.353674 MTRR: Physical address space:
1971 20:06:33.360288 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1972 20:06:33.367512 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1973 20:06:33.373513 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1974 20:06:33.380300 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1975 20:06:33.383615 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1976 20:06:33.390198 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1977 20:06:33.396929 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1978 20:06:33.400217 MTRR: Fixed MSR 0x250 0x0606060606060606
1979 20:06:33.406867 MTRR: Fixed MSR 0x258 0x0606060606060606
1980 20:06:33.410314 MTRR: Fixed MSR 0x259 0x0000000000000000
1981 20:06:33.413570 MTRR: Fixed MSR 0x268 0x0606060606060606
1982 20:06:33.417002 MTRR: Fixed MSR 0x269 0x0606060606060606
1983 20:06:33.423316 MTRR: Fixed MSR 0x26a 0x0606060606060606
1984 20:06:33.427076 MTRR: Fixed MSR 0x26b 0x0606060606060606
1985 20:06:33.430553 MTRR: Fixed MSR 0x26c 0x0606060606060606
1986 20:06:33.433160 MTRR: Fixed MSR 0x26d 0x0606060606060606
1987 20:06:33.439804 MTRR: Fixed MSR 0x26e 0x0606060606060606
1988 20:06:33.443143 MTRR: Fixed MSR 0x26f 0x0606060606060606
1989 20:06:33.446534 call enable_fixed_mtrr()
1990 20:06:33.449766 CPU physical address size: 39 bits
1991 20:06:33.456762 MTRR: default type WB/UC MTRR counts: 6/7.
1992 20:06:33.460180 MTRR: WB selected as default type.
1993 20:06:33.463363 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1994 20:06:33.469832 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1995 20:06:33.476505 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1996 20:06:33.483226 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1997 20:06:33.489837 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1998 20:06:33.496578 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1999 20:06:33.500163
2000 20:06:33.500252 MTRR check
2001 20:06:33.503251 Fixed MTRRs : Enabled
2002 20:06:33.503336 Variable MTRRs: Enabled
2003 20:06:33.503403
2004 20:06:33.509949 MTRR: Fixed MSR 0x250 0x0606060606060606
2005 20:06:33.513259 MTRR: Fixed MSR 0x258 0x0606060606060606
2006 20:06:33.516788 MTRR: Fixed MSR 0x259 0x0000000000000000
2007 20:06:33.519868 MTRR: Fixed MSR 0x268 0x0606060606060606
2008 20:06:33.526465 MTRR: Fixed MSR 0x269 0x0606060606060606
2009 20:06:33.529626 MTRR: Fixed MSR 0x26a 0x0606060606060606
2010 20:06:33.532927 MTRR: Fixed MSR 0x26b 0x0606060606060606
2011 20:06:33.536254 MTRR: Fixed MSR 0x26c 0x0606060606060606
2012 20:06:33.542828 MTRR: Fixed MSR 0x26d 0x0606060606060606
2013 20:06:33.546234 MTRR: Fixed MSR 0x26e 0x0606060606060606
2014 20:06:33.549126 MTRR: Fixed MSR 0x26f 0x0606060606060606
2015 20:06:33.556558 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
2016 20:06:33.560339 call enable_fixed_mtrr()
2017 20:06:33.563688 Checking cr50 for pending updates
2018 20:06:33.566917 CPU physical address size: 39 bits
2019 20:06:33.570876 MTRR: Fixed MSR 0x250 0x0606060606060606
2020 20:06:33.574176 MTRR: Fixed MSR 0x250 0x0606060606060606
2021 20:06:33.577719 MTRR: Fixed MSR 0x258 0x0606060606060606
2022 20:06:33.580993
2023 20:06:33.584191 MTRR: Fixed MSR 0x259 0x0000000000000000
2024 20:06:33.587674 MTRR: Fixed MSR 0x268 0x0606060606060606
2025 20:06:33.590794 MTRR: Fixed MSR 0x269 0x0606060606060606
2026 20:06:33.594326 MTRR: Fixed MSR 0x26a 0x0606060606060606
2027 20:06:33.600909 MTRR: Fixed MSR 0x26b 0x0606060606060606
2028 20:06:33.604155 MTRR: Fixed MSR 0x26c 0x0606060606060606
2029 20:06:33.607464 MTRR: Fixed MSR 0x26d 0x0606060606060606
2030 20:06:33.610844 MTRR: Fixed MSR 0x26e 0x0606060606060606
2031 20:06:33.617230 MTRR: Fixed MSR 0x26f 0x0606060606060606
2032 20:06:33.620487 MTRR: Fixed MSR 0x258 0x0606060606060606
2033 20:06:33.623815 call enable_fixed_mtrr()
2034 20:06:33.627180 MTRR: Fixed MSR 0x259 0x0000000000000000
2035 20:06:33.634187 MTRR: Fixed MSR 0x268 0x0606060606060606
2036 20:06:33.636981 MTRR: Fixed MSR 0x269 0x0606060606060606
2037 20:06:33.640306 MTRR: Fixed MSR 0x26a 0x0606060606060606
2038 20:06:33.643473 MTRR: Fixed MSR 0x26b 0x0606060606060606
2039 20:06:33.650566 MTRR: Fixed MSR 0x26c 0x0606060606060606
2040 20:06:33.653829 MTRR: Fixed MSR 0x26d 0x0606060606060606
2041 20:06:33.657183 MTRR: Fixed MSR 0x26e 0x0606060606060606
2042 20:06:33.660440 MTRR: Fixed MSR 0x26f 0x0606060606060606
2043 20:06:33.664743 CPU physical address size: 39 bits
2044 20:06:33.671184 call enable_fixed_mtrr()
2045 20:06:33.674558 MTRR: Fixed MSR 0x250 0x0606060606060606
2046 20:06:33.677848 MTRR: Fixed MSR 0x250 0x0606060606060606
2047 20:06:33.681361 MTRR: Fixed MSR 0x258 0x0606060606060606
2048 20:06:33.684558
2049 20:06:33.688020 MTRR: Fixed MSR 0x259 0x0000000000000000
2050 20:06:33.691202 MTRR: Fixed MSR 0x268 0x0606060606060606
2051 20:06:33.694573 MTRR: Fixed MSR 0x269 0x0606060606060606
2052 20:06:33.697770 MTRR: Fixed MSR 0x26a 0x0606060606060606
2053 20:06:33.704370 MTRR: Fixed MSR 0x26b 0x0606060606060606
2054 20:06:33.707604 MTRR: Fixed MSR 0x26c 0x0606060606060606
2055 20:06:33.711012 MTRR: Fixed MSR 0x26d 0x0606060606060606
2056 20:06:33.714241 MTRR: Fixed MSR 0x26e 0x0606060606060606
2057 20:06:33.721099 MTRR: Fixed MSR 0x26f 0x0606060606060606
2058 20:06:33.724291 MTRR: Fixed MSR 0x258 0x0606060606060606
2059 20:06:33.727582 call enable_fixed_mtrr()
2060 20:06:33.731027 MTRR: Fixed MSR 0x259 0x0000000000000000
2061 20:06:33.737544 MTRR: Fixed MSR 0x268 0x0606060606060606
2062 20:06:33.740925 MTRR: Fixed MSR 0x269 0x0606060606060606
2063 20:06:33.744339 MTRR: Fixed MSR 0x26a 0x0606060606060606
2064 20:06:33.747496 MTRR: Fixed MSR 0x26b 0x0606060606060606
2065 20:06:33.754231 MTRR: Fixed MSR 0x26c 0x0606060606060606
2066 20:06:33.757493 MTRR: Fixed MSR 0x26d 0x0606060606060606
2067 20:06:33.760617 MTRR: Fixed MSR 0x26e 0x0606060606060606
2068 20:06:33.763762 MTRR: Fixed MSR 0x26f 0x0606060606060606
2069 20:06:33.768514 CPU physical address size: 39 bits
2070 20:06:33.775756 call enable_fixed_mtrr()
2071 20:06:33.778440 MTRR: Fixed MSR 0x250 0x0606060606060606
2072 20:06:33.781853 MTRR: Fixed MSR 0x250 0x0606060606060606
2073 20:06:33.785221 MTRR: Fixed MSR 0x258 0x0606060606060606
2074 20:06:33.791800 MTRR: Fixed MSR 0x259 0x0000000000000000
2075 20:06:33.795074 MTRR: Fixed MSR 0x268 0x0606060606060606
2076 20:06:33.798467 MTRR: Fixed MSR 0x269 0x0606060606060606
2077 20:06:33.801611 MTRR: Fixed MSR 0x26a 0x0606060606060606
2078 20:06:33.808298 MTRR: Fixed MSR 0x26b 0x0606060606060606
2079 20:06:33.811498 MTRR: Fixed MSR 0x26c 0x0606060606060606
2080 20:06:33.814985 MTRR: Fixed MSR 0x26d 0x0606060606060606
2081 20:06:33.818248 MTRR: Fixed MSR 0x26e 0x0606060606060606
2082 20:06:33.824866 MTRR: Fixed MSR 0x26f 0x0606060606060606
2083 20:06:33.828438 MTRR: Fixed MSR 0x258 0x0606060606060606
2084 20:06:33.831572 call enable_fixed_mtrr()
2085 20:06:33.835001 MTRR: Fixed MSR 0x259 0x0000000000000000
2086 20:06:33.841398 MTRR: Fixed MSR 0x268 0x0606060606060606
2087 20:06:33.844827 MTRR: Fixed MSR 0x269 0x0606060606060606
2088 20:06:33.848026 MTRR: Fixed MSR 0x26a 0x0606060606060606
2089 20:06:33.851487 MTRR: Fixed MSR 0x26b 0x0606060606060606
2090 20:06:33.857994 MTRR: Fixed MSR 0x26c 0x0606060606060606
2091 20:06:33.861296 MTRR: Fixed MSR 0x26d 0x0606060606060606
2092 20:06:33.864565 MTRR: Fixed MSR 0x26e 0x0606060606060606
2093 20:06:33.867762 MTRR: Fixed MSR 0x26f 0x0606060606060606
2094 20:06:33.873013 CPU physical address size: 39 bits
2095 20:06:33.879635 call enable_fixed_mtrr()
2096 20:06:33.882957 CPU physical address size: 39 bits
2097 20:06:33.887015 Reading cr50 TPM mode
2098 20:06:33.887099 CPU physical address size: 39 bits
2099 20:06:33.890377 CPU physical address size: 39 bits
2100 20:06:33.897129 BS: BS_PAYLOAD_LOAD entry times (exec / console): 326 / 6 ms
2101 20:06:33.903702 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2102 20:06:33.910109 Checking segment from ROM address 0xffc02b38
2103 20:06:33.913435 Checking segment from ROM address 0xffc02b54
2104 20:06:33.917311 Loading segment from ROM address 0xffc02b38
2105 20:06:33.920036 code (compression=0)
2106 20:06:33.930075 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2107 20:06:33.936930 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2108 20:06:33.940077 it's not compressed!
2109 20:06:34.079640 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2110 20:06:34.086283 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2111 20:06:34.093110 Loading segment from ROM address 0xffc02b54
2112 20:06:34.096936 Entry Point 0x30000000
2113 20:06:34.097025 Loaded segments
2114 20:06:34.103478 BS: BS_PAYLOAD_LOAD run times (exec / console): 136 / 63 ms
2115 20:06:34.148269 Finalizing chipset.
2116 20:06:34.151607 Finalizing SMM.
2117 20:06:34.151706 APMC done.
2118 20:06:34.158106 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2119 20:06:34.161324 mp_park_aps done after 0 msecs.
2120 20:06:34.164524 Jumping to boot code at 0x30000000(0x76b25000)
2121 20:06:34.174960 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2122 20:06:34.175051
2123 20:06:34.175118
2124 20:06:34.177739
2125 20:06:34.177824 Starting depthcharge on Voema...
2126 20:06:34.178172 end: 2.2.3 depthcharge-start (duration 00:00:17) [common]
2127 20:06:34.178270 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
2128 20:06:34.178351 Setting prompt string to ['volteer:']
2129 20:06:34.178429 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:43)
2130 20:06:34.181735
2131 20:06:34.187830 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2132 20:06:34.187917
2133 20:06:34.194668 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2134 20:06:34.194760
2135 20:06:34.201190 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2136 20:06:34.201277
2137 20:06:34.204509 Failed to find eMMC card reader
2138 20:06:34.204594
2139 20:06:34.208111 Wipe memory regions:
2140 20:06:34.208223
2141 20:06:34.211114 [0x00000000001000, 0x000000000a0000)
2142 20:06:34.211200
2143 20:06:34.214504 [0x00000000100000, 0x00000030000000)
2144 20:06:34.214590
2145 20:06:34.251583 [0x00000032662db0, 0x000000769ef000)
2146 20:06:34.251690
2147 20:06:34.302844 [0x00000100000000, 0x00000480400000)
2148 20:06:34.302964
2149 20:06:34.913571 ec_init: CrosEC protocol v3 supported (256, 256)
2150 20:06:34.913705
2151 20:06:35.344004 R8152: Initializing
2152 20:06:35.344138
2153 20:06:35.347256 Version 6 (ocp_data = 5c30)
2154 20:06:35.347342
2155 20:06:35.350471 R8152: Done initializing
2156 20:06:35.350556
2157 20:06:35.353807 Adding net device
2158 20:06:35.353892
2159 20:06:35.658498 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2160 20:06:35.658637
2161 20:06:35.658705
2162 20:06:35.658767
2163 20:06:35.662159 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2165 20:06:35.762946 volteer: tftpboot 192.168.201.1 8411817/tftp-deploy-2ypstklr/kernel/bzImage 8411817/tftp-deploy-2ypstklr/kernel/cmdline 8411817/tftp-deploy-2ypstklr/ramdisk/ramdisk.cpio.gz
2166 20:06:35.763160 Setting prompt string to 'Starting kernel'
2167 20:06:35.763281 Setting prompt string to ['Starting kernel']
2168 20:06:35.763364 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2169 20:06:35.763484 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:41)
2170 20:06:35.767558 tftpboot 192.168.201.1 8411817/tftp-deploy-2ypstklr/kernel/bzImaoy-2ypstklr/kernel/cmdline 8411817/tftp-deploy-2ypstklr/ramdisk/ramdisk.cpio.gz
2171 20:06:35.767649
2172 20:06:35.767716 Waiting for link
2173 20:06:35.767778
2174 20:06:35.970108 done.
2175 20:06:35.970248
2176 20:06:35.970315 MAC: 00:24:32:30:7e:22
2177 20:06:35.970377
2178 20:06:35.973278 Sending DHCP discover... done.
2179 20:06:35.973364
2180 20:06:35.976534 Waiting for reply... done.
2181 20:06:35.976619
2182 20:06:35.979773 Sending DHCP request... done.
2183 20:06:35.979858
2184 20:06:35.983628 Waiting for reply... done.
2185 20:06:35.983713
2186 20:06:35.986961 My ip is 192.168.201.21
2187 20:06:35.987046
2188 20:06:35.990176 The DHCP server ip is 192.168.201.1
2189 20:06:35.990263
2190 20:06:35.993485 TFTP server IP predefined by user: 192.168.201.1
2191 20:06:35.993571
2192 20:06:35.999767 Bootfile predefined by user: 8411817/tftp-deploy-2ypstklr/kernel/bzImage
2193 20:06:35.999856
2194 20:06:36.003183 Sending tftp read request... done.
2195 20:06:36.003267
2196 20:06:36.009842 Waiting for the transfer...
2197 20:06:36.009929
2198 20:06:36.540024 00000000 ################################################################
2199 20:06:36.540159
2200 20:06:37.071488 00080000 ################################################################
2201 20:06:37.071645
2202 20:06:37.601920 00100000 ################################################################
2203 20:06:37.602057
2204 20:06:38.140928 00180000 ################################################################
2205 20:06:38.141103
2206 20:06:38.661587 00200000 ################################################################
2207 20:06:38.661719
2208 20:06:39.185026 00280000 ################################################################
2209 20:06:39.185196
2210 20:06:39.701372 00300000 ################################################################
2211 20:06:39.701549
2212 20:06:40.222832 00380000 ################################################################
2213 20:06:40.222983
2214 20:06:40.746821 00400000 ################################################################
2215 20:06:40.746961
2216 20:06:41.265536 00480000 ################################################################
2217 20:06:41.265698
2218 20:06:41.789827 00500000 ################################################################
2219 20:06:41.789967
2220 20:06:42.314130 00580000 ################################################################
2221 20:06:42.314271
2222 20:06:42.840794 00600000 ################################################################
2223 20:06:42.840934
2224 20:06:43.366711 00680000 ################################################################
2225 20:06:43.366845
2226 20:06:43.608652 00700000 ############################# done.
2227 20:06:43.608843
2228 20:06:43.612110 The bootfile was 7573392 bytes long.
2229 20:06:43.612229
2230 20:06:43.614924 Sending tftp read request... done.
2231 20:06:43.615009
2232 20:06:43.618553 Waiting for the transfer...
2233 20:06:43.618661
2234 20:06:44.141868 00000000 ################################################################
2235 20:06:44.142028
2236 20:06:44.651923 00080000 ################################################################
2237 20:06:44.652071
2238 20:06:45.171173 00100000 ################################################################
2239 20:06:45.171368
2240 20:06:45.682390 00180000 ################################################################
2241 20:06:45.682524
2242 20:06:46.209013 00200000 ################################################################
2243 20:06:46.209232
2244 20:06:46.734603 00280000 ################################################################
2245 20:06:46.734745
2246 20:06:47.259796 00300000 ################################################################
2247 20:06:47.259939
2248 20:06:47.774613 00380000 ################################################################
2249 20:06:47.774752
2250 20:06:48.294563 00400000 ################################################################
2251 20:06:48.294714
2252 20:06:48.811546 00480000 ################################################################
2253 20:06:48.811684
2254 20:06:49.343446 00500000 ################################################################
2255 20:06:49.343595
2256 20:06:49.883623 00580000 ################################################################
2257 20:06:49.883754
2258 20:06:50.420807 00600000 ################################################################
2259 20:06:50.420950
2260 20:06:50.949277 00680000 ################################################################
2261 20:06:50.949416
2262 20:06:51.477334 00700000 ################################################################
2263 20:06:51.477475
2264 20:06:52.022955 00780000 ################################################################
2265 20:06:52.023092
2266 20:06:52.188542 00800000 #################### done.
2267 20:06:52.188672
2268 20:06:52.192095 Sending tftp read request... done.
2269 20:06:52.192176
2270 20:06:52.192243 Waiting for the transfer...
2271 20:06:52.192304
2272 20:06:52.195452 00000000 # done.
2273 20:06:52.195533
2274 20:06:52.205784 Command line loaded dynamically from TFTP file: 8411817/tftp-deploy-2ypstklr/kernel/cmdline
2275 20:06:52.205865
2276 20:06:52.218378 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2277 20:06:52.218468
2278 20:06:52.221966 Shutting down all USB controllers.
2279 20:06:52.222044
2280 20:06:52.225538 Removing current net device
2281 20:06:52.225619
2282 20:06:52.228309 Finalizing coreboot
2283 20:06:52.228390
2284 20:06:52.235114 Exiting depthcharge with code 4 at timestamp: 26629249
2285 20:06:52.235193
2286 20:06:52.235256
2287 20:06:52.235320 Starting kernel ...
2288 20:06:52.235377
2289 20:06:52.235434
2290 20:06:52.235490
2291 20:06:52.235859 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2292 20:06:52.235957 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2293 20:06:52.236035 Setting prompt string to ['Linux version [0-9]']
2294 20:06:52.236106 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2295 20:06:52.236175 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2297 20:11:17.236915 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2299 20:11:17.237948 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2301 20:11:17.238755 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2304 20:11:17.240090 end: 2 depthcharge-action (duration 00:05:00) [common]
2306 20:11:17.241204 Cleaning after the job
2307 20:11:17.241620 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8411817/tftp-deploy-2ypstklr/ramdisk
2308 20:11:17.244452 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8411817/tftp-deploy-2ypstklr/kernel
2309 20:11:17.247070 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8411817/tftp-deploy-2ypstklr/modules
2310 20:11:17.248019 start: 5.1 power-off (timeout 00:00:30) [common]
2311 20:11:17.248824 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-14' '--port=1' '--command=off'
2312 20:11:17.308461 >> Command sent successfully.
2313 20:11:17.311075 Returned 0 in 0 seconds
2314 20:11:17.412252 end: 5.1 power-off (duration 00:00:00) [common]
2316 20:11:17.413671 start: 5.2 read-feedback (timeout 00:10:00) [common]
2317 20:11:17.414810 Listened to connection for namespace 'common' for up to 1s
2318 20:11:18.419123 Finalising connection for namespace 'common'
2319 20:11:18.419816 Disconnecting from shell: Finalise
2320 20:11:18.521255 end: 5.2 read-feedback (duration 00:00:01) [common]
2321 20:11:18.521862 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8411817
2322 20:11:18.528940 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8411817
2323 20:11:18.529076 JobError: Your job cannot terminate cleanly.