Boot log: asus-cx9400-volteer

    1 20:06:27.869238  lava-dispatcher, installed at version: 2022.11
    2 20:06:27.869430  start: 0 validate
    3 20:06:27.869601  Start time: 2022-12-19 20:06:27.869593+00:00 (UTC)
    4 20:06:27.869726  Using caching service: 'http://localhost/cache/?uri=%s'
    5 20:06:27.869856  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20221216.0%2Famd64%2Frootfs.cpio.gz exists
    6 20:06:27.879069  Using caching service: 'http://localhost/cache/?uri=%s'
    7 20:06:27.879194  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-234-g4e6ec7162c8e%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 20:06:27.894328  Using caching service: 'http://localhost/cache/?uri=%s'
    9 20:06:27.894845  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-234-g4e6ec7162c8e%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 20:06:27.915819  validate duration: 0.05
   12 20:06:27.916749  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 20:06:27.917180  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 20:06:27.917601  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 20:06:27.918033  Not decompressing ramdisk as can be used compressed.
   16 20:06:27.918422  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20221216.0/amd64/rootfs.cpio.gz
   17 20:06:27.918692  saving as /var/lib/lava/dispatcher/tmp/8411780/tftp-deploy-fqdjc_6f/ramdisk/rootfs.cpio.gz
   18 20:06:27.918970  total size: 35747197 (34MB)
   19 20:06:27.933004  progress   0% (0MB)
   20 20:06:27.995025  progress   5% (1MB)
   21 20:06:28.056684  progress  10% (3MB)
   22 20:06:28.120151  progress  15% (5MB)
   23 20:06:28.181171  progress  20% (6MB)
   24 20:06:28.240871  progress  25% (8MB)
   25 20:06:28.303335  progress  30% (10MB)
   26 20:06:28.363672  progress  35% (11MB)
   27 20:06:28.427892  progress  40% (13MB)
   28 20:06:28.489139  progress  45% (15MB)
   29 20:06:28.549806  progress  50% (17MB)
   30 20:06:28.612914  progress  55% (18MB)
   31 20:06:28.672669  progress  60% (20MB)
   32 20:06:28.733951  progress  65% (22MB)
   33 20:06:28.797073  progress  70% (23MB)
   34 20:06:28.859106  progress  75% (25MB)
   35 20:06:28.918370  progress  80% (27MB)
   36 20:06:28.979645  progress  85% (29MB)
   37 20:06:29.040203  progress  90% (30MB)
   38 20:06:29.157652  progress  95% (32MB)
   39 20:06:29.280507  progress 100% (34MB)
   40 20:06:29.280883  34MB downloaded in 1.36s (25.03MB/s)
   41 20:06:29.281064  end: 1.1.1 http-download (duration 00:00:01) [common]
   43 20:06:29.281323  end: 1.1 download-retry (duration 00:00:01) [common]
   44 20:06:29.281415  start: 1.2 download-retry (timeout 00:09:59) [common]
   45 20:06:29.281544  start: 1.2.1 http-download (timeout 00:09:59) [common]
   46 20:06:29.281654  downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-234-g4e6ec7162c8e/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 20:06:29.281724  saving as /var/lib/lava/dispatcher/tmp/8411780/tftp-deploy-fqdjc_6f/kernel/bzImage
   48 20:06:29.281788  total size: 7573392 (7MB)
   49 20:06:29.281850  No compression specified
   50 20:06:29.348882  progress   0% (0MB)
   51 20:06:29.426210  progress   5% (0MB)
   52 20:06:29.487996  progress  10% (0MB)
   53 20:06:29.532077  progress  15% (1MB)
   54 20:06:29.580797  progress  20% (1MB)
   55 20:06:29.620879  progress  25% (1MB)
   56 20:06:29.649271  progress  30% (2MB)
   57 20:06:29.694205  progress  35% (2MB)
   58 20:06:29.749511  progress  40% (2MB)
   59 20:06:29.792280  progress  45% (3MB)
   60 20:06:29.825465  progress  50% (3MB)
   61 20:06:29.881551  progress  55% (4MB)
   62 20:06:29.926729  progress  60% (4MB)
   63 20:06:29.967298  progress  65% (4MB)
   64 20:06:30.021072  progress  70% (5MB)
   65 20:06:30.060228  progress  75% (5MB)
   66 20:06:30.099390  progress  80% (5MB)
   67 20:06:30.140966  progress  85% (6MB)
   68 20:06:30.191295  progress  90% (6MB)
   69 20:06:30.229306  progress  95% (6MB)
   70 20:06:30.277517  progress 100% (7MB)
   71 20:06:30.277776  7MB downloaded in 1.00s (7.25MB/s)
   72 20:06:30.277959  end: 1.2.1 http-download (duration 00:00:01) [common]
   74 20:06:30.278200  end: 1.2 download-retry (duration 00:00:01) [common]
   75 20:06:30.278290  start: 1.3 download-retry (timeout 00:09:58) [common]
   76 20:06:30.278378  start: 1.3.1 http-download (timeout 00:09:58) [common]
   77 20:06:30.278487  downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-234-g4e6ec7162c8e/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 20:06:30.278556  saving as /var/lib/lava/dispatcher/tmp/8411780/tftp-deploy-fqdjc_6f/modules/modules.tar
   79 20:06:30.278619  total size: 51664 (0MB)
   80 20:06:30.278681  Using unxz to decompress xz
   81 20:06:30.334181  progress  63% (0MB)
   82 20:06:30.334664  progress 100% (0MB)
   83 20:06:30.337976  0MB downloaded in 0.06s (0.83MB/s)
   84 20:06:30.338222  end: 1.3.1 http-download (duration 00:00:00) [common]
   86 20:06:30.338488  end: 1.3 download-retry (duration 00:00:00) [common]
   87 20:06:30.338586  start: 1.4 prepare-tftp-overlay (timeout 00:09:58) [common]
   88 20:06:30.338685  start: 1.4.1 extract-nfsrootfs (timeout 00:09:58) [common]
   89 20:06:30.338772  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
   90 20:06:30.338866  start: 1.4.2 lava-overlay (timeout 00:09:58) [common]
   91 20:06:30.339045  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8411780/lava-overlay-gv2noc24
   92 20:06:30.339154  makedir: /var/lib/lava/dispatcher/tmp/8411780/lava-overlay-gv2noc24/lava-8411780/bin
   93 20:06:30.339241  makedir: /var/lib/lava/dispatcher/tmp/8411780/lava-overlay-gv2noc24/lava-8411780/tests
   94 20:06:30.339324  makedir: /var/lib/lava/dispatcher/tmp/8411780/lava-overlay-gv2noc24/lava-8411780/results
   95 20:06:30.339435  Creating /var/lib/lava/dispatcher/tmp/8411780/lava-overlay-gv2noc24/lava-8411780/bin/lava-add-keys
   96 20:06:30.339571  Creating /var/lib/lava/dispatcher/tmp/8411780/lava-overlay-gv2noc24/lava-8411780/bin/lava-add-sources
   97 20:06:30.339690  Creating /var/lib/lava/dispatcher/tmp/8411780/lava-overlay-gv2noc24/lava-8411780/bin/lava-background-process-start
   98 20:06:30.339804  Creating /var/lib/lava/dispatcher/tmp/8411780/lava-overlay-gv2noc24/lava-8411780/bin/lava-background-process-stop
   99 20:06:30.339918  Creating /var/lib/lava/dispatcher/tmp/8411780/lava-overlay-gv2noc24/lava-8411780/bin/lava-common-functions
  100 20:06:30.340028  Creating /var/lib/lava/dispatcher/tmp/8411780/lava-overlay-gv2noc24/lava-8411780/bin/lava-echo-ipv4
  101 20:06:30.340140  Creating /var/lib/lava/dispatcher/tmp/8411780/lava-overlay-gv2noc24/lava-8411780/bin/lava-install-packages
  102 20:06:30.340251  Creating /var/lib/lava/dispatcher/tmp/8411780/lava-overlay-gv2noc24/lava-8411780/bin/lava-installed-packages
  103 20:06:30.340361  Creating /var/lib/lava/dispatcher/tmp/8411780/lava-overlay-gv2noc24/lava-8411780/bin/lava-os-build
  104 20:06:30.340472  Creating /var/lib/lava/dispatcher/tmp/8411780/lava-overlay-gv2noc24/lava-8411780/bin/lava-probe-channel
  105 20:06:30.340584  Creating /var/lib/lava/dispatcher/tmp/8411780/lava-overlay-gv2noc24/lava-8411780/bin/lava-probe-ip
  106 20:06:30.340712  Creating /var/lib/lava/dispatcher/tmp/8411780/lava-overlay-gv2noc24/lava-8411780/bin/lava-target-ip
  107 20:06:30.340855  Creating /var/lib/lava/dispatcher/tmp/8411780/lava-overlay-gv2noc24/lava-8411780/bin/lava-target-mac
  108 20:06:30.340967  Creating /var/lib/lava/dispatcher/tmp/8411780/lava-overlay-gv2noc24/lava-8411780/bin/lava-target-storage
  109 20:06:30.341095  Creating /var/lib/lava/dispatcher/tmp/8411780/lava-overlay-gv2noc24/lava-8411780/bin/lava-test-case
  110 20:06:30.341225  Creating /var/lib/lava/dispatcher/tmp/8411780/lava-overlay-gv2noc24/lava-8411780/bin/lava-test-event
  111 20:06:30.341339  Creating /var/lib/lava/dispatcher/tmp/8411780/lava-overlay-gv2noc24/lava-8411780/bin/lava-test-feedback
  112 20:06:30.341454  Creating /var/lib/lava/dispatcher/tmp/8411780/lava-overlay-gv2noc24/lava-8411780/bin/lava-test-raise
  113 20:06:30.341600  Creating /var/lib/lava/dispatcher/tmp/8411780/lava-overlay-gv2noc24/lava-8411780/bin/lava-test-reference
  114 20:06:30.341713  Creating /var/lib/lava/dispatcher/tmp/8411780/lava-overlay-gv2noc24/lava-8411780/bin/lava-test-runner
  115 20:06:30.341824  Creating /var/lib/lava/dispatcher/tmp/8411780/lava-overlay-gv2noc24/lava-8411780/bin/lava-test-set
  116 20:06:30.341967  Creating /var/lib/lava/dispatcher/tmp/8411780/lava-overlay-gv2noc24/lava-8411780/bin/lava-test-shell
  117 20:06:30.342081  Updating /var/lib/lava/dispatcher/tmp/8411780/lava-overlay-gv2noc24/lava-8411780/bin/lava-install-packages (oe)
  118 20:06:30.342195  Updating /var/lib/lava/dispatcher/tmp/8411780/lava-overlay-gv2noc24/lava-8411780/bin/lava-installed-packages (oe)
  119 20:06:30.342296  Creating /var/lib/lava/dispatcher/tmp/8411780/lava-overlay-gv2noc24/lava-8411780/environment
  120 20:06:30.342418  LAVA metadata
  121 20:06:30.342490  - LAVA_JOB_ID=8411780
  122 20:06:30.342558  - LAVA_DISPATCHER_IP=192.168.201.1
  123 20:06:30.342660  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:58) [common]
  124 20:06:30.342727  skipped lava-vland-overlay
  125 20:06:30.342804  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  126 20:06:30.342892  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:58) [common]
  127 20:06:30.342957  skipped lava-multinode-overlay
  128 20:06:30.343034  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  129 20:06:30.343121  start: 1.4.2.3 test-definition (timeout 00:09:58) [common]
  130 20:06:30.343197  Loading test definitions
  131 20:06:30.343296  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:58) [common]
  132 20:06:30.343373  Using /lava-8411780 at stage 0
  133 20:06:30.343625  uuid=8411780_1.4.2.3.1 testdef=None
  134 20:06:30.343715  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  135 20:06:30.343809  start: 1.4.2.3.2 test-overlay (timeout 00:09:58) [common]
  136 20:06:30.344280  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  138 20:06:30.344511  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:58) [common]
  139 20:06:30.345059  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  141 20:06:30.345304  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:58) [common]
  142 20:06:30.345859  runner path: /var/lib/lava/dispatcher/tmp/8411780/lava-overlay-gv2noc24/lava-8411780/0/tests/0_cros-ec test_uuid 8411780_1.4.2.3.1
  143 20:06:30.346007  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  145 20:06:30.346220  Creating lava-test-runner.conf files
  146 20:06:30.346286  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8411780/lava-overlay-gv2noc24/lava-8411780/0 for stage 0
  147 20:06:30.346369  - 0_cros-ec
  148 20:06:30.346464  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  149 20:06:30.346553  start: 1.4.2.4 compress-overlay (timeout 00:09:58) [common]
  150 20:06:30.351802  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  151 20:06:30.351993  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:58) [common]
  152 20:06:30.352083  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  153 20:06:30.352171  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  154 20:06:30.352261  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:58) [common]
  155 20:06:31.118493  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
  156 20:06:31.118858  start: 1.4.4 extract-modules (timeout 00:09:57) [common]
  157 20:06:31.118981  extracting modules file /var/lib/lava/dispatcher/tmp/8411780/tftp-deploy-fqdjc_6f/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8411780/extract-overlay-ramdisk-39gnv_vh/ramdisk
  158 20:06:31.123407  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  159 20:06:31.123538  start: 1.4.5 apply-overlay-tftp (timeout 00:09:57) [common]
  160 20:06:31.123640  [common] Applying overlay /var/lib/lava/dispatcher/tmp/8411780/compress-overlay-88t_8b7y/overlay-1.4.2.4.tar.gz to ramdisk
  161 20:06:31.123717  [common] Applying overlay /var/lib/lava/dispatcher/tmp/8411780/compress-overlay-88t_8b7y/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8411780/extract-overlay-ramdisk-39gnv_vh/ramdisk
  162 20:06:31.127067  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  163 20:06:31.127184  start: 1.4.6 configure-preseed-file (timeout 00:09:57) [common]
  164 20:06:31.127287  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  165 20:06:31.127381  start: 1.4.7 compress-ramdisk (timeout 00:09:57) [common]
  166 20:06:31.127476  Building ramdisk /var/lib/lava/dispatcher/tmp/8411780/extract-overlay-ramdisk-39gnv_vh/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8411780/extract-overlay-ramdisk-39gnv_vh/ramdisk
  167 20:06:31.376998  >> 182462 blocks

  168 20:06:34.675387  rename /var/lib/lava/dispatcher/tmp/8411780/extract-overlay-ramdisk-39gnv_vh/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8411780/tftp-deploy-fqdjc_6f/ramdisk/ramdisk.cpio.gz
  169 20:06:34.675797  end: 1.4.7 compress-ramdisk (duration 00:00:04) [common]
  170 20:06:34.675920  start: 1.4.8 prepare-kernel (timeout 00:09:53) [common]
  171 20:06:34.676023  start: 1.4.8.1 prepare-fit (timeout 00:09:53) [common]
  172 20:06:34.676120  No mkimage arch provided, not using FIT.
  173 20:06:34.676206  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  174 20:06:34.676291  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  175 20:06:34.676387  end: 1.4 prepare-tftp-overlay (duration 00:00:04) [common]
  176 20:06:34.676483  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:53) [common]
  177 20:06:34.676559  No LXC device requested
  178 20:06:34.676641  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  179 20:06:34.676731  start: 1.6 deploy-device-env (timeout 00:09:53) [common]
  180 20:06:34.676815  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  181 20:06:34.676887  Checking files for TFTP limit of 4294967296 bytes.
  182 20:06:34.677334  end: 1 tftp-deploy (duration 00:00:07) [common]
  183 20:06:34.677442  start: 2 depthcharge-action (timeout 00:05:00) [common]
  184 20:06:34.677571  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  185 20:06:34.677700  substitutions:
  186 20:06:34.677768  - {DTB}: None
  187 20:06:34.677831  - {INITRD}: 8411780/tftp-deploy-fqdjc_6f/ramdisk/ramdisk.cpio.gz
  188 20:06:34.677891  - {KERNEL}: 8411780/tftp-deploy-fqdjc_6f/kernel/bzImage
  189 20:06:34.677950  - {LAVA_MAC}: None
  190 20:06:34.678007  - {PRESEED_CONFIG}: None
  191 20:06:34.678064  - {PRESEED_LOCAL}: None
  192 20:06:34.678121  - {RAMDISK}: 8411780/tftp-deploy-fqdjc_6f/ramdisk/ramdisk.cpio.gz
  193 20:06:34.678176  - {ROOT_PART}: None
  194 20:06:34.678231  - {ROOT}: None
  195 20:06:34.678285  - {SERVER_IP}: 192.168.201.1
  196 20:06:34.678339  - {TEE}: None
  197 20:06:34.678393  Parsed boot commands:
  198 20:06:34.678446  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  199 20:06:34.678598  Parsed boot commands: tftpboot 192.168.201.1 8411780/tftp-deploy-fqdjc_6f/kernel/bzImage 8411780/tftp-deploy-fqdjc_6f/kernel/cmdline 8411780/tftp-deploy-fqdjc_6f/ramdisk/ramdisk.cpio.gz
  200 20:06:34.678688  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  201 20:06:34.678773  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  202 20:06:34.678864  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  203 20:06:34.678948  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  204 20:06:34.679016  Not connected, no need to disconnect.
  205 20:06:34.679092  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  206 20:06:34.679177  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  207 20:06:34.679244  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-9'
  208 20:06:34.681952  Setting prompt string to ['lava-test: # ']
  209 20:06:34.682293  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  210 20:06:34.682402  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  211 20:06:34.682502  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  212 20:06:34.682590  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  213 20:06:34.682788  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=reboot'
  214 20:06:34.702709  >> Command sent successfully.

  215 20:06:34.704858  Returned 0 in 0 seconds
  216 20:06:34.805626  end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
  218 20:06:34.805952  end: 2.2.2 reset-device (duration 00:00:00) [common]
  219 20:06:34.806051  start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
  220 20:06:34.806171  Setting prompt string to 'Starting depthcharge on Voema...'
  221 20:06:34.806257  Changing prompt to 'Starting depthcharge on Voema...'
  222 20:06:34.806327  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  223 20:06:34.806636  [Enter `^Ec?' for help]
  224 20:06:41.899853  
  225 20:06:41.900036  
  226 20:06:41.909653  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
  227 20:06:41.913267  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
  228 20:06:41.919449  CPU: ID 806c1, Tigerlake B0, ucode: 00000086
  229 20:06:41.922957  CPU: AES supported, TXT NOT supported, VT supported
  230 20:06:41.930314  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
  231 20:06:41.933256  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
  232 20:06:41.936891  
  233 20:06:41.940213  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
  234 20:06:41.943367  VBOOT: Loading verstage.
  235 20:06:41.946733  FMAP: Found "FLASH" version 1.1 at 0x1804000.
  236 20:06:41.953354  FMAP: base = 0x0 size = 0x2000000 #areas = 32
  237 20:06:41.956872  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  238 20:06:41.967653  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
  239 20:06:41.974299  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
  240 20:06:41.974880  
  241 20:06:41.975238  
  242 20:06:41.986897  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...
  243 20:06:42.000949  Probing TPM: . done!
  244 20:06:42.004452  TPM ready after 0 ms
  245 20:06:42.007517  Connected to device vid:did:rid of 1ae0:0028:00
  246 20:06:42.018503  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
  247 20:06:42.025385  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
  248 20:06:42.028715  Initialized TPM device CR50 revision 0
  249 20:06:42.079170  tlcl_send_startup: Startup return code is 0
  250 20:06:42.079739  TPM: setup succeeded
  251 20:06:42.095009  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
  252 20:06:42.110203  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
  253 20:06:42.123773  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
  254 20:06:42.134361  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
  255 20:06:42.138205  Chrome EC: UHEPI supported
  256 20:06:42.141103  Phase 1
  257 20:06:42.144797  FMAP: area GBB found @ 1805000 (458752 bytes)
  258 20:06:42.151202  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
  259 20:06:42.154088  
  260 20:06:42.160943  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
  261 20:06:42.167708  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
  262 20:06:42.173974  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
  263 20:06:42.177831  Recovery requested (1009000e)
  264 20:06:42.180719  TPM: Extending digest for VBOOT: boot mode into PCR 0
  265 20:06:42.192445  tlcl_extend: response is 0
  266 20:06:42.199076  TPM: Extending digest for VBOOT: GBB HWID into PCR 1
  267 20:06:42.208855  tlcl_extend: response is 0
  268 20:06:42.215206  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  269 20:06:42.222261  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
  270 20:06:42.228706  BS: verstage times (exec / console): total (unknown) / 142 ms
  271 20:06:42.229149  
  272 20:06:42.229527  
  273 20:06:42.242335  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...
  274 20:06:42.248999  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
  275 20:06:42.251778  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
  276 20:06:42.255098  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
  277 20:06:42.262147  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
  278 20:06:42.265349  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
  279 20:06:42.269108  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
  280 20:06:42.272014  TCO_STS:   0000 0000
  281 20:06:42.275173  GEN_PMCON: d0015038 00002200
  282 20:06:42.278433  GBLRST_CAUSE: 00000000 00000000
  283 20:06:42.278877  HPR_CAUSE0: 00000000
  284 20:06:42.282214  prev_sleep_state 5
  285 20:06:42.285274  Boot Count incremented to 13986
  286 20:06:42.291678  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  287 20:06:42.298857  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
  288 20:06:42.305525  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
  289 20:06:42.312049  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
  290 20:06:42.316405  Chrome EC: UHEPI supported
  291 20:06:42.323089  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
  292 20:06:42.336743  Probing TPM:  done!
  293 20:06:42.343478  Connected to device vid:did:rid of 1ae0:0028:00
  294 20:06:42.354114  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
  295 20:06:42.361525  Initialized TPM device CR50 revision 0
  296 20:06:42.371173  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
  297 20:06:42.377889  MRC: Hash idx 0x100b comparison successful.
  298 20:06:42.381245  MRC cache found, size faa8
  299 20:06:42.381720  bootmode is set to: 2
  300 20:06:42.384373  SPD index = 0
  301 20:06:42.391220  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
  302 20:06:42.394634  SPD: module type is LPDDR4X
  303 20:06:42.397837  SPD: module part number is MT53E512M64D4NW-046
  304 20:06:42.404486  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
  305 20:06:42.408136  SPD: device width 16 bits, bus width 16 bits
  306 20:06:42.414782  SPD: module size is 1024 MB (per channel)
  307 20:06:42.847506  CBMEM:
  308 20:06:42.850129  IMD: root @ 0x76fff000 254 entries.
  309 20:06:42.853861  IMD: root @ 0x76ffec00 62 entries.
  310 20:06:42.856999  FMAP: area RO_VPD found @ 1800000 (16384 bytes)
  311 20:06:42.863200  FMAP: area RW_VPD found @ f35000 (8192 bytes)
  312 20:06:42.866998  External stage cache:
  313 20:06:42.870148  IMD: root @ 0x7b3ff000 254 entries.
  314 20:06:42.873177  IMD: root @ 0x7b3fec00 62 entries.
  315 20:06:42.888823  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
  316 20:06:42.895885  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
  317 20:06:42.901989  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
  318 20:06:42.916561  MRC: 'RECOVERY_MRC_CACHE' does not need update.
  319 20:06:42.919943  cse_lite: Skip switching to RW in the recovery path
  320 20:06:42.923659  8 DIMMs found
  321 20:06:42.924175  SMM Memory Map
  322 20:06:42.927058  SMRAM       : 0x7b000000 0x800000
  323 20:06:42.930536   Subregion 0: 0x7b000000 0x200000
  324 20:06:42.934368   Subregion 1: 0x7b200000 0x200000
  325 20:06:42.937561   Subregion 2: 0x7b400000 0x400000
  326 20:06:42.941045  top_of_ram = 0x77000000
  327 20:06:42.947508  MTRR Range: Start=76000000 End=77000000 (Size 1000000)
  328 20:06:42.950409  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
  329 20:06:42.957378  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
  330 20:06:42.960991  MTRR Range: Start=ff000000 End=0 (Size 1000000)
  331 20:06:42.970234  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
  332 20:06:42.973366  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
  333 20:06:42.985665  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
  334 20:06:42.989059  Processing 211 relocs. Offset value of 0x74c0b000
  335 20:06:42.991975  
  336 20:06:42.998230  BS: romstage times (exec / console): total (unknown) / 277 ms
  337 20:06:43.004560  
  338 20:06:43.004649  
  339 20:06:43.014843  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...
  340 20:06:43.018291  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  341 20:06:43.028281  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
  342 20:06:43.034734  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
  343 20:06:43.041347  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
  344 20:06:43.048076  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
  345 20:06:43.094781  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
  346 20:06:43.101690  Processing 5008 relocs. Offset value of 0x75d98000
  347 20:06:43.104456  BS: postcar times (exec / console): total (unknown) / 59 ms
  348 20:06:43.108439  
  349 20:06:43.108989  
  350 20:06:43.118398  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
  351 20:06:43.118940  Normal boot
  352 20:06:43.121697  FW_CONFIG value is 0x804c02
  353 20:06:43.124859  PCI: 00:07.0 disabled by fw_config
  354 20:06:43.128294  PCI: 00:07.1 disabled by fw_config
  355 20:06:43.131905  PCI: 00:0d.2 disabled by fw_config
  356 20:06:43.135397  PCI: 00:1c.7 disabled by fw_config
  357 20:06:43.141639  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
  358 20:06:43.148373  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
  359 20:06:43.151912  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
  360 20:06:43.155005  GENERIC: 0.0 disabled by fw_config
  361 20:06:43.158679  GENERIC: 1.0 disabled by fw_config
  362 20:06:43.165037  fw_config match found: DB_USB=USB3_ACTIVE
  363 20:06:43.168513  fw_config match found: DB_USB=USB3_ACTIVE
  364 20:06:43.171539  fw_config match found: DB_USB=USB3_ACTIVE
  365 20:06:43.174818  fw_config match found: DB_USB=USB3_ACTIVE
  366 20:06:43.181889  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  367 20:06:43.188064  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
  368 20:06:43.195112  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
  369 20:06:43.204796  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
  370 20:06:43.207977  microcode: sig=0x806c1 pf=0x80 revision=0x86
  371 20:06:43.214889  microcode: Update skipped, already up-to-date
  372 20:06:43.221329  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
  373 20:06:43.248607  Detected 4 core, 8 thread CPU.
  374 20:06:43.252116  Setting up SMI for CPU
  375 20:06:43.255469  IED base = 0x7b400000
  376 20:06:43.256057  IED size = 0x00400000
  377 20:06:43.258169  Will perform SMM setup.
  378 20:06:43.265039  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
  379 20:06:43.272084  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
  380 20:06:43.277956  Processing 16 relocs. Offset value of 0x00030000
  381 20:06:43.281408  Attempting to start 7 APs
  382 20:06:43.285034  Waiting for 10ms after sending INIT.
  383 20:06:43.300627  Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
  384 20:06:43.301183  done.
  385 20:06:43.303912  AP: slot 6 apic_id 3.
  386 20:06:43.307248  AP: slot 3 apic_id 2.
  387 20:06:43.307697  AP: slot 7 apic_id 5.
  388 20:06:43.310501  AP: slot 4 apic_id 4.
  389 20:06:43.313557  AP: slot 5 apic_id 6.
  390 20:06:43.314003  AP: slot 2 apic_id 7.
  391 20:06:43.320454  Waiting for 2nd SIPI to complete...done.
  392 20:06:43.326871  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
  393 20:06:43.333315  Processing 13 relocs. Offset value of 0x00038000
  394 20:06:43.333855  Unable to locate Global NVS
  395 20:06:43.343477  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
  396 20:06:43.346783  Installing permanent SMM handler to 0x7b000000
  397 20:06:43.356514  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
  398 20:06:43.359725  Processing 794 relocs. Offset value of 0x7b010000
  399 20:06:43.370180  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
  400 20:06:43.373823  Processing 13 relocs. Offset value of 0x7b008000
  401 20:06:43.380111  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
  402 20:06:43.386358  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
  403 20:06:43.389597  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
  404 20:06:43.396502  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
  405 20:06:43.403163  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
  406 20:06:43.409922  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
  407 20:06:43.417028  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
  408 20:06:43.417614  Unable to locate Global NVS
  409 20:06:43.426188  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
  410 20:06:43.429368  Clearing SMI status registers
  411 20:06:43.429849  SMI_STS: PM1 
  412 20:06:43.432854  PM1_STS: PWRBTN 
  413 20:06:43.440048  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
  414 20:06:43.442836  In relocation handler: CPU 0
  415 20:06:43.446301  New SMBASE=0x7b000000 IEDBASE=0x7b400000
  416 20:06:43.452615  Writing SMRR. base = 0x7b000006, mask=0xff800c00
  417 20:06:43.453066  Relocation complete.
  418 20:06:43.463337  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
  419 20:06:43.463884  In relocation handler: CPU 1
  420 20:06:43.469702  New SMBASE=0x7afffc00 IEDBASE=0x7b400000
  421 20:06:43.470254  Relocation complete.
  422 20:06:43.479961  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
  423 20:06:43.480517  In relocation handler: CPU 3
  424 20:06:43.486011  New SMBASE=0x7afff400 IEDBASE=0x7b400000
  425 20:06:43.489404  Writing SMRR. base = 0x7b000006, mask=0xff800c00
  426 20:06:43.493069  Relocation complete.
  427 20:06:43.499390  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
  428 20:06:43.502706  In relocation handler: CPU 6
  429 20:06:43.505591  New SMBASE=0x7affe800 IEDBASE=0x7b400000
  430 20:06:43.509047  Relocation complete.
  431 20:06:43.515912  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
  432 20:06:43.519102  In relocation handler: CPU 2
  433 20:06:43.522498  New SMBASE=0x7afff800 IEDBASE=0x7b400000
  434 20:06:43.525651  Relocation complete.
  435 20:06:43.532304  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
  436 20:06:43.535915  In relocation handler: CPU 5
  437 20:06:43.539148  New SMBASE=0x7affec00 IEDBASE=0x7b400000
  438 20:06:43.545629  Writing SMRR. base = 0x7b000006, mask=0xff800c00
  439 20:06:43.546185  Relocation complete.
  440 20:06:43.552342  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
  441 20:06:43.555627  In relocation handler: CPU 4
  442 20:06:43.561931  New SMBASE=0x7afff000 IEDBASE=0x7b400000
  443 20:06:43.565607  Writing SMRR. base = 0x7b000006, mask=0xff800c00
  444 20:06:43.568983  Relocation complete.
  445 20:06:43.575411  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
  446 20:06:43.579576  In relocation handler: CPU 7
  447 20:06:43.582545  New SMBASE=0x7affe400 IEDBASE=0x7b400000
  448 20:06:43.586445  Relocation complete.
  449 20:06:43.587012  Initializing CPU #0
  450 20:06:43.589606  CPU: vendor Intel device 806c1
  451 20:06:43.592981  CPU: family 06, model 8c, stepping 01
  452 20:06:43.596449  Clearing out pending MCEs
  453 20:06:43.599149  Setting up local APIC...
  454 20:06:43.599587   apic_id: 0x00 done.
  455 20:06:43.602493  Turbo is available but hidden
  456 20:06:43.606004  Turbo is available and visible
  457 20:06:43.613129  microcode: Update skipped, already up-to-date
  458 20:06:43.613711  CPU #0 initialized
  459 20:06:43.616309  Initializing CPU #2
  460 20:06:43.619250  Initializing CPU #5
  461 20:06:43.622597  CPU: vendor Intel device 806c1
  462 20:06:43.625738  CPU: family 06, model 8c, stepping 01
  463 20:06:43.628938  CPU: vendor Intel device 806c1
  464 20:06:43.632276  CPU: family 06, model 8c, stepping 01
  465 20:06:43.635634  Clearing out pending MCEs
  466 20:06:43.636073  Clearing out pending MCEs
  467 20:06:43.638747  Setting up local APIC...
  468 20:06:43.642274  Initializing CPU #1
  469 20:06:43.642717  Initializing CPU #6
  470 20:06:43.645698  Initializing CPU #3
  471 20:06:43.648661  CPU: vendor Intel device 806c1
  472 20:06:43.652067  CPU: family 06, model 8c, stepping 01
  473 20:06:43.655006  CPU: vendor Intel device 806c1
  474 20:06:43.658679  CPU: family 06, model 8c, stepping 01
  475 20:06:43.661966  Clearing out pending MCEs
  476 20:06:43.665410  Clearing out pending MCEs
  477 20:06:43.669058  Setting up local APIC...
  478 20:06:43.669647   apic_id: 0x07 done.
  479 20:06:43.672100  Setting up local APIC...
  480 20:06:43.675518   apic_id: 0x03 done.
  481 20:06:43.676066  Setting up local APIC...
  482 20:06:43.682323  microcode: Update skipped, already up-to-date
  483 20:06:43.682873   apic_id: 0x06 done.
  484 20:06:43.685569  CPU #2 initialized
  485 20:06:43.688763  CPU: vendor Intel device 806c1
  486 20:06:43.692187  CPU: family 06, model 8c, stepping 01
  487 20:06:43.695772  Initializing CPU #4
  488 20:06:43.696325  Initializing CPU #7
  489 20:06:43.698314  CPU: vendor Intel device 806c1
  490 20:06:43.701678  CPU: family 06, model 8c, stepping 01
  491 20:06:43.705075  CPU: vendor Intel device 806c1
  492 20:06:43.712107  CPU: family 06, model 8c, stepping 01
  493 20:06:43.712661  Clearing out pending MCEs
  494 20:06:43.715219  Clearing out pending MCEs
  495 20:06:43.718620  Setting up local APIC...
  496 20:06:43.721584  microcode: Update skipped, already up-to-date
  497 20:06:43.725162   apic_id: 0x04 done.
  498 20:06:43.728059  Setting up local APIC...
  499 20:06:43.731360  microcode: Update skipped, already up-to-date
  500 20:06:43.734669   apic_id: 0x02 done.
  501 20:06:43.735135  CPU #5 initialized
  502 20:06:43.738297   apic_id: 0x05 done.
  503 20:06:43.741632  microcode: Update skipped, already up-to-date
  504 20:06:43.748265  microcode: Update skipped, already up-to-date
  505 20:06:43.748831  CPU #4 initialized
  506 20:06:43.751624  CPU #7 initialized
  507 20:06:43.754702  microcode: Update skipped, already up-to-date
  508 20:06:43.758060  CPU #6 initialized
  509 20:06:43.761122  CPU #3 initialized
  510 20:06:43.761590  Clearing out pending MCEs
  511 20:06:43.764678  Setting up local APIC...
  512 20:06:43.768098   apic_id: 0x01 done.
  513 20:06:43.771798  microcode: Update skipped, already up-to-date
  514 20:06:43.774442  CPU #1 initialized
  515 20:06:43.777861  bsp_do_flight_plan done after 455 msecs.
  516 20:06:43.781408  CPU: frequency set to 4000 MHz
  517 20:06:43.784621  Enabling SMIs.
  518 20:06:43.791200  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
  519 20:06:43.805400  SATAXPCIE1 indicates PCIe NVMe is present
  520 20:06:43.808582  Probing TPM:  done!
  521 20:06:43.812120  Connected to device vid:did:rid of 1ae0:0028:00
  522 20:06:43.823237  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
  523 20:06:43.825861  Initialized TPM device CR50 revision 0
  524 20:06:43.829223  Enabling S0i3.4
  525 20:06:43.835912  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
  526 20:06:43.839104  Found a VBT of 8704 bytes after decompression
  527 20:06:43.845866  cse_lite: CSE RO boot. HybridStorageMode disabled
  528 20:06:43.852993  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
  529 20:06:43.929099  FSPS returned 0
  530 20:06:43.932429  Executing Phase 1 of FspMultiPhaseSiInit
  531 20:06:43.942189  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
  532 20:06:43.945931  port C0 DISC req: usage 1 usb3 1 usb2 5
  533 20:06:43.948919  Raw Buffer output 0 00000511
  534 20:06:43.952242  Raw Buffer output 1 00000000
  535 20:06:43.956169  pmc_send_ipc_cmd succeeded
  536 20:06:43.959678  port C1 DISC req: usage 1 usb3 2 usb2 3
  537 20:06:43.962641  
  538 20:06:43.963095  Raw Buffer output 0 00000321
  539 20:06:43.966176  Raw Buffer output 1 00000000
  540 20:06:43.970171  pmc_send_ipc_cmd succeeded
  541 20:06:43.975972  Detected 4 core, 8 thread CPU.
  542 20:06:43.979286  Detected 4 core, 8 thread CPU.
  543 20:06:44.212540  Display FSP Version Info HOB
  544 20:06:44.215874  Reference Code - CPU = a.0.4c.31
  545 20:06:44.219169  uCode Version = 0.0.0.86
  546 20:06:44.222533  TXT ACM version = ff.ff.ff.ffff
  547 20:06:44.225979  Reference Code - ME = a.0.4c.31
  548 20:06:44.229076  MEBx version = 0.0.0.0
  549 20:06:44.232279  ME Firmware Version = Consumer SKU
  550 20:06:44.235656  Reference Code - PCH = a.0.4c.31
  551 20:06:44.239179  PCH-CRID Status = Disabled
  552 20:06:44.242584  PCH-CRID Original Value = ff.ff.ff.ffff
  553 20:06:44.245896  PCH-CRID New Value = ff.ff.ff.ffff
  554 20:06:44.249067  OPROM - RST - RAID = ff.ff.ff.ffff
  555 20:06:44.252484  PCH Hsio Version = 4.0.0.0
  556 20:06:44.255822  Reference Code - SA - System Agent = a.0.4c.31
  557 20:06:44.259417  Reference Code - MRC = 2.0.0.1
  558 20:06:44.262541  SA - PCIe Version = a.0.4c.31
  559 20:06:44.265793  SA-CRID Status = Disabled
  560 20:06:44.269190  SA-CRID Original Value = 0.0.0.1
  561 20:06:44.272852  SA-CRID New Value = 0.0.0.1
  562 20:06:44.276193  OPROM - VBIOS = ff.ff.ff.ffff
  563 20:06:44.278895  IO Manageability Engine FW Version = 11.1.4.0
  564 20:06:44.282572  PHY Build Version = 0.0.0.e0
  565 20:06:44.285775  Thunderbolt(TM) FW Version = 0.0.0.0
  566 20:06:44.292649  System Agent Manageability Engine FW Version = ff.ff.ff.ffff
  567 20:06:44.295521  ITSS IRQ Polarities Before:
  568 20:06:44.295686  IPC0: 0xffffffff
  569 20:06:44.299386  IPC1: 0xffffffff
  570 20:06:44.299500  IPC2: 0xffffffff
  571 20:06:44.302486  IPC3: 0xffffffff
  572 20:06:44.305783  ITSS IRQ Polarities After:
  573 20:06:44.305868  IPC0: 0xffffffff
  574 20:06:44.309232  IPC1: 0xffffffff
  575 20:06:44.309342  IPC2: 0xffffffff
  576 20:06:44.312133  IPC3: 0xffffffff
  577 20:06:44.315464  Found PCIe Root Port #9 at PCI: 00:1d.0.
  578 20:06:44.329170  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
  579 20:06:44.338745  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
  580 20:06:44.352363  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
  581 20:06:44.359090  BS: BS_DEV_INIT_CHIPS run times (exec / console): 327 / 236 ms
  582 20:06:44.359362  Enumerating buses...
  583 20:06:44.365613  Show all devs... Before device enumeration.
  584 20:06:44.365935  Root Device: enabled 1
  585 20:06:44.368976  DOMAIN: 0000: enabled 1
  586 20:06:44.372680  CPU_CLUSTER: 0: enabled 1
  587 20:06:44.375626  PCI: 00:00.0: enabled 1
  588 20:06:44.376107  PCI: 00:02.0: enabled 1
  589 20:06:44.378859  PCI: 00:04.0: enabled 1
  590 20:06:44.382579  PCI: 00:05.0: enabled 1
  591 20:06:44.385781  PCI: 00:06.0: enabled 0
  592 20:06:44.386317  PCI: 00:07.0: enabled 0
  593 20:06:44.389432  PCI: 00:07.1: enabled 0
  594 20:06:44.392261  PCI: 00:07.2: enabled 0
  595 20:06:44.395577  PCI: 00:07.3: enabled 0
  596 20:06:44.396019  PCI: 00:08.0: enabled 1
  597 20:06:44.399036  PCI: 00:09.0: enabled 0
  598 20:06:44.402475  PCI: 00:0a.0: enabled 0
  599 20:06:44.405594  PCI: 00:0d.0: enabled 1
  600 20:06:44.406041  PCI: 00:0d.1: enabled 0
  601 20:06:44.408840  PCI: 00:0d.2: enabled 0
  602 20:06:44.412373  PCI: 00:0d.3: enabled 0
  603 20:06:44.412913  PCI: 00:0e.0: enabled 0
  604 20:06:44.415589  
  605 20:06:44.416032  PCI: 00:10.2: enabled 1
  606 20:06:44.418920  PCI: 00:10.6: enabled 0
  607 20:06:44.422276  PCI: 00:10.7: enabled 0
  608 20:06:44.422765  PCI: 00:12.0: enabled 0
  609 20:06:44.425647  PCI: 00:12.6: enabled 0
  610 20:06:44.428813  PCI: 00:13.0: enabled 0
  611 20:06:44.432072  PCI: 00:14.0: enabled 1
  612 20:06:44.432597  PCI: 00:14.1: enabled 0
  613 20:06:44.435374  PCI: 00:14.2: enabled 1
  614 20:06:44.438595  PCI: 00:14.3: enabled 1
  615 20:06:44.442007  PCI: 00:15.0: enabled 1
  616 20:06:44.442443  PCI: 00:15.1: enabled 1
  617 20:06:44.445370  PCI: 00:15.2: enabled 1
  618 20:06:44.448765  PCI: 00:15.3: enabled 1
  619 20:06:44.449218  PCI: 00:16.0: enabled 1
  620 20:06:44.452208  
  621 20:06:44.452645  PCI: 00:16.1: enabled 0
  622 20:06:44.455417  PCI: 00:16.2: enabled 0
  623 20:06:44.458900  PCI: 00:16.3: enabled 0
  624 20:06:44.459347  PCI: 00:16.4: enabled 0
  625 20:06:44.461986  PCI: 00:16.5: enabled 0
  626 20:06:44.465985  PCI: 00:17.0: enabled 1
  627 20:06:44.468984  PCI: 00:19.0: enabled 0
  628 20:06:44.469421  PCI: 00:19.1: enabled 1
  629 20:06:44.472243  PCI: 00:19.2: enabled 0
  630 20:06:44.475613  PCI: 00:1c.0: enabled 1
  631 20:06:44.478957  PCI: 00:1c.1: enabled 0
  632 20:06:44.479496  PCI: 00:1c.2: enabled 0
  633 20:06:44.482060  PCI: 00:1c.3: enabled 0
  634 20:06:44.485750  PCI: 00:1c.4: enabled 0
  635 20:06:44.488795  PCI: 00:1c.5: enabled 0
  636 20:06:44.489334  PCI: 00:1c.6: enabled 1
  637 20:06:44.492186  PCI: 00:1c.7: enabled 0
  638 20:06:44.495463  PCI: 00:1d.0: enabled 1
  639 20:06:44.495917  PCI: 00:1d.1: enabled 0
  640 20:06:44.498718  PCI: 00:1d.2: enabled 1
  641 20:06:44.502199  PCI: 00:1d.3: enabled 0
  642 20:06:44.505194  PCI: 00:1e.0: enabled 1
  643 20:06:44.505669  PCI: 00:1e.1: enabled 0
  644 20:06:44.508782  PCI: 00:1e.2: enabled 1
  645 20:06:44.512052  PCI: 00:1e.3: enabled 1
  646 20:06:44.515628  PCI: 00:1f.0: enabled 1
  647 20:06:44.516064  PCI: 00:1f.1: enabled 0
  648 20:06:44.518852  PCI: 00:1f.2: enabled 1
  649 20:06:44.521798  PCI: 00:1f.3: enabled 1
  650 20:06:44.525188  PCI: 00:1f.4: enabled 0
  651 20:06:44.525697  PCI: 00:1f.5: enabled 1
  652 20:06:44.528535  PCI: 00:1f.6: enabled 0
  653 20:06:44.531983  PCI: 00:1f.7: enabled 0
  654 20:06:44.532459  APIC: 00: enabled 1
  655 20:06:44.535004  GENERIC: 0.0: enabled 1
  656 20:06:44.538631  GENERIC: 0.0: enabled 1
  657 20:06:44.541849  GENERIC: 1.0: enabled 1
  658 20:06:44.542286  GENERIC: 0.0: enabled 1
  659 20:06:44.545296  GENERIC: 1.0: enabled 1
  660 20:06:44.548436  USB0 port 0: enabled 1
  661 20:06:44.548909  GENERIC: 0.0: enabled 1
  662 20:06:44.552263  
  663 20:06:44.552826  USB0 port 0: enabled 1
  664 20:06:44.555336  GENERIC: 0.0: enabled 1
  665 20:06:44.558434  I2C: 00:1a: enabled 1
  666 20:06:44.558871  I2C: 00:31: enabled 1
  667 20:06:44.561746  I2C: 00:32: enabled 1
  668 20:06:44.565527  I2C: 00:10: enabled 1
  669 20:06:44.566074  I2C: 00:15: enabled 1
  670 20:06:44.568914  GENERIC: 0.0: enabled 0
  671 20:06:44.571875  GENERIC: 1.0: enabled 0
  672 20:06:44.575245  GENERIC: 0.0: enabled 1
  673 20:06:44.575831  SPI: 00: enabled 1
  674 20:06:44.578750  SPI: 00: enabled 1
  675 20:06:44.579289  PNP: 0c09.0: enabled 1
  676 20:06:44.582000  GENERIC: 0.0: enabled 1
  677 20:06:44.585181  USB3 port 0: enabled 1
  678 20:06:44.588560  USB3 port 1: enabled 1
  679 20:06:44.589120  USB3 port 2: enabled 0
  680 20:06:44.592014  USB3 port 3: enabled 0
  681 20:06:44.595449  USB2 port 0: enabled 0
  682 20:06:44.596033  USB2 port 1: enabled 1
  683 20:06:44.598193  USB2 port 2: enabled 1
  684 20:06:44.601606  USB2 port 3: enabled 0
  685 20:06:44.605037  USB2 port 4: enabled 1
  686 20:06:44.605612  USB2 port 5: enabled 0
  687 20:06:44.608613  USB2 port 6: enabled 0
  688 20:06:44.611494  USB2 port 7: enabled 0
  689 20:06:44.611931  USB2 port 8: enabled 0
  690 20:06:44.615094  USB2 port 9: enabled 0
  691 20:06:44.618392  USB3 port 0: enabled 0
  692 20:06:44.618837  USB3 port 1: enabled 1
  693 20:06:44.621824  
  694 20:06:44.622391  USB3 port 2: enabled 0
  695 20:06:44.625017  USB3 port 3: enabled 0
  696 20:06:44.628275  GENERIC: 0.0: enabled 1
  697 20:06:44.628776  GENERIC: 1.0: enabled 1
  698 20:06:44.631184  APIC: 01: enabled 1
  699 20:06:44.634665  APIC: 07: enabled 1
  700 20:06:44.635258  APIC: 02: enabled 1
  701 20:06:44.637787  APIC: 04: enabled 1
  702 20:06:44.638228  APIC: 06: enabled 1
  703 20:06:44.641536  APIC: 03: enabled 1
  704 20:06:44.644903  APIC: 05: enabled 1
  705 20:06:44.645460  Compare with tree...
  706 20:06:44.648346  Root Device: enabled 1
  707 20:06:44.651718   DOMAIN: 0000: enabled 1
  708 20:06:44.654786    PCI: 00:00.0: enabled 1
  709 20:06:44.655276    PCI: 00:02.0: enabled 1
  710 20:06:44.657925    PCI: 00:04.0: enabled 1
  711 20:06:44.661151     GENERIC: 0.0: enabled 1
  712 20:06:44.664392    PCI: 00:05.0: enabled 1
  713 20:06:44.667898    PCI: 00:06.0: enabled 0
  714 20:06:44.668447    PCI: 00:07.0: enabled 0
  715 20:06:44.671118     GENERIC: 0.0: enabled 1
  716 20:06:44.674963    PCI: 00:07.1: enabled 0
  717 20:06:44.677921     GENERIC: 1.0: enabled 1
  718 20:06:44.681357    PCI: 00:07.2: enabled 0
  719 20:06:44.684798     GENERIC: 0.0: enabled 1
  720 20:06:44.685391    PCI: 00:07.3: enabled 0
  721 20:06:44.688207     GENERIC: 1.0: enabled 1
  722 20:06:44.691192    PCI: 00:08.0: enabled 1
  723 20:06:44.694292    PCI: 00:09.0: enabled 0
  724 20:06:44.697931    PCI: 00:0a.0: enabled 0
  725 20:06:44.698527    PCI: 00:0d.0: enabled 1
  726 20:06:44.701187     USB0 port 0: enabled 1
  727 20:06:44.704689      USB3 port 0: enabled 1
  728 20:06:44.707714      USB3 port 1: enabled 1
  729 20:06:44.711061      USB3 port 2: enabled 0
  730 20:06:44.711652      USB3 port 3: enabled 0
  731 20:06:44.714436    PCI: 00:0d.1: enabled 0
  732 20:06:44.717893    PCI: 00:0d.2: enabled 0
  733 20:06:44.720979     GENERIC: 0.0: enabled 1
  734 20:06:44.723959    PCI: 00:0d.3: enabled 0
  735 20:06:44.724446    PCI: 00:0e.0: enabled 0
  736 20:06:44.727584    PCI: 00:10.2: enabled 1
  737 20:06:44.730699    PCI: 00:10.6: enabled 0
  738 20:06:44.734055    PCI: 00:10.7: enabled 0
  739 20:06:44.737428    PCI: 00:12.0: enabled 0
  740 20:06:44.738050    PCI: 00:12.6: enabled 0
  741 20:06:44.741172    PCI: 00:13.0: enabled 0
  742 20:06:44.744083    PCI: 00:14.0: enabled 1
  743 20:06:44.747147     USB0 port 0: enabled 1
  744 20:06:44.750727      USB2 port 0: enabled 0
  745 20:06:44.751166      USB2 port 1: enabled 1
  746 20:06:44.753976      USB2 port 2: enabled 1
  747 20:06:44.757542      USB2 port 3: enabled 0
  748 20:06:44.760983      USB2 port 4: enabled 1
  749 20:06:44.763978      USB2 port 5: enabled 0
  750 20:06:44.767534      USB2 port 6: enabled 0
  751 20:06:44.768207      USB2 port 7: enabled 0
  752 20:06:44.770951      USB2 port 8: enabled 0
  753 20:06:44.774001      USB2 port 9: enabled 0
  754 20:06:44.777260      USB3 port 0: enabled 0
  755 20:06:44.781038      USB3 port 1: enabled 1
  756 20:06:44.783904      USB3 port 2: enabled 0
  757 20:06:44.784450      USB3 port 3: enabled 0
  758 20:06:44.787356    PCI: 00:14.1: enabled 0
  759 20:06:44.790782    PCI: 00:14.2: enabled 1
  760 20:06:44.793828    PCI: 00:14.3: enabled 1
  761 20:06:44.797205     GENERIC: 0.0: enabled 1
  762 20:06:44.797845    PCI: 00:15.0: enabled 1
  763 20:06:44.800670     I2C: 00:1a: enabled 1
  764 20:06:44.804035     I2C: 00:31: enabled 1
  765 20:06:44.807194     I2C: 00:32: enabled 1
  766 20:06:44.807750    PCI: 00:15.1: enabled 1
  767 20:06:44.810432     I2C: 00:10: enabled 1
  768 20:06:44.813851    PCI: 00:15.2: enabled 1
  769 20:06:44.817057    PCI: 00:15.3: enabled 1
  770 20:06:44.820319    PCI: 00:16.0: enabled 1
  771 20:06:44.820803    PCI: 00:16.1: enabled 0
  772 20:06:44.824277    PCI: 00:16.2: enabled 0
  773 20:06:44.828398    PCI: 00:16.3: enabled 0
  774 20:06:44.828969    PCI: 00:16.4: enabled 0
  775 20:06:44.831439  
  776 20:06:44.832020    PCI: 00:16.5: enabled 0
  777 20:06:44.834840    PCI: 00:17.0: enabled 1
  778 20:06:44.838005    PCI: 00:19.0: enabled 0
  779 20:06:44.841445    PCI: 00:19.1: enabled 1
  780 20:06:44.841934     I2C: 00:15: enabled 1
  781 20:06:44.844390    PCI: 00:19.2: enabled 0
  782 20:06:44.847878    PCI: 00:1d.0: enabled 1
  783 20:06:44.851512     GENERIC: 0.0: enabled 1
  784 20:06:44.854527    PCI: 00:1e.0: enabled 1
  785 20:06:44.854976    PCI: 00:1e.1: enabled 0
  786 20:06:44.904890    PCI: 00:1e.2: enabled 1
  787 20:06:44.905588     SPI: 00: enabled 1
  788 20:06:44.906456    PCI: 00:1e.3: enabled 1
  789 20:06:44.906899     SPI: 00: enabled 1
  790 20:06:44.907303    PCI: 00:1f.0: enabled 1
  791 20:06:44.907659     PNP: 0c09.0: enabled 1
  792 20:06:44.908040    PCI: 00:1f.1: enabled 0
  793 20:06:44.908487    PCI: 00:1f.2: enabled 1
  794 20:06:44.908889     GENERIC: 0.0: enabled 1
  795 20:06:44.909294      GENERIC: 0.0: enabled 1
  796 20:06:44.909688      GENERIC: 1.0: enabled 1
  797 20:06:44.910105    PCI: 00:1f.3: enabled 1
  798 20:06:44.910482    PCI: 00:1f.4: enabled 0
  799 20:06:44.910841    PCI: 00:1f.5: enabled 1
  800 20:06:44.911251    PCI: 00:1f.6: enabled 0
  801 20:06:44.911656    PCI: 00:1f.7: enabled 0
  802 20:06:44.911995   CPU_CLUSTER: 0: enabled 1
  803 20:06:44.912397    APIC: 00: enabled 1
  804 20:06:44.912798    APIC: 01: enabled 1
  805 20:06:44.956834    APIC: 07: enabled 1
  806 20:06:44.957448    APIC: 02: enabled 1
  807 20:06:44.957926    APIC: 04: enabled 1
  808 20:06:44.958274    APIC: 06: enabled 1
  809 20:06:44.958678    APIC: 03: enabled 1
  810 20:06:44.959007    APIC: 05: enabled 1
  811 20:06:44.959798  Root Device scanning...
  812 20:06:44.960170  scan_static_bus for Root Device
  813 20:06:44.960555  DOMAIN: 0000 enabled
  814 20:06:44.960907  CPU_CLUSTER: 0 enabled
  815 20:06:44.961349  DOMAIN: 0000 scanning...
  816 20:06:44.961698  PCI: pci_scan_bus for bus 00
  817 20:06:44.962076  PCI: 00:00.0 [8086/0000] ops
  818 20:06:44.962385  PCI: 00:00.0 [8086/9a12] enabled
  819 20:06:44.962687  PCI: 00:02.0 [8086/0000] bus ops
  820 20:06:44.962984  PCI: 00:02.0 [8086/9a40] enabled
  821 20:06:44.963290  PCI: 00:04.0 [8086/0000] bus ops
  822 20:06:44.963585  PCI: 00:04.0 [8086/9a03] enabled
  823 20:06:44.992379  PCI: 00:05.0 [8086/9a19] enabled
  824 20:06:44.993002  PCI: 00:07.0 [0000/0000] hidden
  825 20:06:44.993390  PCI: 00:08.0 [8086/9a11] enabled
  826 20:06:44.993800  PCI: 00:0a.0 [8086/9a0d] disabled
  827 20:06:44.994152  PCI: 00:0d.0 [8086/0000] bus ops
  828 20:06:44.994489  PCI: 00:0d.0 [8086/9a13] enabled
  829 20:06:44.994816  PCI: 00:14.0 [8086/0000] bus ops
  830 20:06:44.995135  PCI: 00:14.0 [8086/a0ed] enabled
  831 20:06:44.995822  PCI: 00:14.2 [8086/a0ef] enabled
  832 20:06:44.996179  PCI: 00:14.3 [8086/0000] bus ops
  833 20:06:44.996839  PCI: 00:14.3 [8086/a0f0] enabled
  834 20:06:44.997188  PCI: 00:15.0 [8086/0000] bus ops
  835 20:06:44.999242  PCI: 00:15.0 [8086/a0e8] enabled
  836 20:06:45.002408  PCI: 00:15.1 [8086/0000] bus ops
  837 20:06:45.005719  PCI: 00:15.1 [8086/a0e9] enabled
  838 20:06:45.009133  PCI: 00:15.2 [8086/0000] bus ops
  839 20:06:45.013122  PCI: 00:15.2 [8086/a0ea] enabled
  840 20:06:45.015760  PCI: 00:15.3 [8086/0000] bus ops
  841 20:06:45.019490  PCI: 00:15.3 [8086/a0eb] enabled
  842 20:06:45.022955  PCI: 00:16.0 [8086/0000] ops
  843 20:06:45.025670  PCI: 00:16.0 [8086/a0e0] enabled
  844 20:06:45.032254  PCI: Static device PCI: 00:17.0 not found, disabling it.
  845 20:06:45.035717  PCI: 00:19.0 [8086/0000] bus ops
  846 20:06:45.038909  PCI: 00:19.0 [8086/a0c5] disabled
  847 20:06:45.042283  PCI: 00:19.1 [8086/0000] bus ops
  848 20:06:45.045556  PCI: 00:19.1 [8086/a0c6] enabled
  849 20:06:45.048622  PCI: 00:1d.0 [8086/0000] bus ops
  850 20:06:45.052168  PCI: 00:1d.0 [8086/a0b0] enabled
  851 20:06:45.055493  PCI: 00:1e.0 [8086/0000] ops
  852 20:06:45.059188  PCI: 00:1e.0 [8086/a0a8] enabled
  853 20:06:45.062276  PCI: 00:1e.2 [8086/0000] bus ops
  854 20:06:45.065215  PCI: 00:1e.2 [8086/a0aa] enabled
  855 20:06:45.068777  PCI: 00:1e.3 [8086/0000] bus ops
  856 20:06:45.071831  PCI: 00:1e.3 [8086/a0ab] enabled
  857 20:06:45.075122  PCI: 00:1f.0 [8086/0000] bus ops
  858 20:06:45.078692  PCI: 00:1f.0 [8086/a087] enabled
  859 20:06:45.079126  RTC Init
  860 20:06:45.082042  Set power on after power failure.
  861 20:06:45.085086  Disabling Deep S3
  862 20:06:45.085633  Disabling Deep S3
  863 20:06:45.088401  Disabling Deep S4
  864 20:06:45.088833  Disabling Deep S4
  865 20:06:45.091865  Disabling Deep S5
  866 20:06:45.092309  Disabling Deep S5
  867 20:06:45.095395  
  868 20:06:45.095865  PCI: 00:1f.2 [0000/0000] hidden
  869 20:06:45.098237  PCI: 00:1f.3 [8086/0000] bus ops
  870 20:06:45.101739  PCI: 00:1f.3 [8086/a0c8] enabled
  871 20:06:45.105178  PCI: 00:1f.5 [8086/0000] bus ops
  872 20:06:45.108663  PCI: 00:1f.5 [8086/a0a4] enabled
  873 20:06:45.111678  PCI: Leftover static devices:
  874 20:06:45.115646  PCI: 00:10.2
  875 20:06:45.116070  PCI: 00:10.6
  876 20:06:45.118679  PCI: 00:10.7
  877 20:06:45.119105  PCI: 00:06.0
  878 20:06:45.119442  PCI: 00:07.1
  879 20:06:45.122005  PCI: 00:07.2
  880 20:06:45.122448  PCI: 00:07.3
  881 20:06:45.124693  PCI: 00:09.0
  882 20:06:45.125117  PCI: 00:0d.1
  883 20:06:45.128521  PCI: 00:0d.2
  884 20:06:45.128960  PCI: 00:0d.3
  885 20:06:45.129298  PCI: 00:0e.0
  886 20:06:45.131754  PCI: 00:12.0
  887 20:06:45.132333  PCI: 00:12.6
  888 20:06:45.134972  PCI: 00:13.0
  889 20:06:45.135407  PCI: 00:14.1
  890 20:06:45.135753  PCI: 00:16.1
  891 20:06:45.138617  PCI: 00:16.2
  892 20:06:45.139114  PCI: 00:16.3
  893 20:06:45.141773  PCI: 00:16.4
  894 20:06:45.142210  PCI: 00:16.5
  895 20:06:45.142602  PCI: 00:17.0
  896 20:06:45.145088  
  897 20:06:45.145615  PCI: 00:19.2
  898 20:06:45.145967  PCI: 00:1e.1
  899 20:06:45.148352  PCI: 00:1f.1
  900 20:06:45.148779  PCI: 00:1f.4
  901 20:06:45.151803  PCI: 00:1f.6
  902 20:06:45.152336  PCI: 00:1f.7
  903 20:06:45.155145  PCI: Check your devicetree.cb.
  904 20:06:45.158277  PCI: 00:02.0 scanning...
  905 20:06:45.161985  scan_generic_bus for PCI: 00:02.0
  906 20:06:45.164581  scan_generic_bus for PCI: 00:02.0 done
  907 20:06:45.168347  scan_bus: bus PCI: 00:02.0 finished in 7 msecs
  908 20:06:45.171674  PCI: 00:04.0 scanning...
  909 20:06:45.175002  scan_generic_bus for PCI: 00:04.0
  910 20:06:45.178475  GENERIC: 0.0 enabled
  911 20:06:45.184764  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
  912 20:06:45.188410  scan_bus: bus PCI: 00:04.0 finished in 11 msecs
  913 20:06:45.191104  PCI: 00:0d.0 scanning...
  914 20:06:45.194642  scan_static_bus for PCI: 00:0d.0
  915 20:06:45.197714  USB0 port 0 enabled
  916 20:06:45.198184  USB0 port 0 scanning...
  917 20:06:45.201320  scan_static_bus for USB0 port 0
  918 20:06:45.204964  USB3 port 0 enabled
  919 20:06:45.207710  USB3 port 1 enabled
  920 20:06:45.208135  USB3 port 2 disabled
  921 20:06:45.211454  USB3 port 3 disabled
  922 20:06:45.214831  USB3 port 0 scanning...
  923 20:06:45.218118  scan_static_bus for USB3 port 0
  924 20:06:45.221642  scan_static_bus for USB3 port 0 done
  925 20:06:45.224401  scan_bus: bus USB3 port 0 finished in 6 msecs
  926 20:06:45.227626  USB3 port 1 scanning...
  927 20:06:45.231105  scan_static_bus for USB3 port 1
  928 20:06:45.234595  scan_static_bus for USB3 port 1 done
  929 20:06:45.241315  scan_bus: bus USB3 port 1 finished in 6 msecs
  930 20:06:45.244389  scan_static_bus for USB0 port 0 done
  931 20:06:45.247605  scan_bus: bus USB0 port 0 finished in 43 msecs
  932 20:06:45.251087  scan_static_bus for PCI: 00:0d.0 done
  933 20:06:45.257465  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
  934 20:06:45.257991  PCI: 00:14.0 scanning...
  935 20:06:45.261541  scan_static_bus for PCI: 00:14.0
  936 20:06:45.264188  USB0 port 0 enabled
  937 20:06:45.267829  USB0 port 0 scanning...
  938 20:06:45.271325  scan_static_bus for USB0 port 0
  939 20:06:45.274426  USB2 port 0 disabled
  940 20:06:45.274965  USB2 port 1 enabled
  941 20:06:45.278019  USB2 port 2 enabled
  942 20:06:45.278584  USB2 port 3 disabled
  943 20:06:45.281026  USB2 port 4 enabled
  944 20:06:45.284327  USB2 port 5 disabled
  945 20:06:45.284890  USB2 port 6 disabled
  946 20:06:45.287876  USB2 port 7 disabled
  947 20:06:45.291064  USB2 port 8 disabled
  948 20:06:45.291564  USB2 port 9 disabled
  949 20:06:45.294205  USB3 port 0 disabled
  950 20:06:45.297610  USB3 port 1 enabled
  951 20:06:45.298043  USB3 port 2 disabled
  952 20:06:45.300890  USB3 port 3 disabled
  953 20:06:45.304473  USB2 port 1 scanning...
  954 20:06:45.307664  scan_static_bus for USB2 port 1
  955 20:06:45.310737  scan_static_bus for USB2 port 1 done
  956 20:06:45.314113  scan_bus: bus USB2 port 1 finished in 6 msecs
  957 20:06:45.317703  USB2 port 2 scanning...
  958 20:06:45.320413  scan_static_bus for USB2 port 2
  959 20:06:45.323689  scan_static_bus for USB2 port 2 done
  960 20:06:45.327117  scan_bus: bus USB2 port 2 finished in 6 msecs
  961 20:06:45.330698  
  962 20:06:45.331245  USB2 port 4 scanning...
  963 20:06:45.333697  scan_static_bus for USB2 port 4
  964 20:06:45.336898  scan_static_bus for USB2 port 4 done
  965 20:06:45.343938  scan_bus: bus USB2 port 4 finished in 6 msecs
  966 20:06:45.347226  USB3 port 1 scanning...
  967 20:06:45.350349  scan_static_bus for USB3 port 1
  968 20:06:45.353798  scan_static_bus for USB3 port 1 done
  969 20:06:45.356553  scan_bus: bus USB3 port 1 finished in 6 msecs
  970 20:06:45.360023  scan_static_bus for USB0 port 0 done
  971 20:06:45.366519  scan_bus: bus USB0 port 0 finished in 93 msecs
  972 20:06:45.370242  scan_static_bus for PCI: 00:14.0 done
  973 20:06:45.373352  scan_bus: bus PCI: 00:14.0 finished in 110 msecs
  974 20:06:45.376580  PCI: 00:14.3 scanning...
  975 20:06:45.379812  scan_static_bus for PCI: 00:14.3
  976 20:06:45.383205  GENERIC: 0.0 enabled
  977 20:06:45.386625  scan_static_bus for PCI: 00:14.3 done
  978 20:06:45.389633  scan_bus: bus PCI: 00:14.3 finished in 9 msecs
  979 20:06:45.393042  PCI: 00:15.0 scanning...
  980 20:06:45.396336  scan_static_bus for PCI: 00:15.0
  981 20:06:45.400409  I2C: 00:1a enabled
  982 20:06:45.400846  I2C: 00:31 enabled
  983 20:06:45.403710  I2C: 00:32 enabled
  984 20:06:45.407185  scan_static_bus for PCI: 00:15.0 done
  985 20:06:45.410704  scan_bus: bus PCI: 00:15.0 finished in 12 msecs
  986 20:06:45.414094  PCI: 00:15.1 scanning...
  987 20:06:45.417103  scan_static_bus for PCI: 00:15.1
  988 20:06:45.420407  I2C: 00:10 enabled
  989 20:06:45.423762  scan_static_bus for PCI: 00:15.1 done
  990 20:06:45.427100  scan_bus: bus PCI: 00:15.1 finished in 9 msecs
  991 20:06:45.430574  PCI: 00:15.2 scanning...
  992 20:06:45.433616  scan_static_bus for PCI: 00:15.2
  993 20:06:45.436839  scan_static_bus for PCI: 00:15.2 done
  994 20:06:45.444110  scan_bus: bus PCI: 00:15.2 finished in 7 msecs
  995 20:06:45.444680  PCI: 00:15.3 scanning...
  996 20:06:45.447319  scan_static_bus for PCI: 00:15.3
  997 20:06:45.454150  scan_static_bus for PCI: 00:15.3 done
  998 20:06:45.457394  scan_bus: bus PCI: 00:15.3 finished in 7 msecs
  999 20:06:45.460766  PCI: 00:19.1 scanning...
 1000 20:06:45.463675  scan_static_bus for PCI: 00:19.1
 1001 20:06:45.464254  I2C: 00:15 enabled
 1002 20:06:45.470620  scan_static_bus for PCI: 00:19.1 done
 1003 20:06:45.473818  scan_bus: bus PCI: 00:19.1 finished in 9 msecs
 1004 20:06:45.477352  PCI: 00:1d.0 scanning...
 1005 20:06:45.480559  do_pci_scan_bridge for PCI: 00:1d.0
 1006 20:06:45.483628  PCI: pci_scan_bus for bus 01
 1007 20:06:45.486849  PCI: 01:00.0 [1c5c/174a] enabled
 1008 20:06:45.490402  GENERIC: 0.0 enabled
 1009 20:06:45.493884  Enabling Common Clock Configuration
 1010 20:06:45.496885  L1 Sub-State supported from root port 29
 1011 20:06:45.500549  L1 Sub-State Support = 0xf
 1012 20:06:45.503398  CommonModeRestoreTime = 0x28
 1013 20:06:45.506783  Power On Value = 0x16, Power On Scale = 0x0
 1014 20:06:45.510199  ASPM: Enabled L1
 1015 20:06:45.513429  PCIe: Max_Payload_Size adjusted to 128
 1016 20:06:45.516874  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
 1017 20:06:45.519896  PCI: 00:1e.2 scanning...
 1018 20:06:45.523241  scan_generic_bus for PCI: 00:1e.2
 1019 20:06:45.526479  SPI: 00 enabled
 1020 20:06:45.529884  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
 1021 20:06:45.536511  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
 1022 20:06:45.539899  PCI: 00:1e.3 scanning...
 1023 20:06:45.543125  scan_generic_bus for PCI: 00:1e.3
 1024 20:06:45.543565  SPI: 00 enabled
 1025 20:06:45.550125  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
 1026 20:06:45.553216  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
 1027 20:06:45.556708  PCI: 00:1f.0 scanning...
 1028 20:06:45.559822  scan_static_bus for PCI: 00:1f.0
 1029 20:06:45.562936  PNP: 0c09.0 enabled
 1030 20:06:45.566261  PNP: 0c09.0 scanning...
 1031 20:06:45.570023  scan_static_bus for PNP: 0c09.0
 1032 20:06:45.573148  scan_static_bus for PNP: 0c09.0 done
 1033 20:06:45.576479  scan_bus: bus PNP: 0c09.0 finished in 6 msecs
 1034 20:06:45.579578  scan_static_bus for PCI: 00:1f.0 done
 1035 20:06:45.586334  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
 1036 20:06:45.589711  PCI: 00:1f.2 scanning...
 1037 20:06:45.593038  scan_static_bus for PCI: 00:1f.2
 1038 20:06:45.593573  GENERIC: 0.0 enabled
 1039 20:06:45.596726  GENERIC: 0.0 scanning...
 1040 20:06:45.599433  scan_static_bus for GENERIC: 0.0
 1041 20:06:45.602849  GENERIC: 0.0 enabled
 1042 20:06:45.603347  GENERIC: 1.0 enabled
 1043 20:06:45.609415  scan_static_bus for GENERIC: 0.0 done
 1044 20:06:45.613185  scan_bus: bus GENERIC: 0.0 finished in 11 msecs
 1045 20:06:45.616346  scan_static_bus for PCI: 00:1f.2 done
 1046 20:06:45.622786  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
 1047 20:06:45.623381  PCI: 00:1f.3 scanning...
 1048 20:06:45.626020  scan_static_bus for PCI: 00:1f.3
 1049 20:06:45.632748  scan_static_bus for PCI: 00:1f.3 done
 1050 20:06:45.635972  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
 1051 20:06:45.639263  PCI: 00:1f.5 scanning...
 1052 20:06:45.642639  scan_generic_bus for PCI: 00:1f.5
 1053 20:06:45.645786  scan_generic_bus for PCI: 00:1f.5 done
 1054 20:06:45.649298  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
 1055 20:06:45.652999  
 1056 20:06:45.655985  scan_bus: bus DOMAIN: 0000 finished in 717 msecs
 1057 20:06:45.658962  scan_static_bus for Root Device done
 1058 20:06:45.665729  scan_bus: bus Root Device finished in 736 msecs
 1059 20:06:45.666208  done
 1060 20:06:45.672656  BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
 1061 20:06:45.675467  Chrome EC: UHEPI supported
 1062 20:06:45.678844  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
 1063 20:06:45.685718  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
 1064 20:06:45.689220  SPI flash protection: WPSW=0 SRP0=0
 1065 20:06:45.695779  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
 1066 20:06:45.702341  BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
 1067 20:06:45.702943  found VGA at PCI: 00:02.0
 1068 20:06:45.705692  Setting up VGA for PCI: 00:02.0
 1069 20:06:45.712495  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
 1070 20:06:45.715467  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
 1071 20:06:45.718897  Allocating resources...
 1072 20:06:45.722432  Reading resources...
 1073 20:06:45.725646  Root Device read_resources bus 0 link: 0
 1074 20:06:45.728674  DOMAIN: 0000 read_resources bus 0 link: 0
 1075 20:06:45.735693  PCI: 00:04.0 read_resources bus 1 link: 0
 1076 20:06:45.739220  PCI: 00:04.0 read_resources bus 1 link: 0 done
 1077 20:06:45.746159  PCI: 00:0d.0 read_resources bus 0 link: 0
 1078 20:06:45.749411  USB0 port 0 read_resources bus 0 link: 0
 1079 20:06:45.756014  USB0 port 0 read_resources bus 0 link: 0 done
 1080 20:06:45.759695  PCI: 00:0d.0 read_resources bus 0 link: 0 done
 1081 20:06:45.765652  PCI: 00:14.0 read_resources bus 0 link: 0
 1082 20:06:45.769152  USB0 port 0 read_resources bus 0 link: 0
 1083 20:06:45.776013  USB0 port 0 read_resources bus 0 link: 0 done
 1084 20:06:45.779008  PCI: 00:14.0 read_resources bus 0 link: 0 done
 1085 20:06:45.785724  PCI: 00:14.3 read_resources bus 0 link: 0
 1086 20:06:45.789221  PCI: 00:14.3 read_resources bus 0 link: 0 done
 1087 20:06:45.792423  PCI: 00:15.0 read_resources bus 0 link: 0
 1088 20:06:45.795538  
 1089 20:06:45.798785  PCI: 00:15.0 read_resources bus 0 link: 0 done
 1090 20:06:45.805696  PCI: 00:15.1 read_resources bus 0 link: 0
 1091 20:06:45.808800  PCI: 00:15.1 read_resources bus 0 link: 0 done
 1092 20:06:45.815819  PCI: 00:19.1 read_resources bus 0 link: 0
 1093 20:06:45.819395  PCI: 00:19.1 read_resources bus 0 link: 0 done
 1094 20:06:45.825604  PCI: 00:1d.0 read_resources bus 1 link: 0
 1095 20:06:45.829144  PCI: 00:1d.0 read_resources bus 1 link: 0 done
 1096 20:06:45.835638  PCI: 00:1e.2 read_resources bus 2 link: 0
 1097 20:06:45.839008  PCI: 00:1e.2 read_resources bus 2 link: 0 done
 1098 20:06:45.845570  PCI: 00:1e.3 read_resources bus 3 link: 0
 1099 20:06:45.849071  PCI: 00:1e.3 read_resources bus 3 link: 0 done
 1100 20:06:45.854854  PCI: 00:1f.0 read_resources bus 0 link: 0
 1101 20:06:45.858205  PCI: 00:1f.0 read_resources bus 0 link: 0 done
 1102 20:06:45.865117  PCI: 00:1f.2 read_resources bus 0 link: 0
 1103 20:06:45.868296  GENERIC: 0.0 read_resources bus 0 link: 0
 1104 20:06:45.875237  GENERIC: 0.0 read_resources bus 0 link: 0 done
 1105 20:06:45.878033  PCI: 00:1f.2 read_resources bus 0 link: 0 done
 1106 20:06:45.885156  DOMAIN: 0000 read_resources bus 0 link: 0 done
 1107 20:06:45.888395  CPU_CLUSTER: 0 read_resources bus 0 link: 0
 1108 20:06:45.894589  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
 1109 20:06:45.898134  Root Device read_resources bus 0 link: 0 done
 1110 20:06:45.901412  Done reading resources.
 1111 20:06:45.907904  Show resources in subtree (Root Device)...After reading.
 1112 20:06:45.911244   Root Device child on link 0 DOMAIN: 0000
 1113 20:06:45.915008    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1114 20:06:45.924865    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
 1115 20:06:45.934369    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
 1116 20:06:45.934869     PCI: 00:00.0
 1117 20:06:45.944619     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1118 20:06:45.955227     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
 1119 20:06:45.964208     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1120 20:06:45.974280     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1121 20:06:45.984256     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1122 20:06:45.994356     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1123 20:06:46.000620     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
 1124 20:06:46.010811     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1125 20:06:46.020747     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1126 20:06:46.030720     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
 1127 20:06:46.040457     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
 1128 20:06:46.047257     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
 1129 20:06:46.057338     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
 1130 20:06:46.067199     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
 1131 20:06:46.077012     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
 1132 20:06:46.087212     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
 1133 20:06:46.096956     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
 1134 20:06:46.107071     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
 1135 20:06:46.113390     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
 1136 20:06:46.123218     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
 1137 20:06:46.126414     PCI: 00:02.0
 1138 20:06:46.136583     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
 1139 20:06:46.146191     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
 1140 20:06:46.155989     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
 1141 20:06:46.159259     PCI: 00:04.0 child on link 0 GENERIC: 0.0
 1142 20:06:46.169202     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
 1143 20:06:46.172581      GENERIC: 0.0
 1144 20:06:46.172892     PCI: 00:05.0
 1145 20:06:46.182446     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
 1146 20:06:46.188961     PCI: 00:07.0 child on link 0 GENERIC: 0.0
 1147 20:06:46.189124      GENERIC: 0.0
 1148 20:06:46.192318     PCI: 00:08.0
 1149 20:06:46.202405     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1150 20:06:46.202524     PCI: 00:0a.0
 1151 20:06:46.205465     PCI: 00:0d.0 child on link 0 USB0 port 0
 1152 20:06:46.215106     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
 1153 20:06:46.221843      USB0 port 0 child on link 0 USB3 port 0
 1154 20:06:46.221934       USB3 port 0
 1155 20:06:46.225206       USB3 port 1
 1156 20:06:46.225292       USB3 port 2
 1157 20:06:46.228637       USB3 port 3
 1158 20:06:46.232090     PCI: 00:14.0 child on link 0 USB0 port 0
 1159 20:06:46.241847     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
 1160 20:06:46.248210      USB0 port 0 child on link 0 USB2 port 0
 1161 20:06:46.248328       USB2 port 0
 1162 20:06:46.251626       USB2 port 1
 1163 20:06:46.251721       USB2 port 2
 1164 20:06:46.255068       USB2 port 3
 1165 20:06:46.255162       USB2 port 4
 1166 20:06:46.258476       USB2 port 5
 1167 20:06:46.258566       USB2 port 6
 1168 20:06:46.261834       USB2 port 7
 1169 20:06:46.261924       USB2 port 8
 1170 20:06:46.264929       USB2 port 9
 1171 20:06:46.265017       USB3 port 0
 1172 20:06:46.268156       USB3 port 1
 1173 20:06:46.271761       USB3 port 2
 1174 20:06:46.271848       USB3 port 3
 1175 20:06:46.275158     PCI: 00:14.2
 1176 20:06:46.284934     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1177 20:06:46.294749     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1178 20:06:46.298144     PCI: 00:14.3 child on link 0 GENERIC: 0.0
 1179 20:06:46.308358     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1180 20:06:46.308588      GENERIC: 0.0
 1181 20:06:46.314646     PCI: 00:15.0 child on link 0 I2C: 00:1a
 1182 20:06:46.324634     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1183 20:06:46.324858      I2C: 00:1a
 1184 20:06:46.328228      I2C: 00:31
 1185 20:06:46.328496      I2C: 00:32
 1186 20:06:46.331712     PCI: 00:15.1 child on link 0 I2C: 00:10
 1187 20:06:46.341499     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1188 20:06:46.344764      I2C: 00:10
 1189 20:06:46.345021     PCI: 00:15.2
 1190 20:06:46.354755     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1191 20:06:46.357817     PCI: 00:15.3
 1192 20:06:46.368139     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1193 20:06:46.368649     PCI: 00:16.0
 1194 20:06:46.378295     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1195 20:06:46.381304     PCI: 00:19.0
 1196 20:06:46.384882     PCI: 00:19.1 child on link 0 I2C: 00:15
 1197 20:06:46.394422     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1198 20:06:46.397901      I2C: 00:15
 1199 20:06:46.401068     PCI: 00:1d.0 child on link 0 GENERIC: 0.0
 1200 20:06:46.411132     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
 1201 20:06:46.421191     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
 1202 20:06:46.427752     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
 1203 20:06:46.430773      GENERIC: 0.0
 1204 20:06:46.434131      PCI: 01:00.0
 1205 20:06:46.444300      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1206 20:06:46.451026      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
 1207 20:06:46.461312      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
 1208 20:06:46.464038     PCI: 00:1e.0
 1209 20:06:46.474052     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1210 20:06:46.477464     PCI: 00:1e.2 child on link 0 SPI: 00
 1211 20:06:46.487484     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1212 20:06:46.490847      SPI: 00
 1213 20:06:46.494137     PCI: 00:1e.3 child on link 0 SPI: 00
 1214 20:06:46.504127     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1215 20:06:46.504572      SPI: 00
 1216 20:06:46.507419     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1217 20:06:46.510846  
 1218 20:06:46.517370     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1219 20:06:46.520469      PNP: 0c09.0
 1220 20:06:46.527178      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1221 20:06:46.534304     PCI: 00:1f.2 child on link 0 GENERIC: 0.0
 1222 20:06:46.540483     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
 1223 20:06:46.544218  
 1224 20:06:46.550198     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
 1225 20:06:46.557065      GENERIC: 0.0 child on link 0 GENERIC: 0.0
 1226 20:06:46.557635       GENERIC: 0.0
 1227 20:06:46.560693       GENERIC: 1.0
 1228 20:06:46.561285     PCI: 00:1f.3
 1229 20:06:46.570400     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1230 20:06:46.580360     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
 1231 20:06:46.583990     PCI: 00:1f.5
 1232 20:06:46.593728     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
 1233 20:06:46.597102    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1234 20:06:46.597726     APIC: 00
 1235 20:06:46.600368     APIC: 01
 1236 20:06:46.600994     APIC: 07
 1237 20:06:46.601382     APIC: 02
 1238 20:06:46.603497     APIC: 04
 1239 20:06:46.604001     APIC: 06
 1240 20:06:46.606716     APIC: 03
 1241 20:06:46.607199     APIC: 05
 1242 20:06:46.613754  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
 1243 20:06:46.620093   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
 1244 20:06:46.626966   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
 1245 20:06:46.633640   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
 1246 20:06:46.636980    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem
 1247 20:06:46.639720    PCI: 01:00.0 18 *  [0x4000 - 0x4fff] mem
 1248 20:06:46.643078    PCI: 01:00.0 1c *  [0x5000 - 0x5fff] mem
 1249 20:06:46.646079  
 1250 20:06:46.653393   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
 1251 20:06:46.659942   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 1252 20:06:46.666452   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 1253 20:06:46.673039  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
 1254 20:06:46.679845  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
 1255 20:06:46.689326   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
 1256 20:06:46.696179   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
 1257 20:06:46.703001   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
 1258 20:06:46.706032   DOMAIN: 0000: Resource ranges:
 1259 20:06:46.709528   * Base: 1000, Size: 800, Tag: 100
 1260 20:06:46.712664   * Base: 1900, Size: e700, Tag: 100
 1261 20:06:46.719151    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io
 1262 20:06:46.726409  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
 1263 20:06:46.733193  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
 1264 20:06:46.739216   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
 1265 20:06:46.749212   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
 1266 20:06:46.755947   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
 1267 20:06:46.762244   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
 1268 20:06:46.772460   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
 1269 20:06:46.778870   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
 1270 20:06:46.785455   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
 1271 20:06:46.795368   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
 1272 20:06:46.802132   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
 1273 20:06:46.808882   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
 1274 20:06:46.819121   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
 1275 20:06:46.825224   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
 1276 20:06:46.832190   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
 1277 20:06:46.838339   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
 1278 20:06:46.841742  
 1279 20:06:46.848637   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
 1280 20:06:46.855034   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
 1281 20:06:46.865139   update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
 1282 20:06:46.871480   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
 1283 20:06:46.878317   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
 1284 20:06:46.884794   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
 1285 20:06:46.888118  
 1286 20:06:46.894843   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
 1287 20:06:46.901610   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
 1288 20:06:46.904849   DOMAIN: 0000: Resource ranges:
 1289 20:06:46.908311   * Base: 7fc00000, Size: 40400000, Tag: 200
 1290 20:06:46.914951   * Base: d0000000, Size: 28000000, Tag: 200
 1291 20:06:46.917829   * Base: fa000000, Size: 1000000, Tag: 200
 1292 20:06:46.921184   * Base: fb001000, Size: 2fff000, Tag: 200
 1293 20:06:46.927876   * Base: fe010000, Size: 2e000, Tag: 200
 1294 20:06:46.931019   * Base: fe03f000, Size: d41000, Tag: 200
 1295 20:06:46.934535   * Base: fed88000, Size: 8000, Tag: 200
 1296 20:06:46.937842   * Base: fed93000, Size: d000, Tag: 200
 1297 20:06:46.944770   * Base: feda2000, Size: 1e000, Tag: 200
 1298 20:06:46.947816   * Base: fede0000, Size: 1220000, Tag: 200
 1299 20:06:46.951561   * Base: 280400000, Size: 7d7fc00000, Tag: 100200
 1300 20:06:46.957606    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
 1301 20:06:46.964714    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem
 1302 20:06:46.971091    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem
 1303 20:06:46.978069    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
 1304 20:06:46.984716    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
 1305 20:06:46.991420    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
 1306 20:06:46.997783    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
 1307 20:06:47.004499    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
 1308 20:06:47.010879    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
 1309 20:06:47.017801    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
 1310 20:06:47.024270    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
 1311 20:06:47.030542    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
 1312 20:06:47.037587    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
 1313 20:06:47.044181    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
 1314 20:06:47.051046    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
 1315 20:06:47.057638    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
 1316 20:06:47.064009    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
 1317 20:06:47.070954    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
 1318 20:06:47.077373    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
 1319 20:06:47.084070    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
 1320 20:06:47.090548    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
 1321 20:06:47.096943    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
 1322 20:06:47.106861  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
 1323 20:06:47.113869  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
 1324 20:06:47.116793   PCI: 00:1d.0: Resource ranges:
 1325 20:06:47.120246   * Base: 7fc00000, Size: 100000, Tag: 200
 1326 20:06:47.126633    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
 1327 20:06:47.133856    PCI: 01:00.0 18 *  [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
 1328 20:06:47.140047    PCI: 01:00.0 1c *  [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
 1329 20:06:47.150149  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
 1330 20:06:47.156567  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
 1331 20:06:47.159881  Root Device assign_resources, bus 0 link: 0
 1332 20:06:47.166408  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1333 20:06:47.172877  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
 1334 20:06:47.182843  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
 1335 20:06:47.189501  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
 1336 20:06:47.199402  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
 1337 20:06:47.202822  PCI: 00:04.0 assign_resources, bus 1 link: 0
 1338 20:06:47.209602  PCI: 00:04.0 assign_resources, bus 1 link: 0
 1339 20:06:47.216357  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
 1340 20:06:47.226179  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
 1341 20:06:47.232648  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
 1342 20:06:47.236105  PCI: 00:0d.0 assign_resources, bus 0 link: 0
 1343 20:06:47.242544  PCI: 00:0d.0 assign_resources, bus 0 link: 0
 1344 20:06:47.249506  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
 1345 20:06:47.255957  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1346 20:06:47.259195  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1347 20:06:47.268809  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
 1348 20:06:47.275765  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
 1349 20:06:47.282442  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
 1350 20:06:47.286090  
 1351 20:06:47.288810  PCI: 00:14.3 assign_resources, bus 0 link: 0
 1352 20:06:47.292149  PCI: 00:14.3 assign_resources, bus 0 link: 0
 1353 20:06:47.302117  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
 1354 20:06:47.305572  PCI: 00:15.0 assign_resources, bus 0 link: 0
 1355 20:06:47.311729  PCI: 00:15.0 assign_resources, bus 0 link: 0
 1356 20:06:47.318606  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
 1357 20:06:47.321945  PCI: 00:15.1 assign_resources, bus 0 link: 0
 1358 20:06:47.328697  PCI: 00:15.1 assign_resources, bus 0 link: 0
 1359 20:06:47.335417  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
 1360 20:06:47.345054  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
 1361 20:06:47.352060  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
 1362 20:06:47.361866  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
 1363 20:06:47.364986  PCI: 00:19.1 assign_resources, bus 0 link: 0
 1364 20:06:47.371676  PCI: 00:19.1 assign_resources, bus 0 link: 0
 1365 20:06:47.378420  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
 1366 20:06:47.388166  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
 1367 20:06:47.398262  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
 1368 20:06:47.401265  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1369 20:06:47.410976  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
 1370 20:06:47.417643  PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
 1371 20:06:47.424360  PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
 1372 20:06:47.431066  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1373 20:06:47.437964  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
 1374 20:06:47.444284  PCI: 00:1e.2 assign_resources, bus 2 link: 0
 1375 20:06:47.447864  PCI: 00:1e.2 assign_resources, bus 2 link: 0
 1376 20:06:47.457919  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
 1377 20:06:47.461138  PCI: 00:1e.3 assign_resources, bus 3 link: 0
 1378 20:06:47.464386  PCI: 00:1e.3 assign_resources, bus 3 link: 0
 1379 20:06:47.470891  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1380 20:06:47.474135  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1381 20:06:47.481060  LPC: Trying to open IO window from 800 size 1ff
 1382 20:06:47.487577  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
 1383 20:06:47.497272  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
 1384 20:06:47.504108  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
 1385 20:06:47.510550  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1386 20:06:47.513666  Root Device assign_resources, bus 0 link: 0
 1387 20:06:47.517214  Done setting resources.
 1388 20:06:47.523962  Show resources in subtree (Root Device)...After assigning values.
 1389 20:06:47.527259   Root Device child on link 0 DOMAIN: 0000
 1390 20:06:47.530506    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1391 20:06:47.540850    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
 1392 20:06:47.550478    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
 1393 20:06:47.553779     PCI: 00:00.0
 1394 20:06:47.563860     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1395 20:06:47.570055     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
 1396 20:06:47.580414     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1397 20:06:47.590563     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1398 20:06:47.600336     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1399 20:06:47.609960     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1400 20:06:47.620104     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
 1401 20:06:47.626638     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1402 20:06:47.636964     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1403 20:06:47.646176     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
 1404 20:06:47.656370     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
 1405 20:06:47.666441     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
 1406 20:06:47.676093     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
 1407 20:06:47.682663     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
 1408 20:06:47.693082     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
 1409 20:06:47.702541     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
 1410 20:06:47.712841     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
 1411 20:06:47.722291     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
 1412 20:06:47.732423     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
 1413 20:06:47.741948     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
 1414 20:06:47.742409     PCI: 00:02.0
 1415 20:06:47.752414     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
 1416 20:06:47.762070     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
 1417 20:06:47.765860  
 1418 20:06:47.772384     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
 1419 20:06:47.778563     PCI: 00:04.0 child on link 0 GENERIC: 0.0
 1420 20:06:47.788674     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
 1421 20:06:47.789199      GENERIC: 0.0
 1422 20:06:47.792126     PCI: 00:05.0
 1423 20:06:47.802218     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
 1424 20:06:47.804973     PCI: 00:07.0 child on link 0 GENERIC: 0.0
 1425 20:06:47.808514      GENERIC: 0.0
 1426 20:06:47.809055     PCI: 00:08.0
 1427 20:06:47.821946     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
 1428 20:06:47.822403     PCI: 00:0a.0
 1429 20:06:47.824845     PCI: 00:0d.0 child on link 0 USB0 port 0
 1430 20:06:47.838303     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
 1431 20:06:47.841299      USB0 port 0 child on link 0 USB3 port 0
 1432 20:06:47.841865       USB3 port 0
 1433 20:06:47.844826       USB3 port 1
 1434 20:06:47.845375       USB3 port 2
 1435 20:06:47.848382       USB3 port 3
 1436 20:06:47.851437     PCI: 00:14.0 child on link 0 USB0 port 0
 1437 20:06:47.861468     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
 1438 20:06:47.868154      USB0 port 0 child on link 0 USB2 port 0
 1439 20:06:47.868738       USB2 port 0
 1440 20:06:47.871700       USB2 port 1
 1441 20:06:47.872237       USB2 port 2
 1442 20:06:47.874461       USB2 port 3
 1443 20:06:47.874909       USB2 port 4
 1444 20:06:47.877911       USB2 port 5
 1445 20:06:47.881242       USB2 port 6
 1446 20:06:47.881815       USB2 port 7
 1447 20:06:47.884499       USB2 port 8
 1448 20:06:47.885051       USB2 port 9
 1449 20:06:47.888387       USB3 port 0
 1450 20:06:47.888902       USB3 port 1
 1451 20:06:47.891298       USB3 port 2
 1452 20:06:47.891845       USB3 port 3
 1453 20:06:47.894444     PCI: 00:14.2
 1454 20:06:47.904700     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
 1455 20:06:47.914077     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
 1456 20:06:47.917933     PCI: 00:14.3 child on link 0 GENERIC: 0.0
 1457 20:06:47.927502     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
 1458 20:06:47.931056  
 1459 20:06:47.931543      GENERIC: 0.0
 1460 20:06:47.934358     PCI: 00:15.0 child on link 0 I2C: 00:1a
 1461 20:06:47.944338     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
 1462 20:06:47.947521      I2C: 00:1a
 1463 20:06:47.947982      I2C: 00:31
 1464 20:06:47.951247      I2C: 00:32
 1465 20:06:47.953997     PCI: 00:15.1 child on link 0 I2C: 00:10
 1466 20:06:47.964624     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
 1467 20:06:47.967464      I2C: 00:10
 1468 20:06:47.968057     PCI: 00:15.2
 1469 20:06:47.977618     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
 1470 20:06:47.980913     PCI: 00:15.3
 1471 20:06:47.990937     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
 1472 20:06:47.991513     PCI: 00:16.0
 1473 20:06:48.003993     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
 1474 20:06:48.004509     PCI: 00:19.0
 1475 20:06:48.007383     PCI: 00:19.1 child on link 0 I2C: 00:15
 1476 20:06:48.017175     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
 1477 20:06:48.020722  
 1478 20:06:48.021298      I2C: 00:15
 1479 20:06:48.023948     PCI: 00:1d.0 child on link 0 GENERIC: 0.0
 1480 20:06:48.033984     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
 1481 20:06:48.047257     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
 1482 20:06:48.057030     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
 1483 20:06:48.057595      GENERIC: 0.0
 1484 20:06:48.060473      PCI: 01:00.0
 1485 20:06:48.070558      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
 1486 20:06:48.080231      PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
 1487 20:06:48.090360      PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
 1488 20:06:48.093867     PCI: 00:1e.0
 1489 20:06:48.103680     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1490 20:06:48.107010     PCI: 00:1e.2 child on link 0 SPI: 00
 1491 20:06:48.116644     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
 1492 20:06:48.120293      SPI: 00
 1493 20:06:48.123739     PCI: 00:1e.3 child on link 0 SPI: 00
 1494 20:06:48.133362     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
 1495 20:06:48.136707      SPI: 00
 1496 20:06:48.140014     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1497 20:06:48.146991     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1498 20:06:48.150160  
 1499 20:06:48.150656      PNP: 0c09.0
 1500 20:06:48.160127      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1501 20:06:48.163094     PCI: 00:1f.2 child on link 0 GENERIC: 0.0
 1502 20:06:48.173717     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
 1503 20:06:48.183650     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
 1504 20:06:48.186377      GENERIC: 0.0 child on link 0 GENERIC: 0.0
 1505 20:06:48.190400       GENERIC: 0.0
 1506 20:06:48.190998       GENERIC: 1.0
 1507 20:06:48.193149     PCI: 00:1f.3
 1508 20:06:48.203281     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
 1509 20:06:48.212994     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
 1510 20:06:48.213587     PCI: 00:1f.5
 1511 20:06:48.226621     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
 1512 20:06:48.229636    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1513 20:06:48.230137     APIC: 00
 1514 20:06:48.233242     APIC: 01
 1515 20:06:48.233777     APIC: 07
 1516 20:06:48.234270     APIC: 02
 1517 20:06:48.236751     APIC: 04
 1518 20:06:48.237325     APIC: 06
 1519 20:06:48.237858     APIC: 03
 1520 20:06:48.239512     APIC: 05
 1521 20:06:48.243024  Done allocating resources.
 1522 20:06:48.249383  BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
 1523 20:06:48.252709  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
 1524 20:06:48.256090  Configure GPIOs for I2S audio on UP4.
 1525 20:06:48.259826  
 1526 20:06:48.265908  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
 1527 20:06:48.266358  Enabling resources...
 1528 20:06:48.272952  PCI: 00:00.0 subsystem <- 8086/9a12
 1529 20:06:48.273601  PCI: 00:00.0 cmd <- 06
 1530 20:06:48.275762  PCI: 00:02.0 subsystem <- 8086/9a40
 1531 20:06:48.279183  PCI: 00:02.0 cmd <- 03
 1532 20:06:48.282725  PCI: 00:04.0 subsystem <- 8086/9a03
 1533 20:06:48.285792  PCI: 00:04.0 cmd <- 02
 1534 20:06:48.289376  PCI: 00:05.0 subsystem <- 8086/9a19
 1535 20:06:48.292859  PCI: 00:05.0 cmd <- 02
 1536 20:06:48.296209  PCI: 00:08.0 subsystem <- 8086/9a11
 1537 20:06:48.298946  PCI: 00:08.0 cmd <- 06
 1538 20:06:48.302811  PCI: 00:0d.0 subsystem <- 8086/9a13
 1539 20:06:48.305913  PCI: 00:0d.0 cmd <- 02
 1540 20:06:48.309212  PCI: 00:14.0 subsystem <- 8086/a0ed
 1541 20:06:48.312452  PCI: 00:14.0 cmd <- 02
 1542 20:06:48.315776  PCI: 00:14.2 subsystem <- 8086/a0ef
 1543 20:06:48.316272  PCI: 00:14.2 cmd <- 02
 1544 20:06:48.322478  PCI: 00:14.3 subsystem <- 8086/a0f0
 1545 20:06:48.323066  PCI: 00:14.3 cmd <- 02
 1546 20:06:48.326118  PCI: 00:15.0 subsystem <- 8086/a0e8
 1547 20:06:48.329420  PCI: 00:15.0 cmd <- 02
 1548 20:06:48.332241  PCI: 00:15.1 subsystem <- 8086/a0e9
 1549 20:06:48.335478  PCI: 00:15.1 cmd <- 02
 1550 20:06:48.339003  PCI: 00:15.2 subsystem <- 8086/a0ea
 1551 20:06:48.342247  PCI: 00:15.2 cmd <- 02
 1552 20:06:48.345649  PCI: 00:15.3 subsystem <- 8086/a0eb
 1553 20:06:48.348690  PCI: 00:15.3 cmd <- 02
 1554 20:06:48.351965  PCI: 00:16.0 subsystem <- 8086/a0e0
 1555 20:06:48.355592  PCI: 00:16.0 cmd <- 02
 1556 20:06:48.359286  PCI: 00:19.1 subsystem <- 8086/a0c6
 1557 20:06:48.361982  PCI: 00:19.1 cmd <- 02
 1558 20:06:48.365513  PCI: 00:1d.0 bridge ctrl <- 0013
 1559 20:06:48.368569  PCI: 00:1d.0 subsystem <- 8086/a0b0
 1560 20:06:48.369058  PCI: 00:1d.0 cmd <- 06
 1561 20:06:48.375325  PCI: 00:1e.0 subsystem <- 8086/a0a8
 1562 20:06:48.375770  PCI: 00:1e.0 cmd <- 06
 1563 20:06:48.378459  PCI: 00:1e.2 subsystem <- 8086/a0aa
 1564 20:06:48.381899  PCI: 00:1e.2 cmd <- 06
 1565 20:06:48.385577  PCI: 00:1e.3 subsystem <- 8086/a0ab
 1566 20:06:48.388941  PCI: 00:1e.3 cmd <- 02
 1567 20:06:48.392024  PCI: 00:1f.0 subsystem <- 8086/a087
 1568 20:06:48.395117  PCI: 00:1f.0 cmd <- 407
 1569 20:06:48.398454  PCI: 00:1f.3 subsystem <- 8086/a0c8
 1570 20:06:48.402073  PCI: 00:1f.3 cmd <- 02
 1571 20:06:48.405409  PCI: 00:1f.5 subsystem <- 8086/a0a4
 1572 20:06:48.408595  PCI: 00:1f.5 cmd <- 406
 1573 20:06:48.412076  PCI: 01:00.0 cmd <- 02
 1574 20:06:48.416338  done.
 1575 20:06:48.419445  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
 1576 20:06:48.422940  Initializing devices...
 1577 20:06:48.426311  Root Device init
 1578 20:06:48.429605  Chrome EC: Set SMI mask to 0x0000000000000000
 1579 20:06:48.436477  Chrome EC: clear events_b mask to 0x0000000000000000
 1580 20:06:48.442782  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
 1581 20:06:48.449326  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
 1582 20:06:48.456164  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
 1583 20:06:48.459520  Chrome EC: Set WAKE mask to 0x0000000000000000
 1584 20:06:48.467110  fw_config match found: DB_USB=USB3_ACTIVE
 1585 20:06:48.470751  Configure Right Type-C port orientation for retimer
 1586 20:06:48.473653  Root Device init finished in 46 msecs
 1587 20:06:48.477923  PCI: 00:00.0 init
 1588 20:06:48.481120  CPU TDP = 9 Watts
 1589 20:06:48.481687  CPU PL1 = 9 Watts
 1590 20:06:48.484726  CPU PL2 = 40 Watts
 1591 20:06:48.487903  CPU PL4 = 83 Watts
 1592 20:06:48.491234  PCI: 00:00.0 init finished in 8 msecs
 1593 20:06:48.491835  PCI: 00:02.0 init
 1594 20:06:48.494643  GMA: Found VBT in CBFS
 1595 20:06:48.497753  GMA: Found valid VBT in CBFS
 1596 20:06:48.504128  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
 1597 20:06:48.511086                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
 1598 20:06:48.514163  PCI: 00:02.0 init finished in 18 msecs
 1599 20:06:48.517575  PCI: 00:05.0 init
 1600 20:06:48.520718  PCI: 00:05.0 init finished in 0 msecs
 1601 20:06:48.524213  PCI: 00:08.0 init
 1602 20:06:48.527406  PCI: 00:08.0 init finished in 0 msecs
 1603 20:06:48.530830  PCI: 00:14.0 init
 1604 20:06:48.533839  PCI: 00:14.0 init finished in 0 msecs
 1605 20:06:48.537598  PCI: 00:14.2 init
 1606 20:06:48.541247  PCI: 00:14.2 init finished in 0 msecs
 1607 20:06:48.544223  PCI: 00:15.0 init
 1608 20:06:48.544783  I2C bus 0 version 0x3230302a
 1609 20:06:48.547565  
 1610 20:06:48.550786  DW I2C bus 0 at 0x7fe4e000 (400 KHz)
 1611 20:06:48.553857  PCI: 00:15.0 init finished in 6 msecs
 1612 20:06:48.554299  PCI: 00:15.1 init
 1613 20:06:48.557174  I2C bus 1 version 0x3230302a
 1614 20:06:48.560580  DW I2C bus 1 at 0x7fe4f000 (400 KHz)
 1615 20:06:48.566955  PCI: 00:15.1 init finished in 6 msecs
 1616 20:06:48.567398  PCI: 00:15.2 init
 1617 20:06:48.570312  I2C bus 2 version 0x3230302a
 1618 20:06:48.573878  DW I2C bus 2 at 0x7fe50000 (400 KHz)
 1619 20:06:48.576816  PCI: 00:15.2 init finished in 6 msecs
 1620 20:06:48.580264  PCI: 00:15.3 init
 1621 20:06:48.583603  I2C bus 3 version 0x3230302a
 1622 20:06:48.587230  DW I2C bus 3 at 0x7fe51000 (400 KHz)
 1623 20:06:48.590852  PCI: 00:15.3 init finished in 6 msecs
 1624 20:06:48.593582  PCI: 00:16.0 init
 1625 20:06:48.597280  PCI: 00:16.0 init finished in 0 msecs
 1626 20:06:48.600383  PCI: 00:19.1 init
 1627 20:06:48.603667  I2C bus 5 version 0x3230302a
 1628 20:06:48.606892  DW I2C bus 5 at 0x7fe53000 (400 KHz)
 1629 20:06:48.610043  PCI: 00:19.1 init finished in 6 msecs
 1630 20:06:48.613374  PCI: 00:1d.0 init
 1631 20:06:48.613901  Initializing PCH PCIe bridge.
 1632 20:06:48.616937  
 1633 20:06:48.620223  PCI: 00:1d.0 init finished in 3 msecs
 1634 20:06:48.623560  PCI: 00:1f.0 init
 1635 20:06:48.626938  IOAPIC: Initializing IOAPIC at 0xfec00000
 1636 20:06:48.630189  IOAPIC: Bootstrap Processor Local APIC = 0x00
 1637 20:06:48.633360  IOAPIC: ID = 0x02
 1638 20:06:48.636515  IOAPIC: Dumping registers
 1639 20:06:48.636958    reg 0x0000: 0x02000000
 1640 20:06:48.639992    reg 0x0001: 0x00770020
 1641 20:06:48.643333    reg 0x0002: 0x00000000
 1642 20:06:48.646832  PCI: 00:1f.0 init finished in 21 msecs
 1643 20:06:48.650021  PCI: 00:1f.2 init
 1644 20:06:48.653319  Disabling ACPI via APMC.
 1645 20:06:48.656850  APMC done.
 1646 20:06:48.660228  PCI: 00:1f.2 init finished in 6 msecs
 1647 20:06:48.671398  PCI: 01:00.0 init
 1648 20:06:48.674882  PCI: 01:00.0 init finished in 0 msecs
 1649 20:06:48.677835  PNP: 0c09.0 init
 1650 20:06:48.684786  Google Chrome EC uptime: 8.425 seconds
 1651 20:06:48.688288  Google Chrome AP resets since EC boot: 0
 1652 20:06:48.691280  Google Chrome most recent AP reset causes:
 1653 20:06:48.698193  Google Chrome EC reset flags at last EC boot: reset-pin
 1654 20:06:48.701056  PNP: 0c09.0 init finished in 19 msecs
 1655 20:06:48.706839  Devices initialized
 1656 20:06:48.710117  Show all devs... After init.
 1657 20:06:48.713287  Root Device: enabled 1
 1658 20:06:48.713803  DOMAIN: 0000: enabled 1
 1659 20:06:48.716647  CPU_CLUSTER: 0: enabled 1
 1660 20:06:48.720093  PCI: 00:00.0: enabled 1
 1661 20:06:48.723422  PCI: 00:02.0: enabled 1
 1662 20:06:48.723997  PCI: 00:04.0: enabled 1
 1663 20:06:48.726763  PCI: 00:05.0: enabled 1
 1664 20:06:48.730160  PCI: 00:06.0: enabled 0
 1665 20:06:48.733577  PCI: 00:07.0: enabled 0
 1666 20:06:48.734174  PCI: 00:07.1: enabled 0
 1667 20:06:48.736844  PCI: 00:07.2: enabled 0
 1668 20:06:48.739814  PCI: 00:07.3: enabled 0
 1669 20:06:48.743375  PCI: 00:08.0: enabled 1
 1670 20:06:48.743919  PCI: 00:09.0: enabled 0
 1671 20:06:48.746621  PCI: 00:0a.0: enabled 0
 1672 20:06:48.750037  PCI: 00:0d.0: enabled 1
 1673 20:06:48.750513  PCI: 00:0d.1: enabled 0
 1674 20:06:48.753107  
 1675 20:06:48.753606  PCI: 00:0d.2: enabled 0
 1676 20:06:48.756387  PCI: 00:0d.3: enabled 0
 1677 20:06:48.759804  PCI: 00:0e.0: enabled 0
 1678 20:06:48.760250  PCI: 00:10.2: enabled 1
 1679 20:06:48.763028  PCI: 00:10.6: enabled 0
 1680 20:06:48.766508  PCI: 00:10.7: enabled 0
 1681 20:06:48.769906  PCI: 00:12.0: enabled 0
 1682 20:06:48.770406  PCI: 00:12.6: enabled 0
 1683 20:06:48.772946  PCI: 00:13.0: enabled 0
 1684 20:06:48.776303  PCI: 00:14.0: enabled 1
 1685 20:06:48.779808  PCI: 00:14.1: enabled 0
 1686 20:06:48.780256  PCI: 00:14.2: enabled 1
 1687 20:06:48.782960  PCI: 00:14.3: enabled 1
 1688 20:06:48.786582  PCI: 00:15.0: enabled 1
 1689 20:06:48.789544  PCI: 00:15.1: enabled 1
 1690 20:06:48.789994  PCI: 00:15.2: enabled 1
 1691 20:06:48.793339  PCI: 00:15.3: enabled 1
 1692 20:06:48.796760  PCI: 00:16.0: enabled 1
 1693 20:06:48.797305  PCI: 00:16.1: enabled 0
 1694 20:06:48.799572  PCI: 00:16.2: enabled 0
 1695 20:06:48.803205  PCI: 00:16.3: enabled 0
 1696 20:06:48.806792  PCI: 00:16.4: enabled 0
 1697 20:06:48.807381  PCI: 00:16.5: enabled 0
 1698 20:06:48.809692  PCI: 00:17.0: enabled 0
 1699 20:06:48.813358  PCI: 00:19.0: enabled 0
 1700 20:06:48.816639  PCI: 00:19.1: enabled 1
 1701 20:06:48.817129  PCI: 00:19.2: enabled 0
 1702 20:06:48.820275  PCI: 00:1c.0: enabled 1
 1703 20:06:48.823166  PCI: 00:1c.1: enabled 0
 1704 20:06:48.826282  PCI: 00:1c.2: enabled 0
 1705 20:06:48.826877  PCI: 00:1c.3: enabled 0
 1706 20:06:48.829661  PCI: 00:1c.4: enabled 0
 1707 20:06:48.833159  PCI: 00:1c.5: enabled 0
 1708 20:06:48.833788  PCI: 00:1c.6: enabled 1
 1709 20:06:48.836420  
 1710 20:06:48.836985  PCI: 00:1c.7: enabled 0
 1711 20:06:48.839764  PCI: 00:1d.0: enabled 1
 1712 20:06:48.842956  PCI: 00:1d.1: enabled 0
 1713 20:06:48.843491  PCI: 00:1d.2: enabled 1
 1714 20:06:48.845927  PCI: 00:1d.3: enabled 0
 1715 20:06:48.849674  PCI: 00:1e.0: enabled 1
 1716 20:06:48.852781  PCI: 00:1e.1: enabled 0
 1717 20:06:48.853267  PCI: 00:1e.2: enabled 1
 1718 20:06:48.856041  PCI: 00:1e.3: enabled 1
 1719 20:06:48.859321  PCI: 00:1f.0: enabled 1
 1720 20:06:48.862962  PCI: 00:1f.1: enabled 0
 1721 20:06:48.863576  PCI: 00:1f.2: enabled 1
 1722 20:06:48.866097  PCI: 00:1f.3: enabled 1
 1723 20:06:48.869472  PCI: 00:1f.4: enabled 0
 1724 20:06:48.872855  PCI: 00:1f.5: enabled 1
 1725 20:06:48.873444  PCI: 00:1f.6: enabled 0
 1726 20:06:48.876381  PCI: 00:1f.7: enabled 0
 1727 20:06:48.879864  APIC: 00: enabled 1
 1728 20:06:48.880449  GENERIC: 0.0: enabled 1
 1729 20:06:48.882849  GENERIC: 0.0: enabled 1
 1730 20:06:48.886099  GENERIC: 1.0: enabled 1
 1731 20:06:48.889661  GENERIC: 0.0: enabled 1
 1732 20:06:48.890246  GENERIC: 1.0: enabled 1
 1733 20:06:48.893326  USB0 port 0: enabled 1
 1734 20:06:48.896530  GENERIC: 0.0: enabled 1
 1735 20:06:48.897116  USB0 port 0: enabled 1
 1736 20:06:48.899612  GENERIC: 0.0: enabled 1
 1737 20:06:48.902825  I2C: 00:1a: enabled 1
 1738 20:06:48.906199  I2C: 00:31: enabled 1
 1739 20:06:48.906784  I2C: 00:32: enabled 1
 1740 20:06:48.909811  I2C: 00:10: enabled 1
 1741 20:06:48.913046  I2C: 00:15: enabled 1
 1742 20:06:48.913677  GENERIC: 0.0: enabled 0
 1743 20:06:48.916071  GENERIC: 1.0: enabled 0
 1744 20:06:48.919875  GENERIC: 0.0: enabled 1
 1745 20:06:48.920568  SPI: 00: enabled 1
 1746 20:06:48.923167  SPI: 00: enabled 1
 1747 20:06:48.926107  PNP: 0c09.0: enabled 1
 1748 20:06:48.926694  GENERIC: 0.0: enabled 1
 1749 20:06:48.929268  USB3 port 0: enabled 1
 1750 20:06:48.932630  USB3 port 1: enabled 1
 1751 20:06:48.933109  USB3 port 2: enabled 0
 1752 20:06:48.935967  
 1753 20:06:48.936451  USB3 port 3: enabled 0
 1754 20:06:48.939139  USB2 port 0: enabled 0
 1755 20:06:48.943068  USB2 port 1: enabled 1
 1756 20:06:48.943674  USB2 port 2: enabled 1
 1757 20:06:48.945853  USB2 port 3: enabled 0
 1758 20:06:48.949063  USB2 port 4: enabled 1
 1759 20:06:48.949687  USB2 port 5: enabled 0
 1760 20:06:48.952564  USB2 port 6: enabled 0
 1761 20:06:48.955610  USB2 port 7: enabled 0
 1762 20:06:48.958972  USB2 port 8: enabled 0
 1763 20:06:48.959486  USB2 port 9: enabled 0
 1764 20:06:48.962442  USB3 port 0: enabled 0
 1765 20:06:48.965894  USB3 port 1: enabled 1
 1766 20:06:48.966381  USB3 port 2: enabled 0
 1767 20:06:48.969194  USB3 port 3: enabled 0
 1768 20:06:48.972562  GENERIC: 0.0: enabled 1
 1769 20:06:48.976353  GENERIC: 1.0: enabled 1
 1770 20:06:48.976943  APIC: 01: enabled 1
 1771 20:06:48.979349  APIC: 07: enabled 1
 1772 20:06:48.979940  APIC: 02: enabled 1
 1773 20:06:48.982452  APIC: 04: enabled 1
 1774 20:06:48.986015  APIC: 06: enabled 1
 1775 20:06:48.986601  APIC: 03: enabled 1
 1776 20:06:48.989550  APIC: 05: enabled 1
 1777 20:06:48.992587  PCI: 01:00.0: enabled 1
 1778 20:06:48.996039  BS: BS_DEV_INIT run times (exec / console): 34 / 536 ms
 1779 20:06:49.002181  FMAP: area RW_ELOG found @ f30000 (4096 bytes)
 1780 20:06:49.006069  ELOG: NV offset 0xf30000 size 0x1000
 1781 20:06:49.012321  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
 1782 20:06:49.018814  ELOG: Event(17) added with size 13 at 2022-12-19 20:06:48 UTC
 1783 20:06:49.025410  ELOG: Event(92) added with size 9 at 2022-12-19 20:06:48 UTC
 1784 20:06:49.031358  ELOG: Event(93) added with size 9 at 2022-12-19 20:06:48 UTC
 1785 20:06:49.038144  ELOG: Event(9E) added with size 10 at 2022-12-19 20:06:48 UTC
 1786 20:06:49.045057  ELOG: Event(9F) added with size 14 at 2022-12-19 20:06:48 UTC
 1787 20:06:49.051733  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
 1788 20:06:49.055067  ELOG: Event(A1) added with size 10 at 2022-12-19 20:06:48 UTC
 1789 20:06:49.065224  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
 1790 20:06:49.071495  ELOG: Event(A0) added with size 9 at 2022-12-19 20:06:48 UTC
 1791 20:06:49.074626  elog_add_boot_reason: Logged dev mode boot
 1792 20:06:49.081724  BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
 1793 20:06:49.081924  Finalize devices...
 1794 20:06:49.085031  Devices finalized
 1795 20:06:49.091380  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
 1796 20:06:49.094989  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
 1797 20:06:49.101531  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
 1798 20:06:49.104772  ME: HFSTS1                      : 0x80030055
 1799 20:06:49.111762  ME: HFSTS2                      : 0x30280116
 1800 20:06:49.114591  ME: HFSTS3                      : 0x00000050
 1801 20:06:49.118028  ME: HFSTS4                      : 0x00004000
 1802 20:06:49.125258  ME: HFSTS5                      : 0x00000000
 1803 20:06:49.128228  ME: HFSTS6                      : 0x00400006
 1804 20:06:49.131592  ME: Manufacturing Mode          : YES
 1805 20:06:49.135090  ME: SPI Protection Mode Enabled : NO
 1806 20:06:49.138353  ME: FW Partition Table          : OK
 1807 20:06:49.141698  ME: Bringup Loader Failure      : NO
 1808 20:06:49.148565  ME: Firmware Init Complete      : NO
 1809 20:06:49.151615  ME: Boot Options Present        : NO
 1810 20:06:49.154702  ME: Update In Progress          : NO
 1811 20:06:49.157983  ME: D0i3 Support                : YES
 1812 20:06:49.161309  ME: Low Power State Enabled     : NO
 1813 20:06:49.164661  ME: CPU Replaced                : YES
 1814 20:06:49.167931  ME: CPU Replacement Valid       : YES
 1815 20:06:49.171048  ME: Current Working State       : 5
 1816 20:06:49.178421  ME: Current Operation State     : 1
 1817 20:06:49.181427  ME: Current Operation Mode      : 3
 1818 20:06:49.184667  ME: Error Code                  : 0
 1819 20:06:49.188449  ME: Enhanced Debug Mode         : NO
 1820 20:06:49.191350  ME: CPU Debug Disabled          : YES
 1821 20:06:49.194872  ME: TXT Support                 : NO
 1822 20:06:49.201164  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
 1823 20:06:49.208098  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
 1824 20:06:49.211182  CBFS: 'fallback/slic' not found.
 1825 20:06:49.214553  ACPI: Writing ACPI tables at 76b01000.
 1826 20:06:49.217407  ACPI:    * FACS
 1827 20:06:49.217905  ACPI:    * DSDT
 1828 20:06:49.224435  Ramoops buffer: 0x100000@0x76a00000.
 1829 20:06:49.227572  FMAP: area RO_VPD found @ 1800000 (16384 bytes)
 1830 20:06:49.230997  FMAP: area RW_VPD found @ f35000 (8192 bytes)
 1831 20:06:49.234964  Google Chrome EC: version:
 1832 20:06:49.238123  	ro: voema_v2.0.10114-a447f03e46
 1833 20:06:49.241614  	rw: voema_v2.0.10114-a447f03e46
 1834 20:06:49.245032    running image: 1
 1835 20:06:49.251328  PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
 1836 20:06:49.254823  ACPI:    * FADT
 1837 20:06:49.255255  SCI is IRQ9
 1838 20:06:49.258008  ACPI: added table 1/32, length now 40
 1839 20:06:49.261314  
 1840 20:06:49.261805  ACPI:     * SSDT
 1841 20:06:49.264691  Found 1 CPU(s) with 8 core(s) each.
 1842 20:06:49.271109  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
 1843 20:06:49.274354  \_SB.DPTF: Intel DPTF at GENERIC: 0.0
 1844 20:06:49.277707  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
 1845 20:06:49.281272  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
 1846 20:06:49.287744  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
 1847 20:06:49.294093  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
 1848 20:06:49.297679  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
 1849 20:06:49.304511  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
 1850 20:06:49.311035  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
 1851 20:06:49.314433  \_SB.PCI0.RP09: Added StorageD3Enable property
 1852 20:06:49.321074  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
 1853 20:06:49.324535  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
 1854 20:06:49.330719  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
 1855 20:06:49.334030  PS2K: Passing 80 keymaps to kernel
 1856 20:06:49.340796  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
 1857 20:06:49.347346  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
 1858 20:06:49.354036  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
 1859 20:06:49.360618  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
 1860 20:06:49.367483  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
 1861 20:06:49.373796  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
 1862 20:06:49.380991  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
 1863 20:06:49.387150  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
 1864 20:06:49.390661  ACPI: added table 2/32, length now 44
 1865 20:06:49.391316  ACPI:    * MCFG
 1866 20:06:49.393536  ACPI: added table 3/32, length now 48
 1867 20:06:49.397097  ACPI:    * TPM2
 1868 20:06:49.400353  TPM2 log created at 0x769f0000
 1869 20:06:49.403908  ACPI: added table 4/32, length now 52
 1870 20:06:49.404321  ACPI:    * MADT
 1871 20:06:49.406821  
 1872 20:06:49.407521  SCI is IRQ9
 1873 20:06:49.410363  ACPI: added table 5/32, length now 56
 1874 20:06:49.413771  current = 76b09850
 1875 20:06:49.414356  ACPI:    * DMAR
 1876 20:06:49.417082  ACPI: added table 6/32, length now 60
 1877 20:06:49.420534  ACPI: added table 7/32, length now 64
 1878 20:06:49.423578  ACPI:    * HPET
 1879 20:06:49.427041  ACPI: added table 8/32, length now 68
 1880 20:06:49.427557  ACPI: done.
 1881 20:06:49.430399  ACPI tables: 35216 bytes.
 1882 20:06:49.433318  smbios_write_tables: 769ef000
 1883 20:06:49.437658  EC returned error result code 3
 1884 20:06:49.440553  Couldn't obtain OEM name from CBI
 1885 20:06:49.444548  Create SMBIOS type 16
 1886 20:06:49.447772  Create SMBIOS type 17
 1887 20:06:49.451284  GENERIC: 0.0 (WIFI Device)
 1888 20:06:49.451830  SMBIOS tables: 1750 bytes.
 1889 20:06:49.458289  Writing table forward entry at 0x00000500
 1890 20:06:49.464774  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
 1891 20:06:49.467781  Writing coreboot table at 0x76b25000
 1892 20:06:49.474402   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1893 20:06:49.477705   1. 0000000000001000-000000000009ffff: RAM
 1894 20:06:49.481046   2. 00000000000a0000-00000000000fffff: RESERVED
 1895 20:06:49.488040   3. 0000000000100000-00000000769eefff: RAM
 1896 20:06:49.491207   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
 1897 20:06:49.498074   5. 0000000076b98000-0000000076c09fff: RAMSTAGE
 1898 20:06:49.504246   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
 1899 20:06:49.508088   7. 0000000077000000-000000007fbfffff: RESERVED
 1900 20:06:49.511409   8. 00000000c0000000-00000000cfffffff: RESERVED
 1901 20:06:49.517640   9. 00000000f8000000-00000000f9ffffff: RESERVED
 1902 20:06:49.521333  10. 00000000fb000000-00000000fb000fff: RESERVED
 1903 20:06:49.527838  11. 00000000fe000000-00000000fe00ffff: RESERVED
 1904 20:06:49.530747  12. 00000000fed80000-00000000fed87fff: RESERVED
 1905 20:06:49.537733  13. 00000000fed90000-00000000fed92fff: RESERVED
 1906 20:06:49.540743  14. 00000000feda0000-00000000feda1fff: RESERVED
 1907 20:06:49.547944  15. 00000000fedc0000-00000000feddffff: RESERVED
 1908 20:06:49.551250  16. 0000000100000000-00000002803fffff: RAM
 1909 20:06:49.554310  Passing 4 GPIOs to payload:
 1910 20:06:49.557568              NAME |       PORT | POLARITY |     VALUE
 1911 20:06:49.563961               lid |  undefined |     high |      high
 1912 20:06:49.567588             power |  undefined |     high |       low
 1913 20:06:49.574339             oprom |  undefined |     high |       low
 1914 20:06:49.580647          EC in RW | 0x000000e5 |     high |       low
 1915 20:06:49.587222  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 639
 1916 20:06:49.587666  coreboot table: 1576 bytes.
 1917 20:06:49.590788  IMD ROOT    0. 0x76fff000 0x00001000
 1918 20:06:49.594353  
 1919 20:06:49.597527  IMD SMALL   1. 0x76ffe000 0x00001000
 1920 20:06:49.600727  FSP MEMORY  2. 0x76c4e000 0x003b0000
 1921 20:06:49.604201  VPD         3. 0x76c4d000 0x00000367
 1922 20:06:49.607541  RO MCACHE   4. 0x76c4c000 0x00000fdc
 1923 20:06:49.610725  CONSOLE     5. 0x76c2c000 0x00020000
 1924 20:06:49.614158  FMAP        6. 0x76c2b000 0x00000578
 1925 20:06:49.617115  TIME STAMP  7. 0x76c2a000 0x00000910
 1926 20:06:49.620793  VBOOT WORK  8. 0x76c16000 0x00014000
 1927 20:06:49.624147  
 1928 20:06:49.627543  ROMSTG STCK 9. 0x76c15000 0x00001000
 1929 20:06:49.630499  AFTER CAR  10. 0x76c0a000 0x0000b000
 1930 20:06:49.633969  RAMSTAGE   11. 0x76b97000 0x00073000
 1931 20:06:49.637377  REFCODE    12. 0x76b42000 0x00055000
 1932 20:06:49.640715  SMM BACKUP 13. 0x76b32000 0x00010000
 1933 20:06:49.644303  4f444749   14. 0x76b30000 0x00002000
 1934 20:06:49.647316  EXT VBT15. 0x76b2d000 0x0000219f
 1935 20:06:49.650495  COREBOOT   16. 0x76b25000 0x00008000
 1936 20:06:49.653809  ACPI       17. 0x76b01000 0x00024000
 1937 20:06:49.660490  ACPI GNVS  18. 0x76b00000 0x00001000
 1938 20:06:49.663539  RAMOOPS    19. 0x76a00000 0x00100000
 1939 20:06:49.667066  TPM2 TCGLOG20. 0x769f0000 0x00010000
 1940 20:06:49.670248  SMBIOS     21. 0x769ef000 0x00000800
 1941 20:06:49.673589  IMD small region:
 1942 20:06:49.676907    IMD ROOT    0. 0x76ffec00 0x00000400
 1943 20:06:49.680537    FSP RUNTIME 1. 0x76ffebe0 0x00000004
 1944 20:06:49.683405    POWER STATE 2. 0x76ffeb80 0x00000044
 1945 20:06:49.686857    ROMSTAGE    3. 0x76ffeb60 0x00000004
 1946 20:06:49.690248    MEM INFO    4. 0x76ffe980 0x000001e0
 1947 20:06:49.696845  BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
 1948 20:06:49.700077  MTRR: Physical address space:
 1949 20:06:49.707162  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
 1950 20:06:49.713670  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
 1951 20:06:49.719892  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
 1952 20:06:49.726707  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
 1953 20:06:49.733111  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
 1954 20:06:49.736688  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
 1955 20:06:49.743153  0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
 1956 20:06:49.749733  MTRR: Fixed MSR 0x250 0x0606060606060606
 1957 20:06:49.753194  MTRR: Fixed MSR 0x258 0x0606060606060606
 1958 20:06:49.756610  MTRR: Fixed MSR 0x259 0x0000000000000000
 1959 20:06:49.759825  MTRR: Fixed MSR 0x268 0x0606060606060606
 1960 20:06:49.766741  MTRR: Fixed MSR 0x269 0x0606060606060606
 1961 20:06:49.769447  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1962 20:06:49.772858  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1963 20:06:49.776159  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1964 20:06:49.779472  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1965 20:06:49.782783  
 1966 20:06:49.786059  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1967 20:06:49.789372  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1968 20:06:49.792699  call enable_fixed_mtrr()
 1969 20:06:49.796507  CPU physical address size: 39 bits
 1970 20:06:49.799271  MTRR: default type WB/UC MTRR counts: 6/6.
 1971 20:06:49.802745  
 1972 20:06:49.806144  MTRR: UC selected as default type.
 1973 20:06:49.809667  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
 1974 20:06:49.816134  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
 1975 20:06:49.822725  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
 1976 20:06:49.829423  MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
 1977 20:06:49.835598  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
 1978 20:06:49.842395  MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
 1979 20:06:49.842845  
 1980 20:06:49.846060  MTRR check
 1981 20:06:49.846606  Fixed MTRRs   : Enabled
 1982 20:06:49.849155  Variable MTRRs: Enabled
 1983 20:06:49.849636  
 1984 20:06:49.852822  MTRR: Fixed MSR 0x250 0x0606060606060606
 1985 20:06:49.858899  MTRR: Fixed MSR 0x258 0x0606060606060606
 1986 20:06:49.862065  MTRR: Fixed MSR 0x259 0x0000000000000000
 1987 20:06:49.865767  MTRR: Fixed MSR 0x268 0x0606060606060606
 1988 20:06:49.869265  MTRR: Fixed MSR 0x269 0x0606060606060606
 1989 20:06:49.876167  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1990 20:06:49.878719  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1991 20:06:49.882136  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1992 20:06:49.885466  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1993 20:06:49.892304  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1994 20:06:49.896000  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1995 20:06:49.902104  BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
 1996 20:06:49.905768  call enable_fixed_mtrr()
 1997 20:06:49.908508  MTRR: Fixed MSR 0x250 0x0606060606060606
 1998 20:06:49.912052  MTRR: Fixed MSR 0x250 0x0606060606060606
 1999 20:06:49.915506  MTRR: Fixed MSR 0x258 0x0606060606060606
 2000 20:06:49.922045  MTRR: Fixed MSR 0x259 0x0000000000000000
 2001 20:06:49.925336  MTRR: Fixed MSR 0x268 0x0606060606060606
 2002 20:06:49.928763  MTRR: Fixed MSR 0x269 0x0606060606060606
 2003 20:06:49.932114  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2004 20:06:49.938550  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2005 20:06:49.941913  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2006 20:06:49.945443  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2007 20:06:49.948737  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2008 20:06:49.955080  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2009 20:06:49.958451  MTRR: Fixed MSR 0x258 0x0606060606060606
 2010 20:06:49.961770  call enable_fixed_mtrr()
 2011 20:06:49.964987  MTRR: Fixed MSR 0x259 0x0000000000000000
 2012 20:06:49.968338  MTRR: Fixed MSR 0x268 0x0606060606060606
 2013 20:06:49.974995  MTRR: Fixed MSR 0x269 0x0606060606060606
 2014 20:06:49.978222  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2015 20:06:49.981861  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2016 20:06:49.985292  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2017 20:06:49.991384  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2018 20:06:49.994583  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2019 20:06:49.998273  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2020 20:06:50.001335  CPU physical address size: 39 bits
 2021 20:06:50.005842  call enable_fixed_mtrr()
 2022 20:06:50.009453  MTRR: Fixed MSR 0x250 0x0606060606060606
 2023 20:06:50.016018  MTRR: Fixed MSR 0x250 0x0606060606060606
 2024 20:06:50.018958  MTRR: Fixed MSR 0x258 0x0606060606060606
 2025 20:06:50.022505  MTRR: Fixed MSR 0x259 0x0000000000000000
 2026 20:06:50.025897  MTRR: Fixed MSR 0x268 0x0606060606060606
 2027 20:06:50.032185  MTRR: Fixed MSR 0x269 0x0606060606060606
 2028 20:06:50.035747  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2029 20:06:50.038709  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2030 20:06:50.042082  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2031 20:06:50.048685  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2032 20:06:50.052177  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2033 20:06:50.055633  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2034 20:06:50.061877  MTRR: Fixed MSR 0x258 0x0606060606060606
 2035 20:06:50.062352  call enable_fixed_mtrr()
 2036 20:06:50.068507  MTRR: Fixed MSR 0x259 0x0000000000000000
 2037 20:06:50.071830  MTRR: Fixed MSR 0x268 0x0606060606060606
 2038 20:06:50.075680  MTRR: Fixed MSR 0x269 0x0606060606060606
 2039 20:06:50.078778  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2040 20:06:50.085162  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2041 20:06:50.088537  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2042 20:06:50.092439  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2043 20:06:50.095237  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2044 20:06:50.098329  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2045 20:06:50.105211  CPU physical address size: 39 bits
 2046 20:06:50.108855  call enable_fixed_mtrr()
 2047 20:06:50.111714  CPU physical address size: 39 bits
 2048 20:06:50.115211  MTRR: Fixed MSR 0x250 0x0606060606060606
 2049 20:06:50.118253  MTRR: Fixed MSR 0x250 0x0606060606060606
 2050 20:06:50.121587  
 2051 20:06:50.125221  MTRR: Fixed MSR 0x258 0x0606060606060606
 2052 20:06:50.128490  MTRR: Fixed MSR 0x259 0x0000000000000000
 2053 20:06:50.131931  MTRR: Fixed MSR 0x268 0x0606060606060606
 2054 20:06:50.134869  MTRR: Fixed MSR 0x269 0x0606060606060606
 2055 20:06:50.141783  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2056 20:06:50.144865  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2057 20:06:50.148284  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2058 20:06:50.151497  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2059 20:06:50.158059  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2060 20:06:50.161508  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2061 20:06:50.164897  MTRR: Fixed MSR 0x258 0x0606060606060606
 2062 20:06:50.168314  call enable_fixed_mtrr()
 2063 20:06:50.171706  MTRR: Fixed MSR 0x259 0x0000000000000000
 2064 20:06:50.177981  MTRR: Fixed MSR 0x268 0x0606060606060606
 2065 20:06:50.181444  MTRR: Fixed MSR 0x269 0x0606060606060606
 2066 20:06:50.184642  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2067 20:06:50.188110  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2068 20:06:50.194953  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2069 20:06:50.198204  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2070 20:06:50.201178  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2071 20:06:50.204468  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2072 20:06:50.208528  CPU physical address size: 39 bits
 2073 20:06:50.215126  call enable_fixed_mtrr()
 2074 20:06:50.218608  CPU physical address size: 39 bits
 2075 20:06:50.221837  CPU physical address size: 39 bits
 2076 20:06:50.225679  Checking cr50 for pending updates
 2077 20:06:50.229192  CPU physical address size: 39 bits
 2078 20:06:50.232681  Reading cr50 TPM mode
 2079 20:06:50.242877  BS: BS_PAYLOAD_LOAD entry times (exec / console): 328 / 7 ms
 2080 20:06:50.252459  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
 2081 20:06:50.255859  Checking segment from ROM address 0xffc02b38
 2082 20:06:50.259340  Checking segment from ROM address 0xffc02b54
 2083 20:06:50.265911  Loading segment from ROM address 0xffc02b38
 2084 20:06:50.266378    code (compression=0)
 2085 20:06:50.275940    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
 2086 20:06:50.285587  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
 2087 20:06:50.286086  it's not compressed!
 2088 20:06:50.425288  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
 2089 20:06:50.431857  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
 2090 20:06:50.438416  Loading segment from ROM address 0xffc02b54
 2091 20:06:50.438914    Entry Point 0x30000000
 2092 20:06:50.442049  Loaded segments
 2093 20:06:50.448247  BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
 2094 20:06:50.491287  Finalizing chipset.
 2095 20:06:50.494711  Finalizing SMM.
 2096 20:06:50.495201  APMC done.
 2097 20:06:50.501413  BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
 2098 20:06:50.504724  mp_park_aps done after 0 msecs.
 2099 20:06:50.508024  Jumping to boot code at 0x30000000(0x76b25000)
 2100 20:06:50.517922  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
 2101 20:06:50.518489  
 2102 20:06:50.518879  
 2103 20:06:50.519235  
 2104 20:06:50.521143  Starting depthcharge on Voema...
 2105 20:06:50.521696  
 2106 20:06:50.522944  end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
 2107 20:06:50.523512  start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
 2108 20:06:50.523980  Setting prompt string to ['volteer:']
 2109 20:06:50.524495  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
 2110 20:06:50.531414  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
 2111 20:06:50.532014  
 2112 20:06:50.537989  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
 2113 20:06:50.538586  
 2114 20:06:50.544676  Looking for NVMe Controller 0x3005f238 @ 00:1d:00
 2115 20:06:50.545230  
 2116 20:06:50.547659  Failed to find eMMC card reader
 2117 20:06:50.548242  
 2118 20:06:50.548630  Wipe memory regions:
 2119 20:06:50.548986  
 2120 20:06:50.554437  	[0x00000000001000, 0x000000000a0000)
 2121 20:06:50.555089  
 2122 20:06:50.557204  	[0x00000000100000, 0x00000030000000)
 2123 20:06:50.557759  
 2124 20:06:50.586013  	[0x00000032662db0, 0x000000769ef000)
 2125 20:06:50.586612  
 2126 20:06:50.624598  	[0x00000100000000, 0x00000280400000)
 2127 20:06:50.625158  
 2128 20:06:50.827627  ec_init: CrosEC protocol v3 supported (256, 256)
 2129 20:06:50.828260  
 2130 20:06:51.258208  R8152: Initializing
 2131 20:06:51.258777  
 2132 20:06:51.261546  Version 6 (ocp_data = 5c30)
 2133 20:06:51.262090  
 2134 20:06:51.265003  R8152: Done initializing
 2135 20:06:51.265524  
 2136 20:06:51.267919  Adding net device
 2137 20:06:51.268453  
 2138 20:06:51.572452  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
 2139 20:06:51.573030  
 2140 20:06:51.573430  
 2141 20:06:51.573850  
 2142 20:06:51.576386  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2144 20:06:51.678306  volteer: tftpboot 192.168.201.1 8411780/tftp-deploy-fqdjc_6f/kernel/bzImage 8411780/tftp-deploy-fqdjc_6f/kernel/cmdline 8411780/tftp-deploy-fqdjc_6f/ramdisk/ramdisk.cpio.gz
 2145 20:06:51.679037  Setting prompt string to 'Starting kernel'
 2146 20:06:51.679462  Setting prompt string to ['Starting kernel']
 2147 20:06:51.679848  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2148 20:06:51.680259  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
 2149 20:06:51.684291  tftpboot 192.168.201.1 8411780/tftp-deploy-fqdjc_6f/kernel/bzImaoy-fqdjc_6f/kernel/cmdline 8411780/tftp-deploy-fqdjc_6f/ramdisk/ramdisk.cpio.gz
 2150 20:06:51.684799  
 2151 20:06:51.685184  Waiting for link
 2152 20:06:51.685571  
 2153 20:06:51.887046  done.
 2154 20:06:51.887663  
 2155 20:06:51.888165  MAC: 00:24:32:30:77:76
 2156 20:06:51.888718  
 2157 20:06:51.890336  Sending DHCP discover... done.
 2158 20:06:51.890970  
 2159 20:06:51.893648  Waiting for reply... done.
 2160 20:06:51.894212  
 2161 20:06:51.897139  Sending DHCP request... done.
 2162 20:06:51.897670  
 2163 20:06:51.903953  Waiting for reply... done.
 2164 20:06:51.904437  
 2165 20:06:51.904817  My ip is 192.168.201.16
 2166 20:06:51.905173  
 2167 20:06:51.906712  The DHCP server ip is 192.168.201.1
 2168 20:06:51.907203  
 2169 20:06:51.913428  TFTP server IP predefined by user: 192.168.201.1
 2170 20:06:51.913911  
 2171 20:06:51.920241  Bootfile predefined by user: 8411780/tftp-deploy-fqdjc_6f/kernel/bzImage
 2172 20:06:51.920685  
 2173 20:06:51.923490  Sending tftp read request... done.
 2174 20:06:51.923991  
 2175 20:06:51.930029  Waiting for the transfer... 
 2176 20:06:51.930510  
 2177 20:06:52.594555  00000000 ################################################################
 2178 20:06:52.595078  
 2179 20:06:53.264844  00080000 ################################################################
 2180 20:06:53.265355  
 2181 20:06:53.901542  00100000 ################################################################
 2182 20:06:53.902091  
 2183 20:06:54.569085  00180000 ################################################################
 2184 20:06:54.569771  
 2185 20:06:55.232961  00200000 ################################################################
 2186 20:06:55.233504  
 2187 20:06:55.891614  00280000 ################################################################
 2188 20:06:55.892174  
 2189 20:06:56.519924  00300000 ################################################################
 2190 20:06:56.520063  
 2191 20:06:57.119336  00380000 ################################################################
 2192 20:06:57.119481  
 2193 20:06:57.709530  00400000 ################################################################
 2194 20:06:57.709683  
 2195 20:06:58.308372  00480000 ################################################################
 2196 20:06:58.308524  
 2197 20:06:58.891040  00500000 ################################################################
 2198 20:06:58.891197  
 2199 20:06:59.461263  00580000 ################################################################
 2200 20:06:59.461407  
 2201 20:07:00.039864  00600000 ################################################################
 2202 20:07:00.040015  
 2203 20:07:00.571844  00680000 ################################################################
 2204 20:07:00.571998  
 2205 20:07:00.828336  00700000 ############################# done.
 2206 20:07:00.828487  
 2207 20:07:00.831178  The bootfile was 7573392 bytes long.
 2208 20:07:00.831266  
 2209 20:07:00.834620  Sending tftp read request... done.
 2210 20:07:00.834707  
 2211 20:07:00.837978  Waiting for the transfer... 
 2212 20:07:00.838064  
 2213 20:07:01.389250  00000000 ################################################################
 2214 20:07:01.389420  
 2215 20:07:01.948081  00080000 ################################################################
 2216 20:07:01.948236  
 2217 20:07:02.507748  00100000 ################################################################
 2218 20:07:02.507897  
 2219 20:07:03.061421  00180000 ################################################################
 2220 20:07:03.061589  
 2221 20:07:03.602620  00200000 ################################################################
 2222 20:07:03.602769  
 2223 20:07:04.199611  00280000 ################################################################
 2224 20:07:04.199762  
 2225 20:07:04.766539  00300000 ################################################################
 2226 20:07:04.766692  
 2227 20:07:05.302109  00380000 ################################################################
 2228 20:07:05.302254  
 2229 20:07:05.851320  00400000 ################################################################
 2230 20:07:05.851482  
 2231 20:07:06.392573  00480000 ################################################################
 2232 20:07:06.392725  
 2233 20:07:06.970429  00500000 ################################################################
 2234 20:07:06.970585  
 2235 20:07:07.528096  00580000 ################################################################
 2236 20:07:07.528249  
 2237 20:07:08.126318  00600000 ################################################################
 2238 20:07:08.126463  
 2239 20:07:08.702201  00680000 ################################################################
 2240 20:07:08.702350  
 2241 20:07:09.330085  00700000 ################################################################
 2242 20:07:09.330255  
 2243 20:07:09.887750  00780000 ################################################################
 2244 20:07:09.887889  
 2245 20:07:10.477039  00800000 ################################################################
 2246 20:07:10.477179  
 2247 20:07:11.052789  00880000 ################################################################
 2248 20:07:11.052931  
 2249 20:07:11.656972  00900000 ################################################################
 2250 20:07:11.657182  
 2251 20:07:12.277792  00980000 ################################################################
 2252 20:07:12.278321  
 2253 20:07:12.966624  00a00000 ################################################################
 2254 20:07:12.967219  
 2255 20:07:13.656400  00a80000 ################################################################
 2256 20:07:13.656942  
 2257 20:07:14.341975  00b00000 ################################################################
 2258 20:07:14.342563  
 2259 20:07:15.048216  00b80000 ################################################################
 2260 20:07:15.048847  
 2261 20:07:15.760572  00c00000 ################################################################
 2262 20:07:15.761221  
 2263 20:07:16.421166  00c80000 ################################################################
 2264 20:07:16.421750  
 2265 20:07:17.095451  00d00000 ################################################################
 2266 20:07:17.095609  
 2267 20:07:17.784421  00d80000 ################################################################
 2268 20:07:17.784959  
 2269 20:07:18.489356  00e00000 ################################################################
 2270 20:07:18.489971  
 2271 20:07:19.200722  00e80000 ################################################################
 2272 20:07:19.201322  
 2273 20:07:19.912449  00f00000 ################################################################
 2274 20:07:19.913079  
 2275 20:07:20.595873  00f80000 ################################################################
 2276 20:07:20.596429  
 2277 20:07:21.325841  01000000 ################################################################
 2278 20:07:21.326435  
 2279 20:07:21.937480  01080000 ################################################################
 2280 20:07:21.937662  
 2281 20:07:22.525947  01100000 ################################################################
 2282 20:07:22.526095  
 2283 20:07:23.098766  01180000 ################################################################
 2284 20:07:23.098923  
 2285 20:07:23.756285  01200000 ################################################################
 2286 20:07:23.756844  
 2287 20:07:24.358601  01280000 ################################################################
 2288 20:07:24.358768  
 2289 20:07:24.893676  01300000 ################################################################
 2290 20:07:24.893823  
 2291 20:07:25.437689  01380000 ################################################################
 2292 20:07:25.437848  
 2293 20:07:25.976476  01400000 ################################################################
 2294 20:07:25.976630  
 2295 20:07:26.536897  01480000 ################################################################
 2296 20:07:26.537055  
 2297 20:07:27.097403  01500000 ################################################################
 2298 20:07:27.097593  
 2299 20:07:27.665995  01580000 ################################################################
 2300 20:07:27.666158  
 2301 20:07:28.250243  01600000 ################################################################
 2302 20:07:28.250399  
 2303 20:07:28.860407  01680000 ################################################################
 2304 20:07:28.861008  
 2305 20:07:29.539594  01700000 ################################################################
 2306 20:07:29.540173  
 2307 20:07:30.209109  01780000 ################################################################
 2308 20:07:30.209749  
 2309 20:07:30.866359  01800000 ################################################################
 2310 20:07:30.866915  
 2311 20:07:31.552734  01880000 ################################################################
 2312 20:07:31.552886  
 2313 20:07:32.260830  01900000 ################################################################
 2314 20:07:32.261372  
 2315 20:07:32.974387  01980000 ################################################################
 2316 20:07:32.975040  
 2317 20:07:33.688715  01a00000 ################################################################
 2318 20:07:33.689336  
 2319 20:07:34.407321  01a80000 ################################################################
 2320 20:07:34.407881  
 2321 20:07:35.100457  01b00000 ################################################################
 2322 20:07:35.101015  
 2323 20:07:35.797986  01b80000 ################################################################
 2324 20:07:35.798533  
 2325 20:07:36.473204  01c00000 ################################################################
 2326 20:07:36.473760  
 2327 20:07:37.179763  01c80000 ################################################################
 2328 20:07:37.180384  
 2329 20:07:37.871863  01d00000 ################################################################
 2330 20:07:37.872481  
 2331 20:07:38.573574  01d80000 ################################################################
 2332 20:07:38.574200  
 2333 20:07:39.225606  01e00000 ################################################################
 2334 20:07:39.226154  
 2335 20:07:39.931772  01e80000 ################################################################
 2336 20:07:39.932461  
 2337 20:07:40.644182  01f00000 ################################################################
 2338 20:07:40.644748  
 2339 20:07:41.358085  01f80000 ################################################################
 2340 20:07:41.358692  
 2341 20:07:42.038353  02000000 ################################################################
 2342 20:07:42.038904  
 2343 20:07:42.720249  02080000 ################################################################
 2344 20:07:42.720788  
 2345 20:07:43.420839  02100000 ################################################################
 2346 20:07:43.421459  
 2347 20:07:44.120679  02180000 ################################################################
 2348 20:07:44.121270  
 2349 20:07:44.325253  02200000 #################### done.
 2350 20:07:44.325842  
 2351 20:07:44.328349  Sending tftp read request... done.
 2352 20:07:44.328794  
 2353 20:07:44.331729  Waiting for the transfer... 
 2354 20:07:44.332192  
 2355 20:07:44.332591  00000000 # done.
 2356 20:07:44.332972  
 2357 20:07:44.341847  Command line loaded dynamically from TFTP file: 8411780/tftp-deploy-fqdjc_6f/kernel/cmdline
 2358 20:07:44.342323  
 2359 20:07:44.354603  The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
 2360 20:07:44.355075  
 2361 20:07:44.364328  Shutting down all USB controllers.
 2362 20:07:44.364771  
 2363 20:07:44.365125  Removing current net device
 2364 20:07:44.365455  
 2365 20:07:44.367715  Finalizing coreboot
 2366 20:07:44.368157  
 2367 20:07:44.374521  Exiting depthcharge with code 4 at timestamp: 62528171
 2368 20:07:44.375098  
 2369 20:07:44.375452  
 2370 20:07:44.375778  Starting kernel ...
 2371 20:07:44.376092  
 2372 20:07:44.376397  
 2373 20:07:44.376697  
 2374 20:07:44.378111  end: 2.2.4 bootloader-commands (duration 00:00:54) [common]
 2375 20:07:44.378619  start: 2.2.5 auto-login-action (timeout 00:03:50) [common]
 2376 20:07:44.379001  Setting prompt string to ['Linux version [0-9]']
 2377 20:07:44.379368  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2378 20:07:44.379727  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2380 20:11:34.379593  end: 2.2.5 auto-login-action (duration 00:03:50) [common]
 2382 20:11:34.381684  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 230 seconds'
 2384 20:11:34.382781  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2387 20:11:34.384445  end: 2 depthcharge-action (duration 00:05:00) [common]
 2389 20:11:34.385724  Cleaning after the job
 2390 20:11:34.386192  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8411780/tftp-deploy-fqdjc_6f/ramdisk
 2391 20:11:34.396376  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8411780/tftp-deploy-fqdjc_6f/kernel
 2392 20:11:34.398915  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8411780/tftp-deploy-fqdjc_6f/modules
 2393 20:11:34.399837  start: 4.1 power-off (timeout 00:00:30) [common]
 2394 20:11:34.400617  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=off'
 2395 20:11:34.461170  >> Command sent successfully.

 2396 20:11:34.463757  Returned 0 in 0 seconds
 2397 20:11:34.565104  end: 4.1 power-off (duration 00:00:00) [common]
 2399 20:11:34.566730  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2400 20:11:34.567951  Listened to connection for namespace 'common' for up to 1s
 2401 20:11:35.572661  Finalising connection for namespace 'common'
 2402 20:11:35.573458  Disconnecting from shell: Finalise
 2403 20:11:35.674945  end: 4.2 read-feedback (duration 00:00:01) [common]
 2404 20:11:35.675580  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8411780
 2405 20:11:35.740605  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8411780
 2406 20:11:35.740812  JobError: Your job cannot terminate cleanly.