Boot log: acer-cbv514-1h-34uz-brya
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 11:45:54.689514 lava-dispatcher, installed at version: 2024.01
2 11:45:54.689669 start: 0 validate
3 11:45:54.689779 Start time: 2024-04-05 11:45:54.689773+00:00 (UTC)
4 11:45:54.689887 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:45:54.690014 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Fx86%2Frootfs.cpio.gz exists
6 11:45:54.957162 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:45:54.957360 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2416-g9d6a41ff7c4a%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:45:55.206633 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:45:55.206791 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2416-g9d6a41ff7c4a%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 11:45:55.460195 validate duration: 0.77
12 11:45:55.460450 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 11:45:55.460544 start: 1.1 download-retry (timeout 00:10:00) [common]
14 11:45:55.460628 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 11:45:55.460750 Not decompressing ramdisk as can be used compressed.
16 11:45:55.460823 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/x86/rootfs.cpio.gz
17 11:45:55.460879 saving as /var/lib/lava/dispatcher/tmp/13268553/tftp-deploy-t0uk9s6c/ramdisk/rootfs.cpio.gz
18 11:45:55.460930 total size: 8417901 (8 MB)
19 11:45:55.461960 progress 0 % (0 MB)
20 11:45:55.463581 progress 5 % (0 MB)
21 11:45:55.465280 progress 10 % (0 MB)
22 11:45:55.468756 progress 15 % (1 MB)
23 11:45:55.471386 progress 20 % (1 MB)
24 11:45:55.473387 progress 25 % (2 MB)
25 11:45:55.475107 progress 30 % (2 MB)
26 11:45:55.476522 progress 35 % (2 MB)
27 11:45:55.478022 progress 40 % (3 MB)
28 11:45:55.479566 progress 45 % (3 MB)
29 11:45:55.481080 progress 50 % (4 MB)
30 11:45:55.482635 progress 55 % (4 MB)
31 11:45:55.484132 progress 60 % (4 MB)
32 11:45:55.485486 progress 65 % (5 MB)
33 11:45:55.487032 progress 70 % (5 MB)
34 11:45:55.488603 progress 75 % (6 MB)
35 11:45:55.490068 progress 80 % (6 MB)
36 11:45:55.491543 progress 85 % (6 MB)
37 11:45:55.493050 progress 90 % (7 MB)
38 11:45:55.494507 progress 95 % (7 MB)
39 11:45:55.495928 progress 100 % (8 MB)
40 11:45:55.496104 8 MB downloaded in 0.04 s (228.24 MB/s)
41 11:45:55.496244 end: 1.1.1 http-download (duration 00:00:00) [common]
43 11:45:55.496477 end: 1.1 download-retry (duration 00:00:00) [common]
44 11:45:55.496542 start: 1.2 download-retry (timeout 00:10:00) [common]
45 11:45:55.496603 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 11:45:55.496730 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2416-g9d6a41ff7c4a/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 11:45:55.496789 saving as /var/lib/lava/dispatcher/tmp/13268553/tftp-deploy-t0uk9s6c/kernel/bzImage
48 11:45:55.496844 total size: 14077840 (13 MB)
49 11:45:55.496897 No compression specified
50 11:45:55.497867 progress 0 % (0 MB)
51 11:45:55.500392 progress 5 % (0 MB)
52 11:45:55.502873 progress 10 % (1 MB)
53 11:45:55.505480 progress 15 % (2 MB)
54 11:45:55.507917 progress 20 % (2 MB)
55 11:45:55.510414 progress 25 % (3 MB)
56 11:45:55.512838 progress 30 % (4 MB)
57 11:45:55.515330 progress 35 % (4 MB)
58 11:45:55.517739 progress 40 % (5 MB)
59 11:45:55.520264 progress 45 % (6 MB)
60 11:45:55.522653 progress 50 % (6 MB)
61 11:45:55.525188 progress 55 % (7 MB)
62 11:45:55.527571 progress 60 % (8 MB)
63 11:45:55.530153 progress 65 % (8 MB)
64 11:45:55.532623 progress 70 % (9 MB)
65 11:45:55.535093 progress 75 % (10 MB)
66 11:45:55.537565 progress 80 % (10 MB)
67 11:45:55.540175 progress 85 % (11 MB)
68 11:45:55.542645 progress 90 % (12 MB)
69 11:45:55.545212 progress 95 % (12 MB)
70 11:45:55.547626 progress 100 % (13 MB)
71 11:45:55.547782 13 MB downloaded in 0.05 s (263.60 MB/s)
72 11:45:55.547909 end: 1.2.1 http-download (duration 00:00:00) [common]
74 11:45:55.548103 end: 1.2 download-retry (duration 00:00:00) [common]
75 11:45:55.548172 start: 1.3 download-retry (timeout 00:10:00) [common]
76 11:45:55.548239 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 11:45:55.548339 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2416-g9d6a41ff7c4a/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 11:45:55.548397 saving as /var/lib/lava/dispatcher/tmp/13268553/tftp-deploy-t0uk9s6c/modules/modules.tar
79 11:45:55.548444 total size: 484320 (0 MB)
80 11:45:55.548494 Using unxz to decompress xz
81 11:45:55.551718 progress 6 % (0 MB)
82 11:45:55.552025 progress 13 % (0 MB)
83 11:45:55.552225 progress 20 % (0 MB)
84 11:45:55.553930 progress 27 % (0 MB)
85 11:45:55.555472 progress 33 % (0 MB)
86 11:45:55.557263 progress 40 % (0 MB)
87 11:45:55.558863 progress 47 % (0 MB)
88 11:45:55.560374 progress 54 % (0 MB)
89 11:45:55.562023 progress 60 % (0 MB)
90 11:45:55.563453 progress 67 % (0 MB)
91 11:45:55.565007 progress 74 % (0 MB)
92 11:45:55.566756 progress 81 % (0 MB)
93 11:45:55.568244 progress 87 % (0 MB)
94 11:45:55.569945 progress 94 % (0 MB)
95 11:45:55.571486 progress 100 % (0 MB)
96 11:45:55.576472 0 MB downloaded in 0.03 s (16.49 MB/s)
97 11:45:55.576695 end: 1.3.1 http-download (duration 00:00:00) [common]
99 11:45:55.576930 end: 1.3 download-retry (duration 00:00:00) [common]
100 11:45:55.577007 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
101 11:45:55.577083 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
102 11:45:55.577148 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 11:45:55.577215 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
104 11:45:55.577382 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13268553/lava-overlay-wcaknrg0
105 11:45:55.577487 makedir: /var/lib/lava/dispatcher/tmp/13268553/lava-overlay-wcaknrg0/lava-13268553/bin
106 11:45:55.577575 makedir: /var/lib/lava/dispatcher/tmp/13268553/lava-overlay-wcaknrg0/lava-13268553/tests
107 11:45:55.577649 makedir: /var/lib/lava/dispatcher/tmp/13268553/lava-overlay-wcaknrg0/lava-13268553/results
108 11:45:55.577740 Creating /var/lib/lava/dispatcher/tmp/13268553/lava-overlay-wcaknrg0/lava-13268553/bin/lava-add-keys
109 11:45:55.577849 Creating /var/lib/lava/dispatcher/tmp/13268553/lava-overlay-wcaknrg0/lava-13268553/bin/lava-add-sources
110 11:45:55.577945 Creating /var/lib/lava/dispatcher/tmp/13268553/lava-overlay-wcaknrg0/lava-13268553/bin/lava-background-process-start
111 11:45:55.578044 Creating /var/lib/lava/dispatcher/tmp/13268553/lava-overlay-wcaknrg0/lava-13268553/bin/lava-background-process-stop
112 11:45:55.578136 Creating /var/lib/lava/dispatcher/tmp/13268553/lava-overlay-wcaknrg0/lava-13268553/bin/lava-common-functions
113 11:45:55.578226 Creating /var/lib/lava/dispatcher/tmp/13268553/lava-overlay-wcaknrg0/lava-13268553/bin/lava-echo-ipv4
114 11:45:55.578316 Creating /var/lib/lava/dispatcher/tmp/13268553/lava-overlay-wcaknrg0/lava-13268553/bin/lava-install-packages
115 11:45:55.578405 Creating /var/lib/lava/dispatcher/tmp/13268553/lava-overlay-wcaknrg0/lava-13268553/bin/lava-installed-packages
116 11:45:55.578495 Creating /var/lib/lava/dispatcher/tmp/13268553/lava-overlay-wcaknrg0/lava-13268553/bin/lava-os-build
117 11:45:55.578601 Creating /var/lib/lava/dispatcher/tmp/13268553/lava-overlay-wcaknrg0/lava-13268553/bin/lava-probe-channel
118 11:45:55.578691 Creating /var/lib/lava/dispatcher/tmp/13268553/lava-overlay-wcaknrg0/lava-13268553/bin/lava-probe-ip
119 11:45:55.578782 Creating /var/lib/lava/dispatcher/tmp/13268553/lava-overlay-wcaknrg0/lava-13268553/bin/lava-target-ip
120 11:45:55.578872 Creating /var/lib/lava/dispatcher/tmp/13268553/lava-overlay-wcaknrg0/lava-13268553/bin/lava-target-mac
121 11:45:55.578961 Creating /var/lib/lava/dispatcher/tmp/13268553/lava-overlay-wcaknrg0/lava-13268553/bin/lava-target-storage
122 11:45:55.579056 Creating /var/lib/lava/dispatcher/tmp/13268553/lava-overlay-wcaknrg0/lava-13268553/bin/lava-test-case
123 11:45:55.579148 Creating /var/lib/lava/dispatcher/tmp/13268553/lava-overlay-wcaknrg0/lava-13268553/bin/lava-test-event
124 11:45:55.579236 Creating /var/lib/lava/dispatcher/tmp/13268553/lava-overlay-wcaknrg0/lava-13268553/bin/lava-test-feedback
125 11:45:55.579327 Creating /var/lib/lava/dispatcher/tmp/13268553/lava-overlay-wcaknrg0/lava-13268553/bin/lava-test-raise
126 11:45:55.579416 Creating /var/lib/lava/dispatcher/tmp/13268553/lava-overlay-wcaknrg0/lava-13268553/bin/lava-test-reference
127 11:45:55.579509 Creating /var/lib/lava/dispatcher/tmp/13268553/lava-overlay-wcaknrg0/lava-13268553/bin/lava-test-runner
128 11:45:55.579600 Creating /var/lib/lava/dispatcher/tmp/13268553/lava-overlay-wcaknrg0/lava-13268553/bin/lava-test-set
129 11:45:55.579703 Creating /var/lib/lava/dispatcher/tmp/13268553/lava-overlay-wcaknrg0/lava-13268553/bin/lava-test-shell
130 11:45:55.579811 Updating /var/lib/lava/dispatcher/tmp/13268553/lava-overlay-wcaknrg0/lava-13268553/bin/lava-install-packages (oe)
131 11:45:55.579929 Updating /var/lib/lava/dispatcher/tmp/13268553/lava-overlay-wcaknrg0/lava-13268553/bin/lava-installed-packages (oe)
132 11:45:55.580017 Creating /var/lib/lava/dispatcher/tmp/13268553/lava-overlay-wcaknrg0/lava-13268553/environment
133 11:45:55.580094 LAVA metadata
134 11:45:55.580154 - LAVA_JOB_ID=13268553
135 11:45:55.580204 - LAVA_DISPATCHER_IP=192.168.201.1
136 11:45:55.580286 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
137 11:45:55.580339 skipped lava-vland-overlay
138 11:45:55.580397 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 11:45:55.580460 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
140 11:45:55.580537 skipped lava-multinode-overlay
141 11:45:55.580622 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 11:45:55.580705 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
143 11:45:55.580764 Loading test definitions
144 11:45:55.580839 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
145 11:45:55.580898 Using /lava-13268553 at stage 0
146 11:45:55.581139 uuid=13268553_1.4.2.3.1 testdef=None
147 11:45:55.581224 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 11:45:55.581300 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
149 11:45:55.581715 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 11:45:55.581895 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
152 11:45:55.582398 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 11:45:55.582580 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
155 11:45:55.583055 runner path: /var/lib/lava/dispatcher/tmp/13268553/lava-overlay-wcaknrg0/lava-13268553/0/tests/0_dmesg test_uuid 13268553_1.4.2.3.1
156 11:45:55.583179 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 11:45:55.583357 Creating lava-test-runner.conf files
159 11:45:55.583406 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13268553/lava-overlay-wcaknrg0/lava-13268553/0 for stage 0
160 11:45:55.583474 - 0_dmesg
161 11:45:55.583551 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
162 11:45:55.583621 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
163 11:45:55.589253 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
164 11:45:55.589355 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
165 11:45:55.589440 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
166 11:45:55.589517 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
167 11:45:55.589587 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
168 11:45:55.755209 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
169 11:45:55.755483 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
170 11:45:55.755591 extracting modules file /var/lib/lava/dispatcher/tmp/13268553/tftp-deploy-t0uk9s6c/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13268553/extract-overlay-ramdisk-aybqtbx8/ramdisk
171 11:45:55.765831 end: 1.4.4 extract-modules (duration 00:00:00) [common]
172 11:45:55.765998 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
173 11:45:55.766111 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13268553/compress-overlay-vagwm9xz/overlay-1.4.2.4.tar.gz to ramdisk
174 11:45:55.766175 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13268553/compress-overlay-vagwm9xz/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13268553/extract-overlay-ramdisk-aybqtbx8/ramdisk
175 11:45:55.771064 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
176 11:45:55.771166 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
177 11:45:55.771245 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
178 11:45:55.771320 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
179 11:45:55.771396 Building ramdisk /var/lib/lava/dispatcher/tmp/13268553/extract-overlay-ramdisk-aybqtbx8/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13268553/extract-overlay-ramdisk-aybqtbx8/ramdisk
180 11:45:55.834440 >> 51652 blocks
181 11:45:56.601430 rename /var/lib/lava/dispatcher/tmp/13268553/extract-overlay-ramdisk-aybqtbx8/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13268553/tftp-deploy-t0uk9s6c/ramdisk/ramdisk.cpio.gz
182 11:45:56.601793 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
183 11:45:56.601905 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
184 11:45:56.601986 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
185 11:45:56.602061 No mkimage arch provided, not using FIT.
186 11:45:56.602132 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
187 11:45:56.602204 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
188 11:45:56.602286 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
189 11:45:56.602361 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
190 11:45:56.602431 No LXC device requested
191 11:45:56.602500 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
192 11:45:56.602574 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
193 11:45:56.602648 end: 1.6 deploy-device-env (duration 00:00:00) [common]
194 11:45:56.602709 Checking files for TFTP limit of 4294967296 bytes.
195 11:45:56.603013 end: 1 tftp-deploy (duration 00:00:01) [common]
196 11:45:56.603090 start: 2 depthcharge-action (timeout 00:05:00) [common]
197 11:45:56.603158 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
198 11:45:56.603249 substitutions:
199 11:45:56.603301 - {DTB}: None
200 11:45:56.603350 - {INITRD}: 13268553/tftp-deploy-t0uk9s6c/ramdisk/ramdisk.cpio.gz
201 11:45:56.603395 - {KERNEL}: 13268553/tftp-deploy-t0uk9s6c/kernel/bzImage
202 11:45:56.603440 - {LAVA_MAC}: None
203 11:45:56.603485 - {PRESEED_CONFIG}: None
204 11:45:56.603535 - {PRESEED_LOCAL}: None
205 11:45:56.603579 - {RAMDISK}: 13268553/tftp-deploy-t0uk9s6c/ramdisk/ramdisk.cpio.gz
206 11:45:56.603622 - {ROOT_PART}: None
207 11:45:56.603695 - {ROOT}: None
208 11:45:56.603751 - {SERVER_IP}: 192.168.201.1
209 11:45:56.603795 - {TEE}: None
210 11:45:56.603840 Parsed boot commands:
211 11:45:56.603884 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
212 11:45:56.604038 Parsed boot commands: tftpboot 192.168.201.1 13268553/tftp-deploy-t0uk9s6c/kernel/bzImage 13268553/tftp-deploy-t0uk9s6c/kernel/cmdline 13268553/tftp-deploy-t0uk9s6c/ramdisk/ramdisk.cpio.gz
213 11:45:56.604124 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
214 11:45:56.604198 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
215 11:45:56.604280 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
216 11:45:56.604357 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
217 11:45:56.604412 Not connected, no need to disconnect.
218 11:45:56.604484 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
219 11:45:56.604564 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
220 11:45:56.604618 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-3'
221 11:45:56.607313 Setting prompt string to ['lava-test: # ']
222 11:45:56.607567 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
223 11:45:56.607676 end: 2.2.1 reset-connection (duration 00:00:00) [common]
224 11:45:56.607757 start: 2.2.2 reset-device (timeout 00:05:00) [common]
225 11:45:56.607940 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
226 11:45:56.608096 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-3' '--port=1' '--command=reboot'
227 11:46:01.734517 >> Command sent successfully.
228 11:46:01.736915 Returned 0 in 5 seconds
229 11:46:01.837328 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
231 11:46:01.837647 end: 2.2.2 reset-device (duration 00:00:05) [common]
232 11:46:01.837752 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
233 11:46:01.837837 Setting prompt string to 'Starting depthcharge on Volmar...'
234 11:46:01.837895 Changing prompt to 'Starting depthcharge on Volmar...'
235 11:46:01.837968 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
236 11:46:01.838223 [Enter `^Ec?' for help]
237 11:46:03.222611
238 11:46:03.222740
239 11:46:03.230279 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
240 11:46:03.234327 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
241 11:46:03.237580 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
242 11:46:03.244478 CPU: AES supported, TXT NOT supported, VT supported
243 11:46:03.250938 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
244 11:46:03.254621 Cache size = 10 MiB
245 11:46:03.257529 MCH: device id 4609 (rev 04) is Alderlake-P
246 11:46:03.264556 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
247 11:46:03.267714 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
248 11:46:03.270792 VBOOT: Loading verstage.
249 11:46:03.275062 FMAP: Found "FLASH" version 1.1 at 0x1804000.
250 11:46:03.278980 FMAP: base = 0x0 size = 0x2000000 #areas = 37
251 11:46:03.285972 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
252 11:46:03.292715 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
253 11:46:03.299645 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
254 11:46:03.303761
255 11:46:03.303840
256 11:46:03.310443 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
257 11:46:03.317125 Probing TPM I2C: I2C bus 1 version 0x3230302a
258 11:46:03.320318 DW I2C bus 1 at 0xfe022000 (400 KHz)
259 11:46:03.323720 I2C TX abort detected (00000001)
260 11:46:03.326911 cr50_i2c_read: Address write failed
261 11:46:03.338965 .done! DID_VID 0x00281ae0
262 11:46:03.343011 TPM ready after 0 ms
263 11:46:03.346365 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
264 11:46:03.359683 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
265 11:46:03.366142 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
266 11:46:03.419067 tlcl_send_startup: Startup return code is 0
267 11:46:03.419170 TPM: setup succeeded
268 11:46:03.439885 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
269 11:46:03.462488 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
270 11:46:03.471187 Chrome EC: UHEPI supported
271 11:46:03.477608 Reading cr50 boot mode
272 11:46:03.492596 Cr50 says boot_mode is VERIFIED_RW(0x00).
273 11:46:03.492667 Phase 1
274 11:46:03.499412 FMAP: area GBB found @ 1805000 (458752 bytes)
275 11:46:03.505758 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
276 11:46:03.512451 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
277 11:46:03.519086 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
278 11:46:03.522086 Phase 2
279 11:46:03.522162 Phase 3
280 11:46:03.525439 FMAP: area GBB found @ 1805000 (458752 bytes)
281 11:46:03.532628 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
282 11:46:03.535609 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
283 11:46:03.542518 VB2:vb2_verify_keyblock() Checking keyblock signature...
284 11:46:03.548803 VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW
285 11:46:03.555681 VB2:vb2_verify_digest() HW RSA forbidden, using SW
286 11:46:03.558758 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
287 11:46:03.573702 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
288 11:46:03.577262 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
289 11:46:03.583979 VB2:vb2_verify_fw_preamble() Verifying preamble.
290 11:46:03.590347 VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW
291 11:46:03.593372 VB2:vb2_verify_digest() HW RSA forbidden, using SW
292 11:46:03.600661 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
293 11:46:03.604914 Phase 4
294 11:46:03.608270 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
295 11:46:03.614302 VB2:vb2api_init_hash() HW crypto forbidden by TPM flag, using SW
296 11:46:03.840460 VB2:vb2_verify_digest() HW RSA forbidden, using SW
297 11:46:03.847031 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
298 11:46:03.850480 Saving vboot hash.
299 11:46:03.856597 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
300 11:46:03.872114 tlcl_extend: response is 0
301 11:46:03.878841 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
302 11:46:03.882977 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
303 11:46:03.900363 tlcl_extend: response is 0
304 11:46:03.907248 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
305 11:46:03.926846 tlcl_lock_nv_write: response is 0
306 11:46:03.946354 tlcl_lock_nv_write: response is 0
307 11:46:03.946843 Slot A is selected
308 11:46:03.952956 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
309 11:46:03.959402 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
310 11:46:03.966247 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
311 11:46:03.972313 BS: verstage times (exec / console): total (unknown) / 253 ms
312 11:46:03.972789
313 11:46:03.973359
314 11:46:03.979530 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
315 11:46:03.984454 Google Chrome EC: version:
316 11:46:03.988218 ro: volmar_v2.0.14126-e605144e9c
317 11:46:03.991215 rw: volmar_v0.0.55-22d1557
318 11:46:03.994466 running image: 2
319 11:46:03.998134 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
320 11:46:04.007886 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
321 11:46:04.014602 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
322 11:46:04.021514 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
323 11:46:04.031477 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
324 11:46:04.041023 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
325 11:46:04.044578 EC took 941us to calculate image hash
326 11:46:04.054718 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
327 11:46:04.057686 VB2:sync_ec() select_rw=RW(active)
328 11:46:04.069742 Waited 269us to clear limit power flag.
329 11:46:04.072487 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
330 11:46:04.076273 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
331 11:46:04.079374 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
332 11:46:04.086216 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
333 11:46:04.089119 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
334 11:46:04.092741 TCO_STS: 0000 0000
335 11:46:04.093202 GEN_PMCON: d0015038 00002200
336 11:46:04.096026 GBLRST_CAUSE: 00000000 00000000
337 11:46:04.099212 HPR_CAUSE0: 00000000
338 11:46:04.102435 prev_sleep_state 5
339 11:46:04.105824 Abort disabling TXT, as CPU is not TXT capable.
340 11:46:04.113638 cse_lite: Number of partitions = 3
341 11:46:04.116912 cse_lite: Current partition = RO
342 11:46:04.117382 cse_lite: Next partition = RO
343 11:46:04.120037 cse_lite: Flags = 0x7
344 11:46:04.126897 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
345 11:46:04.136714 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
346 11:46:04.139806 FMAP: area SI_ME found @ 1000 (5238784 bytes)
347 11:46:04.146453 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
348 11:46:04.152910 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
349 11:46:04.159881 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
350 11:46:04.163316 cse_lite: CSE CBFS RW version : 16.1.25.2049
351 11:46:04.169710 cse_lite: Set Boot Partition Info Command (RW)
352 11:46:04.172547 HECI: Global Reset(Type:1) Command
353 11:46:05.595141
354 11:46:05.595315
355 11:46:05.595409 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
356 11:46:05.604857 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
357 11:46:05.604940 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
358 11:46:05.627894 CPU: AES supported, TXT NOT supported, VT supported
359 11:46:05.627979 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
360 11:46:05.628223 Cache size = 10 MiB
361 11:46:05.628282 MCH: device id 4609 (rev 04) is Alderlake-P
362 11:46:05.628515 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
363 11:46:05.665539 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
364 11:46:05.665620 VBOOT: Loading verstage.
365 11:46:05.666006 FMAP: Found "FLASH" version 1.1 at 0x1804000.
366 11:46:05.666077 FMAP: base = 0x0 size = 0x2000000 #areas = 37
367 11:46:05.666325 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
368 11:46:05.668605 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
369 11:46:05.669150 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
370 11:46:05.669213
371 11:46:05.669277
372 11:46:05.681173 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
373 11:46:05.681244 Probing TPM I2C: I2C bus 1 version 0x3230302a
374 11:46:05.687278 DW I2C bus 1 at 0xfe022000 (400 KHz)
375 11:46:05.824785 Cr50 i2c TPM IRQ timeout!
376 11:46:05.837407 .done! DID_VID 0x00281ae0
377 11:46:05.841039 TPM ready after 0 ms
378 11:46:05.844189 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
379 11:46:05.857845 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
380 11:46:05.864462 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
381 11:46:05.910259 tlcl_send_startup: Startup return code is 0
382 11:46:05.910351 TPM: setup succeeded
383 11:46:05.931054 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
384 11:46:05.953411 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
385 11:46:05.957098 Chrome EC: UHEPI supported
386 11:46:05.960540 Reading cr50 boot mode
387 11:46:05.975143 Cr50 says boot_mode is VERIFIED_RW(0x00).
388 11:46:05.975210 Phase 1
389 11:46:05.981771 FMAP: area GBB found @ 1805000 (458752 bytes)
390 11:46:05.988306 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
391 11:46:05.994892 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
392 11:46:06.001773 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
393 11:46:06.005464 Phase 2
394 11:46:06.005541 Phase 3
395 11:46:06.008423 FMAP: area GBB found @ 1805000 (458752 bytes)
396 11:46:06.015060 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
397 11:46:06.018623 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
398 11:46:06.025104 VB2:vb2_verify_keyblock() Checking keyblock signature...
399 11:46:06.031846 VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW
400 11:46:06.038528 VB2:vb2_verify_digest() HW RSA forbidden, using SW
401 11:46:06.041314 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
402 11:46:06.056344 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
403 11:46:06.059236 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
404 11:46:06.065899 VB2:vb2_verify_fw_preamble() Verifying preamble.
405 11:46:06.072998 VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW
406 11:46:06.076099 VB2:vb2_verify_digest() HW RSA forbidden, using SW
407 11:46:06.082323 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
408 11:46:06.086634 Phase 4
409 11:46:06.089955 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
410 11:46:06.097148 VB2:vb2api_init_hash() HW crypto forbidden by TPM flag, using SW
411 11:46:06.322223 VB2:vb2_verify_digest() HW RSA forbidden, using SW
412 11:46:06.328870 VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW
413 11:46:06.332437 Saving vboot hash.
414 11:46:06.338797 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
415 11:46:06.354207 tlcl_extend: response is 0
416 11:46:06.360891 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
417 11:46:06.367779 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
418 11:46:06.382044 tlcl_extend: response is 0
419 11:46:06.390017 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
420 11:46:06.409014 tlcl_lock_nv_write: response is 0
421 11:46:06.428349 tlcl_lock_nv_write: response is 0
422 11:46:06.428418 Slot A is selected
423 11:46:06.434870 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
424 11:46:06.441323 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
425 11:46:06.448549 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
426 11:46:06.455047 BS: verstage times (exec / console): total (unknown) / 249 ms
427 11:46:06.455136
428 11:46:06.455192
429 11:46:06.461875 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
430 11:46:06.465588 Google Chrome EC: version:
431 11:46:06.468718 ro: volmar_v2.0.14126-e605144e9c
432 11:46:06.472054 rw: volmar_v0.0.55-22d1557
433 11:46:06.475134 running image: 2
434 11:46:06.479005 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
435 11:46:06.488502 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
436 11:46:06.495235 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
437 11:46:06.502072 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
438 11:46:06.511878 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
439 11:46:06.521960 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
440 11:46:06.525596 EC took 941us to calculate image hash
441 11:46:06.535376 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
442 11:46:06.538934 VB2:sync_ec() select_rw=RW(active)
443 11:46:06.550716 Waited 270us to clear limit power flag.
444 11:46:06.554305 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
445 11:46:06.557655 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
446 11:46:06.561053 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
447 11:46:06.567349 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
448 11:46:06.570642 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
449 11:46:06.574028 TCO_STS: 0000 0000
450 11:46:06.577669 GEN_PMCON: d1001038 00002200
451 11:46:06.580964 GBLRST_CAUSE: 00000040 00000000
452 11:46:06.581031 HPR_CAUSE0: 00000000
453 11:46:06.584114 prev_sleep_state 5
454 11:46:06.587698 Abort disabling TXT, as CPU is not TXT capable.
455 11:46:06.595178 cse_lite: Number of partitions = 3
456 11:46:06.598623 cse_lite: Current partition = RW
457 11:46:06.598680 cse_lite: Next partition = RW
458 11:46:06.602285 cse_lite: Flags = 0x7
459 11:46:06.608587 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
460 11:46:06.618700 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
461 11:46:06.622081 FMAP: area SI_ME found @ 1000 (5238784 bytes)
462 11:46:06.628692 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
463 11:46:06.635305 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
464 11:46:06.641913 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
465 11:46:06.645157 cse_lite: CSE CBFS RW version : 16.1.25.2049
466 11:46:06.648374 Boot Count incremented to 4281
467 11:46:06.654945 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
468 11:46:06.662308 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
469 11:46:06.674673 Probing TPM I2C: done! DID_VID 0x00281ae0
470 11:46:06.678158 Locality already claimed
471 11:46:06.681278 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
472 11:46:06.700797 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
473 11:46:06.707312 MRC: Hash idx 0x100d comparison successful.
474 11:46:06.710442 MRC cache found, size f6c8
475 11:46:06.710502 bootmode is set to: 2
476 11:46:06.714676 EC returned error result code 3
477 11:46:06.717747 FW_CONFIG value from CBI is 0x131
478 11:46:06.724764 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
479 11:46:06.727513 SPD index = 0
480 11:46:06.734255 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
481 11:46:06.734311 SPD: module type is LPDDR4X
482 11:46:06.741437 SPD: module part number is K4U6E3S4AB-MGCL
483 11:46:06.748069 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
484 11:46:06.751015 SPD: device width 16 bits, bus width 16 bits
485 11:46:06.754291 SPD: module size is 1024 MB (per channel)
486 11:46:06.824079 CBMEM:
487 11:46:06.827104 IMD: root @ 0x76fff000 254 entries.
488 11:46:06.830285 IMD: root @ 0x76ffec00 62 entries.
489 11:46:06.838272 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
490 11:46:06.841858 RO_VPD is uninitialized or empty.
491 11:46:06.844608 FMAP: area RW_VPD found @ f29000 (8192 bytes)
492 11:46:06.851625 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
493 11:46:06.854669 External stage cache:
494 11:46:06.857978 IMD: root @ 0x7bbff000 254 entries.
495 11:46:06.861205 IMD: root @ 0x7bbfec00 62 entries.
496 11:46:06.868351 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
497 11:46:06.875128 MRC: Checking cached data update for 'RW_MRC_CACHE'.
498 11:46:06.878202 MRC: 'RW_MRC_CACHE' does not need update.
499 11:46:06.878266 8 DIMMs found
500 11:46:06.881459 SMM Memory Map
501 11:46:06.885275 SMRAM : 0x7b800000 0x800000
502 11:46:06.888239 Subregion 0: 0x7b800000 0x200000
503 11:46:06.891664 Subregion 1: 0x7ba00000 0x200000
504 11:46:06.895328 Subregion 2: 0x7bc00000 0x400000
505 11:46:06.898648 top_of_ram = 0x77000000
506 11:46:06.901727 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
507 11:46:06.908683 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
508 11:46:06.914669 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
509 11:46:06.918172 MTRR Range: Start=ff000000 End=0 (Size 1000000)
510 11:46:06.918238 Normal boot
511 11:46:06.928876 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
512 11:46:06.934763 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
513 11:46:06.941414 Processing 237 relocs. Offset value of 0x74ab9000
514 11:46:06.949679 BS: romstage times (exec / console): total (unknown) / 377 ms
515 11:46:06.956849
516 11:46:06.956939
517 11:46:06.964317 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
518 11:46:06.964395 Normal boot
519 11:46:06.971371 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
520 11:46:06.977690 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
521 11:46:06.984707 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
522 11:46:06.990937 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
523 11:46:07.041251 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
524 11:46:07.047824 Processing 5931 relocs. Offset value of 0x72a2f000
525 11:46:07.050944 BS: postcar times (exec / console): total (unknown) / 51 ms
526 11:46:07.054121
527 11:46:07.054179
528 11:46:07.061289 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
529 11:46:07.064882 Reserving BERT start 76a1e000, size 10000
530 11:46:07.067845 Normal boot
531 11:46:07.071025 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
532 11:46:07.077891 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
533 11:46:07.087793 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
534 11:46:07.091306 FMAP: area RW_VPD found @ f29000 (8192 bytes)
535 11:46:07.094699 Google Chrome EC: version:
536 11:46:07.097923 ro: volmar_v2.0.14126-e605144e9c
537 11:46:07.101084 rw: volmar_v0.0.55-22d1557
538 11:46:07.101142 running image: 2
539 11:46:07.107763 ACPI _SWS is PM1 Index 8 GPE Index -1
540 11:46:07.111152 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
541 11:46:07.116031 EC returned error result code 3
542 11:46:07.119296 FW_CONFIG value from CBI is 0x131
543 11:46:07.125998 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
544 11:46:07.129506 PCI: 00:1c.2 disabled by fw_config
545 11:46:07.136104 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
546 11:46:07.139080 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
547 11:46:07.145935 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
548 11:46:07.149424 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
549 11:46:07.155702 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
550 11:46:07.162495 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
551 11:46:07.169169 microcode: sig=0x906a4 pf=0x80 revision=0x423
552 11:46:07.172784 microcode: Update skipped, already up-to-date
553 11:46:07.179229 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
554 11:46:07.211591 Detected 6 core, 8 thread CPU.
555 11:46:07.214797 Setting up SMI for CPU
556 11:46:07.218540 IED base = 0x7bc00000
557 11:46:07.218601 IED size = 0x00400000
558 11:46:07.221700 Will perform SMM setup.
559 11:46:07.225152 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
560 11:46:07.228387 LAPIC 0x0 in XAPIC mode.
561 11:46:07.238332 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
562 11:46:07.241411 Processing 18 relocs. Offset value of 0x00030000
563 11:46:07.246518 Attempting to start 7 APs
564 11:46:07.249500 Waiting for 10ms after sending INIT.
565 11:46:07.262577 Waiting for SIPI to complete...
566 11:46:07.266239 done.
567 11:46:07.266303 LAPIC 0x12 in XAPIC mode.
568 11:46:07.269561 LAPIC 0x16 in XAPIC mode.
569 11:46:07.272841 LAPIC 0x14 in XAPIC mode.
570 11:46:07.275627 LAPIC 0x1 in XAPIC mode.
571 11:46:07.279280 LAPIC 0x10 in XAPIC mode.
572 11:46:07.279337 LAPIC 0x9 in XAPIC mode.
573 11:46:07.285934 AP: slot 1 apic_id 16, MCU rev: 0x00000423
574 11:46:07.289382 AP: slot 2 apic_id 10, MCU rev: 0x00000423
575 11:46:07.292473 AP: slot 3 apic_id 12, MCU rev: 0x00000423
576 11:46:07.295957 AP: slot 4 apic_id 14, MCU rev: 0x00000423
577 11:46:07.302487 AP: slot 5 apic_id 1, MCU rev: 0x00000423
578 11:46:07.305740 Waiting for SIPI to complete...
579 11:46:07.305807 done.
580 11:46:07.309388 AP: slot 7 apic_id 9, MCU rev: 0x00000423
581 11:46:07.312451 LAPIC 0x8 in XAPIC mode.
582 11:46:07.315813 AP: slot 6 apic_id 8, MCU rev: 0x00000423
583 11:46:07.319152 smm_setup_relocation_handler: enter
584 11:46:07.322288 smm_setup_relocation_handler: exit
585 11:46:07.332201 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
586 11:46:07.335640 Processing 11 relocs. Offset value of 0x00038000
587 11:46:07.342508 smm_module_setup_stub: stack_top = 0x7b804000
588 11:46:07.345633 smm_module_setup_stub: per cpu stack_size = 0x800
589 11:46:07.352060 smm_module_setup_stub: runtime.start32_offset = 0x4c
590 11:46:07.355616 smm_module_setup_stub: runtime.smm_size = 0x10000
591 11:46:07.361934 SMM Module: stub loaded at 38000. Will call 0x76a52094
592 11:46:07.365470 Installing permanent SMM handler to 0x7b800000
593 11:46:07.372144 smm_load_module: total_smm_space_needed e468, available -> 200000
594 11:46:07.382095 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
595 11:46:07.385415 Processing 255 relocs. Offset value of 0x7b9f6000
596 11:46:07.392072 smm_load_module: smram_start: 0x7b800000
597 11:46:07.395643 smm_load_module: smram_end: 7ba00000
598 11:46:07.398816 smm_load_module: handler start 0x7b9f6d5f
599 11:46:07.401984 smm_load_module: handler_size 98d0
600 11:46:07.405407 smm_load_module: fxsave_area 0x7b9ff000
601 11:46:07.409092 smm_load_module: fxsave_size 1000
602 11:46:07.412175 smm_load_module: CONFIG_MSEG_SIZE 0x0
603 11:46:07.418906 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
604 11:46:07.425616 smm_load_module: handler_mod_params.smbase = 0x7b800000
605 11:46:07.428799 smm_load_module: per_cpu_save_state_size = 0x400
606 11:46:07.431997 smm_load_module: num_cpus = 0x8
607 11:46:07.438954 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
608 11:46:07.442029 smm_load_module: total_save_state_size = 0x2000
609 11:46:07.445545 smm_load_module: cpu0 entry: 7b9e6000
610 11:46:07.452161 smm_create_map: cpus allowed in one segment 30
611 11:46:07.455327 smm_create_map: min # of segments needed 1
612 11:46:07.455384 CPU 0x0
613 11:46:07.458697 smbase 7b9e6000 entry 7b9ee000
614 11:46:07.465344 ss_start 7b9f5c00 code_end 7b9ee208
615 11:46:07.465415 CPU 0x1
616 11:46:07.468749 smbase 7b9e5c00 entry 7b9edc00
617 11:46:07.475209 ss_start 7b9f5800 code_end 7b9ede08
618 11:46:07.475266 CPU 0x2
619 11:46:07.478344 smbase 7b9e5800 entry 7b9ed800
620 11:46:07.481959 ss_start 7b9f5400 code_end 7b9eda08
621 11:46:07.485353 CPU 0x3
622 11:46:07.488472 smbase 7b9e5400 entry 7b9ed400
623 11:46:07.491587 ss_start 7b9f5000 code_end 7b9ed608
624 11:46:07.495212 CPU 0x4
625 11:46:07.498293 smbase 7b9e5000 entry 7b9ed000
626 11:46:07.501956 ss_start 7b9f4c00 code_end 7b9ed208
627 11:46:07.502014 CPU 0x5
628 11:46:07.505427 smbase 7b9e4c00 entry 7b9ecc00
629 11:46:07.511706 ss_start 7b9f4800 code_end 7b9ece08
630 11:46:07.511769 CPU 0x6
631 11:46:07.514994 smbase 7b9e4800 entry 7b9ec800
632 11:46:07.521727 ss_start 7b9f4400 code_end 7b9eca08
633 11:46:07.521785 CPU 0x7
634 11:46:07.524837 smbase 7b9e4400 entry 7b9ec400
635 11:46:07.528188 ss_start 7b9f4000 code_end 7b9ec608
636 11:46:07.538346 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
637 11:46:07.541611 Processing 11 relocs. Offset value of 0x7b9ee000
638 11:46:07.548115 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
639 11:46:07.554897 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
640 11:46:07.561374 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
641 11:46:07.567906 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
642 11:46:07.574703 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
643 11:46:07.578285 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
644 11:46:07.584804 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
645 11:46:07.591237 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
646 11:46:07.598149 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
647 11:46:07.604920 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
648 11:46:07.611827 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
649 11:46:07.618151 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
650 11:46:07.624672 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
651 11:46:07.631280 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
652 11:46:07.638084 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
653 11:46:07.641310 smm_module_setup_stub: stack_top = 0x7b804000
654 11:46:07.644416 smm_module_setup_stub: per cpu stack_size = 0x800
655 11:46:07.651410 smm_module_setup_stub: runtime.start32_offset = 0x4c
656 11:46:07.658152 smm_module_setup_stub: runtime.smm_size = 0x200000
657 11:46:07.661281 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
658 11:46:07.666208 Clearing SMI status registers
659 11:46:07.669480 SMI_STS: PM1
660 11:46:07.669538 PM1_STS: WAK PWRBTN
661 11:46:07.679639 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
662 11:46:07.679712 In relocation handler: CPU 0
663 11:46:07.686303 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
664 11:46:07.689312 Writing SMRR. base = 0x7b800006, mask=0xff800c00
665 11:46:07.692878 Relocation complete.
666 11:46:07.699530 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
667 11:46:07.702851 In relocation handler: CPU 5
668 11:46:07.706079 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
669 11:46:07.709409 Relocation complete.
670 11:46:07.716150 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
671 11:46:07.719377 In relocation handler: CPU 1
672 11:46:07.722725 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
673 11:46:07.729621 Writing SMRR. base = 0x7b800006, mask=0xff800c00
674 11:46:07.729681 Relocation complete.
675 11:46:07.736410 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
676 11:46:07.739529 In relocation handler: CPU 4
677 11:46:07.743171 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
678 11:46:07.749746 Writing SMRR. base = 0x7b800006, mask=0xff800c00
679 11:46:07.753078 Relocation complete.
680 11:46:07.759237 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
681 11:46:07.763140 In relocation handler: CPU 3
682 11:46:07.766313 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
683 11:46:07.769304 Writing SMRR. base = 0x7b800006, mask=0xff800c00
684 11:46:07.772748 Relocation complete.
685 11:46:07.779771 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
686 11:46:07.783159 In relocation handler: CPU 2
687 11:46:07.786168 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
688 11:46:07.792733 Writing SMRR. base = 0x7b800006, mask=0xff800c00
689 11:46:07.792791 Relocation complete.
690 11:46:07.799120 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
691 11:46:07.802647 In relocation handler: CPU 6
692 11:46:07.809398 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
693 11:46:07.812711 Writing SMRR. base = 0x7b800006, mask=0xff800c00
694 11:46:07.815855 Relocation complete.
695 11:46:07.822633 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
696 11:46:07.825947 In relocation handler: CPU 7
697 11:46:07.829423 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
698 11:46:07.832961 Relocation complete.
699 11:46:07.833031 Initializing CPU #0
700 11:46:07.836493 CPU: vendor Intel device 906a4
701 11:46:07.839284 CPU: family 06, model 9a, stepping 04
702 11:46:07.842898 Clearing out pending MCEs
703 11:46:07.846442 cpu: energy policy set to 7
704 11:46:07.849771 Turbo is available but hidden
705 11:46:07.852998 Turbo is available and visible
706 11:46:07.856296 microcode: Update skipped, already up-to-date
707 11:46:07.859472 CPU #0 initialized
708 11:46:07.859549 Initializing CPU #5
709 11:46:07.862721 Initializing CPU #4
710 11:46:07.865849 Initializing CPU #3
711 11:46:07.869517 CPU: vendor Intel device 906a4
712 11:46:07.872948 CPU: family 06, model 9a, stepping 04
713 11:46:07.875770 CPU: vendor Intel device 906a4
714 11:46:07.879372 CPU: family 06, model 9a, stepping 04
715 11:46:07.879446 Initializing CPU #2
716 11:46:07.882746 Initializing CPU #7
717 11:46:07.885729 CPU: vendor Intel device 906a4
718 11:46:07.889079 CPU: family 06, model 9a, stepping 04
719 11:46:07.892328 Initializing CPU #1
720 11:46:07.895956 Clearing out pending MCEs
721 11:46:07.896020 CPU: vendor Intel device 906a4
722 11:46:07.902568 CPU: family 06, model 9a, stepping 04
723 11:46:07.905867 CPU: vendor Intel device 906a4
724 11:46:07.909173 CPU: family 06, model 9a, stepping 04
725 11:46:07.909233 Clearing out pending MCEs
726 11:46:07.912448 Clearing out pending MCEs
727 11:46:07.916274 Clearing out pending MCEs
728 11:46:07.919186 cpu: energy policy set to 7
729 11:46:07.922527 cpu: energy policy set to 7
730 11:46:07.925757 cpu: energy policy set to 7
731 11:46:07.929426 microcode: Update skipped, already up-to-date
732 11:46:07.932756 CPU #4 initialized
733 11:46:07.932825 cpu: energy policy set to 7
734 11:46:07.939044 microcode: Update skipped, already up-to-date
735 11:46:07.939105 CPU #1 initialized
736 11:46:07.945512 microcode: Update skipped, already up-to-date
737 11:46:07.945576 CPU #3 initialized
738 11:46:07.952633 microcode: Update skipped, already up-to-date
739 11:46:07.952692 CPU #2 initialized
740 11:46:07.955578 Clearing out pending MCEs
741 11:46:07.958996 Initializing CPU #6
742 11:46:07.962621 CPU: vendor Intel device 906a4
743 11:46:07.965931 CPU: family 06, model 9a, stepping 04
744 11:46:07.969014 cpu: energy policy set to 7
745 11:46:07.972215 CPU: vendor Intel device 906a4
746 11:46:07.975416 CPU: family 06, model 9a, stepping 04
747 11:46:07.978915 microcode: Update skipped, already up-to-date
748 11:46:07.982109 CPU #5 initialized
749 11:46:07.985414 Clearing out pending MCEs
750 11:46:07.985482 Clearing out pending MCEs
751 11:46:07.989189 cpu: energy policy set to 7
752 11:46:07.992361 cpu: energy policy set to 7
753 11:46:07.995760 microcode: Update skipped, already up-to-date
754 11:46:07.998963 CPU #6 initialized
755 11:46:08.002171 microcode: Update skipped, already up-to-date
756 11:46:08.005766 CPU #7 initialized
757 11:46:08.008585 bsp_do_flight_plan done after 699 msecs.
758 11:46:08.012428 CPU: frequency set to 4400 MHz
759 11:46:08.015385 Enabling SMIs.
760 11:46:08.022137 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 381 / 521 ms
761 11:46:08.036890 Probing TPM I2C: done! DID_VID 0x00281ae0
762 11:46:08.040357 Locality already claimed
763 11:46:08.043873 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
764 11:46:08.054738 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
765 11:46:08.058415 Enabling GPIO PM b/c CR50 has long IRQ pulse support
766 11:46:08.064785 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
767 11:46:08.071210 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
768 11:46:08.075009 Found a VBT of 9216 bytes after decompression
769 11:46:08.078065 PCI 1.0, PIN A, using IRQ #16
770 11:46:08.081816 PCI 2.0, PIN A, using IRQ #17
771 11:46:08.084802 PCI 4.0, PIN A, using IRQ #18
772 11:46:08.088139 PCI 5.0, PIN A, using IRQ #16
773 11:46:08.091737 PCI 6.0, PIN A, using IRQ #16
774 11:46:08.094496 PCI 6.2, PIN C, using IRQ #18
775 11:46:08.098408 PCI 7.0, PIN A, using IRQ #19
776 11:46:08.101192 PCI 7.1, PIN B, using IRQ #20
777 11:46:08.104637 PCI 7.2, PIN C, using IRQ #21
778 11:46:08.108058 PCI 7.3, PIN D, using IRQ #22
779 11:46:08.111253 PCI 8.0, PIN A, using IRQ #23
780 11:46:08.114451 PCI D.0, PIN A, using IRQ #17
781 11:46:08.118386 PCI D.1, PIN B, using IRQ #19
782 11:46:08.118451 PCI 10.0, PIN A, using IRQ #24
783 11:46:08.121331 PCI 10.1, PIN B, using IRQ #25
784 11:46:08.124926 PCI 10.6, PIN C, using IRQ #20
785 11:46:08.128189 PCI 10.7, PIN D, using IRQ #21
786 11:46:08.131314 PCI 11.0, PIN A, using IRQ #26
787 11:46:08.134877 PCI 11.1, PIN B, using IRQ #27
788 11:46:08.138227 PCI 11.2, PIN C, using IRQ #28
789 11:46:08.141457 PCI 11.3, PIN D, using IRQ #29
790 11:46:08.144593 PCI 12.0, PIN A, using IRQ #30
791 11:46:08.148120 PCI 12.6, PIN B, using IRQ #31
792 11:46:08.151053 PCI 12.7, PIN C, using IRQ #22
793 11:46:08.154480 PCI 13.0, PIN A, using IRQ #32
794 11:46:08.157917 PCI 13.1, PIN B, using IRQ #33
795 11:46:08.161072 PCI 13.2, PIN C, using IRQ #34
796 11:46:08.164354 PCI 13.3, PIN D, using IRQ #35
797 11:46:08.168224 PCI 14.0, PIN B, using IRQ #23
798 11:46:08.168285 PCI 14.1, PIN A, using IRQ #36
799 11:46:08.171565 PCI 14.3, PIN C, using IRQ #17
800 11:46:08.174403 PCI 15.0, PIN A, using IRQ #37
801 11:46:08.178058 PCI 15.1, PIN B, using IRQ #38
802 11:46:08.181341 PCI 15.2, PIN C, using IRQ #39
803 11:46:08.184512 PCI 15.3, PIN D, using IRQ #40
804 11:46:08.187578 PCI 16.0, PIN A, using IRQ #18
805 11:46:08.191126 PCI 16.1, PIN B, using IRQ #19
806 11:46:08.194426 PCI 16.2, PIN C, using IRQ #20
807 11:46:08.197942 PCI 16.3, PIN D, using IRQ #21
808 11:46:08.201066 PCI 16.4, PIN A, using IRQ #18
809 11:46:08.204411 PCI 16.5, PIN B, using IRQ #19
810 11:46:08.207572 PCI 17.0, PIN A, using IRQ #22
811 11:46:08.211257 PCI 19.0, PIN A, using IRQ #41
812 11:46:08.214520 PCI 19.1, PIN B, using IRQ #42
813 11:46:08.217821 PCI 19.2, PIN C, using IRQ #43
814 11:46:08.221010 PCI 1C.0, PIN A, using IRQ #16
815 11:46:08.221071 PCI 1C.1, PIN B, using IRQ #17
816 11:46:08.224795 PCI 1C.2, PIN C, using IRQ #18
817 11:46:08.228089 PCI 1C.3, PIN D, using IRQ #19
818 11:46:08.231084 PCI 1C.4, PIN A, using IRQ #16
819 11:46:08.234250 PCI 1C.5, PIN B, using IRQ #17
820 11:46:08.237519 PCI 1C.6, PIN C, using IRQ #18
821 11:46:08.241277 PCI 1C.7, PIN D, using IRQ #19
822 11:46:08.244245 PCI 1D.0, PIN A, using IRQ #16
823 11:46:08.247592 PCI 1D.1, PIN B, using IRQ #17
824 11:46:08.250990 PCI 1D.2, PIN C, using IRQ #18
825 11:46:08.254532 PCI 1D.3, PIN D, using IRQ #19
826 11:46:08.258006 PCI 1E.0, PIN A, using IRQ #23
827 11:46:08.261179 PCI 1E.1, PIN B, using IRQ #20
828 11:46:08.264432 PCI 1E.2, PIN C, using IRQ #44
829 11:46:08.268038 PCI 1E.3, PIN D, using IRQ #45
830 11:46:08.270891 PCI 1F.3, PIN B, using IRQ #22
831 11:46:08.274375 PCI 1F.4, PIN C, using IRQ #23
832 11:46:08.274441 PCI 1F.6, PIN D, using IRQ #20
833 11:46:08.277711 PCI 1F.7, PIN A, using IRQ #21
834 11:46:08.284483 IRQ: Using dynamically assigned PCI IO-APIC IRQs
835 11:46:08.290783 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
836 11:46:08.471959 FSPS returned 0
837 11:46:08.475154 Executing Phase 1 of FspMultiPhaseSiInit
838 11:46:08.485424 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
839 11:46:08.488508 port C0 DISC req: usage 1 usb3 1 usb2 1
840 11:46:08.491576 Raw Buffer output 0 00000111
841 11:46:08.495029 Raw Buffer output 1 00000000
842 11:46:08.498502 pmc_send_ipc_cmd succeeded
843 11:46:08.505311 port C1 DISC req: usage 1 usb3 3 usb2 3
844 11:46:08.505398 Raw Buffer output 0 00000331
845 11:46:08.508713 Raw Buffer output 1 00000000
846 11:46:08.512663 pmc_send_ipc_cmd succeeded
847 11:46:08.517167 Detected 6 core, 8 thread CPU.
848 11:46:08.519999 Detected 6 core, 8 thread CPU.
849 11:46:08.525269 Detected 6 core, 8 thread CPU.
850 11:46:08.528486 Detected 6 core, 8 thread CPU.
851 11:46:08.531983 Detected 6 core, 8 thread CPU.
852 11:46:08.534955 Detected 6 core, 8 thread CPU.
853 11:46:08.538298 Detected 6 core, 8 thread CPU.
854 11:46:08.541937 Detected 6 core, 8 thread CPU.
855 11:46:08.545052 Detected 6 core, 8 thread CPU.
856 11:46:08.548739 Detected 6 core, 8 thread CPU.
857 11:46:08.552053 Detected 6 core, 8 thread CPU.
858 11:46:08.555281 Detected 6 core, 8 thread CPU.
859 11:46:08.558372 Detected 6 core, 8 thread CPU.
860 11:46:08.561512 Detected 6 core, 8 thread CPU.
861 11:46:08.565519 Detected 6 core, 8 thread CPU.
862 11:46:08.568666 Detected 6 core, 8 thread CPU.
863 11:46:08.571469 Detected 6 core, 8 thread CPU.
864 11:46:08.575292 Detected 6 core, 8 thread CPU.
865 11:46:08.578385 Detected 6 core, 8 thread CPU.
866 11:46:08.581505 Detected 6 core, 8 thread CPU.
867 11:46:08.584708 Detected 6 core, 8 thread CPU.
868 11:46:08.588240 Detected 6 core, 8 thread CPU.
869 11:46:08.878096 Detected 6 core, 8 thread CPU.
870 11:46:08.881871 Detected 6 core, 8 thread CPU.
871 11:46:08.884930 Detected 6 core, 8 thread CPU.
872 11:46:08.888673 Detected 6 core, 8 thread CPU.
873 11:46:08.891546 Detected 6 core, 8 thread CPU.
874 11:46:08.894946 Detected 6 core, 8 thread CPU.
875 11:46:08.898262 Detected 6 core, 8 thread CPU.
876 11:46:08.901630 Detected 6 core, 8 thread CPU.
877 11:46:08.904893 Detected 6 core, 8 thread CPU.
878 11:46:08.908277 Detected 6 core, 8 thread CPU.
879 11:46:08.911367 Detected 6 core, 8 thread CPU.
880 11:46:08.915118 Detected 6 core, 8 thread CPU.
881 11:46:08.918406 Detected 6 core, 8 thread CPU.
882 11:46:08.921405 Detected 6 core, 8 thread CPU.
883 11:46:08.924902 Detected 6 core, 8 thread CPU.
884 11:46:08.928115 Detected 6 core, 8 thread CPU.
885 11:46:08.932220 Detected 6 core, 8 thread CPU.
886 11:46:08.934779 Detected 6 core, 8 thread CPU.
887 11:46:08.938586 Detected 6 core, 8 thread CPU.
888 11:46:08.941816 Detected 6 core, 8 thread CPU.
889 11:46:08.944869 Display FSP Version Info HOB
890 11:46:08.948008 Reference Code - CPU = c.0.65.70
891 11:46:08.948075 uCode Version = 0.0.4.23
892 11:46:08.951514 TXT ACM version = ff.ff.ff.ffff
893 11:46:08.954913 Reference Code - ME = c.0.65.70
894 11:46:08.958292 MEBx version = 0.0.0.0
895 11:46:08.961396 ME Firmware Version = Lite SKU
896 11:46:08.964662 Reference Code - PCH = c.0.65.70
897 11:46:08.968089 PCH-CRID Status = Disabled
898 11:46:08.971798 PCH-CRID Original Value = ff.ff.ff.ffff
899 11:46:08.974898 PCH-CRID New Value = ff.ff.ff.ffff
900 11:46:08.978065 OPROM - RST - RAID = ff.ff.ff.ffff
901 11:46:08.981301 PCH Hsio Version = 4.0.0.0
902 11:46:08.984647 Reference Code - SA - System Agent = c.0.65.70
903 11:46:08.988118 Reference Code - MRC = 0.0.3.80
904 11:46:08.991894 SA - PCIe Version = c.0.65.70
905 11:46:08.994912 SA-CRID Status = Disabled
906 11:46:08.997976 SA-CRID Original Value = 0.0.0.4
907 11:46:09.001689 SA-CRID New Value = 0.0.0.4
908 11:46:09.004841 OPROM - VBIOS = ff.ff.ff.ffff
909 11:46:09.008552 IO Manageability Engine FW Version = 24.0.4.0
910 11:46:09.011902 PHY Build Version = 0.0.0.2016
911 11:46:09.014681 Thunderbolt(TM) FW Version = 0.0.0.0
912 11:46:09.021771 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
913 11:46:09.027819 BS: BS_DEV_INIT_CHIPS run times (exec / console): 492 / 507 ms
914 11:46:09.031296 Enumerating buses...
915 11:46:09.034729 Show all devs... Before device enumeration.
916 11:46:09.037927 Root Device: enabled 1
917 11:46:09.037991 CPU_CLUSTER: 0: enabled 1
918 11:46:09.041301 DOMAIN: 0000: enabled 1
919 11:46:09.044423 GPIO: 0: enabled 1
920 11:46:09.044488 PCI: 00:00.0: enabled 1
921 11:46:09.048029 PCI: 00:01.0: enabled 0
922 11:46:09.051076 PCI: 00:01.1: enabled 0
923 11:46:09.055009 PCI: 00:02.0: enabled 1
924 11:46:09.055067 PCI: 00:04.0: enabled 1
925 11:46:09.058030 PCI: 00:05.0: enabled 0
926 11:46:09.061306 PCI: 00:06.0: enabled 1
927 11:46:09.064351 PCI: 00:06.2: enabled 0
928 11:46:09.064418 PCI: 00:07.0: enabled 0
929 11:46:09.067579 PCI: 00:07.1: enabled 0
930 11:46:09.070964 PCI: 00:07.2: enabled 0
931 11:46:09.074415 PCI: 00:07.3: enabled 0
932 11:46:09.074479 PCI: 00:08.0: enabled 0
933 11:46:09.077731 PCI: 00:09.0: enabled 0
934 11:46:09.081827 PCI: 00:0a.0: enabled 1
935 11:46:09.081885 PCI: 00:0d.0: enabled 1
936 11:46:09.084795 PCI: 00:0d.1: enabled 0
937 11:46:09.087989 PCI: 00:0d.2: enabled 0
938 11:46:09.090921 PCI: 00:0d.3: enabled 0
939 11:46:09.090980 PCI: 00:0e.0: enabled 0
940 11:46:09.094670 PCI: 00:10.0: enabled 0
941 11:46:09.097998 PCI: 00:10.1: enabled 0
942 11:46:09.100975 PCI: 00:10.6: enabled 0
943 11:46:09.101034 PCI: 00:10.7: enabled 0
944 11:46:09.104372 PCI: 00:12.0: enabled 0
945 11:46:09.107667 PCI: 00:12.6: enabled 0
946 11:46:09.111139 PCI: 00:12.7: enabled 0
947 11:46:09.111199 PCI: 00:13.0: enabled 0
948 11:46:09.114607 PCI: 00:14.0: enabled 1
949 11:46:09.117559 PCI: 00:14.1: enabled 0
950 11:46:09.121394 PCI: 00:14.2: enabled 1
951 11:46:09.121468 PCI: 00:14.3: enabled 1
952 11:46:09.124430 PCI: 00:15.0: enabled 1
953 11:46:09.127628 PCI: 00:15.1: enabled 1
954 11:46:09.127718 PCI: 00:15.2: enabled 0
955 11:46:09.131067 PCI: 00:15.3: enabled 1
956 11:46:09.134149 PCI: 00:16.0: enabled 1
957 11:46:09.138128 PCI: 00:16.1: enabled 0
958 11:46:09.138237 PCI: 00:16.2: enabled 0
959 11:46:09.141194 PCI: 00:16.3: enabled 0
960 11:46:09.144530 PCI: 00:16.4: enabled 0
961 11:46:09.147508 PCI: 00:16.5: enabled 0
962 11:46:09.147583 PCI: 00:17.0: enabled 1
963 11:46:09.150959 PCI: 00:19.0: enabled 0
964 11:46:09.154174 PCI: 00:19.1: enabled 1
965 11:46:09.157447 PCI: 00:19.2: enabled 0
966 11:46:09.157505 PCI: 00:1a.0: enabled 0
967 11:46:09.160668 PCI: 00:1c.0: enabled 0
968 11:46:09.163981 PCI: 00:1c.1: enabled 0
969 11:46:09.164040 PCI: 00:1c.2: enabled 0
970 11:46:09.167616 PCI: 00:1c.3: enabled 0
971 11:46:09.170768 PCI: 00:1c.4: enabled 0
972 11:46:09.174383 PCI: 00:1c.5: enabled 0
973 11:46:09.174443 PCI: 00:1c.6: enabled 0
974 11:46:09.177301 PCI: 00:1c.7: enabled 0
975 11:46:09.180935 PCI: 00:1d.0: enabled 0
976 11:46:09.184473 PCI: 00:1d.1: enabled 0
977 11:46:09.184543 PCI: 00:1d.2: enabled 0
978 11:46:09.187384 PCI: 00:1d.3: enabled 0
979 11:46:09.191027 PCI: 00:1e.0: enabled 1
980 11:46:09.193821 PCI: 00:1e.1: enabled 0
981 11:46:09.193889 PCI: 00:1e.2: enabled 0
982 11:46:09.197657 PCI: 00:1e.3: enabled 1
983 11:46:09.200583 PCI: 00:1f.0: enabled 1
984 11:46:09.204303 PCI: 00:1f.1: enabled 0
985 11:46:09.204363 PCI: 00:1f.2: enabled 1
986 11:46:09.207226 PCI: 00:1f.3: enabled 1
987 11:46:09.210951 PCI: 00:1f.4: enabled 0
988 11:46:09.211017 PCI: 00:1f.5: enabled 1
989 11:46:09.214046 PCI: 00:1f.6: enabled 0
990 11:46:09.217247 PCI: 00:1f.7: enabled 0
991 11:46:09.220798 GENERIC: 0.0: enabled 1
992 11:46:09.220854 GENERIC: 0.0: enabled 1
993 11:46:09.224388 GENERIC: 1.0: enabled 1
994 11:46:09.227387 GENERIC: 0.0: enabled 1
995 11:46:09.230800 GENERIC: 1.0: enabled 1
996 11:46:09.230860 USB0 port 0: enabled 1
997 11:46:09.234421 USB0 port 0: enabled 1
998 11:46:09.237164 GENERIC: 0.0: enabled 1
999 11:46:09.237225 I2C: 00:1a: enabled 1
1000 11:46:09.240915 I2C: 00:31: enabled 1
1001 11:46:09.244121 I2C: 00:32: enabled 1
1002 11:46:09.244199 I2C: 00:50: enabled 1
1003 11:46:09.247686 I2C: 00:10: enabled 1
1004 11:46:09.251110 I2C: 00:15: enabled 1
1005 11:46:09.251184 I2C: 00:2c: enabled 1
1006 11:46:09.253943 GENERIC: 0.0: enabled 1
1007 11:46:09.257236 SPI: 00: enabled 1
1008 11:46:09.257312 PNP: 0c09.0: enabled 1
1009 11:46:09.260937 GENERIC: 0.0: enabled 1
1010 11:46:09.264130 USB3 port 0: enabled 1
1011 11:46:09.267739 USB3 port 1: enabled 0
1012 11:46:09.267797 USB3 port 2: enabled 1
1013 11:46:09.270716 USB3 port 3: enabled 0
1014 11:46:09.274121 USB2 port 0: enabled 1
1015 11:46:09.274185 USB2 port 1: enabled 0
1016 11:46:09.277719 USB2 port 2: enabled 1
1017 11:46:09.280876 USB2 port 3: enabled 0
1018 11:46:09.283914 USB2 port 4: enabled 0
1019 11:46:09.283981 USB2 port 5: enabled 1
1020 11:46:09.287373 USB2 port 6: enabled 0
1021 11:46:09.290559 USB2 port 7: enabled 0
1022 11:46:09.290613 USB2 port 8: enabled 1
1023 11:46:09.294231 USB2 port 9: enabled 1
1024 11:46:09.297139 USB3 port 0: enabled 1
1025 11:46:09.297198 USB3 port 1: enabled 0
1026 11:46:09.300415 USB3 port 2: enabled 0
1027 11:46:09.303880 USB3 port 3: enabled 0
1028 11:46:09.307204 GENERIC: 0.0: enabled 1
1029 11:46:09.307256 GENERIC: 1.0: enabled 1
1030 11:46:09.310508 APIC: 00: enabled 1
1031 11:46:09.314114 APIC: 16: enabled 1
1032 11:46:09.314166 APIC: 10: enabled 1
1033 11:46:09.317368 APIC: 12: enabled 1
1034 11:46:09.317419 APIC: 14: enabled 1
1035 11:46:09.320335 APIC: 01: enabled 1
1036 11:46:09.324123 APIC: 08: enabled 1
1037 11:46:09.324182 APIC: 09: enabled 1
1038 11:46:09.327441 Compare with tree...
1039 11:46:09.330308 Root Device: enabled 1
1040 11:46:09.330361 CPU_CLUSTER: 0: enabled 1
1041 11:46:09.333815 APIC: 00: enabled 1
1042 11:46:09.337688 APIC: 16: enabled 1
1043 11:46:09.337752 APIC: 10: enabled 1
1044 11:46:09.340479 APIC: 12: enabled 1
1045 11:46:09.343784 APIC: 14: enabled 1
1046 11:46:09.343837 APIC: 01: enabled 1
1047 11:46:09.347373 APIC: 08: enabled 1
1048 11:46:09.351013 APIC: 09: enabled 1
1049 11:46:09.354069 DOMAIN: 0000: enabled 1
1050 11:46:09.354122 GPIO: 0: enabled 1
1051 11:46:09.357662 PCI: 00:00.0: enabled 1
1052 11:46:09.361192 PCI: 00:01.0: enabled 0
1053 11:46:09.364104 PCI: 00:01.1: enabled 0
1054 11:46:09.364156 PCI: 00:02.0: enabled 1
1055 11:46:09.367144 PCI: 00:04.0: enabled 1
1056 11:46:09.370762 GENERIC: 0.0: enabled 1
1057 11:46:09.373818 PCI: 00:05.0: enabled 0
1058 11:46:09.377258 PCI: 00:06.0: enabled 1
1059 11:46:09.377322 PCI: 00:06.2: enabled 0
1060 11:46:09.380375 PCI: 00:08.0: enabled 0
1061 11:46:09.383804 PCI: 00:09.0: enabled 0
1062 11:46:09.387137 PCI: 00:0a.0: enabled 1
1063 11:46:09.390249 PCI: 00:0d.0: enabled 1
1064 11:46:09.390305 USB0 port 0: enabled 1
1065 11:46:09.393821 USB3 port 0: enabled 1
1066 11:46:09.397434 USB3 port 1: enabled 0
1067 11:46:09.400400 USB3 port 2: enabled 1
1068 11:46:09.403797 USB3 port 3: enabled 0
1069 11:46:09.403854 PCI: 00:0d.1: enabled 0
1070 11:46:09.407006 PCI: 00:0d.2: enabled 0
1071 11:46:09.410567 PCI: 00:0d.3: enabled 0
1072 11:46:09.414255 PCI: 00:0e.0: enabled 0
1073 11:46:09.417269 PCI: 00:10.0: enabled 0
1074 11:46:09.417327 PCI: 00:10.1: enabled 0
1075 11:46:09.420370 PCI: 00:10.6: enabled 0
1076 11:46:09.423947 PCI: 00:10.7: enabled 0
1077 11:46:09.426825 PCI: 00:12.0: enabled 0
1078 11:46:09.430280 PCI: 00:12.6: enabled 0
1079 11:46:09.430335 PCI: 00:12.7: enabled 0
1080 11:46:09.433412 PCI: 00:13.0: enabled 0
1081 11:46:09.437032 PCI: 00:14.0: enabled 1
1082 11:46:09.440344 USB0 port 0: enabled 1
1083 11:46:09.443551 USB2 port 0: enabled 1
1084 11:46:09.443609 USB2 port 1: enabled 0
1085 11:46:09.446749 USB2 port 2: enabled 1
1086 11:46:09.450574 USB2 port 3: enabled 0
1087 11:46:09.453741 USB2 port 4: enabled 0
1088 11:46:09.456688 USB2 port 5: enabled 1
1089 11:46:09.460381 USB2 port 6: enabled 0
1090 11:46:09.460465 USB2 port 7: enabled 0
1091 11:46:09.463675 USB2 port 8: enabled 1
1092 11:46:09.466667 USB2 port 9: enabled 1
1093 11:46:09.470025 USB3 port 0: enabled 1
1094 11:46:09.473259 USB3 port 1: enabled 0
1095 11:46:09.476786 USB3 port 2: enabled 0
1096 11:46:09.476846 USB3 port 3: enabled 0
1097 11:46:09.480167 PCI: 00:14.1: enabled 0
1098 11:46:09.483664 PCI: 00:14.2: enabled 1
1099 11:46:09.486899 PCI: 00:14.3: enabled 1
1100 11:46:09.490228 GENERIC: 0.0: enabled 1
1101 11:46:09.490291 PCI: 00:15.0: enabled 1
1102 11:46:09.493491 I2C: 00:1a: enabled 1
1103 11:46:09.496757 I2C: 00:31: enabled 1
1104 11:46:09.499926 I2C: 00:32: enabled 1
1105 11:46:09.499985 PCI: 00:15.1: enabled 1
1106 11:46:09.503081 I2C: 00:50: enabled 1
1107 11:46:09.506556 PCI: 00:15.2: enabled 0
1108 11:46:09.510200 PCI: 00:15.3: enabled 1
1109 11:46:09.513107 I2C: 00:10: enabled 1
1110 11:46:09.513172 PCI: 00:16.0: enabled 1
1111 11:46:09.517076 PCI: 00:16.1: enabled 0
1112 11:46:09.520022 PCI: 00:16.2: enabled 0
1113 11:46:09.523082 PCI: 00:16.3: enabled 0
1114 11:46:09.526749 PCI: 00:16.4: enabled 0
1115 11:46:09.526822 PCI: 00:16.5: enabled 0
1116 11:46:09.530108 PCI: 00:17.0: enabled 1
1117 11:46:09.533108 PCI: 00:19.0: enabled 0
1118 11:46:09.536722 PCI: 00:19.1: enabled 1
1119 11:46:09.536777 I2C: 00:15: enabled 1
1120 11:46:09.540014 I2C: 00:2c: enabled 1
1121 11:46:09.543240 PCI: 00:19.2: enabled 0
1122 11:46:09.546816 PCI: 00:1a.0: enabled 0
1123 11:46:09.549946 PCI: 00:1e.0: enabled 1
1124 11:46:09.550008 PCI: 00:1e.1: enabled 0
1125 11:46:09.553630 PCI: 00:1e.2: enabled 0
1126 11:46:09.556639 PCI: 00:1e.3: enabled 1
1127 11:46:09.559734 SPI: 00: enabled 1
1128 11:46:09.559820 PCI: 00:1f.0: enabled 1
1129 11:46:09.563502 PNP: 0c09.0: enabled 1
1130 11:46:09.566337 PCI: 00:1f.1: enabled 0
1131 11:46:09.569745 PCI: 00:1f.2: enabled 1
1132 11:46:09.573029 GENERIC: 0.0: enabled 1
1133 11:46:09.576341 GENERIC: 0.0: enabled 1
1134 11:46:09.576397 GENERIC: 1.0: enabled 1
1135 11:46:09.579870 PCI: 00:1f.3: enabled 1
1136 11:46:09.583015 PCI: 00:1f.4: enabled 0
1137 11:46:09.586624 PCI: 00:1f.5: enabled 1
1138 11:46:09.590111 PCI: 00:1f.6: enabled 0
1139 11:46:09.590166 PCI: 00:1f.7: enabled 0
1140 11:46:09.592904 Root Device scanning...
1141 11:46:09.596662 scan_static_bus for Root Device
1142 11:46:09.599662 CPU_CLUSTER: 0 enabled
1143 11:46:09.599723 DOMAIN: 0000 enabled
1144 11:46:09.602885 DOMAIN: 0000 scanning...
1145 11:46:09.607236 PCI: pci_scan_bus for bus 00
1146 11:46:09.610002 PCI: 00:00.0 [8086/0000] ops
1147 11:46:09.613088 PCI: 00:00.0 [8086/4609] enabled
1148 11:46:09.616764 PCI: 00:02.0 [8086/0000] bus ops
1149 11:46:09.619881 PCI: 00:02.0 [8086/46b3] enabled
1150 11:46:09.623755 PCI: 00:04.0 [8086/0000] bus ops
1151 11:46:09.626561 PCI: 00:04.0 [8086/461d] enabled
1152 11:46:09.629744 PCI: 00:06.0 [8086/0000] bus ops
1153 11:46:09.632783 PCI: 00:06.0 [8086/464d] enabled
1154 11:46:09.636349 PCI: 00:08.0 [8086/464f] disabled
1155 11:46:09.639510 PCI: 00:0a.0 [8086/467d] enabled
1156 11:46:09.642775 PCI: 00:0d.0 [8086/0000] bus ops
1157 11:46:09.646467 PCI: 00:0d.0 [8086/461e] enabled
1158 11:46:09.649907 PCI: 00:14.0 [8086/0000] bus ops
1159 11:46:09.653156 PCI: 00:14.0 [8086/51ed] enabled
1160 11:46:09.656636 PCI: 00:14.2 [8086/51ef] enabled
1161 11:46:09.659546 PCI: 00:14.3 [8086/0000] bus ops
1162 11:46:09.663117 PCI: 00:14.3 [8086/51f0] enabled
1163 11:46:09.666387 PCI: 00:15.0 [8086/0000] bus ops
1164 11:46:09.669830 PCI: 00:15.0 [8086/51e8] enabled
1165 11:46:09.672937 PCI: 00:15.1 [8086/0000] bus ops
1166 11:46:09.676711 PCI: 00:15.1 [8086/51e9] enabled
1167 11:46:09.679541 PCI: 00:15.2 [8086/0000] bus ops
1168 11:46:09.682770 PCI: 00:15.2 [8086/51ea] disabled
1169 11:46:09.686136 PCI: 00:15.3 [8086/0000] bus ops
1170 11:46:09.689758 PCI: 00:15.3 [8086/51eb] enabled
1171 11:46:09.693067 PCI: 00:16.0 [8086/0000] ops
1172 11:46:09.696426 PCI: 00:16.0 [8086/51e0] enabled
1173 11:46:09.703042 PCI: Static device PCI: 00:17.0 not found, disabling it.
1174 11:46:09.706432 PCI: 00:19.0 [8086/0000] bus ops
1175 11:46:09.709703 PCI: 00:19.0 [8086/51c5] disabled
1176 11:46:09.713325 PCI: 00:19.1 [8086/0000] bus ops
1177 11:46:09.716472 PCI: 00:19.1 [8086/51c6] enabled
1178 11:46:09.719608 PCI: 00:1e.0 [8086/0000] ops
1179 11:46:09.723332 PCI: 00:1e.0 [8086/51a8] enabled
1180 11:46:09.726425 PCI: 00:1e.3 [8086/0000] bus ops
1181 11:46:09.729953 PCI: 00:1e.3 [8086/51ab] enabled
1182 11:46:09.732889 PCI: 00:1f.0 [8086/0000] bus ops
1183 11:46:09.736367 PCI: 00:1f.0 [8086/5182] enabled
1184 11:46:09.736422 RTC Init
1185 11:46:09.743237 Set power on after power failure.
1186 11:46:09.743293 Disabling Deep S3
1187 11:46:09.746435 Disabling Deep S3
1188 11:46:09.746495 Disabling Deep S4
1189 11:46:09.749885 Disabling Deep S4
1190 11:46:09.749955 Disabling Deep S5
1191 11:46:09.753140 Disabling Deep S5
1192 11:46:09.756417 PCI: 00:1f.2 [0000/0000] hidden
1193 11:46:09.759623 PCI: 00:1f.3 [8086/0000] bus ops
1194 11:46:09.762797 PCI: 00:1f.3 [8086/51c8] enabled
1195 11:46:09.766459 PCI: 00:1f.5 [8086/0000] bus ops
1196 11:46:09.769550 PCI: 00:1f.5 [8086/51a4] enabled
1197 11:46:09.769608 GPIO: 0 enabled
1198 11:46:09.772891 PCI: Leftover static devices:
1199 11:46:09.776333 PCI: 00:01.0
1200 11:46:09.776385 PCI: 00:01.1
1201 11:46:09.779424 PCI: 00:05.0
1202 11:46:09.779475 PCI: 00:06.2
1203 11:46:09.779520 PCI: 00:09.0
1204 11:46:09.782877 PCI: 00:0d.1
1205 11:46:09.782930 PCI: 00:0d.2
1206 11:46:09.786477 PCI: 00:0d.3
1207 11:46:09.786541 PCI: 00:0e.0
1208 11:46:09.786588 PCI: 00:10.0
1209 11:46:09.789644 PCI: 00:10.1
1210 11:46:09.789702 PCI: 00:10.6
1211 11:46:09.792712 PCI: 00:10.7
1212 11:46:09.792767 PCI: 00:12.0
1213 11:46:09.796145 PCI: 00:12.6
1214 11:46:09.796203 PCI: 00:12.7
1215 11:46:09.796248 PCI: 00:13.0
1216 11:46:09.799539 PCI: 00:14.1
1217 11:46:09.799596 PCI: 00:16.1
1218 11:46:09.802890 PCI: 00:16.2
1219 11:46:09.802952 PCI: 00:16.3
1220 11:46:09.802998 PCI: 00:16.4
1221 11:46:09.805911 PCI: 00:16.5
1222 11:46:09.805965 PCI: 00:17.0
1223 11:46:09.809665 PCI: 00:19.2
1224 11:46:09.809737 PCI: 00:1a.0
1225 11:46:09.809792 PCI: 00:1e.1
1226 11:46:09.812828 PCI: 00:1e.2
1227 11:46:09.812883 PCI: 00:1f.1
1228 11:46:09.816153 PCI: 00:1f.4
1229 11:46:09.816214 PCI: 00:1f.6
1230 11:46:09.819332 PCI: 00:1f.7
1231 11:46:09.819387 PCI: Check your devicetree.cb.
1232 11:46:09.822676 PCI: 00:02.0 scanning...
1233 11:46:09.826355 scan_generic_bus for PCI: 00:02.0
1234 11:46:09.829632 scan_generic_bus for PCI: 00:02.0 done
1235 11:46:09.836162 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1236 11:46:09.839200 PCI: 00:04.0 scanning...
1237 11:46:09.842705 scan_generic_bus for PCI: 00:04.0
1238 11:46:09.842772 GENERIC: 0.0 enabled
1239 11:46:09.849266 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1240 11:46:09.856199 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1241 11:46:09.856256 PCI: 00:06.0 scanning...
1242 11:46:09.859408 do_pci_scan_bridge for PCI: 00:06.0
1243 11:46:09.863146 PCI: pci_scan_bus for bus 01
1244 11:46:09.866023 PCI: 01:00.0 [15b7/5009] enabled
1245 11:46:09.869580 Enabling Common Clock Configuration
1246 11:46:09.876204 L1 Sub-State supported from root port 6
1247 11:46:09.876269 L1 Sub-State Support = 0x5
1248 11:46:09.879278 CommonModeRestoreTime = 0x6e
1249 11:46:09.886109 Power On Value = 0x5, Power On Scale = 0x2
1250 11:46:09.886174 ASPM: Enabled L1
1251 11:46:09.889136 PCIe: Max_Payload_Size adjusted to 256
1252 11:46:09.893048 PCI: 01:00.0: Enabled LTR
1253 11:46:09.896030 PCI: 01:00.0: Programmed LTR max latencies
1254 11:46:09.902648 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1255 11:46:09.906134 PCI: 00:0d.0 scanning...
1256 11:46:09.909175 scan_static_bus for PCI: 00:0d.0
1257 11:46:09.909243 USB0 port 0 enabled
1258 11:46:09.912869 USB0 port 0 scanning...
1259 11:46:09.915731 scan_static_bus for USB0 port 0
1260 11:46:09.919758 USB3 port 0 enabled
1261 11:46:09.919818 USB3 port 1 disabled
1262 11:46:09.922680 USB3 port 2 enabled
1263 11:46:09.922732 USB3 port 3 disabled
1264 11:46:09.925921 USB3 port 0 scanning...
1265 11:46:09.929198 scan_static_bus for USB3 port 0
1266 11:46:09.932777 scan_static_bus for USB3 port 0 done
1267 11:46:09.939092 scan_bus: bus USB3 port 0 finished in 6 msecs
1268 11:46:09.939149 USB3 port 2 scanning...
1269 11:46:09.942801 scan_static_bus for USB3 port 2
1270 11:46:09.946227 scan_static_bus for USB3 port 2 done
1271 11:46:09.952885 scan_bus: bus USB3 port 2 finished in 6 msecs
1272 11:46:09.955878 scan_static_bus for USB0 port 0 done
1273 11:46:09.959459 scan_bus: bus USB0 port 0 finished in 43 msecs
1274 11:46:09.962673 scan_static_bus for PCI: 00:0d.0 done
1275 11:46:09.969223 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1276 11:46:09.972983 PCI: 00:14.0 scanning...
1277 11:46:09.976763 scan_static_bus for PCI: 00:14.0
1278 11:46:09.976822 USB0 port 0 enabled
1279 11:46:09.979278 USB0 port 0 scanning...
1280 11:46:09.982645 scan_static_bus for USB0 port 0
1281 11:46:09.986065 USB2 port 0 enabled
1282 11:46:09.986124 USB2 port 1 disabled
1283 11:46:09.989319 USB2 port 2 enabled
1284 11:46:09.989372 USB2 port 3 disabled
1285 11:46:09.992590 USB2 port 4 disabled
1286 11:46:09.995874 USB2 port 5 enabled
1287 11:46:09.995930 USB2 port 6 disabled
1288 11:46:09.999558 USB2 port 7 disabled
1289 11:46:10.002724 USB2 port 8 enabled
1290 11:46:10.002779 USB2 port 9 enabled
1291 11:46:10.006119 USB3 port 0 enabled
1292 11:46:10.006175 USB3 port 1 disabled
1293 11:46:10.009615 USB3 port 2 disabled
1294 11:46:10.012753 USB3 port 3 disabled
1295 11:46:10.016432 USB2 port 0 scanning...
1296 11:46:10.016493 scan_static_bus for USB2 port 0
1297 11:46:10.022515 scan_static_bus for USB2 port 0 done
1298 11:46:10.026214 scan_bus: bus USB2 port 0 finished in 6 msecs
1299 11:46:10.029517 USB2 port 2 scanning...
1300 11:46:10.032691 scan_static_bus for USB2 port 2
1301 11:46:10.035905 scan_static_bus for USB2 port 2 done
1302 11:46:10.039231 scan_bus: bus USB2 port 2 finished in 6 msecs
1303 11:46:10.042979 USB2 port 5 scanning...
1304 11:46:10.046214 scan_static_bus for USB2 port 5
1305 11:46:10.049700 scan_static_bus for USB2 port 5 done
1306 11:46:10.052897 scan_bus: bus USB2 port 5 finished in 6 msecs
1307 11:46:10.055947 USB2 port 8 scanning...
1308 11:46:10.059690 scan_static_bus for USB2 port 8
1309 11:46:10.062685 scan_static_bus for USB2 port 8 done
1310 11:46:10.069546 scan_bus: bus USB2 port 8 finished in 6 msecs
1311 11:46:10.069602 USB2 port 9 scanning...
1312 11:46:10.073351 scan_static_bus for USB2 port 9
1313 11:46:10.076439 scan_static_bus for USB2 port 9 done
1314 11:46:10.082700 scan_bus: bus USB2 port 9 finished in 6 msecs
1315 11:46:10.082758 USB3 port 0 scanning...
1316 11:46:10.086349 scan_static_bus for USB3 port 0
1317 11:46:10.092752 scan_static_bus for USB3 port 0 done
1318 11:46:10.095911 scan_bus: bus USB3 port 0 finished in 6 msecs
1319 11:46:10.099262 scan_static_bus for USB0 port 0 done
1320 11:46:10.102667 scan_bus: bus USB0 port 0 finished in 120 msecs
1321 11:46:10.109702 scan_static_bus for PCI: 00:14.0 done
1322 11:46:10.112781 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1323 11:46:10.116340 PCI: 00:14.3 scanning...
1324 11:46:10.119652 scan_static_bus for PCI: 00:14.3
1325 11:46:10.119716 GENERIC: 0.0 enabled
1326 11:46:10.126216 scan_static_bus for PCI: 00:14.3 done
1327 11:46:10.129651 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1328 11:46:10.133212 PCI: 00:15.0 scanning...
1329 11:46:10.136415 scan_static_bus for PCI: 00:15.0
1330 11:46:10.136477 I2C: 00:1a enabled
1331 11:46:10.139929 I2C: 00:31 enabled
1332 11:46:10.142505 I2C: 00:32 enabled
1333 11:46:10.146109 scan_static_bus for PCI: 00:15.0 done
1334 11:46:10.149370 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1335 11:46:10.152716 PCI: 00:15.1 scanning...
1336 11:46:10.156275 scan_static_bus for PCI: 00:15.1
1337 11:46:10.159039 I2C: 00:50 enabled
1338 11:46:10.162414 scan_static_bus for PCI: 00:15.1 done
1339 11:46:10.166134 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1340 11:46:10.169153 PCI: 00:15.3 scanning...
1341 11:46:10.172640 scan_static_bus for PCI: 00:15.3
1342 11:46:10.172699 I2C: 00:10 enabled
1343 11:46:10.179206 scan_static_bus for PCI: 00:15.3 done
1344 11:46:10.182466 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1345 11:46:10.186042 PCI: 00:19.1 scanning...
1346 11:46:10.189483 scan_static_bus for PCI: 00:19.1
1347 11:46:10.189538 I2C: 00:15 enabled
1348 11:46:10.192548 I2C: 00:2c enabled
1349 11:46:10.196261 scan_static_bus for PCI: 00:19.1 done
1350 11:46:10.199483 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1351 11:46:10.202879 PCI: 00:1e.3 scanning...
1352 11:46:10.205779 scan_generic_bus for PCI: 00:1e.3
1353 11:46:10.209532 SPI: 00 enabled
1354 11:46:10.215825 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1355 11:46:10.219660 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1356 11:46:10.222782 PCI: 00:1f.0 scanning...
1357 11:46:10.225837 scan_static_bus for PCI: 00:1f.0
1358 11:46:10.225888 PNP: 0c09.0 enabled
1359 11:46:10.229338 PNP: 0c09.0 scanning...
1360 11:46:10.232509 scan_static_bus for PNP: 0c09.0
1361 11:46:10.236148 scan_static_bus for PNP: 0c09.0 done
1362 11:46:10.242671 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1363 11:46:10.246314 scan_static_bus for PCI: 00:1f.0 done
1364 11:46:10.249417 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1365 11:46:10.252457 PCI: 00:1f.2 scanning...
1366 11:46:10.256029 scan_static_bus for PCI: 00:1f.2
1367 11:46:10.259425 GENERIC: 0.0 enabled
1368 11:46:10.259490 GENERIC: 0.0 scanning...
1369 11:46:10.262485 scan_static_bus for GENERIC: 0.0
1370 11:46:10.266208 GENERIC: 0.0 enabled
1371 11:46:10.269189 GENERIC: 1.0 enabled
1372 11:46:10.272966 scan_static_bus for GENERIC: 0.0 done
1373 11:46:10.275765 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1374 11:46:10.279282 scan_static_bus for PCI: 00:1f.2 done
1375 11:46:10.285829 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1376 11:46:10.289082 PCI: 00:1f.3 scanning...
1377 11:46:10.292613 scan_static_bus for PCI: 00:1f.3
1378 11:46:10.296027 scan_static_bus for PCI: 00:1f.3 done
1379 11:46:10.299307 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1380 11:46:10.302659 PCI: 00:1f.5 scanning...
1381 11:46:10.306297 scan_generic_bus for PCI: 00:1f.5
1382 11:46:10.309279 scan_generic_bus for PCI: 00:1f.5 done
1383 11:46:10.312475 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1384 11:46:10.319198 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1385 11:46:10.322130 scan_static_bus for Root Device done
1386 11:46:10.329261 scan_bus: bus Root Device finished in 729 msecs
1387 11:46:10.329326 done
1388 11:46:10.336045 BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 1296 ms
1389 11:46:10.338943 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1390 11:46:10.345676 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1391 11:46:10.349001 SPI flash protection: WPSW=0 SRP0=0
1392 11:46:10.355454 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1393 11:46:10.359192 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1394 11:46:10.362169 found VGA at PCI: 00:02.0
1395 11:46:10.365548 Setting up VGA for PCI: 00:02.0
1396 11:46:10.372155 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1397 11:46:10.375479 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1398 11:46:10.378944 Allocating resources...
1399 11:46:10.382407 Reading resources...
1400 11:46:10.385432 Root Device read_resources bus 0 link: 0
1401 11:46:10.389012 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1402 11:46:10.395594 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1403 11:46:10.398848 DOMAIN: 0000 read_resources bus 0 link: 0
1404 11:46:10.405180 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1405 11:46:10.412346 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1406 11:46:10.415218 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1407 11:46:10.421991 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1408 11:46:10.428869 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1409 11:46:10.435897 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1410 11:46:10.442376 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1411 11:46:10.448991 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1412 11:46:10.455402 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1413 11:46:10.462304 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1414 11:46:10.469111 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1415 11:46:10.475736 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1416 11:46:10.482159 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1417 11:46:10.485561 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1418 11:46:10.491917 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1419 11:46:10.498600 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1420 11:46:10.505351 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1421 11:46:10.512156 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1422 11:46:10.518762 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1423 11:46:10.525064 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1424 11:46:10.531722 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1425 11:46:10.535157 PCI: 00:04.0 read_resources bus 1 link: 0
1426 11:46:10.538504 PCI: 00:04.0 read_resources bus 1 link: 0 done
1427 11:46:10.545447 PCI: 00:06.0 read_resources bus 1 link: 0
1428 11:46:10.548544 PCI: 00:06.0 read_resources bus 1 link: 0 done
1429 11:46:10.551661 PCI: 00:0d.0 read_resources bus 0 link: 0
1430 11:46:10.558523 USB0 port 0 read_resources bus 0 link: 0
1431 11:46:10.561789 USB0 port 0 read_resources bus 0 link: 0 done
1432 11:46:10.565125 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1433 11:46:10.571816 PCI: 00:14.0 read_resources bus 0 link: 0
1434 11:46:10.575076 USB0 port 0 read_resources bus 0 link: 0
1435 11:46:10.578249 USB0 port 0 read_resources bus 0 link: 0 done
1436 11:46:10.584965 PCI: 00:14.0 read_resources bus 0 link: 0 done
1437 11:46:10.588064 PCI: 00:14.3 read_resources bus 0 link: 0
1438 11:46:10.591383 PCI: 00:14.3 read_resources bus 0 link: 0 done
1439 11:46:10.598881 PCI: 00:15.0 read_resources bus 0 link: 0
1440 11:46:10.601910 PCI: 00:15.0 read_resources bus 0 link: 0 done
1441 11:46:10.604911 PCI: 00:15.1 read_resources bus 0 link: 0
1442 11:46:10.611401 PCI: 00:15.1 read_resources bus 0 link: 0 done
1443 11:46:10.614937 PCI: 00:15.3 read_resources bus 0 link: 0
1444 11:46:10.621227 PCI: 00:15.3 read_resources bus 0 link: 0 done
1445 11:46:10.624766 PCI: 00:19.1 read_resources bus 0 link: 0
1446 11:46:10.628409 PCI: 00:19.1 read_resources bus 0 link: 0 done
1447 11:46:10.634739 PCI: 00:1e.3 read_resources bus 2 link: 0
1448 11:46:10.637970 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1449 11:46:10.641727 PCI: 00:1f.0 read_resources bus 0 link: 0
1450 11:46:10.648119 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1451 11:46:10.651321 PCI: 00:1f.2 read_resources bus 0 link: 0
1452 11:46:10.654624 GENERIC: 0.0 read_resources bus 0 link: 0
1453 11:46:10.661567 GENERIC: 0.0 read_resources bus 0 link: 0 done
1454 11:46:10.664661 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1455 11:46:10.671189 DOMAIN: 0000 read_resources bus 0 link: 0 done
1456 11:46:10.674850 Root Device read_resources bus 0 link: 0 done
1457 11:46:10.677995 Done reading resources.
1458 11:46:10.681762 Show resources in subtree (Root Device)...After reading.
1459 11:46:10.688017 Root Device child on link 0 CPU_CLUSTER: 0
1460 11:46:10.691380 CPU_CLUSTER: 0 child on link 0 APIC: 00
1461 11:46:10.691436 APIC: 00
1462 11:46:10.694662 APIC: 16
1463 11:46:10.694719 APIC: 10
1464 11:46:10.697864 APIC: 12
1465 11:46:10.697920 APIC: 14
1466 11:46:10.697966 APIC: 01
1467 11:46:10.701534 APIC: 08
1468 11:46:10.701589 APIC: 09
1469 11:46:10.704853 DOMAIN: 0000 child on link 0 GPIO: 0
1470 11:46:10.714678 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1471 11:46:10.724710 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1472 11:46:10.724788 GPIO: 0
1473 11:46:10.727930 PCI: 00:00.0
1474 11:46:10.738098 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1475 11:46:10.747786 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1476 11:46:10.755041 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1477 11:46:10.764563 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1478 11:46:10.774264 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1479 11:46:10.784713 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1480 11:46:10.794535 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1481 11:46:10.804509 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1482 11:46:10.811032 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1483 11:46:10.821028 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1484 11:46:10.831115 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1485 11:46:10.841430 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1486 11:46:10.850767 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1487 11:46:10.861050 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1488 11:46:10.868019 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1489 11:46:10.877436 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1490 11:46:10.887667 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1491 11:46:10.897890 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1492 11:46:10.907863 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1493 11:46:10.917657 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1494 11:46:10.927525 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1495 11:46:10.934282 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1496 11:46:10.944419 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1497 11:46:10.954578 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1498 11:46:10.963976 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1499 11:46:10.974041 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1500 11:46:10.984226 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1501 11:46:10.994079 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1502 11:46:10.994146 PCI: 00:02.0
1503 11:46:11.004061 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1504 11:46:11.014122 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1505 11:46:11.024124 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1506 11:46:11.026983 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1507 11:46:11.037465 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1508 11:46:11.041354 GENERIC: 0.0
1509 11:46:11.044156 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1510 11:46:11.053906 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1511 11:46:11.063620 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1512 11:46:11.073776 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1513 11:46:11.073850 PCI: 01:00.0
1514 11:46:11.084084 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1515 11:46:11.093578 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1516 11:46:11.097432 PCI: 00:08.0
1517 11:46:11.097508 PCI: 00:0a.0
1518 11:46:11.107070 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1519 11:46:11.110044 PCI: 00:0d.0 child on link 0 USB0 port 0
1520 11:46:11.120272 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1521 11:46:11.126852 USB0 port 0 child on link 0 USB3 port 0
1522 11:46:11.126926 USB3 port 0
1523 11:46:11.130226 USB3 port 1
1524 11:46:11.130298 USB3 port 2
1525 11:46:11.134142 USB3 port 3
1526 11:46:11.136997 PCI: 00:14.0 child on link 0 USB0 port 0
1527 11:46:11.146764 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1528 11:46:11.153720 USB0 port 0 child on link 0 USB2 port 0
1529 11:46:11.153795 USB2 port 0
1530 11:46:11.156742 USB2 port 1
1531 11:46:11.156815 USB2 port 2
1532 11:46:11.160292 USB2 port 3
1533 11:46:11.160381 USB2 port 4
1534 11:46:11.163524 USB2 port 5
1535 11:46:11.163586 USB2 port 6
1536 11:46:11.166805 USB2 port 7
1537 11:46:11.166868 USB2 port 8
1538 11:46:11.169954 USB2 port 9
1539 11:46:11.170015 USB3 port 0
1540 11:46:11.173325 USB3 port 1
1541 11:46:11.173380 USB3 port 2
1542 11:46:11.176696 USB3 port 3
1543 11:46:11.176749 PCI: 00:14.2
1544 11:46:11.186734 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1545 11:46:11.196944 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1546 11:46:11.203563 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1547 11:46:11.213338 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1548 11:46:11.213394 GENERIC: 0.0
1549 11:46:11.219739 PCI: 00:15.0 child on link 0 I2C: 00:1a
1550 11:46:11.229880 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1551 11:46:11.229936 I2C: 00:1a
1552 11:46:11.233642 I2C: 00:31
1553 11:46:11.233698 I2C: 00:32
1554 11:46:11.236933 PCI: 00:15.1 child on link 0 I2C: 00:50
1555 11:46:11.246394 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1556 11:46:11.249821 I2C: 00:50
1557 11:46:11.249879 PCI: 00:15.2
1558 11:46:11.256333 PCI: 00:15.3 child on link 0 I2C: 00:10
1559 11:46:11.266495 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1560 11:46:11.266564 I2C: 00:10
1561 11:46:11.269799 PCI: 00:16.0
1562 11:46:11.279608 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1563 11:46:11.279683 PCI: 00:19.0
1564 11:46:11.282918 PCI: 00:19.1 child on link 0 I2C: 00:15
1565 11:46:11.293422 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1566 11:46:11.296280 I2C: 00:15
1567 11:46:11.296337 I2C: 00:2c
1568 11:46:11.299842 PCI: 00:1e.0
1569 11:46:11.309667 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1570 11:46:11.312865 PCI: 00:1e.3 child on link 0 SPI: 00
1571 11:46:11.323165 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1572 11:46:11.326401 SPI: 00
1573 11:46:11.329321 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1574 11:46:11.339797 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1575 11:46:11.339856 PNP: 0c09.0
1576 11:46:11.349796 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1577 11:46:11.352949 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1578 11:46:11.363237 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1579 11:46:11.372724 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1580 11:46:11.376533 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1581 11:46:11.379763 GENERIC: 0.0
1582 11:46:11.379818 GENERIC: 1.0
1583 11:46:11.382709 PCI: 00:1f.3
1584 11:46:11.392891 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1585 11:46:11.402992 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1586 11:46:11.403074 PCI: 00:1f.5
1587 11:46:11.412660 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1588 11:46:11.419619 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1589 11:46:11.426010 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1590 11:46:11.432610 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1591 11:46:11.439466 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1592 11:46:11.442716 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1593 11:46:11.445970 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1594 11:46:11.452982 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1595 11:46:11.459530 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1596 11:46:11.469621 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1597 11:46:11.475945 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1598 11:46:11.483138 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1599 11:46:11.489542 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1600 11:46:11.496204 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1601 11:46:11.505827 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1602 11:46:11.509323 DOMAIN: 0000: Resource ranges:
1603 11:46:11.512510 * Base: 1000, Size: 800, Tag: 100
1604 11:46:11.515847 * Base: 1900, Size: e700, Tag: 100
1605 11:46:11.519435 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1606 11:46:11.525975 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1607 11:46:11.535984 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1608 11:46:11.542245 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1609 11:46:11.549090 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1610 11:46:11.555429 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1611 11:46:11.565618 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1612 11:46:11.572328 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1613 11:46:11.578920 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1614 11:46:11.588851 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1615 11:46:11.595171 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1616 11:46:11.601690 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1617 11:46:11.612065 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1618 11:46:11.618581 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1619 11:46:11.625541 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1620 11:46:11.635470 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1621 11:46:11.641996 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1622 11:46:11.648862 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1623 11:46:11.658361 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1624 11:46:11.665376 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1625 11:46:11.671738 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1626 11:46:11.681567 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1627 11:46:11.688429 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1628 11:46:11.694787 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1629 11:46:11.704857 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1630 11:46:11.711743 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1631 11:46:11.718111 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1632 11:46:11.728040 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1633 11:46:11.734586 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1634 11:46:11.741847 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1635 11:46:11.751732 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1636 11:46:11.758489 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1637 11:46:11.764608 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1638 11:46:11.768094 DOMAIN: 0000: Resource ranges:
1639 11:46:11.774589 * Base: 80400000, Size: 3fc00000, Tag: 200
1640 11:46:11.778011 * Base: d0000000, Size: 28000000, Tag: 200
1641 11:46:11.781341 * Base: fa000000, Size: 1000000, Tag: 200
1642 11:46:11.784672 * Base: fb001000, Size: 17ff000, Tag: 200
1643 11:46:11.791137 * Base: fe800000, Size: 300000, Tag: 200
1644 11:46:11.794659 * Base: feb80000, Size: 80000, Tag: 200
1645 11:46:11.797726 * Base: fed00000, Size: 40000, Tag: 200
1646 11:46:11.801394 * Base: fed70000, Size: 10000, Tag: 200
1647 11:46:11.807799 * Base: fed88000, Size: 8000, Tag: 200
1648 11:46:11.811379 * Base: fed93000, Size: d000, Tag: 200
1649 11:46:11.814729 * Base: feda2000, Size: 1e000, Tag: 200
1650 11:46:11.817682 * Base: fede0000, Size: 1220000, Tag: 200
1651 11:46:11.824371 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1652 11:46:11.831067 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1653 11:46:11.837694 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1654 11:46:11.844673 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1655 11:46:11.851097 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1656 11:46:11.857752 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1657 11:46:11.864360 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1658 11:46:11.871059 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1659 11:46:11.877671 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1660 11:46:11.884500 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1661 11:46:11.891249 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1662 11:46:11.897607 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1663 11:46:11.904136 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1664 11:46:11.910682 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1665 11:46:11.918086 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1666 11:46:11.924154 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1667 11:46:11.930578 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1668 11:46:11.937433 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1669 11:46:11.943942 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1670 11:46:11.950642 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1671 11:46:11.956919 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1672 11:46:11.966918 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1673 11:46:11.970399 PCI: 00:06.0: Resource ranges:
1674 11:46:11.973637 * Base: 80400000, Size: 100000, Tag: 200
1675 11:46:11.980303 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1676 11:46:11.986729 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1677 11:46:11.993496 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1678 11:46:12.003544 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1679 11:46:12.006577 Root Device assign_resources, bus 0 link: 0
1680 11:46:12.010183 DOMAIN: 0000 assign_resources, bus 0 link: 0
1681 11:46:12.019791 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1682 11:46:12.026913 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1683 11:46:12.033682 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1684 11:46:12.043489 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1685 11:46:12.046879 PCI: 00:04.0 assign_resources, bus 1 link: 0
1686 11:46:12.053407 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1687 11:46:12.060327 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1688 11:46:12.069889 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1689 11:46:12.079596 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1690 11:46:12.083010 PCI: 00:06.0 assign_resources, bus 1 link: 0
1691 11:46:12.092971 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1692 11:46:12.099590 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1693 11:46:12.106311 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1694 11:46:12.112867 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1695 11:46:12.119526 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1696 11:46:12.126238 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1697 11:46:12.129547 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1698 11:46:12.139270 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1699 11:46:12.142678 PCI: 00:14.0 assign_resources, bus 0 link: 0
1700 11:46:12.146440 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1701 11:46:12.155966 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1702 11:46:12.162671 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1703 11:46:12.172648 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1704 11:46:12.175839 PCI: 00:14.3 assign_resources, bus 0 link: 0
1705 11:46:12.182618 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1706 11:46:12.188892 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1707 11:46:12.192536 PCI: 00:15.0 assign_resources, bus 0 link: 0
1708 11:46:12.199427 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1709 11:46:12.205479 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1710 11:46:12.212303 PCI: 00:15.1 assign_resources, bus 0 link: 0
1711 11:46:12.216096 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1712 11:46:12.225852 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1713 11:46:12.228934 PCI: 00:15.3 assign_resources, bus 0 link: 0
1714 11:46:12.232268 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1715 11:46:12.242673 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1716 11:46:12.249070 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1717 11:46:12.255878 PCI: 00:19.1 assign_resources, bus 0 link: 0
1718 11:46:12.258937 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1719 11:46:12.268879 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1720 11:46:12.272383 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1721 11:46:12.275298 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1722 11:46:12.282261 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1723 11:46:12.285310 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1724 11:46:12.292166 LPC: Trying to open IO window from 800 size 1ff
1725 11:46:12.298868 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1726 11:46:12.308701 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1727 11:46:12.315528 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1728 11:46:12.318599 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1729 11:46:12.325322 Root Device assign_resources, bus 0 link: 0 done
1730 11:46:12.328470 Done setting resources.
1731 11:46:12.335045 Show resources in subtree (Root Device)...After assigning values.
1732 11:46:12.338648 Root Device child on link 0 CPU_CLUSTER: 0
1733 11:46:12.341813 CPU_CLUSTER: 0 child on link 0 APIC: 00
1734 11:46:12.345097 APIC: 00
1735 11:46:12.345153 APIC: 16
1736 11:46:12.345199 APIC: 10
1737 11:46:12.348588 APIC: 12
1738 11:46:12.348646 APIC: 14
1739 11:46:12.348692 APIC: 01
1740 11:46:12.352488 APIC: 08
1741 11:46:12.352545 APIC: 09
1742 11:46:12.355366 DOMAIN: 0000 child on link 0 GPIO: 0
1743 11:46:12.365009 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1744 11:46:12.375119 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1745 11:46:12.378563 GPIO: 0
1746 11:46:12.378625 PCI: 00:00.0
1747 11:46:12.388558 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1748 11:46:12.398191 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1749 11:46:12.404980 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1750 11:46:12.414686 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1751 11:46:12.425060 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1752 11:46:12.434501 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1753 11:46:12.444415 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1754 11:46:12.454649 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1755 11:46:12.464577 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1756 11:46:12.474439 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1757 11:46:12.481241 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1758 11:46:12.491159 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1759 11:46:12.501406 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1760 11:46:12.510932 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1761 11:46:12.521042 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1762 11:46:12.527920 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1763 11:46:12.537935 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1764 11:46:12.547565 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1765 11:46:12.557428 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1766 11:46:12.567472 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1767 11:46:12.577329 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1768 11:46:12.587158 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1769 11:46:12.597293 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1770 11:46:12.607568 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1771 11:46:12.617129 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1772 11:46:12.623994 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1773 11:46:12.633777 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1774 11:46:12.643636 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1775 11:46:12.647235 PCI: 00:02.0
1776 11:46:12.656983 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1777 11:46:12.667165 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1778 11:46:12.676851 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1779 11:46:12.680384 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1780 11:46:12.690222 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1781 11:46:12.693519 GENERIC: 0.0
1782 11:46:12.697023 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1783 11:46:12.706863 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1784 11:46:12.716957 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1785 11:46:12.729757 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1786 11:46:12.729818 PCI: 01:00.0
1787 11:46:12.740160 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1788 11:46:12.750080 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1789 11:46:12.753114 PCI: 00:08.0
1790 11:46:12.753181 PCI: 00:0a.0
1791 11:46:12.762941 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1792 11:46:12.770033 PCI: 00:0d.0 child on link 0 USB0 port 0
1793 11:46:12.780008 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1794 11:46:12.782817 USB0 port 0 child on link 0 USB3 port 0
1795 11:46:12.786810 USB3 port 0
1796 11:46:12.786870 USB3 port 1
1797 11:46:12.790121 USB3 port 2
1798 11:46:12.790182 USB3 port 3
1799 11:46:12.796840 PCI: 00:14.0 child on link 0 USB0 port 0
1800 11:46:12.806988 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1801 11:46:12.809877 USB0 port 0 child on link 0 USB2 port 0
1802 11:46:12.812992 USB2 port 0
1803 11:46:12.813061 USB2 port 1
1804 11:46:12.816620 USB2 port 2
1805 11:46:12.816699 USB2 port 3
1806 11:46:12.819755 USB2 port 4
1807 11:46:12.819818 USB2 port 5
1808 11:46:12.823316 USB2 port 6
1809 11:46:12.823378 USB2 port 7
1810 11:46:12.826246 USB2 port 8
1811 11:46:12.826309 USB2 port 9
1812 11:46:12.829791 USB3 port 0
1813 11:46:12.833093 USB3 port 1
1814 11:46:12.833150 USB3 port 2
1815 11:46:12.836741 USB3 port 3
1816 11:46:12.836809 PCI: 00:14.2
1817 11:46:12.846413 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1818 11:46:12.856074 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1819 11:46:12.862909 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1820 11:46:12.873041 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1821 11:46:12.873120 GENERIC: 0.0
1822 11:46:12.879328 PCI: 00:15.0 child on link 0 I2C: 00:1a
1823 11:46:12.889373 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1824 11:46:12.889458 I2C: 00:1a
1825 11:46:12.892776 I2C: 00:31
1826 11:46:12.892850 I2C: 00:32
1827 11:46:12.899075 PCI: 00:15.1 child on link 0 I2C: 00:50
1828 11:46:12.909195 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1829 11:46:12.909275 I2C: 00:50
1830 11:46:12.912540 PCI: 00:15.2
1831 11:46:12.916021 PCI: 00:15.3 child on link 0 I2C: 00:10
1832 11:46:12.925886 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1833 11:46:12.929103 I2C: 00:10
1834 11:46:12.929176 PCI: 00:16.0
1835 11:46:12.938977 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1836 11:46:12.942211 PCI: 00:19.0
1837 11:46:12.945914 PCI: 00:19.1 child on link 0 I2C: 00:15
1838 11:46:12.955760 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1839 11:46:12.958934 I2C: 00:15
1840 11:46:12.959011 I2C: 00:2c
1841 11:46:12.959062 PCI: 00:1e.0
1842 11:46:12.972213 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1843 11:46:12.975413 PCI: 00:1e.3 child on link 0 SPI: 00
1844 11:46:12.985346 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1845 11:46:12.988706 SPI: 00
1846 11:46:12.992510 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1847 11:46:12.998822 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1848 11:46:13.001803 PNP: 0c09.0
1849 11:46:13.012099 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1850 11:46:13.015320 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1851 11:46:13.025114 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1852 11:46:13.035349 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1853 11:46:13.038320 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1854 11:46:13.041821 GENERIC: 0.0
1855 11:46:13.041894 GENERIC: 1.0
1856 11:46:13.045089 PCI: 00:1f.3
1857 11:46:13.054908 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1858 11:46:13.065598 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1859 11:46:13.065683 PCI: 00:1f.5
1860 11:46:13.078399 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1861 11:46:13.078478 Done allocating resources.
1862 11:46:13.084784 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1863 11:46:13.091618 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1864 11:46:13.094692 Configure audio over I2S with MAX98373 NAU88L25B.
1865 11:46:13.100452 Enabling BT offload
1866 11:46:13.107911 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1867 11:46:13.110879 Enabling resources...
1868 11:46:13.115022 PCI: 00:00.0 subsystem <- 8086/4609
1869 11:46:13.117898 PCI: 00:00.0 cmd <- 06
1870 11:46:13.121338 PCI: 00:02.0 subsystem <- 8086/46b3
1871 11:46:13.124192 PCI: 00:02.0 cmd <- 03
1872 11:46:13.127925 PCI: 00:04.0 subsystem <- 8086/461d
1873 11:46:13.127999 PCI: 00:04.0 cmd <- 02
1874 11:46:13.131193 PCI: 00:06.0 bridge ctrl <- 0013
1875 11:46:13.134427 PCI: 00:06.0 subsystem <- 8086/464d
1876 11:46:13.137725 PCI: 00:06.0 cmd <- 106
1877 11:46:13.141171 PCI: 00:0a.0 subsystem <- 8086/467d
1878 11:46:13.144479 PCI: 00:0a.0 cmd <- 02
1879 11:46:13.147475 PCI: 00:0d.0 subsystem <- 8086/461e
1880 11:46:13.150841 PCI: 00:0d.0 cmd <- 02
1881 11:46:13.154267 PCI: 00:14.0 subsystem <- 8086/51ed
1882 11:46:13.157611 PCI: 00:14.0 cmd <- 02
1883 11:46:13.161185 PCI: 00:14.2 subsystem <- 8086/51ef
1884 11:46:13.161259 PCI: 00:14.2 cmd <- 02
1885 11:46:13.167281 PCI: 00:14.3 subsystem <- 8086/51f0
1886 11:46:13.167349 PCI: 00:14.3 cmd <- 02
1887 11:46:13.170930 PCI: 00:15.0 subsystem <- 8086/51e8
1888 11:46:13.174117 PCI: 00:15.0 cmd <- 02
1889 11:46:13.177114 PCI: 00:15.1 subsystem <- 8086/51e9
1890 11:46:13.181076 PCI: 00:15.1 cmd <- 06
1891 11:46:13.184070 PCI: 00:15.3 subsystem <- 8086/51eb
1892 11:46:13.187187 PCI: 00:15.3 cmd <- 02
1893 11:46:13.190722 PCI: 00:16.0 subsystem <- 8086/51e0
1894 11:46:13.190774 PCI: 00:16.0 cmd <- 02
1895 11:46:13.197175 PCI: 00:19.1 subsystem <- 8086/51c6
1896 11:46:13.197250 PCI: 00:19.1 cmd <- 02
1897 11:46:13.200883 PCI: 00:1e.0 subsystem <- 8086/51a8
1898 11:46:13.204046 PCI: 00:1e.0 cmd <- 06
1899 11:46:13.207039 PCI: 00:1e.3 subsystem <- 8086/51ab
1900 11:46:13.210893 PCI: 00:1e.3 cmd <- 02
1901 11:46:13.213812 PCI: 00:1f.0 subsystem <- 8086/5182
1902 11:46:13.217375 PCI: 00:1f.0 cmd <- 407
1903 11:46:13.221076 PCI: 00:1f.3 subsystem <- 8086/51c8
1904 11:46:13.221154 PCI: 00:1f.3 cmd <- 02
1905 11:46:13.227198 PCI: 00:1f.5 subsystem <- 8086/51a4
1906 11:46:13.227273 PCI: 00:1f.5 cmd <- 406
1907 11:46:13.230716 PCI: 01:00.0 cmd <- 02
1908 11:46:13.230789 done.
1909 11:46:13.237301 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1910 11:46:13.240480 ME: Version: Unavailable
1911 11:46:13.244069 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1912 11:46:13.247289 Initializing devices...
1913 11:46:13.250910 Root Device init
1914 11:46:13.250983 mainboard: EC init
1915 11:46:13.257654 Chrome EC: Set SMI mask to 0x0000000000000000
1916 11:46:13.257728 Chrome EC: UHEPI supported
1917 11:46:13.265565 Chrome EC: clear events_b mask to 0x0000000000000000
1918 11:46:13.271574 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1919 11:46:13.278210 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1920 11:46:13.284813 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1921 11:46:13.291691 Chrome EC: Set WAKE mask to 0x0000000000000000
1922 11:46:13.295041 Root Device init finished in 42 msecs
1923 11:46:13.298317 PCI: 00:00.0 init
1924 11:46:13.301484 CPU TDP = 15 Watts
1925 11:46:13.301538 CPU PL1 = 15 Watts
1926 11:46:13.304531 CPU PL2 = 55 Watts
1927 11:46:13.304605 CPU PL4 = 123 Watts
1928 11:46:13.311099 PCI: 00:00.0 init finished in 8 msecs
1929 11:46:13.311174 PCI: 00:02.0 init
1930 11:46:13.314748 GMA: Found VBT in CBFS
1931 11:46:13.317864 GMA: Found valid VBT in CBFS
1932 11:46:13.324654 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1933 11:46:13.331084 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1934 11:46:13.334603 PCI: 00:02.0 init finished in 18 msecs
1935 11:46:13.337841 PCI: 00:06.0 init
1936 11:46:13.337914 Initializing PCH PCIe bridge.
1937 11:46:13.344576 PCI: 00:06.0 init finished in 3 msecs
1938 11:46:13.344650 PCI: 00:0a.0 init
1939 11:46:13.348051 PCI: 00:0a.0 init finished in 0 msecs
1940 11:46:13.351505 PCI: 00:14.0 init
1941 11:46:13.354523 PCI: 00:14.0 init finished in 0 msecs
1942 11:46:13.357830 PCI: 00:14.2 init
1943 11:46:13.361165 PCI: 00:14.2 init finished in 0 msecs
1944 11:46:13.361226 PCI: 00:15.0 init
1945 11:46:13.364601 I2C bus 0 version 0x3230302a
1946 11:46:13.367987 DW I2C bus 0 at 0x80655000 (400 KHz)
1947 11:46:13.371240 PCI: 00:15.0 init finished in 6 msecs
1948 11:46:13.374600 PCI: 00:15.1 init
1949 11:46:13.378320 I2C bus 1 version 0x3230302a
1950 11:46:13.380739 DW I2C bus 1 at 0x80656000 (400 KHz)
1951 11:46:13.384255 PCI: 00:15.1 init finished in 6 msecs
1952 11:46:13.387808 PCI: 00:15.3 init
1953 11:46:13.390774 I2C bus 3 version 0x3230302a
1954 11:46:13.394382 DW I2C bus 3 at 0x80657000 (400 KHz)
1955 11:46:13.397588 PCI: 00:15.3 init finished in 6 msecs
1956 11:46:13.397665 PCI: 00:16.0 init
1957 11:46:13.404479 PCI: 00:16.0 init finished in 0 msecs
1958 11:46:13.404557 PCI: 00:19.1 init
1959 11:46:13.407567 I2C bus 5 version 0x3230302a
1960 11:46:13.410974 DW I2C bus 5 at 0x80659000 (400 KHz)
1961 11:46:13.414421 PCI: 00:19.1 init finished in 6 msecs
1962 11:46:13.417459 PCI: 00:1f.0 init
1963 11:46:13.420802 IOAPIC: Initializing IOAPIC at 0xfec00000
1964 11:46:13.424605 IOAPIC: ID = 0x02
1965 11:46:13.427407 IOAPIC: Dumping registers
1966 11:46:13.427481 reg 0x0000: 0x02000000
1967 11:46:13.430786 reg 0x0001: 0x00770020
1968 11:46:13.434540 reg 0x0002: 0x00000000
1969 11:46:13.437578 IOAPIC: 120 interrupts
1970 11:46:13.440737 IOAPIC: Clearing IOAPIC at 0xfec00000
1971 11:46:13.444402 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1972 11:46:13.450866 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1973 11:46:13.454094 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1974 11:46:13.457465 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1975 11:46:13.464299 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1976 11:46:13.467671 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1977 11:46:13.473917 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1978 11:46:13.477875 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1979 11:46:13.484450 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1980 11:46:13.487178 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1981 11:46:13.493951 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1982 11:46:13.497549 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1983 11:46:13.500815 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1984 11:46:13.507578 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1985 11:46:13.510539 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1986 11:46:13.517523 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1987 11:46:13.520638 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1988 11:46:13.527570 IOAPIC: vector 0x11 value 0x00000000 0x00010000
1989 11:46:13.530496 IOAPIC: vector 0x12 value 0x00000000 0x00010000
1990 11:46:13.534021 IOAPIC: vector 0x13 value 0x00000000 0x00010000
1991 11:46:13.540577 IOAPIC: vector 0x14 value 0x00000000 0x00010000
1992 11:46:13.544013 IOAPIC: vector 0x15 value 0x00000000 0x00010000
1993 11:46:13.550619 IOAPIC: vector 0x16 value 0x00000000 0x00010000
1994 11:46:13.554082 IOAPIC: vector 0x17 value 0x00000000 0x00010000
1995 11:46:13.560822 IOAPIC: vector 0x18 value 0x00000000 0x00010000
1996 11:46:13.563990 IOAPIC: vector 0x19 value 0x00000000 0x00010000
1997 11:46:13.570418 IOAPIC: vector 0x1a value 0x00000000 0x00010000
1998 11:46:13.573608 IOAPIC: vector 0x1b value 0x00000000 0x00010000
1999 11:46:13.576901 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2000 11:46:13.583823 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2001 11:46:13.587176 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2002 11:46:13.593861 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2003 11:46:13.597014 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2004 11:46:13.603931 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2005 11:46:13.607068 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2006 11:46:13.613777 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2007 11:46:13.617268 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2008 11:46:13.620503 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2009 11:46:13.627015 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2010 11:46:13.630741 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2011 11:46:13.637202 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2012 11:46:13.640827 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2013 11:46:13.647479 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2014 11:46:13.650565 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2015 11:46:13.654091 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2016 11:46:13.660158 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2017 11:46:13.663708 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2018 11:46:13.670185 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2019 11:46:13.673824 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2020 11:46:13.680287 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2021 11:46:13.683631 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2022 11:46:13.690610 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2023 11:46:13.693843 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2024 11:46:13.697082 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2025 11:46:13.703365 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2026 11:46:13.706679 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2027 11:46:13.713785 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2028 11:46:13.716829 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2029 11:46:13.723223 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2030 11:46:13.726496 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2031 11:46:13.733533 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2032 11:46:13.736701 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2033 11:46:13.739869 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2034 11:46:13.746634 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2035 11:46:13.750876 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2036 11:46:13.756719 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2037 11:46:13.759739 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2038 11:46:13.766651 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2039 11:46:13.769990 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2040 11:46:13.776716 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2041 11:46:13.779881 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2042 11:46:13.783403 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2043 11:46:13.790364 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2044 11:46:13.793685 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2045 11:46:13.800193 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2046 11:46:13.803237 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2047 11:46:13.810276 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2048 11:46:13.813435 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2049 11:46:13.820313 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2050 11:46:13.823805 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2051 11:46:13.826656 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2052 11:46:13.833673 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2053 11:46:13.837086 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2054 11:46:13.843421 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2055 11:46:13.847011 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2056 11:46:13.853895 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2057 11:46:13.856509 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2058 11:46:13.863097 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2059 11:46:13.866372 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2060 11:46:13.870269 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2061 11:46:13.876481 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2062 11:46:13.879760 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2063 11:46:13.886600 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2064 11:46:13.889931 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2065 11:46:13.896586 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2066 11:46:13.899746 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2067 11:46:13.903113 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2068 11:46:13.910448 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2069 11:46:13.913657 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2070 11:46:13.920169 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2071 11:46:13.923345 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2072 11:46:13.929782 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2073 11:46:13.933344 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2074 11:46:13.939509 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2075 11:46:13.943224 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2076 11:46:13.946651 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2077 11:46:13.953098 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2078 11:46:13.956417 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2079 11:46:13.963069 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2080 11:46:13.966775 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2081 11:46:13.973206 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2082 11:46:13.976308 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2083 11:46:13.982852 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2084 11:46:13.986932 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2085 11:46:13.989895 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2086 11:46:13.996281 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2087 11:46:13.999551 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2088 11:46:14.006463 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2089 11:46:14.009686 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2090 11:46:14.016475 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2091 11:46:14.019267 IOAPIC: Bootstrap Processor Local APIC = 0x00
2092 11:46:14.023003 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2093 11:46:14.029995 PCI: 00:1f.0 init finished in 607 msecs
2094 11:46:14.030462 PCI: 00:1f.2 init
2095 11:46:14.032955 apm_control: Disabling ACPI.
2096 11:46:14.038071 APMC done.
2097 11:46:14.041021 PCI: 00:1f.2 init finished in 6 msecs
2098 11:46:14.044507 PCI: 00:1f.3 init
2099 11:46:14.047496 PCI: 00:1f.3 init finished in 0 msecs
2100 11:46:14.047995 PCI: 01:00.0 init
2101 11:46:14.051030 PCI: 01:00.0 init finished in 0 msecs
2102 11:46:14.054465 PNP: 0c09.0 init
2103 11:46:14.057831 Google Chrome EC uptime: 12.294 seconds
2104 11:46:14.063881 Google Chrome AP resets since EC boot: 1
2105 11:46:14.067561 Google Chrome most recent AP reset causes:
2106 11:46:14.071089 0.341: 32775 shutdown: entering G3
2107 11:46:14.077705 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2108 11:46:14.081021 PNP: 0c09.0 init finished in 23 msecs
2109 11:46:14.084016 GENERIC: 0.0 init
2110 11:46:14.087344 GENERIC: 0.0 init finished in 0 msecs
2111 11:46:14.087844 GENERIC: 1.0 init
2112 11:46:14.094263 GENERIC: 1.0 init finished in 0 msecs
2113 11:46:14.094667 Devices initialized
2114 11:46:14.097636 Show all devs... After init.
2115 11:46:14.101285 Root Device: enabled 1
2116 11:46:14.103976 CPU_CLUSTER: 0: enabled 1
2117 11:46:14.104320 DOMAIN: 0000: enabled 1
2118 11:46:14.107190 GPIO: 0: enabled 1
2119 11:46:14.110831 PCI: 00:00.0: enabled 1
2120 11:46:14.111269 PCI: 00:01.0: enabled 0
2121 11:46:14.114274 PCI: 00:01.1: enabled 0
2122 11:46:14.117777 PCI: 00:02.0: enabled 1
2123 11:46:14.121172 PCI: 00:04.0: enabled 1
2124 11:46:14.121534 PCI: 00:05.0: enabled 0
2125 11:46:14.124077 PCI: 00:06.0: enabled 1
2126 11:46:14.127383 PCI: 00:06.2: enabled 0
2127 11:46:14.127847 PCI: 00:07.0: enabled 0
2128 11:46:14.131031 PCI: 00:07.1: enabled 0
2129 11:46:14.133900 PCI: 00:07.2: enabled 0
2130 11:46:14.137493 PCI: 00:07.3: enabled 0
2131 11:46:14.137833 PCI: 00:08.0: enabled 0
2132 11:46:14.141081 PCI: 00:09.0: enabled 0
2133 11:46:14.144363 PCI: 00:0a.0: enabled 1
2134 11:46:14.147415 PCI: 00:0d.0: enabled 1
2135 11:46:14.147922 PCI: 00:0d.1: enabled 0
2136 11:46:14.150810 PCI: 00:0d.2: enabled 0
2137 11:46:14.153836 PCI: 00:0d.3: enabled 0
2138 11:46:14.157332 PCI: 00:0e.0: enabled 0
2139 11:46:14.157803 PCI: 00:10.0: enabled 0
2140 11:46:14.161015 PCI: 00:10.1: enabled 0
2141 11:46:14.163821 PCI: 00:10.6: enabled 0
2142 11:46:14.164138 PCI: 00:10.7: enabled 0
2143 11:46:14.167648 PCI: 00:12.0: enabled 0
2144 11:46:14.170747 PCI: 00:12.6: enabled 0
2145 11:46:14.174061 PCI: 00:12.7: enabled 0
2146 11:46:14.174425 PCI: 00:13.0: enabled 0
2147 11:46:14.177494 PCI: 00:14.0: enabled 1
2148 11:46:14.180411 PCI: 00:14.1: enabled 0
2149 11:46:14.184297 PCI: 00:14.2: enabled 1
2150 11:46:14.184753 PCI: 00:14.3: enabled 1
2151 11:46:14.187451 PCI: 00:15.0: enabled 1
2152 11:46:14.190538 PCI: 00:15.1: enabled 1
2153 11:46:14.193663 PCI: 00:15.2: enabled 0
2154 11:46:14.194004 PCI: 00:15.3: enabled 1
2155 11:46:14.197596 PCI: 00:16.0: enabled 1
2156 11:46:14.200754 PCI: 00:16.1: enabled 0
2157 11:46:14.203504 PCI: 00:16.2: enabled 0
2158 11:46:14.203874 PCI: 00:16.3: enabled 0
2159 11:46:14.207155 PCI: 00:16.4: enabled 0
2160 11:46:14.211069 PCI: 00:16.5: enabled 0
2161 11:46:14.211498 PCI: 00:17.0: enabled 0
2162 11:46:14.214090 PCI: 00:19.0: enabled 0
2163 11:46:14.217100 PCI: 00:19.1: enabled 1
2164 11:46:14.220285 PCI: 00:19.2: enabled 0
2165 11:46:14.220665 PCI: 00:1a.0: enabled 0
2166 11:46:14.223266 PCI: 00:1c.0: enabled 0
2167 11:46:14.227007 PCI: 00:1c.1: enabled 0
2168 11:46:14.230338 PCI: 00:1c.2: enabled 0
2169 11:46:14.230855 PCI: 00:1c.3: enabled 0
2170 11:46:14.234111 PCI: 00:1c.4: enabled 0
2171 11:46:14.236777 PCI: 00:1c.5: enabled 0
2172 11:46:14.240398 PCI: 00:1c.6: enabled 0
2173 11:46:14.240739 PCI: 00:1c.7: enabled 0
2174 11:46:14.243461 PCI: 00:1d.0: enabled 0
2175 11:46:14.247412 PCI: 00:1d.1: enabled 0
2176 11:46:14.247784 PCI: 00:1d.2: enabled 0
2177 11:46:14.250696 PCI: 00:1d.3: enabled 0
2178 11:46:14.253801 PCI: 00:1e.0: enabled 1
2179 11:46:14.257043 PCI: 00:1e.1: enabled 0
2180 11:46:14.257515 PCI: 00:1e.2: enabled 0
2181 11:46:14.260255 PCI: 00:1e.3: enabled 1
2182 11:46:14.263469 PCI: 00:1f.0: enabled 1
2183 11:46:14.267031 PCI: 00:1f.1: enabled 0
2184 11:46:14.267481 PCI: 00:1f.2: enabled 1
2185 11:46:14.270012 PCI: 00:1f.3: enabled 1
2186 11:46:14.273351 PCI: 00:1f.4: enabled 0
2187 11:46:14.277114 PCI: 00:1f.5: enabled 1
2188 11:46:14.277578 PCI: 00:1f.6: enabled 0
2189 11:46:14.280736 PCI: 00:1f.7: enabled 0
2190 11:46:14.283433 GENERIC: 0.0: enabled 1
2191 11:46:14.286939 GENERIC: 0.0: enabled 1
2192 11:46:14.287396 GENERIC: 1.0: enabled 1
2193 11:46:14.290408 GENERIC: 0.0: enabled 1
2194 11:46:14.293442 GENERIC: 1.0: enabled 1
2195 11:46:14.293791 USB0 port 0: enabled 1
2196 11:46:14.296983 USB0 port 0: enabled 1
2197 11:46:14.300122 GENERIC: 0.0: enabled 1
2198 11:46:14.303349 I2C: 00:1a: enabled 1
2199 11:46:14.303711 I2C: 00:31: enabled 1
2200 11:46:14.306509 I2C: 00:32: enabled 1
2201 11:46:14.310196 I2C: 00:50: enabled 1
2202 11:46:14.310636 I2C: 00:10: enabled 1
2203 11:46:14.313579 I2C: 00:15: enabled 1
2204 11:46:14.316457 I2C: 00:2c: enabled 1
2205 11:46:14.316806 GENERIC: 0.0: enabled 1
2206 11:46:14.319687 SPI: 00: enabled 1
2207 11:46:14.323311 PNP: 0c09.0: enabled 1
2208 11:46:14.323794 GENERIC: 0.0: enabled 1
2209 11:46:14.326738 USB3 port 0: enabled 1
2210 11:46:14.329856 USB3 port 1: enabled 0
2211 11:46:14.333375 USB3 port 2: enabled 1
2212 11:46:14.333714 USB3 port 3: enabled 0
2213 11:46:14.336870 USB2 port 0: enabled 1
2214 11:46:14.340383 USB2 port 1: enabled 0
2215 11:46:14.340732 USB2 port 2: enabled 1
2216 11:46:14.343002 USB2 port 3: enabled 0
2217 11:46:14.346343 USB2 port 4: enabled 0
2218 11:46:14.346416 USB2 port 5: enabled 1
2219 11:46:14.349980 USB2 port 6: enabled 0
2220 11:46:14.352962 USB2 port 7: enabled 0
2221 11:46:14.356605 USB2 port 8: enabled 1
2222 11:46:14.356677 USB2 port 9: enabled 1
2223 11:46:14.360150 USB3 port 0: enabled 1
2224 11:46:14.362828 USB3 port 1: enabled 0
2225 11:46:14.363181 USB3 port 2: enabled 0
2226 11:46:14.366106 USB3 port 3: enabled 0
2227 11:46:14.369692 GENERIC: 0.0: enabled 1
2228 11:46:14.372884 GENERIC: 1.0: enabled 1
2229 11:46:14.373238 APIC: 00: enabled 1
2230 11:46:14.376334 APIC: 16: enabled 1
2231 11:46:14.376697 APIC: 10: enabled 1
2232 11:46:14.379522 APIC: 12: enabled 1
2233 11:46:14.383027 APIC: 14: enabled 1
2234 11:46:14.383474 APIC: 01: enabled 1
2235 11:46:14.386328 APIC: 08: enabled 1
2236 11:46:14.389341 APIC: 09: enabled 1
2237 11:46:14.389693 PCI: 01:00.0: enabled 1
2238 11:46:14.396204 BS: BS_DEV_INIT run times (exec / console): 12 / 1133 ms
2239 11:46:14.402683 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2240 11:46:14.406030 ELOG: NV offset 0xf20000 size 0x4000
2241 11:46:14.412686 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2242 11:46:14.419714 ELOG: Event(17) added with size 13 at 2024-04-05 11:46:14 UTC
2243 11:46:14.425965 ELOG: Event(9E) added with size 10 at 2024-04-05 11:46:14 UTC
2244 11:46:14.432454 ELOG: Event(9F) added with size 14 at 2024-04-05 11:46:14 UTC
2245 11:46:14.439383 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2246 11:46:14.445394 ELOG: Event(A0) added with size 9 at 2024-04-05 11:46:14 UTC
2247 11:46:14.449671 elog_add_boot_reason: Logged dev mode boot
2248 11:46:14.455281 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2249 11:46:14.455700 Finalize devices...
2250 11:46:14.459071 PCI: 00:16.0 final
2251 11:46:14.459534 PCI: 00:1f.2 final
2252 11:46:14.462237 GENERIC: 0.0 final
2253 11:46:14.468909 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2254 11:46:14.469383 GENERIC: 1.0 final
2255 11:46:14.475687 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2256 11:46:14.478866 Devices finalized
2257 11:46:14.485432 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2258 11:46:14.488673 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2259 11:46:14.495316 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2260 11:46:14.498880 ME: HFSTS1 : 0x90000245
2261 11:46:14.505540 ME: HFSTS2 : 0x82100116
2262 11:46:14.508920 ME: HFSTS3 : 0x00000050
2263 11:46:14.512205 ME: HFSTS4 : 0x00004000
2264 11:46:14.518829 ME: HFSTS5 : 0x00000000
2265 11:46:14.521772 ME: HFSTS6 : 0x40600006
2266 11:46:14.525392 ME: Manufacturing Mode : NO
2267 11:46:14.528643 ME: SPI Protection Mode Enabled : YES
2268 11:46:14.531991 ME: FPFs Committed : YES
2269 11:46:14.538998 ME: Manufacturing Vars Locked : YES
2270 11:46:14.541885 ME: FW Partition Table : OK
2271 11:46:14.545008 ME: Bringup Loader Failure : NO
2272 11:46:14.548845 ME: Firmware Init Complete : YES
2273 11:46:14.552545 ME: Boot Options Present : NO
2274 11:46:14.555583 ME: Update In Progress : NO
2275 11:46:14.558963 ME: D0i3 Support : YES
2276 11:46:14.564784 ME: Low Power State Enabled : NO
2277 11:46:14.568502 ME: CPU Replaced : YES
2278 11:46:14.571556 ME: CPU Replacement Valid : YES
2279 11:46:14.575282 ME: Current Working State : 5
2280 11:46:14.578328 ME: Current Operation State : 1
2281 11:46:14.581775 ME: Current Operation Mode : 0
2282 11:46:14.584893 ME: Error Code : 0
2283 11:46:14.588604 ME: Enhanced Debug Mode : NO
2284 11:46:14.591782 ME: CPU Debug Disabled : YES
2285 11:46:14.598196 ME: TXT Support : NO
2286 11:46:14.601737 ME: WP for RO is enabled : YES
2287 11:46:14.604785 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2288 11:46:14.611387 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2289 11:46:14.614539 Ramoops buffer: 0x100000@0x76899000.
2290 11:46:14.621434 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2291 11:46:14.628279 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2292 11:46:14.631368 CBFS: 'fallback/slic' not found.
2293 11:46:14.638341 ACPI: Writing ACPI tables at 7686d000.
2294 11:46:14.638723 ACPI: * FACS
2295 11:46:14.641638 ACPI: * DSDT
2296 11:46:14.647775 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2297 11:46:14.651083 ACPI: * FADT
2298 11:46:14.651165 SCI is IRQ9
2299 11:46:14.654151 ACPI: added table 1/32, length now 40
2300 11:46:14.657986 ACPI: * SSDT
2301 11:46:14.661333 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2302 11:46:14.668889 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2303 11:46:14.671716 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2304 11:46:14.675277 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2305 11:46:14.681281 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2306 11:46:14.688649 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2307 11:46:14.695014 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2308 11:46:14.698380 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2309 11:46:14.705652 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2310 11:46:14.708734 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2311 11:46:14.715049 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2312 11:46:14.718455 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2313 11:46:14.725154 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2314 11:46:14.728590 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2315 11:46:14.735333 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2316 11:46:14.739296 PS2K: Passing 80 keymaps to kernel
2317 11:46:14.745694 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2318 11:46:14.752479 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2319 11:46:14.759143 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2320 11:46:14.765192 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2321 11:46:14.771949 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2322 11:46:14.779039 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2323 11:46:14.782772 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2324 11:46:14.789008 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2325 11:46:14.794907 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2326 11:46:14.801710 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2327 11:46:14.805065 ACPI: added table 2/32, length now 44
2328 11:46:14.808747 ACPI: * MCFG
2329 11:46:14.811885 ACPI: added table 3/32, length now 48
2330 11:46:14.812226 ACPI: * TPM2
2331 11:46:14.814869 TPM2 log created at 0x7685d000
2332 11:46:14.821508 ACPI: added table 4/32, length now 52
2333 11:46:14.821908 ACPI: * LPIT
2334 11:46:14.824937 ACPI: added table 5/32, length now 56
2335 11:46:14.829035 ACPI: * MADT
2336 11:46:14.829375 SCI is IRQ9
2337 11:46:14.831915 ACPI: added table 6/32, length now 60
2338 11:46:14.834849 cmd_reg from pmc_make_ipc_cmd 1052838
2339 11:46:14.841660 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2340 11:46:14.848406 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2341 11:46:14.854638 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2342 11:46:14.858069 PMC CrashLog size in discovery mode: 0xC00
2343 11:46:14.861480 cpu crashlog bar addr: 0x80640000
2344 11:46:14.864460 cpu discovery table offset: 0x6030
2345 11:46:14.871752 cpu_crashlog_discovery_table buffer count: 0x3
2346 11:46:14.878247 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2347 11:46:14.885246 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2348 11:46:14.891533 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2349 11:46:14.894445 PMC crashLog size in discovery mode : 0xC00
2350 11:46:14.901326 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2351 11:46:14.907820 discover mode PMC crashlog size adjusted to: 0x200
2352 11:46:14.914564 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2353 11:46:14.917700 discover mode PMC crashlog size adjusted to: 0x0
2354 11:46:14.921238 m_cpu_crashLog_size : 0x3480 bytes
2355 11:46:14.924608 CPU crashLog present.
2356 11:46:14.927512 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2357 11:46:14.937855 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2358 11:46:14.938314 current = 76876550
2359 11:46:14.942383 ACPI: * DMAR
2360 11:46:14.944382 ACPI: added table 7/32, length now 64
2361 11:46:14.948338 ACPI: added table 8/32, length now 68
2362 11:46:14.948840 ACPI: * HPET
2363 11:46:14.954664 ACPI: added table 9/32, length now 72
2364 11:46:14.955083 ACPI: done.
2365 11:46:14.957998 ACPI tables: 38528 bytes.
2366 11:46:14.961589 smbios_write_tables: 76857000
2367 11:46:14.964576 EC returned error result code 3
2368 11:46:14.968320 Couldn't obtain OEM name from CBI
2369 11:46:14.972296 Create SMBIOS type 16
2370 11:46:14.972701 Create SMBIOS type 17
2371 11:46:14.975282 Create SMBIOS type 20
2372 11:46:14.978536 GENERIC: 0.0 (WIFI Device)
2373 11:46:14.981909 SMBIOS tables: 2156 bytes.
2374 11:46:14.984862 Writing table forward entry at 0x00000500
2375 11:46:14.991691 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2376 11:46:14.994916 Writing coreboot table at 0x76891000
2377 11:46:15.001964 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2378 11:46:15.004684 1. 0000000000001000-000000000009ffff: RAM
2379 11:46:15.008632 2. 00000000000a0000-00000000000fffff: RESERVED
2380 11:46:15.014901 3. 0000000000100000-0000000076856fff: RAM
2381 11:46:15.018045 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2382 11:46:15.024899 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2383 11:46:15.031313 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2384 11:46:15.034840 7. 0000000077000000-00000000803fffff: RESERVED
2385 11:46:15.041352 8. 00000000c0000000-00000000cfffffff: RESERVED
2386 11:46:15.044903 9. 00000000f8000000-00000000f9ffffff: RESERVED
2387 11:46:15.048317 10. 00000000fb000000-00000000fb000fff: RESERVED
2388 11:46:15.054716 11. 00000000fc800000-00000000fe7fffff: RESERVED
2389 11:46:15.058140 12. 00000000feb00000-00000000feb7ffff: RESERVED
2390 11:46:15.064987 13. 00000000fec00000-00000000fecfffff: RESERVED
2391 11:46:15.067748 14. 00000000fed40000-00000000fed6ffff: RESERVED
2392 11:46:15.074815 15. 00000000fed80000-00000000fed87fff: RESERVED
2393 11:46:15.078051 16. 00000000fed90000-00000000fed92fff: RESERVED
2394 11:46:15.081469 17. 00000000feda0000-00000000feda1fff: RESERVED
2395 11:46:15.088184 18. 00000000fedc0000-00000000feddffff: RESERVED
2396 11:46:15.091749 19. 0000000100000000-000000027fbfffff: RAM
2397 11:46:15.094528 Passing 4 GPIOs to payload:
2398 11:46:15.101373 NAME | PORT | POLARITY | VALUE
2399 11:46:15.104691 lid | undefined | high | high
2400 11:46:15.111198 power | undefined | high | low
2401 11:46:15.114681 oprom | undefined | high | low
2402 11:46:15.120825 EC in RW | 0x00000151 | high | high
2403 11:46:15.121168 Board ID: 3
2404 11:46:15.124449 FW config: 0x131
2405 11:46:15.131474 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum c641
2406 11:46:15.134914 coreboot table: 1788 bytes.
2407 11:46:15.138291 IMD ROOT 0. 0x76fff000 0x00001000
2408 11:46:15.141390 IMD SMALL 1. 0x76ffe000 0x00001000
2409 11:46:15.144689 FSP MEMORY 2. 0x76afe000 0x00500000
2410 11:46:15.147698 CONSOLE 3. 0x76ade000 0x00020000
2411 11:46:15.151505 RW MCACHE 4. 0x76add000 0x0000043c
2412 11:46:15.154726 RO MCACHE 5. 0x76adc000 0x00000fd8
2413 11:46:15.161296 FMAP 6. 0x76adb000 0x0000064a
2414 11:46:15.164340 TIME STAMP 7. 0x76ada000 0x00000910
2415 11:46:15.167787 VBOOT WORK 8. 0x76ac6000 0x00014000
2416 11:46:15.171080 MEM INFO 9. 0x76ac5000 0x000003b8
2417 11:46:15.174636 ROMSTG STCK10. 0x76ac4000 0x00001000
2418 11:46:15.177787 AFTER CAR 11. 0x76ab8000 0x0000c000
2419 11:46:15.181340 RAMSTAGE 12. 0x76a2e000 0x0008a000
2420 11:46:15.184497 ACPI BERT 13. 0x76a1e000 0x00010000
2421 11:46:15.191040 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2422 11:46:15.194492 REFCODE 15. 0x769ae000 0x0006f000
2423 11:46:15.198050 SMM BACKUP 16. 0x7699e000 0x00010000
2424 11:46:15.201226 IGD OPREGION17. 0x76999000 0x00004203
2425 11:46:15.204694 RAMOOPS 18. 0x76899000 0x00100000
2426 11:46:15.208084 COREBOOT 19. 0x76891000 0x00008000
2427 11:46:15.211467 ACPI 20. 0x7686d000 0x00024000
2428 11:46:15.214620 TPM2 TCGLOG21. 0x7685d000 0x00010000
2429 11:46:15.221026 PMC CRASHLOG22. 0x7685c000 0x00000c00
2430 11:46:15.224348 CPU CRASHLOG23. 0x76858000 0x00003480
2431 11:46:15.227437 SMBIOS 24. 0x76857000 0x00001000
2432 11:46:15.227854 IMD small region:
2433 11:46:15.234819 IMD ROOT 0. 0x76ffec00 0x00000400
2434 11:46:15.237808 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2435 11:46:15.241420 VPD 2. 0x76ffeb80 0x00000058
2436 11:46:15.244740 POWER STATE 3. 0x76ffeb20 0x00000044
2437 11:46:15.247731 ROMSTAGE 4. 0x76ffeb00 0x00000004
2438 11:46:15.254650 ACPI GNVS 5. 0x76ffeaa0 0x00000048
2439 11:46:15.257973 TYPE_C INFO 6. 0x76ffea80 0x0000000c
2440 11:46:15.260918 BS: BS_WRITE_TABLES run times (exec / console): 6 / 628 ms
2441 11:46:15.264122 MTRR: Physical address space:
2442 11:46:15.271040 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2443 11:46:15.277901 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2444 11:46:15.284529 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2445 11:46:15.290948 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2446 11:46:15.297376 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2447 11:46:15.303862 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2448 11:46:15.310654 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2449 11:46:15.314318 MTRR: Fixed MSR 0x250 0x0606060606060606
2450 11:46:15.317656 MTRR: Fixed MSR 0x258 0x0606060606060606
2451 11:46:15.320481 MTRR: Fixed MSR 0x259 0x0000000000000000
2452 11:46:15.327439 MTRR: Fixed MSR 0x268 0x0606060606060606
2453 11:46:15.330859 MTRR: Fixed MSR 0x269 0x0606060606060606
2454 11:46:15.334142 MTRR: Fixed MSR 0x26a 0x0606060606060606
2455 11:46:15.336983 MTRR: Fixed MSR 0x26b 0x0606060606060606
2456 11:46:15.340602 MTRR: Fixed MSR 0x26c 0x0606060606060606
2457 11:46:15.347137 MTRR: Fixed MSR 0x26d 0x0606060606060606
2458 11:46:15.350339 MTRR: Fixed MSR 0x26e 0x0606060606060606
2459 11:46:15.353860 MTRR: Fixed MSR 0x26f 0x0606060606060606
2460 11:46:15.357436 call enable_fixed_mtrr()
2461 11:46:15.360542 CPU physical address size: 39 bits
2462 11:46:15.367551 MTRR: default type WB/UC MTRR counts: 6/6.
2463 11:46:15.370650 MTRR: UC selected as default type.
2464 11:46:15.377168 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2465 11:46:15.380595 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2466 11:46:15.387298 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2467 11:46:15.394029 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2468 11:46:15.400731 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2469 11:46:15.407403 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2470 11:46:15.413933 MTRR: Fixed MSR 0x250 0x0606060606060606
2471 11:46:15.417907 MTRR: Fixed MSR 0x258 0x0606060606060606
2472 11:46:15.420584 MTRR: Fixed MSR 0x259 0x0000000000000000
2473 11:46:15.423376 MTRR: Fixed MSR 0x268 0x0606060606060606
2474 11:46:15.430938 MTRR: Fixed MSR 0x269 0x0606060606060606
2475 11:46:15.434380 MTRR: Fixed MSR 0x26a 0x0606060606060606
2476 11:46:15.437592 MTRR: Fixed MSR 0x26b 0x0606060606060606
2477 11:46:15.440759 MTRR: Fixed MSR 0x26c 0x0606060606060606
2478 11:46:15.447333 MTRR: Fixed MSR 0x26d 0x0606060606060606
2479 11:46:15.450725 MTRR: Fixed MSR 0x26e 0x0606060606060606
2480 11:46:15.453847 MTRR: Fixed MSR 0x26f 0x0606060606060606
2481 11:46:15.457178 MTRR: Fixed MSR 0x250 0x0606060606060606
2482 11:46:15.460250 call enable_fixed_mtrr()
2483 11:46:15.463553 MTRR: Fixed MSR 0x250 0x0606060606060606
2484 11:46:15.467110 CPU physical address size: 39 bits
2485 11:46:15.474220 MTRR: Fixed MSR 0x258 0x0606060606060606
2486 11:46:15.477163 MTRR: Fixed MSR 0x250 0x0606060606060606
2487 11:46:15.480362 MTRR: Fixed MSR 0x250 0x0606060606060606
2488 11:46:15.483485 MTRR: Fixed MSR 0x250 0x0606060606060606
2489 11:46:15.487054 MTRR: Fixed MSR 0x250 0x0606060606060606
2490 11:46:15.493697 MTRR: Fixed MSR 0x258 0x0606060606060606
2491 11:46:15.496533 MTRR: Fixed MSR 0x259 0x0000000000000000
2492 11:46:15.500590 MTRR: Fixed MSR 0x268 0x0606060606060606
2493 11:46:15.503718 MTRR: Fixed MSR 0x269 0x0606060606060606
2494 11:46:15.510432 MTRR: Fixed MSR 0x26a 0x0606060606060606
2495 11:46:15.513715 MTRR: Fixed MSR 0x26b 0x0606060606060606
2496 11:46:15.517063 MTRR: Fixed MSR 0x26c 0x0606060606060606
2497 11:46:15.519828 MTRR: Fixed MSR 0x26d 0x0606060606060606
2498 11:46:15.526568 MTRR: Fixed MSR 0x26e 0x0606060606060606
2499 11:46:15.530734 MTRR: Fixed MSR 0x26f 0x0606060606060606
2500 11:46:15.533504 MTRR: Fixed MSR 0x259 0x0000000000000000
2501 11:46:15.536634 call enable_fixed_mtrr()
2502 11:46:15.540294 MTRR: Fixed MSR 0x258 0x0606060606060606
2503 11:46:15.543346 MTRR: Fixed MSR 0x258 0x0606060606060606
2504 11:46:15.549987 MTRR: Fixed MSR 0x258 0x0606060606060606
2505 11:46:15.553565 MTRR: Fixed MSR 0x258 0x0606060606060606
2506 11:46:15.556793 MTRR: Fixed MSR 0x259 0x0000000000000000
2507 11:46:15.559886 MTRR: Fixed MSR 0x268 0x0606060606060606
2508 11:46:15.563076 MTRR: Fixed MSR 0x269 0x0606060606060606
2509 11:46:15.569705 MTRR: Fixed MSR 0x26a 0x0606060606060606
2510 11:46:15.572996 MTRR: Fixed MSR 0x26b 0x0606060606060606
2511 11:46:15.576648 MTRR: Fixed MSR 0x26c 0x0606060606060606
2512 11:46:15.579956 MTRR: Fixed MSR 0x26d 0x0606060606060606
2513 11:46:15.586587 MTRR: Fixed MSR 0x26e 0x0606060606060606
2514 11:46:15.589641 MTRR: Fixed MSR 0x26f 0x0606060606060606
2515 11:46:15.593336 CPU physical address size: 39 bits
2516 11:46:15.596319 call enable_fixed_mtrr()
2517 11:46:15.599485 MTRR: Fixed MSR 0x268 0x0606060606060606
2518 11:46:15.602852 MTRR: Fixed MSR 0x269 0x0606060606060606
2519 11:46:15.606840 MTRR: Fixed MSR 0x26a 0x0606060606060606
2520 11:46:15.613075 MTRR: Fixed MSR 0x26b 0x0606060606060606
2521 11:46:15.616873 MTRR: Fixed MSR 0x26c 0x0606060606060606
2522 11:46:15.620137 MTRR: Fixed MSR 0x26d 0x0606060606060606
2523 11:46:15.622783 MTRR: Fixed MSR 0x26e 0x0606060606060606
2524 11:46:15.630004 MTRR: Fixed MSR 0x26f 0x0606060606060606
2525 11:46:15.633282 MTRR: Fixed MSR 0x259 0x0000000000000000
2526 11:46:15.636692 call enable_fixed_mtrr()
2527 11:46:15.639689 CPU physical address size: 39 bits
2528 11:46:15.643081 CPU physical address size: 39 bits
2529 11:46:15.646835 MTRR: Fixed MSR 0x259 0x0000000000000000
2530 11:46:15.650237 MTRR: Fixed MSR 0x259 0x0000000000000000
2531 11:46:15.652779 MTRR: Fixed MSR 0x268 0x0606060606060606
2532 11:46:15.659491 MTRR: Fixed MSR 0x269 0x0606060606060606
2533 11:46:15.662757 MTRR: Fixed MSR 0x268 0x0606060606060606
2534 11:46:15.666262 MTRR: Fixed MSR 0x269 0x0606060606060606
2535 11:46:15.669600 MTRR: Fixed MSR 0x26a 0x0606060606060606
2536 11:46:15.675986 MTRR: Fixed MSR 0x26b 0x0606060606060606
2537 11:46:15.679651 MTRR: Fixed MSR 0x26c 0x0606060606060606
2538 11:46:15.683285 MTRR: Fixed MSR 0x26d 0x0606060606060606
2539 11:46:15.686361 MTRR: Fixed MSR 0x26e 0x0606060606060606
2540 11:46:15.689536 MTRR: Fixed MSR 0x26f 0x0606060606060606
2541 11:46:15.696360 MTRR: Fixed MSR 0x26a 0x0606060606060606
2542 11:46:15.699253 call enable_fixed_mtrr()
2543 11:46:15.702942 MTRR: Fixed MSR 0x268 0x0606060606060606
2544 11:46:15.706303 CPU physical address size: 39 bits
2545 11:46:15.709546 MTRR: Fixed MSR 0x26b 0x0606060606060606
2546 11:46:15.715873 MTRR: Fixed MSR 0x269 0x0606060606060606
2547 11:46:15.719388 MTRR: Fixed MSR 0x26c 0x0606060606060606
2548 11:46:15.722434 MTRR: Fixed MSR 0x26d 0x0606060606060606
2549 11:46:15.726246 MTRR: Fixed MSR 0x26e 0x0606060606060606
2550 11:46:15.732605 MTRR: Fixed MSR 0x26f 0x0606060606060606
2551 11:46:15.735929 MTRR: Fixed MSR 0x26a 0x0606060606060606
2552 11:46:15.739130 call enable_fixed_mtrr()
2553 11:46:15.742361 MTRR: Fixed MSR 0x26b 0x0606060606060606
2554 11:46:15.746150 MTRR: Fixed MSR 0x26c 0x0606060606060606
2555 11:46:15.749408 MTRR: Fixed MSR 0x26d 0x0606060606060606
2556 11:46:15.752380 MTRR: Fixed MSR 0x26e 0x0606060606060606
2557 11:46:15.758798 MTRR: Fixed MSR 0x26f 0x0606060606060606
2558 11:46:15.761993 CPU physical address size: 39 bits
2559 11:46:15.765627 call enable_fixed_mtrr()
2560 11:46:15.768789 CPU physical address size: 39 bits
2561 11:46:15.769188
2562 11:46:15.772454 MTRR check
2563 11:46:15.772741 Fixed MTRRs : Enabled
2564 11:46:15.775392 Variable MTRRs: Enabled
2565 11:46:15.775769
2566 11:46:15.781743 BS: BS_WRITE_TABLES exit times (exec / console): 250 / 150 ms
2567 11:46:15.785042 Checking cr50 for pending updates
2568 11:46:15.796742 Reading cr50 TPM mode
2569 11:46:15.812057 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2570 11:46:15.822340 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2571 11:46:15.825547 Checking segment from ROM address 0xf96cbe6c
2572 11:46:15.828586 Checking segment from ROM address 0xf96cbe88
2573 11:46:15.835424 Loading segment from ROM address 0xf96cbe6c
2574 11:46:15.835949 code (compression=1)
2575 11:46:15.845919 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2576 11:46:15.852202 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2577 11:46:15.855648 using LZMA
2578 11:46:15.878535 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2579 11:46:15.884987 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2580 11:46:15.893313 Loading segment from ROM address 0xf96cbe88
2581 11:46:15.896432 Entry Point 0x30000000
2582 11:46:15.896771 Loaded segments
2583 11:46:15.903086 BS: BS_PAYLOAD_LOAD run times (exec / console): 22 / 62 ms
2584 11:46:15.909951 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2585 11:46:15.913459 Finalizing chipset.
2586 11:46:15.913803 apm_control: Finalizing SMM.
2587 11:46:15.916284 APMC done.
2588 11:46:15.919941 HECI: CSE device 16.1 is disabled
2589 11:46:15.923072 HECI: CSE device 16.2 is disabled
2590 11:46:15.926746 HECI: CSE device 16.3 is disabled
2591 11:46:15.929566 HECI: CSE device 16.4 is disabled
2592 11:46:15.933245 HECI: CSE device 16.5 is disabled
2593 11:46:15.936562 HECI: Sending End-of-Post
2594 11:46:15.944622 CSE: EOP requested action: continue boot
2595 11:46:15.947737 CSE EOP successful, continuing boot
2596 11:46:15.955468 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2597 11:46:15.958477 mp_park_aps done after 0 msecs.
2598 11:46:15.961592 Jumping to boot code at 0x30000000(0x76891000)
2599 11:46:15.971430 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2600 11:46:15.975871
2601 11:46:15.976346
2602 11:46:15.976633
2603 11:46:15.979113 Starting depthcharge on Volmar...
2604 11:46:15.979571
2605 11:46:15.980527 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2606 11:46:15.980896 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2607 11:46:15.981186 Setting prompt string to ['brya:']
2608 11:46:15.981452 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2609 11:46:15.985887 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2610 11:46:15.986380
2611 11:46:15.992290 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2612 11:46:15.992837
2613 11:46:15.998649 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2614 11:46:15.999117
2615 11:46:16.002369 configure_storage: Failed to remap 1C:2
2616 11:46:16.002723
2617 11:46:16.002971 Wipe memory regions:
2618 11:46:16.005711
2619 11:46:16.009142 [0x00000000001000, 0x000000000a0000)
2620 11:46:16.009495
2621 11:46:16.012373 [0x00000000100000, 0x00000030000000)
2622 11:46:16.122673
2623 11:46:16.126111 [0x00000032668e60, 0x00000076857000)
2624 11:46:16.278894
2625 11:46:16.282137 [0x00000100000000, 0x0000027fc00000)
2626 11:46:17.143918
2627 11:46:17.147260 ec_init: CrosEC protocol v3 supported (256, 256)
2628 11:46:17.755234
2629 11:46:17.755732 R8152: Initializing
2630 11:46:17.756012
2631 11:46:17.758532 Version 9 (ocp_data = 6010)
2632 11:46:17.758917
2633 11:46:17.761625 R8152: Done initializing
2634 11:46:17.761717
2635 11:46:17.764883 Adding net device
2636 11:46:18.066568
2637 11:46:18.069149 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2638 11:46:18.069595
2639 11:46:18.069969
2640 11:46:18.070263
2641 11:46:18.070864 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2643 11:46:18.171899 brya: tftpboot 192.168.201.1 13268553/tftp-deploy-t0uk9s6c/kernel/bzImage 13268553/tftp-deploy-t0uk9s6c/kernel/cmdline 13268553/tftp-deploy-t0uk9s6c/ramdisk/ramdisk.cpio.gz
2644 11:46:18.172487 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2645 11:46:18.172826 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:38)
2646 11:46:18.177499 tftpboot 192.168.201.1 13268553/tftp-deploy-t0uk9s6c/kernel/bzIploy-t0uk9s6c/kernel/cmdline 13268553/tftp-deploy-t0uk9s6c/ramdisk/ramdisk.cpio.gz
2647 11:46:18.178128
2648 11:46:18.178418 Waiting for link
2649 11:46:18.380018
2650 11:46:18.380505 done.
2651 11:46:18.380776
2652 11:46:18.381018 MAC: 00:e0:4c:68:02:ef
2653 11:46:18.381286
2654 11:46:18.383280 Sending DHCP discover... done.
2655 11:46:18.383703
2656 11:46:18.386381 Waiting for reply... done.
2657 11:46:18.386871
2658 11:46:18.390029 Sending DHCP request... done.
2659 11:46:18.390409
2660 11:46:18.396390 Waiting for reply... done.
2661 11:46:18.396789
2662 11:46:18.397062 My ip is 192.168.201.16
2663 11:46:18.397306
2664 11:46:18.400183 The DHCP server ip is 192.168.201.1
2665 11:46:18.403302
2666 11:46:18.406458 TFTP server IP predefined by user: 192.168.201.1
2667 11:46:18.406954
2668 11:46:18.413502 Bootfile predefined by user: 13268553/tftp-deploy-t0uk9s6c/kernel/bzImage
2669 11:46:18.413988
2670 11:46:18.416439 Sending tftp read request... done.
2671 11:46:18.416788
2672 11:46:18.423982 Waiting for the transfer...
2673 11:46:18.424436
2674 11:46:18.652513 00000000 ################################################################
2675 11:46:18.652656
2676 11:46:18.882047 00080000 ################################################################
2677 11:46:18.882184
2678 11:46:19.107196 00100000 ################################################################
2679 11:46:19.107363
2680 11:46:19.332411 00180000 ################################################################
2681 11:46:19.332570
2682 11:46:19.560345 00200000 ################################################################
2683 11:46:19.560490
2684 11:46:19.788107 00280000 ################################################################
2685 11:46:19.788248
2686 11:46:20.015587 00300000 ################################################################
2687 11:46:20.015727
2688 11:46:20.244510 00380000 ################################################################
2689 11:46:20.244655
2690 11:46:20.472199 00400000 ################################################################
2691 11:46:20.472332
2692 11:46:20.701471 00480000 ################################################################
2693 11:46:20.701610
2694 11:46:20.927852 00500000 ################################################################
2695 11:46:20.927996
2696 11:46:21.156264 00580000 ################################################################
2697 11:46:21.156399
2698 11:46:21.384610 00600000 ################################################################
2699 11:46:21.384754
2700 11:46:21.610312 00680000 ################################################################
2701 11:46:21.610442
2702 11:46:21.838151 00700000 ################################################################
2703 11:46:21.838293
2704 11:46:22.064400 00780000 ################################################################
2705 11:46:22.064532
2706 11:46:22.294469 00800000 ################################################################
2707 11:46:22.294605
2708 11:46:22.522965 00880000 ################################################################
2709 11:46:22.523105
2710 11:46:22.753189 00900000 ################################################################
2711 11:46:22.753326
2712 11:46:22.980305 00980000 ################################################################
2713 11:46:22.980448
2714 11:46:23.208525 00a00000 ################################################################
2715 11:46:23.208660
2716 11:46:23.437491 00a80000 ################################################################
2717 11:46:23.437630
2718 11:46:23.665614 00b00000 ################################################################
2719 11:46:23.665748
2720 11:46:23.894442 00b80000 ################################################################
2721 11:46:23.894575
2722 11:46:24.123583 00c00000 ################################################################
2723 11:46:24.123714
2724 11:46:24.352346 00c80000 ################################################################
2725 11:46:24.352499
2726 11:46:24.546308 00d00000 ####################################################### done.
2727 11:46:24.546445
2728 11:46:24.549877 The bootfile was 14077840 bytes long.
2729 11:46:24.549940
2730 11:46:24.552923 Sending tftp read request... done.
2731 11:46:24.552994
2732 11:46:24.556340 Waiting for the transfer...
2733 11:46:24.556405
2734 11:46:24.785851 00000000 ################################################################
2735 11:46:24.785993
2736 11:46:25.011986 00080000 ################################################################
2737 11:46:25.012139
2738 11:46:25.239244 00100000 ################################################################
2739 11:46:25.239380
2740 11:46:25.463876 00180000 ################################################################
2741 11:46:25.464026
2742 11:46:25.688864 00200000 ################################################################
2743 11:46:25.688995
2744 11:46:25.915344 00280000 ################################################################
2745 11:46:25.915493
2746 11:46:26.140458 00300000 ################################################################
2747 11:46:26.140602
2748 11:46:26.367787 00380000 ################################################################
2749 11:46:26.367919
2750 11:46:26.595392 00400000 ################################################################
2751 11:46:26.595535
2752 11:46:26.825443 00480000 ################################################################
2753 11:46:26.825589
2754 11:46:27.053402 00500000 ################################################################
2755 11:46:27.053546
2756 11:46:27.279278 00580000 ################################################################
2757 11:46:27.279413
2758 11:46:27.505849 00600000 ################################################################
2759 11:46:27.505997
2760 11:46:27.734274 00680000 ################################################################
2761 11:46:27.734404
2762 11:46:27.960894 00700000 ################################################################
2763 11:46:27.961044
2764 11:46:28.187067 00780000 ################################################################
2765 11:46:28.187221
2766 11:46:28.413052 00800000 ################################################################
2767 11:46:28.413199
2768 11:46:28.506133 00880000 ########################### done.
2769 11:46:28.506265
2770 11:46:28.509306 Sending tftp read request... done.
2771 11:46:28.509383
2772 11:46:28.512399 Waiting for the transfer...
2773 11:46:28.512473
2774 11:46:28.512526 00000000 # done.
2775 11:46:28.512574
2776 11:46:28.522240 Command line loaded dynamically from TFTP file: 13268553/tftp-deploy-t0uk9s6c/kernel/cmdline
2777 11:46:28.522315
2778 11:46:28.538963 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2779 11:46:28.543484
2780 11:46:28.547522 Shutting down all USB controllers.
2781 11:46:28.547596
2782 11:46:28.547649 Removing current net device
2783 11:46:28.547709
2784 11:46:28.550286 Finalizing coreboot
2785 11:46:28.550359
2786 11:46:28.557006 Exiting depthcharge with code 4 at timestamp: 22983309
2787 11:46:28.557078
2788 11:46:28.557141
2789 11:46:28.557187 Starting kernel ...
2790 11:46:28.557232
2791 11:46:28.557276
2792 11:46:28.557610 end: 2.2.4 bootloader-commands (duration 00:00:13) [common]
2793 11:46:28.557702 start: 2.2.5 auto-login-action (timeout 00:04:28) [common]
2794 11:46:28.557762 Setting prompt string to ['Linux version [0-9]']
2795 11:46:28.557816 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2796 11:46:28.557869 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2798 11:50:56.558514 end: 2.2.5 auto-login-action (duration 00:04:28) [common]
2800 11:50:56.559382 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 268 seconds'
2802 11:50:56.560018 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2805 11:50:56.561024 end: 2 depthcharge-action (duration 00:05:00) [common]
2807 11:50:56.562053 Cleaning after the job
2808 11:50:56.562383 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13268553/tftp-deploy-t0uk9s6c/ramdisk
2809 11:50:56.564091 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13268553/tftp-deploy-t0uk9s6c/kernel
2810 11:50:56.565401 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13268553/tftp-deploy-t0uk9s6c/modules
2811 11:50:56.565696 start: 4.1 power-off (timeout 00:00:30) [common]
2812 11:50:56.565832 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-3' '--port=1' '--command=off'
2813 11:50:56.646528 >> Command sent successfully.
2814 11:50:56.654429 Returned 0 in 0 seconds
2815 11:50:56.755468 end: 4.1 power-off (duration 00:00:00) [common]
2817 11:50:56.756709 start: 4.2 read-feedback (timeout 00:10:00) [common]
2818 11:50:56.757507 Listened to connection for namespace 'common' for up to 1s
2820 11:50:56.758509 Listened to connection for namespace 'common' for up to 1s
2821 11:50:57.758421 Finalising connection for namespace 'common'
2822 11:50:57.758972 Disconnecting from shell: Finalise
2823 11:50:57.759278
2824 11:50:57.860207 end: 4.2 read-feedback (duration 00:00:01) [common]
2825 11:50:57.860719 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13268553
2826 11:50:57.872925 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13268553
2827 11:50:57.873056 JobError: Your job cannot terminate cleanly.