Boot log: lenovo-TPad-C13-Yoga-zork
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: UNKNOWN
1 11:45:55.474128 lava-dispatcher, installed at version: 2024.01
2 11:45:55.474346 start: 0 validate
3 11:45:55.474546 Start time: 2024-04-05 11:45:55.474538+00:00 (UTC)
4 11:45:55.474667 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:45:55.474799 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Fx86%2Frootfs.cpio.gz exists
6 11:45:55.744931 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:45:55.745799 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2416-g9d6a41ff7c4a%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:45:56.017245 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:45:56.017941 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2416-g9d6a41ff7c4a%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 11:45:56.291401 validate duration: 0.82
12 11:45:56.291692 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 11:45:56.291805 start: 1.1 download-retry (timeout 00:10:00) [common]
14 11:45:56.291907 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 11:45:56.292039 Not decompressing ramdisk as can be used compressed.
16 11:45:56.292123 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/x86/rootfs.cpio.gz
17 11:45:56.292187 saving as /var/lib/lava/dispatcher/tmp/13268547/tftp-deploy-0jopo4wv/ramdisk/rootfs.cpio.gz
18 11:45:56.292249 total size: 8417901 (8 MB)
19 11:45:56.293284 progress 0 % (0 MB)
20 11:45:56.295769 progress 5 % (0 MB)
21 11:45:56.298149 progress 10 % (0 MB)
22 11:45:56.300530 progress 15 % (1 MB)
23 11:45:56.302928 progress 20 % (1 MB)
24 11:45:56.305301 progress 25 % (2 MB)
25 11:45:56.307674 progress 30 % (2 MB)
26 11:45:56.309880 progress 35 % (2 MB)
27 11:45:56.312267 progress 40 % (3 MB)
28 11:45:56.314718 progress 45 % (3 MB)
29 11:45:56.317112 progress 50 % (4 MB)
30 11:45:56.319464 progress 55 % (4 MB)
31 11:45:56.321778 progress 60 % (4 MB)
32 11:45:56.323894 progress 65 % (5 MB)
33 11:45:56.326122 progress 70 % (5 MB)
34 11:45:56.328411 progress 75 % (6 MB)
35 11:45:56.330681 progress 80 % (6 MB)
36 11:45:56.332904 progress 85 % (6 MB)
37 11:45:56.335192 progress 90 % (7 MB)
38 11:45:56.337419 progress 95 % (7 MB)
39 11:45:56.339546 progress 100 % (8 MB)
40 11:45:56.339778 8 MB downloaded in 0.05 s (168.90 MB/s)
41 11:45:56.339940 end: 1.1.1 http-download (duration 00:00:00) [common]
43 11:45:56.340181 end: 1.1 download-retry (duration 00:00:00) [common]
44 11:45:56.340268 start: 1.2 download-retry (timeout 00:10:00) [common]
45 11:45:56.340353 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 11:45:56.340490 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2416-g9d6a41ff7c4a/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 11:45:56.340565 saving as /var/lib/lava/dispatcher/tmp/13268547/tftp-deploy-0jopo4wv/kernel/bzImage
48 11:45:56.340627 total size: 14077840 (13 MB)
49 11:45:56.340688 No compression specified
50 11:45:56.341806 progress 0 % (0 MB)
51 11:45:56.345506 progress 5 % (0 MB)
52 11:45:56.349132 progress 10 % (1 MB)
53 11:45:56.352911 progress 15 % (2 MB)
54 11:45:56.356533 progress 20 % (2 MB)
55 11:45:56.360388 progress 25 % (3 MB)
56 11:45:56.364018 progress 30 % (4 MB)
57 11:45:56.367858 progress 35 % (4 MB)
58 11:45:56.371586 progress 40 % (5 MB)
59 11:45:56.375441 progress 45 % (6 MB)
60 11:45:56.379118 progress 50 % (6 MB)
61 11:45:56.382944 progress 55 % (7 MB)
62 11:45:56.386665 progress 60 % (8 MB)
63 11:45:56.390520 progress 65 % (8 MB)
64 11:45:56.394197 progress 70 % (9 MB)
65 11:45:56.397935 progress 75 % (10 MB)
66 11:45:56.401695 progress 80 % (10 MB)
67 11:45:56.405409 progress 85 % (11 MB)
68 11:45:56.408962 progress 90 % (12 MB)
69 11:45:56.412715 progress 95 % (12 MB)
70 11:45:56.416359 progress 100 % (13 MB)
71 11:45:56.416553 13 MB downloaded in 0.08 s (176.83 MB/s)
72 11:45:56.416700 end: 1.2.1 http-download (duration 00:00:00) [common]
74 11:45:56.416937 end: 1.2 download-retry (duration 00:00:00) [common]
75 11:45:56.417027 start: 1.3 download-retry (timeout 00:10:00) [common]
76 11:45:56.417115 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 11:45:56.417255 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2416-g9d6a41ff7c4a/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 11:45:56.417325 saving as /var/lib/lava/dispatcher/tmp/13268547/tftp-deploy-0jopo4wv/modules/modules.tar
79 11:45:56.417387 total size: 484320 (0 MB)
80 11:45:56.417449 Using unxz to decompress xz
81 11:45:56.421875 progress 6 % (0 MB)
82 11:45:56.422295 progress 13 % (0 MB)
83 11:45:56.422579 progress 20 % (0 MB)
84 11:45:56.424208 progress 27 % (0 MB)
85 11:45:56.425977 progress 33 % (0 MB)
86 11:45:56.428021 progress 40 % (0 MB)
87 11:45:56.429801 progress 47 % (0 MB)
88 11:45:56.431542 progress 54 % (0 MB)
89 11:45:56.433342 progress 60 % (0 MB)
90 11:45:56.435006 progress 67 % (0 MB)
91 11:45:56.436752 progress 74 % (0 MB)
92 11:45:56.438720 progress 81 % (0 MB)
93 11:45:56.440422 progress 87 % (0 MB)
94 11:45:56.442302 progress 94 % (0 MB)
95 11:45:56.444111 progress 100 % (0 MB)
96 11:45:56.449737 0 MB downloaded in 0.03 s (14.28 MB/s)
97 11:45:56.449977 end: 1.3.1 http-download (duration 00:00:00) [common]
99 11:45:56.450256 end: 1.3 download-retry (duration 00:00:00) [common]
100 11:45:56.450349 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
101 11:45:56.450457 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
102 11:45:56.450540 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 11:45:56.450626 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
104 11:45:56.450857 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13268547/lava-overlay-p6iswh5m
105 11:45:56.450994 makedir: /var/lib/lava/dispatcher/tmp/13268547/lava-overlay-p6iswh5m/lava-13268547/bin
106 11:45:56.451102 makedir: /var/lib/lava/dispatcher/tmp/13268547/lava-overlay-p6iswh5m/lava-13268547/tests
107 11:45:56.451203 makedir: /var/lib/lava/dispatcher/tmp/13268547/lava-overlay-p6iswh5m/lava-13268547/results
108 11:45:56.451320 Creating /var/lib/lava/dispatcher/tmp/13268547/lava-overlay-p6iswh5m/lava-13268547/bin/lava-add-keys
109 11:45:56.451471 Creating /var/lib/lava/dispatcher/tmp/13268547/lava-overlay-p6iswh5m/lava-13268547/bin/lava-add-sources
110 11:45:56.451606 Creating /var/lib/lava/dispatcher/tmp/13268547/lava-overlay-p6iswh5m/lava-13268547/bin/lava-background-process-start
111 11:45:56.451744 Creating /var/lib/lava/dispatcher/tmp/13268547/lava-overlay-p6iswh5m/lava-13268547/bin/lava-background-process-stop
112 11:45:56.451874 Creating /var/lib/lava/dispatcher/tmp/13268547/lava-overlay-p6iswh5m/lava-13268547/bin/lava-common-functions
113 11:45:56.452004 Creating /var/lib/lava/dispatcher/tmp/13268547/lava-overlay-p6iswh5m/lava-13268547/bin/lava-echo-ipv4
114 11:45:56.452133 Creating /var/lib/lava/dispatcher/tmp/13268547/lava-overlay-p6iswh5m/lava-13268547/bin/lava-install-packages
115 11:45:56.452267 Creating /var/lib/lava/dispatcher/tmp/13268547/lava-overlay-p6iswh5m/lava-13268547/bin/lava-installed-packages
116 11:45:56.452395 Creating /var/lib/lava/dispatcher/tmp/13268547/lava-overlay-p6iswh5m/lava-13268547/bin/lava-os-build
117 11:45:56.452522 Creating /var/lib/lava/dispatcher/tmp/13268547/lava-overlay-p6iswh5m/lava-13268547/bin/lava-probe-channel
118 11:45:56.452650 Creating /var/lib/lava/dispatcher/tmp/13268547/lava-overlay-p6iswh5m/lava-13268547/bin/lava-probe-ip
119 11:45:56.452780 Creating /var/lib/lava/dispatcher/tmp/13268547/lava-overlay-p6iswh5m/lava-13268547/bin/lava-target-ip
120 11:45:56.452908 Creating /var/lib/lava/dispatcher/tmp/13268547/lava-overlay-p6iswh5m/lava-13268547/bin/lava-target-mac
121 11:45:56.453035 Creating /var/lib/lava/dispatcher/tmp/13268547/lava-overlay-p6iswh5m/lava-13268547/bin/lava-target-storage
122 11:45:56.453166 Creating /var/lib/lava/dispatcher/tmp/13268547/lava-overlay-p6iswh5m/lava-13268547/bin/lava-test-case
123 11:45:56.453298 Creating /var/lib/lava/dispatcher/tmp/13268547/lava-overlay-p6iswh5m/lava-13268547/bin/lava-test-event
124 11:45:56.453425 Creating /var/lib/lava/dispatcher/tmp/13268547/lava-overlay-p6iswh5m/lava-13268547/bin/lava-test-feedback
125 11:45:56.453552 Creating /var/lib/lava/dispatcher/tmp/13268547/lava-overlay-p6iswh5m/lava-13268547/bin/lava-test-raise
126 11:45:56.453679 Creating /var/lib/lava/dispatcher/tmp/13268547/lava-overlay-p6iswh5m/lava-13268547/bin/lava-test-reference
127 11:45:56.453810 Creating /var/lib/lava/dispatcher/tmp/13268547/lava-overlay-p6iswh5m/lava-13268547/bin/lava-test-runner
128 11:45:56.453939 Creating /var/lib/lava/dispatcher/tmp/13268547/lava-overlay-p6iswh5m/lava-13268547/bin/lava-test-set
129 11:45:56.454069 Creating /var/lib/lava/dispatcher/tmp/13268547/lava-overlay-p6iswh5m/lava-13268547/bin/lava-test-shell
130 11:45:56.454201 Updating /var/lib/lava/dispatcher/tmp/13268547/lava-overlay-p6iswh5m/lava-13268547/bin/lava-install-packages (oe)
131 11:45:56.454358 Updating /var/lib/lava/dispatcher/tmp/13268547/lava-overlay-p6iswh5m/lava-13268547/bin/lava-installed-packages (oe)
132 11:45:56.454489 Creating /var/lib/lava/dispatcher/tmp/13268547/lava-overlay-p6iswh5m/lava-13268547/environment
133 11:45:56.454591 LAVA metadata
134 11:45:56.454670 - LAVA_JOB_ID=13268547
135 11:45:56.454737 - LAVA_DISPATCHER_IP=192.168.201.1
136 11:45:56.454848 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
137 11:45:56.454916 skipped lava-vland-overlay
138 11:45:56.454995 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 11:45:56.455081 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
140 11:45:56.455145 skipped lava-multinode-overlay
141 11:45:56.455217 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 11:45:56.455301 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
143 11:45:56.455375 Loading test definitions
144 11:45:56.455469 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
145 11:45:56.455544 Using /lava-13268547 at stage 0
146 11:45:56.455873 uuid=13268547_1.4.2.3.1 testdef=None
147 11:45:56.455963 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 11:45:56.456052 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
149 11:45:56.456593 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 11:45:56.456816 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
152 11:45:56.457471 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 11:45:56.457700 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
155 11:45:56.458333 runner path: /var/lib/lava/dispatcher/tmp/13268547/lava-overlay-p6iswh5m/lava-13268547/0/tests/0_dmesg test_uuid 13268547_1.4.2.3.1
156 11:45:56.458564 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 11:45:56.458781 Creating lava-test-runner.conf files
159 11:45:56.458859 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13268547/lava-overlay-p6iswh5m/lava-13268547/0 for stage 0
160 11:45:56.458989 - 0_dmesg
161 11:45:56.459087 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
162 11:45:56.459172 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
163 11:45:56.466383 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
164 11:45:56.466524 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
165 11:45:56.466613 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
166 11:45:56.466700 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
167 11:45:56.466788 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
168 11:45:56.721476 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
169 11:45:56.721888 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
170 11:45:56.722006 extracting modules file /var/lib/lava/dispatcher/tmp/13268547/tftp-deploy-0jopo4wv/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13268547/extract-overlay-ramdisk-ueteexgz/ramdisk
171 11:45:56.737393 end: 1.4.4 extract-modules (duration 00:00:00) [common]
172 11:45:56.737513 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
173 11:45:56.737606 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13268547/compress-overlay-dcmf2zf9/overlay-1.4.2.4.tar.gz to ramdisk
174 11:45:56.737682 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13268547/compress-overlay-dcmf2zf9/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13268547/extract-overlay-ramdisk-ueteexgz/ramdisk
175 11:45:56.744395 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
176 11:45:56.744511 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
177 11:45:56.744602 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
178 11:45:56.744692 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
179 11:45:56.744773 Building ramdisk /var/lib/lava/dispatcher/tmp/13268547/extract-overlay-ramdisk-ueteexgz/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13268547/extract-overlay-ramdisk-ueteexgz/ramdisk
180 11:45:56.896846 >> 51652 blocks
181 11:45:57.770682 rename /var/lib/lava/dispatcher/tmp/13268547/extract-overlay-ramdisk-ueteexgz/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13268547/tftp-deploy-0jopo4wv/ramdisk/ramdisk.cpio.gz
182 11:45:57.771122 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
183 11:45:57.771251 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
184 11:45:57.771378 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
185 11:45:57.771473 No mkimage arch provided, not using FIT.
186 11:45:57.771561 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
187 11:45:57.771643 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
188 11:45:57.771748 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
189 11:45:57.771856 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
190 11:45:57.771996 No LXC device requested
191 11:45:57.772093 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
192 11:45:57.772185 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
193 11:45:57.772270 end: 1.6 deploy-device-env (duration 00:00:00) [common]
194 11:45:57.772346 Checking files for TFTP limit of 4294967296 bytes.
195 11:45:57.772815 end: 1 tftp-deploy (duration 00:00:01) [common]
196 11:45:57.772950 start: 2 depthcharge-action (timeout 00:05:00) [common]
197 11:45:57.773044 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
198 11:45:57.773172 substitutions:
199 11:45:57.773238 - {DTB}: None
200 11:45:57.773303 - {INITRD}: 13268547/tftp-deploy-0jopo4wv/ramdisk/ramdisk.cpio.gz
201 11:45:57.773363 - {KERNEL}: 13268547/tftp-deploy-0jopo4wv/kernel/bzImage
202 11:45:57.773421 - {LAVA_MAC}: None
203 11:45:57.773477 - {PRESEED_CONFIG}: None
204 11:45:57.773533 - {PRESEED_LOCAL}: None
205 11:45:57.773588 - {RAMDISK}: 13268547/tftp-deploy-0jopo4wv/ramdisk/ramdisk.cpio.gz
206 11:45:57.773685 - {ROOT_PART}: None
207 11:45:57.773769 - {ROOT}: None
208 11:45:57.773836 - {SERVER_IP}: 192.168.201.1
209 11:45:57.773890 - {TEE}: None
210 11:45:57.773944 Parsed boot commands:
211 11:45:57.774024 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
212 11:45:57.774286 Parsed boot commands: tftpboot 192.168.201.1 13268547/tftp-deploy-0jopo4wv/kernel/bzImage 13268547/tftp-deploy-0jopo4wv/kernel/cmdline 13268547/tftp-deploy-0jopo4wv/ramdisk/ramdisk.cpio.gz
213 11:45:57.774375 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
214 11:45:57.774497 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
215 11:45:57.774632 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
216 11:45:57.774760 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
217 11:45:57.774830 Not connected, no need to disconnect.
218 11:45:57.774907 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
219 11:45:57.774995 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
220 11:45:57.775067 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh lenovo-TPad-C13-Yoga-zork-cbg-1'
221 11:45:57.779207 Setting prompt string to ['lava-test: # ']
222 11:45:57.779559 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
223 11:45:57.779666 end: 2.2.1 reset-connection (duration 00:00:00) [common]
224 11:45:57.779786 start: 2.2.2 reset-device (timeout 00:05:00) [common]
225 11:45:57.780128 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
226 11:45:57.780375 Calling: 'pduclient' '--daemon=localhost' '--hostname=lenovo-TPad-C13-Yoga-zork-cbg-1' '--port=1' '--command=reboot'
227 11:46:02.917225 >> Command sent successfully.
228 11:46:02.926475 Returned 0 in 5 seconds
229 11:46:03.027566 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
231 11:46:03.028696 end: 2.2.2 reset-device (duration 00:00:05) [common]
232 11:46:03.029105 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
233 11:46:03.029477 Setting prompt string to 'Starting depthcharge on Morphius...'
234 11:46:03.029758 Changing prompt to 'Starting depthcharge on Morphius...'
235 11:46:03.030113 depthcharge-start: Wait for prompt Starting depthcharge on Morphius... (timeout 00:05:00)
236 11:46:03.031225 [Enter `^Ec?' for help]
237 11:46:04.673780
238 11:46:04.674357
239 11:46:04.683399 coreboot-v1.9308_26_0.0.22-16497-g60a4be297d Thu Oct 8 23:13:58 UTC 2020 bootblock starting (log level: 8)...
240 11:46:04.683870 Family_Model: 00820f01
241 11:46:04.686899 PSP boot mode: Production
242 11:46:04.690544 Silicon level: Pre-Production
243 11:46:04.690974 PMxC0 STATUS: 0x800 BIT11
244 11:46:04.694805 I2C bus 3 version 0x3132322a
245 11:46:04.698465 DW I2C bus 3 at 0xfedc5000 (400 KHz)
246 11:46:04.701701 FMAP: area COREBOOT found @ 875000 (7909376 bytes)
247 11:46:04.704705 CBFS: Locating 'fallback/romstage'
248 11:46:04.708149 CBFS: Found @ offset 80 size d124
249 11:46:04.718891 BS: bootblock times (exec / console): total (unknown) / 36 ms
250 11:46:04.719330
251 11:46:04.719673
252 11:46:04.729131 coreboot-v1.9308_26_0.0.22-16497-g60a4be297d Thu Oct 8 23:13:58 UTC 2020 romstage starting (log level: 8)...
253 11:46:04.729657 POST: 0x41
254 11:46:04.732499 POST: 0x42
255 11:46:04.732925 Family_Model: 00820f01
256 11:46:04.738838 GPIO Control Switch: 0xef000000, Wake Stat 0: 0x00000000, Wake Stat 1: 0x00000000
257 11:46:04.742173 POST: 0x43
258 11:46:04.746064 Boot Count incremented to 27829
259 11:46:04.748921 FMAP: area COREBOOT found @ 875000 (7909376 bytes)
260 11:46:04.752359 CBFS: Locating 'fspm.bin'
261 11:46:04.755191 CBFS: Found @ offset 2fc80 size 1845e
262 11:46:04.780001 Spec version: v2.0
263 11:46:04.783266 Revision: 0.0.0, Build Number 1
264 11:46:04.783829 Type: release/test
265 11:46:04.790091 image ID: AMD_PCS0, base 0x20c0000 + 0x4b000
266 11:46:04.793225 Config region 0x46ce4 + 0x104
267 11:46:04.793784 Memory init offset 0x7b8
268 11:46:04.796530 POST: 0x34
269 11:46:04.796997 bootmode is set to: 0
270 11:46:04.799959 POST: 0x36
271 11:46:04.803351 Calling FspMemoryInit: 0x020c07b8
272 11:46:04.803898 0x02000dec: raminit_upd
273 11:46:04.806538 0x0204d1cc: &hob_list_ptr
274 11:46:04.807009 POST: 0x92
275 11:46:04.812403 POST: 0x98
276 11:46:04.813001 CBMEM:
277 11:46:04.815304 IMD: root @ 0xcb7ff000 254 entries.
278 11:46:04.818341 IMD: root @ 0xcb7fec00 62 entries.
279 11:46:04.822146 FMAP: area RO_VPD found @ 800000 (16384 bytes)
280 11:46:04.825005 WARNING: RO_VPD is uninitialized or empty.
281 11:46:04.831499 FMAP: area RW_VPD found @ 615000 (8192 bytes)
282 11:46:04.832079 External stage cache:
283 11:46:04.834672 IMD: root @ 0xcbfff000 254 entries.
284 11:46:04.838524 IMD: root @ 0xcbffec00 62 entries.
285 11:46:04.841658 FspMemoryInit returned 0x00000000
286 11:46:04.845159 FMAP: area RW_MRC_CACHE found @ 0 (65536 bytes)
287 11:46:04.848707 APOB RAM copy differs from flash
288 11:46:04.855053 Copy APOB from RAM 0x0x02001000/0xa3a4 to flash 0x0/0x10000
289 11:46:04.858653 spi_init: SPI BAR at 0xfec10000
290 11:46:04.859295 Manufacturer: ef
291 11:46:04.865366 SF: Detected ef 6018 with sector size 0x1000, total 0x1000000
292 11:46:05.949861 SF: Successfully erased 65536 bytes @ 0x0
293 11:46:06.151240 Updated APOB in flash
294 11:46:06.151383 POST: 0x44
295 11:46:06.157587 FMAP: area COREBOOT found @ 875000 (7909376 bytes)
296 11:46:06.161399 CBFS: Locating 'fallback/ramstage'
297 11:46:06.164317 CBFS: Found @ offset f800 size 1bec6
298 11:46:06.171214 Decompressing stage fallback/ramstage @ 0xca6b5fc0 (1119216 bytes)
299 11:46:06.206350 Loading module at 0xca6b6000 with entry 0xca6b6000. filesize: 0x405c0 memsize: 0x1113b0
300 11:46:06.209315 Processing 4368 relocs. Offset value of 0xba6b6000
301 11:46:06.216104 BS: romstage times (exec / console): total (unknown) / 155 ms
302 11:46:06.216192
303 11:46:06.216258
304 11:46:06.226305 coreboot-v1.9308_26_0.0.22-16497-g60a4be297d Thu Oct 8 23:13:58 UTC 2020 ramstage starting (log level: 8)...
305 11:46:06.226394 POST: 0x39
306 11:46:06.229210 POST: 0x80
307 11:46:06.229294 Normal boot
308 11:46:06.229364 POST: 0x70
309 11:46:06.236109 BS: BS_PRE_DEVICE run times (exec / console): 0 / 1 ms
310 11:46:06.236196 POST: 0x71
311 11:46:06.239314 mainboard: EC init
312 11:46:06.242462 Chrome EC: Set SMI mask to 0x0000000000000000
313 11:46:06.245765 Chrome EC: UHEPI supported
314 11:46:06.252521 Chrome EC: clear events_b mask to 0x0000000000000000
315 11:46:06.255704 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
316 11:46:06.262622 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000010001206
317 11:46:06.266564 Chrome EC: Set WAKE mask to 0x0000000000000000
318 11:46:06.268684 Board ID: 5
319 11:46:06.278806 FMAP: area COREBOOT found @ 875000 (7909376 bytes)
320 11:46:06.282001 CBFS: Locating 'fsps.bin'
321 11:46:06.285249 CBFS: Found @ offset 48fc0 size 10cbd
322 11:46:06.302910 Spec version: v2.0
323 11:46:06.306253 Revision: 0.0.0, Build Number 1
324 11:46:06.306337 Type: release/test
325 11:46:06.312606 image ID: AMD_PCS0, base 0xca683000 + 0x32000
326 11:46:06.316558 Config region 0x2ec14 + 0x152
327 11:46:06.316639 Silicon init offset 0x3c2
328 11:46:06.319657 Notify phase offset 0x3b8
329 11:46:06.322994 Calling FspSiliconInit: 0xca6833c2
330 11:46:06.326055 0xca7073b0: upd
331 11:46:06.326136 POST: 0x93
332 11:46:06.554556 POST: 0x99
333 11:46:06.558275 FspSiliconInit returned 0x00000000
334 11:46:06.561492 I2C bus 2 version 0x3132322a
335 11:46:06.564681 DW I2C bus 2 at 0xfedc4000 (400 KHz)
336 11:46:06.567786 FMAP: area RW_ELOG found @ 610000 (4096 bytes)
337 11:46:06.571546 spi_init: SPI BAR at 0xfec10000
338 11:46:06.571632 Manufacturer: ef
339 11:46:06.577797 SF: Detected ef 6018 with sector size 0x1000, total 0x1000000
340 11:46:06.581254 ELOG: NV offset 0x610000 size 0x1000
341 11:46:06.591661 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
342 11:46:06.598103 ELOG: Event(17) added with size 13 at 2024-04-05 11:46:05 UTC
343 11:46:06.604898 ELOG: Event(9F) added with size 14 at 2024-04-05 11:46:05 UTC
344 11:46:06.604988 PM1_STS: PWRBTN
345 11:46:06.611703 BS: BS_DEV_INIT_CHIPS run times (exec / console): 260 / 110 ms
346 11:46:06.611789 POST: 0x72
347 11:46:06.615344 Enumerating buses...
348 11:46:06.618104 Show all devs... Before device enumeration.
349 11:46:06.618183 Root Device: enabled 1
350 11:46:06.621555 CPU_CLUSTER: 0: enabled 1
351 11:46:06.625401 DOMAIN: 0000: enabled 1
352 11:46:06.628367 GENERIC: 0.1: enabled 1
353 11:46:06.628450 MMIO: fedc5000: enabled 1
354 11:46:06.631718 MMIO: fedca000: enabled 1
355 11:46:06.634495 MMIO: fedce000: enabled 0
356 11:46:06.634576 MMIO: fedcf000: enabled 0
357 11:46:06.638308 MMIO: fedc4000: enabled 1
358 11:46:06.641551 APIC: 00: enabled 1
359 11:46:06.641636 PCI: 00:00.0: enabled 1
360 11:46:06.644668 PCI: 00:00.2: enabled 1
361 11:46:06.647934 PCI: 00:01.0: enabled 1
362 11:46:06.648014 PCI: 00:01.1: enabled 0
363 11:46:06.651234 PCI: 00:01.2: enabled 1
364 11:46:06.654757 PCI: 00:01.3: enabled 1
365 11:46:06.654846 PCI: 00:01.4: enabled 0
366 11:46:06.657683 PCI: 00:01.5: enabled 0
367 11:46:06.661104 PCI: 00:01.6: enabled 0
368 11:46:06.661191 PCI: 00:01.7: enabled 1
369 11:46:06.664900 PCI: 00:08.0: enabled 1
370 11:46:06.667731 PCI: 00:08.1: enabled 1
371 11:46:06.667812 PCI: 00:08.2: enabled 0
372 11:46:06.670981 PCI: 00:14.0: enabled 1
373 11:46:06.674264 PCI: 00:14.3: enabled 1
374 11:46:06.674346 PCI: 00:14.6: enabled 0
375 11:46:06.677552 PCI: 00:18.0: enabled 1
376 11:46:06.677633 PCI: 00:18.1: enabled 1
377 11:46:06.681502 PCI: 00:18.2: enabled 1
378 11:46:06.684070 PCI: 00:18.3: enabled 1
379 11:46:06.684152 PCI: 00:18.4: enabled 1
380 11:46:06.687873 PCI: 00:18.5: enabled 1
381 11:46:06.691148 PCI: 00:18.6: enabled 1
382 11:46:06.691230 I2C: 00:50: enabled 1
383 11:46:06.734038 GENERIC: 0.0: enabled 1
384 11:46:06.734129 I2C: 00:15: enabled 1
385 11:46:06.734375 I2C: 00:2c: enabled 1
386 11:46:06.734491 I2C: 00:5d: enabled 1
387 11:46:06.734553 GENERIC: 0.0: enabled 1
388 11:46:06.734624 PCI: 00:00.0: enabled 1
389 11:46:06.734684 PCI: 00:00.1: enabled 1
390 11:46:06.734741 PCI: 00:00.2: enabled 1
391 11:46:06.735060 PCI: 00:00.3: enabled 1
392 11:46:06.735142 PCI: 00:00.4: enabled 1
393 11:46:06.735704 PCI: 00:00.5: enabled 1
394 11:46:06.735786 PCI: 00:00.6: enabled 0
395 11:46:06.735851 PCI: 00:00.7: enabled 1
396 11:46:06.736270 PCI: 00:00.0: enabled 0
397 11:46:06.736350 PNP: 0c09.0: enabled 1
398 11:46:06.736601 USB0 port 0: enabled 1
399 11:46:06.736676 USB0 port 0: enabled 1
400 11:46:06.736736 GENERIC: 0.0: enabled 1
401 11:46:06.736805 GENERIC: 0.0: enabled 1
402 11:46:06.736865 GENERIC: 1.0: enabled 1
403 11:46:06.736920 GENERIC: 0.0: enabled 1
404 11:46:06.739956 USB2 port 0: enabled 1
405 11:46:06.740037 USB2 port 1: enabled 1
406 11:46:06.742863 USB2 port 2: enabled 1
407 11:46:06.746221 USB2 port 3: enabled 1
408 11:46:06.746316 USB3 port 0: enabled 1
409 11:46:06.750174 USB3 port 1: enabled 1
410 11:46:06.753039 USB3 port 2: enabled 1
411 11:46:06.753123 USB3 port 3: enabled 1
412 11:46:06.756552 USB2 port 4: enabled 1
413 11:46:06.759777 USB2 port 5: enabled 1
414 11:46:06.759863 USB2 port 0: enabled 1
415 11:46:06.763035 USB2 port 1: enabled 1
416 11:46:06.763121 USB3 port 0: enabled 1
417 11:46:06.766273 I2C: 00:1a: enabled 1
418 11:46:06.769585 Compare with tree...
419 11:46:06.769668 Root Device: enabled 1
420 11:46:06.772620 CPU_CLUSTER: 0: enabled 1
421 11:46:06.775932 APIC: 00: enabled 1
422 11:46:06.776014 DOMAIN: 0000: enabled 1
423 11:46:06.779621 PCI: 00:00.0: enabled 1
424 11:46:06.782614 PCI: 00:00.2: enabled 1
425 11:46:06.782696 PCI: 00:01.0: enabled 1
426 11:46:06.785990 PCI: 00:01.1: enabled 0
427 11:46:06.789182 PCI: 00:01.2: enabled 1
428 11:46:06.792744 PCI: 00:01.3: enabled 1
429 11:46:06.792827 PCI: 00:01.4: enabled 0
430 11:46:06.795958 PCI: 00:01.5: enabled 0
431 11:46:06.799114 PCI: 00:01.6: enabled 0
432 11:46:06.799196 PCI: 00:01.7: enabled 1
433 11:46:06.802957 PCI: 00:08.0: enabled 1
434 11:46:06.805710 PCI: 00:08.1: enabled 1
435 11:46:06.809365 PCI: 00:00.0: enabled 1
436 11:46:06.809447 PCI: 00:00.1: enabled 1
437 11:46:06.812141 PCI: 00:00.2: enabled 1
438 11:46:06.816151 PCI: 00:00.3: enabled 1
439 11:46:06.819260 USB0 port 0: enabled 1
440 11:46:06.819342 USB2 port 0: enabled 1
441 11:46:06.822194 USB2 port 1: enabled 1
442 11:46:06.825479 USB2 port 2: enabled 1
443 11:46:06.828738 USB2 port 3: enabled 1
444 11:46:06.828846 USB3 port 0: enabled 1
445 11:46:06.832026 USB3 port 1: enabled 1
446 11:46:06.835512 USB3 port 2: enabled 1
447 11:46:06.838683 USB3 port 3: enabled 1
448 11:46:06.838766 USB2 port 4: enabled 1
449 11:46:06.842210 USB2 port 5: enabled 1
450 11:46:06.845905 PCI: 00:00.4: enabled 1
451 11:46:06.848526 USB0 port 0: enabled 1
452 11:46:06.848608 USB2 port 0: enabled 1
453 11:46:06.851949 USB2 port 1: enabled 1
454 11:46:06.855045 USB3 port 0: enabled 1
455 11:46:06.858600 PCI: 00:00.5: enabled 1
456 11:46:06.858682 GENERIC: 0.0: enabled 1
457 11:46:06.861836 PCI: 00:00.6: enabled 0
458 11:46:06.864914 PCI: 00:00.7: enabled 1
459 11:46:06.868695 PCI: 00:08.2: enabled 0
460 11:46:06.868786 PCI: 00:00.0: enabled 0
461 11:46:06.872220 PCI: 00:14.0: enabled 1
462 11:46:06.875019 PCI: 00:14.3: enabled 1
463 11:46:06.878358 PNP: 0c09.0: enabled 1
464 11:46:06.878501 GENERIC: 0.0: enabled 1
465 11:46:06.881730 I2C: 00:1a: enabled 1
466 11:46:06.885342 GENERIC: 1.0: enabled 1
467 11:46:06.887870 GENERIC: 0.0: enabled 1
468 11:46:06.887950 PCI: 00:14.6: enabled 0
469 11:46:06.891520 PCI: 00:18.0: enabled 1
470 11:46:06.894559 PCI: 00:18.1: enabled 1
471 11:46:06.894641 PCI: 00:18.2: enabled 1
472 11:46:06.898075 PCI: 00:18.3: enabled 1
473 11:46:06.901000 PCI: 00:18.4: enabled 1
474 11:46:06.904608 PCI: 00:18.5: enabled 1
475 11:46:06.904690 PCI: 00:18.6: enabled 1
476 11:46:06.907682 GENERIC: 0.1: enabled 1
477 11:46:06.911401 MMIO: fedc5000: enabled 1
478 11:46:06.911483 I2C: 00:50: enabled 1
479 11:46:06.915041 MMIO: fedca000: enabled 1
480 11:46:06.917940 GENERIC: 0.0: enabled 1
481 11:46:06.921003 MMIO: fedce000: enabled 0
482 11:46:06.921085 MMIO: fedcf000: enabled 0
483 11:46:06.924308 MMIO: fedc4000: enabled 1
484 11:46:06.928130 I2C: 00:15: enabled 1
485 11:46:06.928223 I2C: 00:2c: enabled 1
486 11:46:06.931111 I2C: 00:5d: enabled 1
487 11:46:06.934003 GENERIC: 0.0: enabled 1
488 11:46:06.937892 Mainboard Morphius Enable.
489 11:46:06.937974 Root Device scanning...
490 11:46:06.940730 scan_static_bus for Root Device
491 11:46:06.944253 CPU_CLUSTER: 0 enabled
492 11:46:06.944336 DOMAIN: 0000 enabled
493 11:46:06.947420 GENERIC: 0.1 enabled
494 11:46:06.950643 MMIO: fedc5000 enabled
495 11:46:06.950725 MMIO: fedca000 enabled
496 11:46:06.953983 MMIO: fedce000 disabled
497 11:46:06.954064 MMIO: fedcf000 disabled
498 11:46:06.957242 MMIO: fedc4000 enabled
499 11:46:06.961000 DOMAIN: 0000 scanning...
500 11:46:06.964241 PCI: pci_scan_bus for bus 00
501 11:46:06.964323 POST: 0x24
502 11:46:06.966961 PCI: 00:00.0 [1022/15d0] ops
503 11:46:06.970391 PCI: 00:00.0 [1022/15d0] enabled
504 11:46:06.970514 PCI: 00:00.2 [1022/0000] ops
505 11:46:06.973933 PCI: 00:00.2 [1022/15d1] enabled
506 11:46:06.977163 PCI: 00:01.0 [1022/1452] enabled
507 11:46:06.980586 PCI: 00:01.2 [1022/15d3] bus ops
508 11:46:06.983864 PCI: 00:01.2 [1022/15d3] enabled
509 11:46:06.987014 PCI: 00:01.3 [1022/15d3] bus ops
510 11:46:06.990617 PCI: 00:01.3 [1022/15d3] enabled
511 11:46:06.993607 PCI: 00:01.7 [1022/15d3] bus ops
512 11:46:06.997248 PCI: 00:01.7 [1022/15d3] enabled
513 11:46:06.997330 PCI: 00:08.0 [1022/1452] enabled
514 11:46:06.999962 PCI: 00:08.1 [1022/0000] bus ops
515 11:46:07.003495 PCI: 00:08.1 [1022/15db] enabled
516 11:46:07.006768 PCI: 00:14.0 [1022/790b] bus ops
517 11:46:07.010029 PCI: 00:14.0 [1022/790b] enabled
518 11:46:07.013467 PCI: 00:14.3 [1022/0000] bus ops
519 11:46:07.016603 PCI: 00:14.3 [1022/790e] enabled
520 11:46:07.019953 PCI: 00:18.0 [1022/0000] ops
521 11:46:07.023279 PCI: 00:18.0 [1022/15e8] enabled
522 11:46:07.023362 PCI: 00:18.1 [1022/0000] ops
523 11:46:07.026643 PCI: 00:18.1 [1022/15e9] enabled
524 11:46:07.029914 PCI: 00:18.2 [1022/0000] ops
525 11:46:07.033431 PCI: 00:18.2 [1022/15ea] enabled
526 11:46:07.036253 PCI: 00:18.3 [1022/0000] ops
527 11:46:07.039823 PCI: 00:18.3 [1022/15eb] enabled
528 11:46:07.039905 PCI: 00:18.4 [1022/0000] ops
529 11:46:07.042985 PCI: 00:18.4 [1022/15ec] enabled
530 11:46:07.046201 PCI: 00:18.5 [1022/0000] ops
531 11:46:07.049520 PCI: 00:18.5 [1022/15ed] enabled
532 11:46:07.053056 PCI: 00:18.6 [1022/0000] ops
533 11:46:07.056233 PCI: 00:18.6 [1022/15ee] enabled
534 11:46:07.059425 PCI: 00:18.7 [1022/15ef] enabled
535 11:46:07.059510 POST: 0x25
536 11:46:07.062874 PCI: Leftover static devices:
537 11:46:07.062957 PCI: 00:01.1
538 11:46:07.063023 PCI: 00:01.4
539 11:46:07.065770 PCI: 00:01.5
540 11:46:07.065854 PCI: 00:01.6
541 11:46:07.069586 PCI: 00:08.2
542 11:46:07.069669 PCI: 00:14.6
543 11:46:07.072685 PCI: Check your devicetree.cb.
544 11:46:07.075627 PCI: 00:01.2 scanning...
545 11:46:07.079071 do_pci_scan_bridge for PCI: 00:01.2
546 11:46:07.079155 PCI: pci_scan_bus for bus 01
547 11:46:07.082386 POST: 0x24
548 11:46:07.082490 PCI: 01:00.0 [8086/0000] ops
549 11:46:07.086047 PCI: 01:00.0 [8086/2723] enabled
550 11:46:07.089077 POST: 0x25
551 11:46:07.089159 POST: 0x55
552 11:46:07.092678 Enabling Common Clock Configuration
553 11:46:07.095770 L1 Sub-State supported from root port 1
554 11:46:07.099029 L1 Sub-State Support = 0xf
555 11:46:07.102245 CommonModeRestoreTime = 0x1e
556 11:46:07.106125 Power On Value = 0x9, Power On Scale = 0x0
557 11:46:07.106208 ASPM: Enabled L1
558 11:46:07.109233 PCIe: Max_Payload_Size adjusted to 128
559 11:46:07.115722 scan_bus: bus PCI: 00:01.2 finished in 36 msecs
560 11:46:07.115804 PCI: 00:01.3 scanning...
561 11:46:07.119249 do_pci_scan_bridge for PCI: 00:01.3
562 11:46:07.122332 PCI: pci_scan_bus for bus 02
563 11:46:07.125935 POST: 0x24
564 11:46:07.126018 PCI: 02:00.0 [17a0/9750] enabled
565 11:46:07.129064 POST: 0x25
566 11:46:07.129147 POST: 0x55
567 11:46:07.132654 Enabling Common Clock Configuration
568 11:46:07.135577 L1 Sub-State supported from root port 1
569 11:46:07.138568 L1 Sub-State Support = 0xf
570 11:46:07.142136 CommonModeRestoreTime = 0xff
571 11:46:07.145267 Power On Value = 0x1f, Power On Scale = 0x2
572 11:46:07.145350 ASPM: Enabled L1
573 11:46:07.155281 PCIe: Max_Payload_Size adjusted to 128
574 11:46:07.163510 scan_bus: bus PCI: 00:01.3 finished in 40 msecs
575 11:46:07.163595 PCI: 00:01.7 scanning...
576 11:46:07.166404 do_pci_scan_bridge for PCI: 00:01.7
577 11:46:07.169632 PCI: pci_scan_bus for bus 03
578 11:46:07.172462 POST: 0x24
579 11:46:07.172545 PCI: 03:00.0 [1e0f/0001] enabled
580 11:46:07.176100 POST: 0x25
581 11:46:07.176183 POST: 0x55
582 11:46:07.179543 Enabling Common Clock Configuration
583 11:46:07.182682 PCIE CLK PM is not supported by endpoint
584 11:46:07.186105 L1 Sub-State supported from root port 1
585 11:46:07.189331 L1 Sub-State Support = 0x5
586 11:46:07.192415 CommonModeRestoreTime = 0x3c
587 11:46:07.195694 Power On Value = 0x5, Power On Scale = 0x0
588 11:46:07.195777 ASPM: Enabled L1
589 11:46:07.202659 PCIe: Max_Payload_Size adjusted to 256
590 11:46:07.206099 scan_bus: bus PCI: 00:01.7 finished in 36 msecs
591 11:46:07.209084 PCI: 00:08.1 scanning...
592 11:46:07.212628 do_pci_scan_bridge for PCI: 00:08.1
593 11:46:07.212711 PCI: pci_scan_bus for bus 04
594 11:46:07.215508 POST: 0x24
595 11:46:07.215590 PCI: 04:00.0 [1002/0000] ops
596 11:46:07.218773 PCI: 04:00.0 [1002/15d8] enabled
597 11:46:07.222772 PCI: 04:00.1 [1002/15de] enabled
598 11:46:07.225966 PCI: 04:00.2 [1022/15df] enabled
599 11:46:07.229606 PCI: 04:00.3 [1022/0000] bus ops
600 11:46:07.232385 PCI: 04:00.3 [1022/15e5] enabled
601 11:46:07.236255 PCI: Static device PCI: 04:00.4 not found, disabling it.
602 11:46:07.238695 PCI: 04:00.5 [1022/15e2] bus ops
603 11:46:07.242140 PCI: 04:00.5 [1022/15e2] enabled
604 11:46:07.245788 PCI: 04:00.7 [1022/15e4] enabled
605 11:46:07.245870 POST: 0x25
606 11:46:07.248853 PCI: Leftover static devices:
607 11:46:07.252441 PCI: 04:00.4
608 11:46:07.252523 PCI: 04:00.6
609 11:46:07.255597 PCI: Check your devicetree.cb.
610 11:46:07.258851 PCI: 04:00.3 scanning...
611 11:46:07.258934 scan_static_bus for PCI: 04:00.3
612 11:46:07.261965 USB0 port 0 enabled
613 11:46:07.265408 USB0 port 0 scanning...
614 11:46:07.268830 scan_static_bus for USB0 port 0
615 11:46:07.268912 USB2 port 0 enabled
616 11:46:07.271835 USB2 port 1 enabled
617 11:46:07.271917 USB2 port 2 enabled
618 11:46:07.275276 USB2 port 3 enabled
619 11:46:07.275358 USB3 port 0 enabled
620 11:46:07.278660 USB3 port 1 enabled
621 11:46:07.278742 USB3 port 2 enabled
622 11:46:07.281663 USB3 port 3 enabled
623 11:46:07.281745 USB2 port 4 enabled
624 11:46:07.285338 USB2 port 5 enabled
625 11:46:07.288451 USB2 port 0 scanning...
626 11:46:07.291937 scan_static_bus for USB2 port 0
627 11:46:07.295219 scan_static_bus for USB2 port 0 done
628 11:46:07.298621 scan_bus: bus USB2 port 0 finished in 6 msecs
629 11:46:07.298716 USB2 port 1 scanning...
630 11:46:07.301501 scan_static_bus for USB2 port 1
631 11:46:07.305143 scan_static_bus for USB2 port 1 done
632 11:46:07.311666 scan_bus: bus USB2 port 1 finished in 6 msecs
633 11:46:07.311749 USB2 port 2 scanning...
634 11:46:07.315059 scan_static_bus for USB2 port 2
635 11:46:07.318052 scan_static_bus for USB2 port 2 done
636 11:46:07.321545 scan_bus: bus USB2 port 2 finished in 6 msecs
637 11:46:07.324727 USB2 port 3 scanning...
638 11:46:07.328024 scan_static_bus for USB2 port 3
639 11:46:07.331739 scan_static_bus for USB2 port 3 done
640 11:46:07.334795 scan_bus: bus USB2 port 3 finished in 6 msecs
641 11:46:07.338085 USB3 port 0 scanning...
642 11:46:07.341417 scan_static_bus for USB3 port 0
643 11:46:07.344579 scan_static_bus for USB3 port 0 done
644 11:46:07.348134 scan_bus: bus USB3 port 0 finished in 6 msecs
645 11:46:07.351419 USB3 port 1 scanning...
646 11:46:07.351501 scan_static_bus for USB3 port 1
647 11:46:07.354853 scan_static_bus for USB3 port 1 done
648 11:46:07.361420 scan_bus: bus USB3 port 1 finished in 6 msecs
649 11:46:07.361504 USB3 port 2 scanning...
650 11:46:07.364617 scan_static_bus for USB3 port 2
651 11:46:07.368002 scan_static_bus for USB3 port 2 done
652 11:46:07.371380 scan_bus: bus USB3 port 2 finished in 6 msecs
653 11:46:07.374603 USB3 port 3 scanning...
654 11:46:07.377812 scan_static_bus for USB3 port 3
655 11:46:07.380832 scan_static_bus for USB3 port 3 done
656 11:46:07.384434 scan_bus: bus USB3 port 3 finished in 6 msecs
657 11:46:07.387745 USB2 port 4 scanning...
658 11:46:07.390841 scan_static_bus for USB2 port 4
659 11:46:07.394169 scan_static_bus for USB2 port 4 done
660 11:46:07.397719 scan_bus: bus USB2 port 4 finished in 6 msecs
661 11:46:07.401257 USB2 port 5 scanning...
662 11:46:07.404923 scan_static_bus for USB2 port 5
663 11:46:07.407595 scan_static_bus for USB2 port 5 done
664 11:46:07.411252 scan_bus: bus USB2 port 5 finished in 6 msecs
665 11:46:07.414113 scan_static_bus for USB0 port 0 done
666 11:46:07.417488 scan_bus: bus USB0 port 0 finished in 149 msecs
667 11:46:07.420639 scan_static_bus for PCI: 04:00.3 done
668 11:46:07.424291 scan_bus: bus PCI: 04:00.3 finished in 163 msecs
669 11:46:07.427285 PCI: 04:00.5 scanning...
670 11:46:07.430952 scan_static_bus for PCI: 04:00.5
671 11:46:07.433959 GENERIC: 0.0 enabled
672 11:46:07.437503 scan_static_bus for PCI: 04:00.5 done
673 11:46:07.441033 scan_bus: bus PCI: 04:00.5 finished in 8 msecs
674 11:46:07.441116 POST: 0x55
675 11:46:07.444260 scan_bus: bus PCI: 00:08.1 finished in 233 msecs
676 11:46:07.447375 PCI: 00:14.0 scanning...
677 11:46:07.451258 scan_generic_bus for PCI: 00:14.0
678 11:46:07.453922 scan_generic_bus for PCI: 00:14.0 done
679 11:46:07.457259 scan_bus: bus PCI: 00:14.0 finished in 6 msecs
680 11:46:07.460806 PCI: 00:14.3 scanning...
681 11:46:07.464072 scan_static_bus for PCI: 00:14.3
682 11:46:07.467044 PNP: 0c09.0 enabled
683 11:46:07.467127 PNP: 0c09.0 scanning...
684 11:46:07.470271 scan_static_bus for PNP: 0c09.0
685 11:46:07.473971 GENERIC: 0.0 enabled
686 11:46:07.474054 GENERIC: 1.0 enabled
687 11:46:07.477203 GENERIC: 0.0 enabled
688 11:46:07.480345 GENERIC: 0.0 scanning...
689 11:46:07.480427 scan_static_bus for GENERIC: 0.0
690 11:46:07.483794 I2C: 00:1a enabled
691 11:46:07.487242 scan_static_bus for GENERIC: 0.0 done
692 11:46:07.490094 scan_bus: bus GENERIC: 0.0 finished in 8 msecs
693 11:46:07.493401 GENERIC: 1.0 scanning...
694 11:46:07.496945 scan_static_bus for GENERIC: 1.0
695 11:46:07.500500 scan_static_bus for GENERIC: 1.0 done
696 11:46:07.503766 scan_bus: bus GENERIC: 1.0 finished in 6 msecs
697 11:46:07.506928 GENERIC: 0.0 scanning...
698 11:46:07.510730 scan_static_bus for GENERIC: 0.0
699 11:46:07.513589 scan_static_bus for GENERIC: 0.0 done
700 11:46:07.516964 scan_bus: bus GENERIC: 0.0 finished in 6 msecs
701 11:46:07.520080 scan_static_bus for PNP: 0c09.0 done
702 11:46:07.523830 scan_bus: bus PNP: 0c09.0 finished in 52 msecs
703 11:46:07.526824 scan_static_bus for PCI: 00:14.3 done
704 11:46:07.533380 scan_bus: bus PCI: 00:14.3 finished in 66 msecs
705 11:46:07.533464 POST: 0x55
706 11:46:07.536747 scan_bus: bus DOMAIN: 0000 finished in 571 msecs
707 11:46:07.539879 MMIO: fedc5000 scanning...
708 11:46:07.543359 scan_generic_bus for MMIO: fedc5000
709 11:46:07.546589 bus: MMIO: fedc5000[0]->I2C: 01:50 enabled
710 11:46:07.549990 scan_generic_bus for MMIO: fedc5000 done
711 11:46:07.556509 scan_bus: bus MMIO: fedc5000 finished in 10 msecs
712 11:46:07.556592 MMIO: fedca000 scanning...
713 11:46:07.559744 scan_static_bus for MMIO: fedca000
714 11:46:07.563359 GENERIC: 0.0 enabled
715 11:46:07.566798 scan_static_bus for MMIO: fedca000 done
716 11:46:07.570132 scan_bus: bus MMIO: fedca000 finished in 8 msecs
717 11:46:07.573247 MMIO: fedc4000 scanning...
718 11:46:07.576504 scan_generic_bus for MMIO: fedc4000
719 11:46:07.579772 bus: MMIO: fedc4000[0]->I2C: 02:15 enabled
720 11:46:07.583007 bus: MMIO: fedc4000[0]->I2C: 02:2c enabled
721 11:46:07.586285 bus: MMIO: fedc4000[0]->I2C: 02:5d enabled
722 11:46:07.593039 bus: MMIO: fedc4000[0]->GENERIC: 0.0 enabled
723 11:46:07.596687 scan_generic_bus for MMIO: fedc4000 done
724 11:46:07.599745 scan_bus: bus MMIO: fedc4000 finished in 22 msecs
725 11:46:07.602804 scan_static_bus for Root Device done
726 11:46:07.606151 scan_bus: bus Root Device finished in 663 msecs
727 11:46:07.609859 done
728 11:46:07.612677 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 984 ms
729 11:46:07.612760 POST: 0x73
730 11:46:07.616026 found VGA at PCI: 04:00.0
731 11:46:07.619596 Setting up VGA for PCI: 04:00.0
732 11:46:07.622832 Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:08.1
733 11:46:07.629322 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
734 11:46:07.632397 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
735 11:46:07.636000 Allocating resources...
736 11:46:07.636082 Reading resources...
737 11:46:07.639253 Root Device read_resources bus 0 link: 0
738 11:46:07.646130 CPU_CLUSTER: 0 read_resources bus 0 link: 0
739 11:46:07.649071 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
740 11:46:07.652249 DOMAIN: 0000 read_resources bus 0 link: 0
741 11:46:07.658763 Adding PCIe enhanced config space BAR 0xf8000000-0xfc000000.
742 11:46:07.662155 PCI: 00:01.2 read_resources bus 1 link: 0
743 11:46:07.665385 PCI: 00:01.2 read_resources bus 1 link: 0 done
744 11:46:07.672519 PCI: 00:01.3 read_resources bus 2 link: 0
745 11:46:07.683912 PCI: 00:01.3 read_resources bus 2 link: 0 done
746 11:46:07.687389 PCI: 00:01.7 read_resources bus 3 link: 0
747 11:46:07.690426 PCI: 00:01.7 read_resources bus 3 link: 0 done
748 11:46:07.693567 PCI: 00:08.1 read_resources bus 4 link: 0
749 11:46:07.700595 PCI: 04:00.3 read_resources bus 0 link: 0
750 11:46:07.704053 USB0 port 0 read_resources bus 0 link: 0
751 11:46:07.706942 USB0 port 0 read_resources bus 0 link: 0 done
752 11:46:07.710184 PCI: 04:00.3 read_resources bus 0 link: 0 done
753 11:46:07.716944 PCI: 04:00.5 read_resources bus 0 link: 0
754 11:46:07.720525 PCI: 04:00.5 read_resources bus 0 link: 0 done
755 11:46:07.723721 PCI: 00:08.1 read_resources bus 4 link: 0 done
756 11:46:07.727108 ACPI GNVS at 0xca682000
757 11:46:07.730014 PCI: 00:14.3 read_resources bus 0 link: 0
758 11:46:07.733347 PNP: 0c09.0 read_resources bus 0 link: 0
759 11:46:07.737070 GENERIC: 0.0 read_resources bus 0 link: 0
760 11:46:07.740374 GENERIC: 0.0 read_resources bus 0 link: 0 done
761 11:46:07.746817 PNP: 0c09.0 read_resources bus 0 link: 0 done
762 11:46:07.750379 PCI: 00:14.3 read_resources bus 0 link: 0 done
763 11:46:07.753574 DOMAIN: 0000 read_resources bus 0 link: 0 done
764 11:46:07.760126 MMIO: fedc5000 read_resources bus 1 link: 0
765 11:46:07.763213 MMIO: fedc5000 read_resources bus 1 link: 0 done
766 11:46:07.767194 MMIO: fedca000 read_resources bus 0 link: 0
767 11:46:07.769990 MMIO: fedca000 read_resources bus 0 link: 0 done
768 11:46:07.776683 MMIO: fedc4000 read_resources bus 2 link: 0
769 11:46:07.779992 MMIO: fedc4000 read_resources bus 2 link: 0 done
770 11:46:07.783501 Root Device read_resources bus 0 link: 0 done
771 11:46:07.786973 Done reading resources.
772 11:46:07.790174 Show resources in subtree (Root Device)...After reading.
773 11:46:07.796725 Root Device child on link 0 CPU_CLUSTER: 0
774 11:46:07.799775 CPU_CLUSTER: 0 child on link 0 APIC: 00
775 11:46:07.799857 APIC: 00
776 11:46:07.803771 DOMAIN: 0000 child on link 0 PCI: 00:00.0
777 11:46:07.813456 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
778 11:46:07.819695 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffffffff flags 40040200 index 10000100
779 11:46:07.823554 PCI: 00:00.0
780 11:46:07.829591 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 0
781 11:46:07.839642 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
782 11:46:07.846290 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 2
783 11:46:07.855976 PCI: 00:00.0 resource base 100000 size 1f00000 align 0 gran 0 limit 0 flags e0004200 index 3
784 11:46:07.862960 PCI: 00:00.0 resource base 2000000 size 1c0000 align 0 gran 0 limit 0 flags f0004200 index 4
785 11:46:07.873023 PCI: 00:00.0 resource base 21c0000 size c9640000 align 0 gran 0 limit 0 flags e0004200 index 5
786 11:46:07.882385 PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
787 11:46:07.889272 PCI: 00:00.0 resource base cc000000 size 4000000 align 0 gran 0 limit 0 flags f0004200 index 6
788 11:46:07.899111 PCI: 00:00.0 resource base 100000000 size 2f340000 align 0 gran 0 limit 0 flags e0004200 index 7
789 11:46:07.909237 PCI: 00:00.0 resource base 12f340000 size cc0000 align 0 gran 0 limit 0 flags f0004200 index 8
790 11:46:07.915762 PCI: 00:00.0 resource base cb800000 size 800000 align 0 gran 0 limit 0 flags f0004200 index 9
791 11:46:07.925679 PCI: 00:00.0 resource base cb7fe000 size 2000 align 0 gran 0 limit 0 flags f0004200 index a
792 11:46:07.932588 PCI: 00:00.0 resource base ca7fe000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
793 11:46:07.941864 PCI: 00:00.0 resource base fec01000 size 1000 align 0 gran 0 limit 0 flags c0000200 index fec01000
794 11:46:07.941949 PCI: 00:00.2
795 11:46:07.952144 PCI: 00:00.2 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 44
796 11:46:07.952228 PCI: 00:01.0
797 11:46:07.959013 PCI: 00:01.2 child on link 0 PCI: 01:00.0
798 11:46:07.965484 PCI: 00:01.2 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
799 11:46:07.975688 PCI: 00:01.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
800 11:46:07.981713 PCI: 00:01.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
801 11:46:07.984959 PCI: 01:00.0
802 11:46:07.991879 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
803 11:46:07.998125 PCI: 00:01.3 child on link 0 PCI: 02:00.0
804 11:46:08.004603 PCI: 00:01.3 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
805 11:46:08.014750 PCI: 00:01.3 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
806 11:46:08.021261 PCI: 00:01.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
807 11:46:08.024318 PCI: 02:00.0
808 11:46:08.030921 PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
809 11:46:08.034731 PCI: 00:01.7 child on link 0 PCI: 03:00.0
810 11:46:08.044353 PCI: 00:01.7 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
811 11:46:08.050878 PCI: 00:01.7 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
812 11:46:08.061118 PCI: 00:01.7 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
813 11:46:08.061205 PCI: 03:00.0
814 11:46:08.070874 PCI: 03:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
815 11:46:08.070958 PCI: 00:08.0
816 11:46:08.077630 PCI: 00:08.1 child on link 0 PCI: 04:00.0
817 11:46:08.084119 PCI: 00:08.1 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
818 11:46:08.094224 PCI: 00:08.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
819 11:46:08.100586 PCI: 00:08.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
820 11:46:08.104025 PCI: 04:00.0
821 11:46:08.110767 PCI: 04:00.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 10
822 11:46:08.120589 PCI: 04:00.0 resource base 0 size 200000 align 21 gran 21 limit ffffffffffffffff flags 1201 index 18
823 11:46:08.130300 PCI: 04:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 20
824 11:46:08.136937 PCI: 04:00.0 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 24
825 11:46:08.140396 PCI: 04:00.1
826 11:46:08.147006 PCI: 04:00.1 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 10
827 11:46:08.150087 PCI: 04:00.2
828 11:46:08.157017 PCI: 04:00.2 resource base 0 size 100000 align 20 gran 20 limit ffffffff flags 200 index 18
829 11:46:08.167181 PCI: 04:00.2 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 24
830 11:46:08.170661 PCI: 04:00.3 child on link 0 USB0 port 0
831 11:46:08.179892 PCI: 04:00.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 10
832 11:46:08.183303 USB0 port 0 child on link 0 USB2 port 0
833 11:46:08.183386 USB2 port 0
834 11:46:08.187031 USB2 port 1
835 11:46:08.187114 USB2 port 2
836 11:46:08.189985 USB2 port 3
837 11:46:08.190068 USB3 port 0
838 11:46:08.193555 USB3 port 1
839 11:46:08.193637 USB3 port 2
840 11:46:08.196624 USB3 port 3
841 11:46:08.196706 USB2 port 4
842 11:46:08.200211 USB2 port 5
843 11:46:08.203667 PCI: 04:00.5 child on link 0 GENERIC: 0.0
844 11:46:08.213534 PCI: 04:00.5 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 10
845 11:46:08.213618 GENERIC: 0.0
846 11:46:08.216615 PCI: 04:00.7
847 11:46:08.222979 PCI: 04:00.7 resource base 0 size 100000 align 20 gran 20 limit ffffffff flags 200 index 18
848 11:46:08.232962 PCI: 04:00.7 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 24
849 11:46:08.233046 PCI: 00:14.0
850 11:46:08.236199 PCI: 00:14.3 child on link 0 PNP: 0c09.0
851 11:46:08.246025 PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
852 11:46:08.256479 PCI: 00:14.3 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100
853 11:46:08.262969 PCI: 00:14.3 resource base fec10000 size 400 align 0 gran 0 limit 0 flags e0040200 index 2
854 11:46:08.273196 PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
855 11:46:08.279220 PCI: 00:14.3 resource base fedc4000 size 2000 align 0 gran 0 limit 0 flags c0000200 index 4
856 11:46:08.282665 PNP: 0c09.0 child on link 0 GENERIC: 0.0
857 11:46:08.292695 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
858 11:46:08.296272 GENERIC: 0.0 child on link 0 I2C: 00:1a
859 11:46:08.296355 I2C: 00:1a
860 11:46:08.299318 GENERIC: 1.0
861 11:46:08.299400 GENERIC: 0.0
862 11:46:08.302631 PCI: 00:18.0
863 11:46:08.302713 PCI: 00:18.1
864 11:46:08.306254 PCI: 00:18.2
865 11:46:08.306336 PCI: 00:18.3
866 11:46:08.309269 PCI: 00:18.4
867 11:46:08.309351 PCI: 00:18.5
868 11:46:08.309415 PCI: 00:18.6
869 11:46:08.312598 PCI: 00:18.7
870 11:46:08.312680 GENERIC: 0.1
871 11:46:08.318793 MMIO: fedc5000 child on link 0 I2C: 01:50
872 11:46:08.318876 I2C: 01:50
873 11:46:08.322895 MMIO: fedca000 child on link 0 GENERIC: 0.0
874 11:46:08.325715 GENERIC: 0.0
875 11:46:08.325796 MMIO: fedce000
876 11:46:08.329272 MMIO: fedcf000
877 11:46:08.332662 MMIO: fedc4000 child on link 0 I2C: 02:15
878 11:46:08.332746 I2C: 02:15
879 11:46:08.335499 I2C: 02:2c
880 11:46:08.335581 I2C: 02:5d
881 11:46:08.335647 GENERIC: 0.0
882 11:46:08.345405 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
883 11:46:08.348827 PCI: 00:01.2 io: size: 0 align: 12 gran: 12 limit: ffffffff
884 11:46:08.355958 PCI: 00:01.2 io: size: 0 align: 12 gran: 12 limit: ffffffff done
885 11:46:08.361776 PCI: 00:01.2 mem: size: 0 align: 20 gran: 20 limit: ffffffff
886 11:46:08.365086 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
887 11:46:08.371779 PCI: 00:01.2 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
888 11:46:08.378614 PCI: 00:01.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
889 11:46:08.385235 PCI: 00:01.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
890 11:46:08.388508 PCI: 00:01.3 io: size: 0 align: 12 gran: 12 limit: ffffffff
891 11:46:08.394917 PCI: 00:01.3 io: size: 0 align: 12 gran: 12 limit: ffffffff done
892 11:46:08.401452 PCI: 00:01.3 mem: size: 0 align: 20 gran: 20 limit: ffffffff
893 11:46:08.404722 PCI: 02:00.0 10 * [0x0 - 0xfff] mem
894 11:46:08.411710 PCI: 00:01.3 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
895 11:46:08.418563 PCI: 00:01.3 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
896 11:46:08.425131 PCI: 00:01.3 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
897 11:46:08.428384 PCI: 00:01.7 io: size: 0 align: 12 gran: 12 limit: ffffffff
898 11:46:08.434697 PCI: 00:01.7 io: size: 0 align: 12 gran: 12 limit: ffffffff done
899 11:46:08.441488 PCI: 00:01.7 mem: size: 0 align: 20 gran: 20 limit: ffffffff
900 11:46:08.444995 PCI: 03:00.0 10 * [0x0 - 0x3fff] mem
901 11:46:08.451426 PCI: 00:01.7 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
902 11:46:08.457797 PCI: 00:01.7 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
903 11:46:08.464293 PCI: 00:01.7 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
904 11:46:08.467462 PCI: 00:08.1 io: size: 0 align: 12 gran: 12 limit: ffffffff
905 11:46:08.470897 PCI: 04:00.0 20 * [0x0 - 0xff] io
906 11:46:08.477711 PCI: 00:08.1 io: size: 1000 align: 12 gran: 12 limit: ffff done
907 11:46:08.484280 PCI: 00:08.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff
908 11:46:08.487944 PCI: 04:00.2 18 * [0x0 - 0xfffff] mem
909 11:46:08.490820 PCI: 04:00.3 10 * [0x100000 - 0x1fffff] mem
910 11:46:08.494202 PCI: 04:00.7 18 * [0x200000 - 0x2fffff] mem
911 11:46:08.501137 PCI: 04:00.0 24 * [0x300000 - 0x37ffff] mem
912 11:46:08.504034 PCI: 04:00.5 10 * [0x380000 - 0x3bffff] mem
913 11:46:08.507514 PCI: 04:00.1 10 * [0x3c0000 - 0x3c3fff] mem
914 11:46:08.513963 PCI: 04:00.2 24 * [0x3c4000 - 0x3c5fff] mem
915 11:46:08.517645 PCI: 04:00.7 24 * [0x3c6000 - 0x3c7fff] mem
916 11:46:08.524031 PCI: 00:08.1 mem: size: 400000 align: 20 gran: 20 limit: ffffffff done
917 11:46:08.530678 PCI: 00:08.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
918 11:46:08.533827 PCI: 04:00.0 10 * [0x0 - 0xfffffff] prefmem
919 11:46:08.537027 PCI: 04:00.0 18 * [0x10000000 - 0x101fffff] prefmem
920 11:46:08.546934 PCI: 00:08.1 prefmem: size: 10200000 align: 28 gran: 20 limit: ffffffffffffffff done
921 11:46:08.553853 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
922 11:46:08.557336 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
923 11:46:08.563944 update_constraints: PCI: 00:14.3 10000000 base 00000000 limit 00000fff io (fixed)
924 11:46:08.573389 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
925 11:46:08.573474 DOMAIN: 0000: Resource ranges:
926 11:46:08.577071 * Base: 1000, Size: f000, Tag: 100
927 11:46:08.583466 PCI: 00:08.1 1c * [0x1000 - 0x1fff] limit: 1fff io
928 11:46:08.590368 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
929 11:46:08.593171 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffffffff
930 11:46:08.603571 update_constraints: PCI: 00:00.0 00 base 00000000 limit 0009ffff mem (fixed)
931 11:46:08.610311 update_constraints: PCI: 00:00.0 01 base 000a0000 limit 000bffff mem (fixed)
932 11:46:08.616756 update_constraints: PCI: 00:00.0 02 base 000c0000 limit 000fffff mem (fixed)
933 11:46:08.622982 update_constraints: PCI: 00:00.0 03 base 00100000 limit 01ffffff mem (fixed)
934 11:46:08.629712 update_constraints: PCI: 00:00.0 04 base 02000000 limit 021bffff mem (fixed)
935 11:46:08.636097 update_constraints: PCI: 00:00.0 05 base 021c0000 limit cb7fffff mem (fixed)
936 11:46:08.643110 update_constraints: PCI: 00:00.0 c0010058 base f8000000 limit fbffffff mem (fixed)
937 11:46:08.649418 update_constraints: PCI: 00:00.0 06 base cc000000 limit cfffffff mem (fixed)
938 11:46:08.655969 update_constraints: PCI: 00:00.0 07 base 100000000 limit 12f33ffff mem (fixed)
939 11:46:08.665966 update_constraints: PCI: 00:00.0 08 base 12f340000 limit 12fffffff mem (fixed)
940 11:46:08.672682 update_constraints: PCI: 00:00.0 09 base cb800000 limit cbffffff mem (fixed)
941 11:46:08.679290 update_constraints: PCI: 00:00.0 0a base cb7fe000 limit cb7fffff mem (fixed)
942 11:46:08.685688 update_constraints: PCI: 00:00.0 0b base ca7fe000 limit cb7fdfff mem (fixed)
943 11:46:08.692695 update_constraints: PCI: 00:00.0 fec01000 base fec01000 limit fec01fff mem (fixed)
944 11:46:08.698893 update_constraints: PCI: 00:14.3 10000100 base ff000000 limit ffffffff mem (fixed)
945 11:46:08.705595 update_constraints: PCI: 00:14.3 02 base fec10000 limit fec103ff mem (fixed)
946 11:46:08.711992 update_constraints: PCI: 00:14.3 03 base fec00000 limit fec00fff mem (fixed)
947 11:46:08.718628 update_constraints: PCI: 00:14.3 04 base fedc4000 limit fedc5fff mem (fixed)
948 11:46:08.721931 DOMAIN: 0000: Resource ranges:
949 11:46:08.728909 * Base: d0000000, Size: 28000000, Tag: 200
950 11:46:08.731732 * Base: fc000000, Size: 2c00000, Tag: 200
951 11:46:08.735259 * Base: fec02000, Size: e000, Tag: 200
952 11:46:08.738445 * Base: fec11000, Size: 1b3000, Tag: 200
953 11:46:08.742019 * Base: fedc6000, Size: 23a000, Tag: 200
954 11:46:08.745225 * Base: 130000000, Size: fffed0000000, Tag: 100200
955 11:46:08.751845 PCI: 00:08.1 24 * [0xd0000000 - 0xe01fffff] limit: e01fffff prefmem
956 11:46:08.758369 PCI: 00:08.1 20 * [0xe0200000 - 0xe05fffff] limit: e05fffff mem
957 11:46:08.764880 PCI: 00:01.2 20 * [0xe0600000 - 0xe06fffff] limit: e06fffff mem
958 11:46:08.771726 PCI: 00:01.3 20 * [0xe0700000 - 0xe07fffff] limit: e07fffff mem
959 11:46:08.774972 PCI: 00:01.7 20 * [0xe0800000 - 0xe08fffff] limit: e08fffff mem
960 11:46:08.781470 PCI: 00:00.2 44 * [0xe0900000 - 0xe097ffff] limit: e097ffff mem
961 11:46:08.788239 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffffffff done
962 11:46:08.794803 PCI: 00:01.2 mem: base: e0600000 size: 100000 align: 20 gran: 20 limit: e06fffff
963 11:46:08.798028 PCI: 00:01.2: Resource ranges:
964 11:46:08.801236 * Base: e0600000, Size: 100000, Tag: 200
965 11:46:08.807717 PCI: 01:00.0 10 * [0xe0600000 - 0xe0603fff] limit: e0603fff mem
966 11:46:08.817668 PCI: 00:01.2 mem: base: e0600000 size: 100000 align: 20 gran: 20 limit: e06fffff done
967 11:46:08.824292 PCI: 00:01.3 mem: base: e0700000 size: 100000 align: 20 gran: 20 limit: e07fffff
968 11:46:08.827470 PCI: 00:01.3: Resource ranges:
969 11:46:08.831104 * Base: e0700000, Size: 100000, Tag: 200
970 11:46:08.834327 PCI: 02:00.0 10 * [0xe0700000 - 0xe0700fff] limit: e0700fff mem
971 11:46:08.844510 PCI: 00:01.3 mem: base: e0700000 size: 100000 align: 20 gran: 20 limit: e07fffff done
972 11:46:08.850952 PCI: 00:01.7 mem: base: e0800000 size: 100000 align: 20 gran: 20 limit: e08fffff
973 11:46:08.854238 PCI: 00:01.7: Resource ranges:
974 11:46:08.857563 * Base: e0800000, Size: 100000, Tag: 200
975 11:46:08.864082 PCI: 03:00.0 10 * [0xe0800000 - 0xe0803fff] limit: e0803fff mem
976 11:46:08.871051 PCI: 00:01.7 mem: base: e0800000 size: 100000 align: 20 gran: 20 limit: e08fffff done
977 11:46:08.877371 PCI: 00:08.1 io: base: 1000 size: 1000 align: 12 gran: 12 limit: 1fff
978 11:46:08.880749 PCI: 00:08.1: Resource ranges:
979 11:46:08.884145 * Base: 1000, Size: 1000, Tag: 100
980 11:46:08.887040 PCI: 04:00.0 20 * [0x1000 - 0x10ff] limit: 10ff io
981 11:46:08.893744 PCI: 00:08.1 io: base: 1000 size: 1000 align: 12 gran: 12 limit: 1fff done
982 11:46:08.900855 PCI: 00:08.1 prefmem: base: d0000000 size: 10200000 align: 28 gran: 20 limit: e01fffff
983 11:46:08.903771 PCI: 00:08.1: Resource ranges:
984 11:46:08.910137 * Base: d0000000, Size: 10200000, Tag: 1200
985 11:46:08.913511 PCI: 04:00.0 10 * [0xd0000000 - 0xdfffffff] limit: dfffffff prefmem
986 11:46:08.920270 PCI: 04:00.0 18 * [0xe0000000 - 0xe01fffff] limit: e01fffff prefmem
987 11:46:08.930311 PCI: 00:08.1 prefmem: base: d0000000 size: 10200000 align: 28 gran: 20 limit: e01fffff done
988 11:46:08.936548 PCI: 00:08.1 mem: base: e0200000 size: 400000 align: 20 gran: 20 limit: e05fffff
989 11:46:08.939901 PCI: 00:08.1: Resource ranges:
990 11:46:08.943279 * Base: e0200000, Size: 400000, Tag: 200
991 11:46:08.949967 PCI: 04:00.2 18 * [0xe0200000 - 0xe02fffff] limit: e02fffff mem
992 11:46:08.953866 PCI: 04:00.3 10 * [0xe0300000 - 0xe03fffff] limit: e03fffff mem
993 11:46:08.960116 PCI: 04:00.7 18 * [0xe0400000 - 0xe04fffff] limit: e04fffff mem
994 11:46:08.966673 PCI: 04:00.0 24 * [0xe0500000 - 0xe057ffff] limit: e057ffff mem
995 11:46:08.972844 PCI: 04:00.5 10 * [0xe0580000 - 0xe05bffff] limit: e05bffff mem
996 11:46:08.979458 PCI: 04:00.1 10 * [0xe05c0000 - 0xe05c3fff] limit: e05c3fff mem
997 11:46:08.982752 PCI: 04:00.2 24 * [0xe05c4000 - 0xe05c5fff] limit: e05c5fff mem
998 11:46:08.989438 PCI: 04:00.7 24 * [0xe05c6000 - 0xe05c7fff] limit: e05c7fff mem
999 11:46:08.996247 PCI: 00:08.1 mem: base: e0200000 size: 400000 align: 20 gran: 20 limit: e05fffff done
1000 11:46:09.002851 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1001 11:46:09.009323 Root Device assign_resources, bus 0 link: 0
1002 11:46:09.012753 DOMAIN: 0000 assign_resources, bus 0 link: 0
1003 11:46:09.015897 PCI: 00:00.0 missing set_resources
1004 11:46:09.022486 PCI: 00:00.2 44 <- [0x00e0900000 - 0x00e097ffff] size 0x00080000 gran 0x13 mem
1005 11:46:09.028928 PCI: 00:01.2 1c <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x0c bus 01 io
1006 11:46:09.039037 PCI: 00:01.2 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1007 11:46:09.045414 PCI: 00:01.2 20 <- [0x00e0600000 - 0x00e06fffff] size 0x00100000 gran 0x14 bus 01 mem
1008 11:46:09.048867 PCI: 00:01.2 assign_resources, bus 1 link: 0
1009 11:46:09.058998 PCI: 01:00.0 10 <- [0x00e0600000 - 0x00e0603fff] size 0x00004000 gran 0x0e mem64
1010 11:46:09.061802 PCI: 00:01.2 assign_resources, bus 1 link: 0
1011 11:46:09.068901 PCI: 00:01.3 1c <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x0c bus 02 io
1012 11:46:09.078503 PCI: 00:01.3 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
1013 11:46:09.085385 PCI: 00:01.3 20 <- [0x00e0700000 - 0x00e07fffff] size 0x00100000 gran 0x14 bus 02 mem
1014 11:46:09.088576 PCI: 00:01.3 assign_resources, bus 2 link: 0
1015 11:46:09.102113 PCI: 02:00.0 10 <- [0x00e0700000 - 0x00e0700fff] size 0x00001000 gran 0x0c mem
1016 11:46:09.109186 PCI: 00:01.3 assign_resources, bus 2 link: 0
1017 11:46:09.115531 PCI: 00:01.7 1c <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x0c bus 03 io
1018 11:46:09.125564 PCI: 00:01.7 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 03 prefmem
1019 11:46:09.131749 PCI: 00:01.7 20 <- [0x00e0800000 - 0x00e08fffff] size 0x00100000 gran 0x14 bus 03 mem
1020 11:46:09.135571 PCI: 00:01.7 assign_resources, bus 3 link: 0
1021 11:46:09.142490 PCI: 03:00.0 10 <- [0x00e0800000 - 0x00e0803fff] size 0x00004000 gran 0x0e mem64
1022 11:46:09.148395 PCI: 00:01.7 assign_resources, bus 3 link: 0
1023 11:46:09.155097 PCI: 00:08.1 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 04 io
1024 11:46:09.161690 PCI: 00:08.1 24 <- [0x00d0000000 - 0x00e01fffff] size 0x10200000 gran 0x14 bus 04 prefmem
1025 11:46:09.171881 PCI: 00:08.1 20 <- [0x00e0200000 - 0x00e05fffff] size 0x00400000 gran 0x14 bus 04 mem
1026 11:46:09.175199 PCI: 00:08.1 assign_resources, bus 4 link: 0
1027 11:46:09.181634 PCI: 04:00.0 10 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem64
1028 11:46:09.188595 PCI: 04:00.0 18 <- [0x00e0000000 - 0x00e01fffff] size 0x00200000 gran 0x15 prefmem64
1029 11:46:09.194908 PCI: 04:00.0 20 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io
1030 11:46:09.201977 PCI: 04:00.0 24 <- [0x00e0500000 - 0x00e057ffff] size 0x00080000 gran 0x13 mem
1031 11:46:09.211502 PCI: 04:00.1 10 <- [0x00e05c0000 - 0x00e05c3fff] size 0x00004000 gran 0x0e mem
1032 11:46:09.217737 PCI: 04:00.2 18 <- [0x00e0200000 - 0x00e02fffff] size 0x00100000 gran 0x14 mem
1033 11:46:09.224410 PCI: 04:00.2 24 <- [0x00e05c4000 - 0x00e05c5fff] size 0x00002000 gran 0x0d mem
1034 11:46:09.231072 PCI: 04:00.3 10 <- [0x00e0300000 - 0x00e03fffff] size 0x00100000 gran 0x14 mem64
1035 11:46:09.234707 PCI: 04:00.3 assign_resources, bus 0 link: 0
1036 11:46:09.237700 PCI: 04:00.3 assign_resources, bus 0 link: 0
1037 11:46:09.247782 PCI: 04:00.5 10 <- [0x00e0580000 - 0x00e05bffff] size 0x00040000 gran 0x12 mem
1038 11:46:09.250782 PCI: 04:00.5 assign_resources, bus 0 link: 0
1039 11:46:09.253996 PCI: 04:00.5 assign_resources, bus 0 link: 0
1040 11:46:09.260761 PCI: 04:00.7 18 <- [0x00e0400000 - 0x00e04fffff] size 0x00100000 gran 0x14 mem
1041 11:46:09.267142 PCI: 04:00.7 24 <- [0x00e05c6000 - 0x00e05c7fff] size 0x00002000 gran 0x0d mem
1042 11:46:09.273830 PCI: 00:08.1 assign_resources, bus 4 link: 0
1043 11:46:09.276755 PCI: 00:14.3 assign_resources, bus 0 link: 0
1044 11:46:09.280127 PCI: 00:14.3 assign_resources, bus 0 link: 0
1045 11:46:09.283824 DOMAIN: 0000 assign_resources, bus 0 link: 0
1046 11:46:09.286762 Root Device assign_resources, bus 0 link: 0
1047 11:46:09.290549 Done setting resources.
1048 11:46:09.297130 Show resources in subtree (Root Device)...After assigning values.
1049 11:46:09.300240 Root Device child on link 0 CPU_CLUSTER: 0
1050 11:46:09.303464 CPU_CLUSTER: 0 child on link 0 APIC: 00
1051 11:46:09.303542 APIC: 00
1052 11:46:09.309793 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1053 11:46:09.316790 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1054 11:46:09.326332 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffffffff flags 40040200 index 10000100
1055 11:46:09.326475 PCI: 00:00.0
1056 11:46:09.336589 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 0
1057 11:46:09.342811 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1058 11:46:09.353100 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 2
1059 11:46:09.359837 PCI: 00:00.0 resource base 100000 size 1f00000 align 0 gran 0 limit 0 flags e0004200 index 3
1060 11:46:09.369740 PCI: 00:00.0 resource base 2000000 size 1c0000 align 0 gran 0 limit 0 flags f0004200 index 4
1061 11:46:09.376021 PCI: 00:00.0 resource base 21c0000 size c9640000 align 0 gran 0 limit 0 flags e0004200 index 5
1062 11:46:09.386107 PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
1063 11:46:09.395917 PCI: 00:00.0 resource base cc000000 size 4000000 align 0 gran 0 limit 0 flags f0004200 index 6
1064 11:46:09.402248 PCI: 00:00.0 resource base 100000000 size 2f340000 align 0 gran 0 limit 0 flags e0004200 index 7
1065 11:46:09.412118 PCI: 00:00.0 resource base 12f340000 size cc0000 align 0 gran 0 limit 0 flags f0004200 index 8
1066 11:46:09.422437 PCI: 00:00.0 resource base cb800000 size 800000 align 0 gran 0 limit 0 flags f0004200 index 9
1067 11:46:09.428821 PCI: 00:00.0 resource base cb7fe000 size 2000 align 0 gran 0 limit 0 flags f0004200 index a
1068 11:46:09.438624 PCI: 00:00.0 resource base ca7fe000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1069 11:46:09.445346 PCI: 00:00.0 resource base fec01000 size 1000 align 0 gran 0 limit 0 flags c0000200 index fec01000
1070 11:46:09.448527 PCI: 00:00.2
1071 11:46:09.458327 PCI: 00:00.2 resource base e0900000 size 80000 align 19 gran 19 limit e097ffff flags 60000200 index 44
1072 11:46:09.458471 PCI: 00:01.0
1073 11:46:09.461862 PCI: 00:01.2 child on link 0 PCI: 01:00.0
1074 11:46:09.471860 PCI: 00:01.2 resource base ffffffff size 0 align 12 gran 12 limit ffffffff flags 20080102 index 1c
1075 11:46:09.481928 PCI: 00:01.2 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1076 11:46:09.491731 PCI: 00:01.2 resource base e0600000 size 100000 align 20 gran 20 limit e06fffff flags 60080202 index 20
1077 11:46:09.491837 PCI: 01:00.0
1078 11:46:09.501560 PCI: 01:00.0 resource base e0600000 size 4000 align 14 gran 14 limit e0603fff flags 60000201 index 10
1079 11:46:09.504969 PCI: 00:01.3 child on link 0 PCI: 02:00.0
1080 11:46:09.514795 PCI: 00:01.3 resource base ffffffff size 0 align 12 gran 12 limit ffffffff flags 20080102 index 1c
1081 11:46:09.525092 PCI: 00:01.3 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1082 11:46:09.535150 PCI: 00:01.3 resource base e0700000 size 100000 align 20 gran 20 limit e07fffff flags 60080202 index 20
1083 11:46:09.538310 PCI: 02:00.0
1084 11:46:09.544832 PCI: 02:00.0 resource base e0700000 size 1000 align 12 gran 12 limit e0700fff flags 60000200 index 10
1085 11:46:09.551583 PCI: 00:01.7 child on link 0 PCI: 03:00.0
1086 11:46:09.558344 PCI: 00:01.7 resource base ffffffff size 0 align 12 gran 12 limit ffffffff flags 20080102 index 1c
1087 11:46:09.568120 PCI: 00:01.7 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1088 11:46:09.577704 PCI: 00:01.7 resource base e0800000 size 100000 align 20 gran 20 limit e08fffff flags 60080202 index 20
1089 11:46:09.581143 PCI: 03:00.0
1090 11:46:09.591245 PCI: 03:00.0 resource base e0800000 size 4000 align 14 gran 14 limit e0803fff flags 60000201 index 10
1091 11:46:09.591350 PCI: 00:08.0
1092 11:46:09.594262 PCI: 00:08.1 child on link 0 PCI: 04:00.0
1093 11:46:09.604754 PCI: 00:08.1 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c
1094 11:46:09.614475 PCI: 00:08.1 resource base d0000000 size 10200000 align 28 gran 20 limit e01fffff flags 60081202 index 24
1095 11:46:09.624445 PCI: 00:08.1 resource base e0200000 size 400000 align 20 gran 20 limit e05fffff flags 60080202 index 20
1096 11:46:09.624558 PCI: 04:00.0
1097 11:46:09.634622 PCI: 04:00.0 resource base d0000000 size 10000000 align 28 gran 28 limit dfffffff flags 60001201 index 10
1098 11:46:09.644142 PCI: 04:00.0 resource base e0000000 size 200000 align 21 gran 21 limit e01fffff flags 60001201 index 18
1099 11:46:09.650648 PCI: 04:00.0 resource base 1000 size 100 align 8 gran 8 limit 10ff flags 60000100 index 20
1100 11:46:09.660747 PCI: 04:00.0 resource base e0500000 size 80000 align 19 gran 19 limit e057ffff flags 60000200 index 24
1101 11:46:09.663844 PCI: 04:00.1
1102 11:46:09.670535 PCI: 04:00.1 resource base e05c0000 size 4000 align 14 gran 14 limit e05c3fff flags 60000200 index 10
1103 11:46:09.673825 PCI: 04:00.2
1104 11:46:09.683958 PCI: 04:00.2 resource base e0200000 size 100000 align 20 gran 20 limit e02fffff flags 60000200 index 18
1105 11:46:09.693457 PCI: 04:00.2 resource base e05c4000 size 2000 align 13 gran 13 limit e05c5fff flags 60000200 index 24
1106 11:46:09.697187 PCI: 04:00.3 child on link 0 USB0 port 0
1107 11:46:09.707228 PCI: 04:00.3 resource base e0300000 size 100000 align 20 gran 20 limit e03fffff flags 60000201 index 10
1108 11:46:09.710141 USB0 port 0 child on link 0 USB2 port 0
1109 11:46:09.710223 USB2 port 0
1110 11:46:09.713506 USB2 port 1
1111 11:46:09.713587 USB2 port 2
1112 11:46:09.717383 USB2 port 3
1113 11:46:09.717465 USB3 port 0
1114 11:46:09.720166 USB3 port 1
1115 11:46:09.720247 USB3 port 2
1116 11:46:09.723476 USB3 port 3
1117 11:46:09.723558 USB2 port 4
1118 11:46:09.727047 USB2 port 5
1119 11:46:09.730292 PCI: 04:00.5 child on link 0 GENERIC: 0.0
1120 11:46:09.739875 PCI: 04:00.5 resource base e0580000 size 40000 align 18 gran 18 limit e05bffff flags 60000200 index 10
1121 11:46:09.739992 GENERIC: 0.0
1122 11:46:09.743500 PCI: 04:00.7
1123 11:46:09.753434 PCI: 04:00.7 resource base e0400000 size 100000 align 20 gran 20 limit e04fffff flags 60000200 index 18
1124 11:46:09.763323 PCI: 04:00.7 resource base e05c6000 size 2000 align 13 gran 13 limit e05c7fff flags 60000200 index 24
1125 11:46:09.763410 PCI: 00:14.0
1126 11:46:09.766513 PCI: 00:14.3 child on link 0 PNP: 0c09.0
1127 11:46:09.776531 PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
1128 11:46:09.786120 PCI: 00:14.3 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100
1129 11:46:09.793428 PCI: 00:14.3 resource base fec10000 size 400 align 0 gran 0 limit 0 flags e0040200 index 2
1130 11:46:09.802815 PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
1131 11:46:09.809432 PCI: 00:14.3 resource base fedc4000 size 2000 align 0 gran 0 limit 0 flags c0000200 index 4
1132 11:46:09.812543 PNP: 0c09.0 child on link 0 GENERIC: 0.0
1133 11:46:09.822867 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1134 11:46:09.826283 GENERIC: 0.0 child on link 0 I2C: 00:1a
1135 11:46:09.826364 I2C: 00:1a
1136 11:46:09.829520 GENERIC: 1.0
1137 11:46:09.829600 GENERIC: 0.0
1138 11:46:09.832500 PCI: 00:18.0
1139 11:46:09.832581 PCI: 00:18.1
1140 11:46:09.835869 PCI: 00:18.2
1141 11:46:09.835950 PCI: 00:18.3
1142 11:46:09.839297 PCI: 00:18.4
1143 11:46:09.839377 PCI: 00:18.5
1144 11:46:09.842675 PCI: 00:18.6
1145 11:46:09.842756 PCI: 00:18.7
1146 11:46:09.842820 GENERIC: 0.1
1147 11:46:09.849192 MMIO: fedc5000 child on link 0 I2C: 01:50
1148 11:46:09.849273 I2C: 01:50
1149 11:46:09.852447 MMIO: fedca000 child on link 0 GENERIC: 0.0
1150 11:46:09.855941 GENERIC: 0.0
1151 11:46:09.856021 MMIO: fedce000
1152 11:46:09.858989 MMIO: fedcf000
1153 11:46:09.862759 MMIO: fedc4000 child on link 0 I2C: 02:15
1154 11:46:09.862840 I2C: 02:15
1155 11:46:09.865892 I2C: 02:2c
1156 11:46:09.865972 I2C: 02:5d
1157 11:46:09.866036 GENERIC: 0.0
1158 11:46:09.868823 Done allocating resources.
1159 11:46:09.875397 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2231 ms
1160 11:46:09.879143 0x00000020: notify_params->phase
1161 11:46:09.882339 Calling FspNotify: 0xca6833b8
1162 11:46:09.882484 0xca6fff7c: notify_params
1163 11:46:09.885630 POST: 0x94
1164 11:46:09.901604 POST: 0x94
1165 11:46:09.904685 FspNotify returned 0x00000000
1166 11:46:09.908071 PCI_INTR tables: Writing registers C00/C01 for PCI IRQ routing:
1167 11:46:09.914710 PCI_INTR_INDEX name PIC mode APIC mode
1168 11:46:09.918168 0x00 INTA# 0x06 0x10
1169 11:46:09.921421 0x01 INTB# 0x06 0x11
1170 11:46:09.924726 0x02 INTC# 0x0E 0x12
1171 11:46:09.929327 0x03 INTD# 0x0F 0x13
1172 11:46:09.931304 0x04 INTE# 0x1F 0x1F
1173 11:46:09.934294 0x05 INTF#/GENINT2 0x1F 0x1F
1174 11:46:09.937607 0x06 INTG# 0x1F 0x1F
1175 11:46:09.941044 0x07 INTH# 0x1F 0x1F
1176 11:46:09.944404 0x08 Misc 0xFA 0x00
1177 11:46:09.947820 0x09 Misc0 0xF1 0x00
1178 11:46:09.951221 0x0A Misc1 0x00 0x00
1179 11:46:09.954529 0x0B Misc2 0x00 0x00
1180 11:46:09.958041 0x0C Ser IRQ INTA 0x1F 0x1F
1181 11:46:09.960947 0x0D Ser IRQ INTB 0x1F 0x1F
1182 11:46:09.965308 0x0E Ser IRQ INTC 0x1F 0x1F
1183 11:46:09.967681 0x0F Ser IRQ INTD 0x1F 0x1F
1184 11:46:09.971829 0x10 SCI 0x09 0x09
1185 11:46:09.974439 0x11 SMBUS 0x1F 0x1F
1186 11:46:09.977905 0x12 ASF 0x1F 0x1F
1187 11:46:09.981034 0x16 PerMon 0x1F 0x1F
1188 11:46:09.984457 0x17 SD 0x1F 0x1F
1189 11:46:09.988388 0x1A SDIO 0x1F 0x1F
1190 11:46:09.990990 0x20 CIR 0x1F 0x1F
1191 11:46:09.994313 0x21 GPIOa 0x1F 0x1F
1192 11:46:09.997745 0x22 GPIOb 0x1F 0x1F
1193 11:46:10.000966 0x23 GPIOc 0x1F 0x1F
1194 11:46:10.004536 0x41 SATA 0x1F 0x1F
1195 11:46:10.007483 0x43 eMMC 0x05 0x05
1196 11:46:10.011073 0x50 GPP0 0x1F 0x1F
1197 11:46:10.014389 0x51 GPP1 0x1F 0x1F
1198 11:46:10.017957 0x52 GPP2 0x1F 0x1F
1199 11:46:10.021632 0x53 GPP3 0x1F 0x1F
1200 11:46:10.024602 0x62 GPIO 0x07 0x07
1201 11:46:10.028128 0x70 I2C0 0x1F 0x1F
1202 11:46:10.030900 0x71 I2C1 0x1F 0x1F
1203 11:46:10.034084 0x72 I2C2 0x0A 0x0A
1204 11:46:10.037539 0x73 I2C3 0x0B 0x0B
1205 11:46:10.040828 0x74 UART0 0x04 0x04
1206 11:46:10.044319 0x75 UART1 0x03 0x03
1207 11:46:10.047608 0x76 I2C4 0x1F 0x1F
1208 11:46:10.050775 0x77 I2C5 0x1F 0x1F
1209 11:46:10.054156 0x78 UART2 0x1F 0x1F
1210 11:46:10.057617 0x79 UART3 0x1F 0x1F
1211 11:46:10.060684 PCI_CFG IRQ: Write PCI config space IRQ assignments
1212 11:46:10.063810 PCI IRQ: Found device 0:00.02 using PIN A
1213 11:46:10.067234 PCI Devfn (0x2) not found in pirq_data table
1214 11:46:10.070595 PCI IRQ: Found device 0:08.01 using PIN A
1215 11:46:10.077418 Found this device in pirq_data table entry 7
1216 11:46:10.077523 Orig INT_PIN : 1 (PIN A)
1217 11:46:10.080669 PCI_INTR idx : 0x00 (INTA#)
1218 11:46:10.084280 INT_LINE : 0x6 (IRQ 6)
1219 11:46:10.087081 PCI IRQ: Found device 4:00.00 using PIN A
1220 11:46:10.090554 With INT_PIN swizzled to PIN A
1221 11:46:10.093653 Attached to bridge device 0:08h.01h
1222 11:46:10.097567 Found this device in pirq_data table entry 7
1223 11:46:10.100330 Orig INT_PIN : 1 (PIN A)
1224 11:46:10.103610 PCI_INTR idx : 0x00 (INTA#)
1225 11:46:10.103722 INT_LINE : 0x6 (IRQ 6)
1226 11:46:10.106839 PCI IRQ: Found device 4:00.01 using PIN B
1227 11:46:10.110292 With INT_PIN swizzled to PIN B
1228 11:46:10.113860 Attached to bridge device 0:08h.01h
1229 11:46:10.117076 Found this device in pirq_data table entry 7
1230 11:46:10.120797 Orig INT_PIN : 2 (PIN B)
1231 11:46:10.123713 PCI_INTR idx : 0x01 (INTB#)
1232 11:46:10.127149 INT_LINE : 0x6 (IRQ 6)
1233 11:46:10.130102 PCI IRQ: Found device 4:00.02 using PIN C
1234 11:46:10.133745 With INT_PIN swizzled to PIN C
1235 11:46:10.136713 Attached to bridge device 0:08h.01h
1236 11:46:10.140129 Found this device in pirq_data table entry 7
1237 11:46:10.143607 Orig INT_PIN : 3 (PIN C)
1238 11:46:10.143689 PCI_INTR idx : 0x02 (INTC#)
1239 11:46:10.146583 INT_LINE : 0xE (IRQ 14)
1240 11:46:10.149907 PCI IRQ: Found device 4:00.03 using PIN D
1241 11:46:10.153421 With INT_PIN swizzled to PIN D
1242 11:46:10.157199 Attached to bridge device 0:08h.01h
1243 11:46:10.159727 Found this device in pirq_data table entry 7
1244 11:46:10.163810 Orig INT_PIN : 4 (PIN D)
1245 11:46:10.166425 PCI_INTR idx : 0x03 (INTD#)
1246 11:46:10.166547 INT_LINE : 0xF (IRQ 15)
1247 11:46:10.173476 PCI IRQ: Found device 4:00.05 using PIN B
1248 11:46:10.173586 With INT_PIN swizzled to PIN B
1249 11:46:10.176617 Attached to bridge device 0:08h.01h
1250 11:46:10.183141 Found this device in pirq_data table entry 7
1251 11:46:10.183250 Orig INT_PIN : 2 (PIN B)
1252 11:46:10.186603 PCI_INTR idx : 0x01 (INTB#)
1253 11:46:10.190178 INT_LINE : 0x6 (IRQ 6)
1254 11:46:10.193334 PCI IRQ: Found device 4:00.07 using PIN D
1255 11:46:10.196624 With INT_PIN swizzled to PIN D
1256 11:46:10.200191 Attached to bridge device 0:08h.01h
1257 11:46:10.202870 Found this device in pirq_data table entry 7
1258 11:46:10.206362 Orig INT_PIN : 4 (PIN D)
1259 11:46:10.210081 PCI_INTR idx : 0x03 (INTD#)
1260 11:46:10.210163 INT_LINE : 0xF (IRQ 15)
1261 11:46:10.212985 PCI IRQ: Found device 1:00.00 using PIN A
1262 11:46:10.216496 With INT_PIN swizzled to PIN A
1263 11:46:10.220225 Attached to bridge device 0:01h.02h
1264 11:46:10.226936 Found this device in pirq_data table entry 1
1265 11:46:10.227018 Orig INT_PIN : 1 (PIN A)
1266 11:46:10.229984 PCI_INTR idx : 0x00 (INTA#)
1267 11:46:10.233170 INT_LINE : 0x6 (IRQ 6)
1268 11:46:10.241527 PCI IRQ: Found device 2:00.00 using PIN A
1269 11:46:10.245026 With INT_PIN swizzled to PIN A
1270 11:46:10.248699 Attached to bridge device 0:01h.03h
1271 11:46:10.258292 Found this device in pirq_data table entry 2
1272 11:46:10.262581 Orig INT_PIN : 1 (PIN A)
1273 11:46:10.265603 PCI_INTR idx : 0x00 (INTA#)
1274 11:46:10.268580 INT_LINE : 0x6 (IRQ 6)
1275 11:46:10.271844 PCI IRQ: Found device 3:00.00 using PIN A
1276 11:46:10.275461 With INT_PIN swizzled to PIN A
1277 11:46:10.278767 Attached to bridge device 0:01h.07h
1278 11:46:10.282153 Found this device in pirq_data table entry 6
1279 11:46:10.285290 Orig INT_PIN : 1 (PIN A)
1280 11:46:10.285390 PCI_INTR idx : 0x00 (INTA#)
1281 11:46:10.288601 INT_LINE : 0x6 (IRQ 6)
1282 11:46:10.294987 PCI_CFG IRQ: Finished writing PCI config space IRQ assignments
1283 11:46:10.298461 BS: BS_DEV_ENABLE entry times (exec / console): 30 / 388 ms
1284 11:46:10.302096 POST: 0x74
1285 11:46:10.302194 Enabling resources...
1286 11:46:10.305311 PCI: 00:00.0 cmd <- 00
1287 11:46:10.308963 PCI: 00:00.2 subsystem <- 1022/1510
1288 11:46:10.312129 PCI: 00:00.2 cmd <- 06
1289 11:46:10.315176 PCI: 00:01.0 subsystem <- 1022/1510
1290 11:46:10.315258 PCI: 00:01.0 cmd <- 00
1291 11:46:10.319110 PCI: 00:01.2 bridge ctrl <- 0013
1292 11:46:10.321799 PCI: 00:01.2 cmd <- 06
1293 11:46:10.324982 PCI: 00:01.3 bridge ctrl <- 0013
1294 11:46:10.325090 PCI: 00:01.3 cmd <- 06
1295 11:46:10.328467 PCI: 00:01.7 bridge ctrl <- 0013
1296 11:46:10.331630 PCI: 00:01.7 cmd <- 06
1297 11:46:10.334984 PCI: 00:08.0 subsystem <- 1022/1510
1298 11:46:10.335087 PCI: 00:08.0 cmd <- 00
1299 11:46:10.338630 PCI: 00:08.1 bridge ctrl <- 001b
1300 11:46:10.341909 PCI: 00:08.1 cmd <- 07
1301 11:46:10.344759 PCI: 00:14.0 subsystem <- 1022/1510
1302 11:46:10.348094 PCI: 00:14.0 cmd <- 403
1303 11:46:10.351563 PCI: 00:14.3 subsystem <- 1022/1510
1304 11:46:10.351665 PCI: 00:14.3 cmd <- 0f
1305 11:46:10.354950 PCI: 00:18.7 cmd <- 00
1306 11:46:10.358231 PCI: 01:00.0 cmd <- 02
1307 11:46:10.362338 PCI: 02:00.0 cmd <- 06
1308 11:46:10.367784 PCI: 03:00.0 cmd <- 02
1309 11:46:10.371826 PCI: 04:00.0 subsystem <- 1022/1510
1310 11:46:10.374817 PCI: 04:00.0 cmd <- 03
1311 11:46:10.377980 PCI: 04:00.1 subsystem <- 1022/1510
1312 11:46:10.378080 PCI: 04:00.1 cmd <- 02
1313 11:46:10.381672 PCI: 04:00.2 subsystem <- 1022/1510
1314 11:46:10.384498 PCI: 04:00.2 cmd <- 02
1315 11:46:10.387747 PCI: 04:00.3 subsystem <- 1022/1510
1316 11:46:10.391352 PCI: 04:00.3 cmd <- 02
1317 11:46:10.394585 PCI: 04:00.5 subsystem <- 1022/1510
1318 11:46:10.394658 PCI: 04:00.5 cmd <- 02
1319 11:46:10.397620 PCI: 04:00.7 subsystem <- 1022/1510
1320 11:46:10.401116 PCI: 04:00.7 cmd <- 02
1321 11:46:10.401214 done.
1322 11:46:10.407720 BS: BS_DEV_ENABLE run times (exec / console): 9 / 93 ms
1323 11:46:10.407859 POST: 0x75
1324 11:46:10.411159 Initializing devices...
1325 11:46:10.411230 POST: 0x75
1326 11:46:10.414298 CPU_CLUSTER: 0 init
1327 11:46:10.414407 MTRR: Physical address space:
1328 11:46:10.420926 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1329 11:46:10.427845 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1330 11:46:10.430630 0x00000000000c0000 - 0x00000000d0000000 size 0xcff40000 type 6
1331 11:46:10.437657 0x00000000d0000000 - 0x00000000e0200000 size 0x10200000 type 1
1332 11:46:10.444233 0x00000000e0200000 - 0x0000000100000000 size 0x1fe00000 type 0
1333 11:46:10.447330 0x0000000100000000 - 0x0000000130000000 size 0x30000000 type 6
1334 11:46:10.454158 MTRR: Fixed MSR 0x250 0x1e1e1e1e1e1e1e1e
1335 11:46:10.457375 MTRR: Fixed MSR 0x258 0x1e1e1e1e1e1e1e1e
1336 11:46:10.461025 MTRR: Fixed MSR 0x259 0x0000000000000000
1337 11:46:10.463882 MTRR: Fixed MSR 0x268 0x1e1e1e1e1e1e1e1e
1338 11:46:10.467414 MTRR: Fixed MSR 0x269 0x1e1e1e1e1e1e1e1e
1339 11:46:10.470605 MTRR: Fixed MSR 0x26a 0x1e1e1e1e1e1e1e1e
1340 11:46:10.474215 MTRR: Fixed MSR 0x26b 0x1e1e1e1e1e1e1e1e
1341 11:46:10.477282 MTRR: Fixed MSR 0x26c 0x1e1e1e1e1e1e1e1e
1342 11:46:10.480344 MTRR: Fixed MSR 0x26d 0x1e1e1e1e1e1e1e1e
1343 11:46:10.483733 MTRR: Fixed MSR 0x26e 0x1e1e1e1e1e1e1e1e
1344 11:46:10.490346 MTRR: Fixed MSR 0x26f 0x1e1e1e1e1e1e1e1e
1345 11:46:10.490500 call enable_fixed_mtrr()
1346 11:46:10.493631 CPU physical address size: 48 bits
1347 11:46:10.497008 MTRR: default type WB/UC MTRR counts: 10/5.
1348 11:46:10.500463 MTRR: UC selected as default type.
1349 11:46:10.506741 MTRR: 0 base 0x0000000000000000 mask 0x0000ffff80000000 type 6
1350 11:46:10.513518 MTRR: 1 base 0x0000000080000000 mask 0x0000ffffc0000000 type 6
1351 11:46:10.517034 MTRR: 2 base 0x00000000c0000000 mask 0x0000fffff0000000 type 6
1352 11:46:10.523378 MTRR: 3 base 0x00000000d0000000 mask 0x0000fffff0000000 type 1
1353 11:46:10.530060 MTRR: 4 base 0x00000000e0000000 mask 0x0000ffffffe00000 type 1
1354 11:46:10.530133
1355 11:46:10.530211 MTRR check
1356 11:46:10.533945 Fixed MTRRs : Enabled
1357 11:46:10.536911 Variable MTRRs: Enabled
1358 11:46:10.537016
1359 11:46:10.537107 POST: 0x93
1360 11:46:10.539824 Setting up SMI for CPU
1361 11:46:10.539921 Will perform SMM setup.
1362 11:46:10.546473 CPU: AMD Ryzen 3 3250C 15W with Radeon Graphics .
1363 11:46:10.553086 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
1364 11:46:10.556316 Processing 16 relocs. Offset value of 0x00030000
1365 11:46:10.559614 Attempting to start 3 APs
1366 11:46:10.562759 Waiting for 10ms after sending INIT.
1367 11:46:10.577582 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 3.
1368 11:46:10.581173 AP: slot 3 apic_id 1.
1369 11:46:10.581262 AP: slot 1 apic_id 2.
1370 11:46:10.581326 done.
1371 11:46:10.590748 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
1372 11:46:10.594160 Processing 13 relocs. Offset value of 0x00038000
1373 11:46:10.600744 SMM Module: stub loaded at 0x00038000. Will call 0xca6d2604(0x00000000)
1374 11:46:10.604382 Installing permanent SMM handler to 0xcb800000
1375 11:46:10.613894 Loading module at 0xcb810000 with entry 0xcb8114d2. filesize: 0x6b90 memsize: 0xd468
1376 11:46:10.617951 Processing 425 relocs. Offset value of 0xcb810000
1377 11:46:10.623840 Loading module at 0xcb808000 with entry 0xcb808000. filesize: 0x1b8 memsize: 0x1b8
1378 11:46:10.627515 Processing 13 relocs. Offset value of 0xcb808000
1379 11:46:10.633700 SMM Module: placing jmp sequence at 0xcb807e00 rel16 0x01fd
1380 11:46:10.640572 SMM Module: placing jmp sequence at 0xcb807c00 rel16 0x03fd
1381 11:46:10.643988 SMM Module: placing jmp sequence at 0xcb807a00 rel16 0x05fd
1382 11:46:10.650631 SMM Module: stub loaded at 0xcb808000. Will call 0xcb8114d2(0x00000000)
1383 11:46:10.657489 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0xcb800000, cpu = 0
1384 11:46:10.660260 Relocation complete.
1385 11:46:10.667041 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0xcb7ffe00, cpu = 1
1386 11:46:10.667122 Relocation complete.
1387 11:46:10.673558 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0xcb7ffa00, cpu = 3
1388 11:46:10.676789 Relocation complete.
1389 11:46:10.683372 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0xcb7ffc00, cpu = 2
1390 11:46:10.683449 Relocation complete.
1391 11:46:10.686946 Initializing CPU #0
1392 11:46:10.690192 CPU: vendor AMD device 820f01
1393 11:46:10.693243 CPU: family 17, model 20, stepping 01
1394 11:46:10.693348 Setting up local APIC...
1395 11:46:10.696821 apic_id: 0x00 done.
1396 11:46:10.700120 FMAP: area COREBOOT found @ 875000 (7909376 bytes)
1397 11:46:10.703499 CBFS: Locating 'cpu_microcode_blob.bin'
1398 11:46:10.706629 CBFS: Found @ offset d200 size 2580
1399 11:46:10.714260 microcode: patch id to apply = 0x08200103
1400 11:46:10.717234 microcode: being updated to patch id = 0x08200103 succeeded
1401 11:46:10.720233 CPU #0 initialized
1402 11:46:10.720319 Initializing CPU #2
1403 11:46:10.723700 Initializing CPU #3
1404 11:46:10.726843 CPU: vendor AMD device 820f01
1405 11:46:10.730300 CPU: vendor AMD device 820f01
1406 11:46:10.730405 Initializing CPU #1
1407 11:46:10.733452 CPU: family 17, model 20, stepping 01
1408 11:46:10.737447 CPU: vendor AMD device 820f01
1409 11:46:10.740877 CPU: family 17, model 20, stepping 01
1410 11:46:10.743616 Setting up local APIC...
1411 11:46:10.743687 Setting up local APIC...
1412 11:46:10.747172 apic_id: 0x03 apic_id: 0x01 done.
1413 11:46:10.747249 done.
1414 11:46:10.753460 FMAP: area COREBOOT found @ 875000 (7909376 bytes)
1415 11:46:10.756911 FMAP: area COREBOOT found @ 875000 (7909376 bytes)
1416 11:46:10.759925 CPU: family 17, model 20, stepping 01
1417 11:46:10.764057 CBFS: Locating 'cpu_microcode_blob.bin'
1418 11:46:10.767059 CBFS: Locating 'cpu_microcode_blob.bin'
1419 11:46:10.770202 CBFS: Found @ offset d200 size 2580
1420 11:46:10.773151 CBFS: Found @ offset d200 size 2580
1421 11:46:10.776633 Setting up local APIC...
1422 11:46:10.780058 microcode: patch id to apply = 0x08200103
1423 11:46:10.786495 apic_id: 0x02 microcode: being updated to patch id = 0x08200103 succeeded
1424 11:46:10.786571 done.
1425 11:46:10.789964 CPU #3 initialized
1426 11:46:10.793591 FMAP: area COREBOOT found @ 875000 (7909376 bytes)
1427 11:46:10.796550 microcode: patch id to apply = 0x08200103
1428 11:46:10.799725 CBFS: Locating 'cpu_microcode_blob.bin'
1429 11:46:10.806307 microcode: being updated to patch id = 0x08200103 succeeded
1430 11:46:10.810235 CBFS: Found @ offset d200 size 2580
1431 11:46:10.812882 CPU #2 initialized
1432 11:46:10.816281 microcode: patch id to apply = 0x08200103
1433 11:46:10.819634 microcode: being updated to patch id = 0x08200103 succeeded
1434 11:46:10.823383 CPU #1 initialized
1435 11:46:10.826750 bsp_do_flight_plan done after 240 msecs.
1436 11:46:10.826824
1437 11:46:10.826886
1438 11:46:10.836323 coreboot-v1.9308_26_0.0.22-16497-g60a4be297d Thu Oct 8 23:13:58 UTC 2020 smm starting (log level: 8)...
1439 11:46:10.836433
1440 11:46:10.836573 SMI# #2
1441 11:46:10.839402 spi_init: SPI BAR at 0xfec10000
1442 11:46:10.842849 PSP: Notify SMM info... OK
1443 11:46:10.846593 MTRR: TEMPORARY Physical address space:
1444 11:46:10.853122 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1445 11:46:10.856215 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1446 11:46:10.862842 0x00000000000c0000 - 0x00000000d0000000 size 0xcff40000 type 6
1447 11:46:10.869551 0x00000000d0000000 - 0x00000000ff000000 size 0x2f000000 type 0
1448 11:46:10.872658 0x00000000ff000000 - 0x0000000100000000 size 0x01000000 type 5
1449 11:46:10.879204 0x0000000100000000 - 0x0000000130000000 size 0x30000000 type 6
1450 11:46:10.882348 MTRR: default type WB/UC MTRR counts: 7/5.
1451 11:46:10.886306 MTRR: UC selected as default type.
1452 11:46:10.892621 MTRR: 0 base 0x0000000000000000 mask 0x0000ffff80000000 type 6
1453 11:46:10.899166 MTRR: 1 base 0x0000000080000000 mask 0x0000ffffc0000000 type 6
1454 11:46:10.902315 MTRR: 2 base 0x00000000c0000000 mask 0x0000fffff0000000 type 6
1455 11:46:10.909297 MTRR: 3 base 0x00000000ff000000 mask 0x0000ffffff000000 type 5
1456 11:46:10.915975 MTRR: 4 base 0x0000000100000000 mask 0x0000ffffc0000000 type 6
1457 11:46:10.919005 CPU_CLUSTER: 0 init finished in 500 msecs
1458 11:46:10.919081 POST: 0x75
1459 11:46:10.919157 POST: 0x75
1460 11:46:10.922212 POST: 0x75
1461 11:46:10.922317 POST: 0x75
1462 11:46:10.922455 POST: 0x75
1463 11:46:10.925456 POST: 0x75
1464 11:46:10.925560 POST: 0x75
1465 11:46:10.925650 POST: 0x75
1466 11:46:10.929379 POST: 0x75
1467 11:46:10.929477 POST: 0x75
1468 11:46:10.929569 POST: 0x75
1469 11:46:10.932023 POST: 0x75
1470 11:46:10.932124 POST: 0x75
1471 11:46:10.932210 POST: 0x75
1472 11:46:10.935667 PCI: 00:01.0 init
1473 11:46:10.939258 PCI: 00:01.0 init finished in 0 msecs
1474 11:46:10.939332 POST: 0x75
1475 11:46:10.942278 POST: 0x75
1476 11:46:10.942381 POST: 0x75
1477 11:46:10.942517 POST: 0x75
1478 11:46:10.945455 PCI: 00:08.0 init
1479 11:46:10.948805 PCI: 00:08.0 init finished in 0 msecs
1480 11:46:10.948884 POST: 0x75
1481 11:46:10.952352 POST: 0x75
1482 11:46:10.952451 PCI: 00:14.0 init
1483 11:46:10.955794 IOAPIC: Initializing IOAPIC at 0xfec00000
1484 11:46:10.958512 IOAPIC: Bootstrap Processor Local APIC = 0x00
1485 11:46:10.962077 IOAPIC: ID = 0x08
1486 11:46:10.965054 IOAPIC: Dumping registers
1487 11:46:10.965154 reg 0x0000: 0x08000000
1488 11:46:10.968600 reg 0x0001: 0x00178021
1489 11:46:10.972251 reg 0x0002: 0x08000000
1490 11:46:10.972322 IOAPIC: 24 interrupts
1491 11:46:10.975067 IOAPIC: Enabling interrupts on FSB
1492 11:46:10.982087 IOAPIC: reg 0x00000000 value 0x00000000 0x00000700
1493 11:46:10.985282 IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
1494 11:46:10.988295 IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
1495 11:46:10.995191 IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
1496 11:46:10.998246 IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
1497 11:46:11.001842 IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
1498 11:46:11.008650 IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
1499 11:46:11.011699 IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
1500 11:46:11.018301 IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
1501 11:46:11.021625 IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
1502 11:46:11.024817 IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
1503 11:46:11.031308 IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
1504 11:46:11.034804 IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
1505 11:46:11.038116 IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
1506 11:46:11.044640 IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
1507 11:46:11.048131 IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
1508 11:46:11.054649 IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
1509 11:46:11.057726 IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
1510 11:46:11.061019 IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
1511 11:46:11.067644 IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
1512 11:46:11.070835 IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
1513 11:46:11.075015 IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
1514 11:46:11.080968 IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
1515 11:46:11.084400 IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
1516 11:46:11.087956 PCI: 00:14.0 init finished in 132 msecs
1517 11:46:11.090849 POST: 0x75
1518 11:46:11.090933 PCI: 00:14.3 init
1519 11:46:11.091018 RTC Init
1520 11:46:11.094773 PCI: 00:14.3 init finished in 0 msecs
1521 11:46:11.097449 POST: 0x75
1522 11:46:11.097534 POST: 0x75
1523 11:46:11.097619 POST: 0x75
1524 11:46:11.100707 POST: 0x75
1525 11:46:11.100791 POST: 0x75
1526 11:46:11.100876 POST: 0x75
1527 11:46:11.104281 POST: 0x75
1528 11:46:11.104366 POST: 0x75
1529 11:46:11.104450 PCI: 00:18.7 init
1530 11:46:11.110977 PCI: 00:18.7 init finished in 0 msecs
1531 11:46:11.111061 POST: 0x75
1532 11:46:11.111146 PCI: 01:00.0 init
1533 11:46:11.114274 PCI: 01:00.0 init finished in 0 msecs
1534 11:46:11.117475 POST: 0x75
1535 11:46:11.117558 PCI: 02:00.0 init
1536 11:46:11.121007 PCI: 02:00.0 init finished in 0 msecs
1537 11:46:11.123747 POST: 0x75
1538 11:46:11.123834 PCI: 03:00.0 init
1539 11:46:11.127595 PCI: 03:00.0 init finished in 0 msecs
1540 11:46:11.130565 POST: 0x75
1541 11:46:11.130648 PCI: 04:00.0 init
1542 11:46:11.134012 FMAP: area COREBOOT found @ 875000 (7909376 bytes)
1543 11:46:11.137559 CBFS: Locating 'pci1002,15d8,c4.rom'
1544 11:46:11.143962 CBFS: 'pci1002,15d8,c4.rom' not found.
1545 11:46:11.144046 Using RV2 VBIOS.
1546 11:46:11.147437 FMAP: area COREBOOT found @ 875000 (7909376 bytes)
1547 11:46:11.150927 CBFS: Locating 'pci1002,15dd,c4.rom'
1548 11:46:11.154151 CBFS: Found @ offset 67140 size d400
1549 11:46:11.160939 In CBFS, ROM address for PCI: 04:00.0 = 0xff8dc188
1550 11:46:11.167153 PCI expansion ROM, signature 0xaa55, INIT size 0xd400, data ptr 0x01b0
1551 11:46:11.170544 PCI ROM image, vendor ID 1002, device ID 15dd,
1552 11:46:11.173979 PCI ROM image, Class Code 030000, Code Type 00
1553 11:46:11.180633 Copying VGA ROM Image from 0xff8dc188 to 0xc0000, 0xd400 bytes
1554 11:46:11.189691 Real mode stub @0x00000600: 889 bytes
1555 11:46:11.189776 Calling Option ROM...
1556 11:46:11.213743 ... Option ROM returned.
1557 11:46:11.216836 VBE: Getting information about VESA mode 41d4
1558 11:46:11.219980 VBE: resolution: 1920x1080@32
1559 11:46:11.223204 VBE: framebuffer: 0xd0000000
1560 11:46:11.227016 VBE: Setting VESA mode 41d4
1561 11:46:11.243840 VGA Option ROM was run
1562 11:46:11.247454 PCI: 04:00.0 init finished in 113 msecs
1563 11:46:11.250872 POST: 0x75
1564 11:46:11.250956 PCI: 04:00.1 init
1565 11:46:11.253852 PCI: 04:00.1 init finished in 0 msecs
1566 11:46:11.253937 POST: 0x75
1567 11:46:11.257132 PCI: 04:00.2 init
1568 11:46:11.260602 PCI: 04:00.2 init finished in 0 msecs
1569 11:46:11.260686 POST: 0x75
1570 11:46:11.263869 PCI: 04:00.3 init
1571 11:46:11.266935 PCI: 04:00.3 init finished in 0 msecs
1572 11:46:11.267021 POST: 0x75
1573 11:46:11.270222 PCI: 04:00.5 init
1574 11:46:11.273952 PCI: 04:00.5 init finished in 0 msecs
1575 11:46:11.274036 POST: 0x75
1576 11:46:11.274137 PCI: 04:00.7 init
1577 11:46:11.280588 PCI: 04:00.7 init finished in 0 msecs
1578 11:46:11.280671 POST: 0x75
1579 11:46:11.280756 POST: 0x75
1580 11:46:11.283831 POST: 0x75
1581 11:46:11.283915 POST: 0x75
1582 11:46:11.283999 POST: 0x75
1583 11:46:11.286748 POST: 0x75
1584 11:46:11.286831 POST: 0x75
1585 11:46:11.286916 POST: 0x75
1586 11:46:11.290081 POST: 0x75
1587 11:46:11.290189 POST: 0x75
1588 11:46:11.290290 POST: 0x75
1589 11:46:11.293168 POST: 0x75
1590 11:46:11.293278 POST: 0x75
1591 11:46:11.293382 PNP: 0c09.0 init
1592 11:46:11.299952 Google Chrome EC uptime: 8.331 seconds
1593 11:46:11.303700 Google Chrome AP resets since EC boot: 0
1594 11:46:11.306728 Google Chrome most recent AP reset causes:
1595 11:46:11.313235 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1596 11:46:11.316925 PNP: 0c09.0 init finished in 17 msecs
1597 11:46:11.317027 POST: 0x75
1598 11:46:11.317118 POST: 0x75
1599 11:46:11.320048 POST: 0x75
1600 11:46:11.320148 POST: 0x75
1601 11:46:11.320228 POST: 0x75
1602 11:46:11.323525 POST: 0x75
1603 11:46:11.323630 POST: 0x75
1604 11:46:11.323720 POST: 0x75
1605 11:46:11.326826 POST: 0x75
1606 11:46:11.326898 POST: 0x75
1607 11:46:11.329834 Devices initialized
1608 11:46:11.329935 Show all devs... After init.
1609 11:46:11.333511 Root Device: enabled 1
1610 11:46:11.337063 CPU_CLUSTER: 0: enabled 1
1611 11:46:11.337135 DOMAIN: 0000: enabled 1
1612 11:46:11.340072 GENERIC: 0.1: enabled 1
1613 11:46:11.343034 MMIO: fedc5000: enabled 1
1614 11:46:11.343131 MMIO: fedca000: enabled 1
1615 11:46:11.346425 MMIO: fedce000: enabled 0
1616 11:46:11.349783 MMIO: fedcf000: enabled 0
1617 11:46:11.353223 MMIO: fedc4000: enabled 1
1618 11:46:11.353321 APIC: 00: enabled 1
1619 11:46:11.356327 PCI: 00:00.0: enabled 1
1620 11:46:11.356411 PCI: 00:00.2: enabled 1
1621 11:46:11.359613 PCI: 00:01.0: enabled 1
1622 11:46:11.363137 PCI: 00:01.1: enabled 0
1623 11:46:11.363246 PCI: 00:01.2: enabled 1
1624 11:46:11.366321 PCI: 00:01.3: enabled 1
1625 11:46:11.369961 PCI: 00:01.4: enabled 0
1626 11:46:11.370067 PCI: 00:01.5: enabled 0
1627 11:46:11.372801 PCI: 00:01.6: enabled 0
1628 11:46:11.376632 PCI: 00:01.7: enabled 1
1629 11:46:11.376735 PCI: 00:08.0: enabled 1
1630 11:46:11.379641 PCI: 00:08.1: enabled 1
1631 11:46:11.382918 PCI: 00:08.2: enabled 0
1632 11:46:11.383051 PCI: 00:14.0: enabled 1
1633 11:46:11.386240 PCI: 00:14.3: enabled 1
1634 11:46:11.389781 PCI: 00:14.6: enabled 0
1635 11:46:11.389938 PCI: 00:18.0: enabled 1
1636 11:46:11.393245 PCI: 00:18.1: enabled 1
1637 11:46:11.396201 PCI: 00:18.2: enabled 1
1638 11:46:11.396302 PCI: 00:18.3: enabled 1
1639 11:46:11.399773 PCI: 00:18.4: enabled 1
1640 11:46:11.399852 PCI: 00:18.5: enabled 1
1641 11:46:11.403252 PCI: 00:18.6: enabled 1
1642 11:46:11.406507 I2C: 01:50: enabled 1
1643 11:46:11.406615 GENERIC: 0.0: enabled 1
1644 11:46:11.409327 I2C: 02:15: enabled 1
1645 11:46:11.412869 I2C: 02:2c: enabled 1
1646 11:46:11.412951 I2C: 02:5d: enabled 1
1647 11:46:11.416432 GENERIC: 0.0: enabled 1
1648 11:46:11.419283 PCI: 04:00.0: enabled 1
1649 11:46:11.419364 PCI: 04:00.1: enabled 1
1650 11:46:11.423047 PCI: 04:00.2: enabled 1
1651 11:46:11.425901 PCI: 04:00.3: enabled 1
1652 11:46:11.425981 PCI: 04:00.4: enabled 0
1653 11:46:11.429630 PCI: 04:00.5: enabled 1
1654 11:46:11.429729 PCI: 04:00.6: enabled 0
1655 11:46:11.432905 PCI: 04:00.7: enabled 1
1656 11:46:11.436351 PCI: 00:00.0: enabled 0
1657 11:46:11.436456 PNP: 0c09.0: enabled 1
1658 11:46:11.439781 USB0 port 0: enabled 1
1659 11:46:11.442652 USB0 port 0: enabled 1
1660 11:46:11.442724 GENERIC: 0.0: enabled 1
1661 11:46:11.445838 GENERIC: 0.0: enabled 1
1662 11:46:11.449341 GENERIC: 1.0: enabled 1
1663 11:46:11.449448 GENERIC: 0.0: enabled 1
1664 11:46:11.452955 USB2 port 0: enabled 1
1665 11:46:11.456733 USB2 port 1: enabled 1
1666 11:46:11.456813 USB2 port 2: enabled 1
1667 11:46:11.459199 USB2 port 3: enabled 1
1668 11:46:11.459280 USB3 port 0: enabled 1
1669 11:46:11.462561 USB3 port 1: enabled 1
1670 11:46:11.465759 USB3 port 2: enabled 1
1671 11:46:11.465865 USB3 port 3: enabled 1
1672 11:46:11.469589 USB2 port 4: enabled 1
1673 11:46:11.472273 USB2 port 5: enabled 1
1674 11:46:11.472373 USB2 port 0: enabled 1
1675 11:46:11.476053 USB2 port 1: enabled 1
1676 11:46:11.478845 USB3 port 0: enabled 1
1677 11:46:11.478943 I2C: 00:1a: enabled 1
1678 11:46:11.482599 PCI: 00:18.7: enabled 1
1679 11:46:11.482672 PCI: 01:00.0: enabled 1
1680 11:46:11.485807 PCI: 02:00.0: enabled 1
1681 11:46:11.488946 PCI: 03:00.0: enabled 1
1682 11:46:11.489047 APIC: 02: enabled 1
1683 11:46:11.492239 APIC: 03: enabled 1
1684 11:46:11.492310 APIC: 01: enabled 1
1685 11:46:11.499007 BS: BS_DEV_INIT run times (exec / console): 210 / 875 ms
1686 11:46:11.502272 SCIMAP 56 maps to GPE 31 (active high, edge trigger)
1687 11:46:11.509126 ELOG: Event(A1) added with size 10 at 2024-04-05 11:46:10 UTC
1688 11:46:11.515844 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1689 11:46:11.522080 ELOG: Event(A0) added with size 9 at 2024-04-05 11:46:10 UTC
1690 11:46:11.525942 elog_add_boot_reason: Logged dev mode boot
1691 11:46:11.528978 BS: BS_POST_DEVICE entry times (exec / console): 0 / 26 ms
1692 11:46:11.532044 POST: 0x76
1693 11:46:11.532121 Finalize devices...
1694 11:46:11.535718 Devices finalized
1695 11:46:11.538871 BS: BS_POST_DEVICE run times (exec / console): 0 / 5 ms
1696 11:46:11.545379 FMAP: area RW_NVRAM found @ 617000 (20480 bytes)
1697 11:46:11.548917 BS: BS_POST_DEVICE exit times (exec / console): 1 / 4 ms
1698 11:46:11.552337 POST: 0x77
1699 11:46:11.555592 BS: BS_OS_RESUME_CHECK run times (exec / console): 0 / 1 ms
1700 11:46:11.558670 Saving dimm info for smbios type 17
1701 11:46:11.562169 AMD_FSP_DMI_HOB found
1702 11:46:11.565527 AGESA TYPE 17 DMI INFO:
1703 11:46:11.565611 Handle: 1
1704 11:46:11.565675 TotalWidth: 64
1705 11:46:11.568487 DataWidth: 64
1706 11:46:11.568568 MemorySize: 4096
1707 11:46:11.571823 DeviceSet: 0
1708 11:46:11.571904 Speed: 1600
1709 11:46:11.575126 ManufacturerIdCode: 0
1710 11:46:11.575207 Attributes: 1
1711 11:46:11.578901 ExtSize: 0
1712 11:46:11.578990 ConfigSpeed: 1200
1713 11:46:11.581914 MemoryType: 0x1a
1714 11:46:11.581995 FormFactor: 0xd
1715 11:46:11.585501 DeviceLocator: DIMM 0
1716 11:46:11.588326 BankLocator: P0 CHANNEL A
1717 11:46:11.592267 SerialNumber(8): 00000000
1718 11:46:11.595357 PartNumber(0):
1719 11:46:11.595439 CBMEM_ID_MEMINFO:
1720 11:46:11.598524 dimm_size: 4096
1721 11:46:11.598617 ddr_type: 0x1a
1722 11:46:11.601798 ddr_frequency: 0
1723 11:46:11.601879 rank_per_dimm: 1
1724 11:46:11.605093 channel_num: 0
1725 11:46:11.605174 dimm_num: 0
1726 11:46:11.605238 bank_locator: 0
1727 11:46:11.608218 mod_id: 0
1728 11:46:11.608299 mod_type: 0x4
1729 11:46:11.611665 bus_width: 3
1730 11:46:11.611746 serial: 00000000
1731 11:46:11.614838 module_part_number(20): MT40A512M16TB-062E:J
1732 11:46:11.621584 BS: BS_WRITE_TABLES entry times (exec / console): 1 / 59 ms
1733 11:46:11.621666 POST: 0x79
1734 11:46:11.625346 POST: 0x9c
1735 11:46:11.628214 FMAP: area COREBOOT found @ 875000 (7909376 bytes)
1736 11:46:11.631535 CBFS: Locating 'fallback/dsdt.aml'
1737 11:46:11.635454 CBFS: Found @ offset 2be80 size 3d79
1738 11:46:11.638117 FMAP: area COREBOOT found @ 875000 (7909376 bytes)
1739 11:46:11.641494 CBFS: Locating 'fallback/slic'
1740 11:46:11.644578 CBFS: 'fallback/slic' not found.
1741 11:46:11.648169 ACPI: Writing ACPI tables at ca646000.
1742 11:46:11.651830 ACPI: * FACS
1743 11:46:11.651912 ACPI: * DSDT
1744 11:46:11.654731 Ramoops buffer: 0x100000@0xca546000.
1745 11:46:11.657640 FMAP: area RO_VPD found @ 800000 (16384 bytes)
1746 11:46:11.664297 FMAP: area RW_VPD found @ 615000 (8192 bytes)
1747 11:46:11.664381 ACPI: * FADT
1748 11:46:11.667592 pm_base: 0x0400
1749 11:46:11.671172 ACPI: added table 1/32, length now 40
1750 11:46:11.671254 ACPI: * SSDT
1751 11:46:11.677653 PSS: 2600MHz power 3166 control 0x0 status 0x0
1752 11:46:11.681051 PSS: 1700MHz power 1615 control 0x1 status 0x1
1753 11:46:11.684171 PSS: 1400MHz power 1276 control 0x2 status 0x2
1754 11:46:11.687298 PSS: 2600MHz power 3166 control 0x0 status 0x0
1755 11:46:11.694041 PSS: 1700MHz power 1615 control 0x1 status 0x1
1756 11:46:11.697278 PSS: 1400MHz power 1276 control 0x2 status 0x2
1757 11:46:11.700608 PSS: 2600MHz power 3166 control 0x0 status 0x0
1758 11:46:11.704665 PSS: 1700MHz power 1615 control 0x1 status 0x1
1759 11:46:11.710642 PSS: 1400MHz power 1276 control 0x2 status 0x2
1760 11:46:11.713909 PSS: 2600MHz power 3166 control 0x0 status 0x0
1761 11:46:11.717252 PSS: 1700MHz power 1615 control 0x1 status 0x1
1762 11:46:11.723764 PSS: 1400MHz power 1276 control 0x2 status 0x2
1763 11:46:11.727596 \_SB.MAXM: Maxim Integrated 98357A Amplifier
1764 11:46:11.730865 \_SB.I2C3.TPMI: I2C TPM at I2C: 01:50
1765 11:46:11.733924 \_SB.FUR1.CRFP: Fingerprint Reader at GENERIC: 0.0
1766 11:46:11.737133 \_SB.I2C2.D015: ELAN Touchpad at I2C: 02:15
1767 11:46:11.744443 \_SB.I2C2.H02C: Synaptics Touchpad at I2C: 02:2c
1768 11:46:11.747046 \_SB.I2C2.H05D: Goodix Touchscreen at I2C: 02:5d
1769 11:46:11.750695 FMAP: area COREBOOT found @ 875000 (7909376 bytes)
1770 11:46:11.753996 CBFS: Locating 'pci1002,15d8,c4.rom'
1771 11:46:11.757442 CBFS: 'pci1002,15d8,c4.rom' not found.
1772 11:46:11.760574 Using RV2 VBIOS.
1773 11:46:11.763754 FMAP: area COREBOOT found @ 875000 (7909376 bytes)
1774 11:46:11.766892 CBFS: Locating 'pci1002,15dd,c4.rom'
1775 11:46:11.770266 CBFS: Found @ offset 67140 size d400
1776 11:46:11.776960 In CBFS, ROM address for PCI: 04:00.0 = 0xff8dc188
1777 11:46:11.780291 PCI expansion ROM, signature 0xaa55, INIT size 0xd400, data ptr 0x01b0
1778 11:46:11.786692 PCI ROM image, vendor ID 1002, device ID 15dd,
1779 11:46:11.790226 PCI ROM image, Class Code 030000, Code Type 00
1780 11:46:11.794037 xHCI SSDT generation
1781 11:46:11.796688 xhci_fill_ssdt: Got GPE 31 for PCI: 04:00.3
1782 11:46:11.796780 xHCI Supported Protocol:
1783 11:46:11.803424 Major: 0x2, Minor: 0x0, Protocol: 'USB '
1784 11:46:11.806531 Port Offset: 1, Port Count: 6
1785 11:46:11.806604 xHCI Supported Protocol:
1786 11:46:11.809740 Major: 0x3, Minor: 0x10, Protocol: 'USB '
1787 11:46:11.813450 Port Offset: 7, Port Count: 1
1788 11:46:11.816766 xHCI Supported Protocol:
1789 11:46:11.820012 Major: 0x3, Minor: 0x10, Protocol: 'USB '
1790 11:46:11.823259 Port Offset: 8, Port Count: 1
1791 11:46:11.826623 xHCI Supported Protocol:
1792 11:46:11.829744 Major: 0x3, Minor: 0x10, Protocol: 'USB '
1793 11:46:11.833115 Port Offset: 9, Port Count: 1
1794 11:46:11.833215 xHCI Supported Protocol:
1795 11:46:11.839982 Major: 0x3, Minor: 0x10, Protocol: 'USB '
1796 11:46:11.840087 Port Offset: 10, Port Count: 1
1797 11:46:11.844365 EC returned error result code 1
1798 11:46:11.847810 PS2K: Bad resp from EC. Vivaldi disabled!
1799 11:46:11.854043 \_SB.PCI0.PBRA.ACPD.I2S0: I2S machine driver at GENERIC: 0.0
1800 11:46:11.860955 \_SB.PCI0.LPCB.EC0.CREC.TUN0: Cros EC I2C Tunnel at GENERIC: 0.0
1801 11:46:11.867424 \_SB.PCI0.LPCB.EC0.CREC.MSTH: Cros EC I2C Tunnel at GENERIC: 1.0
1802 11:46:11.871112 \_SB.PCI0.LPCB.EC0.CREC.ECA0: Cros EC audio codec at GENERIC: 0.0
1803 11:46:11.877528 \_SB.PCI0.PBRA.XHC0.RHUB.HS01: Left Type-C Port at USB2 port 0
1804 11:46:11.883976 \_SB.PCI0.PBRA.XHC0.RHUB.HS02: Left Type-A Port at USB2 port 1
1805 11:46:11.887507 \_SB.PCI0.PBRA.XHC0.RHUB.HS03: Right Type-A Port at USB2 port 2
1806 11:46:11.894107 \_SB.PCI0.PBRA.XHC0.RHUB.HS04: Right Type-C Port at USB2 port 3
1807 11:46:11.900766 \_SB.PCI0.PBRA.XHC0.RHUB.SS01: Left Type-C Port at USB3 port 0
1808 11:46:11.904169 \_SB.PCI0.PBRA.XHC0.RHUB.SS02: Left Type-A Port at USB3 port 1
1809 11:46:11.910441 \_SB.PCI0.PBRA.XHC0.RHUB.SS03: Right Type-A Port at USB3 port 2
1810 11:46:11.916846 \_SB.PCI0.PBRA.XHC0.RHUB.SS04: Right Type-C Port at USB3 port 3
1811 11:46:11.924576 \_SB.PCI0.PBRA.XHC0.RHUB.HS05: User-Facing Camera at USB2 port 4
1812 11:46:11.927664 \_SB.PCI0.PBRA.XHC0.RHUB.HS06: Bluetooth at USB2 port 5
1813 11:46:11.933882 \_SB.PCI0.LPCB.EC0.CREC.TUN0.RT58: Realtek RT5682 at I2C: 00:1a
1814 11:46:11.936861 Error: Could not locate 'wifi_sar' in VPD.
1815 11:46:11.940289 Checking CBFS for default SAR values
1816 11:46:11.944225 FMAP: area COREBOOT found @ 875000 (7909376 bytes)
1817 11:46:11.946998 CBFS: Locating 'wifi_sar_defaults.hex'
1818 11:46:11.950435 CBFS: Found @ offset 48140 size 77
1819 11:46:11.953664 \_SB.PCI0.PBR1.WF00.WF00: PCI: 01:00.0
1820 11:46:11.956861 ACPI: added table 2/32, length now 44
1821 11:46:11.960357 ACPI: * MCFG
1822 11:46:11.963349 ACPI: added table 3/32, length now 48
1823 11:46:11.963430 ACPI: * TPM2
1824 11:46:11.966985 TPM2 log created at 0xca528000
1825 11:46:11.970662 ACPI: added table 4/32, length now 52
1826 11:46:11.973543 ACPI: * MADT
1827 11:46:11.977041 ACPI: added table 5/32, length now 56
1828 11:46:11.977121 current = ca64c8a0
1829 11:46:11.980132 Searching for AGESA FSP ACPI Tables
1830 11:46:11.983341 ACPI: * CRAT (AGESA).
1831 11:46:11.986773 ACPI: added table 6/32, length now 60
1832 11:46:11.989931 ACPI: * ALIB (AGESA).
1833 11:46:11.993635 ACPI: added table 7/32, length now 64
1834 11:46:12.009662 ACPI: added table 8/32, length now 68
1835 11:46:12.009744 ACPI: * HPET
1836 11:46:12.012696 ACPI: added table 9/32, length now 72
1837 11:46:12.019828 Copying initialized VBIOS image from 0x000c0000
1838 11:46:12.019909 ACPI: * VFCT at ca652310
1839 11:46:12.022652 ACPI: added table 10/32, length now 76
1840 11:46:12.026062 ACPI: done.
1841 11:46:12.026141 ACPI tables: 104320 bytes.
1842 11:46:12.029545 smbios_write_tables: ca527000
1843 11:46:12.032893 Create SMBIOS type 16
1844 11:46:12.036125 Create SMBIOS type 17
1845 11:46:12.036206 PCI: 01:00.0 (unknown)
1846 11:46:12.039435 SMBIOS tables: 891 bytes.
1847 11:46:12.042645 Writing table forward entry at 0x00000500
1848 11:46:12.049491 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 9577
1849 11:46:12.052797 Writing coreboot table at 0xca66a000
1850 11:46:12.056213 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1851 11:46:12.063138 1. 0000000000001000-000000000009ffff: RAM
1852 11:46:12.065734 2. 00000000000a0000-00000000000fffff: RESERVED
1853 11:46:12.069507 3. 0000000000100000-0000000001ffffff: RAM
1854 11:46:12.072488 4. 0000000002000000-00000000021bffff: RESERVED
1855 11:46:12.075619 5. 00000000021c0000-00000000ca526fff: RAM
1856 11:46:12.082765 6. 00000000ca527000-00000000ca6b5fff: CONFIGURATION TABLES
1857 11:46:12.085649 7. 00000000ca6b6000-00000000ca7c7fff: RAMSTAGE
1858 11:46:12.092504 8. 00000000ca7c8000-00000000cb7fffff: CONFIGURATION TABLES
1859 11:46:12.095752 9. 00000000cb800000-00000000cfffffff: RESERVED
1860 11:46:12.099222 10. 00000000f8000000-00000000fbffffff: RESERVED
1861 11:46:12.105508 11. 0000000100000000-000000012f33ffff: RAM
1862 11:46:12.109008 12. 000000012f340000-000000012fffffff: RESERVED
1863 11:46:12.112739 Passing 3 GPIOs to payload:
1864 11:46:12.115745 NAME | PORT | POLARITY | VALUE
1865 11:46:12.119080 lid | undefined | high | high
1866 11:46:12.125811 power | undefined | high | low
1867 11:46:12.129347 EC in RW | 0x00000082 | high | high
1868 11:46:12.132630 Board ID: 5
1869 11:46:12.132711 SKU ID: 1510014996
1870 11:46:12.138805 FMAP: area COREBOOT found @ 875000 (7909376 bytes)
1871 11:46:12.142000 Wrote coreboot table at: 0xca66a000, 0x53c bytes, checksum f497
1872 11:46:12.145984 coreboot table: 1364 bytes.
1873 11:46:12.148893 IMD ROOT 0. 0xcb7ff000 0x00001000
1874 11:46:12.152002 IMD SMALL 1. 0xcb7fe000 0x00001000
1875 11:46:12.155274 FSP MEMORY 2. 0xca7fe000 0x01000000
1876 11:46:12.158657 CONSOLE 3. 0xca7de000 0x00020000
1877 11:46:12.161949 FMAP 4. 0xca7dd000 0x00000452
1878 11:46:12.165909 TIME STAMP 5. 0xca7dc000 0x00000910
1879 11:46:12.168514 VBOOT WORK 6. 0xca7c8000 0x00014000
1880 11:46:12.172042 RAMSTAGE 7. 0xca6b5000 0x00113000
1881 11:46:12.175076 REFCODE 8. 0xca683000 0x00032000
1882 11:46:12.178436 ACPI GNVS 9. 0xca682000 0x00001000
1883 11:46:12.182048 SMM BACKUP 10. 0xca672000 0x00010000
1884 11:46:12.185419 COREBOOT 11. 0xca66a000 0x00008000
1885 11:46:12.188717 ACPI 12. 0xca646000 0x00024000
1886 11:46:12.191876 RAMOOPS 13. 0xca546000 0x00100000
1887 11:46:12.195150 VGA ROM #0 14. 0xca538000 0x0000d400
1888 11:46:12.198717 TPM2 TCGLOG15. 0xca528000 0x00010000
1889 11:46:12.201909 SMBIOS 16. 0xca527000 0x00000800
1890 11:46:12.205407 IMD small region:
1891 11:46:12.208358 IMD ROOT 0. 0xcb7fec00 0x00000400
1892 11:46:12.212178 FSP RUNTIME 1. 0xcb7febe0 0x00000004
1893 11:46:12.214983 VPD 2. 0xcb7feb60 0x0000006c
1894 11:46:12.218333 POWER STATE 3. 0xcb7feb20 0x00000030
1895 11:46:12.221632 ROMSTAGE 4. 0xcb7feb00 0x00000004
1896 11:46:12.225042 EARLY DRAM USAGE 5. 0xcb7feae0 0x00000008
1897 11:46:12.228334 MEM INFO 6. 0xcb7fe900 0x000001e0
1898 11:46:12.231879 Reset backlight GPIO
1899 11:46:12.235057 BS: BS_WRITE_TABLES run times (exec / console): 16 / 592 ms
1900 11:46:12.241405 Probing TPM I2C: done! DID_VID 0x00281ae0
1901 11:46:12.241480 Locality already claimed
1902 11:46:12.245234 cr50 TPM 2.0 (i2c 3:0x50 id 0x28)
1903 11:46:12.248577 Checking cr50 for pending updates
1904 11:46:12.259067 Reading cr50 TPM mode
1905 11:46:12.273322 BS: BS_PAYLOAD_LOAD entry times (exec / console): 16 / 14 ms
1906 11:46:12.273403 POST: 0x7a
1907 11:46:12.280095 FMAP: area COREBOOT found @ 875000 (7909376 bytes)
1908 11:46:12.282863 CBFS: Locating 'fallback/payload'
1909 11:46:12.286380 CBFS: Found @ offset 51e680 size 4d114
1910 11:46:12.289773 Checking segment from ROM address 0xffd936b8
1911 11:46:12.293361 Checking segment from ROM address 0xffd936d4
1912 11:46:12.296213 Loading segment from ROM address 0xffd936b8
1913 11:46:12.299639 code (compression=0)
1914 11:46:12.306686 New segment dstaddr 0x30000000 memsize 0x10651f0 srcaddr 0xffd936f0 filesize 0x4d0dc
1915 11:46:12.316148 Loading Segment: addr: 0x30000000 memsz: 0x00000000010651f0 filesz: 0x000000000004d0dc
1916 11:46:12.316230 it's not compressed!
1917 11:46:12.349981 [ 0x30000000, 3004d0dc, 0x310651f0) <- ffd936f0
1918 11:46:12.356662 Clearing Segment: addr: 0x000000003004d0dc memsz: 0x0000000001018114
1919 11:46:12.363289 Loading segment from ROM address 0xffd936d4
1920 11:46:12.363370 Entry Point 0x30000000
1921 11:46:12.366535 Loaded segments
1922 11:46:12.369934 BS: BS_PAYLOAD_LOAD run times (exec / console): 31 / 61 ms
1923 11:46:12.373098 0x00000040: notify_params->phase
1924 11:46:12.377182 Calling FspNotify: 0xca6833b8
1925 11:46:12.379691 0xca6fff6c: notify_params
1926 11:46:12.379762 POST: 0x95
1927 11:46:12.384652 POST: 0x95
1928 11:46:12.387955 FspNotify returned 0x00000000
1929 11:46:12.391228 0x000000f0: notify_params->phase
1930 11:46:12.391310 Calling FspNotify: 0xca6833b8
1931 11:46:12.394609 0xca6fff7c: notify_params
1932 11:46:12.394689 POST: 0x88
1933 11:46:12.397632 POST: 0x89
1934 11:46:12.401144 FspNotify returned 0x00000000
1935 11:46:12.401225 Lock SMM configuration
1936 11:46:12.401289 POST: 0xfe
1937 11:46:12.407741 BS: BS_PAYLOAD_LOAD exit times (exec / console): 3 / 29 ms
1938 11:46:12.411101 PSP: Notify that POST is finishing... OK
1939 11:46:12.417583 BS: BS_PAYLOAD_BOOT entry times (exec / console): 0 / 4 ms
1940 11:46:12.417665 POST: 0x7b
1941 11:46:12.421160 mp_park_aps done after 0 msecs.
1942 11:46:12.424229 Jumping to boot code at 0x30000000(0xca66a000)
1943 11:46:12.427363 POST: 0xf8
1944 11:46:12.434729 CPU0: stack: 0xca6ff000 - 0xca700000, lowest used address 0xca6ff92c, stack used: 1748 bytes
1945 11:46:12.434812
1946 11:46:12.434878
1947 11:46:12.434937
1948 11:46:12.437619 Starting depthcharge on Morphius...
1949 11:46:12.437700
1950 11:46:12.438033 end: 2.2.3 depthcharge-start (duration 00:00:09) [common]
1951 11:46:12.438132 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
1952 11:46:12.438215 Setting prompt string to ['zork:']
1953 11:46:12.438296 bootloader-commands: Wait for prompt ['zork:'] (timeout 00:04:45)
1954 11:46:12.444109 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1955 11:46:12.444194
1956 11:46:12.451099 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1957 11:46:12.454198
1958 11:46:12.454272 new_rt5682_codec: chip = 0x1A
1959 11:46:12.471623
1960 11:46:12.475024 Looking for NVMe Controller 0x300617a8 @ 00:01:07
1961 11:46:12.475107
1962 11:46:12.475171 Wipe memory regions:
1963 11:46:12.475231
1964 11:46:12.478464 [0x00000000001000, 0x000000000a0000)
1965 11:46:12.478623
1966 11:46:12.481428 [0x00000000100000, 0x00000002000000)
1967 11:46:12.489945
1968 11:46:12.490025 [0x000000021c0000, 0x00000030000000)
1969 11:46:12.603338
1970 11:46:12.603450 [0x000000310651f0, 0x000000ca527000)
1971 11:46:12.960265
1972 11:46:12.960398 [0x00000100000000, 0x0000012f340000)
1973 11:46:13.430959
1974 11:46:13.431095 R8152: Initializing
1975 11:46:13.431165
1976 11:46:13.434060 Version 9 (ocp_data = 6010)
1977 11:46:13.434142
1978 11:46:13.436973 R8152: Done initializing
1979 11:46:13.437054
1980 11:46:13.437117 Adding net device
1981 11:46:14.566828
1982 11:46:14.566972 R8152: Initializing
1983 11:46:14.567046
1984 11:46:14.569838 Version 6 (ocp_data = 5c30)
1985 11:46:14.569916
1986 11:46:14.573299 R8152: Done initializing
1987 11:46:14.573384
1988 11:46:14.576501 net_add_device: Attemp to include the same device
1989 11:46:14.880303
1990 11:46:14.883639 [firmware-zork-13434.B-collabora] Jan 25 2022 09:17:46
1991 11:46:14.883724
1992 11:46:14.883791
1993 11:46:14.883851
1994 11:46:14.884130 Setting prompt string to ['zork:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1996 11:46:14.984428 zork: tftpboot 192.168.201.1 13268547/tftp-deploy-0jopo4wv/kernel/bzImage 13268547/tftp-deploy-0jopo4wv/kernel/cmdline 13268547/tftp-deploy-0jopo4wv/ramdisk/ramdisk.cpio.gz
1997 11:46:14.984567 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1998 11:46:14.984655 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
1999 11:46:14.988754 tftpboot 192.168.201.1 13268547/tftp-deploy-0jopo4wv/kernel/bzImage 4wv/kernel/cmdline 13268547/tftp-deploy-0jopo4wv/ramdisk/ramdisk.cpio.gz
2000 11:46:14.988836
2001 11:46:14.988903 Waiting for link
2002 11:46:15.190582
2003 11:46:15.190722 done.
2004 11:46:15.190789
2005 11:46:15.190853 MAC: 00:e0:4c:68:23:ac
2006 11:46:15.190913
2007 11:46:15.194002 Sending DHCP discover... done.
2008 11:46:15.194076
2009 11:46:15.197419 Waiting for reply... done.
2010 11:46:15.197520
2011 11:46:15.200625 Sending DHCP request... done.
2012 11:46:15.200726
2013 11:46:15.205156 Waiting for reply... done.
2014 11:46:15.205229
2015 11:46:15.205293 My ip is 192.168.201.18
2016 11:46:15.205351
2017 11:46:15.208342 The DHCP server ip is 192.168.201.1
2018 11:46:15.208412
2019 11:46:15.215192 TFTP server IP predefined by user: 192.168.201.1
2020 11:46:15.215268
2021 11:46:15.221782 Bootfile predefined by user: 13268547/tftp-deploy-0jopo4wv/kernel/bzImage
2022 11:46:15.221860
2023 11:46:15.225112 Sending tftp read request... done.
2024 11:46:15.225193
2025 11:46:15.228676 Waiting for the transfer...
2026 11:46:15.228779
2027 11:46:15.757580 00000000 ################################################################
2028 11:46:15.757723
2029 11:46:16.277991 00080000 ################################################################
2030 11:46:16.278126
2031 11:46:16.782780 00100000 ################################################################
2032 11:46:16.782921
2033 11:46:17.299165 00180000 ################################################################
2034 11:46:17.299339
2035 11:46:17.811977 00200000 ################################################################
2036 11:46:17.812151
2037 11:46:18.326628 00280000 ################################################################
2038 11:46:18.326777
2039 11:46:18.840327 00300000 ################################################################
2040 11:46:18.840520
2041 11:46:19.364018 00380000 ################################################################
2042 11:46:19.364151
2043 11:46:19.925296 00400000 ################################################################
2044 11:46:19.925432
2045 11:46:20.488438 00480000 ################################################################
2046 11:46:20.488575
2047 11:46:21.076641 00500000 ################################################################
2048 11:46:21.077141
2049 11:46:21.766772 00580000 ################################################################
2050 11:46:21.767284
2051 11:46:22.445459 00600000 ################################################################
2052 11:46:22.445972
2053 11:46:23.121823 00680000 ################################################################
2054 11:46:23.122464
2055 11:46:23.755297 00700000 ################################################################
2056 11:46:23.755445
2057 11:46:24.370855 00780000 ################################################################
2058 11:46:24.371003
2059 11:46:25.013014 00800000 ################################################################
2060 11:46:25.013523
2061 11:46:25.701969 00880000 ################################################################
2062 11:46:25.702533
2063 11:46:26.381170 00900000 ################################################################
2064 11:46:26.381489
2065 11:46:27.004927 00980000 ################################################################
2066 11:46:27.005081
2067 11:46:27.632177 00a00000 ################################################################
2068 11:46:27.632691
2069 11:46:28.309052 00a80000 ################################################################
2070 11:46:28.309199
2071 11:46:28.927782 00b00000 ################################################################
2072 11:46:28.927929
2073 11:46:29.530669 00b80000 ################################################################
2074 11:46:29.531257
2075 11:46:30.213335 00c00000 ################################################################
2076 11:46:30.213869
2077 11:46:30.871439 00c80000 ################################################################
2078 11:46:30.871973
2079 11:46:31.439743 00d00000 ####################################################### done.
2080 11:46:31.440249
2081 11:46:31.443312 The bootfile was 14077840 bytes long.
2082 11:46:31.443733
2083 11:46:31.446119 Sending tftp read request... done.
2084 11:46:31.446573
2085 11:46:31.450181 Waiting for the transfer...
2086 11:46:31.450650
2087 11:46:32.177082 00000000 ################################################################
2088 11:46:32.177620
2089 11:46:32.890714 00080000 ################################################################
2090 11:46:32.891270
2091 11:46:33.574381 00100000 ################################################################
2092 11:46:33.574952
2093 11:46:34.278991 00180000 ################################################################
2094 11:46:34.279488
2095 11:46:34.980674 00200000 ################################################################
2096 11:46:34.981220
2097 11:46:35.634804 00280000 ################################################################
2098 11:46:35.635333
2099 11:46:36.267385 00300000 ################################################################
2100 11:46:36.267883
2101 11:46:36.954689 00380000 ################################################################
2102 11:46:36.955253
2103 11:46:37.649568 00400000 ################################################################
2104 11:46:37.650142
2105 11:46:38.372572 00480000 ################################################################
2106 11:46:38.373114
2107 11:46:39.091479 00500000 ################################################################
2108 11:46:39.092026
2109 11:46:39.812822 00580000 ################################################################
2110 11:46:39.813367
2111 11:46:40.510443 00600000 ################################################################
2112 11:46:40.511163
2113 11:46:41.144659 00680000 ################################################################
2114 11:46:41.145170
2115 11:46:41.794763 00700000 ################################################################
2116 11:46:41.795301
2118 11:50:57.439451 end: 2.2.4 bootloader-commands (duration 00:04:45) [common]
2120 11:50:57.441192 depthcharge-retry failed: 1 of 1 attempts. 'bootloader-commands timed out after 285 seconds'
2122 11:50:57.442647 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2125 11:50:57.444050 end: 2 depthcharge-action (duration 00:05:00) [common]
2127 11:50:57.444273 Cleaning after the job
2128 11:50:57.444360 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13268547/tftp-deploy-0jopo4wv/ramdisk
2129 11:50:57.445738 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13268547/tftp-deploy-0jopo4wv/kernel
2130 11:50:57.447810 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13268547/tftp-deploy-0jopo4wv/modules
2131 11:50:57.448414 start: 4.1 power-off (timeout 00:00:30) [common]
2132 11:50:57.448577 Calling: 'pduclient' '--daemon=localhost' '--hostname=lenovo-TPad-C13-Yoga-zork-cbg-1' '--port=1' '--command=off'
2133 11:50:57.526118 >> Command sent successfully.
2134 11:50:57.530547 Returned 0 in 0 seconds
2135 11:50:57.631604 end: 4.1 power-off (duration 00:00:00) [common]
2137 11:50:57.633446 start: 4.2 read-feedback (timeout 00:10:00) [common]
2138 11:50:57.634931 Listened to connection for namespace 'common' for up to 1s
2139 11:50:58.634894 Finalising connection for namespace 'common'
2140 11:50:58.635634 Disconnecting from shell: Finalise
2141 11:50:58.636153 00780000 #################################################
2142 11:50:58.737432 end: 4.2 read-feedback (duration 00:00:01) [common]
2143 11:50:58.738129 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13268547
2144 11:50:58.758279 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13268547
2145 11:50:58.758481 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.