Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 11:45:49.506082 lava-dispatcher, installed at version: 2024.01
2 11:45:49.506291 start: 0 validate
3 11:45:49.506432 Start time: 2024-04-05 11:45:49.506424+00:00 (UTC)
4 11:45:49.506596 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:45:49.506727 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-ltp%2F20240313.0%2Famd64%2Finitrd.cpio.gz exists
6 11:45:49.759426 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:45:49.759967 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2416-g9d6a41ff7c4a%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:45:50.021016 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:45:50.021747 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-ltp%2F20240313.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 11:45:54.201614 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:45:54.202376 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2416-g9d6a41ff7c4a%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 11:45:55.206315 validate duration: 5.70
14 11:45:55.206608 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 11:45:55.206700 start: 1.1 download-retry (timeout 00:10:00) [common]
16 11:45:55.206784 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 11:45:55.206904 Not decompressing ramdisk as can be used compressed.
18 11:45:55.206986 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-ltp/20240313.0/amd64/initrd.cpio.gz
19 11:45:55.207046 saving as /var/lib/lava/dispatcher/tmp/13268536/tftp-deploy-o962d_8u/ramdisk/initrd.cpio.gz
20 11:45:55.207107 total size: 6464291 (6 MB)
21 11:45:55.208215 progress 0 % (0 MB)
22 11:45:55.210138 progress 5 % (0 MB)
23 11:45:55.211868 progress 10 % (0 MB)
24 11:45:55.213657 progress 15 % (0 MB)
25 11:45:55.215489 progress 20 % (1 MB)
26 11:45:55.217338 progress 25 % (1 MB)
27 11:45:55.219145 progress 30 % (1 MB)
28 11:45:55.220960 progress 35 % (2 MB)
29 11:45:55.222644 progress 40 % (2 MB)
30 11:45:55.224407 progress 45 % (2 MB)
31 11:45:55.226115 progress 50 % (3 MB)
32 11:45:55.227851 progress 55 % (3 MB)
33 11:45:55.229628 progress 60 % (3 MB)
34 11:45:55.231420 progress 65 % (4 MB)
35 11:45:55.233145 progress 70 % (4 MB)
36 11:45:55.234758 progress 75 % (4 MB)
37 11:45:55.236541 progress 80 % (4 MB)
38 11:45:55.238370 progress 85 % (5 MB)
39 11:45:55.240196 progress 90 % (5 MB)
40 11:45:55.241894 progress 95 % (5 MB)
41 11:45:55.243631 progress 100 % (6 MB)
42 11:45:55.243769 6 MB downloaded in 0.04 s (168.16 MB/s)
43 11:45:55.243915 end: 1.1.1 http-download (duration 00:00:00) [common]
45 11:45:55.244188 end: 1.1 download-retry (duration 00:00:00) [common]
46 11:45:55.244318 start: 1.2 download-retry (timeout 00:10:00) [common]
47 11:45:55.244401 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 11:45:55.244526 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2416-g9d6a41ff7c4a/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 11:45:55.244593 saving as /var/lib/lava/dispatcher/tmp/13268536/tftp-deploy-o962d_8u/kernel/bzImage
50 11:45:55.244650 total size: 14077840 (13 MB)
51 11:45:55.244707 No compression specified
52 11:45:55.245811 progress 0 % (0 MB)
53 11:45:55.249602 progress 5 % (0 MB)
54 11:45:55.253333 progress 10 % (1 MB)
55 11:45:55.257317 progress 15 % (2 MB)
56 11:45:55.260906 progress 20 % (2 MB)
57 11:45:55.264657 progress 25 % (3 MB)
58 11:45:55.268257 progress 30 % (4 MB)
59 11:45:55.272059 progress 35 % (4 MB)
60 11:45:55.275701 progress 40 % (5 MB)
61 11:45:55.279487 progress 45 % (6 MB)
62 11:45:55.283148 progress 50 % (6 MB)
63 11:45:55.286980 progress 55 % (7 MB)
64 11:45:55.290610 progress 60 % (8 MB)
65 11:45:55.294351 progress 65 % (8 MB)
66 11:45:55.297975 progress 70 % (9 MB)
67 11:45:55.301702 progress 75 % (10 MB)
68 11:45:55.305261 progress 80 % (10 MB)
69 11:45:55.308998 progress 85 % (11 MB)
70 11:45:55.312549 progress 90 % (12 MB)
71 11:45:55.316285 progress 95 % (12 MB)
72 11:45:55.319839 progress 100 % (13 MB)
73 11:45:55.320032 13 MB downloaded in 0.08 s (178.11 MB/s)
74 11:45:55.320225 end: 1.2.1 http-download (duration 00:00:00) [common]
76 11:45:55.320494 end: 1.2 download-retry (duration 00:00:00) [common]
77 11:45:55.320587 start: 1.3 download-retry (timeout 00:10:00) [common]
78 11:45:55.320674 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 11:45:55.320811 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-ltp/20240313.0/amd64/full.rootfs.tar.xz
80 11:45:55.320879 saving as /var/lib/lava/dispatcher/tmp/13268536/tftp-deploy-o962d_8u/nfsrootfs/full.rootfs.tar
81 11:45:55.320938 total size: 100036868 (95 MB)
82 11:45:55.320999 Using unxz to decompress xz
83 11:45:55.325134 progress 0 % (0 MB)
84 11:45:55.717514 progress 5 % (4 MB)
85 11:45:56.099147 progress 10 % (9 MB)
86 11:45:56.496480 progress 15 % (14 MB)
87 11:45:56.896731 progress 20 % (19 MB)
88 11:45:57.299844 progress 25 % (23 MB)
89 11:45:57.579718 progress 30 % (28 MB)
90 11:45:57.855691 progress 35 % (33 MB)
91 11:45:58.144266 progress 40 % (38 MB)
92 11:45:58.382628 progress 45 % (42 MB)
93 11:45:58.662256 progress 50 % (47 MB)
94 11:45:58.835555 progress 55 % (52 MB)
95 11:45:59.019105 progress 60 % (57 MB)
96 11:45:59.304931 progress 65 % (62 MB)
97 11:45:59.593058 progress 70 % (66 MB)
98 11:45:59.854882 progress 75 % (71 MB)
99 11:46:00.125629 progress 80 % (76 MB)
100 11:46:00.412979 progress 85 % (81 MB)
101 11:46:00.668451 progress 90 % (85 MB)
102 11:46:00.951847 progress 95 % (90 MB)
103 11:46:01.239441 progress 100 % (95 MB)
104 11:46:01.245533 95 MB downloaded in 5.92 s (16.10 MB/s)
105 11:46:01.245790 end: 1.3.1 http-download (duration 00:00:06) [common]
107 11:46:01.246051 end: 1.3 download-retry (duration 00:00:06) [common]
108 11:46:01.246139 start: 1.4 download-retry (timeout 00:09:54) [common]
109 11:46:01.246226 start: 1.4.1 http-download (timeout 00:09:54) [common]
110 11:46:01.246384 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2416-g9d6a41ff7c4a/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 11:46:01.246455 saving as /var/lib/lava/dispatcher/tmp/13268536/tftp-deploy-o962d_8u/modules/modules.tar
112 11:46:01.246515 total size: 484320 (0 MB)
113 11:46:01.246579 Using unxz to decompress xz
114 11:46:01.250627 progress 6 % (0 MB)
115 11:46:01.251031 progress 13 % (0 MB)
116 11:46:01.251268 progress 20 % (0 MB)
117 11:46:01.252899 progress 27 % (0 MB)
118 11:46:01.254627 progress 33 % (0 MB)
119 11:46:01.256664 progress 40 % (0 MB)
120 11:46:01.258397 progress 47 % (0 MB)
121 11:46:01.260067 progress 54 % (0 MB)
122 11:46:01.261871 progress 60 % (0 MB)
123 11:46:01.263463 progress 67 % (0 MB)
124 11:46:01.265259 progress 74 % (0 MB)
125 11:46:01.267145 progress 81 % (0 MB)
126 11:46:01.268858 progress 87 % (0 MB)
127 11:46:01.270711 progress 94 % (0 MB)
128 11:46:01.272450 progress 100 % (0 MB)
129 11:46:01.277983 0 MB downloaded in 0.03 s (14.68 MB/s)
130 11:46:01.278224 end: 1.4.1 http-download (duration 00:00:00) [common]
132 11:46:01.278478 end: 1.4 download-retry (duration 00:00:00) [common]
133 11:46:01.278571 start: 1.5 prepare-tftp-overlay (timeout 00:09:54) [common]
134 11:46:01.278662 start: 1.5.1 extract-nfsrootfs (timeout 00:09:54) [common]
135 11:46:04.227145 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/13268536/extract-nfsrootfs-kljn6xdm
136 11:46:04.227343 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
137 11:46:04.227470 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
138 11:46:04.227682 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13268536/lava-overlay-z5s56qkq
139 11:46:04.227853 makedir: /var/lib/lava/dispatcher/tmp/13268536/lava-overlay-z5s56qkq/lava-13268536/bin
140 11:46:04.227987 makedir: /var/lib/lava/dispatcher/tmp/13268536/lava-overlay-z5s56qkq/lava-13268536/tests
141 11:46:04.228333 makedir: /var/lib/lava/dispatcher/tmp/13268536/lava-overlay-z5s56qkq/lava-13268536/results
142 11:46:04.228464 Creating /var/lib/lava/dispatcher/tmp/13268536/lava-overlay-z5s56qkq/lava-13268536/bin/lava-add-keys
143 11:46:04.228643 Creating /var/lib/lava/dispatcher/tmp/13268536/lava-overlay-z5s56qkq/lava-13268536/bin/lava-add-sources
144 11:46:04.228806 Creating /var/lib/lava/dispatcher/tmp/13268536/lava-overlay-z5s56qkq/lava-13268536/bin/lava-background-process-start
145 11:46:04.228967 Creating /var/lib/lava/dispatcher/tmp/13268536/lava-overlay-z5s56qkq/lava-13268536/bin/lava-background-process-stop
146 11:46:04.229126 Creating /var/lib/lava/dispatcher/tmp/13268536/lava-overlay-z5s56qkq/lava-13268536/bin/lava-common-functions
147 11:46:04.229284 Creating /var/lib/lava/dispatcher/tmp/13268536/lava-overlay-z5s56qkq/lava-13268536/bin/lava-echo-ipv4
148 11:46:04.229456 Creating /var/lib/lava/dispatcher/tmp/13268536/lava-overlay-z5s56qkq/lava-13268536/bin/lava-install-packages
149 11:46:04.229619 Creating /var/lib/lava/dispatcher/tmp/13268536/lava-overlay-z5s56qkq/lava-13268536/bin/lava-installed-packages
150 11:46:04.229781 Creating /var/lib/lava/dispatcher/tmp/13268536/lava-overlay-z5s56qkq/lava-13268536/bin/lava-os-build
151 11:46:04.229917 Creating /var/lib/lava/dispatcher/tmp/13268536/lava-overlay-z5s56qkq/lava-13268536/bin/lava-probe-channel
152 11:46:04.230045 Creating /var/lib/lava/dispatcher/tmp/13268536/lava-overlay-z5s56qkq/lava-13268536/bin/lava-probe-ip
153 11:46:04.230172 Creating /var/lib/lava/dispatcher/tmp/13268536/lava-overlay-z5s56qkq/lava-13268536/bin/lava-target-ip
154 11:46:04.230298 Creating /var/lib/lava/dispatcher/tmp/13268536/lava-overlay-z5s56qkq/lava-13268536/bin/lava-target-mac
155 11:46:04.230424 Creating /var/lib/lava/dispatcher/tmp/13268536/lava-overlay-z5s56qkq/lava-13268536/bin/lava-target-storage
156 11:46:04.230558 Creating /var/lib/lava/dispatcher/tmp/13268536/lava-overlay-z5s56qkq/lava-13268536/bin/lava-test-case
157 11:46:04.230688 Creating /var/lib/lava/dispatcher/tmp/13268536/lava-overlay-z5s56qkq/lava-13268536/bin/lava-test-event
158 11:46:04.230813 Creating /var/lib/lava/dispatcher/tmp/13268536/lava-overlay-z5s56qkq/lava-13268536/bin/lava-test-feedback
159 11:46:04.230943 Creating /var/lib/lava/dispatcher/tmp/13268536/lava-overlay-z5s56qkq/lava-13268536/bin/lava-test-raise
160 11:46:04.231102 Creating /var/lib/lava/dispatcher/tmp/13268536/lava-overlay-z5s56qkq/lava-13268536/bin/lava-test-reference
161 11:46:04.231258 Creating /var/lib/lava/dispatcher/tmp/13268536/lava-overlay-z5s56qkq/lava-13268536/bin/lava-test-runner
162 11:46:04.231415 Creating /var/lib/lava/dispatcher/tmp/13268536/lava-overlay-z5s56qkq/lava-13268536/bin/lava-test-set
163 11:46:04.231571 Creating /var/lib/lava/dispatcher/tmp/13268536/lava-overlay-z5s56qkq/lava-13268536/bin/lava-test-shell
164 11:46:04.231728 Updating /var/lib/lava/dispatcher/tmp/13268536/lava-overlay-z5s56qkq/lava-13268536/bin/lava-install-packages (oe)
165 11:46:04.231917 Updating /var/lib/lava/dispatcher/tmp/13268536/lava-overlay-z5s56qkq/lava-13268536/bin/lava-installed-packages (oe)
166 11:46:04.232112 Creating /var/lib/lava/dispatcher/tmp/13268536/lava-overlay-z5s56qkq/lava-13268536/environment
167 11:46:04.232211 LAVA metadata
168 11:46:04.232282 - LAVA_JOB_ID=13268536
169 11:46:04.232345 - LAVA_DISPATCHER_IP=192.168.201.1
170 11:46:04.232443 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
171 11:46:04.232510 skipped lava-vland-overlay
172 11:46:04.232590 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 11:46:04.232706 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
174 11:46:04.232769 skipped lava-multinode-overlay
175 11:46:04.232869 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 11:46:04.232950 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
177 11:46:04.233027 Loading test definitions
178 11:46:04.233129 start: 1.5.2.3.1 git-repo-action (timeout 00:09:51) [common]
179 11:46:04.233201 Using /lava-13268536 at stage 0
180 11:46:04.233295 Fetching tests from https://github.com/kernelci/test-definitions
181 11:46:04.233380 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/13268536/lava-overlay-z5s56qkq/lava-13268536/0/tests/0_ltp-ipc'
182 11:46:07.437111 Running '/usr/bin/git checkout kernelci.org
183 11:46:07.584686 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/13268536/lava-overlay-z5s56qkq/lava-13268536/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
184 11:46:07.585486 uuid=13268536_1.5.2.3.1 testdef=None
185 11:46:07.585644 end: 1.5.2.3.1 git-repo-action (duration 00:00:03) [common]
187 11:46:07.585889 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
188 11:46:07.586670 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
190 11:46:07.586906 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
191 11:46:07.587948 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
193 11:46:07.588227 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
194 11:46:07.589212 runner path: /var/lib/lava/dispatcher/tmp/13268536/lava-overlay-z5s56qkq/lava-13268536/0/tests/0_ltp-ipc test_uuid 13268536_1.5.2.3.1
195 11:46:07.589302 SKIPFILE='skipfile-lkft.yaml'
196 11:46:07.589366 SKIP_INSTALL='true'
197 11:46:07.589425 TST_CMDFILES='ipc'
198 11:46:07.589572 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
200 11:46:07.589781 Creating lava-test-runner.conf files
201 11:46:07.589844 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13268536/lava-overlay-z5s56qkq/lava-13268536/0 for stage 0
202 11:46:07.589938 - 0_ltp-ipc
203 11:46:07.590043 end: 1.5.2.3 test-definition (duration 00:00:03) [common]
204 11:46:07.590130 start: 1.5.2.4 compress-overlay (timeout 00:09:48) [common]
205 11:46:15.197070 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
206 11:46:15.197300 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:40) [common]
207 11:46:15.197426 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
208 11:46:15.197574 end: 1.5.2 lava-overlay (duration 00:00:11) [common]
209 11:46:15.197705 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:40) [common]
210 11:46:15.367380 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
211 11:46:15.367827 start: 1.5.4 extract-modules (timeout 00:09:40) [common]
212 11:46:15.367963 extracting modules file /var/lib/lava/dispatcher/tmp/13268536/tftp-deploy-o962d_8u/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13268536/extract-nfsrootfs-kljn6xdm
213 11:46:15.389878 extracting modules file /var/lib/lava/dispatcher/tmp/13268536/tftp-deploy-o962d_8u/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13268536/extract-overlay-ramdisk-b18mthhm/ramdisk
214 11:46:15.412360 end: 1.5.4 extract-modules (duration 00:00:00) [common]
215 11:46:15.412542 start: 1.5.5 apply-overlay-tftp (timeout 00:09:40) [common]
216 11:46:15.412673 [common] Applying overlay to NFS
217 11:46:15.412782 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13268536/compress-overlay-yezho5xa/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13268536/extract-nfsrootfs-kljn6xdm
218 11:46:16.515297 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
219 11:46:16.515507 start: 1.5.6 configure-preseed-file (timeout 00:09:39) [common]
220 11:46:16.515652 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
221 11:46:16.515773 start: 1.5.7 compress-ramdisk (timeout 00:09:39) [common]
222 11:46:16.515861 Building ramdisk /var/lib/lava/dispatcher/tmp/13268536/extract-overlay-ramdisk-b18mthhm/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13268536/extract-overlay-ramdisk-b18mthhm/ramdisk
223 11:46:16.613821 >> 34109 blocks
224 11:46:17.306814 rename /var/lib/lava/dispatcher/tmp/13268536/extract-overlay-ramdisk-b18mthhm/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13268536/tftp-deploy-o962d_8u/ramdisk/ramdisk.cpio.gz
225 11:46:17.307297 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
226 11:46:17.307454 start: 1.5.8 prepare-kernel (timeout 00:09:38) [common]
227 11:46:17.307589 start: 1.5.8.1 prepare-fit (timeout 00:09:38) [common]
228 11:46:17.307711 No mkimage arch provided, not using FIT.
229 11:46:17.307835 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
230 11:46:17.307953 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
231 11:46:17.308128 end: 1.5 prepare-tftp-overlay (duration 00:00:16) [common]
232 11:46:17.308221 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:38) [common]
233 11:46:17.308307 No LXC device requested
234 11:46:17.308397 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
235 11:46:17.308486 start: 1.7 deploy-device-env (timeout 00:09:38) [common]
236 11:46:17.308568 end: 1.7 deploy-device-env (duration 00:00:00) [common]
237 11:46:17.308642 Checking files for TFTP limit of 4294967296 bytes.
238 11:46:17.309133 end: 1 tftp-deploy (duration 00:00:22) [common]
239 11:46:17.309243 start: 2 depthcharge-action (timeout 00:05:00) [common]
240 11:46:17.309338 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
241 11:46:17.309467 substitutions:
242 11:46:17.309539 - {DTB}: None
243 11:46:17.309600 - {INITRD}: 13268536/tftp-deploy-o962d_8u/ramdisk/ramdisk.cpio.gz
244 11:46:17.309661 - {KERNEL}: 13268536/tftp-deploy-o962d_8u/kernel/bzImage
245 11:46:17.309718 - {LAVA_MAC}: None
246 11:46:17.309773 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/13268536/extract-nfsrootfs-kljn6xdm
247 11:46:17.309829 - {NFS_SERVER_IP}: 192.168.201.1
248 11:46:17.309890 - {PRESEED_CONFIG}: None
249 11:46:17.309944 - {PRESEED_LOCAL}: None
250 11:46:17.309997 - {RAMDISK}: 13268536/tftp-deploy-o962d_8u/ramdisk/ramdisk.cpio.gz
251 11:46:17.310051 - {ROOT_PART}: None
252 11:46:17.310104 - {ROOT}: None
253 11:46:17.310164 - {SERVER_IP}: 192.168.201.1
254 11:46:17.310218 - {TEE}: None
255 11:46:17.310270 Parsed boot commands:
256 11:46:17.310322 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
257 11:46:17.310508 Parsed boot commands: tftpboot 192.168.201.1 13268536/tftp-deploy-o962d_8u/kernel/bzImage 13268536/tftp-deploy-o962d_8u/kernel/cmdline 13268536/tftp-deploy-o962d_8u/ramdisk/ramdisk.cpio.gz
258 11:46:17.310593 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
259 11:46:17.310676 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
260 11:46:17.310771 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
261 11:46:17.310859 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
262 11:46:17.310925 Not connected, no need to disconnect.
263 11:46:17.310998 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
264 11:46:17.311109 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
265 11:46:17.311205 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-0'
266 11:46:17.315317 Setting prompt string to ['lava-test: # ']
267 11:46:17.315684 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
268 11:46:17.315794 end: 2.2.1 reset-connection (duration 00:00:00) [common]
269 11:46:17.315893 start: 2.2.2 reset-device (timeout 00:05:00) [common]
270 11:46:17.315988 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
271 11:46:17.316259 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
272 11:46:22.450961 >> Command sent successfully.
273 11:46:22.453501 Returned 0 in 5 seconds
274 11:46:22.553918 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
276 11:46:22.554382 end: 2.2.2 reset-device (duration 00:00:05) [common]
277 11:46:22.554521 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
278 11:46:22.554651 Setting prompt string to 'Starting depthcharge on Helios...'
279 11:46:22.554760 Changing prompt to 'Starting depthcharge on Helios...'
280 11:46:22.554870 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
281 11:46:22.555257 [Enter `^Ec?' for help]
282 11:46:23.175667
283 11:46:23.176353
284 11:46:23.184853 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
285 11:46:23.188460 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
286 11:46:23.195231 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
287 11:46:23.198273 CPU: AES supported, TXT NOT supported, VT supported
288 11:46:23.205187 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
289 11:46:23.208522 PCH: device id 0284 (rev 00) is Cometlake-U Premium
290 11:46:23.215154 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
291 11:46:23.218647 VBOOT: Loading verstage.
292 11:46:23.221680 FMAP: Found "FLASH" version 1.1 at 0xc04000.
293 11:46:23.228437 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
294 11:46:23.232226 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
295 11:46:23.235365 CBFS @ c08000 size 3f8000
296 11:46:23.241666 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
297 11:46:23.244976 CBFS: Locating 'fallback/verstage'
298 11:46:23.248564 CBFS: Found @ offset 10fb80 size 1072c
299 11:46:23.248990
300 11:46:23.251870
301 11:46:23.261450 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
302 11:46:23.275194 Probing TPM: . done!
303 11:46:23.279061 TPM ready after 0 ms
304 11:46:23.282725 Connected to device vid:did:rid of 1ae0:0028:00
305 11:46:23.292617 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
306 11:46:23.295976 Initialized TPM device CR50 revision 0
307 11:46:23.342703 tlcl_send_startup: Startup return code is 0
308 11:46:23.342802 TPM: setup succeeded
309 11:46:23.355803 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
310 11:46:23.359187 Chrome EC: UHEPI supported
311 11:46:23.362557 Phase 1
312 11:46:23.366215 FMAP: area GBB found @ c05000 (12288 bytes)
313 11:46:23.372729 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
314 11:46:23.372812 Phase 2
315 11:46:23.375841 Phase 3
316 11:46:23.379333 FMAP: area GBB found @ c05000 (12288 bytes)
317 11:46:23.386116 VB2:vb2_report_dev_firmware() This is developer signed firmware
318 11:46:23.392584 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
319 11:46:23.396218 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
320 11:46:23.402888 VB2:vb2_verify_keyblock() Checking keyblock signature...
321 11:46:23.418113 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
322 11:46:23.421058 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
323 11:46:23.428176 VB2:vb2_verify_fw_preamble() Verifying preamble.
324 11:46:23.432111 Phase 4
325 11:46:23.435629 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
326 11:46:23.442001 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
327 11:46:23.621955 VB2:vb2_rsa_verify_digest() Digest check failed!
328 11:46:23.628212 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
329 11:46:23.628318 Saving nvdata
330 11:46:23.631473 Reboot requested (10020007)
331 11:46:23.635198 board_reset() called!
332 11:46:23.635281 full_reset() called!
333 11:46:28.142125
334 11:46:28.142664
335 11:46:28.151643 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
336 11:46:28.154896 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
337 11:46:28.161314 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
338 11:46:28.164703 CPU: AES supported, TXT NOT supported, VT supported
339 11:46:28.171426 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
340 11:46:28.175110 PCH: device id 0284 (rev 00) is Cometlake-U Premium
341 11:46:28.181876 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
342 11:46:28.185298 VBOOT: Loading verstage.
343 11:46:28.188468 FMAP: Found "FLASH" version 1.1 at 0xc04000.
344 11:46:28.195186 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
345 11:46:28.197928 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
346 11:46:28.201470 CBFS @ c08000 size 3f8000
347 11:46:28.208029 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
348 11:46:28.211883 CBFS: Locating 'fallback/verstage'
349 11:46:28.214648 CBFS: Found @ offset 10fb80 size 1072c
350 11:46:28.218844
351 11:46:28.219325
352 11:46:28.228300 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
353 11:46:28.242640 Probing TPM: . done!
354 11:46:28.246030 TPM ready after 0 ms
355 11:46:28.249348 Connected to device vid:did:rid of 1ae0:0028:00
356 11:46:28.259910 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
357 11:46:28.262946 Initialized TPM device CR50 revision 0
358 11:46:28.310165 tlcl_send_startup: Startup return code is 0
359 11:46:28.310663 TPM: setup succeeded
360 11:46:28.323798 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
361 11:46:28.326408 Chrome EC: UHEPI supported
362 11:46:28.329715 Phase 1
363 11:46:28.333438 FMAP: area GBB found @ c05000 (12288 bytes)
364 11:46:28.339851 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
365 11:46:28.346671 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
366 11:46:28.350162 Recovery requested (1009000e)
367 11:46:28.355702 Saving nvdata
368 11:46:28.361943 tlcl_extend: response is 0
369 11:46:28.370299 tlcl_extend: response is 0
370 11:46:28.377466 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
371 11:46:28.381077 CBFS @ c08000 size 3f8000
372 11:46:28.387232 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
373 11:46:28.390468 CBFS: Locating 'fallback/romstage'
374 11:46:28.394138 CBFS: Found @ offset 80 size 145fc
375 11:46:28.397225 Accumulated console time in verstage 98 ms
376 11:46:28.397707
377 11:46:28.398071
378 11:46:28.410441 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
379 11:46:28.417347 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
380 11:46:28.420723 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
381 11:46:28.424020 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
382 11:46:28.430263 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
383 11:46:28.433948 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
384 11:46:28.436798 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
385 11:46:28.441019 TCO_STS: 0000 0000
386 11:46:28.443765 GEN_PMCON: e0015238 00000200
387 11:46:28.446950 GBLRST_CAUSE: 00000000 00000000
388 11:46:28.447628 prev_sleep_state 5
389 11:46:28.450471 Boot Count incremented to 81651
390 11:46:28.456848 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
391 11:46:28.460463 CBFS @ c08000 size 3f8000
392 11:46:28.467121 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
393 11:46:28.467592 CBFS: Locating 'fspm.bin'
394 11:46:28.470896 CBFS: Found @ offset 5ffc0 size 71000
395 11:46:28.474710 Chrome EC: UHEPI supported
396 11:46:28.481994 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
397 11:46:28.487254 Probing TPM: done!
398 11:46:28.493903 Connected to device vid:did:rid of 1ae0:0028:00
399 11:46:28.504027 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
400 11:46:28.509808 Initialized TPM device CR50 revision 0
401 11:46:28.519126 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
402 11:46:28.525377 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
403 11:46:28.529038 MRC cache found, size 1948
404 11:46:28.532305 bootmode is set to: 2
405 11:46:28.535651 PRMRR disabled by config.
406 11:46:28.536264 SPD INDEX = 1
407 11:46:28.542361 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
408 11:46:28.545724 CBFS @ c08000 size 3f8000
409 11:46:28.552032 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
410 11:46:28.552555 CBFS: Locating 'spd.bin'
411 11:46:28.555055 CBFS: Found @ offset 5fb80 size 400
412 11:46:28.559001 SPD: module type is LPDDR3
413 11:46:28.561844 SPD: module part is
414 11:46:28.568824 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
415 11:46:28.571962 SPD: device width 4 bits, bus width 8 bits
416 11:46:28.575272 SPD: module size is 4096 MB (per channel)
417 11:46:28.579014 memory slot: 0 configuration done.
418 11:46:28.581888 memory slot: 2 configuration done.
419 11:46:28.633189 CBMEM:
420 11:46:28.636619 IMD: root @ 99fff000 254 entries.
421 11:46:28.640458 IMD: root @ 99ffec00 62 entries.
422 11:46:28.643384 External stage cache:
423 11:46:28.646732 IMD: root @ 9abff000 254 entries.
424 11:46:28.649209 IMD: root @ 9abfec00 62 entries.
425 11:46:28.656518 Chrome EC: clear events_b mask to 0x0000000020004000
426 11:46:28.669207 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
427 11:46:28.682953 tlcl_write: response is 0
428 11:46:28.691674 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
429 11:46:28.697947 MRC: TPM MRC hash updated successfully.
430 11:46:28.698415 2 DIMMs found
431 11:46:28.702043 SMM Memory Map
432 11:46:28.704451 SMRAM : 0x9a000000 0x1000000
433 11:46:28.707867 Subregion 0: 0x9a000000 0xa00000
434 11:46:28.711779 Subregion 1: 0x9aa00000 0x200000
435 11:46:28.714492 Subregion 2: 0x9ac00000 0x400000
436 11:46:28.717833 top_of_ram = 0x9a000000
437 11:46:28.721625 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
438 11:46:28.727826 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
439 11:46:28.731427 MTRR Range: Start=ff000000 End=0 (Size 1000000)
440 11:46:28.738215 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
441 11:46:28.741113 CBFS @ c08000 size 3f8000
442 11:46:28.744358 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
443 11:46:28.747877 CBFS: Locating 'fallback/postcar'
444 11:46:28.754468 CBFS: Found @ offset 107000 size 4b44
445 11:46:28.758344 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
446 11:46:28.770808 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
447 11:46:28.773721 Processing 180 relocs. Offset value of 0x97c0c000
448 11:46:28.782273 Accumulated console time in romstage 286 ms
449 11:46:28.782849
450 11:46:28.783215
451 11:46:28.792173 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
452 11:46:28.799050 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
453 11:46:28.802845 CBFS @ c08000 size 3f8000
454 11:46:28.806104 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
455 11:46:28.812341 CBFS: Locating 'fallback/ramstage'
456 11:46:28.815622 CBFS: Found @ offset 43380 size 1b9e8
457 11:46:28.822164 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
458 11:46:28.853788 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
459 11:46:28.857512 Processing 3976 relocs. Offset value of 0x98db0000
460 11:46:28.864082 Accumulated console time in postcar 52 ms
461 11:46:28.864724
462 11:46:28.865101
463 11:46:28.873823 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
464 11:46:28.880637 FMAP: area RO_VPD found @ c00000 (16384 bytes)
465 11:46:28.883994 WARNING: RO_VPD is uninitialized or empty.
466 11:46:28.887369 FMAP: area RW_VPD found @ af8000 (8192 bytes)
467 11:46:28.894253 FMAP: area RW_VPD found @ af8000 (8192 bytes)
468 11:46:28.894850 Normal boot.
469 11:46:28.900326 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
470 11:46:28.903854 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
471 11:46:28.907379 CBFS @ c08000 size 3f8000
472 11:46:28.914362 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
473 11:46:28.917009 CBFS: Locating 'cpu_microcode_blob.bin'
474 11:46:28.920541 CBFS: Found @ offset 14700 size 2ec00
475 11:46:28.924206 microcode: sig=0x806ec pf=0x4 revision=0xc9
476 11:46:28.927006 Skip microcode update
477 11:46:28.930305 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
478 11:46:28.933522 CBFS @ c08000 size 3f8000
479 11:46:28.940181 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
480 11:46:28.943592 CBFS: Locating 'fsps.bin'
481 11:46:28.946597 CBFS: Found @ offset d1fc0 size 35000
482 11:46:28.972248 Detected 4 core, 8 thread CPU.
483 11:46:28.975402 Setting up SMI for CPU
484 11:46:28.978448 IED base = 0x9ac00000
485 11:46:28.978917 IED size = 0x00400000
486 11:46:28.981960 Will perform SMM setup.
487 11:46:28.988187 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
488 11:46:28.995276 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
489 11:46:28.998243 Processing 16 relocs. Offset value of 0x00030000
490 11:46:29.001950 Attempting to start 7 APs
491 11:46:29.005425 Waiting for 10ms after sending INIT.
492 11:46:29.021795 Waiting for 1st SIPI to complete...done.
493 11:46:29.022581 AP: slot 4 apic_id 1.
494 11:46:29.028621 Waiting for 2nd SIPI to complete...done.
495 11:46:29.029095 AP: slot 5 apic_id 4.
496 11:46:29.031591 AP: slot 7 apic_id 5.
497 11:46:29.035364 AP: slot 2 apic_id 3.
498 11:46:29.035832 AP: slot 1 apic_id 2.
499 11:46:29.038156 AP: slot 6 apic_id 7.
500 11:46:29.042017 AP: slot 3 apic_id 6.
501 11:46:29.048745 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
502 11:46:29.054614 Processing 13 relocs. Offset value of 0x00038000
503 11:46:29.058025 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
504 11:46:29.064766 Installing SMM handler to 0x9a000000
505 11:46:29.071122 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
506 11:46:29.077766 Processing 658 relocs. Offset value of 0x9a010000
507 11:46:29.084401 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
508 11:46:29.087690 Processing 13 relocs. Offset value of 0x9a008000
509 11:46:29.094864 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
510 11:46:29.100802 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
511 11:46:29.107776 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
512 11:46:29.111236 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
513 11:46:29.118110 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
514 11:46:29.124123 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
515 11:46:29.127966 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
516 11:46:29.134416 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
517 11:46:29.138222 Clearing SMI status registers
518 11:46:29.141590 SMI_STS: PM1
519 11:46:29.142155 PM1_STS: PWRBTN
520 11:46:29.144540 TCO_STS: SECOND_TO
521 11:46:29.147857 New SMBASE 0x9a000000
522 11:46:29.150997 In relocation handler: CPU 0
523 11:46:29.154418 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
524 11:46:29.157581 Writing SMRR. base = 0x9a000006, mask=0xff000800
525 11:46:29.161670 Relocation complete.
526 11:46:29.164249 New SMBASE 0x99fff000
527 11:46:29.164720 In relocation handler: CPU 4
528 11:46:29.171179 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
529 11:46:29.174791 Writing SMRR. base = 0x9a000006, mask=0xff000800
530 11:46:29.177770 Relocation complete.
531 11:46:29.181242 New SMBASE 0x99ffec00
532 11:46:29.181811 In relocation handler: CPU 5
533 11:46:29.187772 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
534 11:46:29.190819 Writing SMRR. base = 0x9a000006, mask=0xff000800
535 11:46:29.194266 Relocation complete.
536 11:46:29.194834 New SMBASE 0x99fff800
537 11:46:29.197896 In relocation handler: CPU 2
538 11:46:29.204379 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
539 11:46:29.208112 Writing SMRR. base = 0x9a000006, mask=0xff000800
540 11:46:29.210757 Relocation complete.
541 11:46:29.211227 New SMBASE 0x99fffc00
542 11:46:29.214693 In relocation handler: CPU 1
543 11:46:29.220727 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
544 11:46:29.224445 Writing SMRR. base = 0x9a000006, mask=0xff000800
545 11:46:29.227491 Relocation complete.
546 11:46:29.228180 New SMBASE 0x99fff400
547 11:46:29.230811 In relocation handler: CPU 3
548 11:46:29.234642 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
549 11:46:29.241143 Writing SMRR. base = 0x9a000006, mask=0xff000800
550 11:46:29.244157 Relocation complete.
551 11:46:29.244628 New SMBASE 0x99ffe800
552 11:46:29.247929 In relocation handler: CPU 6
553 11:46:29.251626 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
554 11:46:29.257361 Writing SMRR. base = 0x9a000006, mask=0xff000800
555 11:46:29.260456 Relocation complete.
556 11:46:29.260922 New SMBASE 0x99ffe400
557 11:46:29.264583 In relocation handler: CPU 7
558 11:46:29.267102 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
559 11:46:29.274397 Writing SMRR. base = 0x9a000006, mask=0xff000800
560 11:46:29.274965 Relocation complete.
561 11:46:29.277601 Initializing CPU #0
562 11:46:29.280940 CPU: vendor Intel device 806ec
563 11:46:29.284033 CPU: family 06, model 8e, stepping 0c
564 11:46:29.287156 Clearing out pending MCEs
565 11:46:29.290844 Setting up local APIC...
566 11:46:29.291409 apic_id: 0x00 done.
567 11:46:29.293712 Turbo is available but hidden
568 11:46:29.297591 Turbo is available and visible
569 11:46:29.301078 VMX status: enabled
570 11:46:29.304015 IA32_FEATURE_CONTROL status: locked
571 11:46:29.307702 Skip microcode update
572 11:46:29.308363 CPU #0 initialized
573 11:46:29.310561 Initializing CPU #4
574 11:46:29.314278 Initializing CPU #3
575 11:46:29.314840 Initializing CPU #6
576 11:46:29.317113 CPU: vendor Intel device 806ec
577 11:46:29.320393 CPU: family 06, model 8e, stepping 0c
578 11:46:29.323541 CPU: vendor Intel device 806ec
579 11:46:29.326807 CPU: family 06, model 8e, stepping 0c
580 11:46:29.330489 Clearing out pending MCEs
581 11:46:29.334437 Initializing CPU #2
582 11:46:29.337336 CPU: vendor Intel device 806ec
583 11:46:29.340751 CPU: family 06, model 8e, stepping 0c
584 11:46:29.343616 Clearing out pending MCEs
585 11:46:29.344216 Initializing CPU #5
586 11:46:29.347154 Initializing CPU #7
587 11:46:29.350916 CPU: vendor Intel device 806ec
588 11:46:29.354570 CPU: family 06, model 8e, stepping 0c
589 11:46:29.357001 Clearing out pending MCEs
590 11:46:29.357470 Setting up local APIC...
591 11:46:29.360357 Setting up local APIC...
592 11:46:29.363890 CPU: vendor Intel device 806ec
593 11:46:29.367338 CPU: family 06, model 8e, stepping 0c
594 11:46:29.370221 Initializing CPU #1
595 11:46:29.373601 Clearing out pending MCEs
596 11:46:29.377286 CPU: vendor Intel device 806ec
597 11:46:29.380017 CPU: family 06, model 8e, stepping 0c
598 11:46:29.383638 Clearing out pending MCEs
599 11:46:29.384224 Setting up local APIC...
600 11:46:29.387204 apic_id: 0x01 done.
601 11:46:29.390340 Clearing out pending MCEs
602 11:46:29.393959 CPU: vendor Intel device 806ec
603 11:46:29.396718 CPU: family 06, model 8e, stepping 0c
604 11:46:29.400518 Clearing out pending MCEs
605 11:46:29.401044 Setting up local APIC...
606 11:46:29.403523 Setting up local APIC...
607 11:46:29.407327 VMX status: enabled
608 11:46:29.407889 apic_id: 0x02 done.
609 11:46:29.410206 apic_id: 0x03 done.
610 11:46:29.413241 VMX status: enabled
611 11:46:29.413804 VMX status: enabled
612 11:46:29.416664 IA32_FEATURE_CONTROL status: locked
613 11:46:29.423341 IA32_FEATURE_CONTROL status: locked
614 11:46:29.423909 Skip microcode update
615 11:46:29.426256 Skip microcode update
616 11:46:29.426724 CPU #1 initialized
617 11:46:29.429931 CPU #2 initialized
618 11:46:29.433395 apic_id: 0x07 done.
619 11:46:29.433960 Setting up local APIC...
620 11:46:29.436479 Setting up local APIC...
621 11:46:29.439956 apic_id: 0x06 done.
622 11:46:29.440559 VMX status: enabled
623 11:46:29.443088 VMX status: enabled
624 11:46:29.446112 IA32_FEATURE_CONTROL status: locked
625 11:46:29.449778 IA32_FEATURE_CONTROL status: locked
626 11:46:29.453142 Skip microcode update
627 11:46:29.456314 apic_id: 0x05 done.
628 11:46:29.456789 apic_id: 0x04 done.
629 11:46:29.459869 VMX status: enabled
630 11:46:29.460382 VMX status: enabled
631 11:46:29.466493 IA32_FEATURE_CONTROL status: locked
632 11:46:29.469651 IA32_FEATURE_CONTROL status: locked
633 11:46:29.470123 Skip microcode update
634 11:46:29.472695 Skip microcode update
635 11:46:29.476497 CPU #7 initialized
636 11:46:29.477062 CPU #5 initialized
637 11:46:29.479834 IA32_FEATURE_CONTROL status: locked
638 11:46:29.482995 Skip microcode update
639 11:46:29.486388 CPU #6 initialized
640 11:46:29.486953 CPU #3 initialized
641 11:46:29.489566 Skip microcode update
642 11:46:29.490033 CPU #4 initialized
643 11:46:29.496451 bsp_do_flight_plan done after 466 msecs.
644 11:46:29.499863 CPU: frequency set to 4200 MHz
645 11:46:29.500513 Enabling SMIs.
646 11:46:29.500898 Locking SMM.
647 11:46:29.516280 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
648 11:46:29.519557 CBFS @ c08000 size 3f8000
649 11:46:29.526560 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
650 11:46:29.527121 CBFS: Locating 'vbt.bin'
651 11:46:29.529269 CBFS: Found @ offset 5f5c0 size 499
652 11:46:29.536468 Found a VBT of 4608 bytes after decompression
653 11:46:29.722462 Display FSP Version Info HOB
654 11:46:29.725614 Reference Code - CPU = 9.0.1e.30
655 11:46:29.728652 uCode Version = 0.0.0.ca
656 11:46:29.731777 TXT ACM version = ff.ff.ff.ffff
657 11:46:29.735661 Display FSP Version Info HOB
658 11:46:29.738218 Reference Code - ME = 9.0.1e.30
659 11:46:29.742273 MEBx version = 0.0.0.0
660 11:46:29.745040 ME Firmware Version = Consumer SKU
661 11:46:29.748383 Display FSP Version Info HOB
662 11:46:29.751344 Reference Code - CML PCH = 9.0.1e.30
663 11:46:29.755331 PCH-CRID Status = Disabled
664 11:46:29.757959 PCH-CRID Original Value = ff.ff.ff.ffff
665 11:46:29.761261 PCH-CRID New Value = ff.ff.ff.ffff
666 11:46:29.764686 OPROM - RST - RAID = ff.ff.ff.ffff
667 11:46:29.768211 ChipsetInit Base Version = ff.ff.ff.ffff
668 11:46:29.771339 ChipsetInit Oem Version = ff.ff.ff.ffff
669 11:46:29.774938 Display FSP Version Info HOB
670 11:46:29.781375 Reference Code - SA - System Agent = 9.0.1e.30
671 11:46:29.784754 Reference Code - MRC = 0.7.1.6c
672 11:46:29.788344 SA - PCIe Version = 9.0.1e.30
673 11:46:29.788952 SA-CRID Status = Disabled
674 11:46:29.791757 SA-CRID Original Value = 0.0.0.c
675 11:46:29.794590 SA-CRID New Value = 0.0.0.c
676 11:46:29.798808 OPROM - VBIOS = ff.ff.ff.ffff
677 11:46:29.801269 RTC Init
678 11:46:29.804899 Set power on after power failure.
679 11:46:29.805383 Disabling Deep S3
680 11:46:29.807697 Disabling Deep S3
681 11:46:29.808227 Disabling Deep S4
682 11:46:29.811554 Disabling Deep S4
683 11:46:29.814322 Disabling Deep S5
684 11:46:29.814802 Disabling Deep S5
685 11:46:29.821271 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 197 exit 1
686 11:46:29.821856 Enumerating buses...
687 11:46:29.828005 Show all devs... Before device enumeration.
688 11:46:29.831472 Root Device: enabled 1
689 11:46:29.831956 CPU_CLUSTER: 0: enabled 1
690 11:46:29.834546 DOMAIN: 0000: enabled 1
691 11:46:29.837886 APIC: 00: enabled 1
692 11:46:29.838385 PCI: 00:00.0: enabled 1
693 11:46:29.841035 PCI: 00:02.0: enabled 1
694 11:46:29.844588 PCI: 00:04.0: enabled 0
695 11:46:29.847724 PCI: 00:05.0: enabled 0
696 11:46:29.848256 PCI: 00:12.0: enabled 1
697 11:46:29.851626 PCI: 00:12.5: enabled 0
698 11:46:29.854610 PCI: 00:12.6: enabled 0
699 11:46:29.858020 PCI: 00:14.0: enabled 1
700 11:46:29.858503 PCI: 00:14.1: enabled 0
701 11:46:29.861141 PCI: 00:14.3: enabled 1
702 11:46:29.864550 PCI: 00:14.5: enabled 0
703 11:46:29.865034 PCI: 00:15.0: enabled 1
704 11:46:29.867826 PCI: 00:15.1: enabled 1
705 11:46:29.870678 PCI: 00:15.2: enabled 0
706 11:46:29.874175 PCI: 00:15.3: enabled 0
707 11:46:29.874644 PCI: 00:16.0: enabled 1
708 11:46:29.877660 PCI: 00:16.1: enabled 0
709 11:46:29.881044 PCI: 00:16.2: enabled 0
710 11:46:29.884501 PCI: 00:16.3: enabled 0
711 11:46:29.885065 PCI: 00:16.4: enabled 0
712 11:46:29.887526 PCI: 00:16.5: enabled 0
713 11:46:29.890926 PCI: 00:17.0: enabled 1
714 11:46:29.894306 PCI: 00:19.0: enabled 1
715 11:46:29.894865 PCI: 00:19.1: enabled 0
716 11:46:29.897136 PCI: 00:19.2: enabled 0
717 11:46:29.901016 PCI: 00:1a.0: enabled 0
718 11:46:29.901600 PCI: 00:1c.0: enabled 0
719 11:46:29.904115 PCI: 00:1c.1: enabled 0
720 11:46:29.907511 PCI: 00:1c.2: enabled 0
721 11:46:29.910601 PCI: 00:1c.3: enabled 0
722 11:46:29.911166 PCI: 00:1c.4: enabled 0
723 11:46:29.914099 PCI: 00:1c.5: enabled 0
724 11:46:29.917037 PCI: 00:1c.6: enabled 0
725 11:46:29.920612 PCI: 00:1c.7: enabled 0
726 11:46:29.921196 PCI: 00:1d.0: enabled 1
727 11:46:29.924216 PCI: 00:1d.1: enabled 0
728 11:46:29.927072 PCI: 00:1d.2: enabled 0
729 11:46:29.930884 PCI: 00:1d.3: enabled 0
730 11:46:29.931357 PCI: 00:1d.4: enabled 0
731 11:46:29.933902 PCI: 00:1d.5: enabled 1
732 11:46:29.937115 PCI: 00:1e.0: enabled 1
733 11:46:29.937584 PCI: 00:1e.1: enabled 0
734 11:46:29.941103 PCI: 00:1e.2: enabled 1
735 11:46:29.944100 PCI: 00:1e.3: enabled 1
736 11:46:29.946905 PCI: 00:1f.0: enabled 1
737 11:46:29.947375 PCI: 00:1f.1: enabled 1
738 11:46:29.950489 PCI: 00:1f.2: enabled 1
739 11:46:29.953882 PCI: 00:1f.3: enabled 1
740 11:46:29.956895 PCI: 00:1f.4: enabled 1
741 11:46:29.957366 PCI: 00:1f.5: enabled 1
742 11:46:29.960183 PCI: 00:1f.6: enabled 0
743 11:46:29.964366 USB0 port 0: enabled 1
744 11:46:29.964931 I2C: 00:15: enabled 1
745 11:46:29.967288 I2C: 00:5d: enabled 1
746 11:46:29.970547 GENERIC: 0.0: enabled 1
747 11:46:29.973749 I2C: 00:1a: enabled 1
748 11:46:29.974317 I2C: 00:38: enabled 1
749 11:46:29.977113 I2C: 00:39: enabled 1
750 11:46:29.980498 I2C: 00:3a: enabled 1
751 11:46:29.980970 I2C: 00:3b: enabled 1
752 11:46:29.983983 PCI: 00:00.0: enabled 1
753 11:46:29.987196 SPI: 00: enabled 1
754 11:46:29.987761 SPI: 01: enabled 1
755 11:46:29.990276 PNP: 0c09.0: enabled 1
756 11:46:29.993887 USB2 port 0: enabled 1
757 11:46:29.994452 USB2 port 1: enabled 1
758 11:46:29.997040 USB2 port 2: enabled 0
759 11:46:30.000267 USB2 port 3: enabled 0
760 11:46:30.000829 USB2 port 5: enabled 0
761 11:46:30.003608 USB2 port 6: enabled 1
762 11:46:30.007468 USB2 port 9: enabled 1
763 11:46:30.008034 USB3 port 0: enabled 1
764 11:46:30.010013 USB3 port 1: enabled 1
765 11:46:30.013596 USB3 port 2: enabled 1
766 11:46:30.017074 USB3 port 3: enabled 1
767 11:46:30.017543 USB3 port 4: enabled 0
768 11:46:30.020463 APIC: 02: enabled 1
769 11:46:30.023808 APIC: 03: enabled 1
770 11:46:30.024434 APIC: 06: enabled 1
771 11:46:30.027614 APIC: 01: enabled 1
772 11:46:30.028251 APIC: 04: enabled 1
773 11:46:30.030457 APIC: 07: enabled 1
774 11:46:30.034197 APIC: 05: enabled 1
775 11:46:30.034757 Compare with tree...
776 11:46:30.036698 Root Device: enabled 1
777 11:46:30.040639 CPU_CLUSTER: 0: enabled 1
778 11:46:30.041201 APIC: 00: enabled 1
779 11:46:30.043511 APIC: 02: enabled 1
780 11:46:30.046768 APIC: 03: enabled 1
781 11:46:30.047338 APIC: 06: enabled 1
782 11:46:30.049989 APIC: 01: enabled 1
783 11:46:30.053948 APIC: 04: enabled 1
784 11:46:30.056675 APIC: 07: enabled 1
785 11:46:30.057197 APIC: 05: enabled 1
786 11:46:30.059776 DOMAIN: 0000: enabled 1
787 11:46:30.063132 PCI: 00:00.0: enabled 1
788 11:46:30.066881 PCI: 00:02.0: enabled 1
789 11:46:30.067449 PCI: 00:04.0: enabled 0
790 11:46:30.070152 PCI: 00:05.0: enabled 0
791 11:46:30.073215 PCI: 00:12.0: enabled 1
792 11:46:30.076941 PCI: 00:12.5: enabled 0
793 11:46:30.077508 PCI: 00:12.6: enabled 0
794 11:46:30.079854 PCI: 00:14.0: enabled 1
795 11:46:30.083394 USB0 port 0: enabled 1
796 11:46:30.086697 USB2 port 0: enabled 1
797 11:46:30.090070 USB2 port 1: enabled 1
798 11:46:30.092997 USB2 port 2: enabled 0
799 11:46:30.093473 USB2 port 3: enabled 0
800 11:46:30.096988 USB2 port 5: enabled 0
801 11:46:30.099899 USB2 port 6: enabled 1
802 11:46:30.102827 USB2 port 9: enabled 1
803 11:46:30.106513 USB3 port 0: enabled 1
804 11:46:30.106981 USB3 port 1: enabled 1
805 11:46:30.109801 USB3 port 2: enabled 1
806 11:46:30.112871 USB3 port 3: enabled 1
807 11:46:30.116405 USB3 port 4: enabled 0
808 11:46:30.119523 PCI: 00:14.1: enabled 0
809 11:46:30.122700 PCI: 00:14.3: enabled 1
810 11:46:30.123198 PCI: 00:14.5: enabled 0
811 11:46:30.126952 PCI: 00:15.0: enabled 1
812 11:46:30.129731 I2C: 00:15: enabled 1
813 11:46:30.132697 PCI: 00:15.1: enabled 1
814 11:46:30.133166 I2C: 00:5d: enabled 1
815 11:46:30.135922 GENERIC: 0.0: enabled 1
816 11:46:30.139217 PCI: 00:15.2: enabled 0
817 11:46:30.142976 PCI: 00:15.3: enabled 0
818 11:46:30.145859 PCI: 00:16.0: enabled 1
819 11:46:30.146345 PCI: 00:16.1: enabled 0
820 11:46:30.149711 PCI: 00:16.2: enabled 0
821 11:46:30.153151 PCI: 00:16.3: enabled 0
822 11:46:30.156145 PCI: 00:16.4: enabled 0
823 11:46:30.159180 PCI: 00:16.5: enabled 0
824 11:46:30.159648 PCI: 00:17.0: enabled 1
825 11:46:30.162894 PCI: 00:19.0: enabled 1
826 11:46:30.166829 I2C: 00:1a: enabled 1
827 11:46:30.169519 I2C: 00:38: enabled 1
828 11:46:30.172710 I2C: 00:39: enabled 1
829 11:46:30.173238 I2C: 00:3a: enabled 1
830 11:46:30.175876 I2C: 00:3b: enabled 1
831 11:46:30.179033 PCI: 00:19.1: enabled 0
832 11:46:30.182271 PCI: 00:19.2: enabled 0
833 11:46:30.182857 PCI: 00:1a.0: enabled 0
834 11:46:30.185524 PCI: 00:1c.0: enabled 0
835 11:46:30.188720 PCI: 00:1c.1: enabled 0
836 11:46:30.192476 PCI: 00:1c.2: enabled 0
837 11:46:30.195621 PCI: 00:1c.3: enabled 0
838 11:46:30.196119 PCI: 00:1c.4: enabled 0
839 11:46:30.199450 PCI: 00:1c.5: enabled 0
840 11:46:30.202316 PCI: 00:1c.6: enabled 0
841 11:46:30.205586 PCI: 00:1c.7: enabled 0
842 11:46:30.208672 PCI: 00:1d.0: enabled 1
843 11:46:30.209142 PCI: 00:1d.1: enabled 0
844 11:46:30.212336 PCI: 00:1d.2: enabled 0
845 11:46:30.215697 PCI: 00:1d.3: enabled 0
846 11:46:30.218892 PCI: 00:1d.4: enabled 0
847 11:46:30.222461 PCI: 00:1d.5: enabled 1
848 11:46:30.222989 PCI: 00:00.0: enabled 1
849 11:46:30.225901 PCI: 00:1e.0: enabled 1
850 11:46:30.228962 PCI: 00:1e.1: enabled 0
851 11:46:30.232142 PCI: 00:1e.2: enabled 1
852 11:46:30.232656 SPI: 00: enabled 1
853 11:46:30.235965 PCI: 00:1e.3: enabled 1
854 11:46:30.238644 SPI: 01: enabled 1
855 11:46:30.242372 PCI: 00:1f.0: enabled 1
856 11:46:30.242899 PNP: 0c09.0: enabled 1
857 11:46:30.245519 PCI: 00:1f.1: enabled 1
858 11:46:30.248867 PCI: 00:1f.2: enabled 1
859 11:46:30.252196 PCI: 00:1f.3: enabled 1
860 11:46:30.255377 PCI: 00:1f.4: enabled 1
861 11:46:30.255943 PCI: 00:1f.5: enabled 1
862 11:46:30.258966 PCI: 00:1f.6: enabled 0
863 11:46:30.262468 Root Device scanning...
864 11:46:30.265368 scan_static_bus for Root Device
865 11:46:30.269045 CPU_CLUSTER: 0 enabled
866 11:46:30.269553 DOMAIN: 0000 enabled
867 11:46:30.271705 DOMAIN: 0000 scanning...
868 11:46:30.275738 PCI: pci_scan_bus for bus 00
869 11:46:30.279122 PCI: 00:00.0 [8086/0000] ops
870 11:46:30.282095 PCI: 00:00.0 [8086/9b61] enabled
871 11:46:30.285303 PCI: 00:02.0 [8086/0000] bus ops
872 11:46:30.288557 PCI: 00:02.0 [8086/9b41] enabled
873 11:46:30.291794 PCI: 00:04.0 [8086/1903] disabled
874 11:46:30.295323 PCI: 00:08.0 [8086/1911] enabled
875 11:46:30.298318 PCI: 00:12.0 [8086/02f9] enabled
876 11:46:30.301765 PCI: 00:14.0 [8086/0000] bus ops
877 11:46:30.305369 PCI: 00:14.0 [8086/02ed] enabled
878 11:46:30.308636 PCI: 00:14.2 [8086/02ef] enabled
879 11:46:30.312240 PCI: 00:14.3 [8086/02f0] enabled
880 11:46:30.315016 PCI: 00:15.0 [8086/0000] bus ops
881 11:46:30.318480 PCI: 00:15.0 [8086/02e8] enabled
882 11:46:30.321848 PCI: 00:15.1 [8086/0000] bus ops
883 11:46:30.325498 PCI: 00:15.1 [8086/02e9] enabled
884 11:46:30.328466 PCI: 00:16.0 [8086/0000] ops
885 11:46:30.332393 PCI: 00:16.0 [8086/02e0] enabled
886 11:46:30.335117 PCI: 00:17.0 [8086/0000] ops
887 11:46:30.338816 PCI: 00:17.0 [8086/02d3] enabled
888 11:46:30.342180 PCI: 00:19.0 [8086/0000] bus ops
889 11:46:30.345083 PCI: 00:19.0 [8086/02c5] enabled
890 11:46:30.348192 PCI: 00:1d.0 [8086/0000] bus ops
891 11:46:30.352205 PCI: 00:1d.0 [8086/02b0] enabled
892 11:46:30.358692 PCI: Static device PCI: 00:1d.5 not found, disabling it.
893 11:46:30.359246 PCI: 00:1e.0 [8086/0000] ops
894 11:46:30.361840 PCI: 00:1e.0 [8086/02a8] enabled
895 11:46:30.365514 PCI: 00:1e.2 [8086/0000] bus ops
896 11:46:30.368587 PCI: 00:1e.2 [8086/02aa] enabled
897 11:46:30.372237 PCI: 00:1e.3 [8086/0000] bus ops
898 11:46:30.375393 PCI: 00:1e.3 [8086/02ab] enabled
899 11:46:30.378451 PCI: 00:1f.0 [8086/0000] bus ops
900 11:46:30.381702 PCI: 00:1f.0 [8086/0284] enabled
901 11:46:30.388645 PCI: Static device PCI: 00:1f.1 not found, disabling it.
902 11:46:30.395248 PCI: Static device PCI: 00:1f.2 not found, disabling it.
903 11:46:30.398330 PCI: 00:1f.3 [8086/0000] bus ops
904 11:46:30.401806 PCI: 00:1f.3 [8086/02c8] enabled
905 11:46:30.404866 PCI: 00:1f.4 [8086/0000] bus ops
906 11:46:30.408466 PCI: 00:1f.4 [8086/02a3] enabled
907 11:46:30.411620 PCI: 00:1f.5 [8086/0000] bus ops
908 11:46:30.415005 PCI: 00:1f.5 [8086/02a4] enabled
909 11:46:30.418570 PCI: Leftover static devices:
910 11:46:30.419136 PCI: 00:05.0
911 11:46:30.421162 PCI: 00:12.5
912 11:46:30.421630 PCI: 00:12.6
913 11:46:30.422003 PCI: 00:14.1
914 11:46:30.425020 PCI: 00:14.5
915 11:46:30.425588 PCI: 00:15.2
916 11:46:30.427965 PCI: 00:15.3
917 11:46:30.428691 PCI: 00:16.1
918 11:46:30.429073 PCI: 00:16.2
919 11:46:30.431333 PCI: 00:16.3
920 11:46:30.431803 PCI: 00:16.4
921 11:46:30.434466 PCI: 00:16.5
922 11:46:30.434936 PCI: 00:19.1
923 11:46:30.438110 PCI: 00:19.2
924 11:46:30.438677 PCI: 00:1a.0
925 11:46:30.439052 PCI: 00:1c.0
926 11:46:30.441482 PCI: 00:1c.1
927 11:46:30.442050 PCI: 00:1c.2
928 11:46:30.444569 PCI: 00:1c.3
929 11:46:30.445035 PCI: 00:1c.4
930 11:46:30.445406 PCI: 00:1c.5
931 11:46:30.447809 PCI: 00:1c.6
932 11:46:30.448382 PCI: 00:1c.7
933 11:46:30.450837 PCI: 00:1d.1
934 11:46:30.451304 PCI: 00:1d.2
935 11:46:30.451671 PCI: 00:1d.3
936 11:46:30.454395 PCI: 00:1d.4
937 11:46:30.454865 PCI: 00:1d.5
938 11:46:30.457720 PCI: 00:1e.1
939 11:46:30.458191 PCI: 00:1f.1
940 11:46:30.461512 PCI: 00:1f.2
941 11:46:30.461983 PCI: 00:1f.6
942 11:46:30.464658 PCI: Check your devicetree.cb.
943 11:46:30.468191 PCI: 00:02.0 scanning...
944 11:46:30.471532 scan_generic_bus for PCI: 00:02.0
945 11:46:30.474692 scan_generic_bus for PCI: 00:02.0 done
946 11:46:30.481272 scan_bus: scanning of bus PCI: 00:02.0 took 10188 usecs
947 11:46:30.482052 PCI: 00:14.0 scanning...
948 11:46:30.484408 scan_static_bus for PCI: 00:14.0
949 11:46:30.487707 USB0 port 0 enabled
950 11:46:30.490926 USB0 port 0 scanning...
951 11:46:30.494271 scan_static_bus for USB0 port 0
952 11:46:30.497536 USB2 port 0 enabled
953 11:46:30.498097 USB2 port 1 enabled
954 11:46:30.501170 USB2 port 2 disabled
955 11:46:30.501736 USB2 port 3 disabled
956 11:46:30.504560 USB2 port 5 disabled
957 11:46:30.507436 USB2 port 6 enabled
958 11:46:30.507904 USB2 port 9 enabled
959 11:46:30.511611 USB3 port 0 enabled
960 11:46:30.514611 USB3 port 1 enabled
961 11:46:30.515171 USB3 port 2 enabled
962 11:46:30.517821 USB3 port 3 enabled
963 11:46:30.518388 USB3 port 4 disabled
964 11:46:30.520694 USB2 port 0 scanning...
965 11:46:30.524168 scan_static_bus for USB2 port 0
966 11:46:30.527799 scan_static_bus for USB2 port 0 done
967 11:46:30.534030 scan_bus: scanning of bus USB2 port 0 took 9707 usecs
968 11:46:30.537719 USB2 port 1 scanning...
969 11:46:30.540957 scan_static_bus for USB2 port 1
970 11:46:30.544107 scan_static_bus for USB2 port 1 done
971 11:46:30.547706 scan_bus: scanning of bus USB2 port 1 took 9698 usecs
972 11:46:30.551222 USB2 port 6 scanning...
973 11:46:30.553706 scan_static_bus for USB2 port 6
974 11:46:30.557727 scan_static_bus for USB2 port 6 done
975 11:46:30.563887 scan_bus: scanning of bus USB2 port 6 took 9707 usecs
976 11:46:30.567470 USB2 port 9 scanning...
977 11:46:30.570642 scan_static_bus for USB2 port 9
978 11:46:30.573631 scan_static_bus for USB2 port 9 done
979 11:46:30.577238 scan_bus: scanning of bus USB2 port 9 took 9700 usecs
980 11:46:30.580369 USB3 port 0 scanning...
981 11:46:30.583855 scan_static_bus for USB3 port 0
982 11:46:30.587425 scan_static_bus for USB3 port 0 done
983 11:46:30.593662 scan_bus: scanning of bus USB3 port 0 took 9699 usecs
984 11:46:30.597156 USB3 port 1 scanning...
985 11:46:30.600777 scan_static_bus for USB3 port 1
986 11:46:30.603637 scan_static_bus for USB3 port 1 done
987 11:46:30.610465 scan_bus: scanning of bus USB3 port 1 took 9708 usecs
988 11:46:30.611047 USB3 port 2 scanning...
989 11:46:30.614220 scan_static_bus for USB3 port 2
990 11:46:30.617258 scan_static_bus for USB3 port 2 done
991 11:46:30.623863 scan_bus: scanning of bus USB3 port 2 took 9701 usecs
992 11:46:30.627085 USB3 port 3 scanning...
993 11:46:30.630275 scan_static_bus for USB3 port 3
994 11:46:30.633422 scan_static_bus for USB3 port 3 done
995 11:46:30.640421 scan_bus: scanning of bus USB3 port 3 took 9708 usecs
996 11:46:30.643845 scan_static_bus for USB0 port 0 done
997 11:46:30.647362 scan_bus: scanning of bus USB0 port 0 took 155380 usecs
998 11:46:30.650365 scan_static_bus for PCI: 00:14.0 done
999 11:46:30.657089 scan_bus: scanning of bus PCI: 00:14.0 took 173010 usecs
1000 11:46:30.660117 PCI: 00:15.0 scanning...
1001 11:46:30.663863 scan_generic_bus for PCI: 00:15.0
1002 11:46:30.667088 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1003 11:46:30.670291 scan_generic_bus for PCI: 00:15.0 done
1004 11:46:30.676929 scan_bus: scanning of bus PCI: 00:15.0 took 14293 usecs
1005 11:46:30.680236 PCI: 00:15.1 scanning...
1006 11:46:30.683530 scan_generic_bus for PCI: 00:15.1
1007 11:46:30.687298 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1008 11:46:30.693609 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1009 11:46:30.696771 scan_generic_bus for PCI: 00:15.1 done
1010 11:46:30.700458 scan_bus: scanning of bus PCI: 00:15.1 took 18602 usecs
1011 11:46:30.703649 PCI: 00:19.0 scanning...
1012 11:46:30.707151 scan_generic_bus for PCI: 00:19.0
1013 11:46:30.710394 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1014 11:46:30.716914 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1015 11:46:30.720637 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1016 11:46:30.723555 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1017 11:46:30.727030 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1018 11:46:30.733340 scan_generic_bus for PCI: 00:19.0 done
1019 11:46:30.736634 scan_bus: scanning of bus PCI: 00:19.0 took 30744 usecs
1020 11:46:30.739958 PCI: 00:1d.0 scanning...
1021 11:46:30.743549 do_pci_scan_bridge for PCI: 00:1d.0
1022 11:46:30.746990 PCI: pci_scan_bus for bus 01
1023 11:46:30.749998 PCI: 01:00.0 [1c5c/1327] enabled
1024 11:46:30.753114 Enabling Common Clock Configuration
1025 11:46:30.759999 L1 Sub-State supported from root port 29
1026 11:46:30.760699 L1 Sub-State Support = 0xf
1027 11:46:30.763555 CommonModeRestoreTime = 0x28
1028 11:46:30.770108 Power On Value = 0x16, Power On Scale = 0x0
1029 11:46:30.770680 ASPM: Enabled L1
1030 11:46:30.776362 scan_bus: scanning of bus PCI: 00:1d.0 took 32796 usecs
1031 11:46:30.779745 PCI: 00:1e.2 scanning...
1032 11:46:30.783559 scan_generic_bus for PCI: 00:1e.2
1033 11:46:30.786361 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1034 11:46:30.789772 scan_generic_bus for PCI: 00:1e.2 done
1035 11:46:30.796580 scan_bus: scanning of bus PCI: 00:1e.2 took 14018 usecs
1036 11:46:30.797136 PCI: 00:1e.3 scanning...
1037 11:46:30.803379 scan_generic_bus for PCI: 00:1e.3
1038 11:46:30.806352 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1039 11:46:30.810136 scan_generic_bus for PCI: 00:1e.3 done
1040 11:46:30.812925 scan_bus: scanning of bus PCI: 00:1e.3 took 14007 usecs
1041 11:46:30.816665 PCI: 00:1f.0 scanning...
1042 11:46:30.819660 scan_static_bus for PCI: 00:1f.0
1043 11:46:30.822808 PNP: 0c09.0 enabled
1044 11:46:30.826195 scan_static_bus for PCI: 00:1f.0 done
1045 11:46:30.833007 scan_bus: scanning of bus PCI: 00:1f.0 took 12036 usecs
1046 11:46:30.836527 PCI: 00:1f.3 scanning...
1047 11:46:30.839972 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1048 11:46:30.843070 PCI: 00:1f.4 scanning...
1049 11:46:30.846400 scan_generic_bus for PCI: 00:1f.4
1050 11:46:30.849109 scan_generic_bus for PCI: 00:1f.4 done
1051 11:46:30.856445 scan_bus: scanning of bus PCI: 00:1f.4 took 10190 usecs
1052 11:46:30.859624 PCI: 00:1f.5 scanning...
1053 11:46:30.862867 scan_generic_bus for PCI: 00:1f.5
1054 11:46:30.865789 scan_generic_bus for PCI: 00:1f.5 done
1055 11:46:30.872768 scan_bus: scanning of bus PCI: 00:1f.5 took 10191 usecs
1056 11:46:30.879032 scan_bus: scanning of bus DOMAIN: 0000 took 605087 usecs
1057 11:46:30.882651 scan_static_bus for Root Device done
1058 11:46:30.885556 scan_bus: scanning of bus Root Device took 624957 usecs
1059 11:46:30.889392 done
1060 11:46:30.889984 Chrome EC: UHEPI supported
1061 11:46:30.896321 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1062 11:46:30.902699 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1063 11:46:30.908672 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1064 11:46:30.916103 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1065 11:46:30.919332 SPI flash protection: WPSW=0 SRP0=0
1066 11:46:30.926165 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1067 11:46:30.929417 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1068 11:46:30.932538 found VGA at PCI: 00:02.0
1069 11:46:30.935901 Setting up VGA for PCI: 00:02.0
1070 11:46:30.942350 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1071 11:46:30.945708 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1072 11:46:30.949316 Allocating resources...
1073 11:46:30.949937 Reading resources...
1074 11:46:30.956342 Root Device read_resources bus 0 link: 0
1075 11:46:30.958699 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1076 11:46:30.966008 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1077 11:46:30.968701 DOMAIN: 0000 read_resources bus 0 link: 0
1078 11:46:30.975538 PCI: 00:14.0 read_resources bus 0 link: 0
1079 11:46:30.978583 USB0 port 0 read_resources bus 0 link: 0
1080 11:46:30.987152 USB0 port 0 read_resources bus 0 link: 0 done
1081 11:46:30.990101 PCI: 00:14.0 read_resources bus 0 link: 0 done
1082 11:46:30.997443 PCI: 00:15.0 read_resources bus 1 link: 0
1083 11:46:31.000890 PCI: 00:15.0 read_resources bus 1 link: 0 done
1084 11:46:31.007613 PCI: 00:15.1 read_resources bus 2 link: 0
1085 11:46:31.010728 PCI: 00:15.1 read_resources bus 2 link: 0 done
1086 11:46:31.018403 PCI: 00:19.0 read_resources bus 3 link: 0
1087 11:46:31.025536 PCI: 00:19.0 read_resources bus 3 link: 0 done
1088 11:46:31.028041 PCI: 00:1d.0 read_resources bus 1 link: 0
1089 11:46:31.035149 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1090 11:46:31.038073 PCI: 00:1e.2 read_resources bus 4 link: 0
1091 11:46:31.044398 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1092 11:46:31.048049 PCI: 00:1e.3 read_resources bus 5 link: 0
1093 11:46:31.054774 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1094 11:46:31.058227 PCI: 00:1f.0 read_resources bus 0 link: 0
1095 11:46:31.064486 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1096 11:46:31.071385 DOMAIN: 0000 read_resources bus 0 link: 0 done
1097 11:46:31.074196 Root Device read_resources bus 0 link: 0 done
1098 11:46:31.077784 Done reading resources.
1099 11:46:31.081420 Show resources in subtree (Root Device)...After reading.
1100 11:46:31.087868 Root Device child on link 0 CPU_CLUSTER: 0
1101 11:46:31.090658 CPU_CLUSTER: 0 child on link 0 APIC: 00
1102 11:46:31.091251 APIC: 00
1103 11:46:31.094328 APIC: 02
1104 11:46:31.094883 APIC: 03
1105 11:46:31.097657 APIC: 06
1106 11:46:31.098120 APIC: 01
1107 11:46:31.098484 APIC: 04
1108 11:46:31.101203 APIC: 07
1109 11:46:31.101661 APIC: 05
1110 11:46:31.104857 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1111 11:46:31.114513 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1112 11:46:31.162055 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1113 11:46:31.162591 PCI: 00:00.0
1114 11:46:31.162954 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1115 11:46:31.163361 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1116 11:46:31.163773 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1117 11:46:31.166268 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1118 11:46:31.172791 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1119 11:46:31.182916 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1120 11:46:31.192580 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1121 11:46:31.202860 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1122 11:46:31.209797 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1123 11:46:31.219117 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1124 11:46:31.229166 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1125 11:46:31.239007 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1126 11:46:31.249052 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1127 11:46:31.259451 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1128 11:46:31.265679 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1129 11:46:31.275707 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1130 11:46:31.278789 PCI: 00:02.0
1131 11:46:31.288971 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1132 11:46:31.298999 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1133 11:46:31.308464 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1134 11:46:31.309018 PCI: 00:04.0
1135 11:46:31.311833 PCI: 00:08.0
1136 11:46:31.322442 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1137 11:46:31.323000 PCI: 00:12.0
1138 11:46:31.331325 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1139 11:46:31.334861 PCI: 00:14.0 child on link 0 USB0 port 0
1140 11:46:31.344525 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1141 11:46:31.351377 USB0 port 0 child on link 0 USB2 port 0
1142 11:46:31.351807 USB2 port 0
1143 11:46:31.354736 USB2 port 1
1144 11:46:31.355191 USB2 port 2
1145 11:46:31.357858 USB2 port 3
1146 11:46:31.358282 USB2 port 5
1147 11:46:31.360978 USB2 port 6
1148 11:46:31.364866 USB2 port 9
1149 11:46:31.365293 USB3 port 0
1150 11:46:31.368233 USB3 port 1
1151 11:46:31.368657 USB3 port 2
1152 11:46:31.370985 USB3 port 3
1153 11:46:31.371408 USB3 port 4
1154 11:46:31.374378 PCI: 00:14.2
1155 11:46:31.384695 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1156 11:46:31.394472 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1157 11:46:31.395000 PCI: 00:14.3
1158 11:46:31.404605 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1159 11:46:31.407637 PCI: 00:15.0 child on link 0 I2C: 01:15
1160 11:46:31.417777 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1161 11:46:31.420916 I2C: 01:15
1162 11:46:31.424413 PCI: 00:15.1 child on link 0 I2C: 02:5d
1163 11:46:31.434078 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 11:46:31.437821 I2C: 02:5d
1165 11:46:31.438390 GENERIC: 0.0
1166 11:46:31.440466 PCI: 00:16.0
1167 11:46:31.450953 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1168 11:46:31.451527 PCI: 00:17.0
1169 11:46:31.460677 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1170 11:46:31.471556 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1171 11:46:31.477480 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1172 11:46:31.487529 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1173 11:46:31.494464 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1174 11:46:31.503791 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1175 11:46:31.506844 PCI: 00:19.0 child on link 0 I2C: 03:1a
1176 11:46:31.517208 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1177 11:46:31.520488 I2C: 03:1a
1178 11:46:31.520939 I2C: 03:38
1179 11:46:31.524022 I2C: 03:39
1180 11:46:31.524611 I2C: 03:3a
1181 11:46:31.527236 I2C: 03:3b
1182 11:46:31.530302 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1183 11:46:31.536661 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1184 11:46:31.547072 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1185 11:46:31.556731 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1186 11:46:31.560100 PCI: 01:00.0
1187 11:46:31.569838 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1188 11:46:31.570404 PCI: 00:1e.0
1189 11:46:31.582937 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1190 11:46:31.592884 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1191 11:46:31.596414 PCI: 00:1e.2 child on link 0 SPI: 00
1192 11:46:31.606234 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 11:46:31.606776 SPI: 00
1194 11:46:31.609242 PCI: 00:1e.3 child on link 0 SPI: 01
1195 11:46:31.619486 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 11:46:31.622962 SPI: 01
1197 11:46:31.626466 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1198 11:46:31.636164 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1199 11:46:31.643000 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1200 11:46:31.645831 PNP: 0c09.0
1201 11:46:31.656556 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1202 11:46:31.657132 PCI: 00:1f.3
1203 11:46:31.666644 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1204 11:46:31.675818 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1205 11:46:31.679360 PCI: 00:1f.4
1206 11:46:31.686184 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1207 11:46:31.696245 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1208 11:46:31.699355 PCI: 00:1f.5
1209 11:46:31.708656 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1210 11:46:31.715332 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1211 11:46:31.718776 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1212 11:46:31.725655 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1213 11:46:31.732232 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1214 11:46:31.735634 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1215 11:46:31.739119 PCI: 00:17.0 18 * [0x60 - 0x67] io
1216 11:46:31.742409 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1217 11:46:31.748732 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1218 11:46:31.755520 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1219 11:46:31.761816 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1220 11:46:31.772250 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1221 11:46:31.779767 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1222 11:46:31.782024 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1223 11:46:31.788517 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1224 11:46:31.795413 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1225 11:46:31.798847 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1226 11:46:31.805137 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1227 11:46:31.808553 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1228 11:46:31.814773 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1229 11:46:31.818247 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1230 11:46:31.825216 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1231 11:46:31.828038 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1232 11:46:31.835210 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1233 11:46:31.837973 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1234 11:46:31.841404 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1235 11:46:31.848694 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1236 11:46:31.851425 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1237 11:46:31.858285 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1238 11:46:31.861265 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1239 11:46:31.867746 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1240 11:46:31.871586 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1241 11:46:31.878131 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1242 11:46:31.881482 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1243 11:46:31.888468 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1244 11:46:31.891650 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1245 11:46:31.898809 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1246 11:46:31.901403 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1247 11:46:31.911423 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1248 11:46:31.915058 avoid_fixed_resources: DOMAIN: 0000
1249 11:46:31.917838 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1250 11:46:31.924504 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1251 11:46:31.934253 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1252 11:46:31.940820 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1253 11:46:31.947655 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1254 11:46:31.957380 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1255 11:46:31.964635 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1256 11:46:31.970652 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1257 11:46:31.977511 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1258 11:46:31.988167 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1259 11:46:31.994376 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1260 11:46:32.000779 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1261 11:46:32.003976 Setting resources...
1262 11:46:32.011246 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1263 11:46:32.014089 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1264 11:46:32.017595 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1265 11:46:32.021323 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1266 11:46:32.024207 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1267 11:46:32.031049 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1268 11:46:32.037077 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1269 11:46:32.044166 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1270 11:46:32.050479 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1271 11:46:32.057039 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1272 11:46:32.060621 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1273 11:46:32.066861 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1274 11:46:32.070896 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1275 11:46:32.077461 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1276 11:46:32.080365 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1277 11:46:32.087122 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1278 11:46:32.090310 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1279 11:46:32.096970 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1280 11:46:32.100322 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1281 11:46:32.106643 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1282 11:46:32.110221 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1283 11:46:32.117120 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1284 11:46:32.120169 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1285 11:46:32.126554 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1286 11:46:32.129992 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1287 11:46:32.136642 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1288 11:46:32.140120 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1289 11:46:32.143396 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1290 11:46:32.150054 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1291 11:46:32.153217 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1292 11:46:32.159934 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1293 11:46:32.162934 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1294 11:46:32.172832 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1295 11:46:32.179417 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1296 11:46:32.186279 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1297 11:46:32.193718 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1298 11:46:32.200582 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1299 11:46:32.205905 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1300 11:46:32.209371 Root Device assign_resources, bus 0 link: 0
1301 11:46:32.216462 DOMAIN: 0000 assign_resources, bus 0 link: 0
1302 11:46:32.223187 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1303 11:46:32.232929 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1304 11:46:32.240097 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1305 11:46:32.249459 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1306 11:46:32.255761 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1307 11:46:32.266335 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1308 11:46:32.268999 PCI: 00:14.0 assign_resources, bus 0 link: 0
1309 11:46:32.275444 PCI: 00:14.0 assign_resources, bus 0 link: 0
1310 11:46:32.281842 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1311 11:46:32.288820 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1312 11:46:32.299215 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1313 11:46:32.305383 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1314 11:46:32.312352 PCI: 00:15.0 assign_resources, bus 1 link: 0
1315 11:46:32.315721 PCI: 00:15.0 assign_resources, bus 1 link: 0
1316 11:46:32.326300 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1317 11:46:32.328642 PCI: 00:15.1 assign_resources, bus 2 link: 0
1318 11:46:32.332248 PCI: 00:15.1 assign_resources, bus 2 link: 0
1319 11:46:32.342646 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1320 11:46:32.349037 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1321 11:46:32.358644 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1322 11:46:32.365658 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1323 11:46:32.372467 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1324 11:46:32.382269 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1325 11:46:32.389089 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1326 11:46:32.398159 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1327 11:46:32.402315 PCI: 00:19.0 assign_resources, bus 3 link: 0
1328 11:46:32.405053 PCI: 00:19.0 assign_resources, bus 3 link: 0
1329 11:46:32.414874 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1330 11:46:32.425051 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1331 11:46:32.431480 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1332 11:46:32.438833 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1333 11:46:32.444383 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1334 11:46:32.451114 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1335 11:46:32.457965 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1336 11:46:32.467690 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1337 11:46:32.470913 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1338 11:46:32.474327 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1339 11:46:32.484036 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1340 11:46:32.487537 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1341 11:46:32.493721 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1342 11:46:32.497388 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1343 11:46:32.504387 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1344 11:46:32.507475 LPC: Trying to open IO window from 800 size 1ff
1345 11:46:32.518260 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1346 11:46:32.523981 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1347 11:46:32.533891 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1348 11:46:32.540822 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1349 11:46:32.544204 DOMAIN: 0000 assign_resources, bus 0 link: 0
1350 11:46:32.550935 Root Device assign_resources, bus 0 link: 0
1351 11:46:32.553761 Done setting resources.
1352 11:46:32.560528 Show resources in subtree (Root Device)...After assigning values.
1353 11:46:32.563959 Root Device child on link 0 CPU_CLUSTER: 0
1354 11:46:32.567467 CPU_CLUSTER: 0 child on link 0 APIC: 00
1355 11:46:32.568016 APIC: 00
1356 11:46:32.570670 APIC: 02
1357 11:46:32.571118 APIC: 03
1358 11:46:32.573749 APIC: 06
1359 11:46:32.574197 APIC: 01
1360 11:46:32.574550 APIC: 04
1361 11:46:32.577234 APIC: 07
1362 11:46:32.577779 APIC: 05
1363 11:46:32.580721 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1364 11:46:32.591142 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1365 11:46:32.604178 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1366 11:46:32.604734 PCI: 00:00.0
1367 11:46:32.614066 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1368 11:46:32.623606 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1369 11:46:32.633316 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1370 11:46:32.643190 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1371 11:46:32.650148 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1372 11:46:32.659722 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1373 11:46:32.670191 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1374 11:46:32.680228 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1375 11:46:32.689522 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1376 11:46:32.696518 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1377 11:46:32.705833 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1378 11:46:32.716178 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1379 11:46:32.725567 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1380 11:46:32.736205 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1381 11:46:32.746080 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1382 11:46:32.755690 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1383 11:46:32.756286 PCI: 00:02.0
1384 11:46:32.765343 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1385 11:46:32.779019 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1386 11:46:32.785561 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1387 11:46:32.789277 PCI: 00:04.0
1388 11:46:32.789736 PCI: 00:08.0
1389 11:46:32.801734 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1390 11:46:32.802288 PCI: 00:12.0
1391 11:46:32.811854 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1392 11:46:32.815226 PCI: 00:14.0 child on link 0 USB0 port 0
1393 11:46:32.828905 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1394 11:46:32.831581 USB0 port 0 child on link 0 USB2 port 0
1395 11:46:32.835403 USB2 port 0
1396 11:46:32.835959 USB2 port 1
1397 11:46:32.837925 USB2 port 2
1398 11:46:32.838380 USB2 port 3
1399 11:46:32.841514 USB2 port 5
1400 11:46:32.842074 USB2 port 6
1401 11:46:32.844790 USB2 port 9
1402 11:46:32.845351 USB3 port 0
1403 11:46:32.847856 USB3 port 1
1404 11:46:32.848371 USB3 port 2
1405 11:46:32.851833 USB3 port 3
1406 11:46:32.852461 USB3 port 4
1407 11:46:32.854348 PCI: 00:14.2
1408 11:46:32.864925 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1409 11:46:32.874621 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1410 11:46:32.877859 PCI: 00:14.3
1411 11:46:32.888124 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1412 11:46:32.891367 PCI: 00:15.0 child on link 0 I2C: 01:15
1413 11:46:32.900809 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1414 11:46:32.904045 I2C: 01:15
1415 11:46:32.907986 PCI: 00:15.1 child on link 0 I2C: 02:5d
1416 11:46:32.917445 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1417 11:46:32.918011 I2C: 02:5d
1418 11:46:32.921050 GENERIC: 0.0
1419 11:46:32.921645 PCI: 00:16.0
1420 11:46:32.934447 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1421 11:46:32.935016 PCI: 00:17.0
1422 11:46:32.943800 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1423 11:46:32.954620 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1424 11:46:32.963706 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1425 11:46:32.973457 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1426 11:46:32.983684 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1427 11:46:32.993673 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1428 11:46:32.997427 PCI: 00:19.0 child on link 0 I2C: 03:1a
1429 11:46:33.006718 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1430 11:46:33.007290 I2C: 03:1a
1431 11:46:33.009791 I2C: 03:38
1432 11:46:33.010246 I2C: 03:39
1433 11:46:33.013916 I2C: 03:3a
1434 11:46:33.014475 I2C: 03:3b
1435 11:46:33.020031 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1436 11:46:33.029901 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1437 11:46:33.040448 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1438 11:46:33.049875 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1439 11:46:33.050444 PCI: 01:00.0
1440 11:46:33.059983 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1441 11:46:33.063471 PCI: 00:1e.0
1442 11:46:33.072896 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1443 11:46:33.083116 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1444 11:46:33.089685 PCI: 00:1e.2 child on link 0 SPI: 00
1445 11:46:33.099381 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1446 11:46:33.099957 SPI: 00
1447 11:46:33.103179 PCI: 00:1e.3 child on link 0 SPI: 01
1448 11:46:33.112552 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1449 11:46:33.115727 SPI: 01
1450 11:46:33.119036 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1451 11:46:33.129445 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1452 11:46:33.135705 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1453 11:46:33.139294 PNP: 0c09.0
1454 11:46:33.148997 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1455 11:46:33.149548 PCI: 00:1f.3
1456 11:46:33.159076 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1457 11:46:33.168964 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1458 11:46:33.171995 PCI: 00:1f.4
1459 11:46:33.182156 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1460 11:46:33.191980 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1461 11:46:33.192579 PCI: 00:1f.5
1462 11:46:33.202190 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1463 11:46:33.205262 Done allocating resources.
1464 11:46:33.211837 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1465 11:46:33.215049 Enabling resources...
1466 11:46:33.218808 PCI: 00:00.0 subsystem <- 8086/9b61
1467 11:46:33.221641 PCI: 00:00.0 cmd <- 06
1468 11:46:33.225104 PCI: 00:02.0 subsystem <- 8086/9b41
1469 11:46:33.228828 PCI: 00:02.0 cmd <- 03
1470 11:46:33.229390 PCI: 00:08.0 cmd <- 06
1471 11:46:33.234980 PCI: 00:12.0 subsystem <- 8086/02f9
1472 11:46:33.235540 PCI: 00:12.0 cmd <- 02
1473 11:46:33.238486 PCI: 00:14.0 subsystem <- 8086/02ed
1474 11:46:33.241957 PCI: 00:14.0 cmd <- 02
1475 11:46:33.244763 PCI: 00:14.2 cmd <- 02
1476 11:46:33.248496 PCI: 00:14.3 subsystem <- 8086/02f0
1477 11:46:33.251366 PCI: 00:14.3 cmd <- 02
1478 11:46:33.254341 PCI: 00:15.0 subsystem <- 8086/02e8
1479 11:46:33.258051 PCI: 00:15.0 cmd <- 02
1480 11:46:33.261805 PCI: 00:15.1 subsystem <- 8086/02e9
1481 11:46:33.264789 PCI: 00:15.1 cmd <- 02
1482 11:46:33.268462 PCI: 00:16.0 subsystem <- 8086/02e0
1483 11:46:33.271313 PCI: 00:16.0 cmd <- 02
1484 11:46:33.274170 PCI: 00:17.0 subsystem <- 8086/02d3
1485 11:46:33.274629 PCI: 00:17.0 cmd <- 03
1486 11:46:33.281301 PCI: 00:19.0 subsystem <- 8086/02c5
1487 11:46:33.281860 PCI: 00:19.0 cmd <- 02
1488 11:46:33.284556 PCI: 00:1d.0 bridge ctrl <- 0013
1489 11:46:33.288176 PCI: 00:1d.0 subsystem <- 8086/02b0
1490 11:46:33.291628 PCI: 00:1d.0 cmd <- 06
1491 11:46:33.294926 PCI: 00:1e.0 subsystem <- 8086/02a8
1492 11:46:33.298292 PCI: 00:1e.0 cmd <- 06
1493 11:46:33.300982 PCI: 00:1e.2 subsystem <- 8086/02aa
1494 11:46:33.304424 PCI: 00:1e.2 cmd <- 06
1495 11:46:33.307643 PCI: 00:1e.3 subsystem <- 8086/02ab
1496 11:46:33.310966 PCI: 00:1e.3 cmd <- 02
1497 11:46:33.314553 PCI: 00:1f.0 subsystem <- 8086/0284
1498 11:46:33.318028 PCI: 00:1f.0 cmd <- 407
1499 11:46:33.321493 PCI: 00:1f.3 subsystem <- 8086/02c8
1500 11:46:33.324860 PCI: 00:1f.3 cmd <- 02
1501 11:46:33.327485 PCI: 00:1f.4 subsystem <- 8086/02a3
1502 11:46:33.331337 PCI: 00:1f.4 cmd <- 03
1503 11:46:33.334228 PCI: 00:1f.5 subsystem <- 8086/02a4
1504 11:46:33.334683 PCI: 00:1f.5 cmd <- 406
1505 11:46:33.344832 PCI: 01:00.0 cmd <- 02
1506 11:46:33.350032 done.
1507 11:46:33.361110 ME: Version: 14.0.39.1367
1508 11:46:33.367543 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 10
1509 11:46:33.371471 Initializing devices...
1510 11:46:33.372027 Root Device init ...
1511 11:46:33.377451 Chrome EC: Set SMI mask to 0x0000000000000000
1512 11:46:33.380606 Chrome EC: clear events_b mask to 0x0000000000000000
1513 11:46:33.387563 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1514 11:46:33.394640 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1515 11:46:33.400636 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1516 11:46:33.404151 Chrome EC: Set WAKE mask to 0x0000000000000000
1517 11:46:33.407302 Root Device init finished in 35161 usecs
1518 11:46:33.411023 CPU_CLUSTER: 0 init ...
1519 11:46:33.417700 CPU_CLUSTER: 0 init finished in 2447 usecs
1520 11:46:33.421924 PCI: 00:00.0 init ...
1521 11:46:33.425468 CPU TDP: 15 Watts
1522 11:46:33.428170 CPU PL2 = 64 Watts
1523 11:46:33.431632 PCI: 00:00.0 init finished in 7080 usecs
1524 11:46:33.435024 PCI: 00:02.0 init ...
1525 11:46:33.438298 PCI: 00:02.0 init finished in 2252 usecs
1526 11:46:33.441826 PCI: 00:08.0 init ...
1527 11:46:33.444908 PCI: 00:08.0 init finished in 2251 usecs
1528 11:46:33.448530 PCI: 00:12.0 init ...
1529 11:46:33.451806 PCI: 00:12.0 init finished in 2243 usecs
1530 11:46:33.454700 PCI: 00:14.0 init ...
1531 11:46:33.458498 PCI: 00:14.0 init finished in 2251 usecs
1532 11:46:33.461158 PCI: 00:14.2 init ...
1533 11:46:33.464527 PCI: 00:14.2 init finished in 2252 usecs
1534 11:46:33.467742 PCI: 00:14.3 init ...
1535 11:46:33.471582 PCI: 00:14.3 init finished in 2270 usecs
1536 11:46:33.475070 PCI: 00:15.0 init ...
1537 11:46:33.477653 DW I2C bus 0 at 0xd121f000 (400 KHz)
1538 11:46:33.481834 PCI: 00:15.0 init finished in 5969 usecs
1539 11:46:33.484589 PCI: 00:15.1 init ...
1540 11:46:33.487686 DW I2C bus 1 at 0xd1220000 (400 KHz)
1541 11:46:33.494598 PCI: 00:15.1 init finished in 5967 usecs
1542 11:46:33.495153 PCI: 00:16.0 init ...
1543 11:46:33.501202 PCI: 00:16.0 init finished in 2252 usecs
1544 11:46:33.501755 PCI: 00:19.0 init ...
1545 11:46:33.507877 DW I2C bus 4 at 0xd1222000 (400 KHz)
1546 11:46:33.510999 PCI: 00:19.0 init finished in 5976 usecs
1547 11:46:33.514984 PCI: 00:1d.0 init ...
1548 11:46:33.517679 Initializing PCH PCIe bridge.
1549 11:46:33.520860 PCI: 00:1d.0 init finished in 5276 usecs
1550 11:46:33.523973 PCI: 00:1f.0 init ...
1551 11:46:33.527821 IOAPIC: Initializing IOAPIC at 0xfec00000
1552 11:46:33.534267 IOAPIC: Bootstrap Processor Local APIC = 0x00
1553 11:46:33.534854 IOAPIC: ID = 0x02
1554 11:46:33.537185 IOAPIC: Dumping registers
1555 11:46:33.540645 reg 0x0000: 0x02000000
1556 11:46:33.544101 reg 0x0001: 0x00770020
1557 11:46:33.544559 reg 0x0002: 0x00000000
1558 11:46:33.550747 PCI: 00:1f.0 init finished in 23515 usecs
1559 11:46:33.553925 PCI: 00:1f.4 init ...
1560 11:46:33.557327 PCI: 00:1f.4 init finished in 2261 usecs
1561 11:46:33.567903 PCI: 01:00.0 init ...
1562 11:46:33.571114 PCI: 01:00.0 init finished in 2253 usecs
1563 11:46:33.575449 PNP: 0c09.0 init ...
1564 11:46:33.578440 Google Chrome EC uptime: 11.104 seconds
1565 11:46:33.585164 Google Chrome AP resets since EC boot: 0
1566 11:46:33.588907 Google Chrome most recent AP reset causes:
1567 11:46:33.595023 Google Chrome EC reset flags at last EC boot: reset-pin
1568 11:46:33.598694 PNP: 0c09.0 init finished in 20564 usecs
1569 11:46:33.601515 Devices initialized
1570 11:46:33.602009 Show all devs... After init.
1571 11:46:33.605293 Root Device: enabled 1
1572 11:46:33.608521 CPU_CLUSTER: 0: enabled 1
1573 11:46:33.612167 DOMAIN: 0000: enabled 1
1574 11:46:33.612649 APIC: 00: enabled 1
1575 11:46:33.614997 PCI: 00:00.0: enabled 1
1576 11:46:33.618943 PCI: 00:02.0: enabled 1
1577 11:46:33.621583 PCI: 00:04.0: enabled 0
1578 11:46:33.621995 PCI: 00:05.0: enabled 0
1579 11:46:33.624664 PCI: 00:12.0: enabled 1
1580 11:46:33.627998 PCI: 00:12.5: enabled 0
1581 11:46:33.628435 PCI: 00:12.6: enabled 0
1582 11:46:33.631175 PCI: 00:14.0: enabled 1
1583 11:46:33.634968 PCI: 00:14.1: enabled 0
1584 11:46:33.638045 PCI: 00:14.3: enabled 1
1585 11:46:33.638456 PCI: 00:14.5: enabled 0
1586 11:46:33.641702 PCI: 00:15.0: enabled 1
1587 11:46:33.645225 PCI: 00:15.1: enabled 1
1588 11:46:33.647747 PCI: 00:15.2: enabled 0
1589 11:46:33.648195 PCI: 00:15.3: enabled 0
1590 11:46:33.651573 PCI: 00:16.0: enabled 1
1591 11:46:33.654585 PCI: 00:16.1: enabled 0
1592 11:46:33.658082 PCI: 00:16.2: enabled 0
1593 11:46:33.658496 PCI: 00:16.3: enabled 0
1594 11:46:33.661160 PCI: 00:16.4: enabled 0
1595 11:46:33.664563 PCI: 00:16.5: enabled 0
1596 11:46:33.667892 PCI: 00:17.0: enabled 1
1597 11:46:33.668526 PCI: 00:19.0: enabled 1
1598 11:46:33.671080 PCI: 00:19.1: enabled 0
1599 11:46:33.674398 PCI: 00:19.2: enabled 0
1600 11:46:33.674808 PCI: 00:1a.0: enabled 0
1601 11:46:33.677681 PCI: 00:1c.0: enabled 0
1602 11:46:33.681281 PCI: 00:1c.1: enabled 0
1603 11:46:33.684331 PCI: 00:1c.2: enabled 0
1604 11:46:33.684741 PCI: 00:1c.3: enabled 0
1605 11:46:33.687598 PCI: 00:1c.4: enabled 0
1606 11:46:33.690891 PCI: 00:1c.5: enabled 0
1607 11:46:33.694583 PCI: 00:1c.6: enabled 0
1608 11:46:33.694998 PCI: 00:1c.7: enabled 0
1609 11:46:33.697757 PCI: 00:1d.0: enabled 1
1610 11:46:33.700667 PCI: 00:1d.1: enabled 0
1611 11:46:33.704365 PCI: 00:1d.2: enabled 0
1612 11:46:33.704921 PCI: 00:1d.3: enabled 0
1613 11:46:33.707967 PCI: 00:1d.4: enabled 0
1614 11:46:33.710953 PCI: 00:1d.5: enabled 0
1615 11:46:33.713897 PCI: 00:1e.0: enabled 1
1616 11:46:33.714349 PCI: 00:1e.1: enabled 0
1617 11:46:33.717343 PCI: 00:1e.2: enabled 1
1618 11:46:33.720920 PCI: 00:1e.3: enabled 1
1619 11:46:33.721475 PCI: 00:1f.0: enabled 1
1620 11:46:33.723829 PCI: 00:1f.1: enabled 0
1621 11:46:33.727693 PCI: 00:1f.2: enabled 0
1622 11:46:33.731118 PCI: 00:1f.3: enabled 1
1623 11:46:33.731668 PCI: 00:1f.4: enabled 1
1624 11:46:33.734184 PCI: 00:1f.5: enabled 1
1625 11:46:33.737525 PCI: 00:1f.6: enabled 0
1626 11:46:33.740603 USB0 port 0: enabled 1
1627 11:46:33.741059 I2C: 01:15: enabled 1
1628 11:46:33.744582 I2C: 02:5d: enabled 1
1629 11:46:33.747471 GENERIC: 0.0: enabled 1
1630 11:46:33.748020 I2C: 03:1a: enabled 1
1631 11:46:33.750861 I2C: 03:38: enabled 1
1632 11:46:33.753545 I2C: 03:39: enabled 1
1633 11:46:33.754000 I2C: 03:3a: enabled 1
1634 11:46:33.757537 I2C: 03:3b: enabled 1
1635 11:46:33.760783 PCI: 00:00.0: enabled 1
1636 11:46:33.761237 SPI: 00: enabled 1
1637 11:46:33.764016 SPI: 01: enabled 1
1638 11:46:33.766817 PNP: 0c09.0: enabled 1
1639 11:46:33.767271 USB2 port 0: enabled 1
1640 11:46:33.770821 USB2 port 1: enabled 1
1641 11:46:33.773786 USB2 port 2: enabled 0
1642 11:46:33.777150 USB2 port 3: enabled 0
1643 11:46:33.777605 USB2 port 5: enabled 0
1644 11:46:33.780111 USB2 port 6: enabled 1
1645 11:46:33.783940 USB2 port 9: enabled 1
1646 11:46:33.784547 USB3 port 0: enabled 1
1647 11:46:33.787433 USB3 port 1: enabled 1
1648 11:46:33.790054 USB3 port 2: enabled 1
1649 11:46:33.790511 USB3 port 3: enabled 1
1650 11:46:33.793890 USB3 port 4: enabled 0
1651 11:46:33.796943 APIC: 02: enabled 1
1652 11:46:33.797397 APIC: 03: enabled 1
1653 11:46:33.800558 APIC: 06: enabled 1
1654 11:46:33.803188 APIC: 01: enabled 1
1655 11:46:33.803639 APIC: 04: enabled 1
1656 11:46:33.806778 APIC: 07: enabled 1
1657 11:46:33.807345 APIC: 05: enabled 1
1658 11:46:33.809974 PCI: 00:08.0: enabled 1
1659 11:46:33.813225 PCI: 00:14.2: enabled 1
1660 11:46:33.816591 PCI: 01:00.0: enabled 1
1661 11:46:33.820779 Disabling ACPI via APMC:
1662 11:46:33.823835 done.
1663 11:46:33.826877 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1664 11:46:33.830715 ELOG: NV offset 0xaf0000 size 0x4000
1665 11:46:33.837069 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1666 11:46:33.843521 ELOG: Event(17) added with size 13 at 2024-04-05 11:46:31 UTC
1667 11:46:33.850414 ELOG: Event(92) added with size 9 at 2024-04-05 11:46:31 UTC
1668 11:46:33.856968 ELOG: Event(93) added with size 9 at 2024-04-05 11:46:31 UTC
1669 11:46:33.863846 ELOG: Event(9A) added with size 9 at 2024-04-05 11:46:31 UTC
1670 11:46:33.870504 ELOG: Event(9E) added with size 10 at 2024-04-05 11:46:31 UTC
1671 11:46:33.876875 ELOG: Event(9F) added with size 14 at 2024-04-05 11:46:31 UTC
1672 11:46:33.879456 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1673 11:46:33.887460 ELOG: Event(A1) added with size 10 at 2024-04-05 11:46:31 UTC
1674 11:46:33.896710 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1675 11:46:33.903476 ELOG: Event(A0) added with size 9 at 2024-04-05 11:46:31 UTC
1676 11:46:33.907361 elog_add_boot_reason: Logged dev mode boot
1677 11:46:33.910872 Finalize devices...
1678 11:46:33.911337 PCI: 00:17.0 final
1679 11:46:33.913525 Devices finalized
1680 11:46:33.916769 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1681 11:46:33.923445 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1682 11:46:33.926463 ME: HFSTS1 : 0x90000245
1683 11:46:33.930072 ME: HFSTS2 : 0x3B850126
1684 11:46:33.936451 ME: HFSTS3 : 0x00000020
1685 11:46:33.939859 ME: HFSTS4 : 0x00004800
1686 11:46:33.942988 ME: HFSTS5 : 0x00000000
1687 11:46:33.947284 ME: HFSTS6 : 0x40400006
1688 11:46:33.949847 ME: Manufacturing Mode : NO
1689 11:46:33.953771 ME: FW Partition Table : OK
1690 11:46:33.956254 ME: Bringup Loader Failure : NO
1691 11:46:33.960256 ME: Firmware Init Complete : YES
1692 11:46:33.963049 ME: Boot Options Present : NO
1693 11:46:33.966846 ME: Update In Progress : NO
1694 11:46:33.969600 ME: D0i3 Support : YES
1695 11:46:33.973004 ME: Low Power State Enabled : NO
1696 11:46:33.976345 ME: CPU Replaced : NO
1697 11:46:33.979767 ME: CPU Replacement Valid : YES
1698 11:46:33.983098 ME: Current Working State : 5
1699 11:46:33.986293 ME: Current Operation State : 1
1700 11:46:33.989181 ME: Current Operation Mode : 0
1701 11:46:33.992464 ME: Error Code : 0
1702 11:46:33.995945 ME: CPU Debug Disabled : YES
1703 11:46:33.999458 ME: TXT Support : NO
1704 11:46:34.006423 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1705 11:46:34.012604 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1706 11:46:34.013100 CBFS @ c08000 size 3f8000
1707 11:46:34.019132 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1708 11:46:34.022556 CBFS: Locating 'fallback/dsdt.aml'
1709 11:46:34.025971 CBFS: Found @ offset 10bb80 size 3fa5
1710 11:46:34.032575 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1711 11:46:34.035830 CBFS @ c08000 size 3f8000
1712 11:46:34.038792 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1713 11:46:34.042271 CBFS: Locating 'fallback/slic'
1714 11:46:34.047315 CBFS: 'fallback/slic' not found.
1715 11:46:34.054322 ACPI: Writing ACPI tables at 99b3e000.
1716 11:46:34.054837 ACPI: * FACS
1717 11:46:34.057385 ACPI: * DSDT
1718 11:46:34.060963 Ramoops buffer: 0x100000@0x99a3d000.
1719 11:46:34.064326 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1720 11:46:34.071209 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1721 11:46:34.073994 Google Chrome EC: version:
1722 11:46:34.076979 ro: helios_v2.0.2659-56403530b
1723 11:46:34.080489 rw: helios_v2.0.2849-c41de27e7d
1724 11:46:34.081011 running image: 1
1725 11:46:34.085296 ACPI: * FADT
1726 11:46:34.085810 SCI is IRQ9
1727 11:46:34.091730 ACPI: added table 1/32, length now 40
1728 11:46:34.092293 ACPI: * SSDT
1729 11:46:34.094932 Found 1 CPU(s) with 8 core(s) each.
1730 11:46:34.098736 Error: Could not locate 'wifi_sar' in VPD.
1731 11:46:34.105345 Checking CBFS for default SAR values
1732 11:46:34.108386 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1733 11:46:34.111681 CBFS @ c08000 size 3f8000
1734 11:46:34.118010 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1735 11:46:34.121417 CBFS: Locating 'wifi_sar_defaults.hex'
1736 11:46:34.124726 CBFS: Found @ offset 5fac0 size 77
1737 11:46:34.128159 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1738 11:46:34.134776 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1739 11:46:34.138032 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1740 11:46:34.144874 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1741 11:46:34.148226 failed to find key in VPD: dsm_calib_r0_0
1742 11:46:34.157631 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1743 11:46:34.160999 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1744 11:46:34.164691 failed to find key in VPD: dsm_calib_r0_1
1745 11:46:34.174322 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1746 11:46:34.181076 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1747 11:46:34.184518 failed to find key in VPD: dsm_calib_r0_2
1748 11:46:34.194252 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1749 11:46:34.197376 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1750 11:46:34.203896 failed to find key in VPD: dsm_calib_r0_3
1751 11:46:34.210655 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1752 11:46:34.217205 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1753 11:46:34.220767 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1754 11:46:34.223924 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1755 11:46:34.227997 EC returned error result code 1
1756 11:46:34.232272 EC returned error result code 1
1757 11:46:34.235363 EC returned error result code 1
1758 11:46:34.242183 PS2K: Bad resp from EC. Vivaldi disabled!
1759 11:46:34.245550 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1760 11:46:34.252616 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1761 11:46:34.259011 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1762 11:46:34.261813 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1763 11:46:34.268466 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1764 11:46:34.274890 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1765 11:46:34.281823 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1766 11:46:34.284917 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1767 11:46:34.288235 ACPI: added table 2/32, length now 44
1768 11:46:34.291424 ACPI: * MCFG
1769 11:46:34.294917 ACPI: added table 3/32, length now 48
1770 11:46:34.298129 ACPI: * TPM2
1771 11:46:34.301264 TPM2 log created at 99a2d000
1772 11:46:34.305096 ACPI: added table 4/32, length now 52
1773 11:46:34.305656 ACPI: * MADT
1774 11:46:34.308018 SCI is IRQ9
1775 11:46:34.311311 ACPI: added table 5/32, length now 56
1776 11:46:34.311764 current = 99b43ac0
1777 11:46:34.315280 ACPI: * DMAR
1778 11:46:34.318237 ACPI: added table 6/32, length now 60
1779 11:46:34.321277 ACPI: * IGD OpRegion
1780 11:46:34.321729 GMA: Found VBT in CBFS
1781 11:46:34.325018 GMA: Found valid VBT in CBFS
1782 11:46:34.328247 ACPI: added table 7/32, length now 64
1783 11:46:34.331277 ACPI: * HPET
1784 11:46:34.334939 ACPI: added table 8/32, length now 68
1785 11:46:34.335497 ACPI: done.
1786 11:46:34.338233 ACPI tables: 31744 bytes.
1787 11:46:34.341588 smbios_write_tables: 99a2c000
1788 11:46:34.345146 EC returned error result code 3
1789 11:46:34.348606 Couldn't obtain OEM name from CBI
1790 11:46:34.351359 Create SMBIOS type 17
1791 11:46:34.355000 PCI: 00:00.0 (Intel Cannonlake)
1792 11:46:34.358052 PCI: 00:14.3 (Intel WiFi)
1793 11:46:34.361509 SMBIOS tables: 939 bytes.
1794 11:46:34.364611 Writing table forward entry at 0x00000500
1795 11:46:34.371531 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1796 11:46:34.374659 Writing coreboot table at 0x99b62000
1797 11:46:34.381306 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1798 11:46:34.384933 1. 0000000000001000-000000000009ffff: RAM
1799 11:46:34.387706 2. 00000000000a0000-00000000000fffff: RESERVED
1800 11:46:34.394759 3. 0000000000100000-0000000099a2bfff: RAM
1801 11:46:34.397681 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1802 11:46:34.404463 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1803 11:46:34.411048 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1804 11:46:34.414276 7. 000000009a000000-000000009f7fffff: RESERVED
1805 11:46:34.420961 8. 00000000e0000000-00000000efffffff: RESERVED
1806 11:46:34.424334 9. 00000000fc000000-00000000fc000fff: RESERVED
1807 11:46:34.427669 10. 00000000fe000000-00000000fe00ffff: RESERVED
1808 11:46:34.433913 11. 00000000fed10000-00000000fed17fff: RESERVED
1809 11:46:34.437676 12. 00000000fed80000-00000000fed83fff: RESERVED
1810 11:46:34.443854 13. 00000000fed90000-00000000fed91fff: RESERVED
1811 11:46:34.447376 14. 00000000feda0000-00000000feda1fff: RESERVED
1812 11:46:34.454012 15. 0000000100000000-000000045e7fffff: RAM
1813 11:46:34.457310 Graphics framebuffer located at 0xc0000000
1814 11:46:34.460683 Passing 5 GPIOs to payload:
1815 11:46:34.463708 NAME | PORT | POLARITY | VALUE
1816 11:46:34.470753 write protect | undefined | high | low
1817 11:46:34.474222 lid | undefined | high | high
1818 11:46:34.480745 power | undefined | high | low
1819 11:46:34.487361 oprom | undefined | high | low
1820 11:46:34.490411 EC in RW | 0x000000cb | high | low
1821 11:46:34.493983 Board ID: 4
1822 11:46:34.497109 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1823 11:46:34.500356 CBFS @ c08000 size 3f8000
1824 11:46:34.507149 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1825 11:46:34.513244 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1826 11:46:34.513705 coreboot table: 1492 bytes.
1827 11:46:34.517055 IMD ROOT 0. 99fff000 00001000
1828 11:46:34.520466 IMD SMALL 1. 99ffe000 00001000
1829 11:46:34.523643 FSP MEMORY 2. 99c4e000 003b0000
1830 11:46:34.527328 CONSOLE 3. 99c2e000 00020000
1831 11:46:34.530212 FMAP 4. 99c2d000 0000054e
1832 11:46:34.534019 TIME STAMP 5. 99c2c000 00000910
1833 11:46:34.537025 VBOOT WORK 6. 99c18000 00014000
1834 11:46:34.540375 MRC DATA 7. 99c16000 00001958
1835 11:46:34.543428 ROMSTG STCK 8. 99c15000 00001000
1836 11:46:34.546763 AFTER CAR 9. 99c0b000 0000a000
1837 11:46:34.550249 RAMSTAGE 10. 99baf000 0005c000
1838 11:46:34.553149 REFCODE 11. 99b7a000 00035000
1839 11:46:34.556698 SMM BACKUP 12. 99b6a000 00010000
1840 11:46:34.560047 COREBOOT 13. 99b62000 00008000
1841 11:46:34.563481 ACPI 14. 99b3e000 00024000
1842 11:46:34.567182 ACPI GNVS 15. 99b3d000 00001000
1843 11:46:34.569786 RAMOOPS 16. 99a3d000 00100000
1844 11:46:34.573348 TPM2 TCGLOG17. 99a2d000 00010000
1845 11:46:34.577058 SMBIOS 18. 99a2c000 00000800
1846 11:46:34.580145 IMD small region:
1847 11:46:34.583455 IMD ROOT 0. 99ffec00 00000400
1848 11:46:34.586718 FSP RUNTIME 1. 99ffebe0 00000004
1849 11:46:34.589938 EC HOSTEVENT 2. 99ffebc0 00000008
1850 11:46:34.593588 POWER STATE 3. 99ffeb80 00000040
1851 11:46:34.596412 ROMSTAGE 4. 99ffeb60 00000004
1852 11:46:34.600409 MEM INFO 5. 99ffe9a0 000001b9
1853 11:46:34.603171 VPD 6. 99ffe920 0000006c
1854 11:46:34.606584 MTRR: Physical address space:
1855 11:46:34.613174 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1856 11:46:34.620097 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1857 11:46:34.626345 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1858 11:46:34.633442 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1859 11:46:34.639830 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1860 11:46:34.646463 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1861 11:46:34.652732 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1862 11:46:34.656175 MTRR: Fixed MSR 0x250 0x0606060606060606
1863 11:46:34.659241 MTRR: Fixed MSR 0x258 0x0606060606060606
1864 11:46:34.662714 MTRR: Fixed MSR 0x259 0x0000000000000000
1865 11:46:34.666122 MTRR: Fixed MSR 0x268 0x0606060606060606
1866 11:46:34.672973 MTRR: Fixed MSR 0x269 0x0606060606060606
1867 11:46:34.676134 MTRR: Fixed MSR 0x26a 0x0606060606060606
1868 11:46:34.679437 MTRR: Fixed MSR 0x26b 0x0606060606060606
1869 11:46:34.682525 MTRR: Fixed MSR 0x26c 0x0606060606060606
1870 11:46:34.689428 MTRR: Fixed MSR 0x26d 0x0606060606060606
1871 11:46:34.692389 MTRR: Fixed MSR 0x26e 0x0606060606060606
1872 11:46:34.695553 MTRR: Fixed MSR 0x26f 0x0606060606060606
1873 11:46:34.699209 call enable_fixed_mtrr()
1874 11:46:34.702695 CPU physical address size: 39 bits
1875 11:46:34.705701 MTRR: default type WB/UC MTRR counts: 6/8.
1876 11:46:34.712177 MTRR: WB selected as default type.
1877 11:46:34.715445 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1878 11:46:34.722207 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1879 11:46:34.728819 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1880 11:46:34.735459 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1881 11:46:34.741799 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1882 11:46:34.749257 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1883 11:46:34.751686 MTRR: Fixed MSR 0x250 0x0606060606060606
1884 11:46:34.758219 MTRR: Fixed MSR 0x258 0x0606060606060606
1885 11:46:34.761718 MTRR: Fixed MSR 0x259 0x0000000000000000
1886 11:46:34.765424 MTRR: Fixed MSR 0x268 0x0606060606060606
1887 11:46:34.769069 MTRR: Fixed MSR 0x269 0x0606060606060606
1888 11:46:34.775012 MTRR: Fixed MSR 0x26a 0x0606060606060606
1889 11:46:34.778880 MTRR: Fixed MSR 0x26b 0x0606060606060606
1890 11:46:34.781839 MTRR: Fixed MSR 0x26c 0x0606060606060606
1891 11:46:34.784701 MTRR: Fixed MSR 0x26d 0x0606060606060606
1892 11:46:34.789258 MTRR: Fixed MSR 0x26e 0x0606060606060606
1893 11:46:34.794836 MTRR: Fixed MSR 0x26f 0x0606060606060606
1894 11:46:34.795254
1895 11:46:34.795577 MTRR check
1896 11:46:34.798413 Fixed MTRRs : Enabled
1897 11:46:34.801717 Variable MTRRs: Enabled
1898 11:46:34.802237
1899 11:46:34.804559 call enable_fixed_mtrr()
1900 11:46:34.808019 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1901 11:46:34.811456 CPU physical address size: 39 bits
1902 11:46:34.818101 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1903 11:46:34.821530 MTRR: Fixed MSR 0x250 0x0606060606060606
1904 11:46:34.824640 MTRR: Fixed MSR 0x258 0x0606060606060606
1905 11:46:34.831411 MTRR: Fixed MSR 0x259 0x0000000000000000
1906 11:46:34.834835 MTRR: Fixed MSR 0x268 0x0606060606060606
1907 11:46:34.837857 MTRR: Fixed MSR 0x269 0x0606060606060606
1908 11:46:34.841355 MTRR: Fixed MSR 0x26a 0x0606060606060606
1909 11:46:34.848219 MTRR: Fixed MSR 0x26b 0x0606060606060606
1910 11:46:34.850790 MTRR: Fixed MSR 0x26c 0x0606060606060606
1911 11:46:34.854671 MTRR: Fixed MSR 0x26d 0x0606060606060606
1912 11:46:34.857650 MTRR: Fixed MSR 0x26e 0x0606060606060606
1913 11:46:34.861014 MTRR: Fixed MSR 0x26f 0x0606060606060606
1914 11:46:34.867670 MTRR: Fixed MSR 0x250 0x0606060606060606
1915 11:46:34.870963 MTRR: Fixed MSR 0x250 0x0606060606060606
1916 11:46:34.874451 MTRR: Fixed MSR 0x258 0x0606060606060606
1917 11:46:34.880648 MTRR: Fixed MSR 0x259 0x0000000000000000
1918 11:46:34.884185 MTRR: Fixed MSR 0x268 0x0606060606060606
1919 11:46:34.887256 MTRR: Fixed MSR 0x269 0x0606060606060606
1920 11:46:34.890948 MTRR: Fixed MSR 0x26a 0x0606060606060606
1921 11:46:34.893977 MTRR: Fixed MSR 0x26b 0x0606060606060606
1922 11:46:34.900913 MTRR: Fixed MSR 0x26c 0x0606060606060606
1923 11:46:34.904182 MTRR: Fixed MSR 0x26d 0x0606060606060606
1924 11:46:34.907375 MTRR: Fixed MSR 0x26e 0x0606060606060606
1925 11:46:34.910427 MTRR: Fixed MSR 0x26f 0x0606060606060606
1926 11:46:34.917152 MTRR: Fixed MSR 0x250 0x0606060606060606
1927 11:46:34.920395 call enable_fixed_mtrr()
1928 11:46:34.923764 MTRR: Fixed MSR 0x258 0x0606060606060606
1929 11:46:34.926820 MTRR: Fixed MSR 0x259 0x0000000000000000
1930 11:46:34.930527 MTRR: Fixed MSR 0x268 0x0606060606060606
1931 11:46:34.934435 MTRR: Fixed MSR 0x269 0x0606060606060606
1932 11:46:34.940310 MTRR: Fixed MSR 0x26a 0x0606060606060606
1933 11:46:34.943717 MTRR: Fixed MSR 0x26b 0x0606060606060606
1934 11:46:34.947569 MTRR: Fixed MSR 0x26c 0x0606060606060606
1935 11:46:34.950512 MTRR: Fixed MSR 0x26d 0x0606060606060606
1936 11:46:34.957206 MTRR: Fixed MSR 0x26e 0x0606060606060606
1937 11:46:34.960996 MTRR: Fixed MSR 0x26f 0x0606060606060606
1938 11:46:34.963332 CPU physical address size: 39 bits
1939 11:46:34.966563 call enable_fixed_mtrr()
1940 11:46:34.969768 CBFS @ c08000 size 3f8000
1941 11:46:34.973559 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1942 11:46:34.980011 MTRR: Fixed MSR 0x250 0x0606060606060606
1943 11:46:34.983485 MTRR: Fixed MSR 0x250 0x0606060606060606
1944 11:46:34.987773 MTRR: Fixed MSR 0x258 0x0606060606060606
1945 11:46:34.989903 MTRR: Fixed MSR 0x259 0x0000000000000000
1946 11:46:34.996863 MTRR: Fixed MSR 0x268 0x0606060606060606
1947 11:46:35.000875 MTRR: Fixed MSR 0x269 0x0606060606060606
1948 11:46:35.003171 MTRR: Fixed MSR 0x26a 0x0606060606060606
1949 11:46:35.006892 MTRR: Fixed MSR 0x26b 0x0606060606060606
1950 11:46:35.013214 MTRR: Fixed MSR 0x26c 0x0606060606060606
1951 11:46:35.016262 MTRR: Fixed MSR 0x26d 0x0606060606060606
1952 11:46:35.019695 MTRR: Fixed MSR 0x26e 0x0606060606060606
1953 11:46:35.023160 MTRR: Fixed MSR 0x26f 0x0606060606060606
1954 11:46:35.029841 MTRR: Fixed MSR 0x258 0x0606060606060606
1955 11:46:35.032797 MTRR: Fixed MSR 0x259 0x0000000000000000
1956 11:46:35.036691 MTRR: Fixed MSR 0x268 0x0606060606060606
1957 11:46:35.039680 MTRR: Fixed MSR 0x269 0x0606060606060606
1958 11:46:35.046583 MTRR: Fixed MSR 0x26a 0x0606060606060606
1959 11:46:35.050497 MTRR: Fixed MSR 0x26b 0x0606060606060606
1960 11:46:35.053085 MTRR: Fixed MSR 0x26c 0x0606060606060606
1961 11:46:35.056402 MTRR: Fixed MSR 0x26d 0x0606060606060606
1962 11:46:35.059067 MTRR: Fixed MSR 0x26e 0x0606060606060606
1963 11:46:35.066516 MTRR: Fixed MSR 0x26f 0x0606060606060606
1964 11:46:35.069749 call enable_fixed_mtrr()
1965 11:46:35.070203 call enable_fixed_mtrr()
1966 11:46:35.072803 CPU physical address size: 39 bits
1967 11:46:35.076223 CBFS: Locating 'fallback/payload'
1968 11:46:35.079566 call enable_fixed_mtrr()
1969 11:46:35.082477 MTRR: Fixed MSR 0x258 0x0606060606060606
1970 11:46:35.086352 CPU physical address size: 39 bits
1971 11:46:35.092777 MTRR: Fixed MSR 0x259 0x0000000000000000
1972 11:46:35.096098 MTRR: Fixed MSR 0x268 0x0606060606060606
1973 11:46:35.099671 MTRR: Fixed MSR 0x269 0x0606060606060606
1974 11:46:35.102279 MTRR: Fixed MSR 0x26a 0x0606060606060606
1975 11:46:35.109107 MTRR: Fixed MSR 0x26b 0x0606060606060606
1976 11:46:35.112038 MTRR: Fixed MSR 0x26c 0x0606060606060606
1977 11:46:35.115479 MTRR: Fixed MSR 0x26d 0x0606060606060606
1978 11:46:35.119122 MTRR: Fixed MSR 0x26e 0x0606060606060606
1979 11:46:35.125977 MTRR: Fixed MSR 0x26f 0x0606060606060606
1980 11:46:35.128955 CBFS: Found @ offset 1c96c0 size 3f798
1981 11:46:35.132454 CPU physical address size: 39 bits
1982 11:46:35.135714 CPU physical address size: 39 bits
1983 11:46:35.138684 Checking segment from ROM address 0xffdd16f8
1984 11:46:35.141758 call enable_fixed_mtrr()
1985 11:46:35.148759 Checking segment from ROM address 0xffdd1714
1986 11:46:35.152537 CPU physical address size: 39 bits
1987 11:46:35.155522 Loading segment from ROM address 0xffdd16f8
1988 11:46:35.158764 code (compression=0)
1989 11:46:35.165160 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1990 11:46:35.175392 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1991 11:46:35.175968 it's not compressed!
1992 11:46:35.269023 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1993 11:46:35.276331 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1994 11:46:35.279243 Loading segment from ROM address 0xffdd1714
1995 11:46:35.282301 Entry Point 0x30000000
1996 11:46:35.285684 Loaded segments
1997 11:46:35.291309 Finalizing chipset.
1998 11:46:35.294665 Finalizing SMM.
1999 11:46:35.298064 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2000 11:46:35.301247 mp_park_aps done after 0 msecs.
2001 11:46:35.307405 Jumping to boot code at 30000000(99b62000)
2002 11:46:35.313990 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2003 11:46:35.314537
2004 11:46:35.314896
2005 11:46:35.315231
2006 11:46:35.317250 Starting depthcharge on Helios...
2007 11:46:35.317703
2008 11:46:35.318898 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2009 11:46:35.319428 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2010 11:46:35.319877 Setting prompt string to ['hatch:']
2011 11:46:35.320369 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2012 11:46:35.327472 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2013 11:46:35.328021
2014 11:46:35.334277 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2015 11:46:35.334834
2016 11:46:35.340669 board_setup: Info: eMMC controller not present; skipping
2017 11:46:35.341126
2018 11:46:35.344228 New NVMe Controller 0x30053ac0 @ 00:1d:00
2019 11:46:35.344794
2020 11:46:35.350786 board_setup: Info: SDHCI controller not present; skipping
2021 11:46:35.351328
2022 11:46:35.357097 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2023 11:46:35.357664
2024 11:46:35.358023 Wipe memory regions:
2025 11:46:35.358361
2026 11:46:35.360311 [0x00000000001000, 0x000000000a0000)
2027 11:46:35.360768
2028 11:46:35.363899 [0x00000000100000, 0x00000030000000)
2029 11:46:35.429913
2030 11:46:35.434235 [0x00000030657430, 0x00000099a2c000)
2031 11:46:35.570197
2032 11:46:35.573382 [0x00000100000000, 0x0000045e800000)
2033 11:46:36.956480
2034 11:46:36.957028 R8152: Initializing
2035 11:46:36.957391
2036 11:46:36.959515 Version 9 (ocp_data = 6010)
2037 11:46:36.964244
2038 11:46:36.964694 R8152: Done initializing
2039 11:46:36.965056
2040 11:46:36.966904 Adding net device
2041 11:46:37.449512
2042 11:46:37.449706 R8152: Initializing
2043 11:46:37.449774
2044 11:46:37.452659 Version 6 (ocp_data = 5c30)
2045 11:46:37.452739
2046 11:46:37.456405 R8152: Done initializing
2047 11:46:37.456483
2048 11:46:37.459492 net_add_device: Attemp to include the same device
2049 11:46:37.462955
2050 11:46:37.470103 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2051 11:46:37.470182
2052 11:46:37.470243
2053 11:46:37.470327
2054 11:46:37.470609 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2056 11:46:37.570987 hatch: tftpboot 192.168.201.1 13268536/tftp-deploy-o962d_8u/kernel/bzImage 13268536/tftp-deploy-o962d_8u/kernel/cmdline 13268536/tftp-deploy-o962d_8u/ramdisk/ramdisk.cpio.gz
2057 11:46:37.571134 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2058 11:46:37.571216 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2059 11:46:37.575312 tftpboot 192.168.201.1 13268536/tftp-deploy-o962d_8u/kernel/bzImploy-o962d_8u/kernel/cmdline 13268536/tftp-deploy-o962d_8u/ramdisk/ramdisk.cpio.gz
2060 11:46:37.575397
2061 11:46:37.575460 Waiting for link
2062 11:46:37.776373
2063 11:46:37.776516 done.
2064 11:46:37.776580
2065 11:46:37.776639 MAC: 00:24:32:50:1a:5f
2066 11:46:37.776696
2067 11:46:37.779706 Sending DHCP discover... done.
2068 11:46:37.779787
2069 11:46:37.782426 Waiting for reply... done.
2070 11:46:37.782506
2071 11:46:37.787050 Sending DHCP request... done.
2072 11:46:37.787132
2073 11:46:37.795414 Waiting for reply... done.
2074 11:46:37.795495
2075 11:46:37.795558 My ip is 192.168.201.21
2076 11:46:37.795617
2077 11:46:37.798608 The DHCP server ip is 192.168.201.1
2078 11:46:37.802474
2079 11:46:37.805698 TFTP server IP predefined by user: 192.168.201.1
2080 11:46:37.805778
2081 11:46:37.812582 Bootfile predefined by user: 13268536/tftp-deploy-o962d_8u/kernel/bzImage
2082 11:46:37.812663
2083 11:46:37.816024 Sending tftp read request... done.
2084 11:46:37.816147
2085 11:46:37.821964 Waiting for the transfer...
2086 11:46:37.822045
2087 11:46:38.496815 00000000 ################################################################
2088 11:46:38.496965
2089 11:46:39.184203 00080000 ################################################################
2090 11:46:39.184764
2091 11:46:39.899700 00100000 ################################################################
2092 11:46:39.899967
2093 11:46:40.584101 00180000 ################################################################
2094 11:46:40.584588
2095 11:46:41.286634 00200000 ################################################################
2096 11:46:41.286800
2097 11:46:41.985698 00280000 ################################################################
2098 11:46:41.985905
2099 11:46:42.696336 00300000 ################################################################
2100 11:46:42.696853
2101 11:46:43.381003 00380000 ################################################################
2102 11:46:43.381290
2103 11:46:44.109851 00400000 ################################################################
2104 11:46:44.110430
2105 11:46:44.832199 00480000 ################################################################
2106 11:46:44.832833
2107 11:46:45.539183 00500000 ################################################################
2108 11:46:45.539703
2109 11:46:46.261792 00580000 ################################################################
2110 11:46:46.262412
2111 11:46:46.979990 00600000 ################################################################
2112 11:46:46.980603
2113 11:46:47.697566 00680000 ################################################################
2114 11:46:47.698135
2115 11:46:48.417730 00700000 ################################################################
2116 11:46:48.418294
2117 11:46:49.153191 00780000 ################################################################
2118 11:46:49.153733
2119 11:46:49.875989 00800000 ################################################################
2120 11:46:49.876526
2121 11:46:50.603448 00880000 ################################################################
2122 11:46:50.604006
2123 11:46:51.321594 00900000 ################################################################
2124 11:46:51.322162
2125 11:46:52.045209 00980000 ################################################################
2126 11:46:52.045866
2127 11:46:52.763662 00a00000 ################################################################
2128 11:46:52.764237
2129 11:46:53.484595 00a80000 ################################################################
2130 11:46:53.485143
2131 11:46:54.214894 00b00000 ################################################################
2132 11:46:54.215460
2133 11:46:54.924629 00b80000 ################################################################
2134 11:46:54.925127
2135 11:46:55.648634 00c00000 ################################################################
2136 11:46:55.649212
2137 11:46:56.364942 00c80000 ################################################################
2138 11:46:56.365589
2139 11:46:56.960216 00d00000 ####################################################### done.
2140 11:46:56.960391
2141 11:46:56.963993 The bootfile was 14077840 bytes long.
2142 11:46:56.964131
2143 11:46:56.966787 Sending tftp read request... done.
2144 11:46:56.966882
2145 11:46:56.970044 Waiting for the transfer...
2146 11:46:56.970136
2147 11:46:57.629103 00000000 ################################################################
2148 11:46:57.629279
2149 11:46:58.292485 00080000 ################################################################
2150 11:46:58.292655
2151 11:46:58.962504 00100000 ################################################################
2152 11:46:58.963312
2153 11:46:59.672902 00180000 ################################################################
2154 11:46:59.673478
2155 11:47:00.397011 00200000 ################################################################
2156 11:47:00.397578
2157 11:47:01.126074 00280000 ################################################################
2158 11:47:01.126664
2159 11:47:01.851123 00300000 ################################################################
2160 11:47:01.851708
2161 11:47:02.544108 00380000 ################################################################
2162 11:47:02.544775
2163 11:47:03.255391 00400000 ################################################################
2164 11:47:03.255938
2165 11:47:03.968495 00480000 ################################################################
2166 11:47:03.969062
2167 11:47:04.700384 00500000 ################################################################
2168 11:47:04.700951
2169 11:47:05.423141 00580000 ################################################################
2170 11:47:05.423728
2171 11:47:06.140853 00600000 ################################################################
2172 11:47:06.141410
2173 11:47:06.529568 00680000 ################################### done.
2174 11:47:06.530083
2175 11:47:06.532974 Sending tftp read request... done.
2176 11:47:06.533391
2177 11:47:06.536982 Waiting for the transfer...
2178 11:47:06.537441
2179 11:47:06.537798 00000000 # done.
2180 11:47:06.538142
2181 11:47:06.547362 Command line loaded dynamically from TFTP file: 13268536/tftp-deploy-o962d_8u/kernel/cmdline
2182 11:47:06.547932
2183 11:47:06.576788 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/13268536/extract-nfsrootfs-kljn6xdm,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2184 11:47:06.577370
2185 11:47:06.580251 ec_init(0): CrosEC protocol v3 supported (256, 256)
2186 11:47:06.586879
2187 11:47:06.590732 Shutting down all USB controllers.
2188 11:47:06.591296
2189 11:47:06.591654 Removing current net device
2190 11:47:06.593755
2191 11:47:06.594311 Finalizing coreboot
2192 11:47:06.594679
2193 11:47:06.600305 Exiting depthcharge with code 4 at timestamp: 38691904
2194 11:47:06.600765
2195 11:47:06.601121
2196 11:47:06.601455 Starting kernel ...
2197 11:47:06.601777
2198 11:47:06.603162 end: 2.2.4 bootloader-commands (duration 00:00:31) [common]
2199 11:47:06.603680 start: 2.2.5 auto-login-action (timeout 00:04:11) [common]
2200 11:47:06.604144 Setting prompt string to ['Linux version [0-9]']
2201 11:47:06.604785 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2202 11:47:06.605287 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2203 11:47:06.606490
2205 11:51:17.605963 end: 2.2.5 auto-login-action (duration 00:04:11) [common]
2207 11:51:17.607717 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 251 seconds'
2209 11:51:17.609129 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2212 11:51:17.609739 end: 2 depthcharge-action (duration 00:05:00) [common]
2214 11:51:17.609991 Cleaning after the job
2215 11:51:17.610075 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13268536/tftp-deploy-o962d_8u/ramdisk
2216 11:51:17.611249 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13268536/tftp-deploy-o962d_8u/kernel
2217 11:51:17.613344 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13268536/tftp-deploy-o962d_8u/nfsrootfs
2218 11:51:17.724901 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13268536/tftp-deploy-o962d_8u/modules
2219 11:51:17.725491 start: 4.1 power-off (timeout 00:00:30) [common]
2220 11:51:17.725683 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2221 11:51:17.803291 >> Command sent successfully.
2222 11:51:17.807801 Returned 0 in 0 seconds
2223 11:51:17.908863 end: 4.1 power-off (duration 00:00:00) [common]
2225 11:51:17.910589 start: 4.2 read-feedback (timeout 00:10:00) [common]
2226 11:51:17.912013 Listened to connection for namespace 'common' for up to 1s
2228 11:51:17.913553 Listened to connection for namespace 'common' for up to 1s
2229 11:51:18.912346 Finalising connection for namespace 'common'
2230 11:51:18.913289 Disconnecting from shell: Finalise
2231 11:51:18.913891