Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 11:46:24.285099 lava-dispatcher, installed at version: 2024.01
2 11:46:24.285328 start: 0 validate
3 11:46:24.285476 Start time: 2024-04-05 11:46:24.285468+00:00 (UTC)
4 11:46:24.285611 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:46:24.285758 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-ltp%2F20240313.0%2Famd64%2Finitrd.cpio.gz exists
6 11:46:24.559535 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:46:24.559727 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2416-g9d6a41ff7c4a%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:46:24.816136 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:46:24.816336 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-ltp%2F20240313.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 11:46:30.081006 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:46:30.081742 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2416-g9d6a41ff7c4a%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 11:46:30.340985 validate duration: 6.06
14 11:46:30.342263 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 11:46:30.342756 start: 1.1 download-retry (timeout 00:10:00) [common]
16 11:46:30.343195 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 11:46:30.343792 Not decompressing ramdisk as can be used compressed.
18 11:46:30.344222 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-ltp/20240313.0/amd64/initrd.cpio.gz
19 11:46:30.344596 saving as /var/lib/lava/dispatcher/tmp/13268519/tftp-deploy-d8szdygn/ramdisk/initrd.cpio.gz
20 11:46:30.344927 total size: 6464291 (6 MB)
21 11:46:31.203379 progress 0 % (0 MB)
22 11:46:31.209073 progress 5 % (0 MB)
23 11:46:31.211140 progress 10 % (0 MB)
24 11:46:31.213186 progress 15 % (0 MB)
25 11:46:31.215151 progress 20 % (1 MB)
26 11:46:31.217144 progress 25 % (1 MB)
27 11:46:31.219072 progress 30 % (1 MB)
28 11:46:31.221000 progress 35 % (2 MB)
29 11:46:31.222719 progress 40 % (2 MB)
30 11:46:31.224651 progress 45 % (2 MB)
31 11:46:31.226533 progress 50 % (3 MB)
32 11:46:31.228521 progress 55 % (3 MB)
33 11:46:31.230411 progress 60 % (3 MB)
34 11:46:31.232339 progress 65 % (4 MB)
35 11:46:31.234296 progress 70 % (4 MB)
36 11:46:31.236004 progress 75 % (4 MB)
37 11:46:31.237977 progress 80 % (4 MB)
38 11:46:31.239898 progress 85 % (5 MB)
39 11:46:31.241865 progress 90 % (5 MB)
40 11:46:31.243763 progress 95 % (5 MB)
41 11:46:31.245770 progress 100 % (6 MB)
42 11:46:31.245923 6 MB downloaded in 0.90 s (6.84 MB/s)
43 11:46:31.246093 end: 1.1.1 http-download (duration 00:00:01) [common]
45 11:46:31.246357 end: 1.1 download-retry (duration 00:00:01) [common]
46 11:46:31.246457 start: 1.2 download-retry (timeout 00:09:59) [common]
47 11:46:31.246550 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 11:46:31.246701 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2416-g9d6a41ff7c4a/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 11:46:31.246779 saving as /var/lib/lava/dispatcher/tmp/13268519/tftp-deploy-d8szdygn/kernel/bzImage
50 11:46:31.246846 total size: 14077840 (13 MB)
51 11:46:31.246914 No compression specified
52 11:46:31.248112 progress 0 % (0 MB)
53 11:46:31.252229 progress 5 % (0 MB)
54 11:46:31.256237 progress 10 % (1 MB)
55 11:46:31.260435 progress 15 % (2 MB)
56 11:46:31.264460 progress 20 % (2 MB)
57 11:46:31.268704 progress 25 % (3 MB)
58 11:46:31.272745 progress 30 % (4 MB)
59 11:46:31.277015 progress 35 % (4 MB)
60 11:46:31.281062 progress 40 % (5 MB)
61 11:46:31.285303 progress 45 % (6 MB)
62 11:46:31.289457 progress 50 % (6 MB)
63 11:46:31.293677 progress 55 % (7 MB)
64 11:46:31.297729 progress 60 % (8 MB)
65 11:46:31.301955 progress 65 % (8 MB)
66 11:46:31.306022 progress 70 % (9 MB)
67 11:46:31.310243 progress 75 % (10 MB)
68 11:46:31.314349 progress 80 % (10 MB)
69 11:46:31.318503 progress 85 % (11 MB)
70 11:46:31.322451 progress 90 % (12 MB)
71 11:46:31.326592 progress 95 % (12 MB)
72 11:46:31.330563 progress 100 % (13 MB)
73 11:46:31.330778 13 MB downloaded in 0.08 s (159.97 MB/s)
74 11:46:31.330936 end: 1.2.1 http-download (duration 00:00:00) [common]
76 11:46:31.331200 end: 1.2 download-retry (duration 00:00:00) [common]
77 11:46:31.331300 start: 1.3 download-retry (timeout 00:09:59) [common]
78 11:46:31.331397 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 11:46:31.331534 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-ltp/20240313.0/amd64/full.rootfs.tar.xz
80 11:46:31.331611 saving as /var/lib/lava/dispatcher/tmp/13268519/tftp-deploy-d8szdygn/nfsrootfs/full.rootfs.tar
81 11:46:31.331679 total size: 100036868 (95 MB)
82 11:46:31.331748 Using unxz to decompress xz
83 11:46:31.336370 progress 0 % (0 MB)
84 11:46:31.806540 progress 5 % (4 MB)
85 11:46:32.246225 progress 10 % (9 MB)
86 11:46:32.700341 progress 15 % (14 MB)
87 11:46:33.152888 progress 20 % (19 MB)
88 11:46:33.608836 progress 25 % (23 MB)
89 11:46:33.928516 progress 30 % (28 MB)
90 11:46:34.233068 progress 35 % (33 MB)
91 11:46:34.550395 progress 40 % (38 MB)
92 11:46:34.817172 progress 45 % (42 MB)
93 11:46:35.133865 progress 50 % (47 MB)
94 11:46:35.329551 progress 55 % (52 MB)
95 11:46:35.537563 progress 60 % (57 MB)
96 11:46:35.858490 progress 65 % (62 MB)
97 11:46:36.185664 progress 70 % (66 MB)
98 11:46:36.485632 progress 75 % (71 MB)
99 11:46:36.804817 progress 80 % (76 MB)
100 11:46:37.137300 progress 85 % (81 MB)
101 11:46:37.438289 progress 90 % (85 MB)
102 11:46:37.771434 progress 95 % (90 MB)
103 11:46:38.111589 progress 100 % (95 MB)
104 11:46:38.118798 95 MB downloaded in 6.79 s (14.06 MB/s)
105 11:46:38.119101 end: 1.3.1 http-download (duration 00:00:07) [common]
107 11:46:38.119405 end: 1.3 download-retry (duration 00:00:07) [common]
108 11:46:38.119506 start: 1.4 download-retry (timeout 00:09:52) [common]
109 11:46:38.119606 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 11:46:38.119777 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2416-g9d6a41ff7c4a/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 11:46:38.119860 saving as /var/lib/lava/dispatcher/tmp/13268519/tftp-deploy-d8szdygn/modules/modules.tar
112 11:46:38.119932 total size: 484320 (0 MB)
113 11:46:38.120005 Using unxz to decompress xz
114 11:46:38.124612 progress 6 % (0 MB)
115 11:46:38.125077 progress 13 % (0 MB)
116 11:46:38.125353 progress 20 % (0 MB)
117 11:46:38.127161 progress 27 % (0 MB)
118 11:46:38.129219 progress 33 % (0 MB)
119 11:46:38.131472 progress 40 % (0 MB)
120 11:46:38.133469 progress 47 % (0 MB)
121 11:46:38.135392 progress 54 % (0 MB)
122 11:46:38.137467 progress 60 % (0 MB)
123 11:46:38.139283 progress 67 % (0 MB)
124 11:46:38.141262 progress 74 % (0 MB)
125 11:46:38.143473 progress 81 % (0 MB)
126 11:46:38.145407 progress 87 % (0 MB)
127 11:46:38.147628 progress 94 % (0 MB)
128 11:46:38.149649 progress 100 % (0 MB)
129 11:46:38.156295 0 MB downloaded in 0.04 s (12.70 MB/s)
130 11:46:38.156575 end: 1.4.1 http-download (duration 00:00:00) [common]
132 11:46:38.156998 end: 1.4 download-retry (duration 00:00:00) [common]
133 11:46:38.157139 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
134 11:46:38.157251 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
135 11:46:41.403707 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/13268519/extract-nfsrootfs-ws6sm7d2
136 11:46:41.403923 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
137 11:46:41.404043 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
138 11:46:41.404223 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13268519/lava-overlay-5pmm_126
139 11:46:41.404377 makedir: /var/lib/lava/dispatcher/tmp/13268519/lava-overlay-5pmm_126/lava-13268519/bin
140 11:46:41.404494 makedir: /var/lib/lava/dispatcher/tmp/13268519/lava-overlay-5pmm_126/lava-13268519/tests
141 11:46:41.404607 makedir: /var/lib/lava/dispatcher/tmp/13268519/lava-overlay-5pmm_126/lava-13268519/results
142 11:46:41.404721 Creating /var/lib/lava/dispatcher/tmp/13268519/lava-overlay-5pmm_126/lava-13268519/bin/lava-add-keys
143 11:46:41.404886 Creating /var/lib/lava/dispatcher/tmp/13268519/lava-overlay-5pmm_126/lava-13268519/bin/lava-add-sources
144 11:46:41.405043 Creating /var/lib/lava/dispatcher/tmp/13268519/lava-overlay-5pmm_126/lava-13268519/bin/lava-background-process-start
145 11:46:41.405197 Creating /var/lib/lava/dispatcher/tmp/13268519/lava-overlay-5pmm_126/lava-13268519/bin/lava-background-process-stop
146 11:46:41.405342 Creating /var/lib/lava/dispatcher/tmp/13268519/lava-overlay-5pmm_126/lava-13268519/bin/lava-common-functions
147 11:46:41.405484 Creating /var/lib/lava/dispatcher/tmp/13268519/lava-overlay-5pmm_126/lava-13268519/bin/lava-echo-ipv4
148 11:46:41.405626 Creating /var/lib/lava/dispatcher/tmp/13268519/lava-overlay-5pmm_126/lava-13268519/bin/lava-install-packages
149 11:46:41.405768 Creating /var/lib/lava/dispatcher/tmp/13268519/lava-overlay-5pmm_126/lava-13268519/bin/lava-installed-packages
150 11:46:41.405913 Creating /var/lib/lava/dispatcher/tmp/13268519/lava-overlay-5pmm_126/lava-13268519/bin/lava-os-build
151 11:46:41.406056 Creating /var/lib/lava/dispatcher/tmp/13268519/lava-overlay-5pmm_126/lava-13268519/bin/lava-probe-channel
152 11:46:41.406197 Creating /var/lib/lava/dispatcher/tmp/13268519/lava-overlay-5pmm_126/lava-13268519/bin/lava-probe-ip
153 11:46:41.406341 Creating /var/lib/lava/dispatcher/tmp/13268519/lava-overlay-5pmm_126/lava-13268519/bin/lava-target-ip
154 11:46:41.406483 Creating /var/lib/lava/dispatcher/tmp/13268519/lava-overlay-5pmm_126/lava-13268519/bin/lava-target-mac
155 11:46:41.406623 Creating /var/lib/lava/dispatcher/tmp/13268519/lava-overlay-5pmm_126/lava-13268519/bin/lava-target-storage
156 11:46:41.406768 Creating /var/lib/lava/dispatcher/tmp/13268519/lava-overlay-5pmm_126/lava-13268519/bin/lava-test-case
157 11:46:41.406913 Creating /var/lib/lava/dispatcher/tmp/13268519/lava-overlay-5pmm_126/lava-13268519/bin/lava-test-event
158 11:46:41.407054 Creating /var/lib/lava/dispatcher/tmp/13268519/lava-overlay-5pmm_126/lava-13268519/bin/lava-test-feedback
159 11:46:41.407204 Creating /var/lib/lava/dispatcher/tmp/13268519/lava-overlay-5pmm_126/lava-13268519/bin/lava-test-raise
160 11:46:41.407348 Creating /var/lib/lava/dispatcher/tmp/13268519/lava-overlay-5pmm_126/lava-13268519/bin/lava-test-reference
161 11:46:41.407490 Creating /var/lib/lava/dispatcher/tmp/13268519/lava-overlay-5pmm_126/lava-13268519/bin/lava-test-runner
162 11:46:41.407632 Creating /var/lib/lava/dispatcher/tmp/13268519/lava-overlay-5pmm_126/lava-13268519/bin/lava-test-set
163 11:46:41.407774 Creating /var/lib/lava/dispatcher/tmp/13268519/lava-overlay-5pmm_126/lava-13268519/bin/lava-test-shell
164 11:46:41.407915 Updating /var/lib/lava/dispatcher/tmp/13268519/lava-overlay-5pmm_126/lava-13268519/bin/lava-install-packages (oe)
165 11:46:41.408084 Updating /var/lib/lava/dispatcher/tmp/13268519/lava-overlay-5pmm_126/lava-13268519/bin/lava-installed-packages (oe)
166 11:46:41.408229 Creating /var/lib/lava/dispatcher/tmp/13268519/lava-overlay-5pmm_126/lava-13268519/environment
167 11:46:41.408482 LAVA metadata
168 11:46:41.408564 - LAVA_JOB_ID=13268519
169 11:46:41.408637 - LAVA_DISPATCHER_IP=192.168.201.1
170 11:46:41.408758 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
171 11:46:41.408835 skipped lava-vland-overlay
172 11:46:41.408920 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 11:46:41.409011 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
174 11:46:41.409079 skipped lava-multinode-overlay
175 11:46:41.409161 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 11:46:41.409249 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
177 11:46:41.409332 Loading test definitions
178 11:46:41.409432 start: 1.5.2.3.1 git-repo-action (timeout 00:09:49) [common]
179 11:46:41.409511 Using /lava-13268519 at stage 0
180 11:46:41.409614 Fetching tests from https://github.com/kernelci/test-definitions
181 11:46:41.409708 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/13268519/lava-overlay-5pmm_126/lava-13268519/0/tests/0_ltp-timers'
182 11:46:45.164049 Running '/usr/bin/git checkout kernelci.org
183 11:46:45.274734 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/13268519/lava-overlay-5pmm_126/lava-13268519/0/tests/0_ltp-timers/automated/linux/ltp-open-posix/ltp-open-posix.yaml
184 11:46:45.275862 uuid=13268519_1.5.2.3.1 testdef=None
185 11:46:45.276111 end: 1.5.2.3.1 git-repo-action (duration 00:00:04) [common]
187 11:46:45.276544 start: 1.5.2.3.2 test-overlay (timeout 00:09:45) [common]
188 11:46:45.277743 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
190 11:46:45.278175 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:45) [common]
191 11:46:45.279693 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
193 11:46:45.280104 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:45) [common]
194 11:46:45.281581 runner path: /var/lib/lava/dispatcher/tmp/13268519/lava-overlay-5pmm_126/lava-13268519/0/tests/0_ltp-timers test_uuid 13268519_1.5.2.3.1
195 11:46:45.281727 GRP_TEST='TMR'
196 11:46:45.281838 SKIPFILE='skipfile-lkft.yaml'
197 11:46:45.281944 SKIP_INSTALL='true'
198 11:46:45.282054 TST_CMDFILES=''
199 11:46:45.282286 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
201 11:46:45.282679 Creating lava-test-runner.conf files
202 11:46:45.282796 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13268519/lava-overlay-5pmm_126/lava-13268519/0 for stage 0
203 11:46:45.282953 - 0_ltp-timers
204 11:46:45.283126 end: 1.5.2.3 test-definition (duration 00:00:04) [common]
205 11:46:45.283275 start: 1.5.2.4 compress-overlay (timeout 00:09:45) [common]
206 11:46:53.749742 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
207 11:46:53.749924 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:37) [common]
208 11:46:53.750032 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 11:46:53.750146 end: 1.5.2 lava-overlay (duration 00:00:12) [common]
210 11:46:53.750245 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:37) [common]
211 11:46:53.947019 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 11:46:53.947467 start: 1.5.4 extract-modules (timeout 00:09:36) [common]
213 11:46:53.947601 extracting modules file /var/lib/lava/dispatcher/tmp/13268519/tftp-deploy-d8szdygn/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13268519/extract-nfsrootfs-ws6sm7d2
214 11:46:53.965136 extracting modules file /var/lib/lava/dispatcher/tmp/13268519/tftp-deploy-d8szdygn/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13268519/extract-overlay-ramdisk-3zy88t00/ramdisk
215 11:46:53.984304 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 11:46:53.984480 start: 1.5.5 apply-overlay-tftp (timeout 00:09:36) [common]
217 11:46:53.984586 [common] Applying overlay to NFS
218 11:46:53.984663 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13268519/compress-overlay-ke6dypa7/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13268519/extract-nfsrootfs-ws6sm7d2
219 11:46:55.112261 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
220 11:46:55.112462 start: 1.5.6 configure-preseed-file (timeout 00:09:35) [common]
221 11:46:55.112601 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 11:46:55.112741 start: 1.5.7 compress-ramdisk (timeout 00:09:35) [common]
223 11:46:55.112871 Building ramdisk /var/lib/lava/dispatcher/tmp/13268519/extract-overlay-ramdisk-3zy88t00/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13268519/extract-overlay-ramdisk-3zy88t00/ramdisk
224 11:46:55.213647 >> 34109 blocks
225 11:46:55.992879 rename /var/lib/lava/dispatcher/tmp/13268519/extract-overlay-ramdisk-3zy88t00/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13268519/tftp-deploy-d8szdygn/ramdisk/ramdisk.cpio.gz
226 11:46:55.993408 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 11:46:55.993580 start: 1.5.8 prepare-kernel (timeout 00:09:34) [common]
228 11:46:55.993727 start: 1.5.8.1 prepare-fit (timeout 00:09:34) [common]
229 11:46:55.993863 No mkimage arch provided, not using FIT.
230 11:46:55.993968 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 11:46:55.994070 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 11:46:55.994200 end: 1.5 prepare-tftp-overlay (duration 00:00:18) [common]
233 11:46:55.994307 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:34) [common]
234 11:46:55.994436 No LXC device requested
235 11:46:55.994562 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 11:46:55.994693 start: 1.7 deploy-device-env (timeout 00:09:34) [common]
237 11:46:55.994816 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 11:46:55.994924 Checking files for TFTP limit of 4294967296 bytes.
239 11:46:55.995389 end: 1 tftp-deploy (duration 00:00:26) [common]
240 11:46:55.995518 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 11:46:55.995620 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 11:46:55.995763 substitutions:
243 11:46:55.995836 - {DTB}: None
244 11:46:55.995904 - {INITRD}: 13268519/tftp-deploy-d8szdygn/ramdisk/ramdisk.cpio.gz
245 11:46:55.995971 - {KERNEL}: 13268519/tftp-deploy-d8szdygn/kernel/bzImage
246 11:46:55.996034 - {LAVA_MAC}: None
247 11:46:55.996095 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/13268519/extract-nfsrootfs-ws6sm7d2
248 11:46:55.996190 - {NFS_SERVER_IP}: 192.168.201.1
249 11:46:55.996301 - {PRESEED_CONFIG}: None
250 11:46:55.996400 - {PRESEED_LOCAL}: None
251 11:46:55.996494 - {RAMDISK}: 13268519/tftp-deploy-d8szdygn/ramdisk/ramdisk.cpio.gz
252 11:46:55.996587 - {ROOT_PART}: None
253 11:46:55.996680 - {ROOT}: None
254 11:46:55.996778 - {SERVER_IP}: 192.168.201.1
255 11:46:55.996874 - {TEE}: None
256 11:46:55.996967 Parsed boot commands:
257 11:46:55.997057 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 11:46:55.997310 Parsed boot commands: tftpboot 192.168.201.1 13268519/tftp-deploy-d8szdygn/kernel/bzImage 13268519/tftp-deploy-d8szdygn/kernel/cmdline 13268519/tftp-deploy-d8szdygn/ramdisk/ramdisk.cpio.gz
259 11:46:55.997443 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 11:46:55.997543 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 11:46:55.997643 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 11:46:55.997742 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 11:46:55.997819 Not connected, no need to disconnect.
264 11:46:55.997900 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 11:46:55.997989 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 11:46:55.998102 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-4'
267 11:46:56.002832 Setting prompt string to ['lava-test: # ']
268 11:46:56.003248 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 11:46:56.003368 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 11:46:56.003477 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 11:46:56.003576 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 11:46:56.003890 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
273 11:47:01.158238 >> Command sent successfully.
274 11:47:01.167972 Returned 0 in 5 seconds
275 11:47:01.269016 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 11:47:01.270400 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 11:47:01.270886 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 11:47:01.271332 Setting prompt string to 'Starting depthcharge on Helios...'
280 11:47:01.271761 Changing prompt to 'Starting depthcharge on Helios...'
281 11:47:01.272287 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
282 11:47:01.273520 [Enter `^Ec?' for help]
283 11:47:01.883169
284 11:47:01.883683
285 11:47:01.893263 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
286 11:47:01.896580 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
287 11:47:01.903553 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
288 11:47:01.906639 CPU: AES supported, TXT NOT supported, VT supported
289 11:47:01.913809 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
290 11:47:01.916788 PCH: device id 0284 (rev 00) is Cometlake-U Premium
291 11:47:01.924087 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
292 11:47:01.927468 VBOOT: Loading verstage.
293 11:47:01.930868 FMAP: Found "FLASH" version 1.1 at 0xc04000.
294 11:47:01.937451 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
295 11:47:01.940364 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
296 11:47:01.944236 CBFS @ c08000 size 3f8000
297 11:47:01.950637 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
298 11:47:01.954088 CBFS: Locating 'fallback/verstage'
299 11:47:01.957030 CBFS: Found @ offset 10fb80 size 1072c
300 11:47:01.957495
301 11:47:01.961033
302 11:47:01.970363 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
303 11:47:01.984395 Probing TPM: . done!
304 11:47:01.987693 TPM ready after 0 ms
305 11:47:01.991449 Connected to device vid:did:rid of 1ae0:0028:00
306 11:47:02.000991 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
307 11:47:02.004498 Initialized TPM device CR50 revision 0
308 11:47:02.050274 tlcl_send_startup: Startup return code is 0
309 11:47:02.050782 TPM: setup succeeded
310 11:47:02.063696 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
311 11:47:02.067268 Chrome EC: UHEPI supported
312 11:47:02.070176 Phase 1
313 11:47:02.074408 FMAP: area GBB found @ c05000 (12288 bytes)
314 11:47:02.080503 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
315 11:47:02.081044 Phase 2
316 11:47:02.084314 Phase 3
317 11:47:02.087103 FMAP: area GBB found @ c05000 (12288 bytes)
318 11:47:02.094279 VB2:vb2_report_dev_firmware() This is developer signed firmware
319 11:47:02.100149 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
320 11:47:02.103534 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
321 11:47:02.110403 VB2:vb2_verify_keyblock() Checking keyblock signature...
322 11:47:02.125722 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
323 11:47:02.128764 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
324 11:47:02.135624 VB2:vb2_verify_fw_preamble() Verifying preamble.
325 11:47:02.140326 Phase 4
326 11:47:02.143309 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
327 11:47:02.150130 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
328 11:47:02.329420 VB2:vb2_rsa_verify_digest() Digest check failed!
329 11:47:02.336625 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
330 11:47:02.337192 Saving nvdata
331 11:47:02.339165 Reboot requested (10020007)
332 11:47:02.342538 board_reset() called!
333 11:47:02.343067 full_reset() called!
334 11:47:06.850376
335 11:47:06.850524
336 11:47:06.859985 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
337 11:47:06.863497 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
338 11:47:06.870721 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
339 11:47:06.873898 CPU: AES supported, TXT NOT supported, VT supported
340 11:47:06.880057 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
341 11:47:06.883755 PCH: device id 0284 (rev 00) is Cometlake-U Premium
342 11:47:06.890233 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
343 11:47:06.893353 VBOOT: Loading verstage.
344 11:47:06.897138 FMAP: Found "FLASH" version 1.1 at 0xc04000.
345 11:47:06.903895 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
346 11:47:06.906625 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
347 11:47:06.910284 CBFS @ c08000 size 3f8000
348 11:47:06.916622 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
349 11:47:06.920131 CBFS: Locating 'fallback/verstage'
350 11:47:06.923699 CBFS: Found @ offset 10fb80 size 1072c
351 11:47:06.926624
352 11:47:06.926746
353 11:47:06.936938 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
354 11:47:06.951213 Probing TPM: . done!
355 11:47:06.954393 TPM ready after 0 ms
356 11:47:06.957730 Connected to device vid:did:rid of 1ae0:0028:00
357 11:47:06.967972 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
358 11:47:06.971219 Initialized TPM device CR50 revision 0
359 11:47:07.017488 tlcl_send_startup: Startup return code is 0
360 11:47:07.017605 TPM: setup succeeded
361 11:47:07.029749 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
362 11:47:07.033593 Chrome EC: UHEPI supported
363 11:47:07.036834 Phase 1
364 11:47:07.040310 FMAP: area GBB found @ c05000 (12288 bytes)
365 11:47:07.046777 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
366 11:47:07.053978 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
367 11:47:07.056875 Recovery requested (1009000e)
368 11:47:07.056970 Saving nvdata
369 11:47:07.068788 tlcl_extend: response is 0
370 11:47:07.077611 tlcl_extend: response is 0
371 11:47:07.084396 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
372 11:47:07.087890 CBFS @ c08000 size 3f8000
373 11:47:07.094765 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
374 11:47:07.097714 CBFS: Locating 'fallback/romstage'
375 11:47:07.101085 CBFS: Found @ offset 80 size 145fc
376 11:47:07.104389 Accumulated console time in verstage 98 ms
377 11:47:07.104477
378 11:47:07.104564
379 11:47:07.117947 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
380 11:47:07.124234 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
381 11:47:07.127495 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
382 11:47:07.131156 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
383 11:47:07.137407 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
384 11:47:07.141280 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
385 11:47:07.144663 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
386 11:47:07.147709 TCO_STS: 0000 0000
387 11:47:07.150861 GEN_PMCON: e0015238 00000200
388 11:47:07.154231 GBLRST_CAUSE: 00000000 00000000
389 11:47:07.154357 prev_sleep_state 5
390 11:47:07.157558 Boot Count incremented to 74485
391 11:47:07.164498 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
392 11:47:07.168116 CBFS @ c08000 size 3f8000
393 11:47:07.173915 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
394 11:47:07.174008 CBFS: Locating 'fspm.bin'
395 11:47:07.177933 CBFS: Found @ offset 5ffc0 size 71000
396 11:47:07.181578 Chrome EC: UHEPI supported
397 11:47:07.189172 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
398 11:47:07.193864 Probing TPM: done!
399 11:47:07.201371 Connected to device vid:did:rid of 1ae0:0028:00
400 11:47:07.210965 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
401 11:47:07.216701 Initialized TPM device CR50 revision 0
402 11:47:07.225706 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
403 11:47:07.232233 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
404 11:47:07.235733 MRC cache found, size 1948
405 11:47:07.238842 bootmode is set to: 2
406 11:47:07.242072 PRMRR disabled by config.
407 11:47:07.242166 SPD INDEX = 1
408 11:47:07.249105 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
409 11:47:07.252236 CBFS @ c08000 size 3f8000
410 11:47:07.258693 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
411 11:47:07.258804 CBFS: Locating 'spd.bin'
412 11:47:07.262039 CBFS: Found @ offset 5fb80 size 400
413 11:47:07.265296 SPD: module type is LPDDR3
414 11:47:07.268710 SPD: module part is
415 11:47:07.275321 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
416 11:47:07.278671 SPD: device width 4 bits, bus width 8 bits
417 11:47:07.282228 SPD: module size is 4096 MB (per channel)
418 11:47:07.285081 memory slot: 0 configuration done.
419 11:47:07.288436 memory slot: 2 configuration done.
420 11:47:07.339587 CBMEM:
421 11:47:07.342842 IMD: root @ 99fff000 254 entries.
422 11:47:07.346061 IMD: root @ 99ffec00 62 entries.
423 11:47:07.349403 External stage cache:
424 11:47:07.353018 IMD: root @ 9abff000 254 entries.
425 11:47:07.356277 IMD: root @ 9abfec00 62 entries.
426 11:47:07.359517 Chrome EC: clear events_b mask to 0x0000000020004000
427 11:47:07.375815 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
428 11:47:07.388722 tlcl_write: response is 0
429 11:47:07.397523 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
430 11:47:07.404517 MRC: TPM MRC hash updated successfully.
431 11:47:07.404612 2 DIMMs found
432 11:47:07.407889 SMM Memory Map
433 11:47:07.410979 SMRAM : 0x9a000000 0x1000000
434 11:47:07.414216 Subregion 0: 0x9a000000 0xa00000
435 11:47:07.417761 Subregion 1: 0x9aa00000 0x200000
436 11:47:07.420967 Subregion 2: 0x9ac00000 0x400000
437 11:47:07.424291 top_of_ram = 0x9a000000
438 11:47:07.427482 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
439 11:47:07.434268 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
440 11:47:07.437720 MTRR Range: Start=ff000000 End=0 (Size 1000000)
441 11:47:07.444231 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 11:47:07.447249 CBFS @ c08000 size 3f8000
443 11:47:07.451091 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 11:47:07.454231 CBFS: Locating 'fallback/postcar'
445 11:47:07.457442 CBFS: Found @ offset 107000 size 4b44
446 11:47:07.464692 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
447 11:47:07.476305 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
448 11:47:07.479432 Processing 180 relocs. Offset value of 0x97c0c000
449 11:47:07.488102 Accumulated console time in romstage 285 ms
450 11:47:07.488195
451 11:47:07.488280
452 11:47:07.498162 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
453 11:47:07.504454 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
454 11:47:07.508120 CBFS @ c08000 size 3f8000
455 11:47:07.511729 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
456 11:47:07.514812 CBFS: Locating 'fallback/ramstage'
457 11:47:07.521533 CBFS: Found @ offset 43380 size 1b9e8
458 11:47:07.528334 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
459 11:47:07.560010 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
460 11:47:07.563127 Processing 3976 relocs. Offset value of 0x98db0000
461 11:47:07.569790 Accumulated console time in postcar 52 ms
462 11:47:07.569883
463 11:47:07.569961
464 11:47:07.579780 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
465 11:47:07.586596 FMAP: area RO_VPD found @ c00000 (16384 bytes)
466 11:47:07.589854 WARNING: RO_VPD is uninitialized or empty.
467 11:47:07.592850 FMAP: area RW_VPD found @ af8000 (8192 bytes)
468 11:47:07.599605 FMAP: area RW_VPD found @ af8000 (8192 bytes)
469 11:47:07.599701 Normal boot.
470 11:47:07.605925 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
471 11:47:07.609527 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
472 11:47:07.612756 CBFS @ c08000 size 3f8000
473 11:47:07.619625 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
474 11:47:07.623060 CBFS: Locating 'cpu_microcode_blob.bin'
475 11:47:07.625933 CBFS: Found @ offset 14700 size 2ec00
476 11:47:07.629524 microcode: sig=0x806ec pf=0x4 revision=0xc9
477 11:47:07.632748 Skip microcode update
478 11:47:07.636047 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
479 11:47:07.639540 CBFS @ c08000 size 3f8000
480 11:47:07.646380 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
481 11:47:07.649979 CBFS: Locating 'fsps.bin'
482 11:47:07.653072 CBFS: Found @ offset d1fc0 size 35000
483 11:47:07.677719 Detected 4 core, 8 thread CPU.
484 11:47:07.681554 Setting up SMI for CPU
485 11:47:07.684807 IED base = 0x9ac00000
486 11:47:07.684900 IED size = 0x00400000
487 11:47:07.688143 Will perform SMM setup.
488 11:47:07.694304 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
489 11:47:07.701241 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
490 11:47:07.704314 Processing 16 relocs. Offset value of 0x00030000
491 11:47:07.708016 Attempting to start 7 APs
492 11:47:07.711337 Waiting for 10ms after sending INIT.
493 11:47:07.727627 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
494 11:47:07.727721 done.
495 11:47:07.730713 AP: slot 4 apic_id 3.
496 11:47:07.734302 AP: slot 1 apic_id 2.
497 11:47:07.734394 AP: slot 5 apic_id 4.
498 11:47:07.737514 AP: slot 2 apic_id 5.
499 11:47:07.740653 AP: slot 7 apic_id 6.
500 11:47:07.740745 AP: slot 6 apic_id 7.
501 11:47:07.747412 Waiting for 2nd SIPI to complete...done.
502 11:47:07.754388 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
503 11:47:07.757717 Processing 13 relocs. Offset value of 0x00038000
504 11:47:07.764101 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
505 11:47:07.771021 Installing SMM handler to 0x9a000000
506 11:47:07.777771 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
507 11:47:07.780815 Processing 658 relocs. Offset value of 0x9a010000
508 11:47:07.791034 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
509 11:47:07.794213 Processing 13 relocs. Offset value of 0x9a008000
510 11:47:07.801245 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
511 11:47:07.807521 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
512 11:47:07.810617 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
513 11:47:07.817545 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
514 11:47:07.824397 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
515 11:47:07.831165 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
516 11:47:07.834421 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
517 11:47:07.840611 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
518 11:47:07.843940 Clearing SMI status registers
519 11:47:07.847055 SMI_STS: PM1
520 11:47:07.847147 PM1_STS: PWRBTN
521 11:47:07.850983 TCO_STS: SECOND_TO
522 11:47:07.854088 New SMBASE 0x9a000000
523 11:47:07.854182 In relocation handler: CPU 0
524 11:47:07.860687 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
525 11:47:07.863914 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 11:47:07.867096 Relocation complete.
527 11:47:07.870530 New SMBASE 0x99fff400
528 11:47:07.870628 In relocation handler: CPU 3
529 11:47:07.876995 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
530 11:47:07.880462 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 11:47:07.884181 Relocation complete.
532 11:47:07.884284 New SMBASE 0x99ffe400
533 11:47:07.887115 In relocation handler: CPU 7
534 11:47:07.893869 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
535 11:47:07.897446 Writing SMRR. base = 0x9a000006, mask=0xff000800
536 11:47:07.900483 Relocation complete.
537 11:47:07.900575 New SMBASE 0x99fff000
538 11:47:07.904164 In relocation handler: CPU 4
539 11:47:07.907069 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
540 11:47:07.913914 Writing SMRR. base = 0x9a000006, mask=0xff000800
541 11:47:07.917090 Relocation complete.
542 11:47:07.917183 New SMBASE 0x99fffc00
543 11:47:07.920968 In relocation handler: CPU 1
544 11:47:07.923934 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
545 11:47:07.930814 Writing SMRR. base = 0x9a000006, mask=0xff000800
546 11:47:07.930907 Relocation complete.
547 11:47:07.933808 New SMBASE 0x99ffec00
548 11:47:07.937318 In relocation handler: CPU 5
549 11:47:07.940597 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
550 11:47:07.947832 Writing SMRR. base = 0x9a000006, mask=0xff000800
551 11:47:07.947926 Relocation complete.
552 11:47:07.950805 New SMBASE 0x99fff800
553 11:47:07.954075 In relocation handler: CPU 2
554 11:47:07.957097 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
555 11:47:07.963827 Writing SMRR. base = 0x9a000006, mask=0xff000800
556 11:47:07.963920 Relocation complete.
557 11:47:07.967076 New SMBASE 0x99ffe800
558 11:47:07.970974 In relocation handler: CPU 6
559 11:47:07.974168 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
560 11:47:07.980397 Writing SMRR. base = 0x9a000006, mask=0xff000800
561 11:47:07.980491 Relocation complete.
562 11:47:07.983690 Initializing CPU #0
563 11:47:07.987232 CPU: vendor Intel device 806ec
564 11:47:07.990294 CPU: family 06, model 8e, stepping 0c
565 11:47:07.993984 Clearing out pending MCEs
566 11:47:07.997160 Setting up local APIC...
567 11:47:07.997283 apic_id: 0x00 done.
568 11:47:08.000509 Turbo is available but hidden
569 11:47:08.003830 Turbo is available and visible
570 11:47:08.007132 VMX status: enabled
571 11:47:08.010138 IA32_FEATURE_CONTROL status: locked
572 11:47:08.010231 Skip microcode update
573 11:47:08.013417 CPU #0 initialized
574 11:47:08.016741 Initializing CPU #3
575 11:47:08.016853 Initializing CPU #6
576 11:47:08.020542 Initializing CPU #4
577 11:47:08.023486 Initializing CPU #1
578 11:47:08.023573 CPU: vendor Intel device 806ec
579 11:47:08.030095 CPU: family 06, model 8e, stepping 0c
580 11:47:08.034033 CPU: vendor Intel device 806ec
581 11:47:08.037098 CPU: family 06, model 8e, stepping 0c
582 11:47:08.040487 Clearing out pending MCEs
583 11:47:08.040575 Clearing out pending MCEs
584 11:47:08.043757 Setting up local APIC...
585 11:47:08.046760 CPU: vendor Intel device 806ec
586 11:47:08.050034 CPU: family 06, model 8e, stepping 0c
587 11:47:08.053405 Initializing CPU #7
588 11:47:08.056580 Clearing out pending MCEs
589 11:47:08.060162 CPU: vendor Intel device 806ec
590 11:47:08.063230 CPU: family 06, model 8e, stepping 0c
591 11:47:08.063323 Clearing out pending MCEs
592 11:47:08.066339 Setting up local APIC...
593 11:47:08.069535 Initializing CPU #2
594 11:47:08.069625 Initializing CPU #5
595 11:47:08.072882 CPU: vendor Intel device 806ec
596 11:47:08.080050 CPU: family 06, model 8e, stepping 0c
597 11:47:08.083126 CPU: vendor Intel device 806ec
598 11:47:08.086328 CPU: family 06, model 8e, stepping 0c
599 11:47:08.086424 Clearing out pending MCEs
600 11:47:08.089523 Clearing out pending MCEs
601 11:47:08.092796 Setting up local APIC...
602 11:47:08.096466 Setting up local APIC...
603 11:47:08.096564 apic_id: 0x02 done.
604 11:47:08.099795 Setting up local APIC...
605 11:47:08.102938 Setting up local APIC...
606 11:47:08.106017 VMX status: enabled
607 11:47:08.106107 apic_id: 0x03 done.
608 11:47:08.109477 IA32_FEATURE_CONTROL status: locked
609 11:47:08.113069 VMX status: enabled
610 11:47:08.116023 Skip microcode update
611 11:47:08.119599 IA32_FEATURE_CONTROL status: locked
612 11:47:08.119699 CPU #1 initialized
613 11:47:08.123023 Skip microcode update
614 11:47:08.126516 apic_id: 0x04 done.
615 11:47:08.126606 apic_id: 0x05 done.
616 11:47:08.129574 VMX status: enabled
617 11:47:08.129659 VMX status: enabled
618 11:47:08.136195 IA32_FEATURE_CONTROL status: locked
619 11:47:08.139378 IA32_FEATURE_CONTROL status: locked
620 11:47:08.139493 Skip microcode update
621 11:47:08.142622 Skip microcode update
622 11:47:08.146520 CPU #5 initialized
623 11:47:08.146612 CPU #2 initialized
624 11:47:08.149605 CPU #4 initialized
625 11:47:08.149694 apic_id: 0x07 done.
626 11:47:08.152564 apic_id: 0x06 done.
627 11:47:08.156167 VMX status: enabled
628 11:47:08.156273 VMX status: enabled
629 11:47:08.159183 IA32_FEATURE_CONTROL status: locked
630 11:47:08.162483 IA32_FEATURE_CONTROL status: locked
631 11:47:08.165996 Skip microcode update
632 11:47:08.169381 Skip microcode update
633 11:47:08.169468 CPU #6 initialized
634 11:47:08.172587 CPU #7 initialized
635 11:47:08.176113 CPU: vendor Intel device 806ec
636 11:47:08.179342 CPU: family 06, model 8e, stepping 0c
637 11:47:08.182363 Clearing out pending MCEs
638 11:47:08.185836 Setting up local APIC...
639 11:47:08.185930 apic_id: 0x01 done.
640 11:47:08.188911 VMX status: enabled
641 11:47:08.192692 IA32_FEATURE_CONTROL status: locked
642 11:47:08.196164 Skip microcode update
643 11:47:08.196273 CPU #3 initialized
644 11:47:08.202251 bsp_do_flight_plan done after 452 msecs.
645 11:47:08.202346 CPU: frequency set to 4200 MHz
646 11:47:08.205564 Enabling SMIs.
647 11:47:08.205657 Locking SMM.
648 11:47:08.221553 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
649 11:47:08.225212 CBFS @ c08000 size 3f8000
650 11:47:08.231669 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
651 11:47:08.231761 CBFS: Locating 'vbt.bin'
652 11:47:08.235186 CBFS: Found @ offset 5f5c0 size 499
653 11:47:08.242363 Found a VBT of 4608 bytes after decompression
654 11:47:08.423733 Display FSP Version Info HOB
655 11:47:08.427008 Reference Code - CPU = 9.0.1e.30
656 11:47:08.430008 uCode Version = 0.0.0.ca
657 11:47:08.433021 TXT ACM version = ff.ff.ff.ffff
658 11:47:08.436665 Display FSP Version Info HOB
659 11:47:08.439866 Reference Code - ME = 9.0.1e.30
660 11:47:08.443658 MEBx version = 0.0.0.0
661 11:47:08.446970 ME Firmware Version = Consumer SKU
662 11:47:08.449762 Display FSP Version Info HOB
663 11:47:08.453590 Reference Code - CML PCH = 9.0.1e.30
664 11:47:08.456644 PCH-CRID Status = Disabled
665 11:47:08.460187 PCH-CRID Original Value = ff.ff.ff.ffff
666 11:47:08.463021 PCH-CRID New Value = ff.ff.ff.ffff
667 11:47:08.466574 OPROM - RST - RAID = ff.ff.ff.ffff
668 11:47:08.469790 ChipsetInit Base Version = ff.ff.ff.ffff
669 11:47:08.472777 ChipsetInit Oem Version = ff.ff.ff.ffff
670 11:47:08.476223 Display FSP Version Info HOB
671 11:47:08.482898 Reference Code - SA - System Agent = 9.0.1e.30
672 11:47:08.486763 Reference Code - MRC = 0.7.1.6c
673 11:47:08.486863 SA - PCIe Version = 9.0.1e.30
674 11:47:08.489838 SA-CRID Status = Disabled
675 11:47:08.493168 SA-CRID Original Value = 0.0.0.c
676 11:47:08.496076 SA-CRID New Value = 0.0.0.c
677 11:47:08.499635 OPROM - VBIOS = ff.ff.ff.ffff
678 11:47:08.503007 RTC Init
679 11:47:08.506523 Set power on after power failure.
680 11:47:08.506611 Disabling Deep S3
681 11:47:08.509712 Disabling Deep S3
682 11:47:08.509797 Disabling Deep S4
683 11:47:08.512910 Disabling Deep S4
684 11:47:08.512997 Disabling Deep S5
685 11:47:08.516539 Disabling Deep S5
686 11:47:08.522854 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 192 exit 1
687 11:47:08.522948 Enumerating buses...
688 11:47:08.529281 Show all devs... Before device enumeration.
689 11:47:08.529369 Root Device: enabled 1
690 11:47:08.532626 CPU_CLUSTER: 0: enabled 1
691 11:47:08.535760 DOMAIN: 0000: enabled 1
692 11:47:08.539280 APIC: 00: enabled 1
693 11:47:08.539414 PCI: 00:00.0: enabled 1
694 11:47:08.542526 PCI: 00:02.0: enabled 1
695 11:47:08.545583 PCI: 00:04.0: enabled 0
696 11:47:08.549480 PCI: 00:05.0: enabled 0
697 11:47:08.549568 PCI: 00:12.0: enabled 1
698 11:47:08.552620 PCI: 00:12.5: enabled 0
699 11:47:08.555758 PCI: 00:12.6: enabled 0
700 11:47:08.555846 PCI: 00:14.0: enabled 1
701 11:47:08.559027 PCI: 00:14.1: enabled 0
702 11:47:08.562573 PCI: 00:14.3: enabled 1
703 11:47:08.565891 PCI: 00:14.5: enabled 0
704 11:47:08.565980 PCI: 00:15.0: enabled 1
705 11:47:08.569471 PCI: 00:15.1: enabled 1
706 11:47:08.572772 PCI: 00:15.2: enabled 0
707 11:47:08.575584 PCI: 00:15.3: enabled 0
708 11:47:08.575680 PCI: 00:16.0: enabled 1
709 11:47:08.579006 PCI: 00:16.1: enabled 0
710 11:47:08.582247 PCI: 00:16.2: enabled 0
711 11:47:08.586010 PCI: 00:16.3: enabled 0
712 11:47:08.586152 PCI: 00:16.4: enabled 0
713 11:47:08.589467 PCI: 00:16.5: enabled 0
714 11:47:08.592268 PCI: 00:17.0: enabled 1
715 11:47:08.592386 PCI: 00:19.0: enabled 1
716 11:47:08.595655 PCI: 00:19.1: enabled 0
717 11:47:08.599289 PCI: 00:19.2: enabled 0
718 11:47:08.602366 PCI: 00:1a.0: enabled 0
719 11:47:08.602497 PCI: 00:1c.0: enabled 0
720 11:47:08.605651 PCI: 00:1c.1: enabled 0
721 11:47:08.609205 PCI: 00:1c.2: enabled 0
722 11:47:08.612797 PCI: 00:1c.3: enabled 0
723 11:47:08.612887 PCI: 00:1c.4: enabled 0
724 11:47:08.616259 PCI: 00:1c.5: enabled 0
725 11:47:08.619398 PCI: 00:1c.6: enabled 0
726 11:47:08.619492 PCI: 00:1c.7: enabled 0
727 11:47:08.622347 PCI: 00:1d.0: enabled 1
728 11:47:08.626202 PCI: 00:1d.1: enabled 0
729 11:47:08.629168 PCI: 00:1d.2: enabled 0
730 11:47:08.629295 PCI: 00:1d.3: enabled 0
731 11:47:08.632328 PCI: 00:1d.4: enabled 0
732 11:47:08.635521 PCI: 00:1d.5: enabled 1
733 11:47:08.638852 PCI: 00:1e.0: enabled 1
734 11:47:08.638946 PCI: 00:1e.1: enabled 0
735 11:47:08.642628 PCI: 00:1e.2: enabled 1
736 11:47:08.645715 PCI: 00:1e.3: enabled 1
737 11:47:08.649250 PCI: 00:1f.0: enabled 1
738 11:47:08.649338 PCI: 00:1f.1: enabled 1
739 11:47:08.652918 PCI: 00:1f.2: enabled 1
740 11:47:08.656137 PCI: 00:1f.3: enabled 1
741 11:47:08.656232 PCI: 00:1f.4: enabled 1
742 11:47:08.659204 PCI: 00:1f.5: enabled 1
743 11:47:08.662378 PCI: 00:1f.6: enabled 0
744 11:47:08.665557 USB0 port 0: enabled 1
745 11:47:08.665661 I2C: 00:15: enabled 1
746 11:47:08.668915 I2C: 00:5d: enabled 1
747 11:47:08.672478 GENERIC: 0.0: enabled 1
748 11:47:08.672594 I2C: 00:1a: enabled 1
749 11:47:08.675592 I2C: 00:38: enabled 1
750 11:47:08.678906 I2C: 00:39: enabled 1
751 11:47:08.679003 I2C: 00:3a: enabled 1
752 11:47:08.682577 I2C: 00:3b: enabled 1
753 11:47:08.685818 PCI: 00:00.0: enabled 1
754 11:47:08.685912 SPI: 00: enabled 1
755 11:47:08.689041 SPI: 01: enabled 1
756 11:47:08.692620 PNP: 0c09.0: enabled 1
757 11:47:08.692709 USB2 port 0: enabled 1
758 11:47:08.695584 USB2 port 1: enabled 1
759 11:47:08.699094 USB2 port 2: enabled 0
760 11:47:08.699212 USB2 port 3: enabled 0
761 11:47:08.702105 USB2 port 5: enabled 0
762 11:47:08.705272 USB2 port 6: enabled 1
763 11:47:08.708885 USB2 port 9: enabled 1
764 11:47:08.708973 USB3 port 0: enabled 1
765 11:47:08.711942 USB3 port 1: enabled 1
766 11:47:08.715678 USB3 port 2: enabled 1
767 11:47:08.715770 USB3 port 3: enabled 1
768 11:47:08.718605 USB3 port 4: enabled 0
769 11:47:08.722335 APIC: 02: enabled 1
770 11:47:08.722427 APIC: 05: enabled 1
771 11:47:08.725592 APIC: 01: enabled 1
772 11:47:08.728609 APIC: 03: enabled 1
773 11:47:08.728705 APIC: 04: enabled 1
774 11:47:08.731937 APIC: 07: enabled 1
775 11:47:08.732021 APIC: 06: enabled 1
776 11:47:08.735461 Compare with tree...
777 11:47:08.738874 Root Device: enabled 1
778 11:47:08.742020 CPU_CLUSTER: 0: enabled 1
779 11:47:08.742103 APIC: 00: enabled 1
780 11:47:08.745220 APIC: 02: enabled 1
781 11:47:08.748639 APIC: 05: enabled 1
782 11:47:08.748728 APIC: 01: enabled 1
783 11:47:08.751783 APIC: 03: enabled 1
784 11:47:08.755654 APIC: 04: enabled 1
785 11:47:08.755743 APIC: 07: enabled 1
786 11:47:08.758794 APIC: 06: enabled 1
787 11:47:08.761824 DOMAIN: 0000: enabled 1
788 11:47:08.764921 PCI: 00:00.0: enabled 1
789 11:47:08.765058 PCI: 00:02.0: enabled 1
790 11:47:08.768530 PCI: 00:04.0: enabled 0
791 11:47:08.771901 PCI: 00:05.0: enabled 0
792 11:47:08.775246 PCI: 00:12.0: enabled 1
793 11:47:08.778764 PCI: 00:12.5: enabled 0
794 11:47:08.778863 PCI: 00:12.6: enabled 0
795 11:47:08.781666 PCI: 00:14.0: enabled 1
796 11:47:08.785072 USB0 port 0: enabled 1
797 11:47:08.788395 USB2 port 0: enabled 1
798 11:47:08.791571 USB2 port 1: enabled 1
799 11:47:08.791655 USB2 port 2: enabled 0
800 11:47:08.794919 USB2 port 3: enabled 0
801 11:47:08.798162 USB2 port 5: enabled 0
802 11:47:08.801728 USB2 port 6: enabled 1
803 11:47:08.805441 USB2 port 9: enabled 1
804 11:47:08.805531 USB3 port 0: enabled 1
805 11:47:08.808106 USB3 port 1: enabled 1
806 11:47:08.811806 USB3 port 2: enabled 1
807 11:47:08.815036 USB3 port 3: enabled 1
808 11:47:08.818124 USB3 port 4: enabled 0
809 11:47:08.821793 PCI: 00:14.1: enabled 0
810 11:47:08.821887 PCI: 00:14.3: enabled 1
811 11:47:08.825134 PCI: 00:14.5: enabled 0
812 11:47:08.828274 PCI: 00:15.0: enabled 1
813 11:47:08.831648 I2C: 00:15: enabled 1
814 11:47:08.834617 PCI: 00:15.1: enabled 1
815 11:47:08.834711 I2C: 00:5d: enabled 1
816 11:47:08.838417 GENERIC: 0.0: enabled 1
817 11:47:08.841864 PCI: 00:15.2: enabled 0
818 11:47:08.844991 PCI: 00:15.3: enabled 0
819 11:47:08.845085 PCI: 00:16.0: enabled 1
820 11:47:08.848370 PCI: 00:16.1: enabled 0
821 11:47:08.851222 PCI: 00:16.2: enabled 0
822 11:47:08.854843 PCI: 00:16.3: enabled 0
823 11:47:08.858151 PCI: 00:16.4: enabled 0
824 11:47:08.858248 PCI: 00:16.5: enabled 0
825 11:47:08.861715 PCI: 00:17.0: enabled 1
826 11:47:08.864917 PCI: 00:19.0: enabled 1
827 11:47:08.868120 I2C: 00:1a: enabled 1
828 11:47:08.871156 I2C: 00:38: enabled 1
829 11:47:08.871245 I2C: 00:39: enabled 1
830 11:47:08.875047 I2C: 00:3a: enabled 1
831 11:47:08.878382 I2C: 00:3b: enabled 1
832 11:47:08.881372 PCI: 00:19.1: enabled 0
833 11:47:08.881466 PCI: 00:19.2: enabled 0
834 11:47:08.885056 PCI: 00:1a.0: enabled 0
835 11:47:08.888117 PCI: 00:1c.0: enabled 0
836 11:47:08.891514 PCI: 00:1c.1: enabled 0
837 11:47:08.894997 PCI: 00:1c.2: enabled 0
838 11:47:08.895091 PCI: 00:1c.3: enabled 0
839 11:47:08.898179 PCI: 00:1c.4: enabled 0
840 11:47:08.901358 PCI: 00:1c.5: enabled 0
841 11:47:08.905038 PCI: 00:1c.6: enabled 0
842 11:47:08.905145 PCI: 00:1c.7: enabled 0
843 11:47:08.908265 PCI: 00:1d.0: enabled 1
844 11:47:08.911370 PCI: 00:1d.1: enabled 0
845 11:47:08.914978 PCI: 00:1d.2: enabled 0
846 11:47:08.918284 PCI: 00:1d.3: enabled 0
847 11:47:08.918381 PCI: 00:1d.4: enabled 0
848 11:47:08.921216 PCI: 00:1d.5: enabled 1
849 11:47:08.924842 PCI: 00:00.0: enabled 1
850 11:47:08.927810 PCI: 00:1e.0: enabled 1
851 11:47:08.931573 PCI: 00:1e.1: enabled 0
852 11:47:08.931700 PCI: 00:1e.2: enabled 1
853 11:47:08.935165 SPI: 00: enabled 1
854 11:47:08.938114 PCI: 00:1e.3: enabled 1
855 11:47:08.938229 SPI: 01: enabled 1
856 11:47:08.941497 PCI: 00:1f.0: enabled 1
857 11:47:08.945158 PNP: 0c09.0: enabled 1
858 11:47:08.948440 PCI: 00:1f.1: enabled 1
859 11:47:08.951718 PCI: 00:1f.2: enabled 1
860 11:47:08.951847 PCI: 00:1f.3: enabled 1
861 11:47:08.954735 PCI: 00:1f.4: enabled 1
862 11:47:08.957900 PCI: 00:1f.5: enabled 1
863 11:47:08.961506 PCI: 00:1f.6: enabled 0
864 11:47:08.964802 Root Device scanning...
865 11:47:08.968292 scan_static_bus for Root Device
866 11:47:08.968376 CPU_CLUSTER: 0 enabled
867 11:47:08.971581 DOMAIN: 0000 enabled
868 11:47:08.974543 DOMAIN: 0000 scanning...
869 11:47:08.978065 PCI: pci_scan_bus for bus 00
870 11:47:08.981375 PCI: 00:00.0 [8086/0000] ops
871 11:47:08.984550 PCI: 00:00.0 [8086/9b61] enabled
872 11:47:08.988106 PCI: 00:02.0 [8086/0000] bus ops
873 11:47:08.991482 PCI: 00:02.0 [8086/9b41] enabled
874 11:47:08.994492 PCI: 00:04.0 [8086/1903] disabled
875 11:47:08.998279 PCI: 00:08.0 [8086/1911] enabled
876 11:47:09.001820 PCI: 00:12.0 [8086/02f9] enabled
877 11:47:09.004671 PCI: 00:14.0 [8086/0000] bus ops
878 11:47:09.008359 PCI: 00:14.0 [8086/02ed] enabled
879 11:47:09.011790 PCI: 00:14.2 [8086/02ef] enabled
880 11:47:09.014771 PCI: 00:14.3 [8086/02f0] enabled
881 11:47:09.017879 PCI: 00:15.0 [8086/0000] bus ops
882 11:47:09.021369 PCI: 00:15.0 [8086/02e8] enabled
883 11:47:09.024447 PCI: 00:15.1 [8086/0000] bus ops
884 11:47:09.028255 PCI: 00:15.1 [8086/02e9] enabled
885 11:47:09.031624 PCI: 00:16.0 [8086/0000] ops
886 11:47:09.034875 PCI: 00:16.0 [8086/02e0] enabled
887 11:47:09.034991 PCI: 00:17.0 [8086/0000] ops
888 11:47:09.037957 PCI: 00:17.0 [8086/02d3] enabled
889 11:47:09.041415 PCI: 00:19.0 [8086/0000] bus ops
890 11:47:09.044480 PCI: 00:19.0 [8086/02c5] enabled
891 11:47:09.047919 PCI: 00:1d.0 [8086/0000] bus ops
892 11:47:09.051574 PCI: 00:1d.0 [8086/02b0] enabled
893 11:47:09.058024 PCI: Static device PCI: 00:1d.5 not found, disabling it.
894 11:47:09.061199 PCI: 00:1e.0 [8086/0000] ops
895 11:47:09.064402 PCI: 00:1e.0 [8086/02a8] enabled
896 11:47:09.067984 PCI: 00:1e.2 [8086/0000] bus ops
897 11:47:09.071074 PCI: 00:1e.2 [8086/02aa] enabled
898 11:47:09.074440 PCI: 00:1e.3 [8086/0000] bus ops
899 11:47:09.078064 PCI: 00:1e.3 [8086/02ab] enabled
900 11:47:09.081324 PCI: 00:1f.0 [8086/0000] bus ops
901 11:47:09.084411 PCI: 00:1f.0 [8086/0284] enabled
902 11:47:09.091366 PCI: Static device PCI: 00:1f.1 not found, disabling it.
903 11:47:09.095322 PCI: Static device PCI: 00:1f.2 not found, disabling it.
904 11:47:09.097635 PCI: 00:1f.3 [8086/0000] bus ops
905 11:47:09.101290 PCI: 00:1f.3 [8086/02c8] enabled
906 11:47:09.104547 PCI: 00:1f.4 [8086/0000] bus ops
907 11:47:09.107685 PCI: 00:1f.4 [8086/02a3] enabled
908 11:47:09.111054 PCI: 00:1f.5 [8086/0000] bus ops
909 11:47:09.114856 PCI: 00:1f.5 [8086/02a4] enabled
910 11:47:09.118191 PCI: Leftover static devices:
911 11:47:09.121278 PCI: 00:05.0
912 11:47:09.121362 PCI: 00:12.5
913 11:47:09.121433 PCI: 00:12.6
914 11:47:09.124297 PCI: 00:14.1
915 11:47:09.124376 PCI: 00:14.5
916 11:47:09.128035 PCI: 00:15.2
917 11:47:09.128158 PCI: 00:15.3
918 11:47:09.130877 PCI: 00:16.1
919 11:47:09.130959 PCI: 00:16.2
920 11:47:09.131038 PCI: 00:16.3
921 11:47:09.134595 PCI: 00:16.4
922 11:47:09.134691 PCI: 00:16.5
923 11:47:09.137943 PCI: 00:19.1
924 11:47:09.138034 PCI: 00:19.2
925 11:47:09.138107 PCI: 00:1a.0
926 11:47:09.141018 PCI: 00:1c.0
927 11:47:09.141101 PCI: 00:1c.1
928 11:47:09.144081 PCI: 00:1c.2
929 11:47:09.144168 PCI: 00:1c.3
930 11:47:09.144238 PCI: 00:1c.4
931 11:47:09.147703 PCI: 00:1c.5
932 11:47:09.147791 PCI: 00:1c.6
933 11:47:09.150783 PCI: 00:1c.7
934 11:47:09.150863 PCI: 00:1d.1
935 11:47:09.154831 PCI: 00:1d.2
936 11:47:09.154916 PCI: 00:1d.3
937 11:47:09.154989 PCI: 00:1d.4
938 11:47:09.157700 PCI: 00:1d.5
939 11:47:09.157777 PCI: 00:1e.1
940 11:47:09.160706 PCI: 00:1f.1
941 11:47:09.160791 PCI: 00:1f.2
942 11:47:09.160870 PCI: 00:1f.6
943 11:47:09.164082 PCI: Check your devicetree.cb.
944 11:47:09.167274 PCI: 00:02.0 scanning...
945 11:47:09.170896 scan_generic_bus for PCI: 00:02.0
946 11:47:09.174364 scan_generic_bus for PCI: 00:02.0 done
947 11:47:09.181136 scan_bus: scanning of bus PCI: 00:02.0 took 10199 usecs
948 11:47:09.184462 PCI: 00:14.0 scanning...
949 11:47:09.187322 scan_static_bus for PCI: 00:14.0
950 11:47:09.191016 USB0 port 0 enabled
951 11:47:09.191103 USB0 port 0 scanning...
952 11:47:09.194284 scan_static_bus for USB0 port 0
953 11:47:09.197538 USB2 port 0 enabled
954 11:47:09.200824 USB2 port 1 enabled
955 11:47:09.200939 USB2 port 2 disabled
956 11:47:09.204366 USB2 port 3 disabled
957 11:47:09.204461 USB2 port 5 disabled
958 11:47:09.207532 USB2 port 6 enabled
959 11:47:09.211343 USB2 port 9 enabled
960 11:47:09.211428 USB3 port 0 enabled
961 11:47:09.214540 USB3 port 1 enabled
962 11:47:09.217737 USB3 port 2 enabled
963 11:47:09.217818 USB3 port 3 enabled
964 11:47:09.220783 USB3 port 4 disabled
965 11:47:09.224706 USB2 port 0 scanning...
966 11:47:09.227837 scan_static_bus for USB2 port 0
967 11:47:09.231045 scan_static_bus for USB2 port 0 done
968 11:47:09.234735 scan_bus: scanning of bus USB2 port 0 took 9706 usecs
969 11:47:09.237678 USB2 port 1 scanning...
970 11:47:09.240980 scan_static_bus for USB2 port 1
971 11:47:09.244533 scan_static_bus for USB2 port 1 done
972 11:47:09.250801 scan_bus: scanning of bus USB2 port 1 took 9709 usecs
973 11:47:09.250888 USB2 port 6 scanning...
974 11:47:09.254883 scan_static_bus for USB2 port 6
975 11:47:09.261296 scan_static_bus for USB2 port 6 done
976 11:47:09.264388 scan_bus: scanning of bus USB2 port 6 took 9714 usecs
977 11:47:09.267677 USB2 port 9 scanning...
978 11:47:09.271497 scan_static_bus for USB2 port 9
979 11:47:09.274752 scan_static_bus for USB2 port 9 done
980 11:47:09.281101 scan_bus: scanning of bus USB2 port 9 took 9699 usecs
981 11:47:09.281192 USB3 port 0 scanning...
982 11:47:09.284914 scan_static_bus for USB3 port 0
983 11:47:09.291119 scan_static_bus for USB3 port 0 done
984 11:47:09.294754 scan_bus: scanning of bus USB3 port 0 took 9708 usecs
985 11:47:09.298172 USB3 port 1 scanning...
986 11:47:09.301171 scan_static_bus for USB3 port 1
987 11:47:09.304883 scan_static_bus for USB3 port 1 done
988 11:47:09.311080 scan_bus: scanning of bus USB3 port 1 took 9707 usecs
989 11:47:09.311176 USB3 port 2 scanning...
990 11:47:09.314409 scan_static_bus for USB3 port 2
991 11:47:09.321322 scan_static_bus for USB3 port 2 done
992 11:47:09.324453 scan_bus: scanning of bus USB3 port 2 took 9697 usecs
993 11:47:09.328095 USB3 port 3 scanning...
994 11:47:09.331105 scan_static_bus for USB3 port 3
995 11:47:09.334447 scan_static_bus for USB3 port 3 done
996 11:47:09.341528 scan_bus: scanning of bus USB3 port 3 took 9709 usecs
997 11:47:09.344635 scan_static_bus for USB0 port 0 done
998 11:47:09.350756 scan_bus: scanning of bus USB0 port 0 took 155426 usecs
999 11:47:09.354513 scan_static_bus for PCI: 00:14.0 done
1000 11:47:09.357661 scan_bus: scanning of bus PCI: 00:14.0 took 173047 usecs
1001 11:47:09.361376 PCI: 00:15.0 scanning...
1002 11:47:09.364586 scan_generic_bus for PCI: 00:15.0
1003 11:47:09.367619 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1004 11:47:09.374030 scan_generic_bus for PCI: 00:15.0 done
1005 11:47:09.377749 scan_bus: scanning of bus PCI: 00:15.0 took 14302 usecs
1006 11:47:09.380875 PCI: 00:15.1 scanning...
1007 11:47:09.384150 scan_generic_bus for PCI: 00:15.1
1008 11:47:09.387819 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1009 11:47:09.394128 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1010 11:47:09.398000 scan_generic_bus for PCI: 00:15.1 done
1011 11:47:09.404096 scan_bus: scanning of bus PCI: 00:15.1 took 18654 usecs
1012 11:47:09.404218 PCI: 00:19.0 scanning...
1013 11:47:09.407753 scan_generic_bus for PCI: 00:19.0
1014 11:47:09.414009 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1015 11:47:09.417818 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1016 11:47:09.421066 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1017 11:47:09.424037 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1018 11:47:09.430636 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1019 11:47:09.433925 scan_generic_bus for PCI: 00:19.0 done
1020 11:47:09.437506 scan_bus: scanning of bus PCI: 00:19.0 took 30729 usecs
1021 11:47:09.441025 PCI: 00:1d.0 scanning...
1022 11:47:09.444003 do_pci_scan_bridge for PCI: 00:1d.0
1023 11:47:09.447636 PCI: pci_scan_bus for bus 01
1024 11:47:09.450538 PCI: 01:00.0 [1c5c/1327] enabled
1025 11:47:09.453932 Enabling Common Clock Configuration
1026 11:47:09.460892 L1 Sub-State supported from root port 29
1027 11:47:09.460984 L1 Sub-State Support = 0xf
1028 11:47:09.463854 CommonModeRestoreTime = 0x28
1029 11:47:09.470996 Power On Value = 0x16, Power On Scale = 0x0
1030 11:47:09.471088 ASPM: Enabled L1
1031 11:47:09.477336 scan_bus: scanning of bus PCI: 00:1d.0 took 32776 usecs
1032 11:47:09.480558 PCI: 00:1e.2 scanning...
1033 11:47:09.484362 scan_generic_bus for PCI: 00:1e.2
1034 11:47:09.487586 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1035 11:47:09.490978 scan_generic_bus for PCI: 00:1e.2 done
1036 11:47:09.497605 scan_bus: scanning of bus PCI: 00:1e.2 took 14016 usecs
1037 11:47:09.497713 PCI: 00:1e.3 scanning...
1038 11:47:09.504084 scan_generic_bus for PCI: 00:1e.3
1039 11:47:09.507772 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1040 11:47:09.511041 scan_generic_bus for PCI: 00:1e.3 done
1041 11:47:09.514692 scan_bus: scanning of bus PCI: 00:1e.3 took 14009 usecs
1042 11:47:09.517526 PCI: 00:1f.0 scanning...
1043 11:47:09.521009 scan_static_bus for PCI: 00:1f.0
1044 11:47:09.524429 PNP: 0c09.0 enabled
1045 11:47:09.528155 scan_static_bus for PCI: 00:1f.0 done
1046 11:47:09.534289 scan_bus: scanning of bus PCI: 00:1f.0 took 12048 usecs
1047 11:47:09.537742 PCI: 00:1f.3 scanning...
1048 11:47:09.540648 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1049 11:47:09.544327 PCI: 00:1f.4 scanning...
1050 11:47:09.547850 scan_generic_bus for PCI: 00:1f.4
1051 11:47:09.551267 scan_generic_bus for PCI: 00:1f.4 done
1052 11:47:09.557319 scan_bus: scanning of bus PCI: 00:1f.4 took 10196 usecs
1053 11:47:09.560837 PCI: 00:1f.5 scanning...
1054 11:47:09.564427 scan_generic_bus for PCI: 00:1f.5
1055 11:47:09.567409 scan_generic_bus for PCI: 00:1f.5 done
1056 11:47:09.574186 scan_bus: scanning of bus PCI: 00:1f.5 took 10197 usecs
1057 11:47:09.577381 scan_bus: scanning of bus DOMAIN: 0000 took 605180 usecs
1058 11:47:09.584473 scan_static_bus for Root Device done
1059 11:47:09.587568 scan_bus: scanning of bus Root Device took 625057 usecs
1060 11:47:09.587656 done
1061 11:47:09.591190 Chrome EC: UHEPI supported
1062 11:47:09.597259 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1063 11:47:09.604161 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1064 11:47:09.610593 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1065 11:47:09.617758 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1066 11:47:09.621017 SPI flash protection: WPSW=0 SRP0=0
1067 11:47:09.624034 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1068 11:47:09.630806 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1069 11:47:09.633693 found VGA at PCI: 00:02.0
1070 11:47:09.637181 Setting up VGA for PCI: 00:02.0
1071 11:47:09.641029 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1072 11:47:09.647505 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1073 11:47:09.650319 Allocating resources...
1074 11:47:09.650407 Reading resources...
1075 11:47:09.654183 Root Device read_resources bus 0 link: 0
1076 11:47:09.661088 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1077 11:47:09.664216 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1078 11:47:09.671047 DOMAIN: 0000 read_resources bus 0 link: 0
1079 11:47:09.674074 PCI: 00:14.0 read_resources bus 0 link: 0
1080 11:47:09.681000 USB0 port 0 read_resources bus 0 link: 0
1081 11:47:09.688037 USB0 port 0 read_resources bus 0 link: 0 done
1082 11:47:09.691926 PCI: 00:14.0 read_resources bus 0 link: 0 done
1083 11:47:09.699156 PCI: 00:15.0 read_resources bus 1 link: 0
1084 11:47:09.702156 PCI: 00:15.0 read_resources bus 1 link: 0 done
1085 11:47:09.708613 PCI: 00:15.1 read_resources bus 2 link: 0
1086 11:47:09.712451 PCI: 00:15.1 read_resources bus 2 link: 0 done
1087 11:47:09.719906 PCI: 00:19.0 read_resources bus 3 link: 0
1088 11:47:09.726475 PCI: 00:19.0 read_resources bus 3 link: 0 done
1089 11:47:09.729650 PCI: 00:1d.0 read_resources bus 1 link: 0
1090 11:47:09.736212 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1091 11:47:09.739444 PCI: 00:1e.2 read_resources bus 4 link: 0
1092 11:47:09.745935 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1093 11:47:09.749741 PCI: 00:1e.3 read_resources bus 5 link: 0
1094 11:47:09.755889 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1095 11:47:09.759756 PCI: 00:1f.0 read_resources bus 0 link: 0
1096 11:47:09.765997 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1097 11:47:09.769720 DOMAIN: 0000 read_resources bus 0 link: 0 done
1098 11:47:09.776135 Root Device read_resources bus 0 link: 0 done
1099 11:47:09.779750 Done reading resources.
1100 11:47:09.783327 Show resources in subtree (Root Device)...After reading.
1101 11:47:09.789608 Root Device child on link 0 CPU_CLUSTER: 0
1102 11:47:09.792989 CPU_CLUSTER: 0 child on link 0 APIC: 00
1103 11:47:09.793075 APIC: 00
1104 11:47:09.796541 APIC: 02
1105 11:47:09.796624 APIC: 05
1106 11:47:09.796694 APIC: 01
1107 11:47:09.799551 APIC: 03
1108 11:47:09.799630 APIC: 04
1109 11:47:09.803110 APIC: 07
1110 11:47:09.803194 APIC: 06
1111 11:47:09.806115 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1112 11:47:09.816383 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1113 11:47:09.872615 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1114 11:47:09.872736 PCI: 00:00.0
1115 11:47:09.873187 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1116 11:47:09.873813 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1117 11:47:09.874264 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1118 11:47:09.874538 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1119 11:47:09.922710 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1120 11:47:09.923022 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1121 11:47:09.923115 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1122 11:47:09.923726 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1123 11:47:09.924588 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1124 11:47:09.924862 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1125 11:47:09.947991 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1126 11:47:09.948348 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1127 11:47:09.951986 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1128 11:47:09.958634 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1129 11:47:09.968642 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1130 11:47:09.978591 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1131 11:47:09.978691 PCI: 00:02.0
1132 11:47:09.988674 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1133 11:47:09.998420 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1134 11:47:10.008597 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1135 11:47:10.008688 PCI: 00:04.0
1136 11:47:10.011717 PCI: 00:08.0
1137 11:47:10.021863 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1138 11:47:10.021952 PCI: 00:12.0
1139 11:47:10.031446 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1140 11:47:10.038073 PCI: 00:14.0 child on link 0 USB0 port 0
1141 11:47:10.048616 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1142 11:47:10.051657 USB0 port 0 child on link 0 USB2 port 0
1143 11:47:10.055683 USB2 port 0
1144 11:47:10.055769 USB2 port 1
1145 11:47:10.058626 USB2 port 2
1146 11:47:10.058709 USB2 port 3
1147 11:47:10.061285 USB2 port 5
1148 11:47:10.061377 USB2 port 6
1149 11:47:10.065127 USB2 port 9
1150 11:47:10.065220 USB3 port 0
1151 11:47:10.068183 USB3 port 1
1152 11:47:10.068302 USB3 port 2
1153 11:47:10.071726 USB3 port 3
1154 11:47:10.071851 USB3 port 4
1155 11:47:10.074904 PCI: 00:14.2
1156 11:47:10.084714 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1157 11:47:10.094793 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1158 11:47:10.094893 PCI: 00:14.3
1159 11:47:10.104747 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1160 11:47:10.111364 PCI: 00:15.0 child on link 0 I2C: 01:15
1161 11:47:10.121600 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1162 11:47:10.121690 I2C: 01:15
1163 11:47:10.124846 PCI: 00:15.1 child on link 0 I2C: 02:5d
1164 11:47:10.135097 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 11:47:10.138283 I2C: 02:5d
1166 11:47:10.138369 GENERIC: 0.0
1167 11:47:10.141815 PCI: 00:16.0
1168 11:47:10.151477 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 11:47:10.151568 PCI: 00:17.0
1170 11:47:10.161665 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1171 11:47:10.171362 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1172 11:47:10.177985 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1173 11:47:10.188706 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1174 11:47:10.194428 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1175 11:47:10.204128 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1176 11:47:10.207822 PCI: 00:19.0 child on link 0 I2C: 03:1a
1177 11:47:10.217554 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1178 11:47:10.220859 I2C: 03:1a
1179 11:47:10.220946 I2C: 03:38
1180 11:47:10.224555 I2C: 03:39
1181 11:47:10.224651 I2C: 03:3a
1182 11:47:10.227781 I2C: 03:3b
1183 11:47:10.231048 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1184 11:47:10.241183 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1185 11:47:10.251047 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1186 11:47:10.257364 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1187 11:47:10.261186 PCI: 01:00.0
1188 11:47:10.271027 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1189 11:47:10.271130 PCI: 00:1e.0
1190 11:47:10.284153 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1191 11:47:10.294339 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1192 11:47:10.297566 PCI: 00:1e.2 child on link 0 SPI: 00
1193 11:47:10.307277 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 11:47:10.307374 SPI: 00
1195 11:47:10.310855 PCI: 00:1e.3 child on link 0 SPI: 01
1196 11:47:10.321014 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 11:47:10.324321 SPI: 01
1198 11:47:10.327237 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1199 11:47:10.337415 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1200 11:47:10.343946 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1201 11:47:10.347288 PNP: 0c09.0
1202 11:47:10.354008 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1203 11:47:10.357205 PCI: 00:1f.3
1204 11:47:10.367339 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1205 11:47:10.377011 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1206 11:47:10.380745 PCI: 00:1f.4
1207 11:47:10.387132 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1208 11:47:10.397457 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1209 11:47:10.400804 PCI: 00:1f.5
1210 11:47:10.406891 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1211 11:47:10.414080 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1212 11:47:10.420353 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1213 11:47:10.427075 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1214 11:47:10.430257 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1215 11:47:10.434129 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1216 11:47:10.440473 PCI: 00:17.0 18 * [0x60 - 0x67] io
1217 11:47:10.443443 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1218 11:47:10.450206 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1219 11:47:10.456870 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1220 11:47:10.463673 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1221 11:47:10.473733 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1222 11:47:10.480047 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1223 11:47:10.483099 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1224 11:47:10.489728 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1225 11:47:10.496362 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1226 11:47:10.500119 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1227 11:47:10.506372 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1228 11:47:10.510144 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1229 11:47:10.516590 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1230 11:47:10.519784 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1231 11:47:10.523547 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1232 11:47:10.529851 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1233 11:47:10.533051 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1234 11:47:10.539454 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1235 11:47:10.542595 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1236 11:47:10.549797 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1237 11:47:10.552865 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1238 11:47:10.559561 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1239 11:47:10.563096 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1240 11:47:10.569843 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1241 11:47:10.572766 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1242 11:47:10.579386 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1243 11:47:10.582776 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1244 11:47:10.590049 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1245 11:47:10.593048 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1246 11:47:10.596223 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1247 11:47:10.602558 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1248 11:47:10.609875 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1249 11:47:10.616463 avoid_fixed_resources: DOMAIN: 0000
1250 11:47:10.619732 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1251 11:47:10.626296 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1252 11:47:10.632520 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1253 11:47:10.642431 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1254 11:47:10.649101 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1255 11:47:10.655961 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1256 11:47:10.666017 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1257 11:47:10.672589 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1258 11:47:10.679645 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1259 11:47:10.685753 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1260 11:47:10.695943 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1261 11:47:10.702242 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1262 11:47:10.705845 Setting resources...
1263 11:47:10.709236 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1264 11:47:10.715590 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1265 11:47:10.718975 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1266 11:47:10.722540 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1267 11:47:10.726167 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1268 11:47:10.732326 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1269 11:47:10.738806 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1270 11:47:10.745487 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1271 11:47:10.752555 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1272 11:47:10.758897 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1273 11:47:10.761998 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1274 11:47:10.768999 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1275 11:47:10.771987 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1276 11:47:10.779073 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1277 11:47:10.781932 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1278 11:47:10.789015 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1279 11:47:10.792330 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1280 11:47:10.798397 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1281 11:47:10.802347 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1282 11:47:10.805385 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1283 11:47:10.811645 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1284 11:47:10.814865 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1285 11:47:10.821649 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1286 11:47:10.825432 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1287 11:47:10.831371 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1288 11:47:10.835499 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1289 11:47:10.841568 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1290 11:47:10.845263 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1291 11:47:10.851558 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1292 11:47:10.854802 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1293 11:47:10.861691 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1294 11:47:10.864881 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1295 11:47:10.871609 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1296 11:47:10.881311 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1297 11:47:10.888081 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1298 11:47:10.895076 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1299 11:47:10.898094 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1300 11:47:10.908419 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1301 11:47:10.911522 Root Device assign_resources, bus 0 link: 0
1302 11:47:10.914701 DOMAIN: 0000 assign_resources, bus 0 link: 0
1303 11:47:10.924818 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1304 11:47:10.931894 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1305 11:47:10.941364 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1306 11:47:10.948304 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1307 11:47:10.958409 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1308 11:47:10.964710 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1309 11:47:10.971854 PCI: 00:14.0 assign_resources, bus 0 link: 0
1310 11:47:10.974548 PCI: 00:14.0 assign_resources, bus 0 link: 0
1311 11:47:10.984551 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1312 11:47:10.991532 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1313 11:47:10.998269 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1314 11:47:11.008611 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1315 11:47:11.011638 PCI: 00:15.0 assign_resources, bus 1 link: 0
1316 11:47:11.018634 PCI: 00:15.0 assign_resources, bus 1 link: 0
1317 11:47:11.024954 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1318 11:47:11.028850 PCI: 00:15.1 assign_resources, bus 2 link: 0
1319 11:47:11.035035 PCI: 00:15.1 assign_resources, bus 2 link: 0
1320 11:47:11.041632 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1321 11:47:11.051875 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1322 11:47:11.058037 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1323 11:47:11.065343 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1324 11:47:11.074888 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1325 11:47:11.081375 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1326 11:47:11.088312 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1327 11:47:11.098248 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1328 11:47:11.101431 PCI: 00:19.0 assign_resources, bus 3 link: 0
1329 11:47:11.107943 PCI: 00:19.0 assign_resources, bus 3 link: 0
1330 11:47:11.114889 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1331 11:47:11.124777 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1332 11:47:11.134554 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1333 11:47:11.137756 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1334 11:47:11.144238 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1335 11:47:11.151341 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1336 11:47:11.157526 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1337 11:47:11.167635 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1338 11:47:11.170893 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1339 11:47:11.177891 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1340 11:47:11.184181 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1341 11:47:11.190768 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1342 11:47:11.193937 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1343 11:47:11.197041 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1344 11:47:11.204523 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1345 11:47:11.207532 LPC: Trying to open IO window from 800 size 1ff
1346 11:47:11.217867 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1347 11:47:11.224088 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1348 11:47:11.234380 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1349 11:47:11.240842 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1350 11:47:11.247523 DOMAIN: 0000 assign_resources, bus 0 link: 0
1351 11:47:11.250678 Root Device assign_resources, bus 0 link: 0
1352 11:47:11.254343 Done setting resources.
1353 11:47:11.260779 Show resources in subtree (Root Device)...After assigning values.
1354 11:47:11.263901 Root Device child on link 0 CPU_CLUSTER: 0
1355 11:47:11.267730 CPU_CLUSTER: 0 child on link 0 APIC: 00
1356 11:47:11.270360 APIC: 00
1357 11:47:11.270438 APIC: 02
1358 11:47:11.270519 APIC: 05
1359 11:47:11.274021 APIC: 01
1360 11:47:11.274102 APIC: 03
1361 11:47:11.277197 APIC: 04
1362 11:47:11.277289 APIC: 07
1363 11:47:11.277360 APIC: 06
1364 11:47:11.284088 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1365 11:47:11.293833 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1366 11:47:11.303814 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1367 11:47:11.303907 PCI: 00:00.0
1368 11:47:11.313714 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1369 11:47:11.323344 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1370 11:47:11.333664 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1371 11:47:11.343765 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1372 11:47:11.353572 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1373 11:47:11.359980 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1374 11:47:11.369934 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1375 11:47:11.380080 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1376 11:47:11.389989 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1377 11:47:11.399913 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1378 11:47:11.406488 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1379 11:47:11.416627 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1380 11:47:11.426523 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1381 11:47:11.436240 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1382 11:47:11.446714 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1383 11:47:11.456095 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1384 11:47:11.456219 PCI: 00:02.0
1385 11:47:11.465918 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1386 11:47:11.479026 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1387 11:47:11.485531 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1388 11:47:11.488781 PCI: 00:04.0
1389 11:47:11.488878 PCI: 00:08.0
1390 11:47:11.502363 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1391 11:47:11.502458 PCI: 00:12.0
1392 11:47:11.512206 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1393 11:47:11.515553 PCI: 00:14.0 child on link 0 USB0 port 0
1394 11:47:11.528912 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1395 11:47:11.532079 USB0 port 0 child on link 0 USB2 port 0
1396 11:47:11.532204 USB2 port 0
1397 11:47:11.535140 USB2 port 1
1398 11:47:11.539292 USB2 port 2
1399 11:47:11.539386 USB2 port 3
1400 11:47:11.541826 USB2 port 5
1401 11:47:11.541916 USB2 port 6
1402 11:47:11.545910 USB2 port 9
1403 11:47:11.546000 USB3 port 0
1404 11:47:11.548524 USB3 port 1
1405 11:47:11.548614 USB3 port 2
1406 11:47:11.552445 USB3 port 3
1407 11:47:11.552536 USB3 port 4
1408 11:47:11.555612 PCI: 00:14.2
1409 11:47:11.565015 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1410 11:47:11.575279 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1411 11:47:11.578496 PCI: 00:14.3
1412 11:47:11.588378 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1413 11:47:11.591480 PCI: 00:15.0 child on link 0 I2C: 01:15
1414 11:47:11.601673 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1415 11:47:11.605112 I2C: 01:15
1416 11:47:11.608729 PCI: 00:15.1 child on link 0 I2C: 02:5d
1417 11:47:11.618163 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1418 11:47:11.618252 I2C: 02:5d
1419 11:47:11.621369 GENERIC: 0.0
1420 11:47:11.621462 PCI: 00:16.0
1421 11:47:11.634402 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1422 11:47:11.634497 PCI: 00:17.0
1423 11:47:11.644567 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1424 11:47:11.654529 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1425 11:47:11.664266 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1426 11:47:11.674740 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1427 11:47:11.680816 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1428 11:47:11.694061 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1429 11:47:11.697254 PCI: 00:19.0 child on link 0 I2C: 03:1a
1430 11:47:11.707508 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1431 11:47:11.707603 I2C: 03:1a
1432 11:47:11.710778 I2C: 03:38
1433 11:47:11.710871 I2C: 03:39
1434 11:47:11.714179 I2C: 03:3a
1435 11:47:11.714272 I2C: 03:3b
1436 11:47:11.720870 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1437 11:47:11.727169 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1438 11:47:11.737021 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1439 11:47:11.750262 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1440 11:47:11.750361 PCI: 01:00.0
1441 11:47:11.760051 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1442 11:47:11.763859 PCI: 00:1e.0
1443 11:47:11.773330 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1444 11:47:11.783599 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1445 11:47:11.790160 PCI: 00:1e.2 child on link 0 SPI: 00
1446 11:47:11.800138 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1447 11:47:11.800233 SPI: 00
1448 11:47:11.803622 PCI: 00:1e.3 child on link 0 SPI: 01
1449 11:47:11.813269 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1450 11:47:11.816397 SPI: 01
1451 11:47:11.819695 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1452 11:47:11.829555 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1453 11:47:11.836160 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1454 11:47:11.839451 PNP: 0c09.0
1455 11:47:11.849782 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1456 11:47:11.849876 PCI: 00:1f.3
1457 11:47:11.859540 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1458 11:47:11.869530 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1459 11:47:11.872833 PCI: 00:1f.4
1460 11:47:11.882494 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1461 11:47:11.892168 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1462 11:47:11.892275 PCI: 00:1f.5
1463 11:47:11.902347 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1464 11:47:11.905652 Done allocating resources.
1465 11:47:11.912274 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1466 11:47:11.915424 Enabling resources...
1467 11:47:11.919357 PCI: 00:00.0 subsystem <- 8086/9b61
1468 11:47:11.922396 PCI: 00:00.0 cmd <- 06
1469 11:47:11.925653 PCI: 00:02.0 subsystem <- 8086/9b41
1470 11:47:11.929048 PCI: 00:02.0 cmd <- 03
1471 11:47:11.929140 PCI: 00:08.0 cmd <- 06
1472 11:47:11.935590 PCI: 00:12.0 subsystem <- 8086/02f9
1473 11:47:11.935681 PCI: 00:12.0 cmd <- 02
1474 11:47:11.938686 PCI: 00:14.0 subsystem <- 8086/02ed
1475 11:47:11.942464 PCI: 00:14.0 cmd <- 02
1476 11:47:11.945419 PCI: 00:14.2 cmd <- 02
1477 11:47:11.948841 PCI: 00:14.3 subsystem <- 8086/02f0
1478 11:47:11.952028 PCI: 00:14.3 cmd <- 02
1479 11:47:11.955625 PCI: 00:15.0 subsystem <- 8086/02e8
1480 11:47:11.958568 PCI: 00:15.0 cmd <- 02
1481 11:47:11.962200 PCI: 00:15.1 subsystem <- 8086/02e9
1482 11:47:11.965374 PCI: 00:15.1 cmd <- 02
1483 11:47:11.968574 PCI: 00:16.0 subsystem <- 8086/02e0
1484 11:47:11.968666 PCI: 00:16.0 cmd <- 02
1485 11:47:11.975503 PCI: 00:17.0 subsystem <- 8086/02d3
1486 11:47:11.975594 PCI: 00:17.0 cmd <- 03
1487 11:47:11.978959 PCI: 00:19.0 subsystem <- 8086/02c5
1488 11:47:11.982317 PCI: 00:19.0 cmd <- 02
1489 11:47:11.985499 PCI: 00:1d.0 bridge ctrl <- 0013
1490 11:47:11.988717 PCI: 00:1d.0 subsystem <- 8086/02b0
1491 11:47:11.992300 PCI: 00:1d.0 cmd <- 06
1492 11:47:11.995587 PCI: 00:1e.0 subsystem <- 8086/02a8
1493 11:47:11.998532 PCI: 00:1e.0 cmd <- 06
1494 11:47:12.002320 PCI: 00:1e.2 subsystem <- 8086/02aa
1495 11:47:12.005577 PCI: 00:1e.2 cmd <- 06
1496 11:47:12.008781 PCI: 00:1e.3 subsystem <- 8086/02ab
1497 11:47:12.011935 PCI: 00:1e.3 cmd <- 02
1498 11:47:12.015874 PCI: 00:1f.0 subsystem <- 8086/0284
1499 11:47:12.018487 PCI: 00:1f.0 cmd <- 407
1500 11:47:12.022276 PCI: 00:1f.3 subsystem <- 8086/02c8
1501 11:47:12.022397 PCI: 00:1f.3 cmd <- 02
1502 11:47:12.028798 PCI: 00:1f.4 subsystem <- 8086/02a3
1503 11:47:12.028919 PCI: 00:1f.4 cmd <- 03
1504 11:47:12.032048 PCI: 00:1f.5 subsystem <- 8086/02a4
1505 11:47:12.035793 PCI: 00:1f.5 cmd <- 406
1506 11:47:12.045159 PCI: 01:00.0 cmd <- 02
1507 11:47:12.050293 done.
1508 11:47:12.062853 ME: Version: 14.0.39.1367
1509 11:47:12.069382 BS: BS_DEV_ENABLE times (ms): entry 0 run 18 exit 12
1510 11:47:12.072767 Initializing devices...
1511 11:47:12.072858 Root Device init ...
1512 11:47:12.079033 Chrome EC: Set SMI mask to 0x0000000000000000
1513 11:47:12.082747 Chrome EC: clear events_b mask to 0x0000000000000000
1514 11:47:12.089001 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1515 11:47:12.095647 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1516 11:47:12.102845 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1517 11:47:12.105832 Chrome EC: Set WAKE mask to 0x0000000000000000
1518 11:47:12.108749 Root Device init finished in 35180 usecs
1519 11:47:12.112500 CPU_CLUSTER: 0 init ...
1520 11:47:12.119018 CPU_CLUSTER: 0 init finished in 2447 usecs
1521 11:47:12.123352 PCI: 00:00.0 init ...
1522 11:47:12.126702 CPU TDP: 15 Watts
1523 11:47:12.129846 CPU PL2 = 64 Watts
1524 11:47:12.133041 PCI: 00:00.0 init finished in 7079 usecs
1525 11:47:12.136238 PCI: 00:02.0 init ...
1526 11:47:12.139662 PCI: 00:02.0 init finished in 2255 usecs
1527 11:47:12.143419 PCI: 00:08.0 init ...
1528 11:47:12.146249 PCI: 00:08.0 init finished in 2254 usecs
1529 11:47:12.149571 PCI: 00:12.0 init ...
1530 11:47:12.153459 PCI: 00:12.0 init finished in 2252 usecs
1531 11:47:12.156411 PCI: 00:14.0 init ...
1532 11:47:12.160040 PCI: 00:14.0 init finished in 2244 usecs
1533 11:47:12.162851 PCI: 00:14.2 init ...
1534 11:47:12.166289 PCI: 00:14.2 init finished in 2254 usecs
1535 11:47:12.169778 PCI: 00:14.3 init ...
1536 11:47:12.173130 PCI: 00:14.3 init finished in 2265 usecs
1537 11:47:12.176428 PCI: 00:15.0 init ...
1538 11:47:12.179537 DW I2C bus 0 at 0xd121f000 (400 KHz)
1539 11:47:12.183007 PCI: 00:15.0 init finished in 5978 usecs
1540 11:47:12.186490 PCI: 00:15.1 init ...
1541 11:47:12.189568 DW I2C bus 1 at 0xd1220000 (400 KHz)
1542 11:47:12.196054 PCI: 00:15.1 init finished in 5978 usecs
1543 11:47:12.196146 PCI: 00:16.0 init ...
1544 11:47:12.203399 PCI: 00:16.0 init finished in 2254 usecs
1545 11:47:12.206313 PCI: 00:19.0 init ...
1546 11:47:12.209293 DW I2C bus 4 at 0xd1222000 (400 KHz)
1547 11:47:12.212737 PCI: 00:19.0 init finished in 5977 usecs
1548 11:47:12.215913 PCI: 00:1d.0 init ...
1549 11:47:12.219181 Initializing PCH PCIe bridge.
1550 11:47:12.222928 PCI: 00:1d.0 init finished in 5285 usecs
1551 11:47:12.225981 PCI: 00:1f.0 init ...
1552 11:47:12.229418 IOAPIC: Initializing IOAPIC at 0xfec00000
1553 11:47:12.235798 IOAPIC: Bootstrap Processor Local APIC = 0x00
1554 11:47:12.235888 IOAPIC: ID = 0x02
1555 11:47:12.239222 IOAPIC: Dumping registers
1556 11:47:12.242513 reg 0x0000: 0x02000000
1557 11:47:12.245663 reg 0x0001: 0x00770020
1558 11:47:12.245754 reg 0x0002: 0x00000000
1559 11:47:12.252404 PCI: 00:1f.0 init finished in 23551 usecs
1560 11:47:12.255667 PCI: 00:1f.4 init ...
1561 11:47:12.258891 PCI: 00:1f.4 init finished in 2263 usecs
1562 11:47:12.269416 PCI: 01:00.0 init ...
1563 11:47:12.272902 PCI: 01:00.0 init finished in 2252 usecs
1564 11:47:12.277092 PNP: 0c09.0 init ...
1565 11:47:12.280440 Google Chrome EC uptime: 11.056 seconds
1566 11:47:12.287028 Google Chrome AP resets since EC boot: 0
1567 11:47:12.290155 Google Chrome most recent AP reset causes:
1568 11:47:12.297131 Google Chrome EC reset flags at last EC boot: reset-pin
1569 11:47:12.300716 PNP: 0c09.0 init finished in 20578 usecs
1570 11:47:12.303744 Devices initialized
1571 11:47:12.303838 Show all devs... After init.
1572 11:47:12.306880 Root Device: enabled 1
1573 11:47:12.310130 CPU_CLUSTER: 0: enabled 1
1574 11:47:12.314128 DOMAIN: 0000: enabled 1
1575 11:47:12.314235 APIC: 00: enabled 1
1576 11:47:12.317060 PCI: 00:00.0: enabled 1
1577 11:47:12.320400 PCI: 00:02.0: enabled 1
1578 11:47:12.323637 PCI: 00:04.0: enabled 0
1579 11:47:12.323722 PCI: 00:05.0: enabled 0
1580 11:47:12.327012 PCI: 00:12.0: enabled 1
1581 11:47:12.330356 PCI: 00:12.5: enabled 0
1582 11:47:12.330440 PCI: 00:12.6: enabled 0
1583 11:47:12.333761 PCI: 00:14.0: enabled 1
1584 11:47:12.336875 PCI: 00:14.1: enabled 0
1585 11:47:12.340395 PCI: 00:14.3: enabled 1
1586 11:47:12.340481 PCI: 00:14.5: enabled 0
1587 11:47:12.343198 PCI: 00:15.0: enabled 1
1588 11:47:12.346556 PCI: 00:15.1: enabled 1
1589 11:47:12.350014 PCI: 00:15.2: enabled 0
1590 11:47:12.350130 PCI: 00:15.3: enabled 0
1591 11:47:12.353081 PCI: 00:16.0: enabled 1
1592 11:47:12.356831 PCI: 00:16.1: enabled 0
1593 11:47:12.359928 PCI: 00:16.2: enabled 0
1594 11:47:12.360022 PCI: 00:16.3: enabled 0
1595 11:47:12.363069 PCI: 00:16.4: enabled 0
1596 11:47:12.366597 PCI: 00:16.5: enabled 0
1597 11:47:12.369681 PCI: 00:17.0: enabled 1
1598 11:47:12.369784 PCI: 00:19.0: enabled 1
1599 11:47:12.373250 PCI: 00:19.1: enabled 0
1600 11:47:12.376181 PCI: 00:19.2: enabled 0
1601 11:47:12.376308 PCI: 00:1a.0: enabled 0
1602 11:47:12.380006 PCI: 00:1c.0: enabled 0
1603 11:47:12.382926 PCI: 00:1c.1: enabled 0
1604 11:47:12.386146 PCI: 00:1c.2: enabled 0
1605 11:47:12.386255 PCI: 00:1c.3: enabled 0
1606 11:47:12.389318 PCI: 00:1c.4: enabled 0
1607 11:47:12.392874 PCI: 00:1c.5: enabled 0
1608 11:47:12.395970 PCI: 00:1c.6: enabled 0
1609 11:47:12.396085 PCI: 00:1c.7: enabled 0
1610 11:47:12.399559 PCI: 00:1d.0: enabled 1
1611 11:47:12.403090 PCI: 00:1d.1: enabled 0
1612 11:47:12.406224 PCI: 00:1d.2: enabled 0
1613 11:47:12.406338 PCI: 00:1d.3: enabled 0
1614 11:47:12.409773 PCI: 00:1d.4: enabled 0
1615 11:47:12.413067 PCI: 00:1d.5: enabled 0
1616 11:47:12.413156 PCI: 00:1e.0: enabled 1
1617 11:47:12.415955 PCI: 00:1e.1: enabled 0
1618 11:47:12.419807 PCI: 00:1e.2: enabled 1
1619 11:47:12.422957 PCI: 00:1e.3: enabled 1
1620 11:47:12.423069 PCI: 00:1f.0: enabled 1
1621 11:47:12.426255 PCI: 00:1f.1: enabled 0
1622 11:47:12.429381 PCI: 00:1f.2: enabled 0
1623 11:47:12.432687 PCI: 00:1f.3: enabled 1
1624 11:47:12.432776 PCI: 00:1f.4: enabled 1
1625 11:47:12.435789 PCI: 00:1f.5: enabled 1
1626 11:47:12.439612 PCI: 00:1f.6: enabled 0
1627 11:47:12.442690 USB0 port 0: enabled 1
1628 11:47:12.442808 I2C: 01:15: enabled 1
1629 11:47:12.445654 I2C: 02:5d: enabled 1
1630 11:47:12.449059 GENERIC: 0.0: enabled 1
1631 11:47:12.449175 I2C: 03:1a: enabled 1
1632 11:47:12.452509 I2C: 03:38: enabled 1
1633 11:47:12.456169 I2C: 03:39: enabled 1
1634 11:47:12.456287 I2C: 03:3a: enabled 1
1635 11:47:12.459010 I2C: 03:3b: enabled 1
1636 11:47:12.462507 PCI: 00:00.0: enabled 1
1637 11:47:12.462629 SPI: 00: enabled 1
1638 11:47:12.465803 SPI: 01: enabled 1
1639 11:47:12.468968 PNP: 0c09.0: enabled 1
1640 11:47:12.469055 USB2 port 0: enabled 1
1641 11:47:12.472119 USB2 port 1: enabled 1
1642 11:47:12.475800 USB2 port 2: enabled 0
1643 11:47:12.475912 USB2 port 3: enabled 0
1644 11:47:12.479048 USB2 port 5: enabled 0
1645 11:47:12.482536 USB2 port 6: enabled 1
1646 11:47:12.485425 USB2 port 9: enabled 1
1647 11:47:12.485518 USB3 port 0: enabled 1
1648 11:47:12.489151 USB3 port 1: enabled 1
1649 11:47:12.492298 USB3 port 2: enabled 1
1650 11:47:12.492390 USB3 port 3: enabled 1
1651 11:47:12.495542 USB3 port 4: enabled 0
1652 11:47:12.498986 APIC: 02: enabled 1
1653 11:47:12.499078 APIC: 05: enabled 1
1654 11:47:12.502070 APIC: 01: enabled 1
1655 11:47:12.505711 APIC: 03: enabled 1
1656 11:47:12.505803 APIC: 04: enabled 1
1657 11:47:12.508834 APIC: 07: enabled 1
1658 11:47:12.508926 APIC: 06: enabled 1
1659 11:47:12.511950 PCI: 00:08.0: enabled 1
1660 11:47:12.515593 PCI: 00:14.2: enabled 1
1661 11:47:12.518655 PCI: 01:00.0: enabled 1
1662 11:47:12.522306 Disabling ACPI via APMC:
1663 11:47:12.522399 done.
1664 11:47:12.528853 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1665 11:47:12.532668 ELOG: NV offset 0xaf0000 size 0x4000
1666 11:47:12.538904 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1667 11:47:12.545423 ELOG: Event(17) added with size 13 at 2024-04-05 11:46:26 UTC
1668 11:47:12.552234 ELOG: Event(92) added with size 9 at 2024-04-05 11:46:26 UTC
1669 11:47:12.559250 ELOG: Event(93) added with size 9 at 2024-04-05 11:46:26 UTC
1670 11:47:12.565704 ELOG: Event(9A) added with size 9 at 2024-04-05 11:46:26 UTC
1671 11:47:12.572422 ELOG: Event(9E) added with size 10 at 2024-04-05 11:46:26 UTC
1672 11:47:12.579206 ELOG: Event(9F) added with size 14 at 2024-04-05 11:46:26 UTC
1673 11:47:12.582602 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1674 11:47:12.589396 ELOG: Event(A1) added with size 10 at 2024-04-05 11:46:26 UTC
1675 11:47:12.598788 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1676 11:47:12.605585 ELOG: Event(A0) added with size 9 at 2024-04-05 11:46:26 UTC
1677 11:47:12.609015 elog_add_boot_reason: Logged dev mode boot
1678 11:47:12.609140 Finalize devices...
1679 11:47:12.612196 PCI: 00:17.0 final
1680 11:47:12.615412 Devices finalized
1681 11:47:12.618803 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1682 11:47:12.625494 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1683 11:47:12.629347 ME: HFSTS1 : 0x90000245
1684 11:47:12.632387 ME: HFSTS2 : 0x3B850126
1685 11:47:12.638625 ME: HFSTS3 : 0x00000020
1686 11:47:12.642353 ME: HFSTS4 : 0x00004800
1687 11:47:12.645601 ME: HFSTS5 : 0x00000000
1688 11:47:12.648714 ME: HFSTS6 : 0x40400006
1689 11:47:12.652051 ME: Manufacturing Mode : NO
1690 11:47:12.654970 ME: FW Partition Table : OK
1691 11:47:12.658303 ME: Bringup Loader Failure : NO
1692 11:47:12.662217 ME: Firmware Init Complete : YES
1693 11:47:12.665356 ME: Boot Options Present : NO
1694 11:47:12.668510 ME: Update In Progress : NO
1695 11:47:12.671916 ME: D0i3 Support : YES
1696 11:47:12.675177 ME: Low Power State Enabled : NO
1697 11:47:12.678284 ME: CPU Replaced : NO
1698 11:47:12.681974 ME: CPU Replacement Valid : YES
1699 11:47:12.684740 ME: Current Working State : 5
1700 11:47:12.688692 ME: Current Operation State : 1
1701 11:47:12.691950 ME: Current Operation Mode : 0
1702 11:47:12.695004 ME: Error Code : 0
1703 11:47:12.698216 ME: CPU Debug Disabled : YES
1704 11:47:12.701682 ME: TXT Support : NO
1705 11:47:12.707964 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1706 11:47:12.714587 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1707 11:47:12.714707 CBFS @ c08000 size 3f8000
1708 11:47:12.721873 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1709 11:47:12.725053 CBFS: Locating 'fallback/dsdt.aml'
1710 11:47:12.728099 CBFS: Found @ offset 10bb80 size 3fa5
1711 11:47:12.734831 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1712 11:47:12.737771 CBFS @ c08000 size 3f8000
1713 11:47:12.741533 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1714 11:47:12.744699 CBFS: Locating 'fallback/slic'
1715 11:47:12.749366 CBFS: 'fallback/slic' not found.
1716 11:47:12.756108 ACPI: Writing ACPI tables at 99b3e000.
1717 11:47:12.756201 ACPI: * FACS
1718 11:47:12.759868 ACPI: * DSDT
1719 11:47:12.763088 Ramoops buffer: 0x100000@0x99a3d000.
1720 11:47:12.766216 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1721 11:47:12.772513 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1722 11:47:12.776214 Google Chrome EC: version:
1723 11:47:12.779173 ro: helios_v2.0.2659-56403530b
1724 11:47:12.782523 rw: helios_v2.0.2849-c41de27e7d
1725 11:47:12.782617 running image: 1
1726 11:47:12.787014 ACPI: * FADT
1727 11:47:12.787108 SCI is IRQ9
1728 11:47:12.793649 ACPI: added table 1/32, length now 40
1729 11:47:12.793744 ACPI: * SSDT
1730 11:47:12.796996 Found 1 CPU(s) with 8 core(s) each.
1731 11:47:12.800002 Error: Could not locate 'wifi_sar' in VPD.
1732 11:47:12.806622 Checking CBFS for default SAR values
1733 11:47:12.810256 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1734 11:47:12.813115 CBFS @ c08000 size 3f8000
1735 11:47:12.819811 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1736 11:47:12.823300 CBFS: Locating 'wifi_sar_defaults.hex'
1737 11:47:12.826871 CBFS: Found @ offset 5fac0 size 77
1738 11:47:12.829790 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1739 11:47:12.836680 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1740 11:47:12.839729 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1741 11:47:12.846525 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1742 11:47:12.849657 failed to find key in VPD: dsm_calib_r0_0
1743 11:47:12.859934 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1744 11:47:12.862992 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1745 11:47:12.866629 failed to find key in VPD: dsm_calib_r0_1
1746 11:47:12.876519 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1747 11:47:12.882919 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1748 11:47:12.885985 failed to find key in VPD: dsm_calib_r0_2
1749 11:47:12.896381 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1750 11:47:12.899194 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1751 11:47:12.905969 failed to find key in VPD: dsm_calib_r0_3
1752 11:47:12.912909 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1753 11:47:12.919254 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1754 11:47:12.922889 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1755 11:47:12.925946 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1756 11:47:12.929784 EC returned error result code 1
1757 11:47:12.934054 EC returned error result code 1
1758 11:47:12.937857 EC returned error result code 1
1759 11:47:12.944184 PS2K: Bad resp from EC. Vivaldi disabled!
1760 11:47:12.947197 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1761 11:47:12.954065 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1762 11:47:12.960984 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1763 11:47:12.964119 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1764 11:47:12.970819 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1765 11:47:12.977258 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1766 11:47:12.983554 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1767 11:47:12.987381 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1768 11:47:12.990601 ACPI: added table 2/32, length now 44
1769 11:47:12.993625 ACPI: * MCFG
1770 11:47:12.997312 ACPI: added table 3/32, length now 48
1771 11:47:13.000405 ACPI: * TPM2
1772 11:47:13.003617 TPM2 log created at 99a2d000
1773 11:47:13.007047 ACPI: added table 4/32, length now 52
1774 11:47:13.007140 ACPI: * MADT
1775 11:47:13.010145 SCI is IRQ9
1776 11:47:13.013736 ACPI: added table 5/32, length now 56
1777 11:47:13.013828 current = 99b43ac0
1778 11:47:13.017438 ACPI: * DMAR
1779 11:47:13.020298 ACPI: added table 6/32, length now 60
1780 11:47:13.023653 ACPI: * IGD OpRegion
1781 11:47:13.023745 GMA: Found VBT in CBFS
1782 11:47:13.027031 GMA: Found valid VBT in CBFS
1783 11:47:13.029953 ACPI: added table 7/32, length now 64
1784 11:47:13.033487 ACPI: * HPET
1785 11:47:13.036556 ACPI: added table 8/32, length now 68
1786 11:47:13.036649 ACPI: done.
1787 11:47:13.040105 ACPI tables: 31744 bytes.
1788 11:47:13.043870 smbios_write_tables: 99a2c000
1789 11:47:13.047344 EC returned error result code 3
1790 11:47:13.050824 Couldn't obtain OEM name from CBI
1791 11:47:13.053898 Create SMBIOS type 17
1792 11:47:13.057020 PCI: 00:00.0 (Intel Cannonlake)
1793 11:47:13.060607 PCI: 00:14.3 (Intel WiFi)
1794 11:47:13.063862 SMBIOS tables: 939 bytes.
1795 11:47:13.067091 Writing table forward entry at 0x00000500
1796 11:47:13.074036 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1797 11:47:13.077186 Writing coreboot table at 0x99b62000
1798 11:47:13.083853 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1799 11:47:13.086901 1. 0000000000001000-000000000009ffff: RAM
1800 11:47:13.090149 2. 00000000000a0000-00000000000fffff: RESERVED
1801 11:47:13.096878 3. 0000000000100000-0000000099a2bfff: RAM
1802 11:47:13.099933 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1803 11:47:13.106507 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1804 11:47:13.113422 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1805 11:47:13.116523 7. 000000009a000000-000000009f7fffff: RESERVED
1806 11:47:13.119679 8. 00000000e0000000-00000000efffffff: RESERVED
1807 11:47:13.126345 9. 00000000fc000000-00000000fc000fff: RESERVED
1808 11:47:13.129865 10. 00000000fe000000-00000000fe00ffff: RESERVED
1809 11:47:13.136637 11. 00000000fed10000-00000000fed17fff: RESERVED
1810 11:47:13.139879 12. 00000000fed80000-00000000fed83fff: RESERVED
1811 11:47:13.146276 13. 00000000fed90000-00000000fed91fff: RESERVED
1812 11:47:13.150152 14. 00000000feda0000-00000000feda1fff: RESERVED
1813 11:47:13.153166 15. 0000000100000000-000000045e7fffff: RAM
1814 11:47:13.159757 Graphics framebuffer located at 0xc0000000
1815 11:47:13.162790 Passing 5 GPIOs to payload:
1816 11:47:13.166522 NAME | PORT | POLARITY | VALUE
1817 11:47:13.173254 write protect | undefined | high | low
1818 11:47:13.176460 lid | undefined | high | high
1819 11:47:13.182636 power | undefined | high | low
1820 11:47:13.189753 oprom | undefined | high | low
1821 11:47:13.193149 EC in RW | 0x000000cb | high | low
1822 11:47:13.193244 Board ID: 4
1823 11:47:13.199747 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1824 11:47:13.202547 CBFS @ c08000 size 3f8000
1825 11:47:13.209452 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1826 11:47:13.212815 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1827 11:47:13.216011 coreboot table: 1492 bytes.
1828 11:47:13.219300 IMD ROOT 0. 99fff000 00001000
1829 11:47:13.222617 IMD SMALL 1. 99ffe000 00001000
1830 11:47:13.225907 FSP MEMORY 2. 99c4e000 003b0000
1831 11:47:13.229618 CONSOLE 3. 99c2e000 00020000
1832 11:47:13.232604 FMAP 4. 99c2d000 0000054e
1833 11:47:13.236263 TIME STAMP 5. 99c2c000 00000910
1834 11:47:13.239397 VBOOT WORK 6. 99c18000 00014000
1835 11:47:13.242405 MRC DATA 7. 99c16000 00001958
1836 11:47:13.245983 ROMSTG STCK 8. 99c15000 00001000
1837 11:47:13.249074 AFTER CAR 9. 99c0b000 0000a000
1838 11:47:13.252451 RAMSTAGE 10. 99baf000 0005c000
1839 11:47:13.256039 REFCODE 11. 99b7a000 00035000
1840 11:47:13.259557 SMM BACKUP 12. 99b6a000 00010000
1841 11:47:13.262371 COREBOOT 13. 99b62000 00008000
1842 11:47:13.265902 ACPI 14. 99b3e000 00024000
1843 11:47:13.269329 ACPI GNVS 15. 99b3d000 00001000
1844 11:47:13.272345 RAMOOPS 16. 99a3d000 00100000
1845 11:47:13.275828 TPM2 TCGLOG17. 99a2d000 00010000
1846 11:47:13.279264 SMBIOS 18. 99a2c000 00000800
1847 11:47:13.282753 IMD small region:
1848 11:47:13.285679 IMD ROOT 0. 99ffec00 00000400
1849 11:47:13.289223 FSP RUNTIME 1. 99ffebe0 00000004
1850 11:47:13.292631 EC HOSTEVENT 2. 99ffebc0 00000008
1851 11:47:13.295751 POWER STATE 3. 99ffeb80 00000040
1852 11:47:13.299067 ROMSTAGE 4. 99ffeb60 00000004
1853 11:47:13.302816 MEM INFO 5. 99ffe9a0 000001b9
1854 11:47:13.306108 VPD 6. 99ffe920 0000006c
1855 11:47:13.309257 MTRR: Physical address space:
1856 11:47:13.315558 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1857 11:47:13.322206 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1858 11:47:13.329294 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1859 11:47:13.335915 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1860 11:47:13.342238 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1861 11:47:13.345707 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1862 11:47:13.352228 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1863 11:47:13.358532 MTRR: Fixed MSR 0x250 0x0606060606060606
1864 11:47:13.362058 MTRR: Fixed MSR 0x258 0x0606060606060606
1865 11:47:13.366034 MTRR: Fixed MSR 0x259 0x0000000000000000
1866 11:47:13.368621 MTRR: Fixed MSR 0x268 0x0606060606060606
1867 11:47:13.375589 MTRR: Fixed MSR 0x269 0x0606060606060606
1868 11:47:13.378633 MTRR: Fixed MSR 0x26a 0x0606060606060606
1869 11:47:13.381790 MTRR: Fixed MSR 0x26b 0x0606060606060606
1870 11:47:13.385416 MTRR: Fixed MSR 0x26c 0x0606060606060606
1871 11:47:13.388494 MTRR: Fixed MSR 0x26d 0x0606060606060606
1872 11:47:13.395147 MTRR: Fixed MSR 0x26e 0x0606060606060606
1873 11:47:13.398677 MTRR: Fixed MSR 0x26f 0x0606060606060606
1874 11:47:13.402025 call enable_fixed_mtrr()
1875 11:47:13.405285 CPU physical address size: 39 bits
1876 11:47:13.408520 MTRR: default type WB/UC MTRR counts: 6/8.
1877 11:47:13.411558 MTRR: WB selected as default type.
1878 11:47:13.418633 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1879 11:47:13.425067 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1880 11:47:13.431349 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1881 11:47:13.438442 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1882 11:47:13.444776 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1883 11:47:13.451602 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1884 11:47:13.454998 MTRR: Fixed MSR 0x250 0x0606060606060606
1885 11:47:13.457701 MTRR: Fixed MSR 0x258 0x0606060606060606
1886 11:47:13.464421 MTRR: Fixed MSR 0x259 0x0000000000000000
1887 11:47:13.468090 MTRR: Fixed MSR 0x268 0x0606060606060606
1888 11:47:13.471505 MTRR: Fixed MSR 0x269 0x0606060606060606
1889 11:47:13.474742 MTRR: Fixed MSR 0x26a 0x0606060606060606
1890 11:47:13.481168 MTRR: Fixed MSR 0x26b 0x0606060606060606
1891 11:47:13.484748 MTRR: Fixed MSR 0x26c 0x0606060606060606
1892 11:47:13.487531 MTRR: Fixed MSR 0x26d 0x0606060606060606
1893 11:47:13.491169 MTRR: Fixed MSR 0x26e 0x0606060606060606
1894 11:47:13.497635 MTRR: Fixed MSR 0x26f 0x0606060606060606
1895 11:47:13.497729
1896 11:47:13.497804 MTRR check
1897 11:47:13.501203 Fixed MTRRs : Enabled
1898 11:47:13.504125 Variable MTRRs: Enabled
1899 11:47:13.504255
1900 11:47:13.504334 call enable_fixed_mtrr()
1901 11:47:13.511117 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1902 11:47:13.514356 CPU physical address size: 39 bits
1903 11:47:13.520923 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1904 11:47:13.521018 CBFS @ c08000 size 3f8000
1905 11:47:13.527329 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1906 11:47:13.531149 MTRR: Fixed MSR 0x250 0x0606060606060606
1907 11:47:13.537591 MTRR: Fixed MSR 0x250 0x0606060606060606
1908 11:47:13.540812 MTRR: Fixed MSR 0x258 0x0606060606060606
1909 11:47:13.544119 MTRR: Fixed MSR 0x259 0x0000000000000000
1910 11:47:13.547854 MTRR: Fixed MSR 0x268 0x0606060606060606
1911 11:47:13.554329 MTRR: Fixed MSR 0x269 0x0606060606060606
1912 11:47:13.557255 MTRR: Fixed MSR 0x26a 0x0606060606060606
1913 11:47:13.560568 MTRR: Fixed MSR 0x26b 0x0606060606060606
1914 11:47:13.564464 MTRR: Fixed MSR 0x26c 0x0606060606060606
1915 11:47:13.570840 MTRR: Fixed MSR 0x26d 0x0606060606060606
1916 11:47:13.573961 MTRR: Fixed MSR 0x26e 0x0606060606060606
1917 11:47:13.577111 MTRR: Fixed MSR 0x26f 0x0606060606060606
1918 11:47:13.580788 MTRR: Fixed MSR 0x258 0x0606060606060606
1919 11:47:13.583585 call enable_fixed_mtrr()
1920 11:47:13.587037 MTRR: Fixed MSR 0x259 0x0000000000000000
1921 11:47:13.593489 MTRR: Fixed MSR 0x268 0x0606060606060606
1922 11:47:13.597053 MTRR: Fixed MSR 0x269 0x0606060606060606
1923 11:47:13.600397 MTRR: Fixed MSR 0x26a 0x0606060606060606
1924 11:47:13.603681 MTRR: Fixed MSR 0x26b 0x0606060606060606
1925 11:47:13.610419 MTRR: Fixed MSR 0x26c 0x0606060606060606
1926 11:47:13.613640 MTRR: Fixed MSR 0x26d 0x0606060606060606
1927 11:47:13.617042 MTRR: Fixed MSR 0x26e 0x0606060606060606
1928 11:47:13.620124 MTRR: Fixed MSR 0x26f 0x0606060606060606
1929 11:47:13.623613 CPU physical address size: 39 bits
1930 11:47:13.626757 call enable_fixed_mtrr()
1931 11:47:13.630183 MTRR: Fixed MSR 0x250 0x0606060606060606
1932 11:47:13.636968 MTRR: Fixed MSR 0x250 0x0606060606060606
1933 11:47:13.640185 MTRR: Fixed MSR 0x258 0x0606060606060606
1934 11:47:13.643386 MTRR: Fixed MSR 0x259 0x0000000000000000
1935 11:47:13.646634 MTRR: Fixed MSR 0x268 0x0606060606060606
1936 11:47:13.653828 MTRR: Fixed MSR 0x269 0x0606060606060606
1937 11:47:13.656708 MTRR: Fixed MSR 0x26a 0x0606060606060606
1938 11:47:13.660681 MTRR: Fixed MSR 0x26b 0x0606060606060606
1939 11:47:13.663785 MTRR: Fixed MSR 0x26c 0x0606060606060606
1940 11:47:13.670197 MTRR: Fixed MSR 0x26d 0x0606060606060606
1941 11:47:13.673376 MTRR: Fixed MSR 0x26e 0x0606060606060606
1942 11:47:13.676934 MTRR: Fixed MSR 0x26f 0x0606060606060606
1943 11:47:13.680150 MTRR: Fixed MSR 0x258 0x0606060606060606
1944 11:47:13.683530 call enable_fixed_mtrr()
1945 11:47:13.686493 MTRR: Fixed MSR 0x259 0x0000000000000000
1946 11:47:13.693321 MTRR: Fixed MSR 0x268 0x0606060606060606
1947 11:47:13.696391 MTRR: Fixed MSR 0x269 0x0606060606060606
1948 11:47:13.699888 MTRR: Fixed MSR 0x26a 0x0606060606060606
1949 11:47:13.703436 MTRR: Fixed MSR 0x26b 0x0606060606060606
1950 11:47:13.710168 MTRR: Fixed MSR 0x26c 0x0606060606060606
1951 11:47:13.713257 MTRR: Fixed MSR 0x26d 0x0606060606060606
1952 11:47:13.716701 MTRR: Fixed MSR 0x26e 0x0606060606060606
1953 11:47:13.720103 MTRR: Fixed MSR 0x26f 0x0606060606060606
1954 11:47:13.723372 CPU physical address size: 39 bits
1955 11:47:13.726543 call enable_fixed_mtrr()
1956 11:47:13.729497 CPU physical address size: 39 bits
1957 11:47:13.736398 MTRR: Fixed MSR 0x250 0x0606060606060606
1958 11:47:13.740257 MTRR: Fixed MSR 0x258 0x0606060606060606
1959 11:47:13.742694 MTRR: Fixed MSR 0x259 0x0000000000000000
1960 11:47:13.746475 MTRR: Fixed MSR 0x268 0x0606060606060606
1961 11:47:13.749258 MTRR: Fixed MSR 0x269 0x0606060606060606
1962 11:47:13.756185 MTRR: Fixed MSR 0x26a 0x0606060606060606
1963 11:47:13.759572 MTRR: Fixed MSR 0x26b 0x0606060606060606
1964 11:47:13.762625 MTRR: Fixed MSR 0x26c 0x0606060606060606
1965 11:47:13.766460 MTRR: Fixed MSR 0x26d 0x0606060606060606
1966 11:47:13.772970 MTRR: Fixed MSR 0x26e 0x0606060606060606
1967 11:47:13.776141 MTRR: Fixed MSR 0x26f 0x0606060606060606
1968 11:47:13.779539 MTRR: Fixed MSR 0x250 0x0606060606060606
1969 11:47:13.785977 MTRR: Fixed MSR 0x258 0x0606060606060606
1970 11:47:13.789146 MTRR: Fixed MSR 0x259 0x0000000000000000
1971 11:47:13.792803 MTRR: Fixed MSR 0x268 0x0606060606060606
1972 11:47:13.795766 MTRR: Fixed MSR 0x269 0x0606060606060606
1973 11:47:13.799052 MTRR: Fixed MSR 0x26a 0x0606060606060606
1974 11:47:13.805828 MTRR: Fixed MSR 0x26b 0x0606060606060606
1975 11:47:13.808743 MTRR: Fixed MSR 0x26c 0x0606060606060606
1976 11:47:13.812363 MTRR: Fixed MSR 0x26d 0x0606060606060606
1977 11:47:13.815632 MTRR: Fixed MSR 0x26e 0x0606060606060606
1978 11:47:13.822628 MTRR: Fixed MSR 0x26f 0x0606060606060606
1979 11:47:13.822721 call enable_fixed_mtrr()
1980 11:47:13.825450 call enable_fixed_mtrr()
1981 11:47:13.828918 CPU physical address size: 39 bits
1982 11:47:13.832609 CPU physical address size: 39 bits
1983 11:47:13.835495 CPU physical address size: 39 bits
1984 11:47:13.839164 CBFS: Locating 'fallback/payload'
1985 11:47:13.846264 CBFS: Found @ offset 1c96c0 size 3f798
1986 11:47:13.850247 Checking segment from ROM address 0xffdd16f8
1987 11:47:13.853139 Checking segment from ROM address 0xffdd1714
1988 11:47:13.860044 Loading segment from ROM address 0xffdd16f8
1989 11:47:13.860137 code (compression=0)
1990 11:47:13.869762 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1991 11:47:13.880022 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1992 11:47:13.880153 it's not compressed!
1993 11:47:13.972579 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1994 11:47:13.979020 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1995 11:47:13.982879 Loading segment from ROM address 0xffdd1714
1996 11:47:13.985983 Entry Point 0x30000000
1997 11:47:13.989212 Loaded segments
1998 11:47:13.994719 Finalizing chipset.
1999 11:47:13.998438 Finalizing SMM.
2000 11:47:14.001297 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
2001 11:47:14.004644 mp_park_aps done after 0 msecs.
2002 11:47:14.011637 Jumping to boot code at 30000000(99b62000)
2003 11:47:14.017913 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2004 11:47:14.018007
2005 11:47:14.018111
2006 11:47:14.018185
2007 11:47:14.021435 Starting depthcharge on Helios...
2008 11:47:14.021527
2009 11:47:14.021924 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2010 11:47:14.022057 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2011 11:47:14.022150 Setting prompt string to ['hatch:']
2012 11:47:14.022248 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2013 11:47:14.031589 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2014 11:47:14.031683
2015 11:47:14.037921 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2016 11:47:14.038013
2017 11:47:14.044750 board_setup: Info: eMMC controller not present; skipping
2018 11:47:14.044842
2019 11:47:14.047666 New NVMe Controller 0x30053ac0 @ 00:1d:00
2020 11:47:14.047760
2021 11:47:14.054971 board_setup: Info: SDHCI controller not present; skipping
2022 11:47:14.055063
2023 11:47:14.057527 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2024 11:47:14.060989
2025 11:47:14.061082 Wipe memory regions:
2026 11:47:14.061155
2027 11:47:14.064659 [0x00000000001000, 0x000000000a0000)
2028 11:47:14.064751
2029 11:47:14.067773 [0x00000000100000, 0x00000030000000)
2030 11:47:14.133853
2031 11:47:14.137443 [0x00000030657430, 0x00000099a2c000)
2032 11:47:14.283655
2033 11:47:14.286980 [0x00000100000000, 0x0000045e800000)
2034 11:47:15.743221
2035 11:47:15.743383 R8152: Initializing
2036 11:47:15.743459
2037 11:47:15.746307 Version 9 (ocp_data = 6010)
2038 11:47:15.750074
2039 11:47:15.750166 R8152: Done initializing
2040 11:47:15.750241
2041 11:47:15.753385 Adding net device
2042 11:47:16.236841
2043 11:47:16.237379 R8152: Initializing
2044 11:47:16.237736
2045 11:47:16.240356 Version 6 (ocp_data = 5c30)
2046 11:47:16.240782
2047 11:47:16.243480 R8152: Done initializing
2048 11:47:16.243907
2049 11:47:16.246653 net_add_device: Attemp to include the same device
2050 11:47:16.250428
2051 11:47:16.257424 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2052 11:47:16.257855
2053 11:47:16.258234
2054 11:47:16.258627
2055 11:47:16.259405 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2057 11:47:16.360721 hatch: tftpboot 192.168.201.1 13268519/tftp-deploy-d8szdygn/kernel/bzImage 13268519/tftp-deploy-d8szdygn/kernel/cmdline 13268519/tftp-deploy-d8szdygn/ramdisk/ramdisk.cpio.gz
2058 11:47:16.361319 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2059 11:47:16.361884 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2060 11:47:16.366800 tftpboot 192.168.201.1 13268519/tftp-deploy-d8szdygn/kernel/bzIploy-d8szdygn/kernel/cmdline 13268519/tftp-deploy-d8szdygn/ramdisk/ramdisk.cpio.gz
2061 11:47:16.367261
2062 11:47:16.367731 Waiting for link
2063 11:47:16.567692
2064 11:47:16.568296 done.
2065 11:47:16.568935
2066 11:47:16.569290 MAC: 00:24:32:50:1a:59
2067 11:47:16.569604
2068 11:47:16.570324 Sending DHCP discover... done.
2069 11:47:16.570670
2070 11:47:16.574231 Waiting for reply... done.
2071 11:47:16.574867
2072 11:47:16.577535 Sending DHCP request... done.
2073 11:47:16.577951
2074 11:47:16.589024 Waiting for reply... done.
2075 11:47:16.589497
2076 11:47:16.589907 My ip is 192.168.201.14
2077 11:47:16.590285
2078 11:47:16.592105 The DHCP server ip is 192.168.201.1
2079 11:47:16.595196
2080 11:47:16.598279 TFTP server IP predefined by user: 192.168.201.1
2081 11:47:16.598796
2082 11:47:16.604996 Bootfile predefined by user: 13268519/tftp-deploy-d8szdygn/kernel/bzImage
2083 11:47:16.605415
2084 11:47:16.608562 Sending tftp read request... done.
2085 11:47:16.608981
2086 11:47:16.617627 Waiting for the transfer...
2087 11:47:16.618045
2088 11:47:17.176210 00000000 ################################################################
2089 11:47:17.176367
2090 11:47:17.702664 00080000 ################################################################
2091 11:47:17.702818
2092 11:47:18.242630 00100000 ################################################################
2093 11:47:18.242791
2094 11:47:18.792181 00180000 ################################################################
2095 11:47:18.792354
2096 11:47:19.329958 00200000 ################################################################
2097 11:47:19.330148
2098 11:47:19.872192 00280000 ################################################################
2099 11:47:19.872370
2100 11:47:20.417270 00300000 ################################################################
2101 11:47:20.417444
2102 11:47:20.958405 00380000 ################################################################
2103 11:47:20.958569
2104 11:47:21.486007 00400000 ################################################################
2105 11:47:21.486166
2106 11:47:22.108895 00480000 ################################################################
2107 11:47:22.109508
2108 11:47:22.683672 00500000 ################################################################
2109 11:47:22.683831
2110 11:47:23.243380 00580000 ################################################################
2111 11:47:23.243539
2112 11:47:23.803691 00600000 ################################################################
2113 11:47:23.803841
2114 11:47:24.364018 00680000 ################################################################
2115 11:47:24.364172
2116 11:47:24.915347 00700000 ################################################################
2117 11:47:24.915506
2118 11:47:25.502509 00780000 ################################################################
2119 11:47:25.502661
2120 11:47:26.100425 00800000 ################################################################
2121 11:47:26.100581
2122 11:47:26.676854 00880000 ################################################################
2123 11:47:26.677019
2124 11:47:27.265382 00900000 ################################################################
2125 11:47:27.265538
2126 11:47:27.864464 00980000 ################################################################
2127 11:47:27.864614
2128 11:47:28.465621 00a00000 ################################################################
2129 11:47:28.465775
2130 11:47:29.063165 00a80000 ################################################################
2131 11:47:29.063318
2132 11:47:29.655837 00b00000 ################################################################
2133 11:47:29.655994
2134 11:47:30.252961 00b80000 ################################################################
2135 11:47:30.253113
2136 11:47:30.849280 00c00000 ################################################################
2137 11:47:30.849431
2138 11:47:31.414327 00c80000 ################################################################
2139 11:47:31.414474
2140 11:47:31.862614 00d00000 ####################################################### done.
2141 11:47:31.862791
2142 11:47:31.865643 The bootfile was 14077840 bytes long.
2143 11:47:31.865767
2144 11:47:31.869538 Sending tftp read request... done.
2145 11:47:31.869629
2146 11:47:31.872487 Waiting for the transfer...
2147 11:47:31.872574
2148 11:47:32.433001 00000000 ################################################################
2149 11:47:32.433146
2150 11:47:32.968090 00080000 ################################################################
2151 11:47:32.968280
2152 11:47:33.516802 00100000 ################################################################
2153 11:47:33.516951
2154 11:47:34.067504 00180000 ################################################################
2155 11:47:34.067661
2156 11:47:34.616589 00200000 ################################################################
2157 11:47:34.616770
2158 11:47:35.150549 00280000 ################################################################
2159 11:47:35.150702
2160 11:47:35.678748 00300000 ################################################################
2161 11:47:35.678893
2162 11:47:36.202348 00380000 ################################################################
2163 11:47:36.202492
2164 11:47:36.747550 00400000 ################################################################
2165 11:47:36.747690
2166 11:47:37.279164 00480000 ################################################################
2167 11:47:37.279312
2168 11:47:37.815441 00500000 ################################################################
2169 11:47:37.815623
2170 11:47:38.372373 00580000 ################################################################
2171 11:47:38.372522
2172 11:47:38.967846 00600000 ################################################################
2173 11:47:38.967991
2174 11:47:39.290687 00680000 ################################## done.
2175 11:47:39.290851
2176 11:47:39.293488 Sending tftp read request... done.
2177 11:47:39.293582
2178 11:47:39.297145 Waiting for the transfer...
2179 11:47:39.297246
2180 11:47:39.297321 00000000 # done.
2181 11:47:39.297392
2182 11:47:39.306715 Command line loaded dynamically from TFTP file: 13268519/tftp-deploy-d8szdygn/kernel/cmdline
2183 11:47:39.306809
2184 11:47:39.336965 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/13268519/extract-nfsrootfs-ws6sm7d2,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2185 11:47:39.337064
2186 11:47:39.340049 ec_init(0): CrosEC protocol v3 supported (256, 256)
2187 11:47:39.347121
2188 11:47:39.350330 Shutting down all USB controllers.
2189 11:47:39.350423
2190 11:47:39.350497 Removing current net device
2191 11:47:39.354160
2192 11:47:39.354252 Finalizing coreboot
2193 11:47:39.354326
2194 11:47:39.361218 Exiting depthcharge with code 4 at timestamp: 32710022
2195 11:47:39.361311
2196 11:47:39.361384
2197 11:47:39.361453 Starting kernel ...
2198 11:47:39.361519
2199 11:47:39.361583
2200 11:47:39.361994 end: 2.2.4 bootloader-commands (duration 00:00:25) [common]
2201 11:47:39.362102 start: 2.2.5 auto-login-action (timeout 00:04:17) [common]
2202 11:47:39.362190 Setting prompt string to ['Linux version [0-9]']
2203 11:47:39.362266 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2204 11:47:39.362344 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2206 11:51:56.364043 end: 2.2.5 auto-login-action (duration 00:04:17) [common]
2208 11:51:56.365211 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 257 seconds'
2210 11:51:56.366078 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2213 11:51:56.367807 end: 2 depthcharge-action (duration 00:05:00) [common]
2215 11:51:56.369053 Cleaning after the job
2216 11:51:56.369551 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13268519/tftp-deploy-d8szdygn/ramdisk
2217 11:51:56.374723 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13268519/tftp-deploy-d8szdygn/kernel
2218 11:51:56.384205 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13268519/tftp-deploy-d8szdygn/nfsrootfs
2219 11:51:56.522792 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13268519/tftp-deploy-d8szdygn/modules
2220 11:51:56.523467 start: 4.1 power-off (timeout 00:00:30) [common]
2221 11:51:56.523657 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2222 11:51:56.606836 >> Command sent successfully.
2223 11:51:56.616639 Returned 0 in 0 seconds
2224 11:51:56.718032 end: 4.1 power-off (duration 00:00:00) [common]
2226 11:51:56.719584 start: 4.2 read-feedback (timeout 00:10:00) [common]
2227 11:51:56.720955 Listened to connection for namespace 'common' for up to 1s
2229 11:51:56.722327 Listened to connection for namespace 'common' for up to 1s
2230 11:51:57.720598 Finalising connection for namespace 'common'
2231 11:51:57.721297 Disconnecting from shell: Finalise
2232 11:51:57.721693
2233 11:51:57.822769 end: 4.2 read-feedback (duration 00:00:01) [common]
2234 11:51:57.823392 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13268519
2235 11:51:58.381305 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13268519
2236 11:51:58.381522 JobError: Your job cannot terminate cleanly.