Boot log: acer-cp514-2h-1130g7-volteer
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 12:57:53.813728 lava-dispatcher, installed at version: 2024.01
2 12:57:53.813930 start: 0 validate
3 12:57:53.814062 Start time: 2024-05-02 12:57:53.814054+00:00 (UTC)
4 12:57:53.814193 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:57:53.814327 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Fx86%2Frootfs.cpio.gz exists
6 12:57:54.065067 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:57:54.065240 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2480-g949429724783%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:58:02.570361 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:58:02.571086 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2480-g949429724783%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 12:58:03.577518 validate duration: 9.76
12 12:58:03.577823 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:58:03.577952 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:58:03.578074 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:58:03.578239 Not decompressing ramdisk as can be used compressed.
16 12:58:03.578335 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/x86/rootfs.cpio.gz
17 12:58:03.578426 saving as /var/lib/lava/dispatcher/tmp/13607181/tftp-deploy-r_v0xlev/ramdisk/rootfs.cpio.gz
18 12:58:03.578487 total size: 8417901 (8 MB)
19 12:58:03.579541 progress 0 % (0 MB)
20 12:58:03.581744 progress 5 % (0 MB)
21 12:58:03.583967 progress 10 % (0 MB)
22 12:58:03.586293 progress 15 % (1 MB)
23 12:58:03.588619 progress 20 % (1 MB)
24 12:58:03.590955 progress 25 % (2 MB)
25 12:58:03.593229 progress 30 % (2 MB)
26 12:58:03.595363 progress 35 % (2 MB)
27 12:58:03.597697 progress 40 % (3 MB)
28 12:58:03.599896 progress 45 % (3 MB)
29 12:58:03.602296 progress 50 % (4 MB)
30 12:58:03.604558 progress 55 % (4 MB)
31 12:58:03.606721 progress 60 % (4 MB)
32 12:58:03.608747 progress 65 % (5 MB)
33 12:58:03.610910 progress 70 % (5 MB)
34 12:58:03.613082 progress 75 % (6 MB)
35 12:58:03.615245 progress 80 % (6 MB)
36 12:58:03.617419 progress 85 % (6 MB)
37 12:58:03.619555 progress 90 % (7 MB)
38 12:58:03.621784 progress 95 % (7 MB)
39 12:58:03.623791 progress 100 % (8 MB)
40 12:58:03.624021 8 MB downloaded in 0.05 s (176.31 MB/s)
41 12:58:03.624181 end: 1.1.1 http-download (duration 00:00:00) [common]
43 12:58:03.624457 end: 1.1 download-retry (duration 00:00:00) [common]
44 12:58:03.624543 start: 1.2 download-retry (timeout 00:10:00) [common]
45 12:58:03.624625 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 12:58:03.624759 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2480-g949429724783/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 12:58:03.624828 saving as /var/lib/lava/dispatcher/tmp/13607181/tftp-deploy-r_v0xlev/kernel/bzImage
48 12:58:03.624888 total size: 14090128 (13 MB)
49 12:58:03.624948 No compression specified
50 12:58:03.626067 progress 0 % (0 MB)
51 12:58:03.629913 progress 5 % (0 MB)
52 12:58:03.633648 progress 10 % (1 MB)
53 12:58:03.637341 progress 15 % (2 MB)
54 12:58:03.640989 progress 20 % (2 MB)
55 12:58:03.644800 progress 25 % (3 MB)
56 12:58:03.648517 progress 30 % (4 MB)
57 12:58:03.652340 progress 35 % (4 MB)
58 12:58:03.656053 progress 40 % (5 MB)
59 12:58:03.659850 progress 45 % (6 MB)
60 12:58:03.663462 progress 50 % (6 MB)
61 12:58:03.667459 progress 55 % (7 MB)
62 12:58:03.671247 progress 60 % (8 MB)
63 12:58:03.675123 progress 65 % (8 MB)
64 12:58:03.679173 progress 70 % (9 MB)
65 12:58:03.682992 progress 75 % (10 MB)
66 12:58:03.686525 progress 80 % (10 MB)
67 12:58:03.690281 progress 85 % (11 MB)
68 12:58:03.693938 progress 90 % (12 MB)
69 12:58:03.697630 progress 95 % (12 MB)
70 12:58:03.701252 progress 100 % (13 MB)
71 12:58:03.701503 13 MB downloaded in 0.08 s (175.40 MB/s)
72 12:58:03.701649 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:58:03.701908 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:58:03.701995 start: 1.3 download-retry (timeout 00:10:00) [common]
76 12:58:03.702081 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 12:58:03.702218 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2480-g949429724783/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 12:58:03.702333 saving as /var/lib/lava/dispatcher/tmp/13607181/tftp-deploy-r_v0xlev/modules/modules.tar
79 12:58:03.702395 total size: 483880 (0 MB)
80 12:58:03.702456 Using unxz to decompress xz
81 12:58:03.706714 progress 6 % (0 MB)
82 12:58:03.707162 progress 13 % (0 MB)
83 12:58:03.707409 progress 20 % (0 MB)
84 12:58:03.709042 progress 27 % (0 MB)
85 12:58:03.710903 progress 33 % (0 MB)
86 12:58:03.712857 progress 40 % (0 MB)
87 12:58:03.714793 progress 47 % (0 MB)
88 12:58:03.716472 progress 54 % (0 MB)
89 12:58:03.718211 progress 60 % (0 MB)
90 12:58:03.720136 progress 67 % (0 MB)
91 12:58:03.721802 progress 74 % (0 MB)
92 12:58:03.723707 progress 81 % (0 MB)
93 12:58:03.725498 progress 88 % (0 MB)
94 12:58:03.727401 progress 94 % (0 MB)
95 12:58:03.729154 progress 100 % (0 MB)
96 12:58:03.734874 0 MB downloaded in 0.03 s (14.21 MB/s)
97 12:58:03.735172 end: 1.3.1 http-download (duration 00:00:00) [common]
99 12:58:03.735577 end: 1.3 download-retry (duration 00:00:00) [common]
100 12:58:03.735701 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
101 12:58:03.735827 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
102 12:58:03.735940 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 12:58:03.736058 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
104 12:58:03.736307 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13607181/lava-overlay-m__6gdzl
105 12:58:03.736486 makedir: /var/lib/lava/dispatcher/tmp/13607181/lava-overlay-m__6gdzl/lava-13607181/bin
106 12:58:03.736628 makedir: /var/lib/lava/dispatcher/tmp/13607181/lava-overlay-m__6gdzl/lava-13607181/tests
107 12:58:03.736761 makedir: /var/lib/lava/dispatcher/tmp/13607181/lava-overlay-m__6gdzl/lava-13607181/results
108 12:58:03.736910 Creating /var/lib/lava/dispatcher/tmp/13607181/lava-overlay-m__6gdzl/lava-13607181/bin/lava-add-keys
109 12:58:03.737091 Creating /var/lib/lava/dispatcher/tmp/13607181/lava-overlay-m__6gdzl/lava-13607181/bin/lava-add-sources
110 12:58:03.737260 Creating /var/lib/lava/dispatcher/tmp/13607181/lava-overlay-m__6gdzl/lava-13607181/bin/lava-background-process-start
111 12:58:03.737425 Creating /var/lib/lava/dispatcher/tmp/13607181/lava-overlay-m__6gdzl/lava-13607181/bin/lava-background-process-stop
112 12:58:03.737587 Creating /var/lib/lava/dispatcher/tmp/13607181/lava-overlay-m__6gdzl/lava-13607181/bin/lava-common-functions
113 12:58:03.737747 Creating /var/lib/lava/dispatcher/tmp/13607181/lava-overlay-m__6gdzl/lava-13607181/bin/lava-echo-ipv4
114 12:58:03.737909 Creating /var/lib/lava/dispatcher/tmp/13607181/lava-overlay-m__6gdzl/lava-13607181/bin/lava-install-packages
115 12:58:03.738067 Creating /var/lib/lava/dispatcher/tmp/13607181/lava-overlay-m__6gdzl/lava-13607181/bin/lava-installed-packages
116 12:58:03.738226 Creating /var/lib/lava/dispatcher/tmp/13607181/lava-overlay-m__6gdzl/lava-13607181/bin/lava-os-build
117 12:58:03.738385 Creating /var/lib/lava/dispatcher/tmp/13607181/lava-overlay-m__6gdzl/lava-13607181/bin/lava-probe-channel
118 12:58:03.738543 Creating /var/lib/lava/dispatcher/tmp/13607181/lava-overlay-m__6gdzl/lava-13607181/bin/lava-probe-ip
119 12:58:03.738702 Creating /var/lib/lava/dispatcher/tmp/13607181/lava-overlay-m__6gdzl/lava-13607181/bin/lava-target-ip
120 12:58:03.738863 Creating /var/lib/lava/dispatcher/tmp/13607181/lava-overlay-m__6gdzl/lava-13607181/bin/lava-target-mac
121 12:58:03.739020 Creating /var/lib/lava/dispatcher/tmp/13607181/lava-overlay-m__6gdzl/lava-13607181/bin/lava-target-storage
122 12:58:03.739184 Creating /var/lib/lava/dispatcher/tmp/13607181/lava-overlay-m__6gdzl/lava-13607181/bin/lava-test-case
123 12:58:03.739343 Creating /var/lib/lava/dispatcher/tmp/13607181/lava-overlay-m__6gdzl/lava-13607181/bin/lava-test-event
124 12:58:03.739500 Creating /var/lib/lava/dispatcher/tmp/13607181/lava-overlay-m__6gdzl/lava-13607181/bin/lava-test-feedback
125 12:58:03.739657 Creating /var/lib/lava/dispatcher/tmp/13607181/lava-overlay-m__6gdzl/lava-13607181/bin/lava-test-raise
126 12:58:03.739818 Creating /var/lib/lava/dispatcher/tmp/13607181/lava-overlay-m__6gdzl/lava-13607181/bin/lava-test-reference
127 12:58:03.739980 Creating /var/lib/lava/dispatcher/tmp/13607181/lava-overlay-m__6gdzl/lava-13607181/bin/lava-test-runner
128 12:58:03.740141 Creating /var/lib/lava/dispatcher/tmp/13607181/lava-overlay-m__6gdzl/lava-13607181/bin/lava-test-set
129 12:58:03.740303 Creating /var/lib/lava/dispatcher/tmp/13607181/lava-overlay-m__6gdzl/lava-13607181/bin/lava-test-shell
130 12:58:03.740479 Updating /var/lib/lava/dispatcher/tmp/13607181/lava-overlay-m__6gdzl/lava-13607181/bin/lava-install-packages (oe)
131 12:58:03.740670 Updating /var/lib/lava/dispatcher/tmp/13607181/lava-overlay-m__6gdzl/lava-13607181/bin/lava-installed-packages (oe)
132 12:58:03.740825 Creating /var/lib/lava/dispatcher/tmp/13607181/lava-overlay-m__6gdzl/lava-13607181/environment
133 12:58:03.740959 LAVA metadata
134 12:58:03.741065 - LAVA_JOB_ID=13607181
135 12:58:03.741161 - LAVA_DISPATCHER_IP=192.168.201.1
136 12:58:03.741304 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
137 12:58:03.741404 skipped lava-vland-overlay
138 12:58:03.741512 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 12:58:03.741630 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
140 12:58:03.741721 skipped lava-multinode-overlay
141 12:58:03.741824 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 12:58:03.741941 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
143 12:58:03.742045 Loading test definitions
144 12:58:03.742175 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
145 12:58:03.742278 Using /lava-13607181 at stage 0
146 12:58:03.742717 uuid=13607181_1.4.2.3.1 testdef=None
147 12:58:03.742838 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 12:58:03.742955 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
149 12:58:03.743649 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 12:58:03.743909 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
152 12:58:03.744721 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 12:58:03.744955 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
155 12:58:03.745574 runner path: /var/lib/lava/dispatcher/tmp/13607181/lava-overlay-m__6gdzl/lava-13607181/0/tests/0_dmesg test_uuid 13607181_1.4.2.3.1
156 12:58:03.745735 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 12:58:03.745951 Creating lava-test-runner.conf files
159 12:58:03.746015 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13607181/lava-overlay-m__6gdzl/lava-13607181/0 for stage 0
160 12:58:03.746106 - 0_dmesg
161 12:58:03.746202 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
162 12:58:03.746291 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
163 12:58:03.753658 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
164 12:58:03.753811 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
165 12:58:03.753909 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
166 12:58:03.753998 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
167 12:58:03.754085 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
168 12:58:04.001757 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
169 12:58:04.002140 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
170 12:58:04.002253 extracting modules file /var/lib/lava/dispatcher/tmp/13607181/tftp-deploy-r_v0xlev/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13607181/extract-overlay-ramdisk-n9iaqy5y/ramdisk
171 12:58:04.017768 end: 1.4.4 extract-modules (duration 00:00:00) [common]
172 12:58:04.017933 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
173 12:58:04.018028 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13607181/compress-overlay-eqim_h8a/overlay-1.4.2.4.tar.gz to ramdisk
174 12:58:04.018098 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13607181/compress-overlay-eqim_h8a/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13607181/extract-overlay-ramdisk-n9iaqy5y/ramdisk
175 12:58:04.025043 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
176 12:58:04.025181 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
177 12:58:04.025275 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
178 12:58:04.025362 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
179 12:58:04.025447 Building ramdisk /var/lib/lava/dispatcher/tmp/13607181/extract-overlay-ramdisk-n9iaqy5y/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13607181/extract-overlay-ramdisk-n9iaqy5y/ramdisk
180 12:58:04.154699 >> 51652 blocks
181 12:58:05.034891 rename /var/lib/lava/dispatcher/tmp/13607181/extract-overlay-ramdisk-n9iaqy5y/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13607181/tftp-deploy-r_v0xlev/ramdisk/ramdisk.cpio.gz
182 12:58:05.035333 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
183 12:58:05.035462 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
184 12:58:05.035568 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
185 12:58:05.035663 No mkimage arch provided, not using FIT.
186 12:58:05.035754 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
187 12:58:05.035837 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
188 12:58:05.035941 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
189 12:58:05.036034 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
190 12:58:05.036117 No LXC device requested
191 12:58:05.036198 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
192 12:58:05.036288 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
193 12:58:05.036394 end: 1.6 deploy-device-env (duration 00:00:00) [common]
194 12:58:05.036487 Checking files for TFTP limit of 4294967296 bytes.
195 12:58:05.036894 end: 1 tftp-deploy (duration 00:00:01) [common]
196 12:58:05.036999 start: 2 depthcharge-action (timeout 00:05:00) [common]
197 12:58:05.037089 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
198 12:58:05.037213 substitutions:
199 12:58:05.037278 - {DTB}: None
200 12:58:05.037339 - {INITRD}: 13607181/tftp-deploy-r_v0xlev/ramdisk/ramdisk.cpio.gz
201 12:58:05.037399 - {KERNEL}: 13607181/tftp-deploy-r_v0xlev/kernel/bzImage
202 12:58:05.037456 - {LAVA_MAC}: None
203 12:58:05.037512 - {PRESEED_CONFIG}: None
204 12:58:05.037566 - {PRESEED_LOCAL}: None
205 12:58:05.037621 - {RAMDISK}: 13607181/tftp-deploy-r_v0xlev/ramdisk/ramdisk.cpio.gz
206 12:58:05.037675 - {ROOT_PART}: None
207 12:58:05.037729 - {ROOT}: None
208 12:58:05.037782 - {SERVER_IP}: 192.168.201.1
209 12:58:05.037836 - {TEE}: None
210 12:58:05.037888 Parsed boot commands:
211 12:58:05.037943 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
212 12:58:05.038120 Parsed boot commands: tftpboot 192.168.201.1 13607181/tftp-deploy-r_v0xlev/kernel/bzImage 13607181/tftp-deploy-r_v0xlev/kernel/cmdline 13607181/tftp-deploy-r_v0xlev/ramdisk/ramdisk.cpio.gz
213 12:58:05.038208 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
214 12:58:05.038291 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
215 12:58:05.038380 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
216 12:58:05.038463 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
217 12:58:05.038530 Not connected, no need to disconnect.
218 12:58:05.038603 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
219 12:58:05.038684 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
220 12:58:05.038758 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cp514-2h-1130g7-volteer-cbg-7'
221 12:58:05.042929 Setting prompt string to ['lava-test: # ']
222 12:58:05.043339 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
223 12:58:05.043448 end: 2.2.1 reset-connection (duration 00:00:00) [common]
224 12:58:05.043561 start: 2.2.2 reset-device (timeout 00:05:00) [common]
225 12:58:05.043817 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
226 12:58:05.043998 Calling: '/usr/local/bin/chromebook-reboot.sh' 'acer-cp514-2h-1130g7-volteer-cbg-7'
227 12:58:13.749458 Returned 0 in 8 seconds
228 12:58:13.850602 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
230 12:58:13.852068 end: 2.2.2 reset-device (duration 00:00:09) [common]
231 12:58:13.852628 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
232 12:58:13.853074 Setting prompt string to 'Starting depthcharge on Voema...'
233 12:58:13.853442 Changing prompt to 'Starting depthcharge on Voema...'
234 12:58:13.853797 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
235 12:58:13.855138 [Enter `^Ec?' for help]
236 12:58:13.855543
237 12:58:13.855874
238 12:58:13.856314 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
239 12:58:13.856707 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
240 12:58:13.857101 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
241 12:58:13.857442 CPU: AES supported, TXT NOT supported, VT supported
242 12:58:13.857749 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
243 12:58:13.858039 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
244 12:58:13.858322 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
245 12:58:13.858604 VBOOT: Loading verstage.
246 12:58:13.858883 FMAP: Found "FLASH" version 1.1 at 0x1804000.
247 12:58:13.859166 FMAP: base = 0x0 size = 0x2000000 #areas = 32
248 12:58:13.859449 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
249 12:58:13.859731 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
250 12:58:13.860014 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
251 12:58:13.860297
252 12:58:13.860750
253 12:58:13.861047 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
254 12:58:13.861335 Probing TPM: . done!
255 12:58:13.861613 TPM ready after 0 ms
256 12:58:13.861896 Connected to device vid:did:rid of 1ae0:0028:00
257 12:58:13.862177 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
258 12:58:13.862464 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
259 12:58:13.862744 Initialized TPM device CR50 revision 0
260 12:58:13.863024 tlcl_send_startup: Startup return code is 0
261 12:58:13.863304 TPM: setup succeeded
262 12:58:13.863583 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
263 12:58:13.863883 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
264 12:58:13.864233 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
265 12:58:13.864564 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
266 12:58:13.864847 Chrome EC: UHEPI supported
267 12:58:13.865127 Phase 1
268 12:58:13.865405 FMAP: area GBB found @ 1805000 (458752 bytes)
269 12:58:13.865687 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
270 12:58:13.865967 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
271 12:58:13.866250 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
272 12:58:13.866566 VB2:vb2_check_recovery() Recovery was requested manually
273 12:58:13.866894 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x7
274 12:58:13.867178 Recovery requested (1009000e)
275 12:58:13.867456 TPM: Extending digest for VBOOT: boot mode into PCR 0
276 12:58:13.867737 tlcl_extend: response is 0
277 12:58:13.868115 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
278 12:58:13.868452 tlcl_extend: response is 0
279 12:58:13.868745 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
280 12:58:13.869031 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
281 12:58:13.869316 BS: verstage times (exec / console): total (unknown) / 148 ms
282 12:58:13.869596
283 12:58:13.869945
284 12:58:13.870238 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
285 12:58:13.870526 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
286 12:58:13.870893 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
287 12:58:13.871189 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
288 12:58:13.871471 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
289 12:58:13.871762 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
290 12:58:13.872039 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
291 12:58:13.872320 TCO_STS: 0000 0000
292 12:58:13.872647 GEN_PMCON: d0015038 00002200
293 12:58:13.872929 GBLRST_CAUSE: 00000000 00000000
294 12:58:13.873208 HPR_CAUSE0: 00000000
295 12:58:13.873484 prev_sleep_state 5
296 12:58:13.873761 Boot Count incremented to 29472
297 12:58:13.874134 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
298 12:58:13.874562 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
299 12:58:13.874950 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
300 12:58:13.875244 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
301 12:58:13.875530 Chrome EC: UHEPI supported
302 12:58:13.875808 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
303 12:58:13.876091 Probing TPM: done!
304 12:58:13.876392 Connected to device vid:did:rid of 1ae0:0028:00
305 12:58:13.876678 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
306 12:58:13.876961 Initialized TPM device CR50 revision 0
307 12:58:13.877241 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
308 12:58:13.877544 MRC: Hash idx 0x100b comparison successful.
309 12:58:13.877887 MRC cache found, size faa8
310 12:58:13.878167 bootmode is set to: 2
311 12:58:13.878444 SPD index = 0
312 12:58:13.878723 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
313 12:58:13.879001 SPD: module type is LPDDR4X
314 12:58:13.879276 SPD: module part number is MT53E512M64D4NW-046
315 12:58:13.879554 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
316 12:58:13.879832 SPD: device width 16 bits, bus width 16 bits
317 12:58:13.880105 SPD: module size is 1024 MB (per channel)
318 12:58:13.880413 CBMEM:
319 12:58:13.880698 IMD: root @ 0x76fff000 254 entries.
320 12:58:13.881038 IMD: root @ 0x76ffec00 62 entries.
321 12:58:13.881337 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
322 12:58:13.881957 FMAP: area RW_VPD found @ f35000 (8192 bytes)
323 12:58:13.882218 External stage cache:
324 12:58:13.882423 IMD: root @ 0x7b3ff000 254 entries.
325 12:58:13.882623 IMD: root @ 0x7b3fec00 62 entries.
326 12:58:13.882824 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
327 12:58:13.883023 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
328 12:58:13.883223 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
329 12:58:13.883426 MRC: 'RECOVERY_MRC_CACHE' does not need update.
330 12:58:13.883625 cse_lite: Skip switching to RW in the recovery path
331 12:58:13.883822 8 DIMMs found
332 12:58:13.884102 SMM Memory Map
333 12:58:13.884309 SMRAM : 0x7b000000 0x800000
334 12:58:13.884542 Subregion 0: 0x7b000000 0x200000
335 12:58:13.884745 Subregion 1: 0x7b200000 0x200000
336 12:58:13.884945 Subregion 2: 0x7b400000 0x400000
337 12:58:13.885144 top_of_ram = 0x77000000
338 12:58:13.885344 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
339 12:58:13.885545 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
340 12:58:13.885745 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
341 12:58:13.885944 MTRR Range: Start=ff000000 End=0 (Size 1000000)
342 12:58:13.886142 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
343 12:58:13.886342 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
344 12:58:13.886541 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
345 12:58:13.886741 Processing 211 relocs. Offset value of 0x74c0b000
346 12:58:13.886937 BS: romstage times (exec / console): total (unknown) / 277 ms
347 12:58:13.887126
348 12:58:13.887310
349 12:58:13.887462 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
350 12:58:13.887615 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
351 12:58:13.887767 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
352 12:58:13.887919 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
353 12:58:13.888070 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
354 12:58:13.888220 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
355 12:58:13.888386 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
356 12:58:13.888545 Processing 5008 relocs. Offset value of 0x75d98000
357 12:58:13.888694 BS: postcar times (exec / console): total (unknown) / 59 ms
358 12:58:13.888844
359 12:58:13.888993
360 12:58:13.889142 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
361 12:58:13.889294 Normal boot
362 12:58:13.889451 FW_CONFIG value is 0x804c02
363 12:58:13.889602 PCI: 00:07.0 disabled by fw_config
364 12:58:13.889750 PCI: 00:07.1 disabled by fw_config
365 12:58:13.889897 PCI: 00:0d.2 disabled by fw_config
366 12:58:13.890068 PCI: 00:1c.7 disabled by fw_config
367 12:58:13.890224 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
368 12:58:13.890376 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
369 12:58:13.890525 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
370 12:58:13.890676 GENERIC: 0.0 disabled by fw_config
371 12:58:13.890825 GENERIC: 1.0 disabled by fw_config
372 12:58:13.890974 fw_config match found: DB_USB=USB3_ACTIVE
373 12:58:13.891124 fw_config match found: DB_USB=USB3_ACTIVE
374 12:58:13.891276 fw_config match found: DB_USB=USB3_ACTIVE
375 12:58:13.891424 fw_config match found: DB_USB=USB3_ACTIVE
376 12:58:13.891572 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
377 12:58:13.891837 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
378 12:58:13.892002 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
379 12:58:13.892144 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
380 12:58:13.892265 microcode: sig=0x806c1 pf=0x80 revision=0x86
381 12:58:13.892436 microcode: Update skipped, already up-to-date
382 12:58:13.892565 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
383 12:58:13.892687 Detected 4 core, 8 thread CPU.
384 12:58:13.892807 Setting up SMI for CPU
385 12:58:13.892926 IED base = 0x7b400000
386 12:58:13.893046 IED size = 0x00400000
387 12:58:13.893164 Will perform SMM setup.
388 12:58:13.893284 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
389 12:58:13.893404 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
390 12:58:13.893525 Processing 16 relocs. Offset value of 0x00030000
391 12:58:13.893645 Attempting to start 7 APs
392 12:58:13.893768 Waiting for 10ms after sending INIT.
393 12:58:13.893887 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
394 12:58:13.894006 AP: slot 4 apic_id 7.
395 12:58:13.894123 AP: slot 2 apic_id 3.
396 12:58:13.894241 AP: slot 6 apic_id 2.
397 12:58:13.894359 AP: slot 7 apic_id 4.
398 12:58:13.894476 AP: slot 3 apic_id 5.
399 12:58:13.894594 done.
400 12:58:13.894712 AP: slot 5 apic_id 6.
401 12:58:13.894832 Waiting for 2nd SIPI to complete...done.
402 12:58:13.894951 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
403 12:58:13.895072 Processing 13 relocs. Offset value of 0x00038000
404 12:58:13.895191 Unable to locate Global NVS
405 12:58:13.895311 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
406 12:58:13.895431 Installing permanent SMM handler to 0x7b000000
407 12:58:13.895552 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
408 12:58:13.895674 Processing 794 relocs. Offset value of 0x7b010000
409 12:58:13.896023 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
410 12:58:13.896164 Processing 13 relocs. Offset value of 0x7b008000
411 12:58:13.896287 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
412 12:58:13.896431 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
413 12:58:13.896553 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
414 12:58:13.896673 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
415 12:58:13.896793 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
416 12:58:13.896913 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
417 12:58:13.897033 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
418 12:58:13.897150 Unable to locate Global NVS
419 12:58:13.897249 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
420 12:58:13.897350 Clearing SMI status registers
421 12:58:13.897450 SMI_STS: PM1
422 12:58:13.897549 PM1_STS: PWRBTN
423 12:58:13.897648 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
424 12:58:13.897749 In relocation handler: CPU 0
425 12:58:13.897848 New SMBASE=0x7b000000 IEDBASE=0x7b400000
426 12:58:13.897948 Writing SMRR. base = 0x7b000006, mask=0xff800c00
427 12:58:13.898048 Relocation complete.
428 12:58:13.898147 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
429 12:58:13.898247 In relocation handler: CPU 1
430 12:58:13.898346 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
431 12:58:13.898446 Relocation complete.
432 12:58:13.898544 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
433 12:58:13.898644 In relocation handler: CPU 7
434 12:58:13.898742 New SMBASE=0x7affe400 IEDBASE=0x7b400000
435 12:58:13.898842 Writing SMRR. base = 0x7b000006, mask=0xff800c00
436 12:58:13.898942 Relocation complete.
437 12:58:13.899041 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
438 12:58:13.899142 In relocation handler: CPU 2
439 12:58:13.899240 New SMBASE=0x7afff800 IEDBASE=0x7b400000
440 12:58:13.899339 Relocation complete.
441 12:58:13.899439 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
442 12:58:13.899539 In relocation handler: CPU 6
443 12:58:13.899639 New SMBASE=0x7affe800 IEDBASE=0x7b400000
444 12:58:13.899738 Writing SMRR. base = 0x7b000006, mask=0xff800c00
445 12:58:13.899837 Relocation complete.
446 12:58:13.899936 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
447 12:58:13.900034 In relocation handler: CPU 4
448 12:58:13.900133 New SMBASE=0x7afff000 IEDBASE=0x7b400000
449 12:58:13.900233 Relocation complete.
450 12:58:13.900331 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
451 12:58:13.900455 In relocation handler: CPU 5
452 12:58:13.900556 New SMBASE=0x7affec00 IEDBASE=0x7b400000
453 12:58:13.900657 Writing SMRR. base = 0x7b000006, mask=0xff800c00
454 12:58:13.900757 Relocation complete.
455 12:58:13.900855 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
456 12:58:13.900956 In relocation handler: CPU 3
457 12:58:13.901056 New SMBASE=0x7afff400 IEDBASE=0x7b400000
458 12:58:13.901156 Relocation complete.
459 12:58:13.901255 Initializing CPU #0
460 12:58:13.901353 CPU: vendor Intel device 806c1
461 12:58:13.901452 CPU: family 06, model 8c, stepping 01
462 12:58:13.901552 Clearing out pending MCEs
463 12:58:13.901651 Setting up local APIC...
464 12:58:13.901750 apic_id: 0x00 done.
465 12:58:13.901848 Turbo is available but hidden
466 12:58:13.901949 Turbo is available and visible
467 12:58:13.902056 microcode: Update skipped, already up-to-date
468 12:58:13.902141 CPU #0 initialized
469 12:58:13.902226 Initializing CPU #7
470 12:58:13.902312 Initializing CPU #3
471 12:58:13.902397 CPU: vendor Intel device 806c1
472 12:58:13.902482 CPU: family 06, model 8c, stepping 01
473 12:58:13.902568 CPU: vendor Intel device 806c1
474 12:58:13.902654 CPU: family 06, model 8c, stepping 01
475 12:58:13.902738 Clearing out pending MCEs
476 12:58:13.902823 Clearing out pending MCEs
477 12:58:13.902909 Setting up local APIC...
478 12:58:13.902995 Initializing CPU #2
479 12:58:13.903079 Initializing CPU #6
480 12:58:13.903164 Initializing CPU #4
481 12:58:13.903249 Initializing CPU #5
482 12:58:13.903333 apic_id: 0x04 done.
483 12:58:13.903418 Setting up local APIC...
484 12:58:13.903502 CPU: vendor Intel device 806c1
485 12:58:13.903588 CPU: family 06, model 8c, stepping 01
486 12:58:13.903673 CPU: vendor Intel device 806c1
487 12:58:13.903759 CPU: family 06, model 8c, stepping 01
488 12:58:13.903845 Clearing out pending MCEs
489 12:58:13.903930 Clearing out pending MCEs
490 12:58:13.904015 Setting up local APIC...
491 12:58:13.904100 Initializing CPU #1
492 12:58:13.904185 apic_id: 0x03 done.
493 12:58:13.904269 Setting up local APIC...
494 12:58:13.904363 CPU: vendor Intel device 806c1
495 12:58:13.904460 CPU: family 06, model 8c, stepping 01
496 12:58:13.904547 microcode: Update skipped, already up-to-date
497 12:58:13.904633 apic_id: 0x02 done.
498 12:58:13.904718 CPU #2 initialized
499 12:58:13.904802 microcode: Update skipped, already up-to-date
500 12:58:13.904887 Clearing out pending MCEs
501 12:58:13.904972 microcode: Update skipped, already up-to-date
502 12:58:13.905057 apic_id: 0x05 done.
503 12:58:13.905141 CPU #7 initialized
504 12:58:13.905227 microcode: Update skipped, already up-to-date
505 12:58:13.905312 Setting up local APIC...
506 12:58:13.905396 CPU #3 initialized
507 12:58:13.905480 CPU: vendor Intel device 806c1
508 12:58:13.905565 CPU: family 06, model 8c, stepping 01
509 12:58:13.905650 CPU: vendor Intel device 806c1
510 12:58:13.905735 CPU: family 06, model 8c, stepping 01
511 12:58:13.905821 Clearing out pending MCEs
512 12:58:13.905906 Clearing out pending MCEs
513 12:58:13.905991 Setting up local APIC...
514 12:58:13.906076 apic_id: 0x01 done.
515 12:58:13.906161 CPU #6 initialized
516 12:58:13.906245 Setting up local APIC...
517 12:58:13.906331 microcode: Update skipped, already up-to-date
518 12:58:13.906416 apic_id: 0x06 done.
519 12:58:13.906501 apic_id: 0x07 done.
520 12:58:13.906585 microcode: Update skipped, already up-to-date
521 12:58:13.906670 microcode: Update skipped, already up-to-date
522 12:58:13.906755 CPU #5 initialized
523 12:58:13.907076 CPU #4 initialized
524 12:58:13.907159 CPU #1 initialized
525 12:58:13.907235 bsp_do_flight_plan done after 454 msecs.
526 12:58:13.907311 CPU: frequency set to 4000 MHz
527 12:58:13.907386 Enabling SMIs.
528 12:58:13.907461 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
529 12:58:13.907536 SATAXPCIE1 indicates PCIe NVMe is present
530 12:58:13.907611 Probing TPM: done!
531 12:58:13.907686 Connected to device vid:did:rid of 1ae0:0028:00
532 12:58:13.907762 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
533 12:58:13.907838 Initialized TPM device CR50 revision 0
534 12:58:13.907912 Enabling S0i3.4
535 12:58:13.907985 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
536 12:58:13.908061 Found a VBT of 8704 bytes after decompression
537 12:58:13.908135 cse_lite: CSE RO boot. HybridStorageMode disabled
538 12:58:13.908211 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
539 12:58:13.908286 FSPS returned 0
540 12:58:13.908374 Executing Phase 1 of FspMultiPhaseSiInit
541 12:58:13.908454 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
542 12:58:13.908530 port C0 DISC req: usage 1 usb3 1 usb2 5
543 12:58:13.908605 Raw Buffer output 0 00000511
544 12:58:13.908680 Raw Buffer output 1 00000000
545 12:58:13.908754 pmc_send_ipc_cmd succeeded
546 12:58:13.908828 port C1 DISC req: usage 1 usb3 2 usb2 3
547 12:58:13.908902 Raw Buffer output 0 00000321
548 12:58:13.908977 Raw Buffer output 1 00000000
549 12:58:13.909051 pmc_send_ipc_cmd succeeded
550 12:58:13.909125 Detected 4 core, 8 thread CPU.
551 12:58:13.909199 Detected 4 core, 8 thread CPU.
552 12:58:13.909274 Display FSP Version Info HOB
553 12:58:13.909348 Reference Code - CPU = a.0.4c.31
554 12:58:13.909422 uCode Version = 0.0.0.86
555 12:58:13.909497 TXT ACM version = ff.ff.ff.ffff
556 12:58:13.909572 Reference Code - ME = a.0.4c.31
557 12:58:13.909646 MEBx version = 0.0.0.0
558 12:58:13.909721 ME Firmware Version = Consumer SKU
559 12:58:13.909795 Reference Code - PCH = a.0.4c.31
560 12:58:13.909870 PCH-CRID Status = Disabled
561 12:58:13.909944 PCH-CRID Original Value = ff.ff.ff.ffff
562 12:58:13.910019 PCH-CRID New Value = ff.ff.ff.ffff
563 12:58:13.910093 OPROM - RST - RAID = ff.ff.ff.ffff
564 12:58:13.910168 PCH Hsio Version = 4.0.0.0
565 12:58:13.910242 Reference Code - SA - System Agent = a.0.4c.31
566 12:58:13.910317 Reference Code - MRC = 2.0.0.1
567 12:58:13.910391 SA - PCIe Version = a.0.4c.31
568 12:58:13.910467 SA-CRID Status = Disabled
569 12:58:13.910541 SA-CRID Original Value = 0.0.0.1
570 12:58:13.910616 SA-CRID New Value = 0.0.0.1
571 12:58:13.910690 OPROM - VBIOS = ff.ff.ff.ffff
572 12:58:13.910765 IO Manageability Engine FW Version = 11.1.4.0
573 12:58:13.910841 PHY Build Version = 0.0.0.e0
574 12:58:13.910915 Thunderbolt(TM) FW Version = 0.0.0.0
575 12:58:13.910991 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
576 12:58:13.911067 ITSS IRQ Polarities Before:
577 12:58:13.911142 IPC0: 0xffffffff
578 12:58:13.911216 IPC1: 0xffffffff
579 12:58:13.911290 IPC2: 0xffffffff
580 12:58:13.911364 IPC3: 0xffffffff
581 12:58:13.911438 ITSS IRQ Polarities After:
582 12:58:13.911512 IPC0: 0xffffffff
583 12:58:13.911586 IPC1: 0xffffffff
584 12:58:13.911660 IPC2: 0xffffffff
585 12:58:13.911733 IPC3: 0xffffffff
586 12:58:13.911807 Found PCIe Root Port #9 at PCI: 00:1d.0.
587 12:58:13.911882 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
588 12:58:13.911962 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
589 12:58:13.912039 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
590 12:58:13.912120 BS: BS_DEV_INIT_CHIPS run times (exec / console): 327 / 236 ms
591 12:58:13.912188 Enumerating buses...
592 12:58:13.912254 Show all devs... Before device enumeration.
593 12:58:13.912321 Root Device: enabled 1
594 12:58:13.912392 DOMAIN: 0000: enabled 1
595 12:58:13.912458 CPU_CLUSTER: 0: enabled 1
596 12:58:13.912525 PCI: 00:00.0: enabled 1
597 12:58:13.912591 PCI: 00:02.0: enabled 1
598 12:58:13.912657 PCI: 00:04.0: enabled 1
599 12:58:13.912723 PCI: 00:05.0: enabled 1
600 12:58:13.912788 PCI: 00:06.0: enabled 0
601 12:58:13.912855 PCI: 00:07.0: enabled 0
602 12:58:13.912921 PCI: 00:07.1: enabled 0
603 12:58:13.912987 PCI: 00:07.2: enabled 0
604 12:58:13.913052 PCI: 00:07.3: enabled 0
605 12:58:13.913118 PCI: 00:08.0: enabled 1
606 12:58:13.913184 PCI: 00:09.0: enabled 0
607 12:58:13.913250 PCI: 00:0a.0: enabled 0
608 12:58:13.913316 PCI: 00:0d.0: enabled 1
609 12:58:13.913382 PCI: 00:0d.1: enabled 0
610 12:58:13.913447 PCI: 00:0d.2: enabled 0
611 12:58:13.913514 PCI: 00:0d.3: enabled 0
612 12:58:13.913579 PCI: 00:0e.0: enabled 0
613 12:58:13.913645 PCI: 00:10.2: enabled 1
614 12:58:13.913710 PCI: 00:10.6: enabled 0
615 12:58:13.913776 PCI: 00:10.7: enabled 0
616 12:58:13.913841 PCI: 00:12.0: enabled 0
617 12:58:13.913907 PCI: 00:12.6: enabled 0
618 12:58:13.913973 PCI: 00:13.0: enabled 0
619 12:58:13.914038 PCI: 00:14.0: enabled 1
620 12:58:13.914104 PCI: 00:14.1: enabled 0
621 12:58:13.914170 PCI: 00:14.2: enabled 1
622 12:58:13.914235 PCI: 00:14.3: enabled 1
623 12:58:13.914301 PCI: 00:15.0: enabled 1
624 12:58:13.914366 PCI: 00:15.1: enabled 1
625 12:58:13.914432 PCI: 00:15.2: enabled 1
626 12:58:13.914498 PCI: 00:15.3: enabled 1
627 12:58:13.914563 PCI: 00:16.0: enabled 1
628 12:58:13.914630 PCI: 00:16.1: enabled 0
629 12:58:13.914695 PCI: 00:16.2: enabled 0
630 12:58:13.914761 PCI: 00:16.3: enabled 0
631 12:58:13.914826 PCI: 00:16.4: enabled 0
632 12:58:13.914892 PCI: 00:16.5: enabled 0
633 12:58:13.914958 PCI: 00:17.0: enabled 1
634 12:58:13.915024 PCI: 00:19.0: enabled 0
635 12:58:13.915089 PCI: 00:19.1: enabled 1
636 12:58:13.915155 PCI: 00:19.2: enabled 0
637 12:58:13.915221 PCI: 00:1c.0: enabled 1
638 12:58:13.915287 PCI: 00:1c.1: enabled 0
639 12:58:13.915352 PCI: 00:1c.2: enabled 0
640 12:58:13.915418 PCI: 00:1c.3: enabled 0
641 12:58:13.915484 PCI: 00:1c.4: enabled 0
642 12:58:13.915551 PCI: 00:1c.5: enabled 0
643 12:58:13.915616 PCI: 00:1c.6: enabled 1
644 12:58:13.915681 PCI: 00:1c.7: enabled 0
645 12:58:13.915747 PCI: 00:1d.0: enabled 1
646 12:58:13.915812 PCI: 00:1d.1: enabled 0
647 12:58:13.916080 PCI: 00:1d.2: enabled 1
648 12:58:13.916159 PCI: 00:1d.3: enabled 0
649 12:58:13.916228 PCI: 00:1e.0: enabled 1
650 12:58:13.916295 PCI: 00:1e.1: enabled 0
651 12:58:13.916368 PCI: 00:1e.2: enabled 1
652 12:58:13.916436 PCI: 00:1e.3: enabled 1
653 12:58:13.916503 PCI: 00:1f.0: enabled 1
654 12:58:13.916569 PCI: 00:1f.1: enabled 0
655 12:58:13.916638 PCI: 00:1f.2: enabled 1
656 12:58:13.916704 PCI: 00:1f.3: enabled 1
657 12:58:13.916771 PCI: 00:1f.4: enabled 0
658 12:58:13.916838 PCI: 00:1f.5: enabled 1
659 12:58:13.916904 PCI: 00:1f.6: enabled 0
660 12:58:13.916970 PCI: 00:1f.7: enabled 0
661 12:58:13.917047 APIC: 00: enabled 1
662 12:58:13.917106 GENERIC: 0.0: enabled 1
663 12:58:13.917166 GENERIC: 0.0: enabled 1
664 12:58:13.917225 GENERIC: 1.0: enabled 1
665 12:58:13.917285 GENERIC: 0.0: enabled 1
666 12:58:13.917343 GENERIC: 1.0: enabled 1
667 12:58:13.917402 USB0 port 0: enabled 1
668 12:58:13.917462 GENERIC: 0.0: enabled 1
669 12:58:13.917522 USB0 port 0: enabled 1
670 12:58:13.917581 GENERIC: 0.0: enabled 1
671 12:58:13.917641 I2C: 00:1a: enabled 1
672 12:58:13.917719 I2C: 00:31: enabled 1
673 12:58:13.917781 I2C: 00:32: enabled 1
674 12:58:13.917840 I2C: 00:10: enabled 1
675 12:58:13.917900 I2C: 00:15: enabled 1
676 12:58:13.917960 GENERIC: 0.0: enabled 0
677 12:58:13.918020 GENERIC: 1.0: enabled 0
678 12:58:13.918081 GENERIC: 0.0: enabled 1
679 12:58:13.918140 SPI: 00: enabled 1
680 12:58:13.918200 SPI: 00: enabled 1
681 12:58:13.918260 PNP: 0c09.0: enabled 1
682 12:58:13.918320 GENERIC: 0.0: enabled 1
683 12:58:13.918379 USB3 port 0: enabled 1
684 12:58:13.918439 USB3 port 1: enabled 1
685 12:58:13.918499 USB3 port 2: enabled 0
686 12:58:13.918558 USB3 port 3: enabled 0
687 12:58:13.918618 USB2 port 0: enabled 0
688 12:58:13.918677 USB2 port 1: enabled 1
689 12:58:13.918737 USB2 port 2: enabled 1
690 12:58:13.918796 USB2 port 3: enabled 0
691 12:58:13.918855 USB2 port 4: enabled 1
692 12:58:13.918915 USB2 port 5: enabled 0
693 12:58:13.918975 USB2 port 6: enabled 0
694 12:58:13.919034 USB2 port 7: enabled 0
695 12:58:13.919094 USB2 port 8: enabled 0
696 12:58:13.919154 USB2 port 9: enabled 0
697 12:58:13.919213 USB3 port 0: enabled 0
698 12:58:13.919273 USB3 port 1: enabled 1
699 12:58:13.919332 USB3 port 2: enabled 0
700 12:58:13.919392 USB3 port 3: enabled 0
701 12:58:13.919452 GENERIC: 0.0: enabled 1
702 12:58:13.919512 GENERIC: 1.0: enabled 1
703 12:58:13.919571 APIC: 01: enabled 1
704 12:58:13.919631 APIC: 03: enabled 1
705 12:58:13.919690 APIC: 05: enabled 1
706 12:58:13.919749 APIC: 07: enabled 1
707 12:58:13.919808 APIC: 06: enabled 1
708 12:58:13.919868 APIC: 02: enabled 1
709 12:58:13.919927 APIC: 04: enabled 1
710 12:58:13.919987 Compare with tree...
711 12:58:13.920047 Root Device: enabled 1
712 12:58:13.920107 DOMAIN: 0000: enabled 1
713 12:58:13.920166 PCI: 00:00.0: enabled 1
714 12:58:13.920225 PCI: 00:02.0: enabled 1
715 12:58:13.920283 PCI: 00:04.0: enabled 1
716 12:58:13.920342 GENERIC: 0.0: enabled 1
717 12:58:13.920407 PCI: 00:05.0: enabled 1
718 12:58:13.920467 PCI: 00:06.0: enabled 0
719 12:58:13.920526 PCI: 00:07.0: enabled 0
720 12:58:13.920586 GENERIC: 0.0: enabled 1
721 12:58:13.920645 PCI: 00:07.1: enabled 0
722 12:58:13.920704 GENERIC: 1.0: enabled 1
723 12:58:13.920763 PCI: 00:07.2: enabled 0
724 12:58:13.920822 GENERIC: 0.0: enabled 1
725 12:58:13.920881 PCI: 00:07.3: enabled 0
726 12:58:13.920940 GENERIC: 1.0: enabled 1
727 12:58:13.920999 PCI: 00:08.0: enabled 1
728 12:58:13.921060 PCI: 00:09.0: enabled 0
729 12:58:13.921119 PCI: 00:0a.0: enabled 0
730 12:58:13.921179 PCI: 00:0d.0: enabled 1
731 12:58:13.921238 USB0 port 0: enabled 1
732 12:58:13.921297 USB3 port 0: enabled 1
733 12:58:13.921357 USB3 port 1: enabled 1
734 12:58:13.921416 USB3 port 2: enabled 0
735 12:58:13.921475 USB3 port 3: enabled 0
736 12:58:13.921535 PCI: 00:0d.1: enabled 0
737 12:58:13.921594 PCI: 00:0d.2: enabled 0
738 12:58:13.921653 GENERIC: 0.0: enabled 1
739 12:58:13.921712 PCI: 00:0d.3: enabled 0
740 12:58:13.921771 PCI: 00:0e.0: enabled 0
741 12:58:13.921831 PCI: 00:10.2: enabled 1
742 12:58:13.921889 PCI: 00:10.6: enabled 0
743 12:58:13.921948 PCI: 00:10.7: enabled 0
744 12:58:13.922008 PCI: 00:12.0: enabled 0
745 12:58:13.922077 PCI: 00:12.6: enabled 0
746 12:58:13.922131 PCI: 00:13.0: enabled 0
747 12:58:13.922184 PCI: 00:14.0: enabled 1
748 12:58:13.922238 USB0 port 0: enabled 1
749 12:58:13.922293 USB2 port 0: enabled 0
750 12:58:13.922346 USB2 port 1: enabled 1
751 12:58:13.922400 USB2 port 2: enabled 1
752 12:58:13.922454 USB2 port 3: enabled 0
753 12:58:13.922508 USB2 port 4: enabled 1
754 12:58:13.922562 USB2 port 5: enabled 0
755 12:58:13.922615 USB2 port 6: enabled 0
756 12:58:13.922669 USB2 port 7: enabled 0
757 12:58:13.922723 USB2 port 8: enabled 0
758 12:58:13.922777 USB2 port 9: enabled 0
759 12:58:13.922831 USB3 port 0: enabled 0
760 12:58:13.922885 USB3 port 1: enabled 1
761 12:58:13.922939 USB3 port 2: enabled 0
762 12:58:13.922994 USB3 port 3: enabled 0
763 12:58:13.923047 PCI: 00:14.1: enabled 0
764 12:58:13.923101 PCI: 00:14.2: enabled 1
765 12:58:13.923155 PCI: 00:14.3: enabled 1
766 12:58:13.923209 GENERIC: 0.0: enabled 1
767 12:58:13.923263 PCI: 00:15.0: enabled 1
768 12:58:13.923317 I2C: 00:1a: enabled 1
769 12:58:13.923372 I2C: 00:31: enabled 1
770 12:58:13.923426 I2C: 00:32: enabled 1
771 12:58:13.923480 PCI: 00:15.1: enabled 1
772 12:58:13.923534 I2C: 00:10: enabled 1
773 12:58:13.923589 PCI: 00:15.2: enabled 1
774 12:58:13.923643 PCI: 00:15.3: enabled 1
775 12:58:13.923697 PCI: 00:16.0: enabled 1
776 12:58:13.923750 PCI: 00:16.1: enabled 0
777 12:58:13.923804 PCI: 00:16.2: enabled 0
778 12:58:13.923859 PCI: 00:16.3: enabled 0
779 12:58:13.923912 PCI: 00:16.4: enabled 0
780 12:58:13.923966 PCI: 00:16.5: enabled 0
781 12:58:13.924020 PCI: 00:17.0: enabled 1
782 12:58:13.924074 PCI: 00:19.0: enabled 0
783 12:58:13.924128 PCI: 00:19.1: enabled 1
784 12:58:13.924181 I2C: 00:15: enabled 1
785 12:58:13.924235 PCI: 00:19.2: enabled 0
786 12:58:13.924289 PCI: 00:1d.0: enabled 1
787 12:58:13.924343 GENERIC: 0.0: enabled 1
788 12:58:13.924408 PCI: 00:1e.0: enabled 1
789 12:58:13.924464 PCI: 00:1e.1: enabled 0
790 12:58:13.924518 PCI: 00:1e.2: enabled 1
791 12:58:13.924573 SPI: 00: enabled 1
792 12:58:13.924627 PCI: 00:1e.3: enabled 1
793 12:58:13.924682 SPI: 00: enabled 1
794 12:58:13.924736 PCI: 00:1f.0: enabled 1
795 12:58:13.924790 PNP: 0c09.0: enabled 1
796 12:58:13.924846 PCI: 00:1f.1: enabled 0
797 12:58:13.924900 PCI: 00:1f.2: enabled 1
798 12:58:13.924954 GENERIC: 0.0: enabled 1
799 12:58:13.925009 GENERIC: 0.0: enabled 1
800 12:58:13.925063 GENERIC: 1.0: enabled 1
801 12:58:13.925117 PCI: 00:1f.3: enabled 1
802 12:58:13.925172 PCI: 00:1f.4: enabled 0
803 12:58:13.925226 PCI: 00:1f.5: enabled 1
804 12:58:13.925279 PCI: 00:1f.6: enabled 0
805 12:58:13.925525 PCI: 00:1f.7: enabled 0
806 12:58:13.925586 CPU_CLUSTER: 0: enabled 1
807 12:58:13.925641 APIC: 00: enabled 1
808 12:58:13.925697 APIC: 01: enabled 1
809 12:58:13.925751 APIC: 03: enabled 1
810 12:58:13.925806 APIC: 05: enabled 1
811 12:58:13.925860 APIC: 07: enabled 1
812 12:58:13.925915 APIC: 06: enabled 1
813 12:58:13.925969 APIC: 02: enabled 1
814 12:58:13.926023 APIC: 04: enabled 1
815 12:58:13.926076 Root Device scanning...
816 12:58:13.926130 scan_static_bus for Root Device
817 12:58:13.926184 DOMAIN: 0000 enabled
818 12:58:13.926239 CPU_CLUSTER: 0 enabled
819 12:58:13.926293 DOMAIN: 0000 scanning...
820 12:58:13.926347 PCI: pci_scan_bus for bus 00
821 12:58:13.926401 PCI: 00:00.0 [8086/0000] ops
822 12:58:13.926455 PCI: 00:00.0 [8086/9a12] enabled
823 12:58:13.926509 PCI: 00:02.0 [8086/0000] bus ops
824 12:58:13.926563 PCI: 00:02.0 [8086/9a40] enabled
825 12:58:13.926617 PCI: 00:04.0 [8086/0000] bus ops
826 12:58:13.926671 PCI: 00:04.0 [8086/9a03] enabled
827 12:58:13.926724 PCI: 00:05.0 [8086/9a19] enabled
828 12:58:13.926779 PCI: 00:07.0 [0000/0000] hidden
829 12:58:13.926833 PCI: 00:08.0 [8086/9a11] enabled
830 12:58:13.926888 PCI: 00:0a.0 [8086/9a0d] disabled
831 12:58:13.926942 PCI: 00:0d.0 [8086/0000] bus ops
832 12:58:13.927009 PCI: 00:0d.0 [8086/9a13] enabled
833 12:58:13.927062 PCI: 00:14.0 [8086/0000] bus ops
834 12:58:13.927116 PCI: 00:14.0 [8086/a0ed] enabled
835 12:58:13.927169 PCI: 00:14.2 [8086/a0ef] enabled
836 12:58:13.927222 PCI: 00:14.3 [8086/0000] bus ops
837 12:58:13.927275 PCI: 00:14.3 [8086/a0f0] enabled
838 12:58:13.927328 PCI: 00:15.0 [8086/0000] bus ops
839 12:58:13.927381 PCI: 00:15.0 [8086/a0e8] enabled
840 12:58:13.927434 PCI: 00:15.1 [8086/0000] bus ops
841 12:58:13.927487 PCI: 00:15.1 [8086/a0e9] enabled
842 12:58:13.927540 PCI: 00:15.2 [8086/0000] bus ops
843 12:58:13.927592 PCI: 00:15.2 [8086/a0ea] enabled
844 12:58:13.927645 PCI: 00:15.3 [8086/0000] bus ops
845 12:58:13.927698 PCI: 00:15.3 [8086/a0eb] enabled
846 12:58:13.927751 PCI: 00:16.0 [8086/0000] ops
847 12:58:13.927804 PCI: 00:16.0 [8086/a0e0] enabled
848 12:58:13.927857 PCI: Static device PCI: 00:17.0 not found, disabling it.
849 12:58:13.927911 PCI: 00:19.0 [8086/0000] bus ops
850 12:58:13.927964 PCI: 00:19.0 [8086/a0c5] disabled
851 12:58:13.928017 PCI: 00:19.1 [8086/0000] bus ops
852 12:58:13.928070 PCI: 00:19.1 [8086/a0c6] enabled
853 12:58:13.928123 PCI: 00:1d.0 [8086/0000] bus ops
854 12:58:13.928177 PCI: 00:1d.0 [8086/a0b0] enabled
855 12:58:13.928229 PCI: 00:1e.0 [8086/0000] ops
856 12:58:13.928282 PCI: 00:1e.0 [8086/a0a8] enabled
857 12:58:13.928335 PCI: 00:1e.2 [8086/0000] bus ops
858 12:58:13.928401 PCI: 00:1e.2 [8086/a0aa] enabled
859 12:58:13.928455 PCI: 00:1e.3 [8086/0000] bus ops
860 12:58:13.928508 PCI: 00:1e.3 [8086/a0ab] enabled
861 12:58:13.928561 PCI: 00:1f.0 [8086/0000] bus ops
862 12:58:13.928614 PCI: 00:1f.0 [8086/a087] enabled
863 12:58:13.928667 RTC Init
864 12:58:13.928721 Set power on after power failure.
865 12:58:13.928774 Disabling Deep S3
866 12:58:13.928828 Disabling Deep S3
867 12:58:13.928881 Disabling Deep S4
868 12:58:13.928934 Disabling Deep S4
869 12:58:13.928987 Disabling Deep S5
870 12:58:13.929040 Disabling Deep S5
871 12:58:13.929093 PCI: 00:1f.2 [0000/0000] hidden
872 12:58:13.929146 PCI: 00:1f.3 [8086/0000] bus ops
873 12:58:13.929199 PCI: 00:1f.3 [8086/a0c8] enabled
874 12:58:13.929252 PCI: 00:1f.5 [8086/0000] bus ops
875 12:58:13.929304 PCI: 00:1f.5 [8086/a0a4] enabled
876 12:58:13.929357 PCI: Leftover static devices:
877 12:58:13.929410 PCI: 00:10.2
878 12:58:13.929463 PCI: 00:10.6
879 12:58:13.929516 PCI: 00:10.7
880 12:58:13.929569 PCI: 00:06.0
881 12:58:13.929622 PCI: 00:07.1
882 12:58:13.929675 PCI: 00:07.2
883 12:58:13.929727 PCI: 00:07.3
884 12:58:13.929779 PCI: 00:09.0
885 12:58:13.929832 PCI: 00:0d.1
886 12:58:13.929885 PCI: 00:0d.2
887 12:58:13.929937 PCI: 00:0d.3
888 12:58:13.929990 PCI: 00:0e.0
889 12:58:13.930043 PCI: 00:12.0
890 12:58:13.930096 PCI: 00:12.6
891 12:58:13.930149 PCI: 00:13.0
892 12:58:13.930201 PCI: 00:14.1
893 12:58:13.930254 PCI: 00:16.1
894 12:58:13.930306 PCI: 00:16.2
895 12:58:13.930359 PCI: 00:16.3
896 12:58:13.930411 PCI: 00:16.4
897 12:58:13.930464 PCI: 00:16.5
898 12:58:13.930517 PCI: 00:17.0
899 12:58:13.930569 PCI: 00:19.2
900 12:58:13.930622 PCI: 00:1e.1
901 12:58:13.930675 PCI: 00:1f.1
902 12:58:13.930728 PCI: 00:1f.4
903 12:58:13.930781 PCI: 00:1f.6
904 12:58:13.930833 PCI: 00:1f.7
905 12:58:13.930887 PCI: Check your devicetree.cb.
906 12:58:13.930940 PCI: 00:02.0 scanning...
907 12:58:13.930993 scan_generic_bus for PCI: 00:02.0
908 12:58:13.931046 scan_generic_bus for PCI: 00:02.0 done
909 12:58:13.931100 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
910 12:58:13.931153 PCI: 00:04.0 scanning...
911 12:58:13.931206 scan_generic_bus for PCI: 00:04.0
912 12:58:13.931259 GENERIC: 0.0 enabled
913 12:58:13.931313 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
914 12:58:13.931366 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
915 12:58:13.931420 PCI: 00:0d.0 scanning...
916 12:58:13.931472 scan_static_bus for PCI: 00:0d.0
917 12:58:13.931526 USB0 port 0 enabled
918 12:58:13.931579 USB0 port 0 scanning...
919 12:58:13.931632 scan_static_bus for USB0 port 0
920 12:58:13.931685 USB3 port 0 enabled
921 12:58:13.931738 USB3 port 1 enabled
922 12:58:13.931790 USB3 port 2 disabled
923 12:58:13.931843 USB3 port 3 disabled
924 12:58:13.931896 USB3 port 0 scanning...
925 12:58:13.931949 scan_static_bus for USB3 port 0
926 12:58:13.932002 scan_static_bus for USB3 port 0 done
927 12:58:13.932055 scan_bus: bus USB3 port 0 finished in 6 msecs
928 12:58:13.932108 USB3 port 1 scanning...
929 12:58:13.932161 scan_static_bus for USB3 port 1
930 12:58:13.932214 scan_static_bus for USB3 port 1 done
931 12:58:13.932267 scan_bus: bus USB3 port 1 finished in 6 msecs
932 12:58:13.932320 scan_static_bus for USB0 port 0 done
933 12:58:13.932384 scan_bus: bus USB0 port 0 finished in 43 msecs
934 12:58:13.932439 scan_static_bus for PCI: 00:0d.0 done
935 12:58:13.932492 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
936 12:58:13.932545 PCI: 00:14.0 scanning...
937 12:58:13.932599 scan_static_bus for PCI: 00:14.0
938 12:58:13.932652 USB0 port 0 enabled
939 12:58:13.932705 USB0 port 0 scanning...
940 12:58:13.932758 scan_static_bus for USB0 port 0
941 12:58:13.932811 USB2 port 0 disabled
942 12:58:13.932864 USB2 port 1 enabled
943 12:58:13.932917 USB2 port 2 enabled
944 12:58:13.932970 USB2 port 3 disabled
945 12:58:13.933023 USB2 port 4 enabled
946 12:58:13.933075 USB2 port 5 disabled
947 12:58:13.933130 USB2 port 6 disabled
948 12:58:13.933183 USB2 port 7 disabled
949 12:58:13.933235 USB2 port 8 disabled
950 12:58:13.933288 USB2 port 9 disabled
951 12:58:13.933342 USB3 port 0 disabled
952 12:58:13.933394 USB3 port 1 enabled
953 12:58:13.933447 USB3 port 2 disabled
954 12:58:13.933499 USB3 port 3 disabled
955 12:58:13.933742 USB2 port 1 scanning...
956 12:58:13.933801 scan_static_bus for USB2 port 1
957 12:58:13.933856 scan_static_bus for USB2 port 1 done
958 12:58:13.933910 scan_bus: bus USB2 port 1 finished in 6 msecs
959 12:58:13.933964 USB2 port 2 scanning...
960 12:58:13.934017 scan_static_bus for USB2 port 2
961 12:58:13.934070 scan_static_bus for USB2 port 2 done
962 12:58:13.934124 scan_bus: bus USB2 port 2 finished in 6 msecs
963 12:58:13.934177 USB2 port 4 scanning...
964 12:58:13.934230 scan_static_bus for USB2 port 4
965 12:58:13.934283 scan_static_bus for USB2 port 4 done
966 12:58:13.934336 scan_bus: bus USB2 port 4 finished in 6 msecs
967 12:58:13.934390 USB3 port 1 scanning...
968 12:58:13.934443 scan_static_bus for USB3 port 1
969 12:58:13.934496 scan_static_bus for USB3 port 1 done
970 12:58:13.934549 scan_bus: bus USB3 port 1 finished in 6 msecs
971 12:58:13.934602 scan_static_bus for USB0 port 0 done
972 12:58:13.934655 scan_bus: bus USB0 port 0 finished in 93 msecs
973 12:58:13.934708 scan_static_bus for PCI: 00:14.0 done
974 12:58:13.934762 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
975 12:58:13.934815 PCI: 00:14.3 scanning...
976 12:58:13.934867 scan_static_bus for PCI: 00:14.3
977 12:58:13.934920 GENERIC: 0.0 enabled
978 12:58:13.934974 scan_static_bus for PCI: 00:14.3 done
979 12:58:13.935027 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
980 12:58:13.935079 PCI: 00:15.0 scanning...
981 12:58:13.935132 scan_static_bus for PCI: 00:15.0
982 12:58:13.935188 I2C: 00:1a enabled
983 12:58:13.935241 I2C: 00:31 enabled
984 12:58:13.935293 I2C: 00:32 enabled
985 12:58:13.935346 scan_static_bus for PCI: 00:15.0 done
986 12:58:13.935399 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
987 12:58:13.935452 PCI: 00:15.1 scanning...
988 12:58:13.935504 scan_static_bus for PCI: 00:15.1
989 12:58:13.935557 I2C: 00:10 enabled
990 12:58:13.935611 scan_static_bus for PCI: 00:15.1 done
991 12:58:13.935664 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
992 12:58:13.935717 PCI: 00:15.2 scanning...
993 12:58:13.935770 scan_static_bus for PCI: 00:15.2
994 12:58:13.935823 scan_static_bus for PCI: 00:15.2 done
995 12:58:13.935876 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
996 12:58:13.935929 PCI: 00:15.3 scanning...
997 12:58:13.935982 scan_static_bus for PCI: 00:15.3
998 12:58:13.936035 scan_static_bus for PCI: 00:15.3 done
999 12:58:13.936088 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1000 12:58:13.936141 PCI: 00:19.1 scanning...
1001 12:58:13.936193 scan_static_bus for PCI: 00:19.1
1002 12:58:13.936246 I2C: 00:15 enabled
1003 12:58:13.936298 scan_static_bus for PCI: 00:19.1 done
1004 12:58:13.936356 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1005 12:58:13.936447 PCI: 00:1d.0 scanning...
1006 12:58:13.936500 do_pci_scan_bridge for PCI: 00:1d.0
1007 12:58:13.936552 PCI: pci_scan_bus for bus 01
1008 12:58:13.936605 PCI: 01:00.0 [1c5c/174a] enabled
1009 12:58:13.936658 GENERIC: 0.0 enabled
1010 12:58:13.936710 Enabling Common Clock Configuration
1011 12:58:13.936763 L1 Sub-State supported from root port 29
1012 12:58:13.936817 L1 Sub-State Support = 0xf
1013 12:58:13.936869 CommonModeRestoreTime = 0x28
1014 12:58:13.936922 Power On Value = 0x16, Power On Scale = 0x0
1015 12:58:13.936975 ASPM: Enabled L1
1016 12:58:13.937027 PCIe: Max_Payload_Size adjusted to 128
1017 12:58:13.937081 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1018 12:58:13.937135 PCI: 00:1e.2 scanning...
1019 12:58:13.937188 scan_generic_bus for PCI: 00:1e.2
1020 12:58:13.937241 SPI: 00 enabled
1021 12:58:13.937294 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1022 12:58:13.937347 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1023 12:58:13.937400 PCI: 00:1e.3 scanning...
1024 12:58:13.937453 scan_generic_bus for PCI: 00:1e.3
1025 12:58:13.937513 SPI: 00 enabled
1026 12:58:13.937568 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1027 12:58:13.937624 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1028 12:58:13.937678 PCI: 00:1f.0 scanning...
1029 12:58:13.937731 scan_static_bus for PCI: 00:1f.0
1030 12:58:13.937784 PNP: 0c09.0 enabled
1031 12:58:13.937836 PNP: 0c09.0 scanning...
1032 12:58:13.937887 scan_static_bus for PNP: 0c09.0
1033 12:58:13.937939 scan_static_bus for PNP: 0c09.0 done
1034 12:58:13.937991 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1035 12:58:13.938043 scan_static_bus for PCI: 00:1f.0 done
1036 12:58:13.938096 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1037 12:58:13.938149 PCI: 00:1f.2 scanning...
1038 12:58:13.938201 scan_static_bus for PCI: 00:1f.2
1039 12:58:13.938253 GENERIC: 0.0 enabled
1040 12:58:13.938305 GENERIC: 0.0 scanning...
1041 12:58:13.938357 scan_static_bus for GENERIC: 0.0
1042 12:58:13.938409 GENERIC: 0.0 enabled
1043 12:58:13.938461 GENERIC: 1.0 enabled
1044 12:58:13.938513 scan_static_bus for GENERIC: 0.0 done
1045 12:58:13.938565 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1046 12:58:13.938618 scan_static_bus for PCI: 00:1f.2 done
1047 12:58:13.938669 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1048 12:58:13.938722 PCI: 00:1f.3 scanning...
1049 12:58:13.938774 scan_static_bus for PCI: 00:1f.3
1050 12:58:13.938826 scan_static_bus for PCI: 00:1f.3 done
1051 12:58:13.938878 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1052 12:58:13.938930 PCI: 00:1f.5 scanning...
1053 12:58:13.938982 scan_generic_bus for PCI: 00:1f.5
1054 12:58:13.939035 scan_generic_bus for PCI: 00:1f.5 done
1055 12:58:13.939086 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1056 12:58:13.939139 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1057 12:58:13.939191 scan_static_bus for Root Device done
1058 12:58:13.939244 scan_bus: bus Root Device finished in 736 msecs
1059 12:58:13.939296 done
1060 12:58:13.939348 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1061 12:58:13.939401 Chrome EC: UHEPI supported
1062 12:58:13.939453 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1063 12:58:13.939507 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1064 12:58:13.939560 SPI flash protection: WPSW=1 SRP0=0
1065 12:58:13.939613 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1066 12:58:13.939665 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1067 12:58:13.939718 found VGA at PCI: 00:02.0
1068 12:58:13.939771 Setting up VGA for PCI: 00:02.0
1069 12:58:13.940016 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1070 12:58:13.940077 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1071 12:58:13.940131 Allocating resources...
1072 12:58:13.940184 Reading resources...
1073 12:58:13.940237 Root Device read_resources bus 0 link: 0
1074 12:58:13.940290 DOMAIN: 0000 read_resources bus 0 link: 0
1075 12:58:13.940342 PCI: 00:04.0 read_resources bus 1 link: 0
1076 12:58:13.940401 PCI: 00:04.0 read_resources bus 1 link: 0 done
1077 12:58:13.940454 PCI: 00:0d.0 read_resources bus 0 link: 0
1078 12:58:13.940506 USB0 port 0 read_resources bus 0 link: 0
1079 12:58:13.940559 USB0 port 0 read_resources bus 0 link: 0 done
1080 12:58:13.940611 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1081 12:58:13.940664 PCI: 00:14.0 read_resources bus 0 link: 0
1082 12:58:13.940716 USB0 port 0 read_resources bus 0 link: 0
1083 12:58:13.940769 USB0 port 0 read_resources bus 0 link: 0 done
1084 12:58:13.940821 PCI: 00:14.0 read_resources bus 0 link: 0 done
1085 12:58:13.940874 PCI: 00:14.3 read_resources bus 0 link: 0
1086 12:58:13.940926 PCI: 00:14.3 read_resources bus 0 link: 0 done
1087 12:58:13.940979 PCI: 00:15.0 read_resources bus 0 link: 0
1088 12:58:13.941031 PCI: 00:15.0 read_resources bus 0 link: 0 done
1089 12:58:13.941084 PCI: 00:15.1 read_resources bus 0 link: 0
1090 12:58:13.941136 PCI: 00:15.1 read_resources bus 0 link: 0 done
1091 12:58:13.941188 PCI: 00:19.1 read_resources bus 0 link: 0
1092 12:58:13.941241 PCI: 00:19.1 read_resources bus 0 link: 0 done
1093 12:58:13.941305 PCI: 00:1d.0 read_resources bus 1 link: 0
1094 12:58:13.941399 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1095 12:58:13.941458 PCI: 00:1e.2 read_resources bus 2 link: 0
1096 12:58:13.941511 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1097 12:58:13.941564 PCI: 00:1e.3 read_resources bus 3 link: 0
1098 12:58:13.941617 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1099 12:58:13.941670 PCI: 00:1f.0 read_resources bus 0 link: 0
1100 12:58:13.941723 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1101 12:58:13.941776 PCI: 00:1f.2 read_resources bus 0 link: 0
1102 12:58:13.941829 GENERIC: 0.0 read_resources bus 0 link: 0
1103 12:58:13.941881 GENERIC: 0.0 read_resources bus 0 link: 0 done
1104 12:58:13.941934 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1105 12:58:13.941986 DOMAIN: 0000 read_resources bus 0 link: 0 done
1106 12:58:13.942038 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1107 12:58:13.942091 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1108 12:58:13.942143 Root Device read_resources bus 0 link: 0 done
1109 12:58:13.942195 Done reading resources.
1110 12:58:13.942248 Show resources in subtree (Root Device)...After reading.
1111 12:58:13.942300 Root Device child on link 0 DOMAIN: 0000
1112 12:58:13.942352 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1113 12:58:13.942405 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1114 12:58:13.942458 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1115 12:58:13.942511 PCI: 00:00.0
1116 12:58:13.942563 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1117 12:58:13.942617 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1118 12:58:13.942670 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1119 12:58:13.942724 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1120 12:58:13.942776 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1121 12:58:13.942829 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1122 12:58:13.942882 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1123 12:58:13.942935 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1124 12:58:13.942988 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1125 12:58:13.943073 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1126 12:58:13.943153 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1127 12:58:13.943208 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1128 12:58:13.943262 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1129 12:58:13.943363 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1130 12:58:13.943430 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1131 12:58:13.943484 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1132 12:58:13.943538 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1133 12:58:13.943592 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1134 12:58:13.943645 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1135 12:58:13.943888 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1136 12:58:13.943947 PCI: 00:02.0
1137 12:58:13.944001 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1138 12:58:13.944055 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1139 12:58:13.944108 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1140 12:58:13.944162 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1141 12:58:13.944214 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1142 12:58:13.944267 GENERIC: 0.0
1143 12:58:13.944320 PCI: 00:05.0
1144 12:58:13.944402 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1145 12:58:13.944471 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1146 12:58:13.944523 GENERIC: 0.0
1147 12:58:13.944575 PCI: 00:08.0
1148 12:58:13.944627 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1149 12:58:13.944680 PCI: 00:0a.0
1150 12:58:13.944732 PCI: 00:0d.0 child on link 0 USB0 port 0
1151 12:58:13.944784 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1152 12:58:13.944837 USB0 port 0 child on link 0 USB3 port 0
1153 12:58:13.944890 USB3 port 0
1154 12:58:13.944942 USB3 port 1
1155 12:58:13.944995 USB3 port 2
1156 12:58:13.945047 USB3 port 3
1157 12:58:13.945099 PCI: 00:14.0 child on link 0 USB0 port 0
1158 12:58:13.945152 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1159 12:58:13.945205 USB0 port 0 child on link 0 USB2 port 0
1160 12:58:13.945258 USB2 port 0
1161 12:58:13.945310 USB2 port 1
1162 12:58:13.945362 USB2 port 2
1163 12:58:13.945414 USB2 port 3
1164 12:58:13.945466 USB2 port 4
1165 12:58:13.945518 USB2 port 5
1166 12:58:13.945570 USB2 port 6
1167 12:58:13.945622 USB2 port 7
1168 12:58:13.945674 USB2 port 8
1169 12:58:13.945726 USB2 port 9
1170 12:58:13.945778 USB3 port 0
1171 12:58:13.945830 USB3 port 1
1172 12:58:13.945882 USB3 port 2
1173 12:58:13.945934 USB3 port 3
1174 12:58:13.945986 PCI: 00:14.2
1175 12:58:13.946038 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1176 12:58:13.946092 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1177 12:58:13.946145 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1178 12:58:13.946197 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1179 12:58:13.946250 GENERIC: 0.0
1180 12:58:13.946302 PCI: 00:15.0 child on link 0 I2C: 00:1a
1181 12:58:13.950261 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1182 12:58:13.954136 I2C: 00:1a
1183 12:58:13.954557 I2C: 00:31
1184 12:58:13.956913 I2C: 00:32
1185 12:58:13.960261 PCI: 00:15.1 child on link 0 I2C: 00:10
1186 12:58:13.970254 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 12:58:13.970497 I2C: 00:10
1188 12:58:13.973639 PCI: 00:15.2
1189 12:58:13.983961 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 12:58:13.984291 PCI: 00:15.3
1191 12:58:13.993855 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1192 12:58:13.997131 PCI: 00:16.0
1193 12:58:14.007312 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 12:58:14.007834 PCI: 00:19.0
1195 12:58:14.014055 PCI: 00:19.1 child on link 0 I2C: 00:15
1196 12:58:14.023575 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 12:58:14.024002 I2C: 00:15
1198 12:58:14.027468 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1199 12:58:14.037945 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1200 12:58:14.046724 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1201 12:58:14.056896 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1202 12:58:14.057396 GENERIC: 0.0
1203 12:58:14.060187 PCI: 01:00.0
1204 12:58:14.070217 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1205 12:58:14.080454 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1206 12:58:14.087355 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1207 12:58:14.090403 PCI: 00:1e.0
1208 12:58:14.100226 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1209 12:58:14.103635 PCI: 00:1e.2 child on link 0 SPI: 00
1210 12:58:14.113695 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1211 12:58:14.116672 SPI: 00
1212 12:58:14.119787 PCI: 00:1e.3 child on link 0 SPI: 00
1213 12:58:14.129664 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 12:58:14.130187 SPI: 00
1215 12:58:14.136822 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1216 12:58:14.142913 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1217 12:58:14.146451 PNP: 0c09.0
1218 12:58:14.153253 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1219 12:58:14.159645 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1220 12:58:14.169662 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1221 12:58:14.175919 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1222 12:58:14.183102 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1223 12:58:14.183238 GENERIC: 0.0
1224 12:58:14.186060 GENERIC: 1.0
1225 12:58:14.186191 PCI: 00:1f.3
1226 12:58:14.196015 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1227 12:58:14.206146 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1228 12:58:14.209174 PCI: 00:1f.5
1229 12:58:14.218970 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1230 12:58:14.222452 CPU_CLUSTER: 0 child on link 0 APIC: 00
1231 12:58:14.222553 APIC: 00
1232 12:58:14.225717 APIC: 01
1233 12:58:14.225841 APIC: 03
1234 12:58:14.229465 APIC: 05
1235 12:58:14.229579 APIC: 07
1236 12:58:14.229675 APIC: 06
1237 12:58:14.232416 APIC: 02
1238 12:58:14.232515 APIC: 04
1239 12:58:14.239411 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1240 12:58:14.245709 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1241 12:58:14.252264 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1242 12:58:14.259287 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1243 12:58:14.262682 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1244 12:58:14.265731 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1245 12:58:14.272884 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1246 12:58:14.278871 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1247 12:58:14.285420 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1248 12:58:14.292289 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1249 12:58:14.299156 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1250 12:58:14.305775 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1251 12:58:14.315545 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1252 12:58:14.322706 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1253 12:58:14.329392 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1254 12:58:14.332487 DOMAIN: 0000: Resource ranges:
1255 12:58:14.335717 * Base: 1000, Size: 800, Tag: 100
1256 12:58:14.339034 * Base: 1900, Size: e700, Tag: 100
1257 12:58:14.345452 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1258 12:58:14.352138 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1259 12:58:14.359379 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1260 12:58:14.365451 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1261 12:58:14.375346 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1262 12:58:14.382079 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1263 12:58:14.388755 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1264 12:58:14.395589 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1265 12:58:14.405752 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1266 12:58:14.411876 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1267 12:58:14.418537 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1268 12:58:14.428634 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1269 12:58:14.435281 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1270 12:58:14.441881 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1271 12:58:14.451784 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1272 12:58:14.458798 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1273 12:58:14.465305 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1274 12:58:14.475045 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1275 12:58:14.481668 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1276 12:58:14.488634 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1277 12:58:14.498436 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1278 12:58:14.505423 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1279 12:58:14.511506 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1280 12:58:14.521981 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1281 12:58:14.528307 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1282 12:58:14.532241 DOMAIN: 0000: Resource ranges:
1283 12:58:14.534818 * Base: 7fc00000, Size: 40400000, Tag: 200
1284 12:58:14.542062 * Base: d0000000, Size: 28000000, Tag: 200
1285 12:58:14.545346 * Base: fa000000, Size: 1000000, Tag: 200
1286 12:58:14.548146 * Base: fb001000, Size: 2fff000, Tag: 200
1287 12:58:14.551522 * Base: fe010000, Size: 2e000, Tag: 200
1288 12:58:14.558085 * Base: fe03f000, Size: d41000, Tag: 200
1289 12:58:14.561438 * Base: fed88000, Size: 8000, Tag: 200
1290 12:58:14.564768 * Base: fed93000, Size: d000, Tag: 200
1291 12:58:14.568063 * Base: feda2000, Size: 1e000, Tag: 200
1292 12:58:14.574777 * Base: fede0000, Size: 1220000, Tag: 200
1293 12:58:14.578381 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1294 12:58:14.584928 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1295 12:58:14.591290 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1296 12:58:14.598259 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1297 12:58:14.605198 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1298 12:58:14.611479 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1299 12:58:14.618145 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1300 12:58:14.624426 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1301 12:58:14.631162 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1302 12:58:14.637840 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1303 12:58:14.644328 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1304 12:58:14.651167 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1305 12:58:14.657941 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1306 12:58:14.664300 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1307 12:58:14.670938 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1308 12:58:14.677543 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1309 12:58:14.684633 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1310 12:58:14.690998 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1311 12:58:14.697391 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1312 12:58:14.704027 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1313 12:58:14.710639 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1314 12:58:14.717567 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1315 12:58:14.724084 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1316 12:58:14.730593 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1317 12:58:14.740525 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1318 12:58:14.744042 PCI: 00:1d.0: Resource ranges:
1319 12:58:14.747662 * Base: 7fc00000, Size: 100000, Tag: 200
1320 12:58:14.754511 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1321 12:58:14.760571 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1322 12:58:14.767255 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1323 12:58:14.777491 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1324 12:58:14.783622 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1325 12:58:14.787179 Root Device assign_resources, bus 0 link: 0
1326 12:58:14.790838 DOMAIN: 0000 assign_resources, bus 0 link: 0
1327 12:58:14.800754 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1328 12:58:14.807362 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1329 12:58:14.817989 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1330 12:58:14.824488 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1331 12:58:14.830915 PCI: 00:04.0 assign_resources, bus 1 link: 0
1332 12:58:14.834406 PCI: 00:04.0 assign_resources, bus 1 link: 0
1333 12:58:14.840609 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1334 12:58:14.850909 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1335 12:58:14.857524 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1336 12:58:14.864342 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1337 12:58:14.867515 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1338 12:58:14.877521 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1339 12:58:14.880894 PCI: 00:14.0 assign_resources, bus 0 link: 0
1340 12:58:14.884161 PCI: 00:14.0 assign_resources, bus 0 link: 0
1341 12:58:14.894384 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1342 12:58:14.901151 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1343 12:58:14.910705 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1344 12:58:14.914274 PCI: 00:14.3 assign_resources, bus 0 link: 0
1345 12:58:14.920692 PCI: 00:14.3 assign_resources, bus 0 link: 0
1346 12:58:14.927359 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1347 12:58:14.930354 PCI: 00:15.0 assign_resources, bus 0 link: 0
1348 12:58:14.937575 PCI: 00:15.0 assign_resources, bus 0 link: 0
1349 12:58:14.944250 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1350 12:58:14.950888 PCI: 00:15.1 assign_resources, bus 0 link: 0
1351 12:58:14.954188 PCI: 00:15.1 assign_resources, bus 0 link: 0
1352 12:58:14.963970 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1353 12:58:14.970890 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1354 12:58:14.980606 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1355 12:58:14.986954 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1356 12:58:14.990443 PCI: 00:19.1 assign_resources, bus 0 link: 0
1357 12:58:14.996799 PCI: 00:19.1 assign_resources, bus 0 link: 0
1358 12:58:15.003572 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1359 12:58:15.014235 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1360 12:58:15.023900 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1361 12:58:15.027016 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1362 12:58:15.036881 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1363 12:58:15.043656 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1364 12:58:15.053596 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1365 12:58:15.056901 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1366 12:58:15.066655 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1367 12:58:15.070280 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1368 12:58:15.074076 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1369 12:58:15.083425 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1370 12:58:15.086530 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1371 12:58:15.093223 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1372 12:58:15.096558 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1373 12:58:15.103102 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1374 12:58:15.106467 LPC: Trying to open IO window from 800 size 1ff
1375 12:58:15.116691 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1376 12:58:15.123006 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1377 12:58:15.129827 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1378 12:58:15.136275 DOMAIN: 0000 assign_resources, bus 0 link: 0
1379 12:58:15.139396 Root Device assign_resources, bus 0 link: 0
1380 12:58:15.143230 Done setting resources.
1381 12:58:15.149931 Show resources in subtree (Root Device)...After assigning values.
1382 12:58:15.153305 Root Device child on link 0 DOMAIN: 0000
1383 12:58:15.156702 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1384 12:58:15.166297 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1385 12:58:15.176448 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1386 12:58:15.179872 PCI: 00:00.0
1387 12:58:15.189583 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1388 12:58:15.199576 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1389 12:58:15.206183 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1390 12:58:15.216221 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1391 12:58:15.226338 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1392 12:58:15.235860 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1393 12:58:15.245683 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1394 12:58:15.255811 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1395 12:58:15.262454 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1396 12:58:15.272241 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1397 12:58:15.282110 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1398 12:58:15.292179 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1399 12:58:15.301969 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1400 12:58:15.308565 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1401 12:58:15.318662 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1402 12:58:15.328532 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1403 12:58:15.338378 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1404 12:58:15.348448 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1405 12:58:15.358472 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1406 12:58:15.368437 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1407 12:58:15.368520 PCI: 00:02.0
1408 12:58:15.378583 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1409 12:58:15.391443 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1410 12:58:15.398284 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1411 12:58:15.405020 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1412 12:58:15.414585 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1413 12:58:15.414669 GENERIC: 0.0
1414 12:58:15.418226 PCI: 00:05.0
1415 12:58:15.428038 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1416 12:58:15.431281 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1417 12:58:15.434829 GENERIC: 0.0
1418 12:58:15.434911 PCI: 00:08.0
1419 12:58:15.447776 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1420 12:58:15.447891 PCI: 00:0a.0
1421 12:58:15.451294 PCI: 00:0d.0 child on link 0 USB0 port 0
1422 12:58:15.464872 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1423 12:58:15.468004 USB0 port 0 child on link 0 USB3 port 0
1424 12:58:15.468086 USB3 port 0
1425 12:58:15.471046 USB3 port 1
1426 12:58:15.471127 USB3 port 2
1427 12:58:15.474712 USB3 port 3
1428 12:58:15.478086 PCI: 00:14.0 child on link 0 USB0 port 0
1429 12:58:15.487960 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1430 12:58:15.494514 USB0 port 0 child on link 0 USB2 port 0
1431 12:58:15.494685 USB2 port 0
1432 12:58:15.497919 USB2 port 1
1433 12:58:15.498040 USB2 port 2
1434 12:58:15.501117 USB2 port 3
1435 12:58:15.501239 USB2 port 4
1436 12:58:15.504068 USB2 port 5
1437 12:58:15.507784 USB2 port 6
1438 12:58:15.507917 USB2 port 7
1439 12:58:15.511184 USB2 port 8
1440 12:58:15.511300 USB2 port 9
1441 12:58:15.514538 USB3 port 0
1442 12:58:15.514651 USB3 port 1
1443 12:58:15.517755 USB3 port 2
1444 12:58:15.517869 USB3 port 3
1445 12:58:15.520845 PCI: 00:14.2
1446 12:58:15.531160 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1447 12:58:15.541014 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1448 12:58:15.544675 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1449 12:58:15.554524 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1450 12:58:15.557787 GENERIC: 0.0
1451 12:58:15.561037 PCI: 00:15.0 child on link 0 I2C: 00:1a
1452 12:58:15.570812 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1453 12:58:15.574193 I2C: 00:1a
1454 12:58:15.574324 I2C: 00:31
1455 12:58:15.577799 I2C: 00:32
1456 12:58:15.581057 PCI: 00:15.1 child on link 0 I2C: 00:10
1457 12:58:15.590849 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1458 12:58:15.594261 I2C: 00:10
1459 12:58:15.594408 PCI: 00:15.2
1460 12:58:15.604121 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1461 12:58:15.607412 PCI: 00:15.3
1462 12:58:15.617469 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1463 12:58:15.617606 PCI: 00:16.0
1464 12:58:15.630659 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1465 12:58:15.630784 PCI: 00:19.0
1466 12:58:15.633867 PCI: 00:19.1 child on link 0 I2C: 00:15
1467 12:58:15.644025 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1468 12:58:15.647832 I2C: 00:15
1469 12:58:15.650821 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1470 12:58:15.660534 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1471 12:58:15.673554 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1472 12:58:15.683808 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1473 12:58:15.683908 GENERIC: 0.0
1474 12:58:15.687426 PCI: 01:00.0
1475 12:58:15.696879 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1476 12:58:15.706808 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1477 12:58:15.717067 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1478 12:58:15.720549 PCI: 00:1e.0
1479 12:58:15.730481 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1480 12:58:15.733976 PCI: 00:1e.2 child on link 0 SPI: 00
1481 12:58:15.743641 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1482 12:58:15.747139 SPI: 00
1483 12:58:15.750281 PCI: 00:1e.3 child on link 0 SPI: 00
1484 12:58:15.760549 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1485 12:58:15.760658 SPI: 00
1486 12:58:15.767021 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1487 12:58:15.773371 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1488 12:58:15.776718 PNP: 0c09.0
1489 12:58:15.783753 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1490 12:58:15.790124 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1491 12:58:15.800313 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1492 12:58:15.806784 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1493 12:58:15.813340 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1494 12:58:15.813455 GENERIC: 0.0
1495 12:58:15.816595 GENERIC: 1.0
1496 12:58:15.816706 PCI: 00:1f.3
1497 12:58:15.829844 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1498 12:58:15.839696 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1499 12:58:15.839824 PCI: 00:1f.5
1500 12:58:15.849759 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1501 12:58:15.856303 CPU_CLUSTER: 0 child on link 0 APIC: 00
1502 12:58:15.856427 APIC: 00
1503 12:58:15.856492 APIC: 01
1504 12:58:15.859974 APIC: 03
1505 12:58:15.860056 APIC: 05
1506 12:58:15.862889 APIC: 07
1507 12:58:15.862971 APIC: 06
1508 12:58:15.863035 APIC: 02
1509 12:58:15.866586 APIC: 04
1510 12:58:15.870189 Done allocating resources.
1511 12:58:15.873271 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1512 12:58:15.880026 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1513 12:58:15.883289 Configure GPIOs for I2S audio on UP4.
1514 12:58:15.890574 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1515 12:58:15.893825 Enabling resources...
1516 12:58:15.897223 PCI: 00:00.0 subsystem <- 8086/9a12
1517 12:58:15.900656 PCI: 00:00.0 cmd <- 06
1518 12:58:15.903763 PCI: 00:02.0 subsystem <- 8086/9a40
1519 12:58:15.907196 PCI: 00:02.0 cmd <- 03
1520 12:58:15.910468 PCI: 00:04.0 subsystem <- 8086/9a03
1521 12:58:15.910550 PCI: 00:04.0 cmd <- 02
1522 12:58:15.917430 PCI: 00:05.0 subsystem <- 8086/9a19
1523 12:58:15.917511 PCI: 00:05.0 cmd <- 02
1524 12:58:15.920919 PCI: 00:08.0 subsystem <- 8086/9a11
1525 12:58:15.924117 PCI: 00:08.0 cmd <- 06
1526 12:58:15.927305 PCI: 00:0d.0 subsystem <- 8086/9a13
1527 12:58:15.930954 PCI: 00:0d.0 cmd <- 02
1528 12:58:15.934045 PCI: 00:14.0 subsystem <- 8086/a0ed
1529 12:58:15.937433 PCI: 00:14.0 cmd <- 02
1530 12:58:15.940710 PCI: 00:14.2 subsystem <- 8086/a0ef
1531 12:58:15.944695 PCI: 00:14.2 cmd <- 02
1532 12:58:15.947893 PCI: 00:14.3 subsystem <- 8086/a0f0
1533 12:58:15.950824 PCI: 00:14.3 cmd <- 02
1534 12:58:15.954280 PCI: 00:15.0 subsystem <- 8086/a0e8
1535 12:58:15.954361 PCI: 00:15.0 cmd <- 02
1536 12:58:15.961011 PCI: 00:15.1 subsystem <- 8086/a0e9
1537 12:58:15.961092 PCI: 00:15.1 cmd <- 02
1538 12:58:15.964377 PCI: 00:15.2 subsystem <- 8086/a0ea
1539 12:58:15.967633 PCI: 00:15.2 cmd <- 02
1540 12:58:15.971157 PCI: 00:15.3 subsystem <- 8086/a0eb
1541 12:58:15.974454 PCI: 00:15.3 cmd <- 02
1542 12:58:15.977817 PCI: 00:16.0 subsystem <- 8086/a0e0
1543 12:58:15.981126 PCI: 00:16.0 cmd <- 02
1544 12:58:15.984541 PCI: 00:19.1 subsystem <- 8086/a0c6
1545 12:58:15.988022 PCI: 00:19.1 cmd <- 02
1546 12:58:15.991196 PCI: 00:1d.0 bridge ctrl <- 0013
1547 12:58:15.994251 PCI: 00:1d.0 subsystem <- 8086/a0b0
1548 12:58:15.998103 PCI: 00:1d.0 cmd <- 06
1549 12:58:16.001180 PCI: 00:1e.0 subsystem <- 8086/a0a8
1550 12:58:16.001262 PCI: 00:1e.0 cmd <- 06
1551 12:58:16.007766 PCI: 00:1e.2 subsystem <- 8086/a0aa
1552 12:58:16.007848 PCI: 00:1e.2 cmd <- 06
1553 12:58:16.010957 PCI: 00:1e.3 subsystem <- 8086/a0ab
1554 12:58:16.014681 PCI: 00:1e.3 cmd <- 02
1555 12:58:16.017505 PCI: 00:1f.0 subsystem <- 8086/a087
1556 12:58:16.020803 PCI: 00:1f.0 cmd <- 407
1557 12:58:16.024534 PCI: 00:1f.3 subsystem <- 8086/a0c8
1558 12:58:16.027893 PCI: 00:1f.3 cmd <- 02
1559 12:58:16.031047 PCI: 00:1f.5 subsystem <- 8086/a0a4
1560 12:58:16.034119 PCI: 00:1f.5 cmd <- 406
1561 12:58:16.037958 PCI: 01:00.0 cmd <- 02
1562 12:58:16.042533 done.
1563 12:58:16.045933 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1564 12:58:16.049234 Initializing devices...
1565 12:58:16.052755 Root Device init
1566 12:58:16.055780 Chrome EC: Set SMI mask to 0x0000000000000000
1567 12:58:16.063929 Chrome EC: clear events_b mask to 0x0000000000000000
1568 12:58:16.070471 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1569 12:58:16.077271 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1570 12:58:16.083809 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1571 12:58:16.086834 Chrome EC: Set WAKE mask to 0x0000000000000000
1572 12:58:16.095004 fw_config match found: DB_USB=USB3_ACTIVE
1573 12:58:16.097998 Configure Right Type-C port orientation for retimer
1574 12:58:16.101305 Root Device init finished in 47 msecs
1575 12:58:16.105260 PCI: 00:00.0 init
1576 12:58:16.108650 CPU TDP = 9 Watts
1577 12:58:16.108738 CPU PL1 = 9 Watts
1578 12:58:16.111855 CPU PL2 = 40 Watts
1579 12:58:16.115676 CPU PL4 = 83 Watts
1580 12:58:16.119243 PCI: 00:00.0 init finished in 8 msecs
1581 12:58:16.119328 PCI: 00:02.0 init
1582 12:58:16.122174 GMA: Found VBT in CBFS
1583 12:58:16.125503 GMA: Found valid VBT in CBFS
1584 12:58:16.132330 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1585 12:58:16.138661 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1586 12:58:16.141737 PCI: 00:02.0 init finished in 18 msecs
1587 12:58:16.145173 PCI: 00:05.0 init
1588 12:58:16.148692 PCI: 00:05.0 init finished in 0 msecs
1589 12:58:16.151531 PCI: 00:08.0 init
1590 12:58:16.155198 PCI: 00:08.0 init finished in 0 msecs
1591 12:58:16.158498 PCI: 00:14.0 init
1592 12:58:16.161880 PCI: 00:14.0 init finished in 0 msecs
1593 12:58:16.164974 PCI: 00:14.2 init
1594 12:58:16.168079 PCI: 00:14.2 init finished in 0 msecs
1595 12:58:16.171633 PCI: 00:15.0 init
1596 12:58:16.174627 I2C bus 0 version 0x3230302a
1597 12:58:16.178549 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1598 12:58:16.181418 PCI: 00:15.0 init finished in 6 msecs
1599 12:58:16.181499 PCI: 00:15.1 init
1600 12:58:16.184571 I2C bus 1 version 0x3230302a
1601 12:58:16.188256 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1602 12:58:16.194936 PCI: 00:15.1 init finished in 6 msecs
1603 12:58:16.195017 PCI: 00:15.2 init
1604 12:58:16.198115 I2C bus 2 version 0x3230302a
1605 12:58:16.201386 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1606 12:58:16.204768 PCI: 00:15.2 init finished in 6 msecs
1607 12:58:16.208091 PCI: 00:15.3 init
1608 12:58:16.211336 I2C bus 3 version 0x3230302a
1609 12:58:16.214998 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1610 12:58:16.217912 PCI: 00:15.3 init finished in 6 msecs
1611 12:58:16.221583 PCI: 00:16.0 init
1612 12:58:16.224903 PCI: 00:16.0 init finished in 0 msecs
1613 12:58:16.227930 PCI: 00:19.1 init
1614 12:58:16.231315 I2C bus 5 version 0x3230302a
1615 12:58:16.234486 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1616 12:58:16.237805 PCI: 00:19.1 init finished in 6 msecs
1617 12:58:16.241217 PCI: 00:1d.0 init
1618 12:58:16.241298 Initializing PCH PCIe bridge.
1619 12:58:16.247684 PCI: 00:1d.0 init finished in 3 msecs
1620 12:58:16.251118 PCI: 00:1f.0 init
1621 12:58:16.254581 IOAPIC: Initializing IOAPIC at 0xfec00000
1622 12:58:16.257717 IOAPIC: Bootstrap Processor Local APIC = 0x00
1623 12:58:16.260924 IOAPIC: ID = 0x02
1624 12:58:16.264272 IOAPIC: Dumping registers
1625 12:58:16.264411 reg 0x0000: 0x02000000
1626 12:58:16.267529 reg 0x0001: 0x00770020
1627 12:58:16.271046 reg 0x0002: 0x00000000
1628 12:58:16.274157 PCI: 00:1f.0 init finished in 21 msecs
1629 12:58:16.277473 PCI: 00:1f.2 init
1630 12:58:16.281230 Disabling ACPI via APMC.
1631 12:58:16.281310 APMC done.
1632 12:58:16.284625 PCI: 00:1f.2 init finished in 5 msecs
1633 12:58:16.297782 PCI: 01:00.0 init
1634 12:58:16.301330 PCI: 01:00.0 init finished in 0 msecs
1635 12:58:16.304550 PNP: 0c09.0 init
1636 12:58:16.308109 Google Chrome EC uptime: 10.184 seconds
1637 12:58:16.314348 Google Chrome AP resets since EC boot: 0
1638 12:58:16.317721 Google Chrome most recent AP reset causes:
1639 12:58:16.324845 Google Chrome EC reset flags at last EC boot: reset-pin | hard
1640 12:58:16.327653 PNP: 0c09.0 init finished in 19 msecs
1641 12:58:16.332911 Devices initialized
1642 12:58:16.336073 Show all devs... After init.
1643 12:58:16.339532 Root Device: enabled 1
1644 12:58:16.339613 DOMAIN: 0000: enabled 1
1645 12:58:16.343144 CPU_CLUSTER: 0: enabled 1
1646 12:58:16.346334 PCI: 00:00.0: enabled 1
1647 12:58:16.349588 PCI: 00:02.0: enabled 1
1648 12:58:16.349670 PCI: 00:04.0: enabled 1
1649 12:58:16.353217 PCI: 00:05.0: enabled 1
1650 12:58:16.356272 PCI: 00:06.0: enabled 0
1651 12:58:16.359738 PCI: 00:07.0: enabled 0
1652 12:58:16.359818 PCI: 00:07.1: enabled 0
1653 12:58:16.362629 PCI: 00:07.2: enabled 0
1654 12:58:16.365940 PCI: 00:07.3: enabled 0
1655 12:58:16.369085 PCI: 00:08.0: enabled 1
1656 12:58:16.369166 PCI: 00:09.0: enabled 0
1657 12:58:16.372959 PCI: 00:0a.0: enabled 0
1658 12:58:16.375733 PCI: 00:0d.0: enabled 1
1659 12:58:16.379482 PCI: 00:0d.1: enabled 0
1660 12:58:16.379563 PCI: 00:0d.2: enabled 0
1661 12:58:16.382721 PCI: 00:0d.3: enabled 0
1662 12:58:16.385996 PCI: 00:0e.0: enabled 0
1663 12:58:16.386077 PCI: 00:10.2: enabled 1
1664 12:58:16.389448 PCI: 00:10.6: enabled 0
1665 12:58:16.392483 PCI: 00:10.7: enabled 0
1666 12:58:16.395952 PCI: 00:12.0: enabled 0
1667 12:58:16.396032 PCI: 00:12.6: enabled 0
1668 12:58:16.399065 PCI: 00:13.0: enabled 0
1669 12:58:16.403186 PCI: 00:14.0: enabled 1
1670 12:58:16.406073 PCI: 00:14.1: enabled 0
1671 12:58:16.406156 PCI: 00:14.2: enabled 1
1672 12:58:16.409103 PCI: 00:14.3: enabled 1
1673 12:58:16.412632 PCI: 00:15.0: enabled 1
1674 12:58:16.415964 PCI: 00:15.1: enabled 1
1675 12:58:16.416047 PCI: 00:15.2: enabled 1
1676 12:58:16.419117 PCI: 00:15.3: enabled 1
1677 12:58:16.422433 PCI: 00:16.0: enabled 1
1678 12:58:16.425726 PCI: 00:16.1: enabled 0
1679 12:58:16.425809 PCI: 00:16.2: enabled 0
1680 12:58:16.428986 PCI: 00:16.3: enabled 0
1681 12:58:16.432340 PCI: 00:16.4: enabled 0
1682 12:58:16.432460 PCI: 00:16.5: enabled 0
1683 12:58:16.435528 PCI: 00:17.0: enabled 0
1684 12:58:16.438871 PCI: 00:19.0: enabled 0
1685 12:58:16.442664 PCI: 00:19.1: enabled 1
1686 12:58:16.442746 PCI: 00:19.2: enabled 0
1687 12:58:16.445532 PCI: 00:1c.0: enabled 1
1688 12:58:16.448910 PCI: 00:1c.1: enabled 0
1689 12:58:16.452358 PCI: 00:1c.2: enabled 0
1690 12:58:16.452475 PCI: 00:1c.3: enabled 0
1691 12:58:16.455376 PCI: 00:1c.4: enabled 0
1692 12:58:16.458616 PCI: 00:1c.5: enabled 0
1693 12:58:16.462084 PCI: 00:1c.6: enabled 1
1694 12:58:16.462166 PCI: 00:1c.7: enabled 0
1695 12:58:16.465339 PCI: 00:1d.0: enabled 1
1696 12:58:16.468746 PCI: 00:1d.1: enabled 0
1697 12:58:16.472341 PCI: 00:1d.2: enabled 1
1698 12:58:16.472463 PCI: 00:1d.3: enabled 0
1699 12:58:16.475433 PCI: 00:1e.0: enabled 1
1700 12:58:16.478491 PCI: 00:1e.1: enabled 0
1701 12:58:16.478574 PCI: 00:1e.2: enabled 1
1702 12:58:16.481883 PCI: 00:1e.3: enabled 1
1703 12:58:16.485439 PCI: 00:1f.0: enabled 1
1704 12:58:16.488670 PCI: 00:1f.1: enabled 0
1705 12:58:16.488752 PCI: 00:1f.2: enabled 1
1706 12:58:16.492124 PCI: 00:1f.3: enabled 1
1707 12:58:16.495298 PCI: 00:1f.4: enabled 0
1708 12:58:16.498726 PCI: 00:1f.5: enabled 1
1709 12:58:16.498808 PCI: 00:1f.6: enabled 0
1710 12:58:16.502134 PCI: 00:1f.7: enabled 0
1711 12:58:16.505172 APIC: 00: enabled 1
1712 12:58:16.505255 GENERIC: 0.0: enabled 1
1713 12:58:16.508685 GENERIC: 0.0: enabled 1
1714 12:58:16.511712 GENERIC: 1.0: enabled 1
1715 12:58:16.515295 GENERIC: 0.0: enabled 1
1716 12:58:16.515378 GENERIC: 1.0: enabled 1
1717 12:58:16.518493 USB0 port 0: enabled 1
1718 12:58:16.521806 GENERIC: 0.0: enabled 1
1719 12:58:16.525286 USB0 port 0: enabled 1
1720 12:58:16.525369 GENERIC: 0.0: enabled 1
1721 12:58:16.528314 I2C: 00:1a: enabled 1
1722 12:58:16.531695 I2C: 00:31: enabled 1
1723 12:58:16.531777 I2C: 00:32: enabled 1
1724 12:58:16.535252 I2C: 00:10: enabled 1
1725 12:58:16.538254 I2C: 00:15: enabled 1
1726 12:58:16.538337 GENERIC: 0.0: enabled 0
1727 12:58:16.541730 GENERIC: 1.0: enabled 0
1728 12:58:16.544879 GENERIC: 0.0: enabled 1
1729 12:58:16.548501 SPI: 00: enabled 1
1730 12:58:16.548588 SPI: 00: enabled 1
1731 12:58:16.551343 PNP: 0c09.0: enabled 1
1732 12:58:16.554668 GENERIC: 0.0: enabled 1
1733 12:58:16.554748 USB3 port 0: enabled 1
1734 12:58:16.557979 USB3 port 1: enabled 1
1735 12:58:16.561539 USB3 port 2: enabled 0
1736 12:58:16.561621 USB3 port 3: enabled 0
1737 12:58:16.565182 USB2 port 0: enabled 0
1738 12:58:16.568204 USB2 port 1: enabled 1
1739 12:58:16.568284 USB2 port 2: enabled 1
1740 12:58:16.571238 USB2 port 3: enabled 0
1741 12:58:16.574593 USB2 port 4: enabled 1
1742 12:58:16.577849 USB2 port 5: enabled 0
1743 12:58:16.577934 USB2 port 6: enabled 0
1744 12:58:16.581495 USB2 port 7: enabled 0
1745 12:58:16.584546 USB2 port 8: enabled 0
1746 12:58:16.584645 USB2 port 9: enabled 0
1747 12:58:16.588086 USB3 port 0: enabled 0
1748 12:58:16.591518 USB3 port 1: enabled 1
1749 12:58:16.594958 USB3 port 2: enabled 0
1750 12:58:16.595038 USB3 port 3: enabled 0
1751 12:58:16.598150 GENERIC: 0.0: enabled 1
1752 12:58:16.601436 GENERIC: 1.0: enabled 1
1753 12:58:16.601516 APIC: 01: enabled 1
1754 12:58:16.604532 APIC: 03: enabled 1
1755 12:58:16.607992 APIC: 05: enabled 1
1756 12:58:16.608096 APIC: 07: enabled 1
1757 12:58:16.611497 APIC: 06: enabled 1
1758 12:58:16.611578 APIC: 02: enabled 1
1759 12:58:16.614564 APIC: 04: enabled 1
1760 12:58:16.618096 PCI: 01:00.0: enabled 1
1761 12:58:16.621072 BS: BS_DEV_INIT run times (exec / console): 34 / 536 ms
1762 12:58:16.627875 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1763 12:58:16.630914 ELOG: NV offset 0xf30000 size 0x1000
1764 12:58:16.637877 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1765 12:58:16.644612 ELOG: Event(17) added with size 13 at 2024-05-02 12:58:16 UTC
1766 12:58:16.651166 ELOG: Event(92) added with size 9 at 2024-05-02 12:58:16 UTC
1767 12:58:16.658061 ELOG: Event(93) added with size 9 at 2024-05-02 12:58:16 UTC
1768 12:58:16.664313 ELOG: Event(9E) added with size 10 at 2024-05-02 12:58:16 UTC
1769 12:58:16.670898 ELOG: Event(9F) added with size 14 at 2024-05-02 12:58:16 UTC
1770 12:58:16.677928 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1771 12:58:16.684372 ELOG: Event(A1) added with size 10 at 2024-05-02 12:58:16 UTC
1772 12:58:16.691182 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
1773 12:58:16.697624 ELOG: Event(A0) added with size 9 at 2024-05-02 12:58:16 UTC
1774 12:58:16.701232 elog_add_boot_reason: Logged dev mode boot
1775 12:58:16.707994 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1776 12:58:16.708077 Finalize devices...
1777 12:58:16.711210 Devices finalized
1778 12:58:16.718256 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1779 12:58:16.720736 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1780 12:58:16.727479 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1781 12:58:16.730976 ME: HFSTS1 : 0x80030055
1782 12:58:16.737719 ME: HFSTS2 : 0x30280116
1783 12:58:16.740780 ME: HFSTS3 : 0x00000050
1784 12:58:16.744562 ME: HFSTS4 : 0x00004000
1785 12:58:16.750603 ME: HFSTS5 : 0x00000000
1786 12:58:16.753972 ME: HFSTS6 : 0x00400006
1787 12:58:16.757462 ME: Manufacturing Mode : YES
1788 12:58:16.760472 ME: SPI Protection Mode Enabled : NO
1789 12:58:16.764081 ME: FW Partition Table : OK
1790 12:58:16.770505 ME: Bringup Loader Failure : NO
1791 12:58:16.773766 ME: Firmware Init Complete : NO
1792 12:58:16.777270 ME: Boot Options Present : NO
1793 12:58:16.780258 ME: Update In Progress : NO
1794 12:58:16.783662 ME: D0i3 Support : YES
1795 12:58:16.787256 ME: Low Power State Enabled : NO
1796 12:58:16.790594 ME: CPU Replaced : YES
1797 12:58:16.796933 ME: CPU Replacement Valid : YES
1798 12:58:16.800202 ME: Current Working State : 5
1799 12:58:16.804117 ME: Current Operation State : 1
1800 12:58:16.807170 ME: Current Operation Mode : 3
1801 12:58:16.810422 ME: Error Code : 0
1802 12:58:16.813976 ME: Enhanced Debug Mode : NO
1803 12:58:16.816928 ME: CPU Debug Disabled : YES
1804 12:58:16.820216 ME: TXT Support : NO
1805 12:58:16.826646 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1806 12:58:16.833793 ELOG: Event(91) added with size 10 at 2024-05-02 12:58:16 UTC
1807 12:58:16.840270 Chrome EC: clear events_b mask to 0x0000000020004000
1808 12:58:16.847063 BS: BS_WRITE_TABLES entry times (exec / console): 2 / 11 ms
1809 12:58:16.853563 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1810 12:58:16.857154 CBFS: 'fallback/slic' not found.
1811 12:58:16.860701 ACPI: Writing ACPI tables at 76b01000.
1812 12:58:16.863737 ACPI: * FACS
1813 12:58:16.863816 ACPI: * DSDT
1814 12:58:16.867026 Ramoops buffer: 0x100000@0x76a00000.
1815 12:58:16.873872 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1816 12:58:16.877110 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1817 12:58:16.880139 Google Chrome EC: version:
1818 12:58:16.883597 ro: voema_v2.0.7540-147f8d37d1
1819 12:58:16.887277 rw: voema_v2.0.7540-147f8d37d1
1820 12:58:16.890384 running image: 1
1821 12:58:16.896854 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1822 12:58:16.900277 ACPI: * FADT
1823 12:58:16.900380 SCI is IRQ9
1824 12:58:16.903559 ACPI: added table 1/32, length now 40
1825 12:58:16.907030 ACPI: * SSDT
1826 12:58:16.910420 Found 1 CPU(s) with 8 core(s) each.
1827 12:58:16.913314 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1828 12:58:16.920040 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1829 12:58:16.923381 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1830 12:58:16.926922 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1831 12:58:16.933446 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1832 12:58:16.940117 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1833 12:58:16.943412 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1834 12:58:16.949941 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1835 12:58:16.956486 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1836 12:58:16.959860 \_SB.PCI0.RP09: Added StorageD3Enable property
1837 12:58:16.963370 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1838 12:58:16.970088 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1839 12:58:16.976562 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1840 12:58:16.979911 PS2K: Passing 80 keymaps to kernel
1841 12:58:16.986469 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1842 12:58:16.993208 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1843 12:58:16.999981 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1844 12:58:17.006062 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1845 12:58:17.012849 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1846 12:58:17.019818 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1847 12:58:17.026237 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1848 12:58:17.032685 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1849 12:58:17.036088 ACPI: added table 2/32, length now 44
1850 12:58:17.036171 ACPI: * MCFG
1851 12:58:17.039278 ACPI: added table 3/32, length now 48
1852 12:58:17.042822 ACPI: * TPM2
1853 12:58:17.046289 TPM2 log created at 0x769f0000
1854 12:58:17.049487 ACPI: added table 4/32, length now 52
1855 12:58:17.049597 ACPI: * MADT
1856 12:58:17.052797 SCI is IRQ9
1857 12:58:17.056140 ACPI: added table 5/32, length now 56
1858 12:58:17.059256 current = 76b09850
1859 12:58:17.059336 ACPI: * DMAR
1860 12:58:17.062823 ACPI: added table 6/32, length now 60
1861 12:58:17.066288 ACPI: added table 7/32, length now 64
1862 12:58:17.069283 ACPI: * HPET
1863 12:58:17.072577 ACPI: added table 8/32, length now 68
1864 12:58:17.072658 ACPI: done.
1865 12:58:17.075955 ACPI tables: 35216 bytes.
1866 12:58:17.079133 smbios_write_tables: 769ef000
1867 12:58:17.082626 EC returned error result code 3
1868 12:58:17.085855 Couldn't obtain OEM name from CBI
1869 12:58:17.089121 Create SMBIOS type 16
1870 12:58:17.092244 Create SMBIOS type 17
1871 12:58:17.095997 GENERIC: 0.0 (WIFI Device)
1872 12:58:17.096078 SMBIOS tables: 1750 bytes.
1873 12:58:17.102418 Writing table forward entry at 0x00000500
1874 12:58:17.105503 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1875 12:58:17.112272 Writing coreboot table at 0x76b25000
1876 12:58:17.115462 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1877 12:58:17.122590 1. 0000000000001000-000000000009ffff: RAM
1878 12:58:17.125622 2. 00000000000a0000-00000000000fffff: RESERVED
1879 12:58:17.129095 3. 0000000000100000-00000000769eefff: RAM
1880 12:58:17.135479 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1881 12:58:17.142079 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1882 12:58:17.145796 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1883 12:58:17.152015 7. 0000000077000000-000000007fbfffff: RESERVED
1884 12:58:17.155414 8. 00000000c0000000-00000000cfffffff: RESERVED
1885 12:58:17.161809 9. 00000000f8000000-00000000f9ffffff: RESERVED
1886 12:58:17.165204 10. 00000000fb000000-00000000fb000fff: RESERVED
1887 12:58:17.171872 11. 00000000fe000000-00000000fe00ffff: RESERVED
1888 12:58:17.175467 12. 00000000fed80000-00000000fed87fff: RESERVED
1889 12:58:17.181590 13. 00000000fed90000-00000000fed92fff: RESERVED
1890 12:58:17.185158 14. 00000000feda0000-00000000feda1fff: RESERVED
1891 12:58:17.188526 15. 00000000fedc0000-00000000feddffff: RESERVED
1892 12:58:17.195201 16. 0000000100000000-00000002803fffff: RAM
1893 12:58:17.198828 Passing 4 GPIOs to payload:
1894 12:58:17.201888 NAME | PORT | POLARITY | VALUE
1895 12:58:17.208431 lid | undefined | high | high
1896 12:58:17.211653 power | undefined | high | low
1897 12:58:17.218262 oprom | undefined | high | low
1898 12:58:17.225312 EC in RW | 0x000000e5 | high | low
1899 12:58:17.228214 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 2a99
1900 12:58:17.231832 coreboot table: 1576 bytes.
1901 12:58:17.234829 IMD ROOT 0. 0x76fff000 0x00001000
1902 12:58:17.241779 IMD SMALL 1. 0x76ffe000 0x00001000
1903 12:58:17.245437 FSP MEMORY 2. 0x76c4e000 0x003b0000
1904 12:58:17.248322 VPD 3. 0x76c4d000 0x00000367
1905 12:58:17.251586 RO MCACHE 4. 0x76c4c000 0x00000fdc
1906 12:58:17.254888 CONSOLE 5. 0x76c2c000 0x00020000
1907 12:58:17.258075 FMAP 6. 0x76c2b000 0x00000578
1908 12:58:17.261577 TIME STAMP 7. 0x76c2a000 0x00000910
1909 12:58:17.264695 VBOOT WORK 8. 0x76c16000 0x00014000
1910 12:58:17.271538 ROMSTG STCK 9. 0x76c15000 0x00001000
1911 12:58:17.274625 AFTER CAR 10. 0x76c0a000 0x0000b000
1912 12:58:17.278524 RAMSTAGE 11. 0x76b97000 0x00073000
1913 12:58:17.281448 REFCODE 12. 0x76b42000 0x00055000
1914 12:58:17.284879 SMM BACKUP 13. 0x76b32000 0x00010000
1915 12:58:17.288179 4f444749 14. 0x76b30000 0x00002000
1916 12:58:17.291464 EXT VBT15. 0x76b2d000 0x0000219f
1917 12:58:17.294674 COREBOOT 16. 0x76b25000 0x00008000
1918 12:58:17.298132 ACPI 17. 0x76b01000 0x00024000
1919 12:58:17.304908 ACPI GNVS 18. 0x76b00000 0x00001000
1920 12:58:17.308170 RAMOOPS 19. 0x76a00000 0x00100000
1921 12:58:17.311429 TPM2 TCGLOG20. 0x769f0000 0x00010000
1922 12:58:17.315191 SMBIOS 21. 0x769ef000 0x00000800
1923 12:58:17.315274 IMD small region:
1924 12:58:17.321542 IMD ROOT 0. 0x76ffec00 0x00000400
1925 12:58:17.324693 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1926 12:58:17.327948 POWER STATE 2. 0x76ffeb80 0x00000044
1927 12:58:17.331347 ROMSTAGE 3. 0x76ffeb60 0x00000004
1928 12:58:17.334580 MEM INFO 4. 0x76ffe980 0x000001e0
1929 12:58:17.341209 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1930 12:58:17.344998 MTRR: Physical address space:
1931 12:58:17.351469 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1932 12:58:17.358229 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1933 12:58:17.364509 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1934 12:58:17.371218 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1935 12:58:17.374636 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1936 12:58:17.380977 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1937 12:58:17.387490 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1938 12:58:17.391274 MTRR: Fixed MSR 0x250 0x0606060606060606
1939 12:58:17.397932 MTRR: Fixed MSR 0x258 0x0606060606060606
1940 12:58:17.400820 MTRR: Fixed MSR 0x259 0x0000000000000000
1941 12:58:17.404327 MTRR: Fixed MSR 0x268 0x0606060606060606
1942 12:58:17.407600 MTRR: Fixed MSR 0x269 0x0606060606060606
1943 12:58:17.414127 MTRR: Fixed MSR 0x26a 0x0606060606060606
1944 12:58:17.417662 MTRR: Fixed MSR 0x26b 0x0606060606060606
1945 12:58:17.420661 MTRR: Fixed MSR 0x26c 0x0606060606060606
1946 12:58:17.424004 MTRR: Fixed MSR 0x26d 0x0606060606060606
1947 12:58:17.430659 MTRR: Fixed MSR 0x26e 0x0606060606060606
1948 12:58:17.433936 MTRR: Fixed MSR 0x26f 0x0606060606060606
1949 12:58:17.437236 call enable_fixed_mtrr()
1950 12:58:17.440594 CPU physical address size: 39 bits
1951 12:58:17.444037 MTRR: default type WB/UC MTRR counts: 6/6.
1952 12:58:17.447178 MTRR: UC selected as default type.
1953 12:58:17.453712 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1954 12:58:17.460284 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1955 12:58:17.467158 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1956 12:58:17.473679 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1957 12:58:17.480469 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1958 12:58:17.486935 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1959 12:58:17.487035
1960 12:58:17.490065 MTRR check
1961 12:58:17.490148 Fixed MTRRs : Enabled
1962 12:58:17.493512 Variable MTRRs: Enabled
1963 12:58:17.493595
1964 12:58:17.496779 MTRR: Fixed MSR 0x250 0x0606060606060606
1965 12:58:17.503569 MTRR: Fixed MSR 0x258 0x0606060606060606
1966 12:58:17.507591 MTRR: Fixed MSR 0x259 0x0000000000000000
1967 12:58:17.510642 MTRR: Fixed MSR 0x268 0x0606060606060606
1968 12:58:17.513557 MTRR: Fixed MSR 0x269 0x0606060606060606
1969 12:58:17.519912 MTRR: Fixed MSR 0x26a 0x0606060606060606
1970 12:58:17.523196 MTRR: Fixed MSR 0x26b 0x0606060606060606
1971 12:58:17.526702 MTRR: Fixed MSR 0x26c 0x0606060606060606
1972 12:58:17.530162 MTRR: Fixed MSR 0x26d 0x0606060606060606
1973 12:58:17.533906 MTRR: Fixed MSR 0x26e 0x0606060606060606
1974 12:58:17.540123 MTRR: Fixed MSR 0x26f 0x0606060606060606
1975 12:58:17.546677 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1976 12:58:17.550131 call enable_fixed_mtrr()
1977 12:58:17.556880 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
1978 12:58:17.559818 CPU physical address size: 39 bits
1979 12:58:17.566935 Checking segment from ROM address 0xffc02b38
1980 12:58:17.569752 MTRR: Fixed MSR 0x250 0x0606060606060606
1981 12:58:17.573089 MTRR: Fixed MSR 0x250 0x0606060606060606
1982 12:58:17.576424 MTRR: Fixed MSR 0x258 0x0606060606060606
1983 12:58:17.583015 MTRR: Fixed MSR 0x259 0x0000000000000000
1984 12:58:17.586474 MTRR: Fixed MSR 0x268 0x0606060606060606
1985 12:58:17.590060 MTRR: Fixed MSR 0x269 0x0606060606060606
1986 12:58:17.593802 MTRR: Fixed MSR 0x26a 0x0606060606060606
1987 12:58:17.596670 MTRR: Fixed MSR 0x26b 0x0606060606060606
1988 12:58:17.602716 MTRR: Fixed MSR 0x26c 0x0606060606060606
1989 12:58:17.606379 MTRR: Fixed MSR 0x26d 0x0606060606060606
1990 12:58:17.609988 MTRR: Fixed MSR 0x26e 0x0606060606060606
1991 12:58:17.612833 MTRR: Fixed MSR 0x26f 0x0606060606060606
1992 12:58:17.620693 MTRR: Fixed MSR 0x258 0x0606060606060606
1993 12:58:17.620776 call enable_fixed_mtrr()
1994 12:58:17.627262 MTRR: Fixed MSR 0x259 0x0000000000000000
1995 12:58:17.630752 MTRR: Fixed MSR 0x268 0x0606060606060606
1996 12:58:17.633774 MTRR: Fixed MSR 0x269 0x0606060606060606
1997 12:58:17.637065 MTRR: Fixed MSR 0x26a 0x0606060606060606
1998 12:58:17.643698 MTRR: Fixed MSR 0x26b 0x0606060606060606
1999 12:58:17.647171 MTRR: Fixed MSR 0x26c 0x0606060606060606
2000 12:58:17.650556 MTRR: Fixed MSR 0x26d 0x0606060606060606
2001 12:58:17.654039 MTRR: Fixed MSR 0x26e 0x0606060606060606
2002 12:58:17.660176 MTRR: Fixed MSR 0x26f 0x0606060606060606
2003 12:58:17.663897 CPU physical address size: 39 bits
2004 12:58:17.666824 call enable_fixed_mtrr()
2005 12:58:17.670360 Checking segment from ROM address 0xffc02b54
2006 12:58:17.676962 MTRR: Fixed MSR 0x250 0x0606060606060606
2007 12:58:17.680250 MTRR: Fixed MSR 0x250 0x0606060606060606
2008 12:58:17.683820 MTRR: Fixed MSR 0x258 0x0606060606060606
2009 12:58:17.687148 MTRR: Fixed MSR 0x259 0x0000000000000000
2010 12:58:17.693667 MTRR: Fixed MSR 0x268 0x0606060606060606
2011 12:58:17.697140 MTRR: Fixed MSR 0x269 0x0606060606060606
2012 12:58:17.700152 MTRR: Fixed MSR 0x26a 0x0606060606060606
2013 12:58:17.703249 MTRR: Fixed MSR 0x26b 0x0606060606060606
2014 12:58:17.706559 MTRR: Fixed MSR 0x26c 0x0606060606060606
2015 12:58:17.713676 MTRR: Fixed MSR 0x26d 0x0606060606060606
2016 12:58:17.716905 MTRR: Fixed MSR 0x26e 0x0606060606060606
2017 12:58:17.719870 MTRR: Fixed MSR 0x26f 0x0606060606060606
2018 12:58:17.727066 MTRR: Fixed MSR 0x258 0x0606060606060606
2019 12:58:17.727164 call enable_fixed_mtrr()
2020 12:58:17.733778 MTRR: Fixed MSR 0x259 0x0000000000000000
2021 12:58:17.736773 MTRR: Fixed MSR 0x268 0x0606060606060606
2022 12:58:17.740034 MTRR: Fixed MSR 0x269 0x0606060606060606
2023 12:58:17.743441 MTRR: Fixed MSR 0x26a 0x0606060606060606
2024 12:58:17.750230 MTRR: Fixed MSR 0x26b 0x0606060606060606
2025 12:58:17.753496 MTRR: Fixed MSR 0x26c 0x0606060606060606
2026 12:58:17.757093 MTRR: Fixed MSR 0x26d 0x0606060606060606
2027 12:58:17.760280 MTRR: Fixed MSR 0x26e 0x0606060606060606
2028 12:58:17.766754 MTRR: Fixed MSR 0x26f 0x0606060606060606
2029 12:58:17.770179 CPU physical address size: 39 bits
2030 12:58:17.773401 call enable_fixed_mtrr()
2031 12:58:17.776559 MTRR: Fixed MSR 0x250 0x0606060606060606
2032 12:58:17.783412 MTRR: Fixed MSR 0x250 0x0606060606060606
2033 12:58:17.786711 MTRR: Fixed MSR 0x258 0x0606060606060606
2034 12:58:17.790160 MTRR: Fixed MSR 0x259 0x0000000000000000
2035 12:58:17.793264 MTRR: Fixed MSR 0x268 0x0606060606060606
2036 12:58:17.796283 MTRR: Fixed MSR 0x269 0x0606060606060606
2037 12:58:17.803081 MTRR: Fixed MSR 0x26a 0x0606060606060606
2038 12:58:17.806365 MTRR: Fixed MSR 0x26b 0x0606060606060606
2039 12:58:17.809956 MTRR: Fixed MSR 0x26c 0x0606060606060606
2040 12:58:17.813023 MTRR: Fixed MSR 0x26d 0x0606060606060606
2041 12:58:17.820164 MTRR: Fixed MSR 0x26e 0x0606060606060606
2042 12:58:17.823295 MTRR: Fixed MSR 0x26f 0x0606060606060606
2043 12:58:17.826324 MTRR: Fixed MSR 0x258 0x0606060606060606
2044 12:58:17.829502 call enable_fixed_mtrr()
2045 12:58:17.832824 MTRR: Fixed MSR 0x259 0x0000000000000000
2046 12:58:17.839417 MTRR: Fixed MSR 0x268 0x0606060606060606
2047 12:58:17.842876 MTRR: Fixed MSR 0x269 0x0606060606060606
2048 12:58:17.846308 MTRR: Fixed MSR 0x26a 0x0606060606060606
2049 12:58:17.849528 MTRR: Fixed MSR 0x26b 0x0606060606060606
2050 12:58:17.856547 MTRR: Fixed MSR 0x26c 0x0606060606060606
2051 12:58:17.859603 MTRR: Fixed MSR 0x26d 0x0606060606060606
2052 12:58:17.862692 MTRR: Fixed MSR 0x26e 0x0606060606060606
2053 12:58:17.866100 MTRR: Fixed MSR 0x26f 0x0606060606060606
2054 12:58:17.870257 CPU physical address size: 39 bits
2055 12:58:17.876858 call enable_fixed_mtrr()
2056 12:58:17.880109 CPU physical address size: 39 bits
2057 12:58:17.883275 CPU physical address size: 39 bits
2058 12:58:17.886532 CPU physical address size: 39 bits
2059 12:58:17.890079 Loading segment from ROM address 0xffc02b38
2060 12:58:17.893236 code (compression=0)
2061 12:58:17.899869 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2062 12:58:17.909766 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2063 12:58:17.912933 it's not compressed!
2064 12:58:18.051191 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2065 12:58:18.057446 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2066 12:58:18.064485 Loading segment from ROM address 0xffc02b54
2067 12:58:18.064570 Entry Point 0x30000000
2068 12:58:18.067759 Loaded segments
2069 12:58:18.074218 BS: BS_PAYLOAD_LOAD run times (exec / console): 458 / 64 ms
2070 12:58:18.117347 Finalizing chipset.
2071 12:58:18.120781 Finalizing SMM.
2072 12:58:18.120863 APMC done.
2073 12:58:18.127368 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2074 12:58:18.130561 mp_park_aps done after 0 msecs.
2075 12:58:18.133910 Jumping to boot code at 0x30000000(0x76b25000)
2076 12:58:18.143799 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2077 12:58:18.143882
2078 12:58:18.143964
2079 12:58:18.144041
2080 12:58:18.147091 Starting depthcharge on Voema...
2081 12:58:18.147172
2082 12:58:18.147513 end: 2.2.3 depthcharge-start (duration 00:00:04) [common]
2083 12:58:18.147620 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
2084 12:58:18.147710 Setting prompt string to ['volteer:']
2085 12:58:18.147805 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:47)
2086 12:58:18.157221 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2087 12:58:18.157305
2088 12:58:18.163728 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2089 12:58:18.163810
2090 12:58:18.166772 Looking for NVMe Controller 0x3005f238 @ 00:1d:00
2091 12:58:18.170355
2092 12:58:18.173456 Failed to find eMMC card reader
2093 12:58:18.173537
2094 12:58:18.173600 Wipe memory regions:
2095 12:58:18.173657
2096 12:58:18.180513 [0x00000000001000, 0x000000000a0000)
2097 12:58:18.180595
2098 12:58:18.184337 [0x00000000100000, 0x00000030000000)
2099 12:58:18.209356
2100 12:58:18.212196 [0x00000032662db0, 0x000000769ef000)
2101 12:58:18.248168
2102 12:58:18.251310 [0x00000100000000, 0x00000280400000)
2103 12:58:18.453385
2104 12:58:18.456636 ec_init: CrosEC protocol v3 supported (256, 256)
2105 12:58:18.456724
2106 12:58:18.463445 update_port_state: port C0 state: usb enable 1 mux conn 0
2107 12:58:18.463531
2108 12:58:18.473471 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2109 12:58:18.473555
2110 12:58:18.480006 pmc_check_ipc_sts: STS_BUSY done after 1511 us
2111 12:58:18.480089
2112 12:58:18.483454 send_conn_disc_msg: pmc_send_cmd succeeded
2113 12:58:18.915630
2114 12:58:18.915768 R8152: Initializing
2115 12:58:18.915836
2116 12:58:18.919064 Version 9 (ocp_data = 6010)
2117 12:58:18.919146
2118 12:58:18.922711 R8152: Done initializing
2119 12:58:18.922793
2120 12:58:18.925622 Adding net device
2121 12:58:19.228223
2122 12:58:19.231851 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2123 12:58:19.231970
2124 12:58:19.232058
2125 12:58:19.232140
2126 12:58:19.234960 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2128 12:58:19.335335 volteer: tftpboot 192.168.201.1 13607181/tftp-deploy-r_v0xlev/kernel/bzImage 13607181/tftp-deploy-r_v0xlev/kernel/cmdline 13607181/tftp-deploy-r_v0xlev/ramdisk/ramdisk.cpio.gz
2129 12:58:19.335485 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2130 12:58:19.335567 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:46)
2131 12:58:19.339601 tftpboot 192.168.201.1 13607181/tftp-deploy-r_v0xlev/kernel/bzIploy-r_v0xlev/kernel/cmdline 13607181/tftp-deploy-r_v0xlev/ramdisk/ramdisk.cpio.gz
2132 12:58:19.339685
2133 12:58:19.339747 Waiting for link
2134 12:58:19.543766
2135 12:58:19.543904 done.
2136 12:58:19.543994
2137 12:58:19.544073 MAC: 00:e0:4c:71:a6:42
2138 12:58:19.544151
2139 12:58:19.547236 Sending DHCP discover... done.
2140 12:58:19.547317
2141 12:58:19.550587 Waiting for reply... done.
2142 12:58:19.550668
2143 12:58:19.553816 Sending DHCP request... done.
2144 12:58:19.553898
2145 12:58:19.556927 Waiting for reply... done.
2146 12:58:19.557008
2147 12:58:19.560154 My ip is 192.168.201.18
2148 12:58:19.560234
2149 12:58:19.563984 The DHCP server ip is 192.168.201.1
2150 12:58:19.564065
2151 12:58:19.570664 TFTP server IP predefined by user: 192.168.201.1
2152 12:58:19.570745
2153 12:58:19.576994 Bootfile predefined by user: 13607181/tftp-deploy-r_v0xlev/kernel/bzImage
2154 12:58:19.577075
2155 12:58:19.580173 Sending tftp read request... done.
2156 12:58:19.580253
2157 12:58:19.583316 Waiting for the transfer...
2158 12:58:19.583396
2159 12:58:19.832642 00000000 ################################################################
2160 12:58:19.832780
2161 12:58:20.076413 00080000 ################################################################
2162 12:58:20.076543
2163 12:58:20.326130 00100000 ################################################################
2164 12:58:20.326264
2165 12:58:20.570160 00180000 ################################################################
2166 12:58:20.570321
2167 12:58:20.814576 00200000 ################################################################
2168 12:58:20.814708
2169 12:58:21.061977 00280000 ################################################################
2170 12:58:21.062111
2171 12:58:21.327098 00300000 ################################################################
2172 12:58:21.327230
2173 12:58:21.594851 00380000 ################################################################
2174 12:58:21.595016
2175 12:58:21.871774 00400000 ################################################################
2176 12:58:21.871906
2177 12:58:22.117844 00480000 ################################################################
2178 12:58:22.117977
2179 12:58:22.367126 00500000 ################################################################
2180 12:58:22.367283
2181 12:58:22.625199 00580000 ################################################################
2182 12:58:22.625363
2183 12:58:22.886216 00600000 ################################################################
2184 12:58:22.886401
2185 12:58:23.136866 00680000 ################################################################
2186 12:58:23.137000
2187 12:58:23.388477 00700000 ################################################################
2188 12:58:23.388633
2189 12:58:23.635740 00780000 ################################################################
2190 12:58:23.635873
2191 12:58:23.892161 00800000 ################################################################
2192 12:58:23.892298
2193 12:58:24.159182 00880000 ################################################################
2194 12:58:24.159326
2195 12:58:24.404374 00900000 ################################################################
2196 12:58:24.404520
2197 12:58:24.654164 00980000 ################################################################
2198 12:58:24.654299
2199 12:58:24.910380 00a00000 ################################################################
2200 12:58:24.910556
2201 12:58:25.160452 00a80000 ################################################################
2202 12:58:25.160594
2203 12:58:25.407053 00b00000 ################################################################
2204 12:58:25.407198
2205 12:58:25.651561 00b80000 ################################################################
2206 12:58:25.651713
2207 12:58:25.901885 00c00000 ################################################################
2208 12:58:25.902025
2209 12:58:26.157181 00c80000 ################################################################
2210 12:58:26.157343
2211 12:58:26.392788 00d00000 ######################################################## done.
2212 12:58:26.392950
2213 12:58:26.395848 The bootfile was 14090128 bytes long.
2214 12:58:26.395955
2215 12:58:26.398879 Sending tftp read request... done.
2216 12:58:26.398957
2217 12:58:26.402355 Waiting for the transfer...
2218 12:58:26.402430
2219 12:58:26.646706 00000000 ################################################################
2220 12:58:26.646850
2221 12:58:26.889867 00080000 ################################################################
2222 12:58:26.890002
2223 12:58:27.132178 00100000 ################################################################
2224 12:58:27.132314
2225 12:58:27.375648 00180000 ################################################################
2226 12:58:27.375774
2227 12:58:27.618060 00200000 ################################################################
2228 12:58:27.618203
2229 12:58:27.861245 00280000 ################################################################
2230 12:58:27.861373
2231 12:58:28.104479 00300000 ################################################################
2232 12:58:28.104619
2233 12:58:28.348123 00380000 ################################################################
2234 12:58:28.348248
2235 12:58:28.592620 00400000 ################################################################
2236 12:58:28.592761
2237 12:58:28.836673 00480000 ################################################################
2238 12:58:28.836835
2239 12:58:29.080753 00500000 ################################################################
2240 12:58:29.080946
2241 12:58:29.323483 00580000 ################################################################
2242 12:58:29.323636
2243 12:58:29.567323 00600000 ################################################################
2244 12:58:29.567496
2245 12:58:29.811294 00680000 ################################################################
2246 12:58:29.811539
2247 12:58:30.055769 00700000 ################################################################
2248 12:58:30.055908
2249 12:58:30.298995 00780000 ################################################################
2250 12:58:30.299130
2251 12:58:30.541418 00800000 ################################################################
2252 12:58:30.541610
2253 12:58:30.637726 00880000 ########################## done.
2254 12:58:30.637847
2255 12:58:30.640536 Sending tftp read request... done.
2256 12:58:30.640619
2257 12:58:30.644118 Waiting for the transfer...
2258 12:58:30.644194
2259 12:58:30.647333 00000000 # done.
2260 12:58:30.647435
2261 12:58:30.654224 Command line loaded dynamically from TFTP file: 13607181/tftp-deploy-r_v0xlev/kernel/cmdline
2262 12:58:30.654306
2263 12:58:30.670333 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2264 12:58:30.676391
2265 12:58:30.679633 Shutting down all USB controllers.
2266 12:58:30.679739
2267 12:58:30.679828 Removing current net device
2268 12:58:30.679892
2269 12:58:30.682978 Finalizing coreboot
2270 12:58:30.683058
2271 12:58:30.690082 Exiting depthcharge with code 4 at timestamp: 21206239
2272 12:58:30.690162
2273 12:58:30.690228
2274 12:58:30.690288 Starting kernel ...
2275 12:58:30.690345
2276 12:58:30.690400
2277 12:58:30.690781 end: 2.2.4 bootloader-commands (duration 00:00:13) [common]
2278 12:58:30.690873 start: 2.2.5 auto-login-action (timeout 00:04:34) [common]
2279 12:58:30.690946 Setting prompt string to ['Linux version [0-9]']
2280 12:58:30.691012 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2281 12:58:30.691078 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2283 13:03:04.691954 end: 2.2.5 auto-login-action (duration 00:04:34) [common]
2285 13:03:04.693157 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 274 seconds'
2287 13:03:04.694013 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2290 13:03:04.695392 end: 2 depthcharge-action (duration 00:05:00) [common]
2292 13:03:04.696582 Cleaning after the job
2293 13:03:04.696671 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13607181/tftp-deploy-r_v0xlev/ramdisk
2294 13:03:04.697703 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13607181/tftp-deploy-r_v0xlev/kernel
2295 13:03:04.699316 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13607181/tftp-deploy-r_v0xlev/modules
2296 13:03:04.699705 start: 4.1 power-off (timeout 00:00:30) [common]
2297 13:03:04.699867 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cp514-2h-1130g7-volteer-cbg-7' '--port=1' '--command=off'
2298 13:03:05.628285 >> Command sent successfully.
2299 13:03:05.639507 Returned 0 in 0 seconds
2300 13:03:05.740934 end: 4.1 power-off (duration 00:00:01) [common]
2302 13:03:05.742437 start: 4.2 read-feedback (timeout 00:09:59) [common]
2303 13:03:05.743724 Listened to connection for namespace 'common' for up to 1s
2305 13:03:05.745241 Listened to connection for namespace 'common' for up to 1s
2306 13:03:06.744388 Finalising connection for namespace 'common'
2307 13:03:06.745076 Disconnecting from shell: Finalise
2308 13:03:06.745524
2309 13:03:06.846631 end: 4.2 read-feedback (duration 00:00:01) [common]
2310 13:03:06.847274 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13607181
2311 13:03:06.864738 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13607181
2312 13:03:06.864873 JobError: Your job cannot terminate cleanly.