Boot log: dell-latitude-5400-8665U-sarien
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 12:58:12.148449 lava-dispatcher, installed at version: 2024.01
2 12:58:12.148668 start: 0 validate
3 12:58:12.148812 Start time: 2024-05-02 12:58:12.148801+00:00 (UTC)
4 12:58:12.148945 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:58:12.149080 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Fx86%2Frootfs.cpio.gz exists
6 12:58:12.413802 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:58:12.414523 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2480-g949429724783%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:58:26.426603 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:58:26.427261 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2480-g949429724783%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 12:58:26.937093 validate duration: 14.79
12 12:58:26.937400 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:58:26.937511 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:58:26.937612 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:58:26.937747 Not decompressing ramdisk as can be used compressed.
16 12:58:26.937839 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/x86/rootfs.cpio.gz
17 12:58:26.937908 saving as /var/lib/lava/dispatcher/tmp/13607155/tftp-deploy-hhshnhvt/ramdisk/rootfs.cpio.gz
18 12:58:26.937975 total size: 8417901 (8 MB)
19 12:58:27.187813 progress 0 % (0 MB)
20 12:58:27.190330 progress 5 % (0 MB)
21 12:58:27.192781 progress 10 % (0 MB)
22 12:58:27.195318 progress 15 % (1 MB)
23 12:58:27.197744 progress 20 % (1 MB)
24 12:58:27.200209 progress 25 % (2 MB)
25 12:58:27.202596 progress 30 % (2 MB)
26 12:58:27.204852 progress 35 % (2 MB)
27 12:58:27.207276 progress 40 % (3 MB)
28 12:58:27.209727 progress 45 % (3 MB)
29 12:58:27.212148 progress 50 % (4 MB)
30 12:58:27.214554 progress 55 % (4 MB)
31 12:58:27.216953 progress 60 % (4 MB)
32 12:58:27.219300 progress 65 % (5 MB)
33 12:58:27.221658 progress 70 % (5 MB)
34 12:58:27.224091 progress 75 % (6 MB)
35 12:58:27.226450 progress 80 % (6 MB)
36 12:58:27.228866 progress 85 % (6 MB)
37 12:58:27.231335 progress 90 % (7 MB)
38 12:58:27.233730 progress 95 % (7 MB)
39 12:58:27.235987 progress 100 % (8 MB)
40 12:58:27.236240 8 MB downloaded in 0.30 s (26.92 MB/s)
41 12:58:27.236427 end: 1.1.1 http-download (duration 00:00:00) [common]
43 12:58:27.236712 end: 1.1 download-retry (duration 00:00:00) [common]
44 12:58:27.236822 start: 1.2 download-retry (timeout 00:10:00) [common]
45 12:58:27.236929 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 12:58:27.237090 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2480-g949429724783/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 12:58:27.237244 saving as /var/lib/lava/dispatcher/tmp/13607155/tftp-deploy-hhshnhvt/kernel/bzImage
48 12:58:27.237353 total size: 14090128 (13 MB)
49 12:58:27.237461 No compression specified
50 12:58:27.238680 progress 0 % (0 MB)
51 12:58:27.243067 progress 5 % (0 MB)
52 12:58:27.247238 progress 10 % (1 MB)
53 12:58:27.251285 progress 15 % (2 MB)
54 12:58:27.255165 progress 20 % (2 MB)
55 12:58:27.259187 progress 25 % (3 MB)
56 12:58:27.263047 progress 30 % (4 MB)
57 12:58:27.267126 progress 35 % (4 MB)
58 12:58:27.271188 progress 40 % (5 MB)
59 12:58:27.275231 progress 45 % (6 MB)
60 12:58:27.279076 progress 50 % (6 MB)
61 12:58:27.283194 progress 55 % (7 MB)
62 12:58:27.287114 progress 60 % (8 MB)
63 12:58:27.291239 progress 65 % (8 MB)
64 12:58:27.295185 progress 70 % (9 MB)
65 12:58:27.299293 progress 75 % (10 MB)
66 12:58:27.303162 progress 80 % (10 MB)
67 12:58:27.307248 progress 85 % (11 MB)
68 12:58:27.311145 progress 90 % (12 MB)
69 12:58:27.315192 progress 95 % (12 MB)
70 12:58:27.319067 progress 100 % (13 MB)
71 12:58:27.319352 13 MB downloaded in 0.08 s (163.88 MB/s)
72 12:58:27.319531 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:58:27.319821 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:58:27.319937 start: 1.3 download-retry (timeout 00:10:00) [common]
76 12:58:27.320052 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 12:58:27.320207 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2480-g949429724783/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 12:58:27.320289 saving as /var/lib/lava/dispatcher/tmp/13607155/tftp-deploy-hhshnhvt/modules/modules.tar
79 12:58:27.320397 total size: 483880 (0 MB)
80 12:58:27.320509 Using unxz to decompress xz
81 12:58:27.325436 progress 6 % (0 MB)
82 12:58:27.325901 progress 13 % (0 MB)
83 12:58:27.326187 progress 20 % (0 MB)
84 12:58:27.327967 progress 27 % (0 MB)
85 12:58:27.329987 progress 33 % (0 MB)
86 12:58:27.332070 progress 40 % (0 MB)
87 12:58:27.334160 progress 47 % (0 MB)
88 12:58:27.335987 progress 54 % (0 MB)
89 12:58:27.337888 progress 60 % (0 MB)
90 12:58:27.339982 progress 67 % (0 MB)
91 12:58:27.341782 progress 74 % (0 MB)
92 12:58:27.343990 progress 81 % (0 MB)
93 12:58:27.345970 progress 88 % (0 MB)
94 12:58:27.348094 progress 94 % (0 MB)
95 12:58:27.349961 progress 100 % (0 MB)
96 12:58:27.356204 0 MB downloaded in 0.04 s (12.89 MB/s)
97 12:58:27.356481 end: 1.3.1 http-download (duration 00:00:00) [common]
99 12:58:27.356809 end: 1.3 download-retry (duration 00:00:00) [common]
100 12:58:27.356927 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
101 12:58:27.357046 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
102 12:58:27.357153 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 12:58:27.357268 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
104 12:58:27.357566 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13607155/lava-overlay-g0dg0_x1
105 12:58:27.357733 makedir: /var/lib/lava/dispatcher/tmp/13607155/lava-overlay-g0dg0_x1/lava-13607155/bin
106 12:58:27.357893 makedir: /var/lib/lava/dispatcher/tmp/13607155/lava-overlay-g0dg0_x1/lava-13607155/tests
107 12:58:27.358047 makedir: /var/lib/lava/dispatcher/tmp/13607155/lava-overlay-g0dg0_x1/lava-13607155/results
108 12:58:27.358218 Creating /var/lib/lava/dispatcher/tmp/13607155/lava-overlay-g0dg0_x1/lava-13607155/bin/lava-add-keys
109 12:58:27.358421 Creating /var/lib/lava/dispatcher/tmp/13607155/lava-overlay-g0dg0_x1/lava-13607155/bin/lava-add-sources
110 12:58:27.358582 Creating /var/lib/lava/dispatcher/tmp/13607155/lava-overlay-g0dg0_x1/lava-13607155/bin/lava-background-process-start
111 12:58:27.358742 Creating /var/lib/lava/dispatcher/tmp/13607155/lava-overlay-g0dg0_x1/lava-13607155/bin/lava-background-process-stop
112 12:58:27.358903 Creating /var/lib/lava/dispatcher/tmp/13607155/lava-overlay-g0dg0_x1/lava-13607155/bin/lava-common-functions
113 12:58:27.359090 Creating /var/lib/lava/dispatcher/tmp/13607155/lava-overlay-g0dg0_x1/lava-13607155/bin/lava-echo-ipv4
114 12:58:27.359290 Creating /var/lib/lava/dispatcher/tmp/13607155/lava-overlay-g0dg0_x1/lava-13607155/bin/lava-install-packages
115 12:58:27.359473 Creating /var/lib/lava/dispatcher/tmp/13607155/lava-overlay-g0dg0_x1/lava-13607155/bin/lava-installed-packages
116 12:58:27.359631 Creating /var/lib/lava/dispatcher/tmp/13607155/lava-overlay-g0dg0_x1/lava-13607155/bin/lava-os-build
117 12:58:27.359785 Creating /var/lib/lava/dispatcher/tmp/13607155/lava-overlay-g0dg0_x1/lava-13607155/bin/lava-probe-channel
118 12:58:27.359944 Creating /var/lib/lava/dispatcher/tmp/13607155/lava-overlay-g0dg0_x1/lava-13607155/bin/lava-probe-ip
119 12:58:27.360131 Creating /var/lib/lava/dispatcher/tmp/13607155/lava-overlay-g0dg0_x1/lava-13607155/bin/lava-target-ip
120 12:58:27.360317 Creating /var/lib/lava/dispatcher/tmp/13607155/lava-overlay-g0dg0_x1/lava-13607155/bin/lava-target-mac
121 12:58:27.360503 Creating /var/lib/lava/dispatcher/tmp/13607155/lava-overlay-g0dg0_x1/lava-13607155/bin/lava-target-storage
122 12:58:27.360694 Creating /var/lib/lava/dispatcher/tmp/13607155/lava-overlay-g0dg0_x1/lava-13607155/bin/lava-test-case
123 12:58:27.360881 Creating /var/lib/lava/dispatcher/tmp/13607155/lava-overlay-g0dg0_x1/lava-13607155/bin/lava-test-event
124 12:58:27.361065 Creating /var/lib/lava/dispatcher/tmp/13607155/lava-overlay-g0dg0_x1/lava-13607155/bin/lava-test-feedback
125 12:58:27.361252 Creating /var/lib/lava/dispatcher/tmp/13607155/lava-overlay-g0dg0_x1/lava-13607155/bin/lava-test-raise
126 12:58:27.361444 Creating /var/lib/lava/dispatcher/tmp/13607155/lava-overlay-g0dg0_x1/lava-13607155/bin/lava-test-reference
127 12:58:27.361633 Creating /var/lib/lava/dispatcher/tmp/13607155/lava-overlay-g0dg0_x1/lava-13607155/bin/lava-test-runner
128 12:58:27.361820 Creating /var/lib/lava/dispatcher/tmp/13607155/lava-overlay-g0dg0_x1/lava-13607155/bin/lava-test-set
129 12:58:27.362006 Creating /var/lib/lava/dispatcher/tmp/13607155/lava-overlay-g0dg0_x1/lava-13607155/bin/lava-test-shell
130 12:58:27.362196 Updating /var/lib/lava/dispatcher/tmp/13607155/lava-overlay-g0dg0_x1/lava-13607155/bin/lava-install-packages (oe)
131 12:58:27.362406 Updating /var/lib/lava/dispatcher/tmp/13607155/lava-overlay-g0dg0_x1/lava-13607155/bin/lava-installed-packages (oe)
132 12:58:27.362556 Creating /var/lib/lava/dispatcher/tmp/13607155/lava-overlay-g0dg0_x1/lava-13607155/environment
133 12:58:27.362682 LAVA metadata
134 12:58:27.362803 - LAVA_JOB_ID=13607155
135 12:58:27.362918 - LAVA_DISPATCHER_IP=192.168.201.1
136 12:58:27.363090 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
137 12:58:27.363203 skipped lava-vland-overlay
138 12:58:27.363320 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 12:58:27.363470 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
140 12:58:27.363579 skipped lava-multinode-overlay
141 12:58:27.363719 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 12:58:27.363866 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
143 12:58:27.363994 Loading test definitions
144 12:58:27.364151 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
145 12:58:27.364275 Using /lava-13607155 at stage 0
146 12:58:27.364762 uuid=13607155_1.4.2.3.1 testdef=None
147 12:58:27.364900 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 12:58:27.365043 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
149 12:58:27.365888 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 12:58:27.366294 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
152 12:58:27.367008 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 12:58:27.367347 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
155 12:58:27.368362 runner path: /var/lib/lava/dispatcher/tmp/13607155/lava-overlay-g0dg0_x1/lava-13607155/0/tests/0_dmesg test_uuid 13607155_1.4.2.3.1
156 12:58:27.368575 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 12:58:27.368947 Creating lava-test-runner.conf files
159 12:58:27.369061 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13607155/lava-overlay-g0dg0_x1/lava-13607155/0 for stage 0
160 12:58:27.369213 - 0_dmesg
161 12:58:27.369366 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
162 12:58:27.369508 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
163 12:58:27.378002 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
164 12:58:27.378131 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
165 12:58:27.378246 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
166 12:58:27.378360 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
167 12:58:27.378471 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
168 12:58:27.653948 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
169 12:58:27.654385 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
170 12:58:27.654534 extracting modules file /var/lib/lava/dispatcher/tmp/13607155/tftp-deploy-hhshnhvt/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13607155/extract-overlay-ramdisk-bp8vmtcc/ramdisk
171 12:58:27.670732 end: 1.4.4 extract-modules (duration 00:00:00) [common]
172 12:58:27.670901 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
173 12:58:27.671049 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13607155/compress-overlay-0c77tzkb/overlay-1.4.2.4.tar.gz to ramdisk
174 12:58:27.671170 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13607155/compress-overlay-0c77tzkb/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13607155/extract-overlay-ramdisk-bp8vmtcc/ramdisk
175 12:58:27.679120 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
176 12:58:27.679277 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
177 12:58:27.679401 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
178 12:58:27.679547 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
179 12:58:27.679652 Building ramdisk /var/lib/lava/dispatcher/tmp/13607155/extract-overlay-ramdisk-bp8vmtcc/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13607155/extract-overlay-ramdisk-bp8vmtcc/ramdisk
180 12:58:27.842072 >> 51652 blocks
181 12:58:28.829176 rename /var/lib/lava/dispatcher/tmp/13607155/extract-overlay-ramdisk-bp8vmtcc/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13607155/tftp-deploy-hhshnhvt/ramdisk/ramdisk.cpio.gz
182 12:58:28.829681 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
183 12:58:28.829837 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
184 12:58:28.829967 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
185 12:58:28.830119 No mkimage arch provided, not using FIT.
186 12:58:28.830240 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
187 12:58:28.830359 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
188 12:58:28.830525 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
189 12:58:28.830680 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
190 12:58:28.830810 No LXC device requested
191 12:58:28.830940 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
192 12:58:28.831097 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
193 12:58:28.831253 end: 1.6 deploy-device-env (duration 00:00:00) [common]
194 12:58:28.831375 Checking files for TFTP limit of 4294967296 bytes.
195 12:58:28.831969 end: 1 tftp-deploy (duration 00:00:02) [common]
196 12:58:28.832125 start: 2 depthcharge-action (timeout 00:05:00) [common]
197 12:58:28.832274 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
198 12:58:28.832468 substitutions:
199 12:58:28.832578 - {DTB}: None
200 12:58:28.832692 - {INITRD}: 13607155/tftp-deploy-hhshnhvt/ramdisk/ramdisk.cpio.gz
201 12:58:28.832802 - {KERNEL}: 13607155/tftp-deploy-hhshnhvt/kernel/bzImage
202 12:58:28.832911 - {LAVA_MAC}: None
203 12:58:28.833019 - {PRESEED_CONFIG}: None
204 12:58:28.833129 - {PRESEED_LOCAL}: None
205 12:58:28.833246 - {RAMDISK}: 13607155/tftp-deploy-hhshnhvt/ramdisk/ramdisk.cpio.gz
206 12:58:28.833366 - {ROOT_PART}: None
207 12:58:28.833478 - {ROOT}: None
208 12:58:28.833586 - {SERVER_IP}: 192.168.201.1
209 12:58:28.833692 - {TEE}: None
210 12:58:28.833797 Parsed boot commands:
211 12:58:28.833901 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
212 12:58:28.834160 Parsed boot commands: tftpboot 192.168.201.1 13607155/tftp-deploy-hhshnhvt/kernel/bzImage 13607155/tftp-deploy-hhshnhvt/kernel/cmdline 13607155/tftp-deploy-hhshnhvt/ramdisk/ramdisk.cpio.gz
213 12:58:28.834300 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
214 12:58:28.834419 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
215 12:58:28.834570 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
216 12:58:28.834712 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
217 12:58:28.834832 Not connected, no need to disconnect.
218 12:58:28.834963 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
219 12:58:28.835108 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
220 12:58:28.835238 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh dell-latitude-5400-8665U-sarien-cbg-1'
221 12:58:28.839504 Setting prompt string to ['lava-test: # ']
222 12:58:28.840079 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
223 12:58:28.840295 end: 2.2.1 reset-connection (duration 00:00:00) [common]
224 12:58:28.840479 start: 2.2.2 reset-device (timeout 00:05:00) [common]
225 12:58:28.840864 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
226 12:58:28.841075 Calling: '/usr/local/bin/chromebook-reboot.sh' 'dell-latitude-5400-8665U-sarien-cbg-1'
227 12:58:51.242572 Returned 0 in 22 seconds
228 12:58:51.343256 end: 2.2.2.1 pdu-reboot (duration 00:00:23) [common]
230 12:58:51.343606 end: 2.2.2 reset-device (duration 00:00:23) [common]
231 12:58:51.343717 start: 2.2.3 depthcharge-start (timeout 00:04:37) [common]
232 12:58:51.343813 Setting prompt string to 'Starting depthcharge on sarien...'
233 12:58:51.343889 Changing prompt to 'Starting depthcharge on sarien...'
234 12:58:51.343967 depthcharge-start: Wait for prompt Starting depthcharge on sarien... (timeout 00:05:00)
235 12:58:51.344261 [Enter `^Ec?' for help]
236 12:58:51.344350
237 12:58:51.344424
238 12:58:51.344496 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
239 12:58:51.344566 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz
240 12:58:51.344633 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
241 12:58:51.344700 CPU: AES supported, TXT supported, VT supported
242 12:58:51.344763 MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)
243 12:58:51.344825 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
244 12:58:51.344886 IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1
245 12:58:51.344947 VBOOT: Loading verstage.
246 12:58:51.345011 CBFS @ 1d00000 size 300000
247 12:58:51.345071 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
248 12:58:51.345133 CBFS: Locating 'fallback/verstage'
249 12:58:51.345193 CBFS: Found @ offset 10f6c0 size 1435c
250 12:58:51.345254
251 12:58:51.345315
252 12:58:51.345375 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
253 12:58:51.345437 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
254 12:58:51.345498 done! DID_VID 0x00281ae0
255 12:58:51.345559 TPM ready after 0 ms
256 12:58:51.345619 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
257 12:58:51.345680 tlcl_send_startup: Startup return code is 0
258 12:58:51.345741 TPM: setup succeeded
259 12:58:51.345802 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
260 12:58:51.345863 Checking cr50 for recovery request
261 12:58:51.345923 Phase 1
262 12:58:51.345985 FMAP: Found "FLASH" version 1.1 at 1c10000.
263 12:58:51.346046 FMAP: base = fe000000 size = 2000000 #areas = 37
264 12:58:51.346107 FMAP: area GBB found @ 1c11000 (978944 bytes)
265 12:58:51.346168 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
266 12:58:51.346229 VB2:vb2_check_recovery() Recovery was requested manually
267 12:58:51.346290 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
268 12:58:51.346350 Recovery requested (1009000e)
269 12:58:51.346410 tlcl_extend: response is 0
270 12:58:51.346471 tlcl_extend: response is 0
271 12:58:51.346530 CBFS @ 1d00000 size 300000
272 12:58:51.346590 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
273 12:58:51.346651 CBFS: Locating 'fallback/romstage'
274 12:58:51.346711 CBFS: Found @ offset 80 size 15b2c
275 12:58:51.346770
276 12:58:51.346831
277 12:58:51.346890 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 romstage starting (log level: 8)...
278 12:58:51.346952 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
279 12:58:51.347013 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
280 12:58:51.347073 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
281 12:58:51.347133 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
282 12:58:51.347193 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
283 12:58:51.347264 TCO_STS: 0000 0004
284 12:58:51.347326 GEN_PMCON: d0015009 00002200
285 12:58:51.347387 GBLRST_CAUSE: 00000000 00000000
286 12:58:51.347447 prev_sleep_state 5
287 12:58:51.347506 Boot Count incremented to 44556
288 12:58:51.347600 CBFS @ 1d00000 size 300000
289 12:58:51.347665 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
290 12:58:51.347727 CBFS: Locating 'fspm.bin'
291 12:58:51.347788 CBFS: Found @ offset 60fc0 size 70000
292 12:58:51.347849 FMAP: Found "FLASH" version 1.1 at 1c10000.
293 12:58:51.347910 FMAP: base = fe000000 size = 2000000 #areas = 37
294 12:58:51.347971 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
295 12:58:51.348033 Probing TPM I2C: done! DID_VID 0x00281ae0
296 12:58:51.348093 Locality already claimed
297 12:58:51.348153 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
298 12:58:51.348214 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
299 12:58:51.348275 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
300 12:58:51.348336 MRC cache found, size 18e0
301 12:58:51.348396 bootmode is set to :2
302 12:58:51.348456 CBMEM:
303 12:58:51.348516 IMD: root @ 89fff000 254 entries.
304 12:58:51.348577 IMD: root @ 89ffec00 62 entries.
305 12:58:51.348637 External stage cache:
306 12:58:51.348697 IMD: root @ 8abff000 254 entries.
307 12:58:51.348757 IMD: root @ 8abfec00 62 entries.
308 12:58:51.348817 VBOOT: copying vboot_working_data (12288 bytes) to CBMEM...
309 12:58:51.348878 creating vboot_handoff structure
310 12:58:51.348937 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
311 12:58:51.348998 tlcl_write: response is 0
312 12:58:51.349058 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
313 12:58:51.349119 MRC: TPM MRC hash updated successfully.
314 12:58:51.349179 1 DIMMs found
315 12:58:51.349241 top_of_ram = 0x8a000000
316 12:58:51.349302 MTRR Range: Start=89000000 End=8a000000 (Size 1000000)
317 12:58:51.349361 MTRR Range: Start=ff000000 End=0 (Size 1000000)
318 12:58:51.349421 CBFS @ 1d00000 size 300000
319 12:58:51.349482 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
320 12:58:51.349542 CBFS: Locating 'fallback/postcar'
321 12:58:51.349603 CBFS: Found @ offset 107000 size 41a4
322 12:58:51.349663 Decompressing stage fallback/postcar @ 0x89cdcfc0 (33360 bytes)
323 12:58:51.349724 Loading module at 89cdd000 with entry 89cdd000. filesize: 0x3f50 memsize: 0x8210
324 12:58:51.349785 Processing 126 relocs. Offset value of 0x87cdd000
325 12:58:51.349845
326 12:58:51.349905
327 12:58:51.349965 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 postcar starting (log level: 8)...
328 12:58:51.350027 CBFS @ 1d00000 size 300000
329 12:58:51.350087 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
330 12:58:51.350147 CBFS: Locating 'fallback/ramstage'
331 12:58:51.350208 CBFS: Found @ offset 458c0 size 1a8a8
332 12:58:51.350269 Decompressing stage fallback/ramstage @ 0x89c80fc0 (372256 bytes)
333 12:58:51.350330 Loading module at 89c81000 with entry 89c81000. filesize: 0x400e0 memsize: 0x5ade0
334 12:58:51.350584 Processing 3754 relocs. Offset value of 0x88e81000
335 12:58:51.350655
336 12:58:51.350716
337 12:58:51.350777 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 ramstage starting (log level: 8)...
338 12:58:51.350839 FMAP: Found "FLASH" version 1.1 at 1c10000.
339 12:58:51.350901 FMAP: base = fe000000 size = 2000000 #areas = 37
340 12:58:51.350962 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
341 12:58:51.351023 WARNING: RO_VPD is uninitialized or empty.
342 12:58:51.351084 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
343 12:58:51.351145 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
344 12:58:51.351205 Normal boot.
345 12:58:51.351283 BS: BS_PRE_DEVICE times (us): entry 0 run 58 exit 1163
346 12:58:51.351345 CBFS @ 1d00000 size 300000
347 12:58:51.351406 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
348 12:58:51.351467 CBFS: Locating 'cpu_microcode_blob.bin'
349 12:58:51.351528 CBFS: Found @ offset 15c40 size 2fc00
350 12:58:51.351589 microcode: sig=0x806ec pf=0x80 revision=0xb7
351 12:58:51.351649 Skip microcode update
352 12:58:51.351732 CBFS @ 1d00000 size 300000
353 12:58:51.351794 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
354 12:58:51.351856 CBFS: Locating 'fsps.bin'
355 12:58:51.351916 CBFS: Found @ offset d1fc0 size 35000
356 12:58:51.351977 Detected 4 core, 8 thread CPU.
357 12:58:51.352037 Setting up SMI for CPU
358 12:58:51.352097 IED base = 0x8ac00000
359 12:58:51.352157 IED size = 0x00400000
360 12:58:51.352217 Will perform SMM setup.
361 12:58:51.352277 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz.
362 12:58:51.352338 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
363 12:58:51.352398 Processing 16 relocs. Offset value of 0x00030000
364 12:58:51.352458 Attempting to start 7 APs
365 12:58:51.352517 Waiting for 10ms after sending INIT.
366 12:58:51.352578 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
367 12:58:51.352637 done.
368 12:58:51.352698 AP: slot 6 apic_id 2.
369 12:58:51.352758 AP: slot 7 apic_id 3.
370 12:58:51.352818 Waiting for 2nd SIPI to complete...done.
371 12:58:51.352878 AP: slot 2 apic_id 6.
372 12:58:51.352937 AP: slot 5 apic_id 7.
373 12:58:51.352996 AP: slot 4 apic_id 5.
374 12:58:51.353055 AP: slot 1 apic_id 4.
375 12:58:51.353114 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
376 12:58:51.353175 Processing 13 relocs. Offset value of 0x00038000
377 12:58:51.353235 SMM Module: stub loaded at 00038000. Will call 89c9b6bd(00000000)
378 12:58:51.353296 Installing SMM handler to 0x8a000000
379 12:58:51.353357 Loading module at 8a010000 with entry 8a010a27. filesize: 0xa988 memsize: 0xfa40
380 12:58:51.353417 Processing 867 relocs. Offset value of 0x8a010000
381 12:58:51.353477 Loading module at 8a008000 with entry 8a008000. filesize: 0x1a8 memsize: 0x1a8
382 12:58:51.353538 Processing 13 relocs. Offset value of 0x8a008000
383 12:58:51.353597 SMM Module: placing jmp sequence at 8a007c00 rel16 0x03fd
384 12:58:51.353658 SMM Module: placing jmp sequence at 8a007800 rel16 0x07fd
385 12:58:51.353718 SMM Module: placing jmp sequence at 8a007400 rel16 0x0bfd
386 12:58:51.353778 SMM Module: placing jmp sequence at 8a007000 rel16 0x0ffd
387 12:58:51.353838 SMM Module: placing jmp sequence at 8a006c00 rel16 0x13fd
388 12:58:51.353899 SMM Module: placing jmp sequence at 8a006800 rel16 0x17fd
389 12:58:51.353958 SMM Module: placing jmp sequence at 8a006400 rel16 0x1bfd
390 12:58:51.354019 SMM Module: stub loaded at 8a008000. Will call 8a010a27(00000000)
391 12:58:51.354079 Clearing SMI status registers
392 12:58:51.354140 SMI_STS: PM1
393 12:58:51.354200 PM1_STS: WAK PWRBTN
394 12:58:51.354260 TCO_STS: BOOT SECOND_TO
395 12:58:51.354320 New SMBASE 0x8a000000
396 12:58:51.354381 In relocation handler: CPU 0
397 12:58:51.354441 New SMBASE=0x8a000000 IEDBASE=0x8ac00000
398 12:58:51.354502 Writing SMRR. base = 0x8a000006, mask=0xff000800
399 12:58:51.354562 Relocation complete.
400 12:58:51.354622 New SMBASE 0x89fff400
401 12:58:51.354683 In relocation handler: CPU 3
402 12:58:51.354742 New SMBASE=0x89fff400 IEDBASE=0x8ac00000
403 12:58:51.354803 Writing SMRR. base = 0x8a000006, mask=0xff000800
404 12:58:51.354862 Relocation complete.
405 12:58:51.354921 New SMBASE 0x89ffec00
406 12:58:51.354981 In relocation handler: CPU 5
407 12:58:51.355041 New SMBASE=0x89ffec00 IEDBASE=0x8ac00000
408 12:58:51.355101 Writing SMRR. base = 0x8a000006, mask=0xff000800
409 12:58:51.355162 Relocation complete.
410 12:58:51.355228 New SMBASE 0x89fff800
411 12:58:51.355291 In relocation handler: CPU 2
412 12:58:51.355351 New SMBASE=0x89fff800 IEDBASE=0x8ac00000
413 12:58:51.355411 Writing SMRR. base = 0x8a000006, mask=0xff000800
414 12:58:51.355470 Relocation complete.
415 12:58:51.355528 New SMBASE 0x89fff000
416 12:58:51.355589 In relocation handler: CPU 4
417 12:58:51.355649 New SMBASE=0x89fff000 IEDBASE=0x8ac00000
418 12:58:51.355709 Writing SMRR. base = 0x8a000006, mask=0xff000800
419 12:58:51.355769 Relocation complete.
420 12:58:51.355829 New SMBASE 0x89fffc00
421 12:58:51.355889 In relocation handler: CPU 1
422 12:58:51.355949 New SMBASE=0x89fffc00 IEDBASE=0x8ac00000
423 12:58:51.356009 Writing SMRR. base = 0x8a000006, mask=0xff000800
424 12:58:51.356069 Relocation complete.
425 12:58:51.356128 New SMBASE 0x89ffe400
426 12:58:51.356189 In relocation handler: CPU 7
427 12:58:51.356248 New SMBASE=0x89ffe400 IEDBASE=0x8ac00000
428 12:58:51.356309 Writing SMRR. base = 0x8a000006, mask=0xff000800
429 12:58:51.356368 Relocation complete.
430 12:58:51.356427 New SMBASE 0x89ffe800
431 12:58:51.356487 In relocation handler: CPU 6
432 12:58:51.356547 New SMBASE=0x89ffe800 IEDBASE=0x8ac00000
433 12:58:51.356637 Writing SMRR. base = 0x8a000006, mask=0xff000800
434 12:58:51.356702 Relocation complete.
435 12:58:51.356763 Initializing CPU #0
436 12:58:51.356823 CPU: vendor Intel device 806ec
437 12:58:51.356883 CPU: family 06, model 8e, stepping 0c
438 12:58:51.356944 Clearing out pending MCEs
439 12:58:51.357004 Setting up local APIC... apic_id: 0x00 done.
440 12:58:51.357064 Turbo is available but hidden
441 12:58:51.357317 Turbo has been enabled
442 12:58:51.357392 VMX status: enabled
443 12:58:51.357454 IA32_FEATURE_CONTROL status: locked
444 12:58:51.357515 Skip microcode update
445 12:58:51.357576 CPU #0 initialized
446 12:58:51.357636 Initializing CPU #3
447 12:58:51.357696 Initializing CPU #7
448 12:58:51.357757 Initializing CPU #6
449 12:58:51.357817 CPU: vendor Intel device 806ec
450 12:58:51.357877 CPU: family 06, model 8e, stepping 0c
451 12:58:51.357938 CPU: vendor Intel device 806ec
452 12:58:51.357998 CPU: family 06, model 8e, stepping 0c
453 12:58:51.358058 Clearing out pending MCEs
454 12:58:51.358118 Clearing out pending MCEs
455 12:58:51.358177 Setting up local APIC...Initializing CPU #1
456 12:58:51.358237 Initializing CPU #4
457 12:58:51.358297 CPU: vendor Intel device 806ec
458 12:58:51.358358 CPU: family 06, model 8e, stepping 0c
459 12:58:51.358418 CPU: vendor Intel device 806ec
460 12:58:51.358477 CPU: family 06, model 8e, stepping 0c
461 12:58:51.358538 Clearing out pending MCEs
462 12:58:51.358597 Clearing out pending MCEs
463 12:58:51.358656 Setting up local APIC...Initializing CPU #5
464 12:58:51.358716 Initializing CPU #2
465 12:58:51.358776 CPU: vendor Intel device 806ec
466 12:58:51.358837 CPU: family 06, model 8e, stepping 0c
467 12:58:51.358897 CPU: vendor Intel device 806ec
468 12:58:51.358957 CPU: family 06, model 8e, stepping 0c
469 12:58:51.359017 Clearing out pending MCEs
470 12:58:51.359077 Clearing out pending MCEs
471 12:58:51.359138 Setting up local APIC...CPU: vendor Intel device 806ec
472 12:58:51.359199 CPU: family 06, model 8e, stepping 0c
473 12:58:51.359277 Setting up local APIC... apic_id: 0x04 done.
474 12:58:51.359338 Setting up local APIC...Clearing out pending MCEs
475 12:58:51.359398 apic_id: 0x07 done.
476 12:58:51.359458 apic_id: 0x06 done.
477 12:58:51.359518 VMX status: enabled
478 12:58:51.359578 VMX status: enabled
479 12:58:51.359637 IA32_FEATURE_CONTROL status: locked
480 12:58:51.359697 IA32_FEATURE_CONTROL status: locked
481 12:58:51.359757 Skip microcode update
482 12:58:51.359816 Skip microcode update
483 12:58:51.359877 CPU #5 initialized
484 12:58:51.359936 CPU #2 initialized
485 12:58:51.359995 apic_id: 0x05 done.
486 12:58:51.360055 VMX status: enabled
487 12:58:51.360115 VMX status: enabled
488 12:58:51.360175 IA32_FEATURE_CONTROL status: locked
489 12:58:51.360234 apic_id: 0x03 done.
490 12:58:51.360294 Setting up local APIC...Skip microcode update
491 12:58:51.360354 IA32_FEATURE_CONTROL status: locked
492 12:58:51.360414 CPU #1 initialized
493 12:58:51.360473 Skip microcode update
494 12:58:51.360533 VMX status: enabled
495 12:58:51.360593 apic_id: 0x02 done.
496 12:58:51.360653 IA32_FEATURE_CONTROL status: locked
497 12:58:51.360713 VMX status: enabled
498 12:58:51.360772 Skip microcode update
499 12:58:51.360832 IA32_FEATURE_CONTROL status: locked
500 12:58:51.360891 CPU #7 initialized
501 12:58:51.360951 Skip microcode update
502 12:58:51.361010 Setting up local APIC...CPU #6 initialized
503 12:58:51.361070 CPU #4 initialized
504 12:58:51.361130 apic_id: 0x01 done.
505 12:58:51.361190 VMX status: enabled
506 12:58:51.361250 IA32_FEATURE_CONTROL status: locked
507 12:58:51.361309 Skip microcode update
508 12:58:51.361369 CPU #3 initialized
509 12:58:51.361429 bsp_do_flight_plan done after 458 msecs.
510 12:58:51.361489 CPU: frequency set to 4800 MHz
511 12:58:51.361549 Enabling SMIs.
512 12:58:51.361609 Locking SMM.
513 12:58:51.361669 CBFS @ 1d00000 size 300000
514 12:58:51.361730 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
515 12:58:51.361790 CBFS: Locating 'vbt.bin'
516 12:58:51.361850 CBFS: Found @ offset 60a40 size 4a0
517 12:58:51.361910 Found a VBT of 4608 bytes after decompression
518 12:58:51.361971 FMAP: area GBB found @ 1c11000 (978944 bytes)
519 12:58:51.362032 Detected 4 core, 8 thread CPU.
520 12:58:51.362092 Detected 4 core, 8 thread CPU.
521 12:58:51.362152 Display FSP Version Info HOB
522 12:58:51.362213 Reference Code - CPU = 7.0.5e.40
523 12:58:51.362273 uCode Version = 0.0.0.b8
524 12:58:51.362332 Display FSP Version Info HOB
525 12:58:51.362392 Reference Code - ME = 7.0.5e.40
526 12:58:51.362452 MEBx version = 0.0.0.0
527 12:58:51.362512 ME Firmware Version = Consumer SKU
528 12:58:51.362572 Display FSP Version Info HOB
529 12:58:51.362631 Reference Code - CNL PCH = 7.0.5e.40
530 12:58:51.362691 PCH-CRID Status = Disabled
531 12:58:51.362751 CNL PCH H A0 Hsio Version = 2.0.0.0
532 12:58:51.362811 CNL PCH H Ax Hsio Version = 9.0.0.0
533 12:58:51.362871 CNL PCH H Bx Hsio Version = a.0.0.0
534 12:58:51.362931 CNL PCH LP B0 Hsio Version = 7.0.0.0
535 12:58:51.362990 CNL PCH LP Bx Hsio Version = 6.0.0.0
536 12:58:51.363050 CNL PCH LP Dx Hsio Version = 7.0.0.0
537 12:58:51.363110 Display FSP Version Info HOB
538 12:58:51.363170 Reference Code - SA - System Agent = 7.0.5e.40
539 12:58:51.363238 Reference Code - MRC = 0.7.1.68
540 12:58:51.363300 SA - PCIe Version = 7.0.5e.40
541 12:58:51.363360 SA-CRID Status = Disabled
542 12:58:51.363420 SA-CRID Original Value = 0.0.0.c
543 12:58:51.363479 SA-CRID New Value = 0.0.0.c
544 12:58:51.363539 RTC Init
545 12:58:51.363600 Set power off after power failure.
546 12:58:51.363660 Disabling Deep S3
547 12:58:51.363720 Disabling Deep S3
548 12:58:51.363780 Disabling Deep S4
549 12:58:51.363840 Disabling Deep S4
550 12:58:51.363900 Disabling Deep S5
551 12:58:51.363959 Disabling Deep S5
552 12:58:51.364018 BS: BS_DEV_INIT_CHIPS times (us): entry 600777 run 414424 exit 16224
553 12:58:51.364079 Enumerating buses...
554 12:58:51.364138 Show all devs... Before device enumeration.
555 12:58:51.364198 Root Device: enabled 1
556 12:58:51.364258 CPU_CLUSTER: 0: enabled 1
557 12:58:51.364318 DOMAIN: 0000: enabled 1
558 12:58:51.364377 APIC: 00: enabled 1
559 12:58:51.364437 PCI: 00:00.0: enabled 1
560 12:58:51.364496 PCI: 00:02.0: enabled 1
561 12:58:51.364556 PCI: 00:04.0: enabled 1
562 12:58:51.364615 PCI: 00:12.0: enabled 1
563 12:58:51.364674 PCI: 00:12.5: enabled 0
564 12:58:51.364734 PCI: 00:12.6: enabled 0
565 12:58:51.364793 PCI: 00:13.0: enabled 0
566 12:58:51.364852 PCI: 00:14.0: enabled 1
567 12:58:51.364912 PCI: 00:14.1: enabled 0
568 12:58:51.364971 PCI: 00:14.3: enabled 1
569 12:58:51.365031 PCI: 00:14.5: enabled 0
570 12:58:51.365090 PCI: 00:15.0: enabled 1
571 12:58:51.365150 PCI: 00:15.1: enabled 1
572 12:58:51.365209 PCI: 00:15.2: enabled 0
573 12:58:51.365268 PCI: 00:15.3: enabled 0
574 12:58:51.365327 PCI: 00:16.0: enabled 1
575 12:58:51.365387 PCI: 00:16.1: enabled 0
576 12:58:51.365446 PCI: 00:16.2: enabled 0
577 12:58:51.365505 PCI: 00:16.3: enabled 0
578 12:58:51.365564 PCI: 00:16.4: enabled 0
579 12:58:51.365624 PCI: 00:16.5: enabled 0
580 12:58:51.365895 PCI: 00:17.0: enabled 1
581 12:58:51.365964 PCI: 00:19.0: enabled 1
582 12:58:51.366025 PCI: 00:19.1: enabled 0
583 12:58:51.366085 PCI: 00:19.2: enabled 1
584 12:58:51.366145 PCI: 00:1a.0: enabled 0
585 12:58:51.366205 PCI: 00:1c.0: enabled 1
586 12:58:51.366285 PCI: 00:1c.1: enabled 0
587 12:58:51.366355 PCI: 00:1c.2: enabled 0
588 12:58:51.366416 PCI: 00:1c.3: enabled 0
589 12:58:51.366476 PCI: 00:1c.4: enabled 0
590 12:58:51.366536 PCI: 00:1c.5: enabled 0
591 12:58:51.366595 PCI: 00:1c.6: enabled 0
592 12:58:51.366656 PCI: 00:1c.7: enabled 1
593 12:58:51.366715 PCI: 00:1d.0: enabled 1
594 12:58:51.366775 PCI: 00:1d.1: enabled 1
595 12:58:51.366834 PCI: 00:1d.2: enabled 0
596 12:58:51.366893 PCI: 00:1d.3: enabled 0
597 12:58:51.366953 PCI: 00:1d.4: enabled 1
598 12:58:51.367013 PCI: 00:1e.0: enabled 0
599 12:58:51.367072 PCI: 00:1e.1: enabled 0
600 12:58:51.367132 PCI: 00:1e.2: enabled 0
601 12:58:51.367192 PCI: 00:1e.3: enabled 0
602 12:58:51.367265 PCI: 00:1f.0: enabled 1
603 12:58:51.367326 PCI: 00:1f.1: enabled 1
604 12:58:51.367386 PCI: 00:1f.2: enabled 1
605 12:58:51.367445 PCI: 00:1f.3: enabled 1
606 12:58:51.367505 PCI: 00:1f.4: enabled 1
607 12:58:51.367565 PCI: 00:1f.5: enabled 1
608 12:58:51.367624 PCI: 00:1f.6: enabled 1
609 12:58:51.367683 USB0 port 0: enabled 1
610 12:58:51.367743 I2C: 00:10: enabled 1
611 12:58:51.367802 I2C: 00:10: enabled 1
612 12:58:51.367869 I2C: 00:34: enabled 1
613 12:58:51.367943 I2C: 00:2c: enabled 1
614 12:58:51.368003 I2C: 00:50: enabled 1
615 12:58:51.368062 PNP: 0c09.0: enabled 1
616 12:58:51.368122 USB2 port 0: enabled 1
617 12:58:51.368181 USB2 port 1: enabled 1
618 12:58:51.368241 USB2 port 2: enabled 1
619 12:58:51.368300 USB2 port 4: enabled 1
620 12:58:51.368360 USB2 port 5: enabled 1
621 12:58:51.368420 USB2 port 6: enabled 1
622 12:58:51.368480 USB2 port 7: enabled 1
623 12:58:51.368539 USB2 port 8: enabled 1
624 12:58:51.368598 USB2 port 9: enabled 1
625 12:58:51.368658 USB3 port 0: enabled 1
626 12:58:51.368717 USB3 port 1: enabled 1
627 12:58:51.368777 USB3 port 2: enabled 1
628 12:58:51.368837 USB3 port 3: enabled 1
629 12:58:51.368896 USB3 port 4: enabled 1
630 12:58:51.368955 APIC: 04: enabled 1
631 12:58:51.369014 APIC: 06: enabled 1
632 12:58:51.369074 APIC: 01: enabled 1
633 12:58:51.369133 APIC: 05: enabled 1
634 12:58:51.369192 APIC: 07: enabled 1
635 12:58:51.369251 APIC: 02: enabled 1
636 12:58:51.369311 APIC: 03: enabled 1
637 12:58:51.369370 Compare with tree...
638 12:58:51.369430 Root Device: enabled 1
639 12:58:51.369490 CPU_CLUSTER: 0: enabled 1
640 12:58:51.369549 APIC: 00: enabled 1
641 12:58:51.369609 APIC: 04: enabled 1
642 12:58:51.369669 APIC: 06: enabled 1
643 12:58:51.369729 APIC: 01: enabled 1
644 12:58:51.369788 APIC: 05: enabled 1
645 12:58:51.369848 APIC: 07: enabled 1
646 12:58:51.369945 APIC: 02: enabled 1
647 12:58:51.370034 APIC: 03: enabled 1
648 12:58:51.370101 DOMAIN: 0000: enabled 1
649 12:58:51.370163 PCI: 00:00.0: enabled 1
650 12:58:51.370223 PCI: 00:02.0: enabled 1
651 12:58:51.370283 PCI: 00:04.0: enabled 1
652 12:58:51.370344 PCI: 00:12.0: enabled 1
653 12:58:51.370403 PCI: 00:12.5: enabled 0
654 12:58:51.370463 PCI: 00:12.6: enabled 0
655 12:58:51.370522 PCI: 00:13.0: enabled 0
656 12:58:51.370582 PCI: 00:14.0: enabled 1
657 12:58:51.370642 USB0 port 0: enabled 1
658 12:58:51.370701 USB2 port 0: enabled 1
659 12:58:51.370761 USB2 port 1: enabled 1
660 12:58:51.370820 USB2 port 2: enabled 1
661 12:58:51.370880 USB2 port 4: enabled 1
662 12:58:51.370939 USB2 port 5: enabled 1
663 12:58:51.370999 USB2 port 6: enabled 1
664 12:58:51.371058 USB2 port 7: enabled 1
665 12:58:51.371118 USB2 port 8: enabled 1
666 12:58:51.371177 USB2 port 9: enabled 1
667 12:58:51.371246 USB3 port 0: enabled 1
668 12:58:51.371308 USB3 port 1: enabled 1
669 12:58:51.371368 USB3 port 2: enabled 1
670 12:58:51.371428 USB3 port 3: enabled 1
671 12:58:51.371488 USB3 port 4: enabled 1
672 12:58:51.371547 PCI: 00:14.1: enabled 0
673 12:58:51.371607 PCI: 00:14.3: enabled 1
674 12:58:51.371667 PCI: 00:14.5: enabled 0
675 12:58:51.371727 PCI: 00:15.0: enabled 1
676 12:58:51.371787 I2C: 00:10: enabled 1
677 12:58:51.371846 I2C: 00:10: enabled 1
678 12:58:51.371906 I2C: 00:34: enabled 1
679 12:58:51.371965 PCI: 00:15.1: enabled 1
680 12:58:51.372024 I2C: 00:2c: enabled 1
681 12:58:51.372084 PCI: 00:15.2: enabled 0
682 12:58:51.372144 PCI: 00:15.3: enabled 0
683 12:58:51.372202 PCI: 00:16.0: enabled 1
684 12:58:51.372262 PCI: 00:16.1: enabled 0
685 12:58:51.372321 PCI: 00:16.2: enabled 0
686 12:58:51.372380 PCI: 00:16.3: enabled 0
687 12:58:51.372440 PCI: 00:16.4: enabled 0
688 12:58:51.372500 PCI: 00:16.5: enabled 0
689 12:58:51.372560 PCI: 00:17.0: enabled 1
690 12:58:51.372620 PCI: 00:19.0: enabled 1
691 12:58:51.372680 I2C: 00:50: enabled 1
692 12:58:51.372739 PCI: 00:19.1: enabled 0
693 12:58:51.372799 PCI: 00:19.2: enabled 1
694 12:58:51.372859 PCI: 00:1a.0: enabled 0
695 12:58:51.372918 PCI: 00:1c.0: enabled 1
696 12:58:51.372977 PCI: 00:1c.1: enabled 0
697 12:58:51.373037 PCI: 00:1c.2: enabled 0
698 12:58:51.373097 PCI: 00:1c.3: enabled 0
699 12:58:51.373156 PCI: 00:1c.4: enabled 0
700 12:58:51.373216 PCI: 00:1c.5: enabled 0
701 12:58:51.373275 PCI: 00:1c.6: enabled 0
702 12:58:51.373335 PCI: 00:1c.7: enabled 1
703 12:58:51.373394 PCI: 00:1d.0: enabled 1
704 12:58:51.373454 PCI: 00:1d.1: enabled 1
705 12:58:51.373513 PCI: 00:1d.2: enabled 0
706 12:58:51.373573 PCI: 00:1d.3: enabled 0
707 12:58:51.373632 PCI: 00:1d.4: enabled 1
708 12:58:51.373691 PCI: 00:1e.0: enabled 0
709 12:58:51.373750 PCI: 00:1e.1: enabled 0
710 12:58:51.373810 PCI: 00:1e.2: enabled 0
711 12:58:51.373873 PCI: 00:1e.3: enabled 0
712 12:58:51.373940 PCI: 00:1f.0: enabled 1
713 12:58:51.374000 PNP: 0c09.0: enabled 1
714 12:58:51.374061 PCI: 00:1f.1: enabled 1
715 12:58:51.374120 PCI: 00:1f.2: enabled 1
716 12:58:51.374179 PCI: 00:1f.3: enabled 1
717 12:58:51.374239 PCI: 00:1f.4: enabled 1
718 12:58:51.374299 PCI: 00:1f.5: enabled 1
719 12:58:51.374358 PCI: 00:1f.6: enabled 1
720 12:58:51.374418 Root Device scanning...
721 12:58:51.374479 root_dev_scan_bus for Root Device
722 12:58:51.374539 CPU_CLUSTER: 0 enabled
723 12:58:51.374598 DOMAIN: 0000 enabled
724 12:58:51.374657 DOMAIN: 0000 scanning...
725 12:58:51.374716 PCI: pci_scan_bus for bus 00
726 12:58:51.374776 PCI: 00:00.0 [8086/0000] ops
727 12:58:51.374835 PCI: 00:00.0 [8086/3e34] enabled
728 12:58:51.374895 PCI: 00:02.0 [8086/0000] ops
729 12:58:51.374955 PCI: 00:02.0 [8086/3ea0] enabled
730 12:58:51.375015 PCI: 00:04.0 [8086/1903] enabled
731 12:58:51.375075 PCI: 00:08.0 [8086/1911] enabled
732 12:58:51.375151 PCI: 00:12.0 [8086/9df9] enabled
733 12:58:51.375254 PCI: 00:14.0 [8086/0000] bus ops
734 12:58:51.375318 PCI: 00:14.0 [8086/9ded] enabled
735 12:58:51.375379 PCI: 00:14.2 [8086/9def] enabled
736 12:58:51.375440 PCI: 00:14.3 [8086/9df0] enabled
737 12:58:51.375698 PCI: 00:15.0 [8086/0000] bus ops
738 12:58:51.375766 PCI: 00:15.0 [8086/9de8] enabled
739 12:58:51.375827 PCI: 00:15.1 [8086/0000] bus ops
740 12:58:51.375888 PCI: 00:15.1 [8086/9de9] enabled
741 12:58:51.375949 PCI: 00:16.0 [8086/0000] ops
742 12:58:51.376009 PCI: 00:16.0 [8086/9de0] enabled
743 12:58:51.376070 PCI: 00:17.0 [8086/0000] ops
744 12:58:51.376130 PCI: 00:17.0 [8086/9dd3] enabled
745 12:58:51.376193 PCI: 00:19.0 [8086/0000] bus ops
746 12:58:51.376254 PCI: 00:19.0 [8086/9dc5] enabled
747 12:58:51.376315 PCI: 00:19.2 [8086/0000] ops
748 12:58:51.376393 PCI: 00:19.2 [8086/9dc7] enabled
749 12:58:51.376455 PCI: 00:1c.0 [8086/0000] bus ops
750 12:58:51.376515 PCI: 00:1c.0 [8086/9dbf] enabled
751 12:58:51.376577 PCI: Static device PCI: 00:1c.7 not found, disabling it.
752 12:58:51.376638 PCI: 00:1d.0 [8086/0000] bus ops
753 12:58:51.376698 PCI: 00:1d.0 [8086/9db4] enabled
754 12:58:51.376758 PCI: Static device PCI: 00:1d.1 not found, disabling it.
755 12:58:51.376818 PCI: Static device PCI: 00:1d.4 not found, disabling it.
756 12:58:51.376879 PCI: 00:1f.0 [8086/0000] bus ops
757 12:58:51.376938 PCI: 00:1f.0 [8086/9d84] enabled
758 12:58:51.376998 PCI: Static device PCI: 00:1f.1 not found, disabling it.
759 12:58:51.377059 PCI: Static device PCI: 00:1f.2 not found, disabling it.
760 12:58:51.377120 PCI: 00:1f.3 [8086/0000] bus ops
761 12:58:51.377180 PCI: 00:1f.3 [8086/9dc8] enabled
762 12:58:51.377240 PCI: 00:1f.4 [8086/0000] bus ops
763 12:58:51.377300 PCI: 00:1f.4 [8086/9da3] enabled
764 12:58:51.377360 PCI: 00:1f.5 [8086/0000] bus ops
765 12:58:51.377420 PCI: 00:1f.5 [8086/9da4] enabled
766 12:58:51.377480 PCI: 00:1f.6 [8086/15be] enabled
767 12:58:51.377540 PCI: Leftover static devices:
768 12:58:51.377600 PCI: 00:12.5
769 12:58:51.377660 PCI: 00:12.6
770 12:58:51.377720 PCI: 00:13.0
771 12:58:51.377780 PCI: 00:14.1
772 12:58:51.377840 PCI: 00:14.5
773 12:58:51.377923 PCI: 00:15.2
774 12:58:51.377986 PCI: 00:15.3
775 12:58:51.378069 PCI: 00:16.1
776 12:58:51.378160 PCI: 00:16.2
777 12:58:51.378223 PCI: 00:16.3
778 12:58:51.378283 PCI: 00:16.4
779 12:58:51.378343 PCI: 00:16.5
780 12:58:51.378403 PCI: 00:19.1
781 12:58:51.378463 PCI: 00:1a.0
782 12:58:51.378522 PCI: 00:1c.1
783 12:58:51.378582 PCI: 00:1c.2
784 12:58:51.378641 PCI: 00:1c.3
785 12:58:51.378701 PCI: 00:1c.4
786 12:58:51.378760 PCI: 00:1c.5
787 12:58:51.378820 PCI: 00:1c.6
788 12:58:51.378880 PCI: 00:1c.7
789 12:58:51.378939 PCI: 00:1d.1
790 12:58:51.378998 PCI: 00:1d.2
791 12:58:51.379058 PCI: 00:1d.3
792 12:58:51.379118 PCI: 00:1d.4
793 12:58:51.379177 PCI: 00:1e.0
794 12:58:51.379248 PCI: 00:1e.1
795 12:58:51.379310 PCI: 00:1e.2
796 12:58:51.379370 PCI: 00:1e.3
797 12:58:51.379429 PCI: 00:1f.1
798 12:58:51.379489 PCI: 00:1f.2
799 12:58:51.379549 PCI: Check your devicetree.cb.
800 12:58:51.379610 PCI: 00:14.0 scanning...
801 12:58:51.379670 scan_usb_bus for PCI: 00:14.0
802 12:58:51.379730 USB0 port 0 enabled
803 12:58:51.379790 USB0 port 0 scanning...
804 12:58:51.379850 scan_usb_bus for USB0 port 0
805 12:58:51.379909 USB2 port 0 enabled
806 12:58:51.379968 USB2 port 1 enabled
807 12:58:51.380027 USB2 port 2 enabled
808 12:58:51.380087 USB2 port 4 enabled
809 12:58:51.380146 USB2 port 5 enabled
810 12:58:51.380205 USB2 port 6 enabled
811 12:58:51.380264 USB2 port 7 enabled
812 12:58:51.380324 USB2 port 8 enabled
813 12:58:51.380383 USB2 port 9 enabled
814 12:58:51.380443 USB3 port 0 enabled
815 12:58:51.380503 USB3 port 1 enabled
816 12:58:51.380563 USB3 port 2 enabled
817 12:58:51.380623 USB3 port 3 enabled
818 12:58:51.380683 USB3 port 4 enabled
819 12:58:51.380763 USB2 port 0 scanning...
820 12:58:51.380825 scan_usb_bus for USB2 port 0
821 12:58:51.380885 scan_usb_bus for USB2 port 0 done
822 12:58:51.380944 scan_bus: scanning of bus USB2 port 0 took 9062 usecs
823 12:58:51.381004 USB2 port 1 scanning...
824 12:58:51.381064 scan_usb_bus for USB2 port 1
825 12:58:51.381123 scan_usb_bus for USB2 port 1 done
826 12:58:51.381182 scan_bus: scanning of bus USB2 port 1 took 9061 usecs
827 12:58:51.381242 USB2 port 2 scanning...
828 12:58:51.381302 scan_usb_bus for USB2 port 2
829 12:58:51.381361 scan_usb_bus for USB2 port 2 done
830 12:58:51.381421 scan_bus: scanning of bus USB2 port 2 took 9060 usecs
831 12:58:51.381481 USB2 port 4 scanning...
832 12:58:51.381542 scan_usb_bus for USB2 port 4
833 12:58:51.381601 scan_usb_bus for USB2 port 4 done
834 12:58:51.381661 scan_bus: scanning of bus USB2 port 4 took 9060 usecs
835 12:58:51.381722 USB2 port 5 scanning...
836 12:58:51.381781 scan_usb_bus for USB2 port 5
837 12:58:51.381841 scan_usb_bus for USB2 port 5 done
838 12:58:51.381902 scan_bus: scanning of bus USB2 port 5 took 9060 usecs
839 12:58:51.381962 USB2 port 6 scanning...
840 12:58:51.382022 scan_usb_bus for USB2 port 6
841 12:58:51.382081 scan_usb_bus for USB2 port 6 done
842 12:58:51.382141 scan_bus: scanning of bus USB2 port 6 took 9061 usecs
843 12:58:51.382201 USB2 port 7 scanning...
844 12:58:51.382261 scan_usb_bus for USB2 port 7
845 12:58:51.382319 scan_usb_bus for USB2 port 7 done
846 12:58:51.382379 scan_bus: scanning of bus USB2 port 7 took 9062 usecs
847 12:58:51.382439 USB2 port 8 scanning...
848 12:58:51.382500 scan_usb_bus for USB2 port 8
849 12:58:51.382559 scan_usb_bus for USB2 port 8 done
850 12:58:51.382619 scan_bus: scanning of bus USB2 port 8 took 9061 usecs
851 12:58:51.382679 USB2 port 9 scanning...
852 12:58:51.382739 scan_usb_bus for USB2 port 9
853 12:58:51.382798 scan_usb_bus for USB2 port 9 done
854 12:58:51.382876 scan_bus: scanning of bus USB2 port 9 took 9060 usecs
855 12:58:51.382939 USB3 port 0 scanning...
856 12:58:51.382999 scan_usb_bus for USB3 port 0
857 12:58:51.383059 scan_usb_bus for USB3 port 0 done
858 12:58:51.383120 scan_bus: scanning of bus USB3 port 0 took 9062 usecs
859 12:58:51.383180 USB3 port 1 scanning...
860 12:58:51.383244 scan_usb_bus for USB3 port 1
861 12:58:51.383305 scan_usb_bus for USB3 port 1 done
862 12:58:51.383365 scan_bus: scanning of bus USB3 port 1 took 9062 usecs
863 12:58:51.383425 USB3 port 2 scanning...
864 12:58:51.383485 scan_usb_bus for USB3 port 2
865 12:58:51.383544 scan_usb_bus for USB3 port 2 done
866 12:58:51.383604 scan_bus: scanning of bus USB3 port 2 took 9061 usecs
867 12:58:51.383664 USB3 port 3 scanning...
868 12:58:51.383724 scan_usb_bus for USB3 port 3
869 12:58:51.383783 scan_usb_bus for USB3 port 3 done
870 12:58:51.383842 scan_bus: scanning of bus USB3 port 3 took 9059 usecs
871 12:58:51.383907 USB3 port 4 scanning...
872 12:58:51.383996 scan_usb_bus for USB3 port 4
873 12:58:51.384059 scan_usb_bus for USB3 port 4 done
874 12:58:51.384119 scan_bus: scanning of bus USB3 port 4 took 9059 usecs
875 12:58:51.384378 scan_usb_bus for USB0 port 0 done
876 12:58:51.384449 scan_bus: scanning of bus USB0 port 0 took 239313 usecs
877 12:58:51.384510 scan_usb_bus for PCI: 00:14.0 done
878 12:58:51.384572 scan_bus: scanning of bus PCI: 00:14.0 took 256244 usecs
879 12:58:51.384632 PCI: 00:15.0 scanning...
880 12:58:51.384693 scan_generic_bus for PCI: 00:15.0
881 12:58:51.384753 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
882 12:58:51.384814 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
883 12:58:51.384873 bus: PCI: 00:15.0[0]->I2C: 01:34 enabled
884 12:58:51.384932 scan_generic_bus for PCI: 00:15.0 done
885 12:58:51.384992 scan_bus: scanning of bus PCI: 00:15.0 took 22416 usecs
886 12:58:51.385052 PCI: 00:15.1 scanning...
887 12:58:51.385111 scan_generic_bus for PCI: 00:15.1
888 12:58:51.385172 bus: PCI: 00:15.1[0]->I2C: 02:2c enabled
889 12:58:51.385231 scan_generic_bus for PCI: 00:15.1 done
890 12:58:51.385291 scan_bus: scanning of bus PCI: 00:15.1 took 14215 usecs
891 12:58:51.385352 PCI: 00:19.0 scanning...
892 12:58:51.385411 scan_generic_bus for PCI: 00:19.0
893 12:58:51.385471 bus: PCI: 00:19.0[0]->I2C: 03:50 enabled
894 12:58:51.385531 scan_generic_bus for PCI: 00:19.0 done
895 12:58:51.385591 scan_bus: scanning of bus PCI: 00:19.0 took 14215 usecs
896 12:58:51.385651 PCI: 00:1c.0 scanning...
897 12:58:51.385711 do_pci_scan_bridge for PCI: 00:1c.0
898 12:58:51.385771 PCI: pci_scan_bus for bus 01
899 12:58:51.385830 PCI: 01:00.0 [10ec/525a] enabled
900 12:58:51.385891 Capability: type 0x01 @ 0x80
901 12:58:51.385950 Capability: type 0x05 @ 0x90
902 12:58:51.386010 Capability: type 0x10 @ 0xb0
903 12:58:51.386072 Capability: type 0x10 @ 0x40
904 12:58:51.386132 Enabling Common Clock Configuration
905 12:58:51.386192 L1 Sub-State supported from root port 28
906 12:58:51.386251 L1 Sub-State Support = 0xf
907 12:58:51.386311 CommonModeRestoreTime = 0x3c
908 12:58:51.386371 Power On Value = 0x6, Power On Scale = 0x1
909 12:58:51.386431 ASPM: Enabled L0s and L1
910 12:58:51.386490 Capability: type 0x01 @ 0x80
911 12:58:51.386550 Capability: type 0x05 @ 0x90
912 12:58:51.386610 Capability: type 0x10 @ 0xb0
913 12:58:51.386669 scan_bus: scanning of bus PCI: 00:1c.0 took 53655 usecs
914 12:58:51.386729 PCI: 00:1d.0 scanning...
915 12:58:51.386788 do_pci_scan_bridge for PCI: 00:1d.0
916 12:58:51.386848 PCI: pci_scan_bus for bus 02
917 12:58:51.386908 PCI: 02:00.0 [1217/8620] enabled
918 12:58:51.386968 Capability: type 0x01 @ 0x6c
919 12:58:51.387028 Capability: type 0x05 @ 0x48
920 12:58:51.387088 Capability: type 0x10 @ 0x80
921 12:58:51.387148 Capability: type 0x10 @ 0x40
922 12:58:51.387207 L1 Sub-State supported from root port 29
923 12:58:51.387279 L1 Sub-State Support = 0xf
924 12:58:51.387340 CommonModeRestoreTime = 0x78
925 12:58:51.387400 Power On Value = 0x16, Power On Scale = 0x0
926 12:58:51.387460 ASPM: Enabled L1
927 12:58:51.387520 Capability: type 0x01 @ 0x6c
928 12:58:51.387579 Capability: type 0x05 @ 0x48
929 12:58:51.387639 Capability: type 0x10 @ 0x80
930 12:58:51.387698 scan_bus: scanning of bus PCI: 00:1d.0 took 56015 usecs
931 12:58:51.387758 PCI: 00:1f.0 scanning...
932 12:58:51.387818 scan_lpc_bus for PCI: 00:1f.0
933 12:58:51.387877 PNP: 0c09.0 enabled
934 12:58:51.387937 scan_lpc_bus for PCI: 00:1f.0 done
935 12:58:51.387996 scan_bus: scanning of bus PCI: 00:1f.0 took 11395 usecs
936 12:58:51.388056 PCI: 00:1f.3 scanning...
937 12:58:51.388115 scan_bus: scanning of bus PCI: 00:1f.3 took 2841 usecs
938 12:58:51.388175 PCI: 00:1f.4 scanning...
939 12:58:51.388234 scan_generic_bus for PCI: 00:1f.4
940 12:58:51.388294 scan_generic_bus for PCI: 00:1f.4 done
941 12:58:51.388354 scan_bus: scanning of bus PCI: 00:1f.4 took 10130 usecs
942 12:58:51.388415 PCI: 00:1f.5 scanning...
943 12:58:51.388474 scan_generic_bus for PCI: 00:1f.5
944 12:58:51.388534 scan_generic_bus for PCI: 00:1f.5 done
945 12:58:51.388594 scan_bus: scanning of bus PCI: 00:1f.5 took 10130 usecs
946 12:58:51.388654 scan_bus: scanning of bus DOMAIN: 0000 took 706776 usecs
947 12:58:51.388718 root_dev_scan_bus for Root Device done
948 12:58:51.388780 scan_bus: scanning of bus Root Device took 726907 usecs
949 12:58:51.388840 done
950 12:58:51.388899 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
951 12:58:51.388960 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
952 12:58:51.389021 SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x2000000
953 12:58:51.389082 FMAP: area UNIFIED_MRC_CACHE found @ 1bd0000 (131072 bytes)
954 12:58:51.389143 SPI flash protection: WPSW=0 SRP0=0
955 12:58:51.389202 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
956 12:58:51.389263 BS: BS_DEV_ENUMERATE times (us): entry 0 run 1148642 exit 34826
957 12:58:51.389339 found VGA at PCI: 00:02.0
958 12:58:51.389401 Setting up VGA for PCI: 00:02.0
959 12:58:51.389462 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
960 12:58:51.389522 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
961 12:58:51.389583 Allocating resources...
962 12:58:51.389642 Reading resources...
963 12:58:51.389702 Root Device read_resources bus 0 link: 0
964 12:58:51.389762 CPU_CLUSTER: 0 read_resources bus 0 link: 0
965 12:58:51.389822 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
966 12:58:51.389881 DOMAIN: 0000 read_resources bus 0 link: 0
967 12:58:51.389941 PCI: 00:14.0 read_resources bus 0 link: 0
968 12:58:51.390001 USB0 port 0 read_resources bus 0 link: 0
969 12:58:51.390061 USB0 port 0 read_resources bus 0 link: 0 done
970 12:58:51.390121 PCI: 00:14.0 read_resources bus 0 link: 0 done
971 12:58:51.390181 PCI: 00:15.0 read_resources bus 1 link: 0
972 12:58:51.390241 PCI: 00:15.0 read_resources bus 1 link: 0 done
973 12:58:51.390301 PCI: 00:15.1 read_resources bus 2 link: 0
974 12:58:51.390359 PCI: 00:15.1 read_resources bus 2 link: 0 done
975 12:58:51.390419 PCI: 00:19.0 read_resources bus 3 link: 0
976 12:58:51.390479 PCI: 00:19.0 read_resources bus 3 link: 0 done
977 12:58:51.390538 PCI: 00:1c.0 read_resources bus 1 link: 0
978 12:58:51.390794 PCI: 00:1c.0 read_resources bus 1 link: 0 done
979 12:58:51.390862 PCI: 00:1d.0 read_resources bus 2 link: 0
980 12:58:51.390924 PCI: 00:1d.0 read_resources bus 2 link: 0 done
981 12:58:51.390985 PCI: 00:1f.0 read_resources bus 0 link: 0
982 12:58:51.391045 PCI: 00:1f.0 read_resources bus 0 link: 0 done
983 12:58:51.391105 DOMAIN: 0000 read_resources bus 0 link: 0 done
984 12:58:51.391165 Root Device read_resources bus 0 link: 0 done
985 12:58:51.391234 Done reading resources.
986 12:58:51.391296 Show resources in subtree (Root Device)...After reading.
987 12:58:51.391356 Root Device child on link 0 CPU_CLUSTER: 0
988 12:58:51.391416 CPU_CLUSTER: 0 child on link 0 APIC: 00
989 12:58:51.391476 APIC: 00
990 12:58:51.391536 APIC: 04
991 12:58:51.391596 APIC: 06
992 12:58:51.391656 APIC: 01
993 12:58:51.391715 APIC: 05
994 12:58:51.391774 APIC: 07
995 12:58:51.391834 APIC: 02
996 12:58:51.391893 APIC: 03
997 12:58:51.391952 DOMAIN: 0000 child on link 0 PCI: 00:00.0
998 12:58:51.392012 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
999 12:58:51.392077 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1000 12:58:51.392138 PCI: 00:00.0
1001 12:58:51.392198 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1002 12:58:51.392258 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1003 12:58:51.392318 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1004 12:58:51.392379 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1005 12:58:51.392439 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1006 12:58:51.392499 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1007 12:58:51.392560 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1008 12:58:51.392619 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1009 12:58:51.392680 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1010 12:58:51.392740 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1011 12:58:51.392801 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1012 12:58:51.392862 PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c
1013 12:58:51.392922 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1014 12:58:51.392983 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1015 12:58:51.393064 PCI: 00:02.0
1016 12:58:51.393131 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1017 12:58:51.393194 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1018 12:58:51.393256 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1019 12:58:51.393317 PCI: 00:04.0
1020 12:58:51.393377 PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1021 12:58:51.393437 PCI: 00:08.0
1022 12:58:51.393496 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1023 12:58:51.393556 PCI: 00:12.0
1024 12:58:51.393617 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1025 12:58:51.393685 PCI: 00:14.0 child on link 0 USB0 port 0
1026 12:58:51.393748 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1027 12:58:51.393810 USB0 port 0 child on link 0 USB2 port 0
1028 12:58:51.393869 USB2 port 0
1029 12:58:51.393928 USB2 port 1
1030 12:58:51.393987 USB2 port 2
1031 12:58:51.394046 USB2 port 4
1032 12:58:51.394104 USB2 port 5
1033 12:58:51.394163 USB2 port 6
1034 12:58:51.394221 USB2 port 7
1035 12:58:51.394281 USB2 port 8
1036 12:58:51.394339 USB2 port 9
1037 12:58:51.394398 USB3 port 0
1038 12:58:51.394456 USB3 port 1
1039 12:58:51.394515 USB3 port 2
1040 12:58:51.394573 USB3 port 3
1041 12:58:51.394632 USB3 port 4
1042 12:58:51.394691 PCI: 00:14.2
1043 12:58:51.394750 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1044 12:58:51.394810 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1045 12:58:51.394870 PCI: 00:14.3
1046 12:58:51.394929 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1047 12:58:51.394989 PCI: 00:15.0 child on link 0 I2C: 01:10
1048 12:58:51.395049 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1049 12:58:51.395109 I2C: 01:10
1050 12:58:51.395168 I2C: 01:10
1051 12:58:51.395233 I2C: 01:34
1052 12:58:51.395295 PCI: 00:15.1 child on link 0 I2C: 02:2c
1053 12:58:51.395354 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1054 12:58:51.395413 I2C: 02:2c
1055 12:58:51.395472 PCI: 00:16.0
1056 12:58:51.395729 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1057 12:58:51.395795 PCI: 00:17.0
1058 12:58:51.395856 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1059 12:58:51.395917 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1060 12:58:51.395977 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1061 12:58:51.396036 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1062 12:58:51.396095 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1063 12:58:51.396155 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1064 12:58:51.396215 PCI: 00:19.0 child on link 0 I2C: 03:50
1065 12:58:51.396286 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1066 12:58:51.396348 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1067 12:58:51.396435 I2C: 03:50
1068 12:58:51.396520 PCI: 00:19.2
1069 12:58:51.396582 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1070 12:58:51.396643 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1071 12:58:51.396720 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1072 12:58:51.396815 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1073 12:58:51.396881 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1074 12:58:51.396943 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1075 12:58:51.397003 PCI: 01:00.0
1076 12:58:51.397063 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
1077 12:58:51.397127 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1078 12:58:51.397203 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1079 12:58:51.397291 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1080 12:58:51.397354 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1081 12:58:51.397415 PCI: 02:00.0
1082 12:58:51.397475 PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1083 12:58:51.397535 PCI: 02:00.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 14
1084 12:58:51.397595 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1085 12:58:51.397655 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1086 12:58:51.397715 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1087 12:58:51.397775 PNP: 0c09.0
1088 12:58:51.397834 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1089 12:58:51.397894 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1090 12:58:51.397969 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1091 12:58:51.398037 PCI: 00:1f.3
1092 12:58:51.398123 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1093 12:58:51.398191 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1094 12:58:51.398259 PCI: 00:1f.4
1095 12:58:51.398344 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1096 12:58:51.398418 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1097 12:58:51.398479 PCI: 00:1f.5
1098 12:58:51.398565 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1099 12:58:51.398668 PCI: 00:1f.6
1100 12:58:51.398743 PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
1101 12:58:51.398829 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1102 12:58:51.398935 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1103 12:58:51.399040 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1104 12:58:51.399143 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1105 12:58:51.399247 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1106 12:58:51.399342 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1107 12:58:51.399435 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1108 12:58:51.399527 PCI: 00:17.0 18 * [0x60 - 0x67] io
1109 12:58:51.399619 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1110 12:58:51.399712 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1111 12:58:51.399805 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1112 12:58:51.399904 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1113 12:58:51.399988 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1114 12:58:51.400083 PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1115 12:58:51.400147 PCI: 01:00.0 14 * [0x0 - 0xfff] mem
1116 12:58:51.400424 PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1117 12:58:51.400503 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1118 12:58:51.400569 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1119 12:58:51.400631 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1120 12:58:51.400693 PCI: 02:00.0 10 * [0x0 - 0xfff] mem
1121 12:58:51.400754 PCI: 02:00.0 14 * [0x1000 - 0x17ff] mem
1122 12:58:51.400814 PCI: 00:1d.0 mem: base: 1800 size: 100000 align: 20 gran: 20 limit: ffffffff done
1123 12:58:51.400874 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1124 12:58:51.400933 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1125 12:58:51.400993 PCI: 00:1c.0 20 * [0x11000000 - 0x110fffff] mem
1126 12:58:51.401053 PCI: 00:1d.0 20 * [0x11100000 - 0x111fffff] mem
1127 12:58:51.401112 PCI: 00:1f.3 20 * [0x11200000 - 0x112fffff] mem
1128 12:58:51.401171 PCI: 00:1f.6 10 * [0x11300000 - 0x1131ffff] mem
1129 12:58:51.401231 PCI: 00:14.0 10 * [0x11320000 - 0x1132ffff] mem
1130 12:58:51.401289 PCI: 00:04.0 10 * [0x11330000 - 0x11337fff] mem
1131 12:58:51.401348 PCI: 00:14.3 10 * [0x11338000 - 0x1133bfff] mem
1132 12:58:51.401407 PCI: 00:1f.3 10 * [0x1133c000 - 0x1133ffff] mem
1133 12:58:51.401498 PCI: 00:14.2 10 * [0x11340000 - 0x11341fff] mem
1134 12:58:51.401562 PCI: 00:17.0 10 * [0x11342000 - 0x11343fff] mem
1135 12:58:51.401621 PCI: 00:08.0 10 * [0x11344000 - 0x11344fff] mem
1136 12:58:51.401681 PCI: 00:12.0 10 * [0x11345000 - 0x11345fff] mem
1137 12:58:51.401740 PCI: 00:14.2 18 * [0x11346000 - 0x11346fff] mem
1138 12:58:51.401799 PCI: 00:15.0 10 * [0x11347000 - 0x11347fff] mem
1139 12:58:51.401859 PCI: 00:15.1 10 * [0x11348000 - 0x11348fff] mem
1140 12:58:51.401917 PCI: 00:16.0 10 * [0x11349000 - 0x11349fff] mem
1141 12:58:51.401977 PCI: 00:19.0 10 * [0x1134a000 - 0x1134afff] mem
1142 12:58:51.402036 PCI: 00:19.0 18 * [0x1134b000 - 0x1134bfff] mem
1143 12:58:51.402095 PCI: 00:19.2 18 * [0x1134c000 - 0x1134cfff] mem
1144 12:58:51.402153 PCI: 00:1f.5 10 * [0x1134d000 - 0x1134dfff] mem
1145 12:58:51.402212 PCI: 00:17.0 24 * [0x1134e000 - 0x1134e7ff] mem
1146 12:58:51.402272 PCI: 00:17.0 14 * [0x1134f000 - 0x1134f0ff] mem
1147 12:58:51.402331 PCI: 00:1f.4 10 * [0x11350000 - 0x113500ff] mem
1148 12:58:51.402390 DOMAIN: 0000 mem: base: 11350100 size: 11350100 align: 28 gran: 0 limit: ffffffff done
1149 12:58:51.402450 avoid_fixed_resources: DOMAIN: 0000
1150 12:58:51.402509 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1151 12:58:51.402569 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1152 12:58:51.402628 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1153 12:58:51.402689 constrain_resources: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)
1154 12:58:51.402748 constrain_resources: PCI: 00:00.0 08 base 000c0000 limit 89ffffff mem (fixed)
1155 12:58:51.402808 constrain_resources: PCI: 00:00.0 0a base 8a000000 limit 8affffff mem (fixed)
1156 12:58:51.402868 constrain_resources: PCI: 00:00.0 0b base 8b000000 limit 8f7fffff mem (fixed)
1157 12:58:51.402928 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1158 12:58:51.402988 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1159 12:58:51.403047 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1160 12:58:51.403106 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1161 12:58:51.403166 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1162 12:58:51.403234 Setting resources...
1163 12:58:51.403295 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1164 12:58:51.403354 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1165 12:58:51.403413 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1166 12:58:51.403472 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1167 12:58:51.403531 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1168 12:58:51.403590 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1169 12:58:51.403649 PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1170 12:58:51.403710 PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1171 12:58:51.403769 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1172 12:58:51.403828 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1173 12:58:51.403887 DOMAIN: 0000 mem: base:c0000000 size:11350100 align:28 gran:0 limit:dfffffff
1174 12:58:51.403947 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1175 12:58:51.404006 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1176 12:58:51.404066 PCI: 00:1c.0 20 * [0xd1000000 - 0xd10fffff] mem
1177 12:58:51.404125 PCI: 00:1d.0 20 * [0xd1100000 - 0xd11fffff] mem
1178 12:58:51.404184 PCI: 00:1f.3 20 * [0xd1200000 - 0xd12fffff] mem
1179 12:58:51.404243 PCI: 00:1f.6 10 * [0xd1300000 - 0xd131ffff] mem
1180 12:58:51.404302 PCI: 00:14.0 10 * [0xd1320000 - 0xd132ffff] mem
1181 12:58:51.404361 PCI: 00:04.0 10 * [0xd1330000 - 0xd1337fff] mem
1182 12:58:51.404420 PCI: 00:14.3 10 * [0xd1338000 - 0xd133bfff] mem
1183 12:58:51.404479 PCI: 00:1f.3 10 * [0xd133c000 - 0xd133ffff] mem
1184 12:58:51.404538 PCI: 00:14.2 10 * [0xd1340000 - 0xd1341fff] mem
1185 12:58:51.404597 PCI: 00:17.0 10 * [0xd1342000 - 0xd1343fff] mem
1186 12:58:51.404655 PCI: 00:08.0 10 * [0xd1344000 - 0xd1344fff] mem
1187 12:58:51.404912 PCI: 00:12.0 10 * [0xd1345000 - 0xd1345fff] mem
1188 12:58:51.404978 PCI: 00:14.2 18 * [0xd1346000 - 0xd1346fff] mem
1189 12:58:51.405038 PCI: 00:15.0 10 * [0xd1347000 - 0xd1347fff] mem
1190 12:58:51.405098 PCI: 00:15.1 10 * [0xd1348000 - 0xd1348fff] mem
1191 12:58:51.405157 PCI: 00:16.0 10 * [0xd1349000 - 0xd1349fff] mem
1192 12:58:51.405216 PCI: 00:19.0 10 * [0xd134a000 - 0xd134afff] mem
1193 12:58:51.405275 PCI: 00:19.0 18 * [0xd134b000 - 0xd134bfff] mem
1194 12:58:51.405334 PCI: 00:19.2 18 * [0xd134c000 - 0xd134cfff] mem
1195 12:58:51.405393 PCI: 00:1f.5 10 * [0xd134d000 - 0xd134dfff] mem
1196 12:58:51.405452 PCI: 00:17.0 24 * [0xd134e000 - 0xd134e7ff] mem
1197 12:58:51.405512 PCI: 00:17.0 14 * [0xd134f000 - 0xd134f0ff] mem
1198 12:58:51.405572 PCI: 00:1f.4 10 * [0xd1350000 - 0xd13500ff] mem
1199 12:58:51.405631 DOMAIN: 0000 mem: next_base: d1350100 size: 11350100 align: 28 gran: 0 done
1200 12:58:51.405690 PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1201 12:58:51.405750 PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1202 12:58:51.405809 PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1203 12:58:51.405869 PCI: 01:00.0 14 * [0xd1000000 - 0xd1000fff] mem
1204 12:58:51.405929 PCI: 00:1c.0 mem: next_base: d1001000 size: 100000 align: 20 gran: 20 done
1205 12:58:51.405989 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1206 12:58:51.406049 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1207 12:58:51.406108 PCI: 00:1d.0 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff
1208 12:58:51.406167 PCI: 02:00.0 10 * [0xd1100000 - 0xd1100fff] mem
1209 12:58:51.406227 PCI: 02:00.0 14 * [0xd1101000 - 0xd11017ff] mem
1210 12:58:51.406286 PCI: 00:1d.0 mem: next_base: d1101800 size: 100000 align: 20 gran: 20 done
1211 12:58:51.406345 Root Device assign_resources, bus 0 link: 0
1212 12:58:51.406404 DOMAIN: 0000 assign_resources, bus 0 link: 0
1213 12:58:51.406464 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1214 12:58:51.406524 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1215 12:58:51.406583 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1216 12:58:51.406643 PCI: 00:04.0 10 <- [0x00d1330000 - 0x00d1337fff] size 0x00008000 gran 0x0f mem64
1217 12:58:51.406702 PCI: 00:08.0 10 <- [0x00d1344000 - 0x00d1344fff] size 0x00001000 gran 0x0c mem64
1218 12:58:51.406762 PCI: 00:12.0 10 <- [0x00d1345000 - 0x00d1345fff] size 0x00001000 gran 0x0c mem64
1219 12:58:51.406821 PCI: 00:14.0 10 <- [0x00d1320000 - 0x00d132ffff] size 0x00010000 gran 0x10 mem64
1220 12:58:51.406880 PCI: 00:14.0 assign_resources, bus 0 link: 0
1221 12:58:51.406939 PCI: 00:14.0 assign_resources, bus 0 link: 0
1222 12:58:51.406998 PCI: 00:14.2 10 <- [0x00d1340000 - 0x00d1341fff] size 0x00002000 gran 0x0d mem64
1223 12:58:51.407057 PCI: 00:14.2 18 <- [0x00d1346000 - 0x00d1346fff] size 0x00001000 gran 0x0c mem64
1224 12:58:51.407117 PCI: 00:14.3 10 <- [0x00d1338000 - 0x00d133bfff] size 0x00004000 gran 0x0e mem64
1225 12:58:51.407176 PCI: 00:15.0 10 <- [0x00d1347000 - 0x00d1347fff] size 0x00001000 gran 0x0c mem64
1226 12:58:51.407245 PCI: 00:15.0 assign_resources, bus 1 link: 0
1227 12:58:51.407306 PCI: 00:15.0 assign_resources, bus 1 link: 0
1228 12:58:51.407366 PCI: 00:15.1 10 <- [0x00d1348000 - 0x00d1348fff] size 0x00001000 gran 0x0c mem64
1229 12:58:51.407425 PCI: 00:15.1 assign_resources, bus 2 link: 0
1230 12:58:51.407484 PCI: 00:15.1 assign_resources, bus 2 link: 0
1231 12:58:51.407542 PCI: 00:16.0 10 <- [0x00d1349000 - 0x00d1349fff] size 0x00001000 gran 0x0c mem64
1232 12:58:51.407601 PCI: 00:17.0 10 <- [0x00d1342000 - 0x00d1343fff] size 0x00002000 gran 0x0d mem
1233 12:58:51.407660 PCI: 00:17.0 14 <- [0x00d134f000 - 0x00d134f0ff] size 0x00000100 gran 0x08 mem
1234 12:58:51.407719 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1235 12:58:51.407778 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1236 12:58:51.407837 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1237 12:58:51.407896 PCI: 00:17.0 24 <- [0x00d134e000 - 0x00d134e7ff] size 0x00000800 gran 0x0b mem
1238 12:58:51.407955 PCI: 00:19.0 10 <- [0x00d134a000 - 0x00d134afff] size 0x00001000 gran 0x0c mem64
1239 12:58:51.408013 PCI: 00:19.0 18 <- [0x00d134b000 - 0x00d134bfff] size 0x00001000 gran 0x0c mem64
1240 12:58:51.408072 PCI: 00:19.0 assign_resources, bus 3 link: 0
1241 12:58:51.408129 PCI: 00:19.0 assign_resources, bus 3 link: 0
1242 12:58:51.408187 PCI: 00:19.2 18 <- [0x00d134c000 - 0x00d134cfff] size 0x00001000 gran 0x0c mem64
1243 12:58:51.408246 PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1244 12:58:51.408306 PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1245 12:58:51.408365 PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1246 12:58:51.408424 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1247 12:58:51.408482 PCI: 01:00.0 14 <- [0x00d1000000 - 0x00d1000fff] size 0x00001000 gran 0x0c mem
1248 12:58:51.408541 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1249 12:58:51.408797 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io
1250 12:58:51.408866 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
1251 12:58:51.408926 PCI: 00:1d.0 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem
1252 12:58:51.408985 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1253 12:58:51.409044 PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d1100fff] size 0x00001000 gran 0x0c mem
1254 12:58:51.409104 PCI: 02:00.0 14 <- [0x00d1101000 - 0x00d11017ff] size 0x00000800 gran 0x0b mem
1255 12:58:51.409163 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1256 12:58:51.409221 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1257 12:58:51.409281 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1258 12:58:51.409341 LPC: Trying to open IO window from 930 size 8
1259 12:58:51.409400 LPC: Trying to open IO window from 940 size 8
1260 12:58:51.409459 LPC: Trying to open IO window from 950 size 10
1261 12:58:51.409518 PCI: 00:1f.3 10 <- [0x00d133c000 - 0x00d133ffff] size 0x00004000 gran 0x0e mem64
1262 12:58:51.409576 PCI: 00:1f.3 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 mem64
1263 12:58:51.409636 PCI: 00:1f.4 10 <- [0x00d1350000 - 0x00d13500ff] size 0x00000100 gran 0x08 mem64
1264 12:58:51.409695 PCI: 00:1f.5 10 <- [0x00d134d000 - 0x00d134dfff] size 0x00001000 gran 0x0c mem
1265 12:58:51.409754 PCI: 00:1f.6 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem
1266 12:58:51.409813 DOMAIN: 0000 assign_resources, bus 0 link: 0
1267 12:58:51.409872 Root Device assign_resources, bus 0 link: 0
1268 12:58:51.409930 Done setting resources.
1269 12:58:51.409992 Show resources in subtree (Root Device)...After assigning values.
1270 12:58:51.410051 Root Device child on link 0 CPU_CLUSTER: 0
1271 12:58:51.410110 CPU_CLUSTER: 0 child on link 0 APIC: 00
1272 12:58:51.410169 APIC: 00
1273 12:58:51.410227 APIC: 04
1274 12:58:51.410284 APIC: 06
1275 12:58:51.410342 APIC: 01
1276 12:58:51.410400 APIC: 05
1277 12:58:51.410465 APIC: 07
1278 12:58:51.410545 APIC: 02
1279 12:58:51.410605 APIC: 03
1280 12:58:51.410664 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1281 12:58:51.410723 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1282 12:58:51.410783 DOMAIN: 0000 resource base c0000000 size 11350100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1283 12:58:51.410843 PCI: 00:00.0
1284 12:58:51.410901 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1285 12:58:51.410961 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1286 12:58:51.411021 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1287 12:58:51.411080 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1288 12:58:51.411140 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1289 12:58:51.411199 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1290 12:58:51.411272 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1291 12:58:51.411332 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1292 12:58:51.411392 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1293 12:58:51.411451 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1294 12:58:51.411510 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1295 12:58:51.411569 PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c
1296 12:58:51.411628 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1297 12:58:51.411688 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1298 12:58:51.411748 PCI: 00:02.0
1299 12:58:51.411806 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1300 12:58:51.411865 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1301 12:58:51.411924 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1302 12:58:51.411983 PCI: 00:04.0
1303 12:58:51.412042 PCI: 00:04.0 resource base d1330000 size 8000 align 15 gran 15 limit d1337fff flags 60000201 index 10
1304 12:58:51.412101 PCI: 00:08.0
1305 12:58:51.412159 PCI: 00:08.0 resource base d1344000 size 1000 align 12 gran 12 limit d1344fff flags 60000201 index 10
1306 12:58:51.412218 PCI: 00:12.0
1307 12:58:51.412277 PCI: 00:12.0 resource base d1345000 size 1000 align 12 gran 12 limit d1345fff flags 60000201 index 10
1308 12:58:51.412336 PCI: 00:14.0 child on link 0 USB0 port 0
1309 12:58:51.412395 PCI: 00:14.0 resource base d1320000 size 10000 align 16 gran 16 limit d132ffff flags 60000201 index 10
1310 12:58:51.412454 USB0 port 0 child on link 0 USB2 port 0
1311 12:58:51.412512 USB2 port 0
1312 12:58:51.412570 USB2 port 1
1313 12:58:51.412825 USB2 port 2
1314 12:58:51.412889 USB2 port 4
1315 12:58:51.412948 USB2 port 5
1316 12:58:51.413006 USB2 port 6
1317 12:58:51.413064 USB2 port 7
1318 12:58:51.413123 USB2 port 8
1319 12:58:51.413181 USB2 port 9
1320 12:58:51.413239 USB3 port 0
1321 12:58:51.413298 USB3 port 1
1322 12:58:51.413356 USB3 port 2
1323 12:58:51.413415 USB3 port 3
1324 12:58:51.413473 USB3 port 4
1325 12:58:51.413530 PCI: 00:14.2
1326 12:58:51.413589 PCI: 00:14.2 resource base d1340000 size 2000 align 13 gran 13 limit d1341fff flags 60000201 index 10
1327 12:58:51.413649 PCI: 00:14.2 resource base d1346000 size 1000 align 12 gran 12 limit d1346fff flags 60000201 index 18
1328 12:58:51.413708 PCI: 00:14.3
1329 12:58:51.413766 PCI: 00:14.3 resource base d1338000 size 4000 align 14 gran 14 limit d133bfff flags 60000201 index 10
1330 12:58:51.413825 PCI: 00:15.0 child on link 0 I2C: 01:10
1331 12:58:51.413884 PCI: 00:15.0 resource base d1347000 size 1000 align 12 gran 12 limit d1347fff flags 60000201 index 10
1332 12:58:51.413943 I2C: 01:10
1333 12:58:51.414001 I2C: 01:10
1334 12:58:51.414058 I2C: 01:34
1335 12:58:51.414116 PCI: 00:15.1 child on link 0 I2C: 02:2c
1336 12:58:51.414175 PCI: 00:15.1 resource base d1348000 size 1000 align 12 gran 12 limit d1348fff flags 60000201 index 10
1337 12:58:51.414234 I2C: 02:2c
1338 12:58:51.414291 PCI: 00:16.0
1339 12:58:51.414349 PCI: 00:16.0 resource base d1349000 size 1000 align 12 gran 12 limit d1349fff flags 60000201 index 10
1340 12:58:51.414408 PCI: 00:17.0
1341 12:58:51.414467 PCI: 00:17.0 resource base d1342000 size 2000 align 13 gran 13 limit d1343fff flags 60000200 index 10
1342 12:58:51.414525 PCI: 00:17.0 resource base d134f000 size 100 align 12 gran 8 limit d134f0ff flags 60000200 index 14
1343 12:58:51.414585 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1344 12:58:51.414643 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1345 12:58:51.414702 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1346 12:58:51.414761 PCI: 00:17.0 resource base d134e000 size 800 align 12 gran 11 limit d134e7ff flags 60000200 index 24
1347 12:58:51.414820 PCI: 00:19.0 child on link 0 I2C: 03:50
1348 12:58:51.414879 PCI: 00:19.0 resource base d134a000 size 1000 align 12 gran 12 limit d134afff flags 60000201 index 10
1349 12:58:51.414938 PCI: 00:19.0 resource base d134b000 size 1000 align 12 gran 12 limit d134bfff flags 60000201 index 18
1350 12:58:51.414996 I2C: 03:50
1351 12:58:51.415054 PCI: 00:19.2
1352 12:58:51.415112 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1353 12:58:51.415172 PCI: 00:19.2 resource base d134c000 size 1000 align 12 gran 12 limit d134cfff flags 60000201 index 18
1354 12:58:51.415241 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1355 12:58:51.415302 PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1356 12:58:51.415362 PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1357 12:58:51.415421 PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1358 12:58:51.415480 PCI: 01:00.0
1359 12:58:51.415539 PCI: 01:00.0 resource base d1000000 size 1000 align 12 gran 12 limit d1000fff flags 60000200 index 14
1360 12:58:51.415599 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1361 12:58:51.415657 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1362 12:58:51.415716 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1363 12:58:51.415775 PCI: 00:1d.0 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20
1364 12:58:51.415834 PCI: 02:00.0
1365 12:58:51.415892 PCI: 02:00.0 resource base d1100000 size 1000 align 12 gran 12 limit d1100fff flags 60000200 index 10
1366 12:58:51.415951 PCI: 02:00.0 resource base d1101000 size 800 align 12 gran 11 limit d11017ff flags 60000200 index 14
1367 12:58:51.416011 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1368 12:58:51.416070 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1369 12:58:51.416129 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1370 12:58:51.416188 PNP: 0c09.0
1371 12:58:51.416247 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1372 12:58:51.416307 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1373 12:58:51.416366 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1374 12:58:51.416425 PCI: 00:1f.3
1375 12:58:51.416484 PCI: 00:1f.3 resource base d133c000 size 4000 align 14 gran 14 limit d133ffff flags 60000201 index 10
1376 12:58:51.416543 PCI: 00:1f.3 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60000201 index 20
1377 12:58:51.416602 PCI: 00:1f.4
1378 12:58:51.416661 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1379 12:58:51.416945 PCI: 00:1f.4 resource base d1350000 size 100 align 12 gran 8 limit d13500ff flags 60000201 index 10
1380 12:58:51.417018 PCI: 00:1f.5
1381 12:58:51.417080 PCI: 00:1f.5 resource base d134d000 size 1000 align 12 gran 12 limit d134dfff flags 60000200 index 10
1382 12:58:51.417141 PCI: 00:1f.6
1383 12:58:51.417199 PCI: 00:1f.6 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10
1384 12:58:51.417259 Done allocating resources.
1385 12:58:51.417317 BS: BS_DEV_RESOURCES times (us): entry 0 run 2548823 exit 14
1386 12:58:51.417377 Enabling resources...
1387 12:58:51.417435 PCI: 00:00.0 subsystem <- 1028/3e34
1388 12:58:51.417494 PCI: 00:00.0 cmd <- 06
1389 12:58:51.417552 PCI: 00:02.0 subsystem <- 1028/3ea0
1390 12:58:51.417611 PCI: 00:02.0 cmd <- 03
1391 12:58:51.417669 PCI: 00:04.0 subsystem <- 1028/1903
1392 12:58:51.417726 PCI: 00:04.0 cmd <- 02
1393 12:58:51.417784 PCI: 00:08.0 cmd <- 06
1394 12:58:51.417842 PCI: 00:12.0 subsystem <- 1028/9df9
1395 12:58:51.417901 PCI: 00:12.0 cmd <- 02
1396 12:58:51.417958 PCI: 00:14.0 subsystem <- 1028/9ded
1397 12:58:51.418017 PCI: 00:14.0 cmd <- 02
1398 12:58:51.418075 PCI: 00:14.2 cmd <- 02
1399 12:58:51.418133 PCI: 00:14.3 subsystem <- 1028/9df0
1400 12:58:51.418192 PCI: 00:14.3 cmd <- 02
1401 12:58:51.418250 PCI: 00:15.0 subsystem <- 1028/9de8
1402 12:58:51.418308 PCI: 00:15.0 cmd <- 02
1403 12:58:51.418366 PCI: 00:15.1 subsystem <- 1028/9de9
1404 12:58:51.418425 PCI: 00:15.1 cmd <- 02
1405 12:58:51.418482 PCI: 00:16.0 subsystem <- 1028/9de0
1406 12:58:51.418540 PCI: 00:16.0 cmd <- 02
1407 12:58:51.418598 PCI: 00:17.0 subsystem <- 1028/9dd3
1408 12:58:51.418657 PCI: 00:17.0 cmd <- 03
1409 12:58:51.418714 PCI: 00:19.0 subsystem <- 1028/9dc5
1410 12:58:51.418773 PCI: 00:19.0 cmd <- 06
1411 12:58:51.418831 PCI: 00:19.2 subsystem <- 1028/9dc7
1412 12:58:51.418890 PCI: 00:19.2 cmd <- 06
1413 12:58:51.418948 PCI: 00:1c.0 bridge ctrl <- 0003
1414 12:58:51.419006 PCI: 00:1c.0 subsystem <- 1028/9dbf
1415 12:58:51.419110 Capability: type 0x10 @ 0x40
1416 12:58:51.419203 Capability: type 0x05 @ 0x80
1417 12:58:51.419279 Capability: type 0x0d @ 0x90
1418 12:58:51.419340 PCI: 00:1c.0 cmd <- 06
1419 12:58:51.419399 PCI: 00:1d.0 bridge ctrl <- 0003
1420 12:58:51.419457 PCI: 00:1d.0 subsystem <- 1028/9db4
1421 12:58:51.419516 Capability: type 0x10 @ 0x40
1422 12:58:51.419574 Capability: type 0x05 @ 0x80
1423 12:58:51.419632 Capability: type 0x0d @ 0x90
1424 12:58:51.419690 PCI: 00:1d.0 cmd <- 06
1425 12:58:51.419749 PCI: 00:1f.0 subsystem <- 1028/9d84
1426 12:58:51.419807 PCI: 00:1f.0 cmd <- 407
1427 12:58:51.419865 PCI: 00:1f.3 subsystem <- 1028/9dc8
1428 12:58:51.419924 PCI: 00:1f.3 cmd <- 02
1429 12:58:51.419983 PCI: 00:1f.4 subsystem <- 1028/9da3
1430 12:58:51.420041 PCI: 00:1f.4 cmd <- 03
1431 12:58:51.420099 PCI: 00:1f.5 subsystem <- 1028/9da4
1432 12:58:51.420157 PCI: 00:1f.5 cmd <- 406
1433 12:58:51.420215 PCI: 00:1f.6 subsystem <- 1028/15be
1434 12:58:51.420273 PCI: 00:1f.6 cmd <- 02
1435 12:58:51.420330 PCI: 01:00.0 cmd <- 02
1436 12:58:51.420388 PCI: 02:00.0 cmd <- 06
1437 12:58:51.420445 done.
1438 12:58:51.420504 BS: BS_DEV_ENABLE times (us): entry 397 run 170478 exit 0
1439 12:58:51.420563 Initializing devices...
1440 12:58:51.420621 Root Device init ...
1441 12:58:51.420679 Root Device init finished in 2139 usecs
1442 12:58:51.420737 CPU_CLUSTER: 0 init ...
1443 12:58:51.420796 CPU_CLUSTER: 0 init finished in 2429 usecs
1444 12:58:51.420854 PCI: 00:00.0 init ...
1445 12:58:51.420912 CPU TDP: 15 Watts
1446 12:58:51.420970 CPU PL2 = 51 Watts
1447 12:58:51.421028 PCI: 00:00.0 init finished in 7036 usecs
1448 12:58:51.421086 PCI: 00:02.0 init ...
1449 12:58:51.421144 PCI: 00:02.0 init finished in 2236 usecs
1450 12:58:51.421202 PCI: 00:04.0 init ...
1451 12:58:51.421260 PCI: 00:04.0 init finished in 2236 usecs
1452 12:58:51.421318 PCI: 00:08.0 init ...
1453 12:58:51.421376 PCI: 00:08.0 init finished in 2236 usecs
1454 12:58:51.421435 PCI: 00:12.0 init ...
1455 12:58:51.421492 PCI: 00:12.0 init finished in 2235 usecs
1456 12:58:51.421551 PCI: 00:14.0 init ...
1457 12:58:51.421608 PCI: 00:14.0 init finished in 2235 usecs
1458 12:58:51.421668 PCI: 00:14.2 init ...
1459 12:58:51.421726 PCI: 00:14.2 init finished in 2236 usecs
1460 12:58:51.421784 PCI: 00:14.3 init ...
1461 12:58:51.421841 PCI: 00:14.3 init finished in 2232 usecs
1462 12:58:51.421899 PCI: 00:15.0 init ...
1463 12:58:51.421957 DW I2C bus 0 at 0xd1347000 (400 KHz)
1464 12:58:51.422016 PCI: 00:15.0 init finished in 5934 usecs
1465 12:58:51.422074 PCI: 00:15.1 init ...
1466 12:58:51.422132 DW I2C bus 1 at 0xd1348000 (400 KHz)
1467 12:58:51.422191 PCI: 00:15.1 init finished in 5915 usecs
1468 12:58:51.422249 PCI: 00:16.0 init ...
1469 12:58:51.422307 PCI: 00:16.0 init finished in 2236 usecs
1470 12:58:51.422364 PCI: 00:19.0 init ...
1471 12:58:51.422422 DW I2C bus 4 at 0xd134a000 (400 KHz)
1472 12:58:51.422480 PCI: 00:19.0 init finished in 5923 usecs
1473 12:58:51.422539 PCI: 00:1c.0 init ...
1474 12:58:51.422596 Initializing PCH PCIe bridge.
1475 12:58:51.422655 PCI: 00:1c.0 init finished in 5239 usecs
1476 12:58:51.422713 PCI: 00:1d.0 init ...
1477 12:58:51.422771 Initializing PCH PCIe bridge.
1478 12:58:51.422829 PCI: 00:1d.0 init finished in 5248 usecs
1479 12:58:51.422887 PCI: 00:1f.0 init ...
1480 12:58:51.422945 IOAPIC: Initializing IOAPIC at 0xfec00000
1481 12:58:51.423003 IOAPIC: Bootstrap Processor Local APIC = 0x00
1482 12:58:51.423060 IOAPIC: ID = 0x02
1483 12:58:51.423118 IOAPIC: Dumping registers
1484 12:58:51.423175 reg 0x0000: 0x02000000
1485 12:58:51.423242 reg 0x0001: 0x00770020
1486 12:58:51.423302 reg 0x0002: 0x00000000
1487 12:58:51.423360 PCI: 00:1f.0 init finished in 25030 usecs
1488 12:58:51.423418 PCI: 00:1f.3 init ...
1489 12:58:51.423476 HDA: codec_mask = 05
1490 12:58:51.423534 HDA: Initializing codec #2
1491 12:58:51.423592 HDA: codec viddid: 8086280b
1492 12:58:51.423649 HDA: No verb table entry found
1493 12:58:51.423708 HDA: Initializing codec #0
1494 12:58:51.423766 HDA: codec viddid: 10ec0236
1495 12:58:51.423824 HDA: verb loaded.
1496 12:58:51.423881 PCI: 00:1f.3 init finished in 28831 usecs
1497 12:58:51.423939 PCI: 00:1f.4 init ...
1498 12:58:51.423998 PCI: 00:1f.4 init finished in 2246 usecs
1499 12:58:51.424057 PCI: 00:1f.6 init ...
1500 12:58:51.424115 PCI: 00:1f.6 init finished in 2236 usecs
1501 12:58:51.424172 PCI: 01:00.0 init ...
1502 12:58:51.424230 PCI: 01:00.0 init finished in 2236 usecs
1503 12:58:51.424289 PCI: 02:00.0 init ...
1504 12:58:51.424544 PCI: 02:00.0 init finished in 2227 usecs
1505 12:58:51.424613 PNP: 0c09.0 init ...
1506 12:58:51.424674 EC Label : 00.00.20
1507 12:58:51.424732 EC Revision : 9ca674bba
1508 12:58:51.424790 EC Model Num : 08B9
1509 12:58:51.424849 EC Build Date : 05/10/19
1510 12:58:51.424908 PNP: 0c09.0 init finished in 21751 usecs
1511 12:58:51.424966 Devices initialized
1512 12:58:51.425024 Show all devs... After init.
1513 12:58:51.425082 Root Device: enabled 1
1514 12:58:51.425141 CPU_CLUSTER: 0: enabled 1
1515 12:58:51.425200 DOMAIN: 0000: enabled 1
1516 12:58:51.425258 APIC: 00: enabled 1
1517 12:58:51.425316 PCI: 00:00.0: enabled 1
1518 12:58:51.425374 PCI: 00:02.0: enabled 1
1519 12:58:51.425433 PCI: 00:04.0: enabled 1
1520 12:58:51.425491 PCI: 00:12.0: enabled 1
1521 12:58:51.425549 PCI: 00:12.5: enabled 0
1522 12:58:51.425606 PCI: 00:12.6: enabled 0
1523 12:58:51.425665 PCI: 00:13.0: enabled 0
1524 12:58:51.425723 PCI: 00:14.0: enabled 1
1525 12:58:51.425782 PCI: 00:14.1: enabled 0
1526 12:58:51.425839 PCI: 00:14.3: enabled 1
1527 12:58:51.425897 PCI: 00:14.5: enabled 0
1528 12:58:51.425956 PCI: 00:15.0: enabled 1
1529 12:58:51.426014 PCI: 00:15.1: enabled 1
1530 12:58:51.426072 PCI: 00:15.2: enabled 0
1531 12:58:51.426130 PCI: 00:15.3: enabled 0
1532 12:58:51.426189 PCI: 00:16.0: enabled 1
1533 12:58:51.426246 PCI: 00:16.1: enabled 0
1534 12:58:51.426304 PCI: 00:16.2: enabled 0
1535 12:58:51.426362 PCI: 00:16.3: enabled 0
1536 12:58:51.426420 PCI: 00:16.4: enabled 0
1537 12:58:51.426478 PCI: 00:16.5: enabled 0
1538 12:58:51.426536 PCI: 00:17.0: enabled 1
1539 12:58:51.426594 PCI: 00:19.0: enabled 1
1540 12:58:51.426653 PCI: 00:19.1: enabled 0
1541 12:58:51.426711 PCI: 00:19.2: enabled 1
1542 12:58:51.426769 PCI: 00:1a.0: enabled 0
1543 12:58:51.426827 PCI: 00:1c.0: enabled 1
1544 12:58:51.426884 PCI: 00:1c.1: enabled 0
1545 12:58:51.426942 PCI: 00:1c.2: enabled 0
1546 12:58:51.427000 PCI: 00:1c.3: enabled 0
1547 12:58:51.427058 PCI: 00:1c.4: enabled 0
1548 12:58:51.427116 PCI: 00:1c.5: enabled 0
1549 12:58:51.427175 PCI: 00:1c.6: enabled 0
1550 12:58:51.427242 PCI: 00:1c.7: enabled 0
1551 12:58:51.427302 PCI: 00:1d.0: enabled 1
1552 12:58:51.427360 PCI: 00:1d.1: enabled 0
1553 12:58:51.427418 PCI: 00:1d.2: enabled 0
1554 12:58:51.427475 PCI: 00:1d.3: enabled 0
1555 12:58:51.427533 PCI: 00:1d.4: enabled 0
1556 12:58:51.427591 PCI: 00:1e.0: enabled 0
1557 12:58:51.427679 PCI: 00:1e.1: enabled 0
1558 12:58:51.427742 PCI: 00:1e.2: enabled 0
1559 12:58:51.427801 PCI: 00:1e.3: enabled 0
1560 12:58:51.427860 PCI: 00:1f.0: enabled 1
1561 12:58:51.427917 PCI: 00:1f.1: enabled 0
1562 12:58:51.427975 PCI: 00:1f.2: enabled 0
1563 12:58:51.428033 PCI: 00:1f.3: enabled 1
1564 12:58:51.428092 PCI: 00:1f.4: enabled 1
1565 12:58:51.428151 PCI: 00:1f.5: enabled 1
1566 12:58:51.428209 PCI: 00:1f.6: enabled 1
1567 12:58:51.428267 USB0 port 0: enabled 1
1568 12:58:51.428325 I2C: 01:10: enabled 1
1569 12:58:51.428384 I2C: 01:10: enabled 1
1570 12:58:51.428441 I2C: 01:34: enabled 1
1571 12:58:51.428499 I2C: 02:2c: enabled 1
1572 12:58:51.428556 I2C: 03:50: enabled 1
1573 12:58:51.428614 PNP: 0c09.0: enabled 1
1574 12:58:51.428672 USB2 port 0: enabled 1
1575 12:58:51.428730 USB2 port 1: enabled 1
1576 12:58:51.428789 USB2 port 2: enabled 1
1577 12:58:51.428846 USB2 port 4: enabled 1
1578 12:58:51.428904 USB2 port 5: enabled 1
1579 12:58:51.428962 USB2 port 6: enabled 1
1580 12:58:51.429020 USB2 port 7: enabled 1
1581 12:58:51.429078 USB2 port 8: enabled 1
1582 12:58:51.429137 USB2 port 9: enabled 1
1583 12:58:51.429196 USB3 port 0: enabled 1
1584 12:58:51.429254 USB3 port 1: enabled 1
1585 12:58:51.429312 USB3 port 2: enabled 1
1586 12:58:51.429370 USB3 port 3: enabled 1
1587 12:58:51.429427 USB3 port 4: enabled 1
1588 12:58:51.429485 APIC: 04: enabled 1
1589 12:58:51.429543 APIC: 06: enabled 1
1590 12:58:51.429601 APIC: 01: enabled 1
1591 12:58:51.429658 APIC: 05: enabled 1
1592 12:58:51.429716 APIC: 07: enabled 1
1593 12:58:51.429774 APIC: 02: enabled 1
1594 12:58:51.429832 APIC: 03: enabled 1
1595 12:58:51.429889 PCI: 00:08.0: enabled 1
1596 12:58:51.429948 PCI: 00:14.2: enabled 1
1597 12:58:51.430005 PCI: 01:00.0: enabled 1
1598 12:58:51.430063 PCI: 02:00.0: enabled 1
1599 12:58:51.430121 Disabling ACPI via APMC:
1600 12:58:51.430179 done.
1601 12:58:51.430238 FMAP: area RW_ELOG found @ 1bf0000 (16384 bytes)
1602 12:58:51.430297 ELOG: NV offset 0x1bf0000 size 0x4000
1603 12:58:51.430356 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1604 12:58:51.430415 ELOG: Event(17) added with size 13 at 2024-05-02 12:58:46 UTC
1605 12:58:51.430474 ELOG: Event(92) added with size 9 at 2024-05-02 12:58:46 UTC
1606 12:58:51.430533 ELOG: Event(93) added with size 9 at 2024-05-02 12:58:46 UTC
1607 12:58:51.430592 ELOG: Event(9E) added with size 10 at 2024-05-02 12:58:46 UTC
1608 12:58:51.430651 ELOG: Event(9F) added with size 14 at 2024-05-02 12:58:46 UTC
1609 12:58:51.430710 BS: BS_DEV_INIT times (us): entry 0 run 469644 exit 55033
1610 12:58:51.430768 ELOG: Event(A1) added with size 10 at 2024-05-02 12:58:46 UTC
1611 12:58:51.430827 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
1612 12:58:51.430886 ELOG: Event(A0) added with size 9 at 2024-05-02 12:58:46 UTC
1613 12:58:51.430945 elog_add_boot_reason: Logged dev mode boot
1614 12:58:51.431003 Finalize devices...
1615 12:58:51.431061 PCI: 00:17.0 final
1616 12:58:51.431119 Devices finalized
1617 12:58:51.431177 FMAP: area RW_NVRAM found @ 1bfa000 (24576 bytes)
1618 12:58:51.431243 BS: BS_POST_DEVICE times (us): entry 24475 run 5936 exit 5354
1619 12:58:51.431303 BS: BS_OS_RESUME_CHECK times (us): entry 0 run 96 exit 0
1620 12:58:51.431362 disable_unused_touchscreen: VPD key 'touchscreen_hid' not found, default to ELAN900C
1621 12:58:51.431423 disable_unused_touchscreen: Disable ACPI0C50
1622 12:58:51.431482 disable_unused_touchscreen: Enable ELAN900C
1623 12:58:51.431540 CBFS @ 1d00000 size 300000
1624 12:58:51.431599 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1625 12:58:51.431658 CBFS: Locating 'fallback/dsdt.aml'
1626 12:58:51.431716 CBFS: Found @ offset 10b200 size 4448
1627 12:58:51.431774 CBFS @ 1d00000 size 300000
1628 12:58:51.431833 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1629 12:58:51.431891 CBFS: Locating 'fallback/slic'
1630 12:58:51.431950 CBFS: 'fallback/slic' not found.
1631 12:58:51.432008 ACPI: Writing ACPI tables at 89c0f000.
1632 12:58:51.432066 ACPI: * FACS
1633 12:58:51.432124 ACPI: * DSDT
1634 12:58:51.432181 Ramoops buffer: 0x100000@0x89b0e000.
1635 12:58:51.432240 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
1636 12:58:51.432298 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
1637 12:58:51.432356 ACPI: * FADT
1638 12:58:51.432609 SCI is IRQ9
1639 12:58:51.432674 ACPI: added table 1/32, length now 40
1640 12:58:51.432733 ACPI: * SSDT
1641 12:58:51.432792 Found 1 CPU(s) with 8 core(s) each.
1642 12:58:51.432850 Error: Could not locate 'wifi_sar' in VPD.
1643 12:58:51.432908 Error: failed from getting SAR limits!
1644 12:58:51.432967 \_SB.PCI0.WIFI: Intel WiFi PCI: 00:14.3
1645 12:58:51.433026 dw_i2c: bad counts. hcnt = -14 lcnt = 30
1646 12:58:51.433085 dw_i2c: bad counts. hcnt = -20 lcnt = 40
1647 12:58:51.433143 dw_i2c: bad counts. hcnt = -18 lcnt = 48
1648 12:58:51.433202 \_SB.PCI0.I2C0.H010: ELAN Touchscreen at I2C: 01:10
1649 12:58:51.433261 \_SB.PCI0.I2C0.D034: Melfas Touchscreen at I2C: 01:34
1650 12:58:51.433319 \_SB.PCI0.I2C1.D02C: ELAN Touchpad at I2C: 02:2c
1651 12:58:51.433378 \_SB.PCI0.I2C4.TPMI: I2C TPM at I2C: 03:50
1652 12:58:51.433436 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1653 12:58:51.433494 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-A Port 1 at USB2 port 1
1654 12:58:51.433554 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1655 12:58:51.433613 \_SB.PCI0.XHCI.RHUB.HS05: Right Type-A Port 2 at USB2 port 4
1656 12:58:51.433671 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1657 12:58:51.433731 \_SB.PCI0.XHCI.RHUB.HS07: WWAN at USB2 port 6
1658 12:58:51.433791 \_SB.PCI0.XHCI.RHUB.HS08: USH at USB2 port 7
1659 12:58:51.433864 \_SB.PCI0.XHCI.RHUB.HS09: Fingerprint at USB2 port 8
1660 12:58:51.433924 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1661 12:58:51.433983 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1662 12:58:51.434043 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-A Port 1 at USB3 port 1
1663 12:58:51.434102 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1664 12:58:51.434161 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 2 at USB3 port 3
1665 12:58:51.434219 \_SB.PCI0.XHCI.RHUB.SS05: WWAN at USB3 port 4
1666 12:58:51.434278 ACPI: added table 2/32, length now 44
1667 12:58:51.434337 ACPI: * MCFG
1668 12:58:51.434395 ACPI: added table 3/32, length now 48
1669 12:58:51.434453 ACPI: * TPM2
1670 12:58:51.434512 TPM2 log created at 89afe000
1671 12:58:51.434570 ACPI: added table 4/32, length now 52
1672 12:58:51.434629 ACPI: * MADT
1673 12:58:51.434687 SCI is IRQ9
1674 12:58:51.434745 ACPI: added table 5/32, length now 56
1675 12:58:51.434804 current = 89c14bd0
1676 12:58:51.434862 ACPI: * IGD OpRegion
1677 12:58:51.434920 GMA: Found VBT in CBFS
1678 12:58:51.434978 GMA: Found valid VBT in CBFS
1679 12:58:51.435036 ACPI: added table 6/32, length now 60
1680 12:58:51.435094 ACPI: * HPET
1681 12:58:51.435152 ACPI: added table 7/32, length now 64
1682 12:58:51.435210 ACPI: done.
1683 12:58:51.435278 ACPI tables: 31872 bytes.
1684 12:58:51.435338 smbios_write_tables: 89afd000
1685 12:58:51.435396 recv_ec_data: 0x01
1686 12:58:51.435454 Create SMBIOS type 17
1687 12:58:51.435513 PCI: 00:14.3 (Intel WiFi)
1688 12:58:51.435572 SMBIOS tables: 708 bytes.
1689 12:58:51.435630 Writing table forward entry at 0x00000500
1690 12:58:51.435688 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 461b
1691 12:58:51.435747 Writing coreboot table at 0x89c33000
1692 12:58:51.435805 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1693 12:58:51.435863 1. 0000000000001000-000000000009ffff: RAM
1694 12:58:51.435922 2. 00000000000a0000-00000000000fffff: RESERVED
1695 12:58:51.435981 3. 0000000000100000-0000000089afcfff: RAM
1696 12:58:51.436040 4. 0000000089afd000-0000000089c80fff: CONFIGURATION TABLES
1697 12:58:51.436099 5. 0000000089c81000-0000000089cdbfff: RAMSTAGE
1698 12:58:51.436157 6. 0000000089cdc000-0000000089ffffff: CONFIGURATION TABLES
1699 12:58:51.436216 7. 000000008a000000-000000008f7fffff: RESERVED
1700 12:58:51.436306 8. 00000000e0000000-00000000efffffff: RESERVED
1701 12:58:51.436369 9. 00000000fc000000-00000000fc000fff: RESERVED
1702 12:58:51.436428 10. 00000000fe000000-00000000fe00ffff: RESERVED
1703 12:58:51.436488 11. 00000000fed10000-00000000fed17fff: RESERVED
1704 12:58:51.436548 12. 00000000fed80000-00000000fed83fff: RESERVED
1705 12:58:51.436609 13. 00000000feda0000-00000000feda1fff: RESERVED
1706 12:58:51.436669 14. 0000000100000000-000000026e7fffff: RAM
1707 12:58:51.436729 Graphics framebuffer located at 0xc0000000
1708 12:58:51.436788 Passing 6 GPIOs to payload:
1709 12:58:51.436847 NAME | PORT | POLARITY | VALUE
1710 12:58:51.436906 write protect | 0x000000dc | high | low
1711 12:58:51.436965 recovery | 0x000000d5 | low | low
1712 12:58:51.437024 lid | undefined | high | high
1713 12:58:51.437083 power | undefined | high | low
1714 12:58:51.437143 oprom | undefined | high | low
1715 12:58:51.437201 EC in RW | undefined | high | low
1716 12:58:51.437260 recv_ec_data: 0x01
1717 12:58:51.437318 SKU ID: 3
1718 12:58:51.437377 CBFS @ 1d00000 size 300000
1719 12:58:51.437435 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1720 12:58:51.437495 Wrote coreboot table at: 89c33000, 0x5b4 bytes, checksum b2a2
1721 12:58:51.437554 coreboot table: 1484 bytes.
1722 12:58:51.437613 IMD ROOT 0. 89fff000 00001000
1723 12:58:51.437672 IMD SMALL 1. 89ffe000 00001000
1724 12:58:51.437730 FSP MEMORY 2. 89d0e000 002f0000
1725 12:58:51.437790 CONSOLE 3. 89cee000 00020000
1726 12:58:51.437848 TIME STAMP 4. 89ced000 00000910
1727 12:58:51.437906 VBOOT WORK 5. 89cea000 00003000
1728 12:58:51.437964 VBOOT 6. 89ce9000 00000c0c
1729 12:58:51.438023 MRC DATA 7. 89ce7000 000018f0
1730 12:58:51.438083 ROMSTG STCK 8. 89ce6000 00000400
1731 12:58:51.438142 AFTER CAR 9. 89cdc000 0000a000
1732 12:58:51.438200 RAMSTAGE 10. 89c80000 0005c000
1733 12:58:51.438258 REFCODE 11. 89c4b000 00035000
1734 12:58:51.438317 SMM BACKUP 12. 89c3b000 00010000
1735 12:58:51.438376 COREBOOT 13. 89c33000 00008000
1736 12:58:51.438435 ACPI 14. 89c0f000 00024000
1737 12:58:51.438493 ACPI GNVS 15. 89c0e000 00001000
1738 12:58:51.438551 RAMOOPS 16. 89b0e000 00100000
1739 12:58:51.438805 TPM2 TCGLOG17. 89afe000 00010000
1740 12:58:51.438870 SMBIOS 18. 89afd000 00000800
1741 12:58:51.438929 IMD small region:
1742 12:58:51.438988 IMD ROOT 0. 89ffec00 00000400
1743 12:58:51.439046 FSP RUNTIME 1. 89ffebe0 00000004
1744 12:58:51.439104 POWER STATE 2. 89ffeba0 00000040
1745 12:58:51.439162 ROMSTAGE 3. 89ffeb80 00000004
1746 12:58:51.439232 MEM INFO 4. 89ffe9c0 000001a9
1747 12:58:51.439294 VPD 5. 89ffe940 0000006c
1748 12:58:51.439353 COREBOOTFWD 6. 89ffe900 00000028
1749 12:58:51.439411 MTRR: Physical address space:
1750 12:58:51.439470 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1751 12:58:51.439534 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1752 12:58:51.439595 0x00000000000c0000 - 0x000000008b000000 size 0x8af40000 type 6
1753 12:58:51.439656 0x000000008b000000 - 0x00000000c0000000 size 0x35000000 type 0
1754 12:58:51.439716 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1755 12:58:51.439777 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1756 12:58:51.439838 0x0000000100000000 - 0x000000026e800000 size 0x16e800000 type 6
1757 12:58:51.439898 MTRR: Fixed MSR 0x250 0x0606060606060606
1758 12:58:51.439957 MTRR: Fixed MSR 0x258 0x0606060606060606
1759 12:58:51.440015 MTRR: Fixed MSR 0x259 0x0000000000000000
1760 12:58:51.440073 MTRR: Fixed MSR 0x268 0x0606060606060606
1761 12:58:51.440132 MTRR: Fixed MSR 0x269 0x0606060606060606
1762 12:58:51.440190 MTRR: Fixed MSR 0x26a 0x0606060606060606
1763 12:58:51.440249 MTRR: Fixed MSR 0x26b 0x0606060606060606
1764 12:58:51.440307 MTRR: Fixed MSR 0x26c 0x0606060606060606
1765 12:58:51.440365 MTRR: Fixed MSR 0x26d 0x0606060606060606
1766 12:58:51.440424 MTRR: Fixed MSR 0x26e 0x0606060606060606
1767 12:58:51.440482 MTRR: Fixed MSR 0x26f 0x0606060606060606
1768 12:58:51.440540 call enable_fixed_mtrr()
1769 12:58:51.440598 CPU physical address size: 39 bits
1770 12:58:51.440657 MTRR: default type WB/UC MTRR counts: 7/7.
1771 12:58:51.440715 MTRR: UC selected as default type.
1772 12:58:51.440774 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1773 12:58:51.440833 MTRR: 1 base 0x0000000080000000 mask 0x0000007ff8000000 type 6
1774 12:58:51.440892 MTRR: 2 base 0x0000000088000000 mask 0x0000007ffe000000 type 6
1775 12:58:51.440951 MTRR: 3 base 0x000000008a000000 mask 0x0000007fff000000 type 6
1776 12:58:51.441009 MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1777 12:58:51.441068 MTRR: 5 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1778 12:58:51.441127 MTRR: 6 base 0x0000000200000000 mask 0x0000007f80000000 type 6
1779 12:58:51.441186
1780 12:58:51.441244 MTRR check
1781 12:58:51.441301 Fixed MTRRs : Enabled
1782 12:58:51.441360 Variable MTRRs: Enabled
1783 12:58:51.441418
1784 12:58:51.441476 MTRR: Fixed MSR 0x250 0x0606060606060606
1785 12:58:51.441535 MTRR: Fixed MSR 0x258 0x0606060606060606
1786 12:58:51.441593 MTRR: Fixed MSR 0x259 0x0000000000000000
1787 12:58:51.441651 MTRR: Fixed MSR 0x268 0x0606060606060606
1788 12:58:51.441713 MTRR: Fixed MSR 0x269 0x0606060606060606
1789 12:58:51.441808 MTRR: Fixed MSR 0x26a 0x0606060606060606
1790 12:58:51.441893 MTRR: Fixed MSR 0x26b 0x0606060606060606
1791 12:58:51.441954 MTRR: Fixed MSR 0x26c 0x0606060606060606
1792 12:58:51.442012 MTRR: Fixed MSR 0x26d 0x0606060606060606
1793 12:58:51.442071 MTRR: Fixed MSR 0x26e 0x0606060606060606
1794 12:58:51.442130 MTRR: Fixed MSR 0x26f 0x0606060606060606
1795 12:58:51.442188 BS: BS_WRITE_TABLES times (us): entry 17196 run 490039 exit 157157
1796 12:58:51.442247 call enable_fixed_mtrr()
1797 12:58:51.442306 CBFS @ 1d00000 size 300000
1798 12:58:51.442364 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1799 12:58:51.442423 CPU physical address size: 39 bits
1800 12:58:51.442481 CBFS: Locating 'fallback/payload'
1801 12:58:51.442539 MTRR: Fixed MSR 0x250 0x0606060606060606
1802 12:58:51.574395 MTRR: Fixed MSR 0x250 0x0606060606060606
1803 12:58:51.574528 MTRR: Fixed MSR 0x258 0x0606060606060606
1804 12:58:51.574600 MTRR: Fixed MSR 0x259 0x0000000000000000
1805 12:58:51.574668 MTRR: Fixed MSR 0x268 0x0606060606060606
1806 12:58:51.574731 MTRR: Fixed MSR 0x269 0x0606060606060606
1807 12:58:51.574793 MTRR: Fixed MSR 0x26a 0x0606060606060606
1808 12:58:51.574854 MTRR: Fixed MSR 0x26b 0x0606060606060606
1809 12:58:51.574922 MTRR: Fixed MSR 0x26c 0x0606060606060606
1810 12:58:51.575008 MTRR: Fixed MSR 0x26d 0x0606060606060606
1811 12:58:51.575070 MTRR: Fixed MSR 0x26e 0x0606060606060606
1812 12:58:51.575131 MTRR: Fixed MSR 0x26f 0x0606060606060606
1813 12:58:51.575191 MTRR: Fixed MSR 0x258 0x0606060606060606
1814 12:58:51.575262 call enable_fixed_mtrr()
1815 12:58:51.575323 MTRR: Fixed MSR 0x259 0x0000000000000000
1816 12:58:51.575382 MTRR: Fixed MSR 0x268 0x0606060606060606
1817 12:58:51.575441 MTRR: Fixed MSR 0x269 0x0606060606060606
1818 12:58:51.575499 MTRR: Fixed MSR 0x26a 0x0606060606060606
1819 12:58:51.575559 MTRR: Fixed MSR 0x26b 0x0606060606060606
1820 12:58:51.575618 MTRR: Fixed MSR 0x26c 0x0606060606060606
1821 12:58:51.575676 MTRR: Fixed MSR 0x26d 0x0606060606060606
1822 12:58:51.575735 MTRR: Fixed MSR 0x26e 0x0606060606060606
1823 12:58:51.575793 MTRR: Fixed MSR 0x26f 0x0606060606060606
1824 12:58:51.575852 CPU physical address size: 39 bits
1825 12:58:51.575910 call enable_fixed_mtrr()
1826 12:58:51.575968 MTRR: Fixed MSR 0x250 0x0606060606060606
1827 12:58:51.576026 MTRR: Fixed MSR 0x250 0x0606060606060606
1828 12:58:51.576085 MTRR: Fixed MSR 0x258 0x0606060606060606
1829 12:58:51.576143 MTRR: Fixed MSR 0x259 0x0000000000000000
1830 12:58:51.576202 MTRR: Fixed MSR 0x268 0x0606060606060606
1831 12:58:51.576260 MTRR: Fixed MSR 0x269 0x0606060606060606
1832 12:58:51.576319 MTRR: Fixed MSR 0x26a 0x0606060606060606
1833 12:58:51.576380 MTRR: Fixed MSR 0x26b 0x0606060606060606
1834 12:58:51.576481 MTRR: Fixed MSR 0x26c 0x0606060606060606
1835 12:58:51.576575 MTRR: Fixed MSR 0x26d 0x0606060606060606
1836 12:58:51.576852 MTRR: Fixed MSR 0x26e 0x0606060606060606
1837 12:58:51.576919 MTRR: Fixed MSR 0x26f 0x0606060606060606
1838 12:58:51.576980 MTRR: Fixed MSR 0x258 0x0606060606060606
1839 12:58:51.577040 call enable_fixed_mtrr()
1840 12:58:51.577099 MTRR: Fixed MSR 0x250 0x0606060606060606
1841 12:58:51.577157 MTRR: Fixed MSR 0x250 0x0606060606060606
1842 12:58:51.577215 MTRR: Fixed MSR 0x258 0x0606060606060606
1843 12:58:51.577274 MTRR: Fixed MSR 0x259 0x0000000000000000
1844 12:58:51.577333 MTRR: Fixed MSR 0x268 0x0606060606060606
1845 12:58:51.577392 MTRR: Fixed MSR 0x269 0x0606060606060606
1846 12:58:51.577450 MTRR: Fixed MSR 0x26a 0x0606060606060606
1847 12:58:51.577509 MTRR: Fixed MSR 0x26b 0x0606060606060606
1848 12:58:51.577567 MTRR: Fixed MSR 0x26c 0x0606060606060606
1849 12:58:51.577625 MTRR: Fixed MSR 0x26d 0x0606060606060606
1850 12:58:51.577683 MTRR: Fixed MSR 0x26e 0x0606060606060606
1851 12:58:51.577740 MTRR: Fixed MSR 0x26f 0x0606060606060606
1852 12:58:51.577798 MTRR: Fixed MSR 0x258 0x0606060606060606
1853 12:58:51.577856 MTRR: Fixed MSR 0x259 0x0000000000000000
1854 12:58:51.577915 MTRR: Fixed MSR 0x268 0x0606060606060606
1855 12:58:51.577974 MTRR: Fixed MSR 0x269 0x0606060606060606
1856 12:58:51.578032 MTRR: Fixed MSR 0x26a 0x0606060606060606
1857 12:58:51.578090 MTRR: Fixed MSR 0x26b 0x0606060606060606
1858 12:58:51.578149 MTRR: Fixed MSR 0x26c 0x0606060606060606
1859 12:58:51.578207 MTRR: Fixed MSR 0x26d 0x0606060606060606
1860 12:58:51.578266 MTRR: Fixed MSR 0x26e 0x0606060606060606
1861 12:58:51.578334 MTRR: Fixed MSR 0x26f 0x0606060606060606
1862 12:58:51.578392 call enable_fixed_mtrr()
1863 12:58:51.578451 call enable_fixed_mtrr()
1864 12:58:51.578509 CPU physical address size: 39 bits
1865 12:58:51.578567 CBFS: Found @ offset 1cf4c0 size 3a954
1866 12:58:51.578626 MTRR: Fixed MSR 0x259 0x0000000000000000
1867 12:58:51.578685 CPU physical address size: 39 bits
1868 12:58:51.578743 MTRR: Fixed MSR 0x268 0x0606060606060606
1869 12:58:51.578801 CPU physical address size: 39 bits
1870 12:58:51.578860 CPU physical address size: 39 bits
1871 12:58:51.578918 MTRR: Fixed MSR 0x269 0x0606060606060606
1872 12:58:51.578977 MTRR: Fixed MSR 0x26a 0x0606060606060606
1873 12:58:51.579035 MTRR: Fixed MSR 0x26b 0x0606060606060606
1874 12:58:51.579094 MTRR: Fixed MSR 0x26c 0x0606060606060606
1875 12:58:51.579152 MTRR: Fixed MSR 0x26d 0x0606060606060606
1876 12:58:51.579211 MTRR: Fixed MSR 0x26e 0x0606060606060606
1877 12:58:51.579280 MTRR: Fixed MSR 0x26f 0x0606060606060606
1878 12:58:51.579338 Checking segment from ROM address 0xffecf4f8
1879 12:58:51.579397 call enable_fixed_mtrr()
1880 12:58:51.579455 Checking segment from ROM address 0xffecf514
1881 12:58:51.579514 CPU physical address size: 39 bits
1882 12:58:51.579572 Loading segment from ROM address 0xffecf4f8
1883 12:58:51.579631 code (compression=0)
1884 12:58:51.579690 New segment dstaddr 0x30100018 memsize 0x26518f8 srcaddr 0xffecf530 filesize 0x3a91c
1885 12:58:51.579749 Loading Segment: addr: 0x30100018 memsz: 0x00000000026518f8 filesz: 0x000000000003a91c
1886 12:58:51.579808 it's not compressed!
1887 12:58:51.579867 [ 0x30100018, 3013a934, 0x32751910) <- ffecf530
1888 12:58:51.579926 Clearing Segment: addr: 0x000000003013a934 memsz: 0x0000000002616fdc
1889 12:58:51.579985 Loading segment from ROM address 0xffecf514
1890 12:58:51.580044 Entry Point 0x30100018
1891 12:58:51.580102 Loaded segments
1892 12:58:51.580159 Finalizing chipset.
1893 12:58:51.580219 Finalizing SMM.
1894 12:58:51.580284 BS: BS_PAYLOAD_LOAD times (us): entry 0 run 466134 exit 11518
1895 12:58:51.580368 mp_park_aps done after 0 msecs.
1896 12:58:51.580459 Jumping to boot code at 30100018(89c33000)
1897 12:58:51.580521 CPU0: stack: 89cca000 - 89ccb000, lowest used address 89ccaa9c, stack used: 1380 bytes
1898 12:58:51.580582
1899 12:58:51.580642
1900 12:58:51.580702
1901 12:58:51.580761 Starting depthcharge on sarien...
1902 12:58:51.580821
1903 12:58:51.580880 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1904 12:58:51.580940
1905 12:58:51.581007 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1906 12:58:51.581076
1907 12:58:51.581136 WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime!
1908 12:58:51.581195
1909 12:58:51.581254 BIOS MMAP details:
1910 12:58:51.581312
1911 12:58:51.581371 IFD Base Offset : 0x1000000
1912 12:58:51.581430
1913 12:58:51.581488 IFD End Offset : 0x2000000
1914 12:58:51.581547
1915 12:58:51.581606 MMAP Size : 0x1000000
1916 12:58:51.581665
1917 12:58:51.581723 MMAP Start : 0xff000000
1918 12:58:51.581782
1919 12:58:51.581841 Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff
1920 12:58:51.581900
1921 12:58:51.581959 New NVMe Controller 0x3214e128 @ 00:1d:04
1922 12:58:51.582019
1923 12:58:51.582078 New NVMe Controller 0x3214e1f0 @ 00:1d:00
1924 12:58:51.582137
1925 12:58:51.582196 The GBB signature is at 0x30000014 and is: 24 47 42 42
1926 12:58:51.582257
1927 12:58:51.582315 Wipe memory regions:
1928 12:58:51.582374
1929 12:58:51.582432 [0x00000000001000, 0x000000000a0000)
1930 12:58:51.582492
1931 12:58:51.582550 [0x00000000100000, 0x00000030000000)
1932 12:58:51.582609
1933 12:58:51.582667 [0x00000032751910, 0x00000089afd000)
1934 12:58:51.582725
1935 12:58:51.582783 [0x00000100000000, 0x0000026e800000)
1936 12:58:51.582842
1937 12:58:51.582900 R8152: Initializing
1938 12:58:51.582958
1939 12:58:51.583017 Version 6 (ocp_data = 5c30)
1940 12:58:51.583079
1941 12:58:51.583177 R8152: Done initializing
1942 12:58:51.583263
1943 12:58:51.583324 Adding net device
1944 12:58:51.583383
1945 12:58:51.583443 [firmware-sarien-12200.B-collabora] Apr 9 2021 09:49:38
1946 12:58:51.583503
1947 12:58:51.583562
1948 12:58:51.583620
1949 12:58:51.583955 end: 2.2.3 depthcharge-start (duration 00:00:00) [common]
1950 12:58:51.584067 start: 2.2.4 bootloader-commands (timeout 00:04:37) [common]
1951 12:58:51.584153 Setting prompt string to ['sarien:']
1952 12:58:51.584239 bootloader-commands: Wait for prompt ['sarien:'] (timeout 00:04:37)
1953 12:58:51.584430 Setting prompt string to ['sarien:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1955 12:58:51.684787 sarien: tftpboot 192.168.201.1 13607155/tftp-deploy-hhshnhvt/kernel/bzImage 13607155/tftp-deploy-hhshnhvt/kernel/cmdline 13607155/tftp-deploy-hhshnhvt/ramdisk/ramdisk.cpio.gz
1956 12:58:51.684941 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1957 12:58:51.685033 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:37)
1958 12:58:51.727327 tftpboot 192.168.201.1 13607155/tftp-deploy-hhshnhvt/kernel/bzImage 13607155/tftp-deploy-hhshnhvt/kernel/cmdline 13607155/tftp-deploy-hhshnhvt/ramdisk/ramdisk.cpio.gz
1959 12:58:51.727434
1960 12:58:51.727506 Waiting for link
1961 12:58:51.888409
1962 12:58:51.888744 done.
1963 12:58:51.888826
1964 12:58:51.891558 MAC: 00:24:32:30:78:08
1965 12:58:51.891649
1966 12:58:51.894203 Sending DHCP discover... done.
1967 12:58:51.894294
1968 12:58:51.896726 Waiting for reply... done.
1969 12:58:51.897000
1970 12:58:51.900132 Sending DHCP request... done.
1971 12:58:51.900241
1972 12:58:51.904878 Waiting for reply... done.
1973 12:58:51.905003
1974 12:58:51.907609 My ip is 192.168.201.222
1975 12:58:51.907692
1976 12:58:51.910924 The DHCP server ip is 192.168.201.1
1977 12:58:51.911190
1978 12:58:51.915609 TFTP server IP predefined by user: 192.168.201.1
1979 12:58:51.915720
1980 12:58:51.923376 Bootfile predefined by user: 13607155/tftp-deploy-hhshnhvt/kernel/bzImage
1981 12:58:51.923511
1982 12:58:51.926675 Sending tftp read request... done.
1983 12:58:51.926790
1984 12:58:51.930858 Waiting for the transfer...
1985 12:58:51.931404
1986 12:58:52.480267 00000000 ################################################################
1987 12:58:52.480853
1988 12:58:53.025532 00080000 ################################################################
1989 12:58:53.025936
1990 12:58:53.572476 00100000 ################################################################
1991 12:58:53.572825
1992 12:58:54.117377 00180000 ################################################################
1993 12:58:54.117735
1994 12:58:54.651613 00200000 ################################################################
1995 12:58:54.651965
1996 12:58:55.184993 00280000 ################################################################
1997 12:58:55.185444
1998 12:58:55.739242 00300000 ################################################################
1999 12:58:55.739772
2000 12:58:56.268522 00380000 ################################################################
2001 12:58:56.269240
2002 12:58:56.814469 00400000 ################################################################
2003 12:58:56.814635
2004 12:58:57.352489 00480000 ################################################################
2005 12:58:57.352933
2006 12:58:57.887371 00500000 ################################################################
2007 12:58:57.888372
2008 12:58:58.414743 00580000 ################################################################
2009 12:58:58.415322
2010 12:58:58.945654 00600000 ################################################################
2011 12:58:58.946029
2012 12:58:59.470732 00680000 ################################################################
2013 12:58:59.471204
2014 12:59:00.005664 00700000 ################################################################
2015 12:59:00.005814
2016 12:59:00.548243 00780000 ################################################################
2017 12:59:00.548627
2018 12:59:01.095594 00800000 ################################################################
2019 12:59:01.095990
2020 12:59:01.637455 00880000 ################################################################
2021 12:59:01.637947
2022 12:59:02.185442 00900000 ################################################################
2023 12:59:02.185957
2024 12:59:02.691953 00980000 ################################################################
2025 12:59:02.692339
2026 12:59:03.196220 00a00000 ################################################################
2027 12:59:03.196617
2028 12:59:03.753835 00a80000 ################################################################
2029 12:59:03.754218
2030 12:59:04.292964 00b00000 ################################################################
2031 12:59:04.293500
2032 12:59:04.832026 00b80000 ################################################################
2033 12:59:04.832426
2034 12:59:05.379962 00c00000 ################################################################
2035 12:59:05.380579
2036 12:59:05.932076 00c80000 ################################################################
2037 12:59:05.932823
2038 12:59:06.416496 00d00000 ######################################################## done.
2039 12:59:06.416647
2040 12:59:06.420223 The bootfile was 14090128 bytes long.
2041 12:59:06.420320
2042 12:59:06.423695 Sending tftp read request... done.
2043 12:59:06.423822
2044 12:59:06.426556 Waiting for the transfer...
2045 12:59:06.427045
2046 12:59:06.980925 00000000 ################################################################
2047 12:59:06.981364
2048 12:59:07.520081 00080000 ################################################################
2049 12:59:07.521010
2050 12:59:08.061043 00100000 ################################################################
2051 12:59:08.061460
2052 12:59:08.588023 00180000 ################################################################
2053 12:59:08.588643
2054 12:59:09.120673 00200000 ################################################################
2055 12:59:09.121142
2056 12:59:09.670043 00280000 ################################################################
2057 12:59:09.670721
2058 12:59:10.199137 00300000 ################################################################
2059 12:59:10.199776
2060 12:59:10.763597 00380000 ################################################################
2061 12:59:10.764192
2062 12:59:11.328536 00400000 ################################################################
2063 12:59:11.328937
2064 12:59:11.877550 00480000 ################################################################
2065 12:59:11.877958
2066 12:59:12.481951 00500000 ################################################################
2067 12:59:12.482378
2068 12:59:13.056914 00580000 ################################################################
2069 12:59:13.057414
2070 12:59:13.610385 00600000 ################################################################
2071 12:59:13.610804
2072 12:59:14.253976 00680000 ################################################################
2073 12:59:14.255293
2074 12:59:14.926037 00700000 ################################################################
2075 12:59:14.926583
2076 12:59:15.580034 00780000 ################################################################
2077 12:59:15.580583
2078 12:59:16.263413 00800000 ################################################################
2079 12:59:16.264652
2080 12:59:16.549860 00880000 ########################### done.
2081 12:59:16.550338
2082 12:59:16.553122 Sending tftp read request... done.
2083 12:59:16.553511
2084 12:59:16.555951 Waiting for the transfer...
2085 12:59:16.556335
2086 12:59:16.557472 00000000 # done.
2087 12:59:16.557839
2088 12:59:16.566758 Command line loaded dynamically from TFTP file: 13607155/tftp-deploy-hhshnhvt/kernel/cmdline
2089 12:59:16.567180
2090 12:59:16.586167 The command line is: earlyprintk=uart8250,mmio32,0xde000000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2091 12:59:16.591375
2092 12:59:16.595472 Shutting down all USB controllers.
2093 12:59:16.595694
2094 12:59:16.597689 Removing current net device
2095 12:59:16.599483
2096 12:59:16.601583 EC: exit firmware mode
2097 12:59:16.602579
2098 12:59:16.605117 Finalizing coreboot
2099 12:59:16.605356
2100 12:59:16.610659 Exiting depthcharge with code 4 at timestamp: 36214634
2101 12:59:16.610827
2102 12:59:16.610973
2103 12:59:16.612559 Starting kernel ...
2104 12:59:16.612704
2105 12:59:16.612812
2106 12:59:16.613344 end: 2.2.4 bootloader-commands (duration 00:00:25) [common]
2107 12:59:16.613497 start: 2.2.5 auto-login-action (timeout 00:04:12) [common]
2108 12:59:16.613624 Setting prompt string to ['Linux version [0-9]']
2109 12:59:16.613779 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2110 12:59:16.613932 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2112 13:03:28.614567 end: 2.2.5 auto-login-action (duration 00:04:12) [common]
2114 13:03:28.615726 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 252 seconds'
2116 13:03:28.616613 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2119 13:03:28.617900 end: 2 depthcharge-action (duration 00:05:00) [common]
2121 13:03:28.618969 Cleaning after the job
2122 13:03:28.619431 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13607155/tftp-deploy-hhshnhvt/ramdisk
2123 13:03:28.620640 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13607155/tftp-deploy-hhshnhvt/kernel
2124 13:03:28.622329 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13607155/tftp-deploy-hhshnhvt/modules
2125 13:03:28.622862 start: 4.1 power-off (timeout 00:00:30) [common]
2126 13:03:28.623045 Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-1' '--port=1' '--command=off'
2127 13:03:33.779308 >> Command sent successfully.
2128 13:03:33.789324 Returned 0 in 5 seconds
2129 13:03:33.890636 end: 4.1 power-off (duration 00:00:05) [common]
2131 13:03:33.892251 start: 4.2 read-feedback (timeout 00:09:55) [common]
2132 13:03:33.893509 Listened to connection for namespace 'common' for up to 1s
2133 13:03:34.894326 Finalising connection for namespace 'common'
2134 13:03:34.894949 Disconnecting from shell: Finalise
2135 13:03:34.895356
2136 13:03:34.996352 end: 4.2 read-feedback (duration 00:00:01) [common]
2137 13:03:34.997055 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13607155
2138 13:03:35.047070 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13607155
2139 13:03:35.047321 JobError: Your job cannot terminate cleanly.