Boot log: acer-cp514-2h-1130g7-volteer

    1 12:58:11.674900  lava-dispatcher, installed at version: 2024.01
    2 12:58:11.675137  start: 0 validate
    3 12:58:11.675294  Start time: 2024-05-02 12:58:11.675285+00:00 (UTC)
    4 12:58:11.675439  Using caching service: 'http://localhost/cache/?uri=%s'
    5 12:58:11.675581  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Famd64%2Finitrd.cpio.gz exists
    6 12:58:11.926596  Using caching service: 'http://localhost/cache/?uri=%s'
    7 12:58:11.926791  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2480-g949429724783%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
    8 12:58:12.178289  Using caching service: 'http://localhost/cache/?uri=%s'
    9 12:58:12.178472  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 12:58:26.008781  Using caching service: 'http://localhost/cache/?uri=%s'
   11 12:58:26.009455  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2480-g949429724783%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
   12 12:58:26.275830  validate duration: 14.60
   14 12:58:26.277047  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 12:58:26.277543  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 12:58:26.277973  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 12:58:26.278526  Not decompressing ramdisk as can be used compressed.
   18 12:58:26.278955  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/amd64/initrd.cpio.gz
   19 12:58:26.279328  saving as /var/lib/lava/dispatcher/tmp/13607197/tftp-deploy-ailjc587/ramdisk/initrd.cpio.gz
   20 12:58:26.279669  total size: 6137767 (5 MB)
   21 12:58:27.161175  progress   0 % (0 MB)
   22 12:58:27.166634  progress   5 % (0 MB)
   23 12:58:27.168310  progress  10 % (0 MB)
   24 12:58:27.170089  progress  15 % (0 MB)
   25 12:58:27.171757  progress  20 % (1 MB)
   26 12:58:27.173382  progress  25 % (1 MB)
   27 12:58:27.175162  progress  30 % (1 MB)
   28 12:58:27.176822  progress  35 % (2 MB)
   29 12:58:27.178408  progress  40 % (2 MB)
   30 12:58:27.180250  progress  45 % (2 MB)
   31 12:58:27.181906  progress  50 % (2 MB)
   32 12:58:27.183775  progress  55 % (3 MB)
   33 12:58:27.185420  progress  60 % (3 MB)
   34 12:58:27.187078  progress  65 % (3 MB)
   35 12:58:27.189052  progress  70 % (4 MB)
   36 12:58:27.190701  progress  75 % (4 MB)
   37 12:58:27.192397  progress  80 % (4 MB)
   38 12:58:27.194222  progress  85 % (5 MB)
   39 12:58:27.195947  progress  90 % (5 MB)
   40 12:58:27.197592  progress  95 % (5 MB)
   41 12:58:27.199506  progress 100 % (5 MB)
   42 12:58:27.199669  5 MB downloaded in 0.92 s (6.36 MB/s)
   43 12:58:27.199841  end: 1.1.1 http-download (duration 00:00:01) [common]
   45 12:58:27.200112  end: 1.1 download-retry (duration 00:00:01) [common]
   46 12:58:27.200206  start: 1.2 download-retry (timeout 00:09:59) [common]
   47 12:58:27.200296  start: 1.2.1 http-download (timeout 00:09:59) [common]
   48 12:58:27.200442  downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2480-g949429724783/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
   49 12:58:27.200519  saving as /var/lib/lava/dispatcher/tmp/13607197/tftp-deploy-ailjc587/kernel/bzImage
   50 12:58:27.200586  total size: 14090128 (13 MB)
   51 12:58:27.200653  No compression specified
   52 12:58:27.201794  progress   0 % (0 MB)
   53 12:58:27.205732  progress   5 % (0 MB)
   54 12:58:27.209647  progress  10 % (1 MB)
   55 12:58:27.213731  progress  15 % (2 MB)
   56 12:58:27.217712  progress  20 % (2 MB)
   57 12:58:27.221799  progress  25 % (3 MB)
   58 12:58:27.225695  progress  30 % (4 MB)
   59 12:58:27.229811  progress  35 % (4 MB)
   60 12:58:27.233720  progress  40 % (5 MB)
   61 12:58:27.237837  progress  45 % (6 MB)
   62 12:58:27.241896  progress  50 % (6 MB)
   63 12:58:27.246337  progress  55 % (7 MB)
   64 12:58:27.250250  progress  60 % (8 MB)
   65 12:58:27.254316  progress  65 % (8 MB)
   66 12:58:27.258275  progress  70 % (9 MB)
   67 12:58:27.262284  progress  75 % (10 MB)
   68 12:58:27.266111  progress  80 % (10 MB)
   69 12:58:27.270241  progress  85 % (11 MB)
   70 12:58:27.274037  progress  90 % (12 MB)
   71 12:58:27.277988  progress  95 % (12 MB)
   72 12:58:27.281840  progress 100 % (13 MB)
   73 12:58:27.282108  13 MB downloaded in 0.08 s (164.84 MB/s)
   74 12:58:27.282270  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 12:58:27.282533  end: 1.2 download-retry (duration 00:00:00) [common]
   77 12:58:27.282633  start: 1.3 download-retry (timeout 00:09:59) [common]
   78 12:58:27.282732  start: 1.3.1 http-download (timeout 00:09:59) [common]
   79 12:58:27.282885  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/amd64/full.rootfs.tar.xz
   80 12:58:27.282962  saving as /var/lib/lava/dispatcher/tmp/13607197/tftp-deploy-ailjc587/nfsrootfs/full.rootfs.tar
   81 12:58:27.283031  total size: 116951716 (111 MB)
   82 12:58:27.283101  Using unxz to decompress xz
   83 12:58:27.287439  progress   0 % (0 MB)
   84 12:58:27.616552  progress   5 % (5 MB)
   85 12:58:27.984758  progress  10 % (11 MB)
   86 12:58:28.340810  progress  15 % (16 MB)
   87 12:58:28.711386  progress  20 % (22 MB)
   88 12:58:29.037846  progress  25 % (27 MB)
   89 12:58:29.399818  progress  30 % (33 MB)
   90 12:58:29.728923  progress  35 % (39 MB)
   91 12:58:29.909420  progress  40 % (44 MB)
   92 12:58:30.192854  progress  45 % (50 MB)
   93 12:58:30.564538  progress  50 % (55 MB)
   94 12:58:30.889069  progress  55 % (61 MB)
   95 12:58:31.270725  progress  60 % (66 MB)
   96 12:58:31.644350  progress  65 % (72 MB)
   97 12:58:32.019188  progress  70 % (78 MB)
   98 12:58:32.407024  progress  75 % (83 MB)
   99 12:58:32.757422  progress  80 % (89 MB)
  100 12:58:33.103955  progress  85 % (94 MB)
  101 12:58:33.464841  progress  90 % (100 MB)
  102 12:58:33.821471  progress  95 % (105 MB)
  103 12:58:34.204147  progress 100 % (111 MB)
  104 12:58:34.209505  111 MB downloaded in 6.93 s (16.10 MB/s)
  105 12:58:34.209848  end: 1.3.1 http-download (duration 00:00:07) [common]
  107 12:58:34.210157  end: 1.3 download-retry (duration 00:00:07) [common]
  108 12:58:34.210258  start: 1.4 download-retry (timeout 00:09:52) [common]
  109 12:58:34.210358  start: 1.4.1 http-download (timeout 00:09:52) [common]
  110 12:58:34.210525  downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2480-g949429724783/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
  111 12:58:34.210605  saving as /var/lib/lava/dispatcher/tmp/13607197/tftp-deploy-ailjc587/modules/modules.tar
  112 12:58:34.210673  total size: 483880 (0 MB)
  113 12:58:34.210745  Using unxz to decompress xz
  114 12:58:34.215476  progress   6 % (0 MB)
  115 12:58:34.215977  progress  13 % (0 MB)
  116 12:58:34.216271  progress  20 % (0 MB)
  117 12:58:34.218062  progress  27 % (0 MB)
  118 12:58:34.220121  progress  33 % (0 MB)
  119 12:58:34.222212  progress  40 % (0 MB)
  120 12:58:34.224657  progress  47 % (0 MB)
  121 12:58:34.226574  progress  54 % (0 MB)
  122 12:58:34.228547  progress  60 % (0 MB)
  123 12:58:34.230663  progress  67 % (0 MB)
  124 12:58:34.232505  progress  74 % (0 MB)
  125 12:58:34.234606  progress  81 % (0 MB)
  126 12:58:34.236625  progress  88 % (0 MB)
  127 12:58:34.238725  progress  94 % (0 MB)
  128 12:58:34.240641  progress 100 % (0 MB)
  129 12:58:34.247348  0 MB downloaded in 0.04 s (12.59 MB/s)
  130 12:58:34.247705  end: 1.4.1 http-download (duration 00:00:00) [common]
  132 12:58:34.248047  end: 1.4 download-retry (duration 00:00:00) [common]
  133 12:58:34.248219  start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
  134 12:58:34.248389  start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
  135 12:58:36.499613  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/13607197/extract-nfsrootfs-8od48ji5
  136 12:58:36.499849  end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
  137 12:58:36.500013  start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
  138 12:58:36.500275  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13607197/lava-overlay-mudy0b7j
  139 12:58:36.500473  makedir: /var/lib/lava/dispatcher/tmp/13607197/lava-overlay-mudy0b7j/lava-13607197/bin
  140 12:58:36.500626  makedir: /var/lib/lava/dispatcher/tmp/13607197/lava-overlay-mudy0b7j/lava-13607197/tests
  141 12:58:36.500788  makedir: /var/lib/lava/dispatcher/tmp/13607197/lava-overlay-mudy0b7j/lava-13607197/results
  142 12:58:36.500961  Creating /var/lib/lava/dispatcher/tmp/13607197/lava-overlay-mudy0b7j/lava-13607197/bin/lava-add-keys
  143 12:58:36.501184  Creating /var/lib/lava/dispatcher/tmp/13607197/lava-overlay-mudy0b7j/lava-13607197/bin/lava-add-sources
  144 12:58:36.501389  Creating /var/lib/lava/dispatcher/tmp/13607197/lava-overlay-mudy0b7j/lava-13607197/bin/lava-background-process-start
  145 12:58:36.501539  Creating /var/lib/lava/dispatcher/tmp/13607197/lava-overlay-mudy0b7j/lava-13607197/bin/lava-background-process-stop
  146 12:58:36.501678  Creating /var/lib/lava/dispatcher/tmp/13607197/lava-overlay-mudy0b7j/lava-13607197/bin/lava-common-functions
  147 12:58:36.501815  Creating /var/lib/lava/dispatcher/tmp/13607197/lava-overlay-mudy0b7j/lava-13607197/bin/lava-echo-ipv4
  148 12:58:36.501955  Creating /var/lib/lava/dispatcher/tmp/13607197/lava-overlay-mudy0b7j/lava-13607197/bin/lava-install-packages
  149 12:58:36.502102  Creating /var/lib/lava/dispatcher/tmp/13607197/lava-overlay-mudy0b7j/lava-13607197/bin/lava-installed-packages
  150 12:58:36.502247  Creating /var/lib/lava/dispatcher/tmp/13607197/lava-overlay-mudy0b7j/lava-13607197/bin/lava-os-build
  151 12:58:36.502383  Creating /var/lib/lava/dispatcher/tmp/13607197/lava-overlay-mudy0b7j/lava-13607197/bin/lava-probe-channel
  152 12:58:36.502516  Creating /var/lib/lava/dispatcher/tmp/13607197/lava-overlay-mudy0b7j/lava-13607197/bin/lava-probe-ip
  153 12:58:36.502650  Creating /var/lib/lava/dispatcher/tmp/13607197/lava-overlay-mudy0b7j/lava-13607197/bin/lava-target-ip
  154 12:58:36.502785  Creating /var/lib/lava/dispatcher/tmp/13607197/lava-overlay-mudy0b7j/lava-13607197/bin/lava-target-mac
  155 12:58:36.502919  Creating /var/lib/lava/dispatcher/tmp/13607197/lava-overlay-mudy0b7j/lava-13607197/bin/lava-target-storage
  156 12:58:36.503058  Creating /var/lib/lava/dispatcher/tmp/13607197/lava-overlay-mudy0b7j/lava-13607197/bin/lava-test-case
  157 12:58:36.503195  Creating /var/lib/lava/dispatcher/tmp/13607197/lava-overlay-mudy0b7j/lava-13607197/bin/lava-test-event
  158 12:58:36.503672  Creating /var/lib/lava/dispatcher/tmp/13607197/lava-overlay-mudy0b7j/lava-13607197/bin/lava-test-feedback
  159 12:58:36.503814  Creating /var/lib/lava/dispatcher/tmp/13607197/lava-overlay-mudy0b7j/lava-13607197/bin/lava-test-raise
  160 12:58:36.503949  Creating /var/lib/lava/dispatcher/tmp/13607197/lava-overlay-mudy0b7j/lava-13607197/bin/lava-test-reference
  161 12:58:36.504086  Creating /var/lib/lava/dispatcher/tmp/13607197/lava-overlay-mudy0b7j/lava-13607197/bin/lava-test-runner
  162 12:58:36.504221  Creating /var/lib/lava/dispatcher/tmp/13607197/lava-overlay-mudy0b7j/lava-13607197/bin/lava-test-set
  163 12:58:36.504356  Creating /var/lib/lava/dispatcher/tmp/13607197/lava-overlay-mudy0b7j/lava-13607197/bin/lava-test-shell
  164 12:58:36.504493  Updating /var/lib/lava/dispatcher/tmp/13607197/lava-overlay-mudy0b7j/lava-13607197/bin/lava-install-packages (oe)
  165 12:58:36.504657  Updating /var/lib/lava/dispatcher/tmp/13607197/lava-overlay-mudy0b7j/lava-13607197/bin/lava-installed-packages (oe)
  166 12:58:36.504788  Creating /var/lib/lava/dispatcher/tmp/13607197/lava-overlay-mudy0b7j/lava-13607197/environment
  167 12:58:36.504892  LAVA metadata
  168 12:58:36.504968  - LAVA_JOB_ID=13607197
  169 12:58:36.505037  - LAVA_DISPATCHER_IP=192.168.201.1
  170 12:58:36.505148  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
  171 12:58:36.505220  skipped lava-vland-overlay
  172 12:58:36.505301  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  173 12:58:36.505386  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
  174 12:58:36.505451  skipped lava-multinode-overlay
  175 12:58:36.505530  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  176 12:58:36.505614  start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
  177 12:58:36.505693  Loading test definitions
  178 12:58:36.505787  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
  179 12:58:36.505865  Using /lava-13607197 at stage 0
  180 12:58:36.506192  uuid=13607197_1.5.2.3.1 testdef=None
  181 12:58:36.506288  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  182 12:58:36.506382  start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
  183 12:58:36.506936  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  185 12:58:36.507175  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
  186 12:58:36.507878  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  188 12:58:36.508127  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
  189 12:58:36.508797  runner path: /var/lib/lava/dispatcher/tmp/13607197/lava-overlay-mudy0b7j/lava-13607197/0/tests/0_dmesg test_uuid 13607197_1.5.2.3.1
  190 12:58:36.508970  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  192 12:58:36.509192  Creating lava-test-runner.conf files
  193 12:58:36.509260  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13607197/lava-overlay-mudy0b7j/lava-13607197/0 for stage 0
  194 12:58:36.509357  - 0_dmesg
  195 12:58:36.509461  end: 1.5.2.3 test-definition (duration 00:00:00) [common]
  196 12:58:36.509553  start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
  197 12:58:36.516196  end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
  198 12:58:36.516341  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
  199 12:58:36.516436  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  200 12:58:36.516529  end: 1.5.2 lava-overlay (duration 00:00:00) [common]
  201 12:58:36.516619  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
  202 12:58:36.689305  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  203 12:58:36.689744  start: 1.5.4 extract-modules (timeout 00:09:50) [common]
  204 12:58:36.689877  extracting modules file /var/lib/lava/dispatcher/tmp/13607197/tftp-deploy-ailjc587/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13607197/extract-nfsrootfs-8od48ji5
  205 12:58:36.708795  extracting modules file /var/lib/lava/dispatcher/tmp/13607197/tftp-deploy-ailjc587/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13607197/extract-overlay-ramdisk-os_h7nji/ramdisk
  206 12:58:36.727074  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  207 12:58:36.727293  start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
  208 12:58:36.727402  [common] Applying overlay to NFS
  209 12:58:36.727481  [common] Applying overlay /var/lib/lava/dispatcher/tmp/13607197/compress-overlay-g6lcdibk/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13607197/extract-nfsrootfs-8od48ji5
  210 12:58:36.735433  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  211 12:58:36.735687  start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
  212 12:58:36.735809  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  213 12:58:36.736031  start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
  214 12:58:36.736158  Building ramdisk /var/lib/lava/dispatcher/tmp/13607197/extract-overlay-ramdisk-os_h7nji/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13607197/extract-overlay-ramdisk-os_h7nji/ramdisk
  215 12:58:36.832350  >> 32557 blocks

  216 12:58:37.556687  rename /var/lib/lava/dispatcher/tmp/13607197/extract-overlay-ramdisk-os_h7nji/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13607197/tftp-deploy-ailjc587/ramdisk/ramdisk.cpio.gz
  217 12:58:37.557185  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  218 12:58:37.557322  start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
  219 12:58:37.557439  start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
  220 12:58:37.557545  No mkimage arch provided, not using FIT.
  221 12:58:37.557647  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  222 12:58:37.557742  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  223 12:58:37.557860  end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
  224 12:58:37.557960  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
  225 12:58:37.558051  No LXC device requested
  226 12:58:37.558140  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  227 12:58:37.558239  start: 1.7 deploy-device-env (timeout 00:09:49) [common]
  228 12:58:37.558334  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  229 12:58:37.558417  Checking files for TFTP limit of 4294967296 bytes.
  230 12:58:37.558867  end: 1 tftp-deploy (duration 00:00:11) [common]
  231 12:58:37.558982  start: 2 depthcharge-action (timeout 00:05:00) [common]
  232 12:58:37.559084  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  233 12:58:37.559235  substitutions:
  234 12:58:37.559485  - {DTB}: None
  235 12:58:37.559559  - {INITRD}: 13607197/tftp-deploy-ailjc587/ramdisk/ramdisk.cpio.gz
  236 12:58:37.559627  - {KERNEL}: 13607197/tftp-deploy-ailjc587/kernel/bzImage
  237 12:58:37.559692  - {LAVA_MAC}: None
  238 12:58:37.559755  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/13607197/extract-nfsrootfs-8od48ji5
  239 12:58:37.559817  - {NFS_SERVER_IP}: 192.168.201.1
  240 12:58:37.559878  - {PRESEED_CONFIG}: None
  241 12:58:37.559938  - {PRESEED_LOCAL}: None
  242 12:58:37.559997  - {RAMDISK}: 13607197/tftp-deploy-ailjc587/ramdisk/ramdisk.cpio.gz
  243 12:58:37.560057  - {ROOT_PART}: None
  244 12:58:37.560117  - {ROOT}: None
  245 12:58:37.560176  - {SERVER_IP}: 192.168.201.1
  246 12:58:37.560235  - {TEE}: None
  247 12:58:37.560295  Parsed boot commands:
  248 12:58:37.560353  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  249 12:58:37.560555  Parsed boot commands: tftpboot 192.168.201.1 13607197/tftp-deploy-ailjc587/kernel/bzImage 13607197/tftp-deploy-ailjc587/kernel/cmdline 13607197/tftp-deploy-ailjc587/ramdisk/ramdisk.cpio.gz
  250 12:58:37.560653  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  251 12:58:37.560743  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  252 12:58:37.560840  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  253 12:58:37.560930  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  254 12:58:37.561008  Not connected, no need to disconnect.
  255 12:58:37.561089  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  256 12:58:37.561179  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  257 12:58:37.561257  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cp514-2h-1130g7-volteer-cbg-4'
  258 12:58:37.565508  Setting prompt string to ['lava-test: # ']
  259 12:58:37.565916  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  260 12:58:37.566042  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  261 12:58:37.566156  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  262 12:58:37.566258  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  263 12:58:37.566459  Calling: '/usr/local/bin/chromebook-reboot.sh' 'acer-cp514-2h-1130g7-volteer-cbg-4'
  264 12:58:46.311149  Returned 0 in 8 seconds
  265 12:58:46.412401  end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
  267 12:58:46.413947  end: 2.2.2 reset-device (duration 00:00:09) [common]
  268 12:58:46.414565  start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
  269 12:58:46.415094  Setting prompt string to 'Starting depthcharge on Voema...'
  270 12:58:46.415630  Changing prompt to 'Starting depthcharge on Voema...'
  271 12:58:46.416082  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  272 12:58:46.417555  [Enter `^Ec?' for help]

  273 12:58:46.418031  

  274 12:58:46.418615  

  275 12:58:46.419254  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...

  276 12:58:46.419834  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz

  277 12:58:46.420363  CPU: ID 806c1, Tigerlake B0, ucode: 00000086

  278 12:58:46.420720  CPU: AES supported, TXT NOT supported, VT supported

  279 12:58:46.421041  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2

  280 12:58:46.421390  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU

  281 12:58:46.421715  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2

  282 12:58:46.422195  VBOOT: Loading verstage.

  283 12:58:46.422557  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  284 12:58:46.422856  FMAP: base = 0x0 size = 0x2000000 #areas = 32

  285 12:58:46.423143  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  286 12:58:46.423677  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes

  287 12:58:46.423991  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984

  288 12:58:46.424310  

  289 12:58:46.424637  

  290 12:58:46.424975  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...

  291 12:58:46.425376  Probing TPM: . done!

  292 12:58:46.425791  TPM ready after 0 ms

  293 12:58:46.426077  Connected to device vid:did:rid of 1ae0:0028:00

  294 12:58:46.426422  Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c

  295 12:58:46.426827  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  296 12:58:46.427378  Initialized TPM device CR50 revision 0

  297 12:58:46.427767  tlcl_send_startup: Startup return code is 0

  298 12:58:46.428113  TPM: setup succeeded

  299 12:58:46.428478  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  300 12:58:46.428788  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  301 12:58:46.429176  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  302 12:58:46.429578  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  303 12:58:46.429926  Chrome EC: UHEPI supported

  304 12:58:46.430341  Phase 1

  305 12:58:46.430741  FMAP: area GBB found @ 1805000 (458752 bytes)

  306 12:58:46.431069  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  307 12:58:46.431518  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  308 12:58:46.431838  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  309 12:58:46.432277  VB2:vb2_check_recovery() Recovery was requested manually

  310 12:58:46.432637  VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x7

  311 12:58:46.432994  Recovery requested (1009000e)

  312 12:58:46.433332  TPM: Extending digest for VBOOT: boot mode into PCR 0

  313 12:58:46.433793  tlcl_extend: response is 0

  314 12:58:46.434089  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  315 12:58:46.434370  tlcl_extend: response is 0

  316 12:58:46.434645  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  317 12:58:46.435019  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638

  318 12:58:46.435571  BS: verstage times (exec / console): total (unknown) / 147 ms

  319 12:58:46.435866  

  320 12:58:46.436183  

  321 12:58:46.436458  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...

  322 12:58:46.436805  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  323 12:58:46.437303  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  324 12:58:46.437543  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000

  325 12:58:46.437787  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  326 12:58:46.438037  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000

  327 12:58:46.438240  gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000

  328 12:58:46.438495  TCO_STS:   0000 0000

  329 12:58:46.438812  GEN_PMCON: d0015038 00002200

  330 12:58:46.439017  GBLRST_CAUSE: 00000000 00000000

  331 12:58:46.439211  HPR_CAUSE0: 00000000

  332 12:58:46.439484  prev_sleep_state 5

  333 12:58:46.439680  Boot Count incremented to 34586

  334 12:58:46.440007  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  335 12:58:46.440219  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  336 12:58:46.440417  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  337 12:58:46.440613  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c

  338 12:58:46.440840  Chrome EC: UHEPI supported

  339 12:58:46.441094  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  340 12:58:46.441318  Probing TPM:  done!

  341 12:58:46.441514  Connected to device vid:did:rid of 1ae0:0028:00

  342 12:58:46.441769  Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c

  343 12:58:46.442174  Initialized TPM device CR50 revision 0

  344 12:58:46.442432  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  345 12:58:46.442584  MRC: Hash idx 0x100b comparison successful.

  346 12:58:46.442731  MRC cache found, size faa8

  347 12:58:46.442879  bootmode is set to: 2

  348 12:58:46.443045  SPD index = 0

  349 12:58:46.443208  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c

  350 12:58:46.443480  SPD: module type is LPDDR4X

  351 12:58:46.443636  SPD: module part number is MT53E512M64D4NW-046

  352 12:58:46.443787  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  353 12:58:46.443937  SPD: device width 16 bits, bus width 16 bits

  354 12:58:46.444085  SPD: module size is 1024 MB (per channel)

  355 12:58:46.444274  CBMEM:

  356 12:58:46.444454  IMD: root @ 0x76fff000 254 entries.

  357 12:58:46.444619  IMD: root @ 0x76ffec00 62 entries.

  358 12:58:46.444767  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  359 12:58:46.445200  FMAP: area RW_VPD found @ f35000 (8192 bytes)

  360 12:58:46.445392  External stage cache:

  361 12:58:46.445545  IMD: root @ 0x7b3ff000 254 entries.

  362 12:58:46.445692  IMD: root @ 0x7b3fec00 62 entries.

  363 12:58:46.445858  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  364 12:58:46.446008  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  365 12:58:46.446158  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  366 12:58:46.446306  MRC: 'RECOVERY_MRC_CACHE' does not need update.

  367 12:58:46.446495  cse_lite: Skip switching to RW in the recovery path

  368 12:58:46.446677  8 DIMMs found

  369 12:58:46.446909  SMM Memory Map

  370 12:58:46.447090  SMRAM       : 0x7b000000 0x800000

  371 12:58:46.447263   Subregion 0: 0x7b000000 0x200000

  372 12:58:46.447457   Subregion 1: 0x7b200000 0x200000

  373 12:58:46.447605   Subregion 2: 0x7b400000 0x400000

  374 12:58:46.447726  top_of_ram = 0x77000000

  375 12:58:46.447844  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  376 12:58:46.447964  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)

  377 12:58:46.448099  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  378 12:58:46.448218  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  379 12:58:46.448336  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c

  380 12:58:46.448456  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)

  381 12:58:46.448591  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500

  382 12:58:46.448711  Processing 211 relocs. Offset value of 0x74c0b000

  383 12:58:46.448829  BS: romstage times (exec / console): total (unknown) / 277 ms

  384 12:58:46.448948  

  385 12:58:46.449064  

  386 12:58:46.449198  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...

  387 12:58:46.449319  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  388 12:58:46.449450  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  389 12:58:46.449570  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  390 12:58:46.449707  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec

  391 12:58:46.449826  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)

  392 12:58:46.450007  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270

  393 12:58:46.450149  Processing 5008 relocs. Offset value of 0x75d98000

  394 12:58:46.450272  BS: postcar times (exec / console): total (unknown) / 59 ms

  395 12:58:46.450391  

  396 12:58:46.450507  

  397 12:58:46.450637  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...

  398 12:58:46.450810  Normal boot

  399 12:58:46.450937  FW_CONFIG value is 0x804c02

  400 12:58:46.451070  PCI: 00:07.0 disabled by fw_config

  401 12:58:46.451190  PCI: 00:07.1 disabled by fw_config

  402 12:58:46.451328  PCI: 00:0d.2 disabled by fw_config

  403 12:58:46.451472  PCI: 00:1c.7 disabled by fw_config

  404 12:58:46.451591  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  405 12:58:46.451713  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  406 12:58:46.451848  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  407 12:58:46.451968  GENERIC: 0.0 disabled by fw_config

  408 12:58:46.452102  GENERIC: 1.0 disabled by fw_config

  409 12:58:46.452221  fw_config match found: DB_USB=USB3_ACTIVE

  410 12:58:46.452339  fw_config match found: DB_USB=USB3_ACTIVE

  411 12:58:46.452460  fw_config match found: DB_USB=USB3_ACTIVE

  412 12:58:46.452559  fw_config match found: DB_USB=USB3_ACTIVE

  413 12:58:46.452658  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  414 12:58:46.452770  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  415 12:58:46.452871  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  416 12:58:46.452982  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c

  417 12:58:46.453084  microcode: sig=0x806c1 pf=0x80 revision=0x86

  418 12:58:46.453205  microcode: Update skipped, already up-to-date

  419 12:58:46.453359  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c

  420 12:58:46.453474  Detected 4 core, 8 thread CPU.

  421 12:58:46.453576  Setting up SMI for CPU

  422 12:58:46.453684  IED base = 0x7b400000

  423 12:58:46.453785  IED size = 0x00400000

  424 12:58:46.453895  Will perform SMM setup.

  425 12:58:46.453995  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.

  426 12:58:46.454093  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

  427 12:58:46.454193  Processing 16 relocs. Offset value of 0x00030000

  428 12:58:46.454291  Attempting to start 7 APs

  429 12:58:46.454388  Waiting for 10ms after sending INIT.

  430 12:58:46.454486  Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.

  431 12:58:46.454585  AP: slot 3 apic_id 5.

  432 12:58:46.454697  AP: slot 4 apic_id 7.

  433 12:58:46.454808  AP: slot 5 apic_id 6.

  434 12:58:46.454906  AP: slot 6 apic_id 3.

  435 12:58:46.455016  AP: slot 2 apic_id 2.

  436 12:58:46.455126  done.

  437 12:58:46.455239  AP: slot 7 apic_id 4.

  438 12:58:46.455356  Waiting for 2nd SIPI to complete...done.

  439 12:58:46.455496  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

  440 12:58:46.455600  Processing 13 relocs. Offset value of 0x00038000

  441 12:58:46.455699  Unable to locate Global NVS

  442 12:58:46.455811  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)

  443 12:58:46.455910  Installing permanent SMM handler to 0x7b000000

  444 12:58:46.456021  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908

  445 12:58:46.456144  Processing 794 relocs. Offset value of 0x7b010000

  446 12:58:46.456485  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8

  447 12:58:46.456633  Processing 13 relocs. Offset value of 0x7b008000

  448 12:58:46.456738  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd

  449 12:58:46.456840  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd

  450 12:58:46.456940  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd

  451 12:58:46.457056  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd

  452 12:58:46.457156  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd

  453 12:58:46.457265  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd

  454 12:58:46.457391  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd

  455 12:58:46.457488  Unable to locate Global NVS

  456 12:58:46.457572  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)

  457 12:58:46.457657  Clearing SMI status registers

  458 12:58:46.457741  SMI_STS: PM1 

  459 12:58:46.457824  PM1_STS: PWRBTN 

  460 12:58:46.457908  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0

  461 12:58:46.457992  In relocation handler: CPU 0

  462 12:58:46.458075  New SMBASE=0x7b000000 IEDBASE=0x7b400000

  463 12:58:46.458171  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  464 12:58:46.458267  Relocation complete.

  465 12:58:46.458361  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1

  466 12:58:46.458488  In relocation handler: CPU 1

  467 12:58:46.458590  New SMBASE=0x7afffc00 IEDBASE=0x7b400000

  468 12:58:46.458677  Relocation complete.

  469 12:58:46.458762  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7

  470 12:58:46.458851  In relocation handler: CPU 7

  471 12:58:46.458953  New SMBASE=0x7affe400 IEDBASE=0x7b400000

  472 12:58:46.459039  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  473 12:58:46.459133  Relocation complete.

  474 12:58:46.459232  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3

  475 12:58:46.459320  In relocation handler: CPU 3

  476 12:58:46.459418  New SMBASE=0x7afff400 IEDBASE=0x7b400000

  477 12:58:46.459504  Relocation complete.

  478 12:58:46.459599  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2

  479 12:58:46.459706  In relocation handler: CPU 2

  480 12:58:46.459792  New SMBASE=0x7afff800 IEDBASE=0x7b400000

  481 12:58:46.459876  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  482 12:58:46.459961  Relocation complete.

  483 12:58:46.460069  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6

  484 12:58:46.460172  In relocation handler: CPU 6

  485 12:58:46.460269  New SMBASE=0x7affe800 IEDBASE=0x7b400000

  486 12:58:46.460356  Relocation complete.

  487 12:58:46.460451  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4

  488 12:58:46.460547  In relocation handler: CPU 4

  489 12:58:46.460633  New SMBASE=0x7afff000 IEDBASE=0x7b400000

  490 12:58:46.460728  Relocation complete.

  491 12:58:46.460833  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5

  492 12:58:46.460924  In relocation handler: CPU 5

  493 12:58:46.461009  New SMBASE=0x7affec00 IEDBASE=0x7b400000

  494 12:58:46.461094  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  495 12:58:46.461178  Relocation complete.

  496 12:58:46.461262  Initializing CPU #0

  497 12:58:46.461346  CPU: vendor Intel device 806c1

  498 12:58:46.461429  CPU: family 06, model 8c, stepping 01

  499 12:58:46.461513  Clearing out pending MCEs

  500 12:58:46.461608  Setting up local APIC...

  501 12:58:46.461714   apic_id: 0x00 done.

  502 12:58:46.461798  Turbo is available but hidden

  503 12:58:46.461902  Turbo is available and visible

  504 12:58:46.462018  microcode: Update skipped, already up-to-date

  505 12:58:46.462104  CPU #0 initialized

  506 12:58:46.462188  Initializing CPU #3

  507 12:58:46.462272  Initializing CPU #7

  508 12:58:46.462367  CPU: vendor Intel device 806c1

  509 12:58:46.462440  CPU: family 06, model 8c, stepping 01

  510 12:58:46.462514  CPU: vendor Intel device 806c1

  511 12:58:46.462587  CPU: family 06, model 8c, stepping 01

  512 12:58:46.462671  Clearing out pending MCEs

  513 12:58:46.462754  Initializing CPU #5

  514 12:58:46.462828  Initializing CPU #4

  515 12:58:46.462912  Initializing CPU #6

  516 12:58:46.463003  Initializing CPU #2

  517 12:58:46.463088  CPU: vendor Intel device 806c1

  518 12:58:46.463161  CPU: family 06, model 8c, stepping 01

  519 12:58:46.463255  Setting up local APIC...

  520 12:58:46.463331  CPU: vendor Intel device 806c1

  521 12:58:46.463404  CPU: family 06, model 8c, stepping 01

  522 12:58:46.463521  CPU: vendor Intel device 806c1

  523 12:58:46.463598  CPU: family 06, model 8c, stepping 01

  524 12:58:46.463685  Clearing out pending MCEs

  525 12:58:46.463760  Clearing out pending MCEs

  526 12:58:46.463834  Setting up local APIC...

  527 12:58:46.463907  Initializing CPU #1

  528 12:58:46.463980  CPU: vendor Intel device 806c1

  529 12:58:46.464053  CPU: family 06, model 8c, stepping 01

  530 12:58:46.464127  Clearing out pending MCEs

  531 12:58:46.464200   apic_id: 0x06 done.

  532 12:58:46.464273  Setting up local APIC...

  533 12:58:46.464347  Clearing out pending MCEs

  534 12:58:46.464431  Setting up local APIC...

  535 12:58:46.464504   apic_id: 0x05 done.

  536 12:58:46.464578  Clearing out pending MCEs

  537 12:58:46.464660  microcode: Update skipped, already up-to-date

  538 12:58:46.464745  Setting up local APIC...

  539 12:58:46.464819   apic_id: 0x03 done.

  540 12:58:46.464892  Setting up local APIC...

  541 12:58:46.464970  CPU: vendor Intel device 806c1

  542 12:58:46.465052  CPU: family 06, model 8c, stepping 01

  543 12:58:46.465126  CPU #3 initialized

  544 12:58:46.465199  microcode: Update skipped, already up-to-date

  545 12:58:46.465283   apic_id: 0x07 done.

  546 12:58:46.465395   apic_id: 0x02 done.

  547 12:58:46.465482  microcode: Update skipped, already up-to-date

  548 12:58:46.465557  microcode: Update skipped, already up-to-date

  549 12:58:46.465631  CPU #6 initialized

  550 12:58:46.465704  CPU #2 initialized

  551 12:58:46.465778  Clearing out pending MCEs

  552 12:58:46.465851   apic_id: 0x04 done.

  553 12:58:46.465935  CPU #5 initialized

  554 12:58:46.466027  microcode: Update skipped, already up-to-date

  555 12:58:46.466101  Setting up local APIC...

  556 12:58:46.466174  microcode: Update skipped, already up-to-date

  557 12:58:46.466248  CPU #4 initialized

  558 12:58:46.466320   apic_id: 0x01 done.

  559 12:58:46.466392  CPU #7 initialized

  560 12:58:46.466714  microcode: Update skipped, already up-to-date

  561 12:58:46.466812  CPU #1 initialized

  562 12:58:46.466890  bsp_do_flight_plan done after 454 msecs.

  563 12:58:46.466980  CPU: frequency set to 4000 MHz

  564 12:58:46.467073  Enabling SMIs.

  565 12:58:46.467148  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms

  566 12:58:46.467238  SATAXPCIE1 indicates PCIe NVMe is present

  567 12:58:46.467315  Probing TPM:  done!

  568 12:58:46.467400  Connected to device vid:did:rid of 1ae0:0028:00

  569 12:58:46.467467  Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c

  570 12:58:46.467544  Initialized TPM device CR50 revision 0

  571 12:58:46.467611  Enabling S0i3.4

  572 12:58:46.467676  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc

  573 12:58:46.467743  Found a VBT of 8704 bytes after decompression

  574 12:58:46.467809  cse_lite: CSE RO boot. HybridStorageMode disabled

  575 12:58:46.467876  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called

  576 12:58:46.467942  FSPS returned 0

  577 12:58:46.468007  Executing Phase 1 of FspMultiPhaseSiInit

  578 12:58:46.468073  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  579 12:58:46.468140  port C0 DISC req: usage 1 usb3 1 usb2 5

  580 12:58:46.468205  Raw Buffer output 0 00000511

  581 12:58:46.468280  Raw Buffer output 1 00000000

  582 12:58:46.468346  pmc_send_ipc_cmd succeeded

  583 12:58:46.468411  port C1 DISC req: usage 1 usb3 2 usb2 3

  584 12:58:46.468476  Raw Buffer output 0 00000321

  585 12:58:46.468551  Raw Buffer output 1 00000000

  586 12:58:46.468654  pmc_send_ipc_cmd succeeded

  587 12:58:46.468721  Detected 4 core, 8 thread CPU.

  588 12:58:46.468787  Detected 4 core, 8 thread CPU.

  589 12:58:46.468853  Display FSP Version Info HOB

  590 12:58:46.468918  Reference Code - CPU = a.0.4c.31

  591 12:58:46.468987  uCode Version = 0.0.0.86

  592 12:58:46.469067  TXT ACM version = ff.ff.ff.ffff

  593 12:58:46.469142  Reference Code - ME = a.0.4c.31

  594 12:58:46.469210  MEBx version = 0.0.0.0

  595 12:58:46.469319  ME Firmware Version = Consumer SKU

  596 12:58:46.469422  Reference Code - PCH = a.0.4c.31

  597 12:58:46.469494  PCH-CRID Status = Disabled

  598 12:58:46.469564  PCH-CRID Original Value = ff.ff.ff.ffff

  599 12:58:46.469641  PCH-CRID New Value = ff.ff.ff.ffff

  600 12:58:46.469707  OPROM - RST - RAID = ff.ff.ff.ffff

  601 12:58:46.469774  PCH Hsio Version = 4.0.0.0

  602 12:58:46.469850  Reference Code - SA - System Agent = a.0.4c.31

  603 12:58:46.469962  Reference Code - MRC = 2.0.0.1

  604 12:58:46.470032  SA - PCIe Version = a.0.4c.31

  605 12:58:46.470117  SA-CRID Status = Disabled

  606 12:58:46.470184  SA-CRID Original Value = 0.0.0.1

  607 12:58:46.470250  SA-CRID New Value = 0.0.0.1

  608 12:58:46.470315  OPROM - VBIOS = ff.ff.ff.ffff

  609 12:58:46.470382  IO Manageability Engine FW Version = 11.1.4.0

  610 12:58:46.470447  PHY Build Version = 0.0.0.e0

  611 12:58:46.470513  Thunderbolt(TM) FW Version = 0.0.0.0

  612 12:58:46.470579  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  613 12:58:46.470645  ITSS IRQ Polarities Before:

  614 12:58:46.470710  IPC0: 0xffffffff

  615 12:58:46.470784  IPC1: 0xffffffff

  616 12:58:46.470850  IPC2: 0xffffffff

  617 12:58:46.470915  IPC3: 0xffffffff

  618 12:58:46.471001  ITSS IRQ Polarities After:

  619 12:58:46.471068  IPC0: 0xffffffff

  620 12:58:46.471144  IPC1: 0xffffffff

  621 12:58:46.471239  IPC2: 0xffffffff

  622 12:58:46.471307  IPC3: 0xffffffff

  623 12:58:46.471372  Found PCIe Root Port #9 at PCI: 00:1d.0.

  624 12:58:46.471449  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.

  625 12:58:46.471521  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.

  626 12:58:46.471588  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.

  627 12:58:46.471654  BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms

  628 12:58:46.471721  Enumerating buses...

  629 12:58:46.471786  Show all devs... Before device enumeration.

  630 12:58:46.471856  Root Device: enabled 1

  631 12:58:46.471982  DOMAIN: 0000: enabled 1

  632 12:58:46.472053  CPU_CLUSTER: 0: enabled 1

  633 12:58:46.472131  PCI: 00:00.0: enabled 1

  634 12:58:46.472197  PCI: 00:02.0: enabled 1

  635 12:58:46.472273  PCI: 00:04.0: enabled 1

  636 12:58:46.472338  PCI: 00:05.0: enabled 1

  637 12:58:46.472431  PCI: 00:06.0: enabled 0

  638 12:58:46.472490  PCI: 00:07.0: enabled 0

  639 12:58:46.472559  PCI: 00:07.1: enabled 0

  640 12:58:46.472618  PCI: 00:07.2: enabled 0

  641 12:58:46.472676  PCI: 00:07.3: enabled 0

  642 12:58:46.472734  PCI: 00:08.0: enabled 1

  643 12:58:46.472793  PCI: 00:09.0: enabled 0

  644 12:58:46.472851  PCI: 00:0a.0: enabled 0

  645 12:58:46.472909  PCI: 00:0d.0: enabled 1

  646 12:58:46.472967  PCI: 00:0d.1: enabled 0

  647 12:58:46.473026  PCI: 00:0d.2: enabled 0

  648 12:58:46.473084  PCI: 00:0d.3: enabled 0

  649 12:58:46.473142  PCI: 00:0e.0: enabled 0

  650 12:58:46.473209  PCI: 00:10.2: enabled 1

  651 12:58:46.473269  PCI: 00:10.6: enabled 0

  652 12:58:46.473328  PCI: 00:10.7: enabled 0

  653 12:58:46.473386  PCI: 00:12.0: enabled 0

  654 12:58:46.473444  PCI: 00:12.6: enabled 0

  655 12:58:46.473503  PCI: 00:13.0: enabled 0

  656 12:58:46.473572  PCI: 00:14.0: enabled 1

  657 12:58:46.473636  PCI: 00:14.1: enabled 0

  658 12:58:46.473713  PCI: 00:14.2: enabled 1

  659 12:58:46.473774  PCI: 00:14.3: enabled 1

  660 12:58:46.473847  PCI: 00:15.0: enabled 1

  661 12:58:46.473907  PCI: 00:15.1: enabled 1

  662 12:58:46.473965  PCI: 00:15.2: enabled 1

  663 12:58:46.474023  PCI: 00:15.3: enabled 1

  664 12:58:46.474082  PCI: 00:16.0: enabled 1

  665 12:58:46.474140  PCI: 00:16.1: enabled 0

  666 12:58:46.474201  PCI: 00:16.2: enabled 0

  667 12:58:46.474285  PCI: 00:16.3: enabled 0

  668 12:58:46.474377  PCI: 00:16.4: enabled 0

  669 12:58:46.474480  PCI: 00:16.5: enabled 0

  670 12:58:46.474592  PCI: 00:17.0: enabled 1

  671 12:58:46.474704  PCI: 00:19.0: enabled 0

  672 12:58:46.474786  PCI: 00:19.1: enabled 1

  673 12:58:46.474883  PCI: 00:19.2: enabled 0

  674 12:58:46.474986  PCI: 00:1c.0: enabled 1

  675 12:58:46.475088  PCI: 00:1c.1: enabled 0

  676 12:58:46.475191  PCI: 00:1c.2: enabled 0

  677 12:58:46.475299  PCI: 00:1c.3: enabled 0

  678 12:58:46.475403  PCI: 00:1c.4: enabled 0

  679 12:58:46.475514  PCI: 00:1c.5: enabled 0

  680 12:58:46.475617  PCI: 00:1c.6: enabled 1

  681 12:58:46.475729  PCI: 00:1c.7: enabled 0

  682 12:58:46.475841  PCI: 00:1d.0: enabled 1

  683 12:58:46.475955  PCI: 00:1d.1: enabled 0

  684 12:58:46.476265  PCI: 00:1d.2: enabled 1

  685 12:58:46.476370  PCI: 00:1d.3: enabled 0

  686 12:58:46.476486  PCI: 00:1e.0: enabled 1

  687 12:58:46.476592  PCI: 00:1e.1: enabled 0

  688 12:58:46.476696  PCI: 00:1e.2: enabled 1

  689 12:58:46.476800  PCI: 00:1e.3: enabled 1

  690 12:58:46.476913  PCI: 00:1f.0: enabled 1

  691 12:58:46.477017  PCI: 00:1f.1: enabled 0

  692 12:58:46.477120  PCI: 00:1f.2: enabled 1

  693 12:58:46.477233  PCI: 00:1f.3: enabled 1

  694 12:58:46.477345  PCI: 00:1f.4: enabled 0

  695 12:58:46.477457  PCI: 00:1f.5: enabled 1

  696 12:58:46.477560  PCI: 00:1f.6: enabled 0

  697 12:58:46.477673  PCI: 00:1f.7: enabled 0

  698 12:58:46.477777  APIC: 00: enabled 1

  699 12:58:46.477890  GENERIC: 0.0: enabled 1

  700 12:58:46.477993  GENERIC: 0.0: enabled 1

  701 12:58:46.478097  GENERIC: 1.0: enabled 1

  702 12:58:46.478200  GENERIC: 0.0: enabled 1

  703 12:58:46.478312  GENERIC: 1.0: enabled 1

  704 12:58:46.478415  USB0 port 0: enabled 1

  705 12:58:46.478527  GENERIC: 0.0: enabled 1

  706 12:58:46.478630  USB0 port 0: enabled 1

  707 12:58:46.478742  GENERIC: 0.0: enabled 1

  708 12:58:46.478852  I2C: 00:1a: enabled 1

  709 12:58:46.478970  I2C: 00:31: enabled 1

  710 12:58:46.479073  I2C: 00:32: enabled 1

  711 12:58:46.479175  I2C: 00:10: enabled 1

  712 12:58:46.479288  I2C: 00:15: enabled 1

  713 12:58:46.479392  GENERIC: 0.0: enabled 0

  714 12:58:46.479495  GENERIC: 1.0: enabled 0

  715 12:58:46.479597  GENERIC: 0.0: enabled 1

  716 12:58:46.479700  SPI: 00: enabled 1

  717 12:58:46.479813  SPI: 00: enabled 1

  718 12:58:46.479925  PNP: 0c09.0: enabled 1

  719 12:58:46.480037  GENERIC: 0.0: enabled 1

  720 12:58:46.480158  USB3 port 0: enabled 1

  721 12:58:46.480261  USB3 port 1: enabled 1

  722 12:58:46.480363  USB3 port 2: enabled 0

  723 12:58:46.480466  USB3 port 3: enabled 0

  724 12:58:46.480569  USB2 port 0: enabled 0

  725 12:58:46.480671  USB2 port 1: enabled 1

  726 12:58:46.480773  USB2 port 2: enabled 1

  727 12:58:46.480884  USB2 port 3: enabled 0

  728 12:58:46.480986  USB2 port 4: enabled 1

  729 12:58:46.481088  USB2 port 5: enabled 0

  730 12:58:46.481191  USB2 port 6: enabled 0

  731 12:58:46.481292  USB2 port 7: enabled 0

  732 12:58:46.481394  USB2 port 8: enabled 0

  733 12:58:46.481506  USB2 port 9: enabled 0

  734 12:58:46.481618  USB3 port 0: enabled 0

  735 12:58:46.481729  USB3 port 1: enabled 1

  736 12:58:46.481841  USB3 port 2: enabled 0

  737 12:58:46.481960  USB3 port 3: enabled 0

  738 12:58:46.482072  GENERIC: 0.0: enabled 1

  739 12:58:46.482184  GENERIC: 1.0: enabled 1

  740 12:58:46.482296  APIC: 01: enabled 1

  741 12:58:46.482407  APIC: 02: enabled 1

  742 12:58:46.482509  APIC: 05: enabled 1

  743 12:58:46.482622  APIC: 07: enabled 1

  744 12:58:46.482724  APIC: 06: enabled 1

  745 12:58:46.482827  APIC: 03: enabled 1

  746 12:58:46.482929  APIC: 04: enabled 1

  747 12:58:46.483030  Compare with tree...

  748 12:58:46.483142  Root Device: enabled 1

  749 12:58:46.483255   DOMAIN: 0000: enabled 1

  750 12:58:46.483368    PCI: 00:00.0: enabled 1

  751 12:58:46.483483    PCI: 00:02.0: enabled 1

  752 12:58:46.483595    PCI: 00:04.0: enabled 1

  753 12:58:46.483707     GENERIC: 0.0: enabled 1

  754 12:58:46.483811    PCI: 00:05.0: enabled 1

  755 12:58:46.483912    PCI: 00:06.0: enabled 0

  756 12:58:46.484015    PCI: 00:07.0: enabled 0

  757 12:58:46.484117     GENERIC: 0.0: enabled 1

  758 12:58:46.484219    PCI: 00:07.1: enabled 0

  759 12:58:46.484321     GENERIC: 1.0: enabled 1

  760 12:58:46.484423    PCI: 00:07.2: enabled 0

  761 12:58:46.484527     GENERIC: 0.0: enabled 1

  762 12:58:46.484639    PCI: 00:07.3: enabled 0

  763 12:58:46.484742     GENERIC: 1.0: enabled 1

  764 12:58:46.484870    PCI: 00:08.0: enabled 1

  765 12:58:46.484983    PCI: 00:09.0: enabled 0

  766 12:58:46.485086    PCI: 00:0a.0: enabled 0

  767 12:58:46.485188    PCI: 00:0d.0: enabled 1

  768 12:58:46.485290     USB0 port 0: enabled 1

  769 12:58:46.485392      USB3 port 0: enabled 1

  770 12:58:46.485495      USB3 port 1: enabled 1

  771 12:58:46.485606      USB3 port 2: enabled 0

  772 12:58:46.485708      USB3 port 3: enabled 0

  773 12:58:46.485819    PCI: 00:0d.1: enabled 0

  774 12:58:46.485931    PCI: 00:0d.2: enabled 0

  775 12:58:46.486034     GENERIC: 0.0: enabled 1

  776 12:58:46.486147    PCI: 00:0d.3: enabled 0

  777 12:58:46.486250    PCI: 00:0e.0: enabled 0

  778 12:58:46.486352    PCI: 00:10.2: enabled 1

  779 12:58:46.486455    PCI: 00:10.6: enabled 0

  780 12:58:46.486567    PCI: 00:10.7: enabled 0

  781 12:58:46.486669    PCI: 00:12.0: enabled 0

  782 12:58:46.486770    PCI: 00:12.6: enabled 0

  783 12:58:46.486881    PCI: 00:13.0: enabled 0

  784 12:58:46.486984    PCI: 00:14.0: enabled 1

  785 12:58:46.487095     USB0 port 0: enabled 1

  786 12:58:46.487217      USB2 port 0: enabled 0

  787 12:58:46.487325      USB2 port 1: enabled 1

  788 12:58:46.487428      USB2 port 2: enabled 1

  789 12:58:46.487531      USB2 port 3: enabled 0

  790 12:58:46.487633      USB2 port 4: enabled 1

  791 12:58:46.487735      USB2 port 5: enabled 0

  792 12:58:46.487838      USB2 port 6: enabled 0

  793 12:58:46.487940      USB2 port 7: enabled 0

  794 12:58:46.488051      USB2 port 8: enabled 0

  795 12:58:46.488153      USB2 port 9: enabled 0

  796 12:58:46.488271      USB3 port 0: enabled 0

  797 12:58:46.488384      USB3 port 1: enabled 1

  798 12:58:46.488494      USB3 port 2: enabled 0

  799 12:58:46.488597      USB3 port 3: enabled 0

  800 12:58:46.488698    PCI: 00:14.1: enabled 0

  801 12:58:46.488800    PCI: 00:14.2: enabled 1

  802 12:58:46.488902    PCI: 00:14.3: enabled 1

  803 12:58:46.489004     GENERIC: 0.0: enabled 1

  804 12:58:46.489106    PCI: 00:15.0: enabled 1

  805 12:58:46.489207     I2C: 00:1a: enabled 1

  806 12:58:46.489319     I2C: 00:31: enabled 1

  807 12:58:46.489431     I2C: 00:32: enabled 1

  808 12:58:46.489533    PCI: 00:15.1: enabled 1

  809 12:58:46.489645     I2C: 00:10: enabled 1

  810 12:58:46.489748    PCI: 00:15.2: enabled 1

  811 12:58:46.489850    PCI: 00:15.3: enabled 1

  812 12:58:46.489952    PCI: 00:16.0: enabled 1

  813 12:58:46.490054    PCI: 00:16.1: enabled 0

  814 12:58:46.490167    PCI: 00:16.2: enabled 0

  815 12:58:46.490268    PCI: 00:16.3: enabled 0

  816 12:58:46.490370    PCI: 00:16.4: enabled 0

  817 12:58:46.490473    PCI: 00:16.5: enabled 0

  818 12:58:46.490584    PCI: 00:17.0: enabled 1

  819 12:58:46.490696    PCI: 00:19.0: enabled 0

  820 12:58:46.490808    PCI: 00:19.1: enabled 1

  821 12:58:46.490911     I2C: 00:15: enabled 1

  822 12:58:46.491013    PCI: 00:19.2: enabled 0

  823 12:58:46.491116    PCI: 00:1d.0: enabled 1

  824 12:58:46.491221     GENERIC: 0.0: enabled 1

  825 12:58:46.491335    PCI: 00:1e.0: enabled 1

  826 12:58:46.491448    PCI: 00:1e.1: enabled 0

  827 12:58:46.491550    PCI: 00:1e.2: enabled 1

  828 12:58:46.491652     SPI: 00: enabled 1

  829 12:58:46.491755    PCI: 00:1e.3: enabled 1

  830 12:58:46.491860     SPI: 00: enabled 1

  831 12:58:46.491962    PCI: 00:1f.0: enabled 1

  832 12:58:46.492064     PNP: 0c09.0: enabled 1

  833 12:58:46.492175    PCI: 00:1f.1: enabled 0

  834 12:58:46.492278    PCI: 00:1f.2: enabled 1

  835 12:58:46.492389     GENERIC: 0.0: enabled 1

  836 12:58:46.492492      GENERIC: 0.0: enabled 1

  837 12:58:46.492594      GENERIC: 1.0: enabled 1

  838 12:58:46.492696    PCI: 00:1f.3: enabled 1

  839 12:58:46.492817    PCI: 00:1f.4: enabled 0

  840 12:58:46.492919    PCI: 00:1f.5: enabled 1

  841 12:58:46.493031    PCI: 00:1f.6: enabled 0

  842 12:58:46.493340    PCI: 00:1f.7: enabled 0

  843 12:58:46.493453   CPU_CLUSTER: 0: enabled 1

  844 12:58:46.493561    APIC: 00: enabled 1

  845 12:58:46.493676    APIC: 01: enabled 1

  846 12:58:46.493781    APIC: 02: enabled 1

  847 12:58:46.493894    APIC: 05: enabled 1

  848 12:58:46.494006    APIC: 07: enabled 1

  849 12:58:46.494120    APIC: 06: enabled 1

  850 12:58:46.494223    APIC: 03: enabled 1

  851 12:58:46.494325    APIC: 04: enabled 1

  852 12:58:46.494427  Root Device scanning...

  853 12:58:46.494530  scan_static_bus for Root Device

  854 12:58:46.494633  DOMAIN: 0000 enabled

  855 12:58:46.494739  CPU_CLUSTER: 0 enabled

  856 12:58:46.494865  DOMAIN: 0000 scanning...

  857 12:58:46.494969  PCI: pci_scan_bus for bus 00

  858 12:58:46.495083  PCI: 00:00.0 [8086/0000] ops

  859 12:58:46.495196  PCI: 00:00.0 [8086/9a12] enabled

  860 12:58:46.495318  PCI: 00:02.0 [8086/0000] bus ops

  861 12:58:46.495432  PCI: 00:02.0 [8086/9a40] enabled

  862 12:58:46.495536  PCI: 00:04.0 [8086/0000] bus ops

  863 12:58:46.495640  PCI: 00:04.0 [8086/9a03] enabled

  864 12:58:46.495743  PCI: 00:05.0 [8086/9a19] enabled

  865 12:58:46.495846  PCI: 00:07.0 [0000/0000] hidden

  866 12:58:46.495948  PCI: 00:08.0 [8086/9a11] enabled

  867 12:58:46.496060  PCI: 00:0a.0 [8086/9a0d] disabled

  868 12:58:46.496173  PCI: 00:0d.0 [8086/0000] bus ops

  869 12:58:46.496292  PCI: 00:0d.0 [8086/9a13] enabled

  870 12:58:46.496405  PCI: 00:14.0 [8086/0000] bus ops

  871 12:58:46.496518  PCI: 00:14.0 [8086/a0ed] enabled

  872 12:58:46.496630  PCI: 00:14.2 [8086/a0ef] enabled

  873 12:58:46.496733  PCI: 00:14.3 [8086/0000] bus ops

  874 12:58:46.496835  PCI: 00:14.3 [8086/a0f0] enabled

  875 12:58:46.496938  PCI: 00:15.0 [8086/0000] bus ops

  876 12:58:46.497039  PCI: 00:15.0 [8086/a0e8] enabled

  877 12:58:46.497141  PCI: 00:15.1 [8086/0000] bus ops

  878 12:58:46.497253  PCI: 00:15.1 [8086/a0e9] enabled

  879 12:58:46.497365  PCI: 00:15.2 [8086/0000] bus ops

  880 12:58:46.497476  PCI: 00:15.2 [8086/a0ea] enabled

  881 12:58:46.497579  PCI: 00:15.3 [8086/0000] bus ops

  882 12:58:46.497698  PCI: 00:15.3 [8086/a0eb] enabled

  883 12:58:46.497801  PCI: 00:16.0 [8086/0000] ops

  884 12:58:46.497904  PCI: 00:16.0 [8086/a0e0] enabled

  885 12:58:46.498007  PCI: Static device PCI: 00:17.0 not found, disabling it.

  886 12:58:46.498110  PCI: 00:19.0 [8086/0000] bus ops

  887 12:58:46.498221  PCI: 00:19.0 [8086/a0c5] disabled

  888 12:58:46.498324  PCI: 00:19.1 [8086/0000] bus ops

  889 12:58:46.498437  PCI: 00:19.1 [8086/a0c6] enabled

  890 12:58:46.498540  PCI: 00:1d.0 [8086/0000] bus ops

  891 12:58:46.498659  PCI: 00:1d.0 [8086/a0b0] enabled

  892 12:58:46.498761  PCI: 00:1e.0 [8086/0000] ops

  893 12:58:46.498880  PCI: 00:1e.0 [8086/a0a8] enabled

  894 12:58:46.498983  PCI: 00:1e.2 [8086/0000] bus ops

  895 12:58:46.499085  PCI: 00:1e.2 [8086/a0aa] enabled

  896 12:58:46.499187  PCI: 00:1e.3 [8086/0000] bus ops

  897 12:58:46.499301  PCI: 00:1e.3 [8086/a0ab] enabled

  898 12:58:46.499404  PCI: 00:1f.0 [8086/0000] bus ops

  899 12:58:46.499518  PCI: 00:1f.0 [8086/a087] enabled

  900 12:58:46.499621  RTC Init

  901 12:58:46.499725  Set power on after power failure.

  902 12:58:46.499840  Disabling Deep S3

  903 12:58:46.499942  Disabling Deep S3

  904 12:58:46.500045  Disabling Deep S4

  905 12:58:46.500147  Disabling Deep S4

  906 12:58:46.500258  Disabling Deep S5

  907 12:58:46.500369  Disabling Deep S5

  908 12:58:46.500481  PCI: 00:1f.2 [0000/0000] hidden

  909 12:58:46.500584  PCI: 00:1f.3 [8086/0000] bus ops

  910 12:58:46.500698  PCI: 00:1f.3 [8086/a0c8] enabled

  911 12:58:46.500811  PCI: 00:1f.5 [8086/0000] bus ops

  912 12:58:46.500917  PCI: 00:1f.5 [8086/a0a4] enabled

  913 12:58:46.501020  PCI: Leftover static devices:

  914 12:58:46.501122  PCI: 00:10.2

  915 12:58:46.501226  PCI: 00:10.6

  916 12:58:46.501328  PCI: 00:10.7

  917 12:58:46.501439  PCI: 00:06.0

  918 12:58:46.501551  PCI: 00:07.1

  919 12:58:46.501662  PCI: 00:07.2

  920 12:58:46.501764  PCI: 00:07.3

  921 12:58:46.501875  PCI: 00:09.0

  922 12:58:46.501986  PCI: 00:0d.1

  923 12:58:46.502097  PCI: 00:0d.2

  924 12:58:46.502200  PCI: 00:0d.3

  925 12:58:46.502311  PCI: 00:0e.0

  926 12:58:46.502428  PCI: 00:12.0

  927 12:58:46.502538  PCI: 00:12.6

  928 12:58:46.502641  PCI: 00:13.0

  929 12:58:46.502743  PCI: 00:14.1

  930 12:58:46.502848  PCI: 00:16.1

  931 12:58:46.502957  PCI: 00:16.2

  932 12:58:46.503059  PCI: 00:16.3

  933 12:58:46.503170  PCI: 00:16.4

  934 12:58:46.503282  PCI: 00:16.5

  935 12:58:46.503395  PCI: 00:17.0

  936 12:58:46.503498  PCI: 00:19.2

  937 12:58:46.503600  PCI: 00:1e.1

  938 12:58:46.503702  PCI: 00:1f.1

  939 12:58:46.503804  PCI: 00:1f.4

  940 12:58:46.503916  PCI: 00:1f.6

  941 12:58:46.504018  PCI: 00:1f.7

  942 12:58:46.504120  PCI: Check your devicetree.cb.

  943 12:58:46.504234  PCI: 00:02.0 scanning...

  944 12:58:46.504338  scan_generic_bus for PCI: 00:02.0

  945 12:58:46.504442  scan_generic_bus for PCI: 00:02.0 done

  946 12:58:46.504545  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

  947 12:58:46.504658  PCI: 00:04.0 scanning...

  948 12:58:46.504771  scan_generic_bus for PCI: 00:04.0

  949 12:58:46.504877  GENERIC: 0.0 enabled

  950 12:58:46.505001  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

  951 12:58:46.505115  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

  952 12:58:46.505237  PCI: 00:0d.0 scanning...

  953 12:58:46.505341  scan_static_bus for PCI: 00:0d.0

  954 12:58:46.505444  USB0 port 0 enabled

  955 12:58:46.505547  USB0 port 0 scanning...

  956 12:58:46.505649  scan_static_bus for USB0 port 0

  957 12:58:46.505751  USB3 port 0 enabled

  958 12:58:46.505853  USB3 port 1 enabled

  959 12:58:46.505965  USB3 port 2 disabled

  960 12:58:46.506067  USB3 port 3 disabled

  961 12:58:46.506169  USB3 port 0 scanning...

  962 12:58:46.506271  scan_static_bus for USB3 port 0

  963 12:58:46.506374  scan_static_bus for USB3 port 0 done

  964 12:58:46.506486  scan_bus: bus USB3 port 0 finished in 6 msecs

  965 12:58:46.506589  USB3 port 1 scanning...

  966 12:58:46.506699  scan_static_bus for USB3 port 1

  967 12:58:46.506814  scan_static_bus for USB3 port 1 done

  968 12:58:46.506927  scan_bus: bus USB3 port 1 finished in 6 msecs

  969 12:58:46.507030  scan_static_bus for USB0 port 0 done

  970 12:58:46.507132  scan_bus: bus USB0 port 0 finished in 43 msecs

  971 12:58:46.507241  scan_static_bus for PCI: 00:0d.0 done

  972 12:58:46.507324  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs

  973 12:58:46.507408  PCI: 00:14.0 scanning...

  974 12:58:46.507489  scan_static_bus for PCI: 00:14.0

  975 12:58:46.507581  USB0 port 0 enabled

  976 12:58:46.507701  USB0 port 0 scanning...

  977 12:58:46.507804  scan_static_bus for USB0 port 0

  978 12:58:46.507916  USB2 port 0 disabled

  979 12:58:46.508028  USB2 port 1 enabled

  980 12:58:46.508139  USB2 port 2 enabled

  981 12:58:46.508242  USB2 port 3 disabled

  982 12:58:46.508353  USB2 port 4 enabled

  983 12:58:46.508466  USB2 port 5 disabled

  984 12:58:46.508568  USB2 port 6 disabled

  985 12:58:46.508670  USB2 port 7 disabled

  986 12:58:46.508772  USB2 port 8 disabled

  987 12:58:46.508877  USB2 port 9 disabled

  988 12:58:46.509005  USB3 port 0 disabled

  989 12:58:46.509121  USB3 port 1 enabled

  990 12:58:46.509224  USB3 port 2 disabled

  991 12:58:46.509335  USB3 port 3 disabled

  992 12:58:46.509623  USB2 port 1 scanning...

  993 12:58:46.509727  scan_static_bus for USB2 port 1

  994 12:58:46.509832  scan_static_bus for USB2 port 1 done

  995 12:58:46.509915  scan_bus: bus USB2 port 1 finished in 6 msecs

  996 12:58:46.510019  USB2 port 2 scanning...

  997 12:58:46.510142  scan_static_bus for USB2 port 2

  998 12:58:46.510255  scan_static_bus for USB2 port 2 done

  999 12:58:46.510376  scan_bus: bus USB2 port 2 finished in 6 msecs

 1000 12:58:46.510481  USB2 port 4 scanning...

 1001 12:58:46.510585  scan_static_bus for USB2 port 4

 1002 12:58:46.510697  scan_static_bus for USB2 port 4 done

 1003 12:58:46.510801  scan_bus: bus USB2 port 4 finished in 6 msecs

 1004 12:58:46.510903  USB3 port 1 scanning...

 1005 12:58:46.511007  scan_static_bus for USB3 port 1

 1006 12:58:46.511109  scan_static_bus for USB3 port 1 done

 1007 12:58:46.511212  scan_bus: bus USB3 port 1 finished in 6 msecs

 1008 12:58:46.511340  scan_static_bus for USB0 port 0 done

 1009 12:58:46.511445  scan_bus: bus USB0 port 0 finished in 93 msecs

 1010 12:58:46.511548  scan_static_bus for PCI: 00:14.0 done

 1011 12:58:46.511662  scan_bus: bus PCI: 00:14.0 finished in 110 msecs

 1012 12:58:46.511774  PCI: 00:14.3 scanning...

 1013 12:58:46.511878  scan_static_bus for PCI: 00:14.3

 1014 12:58:46.511980  GENERIC: 0.0 enabled

 1015 12:58:46.512083  scan_static_bus for PCI: 00:14.3 done

 1016 12:58:46.512185  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

 1017 12:58:46.512288  PCI: 00:15.0 scanning...

 1018 12:58:46.512403  scan_static_bus for PCI: 00:15.0

 1019 12:58:46.512504  I2C: 00:1a enabled

 1020 12:58:46.512617  I2C: 00:31 enabled

 1021 12:58:46.512718  I2C: 00:32 enabled

 1022 12:58:46.512830  scan_static_bus for PCI: 00:15.0 done

 1023 12:58:46.512941  scan_bus: bus PCI: 00:15.0 finished in 12 msecs

 1024 12:58:46.513045  PCI: 00:15.1 scanning...

 1025 12:58:46.513155  scan_static_bus for PCI: 00:15.1

 1026 12:58:46.513264  I2C: 00:10 enabled

 1027 12:58:46.513378  scan_static_bus for PCI: 00:15.1 done

 1028 12:58:46.513482  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

 1029 12:58:46.513595  PCI: 00:15.2 scanning...

 1030 12:58:46.513699  scan_static_bus for PCI: 00:15.2

 1031 12:58:46.513812  scan_static_bus for PCI: 00:15.2 done

 1032 12:58:46.513924  scan_bus: bus PCI: 00:15.2 finished in 7 msecs

 1033 12:58:46.514027  PCI: 00:15.3 scanning...

 1034 12:58:46.514129  scan_static_bus for PCI: 00:15.3

 1035 12:58:46.514231  scan_static_bus for PCI: 00:15.3 done

 1036 12:58:46.514341  scan_bus: bus PCI: 00:15.3 finished in 7 msecs

 1037 12:58:46.514452  PCI: 00:19.1 scanning...

 1038 12:58:46.514571  scan_static_bus for PCI: 00:19.1

 1039 12:58:46.514682  I2C: 00:15 enabled

 1040 12:58:46.514793  scan_static_bus for PCI: 00:19.1 done

 1041 12:58:46.514895  scan_bus: bus PCI: 00:19.1 finished in 9 msecs

 1042 12:58:46.514997  PCI: 00:1d.0 scanning...

 1043 12:58:46.515107  do_pci_scan_bridge for PCI: 00:1d.0

 1044 12:58:46.515236  PCI: pci_scan_bus for bus 01

 1045 12:58:46.515317  PCI: 01:00.0 [1c5c/174a] enabled

 1046 12:58:46.515399  GENERIC: 0.0 enabled

 1047 12:58:46.515479  Enabling Common Clock Configuration

 1048 12:58:46.515561  L1 Sub-State supported from root port 29

 1049 12:58:46.515662  L1 Sub-State Support = 0xf

 1050 12:58:46.515764  CommonModeRestoreTime = 0x28

 1051 12:58:46.515866  Power On Value = 0x16, Power On Scale = 0x0

 1052 12:58:46.515967  ASPM: Enabled L1

 1053 12:58:46.516078  PCIe: Max_Payload_Size adjusted to 128

 1054 12:58:46.516189  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs

 1055 12:58:46.516291  PCI: 00:1e.2 scanning...

 1056 12:58:46.516402  scan_generic_bus for PCI: 00:1e.2

 1057 12:58:46.516504  SPI: 00 enabled

 1058 12:58:46.516605  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done

 1059 12:58:46.516716  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

 1060 12:58:46.516818  PCI: 00:1e.3 scanning...

 1061 12:58:46.516920  scan_generic_bus for PCI: 00:1e.3

 1062 12:58:46.517020  SPI: 00 enabled

 1063 12:58:46.517132  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1064 12:58:46.517233  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1065 12:58:46.517343  PCI: 00:1f.0 scanning...

 1066 12:58:46.517445  scan_static_bus for PCI: 00:1f.0

 1067 12:58:46.517555  PNP: 0c09.0 enabled

 1068 12:58:46.517665  PNP: 0c09.0 scanning...

 1069 12:58:46.517766  scan_static_bus for PNP: 0c09.0

 1070 12:58:46.517877  scan_static_bus for PNP: 0c09.0 done

 1071 12:58:46.517995  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1072 12:58:46.518095  scan_static_bus for PCI: 00:1f.0 done

 1073 12:58:46.518216  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1074 12:58:46.518318  PCI: 00:1f.2 scanning...

 1075 12:58:46.518418  scan_static_bus for PCI: 00:1f.2

 1076 12:58:46.518519  GENERIC: 0.0 enabled

 1077 12:58:46.518619  GENERIC: 0.0 scanning...

 1078 12:58:46.518719  scan_static_bus for GENERIC: 0.0

 1079 12:58:46.518819  GENERIC: 0.0 enabled

 1080 12:58:46.518920  GENERIC: 1.0 enabled

 1081 12:58:46.519039  scan_static_bus for GENERIC: 0.0 done

 1082 12:58:46.519141  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1083 12:58:46.519248  scan_static_bus for PCI: 00:1f.2 done

 1084 12:58:46.519350  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1085 12:58:46.519461  PCI: 00:1f.3 scanning...

 1086 12:58:46.519560  scan_static_bus for PCI: 00:1f.3

 1087 12:58:46.519680  scan_static_bus for PCI: 00:1f.3 done

 1088 12:58:46.519760  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1089 12:58:46.519857  PCI: 00:1f.5 scanning...

 1090 12:58:46.519939  scan_generic_bus for PCI: 00:1f.5

 1091 12:58:46.520040  scan_generic_bus for PCI: 00:1f.5 done

 1092 12:58:46.520143  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1093 12:58:46.520244  scan_bus: bus DOMAIN: 0000 finished in 717 msecs

 1094 12:58:46.520347  scan_static_bus for Root Device done

 1095 12:58:46.520448  scan_bus: bus Root Device finished in 737 msecs

 1096 12:58:46.520549  done

 1097 12:58:46.520650  BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms

 1098 12:58:46.520762  Chrome EC: UHEPI supported

 1099 12:58:46.520864  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)

 1100 12:58:46.520984  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1101 12:58:46.521095  SPI flash protection: WPSW=1 SRP0=0

 1102 12:58:46.521197  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1103 12:58:46.521299  BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms

 1104 12:58:46.521401  found VGA at PCI: 00:02.0

 1105 12:58:46.521512  Setting up VGA for PCI: 00:02.0

 1106 12:58:46.521832  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1107 12:58:46.521935  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1108 12:58:46.522041  Allocating resources...

 1109 12:58:46.522145  Reading resources...

 1110 12:58:46.522258  Root Device read_resources bus 0 link: 0

 1111 12:58:46.522362  DOMAIN: 0000 read_resources bus 0 link: 0

 1112 12:58:46.522465  PCI: 00:04.0 read_resources bus 1 link: 0

 1113 12:58:46.522566  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1114 12:58:46.522668  PCI: 00:0d.0 read_resources bus 0 link: 0

 1115 12:58:46.522769  USB0 port 0 read_resources bus 0 link: 0

 1116 12:58:46.522870  USB0 port 0 read_resources bus 0 link: 0 done

 1117 12:58:46.522975  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1118 12:58:46.523097  PCI: 00:14.0 read_resources bus 0 link: 0

 1119 12:58:46.523209  USB0 port 0 read_resources bus 0 link: 0

 1120 12:58:46.523319  USB0 port 0 read_resources bus 0 link: 0 done

 1121 12:58:46.523422  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1122 12:58:46.523524  PCI: 00:14.3 read_resources bus 0 link: 0

 1123 12:58:46.523625  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1124 12:58:46.523726  PCI: 00:15.0 read_resources bus 0 link: 0

 1125 12:58:46.523827  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1126 12:58:46.523928  PCI: 00:15.1 read_resources bus 0 link: 0

 1127 12:58:46.524040  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1128 12:58:46.524141  PCI: 00:19.1 read_resources bus 0 link: 0

 1129 12:58:46.524255  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1130 12:58:46.524357  PCI: 00:1d.0 read_resources bus 1 link: 0

 1131 12:58:46.524459  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1132 12:58:46.524570  PCI: 00:1e.2 read_resources bus 2 link: 0

 1133 12:58:46.524672  PCI: 00:1e.2 read_resources bus 2 link: 0 done

 1134 12:58:46.524785  PCI: 00:1e.3 read_resources bus 3 link: 0

 1135 12:58:46.524887  PCI: 00:1e.3 read_resources bus 3 link: 0 done

 1136 12:58:46.524991  PCI: 00:1f.0 read_resources bus 0 link: 0

 1137 12:58:46.525110  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1138 12:58:46.525212  PCI: 00:1f.2 read_resources bus 0 link: 0

 1139 12:58:46.525323  GENERIC: 0.0 read_resources bus 0 link: 0

 1140 12:58:46.525437  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1141 12:58:46.525537  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1142 12:58:46.525648  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1143 12:58:46.525758  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1144 12:58:46.525859  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1145 12:58:46.525960  Root Device read_resources bus 0 link: 0 done

 1146 12:58:46.526070  Done reading resources.

 1147 12:58:46.526171  Show resources in subtree (Root Device)...After reading.

 1148 12:58:46.526281   Root Device child on link 0 DOMAIN: 0000

 1149 12:58:46.526400    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1150 12:58:46.526502    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1151 12:58:46.526604    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1152 12:58:46.526706     PCI: 00:00.0

 1153 12:58:46.526808     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1154 12:58:46.526930     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1155 12:58:46.527047     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1156 12:58:46.527150     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1157 12:58:46.527281     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1158 12:58:46.527392     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1159 12:58:46.527495     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1160 12:58:46.527597     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1161 12:58:46.527709     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1162 12:58:46.527811     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1163 12:58:46.527913     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1164 12:58:46.528025     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1165 12:58:46.528125     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1166 12:58:46.528236     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1167 12:58:46.528346     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1168 12:58:46.528458     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1169 12:58:46.528561     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1170 12:58:46.528664     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1171 12:58:46.528766     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1172 12:58:46.529063     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1173 12:58:46.529166     PCI: 00:02.0

 1174 12:58:46.529280     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1175 12:58:46.529394     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1176 12:58:46.529499     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1177 12:58:46.529611     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1178 12:58:46.529714     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1179 12:58:46.529816      GENERIC: 0.0

 1180 12:58:46.529928     PCI: 00:05.0

 1181 12:58:46.530031     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1182 12:58:46.530142     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1183 12:58:46.530253      GENERIC: 0.0

 1184 12:58:46.530354     PCI: 00:08.0

 1185 12:58:46.530455     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1186 12:58:46.530557     PCI: 00:0a.0

 1187 12:58:46.530658     PCI: 00:0d.0 child on link 0 USB0 port 0

 1188 12:58:46.530760     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1189 12:58:46.530872      USB0 port 0 child on link 0 USB3 port 0

 1190 12:58:46.530978       USB3 port 0

 1191 12:58:46.531090       USB3 port 1

 1192 12:58:46.531217       USB3 port 2

 1193 12:58:46.531331       USB3 port 3

 1194 12:58:46.531432     PCI: 00:14.0 child on link 0 USB0 port 0

 1195 12:58:46.531534     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1196 12:58:46.531637      USB0 port 0 child on link 0 USB2 port 0

 1197 12:58:46.531738       USB2 port 0

 1198 12:58:46.531839       USB2 port 1

 1199 12:58:46.531940       USB2 port 2

 1200 12:58:46.532050       USB2 port 3

 1201 12:58:46.532160       USB2 port 4

 1202 12:58:46.532261       USB2 port 5

 1203 12:58:46.532371       USB2 port 6

 1204 12:58:46.532491       USB2 port 7

 1205 12:58:46.532590       USB2 port 8

 1206 12:58:46.532700       USB2 port 9

 1207 12:58:46.532810       USB3 port 0

 1208 12:58:46.532919       USB3 port 1

 1209 12:58:46.533033       USB3 port 2

 1210 12:58:46.533141       USB3 port 3

 1211 12:58:46.533241     PCI: 00:14.2

 1212 12:58:46.533342     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1213 12:58:46.533454     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1214 12:58:46.533565     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1215 12:58:46.533677     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1216 12:58:46.533789      GENERIC: 0.0

 1217 12:58:46.533891     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1218 12:58:46.533993     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1219 12:58:46.534094      I2C: 00:1a

 1220 12:58:46.534194      I2C: 00:31

 1221 12:58:46.534295      I2C: 00:32

 1222 12:58:46.534423     PCI: 00:15.1 child on link 0 I2C: 00:10

 1223 12:58:46.539905     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1224 12:58:46.543504      I2C: 00:10

 1225 12:58:46.543600     PCI: 00:15.2

 1226 12:58:46.553255     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1227 12:58:46.556854     PCI: 00:15.3

 1228 12:58:46.567107     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1229 12:58:46.567717     PCI: 00:16.0

 1230 12:58:46.576547     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1231 12:58:46.580225     PCI: 00:19.0

 1232 12:58:46.583726     PCI: 00:19.1 child on link 0 I2C: 00:15

 1233 12:58:46.593251     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1234 12:58:46.593747      I2C: 00:15

 1235 12:58:46.599963     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1236 12:58:46.606522     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1237 12:58:46.616236     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1238 12:58:46.626509     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1239 12:58:46.629418      GENERIC: 0.0

 1240 12:58:46.629569      PCI: 01:00.0

 1241 12:58:46.639755      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1242 12:58:46.649110      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18

 1243 12:58:46.659102      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c

 1244 12:58:46.659196     PCI: 00:1e.0

 1245 12:58:46.672455     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1246 12:58:46.675574     PCI: 00:1e.2 child on link 0 SPI: 00

 1247 12:58:46.685893     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1248 12:58:46.685987      SPI: 00

 1249 12:58:46.689021     PCI: 00:1e.3 child on link 0 SPI: 00

 1250 12:58:46.699070     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1251 12:58:46.702210      SPI: 00

 1252 12:58:46.705807     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1253 12:58:46.715397     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1254 12:58:46.715491      PNP: 0c09.0

 1255 12:58:46.725151      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1256 12:58:46.729126     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1257 12:58:46.738965     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1258 12:58:46.748664     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1259 12:58:46.751770      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1260 12:58:46.755118       GENERIC: 0.0

 1261 12:58:46.755211       GENERIC: 1.0

 1262 12:58:46.758569     PCI: 00:1f.3

 1263 12:58:46.768758     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1264 12:58:46.778906     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1265 12:58:46.779009     PCI: 00:1f.5

 1266 12:58:46.788314     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1267 12:58:46.791560    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1268 12:58:46.795321     APIC: 00

 1269 12:58:46.795412     APIC: 01

 1270 12:58:46.798274     APIC: 02

 1271 12:58:46.798365     APIC: 05

 1272 12:58:46.798438     APIC: 07

 1273 12:58:46.801589     APIC: 06

 1274 12:58:46.801718     APIC: 03

 1275 12:58:46.805150     APIC: 04

 1276 12:58:46.811944  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1277 12:58:46.818637   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1278 12:58:46.821634   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1279 12:58:46.828582   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1280 12:58:46.831467    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1281 12:58:46.838906    PCI: 01:00.0 18 *  [0x4000 - 0x4fff] mem

 1282 12:58:46.841391    PCI: 01:00.0 1c *  [0x5000 - 0x5fff] mem

 1283 12:58:46.848465   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1284 12:58:46.855184   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1285 12:58:46.864804   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1286 12:58:46.871861  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1287 12:58:46.878655  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1288 12:58:46.885180   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1289 12:58:46.891807   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1290 12:58:46.901525   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1291 12:58:46.905067   DOMAIN: 0000: Resource ranges:

 1292 12:58:46.908277   * Base: 1000, Size: 800, Tag: 100

 1293 12:58:46.911681   * Base: 1900, Size: e700, Tag: 100

 1294 12:58:46.914788    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1295 12:58:46.921826  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1296 12:58:46.928270  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1297 12:58:46.937992   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)

 1298 12:58:46.944798   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)

 1299 12:58:46.951150   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 1300 12:58:46.960981   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 1301 12:58:46.967340   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)

 1302 12:58:46.974278   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 1303 12:58:46.984522   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)

 1304 12:58:46.990854   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)

 1305 12:58:46.997903   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)

 1306 12:58:47.007547   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)

 1307 12:58:47.014384   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)

 1308 12:58:47.020827   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)

 1309 12:58:47.031292   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)

 1310 12:58:47.037544   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)

 1311 12:58:47.044353   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)

 1312 12:58:47.054050   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)

 1313 12:58:47.060563   update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)

 1314 12:58:47.067699   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)

 1315 12:58:47.077316   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)

 1316 12:58:47.083714   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)

 1317 12:58:47.090294   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1318 12:58:47.100128   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1319 12:58:47.103637   DOMAIN: 0000: Resource ranges:

 1320 12:58:47.107016   * Base: 7fc00000, Size: 40400000, Tag: 200

 1321 12:58:47.110331   * Base: d0000000, Size: 28000000, Tag: 200

 1322 12:58:47.116683   * Base: fa000000, Size: 1000000, Tag: 200

 1323 12:58:47.120122   * Base: fb001000, Size: 2fff000, Tag: 200

 1324 12:58:47.123961   * Base: fe010000, Size: 2e000, Tag: 200

 1325 12:58:47.127202   * Base: fe03f000, Size: d41000, Tag: 200

 1326 12:58:47.133789   * Base: fed88000, Size: 8000, Tag: 200

 1327 12:58:47.136863   * Base: fed93000, Size: d000, Tag: 200

 1328 12:58:47.140552   * Base: feda2000, Size: 1e000, Tag: 200

 1329 12:58:47.144033   * Base: fede0000, Size: 1220000, Tag: 200

 1330 12:58:47.150882   * Base: 280400000, Size: 7d7fc00000, Tag: 100200

 1331 12:58:47.157078    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem

 1332 12:58:47.163630    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem

 1333 12:58:47.170410    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem

 1334 12:58:47.176790    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem

 1335 12:58:47.183792    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem

 1336 12:58:47.190283    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem

 1337 12:58:47.196766    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem

 1338 12:58:47.203557    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem

 1339 12:58:47.210297    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem

 1340 12:58:47.217289    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem

 1341 12:58:47.223427    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem

 1342 12:58:47.229972    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem

 1343 12:58:47.237262    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem

 1344 12:58:47.243265    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem

 1345 12:58:47.250258    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem

 1346 12:58:47.257080    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem

 1347 12:58:47.263475    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem

 1348 12:58:47.270283    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem

 1349 12:58:47.276409    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem

 1350 12:58:47.283036    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem

 1351 12:58:47.289448    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem

 1352 12:58:47.296332    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem

 1353 12:58:47.303448  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1354 12:58:47.309626  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff

 1355 12:58:47.312993   PCI: 00:1d.0: Resource ranges:

 1356 12:58:47.319794   * Base: 7fc00000, Size: 100000, Tag: 200

 1357 12:58:47.326192    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem

 1358 12:58:47.332684    PCI: 01:00.0 18 *  [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem

 1359 12:58:47.339420    PCI: 01:00.0 1c *  [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem

 1360 12:58:47.346045  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done

 1361 12:58:47.352879  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1362 12:58:47.359149  Root Device assign_resources, bus 0 link: 0

 1363 12:58:47.362487  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1364 12:58:47.372993  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64

 1365 12:58:47.379014  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64

 1366 12:58:47.388865  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1367 12:58:47.395792  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64

 1368 12:58:47.399057  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1369 12:58:47.405913  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1370 12:58:47.412820  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64

 1371 12:58:47.422162  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64

 1372 12:58:47.429012  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64

 1373 12:58:47.435642  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1374 12:58:47.439085  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1375 12:58:47.448881  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64

 1376 12:58:47.452310  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1377 12:58:47.455731  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1378 12:58:47.465756  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64

 1379 12:58:47.472620  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64

 1380 12:58:47.482278  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64

 1381 12:58:47.485683  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1382 12:58:47.492051  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1383 12:58:47.498966  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64

 1384 12:58:47.502148  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1385 12:58:47.508868  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1386 12:58:47.515588  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64

 1387 12:58:47.522452  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1388 12:58:47.525421  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1389 12:58:47.535136  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64

 1390 12:58:47.542121  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64

 1391 12:58:47.548617  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64

 1392 12:58:47.559030  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64

 1393 12:58:47.562052  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1394 12:58:47.568930  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1395 12:58:47.575495  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1396 12:58:47.585631  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1397 12:58:47.595670  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem

 1398 12:58:47.598884  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1399 12:58:47.608619  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64

 1400 12:58:47.615277  PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem

 1401 12:58:47.621821  PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem

 1402 12:58:47.628743  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1403 12:58:47.635527  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64

 1404 12:58:47.642019  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1405 12:58:47.645346  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1406 12:58:47.655021  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64

 1407 12:58:47.658300  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1408 12:58:47.661887  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1409 12:58:47.668359  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1410 12:58:47.671675  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1411 12:58:47.678064  LPC: Trying to open IO window from 800 size 1ff

 1412 12:58:47.684873  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64

 1413 12:58:47.695396  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64

 1414 12:58:47.701810  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem

 1415 12:58:47.708058  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1416 12:58:47.711628  Root Device assign_resources, bus 0 link: 0

 1417 12:58:47.714892  Done setting resources.

 1418 12:58:47.721395  Show resources in subtree (Root Device)...After assigning values.

 1419 12:58:47.724559   Root Device child on link 0 DOMAIN: 0000

 1420 12:58:47.728220    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1421 12:58:47.738584    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1422 12:58:47.748251    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1423 12:58:47.751341     PCI: 00:00.0

 1424 12:58:47.758148     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1425 12:58:47.768301     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1426 12:58:47.778244     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1427 12:58:47.788340     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1428 12:58:47.798289     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1429 12:58:47.808007     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1430 12:58:47.814637     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1431 12:58:47.824996     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1432 12:58:47.834637     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1433 12:58:47.844864     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1434 12:58:47.854846     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1435 12:58:47.864295     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1436 12:58:47.870482     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1437 12:58:47.880778     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1438 12:58:47.891002     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1439 12:58:47.900983     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1440 12:58:47.910224     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1441 12:58:47.920335     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1442 12:58:47.927373     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1443 12:58:47.937007     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1444 12:58:47.940482     PCI: 00:02.0

 1445 12:58:47.950271     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10

 1446 12:58:47.960204     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18

 1447 12:58:47.970265     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1448 12:58:47.973521     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1449 12:58:47.986880     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10

 1450 12:58:47.987462      GENERIC: 0.0

 1451 12:58:47.989695     PCI: 00:05.0

 1452 12:58:48.000064     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10

 1453 12:58:48.003127     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1454 12:58:48.006749      GENERIC: 0.0

 1455 12:58:48.007423     PCI: 00:08.0

 1456 12:58:48.016679     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10

 1457 12:58:48.020067     PCI: 00:0a.0

 1458 12:58:48.023388     PCI: 00:0d.0 child on link 0 USB0 port 0

 1459 12:58:48.033043     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10

 1460 12:58:48.040216      USB0 port 0 child on link 0 USB3 port 0

 1461 12:58:48.040738       USB3 port 0

 1462 12:58:48.043152       USB3 port 1

 1463 12:58:48.043586       USB3 port 2

 1464 12:58:48.046788       USB3 port 3

 1465 12:58:48.050191     PCI: 00:14.0 child on link 0 USB0 port 0

 1466 12:58:48.060118     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10

 1467 12:58:48.066775      USB0 port 0 child on link 0 USB2 port 0

 1468 12:58:48.067340       USB2 port 0

 1469 12:58:48.069988       USB2 port 1

 1470 12:58:48.070508       USB2 port 2

 1471 12:58:48.073202       USB2 port 3

 1472 12:58:48.073617       USB2 port 4

 1473 12:58:48.076154       USB2 port 5

 1474 12:58:48.076570       USB2 port 6

 1475 12:58:48.079416       USB2 port 7

 1476 12:58:48.079831       USB2 port 8

 1477 12:58:48.082905       USB2 port 9

 1478 12:58:48.083394       USB3 port 0

 1479 12:58:48.086699       USB3 port 1

 1480 12:58:48.087135       USB3 port 2

 1481 12:58:48.090103       USB3 port 3

 1482 12:58:48.090619     PCI: 00:14.2

 1483 12:58:48.103211     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10

 1484 12:58:48.113367     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18

 1485 12:58:48.115988     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1486 12:58:48.126842     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10

 1487 12:58:48.130155      GENERIC: 0.0

 1488 12:58:48.133189     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1489 12:58:48.142559     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10

 1490 12:58:48.146257      I2C: 00:1a

 1491 12:58:48.146783      I2C: 00:31

 1492 12:58:48.149681      I2C: 00:32

 1493 12:58:48.152875     PCI: 00:15.1 child on link 0 I2C: 00:10

 1494 12:58:48.162814     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10

 1495 12:58:48.163376      I2C: 00:10

 1496 12:58:48.166436     PCI: 00:15.2

 1497 12:58:48.175849     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10

 1498 12:58:48.179262     PCI: 00:15.3

 1499 12:58:48.189113     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10

 1500 12:58:48.189541     PCI: 00:16.0

 1501 12:58:48.199522     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10

 1502 12:58:48.202595     PCI: 00:19.0

 1503 12:58:48.205921     PCI: 00:19.1 child on link 0 I2C: 00:15

 1504 12:58:48.216024     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10

 1505 12:58:48.219302      I2C: 00:15

 1506 12:58:48.222750     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1507 12:58:48.233098     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1508 12:58:48.242697     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1509 12:58:48.252256     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20

 1510 12:58:48.255698      GENERIC: 0.0

 1511 12:58:48.259200      PCI: 01:00.0

 1512 12:58:48.268844      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10

 1513 12:58:48.279346      PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18

 1514 12:58:48.289201      PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c

 1515 12:58:48.289627     PCI: 00:1e.0

 1516 12:58:48.302153     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1517 12:58:48.305773     PCI: 00:1e.2 child on link 0 SPI: 00

 1518 12:58:48.315284     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10

 1519 12:58:48.315753      SPI: 00

 1520 12:58:48.322276     PCI: 00:1e.3 child on link 0 SPI: 00

 1521 12:58:48.332262     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10

 1522 12:58:48.332688      SPI: 00

 1523 12:58:48.338678     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1524 12:58:48.345587     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1525 12:58:48.349392      PNP: 0c09.0

 1526 12:58:48.355215      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1527 12:58:48.362107     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1528 12:58:48.368826     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1529 12:58:48.378848     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1530 12:58:48.385402      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1531 12:58:48.385887       GENERIC: 0.0

 1532 12:58:48.389152       GENERIC: 1.0

 1533 12:58:48.389711     PCI: 00:1f.3

 1534 12:58:48.398501     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10

 1535 12:58:48.411578     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20

 1536 12:58:48.412017     PCI: 00:1f.5

 1537 12:58:48.421826     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10

 1538 12:58:48.425067    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1539 12:58:48.428591     APIC: 00

 1540 12:58:48.429020     APIC: 01

 1541 12:58:48.431756     APIC: 02

 1542 12:58:48.432264     APIC: 05

 1543 12:58:48.432601     APIC: 07

 1544 12:58:48.435255     APIC: 06

 1545 12:58:48.435729     APIC: 03

 1546 12:58:48.436138     APIC: 04

 1547 12:58:48.438228  Done allocating resources.

 1548 12:58:48.445557  BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms

 1549 12:58:48.451846  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

 1550 12:58:48.454732  Configure GPIOs for I2S audio on UP4.

 1551 12:58:48.461858  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms

 1552 12:58:48.465165  Enabling resources...

 1553 12:58:48.468678  PCI: 00:00.0 subsystem <- 8086/9a12

 1554 12:58:48.471704  PCI: 00:00.0 cmd <- 06

 1555 12:58:48.474834  PCI: 00:02.0 subsystem <- 8086/9a40

 1556 12:58:48.478214  PCI: 00:02.0 cmd <- 03

 1557 12:58:48.482426  PCI: 00:04.0 subsystem <- 8086/9a03

 1558 12:58:48.482933  PCI: 00:04.0 cmd <- 02

 1559 12:58:48.488783  PCI: 00:05.0 subsystem <- 8086/9a19

 1560 12:58:48.489338  PCI: 00:05.0 cmd <- 02

 1561 12:58:48.491953  PCI: 00:08.0 subsystem <- 8086/9a11

 1562 12:58:48.495530  PCI: 00:08.0 cmd <- 06

 1563 12:58:48.499074  PCI: 00:0d.0 subsystem <- 8086/9a13

 1564 12:58:48.502026  PCI: 00:0d.0 cmd <- 02

 1565 12:58:48.505305  PCI: 00:14.0 subsystem <- 8086/a0ed

 1566 12:58:48.508709  PCI: 00:14.0 cmd <- 02

 1567 12:58:48.512188  PCI: 00:14.2 subsystem <- 8086/a0ef

 1568 12:58:48.515277  PCI: 00:14.2 cmd <- 02

 1569 12:58:48.518529  PCI: 00:14.3 subsystem <- 8086/a0f0

 1570 12:58:48.521891  PCI: 00:14.3 cmd <- 02

 1571 12:58:48.525376  PCI: 00:15.0 subsystem <- 8086/a0e8

 1572 12:58:48.525927  PCI: 00:15.0 cmd <- 02

 1573 12:58:48.532349  PCI: 00:15.1 subsystem <- 8086/a0e9

 1574 12:58:48.532895  PCI: 00:15.1 cmd <- 02

 1575 12:58:48.535495  PCI: 00:15.2 subsystem <- 8086/a0ea

 1576 12:58:48.538914  PCI: 00:15.2 cmd <- 02

 1577 12:58:48.542406  PCI: 00:15.3 subsystem <- 8086/a0eb

 1578 12:58:48.545317  PCI: 00:15.3 cmd <- 02

 1579 12:58:48.548704  PCI: 00:16.0 subsystem <- 8086/a0e0

 1580 12:58:48.552200  PCI: 00:16.0 cmd <- 02

 1581 12:58:48.555606  PCI: 00:19.1 subsystem <- 8086/a0c6

 1582 12:58:48.559211  PCI: 00:19.1 cmd <- 02

 1583 12:58:48.561947  PCI: 00:1d.0 bridge ctrl <- 0013

 1584 12:58:48.565574  PCI: 00:1d.0 subsystem <- 8086/a0b0

 1585 12:58:48.569092  PCI: 00:1d.0 cmd <- 06

 1586 12:58:48.571842  PCI: 00:1e.0 subsystem <- 8086/a0a8

 1587 12:58:48.572266  PCI: 00:1e.0 cmd <- 06

 1588 12:58:48.578575  PCI: 00:1e.2 subsystem <- 8086/a0aa

 1589 12:58:48.579004  PCI: 00:1e.2 cmd <- 06

 1590 12:58:48.582293  PCI: 00:1e.3 subsystem <- 8086/a0ab

 1591 12:58:48.585424  PCI: 00:1e.3 cmd <- 02

 1592 12:58:48.588720  PCI: 00:1f.0 subsystem <- 8086/a087

 1593 12:58:48.592129  PCI: 00:1f.0 cmd <- 407

 1594 12:58:48.595666  PCI: 00:1f.3 subsystem <- 8086/a0c8

 1595 12:58:48.598430  PCI: 00:1f.3 cmd <- 02

 1596 12:58:48.602110  PCI: 00:1f.5 subsystem <- 8086/a0a4

 1597 12:58:48.605681  PCI: 00:1f.5 cmd <- 406

 1598 12:58:48.609429  PCI: 01:00.0 cmd <- 02

 1599 12:58:48.614133  done.

 1600 12:58:48.616809  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms

 1601 12:58:48.620239  Initializing devices...

 1602 12:58:48.623662  Root Device init

 1603 12:58:48.627034  Chrome EC: Set SMI mask to 0x0000000000000000

 1604 12:58:48.633186  Chrome EC: clear events_b mask to 0x0000000000000000

 1605 12:58:48.639872  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1606 12:58:48.646991  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e

 1607 12:58:48.650019  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e

 1608 12:58:48.656520  Chrome EC: Set WAKE mask to 0x0000000000000000

 1609 12:58:48.663048  fw_config match found: DB_USB=USB3_ACTIVE

 1610 12:58:48.666719  Configure Right Type-C port orientation for retimer

 1611 12:58:48.669642  Root Device init finished in 43 msecs

 1612 12:58:48.673047  PCI: 00:00.0 init

 1613 12:58:48.676584  CPU TDP = 9 Watts

 1614 12:58:48.677012  CPU PL1 = 9 Watts

 1615 12:58:48.679563  CPU PL2 = 40 Watts

 1616 12:58:48.683133  CPU PL4 = 83 Watts

 1617 12:58:48.686979  PCI: 00:00.0 init finished in 8 msecs

 1618 12:58:48.687589  PCI: 00:02.0 init

 1619 12:58:48.690076  GMA: Found VBT in CBFS

 1620 12:58:48.693287  GMA: Found valid VBT in CBFS

 1621 12:58:48.699757  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1622 12:58:48.706415                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000

 1623 12:58:48.709520  PCI: 00:02.0 init finished in 18 msecs

 1624 12:58:48.713030  PCI: 00:05.0 init

 1625 12:58:48.716367  PCI: 00:05.0 init finished in 0 msecs

 1626 12:58:48.719512  PCI: 00:08.0 init

 1627 12:58:48.722821  PCI: 00:08.0 init finished in 0 msecs

 1628 12:58:48.726389  PCI: 00:14.0 init

 1629 12:58:48.729684  PCI: 00:14.0 init finished in 0 msecs

 1630 12:58:48.733382  PCI: 00:14.2 init

 1631 12:58:48.736128  PCI: 00:14.2 init finished in 0 msecs

 1632 12:58:48.739478  PCI: 00:15.0 init

 1633 12:58:48.739938  I2C bus 0 version 0x3230302a

 1634 12:58:48.746355  DW I2C bus 0 at 0x7fe4e000 (400 KHz)

 1635 12:58:48.749691  PCI: 00:15.0 init finished in 6 msecs

 1636 12:58:48.750157  PCI: 00:15.1 init

 1637 12:58:48.752940  I2C bus 1 version 0x3230302a

 1638 12:58:48.756277  DW I2C bus 1 at 0x7fe4f000 (400 KHz)

 1639 12:58:48.762564  PCI: 00:15.1 init finished in 6 msecs

 1640 12:58:48.762988  PCI: 00:15.2 init

 1641 12:58:48.765986  I2C bus 2 version 0x3230302a

 1642 12:58:48.769501  DW I2C bus 2 at 0x7fe50000 (400 KHz)

 1643 12:58:48.772754  PCI: 00:15.2 init finished in 6 msecs

 1644 12:58:48.775807  PCI: 00:15.3 init

 1645 12:58:48.779042  I2C bus 3 version 0x3230302a

 1646 12:58:48.782622  DW I2C bus 3 at 0x7fe51000 (400 KHz)

 1647 12:58:48.786303  PCI: 00:15.3 init finished in 6 msecs

 1648 12:58:48.788921  PCI: 00:16.0 init

 1649 12:58:48.792704  PCI: 00:16.0 init finished in 0 msecs

 1650 12:58:48.795440  PCI: 00:19.1 init

 1651 12:58:48.798703  I2C bus 5 version 0x3230302a

 1652 12:58:48.802309  DW I2C bus 5 at 0x7fe53000 (400 KHz)

 1653 12:58:48.805885  PCI: 00:19.1 init finished in 6 msecs

 1654 12:58:48.808927  PCI: 00:1d.0 init

 1655 12:58:48.809391  Initializing PCH PCIe bridge.

 1656 12:58:48.815690  PCI: 00:1d.0 init finished in 3 msecs

 1657 12:58:48.818767  PCI: 00:1f.0 init

 1658 12:58:48.822069  IOAPIC: Initializing IOAPIC at 0xfec00000

 1659 12:58:48.825596  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1660 12:58:48.829040  IOAPIC: ID = 0x02

 1661 12:58:48.832602  IOAPIC: Dumping registers

 1662 12:58:48.833063    reg 0x0000: 0x02000000

 1663 12:58:48.835581    reg 0x0001: 0x00770020

 1664 12:58:48.838726    reg 0x0002: 0x00000000

 1665 12:58:48.842095  PCI: 00:1f.0 init finished in 21 msecs

 1666 12:58:48.845770  PCI: 00:1f.2 init

 1667 12:58:48.849204  Disabling ACPI via APMC.

 1668 12:58:48.849595  APMC done.

 1669 12:58:48.852394  PCI: 00:1f.2 init finished in 5 msecs

 1670 12:58:48.866039  PCI: 01:00.0 init

 1671 12:58:48.868958  PCI: 01:00.0 init finished in 0 msecs

 1672 12:58:48.872258  PNP: 0c09.0 init

 1673 12:58:48.875893  Google Chrome EC uptime: 10.110 seconds

 1674 12:58:48.882166  Google Chrome AP resets since EC boot: 0

 1675 12:58:48.885678  Google Chrome most recent AP reset causes:

 1676 12:58:48.892119  Google Chrome EC reset flags at last EC boot: reset-pin | hard

 1677 12:58:48.895593  PNP: 0c09.0 init finished in 19 msecs

 1678 12:58:48.900834  Devices initialized

 1679 12:58:48.904131  Show all devs... After init.

 1680 12:58:48.907064  Root Device: enabled 1

 1681 12:58:48.907512  DOMAIN: 0000: enabled 1

 1682 12:58:48.910804  CPU_CLUSTER: 0: enabled 1

 1683 12:58:48.914180  PCI: 00:00.0: enabled 1

 1684 12:58:48.917091  PCI: 00:02.0: enabled 1

 1685 12:58:48.917510  PCI: 00:04.0: enabled 1

 1686 12:58:48.920512  PCI: 00:05.0: enabled 1

 1687 12:58:48.923866  PCI: 00:06.0: enabled 0

 1688 12:58:48.927131  PCI: 00:07.0: enabled 0

 1689 12:58:48.927605  PCI: 00:07.1: enabled 0

 1690 12:58:48.930874  PCI: 00:07.2: enabled 0

 1691 12:58:48.933788  PCI: 00:07.3: enabled 0

 1692 12:58:48.937045  PCI: 00:08.0: enabled 1

 1693 12:58:48.937469  PCI: 00:09.0: enabled 0

 1694 12:58:48.940592  PCI: 00:0a.0: enabled 0

 1695 12:58:48.944087  PCI: 00:0d.0: enabled 1

 1696 12:58:48.946869  PCI: 00:0d.1: enabled 0

 1697 12:58:48.947312  PCI: 00:0d.2: enabled 0

 1698 12:58:48.950665  PCI: 00:0d.3: enabled 0

 1699 12:58:48.954050  PCI: 00:0e.0: enabled 0

 1700 12:58:48.954442  PCI: 00:10.2: enabled 1

 1701 12:58:48.956826  PCI: 00:10.6: enabled 0

 1702 12:58:48.960965  PCI: 00:10.7: enabled 0

 1703 12:58:48.963546  PCI: 00:12.0: enabled 0

 1704 12:58:48.964009  PCI: 00:12.6: enabled 0

 1705 12:58:48.967001  PCI: 00:13.0: enabled 0

 1706 12:58:48.970555  PCI: 00:14.0: enabled 1

 1707 12:58:48.973688  PCI: 00:14.1: enabled 0

 1708 12:58:48.974151  PCI: 00:14.2: enabled 1

 1709 12:58:48.977140  PCI: 00:14.3: enabled 1

 1710 12:58:48.980144  PCI: 00:15.0: enabled 1

 1711 12:58:48.983442  PCI: 00:15.1: enabled 1

 1712 12:58:48.983868  PCI: 00:15.2: enabled 1

 1713 12:58:48.986911  PCI: 00:15.3: enabled 1

 1714 12:58:48.990436  PCI: 00:16.0: enabled 1

 1715 12:58:48.993610  PCI: 00:16.1: enabled 0

 1716 12:58:48.994126  PCI: 00:16.2: enabled 0

 1717 12:58:48.997530  PCI: 00:16.3: enabled 0

 1718 12:58:49.000163  PCI: 00:16.4: enabled 0

 1719 12:58:49.000626  PCI: 00:16.5: enabled 0

 1720 12:58:49.003577  PCI: 00:17.0: enabled 0

 1721 12:58:49.006950  PCI: 00:19.0: enabled 0

 1722 12:58:49.010036  PCI: 00:19.1: enabled 1

 1723 12:58:49.010462  PCI: 00:19.2: enabled 0

 1724 12:58:49.013582  PCI: 00:1c.0: enabled 1

 1725 12:58:49.017094  PCI: 00:1c.1: enabled 0

 1726 12:58:49.019935  PCI: 00:1c.2: enabled 0

 1727 12:58:49.020359  PCI: 00:1c.3: enabled 0

 1728 12:58:49.023652  PCI: 00:1c.4: enabled 0

 1729 12:58:49.026841  PCI: 00:1c.5: enabled 0

 1730 12:58:49.030599  PCI: 00:1c.6: enabled 1

 1731 12:58:49.031025  PCI: 00:1c.7: enabled 0

 1732 12:58:49.033160  PCI: 00:1d.0: enabled 1

 1733 12:58:49.036635  PCI: 00:1d.1: enabled 0

 1734 12:58:49.037096  PCI: 00:1d.2: enabled 1

 1735 12:58:49.039940  PCI: 00:1d.3: enabled 0

 1736 12:58:49.043311  PCI: 00:1e.0: enabled 1

 1737 12:58:49.046676  PCI: 00:1e.1: enabled 0

 1738 12:58:49.047065  PCI: 00:1e.2: enabled 1

 1739 12:58:49.050196  PCI: 00:1e.3: enabled 1

 1740 12:58:49.053317  PCI: 00:1f.0: enabled 1

 1741 12:58:49.056564  PCI: 00:1f.1: enabled 0

 1742 12:58:49.056994  PCI: 00:1f.2: enabled 1

 1743 12:58:49.059990  PCI: 00:1f.3: enabled 1

 1744 12:58:49.063371  PCI: 00:1f.4: enabled 0

 1745 12:58:49.066732  PCI: 00:1f.5: enabled 1

 1746 12:58:49.067248  PCI: 00:1f.6: enabled 0

 1747 12:58:49.070069  PCI: 00:1f.7: enabled 0

 1748 12:58:49.073483  APIC: 00: enabled 1

 1749 12:58:49.073962  GENERIC: 0.0: enabled 1

 1750 12:58:49.076319  GENERIC: 0.0: enabled 1

 1751 12:58:49.079632  GENERIC: 1.0: enabled 1

 1752 12:58:49.083340  GENERIC: 0.0: enabled 1

 1753 12:58:49.083756  GENERIC: 1.0: enabled 1

 1754 12:58:49.086363  USB0 port 0: enabled 1

 1755 12:58:49.089563  GENERIC: 0.0: enabled 1

 1756 12:58:49.089986  USB0 port 0: enabled 1

 1757 12:58:49.092988  GENERIC: 0.0: enabled 1

 1758 12:58:49.096696  I2C: 00:1a: enabled 1

 1759 12:58:49.099963  I2C: 00:31: enabled 1

 1760 12:58:49.100345  I2C: 00:32: enabled 1

 1761 12:58:49.103313  I2C: 00:10: enabled 1

 1762 12:58:49.106533  I2C: 00:15: enabled 1

 1763 12:58:49.106625  GENERIC: 0.0: enabled 0

 1764 12:58:49.109337  GENERIC: 1.0: enabled 0

 1765 12:58:49.112928  GENERIC: 0.0: enabled 1

 1766 12:58:49.113020  SPI: 00: enabled 1

 1767 12:58:49.116279  SPI: 00: enabled 1

 1768 12:58:49.119441  PNP: 0c09.0: enabled 1

 1769 12:58:49.119532  GENERIC: 0.0: enabled 1

 1770 12:58:49.122943  USB3 port 0: enabled 1

 1771 12:58:49.125839  USB3 port 1: enabled 1

 1772 12:58:49.129663  USB3 port 2: enabled 0

 1773 12:58:49.129754  USB3 port 3: enabled 0

 1774 12:58:49.132706  USB2 port 0: enabled 0

 1775 12:58:49.136302  USB2 port 1: enabled 1

 1776 12:58:49.136478  USB2 port 2: enabled 1

 1777 12:58:49.139416  USB2 port 3: enabled 0

 1778 12:58:49.142511  USB2 port 4: enabled 1

 1779 12:58:49.142661  USB2 port 5: enabled 0

 1780 12:58:49.146226  USB2 port 6: enabled 0

 1781 12:58:49.149698  USB2 port 7: enabled 0

 1782 12:58:49.152997  USB2 port 8: enabled 0

 1783 12:58:49.153196  USB2 port 9: enabled 0

 1784 12:58:49.156400  USB3 port 0: enabled 0

 1785 12:58:49.159166  USB3 port 1: enabled 1

 1786 12:58:49.159389  USB3 port 2: enabled 0

 1787 12:58:49.162501  USB3 port 3: enabled 0

 1788 12:58:49.166067  GENERIC: 0.0: enabled 1

 1789 12:58:49.169364  GENERIC: 1.0: enabled 1

 1790 12:58:49.169556  APIC: 01: enabled 1

 1791 12:58:49.173040  APIC: 02: enabled 1

 1792 12:58:49.173265  APIC: 05: enabled 1

 1793 12:58:49.175933  APIC: 07: enabled 1

 1794 12:58:49.179532  APIC: 06: enabled 1

 1795 12:58:49.179818  APIC: 03: enabled 1

 1796 12:58:49.182536  APIC: 04: enabled 1

 1797 12:58:49.186326  PCI: 01:00.0: enabled 1

 1798 12:58:49.189596  BS: BS_DEV_INIT run times (exec / console): 31 / 536 ms

 1799 12:58:49.196111  FMAP: area RW_ELOG found @ f30000 (4096 bytes)

 1800 12:58:49.199078  ELOG: NV offset 0xf30000 size 0x1000

 1801 12:58:49.206005  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1802 12:58:49.212152  ELOG: Event(17) added with size 13 at 2024-05-02 12:58:49 UTC

 1803 12:58:49.219005  ELOG: Event(92) added with size 9 at 2024-05-02 12:58:49 UTC

 1804 12:58:49.225793  ELOG: Event(93) added with size 9 at 2024-05-02 12:58:49 UTC

 1805 12:58:49.232303  ELOG: Event(9E) added with size 10 at 2024-05-02 12:58:49 UTC

 1806 12:58:49.238652  ELOG: Event(9F) added with size 14 at 2024-05-02 12:58:49 UTC

 1807 12:58:49.245702  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms

 1808 12:58:49.252462  ELOG: Event(A1) added with size 10 at 2024-05-02 12:58:49 UTC

 1809 12:58:49.255439  elog_add_boot_reason: Logged recovery mode boot, reason: 0x02

 1810 12:58:49.262107  BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms

 1811 12:58:49.265857  Finalize devices...

 1812 12:58:49.266243  Devices finalized

 1813 12:58:49.271784  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

 1814 12:58:49.278948  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)

 1815 12:58:49.282186  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 1816 12:58:49.288516  ME: HFSTS1                      : 0x80030055

 1817 12:58:49.291883  ME: HFSTS2                      : 0x30280116

 1818 12:58:49.295525  ME: HFSTS3                      : 0x00000050

 1819 12:58:49.301620  ME: HFSTS4                      : 0x00004000

 1820 12:58:49.305109  ME: HFSTS5                      : 0x00000000

 1821 12:58:49.308500  ME: HFSTS6                      : 0x00400006

 1822 12:58:49.314794  ME: Manufacturing Mode          : YES

 1823 12:58:49.318719  ME: SPI Protection Mode Enabled : NO

 1824 12:58:49.321863  ME: FW Partition Table          : OK

 1825 12:58:49.325537  ME: Bringup Loader Failure      : NO

 1826 12:58:49.328444  ME: Firmware Init Complete      : NO

 1827 12:58:49.331698  ME: Boot Options Present        : NO

 1828 12:58:49.335185  ME: Update In Progress          : NO

 1829 12:58:49.338642  ME: D0i3 Support                : YES

 1830 12:58:49.345286  ME: Low Power State Enabled     : NO

 1831 12:58:49.348270  ME: CPU Replaced                : YES

 1832 12:58:49.351544  ME: CPU Replacement Valid       : YES

 1833 12:58:49.355117  ME: Current Working State       : 5

 1834 12:58:49.358479  ME: Current Operation State     : 1

 1835 12:58:49.361573  ME: Current Operation Mode      : 3

 1836 12:58:49.365241  ME: Error Code                  : 0

 1837 12:58:49.368098  ME: Enhanced Debug Mode         : NO

 1838 12:58:49.371457  ME: CPU Debug Disabled          : YES

 1839 12:58:49.378327  ME: TXT Support                 : NO

 1840 12:58:49.381661  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms

 1841 12:58:49.389673  ELOG: Event(91) added with size 10 at 2024-05-02 12:58:49 UTC

 1842 12:58:49.396671  Chrome EC: clear events_b mask to 0x0000000020004000

 1843 12:58:49.403592  BS: BS_WRITE_TABLES entry times (exec / console): 4 / 11 ms

 1844 12:58:49.409787  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4

 1845 12:58:49.413466  CBFS: 'fallback/slic' not found.

 1846 12:58:49.419792  ACPI: Writing ACPI tables at 76b01000.

 1847 12:58:49.420186  ACPI:    * FACS

 1848 12:58:49.423124  ACPI:    * DSDT

 1849 12:58:49.426579  Ramoops buffer: 0x100000@0x76a00000.

 1850 12:58:49.429987  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

 1851 12:58:49.436743  FMAP: area RW_VPD found @ f35000 (8192 bytes)

 1852 12:58:49.439611  Google Chrome EC: version:

 1853 12:58:49.443339  	ro: voema_v2.0.7540-147f8d37d1

 1854 12:58:49.446834  	rw: voema_v2.0.7540-147f8d37d1

 1855 12:58:49.447285    running image: 1

 1856 12:58:49.453259  PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000

 1857 12:58:49.457189  ACPI:    * FADT

 1858 12:58:49.457621  SCI is IRQ9

 1859 12:58:49.463943  ACPI: added table 1/32, length now 40

 1860 12:58:49.464336  ACPI:     * SSDT

 1861 12:58:49.467183  Found 1 CPU(s) with 8 core(s) each.

 1862 12:58:49.473842  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2

 1863 12:58:49.476846  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 1864 12:58:49.480125  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 1865 12:58:49.483312  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a

 1866 12:58:49.490391  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 1867 12:58:49.496586  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 1868 12:58:49.500170  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10

 1869 12:58:49.507079  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 1870 12:58:49.513344  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)

 1871 12:58:49.516820  \_SB.PCI0.RP09: Added StorageD3Enable property

 1872 12:58:49.520103  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1873 12:58:49.526604  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 1874 12:58:49.533138  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 1875 12:58:49.536736  PS2K: Passing 80 keymaps to kernel

 1876 12:58:49.542994  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 1877 12:58:49.549768  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1

 1878 12:58:49.556379  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1

 1879 12:58:49.563139  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 1880 12:58:49.569547  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4

 1881 12:58:49.576220  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1

 1882 12:58:49.582696  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 1883 12:58:49.589285  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 1884 12:58:49.592887  ACPI: added table 2/32, length now 44

 1885 12:58:49.592984  ACPI:    * MCFG

 1886 12:58:49.596097  ACPI: added table 3/32, length now 48

 1887 12:58:49.599299  ACPI:    * TPM2

 1888 12:58:49.603084  TPM2 log created at 0x769f0000

 1889 12:58:49.605980  ACPI: added table 4/32, length now 52

 1890 12:58:49.606071  ACPI:    * MADT

 1891 12:58:49.609319  SCI is IRQ9

 1892 12:58:49.612733  ACPI: added table 5/32, length now 56

 1893 12:58:49.616197  current = 76b09850

 1894 12:58:49.616288  ACPI:    * DMAR

 1895 12:58:49.619164  ACPI: added table 6/32, length now 60

 1896 12:58:49.622599  ACPI: added table 7/32, length now 64

 1897 12:58:49.625918  ACPI:    * HPET

 1898 12:58:49.629414  ACPI: added table 8/32, length now 68

 1899 12:58:49.629501  ACPI: done.

 1900 12:58:49.632856  ACPI tables: 35216 bytes.

 1901 12:58:49.635721  smbios_write_tables: 769ef000

 1902 12:58:49.639112  EC returned error result code 3

 1903 12:58:49.642300  Couldn't obtain OEM name from CBI

 1904 12:58:49.645619  Create SMBIOS type 16

 1905 12:58:49.649034  Create SMBIOS type 17

 1906 12:58:49.652506  GENERIC: 0.0 (WIFI Device)

 1907 12:58:49.652594  SMBIOS tables: 1750 bytes.

 1908 12:58:49.658947  Writing table forward entry at 0x00000500

 1909 12:58:49.662524  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c

 1910 12:58:49.669212  Writing coreboot table at 0x76b25000

 1911 12:58:49.672700   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1912 12:58:49.679074   1. 0000000000001000-000000000009ffff: RAM

 1913 12:58:49.682249   2. 00000000000a0000-00000000000fffff: RESERVED

 1914 12:58:49.685766   3. 0000000000100000-00000000769eefff: RAM

 1915 12:58:49.692371   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES

 1916 12:58:49.699036   5. 0000000076b98000-0000000076c09fff: RAMSTAGE

 1917 12:58:49.702265   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES

 1918 12:58:49.709229   7. 0000000077000000-000000007fbfffff: RESERVED

 1919 12:58:49.712488   8. 00000000c0000000-00000000cfffffff: RESERVED

 1920 12:58:49.719043   9. 00000000f8000000-00000000f9ffffff: RESERVED

 1921 12:58:49.722447  10. 00000000fb000000-00000000fb000fff: RESERVED

 1922 12:58:49.728505  11. 00000000fe000000-00000000fe00ffff: RESERVED

 1923 12:58:49.732103  12. 00000000fed80000-00000000fed87fff: RESERVED

 1924 12:58:49.738878  13. 00000000fed90000-00000000fed92fff: RESERVED

 1925 12:58:49.742035  14. 00000000feda0000-00000000feda1fff: RESERVED

 1926 12:58:49.745465  15. 00000000fedc0000-00000000feddffff: RESERVED

 1927 12:58:49.751942  16. 0000000100000000-00000002803fffff: RAM

 1928 12:58:49.755397  Passing 4 GPIOs to payload:

 1929 12:58:49.758984              NAME |       PORT | POLARITY |     VALUE

 1930 12:58:49.764960               lid |  undefined |     high |      high

 1931 12:58:49.768635             power |  undefined |     high |       low

 1932 12:58:49.775123             oprom |  undefined |     high |       low

 1933 12:58:49.781823          EC in RW | 0x000000e5 |     high |       low

 1934 12:58:49.785133  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 6ed1

 1935 12:58:49.788707  coreboot table: 1576 bytes.

 1936 12:58:49.791479  IMD ROOT    0. 0x76fff000 0x00001000

 1937 12:58:49.798387  IMD SMALL   1. 0x76ffe000 0x00001000

 1938 12:58:49.801978  FSP MEMORY  2. 0x76c4e000 0x003b0000

 1939 12:58:49.805041  VPD         3. 0x76c4d000 0x00000367

 1940 12:58:49.808331  RO MCACHE   4. 0x76c4c000 0x00000fdc

 1941 12:58:49.811587  CONSOLE     5. 0x76c2c000 0x00020000

 1942 12:58:49.815247  FMAP        6. 0x76c2b000 0x00000578

 1943 12:58:49.818538  TIME STAMP  7. 0x76c2a000 0x00000910

 1944 12:58:49.821443  VBOOT WORK  8. 0x76c16000 0x00014000

 1945 12:58:49.828450  ROMSTG STCK 9. 0x76c15000 0x00001000

 1946 12:58:49.831908  AFTER CAR  10. 0x76c0a000 0x0000b000

 1947 12:58:49.834841  RAMSTAGE   11. 0x76b97000 0x00073000

 1948 12:58:49.838300  REFCODE    12. 0x76b42000 0x00055000

 1949 12:58:49.841487  SMM BACKUP 13. 0x76b32000 0x00010000

 1950 12:58:49.844893  4f444749   14. 0x76b30000 0x00002000

 1951 12:58:49.848329  EXT VBT15. 0x76b2d000 0x0000219f

 1952 12:58:49.851738  COREBOOT   16. 0x76b25000 0x00008000

 1953 12:58:49.854849  ACPI       17. 0x76b01000 0x00024000

 1954 12:58:49.858407  ACPI GNVS  18. 0x76b00000 0x00001000

 1955 12:58:49.864820  RAMOOPS    19. 0x76a00000 0x00100000

 1956 12:58:49.868017  TPM2 TCGLOG20. 0x769f0000 0x00010000

 1957 12:58:49.871210  SMBIOS     21. 0x769ef000 0x00000800

 1958 12:58:49.871309  IMD small region:

 1959 12:58:49.878180    IMD ROOT    0. 0x76ffec00 0x00000400

 1960 12:58:49.881864    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 1961 12:58:49.884877    POWER STATE 2. 0x76ffeb80 0x00000044

 1962 12:58:49.888428    ROMSTAGE    3. 0x76ffeb60 0x00000004

 1963 12:58:49.891525    MEM INFO    4. 0x76ffe980 0x000001e0

 1964 12:58:49.898638  BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms

 1965 12:58:49.901388  MTRR: Physical address space:

 1966 12:58:49.908084  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1967 12:58:49.914582  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1968 12:58:49.921319  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 1969 12:58:49.928050  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0

 1970 12:58:49.931783  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1

 1971 12:58:49.938196  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0

 1972 12:58:49.944302  0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6

 1973 12:58:49.947814  MTRR: Fixed MSR 0x250 0x0606060606060606

 1974 12:58:49.954952  MTRR: Fixed MSR 0x258 0x0606060606060606

 1975 12:58:49.957737  MTRR: Fixed MSR 0x259 0x0000000000000000

 1976 12:58:49.961568  MTRR: Fixed MSR 0x268 0x0606060606060606

 1977 12:58:49.964493  MTRR: Fixed MSR 0x269 0x0606060606060606

 1978 12:58:49.971358  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1979 12:58:49.974766  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1980 12:58:49.977737  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1981 12:58:49.981108  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1982 12:58:49.987644  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1983 12:58:49.991140  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1984 12:58:49.994217  call enable_fixed_mtrr()

 1985 12:58:49.997605  CPU physical address size: 39 bits

 1986 12:58:50.001026  MTRR: default type WB/UC MTRR counts: 6/6.

 1987 12:58:50.004279  MTRR: UC selected as default type.

 1988 12:58:50.011184  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 1989 12:58:50.017570  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 1990 12:58:50.024046  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 1991 12:58:50.030699  MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1

 1992 12:58:50.037577  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 1993 12:58:50.044379  MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6

 1994 12:58:50.044476  

 1995 12:58:50.044575  MTRR check

 1996 12:58:50.047804  Fixed MTRRs   : Enabled

 1997 12:58:50.050741  Variable MTRRs: Enabled

 1998 12:58:50.050827  

 1999 12:58:50.054202  MTRR: Fixed MSR 0x250 0x0606060606060606

 2000 12:58:50.057351  MTRR: Fixed MSR 0x258 0x0606060606060606

 2001 12:58:50.064042  MTRR: Fixed MSR 0x259 0x0000000000000000

 2002 12:58:50.067370  MTRR: Fixed MSR 0x268 0x0606060606060606

 2003 12:58:50.070802  MTRR: Fixed MSR 0x269 0x0606060606060606

 2004 12:58:50.073964  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2005 12:58:50.080550  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2006 12:58:50.083636  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2007 12:58:50.087189  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2008 12:58:50.090470  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2009 12:58:50.096996  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2010 12:58:50.103820  BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms

 2011 12:58:50.103914  call enable_fixed_mtrr()

 2012 12:58:50.114123  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60

 2013 12:58:50.117114  CPU physical address size: 39 bits

 2014 12:58:50.120641  Checking segment from ROM address 0xffc02b38

 2015 12:58:50.127230  MTRR: Fixed MSR 0x250 0x0606060606060606

 2016 12:58:50.130640  MTRR: Fixed MSR 0x250 0x0606060606060606

 2017 12:58:50.133821  MTRR: Fixed MSR 0x258 0x0606060606060606

 2018 12:58:50.136947  MTRR: Fixed MSR 0x259 0x0000000000000000

 2019 12:58:50.143635  MTRR: Fixed MSR 0x268 0x0606060606060606

 2020 12:58:50.146824  MTRR: Fixed MSR 0x269 0x0606060606060606

 2021 12:58:50.150246  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2022 12:58:50.153526  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2023 12:58:50.159834  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2024 12:58:50.163421  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2025 12:58:50.166456  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2026 12:58:50.169967  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2027 12:58:50.177549  MTRR: Fixed MSR 0x258 0x0606060606060606

 2028 12:58:50.177643  call enable_fixed_mtrr()

 2029 12:58:50.184349  MTRR: Fixed MSR 0x259 0x0000000000000000

 2030 12:58:50.187324  MTRR: Fixed MSR 0x268 0x0606060606060606

 2031 12:58:50.190708  MTRR: Fixed MSR 0x269 0x0606060606060606

 2032 12:58:50.194326  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2033 12:58:50.200597  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2034 12:58:50.203830  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2035 12:58:50.207055  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2036 12:58:50.210653  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2037 12:58:50.217231  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2038 12:58:50.220553  CPU physical address size: 39 bits

 2039 12:58:50.223997  call enable_fixed_mtrr()

 2040 12:58:50.227472  MTRR: Fixed MSR 0x250 0x0606060606060606

 2041 12:58:50.230590  MTRR: Fixed MSR 0x250 0x0606060606060606

 2042 12:58:50.237257  MTRR: Fixed MSR 0x258 0x0606060606060606

 2043 12:58:50.240623  MTRR: Fixed MSR 0x259 0x0000000000000000

 2044 12:58:50.243743  MTRR: Fixed MSR 0x268 0x0606060606060606

 2045 12:58:50.247041  MTRR: Fixed MSR 0x269 0x0606060606060606

 2046 12:58:50.253784  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2047 12:58:50.256791  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2048 12:58:50.260560  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2049 12:58:50.263410  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2050 12:58:50.270391  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2051 12:58:50.273380  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2052 12:58:50.276649  MTRR: Fixed MSR 0x258 0x0606060606060606

 2053 12:58:50.283604  MTRR: Fixed MSR 0x259 0x0000000000000000

 2054 12:58:50.286699  MTRR: Fixed MSR 0x268 0x0606060606060606

 2055 12:58:50.290045  MTRR: Fixed MSR 0x269 0x0606060606060606

 2056 12:58:50.293674  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2057 12:58:50.300120  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2058 12:58:50.303790  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2059 12:58:50.306551  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2060 12:58:50.309844  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2061 12:58:50.316633  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2062 12:58:50.319736  call enable_fixed_mtrr()

 2063 12:58:50.319828  call enable_fixed_mtrr()

 2064 12:58:50.323388  CPU physical address size: 39 bits

 2065 12:58:50.326628  CPU physical address size: 39 bits

 2066 12:58:50.333292  CPU physical address size: 39 bits

 2067 12:58:50.336445  MTRR: Fixed MSR 0x250 0x0606060606060606

 2068 12:58:50.340249  MTRR: Fixed MSR 0x250 0x0606060606060606

 2069 12:58:50.346416  MTRR: Fixed MSR 0x258 0x0606060606060606

 2070 12:58:50.349896  MTRR: Fixed MSR 0x259 0x0000000000000000

 2071 12:58:50.352877  MTRR: Fixed MSR 0x268 0x0606060606060606

 2072 12:58:50.356377  MTRR: Fixed MSR 0x269 0x0606060606060606

 2073 12:58:50.363023  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2074 12:58:50.366530  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2075 12:58:50.369573  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2076 12:58:50.373134  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2077 12:58:50.376168  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2078 12:58:50.382741  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2079 12:58:50.386096  MTRR: Fixed MSR 0x258 0x0606060606060606

 2080 12:58:50.389766  call enable_fixed_mtrr()

 2081 12:58:50.392635  MTRR: Fixed MSR 0x259 0x0000000000000000

 2082 12:58:50.395874  MTRR: Fixed MSR 0x268 0x0606060606060606

 2083 12:58:50.402812  MTRR: Fixed MSR 0x269 0x0606060606060606

 2084 12:58:50.406372  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2085 12:58:50.409955  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2086 12:58:50.412668  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2087 12:58:50.419371  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2088 12:58:50.422881  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2089 12:58:50.425818  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2090 12:58:50.429284  CPU physical address size: 39 bits

 2091 12:58:50.436045  call enable_fixed_mtrr()

 2092 12:58:50.439214  Checking segment from ROM address 0xffc02b54

 2093 12:58:50.442723  CPU physical address size: 39 bits

 2094 12:58:50.446052  Loading segment from ROM address 0xffc02b38

 2095 12:58:50.449284    code (compression=0)

 2096 12:58:50.459403    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64

 2097 12:58:50.465651  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64

 2098 12:58:50.468988  it's not compressed!

 2099 12:58:50.607774  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70

 2100 12:58:50.614392  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c

 2101 12:58:50.620957  Loading segment from ROM address 0xffc02b54

 2102 12:58:50.621056    Entry Point 0x30000000

 2103 12:58:50.624085  Loaded segments

 2104 12:58:50.630769  BS: BS_PAYLOAD_LOAD run times (exec / console): 457 / 64 ms

 2105 12:58:50.674132  Finalizing chipset.

 2106 12:58:50.676868  Finalizing SMM.

 2107 12:58:50.676956  APMC done.

 2108 12:58:50.683921  BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms

 2109 12:58:50.686893  mp_park_aps done after 0 msecs.

 2110 12:58:50.690305  Jumping to boot code at 0x30000000(0x76b25000)

 2111 12:58:50.700200  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes

 2112 12:58:50.700286  

 2113 12:58:50.700357  

 2114 12:58:50.703510  

 2115 12:58:50.703595  Starting depthcharge on Voema...

 2116 12:58:50.703948  end: 2.2.3 depthcharge-start (duration 00:00:04) [common]
 2117 12:58:50.704054  start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
 2118 12:58:50.704144  Setting prompt string to ['volteer:']
 2119 12:58:50.704243  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:47)
 2120 12:58:50.706972  

 2121 12:58:50.713247  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2122 12:58:50.713332  

 2123 12:58:50.720074  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2124 12:58:50.720164  

 2125 12:58:50.726615  Looking for NVMe Controller 0x3005f238 @ 00:1d:00

 2126 12:58:50.726703  

 2127 12:58:50.729959  Failed to find eMMC card reader

 2128 12:58:50.730042  

 2129 12:58:50.730111  Wipe memory regions:

 2130 12:58:50.730184  

 2131 12:58:50.736955  	[0x00000000001000, 0x000000000a0000)

 2132 12:58:50.737039  

 2133 12:58:50.740345  	[0x00000000100000, 0x00000030000000)

 2134 12:58:50.766124  

 2135 12:58:50.769175  	[0x00000032662db0, 0x000000769ef000)

 2136 12:58:50.804181  

 2137 12:58:50.807639  	[0x00000100000000, 0x00000280400000)

 2138 12:58:51.005451  

 2139 12:58:51.009013  ec_init: CrosEC protocol v3 supported (256, 256)

 2140 12:58:51.009100  

 2141 12:58:51.015346  update_port_state: port C0 state: usb enable 1 mux conn 0

 2142 12:58:51.015433  

 2143 12:58:51.022039  update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1

 2144 12:58:51.025451  

 2145 12:58:51.028851  pmc_check_ipc_sts: STS_BUSY done after 1612 us

 2146 12:58:51.028943  

 2147 12:58:51.035134  send_conn_disc_msg: pmc_send_cmd succeeded

 2148 12:58:51.464934  

 2149 12:58:51.465087  R8152: Initializing

 2150 12:58:51.465205  

 2151 12:58:51.468502  Version 6 (ocp_data = 5c30)

 2152 12:58:51.468587  

 2153 12:58:51.471641  R8152: Done initializing

 2154 12:58:51.471733  

 2155 12:58:51.474876  Adding net device

 2156 12:58:51.776218  

 2157 12:58:51.779656  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35

 2158 12:58:51.779801  

 2159 12:58:51.779917  

 2160 12:58:51.780021  

 2161 12:58:51.782904  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2163 12:58:51.883434  volteer: tftpboot 192.168.201.1 13607197/tftp-deploy-ailjc587/kernel/bzImage 13607197/tftp-deploy-ailjc587/kernel/cmdline 13607197/tftp-deploy-ailjc587/ramdisk/ramdisk.cpio.gz

 2164 12:58:51.883605  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2165 12:58:51.883717  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:46)
 2166 12:58:51.888600  tftpboot 192.168.201.1 13607197/tftp-deploy-ailjc587/kernel/bzIploy-ailjc587/kernel/cmdline 13607197/tftp-deploy-ailjc587/ramdisk/ramdisk.cpio.gz

 2167 12:58:51.888708  

 2168 12:58:51.888787  Waiting for link

 2169 12:58:52.091338  

 2170 12:58:52.091502  done.

 2171 12:58:52.091612  

 2172 12:58:52.091708  MAC: 00:24:32:30:7b:87

 2173 12:58:52.091797  

 2174 12:58:52.094402  Sending DHCP discover... done.

 2175 12:58:52.094489  

 2176 12:58:52.097798  Waiting for reply... done.

 2177 12:58:52.097886  

 2178 12:58:52.101121  Sending DHCP request... done.

 2179 12:58:52.101214  

 2180 12:58:52.107734  Waiting for reply... done.

 2181 12:58:52.107824  

 2182 12:58:52.107928  My ip is 192.168.201.19

 2183 12:58:52.108021  

 2184 12:58:52.111020  The DHCP server ip is 192.168.201.1

 2185 12:58:52.111140  

 2186 12:58:52.117789  TFTP server IP predefined by user: 192.168.201.1

 2187 12:58:52.117882  

 2188 12:58:52.124538  Bootfile predefined by user: 13607197/tftp-deploy-ailjc587/kernel/bzImage

 2189 12:58:52.124628  

 2190 12:58:52.127552  Sending tftp read request... done.

 2191 12:58:52.127641  

 2192 12:58:52.130606  Waiting for the transfer... 

 2193 12:58:52.130722  

 2194 12:58:52.664829  00000000 ################################################################

 2195 12:58:52.664986  

 2196 12:58:53.200688  00080000 ################################################################

 2197 12:58:53.200849  

 2198 12:58:53.748118  00100000 ################################################################

 2199 12:58:53.748292  

 2200 12:58:54.289574  00180000 ################################################################

 2201 12:58:54.289727  

 2202 12:58:54.829233  00200000 ################################################################

 2203 12:58:54.829392  

 2204 12:58:55.361989  00280000 ################################################################

 2205 12:58:55.362176  

 2206 12:58:55.898405  00300000 ################################################################

 2207 12:58:55.898586  

 2208 12:58:56.448022  00380000 ################################################################

 2209 12:58:56.448178  

 2210 12:58:56.985659  00400000 ################################################################

 2211 12:58:56.985840  

 2212 12:58:57.543375  00480000 ################################################################

 2213 12:58:57.543566  

 2214 12:58:58.078353  00500000 ################################################################

 2215 12:58:58.078538  

 2216 12:58:58.624770  00580000 ################################################################

 2217 12:58:58.624920  

 2218 12:58:59.174850  00600000 ################################################################

 2219 12:58:59.175003  

 2220 12:58:59.720635  00680000 ################################################################

 2221 12:58:59.720787  

 2222 12:59:00.262480  00700000 ################################################################

 2223 12:59:00.262631  

 2224 12:59:00.809794  00780000 ################################################################

 2225 12:59:00.809946  

 2226 12:59:01.345593  00800000 ################################################################

 2227 12:59:01.345757  

 2228 12:59:01.871595  00880000 ################################################################

 2229 12:59:01.871740  

 2230 12:59:02.386163  00900000 ################################################################

 2231 12:59:02.386374  

 2232 12:59:02.906747  00980000 ################################################################

 2233 12:59:02.906924  

 2234 12:59:03.448279  00a00000 ################################################################

 2235 12:59:03.448441  

 2236 12:59:04.001048  00a80000 ################################################################

 2237 12:59:04.001202  

 2238 12:59:04.562049  00b00000 ################################################################

 2239 12:59:04.562199  

 2240 12:59:05.126110  00b80000 ################################################################

 2241 12:59:05.126263  

 2242 12:59:05.672166  00c00000 ################################################################

 2243 12:59:05.672323  

 2244 12:59:06.211410  00c80000 ################################################################

 2245 12:59:06.211561  

 2246 12:59:06.683165  00d00000 ######################################################## done.

 2247 12:59:06.683317  

 2248 12:59:06.686476  The bootfile was 14090128 bytes long.

 2249 12:59:06.686565  

 2250 12:59:06.690342  Sending tftp read request... done.

 2251 12:59:06.690446  

 2252 12:59:06.693538  Waiting for the transfer... 

 2253 12:59:06.693629  

 2254 12:59:07.251166  00000000 ################################################################

 2255 12:59:07.251320  

 2256 12:59:07.793674  00080000 ################################################################

 2257 12:59:07.793822  

 2258 12:59:08.339373  00100000 ################################################################

 2259 12:59:08.339549  

 2260 12:59:08.856960  00180000 ################################################################

 2261 12:59:08.857128  

 2262 12:59:09.390936  00200000 ################################################################

 2263 12:59:09.391095  

 2264 12:59:09.934017  00280000 ################################################################

 2265 12:59:09.934166  

 2266 12:59:10.493349  00300000 ################################################################

 2267 12:59:10.493502  

 2268 12:59:11.065952  00380000 ################################################################

 2269 12:59:11.066128  

 2270 12:59:11.652353  00400000 ################################################################

 2271 12:59:11.652541  

 2272 12:59:12.244902  00480000 ################################################################

 2273 12:59:12.245426  

 2274 12:59:12.849886  00500000 ################################################################

 2275 12:59:12.850036  

 2276 12:59:13.438058  00580000 ################################################################

 2277 12:59:13.438218  

 2278 12:59:14.027285  00600000 ########################################################### done.

 2279 12:59:14.027809  

 2280 12:59:14.030452  Sending tftp read request... done.

 2281 12:59:14.030881  

 2282 12:59:14.034034  Waiting for the transfer... 

 2283 12:59:14.034462  

 2284 12:59:14.037422  00000000 # done.

 2285 12:59:14.037855  

 2286 12:59:14.044002  Command line loaded dynamically from TFTP file: 13607197/tftp-deploy-ailjc587/kernel/cmdline

 2287 12:59:14.047457  

 2288 12:59:14.070514  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/13607197/extract-nfsrootfs-8od48ji5,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2289 12:59:14.075736  

 2290 12:59:14.079150  Shutting down all USB controllers.

 2291 12:59:14.079652  

 2292 12:59:14.079990  Removing current net device

 2293 12:59:14.080303  

 2294 12:59:14.082382  Finalizing coreboot

 2295 12:59:14.082805  

 2296 12:59:14.089017  Exiting depthcharge with code 4 at timestamp: 32035704

 2297 12:59:14.089445  

 2298 12:59:14.089780  

 2299 12:59:14.090092  Starting kernel ...

 2300 12:59:14.090394  

 2301 12:59:14.090687  

 2302 12:59:14.091962  end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
 2303 12:59:14.092437  start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
 2304 12:59:14.092807  Setting prompt string to ['Linux version [0-9]']
 2305 12:59:14.093151  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2306 12:59:14.093492  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2308 13:03:37.093297  end: 2.2.5 auto-login-action (duration 00:04:23) [common]
 2310 13:03:37.094294  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
 2312 13:03:37.095074  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2315 13:03:37.096601  end: 2 depthcharge-action (duration 00:05:00) [common]
 2317 13:03:37.097715  Cleaning after the job
 2318 13:03:37.097814  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13607197/tftp-deploy-ailjc587/ramdisk
 2319 13:03:37.098737  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13607197/tftp-deploy-ailjc587/kernel
 2320 13:03:37.100470  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13607197/tftp-deploy-ailjc587/nfsrootfs
 2321 13:03:37.159629  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13607197/tftp-deploy-ailjc587/modules
 2322 13:03:37.160174  start: 4.1 power-off (timeout 00:00:30) [common]
 2323 13:03:37.160365  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cp514-2h-1130g7-volteer-cbg-4' '--port=1' '--command=off'
 2324 13:03:38.089658  >> Command sent successfully.

 2325 13:03:38.099805  Returned 0 in 0 seconds
 2326 13:03:38.201095  end: 4.1 power-off (duration 00:00:01) [common]
 2328 13:03:38.202706  start: 4.2 read-feedback (timeout 00:09:59) [common]
 2329 13:03:38.203907  Listened to connection for namespace 'common' for up to 1s
 2331 13:03:38.205168  Listened to connection for namespace 'common' for up to 1s
 2332 13:03:39.204635  Finalising connection for namespace 'common'
 2333 13:03:39.205301  Disconnecting from shell: Finalise
 2334 13:03:39.205684  
 2335 13:03:39.306721  end: 4.2 read-feedback (duration 00:00:01) [common]
 2336 13:03:39.307415  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13607197
 2337 13:03:39.600658  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13607197
 2338 13:03:39.600870  JobError: Your job cannot terminate cleanly.