Boot log: acer-cp514-2h-1130g7-volteer
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 12:59:18.251619 lava-dispatcher, installed at version: 2024.01
2 12:59:18.251840 start: 0 validate
3 12:59:18.251981 Start time: 2024-05-02 12:59:18.251974+00:00 (UTC)
4 12:59:18.252117 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:59:18.252253 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-ltp%2F20240313.0%2Famd64%2Finitrd.cpio.gz exists
6 12:59:18.511711 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:59:18.511924 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2480-g949429724783%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:59:18.768995 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:59:18.769164 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-ltp%2F20240313.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:59:19.017483 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:59:19.017658 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2480-g949429724783%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 12:59:19.276552 validate duration: 1.02
14 12:59:19.276841 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:59:19.276947 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:59:19.277040 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:59:19.277160 Not decompressing ramdisk as can be used compressed.
18 12:59:19.277245 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-ltp/20240313.0/amd64/initrd.cpio.gz
19 12:59:19.277338 saving as /var/lib/lava/dispatcher/tmp/13607163/tftp-deploy-tg8xewbh/ramdisk/initrd.cpio.gz
20 12:59:19.277428 total size: 6464291 (6 MB)
21 12:59:19.278509 progress 0 % (0 MB)
22 12:59:19.280210 progress 5 % (0 MB)
23 12:59:19.281938 progress 10 % (0 MB)
24 12:59:19.283603 progress 15 % (0 MB)
25 12:59:19.285284 progress 20 % (1 MB)
26 12:59:19.287089 progress 25 % (1 MB)
27 12:59:19.288906 progress 30 % (1 MB)
28 12:59:19.290625 progress 35 % (2 MB)
29 12:59:19.292158 progress 40 % (2 MB)
30 12:59:19.293853 progress 45 % (2 MB)
31 12:59:19.295493 progress 50 % (3 MB)
32 12:59:19.297130 progress 55 % (3 MB)
33 12:59:19.298801 progress 60 % (3 MB)
34 12:59:19.300432 progress 65 % (4 MB)
35 12:59:19.302108 progress 70 % (4 MB)
36 12:59:19.303588 progress 75 % (4 MB)
37 12:59:19.305219 progress 80 % (4 MB)
38 12:59:19.306917 progress 85 % (5 MB)
39 12:59:19.308612 progress 90 % (5 MB)
40 12:59:19.310301 progress 95 % (5 MB)
41 12:59:19.312057 progress 100 % (6 MB)
42 12:59:19.312193 6 MB downloaded in 0.03 s (177.33 MB/s)
43 12:59:19.312441 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:59:19.312694 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:59:19.312780 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:59:19.312872 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:59:19.313015 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2480-g949429724783/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 12:59:19.313090 saving as /var/lib/lava/dispatcher/tmp/13607163/tftp-deploy-tg8xewbh/kernel/bzImage
50 12:59:19.313163 total size: 14090128 (13 MB)
51 12:59:19.313223 No compression specified
52 12:59:19.314332 progress 0 % (0 MB)
53 12:59:19.317908 progress 5 % (0 MB)
54 12:59:19.321360 progress 10 % (1 MB)
55 12:59:19.324976 progress 15 % (2 MB)
56 12:59:19.328543 progress 20 % (2 MB)
57 12:59:19.332137 progress 25 % (3 MB)
58 12:59:19.335591 progress 30 % (4 MB)
59 12:59:19.340362 progress 35 % (4 MB)
60 12:59:19.346233 progress 40 % (5 MB)
61 12:59:19.352117 progress 45 % (6 MB)
62 12:59:19.357701 progress 50 % (6 MB)
63 12:59:19.363646 progress 55 % (7 MB)
64 12:59:19.369306 progress 60 % (8 MB)
65 12:59:19.375195 progress 65 % (8 MB)
66 12:59:19.380824 progress 70 % (9 MB)
67 12:59:19.386729 progress 75 % (10 MB)
68 12:59:19.392202 progress 80 % (10 MB)
69 12:59:19.398090 progress 85 % (11 MB)
70 12:59:19.403697 progress 90 % (12 MB)
71 12:59:19.409450 progress 95 % (12 MB)
72 12:59:19.414901 progress 100 % (13 MB)
73 12:59:19.415297 13 MB downloaded in 0.10 s (131.57 MB/s)
74 12:59:19.415503 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:59:19.415879 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:59:19.416005 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:59:19.416131 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:59:19.416293 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-ltp/20240313.0/amd64/full.rootfs.tar.xz
80 12:59:19.416407 saving as /var/lib/lava/dispatcher/tmp/13607163/tftp-deploy-tg8xewbh/nfsrootfs/full.rootfs.tar
81 12:59:19.416500 total size: 100036868 (95 MB)
82 12:59:19.416588 Using unxz to decompress xz
83 12:59:19.421176 progress 0 % (0 MB)
84 12:59:19.819796 progress 5 % (4 MB)
85 12:59:20.208845 progress 10 % (9 MB)
86 12:59:20.610230 progress 15 % (14 MB)
87 12:59:21.045256 progress 20 % (19 MB)
88 12:59:21.460043 progress 25 % (23 MB)
89 12:59:21.755727 progress 30 % (28 MB)
90 12:59:22.034813 progress 35 % (33 MB)
91 12:59:22.326910 progress 40 % (38 MB)
92 12:59:22.574009 progress 45 % (42 MB)
93 12:59:22.866008 progress 50 % (47 MB)
94 12:59:23.046560 progress 55 % (52 MB)
95 12:59:23.234371 progress 60 % (57 MB)
96 12:59:23.531888 progress 65 % (62 MB)
97 12:59:23.836776 progress 70 % (66 MB)
98 12:59:24.116433 progress 75 % (71 MB)
99 12:59:24.394815 progress 80 % (76 MB)
100 12:59:24.693513 progress 85 % (81 MB)
101 12:59:24.969028 progress 90 % (85 MB)
102 12:59:25.273276 progress 95 % (90 MB)
103 12:59:25.575834 progress 100 % (95 MB)
104 12:59:25.582330 95 MB downloaded in 6.17 s (15.47 MB/s)
105 12:59:25.582614 end: 1.3.1 http-download (duration 00:00:06) [common]
107 12:59:25.582889 end: 1.3 download-retry (duration 00:00:06) [common]
108 12:59:25.582982 start: 1.4 download-retry (timeout 00:09:54) [common]
109 12:59:25.583079 start: 1.4.1 http-download (timeout 00:09:54) [common]
110 12:59:25.583216 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2480-g949429724783/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 12:59:25.583293 saving as /var/lib/lava/dispatcher/tmp/13607163/tftp-deploy-tg8xewbh/modules/modules.tar
112 12:59:25.583356 total size: 483880 (0 MB)
113 12:59:25.583420 Using unxz to decompress xz
114 12:59:25.587288 progress 6 % (0 MB)
115 12:59:25.587713 progress 13 % (0 MB)
116 12:59:25.587955 progress 20 % (0 MB)
117 12:59:25.589441 progress 27 % (0 MB)
118 12:59:25.591549 progress 33 % (0 MB)
119 12:59:25.593539 progress 40 % (0 MB)
120 12:59:25.595551 progress 47 % (0 MB)
121 12:59:25.597318 progress 54 % (0 MB)
122 12:59:25.599262 progress 60 % (0 MB)
123 12:59:25.601271 progress 67 % (0 MB)
124 12:59:25.603027 progress 74 % (0 MB)
125 12:59:25.605008 progress 81 % (0 MB)
126 12:59:25.606890 progress 88 % (0 MB)
127 12:59:25.608866 progress 94 % (0 MB)
128 12:59:25.610697 progress 100 % (0 MB)
129 12:59:25.616751 0 MB downloaded in 0.03 s (13.82 MB/s)
130 12:59:25.617010 end: 1.4.1 http-download (duration 00:00:00) [common]
132 12:59:25.617274 end: 1.4 download-retry (duration 00:00:00) [common]
133 12:59:25.617385 start: 1.5 prepare-tftp-overlay (timeout 00:09:54) [common]
134 12:59:25.617480 start: 1.5.1 extract-nfsrootfs (timeout 00:09:54) [common]
135 12:59:28.314915 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/13607163/extract-nfsrootfs-l12gp4ei
136 12:59:28.315121 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
137 12:59:28.315222 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
138 12:59:28.315377 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13607163/lava-overlay-15frm_la
139 12:59:28.315500 makedir: /var/lib/lava/dispatcher/tmp/13607163/lava-overlay-15frm_la/lava-13607163/bin
140 12:59:28.315598 makedir: /var/lib/lava/dispatcher/tmp/13607163/lava-overlay-15frm_la/lava-13607163/tests
141 12:59:28.315693 makedir: /var/lib/lava/dispatcher/tmp/13607163/lava-overlay-15frm_la/lava-13607163/results
142 12:59:28.315790 Creating /var/lib/lava/dispatcher/tmp/13607163/lava-overlay-15frm_la/lava-13607163/bin/lava-add-keys
143 12:59:28.315925 Creating /var/lib/lava/dispatcher/tmp/13607163/lava-overlay-15frm_la/lava-13607163/bin/lava-add-sources
144 12:59:28.316054 Creating /var/lib/lava/dispatcher/tmp/13607163/lava-overlay-15frm_la/lava-13607163/bin/lava-background-process-start
145 12:59:28.316176 Creating /var/lib/lava/dispatcher/tmp/13607163/lava-overlay-15frm_la/lava-13607163/bin/lava-background-process-stop
146 12:59:28.316294 Creating /var/lib/lava/dispatcher/tmp/13607163/lava-overlay-15frm_la/lava-13607163/bin/lava-common-functions
147 12:59:28.316411 Creating /var/lib/lava/dispatcher/tmp/13607163/lava-overlay-15frm_la/lava-13607163/bin/lava-echo-ipv4
148 12:59:28.316528 Creating /var/lib/lava/dispatcher/tmp/13607163/lava-overlay-15frm_la/lava-13607163/bin/lava-install-packages
149 12:59:28.316645 Creating /var/lib/lava/dispatcher/tmp/13607163/lava-overlay-15frm_la/lava-13607163/bin/lava-installed-packages
150 12:59:28.316764 Creating /var/lib/lava/dispatcher/tmp/13607163/lava-overlay-15frm_la/lava-13607163/bin/lava-os-build
151 12:59:28.316881 Creating /var/lib/lava/dispatcher/tmp/13607163/lava-overlay-15frm_la/lava-13607163/bin/lava-probe-channel
152 12:59:28.316996 Creating /var/lib/lava/dispatcher/tmp/13607163/lava-overlay-15frm_la/lava-13607163/bin/lava-probe-ip
153 12:59:28.317112 Creating /var/lib/lava/dispatcher/tmp/13607163/lava-overlay-15frm_la/lava-13607163/bin/lava-target-ip
154 12:59:28.317229 Creating /var/lib/lava/dispatcher/tmp/13607163/lava-overlay-15frm_la/lava-13607163/bin/lava-target-mac
155 12:59:28.317386 Creating /var/lib/lava/dispatcher/tmp/13607163/lava-overlay-15frm_la/lava-13607163/bin/lava-target-storage
156 12:59:28.317506 Creating /var/lib/lava/dispatcher/tmp/13607163/lava-overlay-15frm_la/lava-13607163/bin/lava-test-case
157 12:59:28.317624 Creating /var/lib/lava/dispatcher/tmp/13607163/lava-overlay-15frm_la/lava-13607163/bin/lava-test-event
158 12:59:28.317740 Creating /var/lib/lava/dispatcher/tmp/13607163/lava-overlay-15frm_la/lava-13607163/bin/lava-test-feedback
159 12:59:28.317857 Creating /var/lib/lava/dispatcher/tmp/13607163/lava-overlay-15frm_la/lava-13607163/bin/lava-test-raise
160 12:59:28.317973 Creating /var/lib/lava/dispatcher/tmp/13607163/lava-overlay-15frm_la/lava-13607163/bin/lava-test-reference
161 12:59:28.318090 Creating /var/lib/lava/dispatcher/tmp/13607163/lava-overlay-15frm_la/lava-13607163/bin/lava-test-runner
162 12:59:28.318207 Creating /var/lib/lava/dispatcher/tmp/13607163/lava-overlay-15frm_la/lava-13607163/bin/lava-test-set
163 12:59:28.318323 Creating /var/lib/lava/dispatcher/tmp/13607163/lava-overlay-15frm_la/lava-13607163/bin/lava-test-shell
164 12:59:28.318442 Updating /var/lib/lava/dispatcher/tmp/13607163/lava-overlay-15frm_la/lava-13607163/bin/lava-install-packages (oe)
165 12:59:28.318591 Updating /var/lib/lava/dispatcher/tmp/13607163/lava-overlay-15frm_la/lava-13607163/bin/lava-installed-packages (oe)
166 12:59:28.318717 Creating /var/lib/lava/dispatcher/tmp/13607163/lava-overlay-15frm_la/lava-13607163/environment
167 12:59:28.318812 LAVA metadata
168 12:59:28.318885 - LAVA_JOB_ID=13607163
169 12:59:28.318949 - LAVA_DISPATCHER_IP=192.168.201.1
170 12:59:28.319051 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
171 12:59:28.319118 skipped lava-vland-overlay
172 12:59:28.319192 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 12:59:28.319270 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
174 12:59:28.319329 skipped lava-multinode-overlay
175 12:59:28.319399 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 12:59:28.319477 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
177 12:59:28.319553 Loading test definitions
178 12:59:28.319643 start: 1.5.2.3.1 git-repo-action (timeout 00:09:51) [common]
179 12:59:28.319713 Using /lava-13607163 at stage 0
180 12:59:28.319806 Fetching tests from https://github.com/kernelci/test-definitions
181 12:59:28.319888 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/13607163/lava-overlay-15frm_la/lava-13607163/0/tests/0_ltp-ipc'
182 12:59:30.854946 Running '/usr/bin/git checkout kernelci.org
183 12:59:31.007545 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/13607163/lava-overlay-15frm_la/lava-13607163/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
184 12:59:31.008298 uuid=13607163_1.5.2.3.1 testdef=None
185 12:59:31.008466 end: 1.5.2.3.1 git-repo-action (duration 00:00:03) [common]
187 12:59:31.008717 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
188 12:59:31.009514 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
190 12:59:31.009752 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
191 12:59:31.010752 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
193 12:59:31.011063 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
194 12:59:31.012047 runner path: /var/lib/lava/dispatcher/tmp/13607163/lava-overlay-15frm_la/lava-13607163/0/tests/0_ltp-ipc test_uuid 13607163_1.5.2.3.1
195 12:59:31.012139 SKIPFILE='skipfile-lkft.yaml'
196 12:59:31.012206 SKIP_INSTALL='true'
197 12:59:31.012267 TST_CMDFILES='ipc'
198 12:59:31.012409 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
200 12:59:31.012619 Creating lava-test-runner.conf files
201 12:59:31.012684 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13607163/lava-overlay-15frm_la/lava-13607163/0 for stage 0
202 12:59:31.012774 - 0_ltp-ipc
203 12:59:31.012906 end: 1.5.2.3 test-definition (duration 00:00:03) [common]
204 12:59:31.012994 start: 1.5.2.4 compress-overlay (timeout 00:09:48) [common]
205 12:59:38.607466 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
206 12:59:38.607631 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:41) [common]
207 12:59:38.607730 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
208 12:59:38.607834 end: 1.5.2 lava-overlay (duration 00:00:10) [common]
209 12:59:38.607933 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:41) [common]
210 12:59:38.772242 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
211 12:59:38.772633 start: 1.5.4 extract-modules (timeout 00:09:41) [common]
212 12:59:38.772797 extracting modules file /var/lib/lava/dispatcher/tmp/13607163/tftp-deploy-tg8xewbh/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13607163/extract-nfsrootfs-l12gp4ei
213 12:59:38.792775 extracting modules file /var/lib/lava/dispatcher/tmp/13607163/tftp-deploy-tg8xewbh/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13607163/extract-overlay-ramdisk-0rqvf92m/ramdisk
214 12:59:38.814890 end: 1.5.4 extract-modules (duration 00:00:00) [common]
215 12:59:38.815082 start: 1.5.5 apply-overlay-tftp (timeout 00:09:40) [common]
216 12:59:38.815206 [common] Applying overlay to NFS
217 12:59:38.815303 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13607163/compress-overlay-2hqpei6b/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13607163/extract-nfsrootfs-l12gp4ei
218 12:59:39.855702 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
219 12:59:39.855865 start: 1.5.6 configure-preseed-file (timeout 00:09:39) [common]
220 12:59:39.855968 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
221 12:59:39.856059 start: 1.5.7 compress-ramdisk (timeout 00:09:39) [common]
222 12:59:39.856146 Building ramdisk /var/lib/lava/dispatcher/tmp/13607163/extract-overlay-ramdisk-0rqvf92m/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13607163/extract-overlay-ramdisk-0rqvf92m/ramdisk
223 12:59:39.949867 >> 34109 blocks
224 12:59:40.722344 rename /var/lib/lava/dispatcher/tmp/13607163/extract-overlay-ramdisk-0rqvf92m/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13607163/tftp-deploy-tg8xewbh/ramdisk/ramdisk.cpio.gz
225 12:59:40.722815 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
226 12:59:40.722945 start: 1.5.8 prepare-kernel (timeout 00:09:39) [common]
227 12:59:40.723051 start: 1.5.8.1 prepare-fit (timeout 00:09:39) [common]
228 12:59:40.723150 No mkimage arch provided, not using FIT.
229 12:59:40.723246 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
230 12:59:40.723334 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
231 12:59:40.723444 end: 1.5 prepare-tftp-overlay (duration 00:00:15) [common]
232 12:59:40.723540 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:39) [common]
233 12:59:40.723630 No LXC device requested
234 12:59:40.723715 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
235 12:59:40.723806 start: 1.7 deploy-device-env (timeout 00:09:39) [common]
236 12:59:40.723894 end: 1.7 deploy-device-env (duration 00:00:00) [common]
237 12:59:40.723968 Checking files for TFTP limit of 4294967296 bytes.
238 12:59:40.724359 end: 1 tftp-deploy (duration 00:00:21) [common]
239 12:59:40.724467 start: 2 depthcharge-action (timeout 00:05:00) [common]
240 12:59:40.724564 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
241 12:59:40.724694 substitutions:
242 12:59:40.724766 - {DTB}: None
243 12:59:40.724830 - {INITRD}: 13607163/tftp-deploy-tg8xewbh/ramdisk/ramdisk.cpio.gz
244 12:59:40.724892 - {KERNEL}: 13607163/tftp-deploy-tg8xewbh/kernel/bzImage
245 12:59:40.724952 - {LAVA_MAC}: None
246 12:59:40.725010 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/13607163/extract-nfsrootfs-l12gp4ei
247 12:59:40.725070 - {NFS_SERVER_IP}: 192.168.201.1
248 12:59:40.725127 - {PRESEED_CONFIG}: None
249 12:59:40.725184 - {PRESEED_LOCAL}: None
250 12:59:40.725240 - {RAMDISK}: 13607163/tftp-deploy-tg8xewbh/ramdisk/ramdisk.cpio.gz
251 12:59:40.725306 - {ROOT_PART}: None
252 12:59:40.725365 - {ROOT}: None
253 12:59:40.725422 - {SERVER_IP}: 192.168.201.1
254 12:59:40.725478 - {TEE}: None
255 12:59:40.725534 Parsed boot commands:
256 12:59:40.725589 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
257 12:59:40.725769 Parsed boot commands: tftpboot 192.168.201.1 13607163/tftp-deploy-tg8xewbh/kernel/bzImage 13607163/tftp-deploy-tg8xewbh/kernel/cmdline 13607163/tftp-deploy-tg8xewbh/ramdisk/ramdisk.cpio.gz
258 12:59:40.725860 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
259 12:59:40.725945 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
260 12:59:40.726047 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
261 12:59:40.726176 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
262 12:59:40.726283 Not connected, no need to disconnect.
263 12:59:40.726385 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
264 12:59:40.726475 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
265 12:59:40.726550 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cp514-2h-1130g7-volteer-cbg-1'
266 12:59:40.730003 Setting prompt string to ['lava-test: # ']
267 12:59:40.730394 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
268 12:59:40.730514 end: 2.2.1 reset-connection (duration 00:00:00) [common]
269 12:59:40.730621 start: 2.2.2 reset-device (timeout 00:05:00) [common]
270 12:59:40.730721 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
271 12:59:40.730902 Calling: '/usr/local/bin/chromebook-reboot.sh' 'acer-cp514-2h-1130g7-volteer-cbg-1'
272 12:59:49.405656 Returned 0 in 8 seconds
273 12:59:49.506283 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
275 12:59:49.506607 end: 2.2.2 reset-device (duration 00:00:09) [common]
276 12:59:49.506708 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
277 12:59:49.506801 Setting prompt string to 'Starting depthcharge on Voema...'
278 12:59:49.506870 Changing prompt to 'Starting depthcharge on Voema...'
279 12:59:49.506941 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
280 12:59:49.507210 [Enter `^Ec?' for help]
281 12:59:49.507291
282 12:59:49.507357
283 12:59:49.507422 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
284 12:59:49.507488 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
285 12:59:49.507550 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
286 12:59:49.507611 CPU: AES supported, TXT NOT supported, VT supported
287 12:59:49.507670 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
288 12:59:49.507728 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
289 12:59:49.507784 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
290 12:59:49.507840 VBOOT: Loading verstage.
291 12:59:49.507896 FMAP: Found "FLASH" version 1.1 at 0x1804000.
292 12:59:49.507952 FMAP: base = 0x0 size = 0x2000000 #areas = 32
293 12:59:49.508007 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
294 12:59:49.508063 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
295 12:59:49.508120 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
296 12:59:49.508176
297 12:59:49.508231
298 12:59:49.508285 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
299 12:59:49.508341 Probing TPM: . done!
300 12:59:49.508396 TPM ready after 0 ms
301 12:59:49.508452 Connected to device vid:did:rid of 1ae0:0028:00
302 12:59:49.508508 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.153/cr50_v3.94_pp.113-620c9b9523
303 12:59:49.508567 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
304 12:59:49.508623 Initialized TPM device CR50 revision 0
305 12:59:49.508678 tlcl_send_startup: Startup return code is 0
306 12:59:49.508733 TPM: setup succeeded
307 12:59:49.508788 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
308 12:59:49.508843 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
309 12:59:49.508898 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
310 12:59:49.508954 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
311 12:59:49.509008 Chrome EC: UHEPI supported
312 12:59:49.509062 Phase 1
313 12:59:49.509117 FMAP: area GBB found @ 1805000 (458752 bytes)
314 12:59:49.509173 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
315 12:59:49.509228 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
316 12:59:49.509283 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
317 12:59:49.509380 VB2:vb2_check_recovery() Recovery was requested manually
318 12:59:49.509436 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x7
319 12:59:49.509491 Recovery requested (1009000e)
320 12:59:49.509546 TPM: Extending digest for VBOOT: boot mode into PCR 0
321 12:59:49.509602 tlcl_extend: response is 0
322 12:59:49.509657 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
323 12:59:49.509712 tlcl_extend: response is 0
324 12:59:49.509767 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
325 12:59:49.509822 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
326 12:59:49.509877 BS: verstage times (exec / console): total (unknown) / 148 ms
327 12:59:49.509933
328 12:59:49.509987
329 12:59:49.510040 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
330 12:59:49.510096 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
331 12:59:49.510152 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
332 12:59:49.510207 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
333 12:59:49.510262 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
334 12:59:49.510316 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
335 12:59:49.510370 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
336 12:59:49.510425 TCO_STS: 0000 0000
337 12:59:49.510479 GEN_PMCON: d0015038 00002200
338 12:59:49.510534 GBLRST_CAUSE: 00000000 00000000
339 12:59:49.510589 HPR_CAUSE0: 00000000
340 12:59:49.510644 prev_sleep_state 5
341 12:59:49.510699 Boot Count incremented to 29267
342 12:59:49.510754 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
343 12:59:49.510809 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
344 12:59:49.510865 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
345 12:59:49.510920 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
346 12:59:49.510976 Chrome EC: UHEPI supported
347 12:59:49.511031 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
348 12:59:49.511086 Probing TPM: done!
349 12:59:49.511140 Connected to device vid:did:rid of 1ae0:0028:00
350 12:59:49.511195 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.153/cr50_v3.94_pp.113-620c9b9523
351 12:59:49.511251 Initialized TPM device CR50 revision 0
352 12:59:49.511305 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
353 12:59:49.511360 MRC: Hash idx 0x100b comparison successful.
354 12:59:49.511415 MRC cache found, size faa8
355 12:59:49.511469 bootmode is set to: 2
356 12:59:49.511523 SPD index = 0
357 12:59:49.511577 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
358 12:59:49.511633 SPD: module type is LPDDR4X
359 12:59:49.511687 SPD: module part number is MT53E512M64D4NW-046
360 12:59:49.511742 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
361 12:59:49.511797 SPD: device width 16 bits, bus width 16 bits
362 12:59:49.511852 SPD: module size is 1024 MB (per channel)
363 12:59:49.511907 CBMEM:
364 12:59:49.511961 IMD: root @ 0x76fff000 254 entries.
365 12:59:49.512016 IMD: root @ 0x76ffec00 62 entries.
366 12:59:49.512070 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
367 12:59:49.512316 FMAP: area RW_VPD found @ f35000 (8192 bytes)
368 12:59:49.512380 External stage cache:
369 12:59:49.512436 IMD: root @ 0x7b3ff000 254 entries.
370 12:59:49.512491 IMD: root @ 0x7b3fec00 62 entries.
371 12:59:49.512546 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
372 12:59:49.512601 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
373 12:59:49.512656 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
374 12:59:49.512711 MRC: 'RECOVERY_MRC_CACHE' does not need update.
375 12:59:49.512766 cse_lite: Skip switching to RW in the recovery path
376 12:59:49.512821 8 DIMMs found
377 12:59:49.512877 SMM Memory Map
378 12:59:49.512932 SMRAM : 0x7b000000 0x800000
379 12:59:49.512988 Subregion 0: 0x7b000000 0x200000
380 12:59:49.513043 Subregion 1: 0x7b200000 0x200000
381 12:59:49.513098 Subregion 2: 0x7b400000 0x400000
382 12:59:49.513152 top_of_ram = 0x77000000
383 12:59:49.513207 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
384 12:59:49.513262 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
385 12:59:49.513368 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
386 12:59:49.513428 MTRR Range: Start=ff000000 End=0 (Size 1000000)
387 12:59:49.513484 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
388 12:59:49.513539 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
389 12:59:49.513595 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
390 12:59:49.513650 Processing 211 relocs. Offset value of 0x74c0b000
391 12:59:49.513706 BS: romstage times (exec / console): total (unknown) / 277 ms
392 12:59:49.513761
393 12:59:49.513816
394 12:59:49.513871 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
395 12:59:49.513927 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
396 12:59:49.513983 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
397 12:59:49.514038 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
398 12:59:49.514093 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
399 12:59:49.514149 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
400 12:59:49.514205 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
401 12:59:49.514260 Processing 5008 relocs. Offset value of 0x75d98000
402 12:59:49.514315 BS: postcar times (exec / console): total (unknown) / 59 ms
403 12:59:49.514370
404 12:59:49.514423
405 12:59:49.514478 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
406 12:59:49.514533 Normal boot
407 12:59:49.514590 FW_CONFIG value is 0x804c02
408 12:59:49.514646 PCI: 00:07.0 disabled by fw_config
409 12:59:49.514701 PCI: 00:07.1 disabled by fw_config
410 12:59:49.514755 PCI: 00:0d.2 disabled by fw_config
411 12:59:49.514810 PCI: 00:1c.7 disabled by fw_config
412 12:59:49.514865 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
413 12:59:49.514922 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 12:59:49.514977 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
415 12:59:49.515033 GENERIC: 0.0 disabled by fw_config
416 12:59:49.515087 GENERIC: 1.0 disabled by fw_config
417 12:59:49.515142 fw_config match found: DB_USB=USB3_ACTIVE
418 12:59:49.515197 fw_config match found: DB_USB=USB3_ACTIVE
419 12:59:49.515253 fw_config match found: DB_USB=USB3_ACTIVE
420 12:59:49.515308 fw_config match found: DB_USB=USB3_ACTIVE
421 12:59:49.515363 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
422 12:59:49.515418 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
423 12:59:49.515474 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
424 12:59:49.515528 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
425 12:59:49.515583 microcode: sig=0x806c1 pf=0x80 revision=0x86
426 12:59:49.515638 microcode: Update skipped, already up-to-date
427 12:59:49.515693 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
428 12:59:49.515748 Detected 4 core, 8 thread CPU.
429 12:59:49.515802 Setting up SMI for CPU
430 12:59:49.515857 IED base = 0x7b400000
431 12:59:49.515911 IED size = 0x00400000
432 12:59:49.515965 Will perform SMM setup.
433 12:59:49.516019 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
434 12:59:49.516076 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
435 12:59:49.516130 Processing 16 relocs. Offset value of 0x00030000
436 12:59:49.516185 Attempting to start 7 APs
437 12:59:49.516242 Waiting for 10ms after sending INIT.
438 12:59:49.516297 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
439 12:59:49.516352 AP: slot 2 apic_id 3.
440 12:59:49.516405 AP: slot 6 apic_id 2.
441 12:59:49.516459 AP: slot 5 apic_id 4.
442 12:59:49.516512 AP: slot 4 apic_id 5.
443 12:59:49.516566 done.
444 12:59:49.516621 AP: slot 3 apic_id 6.
445 12:59:49.516675 AP: slot 7 apic_id 7.
446 12:59:49.516729 Waiting for 2nd SIPI to complete...done.
447 12:59:49.516784 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
448 12:59:49.516839 Processing 13 relocs. Offset value of 0x00038000
449 12:59:49.516893 Unable to locate Global NVS
450 12:59:49.516948 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
451 12:59:49.517003 Installing permanent SMM handler to 0x7b000000
452 12:59:49.517058 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
453 12:59:49.517113 Processing 794 relocs. Offset value of 0x7b010000
454 12:59:49.517371 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
455 12:59:49.517436 Processing 13 relocs. Offset value of 0x7b008000
456 12:59:49.517493 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
457 12:59:49.517548 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
458 12:59:49.517603 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
459 12:59:49.517658 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
460 12:59:49.517713 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
461 12:59:49.517768 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
462 12:59:49.517823 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
463 12:59:49.517878 Unable to locate Global NVS
464 12:59:49.517933 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
465 12:59:49.517989 Clearing SMI status registers
466 12:59:49.518043 SMI_STS: PM1
467 12:59:49.518098 PM1_STS: PWRBTN
468 12:59:49.518152 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
469 12:59:49.518208 In relocation handler: CPU 0
470 12:59:49.518263 New SMBASE=0x7b000000 IEDBASE=0x7b400000
471 12:59:49.518318 Writing SMRR. base = 0x7b000006, mask=0xff800c00
472 12:59:49.518373 Relocation complete.
473 12:59:49.518427 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
474 12:59:49.518482 In relocation handler: CPU 1
475 12:59:49.518537 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
476 12:59:49.518592 Relocation complete.
477 12:59:49.518647 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
478 12:59:49.518701 In relocation handler: CPU 4
479 12:59:49.518755 New SMBASE=0x7afff000 IEDBASE=0x7b400000
480 12:59:49.518811 Relocation complete.
481 12:59:49.518865 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
482 12:59:49.518919 In relocation handler: CPU 5
483 12:59:49.518974 New SMBASE=0x7affec00 IEDBASE=0x7b400000
484 12:59:49.519029 Writing SMRR. base = 0x7b000006, mask=0xff800c00
485 12:59:49.519083 Relocation complete.
486 12:59:49.519138 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
487 12:59:49.519193 In relocation handler: CPU 6
488 12:59:49.519248 New SMBASE=0x7affe800 IEDBASE=0x7b400000
489 12:59:49.519303 Writing SMRR. base = 0x7b000006, mask=0xff800c00
490 12:59:49.519358 Relocation complete.
491 12:59:49.519412 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
492 12:59:49.519467 In relocation handler: CPU 2
493 12:59:49.519522 New SMBASE=0x7afff800 IEDBASE=0x7b400000
494 12:59:49.519578 Relocation complete.
495 12:59:49.519632 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
496 12:59:49.519686 In relocation handler: CPU 3
497 12:59:49.519739 New SMBASE=0x7afff400 IEDBASE=0x7b400000
498 12:59:49.519794 Writing SMRR. base = 0x7b000006, mask=0xff800c00
499 12:59:49.519848 Relocation complete.
500 12:59:49.519902 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
501 12:59:49.519956 In relocation handler: CPU 7
502 12:59:49.520010 New SMBASE=0x7affe400 IEDBASE=0x7b400000
503 12:59:49.520064 Relocation complete.
504 12:59:49.520118 Initializing CPU #0
505 12:59:49.520172 CPU: vendor Intel device 806c1
506 12:59:49.520227 CPU: family 06, model 8c, stepping 01
507 12:59:49.520281 Clearing out pending MCEs
508 12:59:49.520336 Setting up local APIC...
509 12:59:49.520390 apic_id: 0x00 done.
510 12:59:49.520444 Turbo is available but hidden
511 12:59:49.520499 Turbo is available and visible
512 12:59:49.520554 microcode: Update skipped, already up-to-date
513 12:59:49.520609 CPU #0 initialized
514 12:59:49.520664 Initializing CPU #1
515 12:59:49.520718 Initializing CPU #3
516 12:59:49.520773 Initializing CPU #2
517 12:59:49.520827 Initializing CPU #6
518 12:59:49.520881 CPU: vendor Intel device 806c1
519 12:59:49.520936 CPU: family 06, model 8c, stepping 01
520 12:59:49.520991 CPU: vendor Intel device 806c1
521 12:59:49.521045 CPU: family 06, model 8c, stepping 01
522 12:59:49.521100 Initializing CPU #7
523 12:59:49.521155 Clearing out pending MCEs
524 12:59:49.521209 CPU: vendor Intel device 806c1
525 12:59:49.521264 CPU: family 06, model 8c, stepping 01
526 12:59:49.521348 Setting up local APIC...
527 12:59:49.521419 CPU: vendor Intel device 806c1
528 12:59:49.521474 CPU: family 06, model 8c, stepping 01
529 12:59:49.521529 Clearing out pending MCEs
530 12:59:49.521583 Clearing out pending MCEs
531 12:59:49.521637 Setting up local APIC...
532 12:59:49.521691 Initializing CPU #4
533 12:59:49.521745 Initializing CPU #5
534 12:59:49.521799 CPU: vendor Intel device 806c1
535 12:59:49.521854 CPU: family 06, model 8c, stepping 01
536 12:59:49.521909 CPU: vendor Intel device 806c1
537 12:59:49.521964 CPU: family 06, model 8c, stepping 01
538 12:59:49.522018 Clearing out pending MCEs
539 12:59:49.522073 Clearing out pending MCEs
540 12:59:49.522127 Setting up local APIC...
541 12:59:49.522182 apic_id: 0x06 done.
542 12:59:49.522236 Clearing out pending MCEs
543 12:59:49.522290 microcode: Update skipped, already up-to-date
544 12:59:49.522345 Setting up local APIC...
545 12:59:49.522399 Setting up local APIC...
546 12:59:49.522453 CPU #3 initialized
547 12:59:49.522508 apic_id: 0x07 done.
548 12:59:49.522561 apic_id: 0x03 done.
549 12:59:49.522615 Setting up local APIC...
550 12:59:49.522669 apic_id: 0x05 done.
551 12:59:49.522723 apic_id: 0x04 done.
552 12:59:49.522777 microcode: Update skipped, already up-to-date
553 12:59:49.522832 microcode: Update skipped, already up-to-date
554 12:59:49.522887 CPU #4 initialized
555 12:59:49.522941 CPU #5 initialized
556 12:59:49.522995 microcode: Update skipped, already up-to-date
557 12:59:49.523050 apic_id: 0x02 done.
558 12:59:49.523104 CPU #2 initialized
559 12:59:49.523158 microcode: Update skipped, already up-to-date
560 12:59:49.523212 CPU: vendor Intel device 806c1
561 12:59:49.523266 CPU: family 06, model 8c, stepping 01
562 12:59:49.523321 Clearing out pending MCEs
563 12:59:49.523375 CPU #6 initialized
564 12:59:49.523429 microcode: Update skipped, already up-to-date
565 12:59:49.523485 Setting up local APIC...
566 12:59:49.523539 CPU #7 initialized
567 12:59:49.523593 apic_id: 0x01 done.
568 12:59:49.523853 microcode: Update skipped, already up-to-date
569 12:59:49.523915 CPU #1 initialized
570 12:59:49.523970 bsp_do_flight_plan done after 454 msecs.
571 12:59:49.524026 CPU: frequency set to 4000 MHz
572 12:59:49.524080 Enabling SMIs.
573 12:59:49.524135 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
574 12:59:49.524190 SATAXPCIE1 indicates PCIe NVMe is present
575 12:59:49.524245 Probing TPM: done!
576 12:59:49.524300 Connected to device vid:did:rid of 1ae0:0028:00
577 12:59:49.524355 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.153/cr50_v3.94_pp.113-620c9b9523
578 12:59:49.524411 Initialized TPM device CR50 revision 0
579 12:59:49.524466 Enabling S0i3.4
580 12:59:49.524521 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
581 12:59:49.524576 Found a VBT of 8704 bytes after decompression
582 12:59:49.524632 cse_lite: CSE RO boot. HybridStorageMode disabled
583 12:59:49.524687 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
584 12:59:49.524742 FSPS returned 0
585 12:59:49.524797 Executing Phase 1 of FspMultiPhaseSiInit
586 12:59:49.524852 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
587 12:59:49.524909 port C0 DISC req: usage 1 usb3 1 usb2 5
588 12:59:49.524963 Raw Buffer output 0 00000511
589 12:59:49.525018 Raw Buffer output 1 00000000
590 12:59:49.525072 pmc_send_ipc_cmd succeeded
591 12:59:49.525126 port C1 DISC req: usage 1 usb3 2 usb2 3
592 12:59:49.525181 Raw Buffer output 0 00000321
593 12:59:49.525236 Raw Buffer output 1 00000000
594 12:59:49.525290 pmc_send_ipc_cmd succeeded
595 12:59:49.525393 Detected 4 core, 8 thread CPU.
596 12:59:49.525449 Detected 4 core, 8 thread CPU.
597 12:59:49.525504 Display FSP Version Info HOB
598 12:59:49.525559 Reference Code - CPU = a.0.4c.31
599 12:59:49.525613 uCode Version = 0.0.0.86
600 12:59:49.525668 TXT ACM version = ff.ff.ff.ffff
601 12:59:49.525724 Reference Code - ME = a.0.4c.31
602 12:59:49.525779 MEBx version = 0.0.0.0
603 12:59:49.525833 ME Firmware Version = Consumer SKU
604 12:59:49.525888 Reference Code - PCH = a.0.4c.31
605 12:59:49.525944 PCH-CRID Status = Disabled
606 12:59:49.525998 PCH-CRID Original Value = ff.ff.ff.ffff
607 12:59:49.526053 PCH-CRID New Value = ff.ff.ff.ffff
608 12:59:49.526108 OPROM - RST - RAID = ff.ff.ff.ffff
609 12:59:49.526163 PCH Hsio Version = 4.0.0.0
610 12:59:49.526217 Reference Code - SA - System Agent = a.0.4c.31
611 12:59:49.526272 Reference Code - MRC = 2.0.0.1
612 12:59:49.526390 SA - PCIe Version = a.0.4c.31
613 12:59:49.526444 SA-CRID Status = Disabled
614 12:59:49.526498 SA-CRID Original Value = 0.0.0.1
615 12:59:49.526553 SA-CRID New Value = 0.0.0.1
616 12:59:49.526607 OPROM - VBIOS = ff.ff.ff.ffff
617 12:59:49.526662 IO Manageability Engine FW Version = 11.1.4.0
618 12:59:49.526716 PHY Build Version = 0.0.0.e0
619 12:59:49.526771 Thunderbolt(TM) FW Version = 0.0.0.0
620 12:59:49.526826 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
621 12:59:49.526882 ITSS IRQ Polarities Before:
622 12:59:49.526936 IPC0: 0xffffffff
623 12:59:49.526991 IPC1: 0xffffffff
624 12:59:49.527045 IPC2: 0xffffffff
625 12:59:49.527099 IPC3: 0xffffffff
626 12:59:49.527153 ITSS IRQ Polarities After:
627 12:59:49.527207 IPC0: 0xffffffff
628 12:59:49.527261 IPC1: 0xffffffff
629 12:59:49.527315 IPC2: 0xffffffff
630 12:59:49.527368 IPC3: 0xffffffff
631 12:59:49.527422 Found PCIe Root Port #9 at PCI: 00:1d.0.
632 12:59:49.527478 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
633 12:59:49.527535 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
634 12:59:49.527590 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
635 12:59:49.527647 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
636 12:59:49.527721 Enumerating buses...
637 12:59:49.527791 Show all devs... Before device enumeration.
638 12:59:49.527846 Root Device: enabled 1
639 12:59:49.527900 DOMAIN: 0000: enabled 1
640 12:59:49.527954 CPU_CLUSTER: 0: enabled 1
641 12:59:49.528008 PCI: 00:00.0: enabled 1
642 12:59:49.528062 PCI: 00:02.0: enabled 1
643 12:59:49.528117 PCI: 00:04.0: enabled 1
644 12:59:49.528170 PCI: 00:05.0: enabled 1
645 12:59:49.528224 PCI: 00:06.0: enabled 0
646 12:59:49.528278 PCI: 00:07.0: enabled 0
647 12:59:49.528333 PCI: 00:07.1: enabled 0
648 12:59:49.528387 PCI: 00:07.2: enabled 0
649 12:59:49.528441 PCI: 00:07.3: enabled 0
650 12:59:49.528495 PCI: 00:08.0: enabled 1
651 12:59:49.528549 PCI: 00:09.0: enabled 0
652 12:59:49.528603 PCI: 00:0a.0: enabled 0
653 12:59:49.528657 PCI: 00:0d.0: enabled 1
654 12:59:49.528711 PCI: 00:0d.1: enabled 0
655 12:59:49.528765 PCI: 00:0d.2: enabled 0
656 12:59:49.528820 PCI: 00:0d.3: enabled 0
657 12:59:49.528873 PCI: 00:0e.0: enabled 0
658 12:59:49.528926 PCI: 00:10.2: enabled 1
659 12:59:49.528979 PCI: 00:10.6: enabled 0
660 12:59:49.529033 PCI: 00:10.7: enabled 0
661 12:59:49.529087 PCI: 00:12.0: enabled 0
662 12:59:49.529141 PCI: 00:12.6: enabled 0
663 12:59:49.529195 PCI: 00:13.0: enabled 0
664 12:59:49.529265 PCI: 00:14.0: enabled 1
665 12:59:49.529344 PCI: 00:14.1: enabled 0
666 12:59:49.529399 PCI: 00:14.2: enabled 1
667 12:59:49.529453 PCI: 00:14.3: enabled 1
668 12:59:49.529508 PCI: 00:15.0: enabled 1
669 12:59:49.529562 PCI: 00:15.1: enabled 1
670 12:59:49.529616 PCI: 00:15.2: enabled 1
671 12:59:49.529670 PCI: 00:15.3: enabled 1
672 12:59:49.529725 PCI: 00:16.0: enabled 1
673 12:59:49.529779 PCI: 00:16.1: enabled 0
674 12:59:49.529833 PCI: 00:16.2: enabled 0
675 12:59:49.529888 PCI: 00:16.3: enabled 0
676 12:59:49.529942 PCI: 00:16.4: enabled 0
677 12:59:49.529997 PCI: 00:16.5: enabled 0
678 12:59:49.530051 PCI: 00:17.0: enabled 1
679 12:59:49.530105 PCI: 00:19.0: enabled 0
680 12:59:49.530159 PCI: 00:19.1: enabled 1
681 12:59:49.530214 PCI: 00:19.2: enabled 0
682 12:59:49.530268 PCI: 00:1c.0: enabled 1
683 12:59:49.530322 PCI: 00:1c.1: enabled 0
684 12:59:49.530376 PCI: 00:1c.2: enabled 0
685 12:59:49.530431 PCI: 00:1c.3: enabled 0
686 12:59:49.530484 PCI: 00:1c.4: enabled 0
687 12:59:49.530538 PCI: 00:1c.5: enabled 0
688 12:59:49.530592 PCI: 00:1c.6: enabled 1
689 12:59:49.530646 PCI: 00:1c.7: enabled 0
690 12:59:49.530700 PCI: 00:1d.0: enabled 1
691 12:59:49.530754 PCI: 00:1d.1: enabled 0
692 12:59:49.531000 PCI: 00:1d.2: enabled 1
693 12:59:49.531062 PCI: 00:1d.3: enabled 0
694 12:59:49.531118 PCI: 00:1e.0: enabled 1
695 12:59:49.531173 PCI: 00:1e.1: enabled 0
696 12:59:49.531228 PCI: 00:1e.2: enabled 1
697 12:59:49.531282 PCI: 00:1e.3: enabled 1
698 12:59:49.531337 PCI: 00:1f.0: enabled 1
699 12:59:49.531391 PCI: 00:1f.1: enabled 0
700 12:59:49.531445 PCI: 00:1f.2: enabled 1
701 12:59:49.531499 PCI: 00:1f.3: enabled 1
702 12:59:49.531553 PCI: 00:1f.4: enabled 0
703 12:59:49.531607 PCI: 00:1f.5: enabled 1
704 12:59:49.531661 PCI: 00:1f.6: enabled 0
705 12:59:49.531715 PCI: 00:1f.7: enabled 0
706 12:59:49.531770 APIC: 00: enabled 1
707 12:59:49.531824 GENERIC: 0.0: enabled 1
708 12:59:49.531879 GENERIC: 0.0: enabled 1
709 12:59:49.531933 GENERIC: 1.0: enabled 1
710 12:59:49.531987 GENERIC: 0.0: enabled 1
711 12:59:49.532041 GENERIC: 1.0: enabled 1
712 12:59:49.532095 USB0 port 0: enabled 1
713 12:59:49.532148 GENERIC: 0.0: enabled 1
714 12:59:49.532202 USB0 port 0: enabled 1
715 12:59:49.532257 GENERIC: 0.0: enabled 1
716 12:59:49.532310 I2C: 00:1a: enabled 1
717 12:59:49.532365 I2C: 00:31: enabled 1
718 12:59:49.532419 I2C: 00:32: enabled 1
719 12:59:49.532473 I2C: 00:10: enabled 1
720 12:59:49.532526 I2C: 00:15: enabled 1
721 12:59:49.532580 GENERIC: 0.0: enabled 0
722 12:59:49.532634 GENERIC: 1.0: enabled 0
723 12:59:49.532688 GENERIC: 0.0: enabled 1
724 12:59:49.532742 SPI: 00: enabled 1
725 12:59:49.532796 SPI: 00: enabled 1
726 12:59:49.532850 PNP: 0c09.0: enabled 1
727 12:59:49.532904 GENERIC: 0.0: enabled 1
728 12:59:49.532957 USB3 port 0: enabled 1
729 12:59:49.533011 USB3 port 1: enabled 1
730 12:59:49.533065 USB3 port 2: enabled 0
731 12:59:49.533120 USB3 port 3: enabled 0
732 12:59:49.533174 USB2 port 0: enabled 0
733 12:59:49.533228 USB2 port 1: enabled 1
734 12:59:49.533282 USB2 port 2: enabled 1
735 12:59:49.533375 USB2 port 3: enabled 0
736 12:59:49.533430 USB2 port 4: enabled 1
737 12:59:49.533485 USB2 port 5: enabled 0
738 12:59:49.533539 USB2 port 6: enabled 0
739 12:59:49.533593 USB2 port 7: enabled 0
740 12:59:49.533647 USB2 port 8: enabled 0
741 12:59:49.533701 USB2 port 9: enabled 0
742 12:59:49.533755 USB3 port 0: enabled 0
743 12:59:49.533809 USB3 port 1: enabled 1
744 12:59:49.533863 USB3 port 2: enabled 0
745 12:59:49.533917 USB3 port 3: enabled 0
746 12:59:49.533972 GENERIC: 0.0: enabled 1
747 12:59:49.534027 GENERIC: 1.0: enabled 1
748 12:59:49.534081 APIC: 01: enabled 1
749 12:59:49.534135 APIC: 03: enabled 1
750 12:59:49.534189 APIC: 06: enabled 1
751 12:59:49.534243 APIC: 05: enabled 1
752 12:59:49.534297 APIC: 04: enabled 1
753 12:59:49.534350 APIC: 02: enabled 1
754 12:59:49.534404 APIC: 07: enabled 1
755 12:59:49.534458 Compare with tree...
756 12:59:49.534512 Root Device: enabled 1
757 12:59:49.534566 DOMAIN: 0000: enabled 1
758 12:59:49.534620 PCI: 00:00.0: enabled 1
759 12:59:49.534674 PCI: 00:02.0: enabled 1
760 12:59:49.534728 PCI: 00:04.0: enabled 1
761 12:59:49.534781 GENERIC: 0.0: enabled 1
762 12:59:49.534835 PCI: 00:05.0: enabled 1
763 12:59:49.534889 PCI: 00:06.0: enabled 0
764 12:59:49.534943 PCI: 00:07.0: enabled 0
765 12:59:49.534997 GENERIC: 0.0: enabled 1
766 12:59:49.535052 PCI: 00:07.1: enabled 0
767 12:59:49.535106 GENERIC: 1.0: enabled 1
768 12:59:49.535161 PCI: 00:07.2: enabled 0
769 12:59:49.535216 GENERIC: 0.0: enabled 1
770 12:59:49.535270 PCI: 00:07.3: enabled 0
771 12:59:49.535324 GENERIC: 1.0: enabled 1
772 12:59:49.535379 PCI: 00:08.0: enabled 1
773 12:59:49.535433 PCI: 00:09.0: enabled 0
774 12:59:49.535487 PCI: 00:0a.0: enabled 0
775 12:59:49.535540 PCI: 00:0d.0: enabled 1
776 12:59:49.535595 USB0 port 0: enabled 1
777 12:59:49.535649 USB3 port 0: enabled 1
778 12:59:49.535702 USB3 port 1: enabled 1
779 12:59:49.535756 USB3 port 2: enabled 0
780 12:59:49.535810 USB3 port 3: enabled 0
781 12:59:49.535864 PCI: 00:0d.1: enabled 0
782 12:59:49.535918 PCI: 00:0d.2: enabled 0
783 12:59:49.535972 GENERIC: 0.0: enabled 1
784 12:59:49.536027 PCI: 00:0d.3: enabled 0
785 12:59:49.536080 PCI: 00:0e.0: enabled 0
786 12:59:49.536134 PCI: 00:10.2: enabled 1
787 12:59:49.536189 PCI: 00:10.6: enabled 0
788 12:59:49.536243 PCI: 00:10.7: enabled 0
789 12:59:49.536297 PCI: 00:12.0: enabled 0
790 12:59:49.536351 PCI: 00:12.6: enabled 0
791 12:59:49.536405 PCI: 00:13.0: enabled 0
792 12:59:49.536459 PCI: 00:14.0: enabled 1
793 12:59:49.536513 USB0 port 0: enabled 1
794 12:59:49.536567 USB2 port 0: enabled 0
795 12:59:49.536621 USB2 port 1: enabled 1
796 12:59:49.536675 USB2 port 2: enabled 1
797 12:59:49.536729 USB2 port 3: enabled 0
798 12:59:49.536783 USB2 port 4: enabled 1
799 12:59:49.536841 USB2 port 5: enabled 0
800 12:59:49.536895 USB2 port 6: enabled 0
801 12:59:49.536949 USB2 port 7: enabled 0
802 12:59:49.537003 USB2 port 8: enabled 0
803 12:59:49.537057 USB2 port 9: enabled 0
804 12:59:49.537111 USB3 port 0: enabled 0
805 12:59:49.537166 USB3 port 1: enabled 1
806 12:59:49.537220 USB3 port 2: enabled 0
807 12:59:49.537274 USB3 port 3: enabled 0
808 12:59:49.537371 PCI: 00:14.1: enabled 0
809 12:59:49.537426 PCI: 00:14.2: enabled 1
810 12:59:49.537481 PCI: 00:14.3: enabled 1
811 12:59:49.537535 GENERIC: 0.0: enabled 1
812 12:59:49.537590 PCI: 00:15.0: enabled 1
813 12:59:49.537643 I2C: 00:1a: enabled 1
814 12:59:49.537698 I2C: 00:31: enabled 1
815 12:59:49.537753 I2C: 00:32: enabled 1
816 12:59:49.537807 PCI: 00:15.1: enabled 1
817 12:59:49.537862 I2C: 00:10: enabled 1
818 12:59:49.537916 PCI: 00:15.2: enabled 1
819 12:59:49.537970 PCI: 00:15.3: enabled 1
820 12:59:49.538025 PCI: 00:16.0: enabled 1
821 12:59:49.538079 PCI: 00:16.1: enabled 0
822 12:59:49.538134 PCI: 00:16.2: enabled 0
823 12:59:49.538188 PCI: 00:16.3: enabled 0
824 12:59:49.538242 PCI: 00:16.4: enabled 0
825 12:59:49.538296 PCI: 00:16.5: enabled 0
826 12:59:49.538349 PCI: 00:17.0: enabled 1
827 12:59:49.538403 PCI: 00:19.0: enabled 0
828 12:59:49.538456 PCI: 00:19.1: enabled 1
829 12:59:49.538510 I2C: 00:15: enabled 1
830 12:59:49.538564 PCI: 00:19.2: enabled 0
831 12:59:49.538618 PCI: 00:1d.0: enabled 1
832 12:59:49.538672 GENERIC: 0.0: enabled 1
833 12:59:49.538726 PCI: 00:1e.0: enabled 1
834 12:59:49.538780 PCI: 00:1e.1: enabled 0
835 12:59:49.538834 PCI: 00:1e.2: enabled 1
836 12:59:49.538888 SPI: 00: enabled 1
837 12:59:49.538943 PCI: 00:1e.3: enabled 1
838 12:59:49.538997 SPI: 00: enabled 1
839 12:59:49.539051 PCI: 00:1f.0: enabled 1
840 12:59:49.539105 PNP: 0c09.0: enabled 1
841 12:59:49.539160 PCI: 00:1f.1: enabled 0
842 12:59:49.539214 PCI: 00:1f.2: enabled 1
843 12:59:49.539268 GENERIC: 0.0: enabled 1
844 12:59:49.539322 GENERIC: 0.0: enabled 1
845 12:59:49.539376 GENERIC: 1.0: enabled 1
846 12:59:49.539430 PCI: 00:1f.3: enabled 1
847 12:59:49.539484 PCI: 00:1f.4: enabled 0
848 12:59:49.539538 PCI: 00:1f.5: enabled 1
849 12:59:49.539592 PCI: 00:1f.6: enabled 0
850 12:59:49.539852 PCI: 00:1f.7: enabled 0
851 12:59:49.539929 CPU_CLUSTER: 0: enabled 1
852 12:59:49.539985 APIC: 00: enabled 1
853 12:59:49.540039 APIC: 01: enabled 1
854 12:59:49.540094 APIC: 03: enabled 1
855 12:59:49.540148 APIC: 06: enabled 1
856 12:59:49.540202 APIC: 05: enabled 1
857 12:59:49.540258 APIC: 04: enabled 1
858 12:59:49.540312 APIC: 02: enabled 1
859 12:59:49.540367 APIC: 07: enabled 1
860 12:59:49.540421 Root Device scanning...
861 12:59:49.540475 scan_static_bus for Root Device
862 12:59:49.540530 DOMAIN: 0000 enabled
863 12:59:49.540584 CPU_CLUSTER: 0 enabled
864 12:59:49.540638 DOMAIN: 0000 scanning...
865 12:59:49.540693 PCI: pci_scan_bus for bus 00
866 12:59:49.540748 PCI: 00:00.0 [8086/0000] ops
867 12:59:49.540802 PCI: 00:00.0 [8086/9a12] enabled
868 12:59:49.540857 PCI: 00:02.0 [8086/0000] bus ops
869 12:59:49.540912 PCI: 00:02.0 [8086/9a40] enabled
870 12:59:49.540967 PCI: 00:04.0 [8086/0000] bus ops
871 12:59:49.541022 PCI: 00:04.0 [8086/9a03] enabled
872 12:59:49.541076 PCI: 00:05.0 [8086/9a19] enabled
873 12:59:49.541131 PCI: 00:07.0 [0000/0000] hidden
874 12:59:49.541185 PCI: 00:08.0 [8086/9a11] enabled
875 12:59:49.541239 PCI: 00:0a.0 [8086/9a0d] disabled
876 12:59:49.541293 PCI: 00:0d.0 [8086/0000] bus ops
877 12:59:49.541389 PCI: 00:0d.0 [8086/9a13] enabled
878 12:59:49.541444 PCI: 00:14.0 [8086/0000] bus ops
879 12:59:49.541498 PCI: 00:14.0 [8086/a0ed] enabled
880 12:59:49.541553 PCI: 00:14.2 [8086/a0ef] enabled
881 12:59:49.541607 PCI: 00:14.3 [8086/0000] bus ops
882 12:59:49.541661 PCI: 00:14.3 [8086/a0f0] enabled
883 12:59:49.541716 PCI: 00:15.0 [8086/0000] bus ops
884 12:59:49.541770 PCI: 00:15.0 [8086/a0e8] enabled
885 12:59:49.541825 PCI: 00:15.1 [8086/0000] bus ops
886 12:59:49.541878 PCI: 00:15.1 [8086/a0e9] enabled
887 12:59:49.541933 PCI: 00:15.2 [8086/0000] bus ops
888 12:59:49.541987 PCI: 00:15.2 [8086/a0ea] enabled
889 12:59:49.542041 PCI: 00:15.3 [8086/0000] bus ops
890 12:59:49.542095 PCI: 00:15.3 [8086/a0eb] enabled
891 12:59:49.542149 PCI: 00:16.0 [8086/0000] ops
892 12:59:49.542204 PCI: 00:16.0 [8086/a0e0] enabled
893 12:59:49.542258 PCI: Static device PCI: 00:17.0 not found, disabling it.
894 12:59:49.542313 PCI: 00:19.0 [8086/0000] bus ops
895 12:59:49.542367 PCI: 00:19.0 [8086/a0c5] disabled
896 12:59:49.542421 PCI: 00:19.1 [8086/0000] bus ops
897 12:59:49.542475 PCI: 00:19.1 [8086/a0c6] enabled
898 12:59:49.542530 PCI: 00:1d.0 [8086/0000] bus ops
899 12:59:49.542584 PCI: 00:1d.0 [8086/a0b0] enabled
900 12:59:49.542639 PCI: 00:1e.0 [8086/0000] ops
901 12:59:49.542693 PCI: 00:1e.0 [8086/a0a8] enabled
902 12:59:49.542748 PCI: 00:1e.2 [8086/0000] bus ops
903 12:59:49.542802 PCI: 00:1e.2 [8086/a0aa] enabled
904 12:59:49.542856 PCI: 00:1e.3 [8086/0000] bus ops
905 12:59:49.542911 PCI: 00:1e.3 [8086/a0ab] enabled
906 12:59:49.542965 PCI: 00:1f.0 [8086/0000] bus ops
907 12:59:49.543019 PCI: 00:1f.0 [8086/a087] enabled
908 12:59:49.543074 RTC Init
909 12:59:49.543128 Set power on after power failure.
910 12:59:49.543182 Disabling Deep S3
911 12:59:49.543236 Disabling Deep S3
912 12:59:49.543291 Disabling Deep S4
913 12:59:49.543345 Disabling Deep S4
914 12:59:49.543399 Disabling Deep S5
915 12:59:49.543453 Disabling Deep S5
916 12:59:49.543508 PCI: 00:1f.2 [0000/0000] hidden
917 12:59:49.543562 PCI: 00:1f.3 [8086/0000] bus ops
918 12:59:49.543617 PCI: 00:1f.3 [8086/a0c8] enabled
919 12:59:49.543671 PCI: 00:1f.5 [8086/0000] bus ops
920 12:59:49.543725 PCI: 00:1f.5 [8086/a0a4] enabled
921 12:59:49.543780 PCI: Leftover static devices:
922 12:59:49.543834 PCI: 00:10.2
923 12:59:49.543888 PCI: 00:10.6
924 12:59:49.543942 PCI: 00:10.7
925 12:59:49.543997 PCI: 00:06.0
926 12:59:49.544051 PCI: 00:07.1
927 12:59:49.544105 PCI: 00:07.2
928 12:59:49.544159 PCI: 00:07.3
929 12:59:49.544213 PCI: 00:09.0
930 12:59:49.544266 PCI: 00:0d.1
931 12:59:49.544320 PCI: 00:0d.2
932 12:59:49.544374 PCI: 00:0d.3
933 12:59:49.544428 PCI: 00:0e.0
934 12:59:49.544482 PCI: 00:12.0
935 12:59:49.544536 PCI: 00:12.6
936 12:59:49.544590 PCI: 00:13.0
937 12:59:49.544645 PCI: 00:14.1
938 12:59:49.544698 PCI: 00:16.1
939 12:59:49.544753 PCI: 00:16.2
940 12:59:49.544807 PCI: 00:16.3
941 12:59:49.544863 PCI: 00:16.4
942 12:59:49.544916 PCI: 00:16.5
943 12:59:49.544970 PCI: 00:17.0
944 12:59:49.545023 PCI: 00:19.2
945 12:59:49.545077 PCI: 00:1e.1
946 12:59:49.545130 PCI: 00:1f.1
947 12:59:49.545185 PCI: 00:1f.4
948 12:59:49.545239 PCI: 00:1f.6
949 12:59:49.545293 PCI: 00:1f.7
950 12:59:49.545391 PCI: Check your devicetree.cb.
951 12:59:49.545447 PCI: 00:02.0 scanning...
952 12:59:49.545502 scan_generic_bus for PCI: 00:02.0
953 12:59:49.545556 scan_generic_bus for PCI: 00:02.0 done
954 12:59:49.545611 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
955 12:59:49.545665 PCI: 00:04.0 scanning...
956 12:59:49.545720 scan_generic_bus for PCI: 00:04.0
957 12:59:49.545775 GENERIC: 0.0 enabled
958 12:59:49.545829 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
959 12:59:49.545884 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
960 12:59:49.545939 PCI: 00:0d.0 scanning...
961 12:59:49.545994 scan_static_bus for PCI: 00:0d.0
962 12:59:49.546048 USB0 port 0 enabled
963 12:59:49.546103 USB0 port 0 scanning...
964 12:59:49.546156 scan_static_bus for USB0 port 0
965 12:59:49.546210 USB3 port 0 enabled
966 12:59:49.546264 USB3 port 1 enabled
967 12:59:49.546318 USB3 port 2 disabled
968 12:59:49.546372 USB3 port 3 disabled
969 12:59:49.546427 USB3 port 0 scanning...
970 12:59:49.546481 scan_static_bus for USB3 port 0
971 12:59:49.546535 scan_static_bus for USB3 port 0 done
972 12:59:49.546590 scan_bus: bus USB3 port 0 finished in 6 msecs
973 12:59:49.546645 USB3 port 1 scanning...
974 12:59:49.546699 scan_static_bus for USB3 port 1
975 12:59:49.546753 scan_static_bus for USB3 port 1 done
976 12:59:49.546808 scan_bus: bus USB3 port 1 finished in 6 msecs
977 12:59:49.546862 scan_static_bus for USB0 port 0 done
978 12:59:49.546916 scan_bus: bus USB0 port 0 finished in 43 msecs
979 12:59:49.546971 scan_static_bus for PCI: 00:0d.0 done
980 12:59:49.547025 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
981 12:59:49.547080 PCI: 00:14.0 scanning...
982 12:59:49.547134 scan_static_bus for PCI: 00:14.0
983 12:59:49.547188 USB0 port 0 enabled
984 12:59:49.547242 USB0 port 0 scanning...
985 12:59:49.547296 scan_static_bus for USB0 port 0
986 12:59:49.547387 USB2 port 0 disabled
987 12:59:49.547472 USB2 port 1 enabled
988 12:59:49.547556 USB2 port 2 enabled
989 12:59:49.547643 USB2 port 3 disabled
990 12:59:49.547702 USB2 port 4 enabled
991 12:59:49.547757 USB2 port 5 disabled
992 12:59:49.547812 USB2 port 6 disabled
993 12:59:49.547866 USB2 port 7 disabled
994 12:59:49.547921 USB2 port 8 disabled
995 12:59:49.547975 USB2 port 9 disabled
996 12:59:49.548029 USB3 port 0 disabled
997 12:59:49.548083 USB3 port 1 enabled
998 12:59:49.548137 USB3 port 2 disabled
999 12:59:49.548192 USB3 port 3 disabled
1000 12:59:49.548436 USB2 port 1 scanning...
1001 12:59:49.548496 scan_static_bus for USB2 port 1
1002 12:59:49.548553 scan_static_bus for USB2 port 1 done
1003 12:59:49.548607 scan_bus: bus USB2 port 1 finished in 6 msecs
1004 12:59:49.548663 USB2 port 2 scanning...
1005 12:59:49.548718 scan_static_bus for USB2 port 2
1006 12:59:49.548773 scan_static_bus for USB2 port 2 done
1007 12:59:49.548827 scan_bus: bus USB2 port 2 finished in 6 msecs
1008 12:59:49.548882 USB2 port 4 scanning...
1009 12:59:49.548937 scan_static_bus for USB2 port 4
1010 12:59:49.548991 scan_static_bus for USB2 port 4 done
1011 12:59:49.549046 scan_bus: bus USB2 port 4 finished in 6 msecs
1012 12:59:49.549101 USB3 port 1 scanning...
1013 12:59:49.549155 scan_static_bus for USB3 port 1
1014 12:59:49.549210 scan_static_bus for USB3 port 1 done
1015 12:59:49.549264 scan_bus: bus USB3 port 1 finished in 6 msecs
1016 12:59:49.549364 scan_static_bus for USB0 port 0 done
1017 12:59:49.549480 scan_bus: bus USB0 port 0 finished in 93 msecs
1018 12:59:49.549539 scan_static_bus for PCI: 00:14.0 done
1019 12:59:49.549595 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1020 12:59:49.549651 PCI: 00:14.3 scanning...
1021 12:59:49.549707 scan_static_bus for PCI: 00:14.3
1022 12:59:49.549762 GENERIC: 0.0 enabled
1023 12:59:49.549816 scan_static_bus for PCI: 00:14.3 done
1024 12:59:49.549871 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1025 12:59:49.549937 PCI: 00:15.0 scanning...
1026 12:59:49.549994 scan_static_bus for PCI: 00:15.0
1027 12:59:49.550050 I2C: 00:1a enabled
1028 12:59:49.550105 I2C: 00:31 enabled
1029 12:59:49.550159 I2C: 00:32 enabled
1030 12:59:49.550213 scan_static_bus for PCI: 00:15.0 done
1031 12:59:49.550267 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1032 12:59:49.550321 PCI: 00:15.1 scanning...
1033 12:59:49.550377 scan_static_bus for PCI: 00:15.1
1034 12:59:49.550434 I2C: 00:10 enabled
1035 12:59:49.550488 scan_static_bus for PCI: 00:15.1 done
1036 12:59:49.550541 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1037 12:59:49.550594 PCI: 00:15.2 scanning...
1038 12:59:49.550647 scan_static_bus for PCI: 00:15.2
1039 12:59:49.550700 scan_static_bus for PCI: 00:15.2 done
1040 12:59:49.550753 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1041 12:59:49.550806 PCI: 00:15.3 scanning...
1042 12:59:49.550859 scan_static_bus for PCI: 00:15.3
1043 12:59:49.550912 scan_static_bus for PCI: 00:15.3 done
1044 12:59:49.550964 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1045 12:59:49.551017 PCI: 00:19.1 scanning...
1046 12:59:49.551072 scan_static_bus for PCI: 00:19.1
1047 12:59:49.551125 I2C: 00:15 enabled
1048 12:59:49.551179 scan_static_bus for PCI: 00:19.1 done
1049 12:59:49.551233 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1050 12:59:49.551287 PCI: 00:1d.0 scanning...
1051 12:59:49.551340 do_pci_scan_bridge for PCI: 00:1d.0
1052 12:59:49.551394 PCI: pci_scan_bus for bus 01
1053 12:59:49.551448 PCI: 01:00.0 [1c5c/174a] enabled
1054 12:59:49.551502 GENERIC: 0.0 enabled
1055 12:59:49.551555 Enabling Common Clock Configuration
1056 12:59:49.551609 L1 Sub-State supported from root port 29
1057 12:59:49.551663 L1 Sub-State Support = 0xf
1058 12:59:49.551717 CommonModeRestoreTime = 0x28
1059 12:59:49.551770 Power On Value = 0x16, Power On Scale = 0x0
1060 12:59:49.551824 ASPM: Enabled L1
1061 12:59:49.551878 PCIe: Max_Payload_Size adjusted to 128
1062 12:59:49.551932 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1063 12:59:49.551986 PCI: 00:1e.2 scanning...
1064 12:59:49.552039 scan_generic_bus for PCI: 00:1e.2
1065 12:59:49.552093 SPI: 00 enabled
1066 12:59:49.552147 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1067 12:59:49.552202 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1068 12:59:49.552255 PCI: 00:1e.3 scanning...
1069 12:59:49.552309 scan_generic_bus for PCI: 00:1e.3
1070 12:59:49.552363 SPI: 00 enabled
1071 12:59:49.552417 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1072 12:59:49.552470 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1073 12:59:49.552525 PCI: 00:1f.0 scanning...
1074 12:59:49.552595 scan_static_bus for PCI: 00:1f.0
1075 12:59:49.552688 PNP: 0c09.0 enabled
1076 12:59:49.552774 PNP: 0c09.0 scanning...
1077 12:59:49.552844 scan_static_bus for PNP: 0c09.0
1078 12:59:49.552897 scan_static_bus for PNP: 0c09.0 done
1079 12:59:49.552951 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1080 12:59:49.553005 scan_static_bus for PCI: 00:1f.0 done
1081 12:59:49.553059 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1082 12:59:49.553112 PCI: 00:1f.2 scanning...
1083 12:59:49.553166 scan_static_bus for PCI: 00:1f.2
1084 12:59:49.553219 GENERIC: 0.0 enabled
1085 12:59:49.553273 GENERIC: 0.0 scanning...
1086 12:59:49.553361 scan_static_bus for GENERIC: 0.0
1087 12:59:49.553415 GENERIC: 0.0 enabled
1088 12:59:49.553468 GENERIC: 1.0 enabled
1089 12:59:49.553520 scan_static_bus for GENERIC: 0.0 done
1090 12:59:49.553573 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1091 12:59:49.553626 scan_static_bus for PCI: 00:1f.2 done
1092 12:59:49.553679 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1093 12:59:49.553731 PCI: 00:1f.3 scanning...
1094 12:59:49.553785 scan_static_bus for PCI: 00:1f.3
1095 12:59:49.553838 scan_static_bus for PCI: 00:1f.3 done
1096 12:59:49.553892 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1097 12:59:49.553946 PCI: 00:1f.5 scanning...
1098 12:59:49.554000 scan_generic_bus for PCI: 00:1f.5
1099 12:59:49.554054 scan_generic_bus for PCI: 00:1f.5 done
1100 12:59:49.554108 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1101 12:59:49.554162 scan_bus: bus DOMAIN: 0000 finished in 718 msecs
1102 12:59:49.554216 scan_static_bus for Root Device done
1103 12:59:49.554270 scan_bus: bus Root Device finished in 737 msecs
1104 12:59:49.554323 done
1105 12:59:49.554376 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1106 12:59:49.554464 Chrome EC: UHEPI supported
1107 12:59:49.554518 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1108 12:59:49.554573 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1109 12:59:49.554627 SPI flash protection: WPSW=1 SRP0=0
1110 12:59:49.554681 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1111 12:59:49.554736 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1112 12:59:49.554790 found VGA at PCI: 00:02.0
1113 12:59:49.554844 Setting up VGA for PCI: 00:02.0
1114 12:59:49.555092 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1115 12:59:49.555156 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1116 12:59:49.555212 Allocating resources...
1117 12:59:49.555267 Reading resources...
1118 12:59:49.555321 Root Device read_resources bus 0 link: 0
1119 12:59:49.555376 DOMAIN: 0000 read_resources bus 0 link: 0
1120 12:59:49.555431 PCI: 00:04.0 read_resources bus 1 link: 0
1121 12:59:49.555485 PCI: 00:04.0 read_resources bus 1 link: 0 done
1122 12:59:49.555540 PCI: 00:0d.0 read_resources bus 0 link: 0
1123 12:59:49.555595 USB0 port 0 read_resources bus 0 link: 0
1124 12:59:49.555649 USB0 port 0 read_resources bus 0 link: 0 done
1125 12:59:49.555703 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1126 12:59:49.555758 PCI: 00:14.0 read_resources bus 0 link: 0
1127 12:59:49.555812 USB0 port 0 read_resources bus 0 link: 0
1128 12:59:49.555866 USB0 port 0 read_resources bus 0 link: 0 done
1129 12:59:49.555920 PCI: 00:14.0 read_resources bus 0 link: 0 done
1130 12:59:49.556006 PCI: 00:14.3 read_resources bus 0 link: 0
1131 12:59:49.556059 PCI: 00:14.3 read_resources bus 0 link: 0 done
1132 12:59:49.556114 PCI: 00:15.0 read_resources bus 0 link: 0
1133 12:59:49.556168 PCI: 00:15.0 read_resources bus 0 link: 0 done
1134 12:59:49.556239 PCI: 00:15.1 read_resources bus 0 link: 0
1135 12:59:49.556309 PCI: 00:15.1 read_resources bus 0 link: 0 done
1136 12:59:49.556363 PCI: 00:19.1 read_resources bus 0 link: 0
1137 12:59:49.556417 PCI: 00:19.1 read_resources bus 0 link: 0 done
1138 12:59:49.556471 PCI: 00:1d.0 read_resources bus 1 link: 0
1139 12:59:49.556525 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1140 12:59:49.556580 PCI: 00:1e.2 read_resources bus 2 link: 0
1141 12:59:49.556633 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1142 12:59:49.556687 PCI: 00:1e.3 read_resources bus 3 link: 0
1143 12:59:49.556741 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1144 12:59:49.556795 PCI: 00:1f.0 read_resources bus 0 link: 0
1145 12:59:49.556849 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1146 12:59:49.556902 PCI: 00:1f.2 read_resources bus 0 link: 0
1147 12:59:49.556956 GENERIC: 0.0 read_resources bus 0 link: 0
1148 12:59:49.557010 GENERIC: 0.0 read_resources bus 0 link: 0 done
1149 12:59:49.557064 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1150 12:59:49.557117 DOMAIN: 0000 read_resources bus 0 link: 0 done
1151 12:59:49.557171 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1152 12:59:49.557225 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1153 12:59:49.557278 Root Device read_resources bus 0 link: 0 done
1154 12:59:49.557369 Done reading resources.
1155 12:59:49.557424 Show resources in subtree (Root Device)...After reading.
1156 12:59:49.557478 Root Device child on link 0 DOMAIN: 0000
1157 12:59:49.557533 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1158 12:59:49.557587 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1159 12:59:49.557643 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1160 12:59:49.557698 PCI: 00:00.0
1161 12:59:49.557752 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1162 12:59:49.557807 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1163 12:59:49.557862 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1164 12:59:49.557916 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1165 12:59:49.557971 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1166 12:59:49.558025 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1167 12:59:49.558080 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1168 12:59:49.558134 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1169 12:59:49.558189 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1170 12:59:49.558243 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1171 12:59:49.558298 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1172 12:59:49.558352 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1173 12:59:49.558407 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1174 12:59:49.558461 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1175 12:59:49.558516 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1176 12:59:49.558570 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1177 12:59:49.558625 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1178 12:59:49.558679 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1179 12:59:49.558734 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1180 12:59:49.558973 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1181 12:59:49.559034 PCI: 00:02.0
1182 12:59:49.559089 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1183 12:59:49.559145 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1184 12:59:49.559200 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1185 12:59:49.559254 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1186 12:59:49.559309 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1187 12:59:49.559364 GENERIC: 0.0
1188 12:59:49.559418 PCI: 00:05.0
1189 12:59:49.559472 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1190 12:59:49.559527 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1191 12:59:49.559581 GENERIC: 0.0
1192 12:59:49.559634 PCI: 00:08.0
1193 12:59:49.559688 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 12:59:49.559742 PCI: 00:0a.0
1195 12:59:49.559795 PCI: 00:0d.0 child on link 0 USB0 port 0
1196 12:59:49.559850 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1197 12:59:49.559904 USB0 port 0 child on link 0 USB3 port 0
1198 12:59:49.559958 USB3 port 0
1199 12:59:49.560011 USB3 port 1
1200 12:59:49.560065 USB3 port 2
1201 12:59:49.560118 USB3 port 3
1202 12:59:49.560172 PCI: 00:14.0 child on link 0 USB0 port 0
1203 12:59:49.566980 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1204 12:59:49.569930 USB0 port 0 child on link 0 USB2 port 0
1205 12:59:49.573186 USB2 port 0
1206 12:59:49.573299 USB2 port 1
1207 12:59:49.576971 USB2 port 2
1208 12:59:49.577081 USB2 port 3
1209 12:59:49.579825 USB2 port 4
1210 12:59:49.579908 USB2 port 5
1211 12:59:49.583324 USB2 port 6
1212 12:59:49.583409 USB2 port 7
1213 12:59:49.586553 USB2 port 8
1214 12:59:49.586638 USB2 port 9
1215 12:59:49.589917 USB3 port 0
1216 12:59:49.590026 USB3 port 1
1217 12:59:49.593466 USB3 port 2
1218 12:59:49.593550 USB3 port 3
1219 12:59:49.596640 PCI: 00:14.2
1220 12:59:49.606972 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1221 12:59:49.616845 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1222 12:59:49.619988 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1223 12:59:49.630383 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1224 12:59:49.633355 GENERIC: 0.0
1225 12:59:49.636799 PCI: 00:15.0 child on link 0 I2C: 00:1a
1226 12:59:49.646895 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1227 12:59:49.647015 I2C: 00:1a
1228 12:59:49.649987 I2C: 00:31
1229 12:59:49.650102 I2C: 00:32
1230 12:59:49.656646 PCI: 00:15.1 child on link 0 I2C: 00:10
1231 12:59:49.666937 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1232 12:59:49.667060 I2C: 00:10
1233 12:59:49.669957 PCI: 00:15.2
1234 12:59:49.680200 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1235 12:59:49.680289 PCI: 00:15.3
1236 12:59:49.690072 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1237 12:59:49.693294 PCI: 00:16.0
1238 12:59:49.703286 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1239 12:59:49.703376 PCI: 00:19.0
1240 12:59:49.706837 PCI: 00:19.1 child on link 0 I2C: 00:15
1241 12:59:49.716990 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1242 12:59:49.720301 I2C: 00:15
1243 12:59:49.723513 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1244 12:59:49.733483 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1245 12:59:49.743200 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1246 12:59:49.753394 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1247 12:59:49.753476 GENERIC: 0.0
1248 12:59:49.756910 PCI: 01:00.0
1249 12:59:49.766573 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1250 12:59:49.773503 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1251 12:59:49.783190 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1252 12:59:49.786452 PCI: 00:1e.0
1253 12:59:49.796966 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1254 12:59:49.800273 PCI: 00:1e.2 child on link 0 SPI: 00
1255 12:59:49.809928 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1256 12:59:49.813125 SPI: 00
1257 12:59:49.816573 PCI: 00:1e.3 child on link 0 SPI: 00
1258 12:59:49.826674 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1259 12:59:49.826770 SPI: 00
1260 12:59:49.830098 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1261 12:59:49.839719 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1262 12:59:49.843178 PNP: 0c09.0
1263 12:59:49.850314 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1264 12:59:49.856438 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1265 12:59:49.863233 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1266 12:59:49.873285 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1267 12:59:49.880004 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1268 12:59:49.880096 GENERIC: 0.0
1269 12:59:49.883051 GENERIC: 1.0
1270 12:59:49.883135 PCI: 00:1f.3
1271 12:59:49.893233 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1272 12:59:49.902882 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1273 12:59:49.906323 PCI: 00:1f.5
1274 12:59:49.916298 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1275 12:59:49.920092 CPU_CLUSTER: 0 child on link 0 APIC: 00
1276 12:59:49.920183 APIC: 00
1277 12:59:49.923003 APIC: 01
1278 12:59:49.923085 APIC: 03
1279 12:59:49.923149 APIC: 06
1280 12:59:49.926389 APIC: 05
1281 12:59:49.926471 APIC: 04
1282 12:59:49.926536 APIC: 02
1283 12:59:49.929728 APIC: 07
1284 12:59:49.936325 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1285 12:59:49.943125 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1286 12:59:49.949910 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1287 12:59:49.956157 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1288 12:59:49.959628 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1289 12:59:49.962978 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1290 12:59:49.966231 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1291 12:59:49.973031 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1292 12:59:49.982974 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1293 12:59:49.989694 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1294 12:59:49.996007 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1295 12:59:50.002817 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1296 12:59:50.009399 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1297 12:59:50.019355 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1298 12:59:50.025937 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1299 12:59:50.029333 DOMAIN: 0000: Resource ranges:
1300 12:59:50.032938 * Base: 1000, Size: 800, Tag: 100
1301 12:59:50.035744 * Base: 1900, Size: e700, Tag: 100
1302 12:59:50.042436 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1303 12:59:50.049383 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1304 12:59:50.055969 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1305 12:59:50.062851 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1306 12:59:50.069204 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1307 12:59:50.079438 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1308 12:59:50.086048 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1309 12:59:50.092463 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1310 12:59:50.102449 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1311 12:59:50.109291 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1312 12:59:50.115925 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1313 12:59:50.125715 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1314 12:59:50.132353 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1315 12:59:50.139196 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1316 12:59:50.145748 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1317 12:59:50.156126 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1318 12:59:50.162354 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1319 12:59:50.169180 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1320 12:59:50.179088 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1321 12:59:50.185837 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1322 12:59:50.192654 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1323 12:59:50.202674 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1324 12:59:50.208975 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1325 12:59:50.215689 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1326 12:59:50.226095 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1327 12:59:50.229262 DOMAIN: 0000: Resource ranges:
1328 12:59:50.232586 * Base: 7fc00000, Size: 40400000, Tag: 200
1329 12:59:50.235823 * Base: d0000000, Size: 28000000, Tag: 200
1330 12:59:50.239187 * Base: fa000000, Size: 1000000, Tag: 200
1331 12:59:50.245853 * Base: fb001000, Size: 2fff000, Tag: 200
1332 12:59:50.249212 * Base: fe010000, Size: 2e000, Tag: 200
1333 12:59:50.252676 * Base: fe03f000, Size: d41000, Tag: 200
1334 12:59:50.255626 * Base: fed88000, Size: 8000, Tag: 200
1335 12:59:50.262759 * Base: fed93000, Size: d000, Tag: 200
1336 12:59:50.265681 * Base: feda2000, Size: 1e000, Tag: 200
1337 12:59:50.269031 * Base: fede0000, Size: 1220000, Tag: 200
1338 12:59:50.275598 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1339 12:59:50.282471 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1340 12:59:50.289200 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1341 12:59:50.296146 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1342 12:59:50.302850 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1343 12:59:50.309401 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1344 12:59:50.316246 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1345 12:59:50.322734 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1346 12:59:50.329461 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1347 12:59:50.335746 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1348 12:59:50.342462 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1349 12:59:50.349268 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1350 12:59:50.355919 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1351 12:59:50.362668 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1352 12:59:50.369306 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1353 12:59:50.375864 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1354 12:59:50.382238 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1355 12:59:50.389075 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1356 12:59:50.395745 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1357 12:59:50.402527 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1358 12:59:50.409114 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1359 12:59:50.415724 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1360 12:59:50.422876 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1361 12:59:50.429039 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1362 12:59:50.435933 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1363 12:59:50.439144 PCI: 00:1d.0: Resource ranges:
1364 12:59:50.442780 * Base: 7fc00000, Size: 100000, Tag: 200
1365 12:59:50.449403 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1366 12:59:50.456059 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1367 12:59:50.462502 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1368 12:59:50.472573 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1369 12:59:50.479274 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1370 12:59:50.482718 Root Device assign_resources, bus 0 link: 0
1371 12:59:50.488886 DOMAIN: 0000 assign_resources, bus 0 link: 0
1372 12:59:50.495793 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1373 12:59:50.505751 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1374 12:59:50.512446 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1375 12:59:50.522103 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1376 12:59:50.525491 PCI: 00:04.0 assign_resources, bus 1 link: 0
1377 12:59:50.528899 PCI: 00:04.0 assign_resources, bus 1 link: 0
1378 12:59:50.539237 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1379 12:59:50.545994 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1380 12:59:50.555830 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1381 12:59:50.559203 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1382 12:59:50.565884 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1383 12:59:50.572533 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1384 12:59:50.575973 PCI: 00:14.0 assign_resources, bus 0 link: 0
1385 12:59:50.582359 PCI: 00:14.0 assign_resources, bus 0 link: 0
1386 12:59:50.589068 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1387 12:59:50.599184 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1388 12:59:50.605973 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1389 12:59:50.612620 PCI: 00:14.3 assign_resources, bus 0 link: 0
1390 12:59:50.615570 PCI: 00:14.3 assign_resources, bus 0 link: 0
1391 12:59:50.622367 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1392 12:59:50.629201 PCI: 00:15.0 assign_resources, bus 0 link: 0
1393 12:59:50.632594 PCI: 00:15.0 assign_resources, bus 0 link: 0
1394 12:59:50.642391 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1395 12:59:50.645917 PCI: 00:15.1 assign_resources, bus 0 link: 0
1396 12:59:50.648841 PCI: 00:15.1 assign_resources, bus 0 link: 0
1397 12:59:50.659285 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1398 12:59:50.665954 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1399 12:59:50.675832 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1400 12:59:50.682378 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1401 12:59:50.689172 PCI: 00:19.1 assign_resources, bus 0 link: 0
1402 12:59:50.692758 PCI: 00:19.1 assign_resources, bus 0 link: 0
1403 12:59:50.702526 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1404 12:59:50.712355 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1405 12:59:50.719123 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1406 12:59:50.725930 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1407 12:59:50.732195 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1408 12:59:50.738991 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1409 12:59:50.749088 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1410 12:59:50.752177 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1411 12:59:50.762143 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1412 12:59:50.766043 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1413 12:59:50.772304 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1414 12:59:50.778963 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1415 12:59:50.782316 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1416 12:59:50.788871 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1417 12:59:50.792199 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1418 12:59:50.798866 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1419 12:59:50.802221 LPC: Trying to open IO window from 800 size 1ff
1420 12:59:50.812145 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1421 12:59:50.818854 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1422 12:59:50.825462 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1423 12:59:50.832825 DOMAIN: 0000 assign_resources, bus 0 link: 0
1424 12:59:50.835788 Root Device assign_resources, bus 0 link: 0
1425 12:59:50.839110 Done setting resources.
1426 12:59:50.845902 Show resources in subtree (Root Device)...After assigning values.
1427 12:59:50.849061 Root Device child on link 0 DOMAIN: 0000
1428 12:59:50.855722 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1429 12:59:50.862771 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1430 12:59:50.872532 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1431 12:59:50.875933 PCI: 00:00.0
1432 12:59:50.885578 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1433 12:59:50.892757 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1434 12:59:50.902375 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1435 12:59:50.912789 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1436 12:59:50.922772 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1437 12:59:50.932443 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1438 12:59:50.942430 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1439 12:59:50.949096 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1440 12:59:50.959463 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1441 12:59:50.969261 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1442 12:59:50.979176 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1443 12:59:50.989374 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1444 12:59:50.995795 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1445 12:59:51.005684 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1446 12:59:51.015823 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1447 12:59:51.025825 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1448 12:59:51.035888 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1449 12:59:51.046014 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1450 12:59:51.052328 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1451 12:59:51.062180 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1452 12:59:51.065925 PCI: 00:02.0
1453 12:59:51.075818 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1454 12:59:51.085785 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1455 12:59:51.095882 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1456 12:59:51.099239 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1457 12:59:51.109238 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1458 12:59:51.112196 GENERIC: 0.0
1459 12:59:51.112275 PCI: 00:05.0
1460 12:59:51.125799 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1461 12:59:51.129129 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1462 12:59:51.132402 GENERIC: 0.0
1463 12:59:51.132481 PCI: 00:08.0
1464 12:59:51.142135 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1465 12:59:51.145417 PCI: 00:0a.0
1466 12:59:51.148831 PCI: 00:0d.0 child on link 0 USB0 port 0
1467 12:59:51.158392 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1468 12:59:51.165523 USB0 port 0 child on link 0 USB3 port 0
1469 12:59:51.165610 USB3 port 0
1470 12:59:51.168750 USB3 port 1
1471 12:59:51.168838 USB3 port 2
1472 12:59:51.171875 USB3 port 3
1473 12:59:51.175575 PCI: 00:14.0 child on link 0 USB0 port 0
1474 12:59:51.185426 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1475 12:59:51.189001 USB0 port 0 child on link 0 USB2 port 0
1476 12:59:51.192289 USB2 port 0
1477 12:59:51.192375 USB2 port 1
1478 12:59:51.195684 USB2 port 2
1479 12:59:51.195769 USB2 port 3
1480 12:59:51.198682 USB2 port 4
1481 12:59:51.198768 USB2 port 5
1482 12:59:51.202120 USB2 port 6
1483 12:59:51.205499 USB2 port 7
1484 12:59:51.205584 USB2 port 8
1485 12:59:51.208973 USB2 port 9
1486 12:59:51.209059 USB3 port 0
1487 12:59:51.212406 USB3 port 1
1488 12:59:51.212492 USB3 port 2
1489 12:59:51.215435 USB3 port 3
1490 12:59:51.215521 PCI: 00:14.2
1491 12:59:51.225709 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1492 12:59:51.235452 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1493 12:59:51.242552 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1494 12:59:51.252384 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1495 12:59:51.252471 GENERIC: 0.0
1496 12:59:51.259019 PCI: 00:15.0 child on link 0 I2C: 00:1a
1497 12:59:51.268831 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1498 12:59:51.268918 I2C: 00:1a
1499 12:59:51.272572 I2C: 00:31
1500 12:59:51.272658 I2C: 00:32
1501 12:59:51.275699 PCI: 00:15.1 child on link 0 I2C: 00:10
1502 12:59:51.289023 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1503 12:59:51.289110 I2C: 00:10
1504 12:59:51.292656 PCI: 00:15.2
1505 12:59:51.302338 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1506 12:59:51.302457 PCI: 00:15.3
1507 12:59:51.312367 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1508 12:59:51.315882 PCI: 00:16.0
1509 12:59:51.325845 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1510 12:59:51.325933 PCI: 00:19.0
1511 12:59:51.332109 PCI: 00:19.1 child on link 0 I2C: 00:15
1512 12:59:51.342177 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1513 12:59:51.342264 I2C: 00:15
1514 12:59:51.348864 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1515 12:59:51.355945 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1516 12:59:51.368966 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1517 12:59:51.378910 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1518 12:59:51.378998 GENERIC: 0.0
1519 12:59:51.382453 PCI: 01:00.0
1520 12:59:51.392501 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1521 12:59:51.402262 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1522 12:59:51.412261 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1523 12:59:51.415635 PCI: 00:1e.0
1524 12:59:51.425735 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1525 12:59:51.428934 PCI: 00:1e.2 child on link 0 SPI: 00
1526 12:59:51.442235 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1527 12:59:51.442323 SPI: 00
1528 12:59:51.445481 PCI: 00:1e.3 child on link 0 SPI: 00
1529 12:59:51.455652 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1530 12:59:51.459041 SPI: 00
1531 12:59:51.462316 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1532 12:59:51.472070 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1533 12:59:51.472156 PNP: 0c09.0
1534 12:59:51.482291 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1535 12:59:51.485680 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1536 12:59:51.495805 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1537 12:59:51.505589 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1538 12:59:51.508992 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1539 12:59:51.512425 GENERIC: 0.0
1540 12:59:51.512510 GENERIC: 1.0
1541 12:59:51.515777 PCI: 00:1f.3
1542 12:59:51.525813 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1543 12:59:51.535884 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1544 12:59:51.535970 PCI: 00:1f.5
1545 12:59:51.545648 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1546 12:59:51.552324 CPU_CLUSTER: 0 child on link 0 APIC: 00
1547 12:59:51.552407 APIC: 00
1548 12:59:51.555661 APIC: 01
1549 12:59:51.555743 APIC: 03
1550 12:59:51.555806 APIC: 06
1551 12:59:51.559030 APIC: 05
1552 12:59:51.559112 APIC: 04
1553 12:59:51.559176 APIC: 02
1554 12:59:51.562367 APIC: 07
1555 12:59:51.565889 Done allocating resources.
1556 12:59:51.569163 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1557 12:59:51.576064 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1558 12:59:51.579388 Configure GPIOs for I2S audio on UP4.
1559 12:59:51.586800 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1560 12:59:51.590534 Enabling resources...
1561 12:59:51.593403 PCI: 00:00.0 subsystem <- 8086/9a12
1562 12:59:51.596872 PCI: 00:00.0 cmd <- 06
1563 12:59:51.600061 PCI: 00:02.0 subsystem <- 8086/9a40
1564 12:59:51.603496 PCI: 00:02.0 cmd <- 03
1565 12:59:51.606900 PCI: 00:04.0 subsystem <- 8086/9a03
1566 12:59:51.606981 PCI: 00:04.0 cmd <- 02
1567 12:59:51.613670 PCI: 00:05.0 subsystem <- 8086/9a19
1568 12:59:51.613751 PCI: 00:05.0 cmd <- 02
1569 12:59:51.616964 PCI: 00:08.0 subsystem <- 8086/9a11
1570 12:59:51.620265 PCI: 00:08.0 cmd <- 06
1571 12:59:51.623664 PCI: 00:0d.0 subsystem <- 8086/9a13
1572 12:59:51.627081 PCI: 00:0d.0 cmd <- 02
1573 12:59:51.630393 PCI: 00:14.0 subsystem <- 8086/a0ed
1574 12:59:51.633757 PCI: 00:14.0 cmd <- 02
1575 12:59:51.637325 PCI: 00:14.2 subsystem <- 8086/a0ef
1576 12:59:51.640492 PCI: 00:14.2 cmd <- 02
1577 12:59:51.643970 PCI: 00:14.3 subsystem <- 8086/a0f0
1578 12:59:51.644067 PCI: 00:14.3 cmd <- 02
1579 12:59:51.651095 PCI: 00:15.0 subsystem <- 8086/a0e8
1580 12:59:51.651178 PCI: 00:15.0 cmd <- 02
1581 12:59:51.654580 PCI: 00:15.1 subsystem <- 8086/a0e9
1582 12:59:51.658066 PCI: 00:15.1 cmd <- 02
1583 12:59:51.661235 PCI: 00:15.2 subsystem <- 8086/a0ea
1584 12:59:51.664512 PCI: 00:15.2 cmd <- 02
1585 12:59:51.667910 PCI: 00:15.3 subsystem <- 8086/a0eb
1586 12:59:51.671280 PCI: 00:15.3 cmd <- 02
1587 12:59:51.674455 PCI: 00:16.0 subsystem <- 8086/a0e0
1588 12:59:51.677851 PCI: 00:16.0 cmd <- 02
1589 12:59:51.681362 PCI: 00:19.1 subsystem <- 8086/a0c6
1590 12:59:51.684781 PCI: 00:19.1 cmd <- 02
1591 12:59:51.687949 PCI: 00:1d.0 bridge ctrl <- 0013
1592 12:59:51.691287 PCI: 00:1d.0 subsystem <- 8086/a0b0
1593 12:59:51.691370 PCI: 00:1d.0 cmd <- 06
1594 12:59:51.697671 PCI: 00:1e.0 subsystem <- 8086/a0a8
1595 12:59:51.697754 PCI: 00:1e.0 cmd <- 06
1596 12:59:51.701009 PCI: 00:1e.2 subsystem <- 8086/a0aa
1597 12:59:51.704418 PCI: 00:1e.2 cmd <- 06
1598 12:59:51.708105 PCI: 00:1e.3 subsystem <- 8086/a0ab
1599 12:59:51.711420 PCI: 00:1e.3 cmd <- 02
1600 12:59:51.714579 PCI: 00:1f.0 subsystem <- 8086/a087
1601 12:59:51.717876 PCI: 00:1f.0 cmd <- 407
1602 12:59:51.721254 PCI: 00:1f.3 subsystem <- 8086/a0c8
1603 12:59:51.724725 PCI: 00:1f.3 cmd <- 02
1604 12:59:51.728221 PCI: 00:1f.5 subsystem <- 8086/a0a4
1605 12:59:51.731357 PCI: 00:1f.5 cmd <- 406
1606 12:59:51.734711 PCI: 01:00.0 cmd <- 02
1607 12:59:51.738723 done.
1608 12:59:51.742080 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1609 12:59:51.745527 Initializing devices...
1610 12:59:51.748811 Root Device init
1611 12:59:51.751816 Chrome EC: Set SMI mask to 0x0000000000000000
1612 12:59:51.758594 Chrome EC: clear events_b mask to 0x0000000000000000
1613 12:59:51.765273 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1614 12:59:51.768581 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1615 12:59:51.775372 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1616 12:59:51.781773 Chrome EC: Set WAKE mask to 0x0000000000000000
1617 12:59:51.785141 fw_config match found: DB_USB=USB3_ACTIVE
1618 12:59:51.791736 Configure Right Type-C port orientation for retimer
1619 12:59:51.794805 Root Device init finished in 42 msecs
1620 12:59:51.798445 PCI: 00:00.0 init
1621 12:59:51.798530 CPU TDP = 9 Watts
1622 12:59:51.801869 CPU PL1 = 9 Watts
1623 12:59:51.804861 CPU PL2 = 40 Watts
1624 12:59:51.804959 CPU PL4 = 83 Watts
1625 12:59:51.808199 PCI: 00:00.0 init finished in 8 msecs
1626 12:59:51.811614 PCI: 00:02.0 init
1627 12:59:51.814613 GMA: Found VBT in CBFS
1628 12:59:51.817961 GMA: Found valid VBT in CBFS
1629 12:59:51.821294 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1630 12:59:51.831280 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1631 12:59:51.834739 PCI: 00:02.0 init finished in 18 msecs
1632 12:59:51.838061 PCI: 00:05.0 init
1633 12:59:51.841371 PCI: 00:05.0 init finished in 0 msecs
1634 12:59:51.841448 PCI: 00:08.0 init
1635 12:59:51.847873 PCI: 00:08.0 init finished in 0 msecs
1636 12:59:51.847949 PCI: 00:14.0 init
1637 12:59:51.854251 PCI: 00:14.0 init finished in 0 msecs
1638 12:59:51.854328 PCI: 00:14.2 init
1639 12:59:51.857698 PCI: 00:14.2 init finished in 0 msecs
1640 12:59:51.861686 PCI: 00:15.0 init
1641 12:59:51.864958 I2C bus 0 version 0x3230302a
1642 12:59:51.868357 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1643 12:59:51.871824 PCI: 00:15.0 init finished in 6 msecs
1644 12:59:51.875272 PCI: 00:15.1 init
1645 12:59:51.878177 I2C bus 1 version 0x3230302a
1646 12:59:51.881688 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1647 12:59:51.884816 PCI: 00:15.1 init finished in 6 msecs
1648 12:59:51.888065 PCI: 00:15.2 init
1649 12:59:51.891532 I2C bus 2 version 0x3230302a
1650 12:59:51.894829 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1651 12:59:51.897965 PCI: 00:15.2 init finished in 6 msecs
1652 12:59:51.898048 PCI: 00:15.3 init
1653 12:59:51.901615 I2C bus 3 version 0x3230302a
1654 12:59:51.904952 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1655 12:59:51.911336 PCI: 00:15.3 init finished in 6 msecs
1656 12:59:51.911422 PCI: 00:16.0 init
1657 12:59:51.914906 PCI: 00:16.0 init finished in 0 msecs
1658 12:59:51.918708 PCI: 00:19.1 init
1659 12:59:51.921933 I2C bus 5 version 0x3230302a
1660 12:59:51.925012 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1661 12:59:51.928242 PCI: 00:19.1 init finished in 6 msecs
1662 12:59:51.932262 PCI: 00:1d.0 init
1663 12:59:51.935324 Initializing PCH PCIe bridge.
1664 12:59:51.938672 PCI: 00:1d.0 init finished in 3 msecs
1665 12:59:51.941947 PCI: 00:1f.0 init
1666 12:59:51.945409 IOAPIC: Initializing IOAPIC at 0xfec00000
1667 12:59:51.948221 IOAPIC: Bootstrap Processor Local APIC = 0x00
1668 12:59:51.951756 IOAPIC: ID = 0x02
1669 12:59:51.955151 IOAPIC: Dumping registers
1670 12:59:51.958482 reg 0x0000: 0x02000000
1671 12:59:51.958565 reg 0x0001: 0x00770020
1672 12:59:51.961905 reg 0x0002: 0x00000000
1673 12:59:51.964946 PCI: 00:1f.0 init finished in 21 msecs
1674 12:59:51.968295 PCI: 00:1f.2 init
1675 12:59:51.972089 Disabling ACPI via APMC.
1676 12:59:51.975463 APMC done.
1677 12:59:51.978868 PCI: 00:1f.2 init finished in 5 msecs
1678 12:59:51.989680 PCI: 01:00.0 init
1679 12:59:51.992659 PCI: 01:00.0 init finished in 0 msecs
1680 12:59:51.995967 PNP: 0c09.0 init
1681 12:59:51.999229 Google Chrome EC uptime: 10.212 seconds
1682 12:59:52.006128 Google Chrome AP resets since EC boot: 0
1683 12:59:52.009466 Google Chrome most recent AP reset causes:
1684 12:59:52.016243 Google Chrome EC reset flags at last EC boot: reset-pin | hard
1685 12:59:52.019332 PNP: 0c09.0 init finished in 19 msecs
1686 12:59:52.024783 Devices initialized
1687 12:59:52.028382 Show all devs... After init.
1688 12:59:52.031684 Root Device: enabled 1
1689 12:59:52.031766 DOMAIN: 0000: enabled 1
1690 12:59:52.034946 CPU_CLUSTER: 0: enabled 1
1691 12:59:52.038144 PCI: 00:00.0: enabled 1
1692 12:59:52.041464 PCI: 00:02.0: enabled 1
1693 12:59:52.041547 PCI: 00:04.0: enabled 1
1694 12:59:52.044857 PCI: 00:05.0: enabled 1
1695 12:59:52.048241 PCI: 00:06.0: enabled 0
1696 12:59:52.051396 PCI: 00:07.0: enabled 0
1697 12:59:52.051479 PCI: 00:07.1: enabled 0
1698 12:59:52.054744 PCI: 00:07.2: enabled 0
1699 12:59:52.058162 PCI: 00:07.3: enabled 0
1700 12:59:52.061559 PCI: 00:08.0: enabled 1
1701 12:59:52.061641 PCI: 00:09.0: enabled 0
1702 12:59:52.064840 PCI: 00:0a.0: enabled 0
1703 12:59:52.068337 PCI: 00:0d.0: enabled 1
1704 12:59:52.071311 PCI: 00:0d.1: enabled 0
1705 12:59:52.071394 PCI: 00:0d.2: enabled 0
1706 12:59:52.074559 PCI: 00:0d.3: enabled 0
1707 12:59:52.078345 PCI: 00:0e.0: enabled 0
1708 12:59:52.078428 PCI: 00:10.2: enabled 1
1709 12:59:52.081440 PCI: 00:10.6: enabled 0
1710 12:59:52.084771 PCI: 00:10.7: enabled 0
1711 12:59:52.087900 PCI: 00:12.0: enabled 0
1712 12:59:52.087983 PCI: 00:12.6: enabled 0
1713 12:59:52.091376 PCI: 00:13.0: enabled 0
1714 12:59:52.094866 PCI: 00:14.0: enabled 1
1715 12:59:52.098238 PCI: 00:14.1: enabled 0
1716 12:59:52.098321 PCI: 00:14.2: enabled 1
1717 12:59:52.101702 PCI: 00:14.3: enabled 1
1718 12:59:52.104473 PCI: 00:15.0: enabled 1
1719 12:59:52.107809 PCI: 00:15.1: enabled 1
1720 12:59:52.107901 PCI: 00:15.2: enabled 1
1721 12:59:52.111346 PCI: 00:15.3: enabled 1
1722 12:59:52.114673 PCI: 00:16.0: enabled 1
1723 12:59:52.114806 PCI: 00:16.1: enabled 0
1724 12:59:52.118111 PCI: 00:16.2: enabled 0
1725 12:59:52.121443 PCI: 00:16.3: enabled 0
1726 12:59:52.124357 PCI: 00:16.4: enabled 0
1727 12:59:52.124455 PCI: 00:16.5: enabled 0
1728 12:59:52.128194 PCI: 00:17.0: enabled 0
1729 12:59:52.131034 PCI: 00:19.0: enabled 0
1730 12:59:52.134760 PCI: 00:19.1: enabled 1
1731 12:59:52.134844 PCI: 00:19.2: enabled 0
1732 12:59:52.137799 PCI: 00:1c.0: enabled 1
1733 12:59:52.141286 PCI: 00:1c.1: enabled 0
1734 12:59:52.144765 PCI: 00:1c.2: enabled 0
1735 12:59:52.144849 PCI: 00:1c.3: enabled 0
1736 12:59:52.148130 PCI: 00:1c.4: enabled 0
1737 12:59:52.151008 PCI: 00:1c.5: enabled 0
1738 12:59:52.154420 PCI: 00:1c.6: enabled 1
1739 12:59:52.154504 PCI: 00:1c.7: enabled 0
1740 12:59:52.157935 PCI: 00:1d.0: enabled 1
1741 12:59:52.161309 PCI: 00:1d.1: enabled 0
1742 12:59:52.161406 PCI: 00:1d.2: enabled 1
1743 12:59:52.164320 PCI: 00:1d.3: enabled 0
1744 12:59:52.167699 PCI: 00:1e.0: enabled 1
1745 12:59:52.171195 PCI: 00:1e.1: enabled 0
1746 12:59:52.171279 PCI: 00:1e.2: enabled 1
1747 12:59:52.174544 PCI: 00:1e.3: enabled 1
1748 12:59:52.177760 PCI: 00:1f.0: enabled 1
1749 12:59:52.181283 PCI: 00:1f.1: enabled 0
1750 12:59:52.181390 PCI: 00:1f.2: enabled 1
1751 12:59:52.184311 PCI: 00:1f.3: enabled 1
1752 12:59:52.187895 PCI: 00:1f.4: enabled 0
1753 12:59:52.190833 PCI: 00:1f.5: enabled 1
1754 12:59:52.190934 PCI: 00:1f.6: enabled 0
1755 12:59:52.194226 PCI: 00:1f.7: enabled 0
1756 12:59:52.197714 APIC: 00: enabled 1
1757 12:59:52.197797 GENERIC: 0.0: enabled 1
1758 12:59:52.201044 GENERIC: 0.0: enabled 1
1759 12:59:52.204441 GENERIC: 1.0: enabled 1
1760 12:59:52.207674 GENERIC: 0.0: enabled 1
1761 12:59:52.207757 GENERIC: 1.0: enabled 1
1762 12:59:52.210980 USB0 port 0: enabled 1
1763 12:59:52.214345 GENERIC: 0.0: enabled 1
1764 12:59:52.214443 USB0 port 0: enabled 1
1765 12:59:52.217549 GENERIC: 0.0: enabled 1
1766 12:59:52.220920 I2C: 00:1a: enabled 1
1767 12:59:52.224324 I2C: 00:31: enabled 1
1768 12:59:52.224406 I2C: 00:32: enabled 1
1769 12:59:52.227809 I2C: 00:10: enabled 1
1770 12:59:52.230706 I2C: 00:15: enabled 1
1771 12:59:52.230804 GENERIC: 0.0: enabled 0
1772 12:59:52.234085 GENERIC: 1.0: enabled 0
1773 12:59:52.237314 GENERIC: 0.0: enabled 1
1774 12:59:52.237440 SPI: 00: enabled 1
1775 12:59:52.240723 SPI: 00: enabled 1
1776 12:59:52.243982 PNP: 0c09.0: enabled 1
1777 12:59:52.244067 GENERIC: 0.0: enabled 1
1778 12:59:52.247474 USB3 port 0: enabled 1
1779 12:59:52.250706 USB3 port 1: enabled 1
1780 12:59:52.254232 USB3 port 2: enabled 0
1781 12:59:52.254329 USB3 port 3: enabled 0
1782 12:59:52.257634 USB2 port 0: enabled 0
1783 12:59:52.260502 USB2 port 1: enabled 1
1784 12:59:52.260595 USB2 port 2: enabled 1
1785 12:59:52.263854 USB2 port 3: enabled 0
1786 12:59:52.267230 USB2 port 4: enabled 1
1787 12:59:52.267314 USB2 port 5: enabled 0
1788 12:59:52.270568 USB2 port 6: enabled 0
1789 12:59:52.274030 USB2 port 7: enabled 0
1790 12:59:52.277404 USB2 port 8: enabled 0
1791 12:59:52.277489 USB2 port 9: enabled 0
1792 12:59:52.280708 USB3 port 0: enabled 0
1793 12:59:52.283855 USB3 port 1: enabled 1
1794 12:59:52.283939 USB3 port 2: enabled 0
1795 12:59:52.287261 USB3 port 3: enabled 0
1796 12:59:52.290823 GENERIC: 0.0: enabled 1
1797 12:59:52.294125 GENERIC: 1.0: enabled 1
1798 12:59:52.294209 APIC: 01: enabled 1
1799 12:59:52.297199 APIC: 03: enabled 1
1800 12:59:52.297284 APIC: 06: enabled 1
1801 12:59:52.300564 APIC: 05: enabled 1
1802 12:59:52.304244 APIC: 04: enabled 1
1803 12:59:52.304334 APIC: 02: enabled 1
1804 12:59:52.307406 APIC: 07: enabled 1
1805 12:59:52.310651 PCI: 01:00.0: enabled 1
1806 12:59:52.313952 BS: BS_DEV_INIT run times (exec / console): 30 / 536 ms
1807 12:59:52.320444 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1808 12:59:52.323891 ELOG: NV offset 0xf30000 size 0x1000
1809 12:59:52.330807 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1810 12:59:52.337100 ELOG: Event(17) added with size 13 at 2024-05-02 12:58:40 UTC
1811 12:59:52.343748 ELOG: Event(92) added with size 9 at 2024-05-02 12:58:40 UTC
1812 12:59:52.350563 ELOG: Event(93) added with size 9 at 2024-05-02 12:58:40 UTC
1813 12:59:52.357193 ELOG: Event(9E) added with size 10 at 2024-05-02 12:58:40 UTC
1814 12:59:52.363895 ELOG: Event(9F) added with size 14 at 2024-05-02 12:58:40 UTC
1815 12:59:52.367298 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1816 12:59:52.373932 ELOG: Event(A1) added with size 10 at 2024-05-02 12:58:40 UTC
1817 12:59:52.383604 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
1818 12:59:52.390584 ELOG: Event(A0) added with size 9 at 2024-05-02 12:58:40 UTC
1819 12:59:52.393511 elog_add_boot_reason: Logged dev mode boot
1820 12:59:52.400398 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1821 12:59:52.400473 Finalize devices...
1822 12:59:52.403392 Devices finalized
1823 12:59:52.406788 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1824 12:59:52.413831 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1825 12:59:52.420675 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1826 12:59:52.423443 ME: HFSTS1 : 0x80030055
1827 12:59:52.427034 ME: HFSTS2 : 0x30280116
1828 12:59:52.433713 ME: HFSTS3 : 0x00000050
1829 12:59:52.436767 ME: HFSTS4 : 0x00004000
1830 12:59:52.440120 ME: HFSTS5 : 0x00000000
1831 12:59:52.446875 ME: HFSTS6 : 0x00400006
1832 12:59:52.450089 ME: Manufacturing Mode : YES
1833 12:59:52.453481 ME: SPI Protection Mode Enabled : NO
1834 12:59:52.457046 ME: FW Partition Table : OK
1835 12:59:52.460207 ME: Bringup Loader Failure : NO
1836 12:59:52.463612 ME: Firmware Init Complete : NO
1837 12:59:52.470293 ME: Boot Options Present : NO
1838 12:59:52.473193 ME: Update In Progress : NO
1839 12:59:52.476789 ME: D0i3 Support : YES
1840 12:59:52.480123 ME: Low Power State Enabled : NO
1841 12:59:52.483488 ME: CPU Replaced : YES
1842 12:59:52.486798 ME: CPU Replacement Valid : YES
1843 12:59:52.490162 ME: Current Working State : 5
1844 12:59:52.493581 ME: Current Operation State : 1
1845 12:59:52.496941 ME: Current Operation Mode : 3
1846 12:59:52.503221 ME: Error Code : 0
1847 12:59:52.506692 ME: Enhanced Debug Mode : NO
1848 12:59:52.510023 ME: CPU Debug Disabled : YES
1849 12:59:52.513377 ME: TXT Support : NO
1850 12:59:52.519968 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1851 12:59:52.526814 ELOG: Event(91) added with size 10 at 2024-05-02 12:58:41 UTC
1852 12:59:52.529948 Chrome EC: clear events_b mask to 0x0000000020004000
1853 12:59:52.537394 BS: BS_WRITE_TABLES entry times (exec / console): 2 / 11 ms
1854 12:59:52.544167 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1855 12:59:52.547410 CBFS: 'fallback/slic' not found.
1856 12:59:52.554130 ACPI: Writing ACPI tables at 76b01000.
1857 12:59:52.554240 ACPI: * FACS
1858 12:59:52.557447 ACPI: * DSDT
1859 12:59:52.560896 Ramoops buffer: 0x100000@0x76a00000.
1860 12:59:52.564104 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1861 12:59:52.570839 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1862 12:59:52.573844 Google Chrome EC: version:
1863 12:59:52.577305 ro: voema_v2.0.7540-147f8d37d1
1864 12:59:52.580764 rw: voema_v2.0.7540-147f8d37d1
1865 12:59:52.580835 running image: 1
1866 12:59:52.587356 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1867 12:59:52.591303 ACPI: * FADT
1868 12:59:52.591377 SCI is IRQ9
1869 12:59:52.598102 ACPI: added table 1/32, length now 40
1870 12:59:52.598179 ACPI: * SSDT
1871 12:59:52.601488 Found 1 CPU(s) with 8 core(s) each.
1872 12:59:52.608217 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1873 12:59:52.611648 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1874 12:59:52.614495 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1875 12:59:52.617868 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1876 12:59:52.625031 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1877 12:59:52.631380 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1878 12:59:52.634569 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1879 12:59:52.641461 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1880 12:59:52.648181 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1881 12:59:52.651420 \_SB.PCI0.RP09: Added StorageD3Enable property
1882 12:59:52.654469 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1883 12:59:52.661177 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1884 12:59:52.668110 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1885 12:59:52.671408 PS2K: Passing 80 keymaps to kernel
1886 12:59:52.678097 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1887 12:59:52.684354 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1888 12:59:52.691059 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1889 12:59:52.697830 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1890 12:59:52.704253 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1891 12:59:52.711126 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1892 12:59:52.717856 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1893 12:59:52.724145 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1894 12:59:52.727430 ACPI: added table 2/32, length now 44
1895 12:59:52.727515 ACPI: * MCFG
1896 12:59:52.734055 ACPI: added table 3/32, length now 48
1897 12:59:52.734144 ACPI: * TPM2
1898 12:59:52.737610 TPM2 log created at 0x769f0000
1899 12:59:52.740860 ACPI: added table 4/32, length now 52
1900 12:59:52.744108 ACPI: * MADT
1901 12:59:52.744192 SCI is IRQ9
1902 12:59:52.747823 ACPI: added table 5/32, length now 56
1903 12:59:52.750639 current = 76b09850
1904 12:59:52.750724 ACPI: * DMAR
1905 12:59:52.754224 ACPI: added table 6/32, length now 60
1906 12:59:52.760951 ACPI: added table 7/32, length now 64
1907 12:59:52.761035 ACPI: * HPET
1908 12:59:52.764105 ACPI: added table 8/32, length now 68
1909 12:59:52.767698 ACPI: done.
1910 12:59:52.767783 ACPI tables: 35216 bytes.
1911 12:59:52.770773 smbios_write_tables: 769ef000
1912 12:59:52.774403 EC returned error result code 3
1913 12:59:52.777403 Couldn't obtain OEM name from CBI
1914 12:59:52.781204 Create SMBIOS type 16
1915 12:59:52.784525 Create SMBIOS type 17
1916 12:59:52.787935 GENERIC: 0.0 (WIFI Device)
1917 12:59:52.788020 SMBIOS tables: 1750 bytes.
1918 12:59:52.794307 Writing table forward entry at 0x00000500
1919 12:59:52.801068 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1920 12:59:52.804411 Writing coreboot table at 0x76b25000
1921 12:59:52.810806 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1922 12:59:52.814342 1. 0000000000001000-000000000009ffff: RAM
1923 12:59:52.817704 2. 00000000000a0000-00000000000fffff: RESERVED
1924 12:59:52.824290 3. 0000000000100000-00000000769eefff: RAM
1925 12:59:52.827660 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1926 12:59:52.834269 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1927 12:59:52.840676 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1928 12:59:52.844340 7. 0000000077000000-000000007fbfffff: RESERVED
1929 12:59:52.847611 8. 00000000c0000000-00000000cfffffff: RESERVED
1930 12:59:52.854304 9. 00000000f8000000-00000000f9ffffff: RESERVED
1931 12:59:52.857244 10. 00000000fb000000-00000000fb000fff: RESERVED
1932 12:59:52.864086 11. 00000000fe000000-00000000fe00ffff: RESERVED
1933 12:59:52.867372 12. 00000000fed80000-00000000fed87fff: RESERVED
1934 12:59:52.874156 13. 00000000fed90000-00000000fed92fff: RESERVED
1935 12:59:52.877142 14. 00000000feda0000-00000000feda1fff: RESERVED
1936 12:59:52.884195 15. 00000000fedc0000-00000000feddffff: RESERVED
1937 12:59:52.887482 16. 0000000100000000-00000002803fffff: RAM
1938 12:59:52.890872 Passing 4 GPIOs to payload:
1939 12:59:52.893841 NAME | PORT | POLARITY | VALUE
1940 12:59:52.900651 lid | undefined | high | high
1941 12:59:52.904040 power | undefined | high | low
1942 12:59:52.910890 oprom | undefined | high | low
1943 12:59:52.917175 EC in RW | 0x000000e5 | high | low
1944 12:59:52.923987 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 55ae
1945 12:59:52.924072 coreboot table: 1576 bytes.
1946 12:59:52.927402 IMD ROOT 0. 0x76fff000 0x00001000
1947 12:59:52.933806 IMD SMALL 1. 0x76ffe000 0x00001000
1948 12:59:52.937413 FSP MEMORY 2. 0x76c4e000 0x003b0000
1949 12:59:52.940721 VPD 3. 0x76c4d000 0x00000367
1950 12:59:52.943958 RO MCACHE 4. 0x76c4c000 0x00000fdc
1951 12:59:52.947396 CONSOLE 5. 0x76c2c000 0x00020000
1952 12:59:52.950559 FMAP 6. 0x76c2b000 0x00000578
1953 12:59:52.953754 TIME STAMP 7. 0x76c2a000 0x00000910
1954 12:59:52.957067 VBOOT WORK 8. 0x76c16000 0x00014000
1955 12:59:52.963963 ROMSTG STCK 9. 0x76c15000 0x00001000
1956 12:59:52.967245 AFTER CAR 10. 0x76c0a000 0x0000b000
1957 12:59:52.970689 RAMSTAGE 11. 0x76b97000 0x00073000
1958 12:59:52.973740 REFCODE 12. 0x76b42000 0x00055000
1959 12:59:52.977135 SMM BACKUP 13. 0x76b32000 0x00010000
1960 12:59:52.980319 4f444749 14. 0x76b30000 0x00002000
1961 12:59:52.984001 EXT VBT15. 0x76b2d000 0x0000219f
1962 12:59:52.987369 COREBOOT 16. 0x76b25000 0x00008000
1963 12:59:52.990285 ACPI 17. 0x76b01000 0x00024000
1964 12:59:52.997013 ACPI GNVS 18. 0x76b00000 0x00001000
1965 12:59:53.000472 RAMOOPS 19. 0x76a00000 0x00100000
1966 12:59:53.003908 TPM2 TCGLOG20. 0x769f0000 0x00010000
1967 12:59:53.007164 SMBIOS 21. 0x769ef000 0x00000800
1968 12:59:53.007246 IMD small region:
1969 12:59:53.013886 IMD ROOT 0. 0x76ffec00 0x00000400
1970 12:59:53.016848 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1971 12:59:53.020132 POWER STATE 2. 0x76ffeb80 0x00000044
1972 12:59:53.023808 ROMSTAGE 3. 0x76ffeb60 0x00000004
1973 12:59:53.027131 MEM INFO 4. 0x76ffe980 0x000001e0
1974 12:59:53.033900 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1975 12:59:53.037187 MTRR: Physical address space:
1976 12:59:53.043609 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1977 12:59:53.050405 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1978 12:59:53.056635 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1979 12:59:53.063418 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1980 12:59:53.066840 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1981 12:59:53.073421 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1982 12:59:53.079909 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1983 12:59:53.086733 MTRR: Fixed MSR 0x250 0x0606060606060606
1984 12:59:53.090059 MTRR: Fixed MSR 0x258 0x0606060606060606
1985 12:59:53.093417 MTRR: Fixed MSR 0x259 0x0000000000000000
1986 12:59:53.096676 MTRR: Fixed MSR 0x268 0x0606060606060606
1987 12:59:53.100132 MTRR: Fixed MSR 0x269 0x0606060606060606
1988 12:59:53.106351 MTRR: Fixed MSR 0x26a 0x0606060606060606
1989 12:59:53.109719 MTRR: Fixed MSR 0x26b 0x0606060606060606
1990 12:59:53.113170 MTRR: Fixed MSR 0x26c 0x0606060606060606
1991 12:59:53.116712 MTRR: Fixed MSR 0x26d 0x0606060606060606
1992 12:59:53.123005 MTRR: Fixed MSR 0x26e 0x0606060606060606
1993 12:59:53.126454 MTRR: Fixed MSR 0x26f 0x0606060606060606
1994 12:59:53.129738 call enable_fixed_mtrr()
1995 12:59:53.133086 CPU physical address size: 39 bits
1996 12:59:53.136679 MTRR: default type WB/UC MTRR counts: 6/6.
1997 12:59:53.139929 MTRR: UC selected as default type.
1998 12:59:53.146117 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1999 12:59:53.152963 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2000 12:59:53.159642 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2001 12:59:53.166369 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2002 12:59:53.172949 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2003 12:59:53.179463 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2004 12:59:53.182857 MTRR: Fixed MSR 0x250 0x0606060606060606
2005 12:59:53.189268 MTRR: Fixed MSR 0x258 0x0606060606060606
2006 12:59:53.192624 MTRR: Fixed MSR 0x259 0x0000000000000000
2007 12:59:53.195986 MTRR: Fixed MSR 0x268 0x0606060606060606
2008 12:59:53.199401 MTRR: Fixed MSR 0x269 0x0606060606060606
2009 12:59:53.206422 MTRR: Fixed MSR 0x26a 0x0606060606060606
2010 12:59:53.209230 MTRR: Fixed MSR 0x26b 0x0606060606060606
2011 12:59:53.212642 MTRR: Fixed MSR 0x26c 0x0606060606060606
2012 12:59:53.215939 MTRR: Fixed MSR 0x26d 0x0606060606060606
2013 12:59:53.222769 MTRR: Fixed MSR 0x26e 0x0606060606060606
2014 12:59:53.225810 MTRR: Fixed MSR 0x26f 0x0606060606060606
2015 12:59:53.225889
2016 12:59:53.229099 MTRR check
2017 12:59:53.229207 call enable_fixed_mtrr()
2018 12:59:53.235874 MTRR: Fixed MSR 0x250 0x0606060606060606
2019 12:59:53.238877 MTRR: Fixed MSR 0x250 0x0606060606060606
2020 12:59:53.242245 MTRR: Fixed MSR 0x258 0x0606060606060606
2021 12:59:53.245655 MTRR: Fixed MSR 0x259 0x0000000000000000
2022 12:59:53.249090 MTRR: Fixed MSR 0x268 0x0606060606060606
2023 12:59:53.255816 MTRR: Fixed MSR 0x269 0x0606060606060606
2024 12:59:53.258991 MTRR: Fixed MSR 0x26a 0x0606060606060606
2025 12:59:53.262434 MTRR: Fixed MSR 0x26b 0x0606060606060606
2026 12:59:53.265401 MTRR: Fixed MSR 0x26c 0x0606060606060606
2027 12:59:53.272313 MTRR: Fixed MSR 0x26d 0x0606060606060606
2028 12:59:53.275636 MTRR: Fixed MSR 0x26e 0x0606060606060606
2029 12:59:53.278888 MTRR: Fixed MSR 0x26f 0x0606060606060606
2030 12:59:53.285568 MTRR: Fixed MSR 0x258 0x0606060606060606
2031 12:59:53.285643 call enable_fixed_mtrr()
2032 12:59:53.292388 MTRR: Fixed MSR 0x259 0x0000000000000000
2033 12:59:53.295401 MTRR: Fixed MSR 0x268 0x0606060606060606
2034 12:59:53.298766 MTRR: Fixed MSR 0x269 0x0606060606060606
2035 12:59:53.302118 MTRR: Fixed MSR 0x26a 0x0606060606060606
2036 12:59:53.308801 MTRR: Fixed MSR 0x26b 0x0606060606060606
2037 12:59:53.312209 MTRR: Fixed MSR 0x26c 0x0606060606060606
2038 12:59:53.315121 MTRR: Fixed MSR 0x26d 0x0606060606060606
2039 12:59:53.318456 MTRR: Fixed MSR 0x26e 0x0606060606060606
2040 12:59:53.325402 MTRR: Fixed MSR 0x26f 0x0606060606060606
2041 12:59:53.328232 CPU physical address size: 39 bits
2042 12:59:53.331745 call enable_fixed_mtrr()
2043 12:59:53.338687 Fixed MTRRs : CPU physical address size: 39 bits
2044 12:59:53.338772 Enabled
2045 12:59:53.341491 CPU physical address size: 39 bits
2046 12:59:53.344902 MTRR: Fixed MSR 0x250 0x0606060606060606
2047 12:59:53.351610 MTRR: Fixed MSR 0x250 0x0606060606060606
2048 12:59:53.354930 MTRR: Fixed MSR 0x258 0x0606060606060606
2049 12:59:53.358337 MTRR: Fixed MSR 0x259 0x0000000000000000
2050 12:59:53.361616 MTRR: Fixed MSR 0x268 0x0606060606060606
2051 12:59:53.368232 MTRR: Fixed MSR 0x269 0x0606060606060606
2052 12:59:53.371288 MTRR: Fixed MSR 0x26a 0x0606060606060606
2053 12:59:53.374970 MTRR: Fixed MSR 0x26b 0x0606060606060606
2054 12:59:53.377996 MTRR: Fixed MSR 0x26c 0x0606060606060606
2055 12:59:53.384642 MTRR: Fixed MSR 0x26d 0x0606060606060606
2056 12:59:53.388264 MTRR: Fixed MSR 0x26e 0x0606060606060606
2057 12:59:53.391200 MTRR: Fixed MSR 0x26f 0x0606060606060606
2058 12:59:53.397773 MTRR: Fixed MSR 0x258 0x0606060606060606
2059 12:59:53.397863 call enable_fixed_mtrr()
2060 12:59:53.404528 MTRR: Fixed MSR 0x259 0x0000000000000000
2061 12:59:53.407929 MTRR: Fixed MSR 0x268 0x0606060606060606
2062 12:59:53.411309 MTRR: Fixed MSR 0x269 0x0606060606060606
2063 12:59:53.414683 MTRR: Fixed MSR 0x26a 0x0606060606060606
2064 12:59:53.421432 MTRR: Fixed MSR 0x26b 0x0606060606060606
2065 12:59:53.424781 MTRR: Fixed MSR 0x26c 0x0606060606060606
2066 12:59:53.427730 MTRR: Fixed MSR 0x26d 0x0606060606060606
2067 12:59:53.431143 MTRR: Fixed MSR 0x26e 0x0606060606060606
2068 12:59:53.434686 MTRR: Fixed MSR 0x26f 0x0606060606060606
2069 12:59:53.441238 CPU physical address size: 39 bits
2070 12:59:53.444613 call enable_fixed_mtrr()
2071 12:59:53.447644 MTRR: Fixed MSR 0x250 0x0606060606060606
2072 12:59:53.450987 MTRR: Fixed MSR 0x250 0x0606060606060606
2073 12:59:53.457843 MTRR: Fixed MSR 0x258 0x0606060606060606
2074 12:59:53.461219 MTRR: Fixed MSR 0x259 0x0000000000000000
2075 12:59:53.464461 MTRR: Fixed MSR 0x268 0x0606060606060606
2076 12:59:53.467763 MTRR: Fixed MSR 0x269 0x0606060606060606
2077 12:59:53.474078 MTRR: Fixed MSR 0x26a 0x0606060606060606
2078 12:59:53.477709 MTRR: Fixed MSR 0x26b 0x0606060606060606
2079 12:59:53.480802 MTRR: Fixed MSR 0x26c 0x0606060606060606
2080 12:59:53.484148 MTRR: Fixed MSR 0x26d 0x0606060606060606
2081 12:59:53.490960 MTRR: Fixed MSR 0x26e 0x0606060606060606
2082 12:59:53.494201 MTRR: Fixed MSR 0x26f 0x0606060606060606
2083 12:59:53.497337 MTRR: Fixed MSR 0x258 0x0606060606060606
2084 12:59:53.504076 MTRR: Fixed MSR 0x259 0x0000000000000000
2085 12:59:53.507145 MTRR: Fixed MSR 0x268 0x0606060606060606
2086 12:59:53.510620 MTRR: Fixed MSR 0x269 0x0606060606060606
2087 12:59:53.513914 MTRR: Fixed MSR 0x26a 0x0606060606060606
2088 12:59:53.520715 MTRR: Fixed MSR 0x26b 0x0606060606060606
2089 12:59:53.524175 MTRR: Fixed MSR 0x26c 0x0606060606060606
2090 12:59:53.527216 MTRR: Fixed MSR 0x26d 0x0606060606060606
2091 12:59:53.530633 MTRR: Fixed MSR 0x26e 0x0606060606060606
2092 12:59:53.533971 MTRR: Fixed MSR 0x26f 0x0606060606060606
2093 12:59:53.540285 call enable_fixed_mtrr()
2094 12:59:53.540368 call enable_fixed_mtrr()
2095 12:59:53.547347 Variable MTRRs: CPU physical address size: 39 bits
2096 12:59:53.550380 CPU physical address size: 39 bits
2097 12:59:53.553747 Enabled
2098 12:59:53.557204 CPU physical address size: 39 bits
2099 12:59:53.557308
2100 12:59:53.563875 BS: BS_WRITE_TABLES exit times (exec / console): 370 / 152 ms
2101 12:59:53.570168 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2102 12:59:53.573857 Checking segment from ROM address 0xffc02b38
2103 12:59:53.580269 Checking segment from ROM address 0xffc02b54
2104 12:59:53.583392 Loading segment from ROM address 0xffc02b38
2105 12:59:53.587150 code (compression=0)
2106 12:59:53.593294 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2107 12:59:53.603282 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2108 12:59:53.603367 it's not compressed!
2109 12:59:53.743918 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2110 12:59:53.750278 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2111 12:59:53.757046 Loading segment from ROM address 0xffc02b54
2112 12:59:53.757130 Entry Point 0x30000000
2113 12:59:53.760361 Loaded segments
2114 12:59:53.767149 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2115 12:59:53.810057 Finalizing chipset.
2116 12:59:53.813221 Finalizing SMM.
2117 12:59:53.813314 APMC done.
2118 12:59:53.820124 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2119 12:59:53.823481 mp_park_aps done after 0 msecs.
2120 12:59:53.826354 Jumping to boot code at 0x30000000(0x76b25000)
2121 12:59:53.836590 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2122 12:59:53.836675
2123 12:59:53.836740
2124 12:59:53.836801
2125 12:59:53.840031 Starting depthcharge on Voema...
2126 12:59:53.840114
2127 12:59:53.840503 end: 2.2.3 depthcharge-start (duration 00:00:04) [common]
2128 12:59:53.840602 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
2129 12:59:53.840686 Setting prompt string to ['volteer:']
2130 12:59:53.840770 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:47)
2131 12:59:53.849789 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2132 12:59:53.849872
2133 12:59:53.856680 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2134 12:59:53.856765
2135 12:59:53.859833 Looking for NVMe Controller 0x3005f238 @ 00:1d:00
2136 12:59:53.862905
2137 12:59:53.866305 Failed to find eMMC card reader
2138 12:59:53.866388
2139 12:59:53.866454 Wipe memory regions:
2140 12:59:53.866514
2141 12:59:53.873047 [0x00000000001000, 0x000000000a0000)
2142 12:59:53.873145
2143 12:59:53.876611 [0x00000000100000, 0x00000030000000)
2144 12:59:53.901381
2145 12:59:53.904705 [0x00000032662db0, 0x000000769ef000)
2146 12:59:53.939861
2147 12:59:53.943155 [0x00000100000000, 0x00000280400000)
2148 12:59:54.145791
2149 12:59:54.149106 ec_init: CrosEC protocol v3 supported (256, 256)
2150 12:59:54.149186
2151 12:59:54.155835 update_port_state: port C0 state: usb enable 1 mux conn 0
2152 12:59:54.155919
2153 12:59:54.165647 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2154 12:59:54.165730
2155 12:59:54.169067 pmc_check_ipc_sts: STS_BUSY done after 1561 us
2156 12:59:54.169166
2157 12:59:54.175814 send_conn_disc_msg: pmc_send_cmd succeeded
2158 12:59:54.606309
2159 12:59:54.606457 R8152: Initializing
2160 12:59:54.606526
2161 12:59:54.609643 Version 6 (ocp_data = 5c30)
2162 12:59:54.609729
2163 12:59:54.613154 R8152: Done initializing
2164 12:59:54.613258
2165 12:59:54.616456 Adding net device
2166 12:59:54.918275
2167 12:59:54.921057 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2168 12:59:54.921144
2169 12:59:54.921208
2170 12:59:54.921266
2171 12:59:54.924590 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2173 12:59:55.024936 volteer: tftpboot 192.168.201.1 13607163/tftp-deploy-tg8xewbh/kernel/bzImage 13607163/tftp-deploy-tg8xewbh/kernel/cmdline 13607163/tftp-deploy-tg8xewbh/ramdisk/ramdisk.cpio.gz
2174 12:59:55.025070 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2175 12:59:55.025154 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:46)
2176 12:59:55.029510 tftpboot 192.168.201.1 13607163/tftp-deploy-tg8xewbh/kernel/bzImploy-tg8xewbh/kernel/cmdline 13607163/tftp-deploy-tg8xewbh/ramdisk/ramdisk.cpio.gz
2177 12:59:55.029594
2178 12:59:55.029662 Waiting for link
2179 12:59:55.233189
2180 12:59:55.233367 done.
2181 12:59:55.233444
2182 12:59:55.233508 MAC: 00:24:32:30:78:74
2183 12:59:55.233570
2184 12:59:55.235946 Sending DHCP discover... done.
2185 12:59:55.236024
2186 12:59:55.239353 Waiting for reply... done.
2187 12:59:55.239451
2188 12:59:55.242780 Sending DHCP request... done.
2189 12:59:55.242883
2190 12:59:55.249625 Waiting for reply... done.
2191 12:59:55.249708
2192 12:59:55.249774 My ip is 192.168.201.14
2193 12:59:55.249834
2194 12:59:55.252657 The DHCP server ip is 192.168.201.1
2195 12:59:55.256388
2196 12:59:55.259483 TFTP server IP predefined by user: 192.168.201.1
2197 12:59:55.259567
2198 12:59:55.265908 Bootfile predefined by user: 13607163/tftp-deploy-tg8xewbh/kernel/bzImage
2199 12:59:55.265991
2200 12:59:55.269248 Sending tftp read request... done.
2201 12:59:55.269366
2202 12:59:55.272670 Waiting for the transfer...
2203 12:59:55.272756
2204 12:59:55.809759 00000000 ################################################################
2205 12:59:55.809896
2206 12:59:56.326095 00080000 ################################################################
2207 12:59:56.326231
2208 12:59:56.853698 00100000 ################################################################
2209 12:59:56.853843
2210 12:59:57.377467 00180000 ################################################################
2211 12:59:57.377602
2212 12:59:57.903524 00200000 ################################################################
2213 12:59:57.903690
2214 12:59:58.446141 00280000 ################################################################
2215 12:59:58.446282
2216 12:59:58.985304 00300000 ################################################################
2217 12:59:58.985452
2218 12:59:59.509289 00380000 ################################################################
2219 12:59:59.509497
2220 13:00:00.032133 00400000 ################################################################
2221 13:00:00.032285
2222 13:00:00.551759 00480000 ################################################################
2223 13:00:00.551908
2224 13:00:01.076619 00500000 ################################################################
2225 13:00:01.076751
2226 13:00:01.597151 00580000 ################################################################
2227 13:00:01.597309
2228 13:00:02.101669 00600000 ################################################################
2229 13:00:02.101810
2230 13:00:02.610956 00680000 ################################################################
2231 13:00:02.611137
2232 13:00:03.148165 00700000 ################################################################
2233 13:00:03.148346
2234 13:00:03.709172 00780000 ################################################################
2235 13:00:03.709344
2236 13:00:04.342776 00800000 ################################################################
2237 13:00:04.343292
2238 13:00:04.996818 00880000 ################################################################
2239 13:00:04.997340
2240 13:00:05.654521 00900000 ################################################################
2241 13:00:05.655137
2242 13:00:06.342260 00980000 ################################################################
2243 13:00:06.342773
2244 13:00:07.029153 00a00000 ################################################################
2245 13:00:07.029817
2246 13:00:07.778231 00a80000 ################################################################
2247 13:00:07.778840
2248 13:00:08.527255 00b00000 ################################################################
2249 13:00:08.527790
2250 13:00:09.264019 00b80000 ################################################################
2251 13:00:09.264556
2252 13:00:09.984600 00c00000 ################################################################
2253 13:00:09.985131
2254 13:00:10.725389 00c80000 ################################################################
2255 13:00:10.725921
2256 13:00:11.365907 00d00000 ######################################################## done.
2257 13:00:11.366459
2258 13:00:11.369387 The bootfile was 14090128 bytes long.
2259 13:00:11.369934
2260 13:00:11.372127 Sending tftp read request... done.
2261 13:00:11.372558
2262 13:00:11.375609 Waiting for the transfer...
2263 13:00:11.376153
2264 13:00:12.068019 00000000 ################################################################
2265 13:00:12.068537
2266 13:00:12.774545 00080000 ################################################################
2267 13:00:12.775066
2268 13:00:13.487496 00100000 ################################################################
2269 13:00:13.488022
2270 13:00:14.179706 00180000 ################################################################
2271 13:00:14.180270
2272 13:00:14.825138 00200000 ################################################################
2273 13:00:14.825291
2274 13:00:15.418559 00280000 ################################################################
2275 13:00:15.418711
2276 13:00:16.015220 00300000 ################################################################
2277 13:00:16.015748
2278 13:00:16.683383 00380000 ################################################################
2279 13:00:16.683911
2280 13:00:17.321207 00400000 ################################################################
2281 13:00:17.321396
2282 13:00:17.887932 00480000 ################################################################
2283 13:00:17.888097
2284 13:00:18.459491 00500000 ################################################################
2285 13:00:18.459631
2286 13:00:19.016759 00580000 ################################################################
2287 13:00:19.016908
2288 13:00:19.587555 00600000 ################################################################
2289 13:00:19.587704
2290 13:00:19.937264 00680000 ################################## done.
2291 13:00:19.937865
2292 13:00:19.940711 Sending tftp read request... done.
2293 13:00:19.941144
2294 13:00:19.944022 Waiting for the transfer...
2295 13:00:19.944596
2296 13:00:19.944972 00000000 # done.
2297 13:00:19.945374
2298 13:00:19.953829 Command line loaded dynamically from TFTP file: 13607163/tftp-deploy-tg8xewbh/kernel/cmdline
2299 13:00:19.954303
2300 13:00:19.977469 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/13607163/extract-nfsrootfs-l12gp4ei,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2301 13:00:19.984245
2302 13:00:19.987341 Shutting down all USB controllers.
2303 13:00:19.987916
2304 13:00:19.988291 Removing current net device
2305 13:00:19.988638
2306 13:00:19.990562 Finalizing coreboot
2307 13:00:19.991095
2308 13:00:19.997491 Exiting depthcharge with code 4 at timestamp: 34823237
2309 13:00:19.998081
2310 13:00:19.998554
2311 13:00:19.998916 Starting kernel ...
2312 13:00:19.999252
2313 13:00:19.999578
2314 13:00:20.000942 end: 2.2.4 bootloader-commands (duration 00:00:26) [common]
2315 13:00:20.001504 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2316 13:00:20.001926 Setting prompt string to ['Linux version [0-9]']
2317 13:00:20.002310 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2318 13:00:20.002696 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2320 13:04:41.003331 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2322 13:04:41.004410 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2324 13:04:41.005283 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2327 13:04:41.006743 end: 2 depthcharge-action (duration 00:05:00) [common]
2329 13:04:41.006959 Cleaning after the job
2330 13:04:41.007042 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13607163/tftp-deploy-tg8xewbh/ramdisk
2331 13:04:41.007974 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13607163/tftp-deploy-tg8xewbh/kernel
2332 13:04:41.009537 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13607163/tftp-deploy-tg8xewbh/nfsrootfs
2333 13:04:41.092632 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13607163/tftp-deploy-tg8xewbh/modules
2334 13:04:41.093176 start: 4.1 power-off (timeout 00:00:30) [common]
2335 13:04:41.093398 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cp514-2h-1130g7-volteer-cbg-1' '--port=1' '--command=off'
2336 13:04:42.017406 >> Command sent successfully.
2337 13:04:42.028265 Returned 0 in 0 seconds
2338 13:04:42.129724 end: 4.1 power-off (duration 00:00:01) [common]
2340 13:04:42.131233 start: 4.2 read-feedback (timeout 00:09:59) [common]
2341 13:04:42.132546 Listened to connection for namespace 'common' for up to 1s
2343 13:04:42.133987 Listened to connection for namespace 'common' for up to 1s
2344 13:04:43.133388 Finalising connection for namespace 'common'
2345 13:04:43.134086 Disconnecting from shell: Finalise
2346 13:04:43.134502
2347 13:04:43.235633 end: 4.2 read-feedback (duration 00:00:01) [common]
2348 13:04:43.236239 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13607163
2349 13:04:43.628068 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13607163
2350 13:04:43.628268 JobError: Your job cannot terminate cleanly.