Boot log: acer-cp514-2h-1130g7-volteer
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 11:44:34.641191 lava-dispatcher, installed at version: 2024.01
2 11:44:34.641391 start: 0 validate
3 11:44:34.641518 Start time: 2024-05-03 11:44:34.641511+00:00 (UTC)
4 11:44:34.641639 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:44:34.641765 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Fx86%2Frootfs.cpio.gz exists
6 11:44:34.903537 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:44:34.904383 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2481-gef9c8224c1829%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:44:35.166888 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:44:35.167578 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2481-gef9c8224c1829%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 11:44:39.107036 validate duration: 4.47
12 11:44:39.108406 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 11:44:39.108992 start: 1.1 download-retry (timeout 00:10:00) [common]
14 11:44:39.109547 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 11:44:39.110157 Not decompressing ramdisk as can be used compressed.
16 11:44:39.110599 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/x86/rootfs.cpio.gz
17 11:44:39.110922 saving as /var/lib/lava/dispatcher/tmp/13627367/tftp-deploy-zqd31csa/ramdisk/rootfs.cpio.gz
18 11:44:39.111236 total size: 8417901 (8 MB)
19 11:44:40.298486 progress 0 % (0 MB)
20 11:44:40.310088 progress 5 % (0 MB)
21 11:44:40.321799 progress 10 % (0 MB)
22 11:44:40.331590 progress 15 % (1 MB)
23 11:44:40.337856 progress 20 % (1 MB)
24 11:44:40.342604 progress 25 % (2 MB)
25 11:44:40.346746 progress 30 % (2 MB)
26 11:44:40.350074 progress 35 % (2 MB)
27 11:44:40.353393 progress 40 % (3 MB)
28 11:44:40.356548 progress 45 % (3 MB)
29 11:44:40.359338 progress 50 % (4 MB)
30 11:44:40.362062 progress 55 % (4 MB)
31 11:44:40.364545 progress 60 % (4 MB)
32 11:44:40.366762 progress 65 % (5 MB)
33 11:44:40.369016 progress 70 % (5 MB)
34 11:44:40.371203 progress 75 % (6 MB)
35 11:44:40.373385 progress 80 % (6 MB)
36 11:44:40.375516 progress 85 % (6 MB)
37 11:44:40.377695 progress 90 % (7 MB)
38 11:44:40.379826 progress 95 % (7 MB)
39 11:44:40.381870 progress 100 % (8 MB)
40 11:44:40.382095 8 MB downloaded in 1.27 s (6.32 MB/s)
41 11:44:40.382247 end: 1.1.1 http-download (duration 00:00:01) [common]
43 11:44:40.382477 end: 1.1 download-retry (duration 00:00:01) [common]
44 11:44:40.382559 start: 1.2 download-retry (timeout 00:09:59) [common]
45 11:44:40.382640 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 11:44:40.382775 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2481-gef9c8224c1829/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 11:44:40.382844 saving as /var/lib/lava/dispatcher/tmp/13627367/tftp-deploy-zqd31csa/kernel/bzImage
48 11:44:40.382903 total size: 14090128 (13 MB)
49 11:44:40.382962 No compression specified
50 11:44:40.384064 progress 0 % (0 MB)
51 11:44:40.387604 progress 5 % (0 MB)
52 11:44:40.391149 progress 10 % (1 MB)
53 11:44:40.394769 progress 15 % (2 MB)
54 11:44:40.398281 progress 20 % (2 MB)
55 11:44:40.401935 progress 25 % (3 MB)
56 11:44:40.405447 progress 30 % (4 MB)
57 11:44:40.409138 progress 35 % (4 MB)
58 11:44:40.412650 progress 40 % (5 MB)
59 11:44:40.416320 progress 45 % (6 MB)
60 11:44:40.419775 progress 50 % (6 MB)
61 11:44:40.423427 progress 55 % (7 MB)
62 11:44:40.426938 progress 60 % (8 MB)
63 11:44:40.430616 progress 65 % (8 MB)
64 11:44:40.434196 progress 70 % (9 MB)
65 11:44:40.437829 progress 75 % (10 MB)
66 11:44:40.441282 progress 80 % (10 MB)
67 11:44:40.444874 progress 85 % (11 MB)
68 11:44:40.448278 progress 90 % (12 MB)
69 11:44:40.451815 progress 95 % (12 MB)
70 11:44:40.455268 progress 100 % (13 MB)
71 11:44:40.455502 13 MB downloaded in 0.07 s (185.10 MB/s)
72 11:44:40.455645 end: 1.2.1 http-download (duration 00:00:00) [common]
74 11:44:40.455870 end: 1.2 download-retry (duration 00:00:00) [common]
75 11:44:40.456000 start: 1.3 download-retry (timeout 00:09:59) [common]
76 11:44:40.456085 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 11:44:40.456214 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2481-gef9c8224c1829/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 11:44:40.456280 saving as /var/lib/lava/dispatcher/tmp/13627367/tftp-deploy-zqd31csa/modules/modules.tar
79 11:44:40.456340 total size: 484648 (0 MB)
80 11:44:40.456400 Using unxz to decompress xz
81 11:44:40.460422 progress 6 % (0 MB)
82 11:44:40.460832 progress 13 % (0 MB)
83 11:44:40.461070 progress 20 % (0 MB)
84 11:44:40.462716 progress 27 % (0 MB)
85 11:44:40.464508 progress 33 % (0 MB)
86 11:44:40.466483 progress 40 % (0 MB)
87 11:44:40.468405 progress 47 % (0 MB)
88 11:44:40.470082 progress 54 % (0 MB)
89 11:44:40.471862 progress 60 % (0 MB)
90 11:44:40.473518 progress 67 % (0 MB)
91 11:44:40.475237 progress 74 % (0 MB)
92 11:44:40.477202 progress 81 % (0 MB)
93 11:44:40.478877 progress 87 % (0 MB)
94 11:44:40.480787 progress 94 % (0 MB)
95 11:44:40.482507 progress 100 % (0 MB)
96 11:44:40.488109 0 MB downloaded in 0.03 s (14.55 MB/s)
97 11:44:40.488346 end: 1.3.1 http-download (duration 00:00:00) [common]
99 11:44:40.488610 end: 1.3 download-retry (duration 00:00:00) [common]
100 11:44:40.488699 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
101 11:44:40.488792 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
102 11:44:40.488871 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 11:44:40.488954 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
104 11:44:40.489171 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13627367/lava-overlay-9xag9z8r
105 11:44:40.489304 makedir: /var/lib/lava/dispatcher/tmp/13627367/lava-overlay-9xag9z8r/lava-13627367/bin
106 11:44:40.489407 makedir: /var/lib/lava/dispatcher/tmp/13627367/lava-overlay-9xag9z8r/lava-13627367/tests
107 11:44:40.489502 makedir: /var/lib/lava/dispatcher/tmp/13627367/lava-overlay-9xag9z8r/lava-13627367/results
108 11:44:40.489615 Creating /var/lib/lava/dispatcher/tmp/13627367/lava-overlay-9xag9z8r/lava-13627367/bin/lava-add-keys
109 11:44:40.489754 Creating /var/lib/lava/dispatcher/tmp/13627367/lava-overlay-9xag9z8r/lava-13627367/bin/lava-add-sources
110 11:44:40.489880 Creating /var/lib/lava/dispatcher/tmp/13627367/lava-overlay-9xag9z8r/lava-13627367/bin/lava-background-process-start
111 11:44:40.490006 Creating /var/lib/lava/dispatcher/tmp/13627367/lava-overlay-9xag9z8r/lava-13627367/bin/lava-background-process-stop
112 11:44:40.490127 Creating /var/lib/lava/dispatcher/tmp/13627367/lava-overlay-9xag9z8r/lava-13627367/bin/lava-common-functions
113 11:44:40.490247 Creating /var/lib/lava/dispatcher/tmp/13627367/lava-overlay-9xag9z8r/lava-13627367/bin/lava-echo-ipv4
114 11:44:40.490367 Creating /var/lib/lava/dispatcher/tmp/13627367/lava-overlay-9xag9z8r/lava-13627367/bin/lava-install-packages
115 11:44:40.490485 Creating /var/lib/lava/dispatcher/tmp/13627367/lava-overlay-9xag9z8r/lava-13627367/bin/lava-installed-packages
116 11:44:40.490603 Creating /var/lib/lava/dispatcher/tmp/13627367/lava-overlay-9xag9z8r/lava-13627367/bin/lava-os-build
117 11:44:40.490722 Creating /var/lib/lava/dispatcher/tmp/13627367/lava-overlay-9xag9z8r/lava-13627367/bin/lava-probe-channel
118 11:44:40.490840 Creating /var/lib/lava/dispatcher/tmp/13627367/lava-overlay-9xag9z8r/lava-13627367/bin/lava-probe-ip
119 11:44:40.490958 Creating /var/lib/lava/dispatcher/tmp/13627367/lava-overlay-9xag9z8r/lava-13627367/bin/lava-target-ip
120 11:44:40.491078 Creating /var/lib/lava/dispatcher/tmp/13627367/lava-overlay-9xag9z8r/lava-13627367/bin/lava-target-mac
121 11:44:40.491195 Creating /var/lib/lava/dispatcher/tmp/13627367/lava-overlay-9xag9z8r/lava-13627367/bin/lava-target-storage
122 11:44:40.491317 Creating /var/lib/lava/dispatcher/tmp/13627367/lava-overlay-9xag9z8r/lava-13627367/bin/lava-test-case
123 11:44:40.491435 Creating /var/lib/lava/dispatcher/tmp/13627367/lava-overlay-9xag9z8r/lava-13627367/bin/lava-test-event
124 11:44:40.491551 Creating /var/lib/lava/dispatcher/tmp/13627367/lava-overlay-9xag9z8r/lava-13627367/bin/lava-test-feedback
125 11:44:40.491669 Creating /var/lib/lava/dispatcher/tmp/13627367/lava-overlay-9xag9z8r/lava-13627367/bin/lava-test-raise
126 11:44:40.491795 Creating /var/lib/lava/dispatcher/tmp/13627367/lava-overlay-9xag9z8r/lava-13627367/bin/lava-test-reference
127 11:44:40.491923 Creating /var/lib/lava/dispatcher/tmp/13627367/lava-overlay-9xag9z8r/lava-13627367/bin/lava-test-runner
128 11:44:40.492045 Creating /var/lib/lava/dispatcher/tmp/13627367/lava-overlay-9xag9z8r/lava-13627367/bin/lava-test-set
129 11:44:40.492168 Creating /var/lib/lava/dispatcher/tmp/13627367/lava-overlay-9xag9z8r/lava-13627367/bin/lava-test-shell
130 11:44:40.492290 Updating /var/lib/lava/dispatcher/tmp/13627367/lava-overlay-9xag9z8r/lava-13627367/bin/lava-install-packages (oe)
131 11:44:40.492435 Updating /var/lib/lava/dispatcher/tmp/13627367/lava-overlay-9xag9z8r/lava-13627367/bin/lava-installed-packages (oe)
132 11:44:40.492558 Creating /var/lib/lava/dispatcher/tmp/13627367/lava-overlay-9xag9z8r/lava-13627367/environment
133 11:44:40.492656 LAVA metadata
134 11:44:40.492731 - LAVA_JOB_ID=13627367
135 11:44:40.492794 - LAVA_DISPATCHER_IP=192.168.201.1
136 11:44:40.492897 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
137 11:44:40.492963 skipped lava-vland-overlay
138 11:44:40.493038 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 11:44:40.493120 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
140 11:44:40.493180 skipped lava-multinode-overlay
141 11:44:40.493251 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 11:44:40.493333 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
143 11:44:40.493403 Loading test definitions
144 11:44:40.493492 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
145 11:44:40.493565 Using /lava-13627367 at stage 0
146 11:44:40.493870 uuid=13627367_1.4.2.3.1 testdef=None
147 11:44:40.493956 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 11:44:40.494039 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
149 11:44:40.494561 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 11:44:40.494773 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
152 11:44:40.495386 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 11:44:40.495610 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
155 11:44:40.496211 runner path: /var/lib/lava/dispatcher/tmp/13627367/lava-overlay-9xag9z8r/lava-13627367/0/tests/0_dmesg test_uuid 13627367_1.4.2.3.1
156 11:44:40.496363 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 11:44:40.496575 Creating lava-test-runner.conf files
159 11:44:40.496637 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13627367/lava-overlay-9xag9z8r/lava-13627367/0 for stage 0
160 11:44:40.496724 - 0_dmesg
161 11:44:40.496816 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
162 11:44:40.496897 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
163 11:44:40.503922 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
164 11:44:40.504024 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
165 11:44:40.504107 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
166 11:44:40.504188 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
167 11:44:40.504271 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
168 11:44:40.745789 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
169 11:44:40.746141 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
170 11:44:40.746252 extracting modules file /var/lib/lava/dispatcher/tmp/13627367/tftp-deploy-zqd31csa/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13627367/extract-overlay-ramdisk-d7o2ikl6/ramdisk
171 11:44:40.760940 end: 1.4.4 extract-modules (duration 00:00:00) [common]
172 11:44:40.761068 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
173 11:44:40.761155 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13627367/compress-overlay-ia61sb6q/overlay-1.4.2.4.tar.gz to ramdisk
174 11:44:40.761225 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13627367/compress-overlay-ia61sb6q/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13627367/extract-overlay-ramdisk-d7o2ikl6/ramdisk
175 11:44:40.767666 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
176 11:44:40.767775 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
177 11:44:40.767863 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
178 11:44:40.768008 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
179 11:44:40.768081 Building ramdisk /var/lib/lava/dispatcher/tmp/13627367/extract-overlay-ramdisk-d7o2ikl6/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13627367/extract-overlay-ramdisk-d7o2ikl6/ramdisk
180 11:44:40.892217 >> 51652 blocks
181 11:44:41.751775 rename /var/lib/lava/dispatcher/tmp/13627367/extract-overlay-ramdisk-d7o2ikl6/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13627367/tftp-deploy-zqd31csa/ramdisk/ramdisk.cpio.gz
182 11:44:41.752278 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
183 11:44:41.752397 start: 1.4.8 prepare-kernel (timeout 00:09:57) [common]
184 11:44:41.752499 start: 1.4.8.1 prepare-fit (timeout 00:09:57) [common]
185 11:44:41.752588 No mkimage arch provided, not using FIT.
186 11:44:41.752676 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
187 11:44:41.752756 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
188 11:44:41.752854 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
189 11:44:41.752941 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:57) [common]
190 11:44:41.753022 No LXC device requested
191 11:44:41.753104 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
192 11:44:41.753187 start: 1.6 deploy-device-env (timeout 00:09:57) [common]
193 11:44:41.753266 end: 1.6 deploy-device-env (duration 00:00:00) [common]
194 11:44:41.753339 Checking files for TFTP limit of 4294967296 bytes.
195 11:44:41.753725 end: 1 tftp-deploy (duration 00:00:03) [common]
196 11:44:41.753825 start: 2 depthcharge-action (timeout 00:05:00) [common]
197 11:44:41.753914 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
198 11:44:41.754068 substitutions:
199 11:44:41.754131 - {DTB}: None
200 11:44:41.754192 - {INITRD}: 13627367/tftp-deploy-zqd31csa/ramdisk/ramdisk.cpio.gz
201 11:44:41.754249 - {KERNEL}: 13627367/tftp-deploy-zqd31csa/kernel/bzImage
202 11:44:41.754305 - {LAVA_MAC}: None
203 11:44:41.754359 - {PRESEED_CONFIG}: None
204 11:44:41.754413 - {PRESEED_LOCAL}: None
205 11:44:41.754466 - {RAMDISK}: 13627367/tftp-deploy-zqd31csa/ramdisk/ramdisk.cpio.gz
206 11:44:41.754519 - {ROOT_PART}: None
207 11:44:41.754572 - {ROOT}: None
208 11:44:41.754624 - {SERVER_IP}: 192.168.201.1
209 11:44:41.754691 - {TEE}: None
210 11:44:41.754757 Parsed boot commands:
211 11:44:41.754823 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
212 11:44:41.755020 Parsed boot commands: tftpboot 192.168.201.1 13627367/tftp-deploy-zqd31csa/kernel/bzImage 13627367/tftp-deploy-zqd31csa/kernel/cmdline 13627367/tftp-deploy-zqd31csa/ramdisk/ramdisk.cpio.gz
213 11:44:41.755107 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
214 11:44:41.755189 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
215 11:44:41.755279 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
216 11:44:41.755361 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
217 11:44:41.755430 Not connected, no need to disconnect.
218 11:44:41.755504 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
219 11:44:41.755585 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
220 11:44:41.755656 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cp514-2h-1130g7-volteer-cbg-5'
221 11:44:41.759323 Setting prompt string to ['lava-test: # ']
222 11:44:41.759664 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
223 11:44:41.759768 end: 2.2.1 reset-connection (duration 00:00:00) [common]
224 11:44:41.759864 start: 2.2.2 reset-device (timeout 00:05:00) [common]
225 11:44:41.760205 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
226 11:44:41.760439 Calling: '/usr/local/bin/chromebook-reboot.sh' 'acer-cp514-2h-1130g7-volteer-cbg-5'
227 11:44:50.553654 Returned 0 in 8 seconds
228 11:44:50.654680 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
230 11:44:50.656052 end: 2.2.2 reset-device (duration 00:00:09) [common]
231 11:44:50.656532 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
232 11:44:50.656979 Setting prompt string to 'Starting depthcharge on Voema...'
233 11:44:50.657330 Changing prompt to 'Starting depthcharge on Voema...'
234 11:44:50.657656 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
235 11:44:50.658890 [Enter `^Ec?' for help]
236 11:44:50.659296
237 11:44:50.659635
238 11:44:50.659993 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
239 11:44:50.660400 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
240 11:44:50.660725 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
241 11:44:50.661041 CPU: AES supported, TXT NOT supported, VT supported
242 11:44:50.661343 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
243 11:44:50.661631 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
244 11:44:50.661916 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
245 11:44:50.662197 VBOOT: Loading verstage.
246 11:44:50.662480 FMAP: Found "FLASH" version 1.1 at 0x1804000.
247 11:44:50.662764 FMAP: base = 0x0 size = 0x2000000 #areas = 32
248 11:44:50.663051 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
249 11:44:50.663334 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
250 11:44:50.663626 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
251 11:44:50.663951
252 11:44:50.664455
253 11:44:50.664915 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
254 11:44:50.665231 Probing TPM: . done!
255 11:44:50.665521 TPM ready after 0 ms
256 11:44:50.665810 Connected to device vid:did:rid of 1ae0:0028:00
257 11:44:50.666101 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
258 11:44:50.666404 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
259 11:44:50.666691 Initialized TPM device CR50 revision 0
260 11:44:50.666975 tlcl_send_startup: Startup return code is 0
261 11:44:50.667259 TPM: setup succeeded
262 11:44:50.667555 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
263 11:44:50.667840 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
264 11:44:50.668144 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
265 11:44:50.668429 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
266 11:44:50.668707 Chrome EC: UHEPI supported
267 11:44:50.668987 Phase 1
268 11:44:50.669268 FMAP: area GBB found @ 1805000 (458752 bytes)
269 11:44:50.669549 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
270 11:44:50.669829 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
271 11:44:50.670108 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
272 11:44:50.670388 VB2:vb2_check_recovery() Recovery was requested manually
273 11:44:50.670665 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x7
274 11:44:50.670942 Recovery requested (1009000e)
275 11:44:50.671218 TPM: Extending digest for VBOOT: boot mode into PCR 0
276 11:44:50.671497 tlcl_extend: response is 0
277 11:44:50.671772 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
278 11:44:50.672076 tlcl_extend: response is 0
279 11:44:50.672353 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
280 11:44:50.672632 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
281 11:44:50.672920 BS: verstage times (exec / console): total (unknown) / 147 ms
282 11:44:50.673200
283 11:44:50.673477
284 11:44:50.673756 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
285 11:44:50.674038 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
286 11:44:50.674319 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
287 11:44:50.674599 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
288 11:44:50.674879 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
289 11:44:50.675156 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
290 11:44:50.675432 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
291 11:44:50.675709 TCO_STS: 0000 0000
292 11:44:50.676006 GEN_PMCON: d0015038 00002200
293 11:44:50.676286 GBLRST_CAUSE: 00000000 00000000
294 11:44:50.676562 HPR_CAUSE0: 00000000
295 11:44:50.676836 prev_sleep_state 5
296 11:44:50.677110 Boot Count incremented to 28831
297 11:44:50.677386 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
298 11:44:50.677668 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
299 11:44:50.677948 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
300 11:44:50.678225 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
301 11:44:50.678504 Chrome EC: UHEPI supported
302 11:44:50.678779 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
303 11:44:50.679056 Probing TPM: done!
304 11:44:50.679329 Connected to device vid:did:rid of 1ae0:0028:00
305 11:44:50.679605 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
306 11:44:50.679905 Initialized TPM device CR50 revision 0
307 11:44:50.680191 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
308 11:44:50.680473 MRC: Hash idx 0x100b comparison successful.
309 11:44:50.680818 MRC cache found, size faa8
310 11:44:50.681101 bootmode is set to: 2
311 11:44:50.681379 SPD index = 0
312 11:44:50.681656 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
313 11:44:50.681937 SPD: module type is LPDDR4X
314 11:44:50.682214 SPD: module part number is MT53E512M64D4NW-046
315 11:44:50.682493 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
316 11:44:50.682771 SPD: device width 16 bits, bus width 16 bits
317 11:44:50.683050 SPD: module size is 1024 MB (per channel)
318 11:44:50.683329 CBMEM:
319 11:44:50.683606 IMD: root @ 0x76fff000 254 entries.
320 11:44:50.683899 IMD: root @ 0x76ffec00 62 entries.
321 11:44:50.684188 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
322 11:44:50.684824 FMAP: area RW_VPD found @ f35000 (8192 bytes)
323 11:44:50.685159 External stage cache:
324 11:44:50.685440 IMD: root @ 0x7b3ff000 254 entries.
325 11:44:50.685720 IMD: root @ 0x7b3fec00 62 entries.
326 11:44:50.685997 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
327 11:44:50.686274 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
328 11:44:50.686475 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
329 11:44:50.686676 MRC: 'RECOVERY_MRC_CACHE' does not need update.
330 11:44:50.686874 cse_lite: Skip switching to RW in the recovery path
331 11:44:50.687075 8 DIMMs found
332 11:44:50.687278 SMM Memory Map
333 11:44:50.687476 SMRAM : 0x7b000000 0x800000
334 11:44:50.687683 Subregion 0: 0x7b000000 0x200000
335 11:44:50.687881 Subregion 1: 0x7b200000 0x200000
336 11:44:50.688120 Subregion 2: 0x7b400000 0x400000
337 11:44:50.688320 top_of_ram = 0x77000000
338 11:44:50.688521 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
339 11:44:50.688722 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
340 11:44:50.688921 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
341 11:44:50.689121 MTRR Range: Start=ff000000 End=0 (Size 1000000)
342 11:44:50.689320 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
343 11:44:50.689522 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
344 11:44:50.689722 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
345 11:44:50.689924 Processing 211 relocs. Offset value of 0x74c0b000
346 11:44:50.690123 BS: romstage times (exec / console): total (unknown) / 277 ms
347 11:44:50.690323
348 11:44:50.690520
349 11:44:50.690718 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
350 11:44:50.690921 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
351 11:44:50.691125 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
352 11:44:50.691313 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
353 11:44:50.691463 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
354 11:44:50.691613 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
355 11:44:50.691763 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
356 11:44:50.691925 Processing 5008 relocs. Offset value of 0x75d98000
357 11:44:50.692078 BS: postcar times (exec / console): total (unknown) / 59 ms
358 11:44:50.692229
359 11:44:50.692377
360 11:44:50.692525 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
361 11:44:50.692676 Normal boot
362 11:44:50.692834 FW_CONFIG value is 0x804c02
363 11:44:50.692985 PCI: 00:07.0 disabled by fw_config
364 11:44:50.693134 PCI: 00:07.1 disabled by fw_config
365 11:44:50.693284 PCI: 00:0d.2 disabled by fw_config
366 11:44:50.693434 PCI: 00:1c.7 disabled by fw_config
367 11:44:50.693584 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
368 11:44:50.693741 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
369 11:44:50.693891 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
370 11:44:50.694042 GENERIC: 0.0 disabled by fw_config
371 11:44:50.694192 GENERIC: 1.0 disabled by fw_config
372 11:44:50.694340 fw_config match found: DB_USB=USB3_ACTIVE
373 11:44:50.694490 fw_config match found: DB_USB=USB3_ACTIVE
374 11:44:50.694639 fw_config match found: DB_USB=USB3_ACTIVE
375 11:44:50.694788 fw_config match found: DB_USB=USB3_ACTIVE
376 11:44:50.694937 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
377 11:44:50.695088 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
378 11:44:50.695239 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
379 11:44:50.695390 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
380 11:44:50.695541 microcode: sig=0x806c1 pf=0x80 revision=0x86
381 11:44:50.695691 microcode: Update skipped, already up-to-date
382 11:44:50.695841 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
383 11:44:50.696010 Detected 4 core, 8 thread CPU.
384 11:44:50.696160 Setting up SMI for CPU
385 11:44:50.696315 IED base = 0x7b400000
386 11:44:50.696434 IED size = 0x00400000
387 11:44:50.696552 Will perform SMM setup.
388 11:44:50.696700 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
389 11:44:50.696830 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
390 11:44:50.696952 Processing 16 relocs. Offset value of 0x00030000
391 11:44:50.697074 Attempting to start 7 APs
392 11:44:50.697195 Waiting for 10ms after sending INIT.
393 11:44:50.697315 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
394 11:44:50.697435 done.
395 11:44:50.697553 AP: slot 7 apic_id 4.
396 11:44:50.697673 AP: slot 3 apic_id 5.
397 11:44:50.697793 AP: slot 6 apic_id 2.
398 11:44:50.697913 AP: slot 2 apic_id 3.
399 11:44:50.698032 AP: slot 5 apic_id 6.
400 11:44:50.698150 AP: slot 4 apic_id 7.
401 11:44:50.698269 Waiting for 2nd SIPI to complete...done.
402 11:44:50.698389 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
403 11:44:50.698509 Processing 13 relocs. Offset value of 0x00038000
404 11:44:50.698628 Unable to locate Global NVS
405 11:44:50.698748 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
406 11:44:50.698868 Installing permanent SMM handler to 0x7b000000
407 11:44:50.698988 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
408 11:44:50.699110 Processing 794 relocs. Offset value of 0x7b010000
409 11:44:50.699460 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
410 11:44:50.699599 Processing 13 relocs. Offset value of 0x7b008000
411 11:44:50.699750 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
412 11:44:50.699876 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
413 11:44:50.700018 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
414 11:44:50.700139 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
415 11:44:50.700258 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
416 11:44:50.700378 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
417 11:44:50.700498 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
418 11:44:50.700619 Unable to locate Global NVS
419 11:44:50.700738 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
420 11:44:50.700858 Clearing SMI status registers
421 11:44:50.700977 SMI_STS: PM1
422 11:44:50.701095 PM1_STS: PWRBTN
423 11:44:50.701216 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
424 11:44:50.701335 In relocation handler: CPU 0
425 11:44:50.701434 New SMBASE=0x7b000000 IEDBASE=0x7b400000
426 11:44:50.701535 Writing SMRR. base = 0x7b000006, mask=0xff800c00
427 11:44:50.701636 Relocation complete.
428 11:44:50.701736 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
429 11:44:50.701836 In relocation handler: CPU 1
430 11:44:50.701936 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
431 11:44:50.702037 Relocation complete.
432 11:44:50.702137 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
433 11:44:50.702238 In relocation handler: CPU 6
434 11:44:50.702338 New SMBASE=0x7affe800 IEDBASE=0x7b400000
435 11:44:50.702438 Writing SMRR. base = 0x7b000006, mask=0xff800c00
436 11:44:50.702537 Relocation complete.
437 11:44:50.702636 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
438 11:44:50.702737 In relocation handler: CPU 2
439 11:44:50.702837 New SMBASE=0x7afff800 IEDBASE=0x7b400000
440 11:44:50.702936 Relocation complete.
441 11:44:50.703035 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
442 11:44:50.703134 In relocation handler: CPU 7
443 11:44:50.703234 New SMBASE=0x7affe400 IEDBASE=0x7b400000
444 11:44:50.703334 Writing SMRR. base = 0x7b000006, mask=0xff800c00
445 11:44:50.703434 Relocation complete.
446 11:44:50.703534 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
447 11:44:50.703633 In relocation handler: CPU 3
448 11:44:50.703733 New SMBASE=0x7afff400 IEDBASE=0x7b400000
449 11:44:50.703832 Relocation complete.
450 11:44:50.703954 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
451 11:44:50.704057 In relocation handler: CPU 4
452 11:44:50.704156 New SMBASE=0x7afff000 IEDBASE=0x7b400000
453 11:44:50.704256 Relocation complete.
454 11:44:50.704356 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
455 11:44:50.704456 In relocation handler: CPU 5
456 11:44:50.704560 New SMBASE=0x7affec00 IEDBASE=0x7b400000
457 11:44:50.704661 Writing SMRR. base = 0x7b000006, mask=0xff800c00
458 11:44:50.704761 Relocation complete.
459 11:44:50.704860 Initializing CPU #0
460 11:44:50.704959 CPU: vendor Intel device 806c1
461 11:44:50.705059 CPU: family 06, model 8c, stepping 01
462 11:44:50.705158 Clearing out pending MCEs
463 11:44:50.705257 Setting up local APIC...
464 11:44:50.705356 apic_id: 0x00 done.
465 11:44:50.705455 Turbo is available but hidden
466 11:44:50.705555 Turbo is available and visible
467 11:44:50.705654 microcode: Update skipped, already up-to-date
468 11:44:50.705755 CPU #0 initialized
469 11:44:50.705855 Initializing CPU #2
470 11:44:50.705954 Initializing CPU #6
471 11:44:50.706053 CPU: vendor Intel device 806c1
472 11:44:50.706153 CPU: family 06, model 8c, stepping 01
473 11:44:50.706259 CPU: vendor Intel device 806c1
474 11:44:50.706343 CPU: family 06, model 8c, stepping 01
475 11:44:50.706428 Clearing out pending MCEs
476 11:44:50.706512 Clearing out pending MCEs
477 11:44:50.706621 Setting up local APIC...
478 11:44:50.706709 Initializing CPU #1
479 11:44:50.706794 apic_id: 0x03 done.
480 11:44:50.706879 Setting up local APIC...
481 11:44:50.706966 Initializing CPU #7
482 11:44:50.707050 Initializing CPU #3
483 11:44:50.707134 CPU: vendor Intel device 806c1
484 11:44:50.707219 CPU: family 06, model 8c, stepping 01
485 11:44:50.707304 CPU: vendor Intel device 806c1
486 11:44:50.707388 CPU: family 06, model 8c, stepping 01
487 11:44:50.707473 Clearing out pending MCEs
488 11:44:50.707558 Clearing out pending MCEs
489 11:44:50.707642 Setting up local APIC...
490 11:44:50.707727 CPU: vendor Intel device 806c1
491 11:44:50.707811 CPU: family 06, model 8c, stepping 01
492 11:44:50.707905 microcode: Update skipped, already up-to-date
493 11:44:50.707993 apic_id: 0x02 done.
494 11:44:50.708078 CPU #2 initialized
495 11:44:50.708164 microcode: Update skipped, already up-to-date
496 11:44:50.708249 Initializing CPU #5
497 11:44:50.708334 Initializing CPU #4
498 11:44:50.708420 CPU: vendor Intel device 806c1
499 11:44:50.708504 CPU: family 06, model 8c, stepping 01
500 11:44:50.708589 CPU: vendor Intel device 806c1
501 11:44:50.708678 CPU: family 06, model 8c, stepping 01
502 11:44:50.708791 Clearing out pending MCEs
503 11:44:50.708878 Clearing out pending MCEs
504 11:44:50.708964 Setting up local APIC...
505 11:44:50.709050 Clearing out pending MCEs
506 11:44:50.709135 apic_id: 0x06 done.
507 11:44:50.709221 Setting up local APIC...
508 11:44:50.709307 Setting up local APIC...
509 11:44:50.709392 CPU #6 initialized
510 11:44:50.709477 microcode: Update skipped, already up-to-date
511 11:44:50.709562 apic_id: 0x07 done.
512 11:44:50.709648 CPU #5 initialized
513 11:44:50.709734 microcode: Update skipped, already up-to-date
514 11:44:50.709820 apic_id: 0x04 done.
515 11:44:50.709905 Setting up local APIC...
516 11:44:50.709990 CPU #4 initialized
517 11:44:50.710075 microcode: Update skipped, already up-to-date
518 11:44:50.710161 apic_id: 0x05 done.
519 11:44:50.710246 CPU #7 initialized
520 11:44:50.710331 microcode: Update skipped, already up-to-date
521 11:44:50.710417 apic_id: 0x01 done.
522 11:44:50.710501 CPU #3 initialized
523 11:44:50.710815 microcode: Update skipped, already up-to-date
524 11:44:50.710915 CPU #1 initialized
525 11:44:50.711002 bsp_do_flight_plan done after 455 msecs.
526 11:44:50.711089 CPU: frequency set to 4000 MHz
527 11:44:50.711175 Enabling SMIs.
528 11:44:50.711271 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
529 11:44:50.711347 SATAXPCIE1 indicates PCIe NVMe is present
530 11:44:50.711422 Probing TPM: done!
531 11:44:50.711497 Connected to device vid:did:rid of 1ae0:0028:00
532 11:44:50.711573 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
533 11:44:50.711649 Initialized TPM device CR50 revision 0
534 11:44:50.711724 Enabling S0i3.4
535 11:44:50.711816 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
536 11:44:50.711902 Found a VBT of 8704 bytes after decompression
537 11:44:50.711980 cse_lite: CSE RO boot. HybridStorageMode disabled
538 11:44:50.712056 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
539 11:44:50.712133 FSPS returned 0
540 11:44:50.712208 Executing Phase 1 of FspMultiPhaseSiInit
541 11:44:50.712284 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
542 11:44:50.712360 port C0 DISC req: usage 1 usb3 1 usb2 5
543 11:44:50.712435 Raw Buffer output 0 00000511
544 11:44:50.712510 Raw Buffer output 1 00000000
545 11:44:50.712584 pmc_send_ipc_cmd succeeded
546 11:44:50.712658 port C1 DISC req: usage 1 usb3 2 usb2 3
547 11:44:50.712734 Raw Buffer output 0 00000321
548 11:44:50.712809 Raw Buffer output 1 00000000
549 11:44:50.712883 pmc_send_ipc_cmd succeeded
550 11:44:50.712958 Detected 4 core, 8 thread CPU.
551 11:44:50.713033 Detected 4 core, 8 thread CPU.
552 11:44:50.713107 Display FSP Version Info HOB
553 11:44:50.713182 Reference Code - CPU = a.0.4c.31
554 11:44:50.713267 uCode Version = 0.0.0.86
555 11:44:50.713346 TXT ACM version = ff.ff.ff.ffff
556 11:44:50.713421 Reference Code - ME = a.0.4c.31
557 11:44:50.713496 MEBx version = 0.0.0.0
558 11:44:50.713571 ME Firmware Version = Consumer SKU
559 11:44:50.713646 Reference Code - PCH = a.0.4c.31
560 11:44:50.713721 PCH-CRID Status = Disabled
561 11:44:50.713796 PCH-CRID Original Value = ff.ff.ff.ffff
562 11:44:50.713871 PCH-CRID New Value = ff.ff.ff.ffff
563 11:44:50.713946 OPROM - RST - RAID = ff.ff.ff.ffff
564 11:44:50.714022 PCH Hsio Version = 4.0.0.0
565 11:44:50.714096 Reference Code - SA - System Agent = a.0.4c.31
566 11:44:50.714170 Reference Code - MRC = 2.0.0.1
567 11:44:50.714244 SA - PCIe Version = a.0.4c.31
568 11:44:50.714319 SA-CRID Status = Disabled
569 11:44:50.714393 SA-CRID Original Value = 0.0.0.1
570 11:44:50.714468 SA-CRID New Value = 0.0.0.1
571 11:44:50.714542 OPROM - VBIOS = ff.ff.ff.ffff
572 11:44:50.714617 IO Manageability Engine FW Version = 11.1.4.0
573 11:44:50.714693 PHY Build Version = 0.0.0.e0
574 11:44:50.714767 Thunderbolt(TM) FW Version = 0.0.0.0
575 11:44:50.714841 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
576 11:44:50.714917 ITSS IRQ Polarities Before:
577 11:44:50.714991 IPC0: 0xffffffff
578 11:44:50.715066 IPC1: 0xffffffff
579 11:44:50.715140 IPC2: 0xffffffff
580 11:44:50.715214 IPC3: 0xffffffff
581 11:44:50.715289 ITSS IRQ Polarities After:
582 11:44:50.715363 IPC0: 0xffffffff
583 11:44:50.715438 IPC1: 0xffffffff
584 11:44:50.715512 IPC2: 0xffffffff
585 11:44:50.715587 IPC3: 0xffffffff
586 11:44:50.715660 Found PCIe Root Port #9 at PCI: 00:1d.0.
587 11:44:50.715736 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
588 11:44:50.715816 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
589 11:44:50.715907 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
590 11:44:50.715986 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
591 11:44:50.716062 Enumerating buses...
592 11:44:50.716136 Show all devs... Before device enumeration.
593 11:44:50.716210 Root Device: enabled 1
594 11:44:50.716293 DOMAIN: 0000: enabled 1
595 11:44:50.716359 CPU_CLUSTER: 0: enabled 1
596 11:44:50.716426 PCI: 00:00.0: enabled 1
597 11:44:50.716492 PCI: 00:02.0: enabled 1
598 11:44:50.716559 PCI: 00:04.0: enabled 1
599 11:44:50.716625 PCI: 00:05.0: enabled 1
600 11:44:50.716690 PCI: 00:06.0: enabled 0
601 11:44:50.716756 PCI: 00:07.0: enabled 0
602 11:44:50.716822 PCI: 00:07.1: enabled 0
603 11:44:50.716888 PCI: 00:07.2: enabled 0
604 11:44:50.716954 PCI: 00:07.3: enabled 0
605 11:44:50.717020 PCI: 00:08.0: enabled 1
606 11:44:50.717086 PCI: 00:09.0: enabled 0
607 11:44:50.717152 PCI: 00:0a.0: enabled 0
608 11:44:50.717219 PCI: 00:0d.0: enabled 1
609 11:44:50.717308 PCI: 00:0d.1: enabled 0
610 11:44:50.717423 PCI: 00:0d.2: enabled 0
611 11:44:50.717495 PCI: 00:0d.3: enabled 0
612 11:44:50.717563 PCI: 00:0e.0: enabled 0
613 11:44:50.717630 PCI: 00:10.2: enabled 1
614 11:44:50.717697 PCI: 00:10.6: enabled 0
615 11:44:50.717763 PCI: 00:10.7: enabled 0
616 11:44:50.717830 PCI: 00:12.0: enabled 0
617 11:44:50.717897 PCI: 00:12.6: enabled 0
618 11:44:50.717963 PCI: 00:13.0: enabled 0
619 11:44:50.718030 PCI: 00:14.0: enabled 1
620 11:44:50.718096 PCI: 00:14.1: enabled 0
621 11:44:50.718163 PCI: 00:14.2: enabled 1
622 11:44:50.718229 PCI: 00:14.3: enabled 1
623 11:44:50.718304 PCI: 00:15.0: enabled 1
624 11:44:50.718357 PCI: 00:15.1: enabled 1
625 11:44:50.718410 PCI: 00:15.2: enabled 1
626 11:44:50.718463 PCI: 00:15.3: enabled 1
627 11:44:50.718516 PCI: 00:16.0: enabled 1
628 11:44:50.718569 PCI: 00:16.1: enabled 0
629 11:44:50.718622 PCI: 00:16.2: enabled 0
630 11:44:50.718675 PCI: 00:16.3: enabled 0
631 11:44:50.718728 PCI: 00:16.4: enabled 0
632 11:44:50.718780 PCI: 00:16.5: enabled 0
633 11:44:50.718833 PCI: 00:17.0: enabled 1
634 11:44:50.718886 PCI: 00:19.0: enabled 0
635 11:44:50.718939 PCI: 00:19.1: enabled 1
636 11:44:50.718992 PCI: 00:19.2: enabled 0
637 11:44:50.719045 PCI: 00:1c.0: enabled 1
638 11:44:50.719097 PCI: 00:1c.1: enabled 0
639 11:44:50.719150 PCI: 00:1c.2: enabled 0
640 11:44:50.719202 PCI: 00:1c.3: enabled 0
641 11:44:50.719255 PCI: 00:1c.4: enabled 0
642 11:44:50.719309 PCI: 00:1c.5: enabled 0
643 11:44:50.719363 PCI: 00:1c.6: enabled 1
644 11:44:50.719415 PCI: 00:1c.7: enabled 0
645 11:44:50.719468 PCI: 00:1d.0: enabled 1
646 11:44:50.719521 PCI: 00:1d.1: enabled 0
647 11:44:50.719766 PCI: 00:1d.2: enabled 1
648 11:44:50.719826 PCI: 00:1d.3: enabled 0
649 11:44:50.719880 PCI: 00:1e.0: enabled 1
650 11:44:50.719974 PCI: 00:1e.1: enabled 0
651 11:44:50.720028 PCI: 00:1e.2: enabled 1
652 11:44:50.720082 PCI: 00:1e.3: enabled 1
653 11:44:50.720135 PCI: 00:1f.0: enabled 1
654 11:44:50.720188 PCI: 00:1f.1: enabled 0
655 11:44:50.720241 PCI: 00:1f.2: enabled 1
656 11:44:50.720294 PCI: 00:1f.3: enabled 1
657 11:44:50.720347 PCI: 00:1f.4: enabled 0
658 11:44:50.720401 PCI: 00:1f.5: enabled 1
659 11:44:50.720454 PCI: 00:1f.6: enabled 0
660 11:44:50.720507 PCI: 00:1f.7: enabled 0
661 11:44:50.720560 APIC: 00: enabled 1
662 11:44:50.720614 GENERIC: 0.0: enabled 1
663 11:44:50.720667 GENERIC: 0.0: enabled 1
664 11:44:50.720721 GENERIC: 1.0: enabled 1
665 11:44:50.720774 GENERIC: 0.0: enabled 1
666 11:44:50.720827 GENERIC: 1.0: enabled 1
667 11:44:50.720880 USB0 port 0: enabled 1
668 11:44:50.720934 GENERIC: 0.0: enabled 1
669 11:44:50.720987 USB0 port 0: enabled 1
670 11:44:50.721040 GENERIC: 0.0: enabled 1
671 11:44:50.721093 I2C: 00:1a: enabled 1
672 11:44:50.721146 I2C: 00:31: enabled 1
673 11:44:50.721199 I2C: 00:32: enabled 1
674 11:44:50.721251 I2C: 00:10: enabled 1
675 11:44:50.721304 I2C: 00:15: enabled 1
676 11:44:50.721358 GENERIC: 0.0: enabled 0
677 11:44:50.721411 GENERIC: 1.0: enabled 0
678 11:44:50.721465 GENERIC: 0.0: enabled 1
679 11:44:50.721517 SPI: 00: enabled 1
680 11:44:50.721570 SPI: 00: enabled 1
681 11:44:50.721623 PNP: 0c09.0: enabled 1
682 11:44:50.721676 GENERIC: 0.0: enabled 1
683 11:44:50.721730 USB3 port 0: enabled 1
684 11:44:50.721782 USB3 port 1: enabled 1
685 11:44:50.721835 USB3 port 2: enabled 0
686 11:44:50.721888 USB3 port 3: enabled 0
687 11:44:50.721940 USB2 port 0: enabled 0
688 11:44:50.721993 USB2 port 1: enabled 1
689 11:44:50.722046 USB2 port 2: enabled 1
690 11:44:50.722099 USB2 port 3: enabled 0
691 11:44:50.722152 USB2 port 4: enabled 1
692 11:44:50.722204 USB2 port 5: enabled 0
693 11:44:50.722257 USB2 port 6: enabled 0
694 11:44:50.722310 USB2 port 7: enabled 0
695 11:44:50.722362 USB2 port 8: enabled 0
696 11:44:50.722415 USB2 port 9: enabled 0
697 11:44:50.722467 USB3 port 0: enabled 0
698 11:44:50.722520 USB3 port 1: enabled 1
699 11:44:50.722573 USB3 port 2: enabled 0
700 11:44:50.722626 USB3 port 3: enabled 0
701 11:44:50.722679 GENERIC: 0.0: enabled 1
702 11:44:50.722732 GENERIC: 1.0: enabled 1
703 11:44:50.722785 APIC: 01: enabled 1
704 11:44:50.722837 APIC: 03: enabled 1
705 11:44:50.722890 APIC: 05: enabled 1
706 11:44:50.722943 APIC: 07: enabled 1
707 11:44:50.722996 APIC: 06: enabled 1
708 11:44:50.723049 APIC: 02: enabled 1
709 11:44:50.723103 APIC: 04: enabled 1
710 11:44:50.723156 Compare with tree...
711 11:44:50.723209 Root Device: enabled 1
712 11:44:50.723262 DOMAIN: 0000: enabled 1
713 11:44:50.723315 PCI: 00:00.0: enabled 1
714 11:44:50.723369 PCI: 00:02.0: enabled 1
715 11:44:50.723421 PCI: 00:04.0: enabled 1
716 11:44:50.723474 GENERIC: 0.0: enabled 1
717 11:44:50.723527 PCI: 00:05.0: enabled 1
718 11:44:50.723581 PCI: 00:06.0: enabled 0
719 11:44:50.723634 PCI: 00:07.0: enabled 0
720 11:44:50.723687 GENERIC: 0.0: enabled 1
721 11:44:50.723741 PCI: 00:07.1: enabled 0
722 11:44:50.723794 GENERIC: 1.0: enabled 1
723 11:44:50.723847 PCI: 00:07.2: enabled 0
724 11:44:50.723927 GENERIC: 0.0: enabled 1
725 11:44:50.723996 PCI: 00:07.3: enabled 0
726 11:44:50.724049 GENERIC: 1.0: enabled 1
727 11:44:50.724103 PCI: 00:08.0: enabled 1
728 11:44:50.724156 PCI: 00:09.0: enabled 0
729 11:44:50.724209 PCI: 00:0a.0: enabled 0
730 11:44:50.724262 PCI: 00:0d.0: enabled 1
731 11:44:50.724315 USB0 port 0: enabled 1
732 11:44:50.724368 USB3 port 0: enabled 1
733 11:44:50.724421 USB3 port 1: enabled 1
734 11:44:50.724474 USB3 port 2: enabled 0
735 11:44:50.724527 USB3 port 3: enabled 0
736 11:44:50.724580 PCI: 00:0d.1: enabled 0
737 11:44:50.724633 PCI: 00:0d.2: enabled 0
738 11:44:50.724687 GENERIC: 0.0: enabled 1
739 11:44:50.724740 PCI: 00:0d.3: enabled 0
740 11:44:50.724794 PCI: 00:0e.0: enabled 0
741 11:44:50.724846 PCI: 00:10.2: enabled 1
742 11:44:50.724899 PCI: 00:10.6: enabled 0
743 11:44:50.724952 PCI: 00:10.7: enabled 0
744 11:44:50.725004 PCI: 00:12.0: enabled 0
745 11:44:50.725057 PCI: 00:12.6: enabled 0
746 11:44:50.725110 PCI: 00:13.0: enabled 0
747 11:44:50.725163 PCI: 00:14.0: enabled 1
748 11:44:50.725216 USB0 port 0: enabled 1
749 11:44:50.725268 USB2 port 0: enabled 0
750 11:44:50.725321 USB2 port 1: enabled 1
751 11:44:50.725374 USB2 port 2: enabled 1
752 11:44:50.725427 USB2 port 3: enabled 0
753 11:44:50.725480 USB2 port 4: enabled 1
754 11:44:50.725533 USB2 port 5: enabled 0
755 11:44:50.725586 USB2 port 6: enabled 0
756 11:44:50.725639 USB2 port 7: enabled 0
757 11:44:50.725691 USB2 port 8: enabled 0
758 11:44:50.725745 USB2 port 9: enabled 0
759 11:44:50.725798 USB3 port 0: enabled 0
760 11:44:50.725851 USB3 port 1: enabled 1
761 11:44:50.725904 USB3 port 2: enabled 0
762 11:44:50.725958 USB3 port 3: enabled 0
763 11:44:50.726011 PCI: 00:14.1: enabled 0
764 11:44:50.726064 PCI: 00:14.2: enabled 1
765 11:44:50.726117 PCI: 00:14.3: enabled 1
766 11:44:50.726170 GENERIC: 0.0: enabled 1
767 11:44:50.726224 PCI: 00:15.0: enabled 1
768 11:44:50.726277 I2C: 00:1a: enabled 1
769 11:44:50.726330 I2C: 00:31: enabled 1
770 11:44:50.726384 I2C: 00:32: enabled 1
771 11:44:50.726437 PCI: 00:15.1: enabled 1
772 11:44:50.726490 I2C: 00:10: enabled 1
773 11:44:50.726543 PCI: 00:15.2: enabled 1
774 11:44:50.726597 PCI: 00:15.3: enabled 1
775 11:44:50.726650 PCI: 00:16.0: enabled 1
776 11:44:50.726702 PCI: 00:16.1: enabled 0
777 11:44:50.726755 PCI: 00:16.2: enabled 0
778 11:44:50.726809 PCI: 00:16.3: enabled 0
779 11:44:50.726862 PCI: 00:16.4: enabled 0
780 11:44:50.726944 PCI: 00:16.5: enabled 0
781 11:44:50.726997 PCI: 00:17.0: enabled 1
782 11:44:50.727050 PCI: 00:19.0: enabled 0
783 11:44:50.727104 PCI: 00:19.1: enabled 1
784 11:44:50.727156 I2C: 00:15: enabled 1
785 11:44:50.727209 PCI: 00:19.2: enabled 0
786 11:44:50.727262 PCI: 00:1d.0: enabled 1
787 11:44:50.727315 GENERIC: 0.0: enabled 1
788 11:44:50.727369 PCI: 00:1e.0: enabled 1
789 11:44:50.727421 PCI: 00:1e.1: enabled 0
790 11:44:50.727474 PCI: 00:1e.2: enabled 1
791 11:44:50.727528 SPI: 00: enabled 1
792 11:44:50.727581 PCI: 00:1e.3: enabled 1
793 11:44:50.727634 SPI: 00: enabled 1
794 11:44:50.727686 PCI: 00:1f.0: enabled 1
795 11:44:50.727739 PNP: 0c09.0: enabled 1
796 11:44:50.727792 PCI: 00:1f.1: enabled 0
797 11:44:50.727845 PCI: 00:1f.2: enabled 1
798 11:44:50.727905 GENERIC: 0.0: enabled 1
799 11:44:50.727960 GENERIC: 0.0: enabled 1
800 11:44:50.728013 GENERIC: 1.0: enabled 1
801 11:44:50.728066 PCI: 00:1f.3: enabled 1
802 11:44:50.728120 PCI: 00:1f.4: enabled 0
803 11:44:50.728173 PCI: 00:1f.5: enabled 1
804 11:44:50.728226 PCI: 00:1f.6: enabled 0
805 11:44:50.728470 PCI: 00:1f.7: enabled 0
806 11:44:50.728531 CPU_CLUSTER: 0: enabled 1
807 11:44:50.728586 APIC: 00: enabled 1
808 11:44:50.728640 APIC: 01: enabled 1
809 11:44:50.728693 APIC: 03: enabled 1
810 11:44:50.728746 APIC: 05: enabled 1
811 11:44:50.728800 APIC: 07: enabled 1
812 11:44:50.728853 APIC: 06: enabled 1
813 11:44:50.728906 APIC: 02: enabled 1
814 11:44:50.728960 APIC: 04: enabled 1
815 11:44:50.729013 Root Device scanning...
816 11:44:50.729066 scan_static_bus for Root Device
817 11:44:50.729120 DOMAIN: 0000 enabled
818 11:44:50.729173 CPU_CLUSTER: 0 enabled
819 11:44:50.729226 DOMAIN: 0000 scanning...
820 11:44:50.729279 PCI: pci_scan_bus for bus 00
821 11:44:50.729332 PCI: 00:00.0 [8086/0000] ops
822 11:44:50.729385 PCI: 00:00.0 [8086/9a12] enabled
823 11:44:50.729438 PCI: 00:02.0 [8086/0000] bus ops
824 11:44:50.729491 PCI: 00:02.0 [8086/9a40] enabled
825 11:44:50.729544 PCI: 00:04.0 [8086/0000] bus ops
826 11:44:50.729597 PCI: 00:04.0 [8086/9a03] enabled
827 11:44:50.729650 PCI: 00:05.0 [8086/9a19] enabled
828 11:44:50.729703 PCI: 00:07.0 [0000/0000] hidden
829 11:44:50.729757 PCI: 00:08.0 [8086/9a11] enabled
830 11:44:50.729810 PCI: 00:0a.0 [8086/9a0d] disabled
831 11:44:50.729863 PCI: 00:0d.0 [8086/0000] bus ops
832 11:44:50.729917 PCI: 00:0d.0 [8086/9a13] enabled
833 11:44:50.729970 PCI: 00:14.0 [8086/0000] bus ops
834 11:44:50.730023 PCI: 00:14.0 [8086/a0ed] enabled
835 11:44:50.730077 PCI: 00:14.2 [8086/a0ef] enabled
836 11:44:50.730130 PCI: 00:14.3 [8086/0000] bus ops
837 11:44:50.730184 PCI: 00:14.3 [8086/a0f0] enabled
838 11:44:50.730237 PCI: 00:15.0 [8086/0000] bus ops
839 11:44:50.730290 PCI: 00:15.0 [8086/a0e8] enabled
840 11:44:50.730343 PCI: 00:15.1 [8086/0000] bus ops
841 11:44:50.730397 PCI: 00:15.1 [8086/a0e9] enabled
842 11:44:50.730450 PCI: 00:15.2 [8086/0000] bus ops
843 11:44:50.730503 PCI: 00:15.2 [8086/a0ea] enabled
844 11:44:50.730556 PCI: 00:15.3 [8086/0000] bus ops
845 11:44:50.730609 PCI: 00:15.3 [8086/a0eb] enabled
846 11:44:50.730663 PCI: 00:16.0 [8086/0000] ops
847 11:44:50.730716 PCI: 00:16.0 [8086/a0e0] enabled
848 11:44:50.730769 PCI: Static device PCI: 00:17.0 not found, disabling it.
849 11:44:50.730823 PCI: 00:19.0 [8086/0000] bus ops
850 11:44:50.730876 PCI: 00:19.0 [8086/a0c5] disabled
851 11:44:50.730930 PCI: 00:19.1 [8086/0000] bus ops
852 11:44:50.730983 PCI: 00:19.1 [8086/a0c6] enabled
853 11:44:50.731036 PCI: 00:1d.0 [8086/0000] bus ops
854 11:44:50.731089 PCI: 00:1d.0 [8086/a0b0] enabled
855 11:44:50.731142 PCI: 00:1e.0 [8086/0000] ops
856 11:44:50.731195 PCI: 00:1e.0 [8086/a0a8] enabled
857 11:44:50.731248 PCI: 00:1e.2 [8086/0000] bus ops
858 11:44:50.731302 PCI: 00:1e.2 [8086/a0aa] enabled
859 11:44:50.731355 PCI: 00:1e.3 [8086/0000] bus ops
860 11:44:50.731407 PCI: 00:1e.3 [8086/a0ab] enabled
861 11:44:50.731461 PCI: 00:1f.0 [8086/0000] bus ops
862 11:44:50.731514 PCI: 00:1f.0 [8086/a087] enabled
863 11:44:50.731567 RTC Init
864 11:44:50.731620 Set power on after power failure.
865 11:44:50.731676 Disabling Deep S3
866 11:44:50.731729 Disabling Deep S3
867 11:44:50.731782 Disabling Deep S4
868 11:44:50.731835 Disabling Deep S4
869 11:44:50.731895 Disabling Deep S5
870 11:44:50.731950 Disabling Deep S5
871 11:44:50.732004 PCI: 00:1f.2 [0000/0000] hidden
872 11:44:50.732057 PCI: 00:1f.3 [8086/0000] bus ops
873 11:44:50.732111 PCI: 00:1f.3 [8086/a0c8] enabled
874 11:44:50.732164 PCI: 00:1f.5 [8086/0000] bus ops
875 11:44:50.732217 PCI: 00:1f.5 [8086/a0a4] enabled
876 11:44:50.732270 PCI: Leftover static devices:
877 11:44:50.732324 PCI: 00:10.2
878 11:44:50.732377 PCI: 00:10.6
879 11:44:50.732430 PCI: 00:10.7
880 11:44:50.732483 PCI: 00:06.0
881 11:44:50.732536 PCI: 00:07.1
882 11:44:50.732589 PCI: 00:07.2
883 11:44:50.732642 PCI: 00:07.3
884 11:44:50.732694 PCI: 00:09.0
885 11:44:50.732747 PCI: 00:0d.1
886 11:44:50.732800 PCI: 00:0d.2
887 11:44:50.732853 PCI: 00:0d.3
888 11:44:50.732906 PCI: 00:0e.0
889 11:44:50.732959 PCI: 00:12.0
890 11:44:50.733011 PCI: 00:12.6
891 11:44:50.733064 PCI: 00:13.0
892 11:44:50.733116 PCI: 00:14.1
893 11:44:50.733169 PCI: 00:16.1
894 11:44:50.733222 PCI: 00:16.2
895 11:44:50.733275 PCI: 00:16.3
896 11:44:50.733328 PCI: 00:16.4
897 11:44:50.733381 PCI: 00:16.5
898 11:44:50.733434 PCI: 00:17.0
899 11:44:50.733487 PCI: 00:19.2
900 11:44:50.733540 PCI: 00:1e.1
901 11:44:50.733592 PCI: 00:1f.1
902 11:44:50.733645 PCI: 00:1f.4
903 11:44:50.733698 PCI: 00:1f.6
904 11:44:50.733751 PCI: 00:1f.7
905 11:44:50.733804 PCI: Check your devicetree.cb.
906 11:44:50.733858 PCI: 00:02.0 scanning...
907 11:44:50.733911 scan_generic_bus for PCI: 00:02.0
908 11:44:50.733965 scan_generic_bus for PCI: 00:02.0 done
909 11:44:50.734019 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
910 11:44:50.734073 PCI: 00:04.0 scanning...
911 11:44:50.734126 scan_generic_bus for PCI: 00:04.0
912 11:44:50.734180 GENERIC: 0.0 enabled
913 11:44:50.734233 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
914 11:44:50.734287 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
915 11:44:50.734340 PCI: 00:0d.0 scanning...
916 11:44:50.734393 scan_static_bus for PCI: 00:0d.0
917 11:44:50.734447 USB0 port 0 enabled
918 11:44:50.734500 USB0 port 0 scanning...
919 11:44:50.734554 scan_static_bus for USB0 port 0
920 11:44:50.734607 USB3 port 0 enabled
921 11:44:50.734660 USB3 port 1 enabled
922 11:44:50.734713 USB3 port 2 disabled
923 11:44:50.734766 USB3 port 3 disabled
924 11:44:50.734819 USB3 port 0 scanning...
925 11:44:50.734872 scan_static_bus for USB3 port 0
926 11:44:50.734926 scan_static_bus for USB3 port 0 done
927 11:44:50.734979 scan_bus: bus USB3 port 0 finished in 6 msecs
928 11:44:50.735034 USB3 port 1 scanning...
929 11:44:50.735087 scan_static_bus for USB3 port 1
930 11:44:50.735140 scan_static_bus for USB3 port 1 done
931 11:44:50.735193 scan_bus: bus USB3 port 1 finished in 6 msecs
932 11:44:50.735246 scan_static_bus for USB0 port 0 done
933 11:44:50.735300 scan_bus: bus USB0 port 0 finished in 43 msecs
934 11:44:50.735353 scan_static_bus for PCI: 00:0d.0 done
935 11:44:50.735406 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
936 11:44:50.735459 PCI: 00:14.0 scanning...
937 11:44:50.735512 scan_static_bus for PCI: 00:14.0
938 11:44:50.735565 USB0 port 0 enabled
939 11:44:50.735618 USB0 port 0 scanning...
940 11:44:50.735681 scan_static_bus for USB0 port 0
941 11:44:50.735737 USB2 port 0 disabled
942 11:44:50.735791 USB2 port 1 enabled
943 11:44:50.735844 USB2 port 2 enabled
944 11:44:50.735936 USB2 port 3 disabled
945 11:44:50.735991 USB2 port 4 enabled
946 11:44:50.736044 USB2 port 5 disabled
947 11:44:50.736099 USB2 port 6 disabled
948 11:44:50.736153 USB2 port 7 disabled
949 11:44:50.736206 USB2 port 8 disabled
950 11:44:50.736260 USB2 port 9 disabled
951 11:44:50.736313 USB3 port 0 disabled
952 11:44:50.736367 USB3 port 1 enabled
953 11:44:50.736420 USB3 port 2 disabled
954 11:44:50.736473 USB3 port 3 disabled
955 11:44:50.736719 USB2 port 1 scanning...
956 11:44:50.736780 scan_static_bus for USB2 port 1
957 11:44:50.736836 scan_static_bus for USB2 port 1 done
958 11:44:50.736890 scan_bus: bus USB2 port 1 finished in 6 msecs
959 11:44:50.736944 USB2 port 2 scanning...
960 11:44:50.736998 scan_static_bus for USB2 port 2
961 11:44:50.737052 scan_static_bus for USB2 port 2 done
962 11:44:50.737105 scan_bus: bus USB2 port 2 finished in 6 msecs
963 11:44:50.737159 USB2 port 4 scanning...
964 11:44:50.737211 scan_static_bus for USB2 port 4
965 11:44:50.737265 scan_static_bus for USB2 port 4 done
966 11:44:50.737318 scan_bus: bus USB2 port 4 finished in 6 msecs
967 11:44:50.737371 USB3 port 1 scanning...
968 11:44:50.737424 scan_static_bus for USB3 port 1
969 11:44:50.737476 scan_static_bus for USB3 port 1 done
970 11:44:50.737530 scan_bus: bus USB3 port 1 finished in 6 msecs
971 11:44:50.737583 scan_static_bus for USB0 port 0 done
972 11:44:50.737636 scan_bus: bus USB0 port 0 finished in 93 msecs
973 11:44:50.737689 scan_static_bus for PCI: 00:14.0 done
974 11:44:50.737742 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
975 11:44:50.737796 PCI: 00:14.3 scanning...
976 11:44:50.737849 scan_static_bus for PCI: 00:14.3
977 11:44:50.737902 GENERIC: 0.0 enabled
978 11:44:50.737955 scan_static_bus for PCI: 00:14.3 done
979 11:44:50.738008 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
980 11:44:50.738062 PCI: 00:15.0 scanning...
981 11:44:50.738114 scan_static_bus for PCI: 00:15.0
982 11:44:50.738168 I2C: 00:1a enabled
983 11:44:50.738221 I2C: 00:31 enabled
984 11:44:50.738274 I2C: 00:32 enabled
985 11:44:50.738327 scan_static_bus for PCI: 00:15.0 done
986 11:44:50.738380 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
987 11:44:50.738433 PCI: 00:15.1 scanning...
988 11:44:50.738486 scan_static_bus for PCI: 00:15.1
989 11:44:50.738539 I2C: 00:10 enabled
990 11:44:50.738592 scan_static_bus for PCI: 00:15.1 done
991 11:44:50.738645 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
992 11:44:50.738699 PCI: 00:15.2 scanning...
993 11:44:50.738751 scan_static_bus for PCI: 00:15.2
994 11:44:50.738804 scan_static_bus for PCI: 00:15.2 done
995 11:44:50.738857 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
996 11:44:50.738910 PCI: 00:15.3 scanning...
997 11:44:50.738962 scan_static_bus for PCI: 00:15.3
998 11:44:50.739015 scan_static_bus for PCI: 00:15.3 done
999 11:44:50.739068 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1000 11:44:50.739121 PCI: 00:19.1 scanning...
1001 11:44:50.739174 scan_static_bus for PCI: 00:19.1
1002 11:44:50.739226 I2C: 00:15 enabled
1003 11:44:50.739279 scan_static_bus for PCI: 00:19.1 done
1004 11:44:50.739331 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1005 11:44:50.739384 PCI: 00:1d.0 scanning...
1006 11:44:50.739436 do_pci_scan_bridge for PCI: 00:1d.0
1007 11:44:50.739489 PCI: pci_scan_bus for bus 01
1008 11:44:50.739543 PCI: 01:00.0 [1c5c/174a] enabled
1009 11:44:50.739595 GENERIC: 0.0 enabled
1010 11:44:50.739647 Enabling Common Clock Configuration
1011 11:44:50.739700 L1 Sub-State supported from root port 29
1012 11:44:50.739755 L1 Sub-State Support = 0xf
1013 11:44:50.739807 CommonModeRestoreTime = 0x28
1014 11:44:50.739860 Power On Value = 0x16, Power On Scale = 0x0
1015 11:44:50.739922 ASPM: Enabled L1
1016 11:44:50.739975 PCIe: Max_Payload_Size adjusted to 128
1017 11:44:50.740029 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1018 11:44:50.740083 PCI: 00:1e.2 scanning...
1019 11:44:50.740137 scan_generic_bus for PCI: 00:1e.2
1020 11:44:50.740190 SPI: 00 enabled
1021 11:44:50.740243 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1022 11:44:50.740296 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1023 11:44:50.740349 PCI: 00:1e.3 scanning...
1024 11:44:50.740403 scan_generic_bus for PCI: 00:1e.3
1025 11:44:50.740464 SPI: 00 enabled
1026 11:44:50.740518 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1027 11:44:50.740575 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1028 11:44:50.740628 PCI: 00:1f.0 scanning...
1029 11:44:50.740681 scan_static_bus for PCI: 00:1f.0
1030 11:44:50.740733 PNP: 0c09.0 enabled
1031 11:44:50.740786 PNP: 0c09.0 scanning...
1032 11:44:50.740838 scan_static_bus for PNP: 0c09.0
1033 11:44:50.740891 scan_static_bus for PNP: 0c09.0 done
1034 11:44:50.740944 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1035 11:44:50.740996 scan_static_bus for PCI: 00:1f.0 done
1036 11:44:50.741049 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1037 11:44:50.741101 PCI: 00:1f.2 scanning...
1038 11:44:50.741154 scan_static_bus for PCI: 00:1f.2
1039 11:44:50.741205 GENERIC: 0.0 enabled
1040 11:44:50.741258 GENERIC: 0.0 scanning...
1041 11:44:50.741310 scan_static_bus for GENERIC: 0.0
1042 11:44:50.741362 GENERIC: 0.0 enabled
1043 11:44:50.741414 GENERIC: 1.0 enabled
1044 11:44:50.741467 scan_static_bus for GENERIC: 0.0 done
1045 11:44:50.741519 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1046 11:44:50.741572 scan_static_bus for PCI: 00:1f.2 done
1047 11:44:50.741624 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1048 11:44:50.741677 PCI: 00:1f.3 scanning...
1049 11:44:50.741729 scan_static_bus for PCI: 00:1f.3
1050 11:44:50.741782 scan_static_bus for PCI: 00:1f.3 done
1051 11:44:50.741834 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1052 11:44:50.741886 PCI: 00:1f.5 scanning...
1053 11:44:50.741938 scan_generic_bus for PCI: 00:1f.5
1054 11:44:50.741991 scan_generic_bus for PCI: 00:1f.5 done
1055 11:44:50.742043 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1056 11:44:50.742095 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1057 11:44:50.742148 scan_static_bus for Root Device done
1058 11:44:50.742201 scan_bus: bus Root Device finished in 737 msecs
1059 11:44:50.742253 done
1060 11:44:50.742306 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1061 11:44:50.742358 Chrome EC: UHEPI supported
1062 11:44:50.742411 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1063 11:44:50.742464 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1064 11:44:50.742517 SPI flash protection: WPSW=1 SRP0=0
1065 11:44:50.742569 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1066 11:44:50.742622 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1067 11:44:50.742675 found VGA at PCI: 00:02.0
1068 11:44:50.742741 Setting up VGA for PCI: 00:02.0
1069 11:44:50.742986 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1070 11:44:50.743045 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1071 11:44:50.743099 Allocating resources...
1072 11:44:50.743152 Reading resources...
1073 11:44:50.743205 Root Device read_resources bus 0 link: 0
1074 11:44:50.743258 DOMAIN: 0000 read_resources bus 0 link: 0
1075 11:44:50.743311 PCI: 00:04.0 read_resources bus 1 link: 0
1076 11:44:50.743363 PCI: 00:04.0 read_resources bus 1 link: 0 done
1077 11:44:50.743416 PCI: 00:0d.0 read_resources bus 0 link: 0
1078 11:44:50.743469 USB0 port 0 read_resources bus 0 link: 0
1079 11:44:50.743522 USB0 port 0 read_resources bus 0 link: 0 done
1080 11:44:50.743574 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1081 11:44:50.743626 PCI: 00:14.0 read_resources bus 0 link: 0
1082 11:44:50.743679 USB0 port 0 read_resources bus 0 link: 0
1083 11:44:50.743732 USB0 port 0 read_resources bus 0 link: 0 done
1084 11:44:50.743785 PCI: 00:14.0 read_resources bus 0 link: 0 done
1085 11:44:50.743838 PCI: 00:14.3 read_resources bus 0 link: 0
1086 11:44:50.743896 PCI: 00:14.3 read_resources bus 0 link: 0 done
1087 11:44:50.743950 PCI: 00:15.0 read_resources bus 0 link: 0
1088 11:44:50.744003 PCI: 00:15.0 read_resources bus 0 link: 0 done
1089 11:44:50.744056 PCI: 00:15.1 read_resources bus 0 link: 0
1090 11:44:50.744109 PCI: 00:15.1 read_resources bus 0 link: 0 done
1091 11:44:50.744161 PCI: 00:19.1 read_resources bus 0 link: 0
1092 11:44:50.744213 PCI: 00:19.1 read_resources bus 0 link: 0 done
1093 11:44:50.744266 PCI: 00:1d.0 read_resources bus 1 link: 0
1094 11:44:50.744318 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1095 11:44:50.744371 PCI: 00:1e.2 read_resources bus 2 link: 0
1096 11:44:50.744424 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1097 11:44:50.744476 PCI: 00:1e.3 read_resources bus 3 link: 0
1098 11:44:50.744528 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1099 11:44:50.744581 PCI: 00:1f.0 read_resources bus 0 link: 0
1100 11:44:50.744633 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1101 11:44:50.744685 PCI: 00:1f.2 read_resources bus 0 link: 0
1102 11:44:50.744737 GENERIC: 0.0 read_resources bus 0 link: 0
1103 11:44:50.744790 GENERIC: 0.0 read_resources bus 0 link: 0 done
1104 11:44:50.744843 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1105 11:44:50.744895 DOMAIN: 0000 read_resources bus 0 link: 0 done
1106 11:44:50.744947 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1107 11:44:50.744999 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1108 11:44:50.745052 Root Device read_resources bus 0 link: 0 done
1109 11:44:50.745105 Done reading resources.
1110 11:44:50.745157 Show resources in subtree (Root Device)...After reading.
1111 11:44:50.745209 Root Device child on link 0 DOMAIN: 0000
1112 11:44:50.745262 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1113 11:44:50.745315 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1114 11:44:50.745368 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1115 11:44:50.745422 PCI: 00:00.0
1116 11:44:50.745474 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1117 11:44:50.745528 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1118 11:44:50.745581 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1119 11:44:50.745634 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1120 11:44:50.745687 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1121 11:44:50.745739 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1122 11:44:50.745792 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1123 11:44:50.745845 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1124 11:44:50.745898 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1125 11:44:50.745951 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1126 11:44:50.746003 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1127 11:44:50.746057 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1128 11:44:50.746110 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1129 11:44:50.746163 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1130 11:44:50.746215 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1131 11:44:50.746268 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1132 11:44:50.746321 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1133 11:44:50.746374 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1134 11:44:50.746427 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1135 11:44:50.746669 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1136 11:44:50.746728 PCI: 00:02.0
1137 11:44:50.746781 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1138 11:44:50.746835 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1139 11:44:50.746889 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1140 11:44:50.746942 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1141 11:44:50.746994 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1142 11:44:50.747047 GENERIC: 0.0
1143 11:44:50.747100 PCI: 00:05.0
1144 11:44:50.747152 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1145 11:44:50.747205 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1146 11:44:50.747257 GENERIC: 0.0
1147 11:44:50.747309 PCI: 00:08.0
1148 11:44:50.747361 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1149 11:44:50.747414 PCI: 00:0a.0
1150 11:44:50.747467 PCI: 00:0d.0 child on link 0 USB0 port 0
1151 11:44:50.747519 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1152 11:44:50.747572 USB0 port 0 child on link 0 USB3 port 0
1153 11:44:50.747624 USB3 port 0
1154 11:44:50.747676 USB3 port 1
1155 11:44:50.747728 USB3 port 2
1156 11:44:50.747780 USB3 port 3
1157 11:44:50.747832 PCI: 00:14.0 child on link 0 USB0 port 0
1158 11:44:50.747889 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1159 11:44:50.747979 USB0 port 0 child on link 0 USB2 port 0
1160 11:44:50.748031 USB2 port 0
1161 11:44:50.748083 USB2 port 1
1162 11:44:50.748135 USB2 port 2
1163 11:44:50.748187 USB2 port 3
1164 11:44:50.748240 USB2 port 4
1165 11:44:50.748292 USB2 port 5
1166 11:44:50.748344 USB2 port 6
1167 11:44:50.748396 USB2 port 7
1168 11:44:50.748448 USB2 port 8
1169 11:44:50.748501 USB2 port 9
1170 11:44:50.748553 USB3 port 0
1171 11:44:50.748604 USB3 port 1
1172 11:44:50.748656 USB3 port 2
1173 11:44:50.748708 USB3 port 3
1174 11:44:50.748760 PCI: 00:14.2
1175 11:44:50.748812 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1176 11:44:50.748866 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1177 11:44:50.748918 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1178 11:44:50.748971 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1179 11:44:50.749024 GENERIC: 0.0
1180 11:44:50.749076 PCI: 00:15.0 child on link 0 I2C: 00:1a
1181 11:44:50.756250 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1182 11:44:50.756331 I2C: 00:1a
1183 11:44:50.759358 I2C: 00:31
1184 11:44:50.759442 I2C: 00:32
1185 11:44:50.766337 PCI: 00:15.1 child on link 0 I2C: 00:10
1186 11:44:50.776226 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 11:44:50.776308 I2C: 00:10
1188 11:44:50.779276 PCI: 00:15.2
1189 11:44:50.789124 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 11:44:50.789205 PCI: 00:15.3
1191 11:44:50.799616 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1192 11:44:50.802578 PCI: 00:16.0
1193 11:44:50.812905 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 11:44:50.812986 PCI: 00:19.0
1195 11:44:50.816241 PCI: 00:19.1 child on link 0 I2C: 00:15
1196 11:44:50.826172 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 11:44:50.829465 I2C: 00:15
1198 11:44:50.832520 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1199 11:44:50.842784 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1200 11:44:50.852598 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1201 11:44:50.862727 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1202 11:44:50.862808 GENERIC: 0.0
1203 11:44:50.866203 PCI: 01:00.0
1204 11:44:50.876086 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1205 11:44:50.882469 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1206 11:44:50.892255 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1207 11:44:50.895993 PCI: 00:1e.0
1208 11:44:50.905867 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1209 11:44:50.909080 PCI: 00:1e.2 child on link 0 SPI: 00
1210 11:44:50.919309 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1211 11:44:50.922197 SPI: 00
1212 11:44:50.925959 PCI: 00:1e.3 child on link 0 SPI: 00
1213 11:44:50.935592 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 11:44:50.935674 SPI: 00
1215 11:44:50.942220 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1216 11:44:50.949211 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1217 11:44:50.952364 PNP: 0c09.0
1218 11:44:50.959097 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1219 11:44:50.965938 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1220 11:44:50.972649 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1221 11:44:50.982254 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1222 11:44:50.989041 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1223 11:44:50.989239 GENERIC: 0.0
1224 11:44:50.992376 GENERIC: 1.0
1225 11:44:50.992612 PCI: 00:1f.3
1226 11:44:51.002610 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1227 11:44:51.012183 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1228 11:44:51.016017 PCI: 00:1f.5
1229 11:44:51.025423 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1230 11:44:51.029053 CPU_CLUSTER: 0 child on link 0 APIC: 00
1231 11:44:51.029152 APIC: 00
1232 11:44:51.031930 APIC: 01
1233 11:44:51.032011 APIC: 03
1234 11:44:51.032074 APIC: 05
1235 11:44:51.035687 APIC: 07
1236 11:44:51.035766 APIC: 06
1237 11:44:51.035829 APIC: 02
1238 11:44:51.038681 APIC: 04
1239 11:44:51.045590 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1240 11:44:51.052459 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1241 11:44:51.058932 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1242 11:44:51.065466 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1243 11:44:51.069107 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1244 11:44:51.072230 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1245 11:44:51.076083 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1246 11:44:51.082531 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1247 11:44:51.092184 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1248 11:44:51.098896 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1249 11:44:51.105500 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1250 11:44:51.112010 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1251 11:44:51.119157 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1252 11:44:51.128844 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1253 11:44:51.135374 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1254 11:44:51.138589 DOMAIN: 0000: Resource ranges:
1255 11:44:51.142182 * Base: 1000, Size: 800, Tag: 100
1256 11:44:51.145221 * Base: 1900, Size: e700, Tag: 100
1257 11:44:51.152100 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1258 11:44:51.158971 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1259 11:44:51.165531 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1260 11:44:51.172071 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1261 11:44:51.178611 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1262 11:44:51.188488 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1263 11:44:51.195384 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1264 11:44:51.202219 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1265 11:44:51.208792 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1266 11:44:51.218854 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1267 11:44:51.225535 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1268 11:44:51.232644 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1269 11:44:51.242271 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1270 11:44:51.248980 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1271 11:44:51.255756 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1272 11:44:51.265605 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1273 11:44:51.272281 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1274 11:44:51.278959 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1275 11:44:51.288753 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1276 11:44:51.295539 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1277 11:44:51.302020 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1278 11:44:51.312271 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1279 11:44:51.318892 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1280 11:44:51.325484 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1281 11:44:51.332203 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1282 11:44:51.335729 DOMAIN: 0000: Resource ranges:
1283 11:44:51.342196 * Base: 7fc00000, Size: 40400000, Tag: 200
1284 11:44:51.345683 * Base: d0000000, Size: 28000000, Tag: 200
1285 11:44:51.349146 * Base: fa000000, Size: 1000000, Tag: 200
1286 11:44:51.355463 * Base: fb001000, Size: 2fff000, Tag: 200
1287 11:44:51.359133 * Base: fe010000, Size: 2e000, Tag: 200
1288 11:44:51.362223 * Base: fe03f000, Size: d41000, Tag: 200
1289 11:44:51.365700 * Base: fed88000, Size: 8000, Tag: 200
1290 11:44:51.372602 * Base: fed93000, Size: d000, Tag: 200
1291 11:44:51.375499 * Base: feda2000, Size: 1e000, Tag: 200
1292 11:44:51.379201 * Base: fede0000, Size: 1220000, Tag: 200
1293 11:44:51.385369 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1294 11:44:51.392032 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1295 11:44:51.398921 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1296 11:44:51.405622 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1297 11:44:51.412348 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1298 11:44:51.418836 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1299 11:44:51.425529 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1300 11:44:51.432252 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1301 11:44:51.439063 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1302 11:44:51.445734 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1303 11:44:51.452256 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1304 11:44:51.458628 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1305 11:44:51.465770 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1306 11:44:51.472097 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1307 11:44:51.478622 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1308 11:44:51.485332 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1309 11:44:51.492099 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1310 11:44:51.498797 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1311 11:44:51.505335 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1312 11:44:51.511841 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1313 11:44:51.518931 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1314 11:44:51.525528 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1315 11:44:51.531834 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1316 11:44:51.538541 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1317 11:44:51.545338 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1318 11:44:51.548282 PCI: 00:1d.0: Resource ranges:
1319 11:44:51.551995 * Base: 7fc00000, Size: 100000, Tag: 200
1320 11:44:51.558682 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1321 11:44:51.565361 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1322 11:44:51.572214 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1323 11:44:51.581714 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1324 11:44:51.588236 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1325 11:44:51.591658 Root Device assign_resources, bus 0 link: 0
1326 11:44:51.598395 DOMAIN: 0000 assign_resources, bus 0 link: 0
1327 11:44:51.605181 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1328 11:44:51.614994 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1329 11:44:51.622190 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1330 11:44:51.631808 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1331 11:44:51.635037 PCI: 00:04.0 assign_resources, bus 1 link: 0
1332 11:44:51.638863 PCI: 00:04.0 assign_resources, bus 1 link: 0
1333 11:44:51.648955 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1334 11:44:51.655604 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1335 11:44:51.665204 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1336 11:44:51.668833 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1337 11:44:51.675649 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1338 11:44:51.681732 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1339 11:44:51.685303 PCI: 00:14.0 assign_resources, bus 0 link: 0
1340 11:44:51.692161 PCI: 00:14.0 assign_resources, bus 0 link: 0
1341 11:44:51.698751 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1342 11:44:51.708448 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1343 11:44:51.715051 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1344 11:44:51.718761 PCI: 00:14.3 assign_resources, bus 0 link: 0
1345 11:44:51.725320 PCI: 00:14.3 assign_resources, bus 0 link: 0
1346 11:44:51.732188 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1347 11:44:51.738727 PCI: 00:15.0 assign_resources, bus 0 link: 0
1348 11:44:51.742127 PCI: 00:15.0 assign_resources, bus 0 link: 0
1349 11:44:51.751771 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1350 11:44:51.755378 PCI: 00:15.1 assign_resources, bus 0 link: 0
1351 11:44:51.758948 PCI: 00:15.1 assign_resources, bus 0 link: 0
1352 11:44:51.768745 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1353 11:44:51.775540 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1354 11:44:51.785448 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1355 11:44:51.792199 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1356 11:44:51.798302 PCI: 00:19.1 assign_resources, bus 0 link: 0
1357 11:44:51.802103 PCI: 00:19.1 assign_resources, bus 0 link: 0
1358 11:44:51.811917 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1359 11:44:51.821990 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1360 11:44:51.828414 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1361 11:44:51.835380 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1362 11:44:51.841868 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1363 11:44:51.848440 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1364 11:44:51.858254 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1365 11:44:51.861706 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1366 11:44:51.872048 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1367 11:44:51.875210 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1368 11:44:51.878367 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1369 11:44:51.888743 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1370 11:44:51.891801 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1371 11:44:51.898544 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1372 11:44:51.902134 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1373 11:44:51.908803 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1374 11:44:51.911861 LPC: Trying to open IO window from 800 size 1ff
1375 11:44:51.921675 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1376 11:44:51.928441 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1377 11:44:51.935410 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1378 11:44:51.941883 DOMAIN: 0000 assign_resources, bus 0 link: 0
1379 11:44:51.945431 Root Device assign_resources, bus 0 link: 0
1380 11:44:51.948608 Done setting resources.
1381 11:44:51.955139 Show resources in subtree (Root Device)...After assigning values.
1382 11:44:51.958765 Root Device child on link 0 DOMAIN: 0000
1383 11:44:51.962309 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1384 11:44:51.972045 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1385 11:44:51.981858 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1386 11:44:51.985530 PCI: 00:00.0
1387 11:44:51.995152 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1388 11:44:52.002051 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1389 11:44:52.011935 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1390 11:44:52.022070 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1391 11:44:52.032081 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1392 11:44:52.041839 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1393 11:44:52.051816 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1394 11:44:52.058541 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1395 11:44:52.068353 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1396 11:44:52.078175 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1397 11:44:52.088353 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1398 11:44:52.098404 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1399 11:44:52.105176 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1400 11:44:52.115059 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1401 11:44:52.125162 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1402 11:44:52.134964 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1403 11:44:52.144890 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1404 11:44:52.154865 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1405 11:44:52.161641 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1406 11:44:52.171428 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1407 11:44:52.174856 PCI: 00:02.0
1408 11:44:52.184805 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1409 11:44:52.195016 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1410 11:44:52.204938 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1411 11:44:52.208232 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1412 11:44:52.218290 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1413 11:44:52.221309 GENERIC: 0.0
1414 11:44:52.224971 PCI: 00:05.0
1415 11:44:52.234759 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1416 11:44:52.237825 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1417 11:44:52.241525 GENERIC: 0.0
1418 11:44:52.241604 PCI: 00:08.0
1419 11:44:52.251435 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1420 11:44:52.255088 PCI: 00:0a.0
1421 11:44:52.258218 PCI: 00:0d.0 child on link 0 USB0 port 0
1422 11:44:52.268061 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1423 11:44:52.271786 USB0 port 0 child on link 0 USB3 port 0
1424 11:44:52.274850 USB3 port 0
1425 11:44:52.278010 USB3 port 1
1426 11:44:52.278091 USB3 port 2
1427 11:44:52.281447 USB3 port 3
1428 11:44:52.285055 PCI: 00:14.0 child on link 0 USB0 port 0
1429 11:44:52.294911 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1430 11:44:52.297967 USB0 port 0 child on link 0 USB2 port 0
1431 11:44:52.301580 USB2 port 0
1432 11:44:52.301658 USB2 port 1
1433 11:44:52.304542 USB2 port 2
1434 11:44:52.308080 USB2 port 3
1435 11:44:52.308159 USB2 port 4
1436 11:44:52.311138 USB2 port 5
1437 11:44:52.311217 USB2 port 6
1438 11:44:52.314744 USB2 port 7
1439 11:44:52.314824 USB2 port 8
1440 11:44:52.318235 USB2 port 9
1441 11:44:52.318315 USB3 port 0
1442 11:44:52.321209 USB3 port 1
1443 11:44:52.321289 USB3 port 2
1444 11:44:52.324447 USB3 port 3
1445 11:44:52.324527 PCI: 00:14.2
1446 11:44:52.334876 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1447 11:44:52.345093 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1448 11:44:52.351381 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1449 11:44:52.361350 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1450 11:44:52.361432 GENERIC: 0.0
1451 11:44:52.368005 PCI: 00:15.0 child on link 0 I2C: 00:1a
1452 11:44:52.377962 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1453 11:44:52.378043 I2C: 00:1a
1454 11:44:52.381437 I2C: 00:31
1455 11:44:52.381517 I2C: 00:32
1456 11:44:52.388241 PCI: 00:15.1 child on link 0 I2C: 00:10
1457 11:44:52.398005 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1458 11:44:52.398085 I2C: 00:10
1459 11:44:52.401354 PCI: 00:15.2
1460 11:44:52.411116 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1461 11:44:52.411196 PCI: 00:15.3
1462 11:44:52.421475 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1463 11:44:52.424534 PCI: 00:16.0
1464 11:44:52.434380 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1465 11:44:52.434475 PCI: 00:19.0
1466 11:44:52.441273 PCI: 00:19.1 child on link 0 I2C: 00:15
1467 11:44:52.451266 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1468 11:44:52.451346 I2C: 00:15
1469 11:44:52.457895 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1470 11:44:52.464304 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1471 11:44:52.478176 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1472 11:44:52.487672 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1473 11:44:52.491376 GENERIC: 0.0
1474 11:44:52.491455 PCI: 01:00.0
1475 11:44:52.501197 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1476 11:44:52.511375 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1477 11:44:52.524207 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1478 11:44:52.524287 PCI: 00:1e.0
1479 11:44:52.534556 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1480 11:44:52.541298 PCI: 00:1e.2 child on link 0 SPI: 00
1481 11:44:52.551420 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1482 11:44:52.551501 SPI: 00
1483 11:44:52.554403 PCI: 00:1e.3 child on link 0 SPI: 00
1484 11:44:52.564443 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1485 11:44:52.567924 SPI: 00
1486 11:44:52.571034 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1487 11:44:52.580928 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1488 11:44:52.581007 PNP: 0c09.0
1489 11:44:52.591154 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1490 11:44:52.594437 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1491 11:44:52.604509 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1492 11:44:52.614599 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1493 11:44:52.617429 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1494 11:44:52.620986 GENERIC: 0.0
1495 11:44:52.621064 GENERIC: 1.0
1496 11:44:52.624128 PCI: 00:1f.3
1497 11:44:52.634353 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1498 11:44:52.644471 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1499 11:44:52.648095 PCI: 00:1f.5
1500 11:44:52.657902 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1501 11:44:52.660882 CPU_CLUSTER: 0 child on link 0 APIC: 00
1502 11:44:52.660988 APIC: 00
1503 11:44:52.664373 APIC: 01
1504 11:44:52.664467 APIC: 03
1505 11:44:52.664552 APIC: 05
1506 11:44:52.668026 APIC: 07
1507 11:44:52.668128 APIC: 06
1508 11:44:52.671067 APIC: 02
1509 11:44:52.671165 APIC: 04
1510 11:44:52.674828 Done allocating resources.
1511 11:44:52.681479 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1512 11:44:52.684409 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1513 11:44:52.691255 Configure GPIOs for I2S audio on UP4.
1514 11:44:52.698061 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1515 11:44:52.698143 Enabling resources...
1516 11:44:52.704802 PCI: 00:00.0 subsystem <- 8086/9a12
1517 11:44:52.704883 PCI: 00:00.0 cmd <- 06
1518 11:44:52.708008 PCI: 00:02.0 subsystem <- 8086/9a40
1519 11:44:52.711151 PCI: 00:02.0 cmd <- 03
1520 11:44:52.714753 PCI: 00:04.0 subsystem <- 8086/9a03
1521 11:44:52.718161 PCI: 00:04.0 cmd <- 02
1522 11:44:52.721248 PCI: 00:05.0 subsystem <- 8086/9a19
1523 11:44:52.724706 PCI: 00:05.0 cmd <- 02
1524 11:44:52.727747 PCI: 00:08.0 subsystem <- 8086/9a11
1525 11:44:52.731577 PCI: 00:08.0 cmd <- 06
1526 11:44:52.734808 PCI: 00:0d.0 subsystem <- 8086/9a13
1527 11:44:52.737852 PCI: 00:0d.0 cmd <- 02
1528 11:44:52.740942 PCI: 00:14.0 subsystem <- 8086/a0ed
1529 11:44:52.741098 PCI: 00:14.0 cmd <- 02
1530 11:44:52.747881 PCI: 00:14.2 subsystem <- 8086/a0ef
1531 11:44:52.748025 PCI: 00:14.2 cmd <- 02
1532 11:44:52.751438 PCI: 00:14.3 subsystem <- 8086/a0f0
1533 11:44:52.754500 PCI: 00:14.3 cmd <- 02
1534 11:44:52.757550 PCI: 00:15.0 subsystem <- 8086/a0e8
1535 11:44:52.761176 PCI: 00:15.0 cmd <- 02
1536 11:44:52.764282 PCI: 00:15.1 subsystem <- 8086/a0e9
1537 11:44:52.768093 PCI: 00:15.1 cmd <- 02
1538 11:44:52.770981 PCI: 00:15.2 subsystem <- 8086/a0ea
1539 11:44:52.774680 PCI: 00:15.2 cmd <- 02
1540 11:44:52.777862 PCI: 00:15.3 subsystem <- 8086/a0eb
1541 11:44:52.780928 PCI: 00:15.3 cmd <- 02
1542 11:44:52.784712 PCI: 00:16.0 subsystem <- 8086/a0e0
1543 11:44:52.784808 PCI: 00:16.0 cmd <- 02
1544 11:44:52.791391 PCI: 00:19.1 subsystem <- 8086/a0c6
1545 11:44:52.791470 PCI: 00:19.1 cmd <- 02
1546 11:44:52.794521 PCI: 00:1d.0 bridge ctrl <- 0013
1547 11:44:52.797846 PCI: 00:1d.0 subsystem <- 8086/a0b0
1548 11:44:52.801433 PCI: 00:1d.0 cmd <- 06
1549 11:44:52.804427 PCI: 00:1e.0 subsystem <- 8086/a0a8
1550 11:44:52.808133 PCI: 00:1e.0 cmd <- 06
1551 11:44:52.811187 PCI: 00:1e.2 subsystem <- 8086/a0aa
1552 11:44:52.814478 PCI: 00:1e.2 cmd <- 06
1553 11:44:52.818055 PCI: 00:1e.3 subsystem <- 8086/a0ab
1554 11:44:52.821590 PCI: 00:1e.3 cmd <- 02
1555 11:44:52.824372 PCI: 00:1f.0 subsystem <- 8086/a087
1556 11:44:52.828253 PCI: 00:1f.0 cmd <- 407
1557 11:44:52.831567 PCI: 00:1f.3 subsystem <- 8086/a0c8
1558 11:44:52.831647 PCI: 00:1f.3 cmd <- 02
1559 11:44:52.838337 PCI: 00:1f.5 subsystem <- 8086/a0a4
1560 11:44:52.838417 PCI: 00:1f.5 cmd <- 406
1561 11:44:52.844028 PCI: 01:00.0 cmd <- 02
1562 11:44:52.848184 done.
1563 11:44:52.851637 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1564 11:44:52.854652 Initializing devices...
1565 11:44:52.858238 Root Device init
1566 11:44:52.861415 Chrome EC: Set SMI mask to 0x0000000000000000
1567 11:44:52.869503 Chrome EC: clear events_b mask to 0x0000000000000000
1568 11:44:52.875544 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1569 11:44:52.882644 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1570 11:44:52.888723 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1571 11:44:52.892454 Chrome EC: Set WAKE mask to 0x0000000000000000
1572 11:44:52.899681 fw_config match found: DB_USB=USB3_ACTIVE
1573 11:44:52.903225 Configure Right Type-C port orientation for retimer
1574 11:44:52.906526 Root Device init finished in 46 msecs
1575 11:44:52.910569 PCI: 00:00.0 init
1576 11:44:52.913764 CPU TDP = 9 Watts
1577 11:44:52.913843 CPU PL1 = 9 Watts
1578 11:44:52.917527 CPU PL2 = 40 Watts
1579 11:44:52.920480 CPU PL4 = 83 Watts
1580 11:44:52.924182 PCI: 00:00.0 init finished in 8 msecs
1581 11:44:52.924262 PCI: 00:02.0 init
1582 11:44:52.927232 GMA: Found VBT in CBFS
1583 11:44:52.930727 GMA: Found valid VBT in CBFS
1584 11:44:52.937481 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1585 11:44:52.943459 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1586 11:44:52.947252 PCI: 00:02.0 init finished in 18 msecs
1587 11:44:52.950342 PCI: 00:05.0 init
1588 11:44:52.953654 PCI: 00:05.0 init finished in 0 msecs
1589 11:44:52.957131 PCI: 00:08.0 init
1590 11:44:52.960295 PCI: 00:08.0 init finished in 0 msecs
1591 11:44:52.963769 PCI: 00:14.0 init
1592 11:44:52.967051 PCI: 00:14.0 init finished in 0 msecs
1593 11:44:52.970239 PCI: 00:14.2 init
1594 11:44:52.973520 PCI: 00:14.2 init finished in 0 msecs
1595 11:44:52.976944 PCI: 00:15.0 init
1596 11:44:52.977025 I2C bus 0 version 0x3230302a
1597 11:44:52.983655 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1598 11:44:52.986991 PCI: 00:15.0 init finished in 6 msecs
1599 11:44:52.987071 PCI: 00:15.1 init
1600 11:44:52.990135 I2C bus 1 version 0x3230302a
1601 11:44:52.993821 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1602 11:44:52.996929 PCI: 00:15.1 init finished in 6 msecs
1603 11:44:53.000643 PCI: 00:15.2 init
1604 11:44:53.004238 I2C bus 2 version 0x3230302a
1605 11:44:53.007399 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1606 11:44:53.010359 PCI: 00:15.2 init finished in 6 msecs
1607 11:44:53.013756 PCI: 00:15.3 init
1608 11:44:53.017287 I2C bus 3 version 0x3230302a
1609 11:44:53.020317 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1610 11:44:53.024071 PCI: 00:15.3 init finished in 6 msecs
1611 11:44:53.027162 PCI: 00:16.0 init
1612 11:44:53.030249 PCI: 00:16.0 init finished in 0 msecs
1613 11:44:53.034091 PCI: 00:19.1 init
1614 11:44:53.034173 I2C bus 5 version 0x3230302a
1615 11:44:53.040250 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1616 11:44:53.043989 PCI: 00:19.1 init finished in 6 msecs
1617 11:44:53.044071 PCI: 00:1d.0 init
1618 11:44:53.046955 Initializing PCH PCIe bridge.
1619 11:44:53.050552 PCI: 00:1d.0 init finished in 3 msecs
1620 11:44:53.054692 PCI: 00:1f.0 init
1621 11:44:53.058274 IOAPIC: Initializing IOAPIC at 0xfec00000
1622 11:44:53.064667 IOAPIC: Bootstrap Processor Local APIC = 0x00
1623 11:44:53.064749 IOAPIC: ID = 0x02
1624 11:44:53.068244 IOAPIC: Dumping registers
1625 11:44:53.071306 reg 0x0000: 0x02000000
1626 11:44:53.074900 reg 0x0001: 0x00770020
1627 11:44:53.074989 reg 0x0002: 0x00000000
1628 11:44:53.081392 PCI: 00:1f.0 init finished in 21 msecs
1629 11:44:53.081475 PCI: 00:1f.2 init
1630 11:44:53.084937 Disabling ACPI via APMC.
1631 11:44:53.088010 APMC done.
1632 11:44:53.091450 PCI: 00:1f.2 init finished in 5 msecs
1633 11:44:53.102696 PCI: 01:00.0 init
1634 11:44:53.106397 PCI: 01:00.0 init finished in 0 msecs
1635 11:44:53.109600 PNP: 0c09.0 init
1636 11:44:53.112643 Google Chrome EC uptime: 10.198 seconds
1637 11:44:53.119326 Google Chrome AP resets since EC boot: 0
1638 11:44:53.122703 Google Chrome most recent AP reset causes:
1639 11:44:53.129331 Google Chrome EC reset flags at last EC boot: reset-pin | hard
1640 11:44:53.132986 PNP: 0c09.0 init finished in 19 msecs
1641 11:44:53.137803 Devices initialized
1642 11:44:53.141281 Show all devs... After init.
1643 11:44:53.144830 Root Device: enabled 1
1644 11:44:53.144911 DOMAIN: 0000: enabled 1
1645 11:44:53.147913 CPU_CLUSTER: 0: enabled 1
1646 11:44:53.151517 PCI: 00:00.0: enabled 1
1647 11:44:53.154518 PCI: 00:02.0: enabled 1
1648 11:44:53.154598 PCI: 00:04.0: enabled 1
1649 11:44:53.157582 PCI: 00:05.0: enabled 1
1650 11:44:53.161330 PCI: 00:06.0: enabled 0
1651 11:44:53.164208 PCI: 00:07.0: enabled 0
1652 11:44:53.164287 PCI: 00:07.1: enabled 0
1653 11:44:53.167631 PCI: 00:07.2: enabled 0
1654 11:44:53.171185 PCI: 00:07.3: enabled 0
1655 11:44:53.174652 PCI: 00:08.0: enabled 1
1656 11:44:53.174731 PCI: 00:09.0: enabled 0
1657 11:44:53.177729 PCI: 00:0a.0: enabled 0
1658 11:44:53.181331 PCI: 00:0d.0: enabled 1
1659 11:44:53.184413 PCI: 00:0d.1: enabled 0
1660 11:44:53.184492 PCI: 00:0d.2: enabled 0
1661 11:44:53.187462 PCI: 00:0d.3: enabled 0
1662 11:44:53.191213 PCI: 00:0e.0: enabled 0
1663 11:44:53.191292 PCI: 00:10.2: enabled 1
1664 11:44:53.194168 PCI: 00:10.6: enabled 0
1665 11:44:53.197830 PCI: 00:10.7: enabled 0
1666 11:44:53.200889 PCI: 00:12.0: enabled 0
1667 11:44:53.200984 PCI: 00:12.6: enabled 0
1668 11:44:53.204180 PCI: 00:13.0: enabled 0
1669 11:44:53.207775 PCI: 00:14.0: enabled 1
1670 11:44:53.210651 PCI: 00:14.1: enabled 0
1671 11:44:53.210737 PCI: 00:14.2: enabled 1
1672 11:44:53.214409 PCI: 00:14.3: enabled 1
1673 11:44:53.217686 PCI: 00:15.0: enabled 1
1674 11:44:53.221153 PCI: 00:15.1: enabled 1
1675 11:44:53.221233 PCI: 00:15.2: enabled 1
1676 11:44:53.224152 PCI: 00:15.3: enabled 1
1677 11:44:53.227717 PCI: 00:16.0: enabled 1
1678 11:44:53.227796 PCI: 00:16.1: enabled 0
1679 11:44:53.230553 PCI: 00:16.2: enabled 0
1680 11:44:53.234238 PCI: 00:16.3: enabled 0
1681 11:44:53.237245 PCI: 00:16.4: enabled 0
1682 11:44:53.237325 PCI: 00:16.5: enabled 0
1683 11:44:53.241006 PCI: 00:17.0: enabled 0
1684 11:44:53.244160 PCI: 00:19.0: enabled 0
1685 11:44:53.247726 PCI: 00:19.1: enabled 1
1686 11:44:53.247808 PCI: 00:19.2: enabled 0
1687 11:44:53.250768 PCI: 00:1c.0: enabled 1
1688 11:44:53.254219 PCI: 00:1c.1: enabled 0
1689 11:44:53.257307 PCI: 00:1c.2: enabled 0
1690 11:44:53.257389 PCI: 00:1c.3: enabled 0
1691 11:44:53.261000 PCI: 00:1c.4: enabled 0
1692 11:44:53.264092 PCI: 00:1c.5: enabled 0
1693 11:44:53.267658 PCI: 00:1c.6: enabled 1
1694 11:44:53.267741 PCI: 00:1c.7: enabled 0
1695 11:44:53.270649 PCI: 00:1d.0: enabled 1
1696 11:44:53.274098 PCI: 00:1d.1: enabled 0
1697 11:44:53.274180 PCI: 00:1d.2: enabled 1
1698 11:44:53.277738 PCI: 00:1d.3: enabled 0
1699 11:44:53.280616 PCI: 00:1e.0: enabled 1
1700 11:44:53.284379 PCI: 00:1e.1: enabled 0
1701 11:44:53.284462 PCI: 00:1e.2: enabled 1
1702 11:44:53.287400 PCI: 00:1e.3: enabled 1
1703 11:44:53.290533 PCI: 00:1f.0: enabled 1
1704 11:44:53.294056 PCI: 00:1f.1: enabled 0
1705 11:44:53.294134 PCI: 00:1f.2: enabled 1
1706 11:44:53.297101 PCI: 00:1f.3: enabled 1
1707 11:44:53.300719 PCI: 00:1f.4: enabled 0
1708 11:44:53.303843 PCI: 00:1f.5: enabled 1
1709 11:44:53.303951 PCI: 00:1f.6: enabled 0
1710 11:44:53.307445 PCI: 00:1f.7: enabled 0
1711 11:44:53.310598 APIC: 00: enabled 1
1712 11:44:53.310676 GENERIC: 0.0: enabled 1
1713 11:44:53.314425 GENERIC: 0.0: enabled 1
1714 11:44:53.317215 GENERIC: 1.0: enabled 1
1715 11:44:53.320606 GENERIC: 0.0: enabled 1
1716 11:44:53.320684 GENERIC: 1.0: enabled 1
1717 11:44:53.323720 USB0 port 0: enabled 1
1718 11:44:53.327224 GENERIC: 0.0: enabled 1
1719 11:44:53.327302 USB0 port 0: enabled 1
1720 11:44:53.330715 GENERIC: 0.0: enabled 1
1721 11:44:53.333935 I2C: 00:1a: enabled 1
1722 11:44:53.337586 I2C: 00:31: enabled 1
1723 11:44:53.337680 I2C: 00:32: enabled 1
1724 11:44:53.340552 I2C: 00:10: enabled 1
1725 11:44:53.343890 I2C: 00:15: enabled 1
1726 11:44:53.344009 GENERIC: 0.0: enabled 0
1727 11:44:53.347523 GENERIC: 1.0: enabled 0
1728 11:44:53.350586 GENERIC: 0.0: enabled 1
1729 11:44:53.350664 SPI: 00: enabled 1
1730 11:44:53.354051 SPI: 00: enabled 1
1731 11:44:53.357013 PNP: 0c09.0: enabled 1
1732 11:44:53.357138 GENERIC: 0.0: enabled 1
1733 11:44:53.360572 USB3 port 0: enabled 1
1734 11:44:53.363722 USB3 port 1: enabled 1
1735 11:44:53.363813 USB3 port 2: enabled 0
1736 11:44:53.366904 USB3 port 3: enabled 0
1737 11:44:53.370722 USB2 port 0: enabled 0
1738 11:44:53.373646 USB2 port 1: enabled 1
1739 11:44:53.373724 USB2 port 2: enabled 1
1740 11:44:53.377400 USB2 port 3: enabled 0
1741 11:44:53.380253 USB2 port 4: enabled 1
1742 11:44:53.380331 USB2 port 5: enabled 0
1743 11:44:53.383877 USB2 port 6: enabled 0
1744 11:44:53.387379 USB2 port 7: enabled 0
1745 11:44:53.390428 USB2 port 8: enabled 0
1746 11:44:53.390508 USB2 port 9: enabled 0
1747 11:44:53.393573 USB3 port 0: enabled 0
1748 11:44:53.397037 USB3 port 1: enabled 1
1749 11:44:53.397117 USB3 port 2: enabled 0
1750 11:44:53.400900 USB3 port 3: enabled 0
1751 11:44:53.403724 GENERIC: 0.0: enabled 1
1752 11:44:53.406881 GENERIC: 1.0: enabled 1
1753 11:44:53.406960 APIC: 01: enabled 1
1754 11:44:53.410120 APIC: 03: enabled 1
1755 11:44:53.410199 APIC: 05: enabled 1
1756 11:44:53.413896 APIC: 07: enabled 1
1757 11:44:53.416950 APIC: 06: enabled 1
1758 11:44:53.417030 APIC: 02: enabled 1
1759 11:44:53.420545 APIC: 04: enabled 1
1760 11:44:53.423758 PCI: 01:00.0: enabled 1
1761 11:44:53.426871 BS: BS_DEV_INIT run times (exec / console): 34 / 536 ms
1762 11:44:53.433273 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1763 11:44:53.437044 ELOG: NV offset 0xf30000 size 0x1000
1764 11:44:53.443655 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1765 11:44:53.449997 ELOG: Event(17) added with size 13 at 2024-05-03 11:44:53 UTC
1766 11:44:53.456684 ELOG: Event(92) added with size 9 at 2024-05-03 11:44:53 UTC
1767 11:44:53.463642 ELOG: Event(93) added with size 9 at 2024-05-03 11:44:53 UTC
1768 11:44:53.469814 ELOG: Event(9E) added with size 10 at 2024-05-03 11:44:53 UTC
1769 11:44:53.477011 ELOG: Event(9F) added with size 14 at 2024-05-03 11:44:53 UTC
1770 11:44:53.480095 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1771 11:44:53.486506 ELOG: Event(A1) added with size 10 at 2024-05-03 11:44:53 UTC
1772 11:44:53.493438 elog_add_boot_reason: Logged recovery mode boot, reason: 0x02
1773 11:44:53.500084 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1774 11:44:53.503175 Finalize devices...
1775 11:44:53.503255 Devices finalized
1776 11:44:53.510210 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1777 11:44:53.513221 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1778 11:44:53.519925 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1779 11:44:53.526652 ME: HFSTS1 : 0x80030055
1780 11:44:53.529781 ME: HFSTS2 : 0x30280116
1781 11:44:53.532968 ME: HFSTS3 : 0x00000050
1782 11:44:53.539433 ME: HFSTS4 : 0x00004000
1783 11:44:53.542891 ME: HFSTS5 : 0x00000000
1784 11:44:53.546307 ME: HFSTS6 : 0x00400006
1785 11:44:53.549401 ME: Manufacturing Mode : YES
1786 11:44:53.556188 ME: SPI Protection Mode Enabled : NO
1787 11:44:53.559968 ME: FW Partition Table : OK
1788 11:44:53.563111 ME: Bringup Loader Failure : NO
1789 11:44:53.566578 ME: Firmware Init Complete : NO
1790 11:44:53.569575 ME: Boot Options Present : NO
1791 11:44:53.572948 ME: Update In Progress : NO
1792 11:44:53.575872 ME: D0i3 Support : YES
1793 11:44:53.579585 ME: Low Power State Enabled : NO
1794 11:44:53.586210 ME: CPU Replaced : YES
1795 11:44:53.589465 ME: CPU Replacement Valid : YES
1796 11:44:53.592469 ME: Current Working State : 5
1797 11:44:53.595847 ME: Current Operation State : 1
1798 11:44:53.599722 ME: Current Operation Mode : 3
1799 11:44:53.602962 ME: Error Code : 0
1800 11:44:53.605959 ME: Enhanced Debug Mode : NO
1801 11:44:53.609233 ME: CPU Debug Disabled : YES
1802 11:44:53.613133 ME: TXT Support : NO
1803 11:44:53.619663 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1804 11:44:53.625964 ELOG: Event(91) added with size 10 at 2024-05-03 11:44:53 UTC
1805 11:44:53.632692 Chrome EC: clear events_b mask to 0x0000000020004000
1806 11:44:53.639604 BS: BS_WRITE_TABLES entry times (exec / console): 2 / 11 ms
1807 11:44:53.646339 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1808 11:44:53.649965 CBFS: 'fallback/slic' not found.
1809 11:44:53.652699 ACPI: Writing ACPI tables at 76b01000.
1810 11:44:53.656231 ACPI: * FACS
1811 11:44:53.656313 ACPI: * DSDT
1812 11:44:53.659384 Ramoops buffer: 0x100000@0x76a00000.
1813 11:44:53.666168 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1814 11:44:53.669311 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1815 11:44:53.673047 Google Chrome EC: version:
1816 11:44:53.676615 ro: voema_v2.0.7540-147f8d37d1
1817 11:44:53.679559 rw: voema_v2.0.7540-147f8d37d1
1818 11:44:53.683145 running image: 1
1819 11:44:53.689589 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1820 11:44:53.693147 ACPI: * FADT
1821 11:44:53.693229 SCI is IRQ9
1822 11:44:53.696375 ACPI: added table 1/32, length now 40
1823 11:44:53.699724 ACPI: * SSDT
1824 11:44:53.702789 Found 1 CPU(s) with 8 core(s) each.
1825 11:44:53.706591 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1826 11:44:53.712794 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1827 11:44:53.716297 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1828 11:44:53.719399 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1829 11:44:53.726218 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1830 11:44:53.732865 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1831 11:44:53.736033 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1832 11:44:53.742892 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1833 11:44:53.749460 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1834 11:44:53.752630 \_SB.PCI0.RP09: Added StorageD3Enable property
1835 11:44:53.756110 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1836 11:44:53.762625 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1837 11:44:53.769463 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1838 11:44:53.773195 PS2K: Passing 80 keymaps to kernel
1839 11:44:53.779279 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1840 11:44:53.785965 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1841 11:44:53.793040 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1842 11:44:53.799499 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1843 11:44:53.805931 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1844 11:44:53.812740 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1845 11:44:53.818988 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1846 11:44:53.825612 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1847 11:44:53.829135 ACPI: added table 2/32, length now 44
1848 11:44:53.832548 ACPI: * MCFG
1849 11:44:53.835810 ACPI: added table 3/32, length now 48
1850 11:44:53.835915 ACPI: * TPM2
1851 11:44:53.839354 TPM2 log created at 0x769f0000
1852 11:44:53.842416 ACPI: added table 4/32, length now 52
1853 11:44:53.845897 ACPI: * MADT
1854 11:44:53.845977 SCI is IRQ9
1855 11:44:53.849346 ACPI: added table 5/32, length now 56
1856 11:44:53.852372 current = 76b09850
1857 11:44:53.852452 ACPI: * DMAR
1858 11:44:53.858885 ACPI: added table 6/32, length now 60
1859 11:44:53.862552 ACPI: added table 7/32, length now 64
1860 11:44:53.862632 ACPI: * HPET
1861 11:44:53.865437 ACPI: added table 8/32, length now 68
1862 11:44:53.869252 ACPI: done.
1863 11:44:53.872379 ACPI tables: 35216 bytes.
1864 11:44:53.872461 smbios_write_tables: 769ef000
1865 11:44:53.875989 EC returned error result code 3
1866 11:44:53.879544 Couldn't obtain OEM name from CBI
1867 11:44:53.883326 Create SMBIOS type 16
1868 11:44:53.887014 Create SMBIOS type 17
1869 11:44:53.890091 GENERIC: 0.0 (WIFI Device)
1870 11:44:53.890171 SMBIOS tables: 1750 bytes.
1871 11:44:53.896896 Writing table forward entry at 0x00000500
1872 11:44:53.903148 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1873 11:44:53.906652 Writing coreboot table at 0x76b25000
1874 11:44:53.913100 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1875 11:44:53.916696 1. 0000000000001000-000000000009ffff: RAM
1876 11:44:53.919745 2. 00000000000a0000-00000000000fffff: RESERVED
1877 11:44:53.926627 3. 0000000000100000-00000000769eefff: RAM
1878 11:44:53.929690 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1879 11:44:53.936349 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1880 11:44:53.943008 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1881 11:44:53.946774 7. 0000000077000000-000000007fbfffff: RESERVED
1882 11:44:53.949775 8. 00000000c0000000-00000000cfffffff: RESERVED
1883 11:44:53.956300 9. 00000000f8000000-00000000f9ffffff: RESERVED
1884 11:44:53.959762 10. 00000000fb000000-00000000fb000fff: RESERVED
1885 11:44:53.966587 11. 00000000fe000000-00000000fe00ffff: RESERVED
1886 11:44:53.970104 12. 00000000fed80000-00000000fed87fff: RESERVED
1887 11:44:53.976464 13. 00000000fed90000-00000000fed92fff: RESERVED
1888 11:44:53.979798 14. 00000000feda0000-00000000feda1fff: RESERVED
1889 11:44:53.986305 15. 00000000fedc0000-00000000feddffff: RESERVED
1890 11:44:53.989925 16. 0000000100000000-00000002803fffff: RAM
1891 11:44:53.993058 Passing 4 GPIOs to payload:
1892 11:44:53.996029 NAME | PORT | POLARITY | VALUE
1893 11:44:54.002709 lid | undefined | high | high
1894 11:44:54.006289 power | undefined | high | low
1895 11:44:54.013063 oprom | undefined | high | low
1896 11:44:54.019248 EC in RW | 0x000000e5 | high | low
1897 11:44:54.026061 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 2de1
1898 11:44:54.026142 coreboot table: 1576 bytes.
1899 11:44:54.032781 IMD ROOT 0. 0x76fff000 0x00001000
1900 11:44:54.035940 IMD SMALL 1. 0x76ffe000 0x00001000
1901 11:44:54.039696 FSP MEMORY 2. 0x76c4e000 0x003b0000
1902 11:44:54.042746 VPD 3. 0x76c4d000 0x00000367
1903 11:44:54.046314 RO MCACHE 4. 0x76c4c000 0x00000fdc
1904 11:44:54.049383 CONSOLE 5. 0x76c2c000 0x00020000
1905 11:44:54.052955 FMAP 6. 0x76c2b000 0x00000578
1906 11:44:54.056171 TIME STAMP 7. 0x76c2a000 0x00000910
1907 11:44:54.059251 VBOOT WORK 8. 0x76c16000 0x00014000
1908 11:44:54.066115 ROMSTG STCK 9. 0x76c15000 0x00001000
1909 11:44:54.069179 AFTER CAR 10. 0x76c0a000 0x0000b000
1910 11:44:54.072822 RAMSTAGE 11. 0x76b97000 0x00073000
1911 11:44:54.075813 REFCODE 12. 0x76b42000 0x00055000
1912 11:44:54.079275 SMM BACKUP 13. 0x76b32000 0x00010000
1913 11:44:54.082750 4f444749 14. 0x76b30000 0x00002000
1914 11:44:54.086322 EXT VBT15. 0x76b2d000 0x0000219f
1915 11:44:54.089907 COREBOOT 16. 0x76b25000 0x00008000
1916 11:44:54.092947 ACPI 17. 0x76b01000 0x00024000
1917 11:44:54.099311 ACPI GNVS 18. 0x76b00000 0x00001000
1918 11:44:54.102622 RAMOOPS 19. 0x76a00000 0x00100000
1919 11:44:54.106302 TPM2 TCGLOG20. 0x769f0000 0x00010000
1920 11:44:54.109284 SMBIOS 21. 0x769ef000 0x00000800
1921 11:44:54.109364 IMD small region:
1922 11:44:54.115919 IMD ROOT 0. 0x76ffec00 0x00000400
1923 11:44:54.119452 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1924 11:44:54.122982 POWER STATE 2. 0x76ffeb80 0x00000044
1925 11:44:54.125990 ROMSTAGE 3. 0x76ffeb60 0x00000004
1926 11:44:54.129552 MEM INFO 4. 0x76ffe980 0x000001e0
1927 11:44:54.136202 BS: BS_WRITE_TABLES run times (exec / console): 8 / 484 ms
1928 11:44:54.139307 MTRR: Physical address space:
1929 11:44:54.146145 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1930 11:44:54.152799 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1931 11:44:54.159457 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1932 11:44:54.166117 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1933 11:44:54.169206 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1934 11:44:54.176047 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1935 11:44:54.182738 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1936 11:44:54.185627 MTRR: Fixed MSR 0x250 0x0606060606060606
1937 11:44:54.192305 MTRR: Fixed MSR 0x258 0x0606060606060606
1938 11:44:54.195893 MTRR: Fixed MSR 0x259 0x0000000000000000
1939 11:44:54.198943 MTRR: Fixed MSR 0x268 0x0606060606060606
1940 11:44:54.202202 MTRR: Fixed MSR 0x269 0x0606060606060606
1941 11:44:54.209430 MTRR: Fixed MSR 0x26a 0x0606060606060606
1942 11:44:54.212696 MTRR: Fixed MSR 0x26b 0x0606060606060606
1943 11:44:54.215819 MTRR: Fixed MSR 0x26c 0x0606060606060606
1944 11:44:54.218848 MTRR: Fixed MSR 0x26d 0x0606060606060606
1945 11:44:54.225792 MTRR: Fixed MSR 0x26e 0x0606060606060606
1946 11:44:54.228772 MTRR: Fixed MSR 0x26f 0x0606060606060606
1947 11:44:54.232128 call enable_fixed_mtrr()
1948 11:44:54.235552 CPU physical address size: 39 bits
1949 11:44:54.239021 MTRR: default type WB/UC MTRR counts: 6/6.
1950 11:44:54.242234 MTRR: UC selected as default type.
1951 11:44:54.248842 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1952 11:44:54.255572 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1953 11:44:54.262234 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1954 11:44:54.268454 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1955 11:44:54.275110 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1956 11:44:54.282030 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1957 11:44:54.282114
1958 11:44:54.285167 MTRR check
1959 11:44:54.285247 Fixed MTRRs : Enabled
1960 11:44:54.288245 Variable MTRRs: Enabled
1961 11:44:54.288325
1962 11:44:54.291881 MTRR: Fixed MSR 0x250 0x0606060606060606
1963 11:44:54.298545 MTRR: Fixed MSR 0x258 0x0606060606060606
1964 11:44:54.301662 MTRR: Fixed MSR 0x259 0x0000000000000000
1965 11:44:54.304850 MTRR: Fixed MSR 0x268 0x0606060606060606
1966 11:44:54.308487 MTRR: Fixed MSR 0x269 0x0606060606060606
1967 11:44:54.311552 MTRR: Fixed MSR 0x26a 0x0606060606060606
1968 11:44:54.318602 MTRR: Fixed MSR 0x26b 0x0606060606060606
1969 11:44:54.321872 MTRR: Fixed MSR 0x26c 0x0606060606060606
1970 11:44:54.324942 MTRR: Fixed MSR 0x26d 0x0606060606060606
1971 11:44:54.328460 MTRR: Fixed MSR 0x26e 0x0606060606060606
1972 11:44:54.334794 MTRR: Fixed MSR 0x26f 0x0606060606060606
1973 11:44:54.341621 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1974 11:44:54.344928 call enable_fixed_mtrr()
1975 11:44:54.351715 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
1976 11:44:54.355058 CPU physical address size: 39 bits
1977 11:44:54.361669 Checking segment from ROM address 0xffc02b38
1978 11:44:54.364942 MTRR: Fixed MSR 0x250 0x0606060606060606
1979 11:44:54.368103 MTRR: Fixed MSR 0x250 0x0606060606060606
1980 11:44:54.371431 MTRR: Fixed MSR 0x258 0x0606060606060606
1981 11:44:54.374843 MTRR: Fixed MSR 0x259 0x0000000000000000
1982 11:44:54.381521 MTRR: Fixed MSR 0x268 0x0606060606060606
1983 11:44:54.384592 MTRR: Fixed MSR 0x269 0x0606060606060606
1984 11:44:54.388142 MTRR: Fixed MSR 0x26a 0x0606060606060606
1985 11:44:54.391193 MTRR: Fixed MSR 0x26b 0x0606060606060606
1986 11:44:54.397966 MTRR: Fixed MSR 0x26c 0x0606060606060606
1987 11:44:54.401662 MTRR: Fixed MSR 0x26d 0x0606060606060606
1988 11:44:54.404878 MTRR: Fixed MSR 0x26e 0x0606060606060606
1989 11:44:54.407871 MTRR: Fixed MSR 0x26f 0x0606060606060606
1990 11:44:54.415257 MTRR: Fixed MSR 0x258 0x0606060606060606
1991 11:44:54.415336 call enable_fixed_mtrr()
1992 11:44:54.422152 MTRR: Fixed MSR 0x259 0x0000000000000000
1993 11:44:54.425148 MTRR: Fixed MSR 0x268 0x0606060606060606
1994 11:44:54.428741 MTRR: Fixed MSR 0x269 0x0606060606060606
1995 11:44:54.431822 MTRR: Fixed MSR 0x26a 0x0606060606060606
1996 11:44:54.438767 MTRR: Fixed MSR 0x26b 0x0606060606060606
1997 11:44:54.441692 MTRR: Fixed MSR 0x26c 0x0606060606060606
1998 11:44:54.445330 MTRR: Fixed MSR 0x26d 0x0606060606060606
1999 11:44:54.448457 MTRR: Fixed MSR 0x26e 0x0606060606060606
2000 11:44:54.455274 MTRR: Fixed MSR 0x26f 0x0606060606060606
2001 11:44:54.458335 CPU physical address size: 39 bits
2002 11:44:54.461990 call enable_fixed_mtrr()
2003 11:44:54.465271 MTRR: Fixed MSR 0x250 0x0606060606060606
2004 11:44:54.468623 MTRR: Fixed MSR 0x250 0x0606060606060606
2005 11:44:54.474785 MTRR: Fixed MSR 0x258 0x0606060606060606
2006 11:44:54.478961 MTRR: Fixed MSR 0x259 0x0000000000000000
2007 11:44:54.481989 MTRR: Fixed MSR 0x268 0x0606060606060606
2008 11:44:54.485049 MTRR: Fixed MSR 0x269 0x0606060606060606
2009 11:44:54.491810 MTRR: Fixed MSR 0x26a 0x0606060606060606
2010 11:44:54.495049 MTRR: Fixed MSR 0x26b 0x0606060606060606
2011 11:44:54.498126 MTRR: Fixed MSR 0x26c 0x0606060606060606
2012 11:44:54.501773 MTRR: Fixed MSR 0x26d 0x0606060606060606
2013 11:44:54.508494 MTRR: Fixed MSR 0x26e 0x0606060606060606
2014 11:44:54.511548 MTRR: Fixed MSR 0x26f 0x0606060606060606
2015 11:44:54.514704 MTRR: Fixed MSR 0x258 0x0606060606060606
2016 11:44:54.518432 call enable_fixed_mtrr()
2017 11:44:54.521452 MTRR: Fixed MSR 0x259 0x0000000000000000
2018 11:44:54.528201 MTRR: Fixed MSR 0x268 0x0606060606060606
2019 11:44:54.531872 MTRR: Fixed MSR 0x269 0x0606060606060606
2020 11:44:54.534770 MTRR: Fixed MSR 0x26a 0x0606060606060606
2021 11:44:54.538310 MTRR: Fixed MSR 0x26b 0x0606060606060606
2022 11:44:54.544712 MTRR: Fixed MSR 0x26c 0x0606060606060606
2023 11:44:54.548145 MTRR: Fixed MSR 0x26d 0x0606060606060606
2024 11:44:54.551195 MTRR: Fixed MSR 0x26e 0x0606060606060606
2025 11:44:54.554903 MTRR: Fixed MSR 0x26f 0x0606060606060606
2026 11:44:54.558465 CPU physical address size: 39 bits
2027 11:44:54.565237 call enable_fixed_mtrr()
2028 11:44:54.568363 Checking segment from ROM address 0xffc02b54
2029 11:44:54.572108 CPU physical address size: 39 bits
2030 11:44:54.575184 MTRR: Fixed MSR 0x250 0x0606060606060606
2031 11:44:54.578133 MTRR: Fixed MSR 0x250 0x0606060606060606
2032 11:44:54.585146 MTRR: Fixed MSR 0x258 0x0606060606060606
2033 11:44:54.588226 MTRR: Fixed MSR 0x259 0x0000000000000000
2034 11:44:54.592020 MTRR: Fixed MSR 0x268 0x0606060606060606
2035 11:44:54.594953 MTRR: Fixed MSR 0x269 0x0606060606060606
2036 11:44:54.601586 MTRR: Fixed MSR 0x26a 0x0606060606060606
2037 11:44:54.605216 MTRR: Fixed MSR 0x26b 0x0606060606060606
2038 11:44:54.608014 MTRR: Fixed MSR 0x26c 0x0606060606060606
2039 11:44:54.612002 MTRR: Fixed MSR 0x26d 0x0606060606060606
2040 11:44:54.618293 MTRR: Fixed MSR 0x26e 0x0606060606060606
2041 11:44:54.621510 MTRR: Fixed MSR 0x26f 0x0606060606060606
2042 11:44:54.625004 MTRR: Fixed MSR 0x258 0x0606060606060606
2043 11:44:54.628344 call enable_fixed_mtrr()
2044 11:44:54.631448 MTRR: Fixed MSR 0x259 0x0000000000000000
2045 11:44:54.638313 MTRR: Fixed MSR 0x268 0x0606060606060606
2046 11:44:54.641785 MTRR: Fixed MSR 0x269 0x0606060606060606
2047 11:44:54.644580 MTRR: Fixed MSR 0x26a 0x0606060606060606
2048 11:44:54.648270 MTRR: Fixed MSR 0x26b 0x0606060606060606
2049 11:44:54.654741 MTRR: Fixed MSR 0x26c 0x0606060606060606
2050 11:44:54.657896 MTRR: Fixed MSR 0x26d 0x0606060606060606
2051 11:44:54.661287 MTRR: Fixed MSR 0x26e 0x0606060606060606
2052 11:44:54.664416 MTRR: Fixed MSR 0x26f 0x0606060606060606
2053 11:44:54.668779 CPU physical address size: 39 bits
2054 11:44:54.674995 call enable_fixed_mtrr()
2055 11:44:54.678123 Loading segment from ROM address 0xffc02b38
2056 11:44:54.681716 CPU physical address size: 39 bits
2057 11:44:54.685186 code (compression=0)
2058 11:44:54.688212 CPU physical address size: 39 bits
2059 11:44:54.694937 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2060 11:44:54.704893 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2061 11:44:54.708479 it's not compressed!
2062 11:44:54.845982 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2063 11:44:54.852472 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2064 11:44:54.858905 Loading segment from ROM address 0xffc02b54
2065 11:44:54.858987 Entry Point 0x30000000
2066 11:44:54.862330 Loaded segments
2067 11:44:54.868698 BS: BS_PAYLOAD_LOAD run times (exec / console): 458 / 64 ms
2068 11:44:54.912205 Finalizing chipset.
2069 11:44:54.915195 Finalizing SMM.
2070 11:44:54.915293 APMC done.
2071 11:44:54.921895 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2072 11:44:54.924879 mp_park_aps done after 0 msecs.
2073 11:44:54.928017 Jumping to boot code at 0x30000000(0x76b25000)
2074 11:44:54.938459 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2075 11:44:54.938540
2076 11:44:54.938603
2077 11:44:54.938690
2078 11:44:54.941460 Starting depthcharge on Voema...
2079 11:44:54.941567
2080 11:44:54.941927 end: 2.2.3 depthcharge-start (duration 00:00:04) [common]
2081 11:44:54.942022 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
2082 11:44:54.942102 Setting prompt string to ['volteer:']
2083 11:44:54.942179 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:47)
2084 11:44:54.951702 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2085 11:44:54.951783
2086 11:44:54.958215 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2087 11:44:54.958309
2088 11:44:54.964819 Looking for NVMe Controller 0x3005f238 @ 00:1d:00
2089 11:44:54.964912
2090 11:44:54.967890 Failed to find eMMC card reader
2091 11:44:54.968028
2092 11:44:54.968118 Wipe memory regions:
2093 11:44:54.968205
2094 11:44:54.974387 [0x00000000001000, 0x000000000a0000)
2095 11:44:54.974481
2096 11:44:54.977888 [0x00000000100000, 0x00000030000000)
2097 11:44:55.003108
2098 11:44:55.006212 [0x00000032662db0, 0x000000769ef000)
2099 11:44:55.042234
2100 11:44:55.045373 [0x00000100000000, 0x00000280400000)
2101 11:44:55.244379
2102 11:44:55.246980 ec_init: CrosEC protocol v3 supported (256, 256)
2103 11:44:55.247070
2104 11:44:55.253869 update_port_state: port C0 state: usb enable 1 mux conn 0
2105 11:44:55.253952
2106 11:44:55.260396 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2107 11:44:55.265486
2108 11:44:55.268805 pmc_check_ipc_sts: STS_BUSY done after 1862 us
2109 11:44:55.268926
2110 11:44:55.272223 send_conn_disc_msg: pmc_send_cmd succeeded
2111 11:44:55.704741
2112 11:44:55.704935 R8152: Initializing
2113 11:44:55.705045
2114 11:44:55.708056 Version 6 (ocp_data = 5c30)
2115 11:44:55.708206
2116 11:44:55.711198 R8152: Done initializing
2117 11:44:55.711380
2118 11:44:55.714261 Adding net device
2119 11:44:56.017973
2120 11:44:56.020861 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2121 11:44:56.021291
2122 11:44:56.021622
2123 11:44:56.021933
2124 11:44:56.024459 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2126 11:44:56.125824 volteer: tftpboot 192.168.201.1 13627367/tftp-deploy-zqd31csa/kernel/bzImage 13627367/tftp-deploy-zqd31csa/kernel/cmdline 13627367/tftp-deploy-zqd31csa/ramdisk/ramdisk.cpio.gz
2127 11:44:56.126372 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2128 11:44:56.126874 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:46)
2129 11:44:56.131270 tftpboot 192.168.201.1 13627367/tftp-deploy-zqd31csa/kernel/bzIploy-zqd31csa/kernel/cmdline 13627367/tftp-deploy-zqd31csa/ramdisk/ramdisk.cpio.gz
2130 11:44:56.131708
2131 11:44:56.132109 Waiting for link
2132 11:44:56.334658
2133 11:44:56.335154 done.
2134 11:44:56.335533
2135 11:44:56.335849 MAC: 00:24:32:30:7d:bc
2136 11:44:56.336211
2137 11:44:56.337761 Sending DHCP discover... done.
2138 11:44:56.338241
2139 11:44:56.340990 Waiting for reply... done.
2140 11:44:56.341452
2141 11:44:56.344594 Sending DHCP request... done.
2142 11:44:56.345083
2143 11:44:56.347486 Waiting for reply... done.
2144 11:44:56.347936
2145 11:44:56.351076 My ip is 192.168.201.22
2146 11:44:56.351535
2147 11:44:56.354356 The DHCP server ip is 192.168.201.1
2148 11:44:56.354981
2149 11:44:56.357546 TFTP server IP predefined by user: 192.168.201.1
2150 11:44:56.357964
2151 11:44:56.363958 Bootfile predefined by user: 13627367/tftp-deploy-zqd31csa/kernel/bzImage
2152 11:44:56.364383
2153 11:44:56.367539 Sending tftp read request... done.
2154 11:44:56.371039
2155 11:44:56.377530 Waiting for the transfer...
2156 11:44:56.377945
2157 11:44:56.989903 00000000 ################################################################
2158 11:44:56.990050
2159 11:44:57.579414 00080000 ################################################################
2160 11:44:57.579549
2161 11:44:58.169207 00100000 ################################################################
2162 11:44:58.169357
2163 11:44:58.735406 00180000 ################################################################
2164 11:44:58.735549
2165 11:44:59.324004 00200000 ################################################################
2166 11:44:59.324150
2167 11:44:59.913337 00280000 ################################################################
2168 11:44:59.913852
2169 11:45:00.580197 00300000 ################################################################
2170 11:45:00.580702
2171 11:45:01.173819 00380000 ################################################################
2172 11:45:01.173995
2173 11:45:01.742020 00400000 ################################################################
2174 11:45:01.742190
2175 11:45:02.318792 00480000 ################################################################
2176 11:45:02.318938
2177 11:45:02.960728 00500000 ################################################################
2178 11:45:02.961245
2179 11:45:03.597187 00580000 ################################################################
2180 11:45:03.597805
2181 11:45:04.229421 00600000 ################################################################
2182 11:45:04.229923
2183 11:45:04.876465 00680000 ################################################################
2184 11:45:04.876971
2185 11:45:05.541733 00700000 ################################################################
2186 11:45:05.542249
2187 11:45:06.218258 00780000 ################################################################
2188 11:45:06.218753
2189 11:45:06.851342 00800000 ################################################################
2190 11:45:06.851959
2191 11:45:07.530195 00880000 ################################################################
2192 11:45:07.530714
2193 11:45:08.172606 00900000 ################################################################
2194 11:45:08.172739
2195 11:45:08.789946 00980000 ################################################################
2196 11:45:08.790094
2197 11:45:09.394323 00a00000 ################################################################
2198 11:45:09.394822
2199 11:45:10.053489 00a80000 ################################################################
2200 11:45:10.053990
2201 11:45:10.725654 00b00000 ################################################################
2202 11:45:10.726156
2203 11:45:11.382998 00b80000 ################################################################
2204 11:45:11.383542
2205 11:45:11.992630 00c00000 ################################################################
2206 11:45:11.992775
2207 11:45:12.590560 00c80000 ################################################################
2208 11:45:12.591075
2209 11:45:13.165681 00d00000 ######################################################## done.
2210 11:45:13.166190
2211 11:45:13.168896 The bootfile was 14090128 bytes long.
2212 11:45:13.169317
2213 11:45:13.172296 Sending tftp read request... done.
2214 11:45:13.172710
2215 11:45:13.175634 Waiting for the transfer...
2216 11:45:13.176183
2217 11:45:13.855460 00000000 ################################################################
2218 11:45:13.855979
2219 11:45:14.513116 00080000 ################################################################
2220 11:45:14.513612
2221 11:45:15.183341 00100000 ################################################################
2222 11:45:15.183493
2223 11:45:15.803062 00180000 ################################################################
2224 11:45:15.803208
2225 11:45:16.474783 00200000 ################################################################
2226 11:45:16.475286
2227 11:45:17.150333 00280000 ################################################################
2228 11:45:17.150886
2229 11:45:17.832023 00300000 ################################################################
2230 11:45:17.832517
2231 11:45:18.520235 00380000 ################################################################
2232 11:45:18.520741
2233 11:45:19.199811 00400000 ################################################################
2234 11:45:19.200360
2235 11:45:19.866859 00480000 ################################################################
2236 11:45:19.867538
2237 11:45:20.549680 00500000 ################################################################
2238 11:45:20.550237
2239 11:45:21.191183 00580000 ################################################################
2240 11:45:21.191926
2241 11:45:21.877593 00600000 ################################################################
2242 11:45:21.878314
2243 11:45:22.562428 00680000 ################################################################
2244 11:45:22.562911
2245 11:45:23.253917 00700000 ################################################################
2246 11:45:23.254400
2247 11:45:23.955784 00780000 ################################################################
2248 11:45:23.956324
2249 11:45:24.661033 00800000 ################################################################
2250 11:45:24.661567
2251 11:45:24.945980 00880000 ########################### done.
2252 11:45:24.946469
2253 11:45:24.949110 Sending tftp read request... done.
2254 11:45:24.949524
2255 11:45:24.953008 Waiting for the transfer...
2256 11:45:24.953423
2257 11:45:24.953753 00000000 # done.
2258 11:45:24.954073
2259 11:45:24.962553 Command line loaded dynamically from TFTP file: 13627367/tftp-deploy-zqd31csa/kernel/cmdline
2260 11:45:24.962975
2261 11:45:24.979291 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2262 11:45:24.983609
2263 11:45:24.986658 Shutting down all USB controllers.
2264 11:45:24.987068
2265 11:45:24.987396 Removing current net device
2266 11:45:24.987704
2267 11:45:24.990326 Finalizing coreboot
2268 11:45:24.990739
2269 11:45:24.996709 Exiting depthcharge with code 4 at timestamp: 38713554
2270 11:45:24.997156
2271 11:45:24.997504
2272 11:45:24.997816 Starting kernel ...
2273 11:45:24.998313
2274 11:45:24.998641
2275 11:45:24.999953 end: 2.2.4 bootloader-commands (duration 00:00:30) [common]
2276 11:45:25.000438 start: 2.2.5 auto-login-action (timeout 00:04:17) [common]
2277 11:45:25.000821 Setting prompt string to ['Linux version [0-9]']
2278 11:45:25.001170 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2279 11:45:25.001514 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2281 11:49:42.001268 end: 2.2.5 auto-login-action (duration 00:04:17) [common]
2283 11:49:42.002264 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 257 seconds'
2285 11:49:42.003056 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2288 11:49:42.004362 end: 2 depthcharge-action (duration 00:05:00) [common]
2290 11:49:42.005430 Cleaning after the job
2291 11:49:42.005844 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13627367/tftp-deploy-zqd31csa/ramdisk
2292 11:49:42.010396 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13627367/tftp-deploy-zqd31csa/kernel
2293 11:49:42.017492 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13627367/tftp-deploy-zqd31csa/modules
2294 11:49:42.019876 start: 4.1 power-off (timeout 00:00:30) [common]
2295 11:49:42.020725 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cp514-2h-1130g7-volteer-cbg-5' '--port=1' '--command=off'
2296 11:49:42.996499 >> Command sent successfully.
2297 11:49:43.007037 Returned 0 in 0 seconds
2298 11:49:43.108283 end: 4.1 power-off (duration 00:00:01) [common]
2300 11:49:43.109618 start: 4.2 read-feedback (timeout 00:09:59) [common]
2301 11:49:43.110773 Listened to connection for namespace 'common' for up to 1s
2303 11:49:43.111978 Listened to connection for namespace 'common' for up to 1s
2304 11:49:44.111456 Finalising connection for namespace 'common'
2305 11:49:44.112144 Disconnecting from shell: Finalise
2306 11:49:44.112564
2307 11:49:44.213512 end: 4.2 read-feedback (duration 00:00:01) [common]
2308 11:49:44.214064 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13627367
2309 11:49:44.231440 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13627367
2310 11:49:44.231588 JobError: Your job cannot terminate cleanly.