Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 11:44:13.978851 lava-dispatcher, installed at version: 2024.01
2 11:44:13.979077 start: 0 validate
3 11:44:13.979211 Start time: 2024-05-03 11:44:13.979203+00:00 (UTC)
4 11:44:13.979343 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:44:13.979475 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Fx86%2Frootfs.cpio.gz exists
6 11:44:14.239826 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:44:14.240242 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2481-gef9c8224c1829%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:44:14.495193 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:44:14.495843 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2481-gef9c8224c1829%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 11:44:19.487179 validate duration: 5.51
12 11:44:19.487463 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 11:44:19.487568 start: 1.1 download-retry (timeout 00:10:00) [common]
14 11:44:19.487666 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 11:44:19.487796 Not decompressing ramdisk as can be used compressed.
16 11:44:19.487879 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/x86/rootfs.cpio.gz
17 11:44:19.487941 saving as /var/lib/lava/dispatcher/tmp/13627304/tftp-deploy-okz87xvc/ramdisk/rootfs.cpio.gz
18 11:44:19.488003 total size: 8417901 (8 MB)
19 11:44:20.125042 progress 0 % (0 MB)
20 11:44:20.137029 progress 5 % (0 MB)
21 11:44:20.148719 progress 10 % (0 MB)
22 11:44:20.157828 progress 15 % (1 MB)
23 11:44:20.163684 progress 20 % (1 MB)
24 11:44:20.168540 progress 25 % (2 MB)
25 11:44:20.172662 progress 30 % (2 MB)
26 11:44:20.175965 progress 35 % (2 MB)
27 11:44:20.179284 progress 40 % (3 MB)
28 11:44:20.182388 progress 45 % (3 MB)
29 11:44:20.185166 progress 50 % (4 MB)
30 11:44:20.187870 progress 55 % (4 MB)
31 11:44:20.190341 progress 60 % (4 MB)
32 11:44:20.192577 progress 65 % (5 MB)
33 11:44:20.194816 progress 70 % (5 MB)
34 11:44:20.197071 progress 75 % (6 MB)
35 11:44:20.199248 progress 80 % (6 MB)
36 11:44:20.201415 progress 85 % (6 MB)
37 11:44:20.203581 progress 90 % (7 MB)
38 11:44:20.205737 progress 95 % (7 MB)
39 11:44:20.207775 progress 100 % (8 MB)
40 11:44:20.208003 8 MB downloaded in 0.72 s (11.15 MB/s)
41 11:44:20.208161 end: 1.1.1 http-download (duration 00:00:01) [common]
43 11:44:20.208398 end: 1.1 download-retry (duration 00:00:01) [common]
44 11:44:20.208483 start: 1.2 download-retry (timeout 00:09:59) [common]
45 11:44:20.208566 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 11:44:20.208705 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2481-gef9c8224c1829/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 11:44:20.208777 saving as /var/lib/lava/dispatcher/tmp/13627304/tftp-deploy-okz87xvc/kernel/bzImage
48 11:44:20.208838 total size: 14090128 (13 MB)
49 11:44:20.208898 No compression specified
50 11:44:20.210042 progress 0 % (0 MB)
51 11:44:20.213727 progress 5 % (0 MB)
52 11:44:20.217297 progress 10 % (1 MB)
53 11:44:20.220954 progress 15 % (2 MB)
54 11:44:20.224528 progress 20 % (2 MB)
55 11:44:20.228202 progress 25 % (3 MB)
56 11:44:20.231802 progress 30 % (4 MB)
57 11:44:20.235540 progress 35 % (4 MB)
58 11:44:20.239100 progress 40 % (5 MB)
59 11:44:20.242877 progress 45 % (6 MB)
60 11:44:20.246511 progress 50 % (6 MB)
61 11:44:20.250280 progress 55 % (7 MB)
62 11:44:20.253827 progress 60 % (8 MB)
63 11:44:20.257587 progress 65 % (8 MB)
64 11:44:20.261276 progress 70 % (9 MB)
65 11:44:20.264902 progress 75 % (10 MB)
66 11:44:20.268504 progress 80 % (10 MB)
67 11:44:20.272131 progress 85 % (11 MB)
68 11:44:20.275622 progress 90 % (12 MB)
69 11:44:20.279258 progress 95 % (12 MB)
70 11:44:20.282750 progress 100 % (13 MB)
71 11:44:20.282991 13 MB downloaded in 0.07 s (181.22 MB/s)
72 11:44:20.283138 end: 1.2.1 http-download (duration 00:00:00) [common]
74 11:44:20.283369 end: 1.2 download-retry (duration 00:00:00) [common]
75 11:44:20.283458 start: 1.3 download-retry (timeout 00:09:59) [common]
76 11:44:20.283545 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 11:44:20.283688 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2481-gef9c8224c1829/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 11:44:20.283757 saving as /var/lib/lava/dispatcher/tmp/13627304/tftp-deploy-okz87xvc/modules/modules.tar
79 11:44:20.283819 total size: 484648 (0 MB)
80 11:44:20.283881 Using unxz to decompress xz
81 11:44:20.288091 progress 6 % (0 MB)
82 11:44:20.288502 progress 13 % (0 MB)
83 11:44:20.288744 progress 20 % (0 MB)
84 11:44:20.290337 progress 27 % (0 MB)
85 11:44:20.292100 progress 33 % (0 MB)
86 11:44:20.294171 progress 40 % (0 MB)
87 11:44:20.295938 progress 47 % (0 MB)
88 11:44:20.297667 progress 54 % (0 MB)
89 11:44:20.299446 progress 60 % (0 MB)
90 11:44:20.301063 progress 67 % (0 MB)
91 11:44:20.302799 progress 74 % (0 MB)
92 11:44:20.304747 progress 81 % (0 MB)
93 11:44:20.306502 progress 87 % (0 MB)
94 11:44:20.308382 progress 94 % (0 MB)
95 11:44:20.310160 progress 100 % (0 MB)
96 11:44:20.315764 0 MB downloaded in 0.03 s (14.47 MB/s)
97 11:44:20.316000 end: 1.3.1 http-download (duration 00:00:00) [common]
99 11:44:20.316268 end: 1.3 download-retry (duration 00:00:00) [common]
100 11:44:20.316361 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
101 11:44:20.316457 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
102 11:44:20.316538 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 11:44:20.316621 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
104 11:44:20.316849 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13627304/lava-overlay-5xqqq7gq
105 11:44:20.317027 makedir: /var/lib/lava/dispatcher/tmp/13627304/lava-overlay-5xqqq7gq/lava-13627304/bin
106 11:44:20.317133 makedir: /var/lib/lava/dispatcher/tmp/13627304/lava-overlay-5xqqq7gq/lava-13627304/tests
107 11:44:20.317233 makedir: /var/lib/lava/dispatcher/tmp/13627304/lava-overlay-5xqqq7gq/lava-13627304/results
108 11:44:20.317349 Creating /var/lib/lava/dispatcher/tmp/13627304/lava-overlay-5xqqq7gq/lava-13627304/bin/lava-add-keys
109 11:44:20.317491 Creating /var/lib/lava/dispatcher/tmp/13627304/lava-overlay-5xqqq7gq/lava-13627304/bin/lava-add-sources
110 11:44:20.317621 Creating /var/lib/lava/dispatcher/tmp/13627304/lava-overlay-5xqqq7gq/lava-13627304/bin/lava-background-process-start
111 11:44:20.317754 Creating /var/lib/lava/dispatcher/tmp/13627304/lava-overlay-5xqqq7gq/lava-13627304/bin/lava-background-process-stop
112 11:44:20.317880 Creating /var/lib/lava/dispatcher/tmp/13627304/lava-overlay-5xqqq7gq/lava-13627304/bin/lava-common-functions
113 11:44:20.318005 Creating /var/lib/lava/dispatcher/tmp/13627304/lava-overlay-5xqqq7gq/lava-13627304/bin/lava-echo-ipv4
114 11:44:20.318131 Creating /var/lib/lava/dispatcher/tmp/13627304/lava-overlay-5xqqq7gq/lava-13627304/bin/lava-install-packages
115 11:44:20.318259 Creating /var/lib/lava/dispatcher/tmp/13627304/lava-overlay-5xqqq7gq/lava-13627304/bin/lava-installed-packages
116 11:44:20.318385 Creating /var/lib/lava/dispatcher/tmp/13627304/lava-overlay-5xqqq7gq/lava-13627304/bin/lava-os-build
117 11:44:20.318509 Creating /var/lib/lava/dispatcher/tmp/13627304/lava-overlay-5xqqq7gq/lava-13627304/bin/lava-probe-channel
118 11:44:20.318632 Creating /var/lib/lava/dispatcher/tmp/13627304/lava-overlay-5xqqq7gq/lava-13627304/bin/lava-probe-ip
119 11:44:20.318756 Creating /var/lib/lava/dispatcher/tmp/13627304/lava-overlay-5xqqq7gq/lava-13627304/bin/lava-target-ip
120 11:44:20.318879 Creating /var/lib/lava/dispatcher/tmp/13627304/lava-overlay-5xqqq7gq/lava-13627304/bin/lava-target-mac
121 11:44:20.319002 Creating /var/lib/lava/dispatcher/tmp/13627304/lava-overlay-5xqqq7gq/lava-13627304/bin/lava-target-storage
122 11:44:20.319129 Creating /var/lib/lava/dispatcher/tmp/13627304/lava-overlay-5xqqq7gq/lava-13627304/bin/lava-test-case
123 11:44:20.319253 Creating /var/lib/lava/dispatcher/tmp/13627304/lava-overlay-5xqqq7gq/lava-13627304/bin/lava-test-event
124 11:44:20.319375 Creating /var/lib/lava/dispatcher/tmp/13627304/lava-overlay-5xqqq7gq/lava-13627304/bin/lava-test-feedback
125 11:44:20.319497 Creating /var/lib/lava/dispatcher/tmp/13627304/lava-overlay-5xqqq7gq/lava-13627304/bin/lava-test-raise
126 11:44:20.319619 Creating /var/lib/lava/dispatcher/tmp/13627304/lava-overlay-5xqqq7gq/lava-13627304/bin/lava-test-reference
127 11:44:20.319744 Creating /var/lib/lava/dispatcher/tmp/13627304/lava-overlay-5xqqq7gq/lava-13627304/bin/lava-test-runner
128 11:44:20.319868 Creating /var/lib/lava/dispatcher/tmp/13627304/lava-overlay-5xqqq7gq/lava-13627304/bin/lava-test-set
129 11:44:20.319994 Creating /var/lib/lava/dispatcher/tmp/13627304/lava-overlay-5xqqq7gq/lava-13627304/bin/lava-test-shell
130 11:44:20.320122 Updating /var/lib/lava/dispatcher/tmp/13627304/lava-overlay-5xqqq7gq/lava-13627304/bin/lava-install-packages (oe)
131 11:44:20.320271 Updating /var/lib/lava/dispatcher/tmp/13627304/lava-overlay-5xqqq7gq/lava-13627304/bin/lava-installed-packages (oe)
132 11:44:20.320393 Creating /var/lib/lava/dispatcher/tmp/13627304/lava-overlay-5xqqq7gq/lava-13627304/environment
133 11:44:20.320495 LAVA metadata
134 11:44:20.320576 - LAVA_JOB_ID=13627304
135 11:44:20.320642 - LAVA_DISPATCHER_IP=192.168.201.1
136 11:44:20.320750 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
137 11:44:20.320819 skipped lava-vland-overlay
138 11:44:20.320898 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 11:44:20.321029 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
140 11:44:20.321095 skipped lava-multinode-overlay
141 11:44:20.321168 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 11:44:20.321252 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
143 11:44:20.321327 Loading test definitions
144 11:44:20.321419 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
145 11:44:20.321500 Using /lava-13627304 at stage 0
146 11:44:20.321824 uuid=13627304_1.4.2.3.1 testdef=None
147 11:44:20.321913 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 11:44:20.321999 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
149 11:44:20.322519 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 11:44:20.322734 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
152 11:44:20.323355 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 11:44:20.323580 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
155 11:44:20.324185 runner path: /var/lib/lava/dispatcher/tmp/13627304/lava-overlay-5xqqq7gq/lava-13627304/0/tests/0_dmesg test_uuid 13627304_1.4.2.3.1
156 11:44:20.324339 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 11:44:20.324552 Creating lava-test-runner.conf files
159 11:44:20.324616 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13627304/lava-overlay-5xqqq7gq/lava-13627304/0 for stage 0
160 11:44:20.324706 - 0_dmesg
161 11:44:20.324804 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
162 11:44:20.324887 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
163 11:44:20.331998 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
164 11:44:20.332149 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
165 11:44:20.332236 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
166 11:44:20.332323 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
167 11:44:20.332410 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
168 11:44:20.579964 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
169 11:44:20.580365 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
170 11:44:20.580483 extracting modules file /var/lib/lava/dispatcher/tmp/13627304/tftp-deploy-okz87xvc/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13627304/extract-overlay-ramdisk-928djkuf/ramdisk
171 11:44:20.595563 end: 1.4.4 extract-modules (duration 00:00:00) [common]
172 11:44:20.595712 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
173 11:44:20.595808 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13627304/compress-overlay-v256smru/overlay-1.4.2.4.tar.gz to ramdisk
174 11:44:20.595881 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13627304/compress-overlay-v256smru/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13627304/extract-overlay-ramdisk-928djkuf/ramdisk
175 11:44:20.602554 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
176 11:44:20.602712 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
177 11:44:20.602828 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
178 11:44:20.602916 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
179 11:44:20.603002 Building ramdisk /var/lib/lava/dispatcher/tmp/13627304/extract-overlay-ramdisk-928djkuf/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13627304/extract-overlay-ramdisk-928djkuf/ramdisk
180 11:44:20.741155 >> 51652 blocks
181 11:44:21.623993 rename /var/lib/lava/dispatcher/tmp/13627304/extract-overlay-ramdisk-928djkuf/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13627304/tftp-deploy-okz87xvc/ramdisk/ramdisk.cpio.gz
182 11:44:21.624445 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
183 11:44:21.624570 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
184 11:44:21.624669 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
185 11:44:21.624761 No mkimage arch provided, not using FIT.
186 11:44:21.624850 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
187 11:44:21.624935 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
188 11:44:21.625056 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
189 11:44:21.625147 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
190 11:44:21.625233 No LXC device requested
191 11:44:21.625317 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
192 11:44:21.625404 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
193 11:44:21.625487 end: 1.6 deploy-device-env (duration 00:00:00) [common]
194 11:44:21.625563 Checking files for TFTP limit of 4294967296 bytes.
195 11:44:21.625972 end: 1 tftp-deploy (duration 00:00:02) [common]
196 11:44:21.626077 start: 2 depthcharge-action (timeout 00:05:00) [common]
197 11:44:21.626166 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
198 11:44:21.626296 substitutions:
199 11:44:21.626362 - {DTB}: None
200 11:44:21.626424 - {INITRD}: 13627304/tftp-deploy-okz87xvc/ramdisk/ramdisk.cpio.gz
201 11:44:21.626483 - {KERNEL}: 13627304/tftp-deploy-okz87xvc/kernel/bzImage
202 11:44:21.626541 - {LAVA_MAC}: None
203 11:44:21.626597 - {PRESEED_CONFIG}: None
204 11:44:21.626653 - {PRESEED_LOCAL}: None
205 11:44:21.626708 - {RAMDISK}: 13627304/tftp-deploy-okz87xvc/ramdisk/ramdisk.cpio.gz
206 11:44:21.626763 - {ROOT_PART}: None
207 11:44:21.626817 - {ROOT}: None
208 11:44:21.626872 - {SERVER_IP}: 192.168.201.1
209 11:44:21.626925 - {TEE}: None
210 11:44:21.626979 Parsed boot commands:
211 11:44:21.627033 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
212 11:44:21.627211 Parsed boot commands: tftpboot 192.168.201.1 13627304/tftp-deploy-okz87xvc/kernel/bzImage 13627304/tftp-deploy-okz87xvc/kernel/cmdline 13627304/tftp-deploy-okz87xvc/ramdisk/ramdisk.cpio.gz
213 11:44:21.627298 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
214 11:44:21.627384 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
215 11:44:21.627479 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
216 11:44:21.627564 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
217 11:44:21.627638 Not connected, no need to disconnect.
218 11:44:21.627714 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
219 11:44:21.627799 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
220 11:44:21.627873 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-2'
221 11:44:21.631732 Setting prompt string to ['lava-test: # ']
222 11:44:21.632091 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
223 11:44:21.632199 end: 2.2.1 reset-connection (duration 00:00:00) [common]
224 11:44:21.632299 start: 2.2.2 reset-device (timeout 00:05:00) [common]
225 11:44:21.632633 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
226 11:44:21.632833 Calling: '/usr/local/bin/chromebook-reboot.sh' 'asus-C436FA-Flip-hatch-cbg-2'
227 11:44:30.437857 Returned 0 in 8 seconds
228 11:44:30.538491 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
230 11:44:30.538923 end: 2.2.2 reset-device (duration 00:00:09) [common]
231 11:44:30.539062 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
232 11:44:30.539180 Setting prompt string to 'Starting depthcharge on Helios...'
233 11:44:30.539276 Changing prompt to 'Starting depthcharge on Helios...'
234 11:44:30.539381 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
235 11:44:30.539760 [Enter `^Ec?' for help]
236 11:44:30.539917
237 11:44:30.540011
238 11:44:30.540097 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
239 11:44:30.540166 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
240 11:44:30.540227 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
241 11:44:30.540301 CPU: AES supported, TXT NOT supported, VT supported
242 11:44:30.540363 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
243 11:44:30.540420 PCH: device id 0284 (rev 00) is Cometlake-U Premium
244 11:44:30.540476 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
245 11:44:30.540531 VBOOT: Loading verstage.
246 11:44:30.540623 FMAP: Found "FLASH" version 1.1 at 0xc04000.
247 11:44:30.540710 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
248 11:44:30.540872 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
249 11:44:30.540982 CBFS @ c08000 size 3f8000
250 11:44:30.541072 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
251 11:44:30.541138 CBFS: Locating 'fallback/verstage'
252 11:44:30.541193 CBFS: Found @ offset 10fb80 size 1072c
253 11:44:30.541248
254 11:44:30.541301
255 11:44:30.541373 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
256 11:44:30.541430 Probing TPM: . done!
257 11:44:30.541484 TPM ready after 0 ms
258 11:44:30.541538 Connected to device vid:did:rid of 1ae0:0028:00
259 11:44:30.541605 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
260 11:44:30.541666 Initialized TPM device CR50 revision 0
261 11:44:30.541720 tlcl_send_startup: Startup return code is 0
262 11:44:30.541774 TPM: setup succeeded
263 11:44:30.541828 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
264 11:44:30.541899 Chrome EC: UHEPI supported
265 11:44:30.541953 Phase 1
266 11:44:30.542007 FMAP: area GBB found @ c05000 (12288 bytes)
267 11:44:30.542062 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
268 11:44:30.542126 VB2:vb2_check_recovery() Recovery was requested manually
269 11:44:30.542214 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
270 11:44:30.542298 Recovery requested (1009000e)
271 11:44:30.542391 tlcl_extend: response is 0
272 11:44:30.542477 tlcl_extend: response is 0
273 11:44:30.542600 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
274 11:44:30.542694 CBFS @ c08000 size 3f8000
275 11:44:30.542779 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
276 11:44:30.542863 CBFS: Locating 'fallback/romstage'
277 11:44:30.542955 CBFS: Found @ offset 80 size 145fc
278 11:44:30.543040 Accumulated console time in verstage 102 ms
279 11:44:30.543123
280 11:44:30.543213
281 11:44:30.543299 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
282 11:44:30.543384 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
283 11:44:30.543478 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
284 11:44:30.543563 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
285 11:44:30.543646 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
286 11:44:30.543739 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
287 11:44:30.543824 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
288 11:44:30.543907 TCO_STS: 0000 0000
289 11:44:30.543999 GEN_PMCON: e0015038 00000200
290 11:44:30.544084 GBLRST_CAUSE: 00000000 00000000
291 11:44:30.544167 prev_sleep_state 5
292 11:44:30.544258 Boot Count incremented to 187
293 11:44:30.544344 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
294 11:44:30.544428 CBFS @ c08000 size 3f8000
295 11:44:30.544514 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
296 11:44:30.544604 CBFS: Locating 'fspm.bin'
297 11:44:30.544687 CBFS: Found @ offset 5ffc0 size 71000
298 11:44:30.544770 Chrome EC: UHEPI supported
299 11:44:30.544863 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
300 11:44:30.544971 Probing TPM: done!
301 11:44:30.545078 Connected to device vid:did:rid of 1ae0:0028:00
302 11:44:30.545138 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
303 11:44:30.545194 Initialized TPM device CR50 revision 0
304 11:44:30.545248 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
305 11:44:30.545302 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
306 11:44:30.545368 MRC cache found, size 1948
307 11:44:30.545425 bootmode is set to: 2
308 11:44:30.545479 PRMRR disabled by config.
309 11:44:30.545532 SPD INDEX = 1
310 11:44:30.545585 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
311 11:44:30.545654 CBFS @ c08000 size 3f8000
312 11:44:30.545710 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
313 11:44:30.545765 CBFS: Locating 'spd.bin'
314 11:44:30.545818 CBFS: Found @ offset 5fb80 size 400
315 11:44:30.545894 SPD: module type is LPDDR3
316 11:44:30.546001 SPD: module part is
317 11:44:30.546055 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
318 11:44:30.546110 SPD: device width 4 bits, bus width 8 bits
319 11:44:30.546173 SPD: module size is 4096 MB (per channel)
320 11:44:30.546261 memory slot: 0 configuration done.
321 11:44:30.546345 memory slot: 2 configuration done.
322 11:44:30.546473 CBMEM:
323 11:44:30.546585 IMD: root @ 99fff000 254 entries.
324 11:44:30.546685 IMD: root @ 99ffec00 62 entries.
325 11:44:30.546775 External stage cache:
326 11:44:30.546859 IMD: root @ 9abff000 254 entries.
327 11:44:30.546950 IMD: root @ 9abfec00 62 entries.
328 11:44:30.547036 Chrome EC: clear events_b mask to 0x0000000020004000
329 11:44:30.547162 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
330 11:44:30.547254 tlcl_write: response is 0
331 11:44:30.547340 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
332 11:44:30.547425 MRC: TPM MRC hash updated successfully.
333 11:44:30.547516 2 DIMMs found
334 11:44:30.547601 SMM Memory Map
335 11:44:30.547690 SMRAM : 0x9a000000 0x1000000
336 11:44:30.547977 Subregion 0: 0x9a000000 0xa00000
337 11:44:30.548069 Subregion 1: 0x9aa00000 0x200000
338 11:44:30.548154 Subregion 2: 0x9ac00000 0x400000
339 11:44:30.548247 top_of_ram = 0x9a000000
340 11:44:30.548333 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
341 11:44:30.548418 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
342 11:44:30.548545 MTRR Range: Start=ff000000 End=0 (Size 1000000)
343 11:44:30.548631 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
344 11:44:30.548715 CBFS @ c08000 size 3f8000
345 11:44:30.548808 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
346 11:44:30.548892 CBFS: Locating 'fallback/postcar'
347 11:44:30.549021 CBFS: Found @ offset 107000 size 4b44
348 11:44:30.549079 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
349 11:44:30.549134 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
350 11:44:30.549189 Processing 180 relocs. Offset value of 0x97c0c000
351 11:44:30.549261 Accumulated console time in romstage 286 ms
352 11:44:30.549317
353 11:44:30.549371
354 11:44:30.549424 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
355 11:44:30.549494 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
356 11:44:30.549551 CBFS @ c08000 size 3f8000
357 11:44:30.549605 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
358 11:44:30.549658 CBFS: Locating 'fallback/ramstage'
359 11:44:30.549727 CBFS: Found @ offset 43380 size 1b9e8
360 11:44:30.549784 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
361 11:44:30.549838 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
362 11:44:30.549892 Processing 3976 relocs. Offset value of 0x98db0000
363 11:44:30.549961 Accumulated console time in postcar 52 ms
364 11:44:30.550046
365 11:44:30.550128
366 11:44:30.550222 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
367 11:44:30.550308 FMAP: area RO_VPD found @ c00000 (16384 bytes)
368 11:44:30.550393 WARNING: RO_VPD is uninitialized or empty.
369 11:44:30.550485 FMAP: area RW_VPD found @ af8000 (8192 bytes)
370 11:44:30.550570 FMAP: area RW_VPD found @ af8000 (8192 bytes)
371 11:44:30.550655 Normal boot.
372 11:44:30.550751 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
373 11:44:30.550835 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
374 11:44:30.550928 CBFS @ c08000 size 3f8000
375 11:44:30.551014 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
376 11:44:30.551130 CBFS: Locating 'cpu_microcode_blob.bin'
377 11:44:30.551222 CBFS: Found @ offset 14700 size 2ec00
378 11:44:30.551307 microcode: sig=0x806ec pf=0x4 revision=0xc9
379 11:44:30.551393 Skip microcode update
380 11:44:30.551483 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
381 11:44:30.551567 CBFS @ c08000 size 3f8000
382 11:44:30.551659 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
383 11:44:30.551744 CBFS: Locating 'fsps.bin'
384 11:44:30.551828 CBFS: Found @ offset d1fc0 size 35000
385 11:44:30.551919 Detected 4 core, 8 thread CPU.
386 11:44:30.552003 Setting up SMI for CPU
387 11:44:30.552087 IED base = 0x9ac00000
388 11:44:30.552178 IED size = 0x00400000
389 11:44:30.552293 Will perform SMM setup.
390 11:44:30.552385 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
391 11:44:30.552471 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
392 11:44:30.552556 Processing 16 relocs. Offset value of 0x00030000
393 11:44:30.552648 Attempting to start 7 APs
394 11:44:30.552733 Waiting for 10ms after sending INIT.
395 11:44:30.552819 Waiting for 1st SIPI to complete...done.
396 11:44:30.552908 AP: slot 1 apic_id 1.
397 11:44:30.553070 Waiting for 2nd SIPI to complete...done.
398 11:44:30.553131 AP: slot 2 apic_id 6.
399 11:44:30.553185 AP: slot 3 apic_id 7.
400 11:44:30.553239 AP: slot 4 apic_id 3.
401 11:44:30.553302 AP: slot 5 apic_id 2.
402 11:44:30.553361 AP: slot 6 apic_id 4.
403 11:44:30.553415 AP: slot 7 apic_id 5.
404 11:44:30.553468 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
405 11:44:30.553533 Processing 13 relocs. Offset value of 0x00038000
406 11:44:30.553591 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
407 11:44:30.553645 Installing SMM handler to 0x9a000000
408 11:44:30.553699 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
409 11:44:30.553758 Processing 658 relocs. Offset value of 0x9a010000
410 11:44:30.553822 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
411 11:44:30.553877 Processing 13 relocs. Offset value of 0x9a008000
412 11:44:30.553931 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
413 11:44:30.553985 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
414 11:44:30.554078 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
415 11:44:30.554162 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
416 11:44:30.554251 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
417 11:44:30.554340 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
418 11:44:30.554424 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
419 11:44:30.554517 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
420 11:44:30.554619 Clearing SMI status registers
421 11:44:30.554718 SMI_STS: PM1
422 11:44:30.554811 PM1_STS: PWRBTN
423 11:44:30.554894 TCO_STS: SECOND_TO
424 11:44:30.554981 New SMBASE 0x9a000000
425 11:44:30.555071 In relocation handler: CPU 0
426 11:44:30.555154 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
427 11:44:30.555247 Writing SMRR. base = 0x9a000006, mask=0xff000800
428 11:44:30.555333 Relocation complete.
429 11:44:30.555416 New SMBASE 0x99fffc00
430 11:44:30.555509 In relocation handler: CPU 1
431 11:44:30.555783 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
432 11:44:30.555876 Writing SMRR. base = 0x9a000006, mask=0xff000800
433 11:44:30.555969 Relocation complete.
434 11:44:30.556054 New SMBASE 0x99fff000
435 11:44:30.556139 In relocation handler: CPU 4
436 11:44:30.556232 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
437 11:44:30.556318 Writing SMRR. base = 0x9a000006, mask=0xff000800
438 11:44:30.556402 Relocation complete.
439 11:44:30.556494 New SMBASE 0x99ffe800
440 11:44:30.556579 In relocation handler: CPU 6
441 11:44:30.556669 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
442 11:44:30.556757 Writing SMRR. base = 0x9a000006, mask=0xff000800
443 11:44:30.556840 Relocation complete.
444 11:44:30.556958 New SMBASE 0x99ffe400
445 11:44:30.557033 In relocation handler: CPU 7
446 11:44:30.557088 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
447 11:44:30.557142 Writing SMRR. base = 0x9a000006, mask=0xff000800
448 11:44:30.557214 Relocation complete.
449 11:44:30.557292 New SMBASE 0x99fff800
450 11:44:30.557363 In relocation handler: CPU 2
451 11:44:30.557435 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
452 11:44:30.557491 Writing SMRR. base = 0x9a000006, mask=0xff000800
453 11:44:30.557546 Relocation complete.
454 11:44:30.557599 New SMBASE 0x99fff400
455 11:44:30.557670 In relocation handler: CPU 3
456 11:44:30.557726 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
457 11:44:30.557781 Writing SMRR. base = 0x9a000006, mask=0xff000800
458 11:44:30.557836 Relocation complete.
459 11:44:30.557914 New SMBASE 0x99ffec00
460 11:44:30.557999 In relocation handler: CPU 5
461 11:44:30.558083 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
462 11:44:30.558176 Writing SMRR. base = 0x9a000006, mask=0xff000800
463 11:44:30.558261 Relocation complete.
464 11:44:30.558344 Initializing CPU #0
465 11:44:30.558436 CPU: vendor Intel device 806ec
466 11:44:30.558520 CPU: family 06, model 8e, stepping 0c
467 11:44:30.558611 Clearing out pending MCEs
468 11:44:30.558697 Setting up local APIC...
469 11:44:30.558780 apic_id: 0x00 done.
470 11:44:30.558872 Turbo is available but hidden
471 11:44:30.558958 Turbo is available and visible
472 11:44:30.559041 VMX status: enabled
473 11:44:30.559134 IA32_FEATURE_CONTROL status: locked
474 11:44:30.559217 Skip microcode update
475 11:44:30.559300 CPU #0 initialized
476 11:44:30.559391 Initializing CPU #1
477 11:44:30.559475 Initializing CPU #4
478 11:44:30.559558 Initializing CPU #5
479 11:44:30.559650 CPU: vendor Intel device 806ec
480 11:44:30.559734 CPU: family 06, model 8e, stepping 0c
481 11:44:30.559825 CPU: vendor Intel device 806ec
482 11:44:30.559910 CPU: family 06, model 8e, stepping 0c
483 11:44:30.559993 Clearing out pending MCEs
484 11:44:30.560084 Clearing out pending MCEs
485 11:44:30.560170 Setting up local APIC...
486 11:44:30.560253 Initializing CPU #6
487 11:44:30.560345 Initializing CPU #7
488 11:44:30.560429 CPU: vendor Intel device 806ec
489 11:44:30.560512 CPU: family 06, model 8e, stepping 0c
490 11:44:30.560605 CPU: vendor Intel device 806ec
491 11:44:30.560688 CPU: family 06, model 8e, stepping 0c
492 11:44:30.560778 Clearing out pending MCEs
493 11:44:30.560865 Clearing out pending MCEs
494 11:44:30.560974 Setting up local APIC...
495 11:44:30.561068 Setting up local APIC...
496 11:44:30.561123 CPU: vendor Intel device 806ec
497 11:44:30.561177 CPU: family 06, model 8e, stepping 0c
498 11:44:30.561231 Clearing out pending MCEs
499 11:44:30.561301 apic_id: 0x04 done.
500 11:44:30.561355 Initializing CPU #2
501 11:44:30.561408 Setting up local APIC...
502 11:44:30.561462 Initializing CPU #3
503 11:44:30.561534 CPU: vendor Intel device 806ec
504 11:44:30.561619 CPU: family 06, model 8e, stepping 0c
505 11:44:30.561702 CPU: vendor Intel device 806ec
506 11:44:30.561795 CPU: family 06, model 8e, stepping 0c
507 11:44:30.561879 Clearing out pending MCEs
508 11:44:30.561962 Clearing out pending MCEs
509 11:44:30.562054 Setting up local APIC...
510 11:44:30.562138 Setting up local APIC...
511 11:44:30.562222 apic_id: 0x01 done.
512 11:44:30.562313 apic_id: 0x03 done.
513 11:44:30.562396 apic_id: 0x02 done.
514 11:44:30.562487 VMX status: enabled
515 11:44:30.562572 VMX status: enabled
516 11:44:30.562655 IA32_FEATURE_CONTROL status: locked
517 11:44:30.562747 IA32_FEATURE_CONTROL status: locked
518 11:44:30.562832 Skip microcode update
519 11:44:30.562915 apic_id: 0x05 done.
520 11:44:30.563007 VMX status: enabled
521 11:44:30.563091 VMX status: enabled
522 11:44:30.563215 IA32_FEATURE_CONTROL status: locked
523 11:44:30.563300 IA32_FEATURE_CONTROL status: locked
524 11:44:30.563383 Skip microcode update
525 11:44:30.563475 Skip microcode update
526 11:44:30.563559 CPU #6 initialized
527 11:44:30.563642 CPU #7 initialized
528 11:44:30.563734 Skip microcode update
529 11:44:30.563817 CPU #4 initialized
530 11:44:30.563903 CPU #5 initialized
531 11:44:30.563992 VMX status: enabled
532 11:44:30.564075 Setting up local APIC...
533 11:44:30.564168 IA32_FEATURE_CONTROL status: locked
534 11:44:30.564258 apic_id: 0x06 done.
535 11:44:30.564341 apic_id: 0x07 done.
536 11:44:30.564433 VMX status: enabled
537 11:44:30.564539 VMX status: enabled
538 11:44:30.564651 IA32_FEATURE_CONTROL status: locked
539 11:44:30.564735 IA32_FEATURE_CONTROL status: locked
540 11:44:30.564845 Skip microcode update
541 11:44:30.564933 Skip microcode update
542 11:44:30.565018 CPU #2 initialized
543 11:44:30.565085 CPU #3 initialized
544 11:44:30.565142 Skip microcode update
545 11:44:30.565227 CPU #1 initialized
546 11:44:30.565281 bsp_do_flight_plan done after 466 msecs.
547 11:44:30.565350 CPU: frequency set to 4200 MHz
548 11:44:30.565406 Enabling SMIs.
549 11:44:30.565460 Locking SMM.
550 11:44:30.565518 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
551 11:44:30.565582 CBFS @ c08000 size 3f8000
552 11:44:30.565637 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
553 11:44:30.565692 CBFS: Locating 'vbt.bin'
554 11:44:30.565745 CBFS: Found @ offset 5f5c0 size 499
555 11:44:30.565814 Found a VBT of 4608 bytes after decompression
556 11:44:30.565869 Display FSP Version Info HOB
557 11:44:30.565922 Reference Code - CPU = 9.0.1e.30
558 11:44:30.565976 uCode Version = 0.0.0.ca
559 11:44:30.566046 TXT ACM version = ff.ff.ff.ffff
560 11:44:30.566102 Display FSP Version Info HOB
561 11:44:30.566156 Reference Code - ME = 9.0.1e.30
562 11:44:30.566210 MEBx version = 0.0.0.0
563 11:44:30.566281 ME Firmware Version = Consumer SKU
564 11:44:30.566337 Display FSP Version Info HOB
565 11:44:30.566390 Reference Code - CML PCH = 9.0.1e.30
566 11:44:30.566444 PCH-CRID Status = Disabled
567 11:44:30.566509 PCH-CRID Original Value = ff.ff.ff.ffff
568 11:44:30.566566 PCH-CRID New Value = ff.ff.ff.ffff
569 11:44:30.566822 OPROM - RST - RAID = ff.ff.ff.ffff
570 11:44:30.566885 ChipsetInit Base Version = ff.ff.ff.ffff
571 11:44:30.566941 ChipsetInit Oem Version = ff.ff.ff.ffff
572 11:44:30.567019 Display FSP Version Info HOB
573 11:44:30.567105 Reference Code - SA - System Agent = 9.0.1e.30
574 11:44:30.567189 Reference Code - MRC = 0.7.1.6c
575 11:44:30.567281 SA - PCIe Version = 9.0.1e.30
576 11:44:30.567365 SA-CRID Status = Disabled
577 11:44:30.567450 SA-CRID Original Value = 0.0.0.c
578 11:44:30.567542 SA-CRID New Value = 0.0.0.c
579 11:44:30.567626 OPROM - VBIOS = ff.ff.ff.ffff
580 11:44:30.567718 RTC Init
581 11:44:30.567803 Set power on after power failure.
582 11:44:30.567887 Disabling Deep S3
583 11:44:30.567978 Disabling Deep S3
584 11:44:30.568062 Disabling Deep S4
585 11:44:30.568145 Disabling Deep S4
586 11:44:30.568236 Disabling Deep S5
587 11:44:30.568319 Disabling Deep S5
588 11:44:30.568411 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 191 exit 1
589 11:44:30.568497 Enumerating buses...
590 11:44:30.568580 Show all devs... Before device enumeration.
591 11:44:30.568671 Root Device: enabled 1
592 11:44:30.568756 CPU_CLUSTER: 0: enabled 1
593 11:44:30.568839 DOMAIN: 0000: enabled 1
594 11:44:30.568931 APIC: 00: enabled 1
595 11:44:30.569056 PCI: 00:00.0: enabled 1
596 11:44:30.569148 PCI: 00:02.0: enabled 1
597 11:44:30.569233 PCI: 00:04.0: enabled 0
598 11:44:30.569316 PCI: 00:05.0: enabled 0
599 11:44:30.569408 PCI: 00:12.0: enabled 1
600 11:44:30.569492 PCI: 00:12.5: enabled 0
601 11:44:30.569575 PCI: 00:12.6: enabled 0
602 11:44:30.569666 PCI: 00:14.0: enabled 1
603 11:44:30.569749 PCI: 00:14.1: enabled 0
604 11:44:30.569832 PCI: 00:14.3: enabled 1
605 11:44:30.569924 PCI: 00:14.5: enabled 0
606 11:44:30.570007 PCI: 00:15.0: enabled 1
607 11:44:30.570098 PCI: 00:15.1: enabled 1
608 11:44:30.570183 PCI: 00:15.2: enabled 0
609 11:44:30.570266 PCI: 00:15.3: enabled 0
610 11:44:30.570357 PCI: 00:16.0: enabled 1
611 11:44:30.570441 PCI: 00:16.1: enabled 0
612 11:44:30.570524 PCI: 00:16.2: enabled 0
613 11:44:30.570616 PCI: 00:16.3: enabled 0
614 11:44:30.570700 PCI: 00:16.4: enabled 0
615 11:44:30.570782 PCI: 00:16.5: enabled 0
616 11:44:30.570874 PCI: 00:17.0: enabled 1
617 11:44:30.571000 PCI: 00:19.0: enabled 1
618 11:44:30.571091 PCI: 00:19.1: enabled 0
619 11:44:30.571175 PCI: 00:19.2: enabled 0
620 11:44:30.571258 PCI: 00:1a.0: enabled 0
621 11:44:30.571350 PCI: 00:1c.0: enabled 0
622 11:44:30.571433 PCI: 00:1c.1: enabled 0
623 11:44:30.571564 PCI: 00:1c.2: enabled 0
624 11:44:30.571648 PCI: 00:1c.3: enabled 0
625 11:44:30.571731 PCI: 00:1c.4: enabled 0
626 11:44:30.571822 PCI: 00:1c.5: enabled 0
627 11:44:30.571905 PCI: 00:1c.6: enabled 0
628 11:44:30.571989 PCI: 00:1c.7: enabled 0
629 11:44:30.572080 PCI: 00:1d.0: enabled 1
630 11:44:30.572163 PCI: 00:1d.1: enabled 0
631 11:44:30.572254 PCI: 00:1d.2: enabled 0
632 11:44:30.572339 PCI: 00:1d.3: enabled 0
633 11:44:30.572422 PCI: 00:1d.4: enabled 0
634 11:44:30.572513 PCI: 00:1d.5: enabled 1
635 11:44:30.572596 PCI: 00:1e.0: enabled 1
636 11:44:30.572679 PCI: 00:1e.1: enabled 0
637 11:44:30.572771 PCI: 00:1e.2: enabled 1
638 11:44:30.572855 PCI: 00:1e.3: enabled 1
639 11:44:30.572937 PCI: 00:1f.0: enabled 1
640 11:44:30.573035 PCI: 00:1f.1: enabled 1
641 11:44:30.573119 PCI: 00:1f.2: enabled 1
642 11:44:30.573208 PCI: 00:1f.3: enabled 1
643 11:44:30.573267 PCI: 00:1f.4: enabled 1
644 11:44:30.573320 PCI: 00:1f.5: enabled 1
645 11:44:30.573374 PCI: 00:1f.6: enabled 0
646 11:44:30.573427 USB0 port 0: enabled 1
647 11:44:30.573496 I2C: 00:15: enabled 1
648 11:44:30.573551 I2C: 00:5d: enabled 1
649 11:44:30.573605 GENERIC: 0.0: enabled 1
650 11:44:30.573658 I2C: 00:1a: enabled 1
651 11:44:30.573823 I2C: 00:38: enabled 1
652 11:44:30.573906 I2C: 00:39: enabled 1
653 11:44:30.573998 I2C: 00:3a: enabled 1
654 11:44:30.574085 I2C: 00:3b: enabled 1
655 11:44:30.574169 PCI: 00:00.0: enabled 1
656 11:44:30.574243 SPI: 00: enabled 1
657 11:44:30.574298 SPI: 01: enabled 1
658 11:44:30.574352 PNP: 0c09.0: enabled 1
659 11:44:30.574406 USB2 port 0: enabled 1
660 11:44:30.574476 USB2 port 1: enabled 1
661 11:44:30.574531 USB2 port 2: enabled 0
662 11:44:30.574585 USB2 port 3: enabled 0
663 11:44:30.574638 USB2 port 5: enabled 0
664 11:44:30.574712 USB2 port 6: enabled 1
665 11:44:30.574796 USB2 port 9: enabled 1
666 11:44:30.574879 USB3 port 0: enabled 1
667 11:44:30.574970 USB3 port 1: enabled 1
668 11:44:30.575054 USB3 port 2: enabled 1
669 11:44:30.575136 USB3 port 3: enabled 1
670 11:44:30.575208 USB3 port 4: enabled 0
671 11:44:30.575264 APIC: 01: enabled 1
672 11:44:30.575317 APIC: 06: enabled 1
673 11:44:30.575371 APIC: 07: enabled 1
674 11:44:30.575441 APIC: 03: enabled 1
675 11:44:30.575497 APIC: 02: enabled 1
676 11:44:30.575550 APIC: 04: enabled 1
677 11:44:30.575604 APIC: 05: enabled 1
678 11:44:30.575673 Compare with tree...
679 11:44:30.575728 Root Device: enabled 1
680 11:44:30.575782 CPU_CLUSTER: 0: enabled 1
681 11:44:30.575836 APIC: 00: enabled 1
682 11:44:30.575900 APIC: 01: enabled 1
683 11:44:30.575957 APIC: 06: enabled 1
684 11:44:30.576010 APIC: 07: enabled 1
685 11:44:30.576063 APIC: 03: enabled 1
686 11:44:30.576120 APIC: 02: enabled 1
687 11:44:30.576184 APIC: 04: enabled 1
688 11:44:30.576238 APIC: 05: enabled 1
689 11:44:30.576292 DOMAIN: 0000: enabled 1
690 11:44:30.576344 PCI: 00:00.0: enabled 1
691 11:44:30.576416 PCI: 00:02.0: enabled 1
692 11:44:30.576470 PCI: 00:04.0: enabled 0
693 11:44:30.576523 PCI: 00:05.0: enabled 0
694 11:44:30.576576 PCI: 00:12.0: enabled 1
695 11:44:30.576647 PCI: 00:12.5: enabled 0
696 11:44:30.576701 PCI: 00:12.6: enabled 0
697 11:44:30.576755 PCI: 00:14.0: enabled 1
698 11:44:30.576808 USB0 port 0: enabled 1
699 11:44:30.576877 USB2 port 0: enabled 1
700 11:44:30.576969 USB2 port 1: enabled 1
701 11:44:30.577053 USB2 port 2: enabled 0
702 11:44:30.577136 USB2 port 3: enabled 0
703 11:44:30.577192 USB2 port 5: enabled 0
704 11:44:30.577246 USB2 port 6: enabled 1
705 11:44:30.577300 USB2 port 9: enabled 1
706 11:44:30.577368 USB3 port 0: enabled 1
707 11:44:30.577425 USB3 port 1: enabled 1
708 11:44:30.577479 USB3 port 2: enabled 1
709 11:44:30.577532 USB3 port 3: enabled 1
710 11:44:30.577597 USB3 port 4: enabled 0
711 11:44:30.577654 PCI: 00:14.1: enabled 0
712 11:44:30.577708 PCI: 00:14.3: enabled 1
713 11:44:30.577762 PCI: 00:14.5: enabled 0
714 11:44:30.577816 PCI: 00:15.0: enabled 1
715 11:44:30.577882 I2C: 00:15: enabled 1
716 11:44:30.577937 PCI: 00:15.1: enabled 1
717 11:44:30.577991 I2C: 00:5d: enabled 1
718 11:44:30.578045 GENERIC: 0.0: enabled 1
719 11:44:30.578115 PCI: 00:15.2: enabled 0
720 11:44:30.578170 PCI: 00:15.3: enabled 0
721 11:44:30.578224 PCI: 00:16.0: enabled 1
722 11:44:30.578278 PCI: 00:16.1: enabled 0
723 11:44:30.578346 PCI: 00:16.2: enabled 0
724 11:44:30.578401 PCI: 00:16.3: enabled 0
725 11:44:30.578455 PCI: 00:16.4: enabled 0
726 11:44:30.578512 PCI: 00:16.5: enabled 0
727 11:44:30.578576 PCI: 00:17.0: enabled 1
728 11:44:30.578827 PCI: 00:19.0: enabled 1
729 11:44:30.578917 I2C: 00:1a: enabled 1
730 11:44:30.579009 I2C: 00:38: enabled 1
731 11:44:30.579095 I2C: 00:39: enabled 1
732 11:44:30.579179 I2C: 00:3a: enabled 1
733 11:44:30.579270 I2C: 00:3b: enabled 1
734 11:44:30.579355 PCI: 00:19.1: enabled 0
735 11:44:30.579441 PCI: 00:19.2: enabled 0
736 11:44:30.579557 PCI: 00:1a.0: enabled 0
737 11:44:30.579656 PCI: 00:1c.0: enabled 0
738 11:44:30.579748 PCI: 00:1c.1: enabled 0
739 11:44:30.579832 PCI: 00:1c.2: enabled 0
740 11:44:30.579917 PCI: 00:1c.3: enabled 0
741 11:44:30.580007 PCI: 00:1c.4: enabled 0
742 11:44:30.580091 PCI: 00:1c.5: enabled 0
743 11:44:30.580181 PCI: 00:1c.6: enabled 0
744 11:44:30.580265 PCI: 00:1c.7: enabled 0
745 11:44:30.580348 PCI: 00:1d.0: enabled 1
746 11:44:30.580440 PCI: 00:1d.1: enabled 0
747 11:44:30.580524 PCI: 00:1d.2: enabled 0
748 11:44:30.580607 PCI: 00:1d.3: enabled 0
749 11:44:30.580699 PCI: 00:1d.4: enabled 0
750 11:44:30.580783 PCI: 00:1d.5: enabled 1
751 11:44:30.580866 PCI: 00:00.0: enabled 1
752 11:44:30.580985 PCI: 00:1e.0: enabled 1
753 11:44:30.581087 PCI: 00:1e.1: enabled 0
754 11:44:30.581157 PCI: 00:1e.2: enabled 1
755 11:44:30.581213 SPI: 00: enabled 1
756 11:44:30.581267 PCI: 00:1e.3: enabled 1
757 11:44:30.581321 SPI: 01: enabled 1
758 11:44:30.581387 PCI: 00:1f.0: enabled 1
759 11:44:30.581443 PNP: 0c09.0: enabled 1
760 11:44:30.581497 PCI: 00:1f.1: enabled 1
761 11:44:30.581551 PCI: 00:1f.2: enabled 1
762 11:44:30.581613 PCI: 00:1f.3: enabled 1
763 11:44:30.581672 PCI: 00:1f.4: enabled 1
764 11:44:30.581726 PCI: 00:1f.5: enabled 1
765 11:44:30.581779 PCI: 00:1f.6: enabled 0
766 11:44:30.581832 Root Device scanning...
767 11:44:30.581902 scan_static_bus for Root Device
768 11:44:30.581957 CPU_CLUSTER: 0 enabled
769 11:44:30.582011 DOMAIN: 0000 enabled
770 11:44:30.582065 DOMAIN: 0000 scanning...
771 11:44:30.582135 PCI: pci_scan_bus for bus 00
772 11:44:30.582191 PCI: 00:00.0 [8086/0000] ops
773 11:44:30.582245 PCI: 00:00.0 [8086/9b61] enabled
774 11:44:30.582299 PCI: 00:02.0 [8086/0000] bus ops
775 11:44:30.582376 PCI: 00:02.0 [8086/9b41] enabled
776 11:44:30.582461 PCI: 00:04.0 [8086/1903] disabled
777 11:44:30.582545 PCI: 00:08.0 [8086/1911] enabled
778 11:44:30.582638 PCI: 00:12.0 [8086/02f9] enabled
779 11:44:30.582722 PCI: 00:14.0 [8086/0000] bus ops
780 11:44:30.582847 PCI: 00:14.0 [8086/02ed] enabled
781 11:44:30.582932 PCI: 00:14.2 [8086/02ef] enabled
782 11:44:30.583015 PCI: 00:14.3 [8086/02f0] enabled
783 11:44:30.583108 PCI: 00:15.0 [8086/0000] bus ops
784 11:44:30.583191 PCI: 00:15.0 [8086/02e8] enabled
785 11:44:30.583280 PCI: 00:15.1 [8086/0000] bus ops
786 11:44:30.583367 PCI: 00:15.1 [8086/02e9] enabled
787 11:44:30.583450 PCI: 00:16.0 [8086/0000] ops
788 11:44:30.583542 PCI: 00:16.0 [8086/02e0] enabled
789 11:44:30.583627 PCI: 00:17.0 [8086/0000] ops
790 11:44:30.583710 PCI: 00:17.0 [8086/02d3] enabled
791 11:44:30.583802 PCI: 00:19.0 [8086/0000] bus ops
792 11:44:30.583886 PCI: 00:19.0 [8086/02c5] enabled
793 11:44:30.583970 PCI: 00:1d.0 [8086/0000] bus ops
794 11:44:30.584061 PCI: 00:1d.0 [8086/02b0] enabled
795 11:44:30.584146 PCI: Static device PCI: 00:1d.5 not found, disabling it.
796 11:44:30.584229 PCI: 00:1e.0 [8086/0000] ops
797 11:44:30.584321 PCI: 00:1e.0 [8086/02a8] enabled
798 11:44:30.584405 PCI: 00:1e.2 [8086/0000] bus ops
799 11:44:30.584495 PCI: 00:1e.2 [8086/02aa] enabled
800 11:44:30.584581 PCI: 00:1e.3 [8086/0000] bus ops
801 11:44:30.584665 PCI: 00:1e.3 [8086/02ab] enabled
802 11:44:30.584757 PCI: 00:1f.0 [8086/0000] bus ops
803 11:44:30.584841 PCI: 00:1f.0 [8086/0284] enabled
804 11:44:30.584925 PCI: Static device PCI: 00:1f.1 not found, disabling it.
805 11:44:30.585058 PCI: Static device PCI: 00:1f.2 not found, disabling it.
806 11:44:30.585184 PCI: 00:1f.3 [8086/0000] bus ops
807 11:44:30.585279 PCI: 00:1f.3 [8086/02c8] enabled
808 11:44:30.585379 PCI: 00:1f.4 [8086/0000] bus ops
809 11:44:30.585441 PCI: 00:1f.4 [8086/02a3] enabled
810 11:44:30.585513 PCI: 00:1f.5 [8086/0000] bus ops
811 11:44:30.585569 PCI: 00:1f.5 [8086/02a4] enabled
812 11:44:30.585624 PCI: Leftover static devices:
813 11:44:30.585678 PCI: 00:05.0
814 11:44:30.585749 PCI: 00:12.5
815 11:44:30.585805 PCI: 00:12.6
816 11:44:30.585858 PCI: 00:14.1
817 11:44:30.585912 PCI: 00:14.5
818 11:44:30.585981 PCI: 00:15.2
819 11:44:30.586037 PCI: 00:15.3
820 11:44:30.586090 PCI: 00:16.1
821 11:44:30.586143 PCI: 00:16.2
822 11:44:30.586207 PCI: 00:16.3
823 11:44:30.586264 PCI: 00:16.4
824 11:44:30.586317 PCI: 00:16.5
825 11:44:30.586370 PCI: 00:19.1
826 11:44:30.586425 PCI: 00:19.2
827 11:44:30.586516 PCI: 00:1a.0
828 11:44:30.586599 PCI: 00:1c.0
829 11:44:30.586689 PCI: 00:1c.1
830 11:44:30.586774 PCI: 00:1c.2
831 11:44:30.586858 PCI: 00:1c.3
832 11:44:30.586962 PCI: 00:1c.4
833 11:44:30.587050 PCI: 00:1c.5
834 11:44:30.587133 PCI: 00:1c.6
835 11:44:30.587236 PCI: 00:1c.7
836 11:44:30.587335 PCI: 00:1d.1
837 11:44:30.587418 PCI: 00:1d.2
838 11:44:30.587501 PCI: 00:1d.3
839 11:44:30.587584 PCI: 00:1d.4
840 11:44:30.587705 PCI: 00:1d.5
841 11:44:30.587826 PCI: 00:1e.1
842 11:44:30.587909 PCI: 00:1f.1
843 11:44:30.587992 PCI: 00:1f.2
844 11:44:30.588074 PCI: 00:1f.6
845 11:44:30.588157 PCI: Check your devicetree.cb.
846 11:44:30.588241 PCI: 00:02.0 scanning...
847 11:44:30.588324 scan_generic_bus for PCI: 00:02.0
848 11:44:30.588407 scan_generic_bus for PCI: 00:02.0 done
849 11:44:30.588491 scan_bus: scanning of bus PCI: 00:02.0 took 10190 usecs
850 11:44:30.588575 PCI: 00:14.0 scanning...
851 11:44:30.588658 scan_static_bus for PCI: 00:14.0
852 11:44:30.588741 USB0 port 0 enabled
853 11:44:30.588824 USB0 port 0 scanning...
854 11:44:30.588907 scan_static_bus for USB0 port 0
855 11:44:30.589019 USB2 port 0 enabled
856 11:44:30.589075 USB2 port 1 enabled
857 11:44:30.589129 USB2 port 2 disabled
858 11:44:30.589184 USB2 port 3 disabled
859 11:44:30.589237 USB2 port 5 disabled
860 11:44:30.589291 USB2 port 6 enabled
861 11:44:30.589345 USB2 port 9 enabled
862 11:44:30.589398 USB3 port 0 enabled
863 11:44:30.589452 USB3 port 1 enabled
864 11:44:30.589505 USB3 port 2 enabled
865 11:44:30.589558 USB3 port 3 enabled
866 11:44:30.589611 USB3 port 4 disabled
867 11:44:30.589663 USB2 port 0 scanning...
868 11:44:30.589717 scan_static_bus for USB2 port 0
869 11:44:30.589771 scan_static_bus for USB2 port 0 done
870 11:44:30.589824 scan_bus: scanning of bus USB2 port 0 took 9700 usecs
871 11:44:30.589877 USB2 port 1 scanning...
872 11:44:30.589930 scan_static_bus for USB2 port 1
873 11:44:30.589983 scan_static_bus for USB2 port 1 done
874 11:44:30.590036 scan_bus: scanning of bus USB2 port 1 took 9699 usecs
875 11:44:30.590089 USB2 port 6 scanning...
876 11:44:30.590143 scan_static_bus for USB2 port 6
877 11:44:30.590196 scan_static_bus for USB2 port 6 done
878 11:44:30.590444 scan_bus: scanning of bus USB2 port 6 took 9703 usecs
879 11:44:30.590505 USB2 port 9 scanning...
880 11:44:30.590560 scan_static_bus for USB2 port 9
881 11:44:30.590614 scan_static_bus for USB2 port 9 done
882 11:44:30.590667 scan_bus: scanning of bus USB2 port 9 took 9695 usecs
883 11:44:30.590747 USB3 port 0 scanning...
884 11:44:30.590816 scan_static_bus for USB3 port 0
885 11:44:30.590869 scan_static_bus for USB3 port 0 done
886 11:44:30.590922 scan_bus: scanning of bus USB3 port 0 took 9700 usecs
887 11:44:30.590976 USB3 port 1 scanning...
888 11:44:30.591030 scan_static_bus for USB3 port 1
889 11:44:30.591082 scan_static_bus for USB3 port 1 done
890 11:44:30.591135 scan_bus: scanning of bus USB3 port 1 took 9686 usecs
891 11:44:30.591189 USB3 port 2 scanning...
892 11:44:30.591242 scan_static_bus for USB3 port 2
893 11:44:30.591295 scan_static_bus for USB3 port 2 done
894 11:44:30.591348 scan_bus: scanning of bus USB3 port 2 took 9694 usecs
895 11:44:30.591401 USB3 port 3 scanning...
896 11:44:30.591454 scan_static_bus for USB3 port 3
897 11:44:30.591507 scan_static_bus for USB3 port 3 done
898 11:44:30.591561 scan_bus: scanning of bus USB3 port 3 took 9692 usecs
899 11:44:30.591614 scan_static_bus for USB0 port 0 done
900 11:44:30.591667 scan_bus: scanning of bus USB0 port 0 took 155275 usecs
901 11:44:30.591720 scan_static_bus for PCI: 00:14.0 done
902 11:44:30.591774 scan_bus: scanning of bus PCI: 00:14.0 took 172897 usecs
903 11:44:30.591836 PCI: 00:15.0 scanning...
904 11:44:30.591921 scan_generic_bus for PCI: 00:15.0
905 11:44:30.592005 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
906 11:44:30.592088 scan_generic_bus for PCI: 00:15.0 done
907 11:44:30.592175 scan_bus: scanning of bus PCI: 00:15.0 took 14291 usecs
908 11:44:30.592258 PCI: 00:15.1 scanning...
909 11:44:30.592341 scan_generic_bus for PCI: 00:15.1
910 11:44:30.592424 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
911 11:44:30.592508 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
912 11:44:30.592591 scan_generic_bus for PCI: 00:15.1 done
913 11:44:30.592675 scan_bus: scanning of bus PCI: 00:15.1 took 18595 usecs
914 11:44:30.592758 PCI: 00:19.0 scanning...
915 11:44:30.592870 scan_generic_bus for PCI: 00:19.0
916 11:44:30.592962 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
917 11:44:30.593035 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
918 11:44:30.593090 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
919 11:44:30.593144 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
920 11:44:30.593197 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
921 11:44:30.593251 scan_generic_bus for PCI: 00:19.0 done
922 11:44:30.593305 scan_bus: scanning of bus PCI: 00:19.0 took 30719 usecs
923 11:44:30.593359 PCI: 00:1d.0 scanning...
924 11:44:30.593412 do_pci_scan_bridge for PCI: 00:1d.0
925 11:44:30.593466 PCI: pci_scan_bus for bus 01
926 11:44:30.593519 PCI: 01:00.0 [1c5c/1327] enabled
927 11:44:30.593590 Enabling Common Clock Configuration
928 11:44:30.593661 L1 Sub-State supported from root port 29
929 11:44:30.593714 L1 Sub-State Support = 0xf
930 11:44:30.593768 CommonModeRestoreTime = 0x28
931 11:44:30.593822 Power On Value = 0x16, Power On Scale = 0x0
932 11:44:30.593875 ASPM: Enabled L1
933 11:44:30.593929 scan_bus: scanning of bus PCI: 00:1d.0 took 32761 usecs
934 11:44:30.593983 PCI: 00:1e.2 scanning...
935 11:44:30.594036 scan_generic_bus for PCI: 00:1e.2
936 11:44:30.594089 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
937 11:44:30.594143 scan_generic_bus for PCI: 00:1e.2 done
938 11:44:30.594197 scan_bus: scanning of bus PCI: 00:1e.2 took 13998 usecs
939 11:44:30.594250 PCI: 00:1e.3 scanning...
940 11:44:30.594303 scan_generic_bus for PCI: 00:1e.3
941 11:44:30.594390 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
942 11:44:30.594443 scan_generic_bus for PCI: 00:1e.3 done
943 11:44:30.594497 scan_bus: scanning of bus PCI: 00:1e.3 took 13999 usecs
944 11:44:30.594550 PCI: 00:1f.0 scanning...
945 11:44:30.594604 scan_static_bus for PCI: 00:1f.0
946 11:44:30.594657 PNP: 0c09.0 enabled
947 11:44:30.594715 scan_static_bus for PCI: 00:1f.0 done
948 11:44:30.594786 scan_bus: scanning of bus PCI: 00:1f.0 took 12050 usecs
949 11:44:30.594854 PCI: 00:1f.3 scanning...
950 11:44:30.594907 scan_bus: scanning of bus PCI: 00:1f.3 took 2858 usecs
951 11:44:30.594961 PCI: 00:1f.4 scanning...
952 11:44:30.595014 scan_generic_bus for PCI: 00:1f.4
953 11:44:30.595067 scan_generic_bus for PCI: 00:1f.4 done
954 11:44:30.595120 scan_bus: scanning of bus PCI: 00:1f.4 took 10191 usecs
955 11:44:30.595174 PCI: 00:1f.5 scanning...
956 11:44:30.595227 scan_generic_bus for PCI: 00:1f.5
957 11:44:30.595280 scan_generic_bus for PCI: 00:1f.5 done
958 11:44:30.595333 scan_bus: scanning of bus PCI: 00:1f.5 took 10187 usecs
959 11:44:30.595387 scan_bus: scanning of bus DOMAIN: 0000 took 604702 usecs
960 11:44:30.595440 scan_static_bus for Root Device done
961 11:44:30.595494 scan_bus: scanning of bus Root Device took 624574 usecs
962 11:44:30.595548 done
963 11:44:30.595600 Chrome EC: UHEPI supported
964 11:44:30.595654 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
965 11:44:30.595708 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
966 11:44:30.595761 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
967 11:44:30.595815 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
968 11:44:30.595870 SPI flash protection: WPSW=0 SRP0=0
969 11:44:30.595923 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
970 11:44:30.595976 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
971 11:44:30.596030 found VGA at PCI: 00:02.0
972 11:44:30.596083 Setting up VGA for PCI: 00:02.0
973 11:44:30.596136 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
974 11:44:30.596190 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
975 11:44:30.596243 Allocating resources...
976 11:44:30.596296 Reading resources...
977 11:44:30.596349 Root Device read_resources bus 0 link: 0
978 11:44:30.596402 CPU_CLUSTER: 0 read_resources bus 0 link: 0
979 11:44:30.596454 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
980 11:44:30.596508 DOMAIN: 0000 read_resources bus 0 link: 0
981 11:44:30.596752 PCI: 00:14.0 read_resources bus 0 link: 0
982 11:44:30.596812 USB0 port 0 read_resources bus 0 link: 0
983 11:44:30.596868 USB0 port 0 read_resources bus 0 link: 0 done
984 11:44:30.596921 PCI: 00:14.0 read_resources bus 0 link: 0 done
985 11:44:30.597021 PCI: 00:15.0 read_resources bus 1 link: 0
986 11:44:30.597076 PCI: 00:15.0 read_resources bus 1 link: 0 done
987 11:44:30.597131 PCI: 00:15.1 read_resources bus 2 link: 0
988 11:44:30.597184 PCI: 00:15.1 read_resources bus 2 link: 0 done
989 11:44:30.597238 PCI: 00:19.0 read_resources bus 3 link: 0
990 11:44:30.597291 PCI: 00:19.0 read_resources bus 3 link: 0 done
991 11:44:30.597345 PCI: 00:1d.0 read_resources bus 1 link: 0
992 11:44:30.597399 PCI: 00:1d.0 read_resources bus 1 link: 0 done
993 11:44:30.597452 PCI: 00:1e.2 read_resources bus 4 link: 0
994 11:44:30.597505 PCI: 00:1e.2 read_resources bus 4 link: 0 done
995 11:44:30.597558 PCI: 00:1e.3 read_resources bus 5 link: 0
996 11:44:30.597611 PCI: 00:1e.3 read_resources bus 5 link: 0 done
997 11:44:30.597664 PCI: 00:1f.0 read_resources bus 0 link: 0
998 11:44:30.597717 PCI: 00:1f.0 read_resources bus 0 link: 0 done
999 11:44:30.597770 DOMAIN: 0000 read_resources bus 0 link: 0 done
1000 11:44:30.597823 Root Device read_resources bus 0 link: 0 done
1001 11:44:30.597877 Done reading resources.
1002 11:44:30.597929 Show resources in subtree (Root Device)...After reading.
1003 11:44:30.597983 Root Device child on link 0 CPU_CLUSTER: 0
1004 11:44:30.598037 CPU_CLUSTER: 0 child on link 0 APIC: 00
1005 11:44:30.598090 APIC: 00
1006 11:44:30.598143 APIC: 01
1007 11:44:30.598196 APIC: 06
1008 11:44:30.598249 APIC: 07
1009 11:44:30.598302 APIC: 03
1010 11:44:30.598354 APIC: 02
1011 11:44:30.598408 APIC: 04
1012 11:44:30.598460 APIC: 05
1013 11:44:30.598513 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1014 11:44:30.598566 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1015 11:44:30.598621 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1016 11:44:30.598675 PCI: 00:00.0
1017 11:44:30.598730 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1018 11:44:30.598785 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1019 11:44:30.598839 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1020 11:44:30.598893 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1021 11:44:30.598946 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1022 11:44:30.599000 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1023 11:44:30.599053 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1024 11:44:30.599107 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1025 11:44:30.599171 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1026 11:44:30.599229 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1027 11:44:30.599285 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1028 11:44:30.599339 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1029 11:44:30.599394 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1030 11:44:30.599448 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1031 11:44:30.599502 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1032 11:44:30.599555 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1033 11:44:30.599609 PCI: 00:02.0
1034 11:44:30.599662 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1035 11:44:30.599716 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1036 11:44:30.599770 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1037 11:44:30.599838 PCI: 00:04.0
1038 11:44:30.599925 PCI: 00:08.0
1039 11:44:30.599987 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1040 11:44:30.600042 PCI: 00:12.0
1041 11:44:30.600096 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1042 11:44:30.600149 PCI: 00:14.0 child on link 0 USB0 port 0
1043 11:44:30.600203 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1044 11:44:30.600257 USB0 port 0 child on link 0 USB2 port 0
1045 11:44:30.600310 USB2 port 0
1046 11:44:30.600363 USB2 port 1
1047 11:44:30.600433 USB2 port 2
1048 11:44:30.600502 USB2 port 3
1049 11:44:30.600554 USB2 port 5
1050 11:44:30.600607 USB2 port 6
1051 11:44:30.600675 USB2 port 9
1052 11:44:30.600747 USB3 port 0
1053 11:44:30.600800 USB3 port 1
1054 11:44:30.600853 USB3 port 2
1055 11:44:30.600905 USB3 port 3
1056 11:44:30.600983 USB3 port 4
1057 11:44:30.601051 PCI: 00:14.2
1058 11:44:30.601104 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1059 11:44:30.601352 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1060 11:44:30.601418 PCI: 00:14.3
1061 11:44:30.601473 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1062 11:44:30.601527 PCI: 00:15.0 child on link 0 I2C: 01:15
1063 11:44:30.601584 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1064 11:44:30.601645 I2C: 01:15
1065 11:44:30.601698 PCI: 00:15.1 child on link 0 I2C: 02:5d
1066 11:44:30.601751 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1067 11:44:30.601805 I2C: 02:5d
1068 11:44:30.601858 GENERIC: 0.0
1069 11:44:30.601911 PCI: 00:16.0
1070 11:44:30.601963 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1071 11:44:30.602016 PCI: 00:17.0
1072 11:44:30.602069 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1073 11:44:30.602122 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1074 11:44:30.602176 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1075 11:44:30.602230 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1076 11:44:30.602283 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1077 11:44:30.602336 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1078 11:44:30.602407 PCI: 00:19.0 child on link 0 I2C: 03:1a
1079 11:44:30.602477 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1080 11:44:30.602530 I2C: 03:1a
1081 11:44:30.602582 I2C: 03:38
1082 11:44:30.602634 I2C: 03:39
1083 11:44:30.602686 I2C: 03:3a
1084 11:44:30.602738 I2C: 03:3b
1085 11:44:30.602790 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1086 11:44:30.602843 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1087 11:44:30.602897 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1088 11:44:30.602950 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1089 11:44:30.603004 PCI: 01:00.0
1090 11:44:30.603056 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1091 11:44:30.603110 PCI: 00:1e.0
1092 11:44:30.603163 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1093 11:44:30.603216 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1094 11:44:30.603270 PCI: 00:1e.2 child on link 0 SPI: 00
1095 11:44:30.603322 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1096 11:44:30.603376 SPI: 00
1097 11:44:30.603430 PCI: 00:1e.3 child on link 0 SPI: 01
1098 11:44:30.603483 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1099 11:44:30.603536 SPI: 01
1100 11:44:30.603589 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1101 11:44:30.603642 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1102 11:44:30.603696 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1103 11:44:30.603749 PNP: 0c09.0
1104 11:44:30.603802 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1105 11:44:30.603855 PCI: 00:1f.3
1106 11:44:30.603907 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1107 11:44:30.603960 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1108 11:44:30.604013 PCI: 00:1f.4
1109 11:44:30.604066 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1110 11:44:30.604119 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1111 11:44:30.604172 PCI: 00:1f.5
1112 11:44:30.604224 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1113 11:44:30.604277 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1114 11:44:30.604330 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1115 11:44:30.604383 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1116 11:44:30.604436 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1117 11:44:30.604489 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1118 11:44:30.604541 PCI: 00:17.0 18 * [0x60 - 0x67] io
1119 11:44:30.604593 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1120 11:44:30.604645 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1121 11:44:30.604698 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1122 11:44:30.604751 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1123 11:44:30.604804 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1124 11:44:30.604894 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1125 11:44:30.605002 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1126 11:44:30.605249 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1127 11:44:30.605310 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1128 11:44:30.605365 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1129 11:44:30.605420 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1130 11:44:30.605473 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1131 11:44:30.605526 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1132 11:44:30.605579 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1133 11:44:30.605632 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1134 11:44:30.605684 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1135 11:44:30.605737 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1136 11:44:30.605790 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1137 11:44:30.605842 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1138 11:44:30.605895 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1139 11:44:30.605948 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1140 11:44:30.606001 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1141 11:44:30.606053 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1142 11:44:30.606105 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1143 11:44:30.606158 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1144 11:44:30.606211 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1145 11:44:30.606264 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1146 11:44:30.606316 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1147 11:44:30.606369 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1148 11:44:30.606422 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1149 11:44:30.606475 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1150 11:44:30.606528 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1151 11:44:30.606582 avoid_fixed_resources: DOMAIN: 0000
1152 11:44:30.606634 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1153 11:44:30.606687 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1154 11:44:30.606741 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1155 11:44:30.606794 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1156 11:44:30.606847 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1157 11:44:30.606900 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1158 11:44:30.606984 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1159 11:44:30.607038 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1160 11:44:30.607108 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1161 11:44:30.607181 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1162 11:44:30.607234 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1163 11:44:30.607288 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1164 11:44:30.607341 Setting resources...
1165 11:44:30.607393 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1166 11:44:30.607446 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1167 11:44:30.607498 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1168 11:44:30.607551 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1169 11:44:30.607604 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1170 11:44:30.607689 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1171 11:44:30.607743 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1172 11:44:30.607796 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1173 11:44:30.607849 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1174 11:44:30.607902 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1175 11:44:30.607955 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1176 11:44:30.608007 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1177 11:44:30.608060 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1178 11:44:30.608113 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1179 11:44:30.608166 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1180 11:44:30.608219 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1181 11:44:30.608271 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1182 11:44:30.608324 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1183 11:44:30.608376 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1184 11:44:30.608429 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1185 11:44:30.608481 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1186 11:44:30.608533 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1187 11:44:30.608586 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1188 11:44:30.608657 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1189 11:44:30.608711 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1190 11:44:30.608765 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1191 11:44:30.608818 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1192 11:44:30.608872 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1193 11:44:30.608926 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1194 11:44:30.609005 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1195 11:44:30.609059 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1196 11:44:30.609112 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1197 11:44:30.609165 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1198 11:44:30.609218 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1199 11:44:30.609461 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1200 11:44:30.609521 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1201 11:44:30.609575 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1202 11:44:30.609629 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1203 11:44:30.609683 Root Device assign_resources, bus 0 link: 0
1204 11:44:30.609736 DOMAIN: 0000 assign_resources, bus 0 link: 0
1205 11:44:30.609789 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1206 11:44:30.609842 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1207 11:44:30.609896 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1208 11:44:30.609949 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1209 11:44:30.610003 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1210 11:44:30.610056 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1211 11:44:30.610109 PCI: 00:14.0 assign_resources, bus 0 link: 0
1212 11:44:30.610162 PCI: 00:14.0 assign_resources, bus 0 link: 0
1213 11:44:30.610215 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1214 11:44:30.610268 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1215 11:44:30.610321 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1216 11:44:30.610374 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1217 11:44:30.610426 PCI: 00:15.0 assign_resources, bus 1 link: 0
1218 11:44:30.610479 PCI: 00:15.0 assign_resources, bus 1 link: 0
1219 11:44:30.610532 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1220 11:44:30.610585 PCI: 00:15.1 assign_resources, bus 2 link: 0
1221 11:44:30.610638 PCI: 00:15.1 assign_resources, bus 2 link: 0
1222 11:44:30.610690 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1223 11:44:30.610744 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1224 11:44:30.610797 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1225 11:44:30.610882 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1226 11:44:30.610936 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1227 11:44:30.610989 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1228 11:44:30.611042 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1229 11:44:30.611095 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1230 11:44:30.611147 PCI: 00:19.0 assign_resources, bus 3 link: 0
1231 11:44:30.611200 PCI: 00:19.0 assign_resources, bus 3 link: 0
1232 11:44:30.611253 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1233 11:44:30.611305 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1234 11:44:30.611358 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1235 11:44:30.611410 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1236 11:44:30.611462 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1237 11:44:30.611515 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1238 11:44:30.611567 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1239 11:44:30.611619 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1240 11:44:30.611672 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1241 11:44:30.611724 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1242 11:44:30.611776 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1243 11:44:30.611829 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1244 11:44:30.611881 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1245 11:44:30.611933 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1246 11:44:30.611986 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1247 11:44:30.612038 LPC: Trying to open IO window from 800 size 1ff
1248 11:44:30.612091 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1249 11:44:30.612144 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1250 11:44:30.612197 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1251 11:44:30.612249 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1252 11:44:30.612301 DOMAIN: 0000 assign_resources, bus 0 link: 0
1253 11:44:30.612353 Root Device assign_resources, bus 0 link: 0
1254 11:44:30.612405 Done setting resources.
1255 11:44:30.612457 Show resources in subtree (Root Device)...After assigning values.
1256 11:44:30.612510 Root Device child on link 0 CPU_CLUSTER: 0
1257 11:44:30.612562 CPU_CLUSTER: 0 child on link 0 APIC: 00
1258 11:44:30.612616 APIC: 00
1259 11:44:30.612669 APIC: 01
1260 11:44:30.612721 APIC: 06
1261 11:44:30.612773 APIC: 07
1262 11:44:30.612824 APIC: 03
1263 11:44:30.612876 APIC: 02
1264 11:44:30.612928 APIC: 04
1265 11:44:30.613024 APIC: 05
1266 11:44:30.613076 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1267 11:44:30.613321 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1268 11:44:30.613384 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1269 11:44:30.613439 PCI: 00:00.0
1270 11:44:30.613491 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1271 11:44:30.613564 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1272 11:44:30.613620 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1273 11:44:30.613674 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1274 11:44:30.613728 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1275 11:44:30.613799 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1276 11:44:30.613854 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1277 11:44:30.613908 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1278 11:44:30.613961 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1279 11:44:30.614033 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1280 11:44:30.614087 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1281 11:44:30.614141 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1282 11:44:30.614194 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1283 11:44:30.614263 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1284 11:44:30.614318 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1285 11:44:30.614372 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1286 11:44:30.614430 PCI: 00:02.0
1287 11:44:30.614492 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1288 11:44:30.614547 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1289 11:44:30.614602 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1290 11:44:30.614655 PCI: 00:04.0
1291 11:44:30.614746 PCI: 00:08.0
1292 11:44:30.614830 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1293 11:44:30.614918 PCI: 00:12.0
1294 11:44:30.615004 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1295 11:44:30.615087 PCI: 00:14.0 child on link 0 USB0 port 0
1296 11:44:30.615179 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1297 11:44:30.615263 USB0 port 0 child on link 0 USB2 port 0
1298 11:44:30.615344 USB2 port 0
1299 11:44:30.615435 USB2 port 1
1300 11:44:30.615517 USB2 port 2
1301 11:44:30.615597 USB2 port 3
1302 11:44:30.615676 USB2 port 5
1303 11:44:30.615730 USB2 port 6
1304 11:44:30.615783 USB2 port 9
1305 11:44:30.615907 USB3 port 0
1306 11:44:30.615963 USB3 port 1
1307 11:44:30.616015 USB3 port 2
1308 11:44:30.616067 USB3 port 3
1309 11:44:30.616119 USB3 port 4
1310 11:44:30.616192 PCI: 00:14.2
1311 11:44:30.616276 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1312 11:44:30.616360 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1313 11:44:30.616451 PCI: 00:14.3
1314 11:44:30.616535 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1315 11:44:30.616617 PCI: 00:15.0 child on link 0 I2C: 01:15
1316 11:44:30.616709 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1317 11:44:30.616792 I2C: 01:15
1318 11:44:30.616873 PCI: 00:15.1 child on link 0 I2C: 02:5d
1319 11:44:30.616989 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1320 11:44:30.617086 I2C: 02:5d
1321 11:44:30.617167 GENERIC: 0.0
1322 11:44:30.617258 PCI: 00:16.0
1323 11:44:30.617386 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1324 11:44:30.617477 PCI: 00:17.0
1325 11:44:30.617561 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1326 11:44:30.617645 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1327 11:44:30.617738 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1328 11:44:30.617822 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1329 11:44:30.617914 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1330 11:44:30.618194 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1331 11:44:30.618282 PCI: 00:19.0 child on link 0 I2C: 03:1a
1332 11:44:30.618367 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1333 11:44:30.618459 I2C: 03:1a
1334 11:44:30.618540 I2C: 03:38
1335 11:44:30.618627 I2C: 03:39
1336 11:44:30.618711 I2C: 03:3a
1337 11:44:30.618792 I2C: 03:3b
1338 11:44:30.618881 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1339 11:44:30.618967 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1340 11:44:30.619051 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1341 11:44:30.619143 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1342 11:44:30.619225 PCI: 01:00.0
1343 11:44:30.619347 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1344 11:44:30.619470 PCI: 00:1e.0
1345 11:44:30.619553 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1346 11:44:30.619646 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1347 11:44:30.619729 PCI: 00:1e.2 child on link 0 SPI: 00
1348 11:44:30.619820 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1349 11:44:30.619903 SPI: 00
1350 11:44:30.619985 PCI: 00:1e.3 child on link 0 SPI: 01
1351 11:44:30.620077 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1352 11:44:30.620160 SPI: 01
1353 11:44:30.620242 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1354 11:44:30.620334 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1355 11:44:30.620418 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1356 11:44:30.620500 PNP: 0c09.0
1357 11:44:30.620591 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1358 11:44:30.620673 PCI: 00:1f.3
1359 11:44:30.620763 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1360 11:44:30.620848 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1361 11:44:30.620930 PCI: 00:1f.4
1362 11:44:30.621052 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1363 11:44:30.621107 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1364 11:44:30.621161 PCI: 00:1f.5
1365 11:44:30.621213 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1366 11:44:30.621281 Done allocating resources.
1367 11:44:30.621383 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1368 11:44:30.621452 Enabling resources...
1369 11:44:30.621535 PCI: 00:00.0 subsystem <- 8086/9b61
1370 11:44:30.621617 PCI: 00:00.0 cmd <- 06
1371 11:44:30.621704 PCI: 00:02.0 subsystem <- 8086/9b41
1372 11:44:30.621788 PCI: 00:02.0 cmd <- 03
1373 11:44:30.621872 PCI: 00:08.0 cmd <- 06
1374 11:44:30.621997 PCI: 00:12.0 subsystem <- 8086/02f9
1375 11:44:30.622053 PCI: 00:12.0 cmd <- 02
1376 11:44:30.622106 PCI: 00:14.0 subsystem <- 8086/02ed
1377 11:44:30.622158 PCI: 00:14.0 cmd <- 02
1378 11:44:30.622225 PCI: 00:14.2 cmd <- 02
1379 11:44:30.622279 PCI: 00:14.3 subsystem <- 8086/02f0
1380 11:44:30.622331 PCI: 00:14.3 cmd <- 02
1381 11:44:30.622383 PCI: 00:15.0 subsystem <- 8086/02e8
1382 11:44:30.622452 PCI: 00:15.0 cmd <- 02
1383 11:44:30.622507 PCI: 00:15.1 subsystem <- 8086/02e9
1384 11:44:30.622559 PCI: 00:15.1 cmd <- 02
1385 11:44:30.622611 PCI: 00:16.0 subsystem <- 8086/02e0
1386 11:44:30.622675 PCI: 00:16.0 cmd <- 02
1387 11:44:30.622731 PCI: 00:17.0 subsystem <- 8086/02d3
1388 11:44:30.622797 PCI: 00:17.0 cmd <- 03
1389 11:44:30.622853 PCI: 00:19.0 subsystem <- 8086/02c5
1390 11:44:30.624850 PCI: 00:19.0 cmd <- 02
1391 11:44:30.627817 PCI: 00:1d.0 bridge ctrl <- 0013
1392 11:44:30.631254 PCI: 00:1d.0 subsystem <- 8086/02b0
1393 11:44:30.634406 PCI: 00:1d.0 cmd <- 06
1394 11:44:30.637665 PCI: 00:1e.0 subsystem <- 8086/02a8
1395 11:44:30.640760 PCI: 00:1e.0 cmd <- 06
1396 11:44:30.644411 PCI: 00:1e.2 subsystem <- 8086/02aa
1397 11:44:30.647356 PCI: 00:1e.2 cmd <- 06
1398 11:44:30.650761 PCI: 00:1e.3 subsystem <- 8086/02ab
1399 11:44:30.654123 PCI: 00:1e.3 cmd <- 02
1400 11:44:30.657316 PCI: 00:1f.0 subsystem <- 8086/0284
1401 11:44:30.660407 PCI: 00:1f.0 cmd <- 407
1402 11:44:30.663706 PCI: 00:1f.3 subsystem <- 8086/02c8
1403 11:44:30.666877 PCI: 00:1f.3 cmd <- 02
1404 11:44:30.670072 PCI: 00:1f.4 subsystem <- 8086/02a3
1405 11:44:30.673357 PCI: 00:1f.4 cmd <- 03
1406 11:44:30.676891 PCI: 00:1f.5 subsystem <- 8086/02a4
1407 11:44:30.680066 PCI: 00:1f.5 cmd <- 406
1408 11:44:30.687315 PCI: 01:00.0 cmd <- 02
1409 11:44:30.692497 done.
1410 11:44:30.706043 ME: Version: 14.0.39.1367
1411 11:44:30.712903 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13
1412 11:44:30.716105 Initializing devices...
1413 11:44:30.716186 Root Device init ...
1414 11:44:30.722512 Chrome EC: Set SMI mask to 0x0000000000000000
1415 11:44:30.729013 Chrome EC: clear events_b mask to 0x0000000000000000
1416 11:44:30.732008 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1417 11:44:30.738820 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1418 11:44:30.745116 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1419 11:44:30.748483 Chrome EC: Set WAKE mask to 0x0000000000000000
1420 11:44:30.755112 Root Device init finished in 35185 usecs
1421 11:44:30.758061 CPU_CLUSTER: 0 init ...
1422 11:44:30.761529 CPU_CLUSTER: 0 init finished in 2440 usecs
1423 11:44:30.767029 PCI: 00:00.0 init ...
1424 11:44:30.770257 CPU TDP: 15 Watts
1425 11:44:30.773537 CPU PL2 = 64 Watts
1426 11:44:30.776694 PCI: 00:00.0 init finished in 7082 usecs
1427 11:44:30.779889 PCI: 00:02.0 init ...
1428 11:44:30.783059 PCI: 00:02.0 init finished in 2244 usecs
1429 11:44:30.786658 PCI: 00:08.0 init ...
1430 11:44:30.789842 PCI: 00:08.0 init finished in 2252 usecs
1431 11:44:30.792911 PCI: 00:12.0 init ...
1432 11:44:30.796385 PCI: 00:12.0 init finished in 2252 usecs
1433 11:44:30.799602 PCI: 00:14.0 init ...
1434 11:44:30.802830 PCI: 00:14.0 init finished in 2253 usecs
1435 11:44:30.806000 PCI: 00:14.2 init ...
1436 11:44:30.809189 PCI: 00:14.2 init finished in 2253 usecs
1437 11:44:30.812548 PCI: 00:14.3 init ...
1438 11:44:30.815923 PCI: 00:14.3 init finished in 2271 usecs
1439 11:44:30.819346 PCI: 00:15.0 init ...
1440 11:44:30.822677 DW I2C bus 0 at 0xd121f000 (400 KHz)
1441 11:44:30.829155 PCI: 00:15.0 init finished in 5978 usecs
1442 11:44:30.829236 PCI: 00:15.1 init ...
1443 11:44:30.835317 DW I2C bus 1 at 0xd1220000 (400 KHz)
1444 11:44:30.838631 PCI: 00:15.1 init finished in 5979 usecs
1445 11:44:30.842097 PCI: 00:16.0 init ...
1446 11:44:30.845125 PCI: 00:16.0 init finished in 2252 usecs
1447 11:44:30.848323 PCI: 00:19.0 init ...
1448 11:44:30.851895 DW I2C bus 4 at 0xd1222000 (400 KHz)
1449 11:44:30.854978 PCI: 00:19.0 init finished in 5978 usecs
1450 11:44:30.858296 PCI: 00:1d.0 init ...
1451 11:44:30.861635 Initializing PCH PCIe bridge.
1452 11:44:30.864791 PCI: 00:1d.0 init finished in 5275 usecs
1453 11:44:30.868519 PCI: 00:1f.0 init ...
1454 11:44:30.872062 IOAPIC: Initializing IOAPIC at 0xfec00000
1455 11:44:30.878415 IOAPIC: Bootstrap Processor Local APIC = 0x00
1456 11:44:30.878498 IOAPIC: ID = 0x02
1457 11:44:30.881597 IOAPIC: Dumping registers
1458 11:44:30.884735 reg 0x0000: 0x02000000
1459 11:44:30.888375 reg 0x0001: 0x00770020
1460 11:44:30.891628 reg 0x0002: 0x00000000
1461 11:44:30.894814 PCI: 00:1f.0 init finished in 23547 usecs
1462 11:44:30.897862 PCI: 00:1f.4 init ...
1463 11:44:30.901177 PCI: 00:1f.4 init finished in 2264 usecs
1464 11:44:30.913100 PCI: 01:00.0 init ...
1465 11:44:30.916310 PCI: 01:00.0 init finished in 2252 usecs
1466 11:44:30.920639 PNP: 0c09.0 init ...
1467 11:44:30.923743 Google Chrome EC uptime: 8.146 seconds
1468 11:44:30.930205 Google Chrome AP resets since EC boot: 0
1469 11:44:30.933880 Google Chrome most recent AP reset causes:
1470 11:44:30.940350 Google Chrome EC reset flags at last EC boot: reset-pin | hard | ap-off
1471 11:44:30.943480 PNP: 0c09.0 init finished in 22059 usecs
1472 11:44:30.947150 Devices initialized
1473 11:44:30.950457 Show all devs... After init.
1474 11:44:30.953685 Root Device: enabled 1
1475 11:44:30.956898 CPU_CLUSTER: 0: enabled 1
1476 11:44:30.957171 DOMAIN: 0000: enabled 1
1477 11:44:30.960287 APIC: 00: enabled 1
1478 11:44:30.963521 PCI: 00:00.0: enabled 1
1479 11:44:30.963908 PCI: 00:02.0: enabled 1
1480 11:44:30.966727 PCI: 00:04.0: enabled 0
1481 11:44:30.969853 PCI: 00:05.0: enabled 0
1482 11:44:30.973315 PCI: 00:12.0: enabled 1
1483 11:44:30.973702 PCI: 00:12.5: enabled 0
1484 11:44:30.976879 PCI: 00:12.6: enabled 0
1485 11:44:30.979558 PCI: 00:14.0: enabled 1
1486 11:44:30.983195 PCI: 00:14.1: enabled 0
1487 11:44:30.983582 PCI: 00:14.3: enabled 1
1488 11:44:30.986377 PCI: 00:14.5: enabled 0
1489 11:44:30.989636 PCI: 00:15.0: enabled 1
1490 11:44:30.992583 PCI: 00:15.1: enabled 1
1491 11:44:30.993139 PCI: 00:15.2: enabled 0
1492 11:44:30.995893 PCI: 00:15.3: enabled 0
1493 11:44:30.999162 PCI: 00:16.0: enabled 1
1494 11:44:31.002633 PCI: 00:16.1: enabled 0
1495 11:44:31.003161 PCI: 00:16.2: enabled 0
1496 11:44:31.005933 PCI: 00:16.3: enabled 0
1497 11:44:31.009062 PCI: 00:16.4: enabled 0
1498 11:44:31.012516 PCI: 00:16.5: enabled 0
1499 11:44:31.013204 PCI: 00:17.0: enabled 1
1500 11:44:31.015705 PCI: 00:19.0: enabled 1
1501 11:44:31.018896 PCI: 00:19.1: enabled 0
1502 11:44:31.021996 PCI: 00:19.2: enabled 0
1503 11:44:31.022552 PCI: 00:1a.0: enabled 0
1504 11:44:31.025478 PCI: 00:1c.0: enabled 0
1505 11:44:31.028445 PCI: 00:1c.1: enabled 0
1506 11:44:31.031863 PCI: 00:1c.2: enabled 0
1507 11:44:31.032440 PCI: 00:1c.3: enabled 0
1508 11:44:31.034932 PCI: 00:1c.4: enabled 0
1509 11:44:31.038182 PCI: 00:1c.5: enabled 0
1510 11:44:31.041381 PCI: 00:1c.6: enabled 0
1511 11:44:31.041891 PCI: 00:1c.7: enabled 0
1512 11:44:31.044903 PCI: 00:1d.0: enabled 1
1513 11:44:31.048027 PCI: 00:1d.1: enabled 0
1514 11:44:31.051330 PCI: 00:1d.2: enabled 0
1515 11:44:31.051801 PCI: 00:1d.3: enabled 0
1516 11:44:31.054574 PCI: 00:1d.4: enabled 0
1517 11:44:31.057574 PCI: 00:1d.5: enabled 0
1518 11:44:31.060856 PCI: 00:1e.0: enabled 1
1519 11:44:31.061420 PCI: 00:1e.1: enabled 0
1520 11:44:31.064262 PCI: 00:1e.2: enabled 1
1521 11:44:31.067612 PCI: 00:1e.3: enabled 1
1522 11:44:31.070780 PCI: 00:1f.0: enabled 1
1523 11:44:31.071228 PCI: 00:1f.1: enabled 0
1524 11:44:31.074059 PCI: 00:1f.2: enabled 0
1525 11:44:31.077311 PCI: 00:1f.3: enabled 1
1526 11:44:31.080541 PCI: 00:1f.4: enabled 1
1527 11:44:31.081036 PCI: 00:1f.5: enabled 1
1528 11:44:31.083816 PCI: 00:1f.6: enabled 0
1529 11:44:31.087211 USB0 port 0: enabled 1
1530 11:44:31.090384 I2C: 01:15: enabled 1
1531 11:44:31.091013 I2C: 02:5d: enabled 1
1532 11:44:31.093333 GENERIC: 0.0: enabled 1
1533 11:44:31.096673 I2C: 03:1a: enabled 1
1534 11:44:31.097193 I2C: 03:38: enabled 1
1535 11:44:31.099791 I2C: 03:39: enabled 1
1536 11:44:31.103158 I2C: 03:3a: enabled 1
1537 11:44:31.103778 I2C: 03:3b: enabled 1
1538 11:44:31.106474 PCI: 00:00.0: enabled 1
1539 11:44:31.109578 SPI: 00: enabled 1
1540 11:44:31.110142 SPI: 01: enabled 1
1541 11:44:31.113177 PNP: 0c09.0: enabled 1
1542 11:44:31.116340 USB2 port 0: enabled 1
1543 11:44:31.116777 USB2 port 1: enabled 1
1544 11:44:31.119299 USB2 port 2: enabled 0
1545 11:44:31.122895 USB2 port 3: enabled 0
1546 11:44:31.125974 USB2 port 5: enabled 0
1547 11:44:31.126585 USB2 port 6: enabled 1
1548 11:44:31.129491 USB2 port 9: enabled 1
1549 11:44:31.132629 USB3 port 0: enabled 1
1550 11:44:31.135750 USB3 port 1: enabled 1
1551 11:44:31.136281 USB3 port 2: enabled 1
1552 11:44:31.138937 USB3 port 3: enabled 1
1553 11:44:31.142468 USB3 port 4: enabled 0
1554 11:44:31.142985 APIC: 01: enabled 1
1555 11:44:31.145620 APIC: 06: enabled 1
1556 11:44:31.148904 APIC: 07: enabled 1
1557 11:44:31.149471 APIC: 03: enabled 1
1558 11:44:31.152002 APIC: 02: enabled 1
1559 11:44:31.152495 APIC: 04: enabled 1
1560 11:44:31.155186 APIC: 05: enabled 1
1561 11:44:31.158761 PCI: 00:08.0: enabled 1
1562 11:44:31.161604 PCI: 00:14.2: enabled 1
1563 11:44:31.162108 PCI: 01:00.0: enabled 1
1564 11:44:31.165682 Disabling ACPI via APMC:
1565 11:44:31.170075 done.
1566 11:44:31.173185 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1567 11:44:31.176292 ELOG: NV offset 0xaf0000 size 0x4000
1568 11:44:31.183996 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1569 11:44:31.190366 ELOG: Event(17) added with size 13 at 2024-05-03 11:44:30 UTC
1570 11:44:31.196920 ELOG: Event(92) added with size 9 at 2024-05-03 11:44:30 UTC
1571 11:44:31.203469 ELOG: Event(93) added with size 9 at 2024-05-03 11:44:30 UTC
1572 11:44:31.209859 ELOG: Event(9E) added with size 10 at 2024-05-03 11:44:30 UTC
1573 11:44:31.216565 ELOG: Event(9F) added with size 14 at 2024-05-03 11:44:30 UTC
1574 11:44:31.223310 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1575 11:44:31.229706 ELOG: Event(A1) added with size 10 at 2024-05-03 11:44:30 UTC
1576 11:44:31.236206 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
1577 11:44:31.242502 ELOG: Event(A0) added with size 9 at 2024-05-03 11:44:30 UTC
1578 11:44:31.245995 elog_add_boot_reason: Logged dev mode boot
1579 11:44:31.249425 Finalize devices...
1580 11:44:31.252622 PCI: 00:17.0 final
1581 11:44:31.253087 Devices finalized
1582 11:44:31.259283 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1583 11:44:31.262466 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1584 11:44:31.268980 ME: HFSTS1 : 0x90000245
1585 11:44:31.272190 ME: HFSTS2 : 0x30850126
1586 11:44:31.275339 ME: HFSTS3 : 0x00000020
1587 11:44:31.281868 ME: HFSTS4 : 0x00004800
1588 11:44:31.284981 ME: HFSTS5 : 0x00000000
1589 11:44:31.288428 ME: HFSTS6 : 0x40400006
1590 11:44:31.291618 ME: Manufacturing Mode : NO
1591 11:44:31.294711 ME: FW Partition Table : OK
1592 11:44:31.298209 ME: Bringup Loader Failure : NO
1593 11:44:31.301408 ME: Firmware Init Complete : YES
1594 11:44:31.304532 ME: Boot Options Present : NO
1595 11:44:31.307880 ME: Update In Progress : NO
1596 11:44:31.311115 ME: D0i3 Support : YES
1597 11:44:31.314287 ME: Low Power State Enabled : NO
1598 11:44:31.317680 ME: CPU Replaced : NO
1599 11:44:31.321040 ME: CPU Replacement Valid : YES
1600 11:44:31.324279 ME: Current Working State : 5
1601 11:44:31.327381 ME: Current Operation State : 1
1602 11:44:31.330387 ME: Current Operation Mode : 0
1603 11:44:31.333574 ME: Error Code : 0
1604 11:44:31.336828 ME: CPU Debug Disabled : YES
1605 11:44:31.340148 ME: TXT Support : NO
1606 11:44:31.346970 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1607 11:44:31.353273 ELOG: Event(91) added with size 10 at 2024-05-03 11:44:30 UTC
1608 11:44:31.359919 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1609 11:44:31.360355 CBFS @ c08000 size 3f8000
1610 11:44:31.366509 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1611 11:44:31.369637 CBFS: Locating 'fallback/dsdt.aml'
1612 11:44:31.376042 CBFS: Found @ offset 10bb80 size 3fa5
1613 11:44:31.379435 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1614 11:44:31.382598 CBFS @ c08000 size 3f8000
1615 11:44:31.389028 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1616 11:44:31.392393 CBFS: Locating 'fallback/slic'
1617 11:44:31.395558 CBFS: 'fallback/slic' not found.
1618 11:44:31.399053 ACPI: Writing ACPI tables at 99b3e000.
1619 11:44:31.402069 ACPI: * FACS
1620 11:44:31.405297 ACPI: * DSDT
1621 11:44:31.408476 Ramoops buffer: 0x100000@0x99a3d000.
1622 11:44:31.412033 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1623 11:44:31.415034 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1624 11:44:31.419116 Google Chrome EC: version:
1625 11:44:31.422327 ro: helios_v2.0.2659-56403530b
1626 11:44:31.425847 rw: helios_v2.0.2849-c41de27e7d
1627 11:44:31.428990 running image: 1
1628 11:44:31.432300 ACPI: * FADT
1629 11:44:31.432696 SCI is IRQ9
1630 11:44:31.439005 ACPI: added table 1/32, length now 40
1631 11:44:31.439562 ACPI: * SSDT
1632 11:44:31.441913 Found 1 CPU(s) with 8 core(s) each.
1633 11:44:31.448410 Error: Could not locate 'wifi_sar' in VPD.
1634 11:44:31.451805 Checking CBFS for default SAR values
1635 11:44:31.454878 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1636 11:44:31.458275 CBFS @ c08000 size 3f8000
1637 11:44:31.464876 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1638 11:44:31.468189 CBFS: Locating 'wifi_sar_defaults.hex'
1639 11:44:31.471413 CBFS: Found @ offset 5fac0 size 77
1640 11:44:31.474612 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1641 11:44:31.481024 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1642 11:44:31.484344 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1643 11:44:31.490950 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1644 11:44:31.494168 failed to find key in VPD: dsm_calib_r0_0
1645 11:44:31.503791 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1646 11:44:31.510218 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1647 11:44:31.513472 failed to find key in VPD: dsm_calib_r0_1
1648 11:44:31.523375 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1649 11:44:31.526799 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1650 11:44:31.529756 failed to find key in VPD: dsm_calib_r0_2
1651 11:44:31.539805 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1652 11:44:31.546185 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1653 11:44:31.549363 failed to find key in VPD: dsm_calib_r0_3
1654 11:44:31.559251 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1655 11:44:31.562660 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1656 11:44:31.569219 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1657 11:44:31.572689 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1658 11:44:31.575587 EC returned error result code 1
1659 11:44:31.578999 EC returned error result code 1
1660 11:44:31.582989 EC returned error result code 1
1661 11:44:31.589531 PS2K: Bad resp from EC. Vivaldi disabled!
1662 11:44:31.595756 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1663 11:44:31.599278 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1664 11:44:31.605606 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1665 11:44:31.609154 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1666 11:44:31.615608 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1667 11:44:31.622247 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1668 11:44:31.628624 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1669 11:44:31.635202 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1670 11:44:31.638506 ACPI: added table 2/32, length now 44
1671 11:44:31.638961 ACPI: * MCFG
1672 11:44:31.641652 ACPI: added table 3/32, length now 48
1673 11:44:31.644903 ACPI: * TPM2
1674 11:44:31.648160 TPM2 log created at 99a2d000
1675 11:44:31.651203 ACPI: added table 4/32, length now 52
1676 11:44:31.654882 ACPI: * MADT
1677 11:44:31.655318 SCI is IRQ9
1678 11:44:31.657795 ACPI: added table 5/32, length now 56
1679 11:44:31.661355 current = 99b43ac0
1680 11:44:31.661744 ACPI: * DMAR
1681 11:44:31.664127 ACPI: added table 6/32, length now 60
1682 11:44:31.667444 ACPI: * IGD OpRegion
1683 11:44:31.670995 GMA: Found VBT in CBFS
1684 11:44:31.674116 GMA: Found valid VBT in CBFS
1685 11:44:31.677350 ACPI: added table 7/32, length now 64
1686 11:44:31.677856 ACPI: * HPET
1687 11:44:31.683924 ACPI: added table 8/32, length now 68
1688 11:44:31.684548 ACPI: done.
1689 11:44:31.686922 ACPI tables: 31744 bytes.
1690 11:44:31.690300 smbios_write_tables: 99a2c000
1691 11:44:31.693737 EC returned error result code 3
1692 11:44:31.696882 Couldn't obtain OEM name from CBI
1693 11:44:31.699970 Create SMBIOS type 17
1694 11:44:31.703604 PCI: 00:00.0 (Intel Cannonlake)
1695 11:44:31.704165 PCI: 00:14.3 (Intel WiFi)
1696 11:44:31.706579 SMBIOS tables: 939 bytes.
1697 11:44:31.713030 Writing table forward entry at 0x00000500
1698 11:44:31.716237 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1699 11:44:31.722928 Writing coreboot table at 0x99b62000
1700 11:44:31.726509 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1701 11:44:31.732758 1. 0000000000001000-000000000009ffff: RAM
1702 11:44:31.736162 2. 00000000000a0000-00000000000fffff: RESERVED
1703 11:44:31.739332 3. 0000000000100000-0000000099a2bfff: RAM
1704 11:44:31.746126 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1705 11:44:31.752333 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1706 11:44:31.758872 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1707 11:44:31.762458 7. 000000009a000000-000000009f7fffff: RESERVED
1708 11:44:31.765301 8. 00000000e0000000-00000000efffffff: RESERVED
1709 11:44:31.772068 9. 00000000fc000000-00000000fc000fff: RESERVED
1710 11:44:31.775522 10. 00000000fe000000-00000000fe00ffff: RESERVED
1711 11:44:31.782076 11. 00000000fed10000-00000000fed17fff: RESERVED
1712 11:44:31.785080 12. 00000000fed80000-00000000fed83fff: RESERVED
1713 11:44:31.791521 13. 00000000fed90000-00000000fed91fff: RESERVED
1714 11:44:31.794596 14. 00000000feda0000-00000000feda1fff: RESERVED
1715 11:44:31.801413 15. 0000000100000000-000000045e7fffff: RAM
1716 11:44:31.804583 Graphics framebuffer located at 0xc0000000
1717 11:44:31.807867 Passing 5 GPIOs to payload:
1718 11:44:31.810914 NAME | PORT | POLARITY | VALUE
1719 11:44:31.817704 write protect | undefined | high | low
1720 11:44:31.824204 lid | undefined | high | high
1721 11:44:31.827749 power | undefined | high | low
1722 11:44:31.833526 oprom | undefined | high | low
1723 11:44:31.836922 EC in RW | 0x000000cb | high | low
1724 11:44:31.840341 Board ID: 4
1725 11:44:31.843437 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1726 11:44:31.846754 CBFS @ c08000 size 3f8000
1727 11:44:31.852959 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1728 11:44:31.859717 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum f861
1729 11:44:31.862951 coreboot table: 1492 bytes.
1730 11:44:31.866134 IMD ROOT 0. 99fff000 00001000
1731 11:44:31.869450 IMD SMALL 1. 99ffe000 00001000
1732 11:44:31.872582 FSP MEMORY 2. 99c4e000 003b0000
1733 11:44:31.876060 CONSOLE 3. 99c2e000 00020000
1734 11:44:31.879261 FMAP 4. 99c2d000 0000054e
1735 11:44:31.882371 TIME STAMP 5. 99c2c000 00000910
1736 11:44:31.885930 VBOOT WORK 6. 99c18000 00014000
1737 11:44:31.889113 MRC DATA 7. 99c16000 00001958
1738 11:44:31.892275 ROMSTG STCK 8. 99c15000 00001000
1739 11:44:31.895530 AFTER CAR 9. 99c0b000 0000a000
1740 11:44:31.898712 RAMSTAGE 10. 99baf000 0005c000
1741 11:44:31.902023 REFCODE 11. 99b7a000 00035000
1742 11:44:31.905354 SMM BACKUP 12. 99b6a000 00010000
1743 11:44:31.908429 COREBOOT 13. 99b62000 00008000
1744 11:44:31.911712 ACPI 14. 99b3e000 00024000
1745 11:44:31.915199 ACPI GNVS 15. 99b3d000 00001000
1746 11:44:31.918234 RAMOOPS 16. 99a3d000 00100000
1747 11:44:31.921625 TPM2 TCGLOG17. 99a2d000 00010000
1748 11:44:31.924917 SMBIOS 18. 99a2c000 00000800
1749 11:44:31.928051 IMD small region:
1750 11:44:31.931539 IMD ROOT 0. 99ffec00 00000400
1751 11:44:31.934832 FSP RUNTIME 1. 99ffebe0 00000004
1752 11:44:31.937973 EC HOSTEVENT 2. 99ffebc0 00000008
1753 11:44:31.941081 POWER STATE 3. 99ffeb80 00000040
1754 11:44:31.944433 ROMSTAGE 4. 99ffeb60 00000004
1755 11:44:31.947781 MEM INFO 5. 99ffe9a0 000001b9
1756 11:44:31.950935 VPD 6. 99ffe920 0000006c
1757 11:44:31.954196 MTRR: Physical address space:
1758 11:44:31.960863 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1759 11:44:31.967352 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1760 11:44:31.973549 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1761 11:44:31.980096 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1762 11:44:31.986422 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1763 11:44:31.993053 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1764 11:44:32.000063 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1765 11:44:32.002852 MTRR: Fixed MSR 0x250 0x0606060606060606
1766 11:44:32.006142 MTRR: Fixed MSR 0x258 0x0606060606060606
1767 11:44:32.009262 MTRR: Fixed MSR 0x259 0x0000000000000000
1768 11:44:32.016091 MTRR: Fixed MSR 0x268 0x0606060606060606
1769 11:44:32.019084 MTRR: Fixed MSR 0x269 0x0606060606060606
1770 11:44:32.022391 MTRR: Fixed MSR 0x26a 0x0606060606060606
1771 11:44:32.025861 MTRR: Fixed MSR 0x26b 0x0606060606060606
1772 11:44:32.032268 MTRR: Fixed MSR 0x26c 0x0606060606060606
1773 11:44:32.035679 MTRR: Fixed MSR 0x26d 0x0606060606060606
1774 11:44:32.038698 MTRR: Fixed MSR 0x26e 0x0606060606060606
1775 11:44:32.042065 MTRR: Fixed MSR 0x26f 0x0606060606060606
1776 11:44:32.045870 call enable_fixed_mtrr()
1777 11:44:32.049343 CPU physical address size: 39 bits
1778 11:44:32.055615 MTRR: default type WB/UC MTRR counts: 6/8.
1779 11:44:32.058651 MTRR: WB selected as default type.
1780 11:44:32.065487 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1781 11:44:32.072047 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1782 11:44:32.075230 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1783 11:44:32.081521 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1784 11:44:32.088254 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1785 11:44:32.094822 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1786 11:44:32.101411 MTRR: Fixed MSR 0x250 0x0606060606060606
1787 11:44:32.104586 MTRR: Fixed MSR 0x258 0x0606060606060606
1788 11:44:32.107886 MTRR: Fixed MSR 0x259 0x0000000000000000
1789 11:44:32.114350 MTRR: Fixed MSR 0x268 0x0606060606060606
1790 11:44:32.117406 MTRR: Fixed MSR 0x269 0x0606060606060606
1791 11:44:32.120729 MTRR: Fixed MSR 0x26a 0x0606060606060606
1792 11:44:32.123878 MTRR: Fixed MSR 0x26b 0x0606060606060606
1793 11:44:32.130303 MTRR: Fixed MSR 0x26c 0x0606060606060606
1794 11:44:32.133873 MTRR: Fixed MSR 0x26d 0x0606060606060606
1795 11:44:32.136857 MTRR: Fixed MSR 0x26e 0x0606060606060606
1796 11:44:32.140403 MTRR: Fixed MSR 0x26f 0x0606060606060606
1797 11:44:32.140485
1798 11:44:32.143732 MTRR check
1799 11:44:32.147290 call enable_fixed_mtrr()
1800 11:44:32.147381 Fixed MTRRs : Enabled
1801 11:44:32.150461 Variable MTRRs: Enabled
1802 11:44:32.150553
1803 11:44:32.153677 CPU physical address size: 39 bits
1804 11:44:32.160016 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1805 11:44:32.163344 MTRR: Fixed MSR 0x250 0x0606060606060606
1806 11:44:32.166646 MTRR: Fixed MSR 0x250 0x0606060606060606
1807 11:44:32.173228 MTRR: Fixed MSR 0x258 0x0606060606060606
1808 11:44:32.176563 MTRR: Fixed MSR 0x259 0x0000000000000000
1809 11:44:32.179774 MTRR: Fixed MSR 0x268 0x0606060606060606
1810 11:44:32.183074 MTRR: Fixed MSR 0x269 0x0606060606060606
1811 11:44:32.189474 MTRR: Fixed MSR 0x26a 0x0606060606060606
1812 11:44:32.192727 MTRR: Fixed MSR 0x26b 0x0606060606060606
1813 11:44:32.195967 MTRR: Fixed MSR 0x26c 0x0606060606060606
1814 11:44:32.199332 MTRR: Fixed MSR 0x26d 0x0606060606060606
1815 11:44:32.205508 MTRR: Fixed MSR 0x26e 0x0606060606060606
1816 11:44:32.208702 MTRR: Fixed MSR 0x26f 0x0606060606060606
1817 11:44:32.212322 MTRR: Fixed MSR 0x258 0x0606060606060606
1818 11:44:32.218588 MTRR: Fixed MSR 0x259 0x0000000000000000
1819 11:44:32.221856 MTRR: Fixed MSR 0x268 0x0606060606060606
1820 11:44:32.225113 MTRR: Fixed MSR 0x269 0x0606060606060606
1821 11:44:32.228128 MTRR: Fixed MSR 0x26a 0x0606060606060606
1822 11:44:32.234887 MTRR: Fixed MSR 0x26b 0x0606060606060606
1823 11:44:32.238289 MTRR: Fixed MSR 0x26c 0x0606060606060606
1824 11:44:32.241299 MTRR: Fixed MSR 0x26d 0x0606060606060606
1825 11:44:32.244890 MTRR: Fixed MSR 0x26e 0x0606060606060606
1826 11:44:32.251108 MTRR: Fixed MSR 0x26f 0x0606060606060606
1827 11:44:32.254410 call enable_fixed_mtrr()
1828 11:44:32.254486 call enable_fixed_mtrr()
1829 11:44:32.257569 CPU physical address size: 39 bits
1830 11:44:32.264407 CPU physical address size: 39 bits
1831 11:44:32.267579 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1832 11:44:32.270642 MTRR: Fixed MSR 0x250 0x0606060606060606
1833 11:44:32.277154 MTRR: Fixed MSR 0x250 0x0606060606060606
1834 11:44:32.280452 MTRR: Fixed MSR 0x258 0x0606060606060606
1835 11:44:32.283448 MTRR: Fixed MSR 0x259 0x0000000000000000
1836 11:44:32.287000 MTRR: Fixed MSR 0x268 0x0606060606060606
1837 11:44:32.293158 MTRR: Fixed MSR 0x269 0x0606060606060606
1838 11:44:32.296653 MTRR: Fixed MSR 0x26a 0x0606060606060606
1839 11:44:32.299900 MTRR: Fixed MSR 0x26b 0x0606060606060606
1840 11:44:32.303051 MTRR: Fixed MSR 0x26c 0x0606060606060606
1841 11:44:32.309478 MTRR: Fixed MSR 0x26d 0x0606060606060606
1842 11:44:32.312964 MTRR: Fixed MSR 0x26e 0x0606060606060606
1843 11:44:32.316205 MTRR: Fixed MSR 0x26f 0x0606060606060606
1844 11:44:32.322789 MTRR: Fixed MSR 0x258 0x0606060606060606
1845 11:44:32.322894 call enable_fixed_mtrr()
1846 11:44:32.329095 MTRR: Fixed MSR 0x259 0x0000000000000000
1847 11:44:32.332379 MTRR: Fixed MSR 0x268 0x0606060606060606
1848 11:44:32.335595 MTRR: Fixed MSR 0x269 0x0606060606060606
1849 11:44:32.338894 MTRR: Fixed MSR 0x26a 0x0606060606060606
1850 11:44:32.345366 MTRR: Fixed MSR 0x26b 0x0606060606060606
1851 11:44:32.348716 MTRR: Fixed MSR 0x26c 0x0606060606060606
1852 11:44:32.351780 MTRR: Fixed MSR 0x26d 0x0606060606060606
1853 11:44:32.355277 MTRR: Fixed MSR 0x26e 0x0606060606060606
1854 11:44:32.361823 MTRR: Fixed MSR 0x26f 0x0606060606060606
1855 11:44:32.364697 CPU physical address size: 39 bits
1856 11:44:32.367929 call enable_fixed_mtrr()
1857 11:44:32.371552 CBFS @ c08000 size 3f8000
1858 11:44:32.374739 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1859 11:44:32.377889 CPU physical address size: 39 bits
1860 11:44:32.384504 MTRR: Fixed MSR 0x250 0x0606060606060606
1861 11:44:32.387534 MTRR: Fixed MSR 0x250 0x0606060606060606
1862 11:44:32.390811 MTRR: Fixed MSR 0x258 0x0606060606060606
1863 11:44:32.394268 MTRR: Fixed MSR 0x259 0x0000000000000000
1864 11:44:32.400750 MTRR: Fixed MSR 0x268 0x0606060606060606
1865 11:44:32.403844 MTRR: Fixed MSR 0x269 0x0606060606060606
1866 11:44:32.407426 MTRR: Fixed MSR 0x26a 0x0606060606060606
1867 11:44:32.410708 MTRR: Fixed MSR 0x26b 0x0606060606060606
1868 11:44:32.416866 MTRR: Fixed MSR 0x26c 0x0606060606060606
1869 11:44:32.420336 MTRR: Fixed MSR 0x26d 0x0606060606060606
1870 11:44:32.423492 MTRR: Fixed MSR 0x26e 0x0606060606060606
1871 11:44:32.426711 MTRR: Fixed MSR 0x26f 0x0606060606060606
1872 11:44:32.433128 MTRR: Fixed MSR 0x258 0x0606060606060606
1873 11:44:32.436653 MTRR: Fixed MSR 0x259 0x0000000000000000
1874 11:44:32.439881 MTRR: Fixed MSR 0x268 0x0606060606060606
1875 11:44:32.446351 MTRR: Fixed MSR 0x269 0x0606060606060606
1876 11:44:32.449472 MTRR: Fixed MSR 0x26a 0x0606060606060606
1877 11:44:32.453062 MTRR: Fixed MSR 0x26b 0x0606060606060606
1878 11:44:32.456130 MTRR: Fixed MSR 0x26c 0x0606060606060606
1879 11:44:32.462530 MTRR: Fixed MSR 0x26d 0x0606060606060606
1880 11:44:32.465955 MTRR: Fixed MSR 0x26e 0x0606060606060606
1881 11:44:32.469026 MTRR: Fixed MSR 0x26f 0x0606060606060606
1882 11:44:32.472190 call enable_fixed_mtrr()
1883 11:44:32.475796 call enable_fixed_mtrr()
1884 11:44:32.478969 CPU physical address size: 39 bits
1885 11:44:32.482129 CBFS: Locating 'fallback/payload'
1886 11:44:32.485147 CPU physical address size: 39 bits
1887 11:44:32.488778 CBFS: Found @ offset 1c96c0 size 3f798
1888 11:44:32.491993 Checking segment from ROM address 0xffdd16f8
1889 11:44:32.498520 Checking segment from ROM address 0xffdd1714
1890 11:44:32.501954 Loading segment from ROM address 0xffdd16f8
1891 11:44:32.504900 code (compression=0)
1892 11:44:32.514613 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1893 11:44:32.520930 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1894 11:44:32.524444 it's not compressed!
1895 11:44:32.615950 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1896 11:44:32.622685 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1897 11:44:32.629039 Loading segment from ROM address 0xffdd1714
1898 11:44:32.629125 Entry Point 0x30000000
1899 11:44:32.632459 Loaded segments
1900 11:44:32.638108 Finalizing chipset.
1901 11:44:32.641375 Finalizing SMM.
1902 11:44:32.645054 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1903 11:44:32.647848 mp_park_aps done after 0 msecs.
1904 11:44:32.654337 Jumping to boot code at 30000000(99b62000)
1905 11:44:32.660910 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1906 11:44:32.661011
1907 11:44:32.661077
1908 11:44:32.661138
1909 11:44:32.664330 Starting depthcharge on Helios...
1910 11:44:32.664400
1911 11:44:32.664711 end: 2.2.3 depthcharge-start (duration 00:00:02) [common]
1912 11:44:32.664813 start: 2.2.4 bootloader-commands (timeout 00:04:49) [common]
1913 11:44:32.664898 Setting prompt string to ['hatch:']
1914 11:44:32.664997 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:49)
1915 11:44:32.674011 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1916 11:44:32.674098
1917 11:44:32.680560 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1918 11:44:32.680668
1919 11:44:32.687232 board_setup: Info: eMMC controller not present; skipping
1920 11:44:32.687316
1921 11:44:32.690535 New NVMe Controller 0x30053ac0 @ 00:1d:00
1922 11:44:32.690613
1923 11:44:32.697181 board_setup: Info: SDHCI controller not present; skipping
1924 11:44:32.697270
1925 11:44:32.703534 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1926 11:44:32.703639
1927 11:44:32.703737 Wipe memory regions:
1928 11:44:32.703825
1929 11:44:32.710023 [0x00000000001000, 0x000000000a0000)
1930 11:44:32.710105
1931 11:44:32.713392 [0x00000000100000, 0x00000030000000)
1932 11:44:32.775516
1933 11:44:32.778701 [0x00000030657430, 0x00000099a2c000)
1934 11:44:32.916129
1935 11:44:32.919278 [0x00000100000000, 0x0000045e800000)
1936 11:44:34.302307
1937 11:44:34.302456 R8152: Initializing
1938 11:44:34.302526
1939 11:44:34.305632 Version 9 (ocp_data = 6010)
1940 11:44:34.309897
1941 11:44:34.309974 R8152: Done initializing
1942 11:44:34.310036
1943 11:44:34.313083 Adding net device
1944 11:44:34.945847
1945 11:44:34.945993 R8152: Initializing
1946 11:44:34.946095
1947 11:44:34.949197 Version 6 (ocp_data = 5c30)
1948 11:44:34.949279
1949 11:44:34.952566 R8152: Done initializing
1950 11:44:34.952646
1951 11:44:34.958997 net_add_device: Attemp to include the same device
1952 11:44:34.959077
1953 11:44:34.965753 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
1954 11:44:34.965863
1955 11:44:34.965931
1956 11:44:34.965994
1957 11:44:34.966297 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1959 11:44:35.066651 hatch: tftpboot 192.168.201.1 13627304/tftp-deploy-okz87xvc/kernel/bzImage 13627304/tftp-deploy-okz87xvc/kernel/cmdline 13627304/tftp-deploy-okz87xvc/ramdisk/ramdisk.cpio.gz
1960 11:44:35.066813 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1961 11:44:35.066958 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:47)
1962 11:44:35.071294 tftpboot 192.168.201.1 13627304/tftp-deploy-okz87xvc/kernel/bzIploy-okz87xvc/kernel/cmdline 13627304/tftp-deploy-okz87xvc/ramdisk/ramdisk.cpio.gz
1963 11:44:35.071380
1964 11:44:35.071447 Waiting for link
1965 11:44:35.272087
1966 11:44:35.272269 done.
1967 11:44:35.272337
1968 11:44:35.272397 MAC: 00:24:32:30:7f:7f
1969 11:44:35.272464
1970 11:44:35.275388 Sending DHCP discover... done.
1971 11:44:35.275497
1972 11:44:35.278783 Waiting for reply... done.
1973 11:44:35.278863
1974 11:44:35.283020 Sending DHCP request... done.
1975 11:44:35.283102
1976 11:44:35.288231 Waiting for reply... done.
1977 11:44:35.288325
1978 11:44:35.288390 My ip is 192.168.201.15
1979 11:44:35.288517
1980 11:44:35.291897 The DHCP server ip is 192.168.201.1
1981 11:44:35.291972
1982 11:44:35.298227 TFTP server IP predefined by user: 192.168.201.1
1983 11:44:35.298320
1984 11:44:35.304824 Bootfile predefined by user: 13627304/tftp-deploy-okz87xvc/kernel/bzImage
1985 11:44:35.304952
1986 11:44:35.307982 Sending tftp read request... done.
1987 11:44:35.308055
1988 11:44:35.311123 Waiting for the transfer...
1989 11:44:35.311206
1990 11:44:35.853007 00000000 ################################################################
1991 11:44:35.853143
1992 11:44:36.400174 00080000 ################################################################
1993 11:44:36.400405
1994 11:44:36.949243 00100000 ################################################################
1995 11:44:36.949389
1996 11:44:37.502748 00180000 ################################################################
1997 11:44:37.502896
1998 11:44:38.049973 00200000 ################################################################
1999 11:44:38.050137
2000 11:44:38.617153 00280000 ################################################################
2001 11:44:38.617289
2002 11:44:39.174914 00300000 ################################################################
2003 11:44:39.175052
2004 11:44:39.754906 00380000 ################################################################
2005 11:44:39.755044
2006 11:44:40.319989 00400000 ################################################################
2007 11:44:40.320126
2008 11:44:40.886916 00480000 ################################################################
2009 11:44:40.887057
2010 11:44:41.453231 00500000 ################################################################
2011 11:44:41.453372
2012 11:44:42.026212 00580000 ################################################################
2013 11:44:42.026341
2014 11:44:42.599496 00600000 ################################################################
2015 11:44:42.599631
2016 11:44:43.175245 00680000 ################################################################
2017 11:44:43.175406
2018 11:44:43.751180 00700000 ################################################################
2019 11:44:43.751337
2020 11:44:44.329467 00780000 ################################################################
2021 11:44:44.329615
2022 11:44:44.906438 00800000 ################################################################
2023 11:44:44.906650
2024 11:44:45.496411 00880000 ################################################################
2025 11:44:45.496567
2026 11:44:46.078022 00900000 ################################################################
2027 11:44:46.078165
2028 11:44:46.619803 00980000 ################################################################
2029 11:44:46.619955
2030 11:44:47.177568 00a00000 ################################################################
2031 11:44:47.177708
2032 11:44:47.745627 00a80000 ################################################################
2033 11:44:47.745781
2034 11:44:48.303753 00b00000 ################################################################
2035 11:44:48.303890
2036 11:44:48.872957 00b80000 ################################################################
2037 11:44:48.873103
2038 11:44:49.429715 00c00000 ################################################################
2039 11:44:49.429863
2040 11:44:49.954458 00c80000 ################################################################
2041 11:44:49.954611
2042 11:44:50.430259 00d00000 ######################################################## done.
2043 11:44:50.430409
2044 11:44:50.433755 The bootfile was 14090128 bytes long.
2045 11:44:50.433865
2046 11:44:50.437116 Sending tftp read request... done.
2047 11:44:50.437200
2048 11:44:50.440373 Waiting for the transfer...
2049 11:44:50.440472
2050 11:44:50.992982 00000000 ################################################################
2051 11:44:50.993130
2052 11:44:51.542612 00080000 ################################################################
2053 11:44:51.542751
2054 11:44:52.106619 00100000 ################################################################
2055 11:44:52.106770
2056 11:44:52.650348 00180000 ################################################################
2057 11:44:52.650489
2058 11:44:53.211766 00200000 ################################################################
2059 11:44:53.211926
2060 11:44:53.800293 00280000 ################################################################
2061 11:44:53.800441
2062 11:44:54.364222 00300000 ################################################################
2063 11:44:54.364356
2064 11:44:54.947781 00380000 ################################################################
2065 11:44:54.947941
2066 11:44:55.508357 00400000 ################################################################
2067 11:44:55.508507
2068 11:44:56.054520 00480000 ################################################################
2069 11:44:56.054699
2070 11:44:56.603330 00500000 ################################################################
2071 11:44:56.603533
2072 11:44:57.132058 00580000 ################################################################
2073 11:44:57.132213
2074 11:44:57.684041 00600000 ################################################################
2075 11:44:57.684188
2076 11:44:58.220777 00680000 ################################################################
2077 11:44:58.220925
2078 11:44:58.752355 00700000 ################################################################
2079 11:44:58.752511
2080 11:44:59.288344 00780000 ################################################################
2081 11:44:59.288492
2082 11:44:59.822292 00800000 ################################################################
2083 11:44:59.822441
2084 11:45:00.031595 00880000 ########################## done.
2085 11:45:00.031761
2086 11:45:00.034745 Sending tftp read request... done.
2087 11:45:00.034878
2088 11:45:00.037931 Waiting for the transfer...
2089 11:45:00.038026
2090 11:45:00.038093 00000000 # done.
2091 11:45:00.038157
2092 11:45:00.047996 Command line loaded dynamically from TFTP file: 13627304/tftp-deploy-okz87xvc/kernel/cmdline
2093 11:45:00.048083
2094 11:45:00.067534 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2095 11:45:00.067625
2096 11:45:00.073882 ec_init(0): CrosEC protocol v3 supported (256, 256)
2097 11:45:00.079215
2098 11:45:00.082319 Shutting down all USB controllers.
2099 11:45:00.082402
2100 11:45:00.082516 Removing current net device
2101 11:45:00.086014
2102 11:45:00.086145 Finalizing coreboot
2103 11:45:00.086230
2104 11:45:00.092659 Exiting depthcharge with code 4 at timestamp: 34813662
2105 11:45:00.092741
2106 11:45:00.092844
2107 11:45:00.092934 Starting kernel ...
2108 11:45:00.093383 end: 2.2.4 bootloader-commands (duration 00:00:27) [common]
2109 11:45:00.093483 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
2110 11:45:00.093558 Setting prompt string to ['Linux version [0-9]']
2111 11:45:00.093627 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2112 11:45:00.093694 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2113 11:45:00.095945
2114 11:45:00.096028
2116 11:49:22.094419 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
2118 11:49:22.095431 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
2120 11:49:22.096479 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2123 11:49:22.097969 end: 2 depthcharge-action (duration 00:05:00) [common]
2125 11:49:22.099039 Cleaning after the job
2126 11:49:22.099461 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13627304/tftp-deploy-okz87xvc/ramdisk
2127 11:49:22.104055 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13627304/tftp-deploy-okz87xvc/kernel
2128 11:49:22.111074 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13627304/tftp-deploy-okz87xvc/modules
2129 11:49:22.112866 start: 4.1 power-off (timeout 00:00:30) [common]
2130 11:49:22.113731 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-2' '--port=1' '--command=off'
2131 11:49:22.970558 >> Command sent successfully.
2132 11:49:22.980735 Returned 0 in 0 seconds
2133 11:49:23.082039 end: 4.1 power-off (duration 00:00:01) [common]
2135 11:49:23.083634 start: 4.2 read-feedback (timeout 00:09:59) [common]
2136 11:49:23.084996 Listened to connection for namespace 'common' for up to 1s
2138 11:49:23.086336 Listened to connection for namespace 'common' for up to 1s
2139 11:49:23.087202 Listened to connection for namespace 'common' for up to 1s
2140 11:49:23.088104 Listened to connection for namespace 'common' for up to 1s
2141 11:49:23.091118 Listened to connection for namespace 'common' for up to 1s
2142 11:49:23.094332 Listened to connection for namespace 'common' for up to 1s
2143 11:49:23.097590 Listened to connection for namespace 'common' for up to 1s
2144 11:49:23.100880 Listened to connection for namespace 'common' for up to 1s
2145 11:49:23.104453 Listened to connection for namespace 'common' for up to 1s
2146 11:49:23.107389 Listened to connection for namespace 'common' for up to 1s
2147 11:49:23.110769 Listened to connection for namespace 'common' for up to 1s
2148 11:49:23.114047 Listened to connection for namespace 'common' for up to 1s
2149 11:49:23.117766 Listened to connection for namespace 'common' for up to 1s
2150 11:49:23.120812 Listened to connection for namespace 'common' for up to 1s
2151 11:49:23.124172 Listened to connection for namespace 'common' for up to 1s
2152 11:49:23.128250 Listened to connection for namespace 'common' for up to 1s
2153 11:49:23.130309 Listened to connection for namespace 'common' for up to 1s
2154 11:49:23.133858 Listened to connection for namespace 'common' for up to 1s
2155 11:49:23.136872 Listened to connection for namespace 'common' for up to 1s
2156 11:49:23.140056 Listened to connection for namespace 'common' for up to 1s
2157 11:49:23.143350 Listened to connection for namespace 'common' for up to 1s
2158 11:49:23.146639 Listened to connection for namespace 'common' for up to 1s
2159 11:49:23.150063 Listened to connection for namespace 'common' for up to 1s
2160 11:49:23.153364 Listened to connection for namespace 'common' for up to 1s
2161 11:49:23.156546 Listened to connection for namespace 'common' for up to 1s
2162 11:49:23.159942 Listened to connection for namespace 'common' for up to 1s
2163 11:49:23.162875 Listened to connection for namespace 'common' for up to 1s
2164 11:49:23.166376 Listened to connection for namespace 'common' for up to 1s
2165 11:49:23.169509 Listened to connection for namespace 'common' for up to 1s
2166 11:49:23.175280 Listened to connection for namespace 'common' for up to 1s
2167 11:49:23.178382 Listened to connection for namespace 'common' for up to 1s
2168 11:49:24.085181 Finalising connection for namespace 'common'
2169 11:49:24.085796 Disconnecting from shell: Finalise
2170 11:49:24.086169
2171 11:49:24.187791 end: 4.2 read-feedback (duration 00:00:01) [common]
2172 11:49:24.188561 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13627304
2173 11:49:24.237562 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13627304
2174 11:49:24.237801 JobError: Your job cannot terminate cleanly.