Boot log: acer-cbv514-1h-34uz-brya
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 11:44:40.640868 lava-dispatcher, installed at version: 2024.01
2 11:44:40.641082 start: 0 validate
3 11:44:40.641210 Start time: 2024-05-03 11:44:40.641202+00:00 (UTC)
4 11:44:40.641340 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:44:40.641467 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Famd64%2Finitrd.cpio.gz exists
6 11:44:40.903117 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:44:40.903981 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2481-gef9c8224c1829%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:44:41.164715 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:44:41.165577 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 11:44:44.643615 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:44:44.643832 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2481-gef9c8224c1829%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 11:44:45.644473 validate duration: 5.00
14 11:44:45.644750 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 11:44:45.644851 start: 1.1 download-retry (timeout 00:10:00) [common]
16 11:44:45.644938 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 11:44:45.645059 Not decompressing ramdisk as can be used compressed.
18 11:44:45.645142 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/amd64/initrd.cpio.gz
19 11:44:45.645205 saving as /var/lib/lava/dispatcher/tmp/13627374/tftp-deploy-ant0q1sl/ramdisk/initrd.cpio.gz
20 11:44:45.645268 total size: 6137767 (5 MB)
21 11:44:45.646432 progress 0 % (0 MB)
22 11:44:45.648405 progress 5 % (0 MB)
23 11:44:45.649943 progress 10 % (0 MB)
24 11:44:45.651668 progress 15 % (0 MB)
25 11:44:45.653237 progress 20 % (1 MB)
26 11:44:45.655006 progress 25 % (1 MB)
27 11:44:45.656689 progress 30 % (1 MB)
28 11:44:45.658233 progress 35 % (2 MB)
29 11:44:45.659882 progress 40 % (2 MB)
30 11:44:45.661781 progress 45 % (2 MB)
31 11:44:45.663371 progress 50 % (2 MB)
32 11:44:45.665238 progress 55 % (3 MB)
33 11:44:45.666983 progress 60 % (3 MB)
34 11:44:45.668626 progress 65 % (3 MB)
35 11:44:45.670303 progress 70 % (4 MB)
36 11:44:45.671854 progress 75 % (4 MB)
37 11:44:45.673377 progress 80 % (4 MB)
38 11:44:45.675095 progress 85 % (5 MB)
39 11:44:45.676614 progress 90 % (5 MB)
40 11:44:45.678125 progress 95 % (5 MB)
41 11:44:45.679914 progress 100 % (5 MB)
42 11:44:45.680061 5 MB downloaded in 0.03 s (168.24 MB/s)
43 11:44:45.680218 end: 1.1.1 http-download (duration 00:00:00) [common]
45 11:44:45.680462 end: 1.1 download-retry (duration 00:00:00) [common]
46 11:44:45.680552 start: 1.2 download-retry (timeout 00:10:00) [common]
47 11:44:45.680636 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 11:44:45.680763 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2481-gef9c8224c1829/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 11:44:45.680840 saving as /var/lib/lava/dispatcher/tmp/13627374/tftp-deploy-ant0q1sl/kernel/bzImage
50 11:44:45.680905 total size: 14090128 (13 MB)
51 11:44:45.680967 No compression specified
52 11:44:45.682217 progress 0 % (0 MB)
53 11:44:45.686287 progress 5 % (0 MB)
54 11:44:45.689854 progress 10 % (1 MB)
55 11:44:45.693843 progress 15 % (2 MB)
56 11:44:45.697653 progress 20 % (2 MB)
57 11:44:45.701323 progress 25 % (3 MB)
58 11:44:45.705218 progress 30 % (4 MB)
59 11:44:45.709128 progress 35 % (4 MB)
60 11:44:45.712741 progress 40 % (5 MB)
61 11:44:45.716460 progress 45 % (6 MB)
62 11:44:45.719935 progress 50 % (6 MB)
63 11:44:45.723584 progress 55 % (7 MB)
64 11:44:45.727205 progress 60 % (8 MB)
65 11:44:45.730841 progress 65 % (8 MB)
66 11:44:45.734280 progress 70 % (9 MB)
67 11:44:45.737922 progress 75 % (10 MB)
68 11:44:45.741453 progress 80 % (10 MB)
69 11:44:45.745213 progress 85 % (11 MB)
70 11:44:45.748733 progress 90 % (12 MB)
71 11:44:45.752420 progress 95 % (12 MB)
72 11:44:45.755987 progress 100 % (13 MB)
73 11:44:45.756233 13 MB downloaded in 0.08 s (178.39 MB/s)
74 11:44:45.756381 end: 1.2.1 http-download (duration 00:00:00) [common]
76 11:44:45.756613 end: 1.2 download-retry (duration 00:00:00) [common]
77 11:44:45.756706 start: 1.3 download-retry (timeout 00:10:00) [common]
78 11:44:45.756794 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 11:44:45.756929 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/amd64/full.rootfs.tar.xz
80 11:44:45.756998 saving as /var/lib/lava/dispatcher/tmp/13627374/tftp-deploy-ant0q1sl/nfsrootfs/full.rootfs.tar
81 11:44:45.757058 total size: 116951716 (111 MB)
82 11:44:45.757124 Using unxz to decompress xz
83 11:44:45.761407 progress 0 % (0 MB)
84 11:44:46.056333 progress 5 % (5 MB)
85 11:44:46.388279 progress 10 % (11 MB)
86 11:44:46.710117 progress 15 % (16 MB)
87 11:44:47.038704 progress 20 % (22 MB)
88 11:44:47.325908 progress 25 % (27 MB)
89 11:44:47.638625 progress 30 % (33 MB)
90 11:44:47.935488 progress 35 % (39 MB)
91 11:44:48.098655 progress 40 % (44 MB)
92 11:44:48.353634 progress 45 % (50 MB)
93 11:44:48.688444 progress 50 % (55 MB)
94 11:44:48.969090 progress 55 % (61 MB)
95 11:44:49.308906 progress 60 % (66 MB)
96 11:44:49.648012 progress 65 % (72 MB)
97 11:44:49.986380 progress 70 % (78 MB)
98 11:44:50.340433 progress 75 % (83 MB)
99 11:44:50.661275 progress 80 % (89 MB)
100 11:44:50.978246 progress 85 % (94 MB)
101 11:44:51.304927 progress 90 % (100 MB)
102 11:44:51.625103 progress 95 % (105 MB)
103 11:44:51.968171 progress 100 % (111 MB)
104 11:44:51.972871 111 MB downloaded in 6.22 s (17.94 MB/s)
105 11:44:51.973155 end: 1.3.1 http-download (duration 00:00:06) [common]
107 11:44:51.973417 end: 1.3 download-retry (duration 00:00:06) [common]
108 11:44:51.973505 start: 1.4 download-retry (timeout 00:09:54) [common]
109 11:44:51.973595 start: 1.4.1 http-download (timeout 00:09:54) [common]
110 11:44:51.973745 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2481-gef9c8224c1829/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 11:44:51.973817 saving as /var/lib/lava/dispatcher/tmp/13627374/tftp-deploy-ant0q1sl/modules/modules.tar
112 11:44:51.973879 total size: 484648 (0 MB)
113 11:44:51.973941 Using unxz to decompress xz
114 11:44:51.978205 progress 6 % (0 MB)
115 11:44:51.978657 progress 13 % (0 MB)
116 11:44:51.978903 progress 20 % (0 MB)
117 11:44:51.980509 progress 27 % (0 MB)
118 11:44:51.982255 progress 33 % (0 MB)
119 11:44:51.984288 progress 40 % (0 MB)
120 11:44:51.986051 progress 47 % (0 MB)
121 11:44:51.987765 progress 54 % (0 MB)
122 11:44:51.989547 progress 60 % (0 MB)
123 11:44:51.991227 progress 67 % (0 MB)
124 11:44:51.992958 progress 74 % (0 MB)
125 11:44:51.994920 progress 81 % (0 MB)
126 11:44:51.996597 progress 87 % (0 MB)
127 11:44:51.998440 progress 94 % (0 MB)
128 11:44:52.000182 progress 100 % (0 MB)
129 11:44:52.005759 0 MB downloaded in 0.03 s (14.50 MB/s)
130 11:44:52.005991 end: 1.4.1 http-download (duration 00:00:00) [common]
132 11:44:52.006249 end: 1.4 download-retry (duration 00:00:00) [common]
133 11:44:52.006339 start: 1.5 prepare-tftp-overlay (timeout 00:09:54) [common]
134 11:44:52.006433 start: 1.5.1 extract-nfsrootfs (timeout 00:09:54) [common]
135 11:44:54.025707 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/13627374/extract-nfsrootfs-zmhz5cd6
136 11:44:54.025907 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
137 11:44:54.026023 start: 1.5.2 lava-overlay (timeout 00:09:52) [common]
138 11:44:54.026206 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13627374/lava-overlay-cb61wm4p
139 11:44:54.026354 makedir: /var/lib/lava/dispatcher/tmp/13627374/lava-overlay-cb61wm4p/lava-13627374/bin
140 11:44:54.026507 makedir: /var/lib/lava/dispatcher/tmp/13627374/lava-overlay-cb61wm4p/lava-13627374/tests
141 11:44:54.026626 makedir: /var/lib/lava/dispatcher/tmp/13627374/lava-overlay-cb61wm4p/lava-13627374/results
142 11:44:54.026742 Creating /var/lib/lava/dispatcher/tmp/13627374/lava-overlay-cb61wm4p/lava-13627374/bin/lava-add-keys
143 11:44:54.026903 Creating /var/lib/lava/dispatcher/tmp/13627374/lava-overlay-cb61wm4p/lava-13627374/bin/lava-add-sources
144 11:44:54.027078 Creating /var/lib/lava/dispatcher/tmp/13627374/lava-overlay-cb61wm4p/lava-13627374/bin/lava-background-process-start
145 11:44:54.027250 Creating /var/lib/lava/dispatcher/tmp/13627374/lava-overlay-cb61wm4p/lava-13627374/bin/lava-background-process-stop
146 11:44:54.027394 Creating /var/lib/lava/dispatcher/tmp/13627374/lava-overlay-cb61wm4p/lava-13627374/bin/lava-common-functions
147 11:44:54.027541 Creating /var/lib/lava/dispatcher/tmp/13627374/lava-overlay-cb61wm4p/lava-13627374/bin/lava-echo-ipv4
148 11:44:54.027688 Creating /var/lib/lava/dispatcher/tmp/13627374/lava-overlay-cb61wm4p/lava-13627374/bin/lava-install-packages
149 11:44:54.027855 Creating /var/lib/lava/dispatcher/tmp/13627374/lava-overlay-cb61wm4p/lava-13627374/bin/lava-installed-packages
150 11:44:54.027998 Creating /var/lib/lava/dispatcher/tmp/13627374/lava-overlay-cb61wm4p/lava-13627374/bin/lava-os-build
151 11:44:54.028158 Creating /var/lib/lava/dispatcher/tmp/13627374/lava-overlay-cb61wm4p/lava-13627374/bin/lava-probe-channel
152 11:44:54.028330 Creating /var/lib/lava/dispatcher/tmp/13627374/lava-overlay-cb61wm4p/lava-13627374/bin/lava-probe-ip
153 11:44:54.028497 Creating /var/lib/lava/dispatcher/tmp/13627374/lava-overlay-cb61wm4p/lava-13627374/bin/lava-target-ip
154 11:44:54.028641 Creating /var/lib/lava/dispatcher/tmp/13627374/lava-overlay-cb61wm4p/lava-13627374/bin/lava-target-mac
155 11:44:54.028783 Creating /var/lib/lava/dispatcher/tmp/13627374/lava-overlay-cb61wm4p/lava-13627374/bin/lava-target-storage
156 11:44:54.028931 Creating /var/lib/lava/dispatcher/tmp/13627374/lava-overlay-cb61wm4p/lava-13627374/bin/lava-test-case
157 11:44:54.029103 Creating /var/lib/lava/dispatcher/tmp/13627374/lava-overlay-cb61wm4p/lava-13627374/bin/lava-test-event
158 11:44:54.029270 Creating /var/lib/lava/dispatcher/tmp/13627374/lava-overlay-cb61wm4p/lava-13627374/bin/lava-test-feedback
159 11:44:54.029413 Creating /var/lib/lava/dispatcher/tmp/13627374/lava-overlay-cb61wm4p/lava-13627374/bin/lava-test-raise
160 11:44:54.029557 Creating /var/lib/lava/dispatcher/tmp/13627374/lava-overlay-cb61wm4p/lava-13627374/bin/lava-test-reference
161 11:44:54.029703 Creating /var/lib/lava/dispatcher/tmp/13627374/lava-overlay-cb61wm4p/lava-13627374/bin/lava-test-runner
162 11:44:54.029871 Creating /var/lib/lava/dispatcher/tmp/13627374/lava-overlay-cb61wm4p/lava-13627374/bin/lava-test-set
163 11:44:54.030055 Creating /var/lib/lava/dispatcher/tmp/13627374/lava-overlay-cb61wm4p/lava-13627374/bin/lava-test-shell
164 11:44:54.030200 Updating /var/lib/lava/dispatcher/tmp/13627374/lava-overlay-cb61wm4p/lava-13627374/bin/lava-install-packages (oe)
165 11:44:54.030373 Updating /var/lib/lava/dispatcher/tmp/13627374/lava-overlay-cb61wm4p/lava-13627374/bin/lava-installed-packages (oe)
166 11:44:54.030607 Creating /var/lib/lava/dispatcher/tmp/13627374/lava-overlay-cb61wm4p/lava-13627374/environment
167 11:44:54.030745 LAVA metadata
168 11:44:54.030827 - LAVA_JOB_ID=13627374
169 11:44:54.030915 - LAVA_DISPATCHER_IP=192.168.201.1
170 11:44:54.031054 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:52) [common]
171 11:44:54.031150 skipped lava-vland-overlay
172 11:44:54.031257 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 11:44:54.031367 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:52) [common]
174 11:44:54.031457 skipped lava-multinode-overlay
175 11:44:54.031566 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 11:44:54.031670 start: 1.5.2.3 test-definition (timeout 00:09:52) [common]
177 11:44:54.031764 Loading test definitions
178 11:44:54.031875 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:52) [common]
179 11:44:54.031986 Using /lava-13627374 at stage 0
180 11:44:54.032392 uuid=13627374_1.5.2.3.1 testdef=None
181 11:44:54.032518 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
182 11:44:54.032622 start: 1.5.2.3.2 test-overlay (timeout 00:09:52) [common]
183 11:44:54.033337 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
185 11:44:54.033618 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:52) [common]
186 11:44:54.034273 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
188 11:44:54.034585 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:52) [common]
189 11:44:54.035513 runner path: /var/lib/lava/dispatcher/tmp/13627374/lava-overlay-cb61wm4p/lava-13627374/0/tests/0_dmesg test_uuid 13627374_1.5.2.3.1
190 11:44:54.035713 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
192 11:44:54.036039 Creating lava-test-runner.conf files
193 11:44:54.036124 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13627374/lava-overlay-cb61wm4p/lava-13627374/0 for stage 0
194 11:44:54.036242 - 0_dmesg
195 11:44:54.036354 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
196 11:44:54.036454 start: 1.5.2.4 compress-overlay (timeout 00:09:52) [common]
197 11:44:54.042815 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
198 11:44:54.042928 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:52) [common]
199 11:44:54.043030 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
200 11:44:54.043132 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
201 11:44:54.043233 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:52) [common]
202 11:44:54.195286 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
203 11:44:54.195678 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
204 11:44:54.195811 extracting modules file /var/lib/lava/dispatcher/tmp/13627374/tftp-deploy-ant0q1sl/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13627374/extract-nfsrootfs-zmhz5cd6
205 11:44:54.210881 extracting modules file /var/lib/lava/dispatcher/tmp/13627374/tftp-deploy-ant0q1sl/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13627374/extract-overlay-ramdisk-m4kcpj3b/ramdisk
206 11:44:54.225573 end: 1.5.4 extract-modules (duration 00:00:00) [common]
207 11:44:54.225713 start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
208 11:44:54.225819 [common] Applying overlay to NFS
209 11:44:54.225901 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13627374/compress-overlay-o_73jffj/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13627374/extract-nfsrootfs-zmhz5cd6
210 11:44:54.232516 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
211 11:44:54.232638 start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
212 11:44:54.232743 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
213 11:44:54.232846 start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
214 11:44:54.232941 Building ramdisk /var/lib/lava/dispatcher/tmp/13627374/extract-overlay-ramdisk-m4kcpj3b/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13627374/extract-overlay-ramdisk-m4kcpj3b/ramdisk
215 11:44:54.319382 >> 32557 blocks
216 11:44:55.016886 rename /var/lib/lava/dispatcher/tmp/13627374/extract-overlay-ramdisk-m4kcpj3b/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13627374/tftp-deploy-ant0q1sl/ramdisk/ramdisk.cpio.gz
217 11:44:55.017312 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
218 11:44:55.017444 start: 1.5.8 prepare-kernel (timeout 00:09:51) [common]
219 11:44:55.017547 start: 1.5.8.1 prepare-fit (timeout 00:09:51) [common]
220 11:44:55.017640 No mkimage arch provided, not using FIT.
221 11:44:55.017730 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
222 11:44:55.017811 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
223 11:44:55.017910 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
224 11:44:55.018004 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:51) [common]
225 11:44:55.018084 No LXC device requested
226 11:44:55.018162 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
227 11:44:55.018249 start: 1.7 deploy-device-env (timeout 00:09:51) [common]
228 11:44:55.018340 end: 1.7 deploy-device-env (duration 00:00:00) [common]
229 11:44:55.018408 Checking files for TFTP limit of 4294967296 bytes.
230 11:44:55.018872 end: 1 tftp-deploy (duration 00:00:09) [common]
231 11:44:55.018976 start: 2 depthcharge-action (timeout 00:05:00) [common]
232 11:44:55.019067 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
233 11:44:55.019195 substitutions:
234 11:44:55.019417 - {DTB}: None
235 11:44:55.019483 - {INITRD}: 13627374/tftp-deploy-ant0q1sl/ramdisk/ramdisk.cpio.gz
236 11:44:55.019557 - {KERNEL}: 13627374/tftp-deploy-ant0q1sl/kernel/bzImage
237 11:44:55.019620 - {LAVA_MAC}: None
238 11:44:55.019683 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/13627374/extract-nfsrootfs-zmhz5cd6
239 11:44:55.019740 - {NFS_SERVER_IP}: 192.168.201.1
240 11:44:55.019798 - {PRESEED_CONFIG}: None
241 11:44:55.019853 - {PRESEED_LOCAL}: None
242 11:44:55.019908 - {RAMDISK}: 13627374/tftp-deploy-ant0q1sl/ramdisk/ramdisk.cpio.gz
243 11:44:55.019962 - {ROOT_PART}: None
244 11:44:55.020016 - {ROOT}: None
245 11:44:55.020070 - {SERVER_IP}: 192.168.201.1
246 11:44:55.020125 - {TEE}: None
247 11:44:55.020178 Parsed boot commands:
248 11:44:55.020233 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
249 11:44:55.020412 Parsed boot commands: tftpboot 192.168.201.1 13627374/tftp-deploy-ant0q1sl/kernel/bzImage 13627374/tftp-deploy-ant0q1sl/kernel/cmdline 13627374/tftp-deploy-ant0q1sl/ramdisk/ramdisk.cpio.gz
250 11:44:55.020501 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
251 11:44:55.020582 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
252 11:44:55.020670 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
253 11:44:55.020752 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
254 11:44:55.020824 Not connected, no need to disconnect.
255 11:44:55.020897 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
256 11:44:55.020979 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
257 11:44:55.021048 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-4'
258 11:44:55.024857 Setting prompt string to ['lava-test: # ']
259 11:44:55.025204 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
260 11:44:55.025314 end: 2.2.1 reset-connection (duration 00:00:00) [common]
261 11:44:55.025421 start: 2.2.2 reset-device (timeout 00:05:00) [common]
262 11:44:55.025513 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
263 11:44:55.025706 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-4' '--port=1' '--command=reboot'
264 11:45:00.171817 >> Command sent successfully.
265 11:45:00.182356 Returned 0 in 5 seconds
266 11:45:00.283577 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
268 11:45:00.284350 end: 2.2.2 reset-device (duration 00:00:05) [common]
269 11:45:00.284727 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
270 11:45:00.285067 Setting prompt string to 'Starting depthcharge on Volmar...'
271 11:45:00.285363 Changing prompt to 'Starting depthcharge on Volmar...'
272 11:45:00.285562 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
273 11:45:00.286208 [Enter `^Ec?' for help]
274 11:45:01.651571
275 11:45:01.652280
276 11:45:01.659332 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
277 11:45:01.663053 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
278 11:45:01.666837 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
279 11:45:01.674705 CPU: AES supported, TXT NOT supported, VT supported
280 11:45:01.681847 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
281 11:45:01.682389 Cache size = 10 MiB
282 11:45:01.689279 MCH: device id 4609 (rev 04) is Alderlake-P
283 11:45:01.692740 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
284 11:45:01.696476 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
285 11:45:01.699668 VBOOT: Loading verstage.
286 11:45:01.703438 FMAP: Found "FLASH" version 1.1 at 0x1804000.
287 11:45:01.709744 FMAP: base = 0x0 size = 0x2000000 #areas = 37
288 11:45:01.713077 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
289 11:45:01.723998 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
290 11:45:01.730578 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
291 11:45:01.730665
292 11:45:01.730730
293 11:45:01.740107 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
294 11:45:01.744037 Probing TPM I2C: I2C bus 1 version 0x3230302a
295 11:45:01.747849 DW I2C bus 1 at 0xfe022000 (400 KHz)
296 11:45:01.750646 I2C TX abort detected (00000001)
297 11:45:01.754327 cr50_i2c_read: Address write failed
298 11:45:01.767515 .done! DID_VID 0x00281ae0
299 11:45:01.771459 TPM ready after 0 ms
300 11:45:01.774249 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
301 11:45:01.788305 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
302 11:45:01.794393 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
303 11:45:01.846291 tlcl_send_startup: Startup return code is 0
304 11:45:01.846806 TPM: setup succeeded
305 11:45:01.868873 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
306 11:45:01.891169 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
307 11:45:01.895475 Chrome EC: UHEPI supported
308 11:45:01.898940 Reading cr50 boot mode
309 11:45:01.914707 Cr50 says boot_mode is VERIFIED_RW(0x00).
310 11:45:01.915141 Phase 1
311 11:45:01.917995 FMAP: area GBB found @ 1805000 (458752 bytes)
312 11:45:01.925049 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
313 11:45:01.935687 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
314 11:45:01.942064 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
315 11:45:01.942520 Phase 2
316 11:45:01.942866 Phase 3
317 11:45:01.948685 FMAP: area GBB found @ 1805000 (458752 bytes)
318 11:45:01.951981 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
319 11:45:01.958434 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
320 11:45:01.965227 VB2:vb2_verify_keyblock() Checking keyblock signature...
321 11:45:01.969189 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
322 11:45:01.976977 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
323 11:45:01.987145 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
324 11:45:01.998803 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
325 11:45:02.002156 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
326 11:45:02.009168 VB2:vb2_verify_fw_preamble() Verifying preamble.
327 11:45:02.016005 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
328 11:45:02.022536 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
329 11:45:02.028561 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
330 11:45:02.032961 Phase 4
331 11:45:02.035741 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
332 11:45:02.042547 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
333 11:45:02.255186 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
334 11:45:02.261452 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
335 11:45:02.265346 Saving vboot hash.
336 11:45:02.271656 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
337 11:45:02.287715 tlcl_extend: response is 0
338 11:45:02.294332 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
339 11:45:02.300846 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
340 11:45:02.315079 tlcl_extend: response is 0
341 11:45:02.321797 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
342 11:45:02.342322 tlcl_lock_nv_write: response is 0
343 11:45:02.360919 tlcl_lock_nv_write: response is 0
344 11:45:02.361469 Slot A is selected
345 11:45:02.367882 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
346 11:45:02.374756 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
347 11:45:02.381233 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
348 11:45:02.387812 BS: verstage times (exec / console): total (unknown) / 264 ms
349 11:45:02.388347
350 11:45:02.388702
351 11:45:02.394073 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
352 11:45:02.398650 Google Chrome EC: version:
353 11:45:02.401968 ro: volmar_v2.0.14126-e605144e9c
354 11:45:02.405595 rw: volmar_v0.0.55-22d1557
355 11:45:02.408679 running image: 2
356 11:45:02.412050 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
357 11:45:02.421949 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
358 11:45:02.428566 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
359 11:45:02.435333 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
360 11:45:02.445303 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
361 11:45:02.454911 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
362 11:45:02.458375 EC took 941us to calculate image hash
363 11:45:02.467829 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
364 11:45:02.474763 VB2:sync_ec() select_rw=RW(active)
365 11:45:02.483689 Waited 270us to clear limit power flag.
366 11:45:02.486787 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
367 11:45:02.490125 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
368 11:45:02.493630 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
369 11:45:02.500334 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
370 11:45:02.503501 gpe0_sts[3]: 00000000 gpe0_en[3]: 00080000
371 11:45:02.506770 TCO_STS: 0000 0000
372 11:45:02.507207 GEN_PMCON: d0015038 00002200
373 11:45:02.509953 GBLRST_CAUSE: 00000000 00000000
374 11:45:02.513507 HPR_CAUSE0: 00000000
375 11:45:02.516213 prev_sleep_state 5
376 11:45:02.520190 Abort disabling TXT, as CPU is not TXT capable.
377 11:45:02.527694 cse_lite: Number of partitions = 3
378 11:45:02.531437 cse_lite: Current partition = RO
379 11:45:02.531869 cse_lite: Next partition = RO
380 11:45:02.534685 cse_lite: Flags = 0x7
381 11:45:02.541599 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
382 11:45:02.550916 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
383 11:45:02.554476 FMAP: area SI_ME found @ 1000 (5238784 bytes)
384 11:45:02.560907 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
385 11:45:02.568028 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
386 11:45:02.574641 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
387 11:45:02.577709 cse_lite: CSE CBFS RW version : 16.1.25.2049
388 11:45:02.584111 cse_lite: Set Boot Partition Info Command (RW)
389 11:45:02.587402 HECI: Global Reset(Type:1) Command
390 11:45:03.998152
391 11:45:03.998660
392 11:45:04.004766 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
393 11:45:04.008561 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
394 11:45:04.015118 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
395 11:45:04.018724 CPU: AES supported, TXT NOT supported, VT supported
396 11:45:04.028753 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
397 11:45:04.029252 Cache size = 10 MiB
398 11:45:04.035499 MCH: device id 4609 (rev 04) is Alderlake-P
399 11:45:04.039033 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
400 11:45:04.045324 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
401 11:45:04.045789 VBOOT: Loading verstage.
402 11:45:04.053106 FMAP: Found "FLASH" version 1.1 at 0x1804000.
403 11:45:04.055945 FMAP: base = 0x0 size = 0x2000000 #areas = 37
404 11:45:04.059732 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
405 11:45:04.070276 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
406 11:45:04.077367 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
407 11:45:04.077810
408 11:45:04.078151
409 11:45:04.086891 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
410 11:45:04.093494 Probing TPM I2C: I2C bus 1 version 0x3230302a
411 11:45:04.097273 DW I2C bus 1 at 0xfe022000 (400 KHz)
412 11:45:04.100061 done! DID_VID 0x00281ae0
413 11:45:04.100498 TPM ready after 0 ms
414 11:45:04.103860 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
415 11:45:04.118201 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
416 11:45:04.122119 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
417 11:45:04.177383 tlcl_send_startup: Startup return code is 0
418 11:45:04.177882 TPM: setup succeeded
419 11:45:04.197152 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
420 11:45:04.218866 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
421 11:45:04.222647 Chrome EC: UHEPI supported
422 11:45:04.226731 Reading cr50 boot mode
423 11:45:04.241090 Cr50 says boot_mode is VERIFIED_RW(0x00).
424 11:45:04.241764 Phase 1
425 11:45:04.247340 FMAP: area GBB found @ 1805000 (458752 bytes)
426 11:45:04.253890 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
427 11:45:04.260868 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
428 11:45:04.266975 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
429 11:45:04.270617 Phase 2
430 11:45:04.271111 Phase 3
431 11:45:04.273679 FMAP: area GBB found @ 1805000 (458752 bytes)
432 11:45:04.280749 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
433 11:45:04.283816 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
434 11:45:04.290644 VB2:vb2_verify_keyblock() Checking keyblock signature...
435 11:45:04.297237 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
436 11:45:04.306945 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
437 11:45:04.313641 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
438 11:45:04.326155 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
439 11:45:04.329634 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
440 11:45:04.335782 VB2:vb2_verify_fw_preamble() Verifying preamble.
441 11:45:04.342501 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
442 11:45:04.349319 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
443 11:45:04.355823 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
444 11:45:04.360435 Phase 4
445 11:45:04.363239 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
446 11:45:04.369897 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
447 11:45:04.582649 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
448 11:45:04.589484 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
449 11:45:04.592257 Saving vboot hash.
450 11:45:04.599039 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
451 11:45:04.615483 tlcl_extend: response is 0
452 11:45:04.622223 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
453 11:45:04.628717 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
454 11:45:04.643315 tlcl_extend: response is 0
455 11:45:04.649520 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
456 11:45:04.668444 tlcl_lock_nv_write: response is 0
457 11:45:04.687404 tlcl_lock_nv_write: response is 0
458 11:45:04.687914 Slot A is selected
459 11:45:04.694301 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
460 11:45:04.700795 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
461 11:45:04.707295 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
462 11:45:04.714298 BS: verstage times (exec / console): total (unknown) / 257 ms
463 11:45:04.714770
464 11:45:04.715219
465 11:45:04.720742 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
466 11:45:04.724479 Google Chrome EC: version:
467 11:45:04.728145 ro: volmar_v2.0.14126-e605144e9c
468 11:45:04.731651 rw: volmar_v0.0.55-22d1557
469 11:45:04.734982 running image: 2
470 11:45:04.738052 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
471 11:45:04.748229 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
472 11:45:04.754297 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
473 11:45:04.761154 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
474 11:45:04.771194 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
475 11:45:04.781622 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
476 11:45:04.784413 EC took 941us to calculate image hash
477 11:45:04.794226 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
478 11:45:04.798027 VB2:sync_ec() select_rw=RW(active)
479 11:45:04.815115 Waited 270us to clear limit power flag.
480 11:45:04.822203 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
481 11:45:04.825158 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
482 11:45:04.828819 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
483 11:45:04.835425 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
484 11:45:04.838547 gpe0_sts[3]: 00000000 gpe0_en[3]: 00080000
485 11:45:04.842091 TCO_STS: 0000 0000
486 11:45:04.842725 GEN_PMCON: d1001038 00002200
487 11:45:04.845464 GBLRST_CAUSE: 00000040 00000000
488 11:45:04.848317 HPR_CAUSE0: 00000000
489 11:45:04.851920 prev_sleep_state 5
490 11:45:04.855080 Abort disabling TXT, as CPU is not TXT capable.
491 11:45:04.863281 cse_lite: Number of partitions = 3
492 11:45:04.866518 cse_lite: Current partition = RW
493 11:45:04.866968 cse_lite: Next partition = RW
494 11:45:04.870728 cse_lite: Flags = 0x7
495 11:45:04.877070 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
496 11:45:04.887527 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
497 11:45:04.890292 FMAP: area SI_ME found @ 1000 (5238784 bytes)
498 11:45:04.897491 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
499 11:45:04.904009 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
500 11:45:04.910064 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
501 11:45:04.913577 cse_lite: CSE CBFS RW version : 16.1.25.2049
502 11:45:04.917228 Boot Count incremented to 7681
503 11:45:04.923773 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
504 11:45:04.930622 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
505 11:45:04.943008 Probing TPM I2C: done! DID_VID 0x00281ae0
506 11:45:04.946300 Locality already claimed
507 11:45:04.949724 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
508 11:45:04.968945 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
509 11:45:04.975486 MRC: Hash idx 0x100d comparison successful.
510 11:45:04.978977 MRC cache found, size f6c8
511 11:45:04.979424 bootmode is set to: 2
512 11:45:04.982224 EC returned error result code 3
513 11:45:04.985695 FW_CONFIG value from CBI is 0x131
514 11:45:04.992216 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
515 11:45:04.995827 SPD index = 0
516 11:45:05.002378 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
517 11:45:05.002867 SPD: module type is LPDDR4X
518 11:45:05.010277 SPD: module part number is K4U6E3S4AB-MGCL
519 11:45:05.016706 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
520 11:45:05.019736 SPD: device width 16 bits, bus width 16 bits
521 11:45:05.023315 SPD: module size is 1024 MB (per channel)
522 11:45:05.092155 CBMEM:
523 11:45:05.095587 IMD: root @ 0x76fff000 254 entries.
524 11:45:05.098167 IMD: root @ 0x76ffec00 62 entries.
525 11:45:05.106692 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
526 11:45:05.109983 RO_VPD is uninitialized or empty.
527 11:45:05.113091 FMAP: area RW_VPD found @ f29000 (8192 bytes)
528 11:45:05.119704 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
529 11:45:05.123063 External stage cache:
530 11:45:05.126559 IMD: root @ 0x7bbff000 254 entries.
531 11:45:05.129163 IMD: root @ 0x7bbfec00 62 entries.
532 11:45:05.136612 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
533 11:45:05.143355 MRC: Checking cached data update for 'RW_MRC_CACHE'.
534 11:45:05.146729 MRC: 'RW_MRC_CACHE' does not need update.
535 11:45:05.147161 8 DIMMs found
536 11:45:05.150415 SMM Memory Map
537 11:45:05.153543 SMRAM : 0x7b800000 0x800000
538 11:45:05.156539 Subregion 0: 0x7b800000 0x200000
539 11:45:05.160319 Subregion 1: 0x7ba00000 0x200000
540 11:45:05.163034 Subregion 2: 0x7bc00000 0x400000
541 11:45:05.166511 top_of_ram = 0x77000000
542 11:45:05.169923 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
543 11:45:05.176463 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
544 11:45:05.183493 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
545 11:45:05.186313 MTRR Range: Start=ff000000 End=0 (Size 1000000)
546 11:45:05.186829 Normal boot
547 11:45:05.196843 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
548 11:45:05.203218 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
549 11:45:05.209773 Processing 237 relocs. Offset value of 0x74ab9000
550 11:45:05.217940 BS: romstage times (exec / console): total (unknown) / 377 ms
551 11:45:05.225020
552 11:45:05.225526
553 11:45:05.231860 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
554 11:45:05.232274 Normal boot
555 11:45:05.238344 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
556 11:45:05.245365 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
557 11:45:05.251861 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
558 11:45:05.261485 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
559 11:45:05.310402 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
560 11:45:05.317191 Processing 5931 relocs. Offset value of 0x72a2f000
561 11:45:05.323192 BS: postcar times (exec / console): total (unknown) / 51 ms
562 11:45:05.323677
563 11:45:05.324030
564 11:45:05.329941 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
565 11:45:05.333433 Reserving BERT start 76a1e000, size 10000
566 11:45:05.336749 Normal boot
567 11:45:05.339677 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
568 11:45:05.346233 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
569 11:45:05.356333 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
570 11:45:05.359867 FMAP: area RW_VPD found @ f29000 (8192 bytes)
571 11:45:05.363454 Google Chrome EC: version:
572 11:45:05.366696 ro: volmar_v2.0.14126-e605144e9c
573 11:45:05.369597 rw: volmar_v0.0.55-22d1557
574 11:45:05.373006 running image: 2
575 11:45:05.376138 ACPI _SWS is PM1 Index 8 GPE Index -1
576 11:45:05.379935 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
577 11:45:05.386646 EC returned error result code 3
578 11:45:05.389680 FW_CONFIG value from CBI is 0x131
579 11:45:05.395994 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
580 11:45:05.399393 PCI: 00:1c.2 disabled by fw_config
581 11:45:05.406526 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
582 11:45:05.409508 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
583 11:45:05.416065 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
584 11:45:05.419553 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
585 11:45:05.425789 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
586 11:45:05.432620 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
587 11:45:05.439513 microcode: sig=0x906a4 pf=0x80 revision=0x423
588 11:45:05.442397 microcode: Update skipped, already up-to-date
589 11:45:05.448842 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
590 11:45:05.481662 Detected 6 core, 8 thread CPU.
591 11:45:05.485119 Setting up SMI for CPU
592 11:45:05.488254 IED base = 0x7bc00000
593 11:45:05.491283 IED size = 0x00400000
594 11:45:05.491730 Will perform SMM setup.
595 11:45:05.498043 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
596 11:45:05.498667 LAPIC 0x0 in XAPIC mode.
597 11:45:05.508315 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
598 11:45:05.511394 Processing 18 relocs. Offset value of 0x00030000
599 11:45:05.516089 Attempting to start 7 APs
600 11:45:05.520151 Waiting for 10ms after sending INIT.
601 11:45:05.532332 Waiting for SIPI to complete...
602 11:45:05.536361 done.
603 11:45:05.537034 LAPIC 0x14 in XAPIC mode.
604 11:45:05.539335 LAPIC 0x16 in XAPIC mode.
605 11:45:05.542371 LAPIC 0x10 in XAPIC mode.
606 11:45:05.545719 AP: slot 1 apic_id 14, MCU rev: 0x00000423
607 11:45:05.552782 AP: slot 3 apic_id 10, MCU rev: 0x00000423
608 11:45:05.553234 LAPIC 0x8 in XAPIC mode.
609 11:45:05.555872 LAPIC 0x9 in XAPIC mode.
610 11:45:05.559339 AP: slot 7 apic_id 8, MCU rev: 0x00000423
611 11:45:05.565823 AP: slot 2 apic_id 16, MCU rev: 0x00000423
612 11:45:05.568857 LAPIC 0x12 in XAPIC mode.
613 11:45:05.572645 AP: slot 6 apic_id 9, MCU rev: 0x00000423
614 11:45:05.575779 AP: slot 4 apic_id 12, MCU rev: 0x00000423
615 11:45:05.578901 LAPIC 0x1 in XAPIC mode.
616 11:45:05.582252 Waiting for SIPI to complete...
617 11:45:05.582762 done.
618 11:45:05.585950 AP: slot 5 apic_id 1, MCU rev: 0x00000423
619 11:45:05.588930 smm_setup_relocation_handler: enter
620 11:45:05.592449 smm_setup_relocation_handler: exit
621 11:45:05.602527 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
622 11:45:05.605333 Processing 11 relocs. Offset value of 0x00038000
623 11:45:05.612353 smm_module_setup_stub: stack_top = 0x7b804000
624 11:45:05.615788 smm_module_setup_stub: per cpu stack_size = 0x800
625 11:45:05.622700 smm_module_setup_stub: runtime.start32_offset = 0x4c
626 11:45:05.625447 smm_module_setup_stub: runtime.smm_size = 0x10000
627 11:45:05.631856 SMM Module: stub loaded at 38000. Will call 0x76a52094
628 11:45:05.635169 Installing permanent SMM handler to 0x7b800000
629 11:45:05.642434 smm_load_module: total_smm_space_needed e468, available -> 200000
630 11:45:05.651791 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
631 11:45:05.655606 Processing 255 relocs. Offset value of 0x7b9f6000
632 11:45:05.661688 smm_load_module: smram_start: 0x7b800000
633 11:45:05.665560 smm_load_module: smram_end: 7ba00000
634 11:45:05.668656 smm_load_module: handler start 0x7b9f6d5f
635 11:45:05.671759 smm_load_module: handler_size 98d0
636 11:45:05.675635 smm_load_module: fxsave_area 0x7b9ff000
637 11:45:05.678580 smm_load_module: fxsave_size 1000
638 11:45:05.681808 smm_load_module: CONFIG_MSEG_SIZE 0x0
639 11:45:05.688535 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
640 11:45:05.694884 smm_load_module: handler_mod_params.smbase = 0x7b800000
641 11:45:05.698379 smm_load_module: per_cpu_save_state_size = 0x400
642 11:45:05.702038 smm_load_module: num_cpus = 0x8
643 11:45:05.708214 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
644 11:45:05.711939 smm_load_module: total_save_state_size = 0x2000
645 11:45:05.718318 smm_load_module: cpu0 entry: 7b9e6000
646 11:45:05.721776 smm_create_map: cpus allowed in one segment 30
647 11:45:05.724590 smm_create_map: min # of segments needed 1
648 11:45:05.728377 CPU 0x0
649 11:45:05.731366 smbase 7b9e6000 entry 7b9ee000
650 11:45:05.734757 ss_start 7b9f5c00 code_end 7b9ee208
651 11:45:05.735234 CPU 0x1
652 11:45:05.738015 smbase 7b9e5c00 entry 7b9edc00
653 11:45:05.745080 ss_start 7b9f5800 code_end 7b9ede08
654 11:45:05.745507 CPU 0x2
655 11:45:05.747720 smbase 7b9e5800 entry 7b9ed800
656 11:45:05.755134 ss_start 7b9f5400 code_end 7b9eda08
657 11:45:05.755714 CPU 0x3
658 11:45:05.757952 smbase 7b9e5400 entry 7b9ed400
659 11:45:05.760968 ss_start 7b9f5000 code_end 7b9ed608
660 11:45:05.764643 CPU 0x4
661 11:45:05.767594 smbase 7b9e5000 entry 7b9ed000
662 11:45:05.770819 ss_start 7b9f4c00 code_end 7b9ed208
663 11:45:05.774967 CPU 0x5
664 11:45:05.777838 smbase 7b9e4c00 entry 7b9ecc00
665 11:45:05.780900 ss_start 7b9f4800 code_end 7b9ece08
666 11:45:05.781348 CPU 0x6
667 11:45:05.784762 smbase 7b9e4800 entry 7b9ec800
668 11:45:05.791272 ss_start 7b9f4400 code_end 7b9eca08
669 11:45:05.791733 CPU 0x7
670 11:45:05.794480 smbase 7b9e4400 entry 7b9ec400
671 11:45:05.800916 ss_start 7b9f4000 code_end 7b9ec608
672 11:45:05.807515 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
673 11:45:05.814512 Processing 11 relocs. Offset value of 0x7b9ee000
674 11:45:05.817709 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
675 11:45:05.823929 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
676 11:45:05.830674 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
677 11:45:05.837505 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
678 11:45:05.844388 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
679 11:45:05.850660 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
680 11:45:05.857722 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
681 11:45:05.861198 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
682 11:45:05.867286 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
683 11:45:05.874541 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
684 11:45:05.880504 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
685 11:45:05.887605 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
686 11:45:05.894031 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
687 11:45:05.900467 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
688 11:45:05.907319 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
689 11:45:05.910816 smm_module_setup_stub: stack_top = 0x7b804000
690 11:45:05.917147 smm_module_setup_stub: per cpu stack_size = 0x800
691 11:45:05.920587 smm_module_setup_stub: runtime.start32_offset = 0x4c
692 11:45:05.926912 smm_module_setup_stub: runtime.smm_size = 0x200000
693 11:45:05.933512 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
694 11:45:05.936666 Clearing SMI status registers
695 11:45:05.940152 SMI_STS: PM1
696 11:45:05.940672 PM1_STS: WAK PWRBTN
697 11:45:05.946521 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
698 11:45:05.950230 In relocation handler: CPU 0
699 11:45:05.956851 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
700 11:45:05.959884 Writing SMRR. base = 0x7b800006, mask=0xff800c00
701 11:45:05.963306 Relocation complete.
702 11:45:05.969960 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
703 11:45:05.973005 In relocation handler: CPU 5
704 11:45:05.976510 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
705 11:45:05.980068 Relocation complete.
706 11:45:05.986941 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
707 11:45:05.989699 In relocation handler: CPU 4
708 11:45:05.993396 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
709 11:45:05.996526 Writing SMRR. base = 0x7b800006, mask=0xff800c00
710 11:45:06.000062 Relocation complete.
711 11:45:06.006498 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
712 11:45:06.009953 In relocation handler: CPU 3
713 11:45:06.013856 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
714 11:45:06.019786 Writing SMRR. base = 0x7b800006, mask=0xff800c00
715 11:45:06.020264 Relocation complete.
716 11:45:06.029691 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
717 11:45:06.032775 In relocation handler: CPU 2
718 11:45:06.036393 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
719 11:45:06.039764 Writing SMRR. base = 0x7b800006, mask=0xff800c00
720 11:45:06.042952 Relocation complete.
721 11:45:06.049806 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
722 11:45:06.052969 In relocation handler: CPU 1
723 11:45:06.056264 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
724 11:45:06.062656 Writing SMRR. base = 0x7b800006, mask=0xff800c00
725 11:45:06.063162 Relocation complete.
726 11:45:06.069772 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
727 11:45:06.072801 In relocation handler: CPU 6
728 11:45:06.079461 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
729 11:45:06.079892 Relocation complete.
730 11:45:06.085932 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
731 11:45:06.089302 In relocation handler: CPU 7
732 11:45:06.092853 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
733 11:45:06.099980 Writing SMRR. base = 0x7b800006, mask=0xff800c00
734 11:45:06.102781 Relocation complete.
735 11:45:06.103208 Initializing CPU #0
736 11:45:06.105815 CPU: vendor Intel device 906a4
737 11:45:06.109961 CPU: family 06, model 9a, stepping 04
738 11:45:06.112983 Clearing out pending MCEs
739 11:45:06.115974 cpu: energy policy set to 7
740 11:45:06.119440 Turbo is available but hidden
741 11:45:06.122625 Turbo is available and visible
742 11:45:06.125665 microcode: Update skipped, already up-to-date
743 11:45:06.129230 CPU #0 initialized
744 11:45:06.129760 Initializing CPU #5
745 11:45:06.132782 Initializing CPU #2
746 11:45:06.135893 Initializing CPU #1
747 11:45:06.136322 Initializing CPU #4
748 11:45:06.139813 CPU: vendor Intel device 906a4
749 11:45:06.142377 CPU: family 06, model 9a, stepping 04
750 11:45:06.145847 CPU: vendor Intel device 906a4
751 11:45:06.152305 CPU: family 06, model 9a, stepping 04
752 11:45:06.152734 Clearing out pending MCEs
753 11:45:06.155903 CPU: vendor Intel device 906a4
754 11:45:06.158917 CPU: family 06, model 9a, stepping 04
755 11:45:06.162412 cpu: energy policy set to 7
756 11:45:06.165733 Initializing CPU #3
757 11:45:06.169131 microcode: Update skipped, already up-to-date
758 11:45:06.172148 CPU #2 initialized
759 11:45:06.172572 Initializing CPU #6
760 11:45:06.175980 CPU: vendor Intel device 906a4
761 11:45:06.182284 CPU: family 06, model 9a, stepping 04
762 11:45:06.182801 Clearing out pending MCEs
763 11:45:06.185237 Clearing out pending MCEs
764 11:45:06.188747 Clearing out pending MCEs
765 11:45:06.192248 cpu: energy policy set to 7
766 11:45:06.195241 cpu: energy policy set to 7
767 11:45:06.198573 microcode: Update skipped, already up-to-date
768 11:45:06.202184 CPU #4 initialized
769 11:45:06.202758 cpu: energy policy set to 7
770 11:45:06.209253 microcode: Update skipped, already up-to-date
771 11:45:06.209777 CPU #3 initialized
772 11:45:06.215287 microcode: Update skipped, already up-to-date
773 11:45:06.215821 CPU #1 initialized
774 11:45:06.218872 CPU: vendor Intel device 906a4
775 11:45:06.222280 CPU: family 06, model 9a, stepping 04
776 11:45:06.225074 CPU: vendor Intel device 906a4
777 11:45:06.231810 CPU: family 06, model 9a, stepping 04
778 11:45:06.232374 Initializing CPU #7
779 11:45:06.235211 Clearing out pending MCEs
780 11:45:06.238886 CPU: vendor Intel device 906a4
781 11:45:06.241834 CPU: family 06, model 9a, stepping 04
782 11:45:06.245424 cpu: energy policy set to 7
783 11:45:06.248795 Clearing out pending MCEs
784 11:45:06.251811 microcode: Update skipped, already up-to-date
785 11:45:06.255030 CPU #6 initialized
786 11:45:06.255461 Clearing out pending MCEs
787 11:45:06.258627 cpu: energy policy set to 7
788 11:45:06.261908 cpu: energy policy set to 7
789 11:45:06.268375 microcode: Update skipped, already up-to-date
790 11:45:06.268834 CPU #5 initialized
791 11:45:06.274790 microcode: Update skipped, already up-to-date
792 11:45:06.275227 CPU #7 initialized
793 11:45:06.277995 bsp_do_flight_plan done after 693 msecs.
794 11:45:06.281673 CPU: frequency set to 4400 MHz
795 11:45:06.285010 Enabling SMIs.
796 11:45:06.291371 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 382 / 521 ms
797 11:45:06.307089 Probing TPM I2C: done! DID_VID 0x00281ae0
798 11:45:06.310608 Locality already claimed
799 11:45:06.313579 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
800 11:45:06.325044 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
801 11:45:06.328430 Enabling GPIO PM b/c CR50 has long IRQ pulse support
802 11:45:06.334913 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
803 11:45:06.341267 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
804 11:45:06.345137 Found a VBT of 9216 bytes after decompression
805 11:45:06.348158 PCI 1.0, PIN A, using IRQ #16
806 11:45:06.351352 PCI 2.0, PIN A, using IRQ #17
807 11:45:06.355402 PCI 4.0, PIN A, using IRQ #18
808 11:45:06.357961 PCI 5.0, PIN A, using IRQ #16
809 11:45:06.361555 PCI 6.0, PIN A, using IRQ #16
810 11:45:06.364746 PCI 6.2, PIN C, using IRQ #18
811 11:45:06.368584 PCI 7.0, PIN A, using IRQ #19
812 11:45:06.371345 PCI 7.1, PIN B, using IRQ #20
813 11:45:06.374905 PCI 7.2, PIN C, using IRQ #21
814 11:45:06.378238 PCI 7.3, PIN D, using IRQ #22
815 11:45:06.381172 PCI 8.0, PIN A, using IRQ #23
816 11:45:06.385231 PCI D.0, PIN A, using IRQ #17
817 11:45:06.388082 PCI D.1, PIN B, using IRQ #19
818 11:45:06.388514 PCI 10.0, PIN A, using IRQ #24
819 11:45:06.391114 PCI 10.1, PIN B, using IRQ #25
820 11:45:06.394410 PCI 10.6, PIN C, using IRQ #20
821 11:45:06.398096 PCI 10.7, PIN D, using IRQ #21
822 11:45:06.401126 PCI 11.0, PIN A, using IRQ #26
823 11:45:06.404657 PCI 11.1, PIN B, using IRQ #27
824 11:45:06.408410 PCI 11.2, PIN C, using IRQ #28
825 11:45:06.411230 PCI 11.3, PIN D, using IRQ #29
826 11:45:06.414565 PCI 12.0, PIN A, using IRQ #30
827 11:45:06.418157 PCI 12.6, PIN B, using IRQ #31
828 11:45:06.421100 PCI 12.7, PIN C, using IRQ #22
829 11:45:06.424654 PCI 13.0, PIN A, using IRQ #32
830 11:45:06.427758 PCI 13.1, PIN B, using IRQ #33
831 11:45:06.430841 PCI 13.2, PIN C, using IRQ #34
832 11:45:06.434672 PCI 13.3, PIN D, using IRQ #35
833 11:45:06.437983 PCI 14.0, PIN B, using IRQ #23
834 11:45:06.440921 PCI 14.1, PIN A, using IRQ #36
835 11:45:06.441396 PCI 14.3, PIN C, using IRQ #17
836 11:45:06.444663 PCI 15.0, PIN A, using IRQ #37
837 11:45:06.447752 PCI 15.1, PIN B, using IRQ #38
838 11:45:06.450839 PCI 15.2, PIN C, using IRQ #39
839 11:45:06.454563 PCI 15.3, PIN D, using IRQ #40
840 11:45:06.457842 PCI 16.0, PIN A, using IRQ #18
841 11:45:06.460994 PCI 16.1, PIN B, using IRQ #19
842 11:45:06.464654 PCI 16.2, PIN C, using IRQ #20
843 11:45:06.467584 PCI 16.3, PIN D, using IRQ #21
844 11:45:06.470673 PCI 16.4, PIN A, using IRQ #18
845 11:45:06.474176 PCI 16.5, PIN B, using IRQ #19
846 11:45:06.477521 PCI 17.0, PIN A, using IRQ #22
847 11:45:06.480738 PCI 19.0, PIN A, using IRQ #41
848 11:45:06.483758 PCI 19.1, PIN B, using IRQ #42
849 11:45:06.487600 PCI 19.2, PIN C, using IRQ #43
850 11:45:06.490716 PCI 1C.0, PIN A, using IRQ #16
851 11:45:06.493804 PCI 1C.1, PIN B, using IRQ #17
852 11:45:06.497459 PCI 1C.2, PIN C, using IRQ #18
853 11:45:06.497919 PCI 1C.3, PIN D, using IRQ #19
854 11:45:06.500545 PCI 1C.4, PIN A, using IRQ #16
855 11:45:06.503577 PCI 1C.5, PIN B, using IRQ #17
856 11:45:06.507477 PCI 1C.6, PIN C, using IRQ #18
857 11:45:06.510780 PCI 1C.7, PIN D, using IRQ #19
858 11:45:06.513752 PCI 1D.0, PIN A, using IRQ #16
859 11:45:06.517395 PCI 1D.1, PIN B, using IRQ #17
860 11:45:06.521002 PCI 1D.2, PIN C, using IRQ #18
861 11:45:06.524185 PCI 1D.3, PIN D, using IRQ #19
862 11:45:06.527316 PCI 1E.0, PIN A, using IRQ #23
863 11:45:06.530636 PCI 1E.1, PIN B, using IRQ #20
864 11:45:06.533842 PCI 1E.2, PIN C, using IRQ #44
865 11:45:06.537414 PCI 1E.3, PIN D, using IRQ #45
866 11:45:06.540370 PCI 1F.3, PIN B, using IRQ #22
867 11:45:06.543890 PCI 1F.4, PIN C, using IRQ #23
868 11:45:06.547137 PCI 1F.6, PIN D, using IRQ #20
869 11:45:06.550727 PCI 1F.7, PIN A, using IRQ #21
870 11:45:06.553661 IRQ: Using dynamically assigned PCI IO-APIC IRQs
871 11:45:06.560384 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
872 11:45:06.744311 FSPS returned 0
873 11:45:06.747949 Executing Phase 1 of FspMultiPhaseSiInit
874 11:45:06.757553 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
875 11:45:06.760722 port C0 DISC req: usage 1 usb3 1 usb2 1
876 11:45:06.764218 Raw Buffer output 0 00000111
877 11:45:06.767200 Raw Buffer output 1 00000000
878 11:45:06.771063 pmc_send_ipc_cmd succeeded
879 11:45:06.777622 port C1 DISC req: usage 1 usb3 3 usb2 3
880 11:45:06.778070 Raw Buffer output 0 00000331
881 11:45:06.781214 Raw Buffer output 1 00000000
882 11:45:06.785391 pmc_send_ipc_cmd succeeded
883 11:45:06.789158 Detected 6 core, 8 thread CPU.
884 11:45:06.792139 Detected 6 core, 8 thread CPU.
885 11:45:06.797374 Detected 6 core, 8 thread CPU.
886 11:45:06.800858 Detected 6 core, 8 thread CPU.
887 11:45:06.804436 Detected 6 core, 8 thread CPU.
888 11:45:06.807637 Detected 6 core, 8 thread CPU.
889 11:45:06.810807 Detected 6 core, 8 thread CPU.
890 11:45:06.814740 Detected 6 core, 8 thread CPU.
891 11:45:06.817436 Detected 6 core, 8 thread CPU.
892 11:45:06.820547 Detected 6 core, 8 thread CPU.
893 11:45:06.824449 Detected 6 core, 8 thread CPU.
894 11:45:06.827691 Detected 6 core, 8 thread CPU.
895 11:45:06.830484 Detected 6 core, 8 thread CPU.
896 11:45:06.833784 Detected 6 core, 8 thread CPU.
897 11:45:06.837535 Detected 6 core, 8 thread CPU.
898 11:45:06.840689 Detected 6 core, 8 thread CPU.
899 11:45:06.843767 Detected 6 core, 8 thread CPU.
900 11:45:06.847005 Detected 6 core, 8 thread CPU.
901 11:45:06.850928 Detected 6 core, 8 thread CPU.
902 11:45:06.853703 Detected 6 core, 8 thread CPU.
903 11:45:06.857100 Detected 6 core, 8 thread CPU.
904 11:45:06.860173 Detected 6 core, 8 thread CPU.
905 11:45:07.140421 Detected 6 core, 8 thread CPU.
906 11:45:07.143943 Detected 6 core, 8 thread CPU.
907 11:45:07.146865 Detected 6 core, 8 thread CPU.
908 11:45:07.150499 Detected 6 core, 8 thread CPU.
909 11:45:07.153661 Detected 6 core, 8 thread CPU.
910 11:45:07.157096 Detected 6 core, 8 thread CPU.
911 11:45:07.160141 Detected 6 core, 8 thread CPU.
912 11:45:07.163332 Detected 6 core, 8 thread CPU.
913 11:45:07.167397 Detected 6 core, 8 thread CPU.
914 11:45:07.170239 Detected 6 core, 8 thread CPU.
915 11:45:07.173530 Detected 6 core, 8 thread CPU.
916 11:45:07.176990 Detected 6 core, 8 thread CPU.
917 11:45:07.179972 Detected 6 core, 8 thread CPU.
918 11:45:07.183861 Detected 6 core, 8 thread CPU.
919 11:45:07.186490 Detected 6 core, 8 thread CPU.
920 11:45:07.190041 Detected 6 core, 8 thread CPU.
921 11:45:07.193425 Detected 6 core, 8 thread CPU.
922 11:45:07.196762 Detected 6 core, 8 thread CPU.
923 11:45:07.199849 Detected 6 core, 8 thread CPU.
924 11:45:07.203282 Detected 6 core, 8 thread CPU.
925 11:45:07.206957 Display FSP Version Info HOB
926 11:45:07.210185 Reference Code - CPU = c.0.65.70
927 11:45:07.210644 uCode Version = 0.0.4.23
928 11:45:07.213293 TXT ACM version = ff.ff.ff.ffff
929 11:45:07.216858 Reference Code - ME = c.0.65.70
930 11:45:07.220082 MEBx version = 0.0.0.0
931 11:45:07.223302 ME Firmware Version = Lite SKU
932 11:45:07.226611 Reference Code - PCH = c.0.65.70
933 11:45:07.229793 PCH-CRID Status = Disabled
934 11:45:07.232960 PCH-CRID Original Value = ff.ff.ff.ffff
935 11:45:07.236557 PCH-CRID New Value = ff.ff.ff.ffff
936 11:45:07.239933 OPROM - RST - RAID = ff.ff.ff.ffff
937 11:45:07.243179 PCH Hsio Version = 4.0.0.0
938 11:45:07.246395 Reference Code - SA - System Agent = c.0.65.70
939 11:45:07.249866 Reference Code - MRC = 0.0.3.80
940 11:45:07.253271 SA - PCIe Version = c.0.65.70
941 11:45:07.256534 SA-CRID Status = Disabled
942 11:45:07.260116 SA-CRID Original Value = 0.0.0.4
943 11:45:07.263262 SA-CRID New Value = 0.0.0.4
944 11:45:07.266418 OPROM - VBIOS = ff.ff.ff.ffff
945 11:45:07.269959 IO Manageability Engine FW Version = 24.0.4.0
946 11:45:07.272938 PHY Build Version = 0.0.0.2016
947 11:45:07.276599 Thunderbolt(TM) FW Version = 0.0.0.0
948 11:45:07.283125 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
949 11:45:07.289639 BS: BS_DEV_INIT_CHIPS run times (exec / console): 484 / 507 ms
950 11:45:07.292800 Enumerating buses...
951 11:45:07.296624 Show all devs... Before device enumeration.
952 11:45:07.299910 Root Device: enabled 1
953 11:45:07.302959 CPU_CLUSTER: 0: enabled 1
954 11:45:07.303405 DOMAIN: 0000: enabled 1
955 11:45:07.306437 GPIO: 0: enabled 1
956 11:45:07.309781 PCI: 00:00.0: enabled 1
957 11:45:07.310203 PCI: 00:01.0: enabled 0
958 11:45:07.312884 PCI: 00:01.1: enabled 0
959 11:45:07.316602 PCI: 00:02.0: enabled 1
960 11:45:07.319849 PCI: 00:04.0: enabled 1
961 11:45:07.320275 PCI: 00:05.0: enabled 0
962 11:45:07.323008 PCI: 00:06.0: enabled 1
963 11:45:07.325908 PCI: 00:06.2: enabled 0
964 11:45:07.326328 PCI: 00:07.0: enabled 0
965 11:45:07.329570 PCI: 00:07.1: enabled 0
966 11:45:07.332769 PCI: 00:07.2: enabled 0
967 11:45:07.336923 PCI: 00:07.3: enabled 0
968 11:45:07.337401 PCI: 00:08.0: enabled 0
969 11:45:07.339296 PCI: 00:09.0: enabled 0
970 11:45:07.342767 PCI: 00:0a.0: enabled 1
971 11:45:07.346054 PCI: 00:0d.0: enabled 1
972 11:45:07.346514 PCI: 00:0d.1: enabled 0
973 11:45:07.349383 PCI: 00:0d.2: enabled 0
974 11:45:07.352515 PCI: 00:0d.3: enabled 0
975 11:45:07.355851 PCI: 00:0e.0: enabled 0
976 11:45:07.356282 PCI: 00:10.0: enabled 0
977 11:45:07.359747 PCI: 00:10.1: enabled 0
978 11:45:07.362647 PCI: 00:10.6: enabled 0
979 11:45:07.365821 PCI: 00:10.7: enabled 0
980 11:45:07.366244 PCI: 00:12.0: enabled 0
981 11:45:07.369118 PCI: 00:12.6: enabled 0
982 11:45:07.372461 PCI: 00:12.7: enabled 0
983 11:45:07.372886 PCI: 00:13.0: enabled 0
984 11:45:07.376144 PCI: 00:14.0: enabled 1
985 11:45:07.379385 PCI: 00:14.1: enabled 0
986 11:45:07.382515 PCI: 00:14.2: enabled 1
987 11:45:07.382940 PCI: 00:14.3: enabled 1
988 11:45:07.386310 PCI: 00:15.0: enabled 1
989 11:45:07.389543 PCI: 00:15.1: enabled 1
990 11:45:07.392373 PCI: 00:15.2: enabled 0
991 11:45:07.392795 PCI: 00:15.3: enabled 1
992 11:45:07.396078 PCI: 00:16.0: enabled 1
993 11:45:07.399353 PCI: 00:16.1: enabled 0
994 11:45:07.402702 PCI: 00:16.2: enabled 0
995 11:45:07.403120 PCI: 00:16.3: enabled 0
996 11:45:07.405824 PCI: 00:16.4: enabled 0
997 11:45:07.409020 PCI: 00:16.5: enabled 0
998 11:45:07.409505 PCI: 00:17.0: enabled 1
999 11:45:07.412572 PCI: 00:19.0: enabled 0
1000 11:45:07.415972 PCI: 00:19.1: enabled 1
1001 11:45:07.419116 PCI: 00:19.2: enabled 0
1002 11:45:07.419539 PCI: 00:1a.0: enabled 0
1003 11:45:07.422177 PCI: 00:1c.0: enabled 0
1004 11:45:07.425850 PCI: 00:1c.1: enabled 0
1005 11:45:07.428924 PCI: 00:1c.2: enabled 0
1006 11:45:07.429345 PCI: 00:1c.3: enabled 0
1007 11:45:07.432131 PCI: 00:1c.4: enabled 0
1008 11:45:07.435830 PCI: 00:1c.5: enabled 0
1009 11:45:07.438922 PCI: 00:1c.6: enabled 0
1010 11:45:07.439341 PCI: 00:1c.7: enabled 0
1011 11:45:07.442917 PCI: 00:1d.0: enabled 0
1012 11:45:07.446142 PCI: 00:1d.1: enabled 0
1013 11:45:07.448795 PCI: 00:1d.2: enabled 0
1014 11:45:07.449388 PCI: 00:1d.3: enabled 0
1015 11:45:07.452601 PCI: 00:1e.0: enabled 1
1016 11:45:07.455816 PCI: 00:1e.1: enabled 0
1017 11:45:07.456219 PCI: 00:1e.2: enabled 0
1018 11:45:07.459302 PCI: 00:1e.3: enabled 1
1019 11:45:07.462246 PCI: 00:1f.0: enabled 1
1020 11:45:07.465919 PCI: 00:1f.1: enabled 0
1021 11:45:07.466337 PCI: 00:1f.2: enabled 1
1022 11:45:07.469144 PCI: 00:1f.3: enabled 1
1023 11:45:07.472257 PCI: 00:1f.4: enabled 0
1024 11:45:07.475808 PCI: 00:1f.5: enabled 1
1025 11:45:07.476246 PCI: 00:1f.6: enabled 0
1026 11:45:07.478981 PCI: 00:1f.7: enabled 0
1027 11:45:07.482021 GENERIC: 0.0: enabled 1
1028 11:45:07.485787 GENERIC: 0.0: enabled 1
1029 11:45:07.486204 GENERIC: 1.0: enabled 1
1030 11:45:07.489122 GENERIC: 0.0: enabled 1
1031 11:45:07.492329 GENERIC: 1.0: enabled 1
1032 11:45:07.492877 USB0 port 0: enabled 1
1033 11:45:07.495616 USB0 port 0: enabled 1
1034 11:45:07.498991 GENERIC: 0.0: enabled 1
1035 11:45:07.502161 I2C: 00:1a: enabled 1
1036 11:45:07.502701 I2C: 00:31: enabled 1
1037 11:45:07.505272 I2C: 00:32: enabled 1
1038 11:45:07.509180 I2C: 00:50: enabled 1
1039 11:45:07.509593 I2C: 00:10: enabled 1
1040 11:45:07.512019 I2C: 00:15: enabled 1
1041 11:45:07.515737 I2C: 00:2c: enabled 1
1042 11:45:07.516177 GENERIC: 0.0: enabled 1
1043 11:45:07.518674 SPI: 00: enabled 1
1044 11:45:07.522248 PNP: 0c09.0: enabled 1
1045 11:45:07.522707 GENERIC: 0.0: enabled 1
1046 11:45:07.525393 USB3 port 0: enabled 1
1047 11:45:07.528748 USB3 port 1: enabled 0
1048 11:45:07.532170 USB3 port 2: enabled 1
1049 11:45:07.532584 USB3 port 3: enabled 0
1050 11:45:07.535148 USB2 port 0: enabled 1
1051 11:45:07.538905 USB2 port 1: enabled 0
1052 11:45:07.539320 USB2 port 2: enabled 1
1053 11:45:07.541842 USB2 port 3: enabled 0
1054 11:45:07.545711 USB2 port 4: enabled 0
1055 11:45:07.546208 USB2 port 5: enabled 1
1056 11:45:07.548440 USB2 port 6: enabled 0
1057 11:45:07.552025 USB2 port 7: enabled 0
1058 11:45:07.555516 USB2 port 8: enabled 1
1059 11:45:07.555934 USB2 port 9: enabled 1
1060 11:45:07.558928 USB3 port 0: enabled 1
1061 11:45:07.561777 USB3 port 1: enabled 0
1062 11:45:07.562195 USB3 port 2: enabled 0
1063 11:45:07.565399 USB3 port 3: enabled 0
1064 11:45:07.568543 GENERIC: 0.0: enabled 1
1065 11:45:07.572227 GENERIC: 1.0: enabled 1
1066 11:45:07.572645 APIC: 00: enabled 1
1067 11:45:07.575124 APIC: 14: enabled 1
1068 11:45:07.575568 APIC: 16: enabled 1
1069 11:45:07.578631 APIC: 10: enabled 1
1070 11:45:07.581779 APIC: 12: enabled 1
1071 11:45:07.582208 APIC: 01: enabled 1
1072 11:45:07.585159 APIC: 09: enabled 1
1073 11:45:07.588706 APIC: 08: enabled 1
1074 11:45:07.589189 Compare with tree...
1075 11:45:07.592056 Root Device: enabled 1
1076 11:45:07.595296 CPU_CLUSTER: 0: enabled 1
1077 11:45:07.595756 APIC: 00: enabled 1
1078 11:45:07.598814 APIC: 14: enabled 1
1079 11:45:07.602024 APIC: 16: enabled 1
1080 11:45:07.602420 APIC: 10: enabled 1
1081 11:45:07.605021 APIC: 12: enabled 1
1082 11:45:07.608525 APIC: 01: enabled 1
1083 11:45:07.608934 APIC: 09: enabled 1
1084 11:45:07.612180 APIC: 08: enabled 1
1085 11:45:07.615358 DOMAIN: 0000: enabled 1
1086 11:45:07.615777 GPIO: 0: enabled 1
1087 11:45:07.618566 PCI: 00:00.0: enabled 1
1088 11:45:07.621687 PCI: 00:01.0: enabled 0
1089 11:45:07.625122 PCI: 00:01.1: enabled 0
1090 11:45:07.628352 PCI: 00:02.0: enabled 1
1091 11:45:07.628818 PCI: 00:04.0: enabled 1
1092 11:45:07.631932 GENERIC: 0.0: enabled 1
1093 11:45:07.634913 PCI: 00:05.0: enabled 0
1094 11:45:07.638626 PCI: 00:06.0: enabled 1
1095 11:45:07.641538 PCI: 00:06.2: enabled 0
1096 11:45:07.642009 PCI: 00:08.0: enabled 0
1097 11:45:07.645288 PCI: 00:09.0: enabled 0
1098 11:45:07.648075 PCI: 00:0a.0: enabled 1
1099 11:45:07.651908 PCI: 00:0d.0: enabled 1
1100 11:45:07.655096 USB0 port 0: enabled 1
1101 11:45:07.655587 USB3 port 0: enabled 1
1102 11:45:07.657942 USB3 port 1: enabled 0
1103 11:45:07.661580 USB3 port 2: enabled 1
1104 11:45:07.664958 USB3 port 3: enabled 0
1105 11:45:07.668115 PCI: 00:0d.1: enabled 0
1106 11:45:07.671711 PCI: 00:0d.2: enabled 0
1107 11:45:07.672215 PCI: 00:0d.3: enabled 0
1108 11:45:07.674704 PCI: 00:0e.0: enabled 0
1109 11:45:07.677902 PCI: 00:10.0: enabled 0
1110 11:45:07.681974 PCI: 00:10.1: enabled 0
1111 11:45:07.684818 PCI: 00:10.6: enabled 0
1112 11:45:07.685235 PCI: 00:10.7: enabled 0
1113 11:45:07.688239 PCI: 00:12.0: enabled 0
1114 11:45:07.691190 PCI: 00:12.6: enabled 0
1115 11:45:07.694930 PCI: 00:12.7: enabled 0
1116 11:45:07.695383 PCI: 00:13.0: enabled 0
1117 11:45:07.698042 PCI: 00:14.0: enabled 1
1118 11:45:07.701440 USB0 port 0: enabled 1
1119 11:45:07.704899 USB2 port 0: enabled 1
1120 11:45:07.708333 USB2 port 1: enabled 0
1121 11:45:07.711725 USB2 port 2: enabled 1
1122 11:45:07.712141 USB2 port 3: enabled 0
1123 11:45:07.714652 USB2 port 4: enabled 0
1124 11:45:07.718180 USB2 port 5: enabled 1
1125 11:45:07.721650 USB2 port 6: enabled 0
1126 11:45:07.724929 USB2 port 7: enabled 0
1127 11:45:07.725349 USB2 port 8: enabled 1
1128 11:45:07.727893 USB2 port 9: enabled 1
1129 11:45:07.731324 USB3 port 0: enabled 1
1130 11:45:07.734795 USB3 port 1: enabled 0
1131 11:45:07.738302 USB3 port 2: enabled 0
1132 11:45:07.741289 USB3 port 3: enabled 0
1133 11:45:07.741703 PCI: 00:14.1: enabled 0
1134 11:45:07.744610 PCI: 00:14.2: enabled 1
1135 11:45:07.747617 PCI: 00:14.3: enabled 1
1136 11:45:07.751134 GENERIC: 0.0: enabled 1
1137 11:45:07.754733 PCI: 00:15.0: enabled 1
1138 11:45:07.755153 I2C: 00:1a: enabled 1
1139 11:45:07.757742 I2C: 00:31: enabled 1
1140 11:45:07.761768 I2C: 00:32: enabled 1
1141 11:45:07.764563 PCI: 00:15.1: enabled 1
1142 11:45:07.764981 I2C: 00:50: enabled 1
1143 11:45:07.767850 PCI: 00:15.2: enabled 0
1144 11:45:07.771718 PCI: 00:15.3: enabled 1
1145 11:45:07.774510 I2C: 00:10: enabled 1
1146 11:45:07.777567 PCI: 00:16.0: enabled 1
1147 11:45:07.777986 PCI: 00:16.1: enabled 0
1148 11:45:07.781464 PCI: 00:16.2: enabled 0
1149 11:45:07.784497 PCI: 00:16.3: enabled 0
1150 11:45:07.787607 PCI: 00:16.4: enabled 0
1151 11:45:07.791469 PCI: 00:16.5: enabled 0
1152 11:45:07.791965 PCI: 00:17.0: enabled 1
1153 11:45:07.794254 PCI: 00:19.0: enabled 0
1154 11:45:07.797780 PCI: 00:19.1: enabled 1
1155 11:45:07.801278 I2C: 00:15: enabled 1
1156 11:45:07.801717 I2C: 00:2c: enabled 1
1157 11:45:07.804738 PCI: 00:19.2: enabled 0
1158 11:45:07.807812 PCI: 00:1a.0: enabled 0
1159 11:45:07.811262 PCI: 00:1e.0: enabled 1
1160 11:45:07.814891 PCI: 00:1e.1: enabled 0
1161 11:45:07.815312 PCI: 00:1e.2: enabled 0
1162 11:45:07.817982 PCI: 00:1e.3: enabled 1
1163 11:45:07.821118 SPI: 00: enabled 1
1164 11:45:07.824563 PCI: 00:1f.0: enabled 1
1165 11:45:07.827828 PNP: 0c09.0: enabled 1
1166 11:45:07.828522 PCI: 00:1f.1: enabled 0
1167 11:45:07.831183 PCI: 00:1f.2: enabled 1
1168 11:45:07.834600 GENERIC: 0.0: enabled 1
1169 11:45:07.837731 GENERIC: 0.0: enabled 1
1170 11:45:07.841368 GENERIC: 1.0: enabled 1
1171 11:45:07.841789 PCI: 00:1f.3: enabled 1
1172 11:45:07.844124 PCI: 00:1f.4: enabled 0
1173 11:45:07.847704 PCI: 00:1f.5: enabled 1
1174 11:45:07.850866 PCI: 00:1f.6: enabled 0
1175 11:45:07.854549 PCI: 00:1f.7: enabled 0
1176 11:45:07.854996 Root Device scanning...
1177 11:45:07.857392 scan_static_bus for Root Device
1178 11:45:07.860892 CPU_CLUSTER: 0 enabled
1179 11:45:07.863924 DOMAIN: 0000 enabled
1180 11:45:07.864357 DOMAIN: 0000 scanning...
1181 11:45:07.867760 PCI: pci_scan_bus for bus 00
1182 11:45:07.870840 PCI: 00:00.0 [8086/0000] ops
1183 11:45:07.874088 PCI: 00:00.0 [8086/4609] enabled
1184 11:45:07.877529 PCI: 00:02.0 [8086/0000] bus ops
1185 11:45:07.880921 PCI: 00:02.0 [8086/46b3] enabled
1186 11:45:07.884601 PCI: 00:04.0 [8086/0000] bus ops
1187 11:45:07.887476 PCI: 00:04.0 [8086/461d] enabled
1188 11:45:07.890742 PCI: 00:06.0 [8086/0000] bus ops
1189 11:45:07.894482 PCI: 00:06.0 [8086/464d] enabled
1190 11:45:07.897739 PCI: 00:08.0 [8086/464f] disabled
1191 11:45:07.901075 PCI: 00:0a.0 [8086/467d] enabled
1192 11:45:07.904236 PCI: 00:0d.0 [8086/0000] bus ops
1193 11:45:07.907115 PCI: 00:0d.0 [8086/461e] enabled
1194 11:45:07.911041 PCI: 00:14.0 [8086/0000] bus ops
1195 11:45:07.914196 PCI: 00:14.0 [8086/51ed] enabled
1196 11:45:07.917614 PCI: 00:14.2 [8086/51ef] enabled
1197 11:45:07.921414 PCI: 00:14.3 [8086/0000] bus ops
1198 11:45:07.924497 PCI: 00:14.3 [8086/51f0] enabled
1199 11:45:07.930819 PCI: 00:15.0 [8086/0000] bus ops
1200 11:45:07.933989 PCI: 00:15.0 [8086/51e8] enabled
1201 11:45:07.937565 PCI: 00:15.1 [8086/0000] bus ops
1202 11:45:07.940772 PCI: 00:15.1 [8086/51e9] enabled
1203 11:45:07.944229 PCI: 00:15.2 [8086/0000] bus ops
1204 11:45:07.947613 PCI: 00:15.2 [8086/51ea] disabled
1205 11:45:07.951140 PCI: 00:15.3 [8086/0000] bus ops
1206 11:45:07.954375 PCI: 00:15.3 [8086/51eb] enabled
1207 11:45:07.955044 PCI: 00:16.0 [8086/0000] ops
1208 11:45:07.957378 PCI: 00:16.0 [8086/51e0] enabled
1209 11:45:07.964104 PCI: Static device PCI: 00:17.0 not found, disabling it.
1210 11:45:07.967653 PCI: 00:19.0 [8086/0000] bus ops
1211 11:45:07.970756 PCI: 00:19.0 [8086/51c5] disabled
1212 11:45:07.973801 PCI: 00:19.1 [8086/0000] bus ops
1213 11:45:07.977561 PCI: 00:19.1 [8086/51c6] enabled
1214 11:45:07.980543 PCI: 00:1e.0 [8086/0000] ops
1215 11:45:07.984376 PCI: 00:1e.0 [8086/51a8] enabled
1216 11:45:07.987203 PCI: 00:1e.3 [8086/0000] bus ops
1217 11:45:07.990850 PCI: 00:1e.3 [8086/51ab] enabled
1218 11:45:07.993684 PCI: 00:1f.0 [8086/0000] bus ops
1219 11:45:07.997627 PCI: 00:1f.0 [8086/5182] enabled
1220 11:45:08.000635 RTC Init
1221 11:45:08.003557 Set power on after power failure.
1222 11:45:08.007349 Disabling Deep S3
1223 11:45:08.007766 Disabling Deep S3
1224 11:45:08.010441 Disabling Deep S4
1225 11:45:08.011052 Disabling Deep S4
1226 11:45:08.013907 Disabling Deep S5
1227 11:45:08.014413 Disabling Deep S5
1228 11:45:08.017690 PCI: 00:1f.2 [0000/0000] hidden
1229 11:45:08.020710 PCI: 00:1f.3 [8086/0000] bus ops
1230 11:45:08.024081 PCI: 00:1f.3 [8086/51c8] enabled
1231 11:45:08.027301 PCI: 00:1f.5 [8086/0000] bus ops
1232 11:45:08.030554 PCI: 00:1f.5 [8086/51a4] enabled
1233 11:45:08.034052 GPIO: 0 enabled
1234 11:45:08.036970 PCI: Leftover static devices:
1235 11:45:08.037432 PCI: 00:01.0
1236 11:45:08.040623 PCI: 00:01.1
1237 11:45:08.041117 PCI: 00:05.0
1238 11:45:08.041461 PCI: 00:06.2
1239 11:45:08.043595 PCI: 00:09.0
1240 11:45:08.044120 PCI: 00:0d.1
1241 11:45:08.047419 PCI: 00:0d.2
1242 11:45:08.047910 PCI: 00:0d.3
1243 11:45:08.048258 PCI: 00:0e.0
1244 11:45:08.050526 PCI: 00:10.0
1245 11:45:08.051089 PCI: 00:10.1
1246 11:45:08.053755 PCI: 00:10.6
1247 11:45:08.054255 PCI: 00:10.7
1248 11:45:08.057078 PCI: 00:12.0
1249 11:45:08.057522 PCI: 00:12.6
1250 11:45:08.057959 PCI: 00:12.7
1251 11:45:08.060510 PCI: 00:13.0
1252 11:45:08.061075 PCI: 00:14.1
1253 11:45:08.063857 PCI: 00:16.1
1254 11:45:08.064293 PCI: 00:16.2
1255 11:45:08.064733 PCI: 00:16.3
1256 11:45:08.066992 PCI: 00:16.4
1257 11:45:08.067428 PCI: 00:16.5
1258 11:45:08.070735 PCI: 00:17.0
1259 11:45:08.071196 PCI: 00:19.2
1260 11:45:08.071630 PCI: 00:1a.0
1261 11:45:08.073698 PCI: 00:1e.1
1262 11:45:08.074133 PCI: 00:1e.2
1263 11:45:08.077596 PCI: 00:1f.1
1264 11:45:08.078032 PCI: 00:1f.4
1265 11:45:08.080398 PCI: 00:1f.6
1266 11:45:08.080970 PCI: 00:1f.7
1267 11:45:08.083925 PCI: Check your devicetree.cb.
1268 11:45:08.087211 PCI: 00:02.0 scanning...
1269 11:45:08.090257 scan_generic_bus for PCI: 00:02.0
1270 11:45:08.093420 scan_generic_bus for PCI: 00:02.0 done
1271 11:45:08.097025 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1272 11:45:08.100266 PCI: 00:04.0 scanning...
1273 11:45:08.103530 scan_generic_bus for PCI: 00:04.0
1274 11:45:08.106734 GENERIC: 0.0 enabled
1275 11:45:08.113495 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1276 11:45:08.117154 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1277 11:45:08.120293 PCI: 00:06.0 scanning...
1278 11:45:08.123643 do_pci_scan_bridge for PCI: 00:06.0
1279 11:45:08.126807 PCI: pci_scan_bus for bus 01
1280 11:45:08.130318 PCI: 01:00.0 [15b7/5009] enabled
1281 11:45:08.133806 Enabling Common Clock Configuration
1282 11:45:08.136834 L1 Sub-State supported from root port 6
1283 11:45:08.140480 L1 Sub-State Support = 0x5
1284 11:45:08.143868 CommonModeRestoreTime = 0x6e
1285 11:45:08.146616 Power On Value = 0x5, Power On Scale = 0x2
1286 11:45:08.150265 ASPM: Enabled L1
1287 11:45:08.153554 PCIe: Max_Payload_Size adjusted to 256
1288 11:45:08.157007 PCI: 01:00.0: Enabled LTR
1289 11:45:08.160442 PCI: 01:00.0: Programmed LTR max latencies
1290 11:45:08.163207 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1291 11:45:08.166608 PCI: 00:0d.0 scanning...
1292 11:45:08.169781 scan_static_bus for PCI: 00:0d.0
1293 11:45:08.173416 USB0 port 0 enabled
1294 11:45:08.173833 USB0 port 0 scanning...
1295 11:45:08.176496 scan_static_bus for USB0 port 0
1296 11:45:08.180252 USB3 port 0 enabled
1297 11:45:08.183238 USB3 port 1 disabled
1298 11:45:08.183654 USB3 port 2 enabled
1299 11:45:08.186745 USB3 port 3 disabled
1300 11:45:08.190104 USB3 port 0 scanning...
1301 11:45:08.193620 scan_static_bus for USB3 port 0
1302 11:45:08.196722 scan_static_bus for USB3 port 0 done
1303 11:45:08.199767 scan_bus: bus USB3 port 0 finished in 6 msecs
1304 11:45:08.203346 USB3 port 2 scanning...
1305 11:45:08.206933 scan_static_bus for USB3 port 2
1306 11:45:08.210277 scan_static_bus for USB3 port 2 done
1307 11:45:08.213377 scan_bus: bus USB3 port 2 finished in 6 msecs
1308 11:45:08.216512 scan_static_bus for USB0 port 0 done
1309 11:45:08.223277 scan_bus: bus USB0 port 0 finished in 43 msecs
1310 11:45:08.226284 scan_static_bus for PCI: 00:0d.0 done
1311 11:45:08.230089 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1312 11:45:08.233534 PCI: 00:14.0 scanning...
1313 11:45:08.236130 scan_static_bus for PCI: 00:14.0
1314 11:45:08.239792 USB0 port 0 enabled
1315 11:45:08.243098 USB0 port 0 scanning...
1316 11:45:08.246354 scan_static_bus for USB0 port 0
1317 11:45:08.246817 USB2 port 0 enabled
1318 11:45:08.250094 USB2 port 1 disabled
1319 11:45:08.250554 USB2 port 2 enabled
1320 11:45:08.253172 USB2 port 3 disabled
1321 11:45:08.256276 USB2 port 4 disabled
1322 11:45:08.256733 USB2 port 5 enabled
1323 11:45:08.259675 USB2 port 6 disabled
1324 11:45:08.263273 USB2 port 7 disabled
1325 11:45:08.263710 USB2 port 8 enabled
1326 11:45:08.266578 USB2 port 9 enabled
1327 11:45:08.269482 USB3 port 0 enabled
1328 11:45:08.269918 USB3 port 1 disabled
1329 11:45:08.272985 USB3 port 2 disabled
1330 11:45:08.273420 USB3 port 3 disabled
1331 11:45:08.276239 USB2 port 0 scanning...
1332 11:45:08.279308 scan_static_bus for USB2 port 0
1333 11:45:08.283120 scan_static_bus for USB2 port 0 done
1334 11:45:08.289818 scan_bus: bus USB2 port 0 finished in 6 msecs
1335 11:45:08.290261 USB2 port 2 scanning...
1336 11:45:08.292851 scan_static_bus for USB2 port 2
1337 11:45:08.296018 scan_static_bus for USB2 port 2 done
1338 11:45:08.302911 scan_bus: bus USB2 port 2 finished in 6 msecs
1339 11:45:08.305882 USB2 port 5 scanning...
1340 11:45:08.309902 scan_static_bus for USB2 port 5
1341 11:45:08.312778 scan_static_bus for USB2 port 5 done
1342 11:45:08.316325 scan_bus: bus USB2 port 5 finished in 6 msecs
1343 11:45:08.319927 USB2 port 8 scanning...
1344 11:45:08.322625 scan_static_bus for USB2 port 8
1345 11:45:08.325844 scan_static_bus for USB2 port 8 done
1346 11:45:08.329463 scan_bus: bus USB2 port 8 finished in 6 msecs
1347 11:45:08.332730 USB2 port 9 scanning...
1348 11:45:08.335742 scan_static_bus for USB2 port 9
1349 11:45:08.339321 scan_static_bus for USB2 port 9 done
1350 11:45:08.342435 scan_bus: bus USB2 port 9 finished in 6 msecs
1351 11:45:08.345845 USB3 port 0 scanning...
1352 11:45:08.349414 scan_static_bus for USB3 port 0
1353 11:45:08.352686 scan_static_bus for USB3 port 0 done
1354 11:45:08.359086 scan_bus: bus USB3 port 0 finished in 6 msecs
1355 11:45:08.363008 scan_static_bus for USB0 port 0 done
1356 11:45:08.365546 scan_bus: bus USB0 port 0 finished in 120 msecs
1357 11:45:08.368954 scan_static_bus for PCI: 00:14.0 done
1358 11:45:08.375765 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1359 11:45:08.379442 PCI: 00:14.3 scanning...
1360 11:45:08.382179 scan_static_bus for PCI: 00:14.3
1361 11:45:08.382640 GENERIC: 0.0 enabled
1362 11:45:08.385570 scan_static_bus for PCI: 00:14.3 done
1363 11:45:08.392493 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1364 11:45:08.396260 PCI: 00:15.0 scanning...
1365 11:45:08.399318 scan_static_bus for PCI: 00:15.0
1366 11:45:08.399739 I2C: 00:1a enabled
1367 11:45:08.402276 I2C: 00:31 enabled
1368 11:45:08.402906 I2C: 00:32 enabled
1369 11:45:08.409155 scan_static_bus for PCI: 00:15.0 done
1370 11:45:08.412279 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1371 11:45:08.415972 PCI: 00:15.1 scanning...
1372 11:45:08.419018 scan_static_bus for PCI: 00:15.1
1373 11:45:08.419453 I2C: 00:50 enabled
1374 11:45:08.422512 scan_static_bus for PCI: 00:15.1 done
1375 11:45:08.428910 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1376 11:45:08.432386 PCI: 00:15.3 scanning...
1377 11:45:08.435436 scan_static_bus for PCI: 00:15.3
1378 11:45:08.435935 I2C: 00:10 enabled
1379 11:45:08.438808 scan_static_bus for PCI: 00:15.3 done
1380 11:45:08.445534 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1381 11:45:08.449077 PCI: 00:19.1 scanning...
1382 11:45:08.452376 scan_static_bus for PCI: 00:19.1
1383 11:45:08.452928 I2C: 00:15 enabled
1384 11:45:08.455694 I2C: 00:2c enabled
1385 11:45:08.459147 scan_static_bus for PCI: 00:19.1 done
1386 11:45:08.462260 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1387 11:45:08.465594 PCI: 00:1e.3 scanning...
1388 11:45:08.468862 scan_generic_bus for PCI: 00:1e.3
1389 11:45:08.472061 SPI: 00 enabled
1390 11:45:08.475130 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1391 11:45:08.482132 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1392 11:45:08.485714 PCI: 00:1f.0 scanning...
1393 11:45:08.488617 scan_static_bus for PCI: 00:1f.0
1394 11:45:08.489151 PNP: 0c09.0 enabled
1395 11:45:08.492397 PNP: 0c09.0 scanning...
1396 11:45:08.495481 scan_static_bus for PNP: 0c09.0
1397 11:45:08.498657 scan_static_bus for PNP: 0c09.0 done
1398 11:45:08.501672 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1399 11:45:08.508869 scan_static_bus for PCI: 00:1f.0 done
1400 11:45:08.511870 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1401 11:45:08.515578 PCI: 00:1f.2 scanning...
1402 11:45:08.518742 scan_static_bus for PCI: 00:1f.2
1403 11:45:08.519293 GENERIC: 0.0 enabled
1404 11:45:08.522093 GENERIC: 0.0 scanning...
1405 11:45:08.525147 scan_static_bus for GENERIC: 0.0
1406 11:45:08.528919 GENERIC: 0.0 enabled
1407 11:45:08.532088 GENERIC: 1.0 enabled
1408 11:45:08.534972 scan_static_bus for GENERIC: 0.0 done
1409 11:45:08.538827 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1410 11:45:08.541660 scan_static_bus for PCI: 00:1f.2 done
1411 11:45:08.548459 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1412 11:45:08.548907 PCI: 00:1f.3 scanning...
1413 11:45:08.551395 scan_static_bus for PCI: 00:1f.3
1414 11:45:08.558354 scan_static_bus for PCI: 00:1f.3 done
1415 11:45:08.561823 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1416 11:45:08.565244 PCI: 00:1f.5 scanning...
1417 11:45:08.568310 scan_generic_bus for PCI: 00:1f.5
1418 11:45:08.571685 scan_generic_bus for PCI: 00:1f.5 done
1419 11:45:08.574703 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1420 11:45:08.581348 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1421 11:45:08.584806 scan_static_bus for Root Device done
1422 11:45:08.591322 scan_bus: bus Root Device finished in 729 msecs
1423 11:45:08.591772 done
1424 11:45:08.594961 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1425 11:45:08.601674 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1426 11:45:08.608084 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1427 11:45:08.611231 SPI flash protection: WPSW=0 SRP0=0
1428 11:45:08.618333 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1429 11:45:08.621474 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1430 11:45:08.624535 found VGA at PCI: 00:02.0
1431 11:45:08.628200 Setting up VGA for PCI: 00:02.0
1432 11:45:08.634990 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1433 11:45:08.637905 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1434 11:45:08.641095 Allocating resources...
1435 11:45:08.644892 Reading resources...
1436 11:45:08.647974 Root Device read_resources bus 0 link: 0
1437 11:45:08.651728 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1438 11:45:08.658150 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1439 11:45:08.661317 DOMAIN: 0000 read_resources bus 0 link: 0
1440 11:45:08.668027 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1441 11:45:08.674698 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1442 11:45:08.677816 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1443 11:45:08.684597 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1444 11:45:08.691399 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1445 11:45:08.697858 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1446 11:45:08.704225 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1447 11:45:08.710899 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1448 11:45:08.717819 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1449 11:45:08.724233 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1450 11:45:08.731249 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1451 11:45:08.737710 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1452 11:45:08.744707 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1453 11:45:08.750714 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1454 11:45:08.754568 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1455 11:45:08.761385 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1456 11:45:08.767994 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1457 11:45:08.774276 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1458 11:45:08.780501 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1459 11:45:08.787401 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1460 11:45:08.794267 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1461 11:45:08.797083 PCI: 00:04.0 read_resources bus 1 link: 0
1462 11:45:08.800790 PCI: 00:04.0 read_resources bus 1 link: 0 done
1463 11:45:08.807294 PCI: 00:06.0 read_resources bus 1 link: 0
1464 11:45:08.810751 PCI: 00:06.0 read_resources bus 1 link: 0 done
1465 11:45:08.813794 PCI: 00:0d.0 read_resources bus 0 link: 0
1466 11:45:08.820551 USB0 port 0 read_resources bus 0 link: 0
1467 11:45:08.823601 USB0 port 0 read_resources bus 0 link: 0 done
1468 11:45:08.827330 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1469 11:45:08.834064 PCI: 00:14.0 read_resources bus 0 link: 0
1470 11:45:08.837181 USB0 port 0 read_resources bus 0 link: 0
1471 11:45:08.840516 USB0 port 0 read_resources bus 0 link: 0 done
1472 11:45:08.847058 PCI: 00:14.0 read_resources bus 0 link: 0 done
1473 11:45:08.850672 PCI: 00:14.3 read_resources bus 0 link: 0
1474 11:45:08.857351 PCI: 00:14.3 read_resources bus 0 link: 0 done
1475 11:45:08.860261 PCI: 00:15.0 read_resources bus 0 link: 0
1476 11:45:08.863785 PCI: 00:15.0 read_resources bus 0 link: 0 done
1477 11:45:08.870584 PCI: 00:15.1 read_resources bus 0 link: 0
1478 11:45:08.873485 PCI: 00:15.1 read_resources bus 0 link: 0 done
1479 11:45:08.876991 PCI: 00:15.3 read_resources bus 0 link: 0
1480 11:45:08.883256 PCI: 00:15.3 read_resources bus 0 link: 0 done
1481 11:45:08.887086 PCI: 00:19.1 read_resources bus 0 link: 0
1482 11:45:08.890251 PCI: 00:19.1 read_resources bus 0 link: 0 done
1483 11:45:08.896862 PCI: 00:1e.3 read_resources bus 2 link: 0
1484 11:45:08.900540 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1485 11:45:08.903615 PCI: 00:1f.0 read_resources bus 0 link: 0
1486 11:45:08.910120 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1487 11:45:08.913525 PCI: 00:1f.2 read_resources bus 0 link: 0
1488 11:45:08.916554 GENERIC: 0.0 read_resources bus 0 link: 0
1489 11:45:08.923263 GENERIC: 0.0 read_resources bus 0 link: 0 done
1490 11:45:08.926574 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1491 11:45:08.933534 DOMAIN: 0000 read_resources bus 0 link: 0 done
1492 11:45:08.936288 Root Device read_resources bus 0 link: 0 done
1493 11:45:08.940849 Done reading resources.
1494 11:45:08.946298 Show resources in subtree (Root Device)...After reading.
1495 11:45:08.949898 Root Device child on link 0 CPU_CLUSTER: 0
1496 11:45:08.952975 CPU_CLUSTER: 0 child on link 0 APIC: 00
1497 11:45:08.956895 APIC: 00
1498 11:45:08.957542 APIC: 14
1499 11:45:08.957941 APIC: 16
1500 11:45:08.959749 APIC: 10
1501 11:45:08.960270 APIC: 12
1502 11:45:08.963227 APIC: 01
1503 11:45:08.963645 APIC: 09
1504 11:45:08.963971 APIC: 08
1505 11:45:08.969768 DOMAIN: 0000 child on link 0 GPIO: 0
1506 11:45:08.976248 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1507 11:45:08.986166 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1508 11:45:08.990198 GPIO: 0
1509 11:45:08.990849 PCI: 00:00.0
1510 11:45:08.999562 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1511 11:45:09.009464 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1512 11:45:09.019301 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1513 11:45:09.025943 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1514 11:45:09.036311 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1515 11:45:09.046011 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1516 11:45:09.055900 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1517 11:45:09.065917 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1518 11:45:09.075991 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1519 11:45:09.085739 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1520 11:45:09.092590 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1521 11:45:09.102272 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1522 11:45:09.112398 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1523 11:45:09.122161 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1524 11:45:09.132295 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1525 11:45:09.141942 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1526 11:45:09.148926 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1527 11:45:09.158768 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1528 11:45:09.168567 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1529 11:45:09.178690 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1530 11:45:09.188580 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1531 11:45:09.198683 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1532 11:45:09.208439 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1533 11:45:09.218265 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1534 11:45:09.228546 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1535 11:45:09.234746 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1536 11:45:09.244826 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1537 11:45:09.254901 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1538 11:45:09.258565 PCI: 00:02.0
1539 11:45:09.267950 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1540 11:45:09.277661 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1541 11:45:09.288145 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1542 11:45:09.291143 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1543 11:45:09.301499 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1544 11:45:09.301945 GENERIC: 0.0
1545 11:45:09.307655 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1546 11:45:09.314201 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1547 11:45:09.324206 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1548 11:45:09.334411 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1549 11:45:09.337612 PCI: 01:00.0
1550 11:45:09.347608 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1551 11:45:09.357854 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1552 11:45:09.358283 PCI: 00:08.0
1553 11:45:09.360938 PCI: 00:0a.0
1554 11:45:09.371004 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1555 11:45:09.374110 PCI: 00:0d.0 child on link 0 USB0 port 0
1556 11:45:09.384459 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1557 11:45:09.387686 USB0 port 0 child on link 0 USB3 port 0
1558 11:45:09.391394 USB3 port 0
1559 11:45:09.391953 USB3 port 1
1560 11:45:09.394395 USB3 port 2
1561 11:45:09.394874 USB3 port 3
1562 11:45:09.400940 PCI: 00:14.0 child on link 0 USB0 port 0
1563 11:45:09.410563 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1564 11:45:09.414244 USB0 port 0 child on link 0 USB2 port 0
1565 11:45:09.417885 USB2 port 0
1566 11:45:09.418436 USB2 port 1
1567 11:45:09.421262 USB2 port 2
1568 11:45:09.421734 USB2 port 3
1569 11:45:09.424205 USB2 port 4
1570 11:45:09.424644 USB2 port 5
1571 11:45:09.427571 USB2 port 6
1572 11:45:09.428008 USB2 port 7
1573 11:45:09.430790 USB2 port 8
1574 11:45:09.431252 USB2 port 9
1575 11:45:09.434265 USB3 port 0
1576 11:45:09.434765 USB3 port 1
1577 11:45:09.437197 USB3 port 2
1578 11:45:09.437610 USB3 port 3
1579 11:45:09.440724 PCI: 00:14.2
1580 11:45:09.450595 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1581 11:45:09.461053 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1582 11:45:09.464198 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1583 11:45:09.473810 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1584 11:45:09.477920 GENERIC: 0.0
1585 11:45:09.480783 PCI: 00:15.0 child on link 0 I2C: 00:1a
1586 11:45:09.490683 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1587 11:45:09.493551 I2C: 00:1a
1588 11:45:09.493980 I2C: 00:31
1589 11:45:09.497098 I2C: 00:32
1590 11:45:09.500979 PCI: 00:15.1 child on link 0 I2C: 00:50
1591 11:45:09.510908 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1592 11:45:09.511329 I2C: 00:50
1593 11:45:09.513916 PCI: 00:15.2
1594 11:45:09.517728 PCI: 00:15.3 child on link 0 I2C: 00:10
1595 11:45:09.527698 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1596 11:45:09.530909 I2C: 00:10
1597 11:45:09.531322 PCI: 00:16.0
1598 11:45:09.540413 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1599 11:45:09.543881 PCI: 00:19.0
1600 11:45:09.546897 PCI: 00:19.1 child on link 0 I2C: 00:15
1601 11:45:09.557159 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1602 11:45:09.557632 I2C: 00:15
1603 11:45:09.560350 I2C: 00:2c
1604 11:45:09.560771 PCI: 00:1e.0
1605 11:45:09.573451 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1606 11:45:09.576974 PCI: 00:1e.3 child on link 0 SPI: 00
1607 11:45:09.587314 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1608 11:45:09.587738 SPI: 00
1609 11:45:09.593586 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1610 11:45:09.600347 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1611 11:45:09.603199 PNP: 0c09.0
1612 11:45:09.609986 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1613 11:45:09.616902 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1614 11:45:09.626550 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1615 11:45:09.633390 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1616 11:45:09.639866 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1617 11:45:09.640287 GENERIC: 0.0
1618 11:45:09.643164 GENERIC: 1.0
1619 11:45:09.643676 PCI: 00:1f.3
1620 11:45:09.653304 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1621 11:45:09.663624 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1622 11:45:09.666559 PCI: 00:1f.5
1623 11:45:09.676196 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1624 11:45:09.683150 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1625 11:45:09.689680 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1626 11:45:09.696663 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1627 11:45:09.699526 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1628 11:45:09.706181 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1629 11:45:09.709595 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1630 11:45:09.716093 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1631 11:45:09.722991 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1632 11:45:09.732699 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1633 11:45:09.739229 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1634 11:45:09.746085 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1635 11:45:09.752652 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1636 11:45:09.759289 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1637 11:45:09.765916 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1638 11:45:09.769295 DOMAIN: 0000: Resource ranges:
1639 11:45:09.772668 * Base: 1000, Size: 800, Tag: 100
1640 11:45:09.779255 * Base: 1900, Size: e700, Tag: 100
1641 11:45:09.782658 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1642 11:45:09.789299 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1643 11:45:09.795712 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1644 11:45:09.806227 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1645 11:45:09.812329 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1646 11:45:09.819074 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1647 11:45:09.828737 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1648 11:45:09.835682 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1649 11:45:09.842077 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1650 11:45:09.848921 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1651 11:45:09.858881 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1652 11:45:09.865407 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1653 11:45:09.872218 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1654 11:45:09.882001 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1655 11:45:09.888688 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1656 11:45:09.895225 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1657 11:45:09.905502 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1658 11:45:09.911787 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1659 11:45:09.918228 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1660 11:45:09.928577 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1661 11:45:09.935305 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1662 11:45:09.941491 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1663 11:45:09.951643 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1664 11:45:09.958536 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1665 11:45:09.965169 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1666 11:45:09.974979 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1667 11:45:09.981602 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1668 11:45:09.988283 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1669 11:45:09.997696 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1670 11:45:10.004328 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1671 11:45:10.011065 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1672 11:45:10.021881 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1673 11:45:10.027671 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1674 11:45:10.031431 DOMAIN: 0000: Resource ranges:
1675 11:45:10.034094 * Base: 80400000, Size: 3fc00000, Tag: 200
1676 11:45:10.041207 * Base: d0000000, Size: 28000000, Tag: 200
1677 11:45:10.044517 * Base: fa000000, Size: 1000000, Tag: 200
1678 11:45:10.047560 * Base: fb001000, Size: 17ff000, Tag: 200
1679 11:45:10.054161 * Base: fe800000, Size: 300000, Tag: 200
1680 11:45:10.057923 * Base: feb80000, Size: 80000, Tag: 200
1681 11:45:10.060843 * Base: fed00000, Size: 40000, Tag: 200
1682 11:45:10.064440 * Base: fed70000, Size: 10000, Tag: 200
1683 11:45:10.067746 * Base: fed88000, Size: 8000, Tag: 200
1684 11:45:10.073871 * Base: fed93000, Size: d000, Tag: 200
1685 11:45:10.077412 * Base: feda2000, Size: 1e000, Tag: 200
1686 11:45:10.080618 * Base: fede0000, Size: 1220000, Tag: 200
1687 11:45:10.087381 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1688 11:45:10.093741 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1689 11:45:10.100675 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1690 11:45:10.107084 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1691 11:45:10.114210 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1692 11:45:10.120637 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1693 11:45:10.127132 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1694 11:45:10.134190 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1695 11:45:10.140445 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1696 11:45:10.147111 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1697 11:45:10.153686 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1698 11:45:10.160246 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1699 11:45:10.166757 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1700 11:45:10.173874 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1701 11:45:10.180263 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1702 11:45:10.186838 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1703 11:45:10.193628 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1704 11:45:10.200334 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1705 11:45:10.206827 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1706 11:45:10.213609 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1707 11:45:10.220209 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1708 11:45:10.227002 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1709 11:45:10.229916 PCI: 00:06.0: Resource ranges:
1710 11:45:10.236412 * Base: 80400000, Size: 100000, Tag: 200
1711 11:45:10.243579 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1712 11:45:10.249883 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1713 11:45:10.256792 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1714 11:45:10.262848 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1715 11:45:10.269795 Root Device assign_resources, bus 0 link: 0
1716 11:45:10.272881 DOMAIN: 0000 assign_resources, bus 0 link: 0
1717 11:45:10.279887 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1718 11:45:10.289426 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1719 11:45:10.296708 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1720 11:45:10.306367 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1721 11:45:10.309635 PCI: 00:04.0 assign_resources, bus 1 link: 0
1722 11:45:10.316264 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1723 11:45:10.323199 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1724 11:45:10.332835 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1725 11:45:10.342796 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1726 11:45:10.345776 PCI: 00:06.0 assign_resources, bus 1 link: 0
1727 11:45:10.353268 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1728 11:45:10.362704 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1729 11:45:10.365638 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1730 11:45:10.375529 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1731 11:45:10.383021 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1732 11:45:10.389276 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1733 11:45:10.391957 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1734 11:45:10.402237 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1735 11:45:10.405475 PCI: 00:14.0 assign_resources, bus 0 link: 0
1736 11:45:10.408884 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1737 11:45:10.418759 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1738 11:45:10.425173 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1739 11:45:10.435612 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1740 11:45:10.438388 PCI: 00:14.3 assign_resources, bus 0 link: 0
1741 11:45:10.445249 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1742 11:45:10.451851 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1743 11:45:10.454965 PCI: 00:15.0 assign_resources, bus 0 link: 0
1744 11:45:10.461371 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1745 11:45:10.467923 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1746 11:45:10.474606 PCI: 00:15.1 assign_resources, bus 0 link: 0
1747 11:45:10.477983 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1748 11:45:10.488521 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1749 11:45:10.491374 PCI: 00:15.3 assign_resources, bus 0 link: 0
1750 11:45:10.494597 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1751 11:45:10.504478 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1752 11:45:10.511331 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1753 11:45:10.517900 PCI: 00:19.1 assign_resources, bus 0 link: 0
1754 11:45:10.521428 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1755 11:45:10.531543 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1756 11:45:10.534274 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1757 11:45:10.537782 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1758 11:45:10.544225 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1759 11:45:10.547724 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1760 11:45:10.554337 LPC: Trying to open IO window from 800 size 1ff
1761 11:45:10.560869 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1762 11:45:10.570961 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1763 11:45:10.577046 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1764 11:45:10.584334 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1765 11:45:10.587072 Root Device assign_resources, bus 0 link: 0 done
1766 11:45:10.590659 Done setting resources.
1767 11:45:10.597107 Show resources in subtree (Root Device)...After assigning values.
1768 11:45:10.600508 Root Device child on link 0 CPU_CLUSTER: 0
1769 11:45:10.603652 CPU_CLUSTER: 0 child on link 0 APIC: 00
1770 11:45:10.607645 APIC: 00
1771 11:45:10.608300 APIC: 14
1772 11:45:10.608759 APIC: 16
1773 11:45:10.610556 APIC: 10
1774 11:45:10.610995 APIC: 12
1775 11:45:10.614062 APIC: 01
1776 11:45:10.614527 APIC: 09
1777 11:45:10.614978 APIC: 08
1778 11:45:10.620713 DOMAIN: 0000 child on link 0 GPIO: 0
1779 11:45:10.627140 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1780 11:45:10.636898 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1781 11:45:10.640064 GPIO: 0
1782 11:45:10.640503 PCI: 00:00.0
1783 11:45:10.649915 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1784 11:45:10.660254 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1785 11:45:10.670131 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1786 11:45:10.680072 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1787 11:45:10.686800 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1788 11:45:10.696622 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1789 11:45:10.706554 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1790 11:45:10.716170 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1791 11:45:10.726394 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1792 11:45:10.735963 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1793 11:45:10.746557 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1794 11:45:10.752811 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1795 11:45:10.762664 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1796 11:45:10.772773 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1797 11:45:10.782728 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1798 11:45:10.792697 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1799 11:45:10.803129 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1800 11:45:10.809153 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1801 11:45:10.819598 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1802 11:45:10.829015 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1803 11:45:10.838787 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1804 11:45:10.848840 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1805 11:45:10.858685 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1806 11:45:10.868603 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1807 11:45:10.878806 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1808 11:45:10.888425 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1809 11:45:10.895074 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1810 11:45:10.904866 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1811 11:45:10.908039 PCI: 00:02.0
1812 11:45:10.918417 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1813 11:45:10.928519 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1814 11:45:10.937910 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1815 11:45:10.941718 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1816 11:45:10.954679 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1817 11:45:10.955126 GENERIC: 0.0
1818 11:45:10.961543 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1819 11:45:10.968036 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1820 11:45:10.981006 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1821 11:45:10.990978 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1822 11:45:10.994970 PCI: 01:00.0
1823 11:45:11.004351 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1824 11:45:11.014316 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1825 11:45:11.014806 PCI: 00:08.0
1826 11:45:11.017698 PCI: 00:0a.0
1827 11:45:11.027784 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1828 11:45:11.030947 PCI: 00:0d.0 child on link 0 USB0 port 0
1829 11:45:11.040510 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1830 11:45:11.047825 USB0 port 0 child on link 0 USB3 port 0
1831 11:45:11.048377 USB3 port 0
1832 11:45:11.050740 USB3 port 1
1833 11:45:11.051201 USB3 port 2
1834 11:45:11.054058 USB3 port 3
1835 11:45:11.057370 PCI: 00:14.0 child on link 0 USB0 port 0
1836 11:45:11.067092 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1837 11:45:11.073870 USB0 port 0 child on link 0 USB2 port 0
1838 11:45:11.074189 USB2 port 0
1839 11:45:11.076996 USB2 port 1
1840 11:45:11.077223 USB2 port 2
1841 11:45:11.080349 USB2 port 3
1842 11:45:11.080630 USB2 port 4
1843 11:45:11.084083 USB2 port 5
1844 11:45:11.084311 USB2 port 6
1845 11:45:11.087232 USB2 port 7
1846 11:45:11.087466 USB2 port 8
1847 11:45:11.090060 USB2 port 9
1848 11:45:11.093654 USB3 port 0
1849 11:45:11.093939 USB3 port 1
1850 11:45:11.096478 USB3 port 2
1851 11:45:11.096706 USB3 port 3
1852 11:45:11.100102 PCI: 00:14.2
1853 11:45:11.110187 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1854 11:45:11.120078 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1855 11:45:11.123725 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1856 11:45:11.133388 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1857 11:45:11.136907 GENERIC: 0.0
1858 11:45:11.139894 PCI: 00:15.0 child on link 0 I2C: 00:1a
1859 11:45:11.149941 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1860 11:45:11.153818 I2C: 00:1a
1861 11:45:11.154243 I2C: 00:31
1862 11:45:11.156659 I2C: 00:32
1863 11:45:11.159679 PCI: 00:15.1 child on link 0 I2C: 00:50
1864 11:45:11.169923 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1865 11:45:11.173179 I2C: 00:50
1866 11:45:11.173596 PCI: 00:15.2
1867 11:45:11.176237 PCI: 00:15.3 child on link 0 I2C: 00:10
1868 11:45:11.189596 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1869 11:45:11.190032 I2C: 00:10
1870 11:45:11.193598 PCI: 00:16.0
1871 11:45:11.203158 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1872 11:45:11.203796 PCI: 00:19.0
1873 11:45:11.209227 PCI: 00:19.1 child on link 0 I2C: 00:15
1874 11:45:11.219293 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1875 11:45:11.219755 I2C: 00:15
1876 11:45:11.223164 I2C: 00:2c
1877 11:45:11.223578 PCI: 00:1e.0
1878 11:45:11.232602 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1879 11:45:11.239139 PCI: 00:1e.3 child on link 0 SPI: 00
1880 11:45:11.249486 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1881 11:45:11.249964 SPI: 00
1882 11:45:11.252841 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1883 11:45:11.262516 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1884 11:45:11.265630 PNP: 0c09.0
1885 11:45:11.272527 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1886 11:45:11.279297 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1887 11:45:11.285689 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1888 11:45:11.296023 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1889 11:45:11.302977 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1890 11:45:11.303434 GENERIC: 0.0
1891 11:45:11.305770 GENERIC: 1.0
1892 11:45:11.306194 PCI: 00:1f.3
1893 11:45:11.315889 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1894 11:45:11.328884 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1895 11:45:11.329312 PCI: 00:1f.5
1896 11:45:11.338993 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1897 11:45:11.342030 Done allocating resources.
1898 11:45:11.348591 BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2717 ms
1899 11:45:11.355760 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1900 11:45:11.359163 Configure audio over I2S with MAX98373 NAU88L25B.
1901 11:45:11.363313 Enabling BT offload
1902 11:45:11.370501 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1903 11:45:11.373600 Enabling resources...
1904 11:45:11.377455 PCI: 00:00.0 subsystem <- 8086/4609
1905 11:45:11.380464 PCI: 00:00.0 cmd <- 06
1906 11:45:11.383373 PCI: 00:02.0 subsystem <- 8086/46b3
1907 11:45:11.387052 PCI: 00:02.0 cmd <- 03
1908 11:45:11.389831 PCI: 00:04.0 subsystem <- 8086/461d
1909 11:45:11.390251 PCI: 00:04.0 cmd <- 02
1910 11:45:11.393515 PCI: 00:06.0 bridge ctrl <- 0013
1911 11:45:11.396666 PCI: 00:06.0 subsystem <- 8086/464d
1912 11:45:11.400112 PCI: 00:06.0 cmd <- 106
1913 11:45:11.403688 PCI: 00:0a.0 subsystem <- 8086/467d
1914 11:45:11.407044 PCI: 00:0a.0 cmd <- 02
1915 11:45:11.410129 PCI: 00:0d.0 subsystem <- 8086/461e
1916 11:45:11.413678 PCI: 00:0d.0 cmd <- 02
1917 11:45:11.416842 PCI: 00:14.0 subsystem <- 8086/51ed
1918 11:45:11.420224 PCI: 00:14.0 cmd <- 02
1919 11:45:11.423574 PCI: 00:14.2 subsystem <- 8086/51ef
1920 11:45:11.423987 PCI: 00:14.2 cmd <- 02
1921 11:45:11.429934 PCI: 00:14.3 subsystem <- 8086/51f0
1922 11:45:11.430367 PCI: 00:14.3 cmd <- 02
1923 11:45:11.433646 PCI: 00:15.0 subsystem <- 8086/51e8
1924 11:45:11.436940 PCI: 00:15.0 cmd <- 02
1925 11:45:11.440291 PCI: 00:15.1 subsystem <- 8086/51e9
1926 11:45:11.443088 PCI: 00:15.1 cmd <- 06
1927 11:45:11.446254 PCI: 00:15.3 subsystem <- 8086/51eb
1928 11:45:11.449958 PCI: 00:15.3 cmd <- 02
1929 11:45:11.452970 PCI: 00:16.0 subsystem <- 8086/51e0
1930 11:45:11.456605 PCI: 00:16.0 cmd <- 02
1931 11:45:11.459805 PCI: 00:19.1 subsystem <- 8086/51c6
1932 11:45:11.460240 PCI: 00:19.1 cmd <- 02
1933 11:45:11.462962 PCI: 00:1e.0 subsystem <- 8086/51a8
1934 11:45:11.466176 PCI: 00:1e.0 cmd <- 06
1935 11:45:11.469571 PCI: 00:1e.3 subsystem <- 8086/51ab
1936 11:45:11.473060 PCI: 00:1e.3 cmd <- 02
1937 11:45:11.475888 PCI: 00:1f.0 subsystem <- 8086/5182
1938 11:45:11.479237 PCI: 00:1f.0 cmd <- 407
1939 11:45:11.482702 PCI: 00:1f.3 subsystem <- 8086/51c8
1940 11:45:11.485653 PCI: 00:1f.3 cmd <- 02
1941 11:45:11.489200 PCI: 00:1f.5 subsystem <- 8086/51a4
1942 11:45:11.492762 PCI: 00:1f.5 cmd <- 406
1943 11:45:11.493179 PCI: 01:00.0 cmd <- 02
1944 11:45:11.493504 done.
1945 11:45:11.499151 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1946 11:45:11.502287 ME: Version: Unavailable
1947 11:45:11.508826 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1948 11:45:11.509249 Initializing devices...
1949 11:45:11.512728 Root Device init
1950 11:45:11.515500 mainboard: EC init
1951 11:45:11.518567 Chrome EC: Set SMI mask to 0x0000000000000000
1952 11:45:11.522033 Chrome EC: UHEPI supported
1953 11:45:11.528756 Chrome EC: clear events_b mask to 0x0000000000000000
1954 11:45:11.535093 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1955 11:45:11.538310 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1956 11:45:11.545191 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1957 11:45:11.551569 Chrome EC: Set WAKE mask to 0x0000000000000000
1958 11:45:11.554976 Root Device init finished in 39 msecs
1959 11:45:11.558438 PCI: 00:00.0 init
1960 11:45:11.561693 CPU TDP = 15 Watts
1961 11:45:11.562109 CPU PL1 = 15 Watts
1962 11:45:11.564919 CPU PL2 = 55 Watts
1963 11:45:11.565339 CPU PL4 = 123 Watts
1964 11:45:11.571712 PCI: 00:00.0 init finished in 8 msecs
1965 11:45:11.572200 PCI: 00:02.0 init
1966 11:45:11.574975 GMA: Found VBT in CBFS
1967 11:45:11.578141 GMA: Found valid VBT in CBFS
1968 11:45:11.581123 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1969 11:45:11.591250 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1970 11:45:11.594775 PCI: 00:02.0 init finished in 18 msecs
1971 11:45:11.595304 PCI: 00:06.0 init
1972 11:45:11.597646 Initializing PCH PCIe bridge.
1973 11:45:11.604560 PCI: 00:06.0 init finished in 3 msecs
1974 11:45:11.605157 PCI: 00:0a.0 init
1975 11:45:11.607727 PCI: 00:0a.0 init finished in 0 msecs
1976 11:45:11.611175 PCI: 00:14.0 init
1977 11:45:11.614433 PCI: 00:14.0 init finished in 0 msecs
1978 11:45:11.617886 PCI: 00:14.2 init
1979 11:45:11.620829 PCI: 00:14.2 init finished in 0 msecs
1980 11:45:11.621246 PCI: 00:15.0 init
1981 11:45:11.624351 I2C bus 0 version 0x3230302a
1982 11:45:11.627677 DW I2C bus 0 at 0x80655000 (400 KHz)
1983 11:45:11.630822 PCI: 00:15.0 init finished in 6 msecs
1984 11:45:11.634098 PCI: 00:15.1 init
1985 11:45:11.637925 I2C bus 1 version 0x3230302a
1986 11:45:11.640902 DW I2C bus 1 at 0x80656000 (400 KHz)
1987 11:45:11.644218 PCI: 00:15.1 init finished in 6 msecs
1988 11:45:11.647159 PCI: 00:15.3 init
1989 11:45:11.650725 I2C bus 3 version 0x3230302a
1990 11:45:11.653567 DW I2C bus 3 at 0x80657000 (400 KHz)
1991 11:45:11.657063 PCI: 00:15.3 init finished in 6 msecs
1992 11:45:11.657483 PCI: 00:16.0 init
1993 11:45:11.663779 PCI: 00:16.0 init finished in 0 msecs
1994 11:45:11.664196 PCI: 00:19.1 init
1995 11:45:11.667221 I2C bus 5 version 0x3230302a
1996 11:45:11.670552 DW I2C bus 5 at 0x80659000 (400 KHz)
1997 11:45:11.674127 PCI: 00:19.1 init finished in 6 msecs
1998 11:45:11.677363 PCI: 00:1f.0 init
1999 11:45:11.679966 IOAPIC: Initializing IOAPIC at 0xfec00000
2000 11:45:11.683460 IOAPIC: ID = 0x02
2001 11:45:11.687239 IOAPIC: Dumping registers
2002 11:45:11.687685 reg 0x0000: 0x02000000
2003 11:45:11.690183 reg 0x0001: 0x00770020
2004 11:45:11.693692 reg 0x0002: 0x00000000
2005 11:45:11.697316 IOAPIC: 120 interrupts
2006 11:45:11.700155 IOAPIC: Clearing IOAPIC at 0xfec00000
2007 11:45:11.703639 IOAPIC: vector 0x00 value 0x00000000 0x00010000
2008 11:45:11.709865 IOAPIC: vector 0x01 value 0x00000000 0x00010000
2009 11:45:11.713198 IOAPIC: vector 0x02 value 0x00000000 0x00010000
2010 11:45:11.720030 IOAPIC: vector 0x03 value 0x00000000 0x00010000
2011 11:45:11.723433 IOAPIC: vector 0x04 value 0x00000000 0x00010000
2012 11:45:11.726577 IOAPIC: vector 0x05 value 0x00000000 0x00010000
2013 11:45:11.733101 IOAPIC: vector 0x06 value 0x00000000 0x00010000
2014 11:45:11.736963 IOAPIC: vector 0x07 value 0x00000000 0x00010000
2015 11:45:11.742857 IOAPIC: vector 0x08 value 0x00000000 0x00010000
2016 11:45:11.746559 IOAPIC: vector 0x09 value 0x00000000 0x00010000
2017 11:45:11.752855 IOAPIC: vector 0x0a value 0x00000000 0x00010000
2018 11:45:11.756527 IOAPIC: vector 0x0b value 0x00000000 0x00010000
2019 11:45:11.763284 IOAPIC: vector 0x0c value 0x00000000 0x00010000
2020 11:45:11.766654 IOAPIC: vector 0x0d value 0x00000000 0x00010000
2021 11:45:11.769412 IOAPIC: vector 0x0e value 0x00000000 0x00010000
2022 11:45:11.776326 IOAPIC: vector 0x0f value 0x00000000 0x00010000
2023 11:45:11.779611 IOAPIC: vector 0x10 value 0x00000000 0x00010000
2024 11:45:11.786090 IOAPIC: vector 0x11 value 0x00000000 0x00010000
2025 11:45:11.789420 IOAPIC: vector 0x12 value 0x00000000 0x00010000
2026 11:45:11.796595 IOAPIC: vector 0x13 value 0x00000000 0x00010000
2027 11:45:11.799204 IOAPIC: vector 0x14 value 0x00000000 0x00010000
2028 11:45:11.805770 IOAPIC: vector 0x15 value 0x00000000 0x00010000
2029 11:45:11.809430 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2030 11:45:11.816082 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2031 11:45:11.819106 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2032 11:45:11.822747 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2033 11:45:11.829404 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2034 11:45:11.832218 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2035 11:45:11.839005 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2036 11:45:11.842993 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2037 11:45:11.848958 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2038 11:45:11.852783 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2039 11:45:11.858840 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2040 11:45:11.862563 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2041 11:45:11.865373 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2042 11:45:11.872185 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2043 11:45:11.875545 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2044 11:45:11.882277 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2045 11:45:11.885528 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2046 11:45:11.891724 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2047 11:45:11.895697 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2048 11:45:11.901999 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2049 11:45:11.905496 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2050 11:45:11.908569 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2051 11:45:11.915834 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2052 11:45:11.918413 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2053 11:45:11.924810 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2054 11:45:11.928342 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2055 11:45:11.934969 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2056 11:45:11.938204 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2057 11:45:11.944812 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2058 11:45:11.948934 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2059 11:45:11.951763 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2060 11:45:11.958581 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2061 11:45:11.961636 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2062 11:45:11.968361 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2063 11:45:11.971359 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2064 11:45:11.978528 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2065 11:45:11.981557 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2066 11:45:11.988222 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2067 11:45:11.991325 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2068 11:45:11.995010 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2069 11:45:12.001160 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2070 11:45:12.004606 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2071 11:45:12.011052 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2072 11:45:12.014672 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2073 11:45:12.021383 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2074 11:45:12.024704 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2075 11:45:12.031619 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2076 11:45:12.035085 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2077 11:45:12.041018 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2078 11:45:12.044600 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2079 11:45:12.047734 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2080 11:45:12.053966 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2081 11:45:12.057816 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2082 11:45:12.064531 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2083 11:45:12.067462 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2084 11:45:12.074324 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2085 11:45:12.077779 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2086 11:45:12.084157 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2087 11:45:12.087609 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2088 11:45:12.090747 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2089 11:45:12.097739 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2090 11:45:12.100986 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2091 11:45:12.107407 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2092 11:45:12.110643 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2093 11:45:12.117346 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2094 11:45:12.120761 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2095 11:45:12.127001 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2096 11:45:12.130810 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2097 11:45:12.136717 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2098 11:45:12.140467 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2099 11:45:12.143454 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2100 11:45:12.150045 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2101 11:45:12.153474 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2102 11:45:12.160117 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2103 11:45:12.163776 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2104 11:45:12.169818 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2105 11:45:12.173164 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2106 11:45:12.179718 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2107 11:45:12.182767 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2108 11:45:12.189523 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2109 11:45:12.192676 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2110 11:45:12.196759 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2111 11:45:12.202415 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2112 11:45:12.206173 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2113 11:45:12.212787 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2114 11:45:12.216194 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2115 11:45:12.222597 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2116 11:45:12.226415 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2117 11:45:12.232720 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2118 11:45:12.235991 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2119 11:45:12.242509 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2120 11:45:12.245802 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2121 11:45:12.249056 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2122 11:45:12.255829 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2123 11:45:12.258697 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2124 11:45:12.265831 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2125 11:45:12.268729 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2126 11:45:12.275426 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2127 11:45:12.278997 IOAPIC: Bootstrap Processor Local APIC = 0x00
2128 11:45:12.282427 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2129 11:45:12.289330 PCI: 00:1f.0 init finished in 607 msecs
2130 11:45:12.289751 PCI: 00:1f.2 init
2131 11:45:12.292862 apm_control: Disabling ACPI.
2132 11:45:12.296901 APMC done.
2133 11:45:12.300008 PCI: 00:1f.2 init finished in 6 msecs
2134 11:45:12.303425 PCI: 00:1f.3 init
2135 11:45:12.307062 PCI: 00:1f.3 init finished in 0 msecs
2136 11:45:12.307486 PCI: 01:00.0 init
2137 11:45:12.310121 PCI: 01:00.0 init finished in 0 msecs
2138 11:45:12.313004 PNP: 0c09.0 init
2139 11:45:12.317143 Google Chrome EC uptime: 12.132 seconds
2140 11:45:12.322951 Google Chrome AP resets since EC boot: 1
2141 11:45:12.326728 Google Chrome most recent AP reset causes:
2142 11:45:12.329880 0.341: 32775 shutdown: entering G3
2143 11:45:12.336741 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2144 11:45:12.339898 PNP: 0c09.0 init finished in 23 msecs
2145 11:45:12.343283 GENERIC: 0.0 init
2146 11:45:12.346670 GENERIC: 0.0 init finished in 0 msecs
2147 11:45:12.347111 GENERIC: 1.0 init
2148 11:45:12.352860 GENERIC: 1.0 init finished in 0 msecs
2149 11:45:12.353341 Devices initialized
2150 11:45:12.356308 Show all devs... After init.
2151 11:45:12.359376 Root Device: enabled 1
2152 11:45:12.363313 CPU_CLUSTER: 0: enabled 1
2153 11:45:12.363727 DOMAIN: 0000: enabled 1
2154 11:45:12.366367 GPIO: 0: enabled 1
2155 11:45:12.369603 PCI: 00:00.0: enabled 1
2156 11:45:12.370150 PCI: 00:01.0: enabled 0
2157 11:45:12.372646 PCI: 00:01.1: enabled 0
2158 11:45:12.376372 PCI: 00:02.0: enabled 1
2159 11:45:12.379418 PCI: 00:04.0: enabled 1
2160 11:45:12.379946 PCI: 00:05.0: enabled 0
2161 11:45:12.382640 PCI: 00:06.0: enabled 1
2162 11:45:12.386158 PCI: 00:06.2: enabled 0
2163 11:45:12.389286 PCI: 00:07.0: enabled 0
2164 11:45:12.389703 PCI: 00:07.1: enabled 0
2165 11:45:12.392992 PCI: 00:07.2: enabled 0
2166 11:45:12.396164 PCI: 00:07.3: enabled 0
2167 11:45:12.396576 PCI: 00:08.0: enabled 0
2168 11:45:12.399855 PCI: 00:09.0: enabled 0
2169 11:45:12.402987 PCI: 00:0a.0: enabled 1
2170 11:45:12.405914 PCI: 00:0d.0: enabled 1
2171 11:45:12.406562 PCI: 00:0d.1: enabled 0
2172 11:45:12.409460 PCI: 00:0d.2: enabled 0
2173 11:45:12.413004 PCI: 00:0d.3: enabled 0
2174 11:45:12.416260 PCI: 00:0e.0: enabled 0
2175 11:45:12.416688 PCI: 00:10.0: enabled 0
2176 11:45:12.419572 PCI: 00:10.1: enabled 0
2177 11:45:12.422755 PCI: 00:10.6: enabled 0
2178 11:45:12.426294 PCI: 00:10.7: enabled 0
2179 11:45:12.426785 PCI: 00:12.0: enabled 0
2180 11:45:12.429287 PCI: 00:12.6: enabled 0
2181 11:45:12.432427 PCI: 00:12.7: enabled 0
2182 11:45:12.436139 PCI: 00:13.0: enabled 0
2183 11:45:12.436559 PCI: 00:14.0: enabled 1
2184 11:45:12.439538 PCI: 00:14.1: enabled 0
2185 11:45:12.442325 PCI: 00:14.2: enabled 1
2186 11:45:12.442831 PCI: 00:14.3: enabled 1
2187 11:45:12.445859 PCI: 00:15.0: enabled 1
2188 11:45:12.449113 PCI: 00:15.1: enabled 1
2189 11:45:12.452549 PCI: 00:15.2: enabled 0
2190 11:45:12.452972 PCI: 00:15.3: enabled 1
2191 11:45:12.455900 PCI: 00:16.0: enabled 1
2192 11:45:12.458940 PCI: 00:16.1: enabled 0
2193 11:45:12.462290 PCI: 00:16.2: enabled 0
2194 11:45:12.462755 PCI: 00:16.3: enabled 0
2195 11:45:12.465719 PCI: 00:16.4: enabled 0
2196 11:45:12.469090 PCI: 00:16.5: enabled 0
2197 11:45:12.472413 PCI: 00:17.0: enabled 0
2198 11:45:12.472842 PCI: 00:19.0: enabled 0
2199 11:45:12.475634 PCI: 00:19.1: enabled 1
2200 11:45:12.479125 PCI: 00:19.2: enabled 0
2201 11:45:12.482092 PCI: 00:1a.0: enabled 0
2202 11:45:12.482671 PCI: 00:1c.0: enabled 0
2203 11:45:12.485582 PCI: 00:1c.1: enabled 0
2204 11:45:12.488553 PCI: 00:1c.2: enabled 0
2205 11:45:12.491922 PCI: 00:1c.3: enabled 0
2206 11:45:12.492358 PCI: 00:1c.4: enabled 0
2207 11:45:12.495239 PCI: 00:1c.5: enabled 0
2208 11:45:12.498882 PCI: 00:1c.6: enabled 0
2209 11:45:12.499319 PCI: 00:1c.7: enabled 0
2210 11:45:12.501978 PCI: 00:1d.0: enabled 0
2211 11:45:12.505277 PCI: 00:1d.1: enabled 0
2212 11:45:12.509063 PCI: 00:1d.2: enabled 0
2213 11:45:12.509485 PCI: 00:1d.3: enabled 0
2214 11:45:12.511952 PCI: 00:1e.0: enabled 1
2215 11:45:12.515038 PCI: 00:1e.1: enabled 0
2216 11:45:12.518883 PCI: 00:1e.2: enabled 0
2217 11:45:12.519309 PCI: 00:1e.3: enabled 1
2218 11:45:12.522103 PCI: 00:1f.0: enabled 1
2219 11:45:12.525221 PCI: 00:1f.1: enabled 0
2220 11:45:12.528791 PCI: 00:1f.2: enabled 1
2221 11:45:12.529311 PCI: 00:1f.3: enabled 1
2222 11:45:12.532020 PCI: 00:1f.4: enabled 0
2223 11:45:12.535717 PCI: 00:1f.5: enabled 1
2224 11:45:12.538213 PCI: 00:1f.6: enabled 0
2225 11:45:12.538711 PCI: 00:1f.7: enabled 0
2226 11:45:12.541827 GENERIC: 0.0: enabled 1
2227 11:45:12.544693 GENERIC: 0.0: enabled 1
2228 11:45:12.548178 GENERIC: 1.0: enabled 1
2229 11:45:12.548706 GENERIC: 0.0: enabled 1
2230 11:45:12.551591 GENERIC: 1.0: enabled 1
2231 11:45:12.555039 USB0 port 0: enabled 1
2232 11:45:12.555509 USB0 port 0: enabled 1
2233 11:45:12.558297 GENERIC: 0.0: enabled 1
2234 11:45:12.562197 I2C: 00:1a: enabled 1
2235 11:45:12.562676 I2C: 00:31: enabled 1
2236 11:45:12.564963 I2C: 00:32: enabled 1
2237 11:45:12.568201 I2C: 00:50: enabled 1
2238 11:45:12.571443 I2C: 00:10: enabled 1
2239 11:45:12.571945 I2C: 00:15: enabled 1
2240 11:45:12.575123 I2C: 00:2c: enabled 1
2241 11:45:12.578390 GENERIC: 0.0: enabled 1
2242 11:45:12.578842 SPI: 00: enabled 1
2243 11:45:12.581364 PNP: 0c09.0: enabled 1
2244 11:45:12.585066 GENERIC: 0.0: enabled 1
2245 11:45:12.585493 USB3 port 0: enabled 1
2246 11:45:12.588093 USB3 port 1: enabled 0
2247 11:45:12.591704 USB3 port 2: enabled 1
2248 11:45:12.592151 USB3 port 3: enabled 0
2249 11:45:12.594610 USB2 port 0: enabled 1
2250 11:45:12.597872 USB2 port 1: enabled 0
2251 11:45:12.601300 USB2 port 2: enabled 1
2252 11:45:12.601753 USB2 port 3: enabled 0
2253 11:45:12.604698 USB2 port 4: enabled 0
2254 11:45:12.608379 USB2 port 5: enabled 1
2255 11:45:12.608828 USB2 port 6: enabled 0
2256 11:45:12.611467 USB2 port 7: enabled 0
2257 11:45:12.614617 USB2 port 8: enabled 1
2258 11:45:12.618337 USB2 port 9: enabled 1
2259 11:45:12.618911 USB3 port 0: enabled 1
2260 11:45:12.621251 USB3 port 1: enabled 0
2261 11:45:12.625085 USB3 port 2: enabled 0
2262 11:45:12.625608 USB3 port 3: enabled 0
2263 11:45:12.627957 GENERIC: 0.0: enabled 1
2264 11:45:12.631403 GENERIC: 1.0: enabled 1
2265 11:45:12.634472 APIC: 00: enabled 1
2266 11:45:12.635005 APIC: 14: enabled 1
2267 11:45:12.638113 APIC: 16: enabled 1
2268 11:45:12.638559 APIC: 10: enabled 1
2269 11:45:12.641238 APIC: 12: enabled 1
2270 11:45:12.644260 APIC: 01: enabled 1
2271 11:45:12.644802 APIC: 09: enabled 1
2272 11:45:12.647394 APIC: 08: enabled 1
2273 11:45:12.650925 PCI: 01:00.0: enabled 1
2274 11:45:12.654247 BS: BS_DEV_INIT run times (exec / console): 9 / 1133 ms
2275 11:45:12.661000 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2276 11:45:12.664287 ELOG: NV offset 0xf20000 size 0x4000
2277 11:45:12.670713 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2278 11:45:12.677503 ELOG: Event(17) added with size 13 at 2024-05-03 11:45:12 UTC
2279 11:45:12.684779 ELOG: Event(9E) added with size 10 at 2024-05-03 11:45:12 UTC
2280 11:45:12.690520 ELOG: Event(9F) added with size 14 at 2024-05-03 11:45:12 UTC
2281 11:45:12.697543 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2282 11:45:12.703688 ELOG: Event(A0) added with size 9 at 2024-05-03 11:45:12 UTC
2283 11:45:12.706939 elog_add_boot_reason: Logged dev mode boot
2284 11:45:12.714328 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2285 11:45:12.717031 Finalize devices...
2286 11:45:12.717558 PCI: 00:16.0 final
2287 11:45:12.720404 PCI: 00:1f.2 final
2288 11:45:12.720928 GENERIC: 0.0 final
2289 11:45:12.727336 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2290 11:45:12.730402 GENERIC: 1.0 final
2291 11:45:12.737300 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2292 11:45:12.737813 Devices finalized
2293 11:45:12.743473 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2294 11:45:12.746838 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2295 11:45:12.753352 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2296 11:45:12.760204 ME: HFSTS1 : 0x90000245
2297 11:45:12.763996 ME: HFSTS2 : 0x82100116
2298 11:45:12.766955 ME: HFSTS3 : 0x00000050
2299 11:45:12.773231 ME: HFSTS4 : 0x00004000
2300 11:45:12.776686 ME: HFSTS5 : 0x00000000
2301 11:45:12.780014 ME: HFSTS6 : 0x40600006
2302 11:45:12.783319 ME: Manufacturing Mode : NO
2303 11:45:12.790115 ME: SPI Protection Mode Enabled : YES
2304 11:45:12.793437 ME: FPFs Committed : YES
2305 11:45:12.796883 ME: Manufacturing Vars Locked : YES
2306 11:45:12.799873 ME: FW Partition Table : OK
2307 11:45:12.803220 ME: Bringup Loader Failure : NO
2308 11:45:12.806481 ME: Firmware Init Complete : YES
2309 11:45:12.810125 ME: Boot Options Present : NO
2310 11:45:12.816748 ME: Update In Progress : NO
2311 11:45:12.819942 ME: D0i3 Support : YES
2312 11:45:12.823123 ME: Low Power State Enabled : NO
2313 11:45:12.826567 ME: CPU Replaced : YES
2314 11:45:12.829869 ME: CPU Replacement Valid : YES
2315 11:45:12.832948 ME: Current Working State : 5
2316 11:45:12.836666 ME: Current Operation State : 1
2317 11:45:12.839813 ME: Current Operation Mode : 0
2318 11:45:12.842908 ME: Error Code : 0
2319 11:45:12.849693 ME: Enhanced Debug Mode : NO
2320 11:45:12.852808 ME: CPU Debug Disabled : YES
2321 11:45:12.856416 ME: TXT Support : NO
2322 11:45:12.859470 ME: WP for RO is enabled : YES
2323 11:45:12.866583 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2324 11:45:12.873302 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2325 11:45:12.876185 Ramoops buffer: 0x100000@0x76899000.
2326 11:45:12.882737 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2327 11:45:12.889227 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2328 11:45:12.892856 CBFS: 'fallback/slic' not found.
2329 11:45:12.896241 ACPI: Writing ACPI tables at 7686d000.
2330 11:45:12.896658 ACPI: * FACS
2331 11:45:12.899324 ACPI: * DSDT
2332 11:45:12.906262 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2333 11:45:12.909250 ACPI: * FADT
2334 11:45:12.909685 SCI is IRQ9
2335 11:45:12.916044 ACPI: added table 1/32, length now 40
2336 11:45:12.916499 ACPI: * SSDT
2337 11:45:12.922746 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2338 11:45:12.925611 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2339 11:45:12.932138 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2340 11:45:12.935618 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2341 11:45:12.942323 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2342 11:45:12.945486 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2343 11:45:12.952235 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2344 11:45:12.958877 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2345 11:45:12.962496 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2346 11:45:12.968532 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2347 11:45:12.972160 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2348 11:45:12.978857 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2349 11:45:12.981892 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2350 11:45:12.988550 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2351 11:45:12.995310 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2352 11:45:12.998643 PS2K: Passing 80 keymaps to kernel
2353 11:45:13.005629 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2354 11:45:13.012041 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2355 11:45:13.018308 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2356 11:45:13.025314 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2357 11:45:13.028261 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2358 11:45:13.034947 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2359 11:45:13.041832 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2360 11:45:13.048549 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2361 11:45:13.055191 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2362 11:45:13.061760 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2363 11:45:13.064667 ACPI: added table 2/32, length now 44
2364 11:45:13.068076 ACPI: * MCFG
2365 11:45:13.071838 ACPI: added table 3/32, length now 48
2366 11:45:13.072267 ACPI: * TPM2
2367 11:45:13.074801 TPM2 log created at 0x7685d000
2368 11:45:13.078162 ACPI: added table 4/32, length now 52
2369 11:45:13.081479 ACPI: * LPIT
2370 11:45:13.084849 ACPI: added table 5/32, length now 56
2371 11:45:13.085276 ACPI: * MADT
2372 11:45:13.087816 SCI is IRQ9
2373 11:45:13.091676 ACPI: added table 6/32, length now 60
2374 11:45:13.094800 cmd_reg from pmc_make_ipc_cmd 1052838
2375 11:45:13.101723 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2376 11:45:13.107968 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2377 11:45:13.114988 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2378 11:45:13.118415 PMC CrashLog size in discovery mode: 0xC00
2379 11:45:13.121937 cpu crashlog bar addr: 0x80640000
2380 11:45:13.125229 cpu discovery table offset: 0x6030
2381 11:45:13.127852 cpu_crashlog_discovery_table buffer count: 0x3
2382 11:45:13.134897 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2383 11:45:13.141740 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2384 11:45:13.147672 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2385 11:45:13.155048 PMC crashLog size in discovery mode : 0xC00
2386 11:45:13.162036 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2387 11:45:13.164752 discover mode PMC crashlog size adjusted to: 0x200
2388 11:45:13.171100 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2389 11:45:13.177895 discover mode PMC crashlog size adjusted to: 0x0
2390 11:45:13.181329 m_cpu_crashLog_size : 0x3480 bytes
2391 11:45:13.184288 CPU crashLog present.
2392 11:45:13.187686 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2393 11:45:13.194325 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2394 11:45:13.198027 current = 76876550
2395 11:45:13.198640 ACPI: * DMAR
2396 11:45:13.204757 ACPI: added table 7/32, length now 64
2397 11:45:13.208169 ACPI: added table 8/32, length now 68
2398 11:45:13.208705 ACPI: * HPET
2399 11:45:13.211541 ACPI: added table 9/32, length now 72
2400 11:45:13.214134 ACPI: done.
2401 11:45:13.217336 ACPI tables: 38528 bytes.
2402 11:45:13.217774 smbios_write_tables: 76857000
2403 11:45:13.221987 EC returned error result code 3
2404 11:45:13.224934 Couldn't obtain OEM name from CBI
2405 11:45:13.228652 Create SMBIOS type 16
2406 11:45:13.232118 Create SMBIOS type 17
2407 11:45:13.235152 Create SMBIOS type 20
2408 11:45:13.235636 GENERIC: 0.0 (WIFI Device)
2409 11:45:13.238690 SMBIOS tables: 2156 bytes.
2410 11:45:13.242105 Writing table forward entry at 0x00000500
2411 11:45:13.248522 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2412 11:45:13.251976 Writing coreboot table at 0x76891000
2413 11:45:13.258196 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2414 11:45:13.264851 1. 0000000000001000-000000000009ffff: RAM
2415 11:45:13.268820 2. 00000000000a0000-00000000000fffff: RESERVED
2416 11:45:13.271578 3. 0000000000100000-0000000076856fff: RAM
2417 11:45:13.278205 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2418 11:45:13.285015 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2419 11:45:13.288253 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2420 11:45:13.294857 7. 0000000077000000-00000000803fffff: RESERVED
2421 11:45:13.298557 8. 00000000c0000000-00000000cfffffff: RESERVED
2422 11:45:13.305158 9. 00000000f8000000-00000000f9ffffff: RESERVED
2423 11:45:13.308233 10. 00000000fb000000-00000000fb000fff: RESERVED
2424 11:45:13.314830 11. 00000000fc800000-00000000fe7fffff: RESERVED
2425 11:45:13.318198 12. 00000000feb00000-00000000feb7ffff: RESERVED
2426 11:45:13.321653 13. 00000000fec00000-00000000fecfffff: RESERVED
2427 11:45:13.328336 14. 00000000fed40000-00000000fed6ffff: RESERVED
2428 11:45:13.331517 15. 00000000fed80000-00000000fed87fff: RESERVED
2429 11:45:13.338210 16. 00000000fed90000-00000000fed92fff: RESERVED
2430 11:45:13.341162 17. 00000000feda0000-00000000feda1fff: RESERVED
2431 11:45:13.347582 18. 00000000fedc0000-00000000feddffff: RESERVED
2432 11:45:13.350966 19. 0000000100000000-000000027fbfffff: RAM
2433 11:45:13.354553 Passing 4 GPIOs to payload:
2434 11:45:13.357833 NAME | PORT | POLARITY | VALUE
2435 11:45:13.364394 lid | undefined | high | high
2436 11:45:13.370889 power | undefined | high | low
2437 11:45:13.374239 oprom | undefined | high | low
2438 11:45:13.380693 EC in RW | 0x00000151 | high | high
2439 11:45:13.381121 Board ID: 3
2440 11:45:13.384185 FW config: 0x131
2441 11:45:13.391045 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum 48ff
2442 11:45:13.394102 coreboot table: 1788 bytes.
2443 11:45:13.397687 IMD ROOT 0. 0x76fff000 0x00001000
2444 11:45:13.400769 IMD SMALL 1. 0x76ffe000 0x00001000
2445 11:45:13.404363 FSP MEMORY 2. 0x76afe000 0x00500000
2446 11:45:13.407238 CONSOLE 3. 0x76ade000 0x00020000
2447 11:45:13.411208 RW MCACHE 4. 0x76add000 0x0000043c
2448 11:45:13.414044 RO MCACHE 5. 0x76adc000 0x00000fd8
2449 11:45:13.417763 FMAP 6. 0x76adb000 0x0000064a
2450 11:45:13.424084 TIME STAMP 7. 0x76ada000 0x00000910
2451 11:45:13.427802 VBOOT WORK 8. 0x76ac6000 0x00014000
2452 11:45:13.430799 MEM INFO 9. 0x76ac5000 0x000003b8
2453 11:45:13.433685 ROMSTG STCK10. 0x76ac4000 0x00001000
2454 11:45:13.437375 AFTER CAR 11. 0x76ab8000 0x0000c000
2455 11:45:13.440523 RAMSTAGE 12. 0x76a2e000 0x0008a000
2456 11:45:13.443943 ACPI BERT 13. 0x76a1e000 0x00010000
2457 11:45:13.447088 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2458 11:45:13.453778 REFCODE 15. 0x769ae000 0x0006f000
2459 11:45:13.457128 SMM BACKUP 16. 0x7699e000 0x00010000
2460 11:45:13.460362 IGD OPREGION17. 0x76999000 0x00004203
2461 11:45:13.464048 RAMOOPS 18. 0x76899000 0x00100000
2462 11:45:13.466642 COREBOOT 19. 0x76891000 0x00008000
2463 11:45:13.470107 ACPI 20. 0x7686d000 0x00024000
2464 11:45:13.473578 TPM2 TCGLOG21. 0x7685d000 0x00010000
2465 11:45:13.480290 PMC CRASHLOG22. 0x7685c000 0x00000c00
2466 11:45:13.484632 CPU CRASHLOG23. 0x76858000 0x00003480
2467 11:45:13.486801 SMBIOS 24. 0x76857000 0x00001000
2468 11:45:13.487227 IMD small region:
2469 11:45:13.493835 IMD ROOT 0. 0x76ffec00 0x00000400
2470 11:45:13.496926 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2471 11:45:13.500016 VPD 2. 0x76ffeb60 0x0000006c
2472 11:45:13.503667 POWER STATE 3. 0x76ffeb00 0x00000044
2473 11:45:13.506795 ROMSTAGE 4. 0x76ffeae0 0x00000004
2474 11:45:13.510084 ACPI GNVS 5. 0x76ffea80 0x00000048
2475 11:45:13.517075 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2476 11:45:13.519643 BS: BS_WRITE_TABLES run times (exec / console): 6 / 628 ms
2477 11:45:13.523027 MTRR: Physical address space:
2478 11:45:13.529468 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2479 11:45:13.536336 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2480 11:45:13.543195 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2481 11:45:13.549897 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2482 11:45:13.555801 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2483 11:45:13.563004 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2484 11:45:13.569345 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2485 11:45:13.572722 MTRR: Fixed MSR 0x250 0x0606060606060606
2486 11:45:13.576057 MTRR: Fixed MSR 0x258 0x0606060606060606
2487 11:45:13.578987 MTRR: Fixed MSR 0x259 0x0000000000000000
2488 11:45:13.585895 MTRR: Fixed MSR 0x268 0x0606060606060606
2489 11:45:13.589138 MTRR: Fixed MSR 0x269 0x0606060606060606
2490 11:45:13.592855 MTRR: Fixed MSR 0x26a 0x0606060606060606
2491 11:45:13.596176 MTRR: Fixed MSR 0x26b 0x0606060606060606
2492 11:45:13.602399 MTRR: Fixed MSR 0x26c 0x0606060606060606
2493 11:45:13.605985 MTRR: Fixed MSR 0x26d 0x0606060606060606
2494 11:45:13.609194 MTRR: Fixed MSR 0x26e 0x0606060606060606
2495 11:45:13.612256 MTRR: Fixed MSR 0x26f 0x0606060606060606
2496 11:45:13.616367 call enable_fixed_mtrr()
2497 11:45:13.620022 CPU physical address size: 39 bits
2498 11:45:13.626359 MTRR: default type WB/UC MTRR counts: 6/6.
2499 11:45:13.629669 MTRR: UC selected as default type.
2500 11:45:13.636286 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2501 11:45:13.639779 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2502 11:45:13.645931 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2503 11:45:13.652638 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2504 11:45:13.659492 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2505 11:45:13.666151 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2506 11:45:13.672689 MTRR: Fixed MSR 0x250 0x0606060606060606
2507 11:45:13.676015 MTRR: Fixed MSR 0x258 0x0606060606060606
2508 11:45:13.679523 MTRR: Fixed MSR 0x259 0x0000000000000000
2509 11:45:13.682247 MTRR: Fixed MSR 0x268 0x0606060606060606
2510 11:45:13.689559 MTRR: Fixed MSR 0x269 0x0606060606060606
2511 11:45:13.692856 MTRR: Fixed MSR 0x26a 0x0606060606060606
2512 11:45:13.695736 MTRR: Fixed MSR 0x26b 0x0606060606060606
2513 11:45:13.699510 MTRR: Fixed MSR 0x26c 0x0606060606060606
2514 11:45:13.706019 MTRR: Fixed MSR 0x26d 0x0606060606060606
2515 11:45:13.708994 MTRR: Fixed MSR 0x26e 0x0606060606060606
2516 11:45:13.712523 MTRR: Fixed MSR 0x26f 0x0606060606060606
2517 11:45:13.715525 MTRR: Fixed MSR 0x250 0x0606060606060606
2518 11:45:13.719534 call enable_fixed_mtrr()
2519 11:45:13.722154 MTRR: Fixed MSR 0x250 0x0606060606060606
2520 11:45:13.729114 MTRR: Fixed MSR 0x250 0x0606060606060606
2521 11:45:13.733004 MTRR: Fixed MSR 0x250 0x0606060606060606
2522 11:45:13.735540 MTRR: Fixed MSR 0x258 0x0606060606060606
2523 11:45:13.739000 MTRR: Fixed MSR 0x259 0x0000000000000000
2524 11:45:13.742189 MTRR: Fixed MSR 0x268 0x0606060606060606
2525 11:45:13.749151 MTRR: Fixed MSR 0x269 0x0606060606060606
2526 11:45:13.752441 MTRR: Fixed MSR 0x258 0x0606060606060606
2527 11:45:13.755433 MTRR: Fixed MSR 0x259 0x0000000000000000
2528 11:45:13.758631 MTRR: Fixed MSR 0x268 0x0606060606060606
2529 11:45:13.765449 MTRR: Fixed MSR 0x269 0x0606060606060606
2530 11:45:13.768702 MTRR: Fixed MSR 0x258 0x0606060606060606
2531 11:45:13.772094 MTRR: Fixed MSR 0x259 0x0000000000000000
2532 11:45:13.775088 MTRR: Fixed MSR 0x268 0x0606060606060606
2533 11:45:13.782036 MTRR: Fixed MSR 0x269 0x0606060606060606
2534 11:45:13.785024 MTRR: Fixed MSR 0x26a 0x0606060606060606
2535 11:45:13.788473 MTRR: Fixed MSR 0x26b 0x0606060606060606
2536 11:45:13.791866 MTRR: Fixed MSR 0x26c 0x0606060606060606
2537 11:45:13.798429 MTRR: Fixed MSR 0x26d 0x0606060606060606
2538 11:45:13.801849 MTRR: Fixed MSR 0x26e 0x0606060606060606
2539 11:45:13.804987 MTRR: Fixed MSR 0x26f 0x0606060606060606
2540 11:45:13.808060 CPU physical address size: 39 bits
2541 11:45:13.811636 call enable_fixed_mtrr()
2542 11:45:13.814718 MTRR: Fixed MSR 0x26a 0x0606060606060606
2543 11:45:13.818263 MTRR: Fixed MSR 0x26a 0x0606060606060606
2544 11:45:13.825043 MTRR: Fixed MSR 0x250 0x0606060606060606
2545 11:45:13.828581 MTRR: Fixed MSR 0x250 0x0606060606060606
2546 11:45:13.831631 MTRR: Fixed MSR 0x258 0x0606060606060606
2547 11:45:13.835122 MTRR: Fixed MSR 0x26b 0x0606060606060606
2548 11:45:13.838308 MTRR: Fixed MSR 0x26c 0x0606060606060606
2549 11:45:13.845294 MTRR: Fixed MSR 0x26d 0x0606060606060606
2550 11:45:13.848453 MTRR: Fixed MSR 0x26e 0x0606060606060606
2551 11:45:13.851564 MTRR: Fixed MSR 0x26f 0x0606060606060606
2552 11:45:13.854913 MTRR: Fixed MSR 0x259 0x0000000000000000
2553 11:45:13.858360 call enable_fixed_mtrr()
2554 11:45:13.861789 MTRR: Fixed MSR 0x268 0x0606060606060606
2555 11:45:13.868459 MTRR: Fixed MSR 0x269 0x0606060606060606
2556 11:45:13.871421 MTRR: Fixed MSR 0x26b 0x0606060606060606
2557 11:45:13.874652 CPU physical address size: 39 bits
2558 11:45:13.878277 MTRR: Fixed MSR 0x26a 0x0606060606060606
2559 11:45:13.881471 CPU physical address size: 39 bits
2560 11:45:13.887911 MTRR: Fixed MSR 0x26c 0x0606060606060606
2561 11:45:13.891437 MTRR: Fixed MSR 0x26b 0x0606060606060606
2562 11:45:13.894636 MTRR: Fixed MSR 0x26d 0x0606060606060606
2563 11:45:13.898142 MTRR: Fixed MSR 0x26e 0x0606060606060606
2564 11:45:13.901543 MTRR: Fixed MSR 0x26f 0x0606060606060606
2565 11:45:13.907655 MTRR: Fixed MSR 0x26c 0x0606060606060606
2566 11:45:13.908072 call enable_fixed_mtrr()
2567 11:45:13.914475 MTRR: Fixed MSR 0x26d 0x0606060606060606
2568 11:45:13.917603 MTRR: Fixed MSR 0x26e 0x0606060606060606
2569 11:45:13.921799 MTRR: Fixed MSR 0x26f 0x0606060606060606
2570 11:45:13.924624 CPU physical address size: 39 bits
2571 11:45:13.927712 call enable_fixed_mtrr()
2572 11:45:13.931344 MTRR: Fixed MSR 0x258 0x0606060606060606
2573 11:45:13.934568 CPU physical address size: 39 bits
2574 11:45:13.940859 MTRR: Fixed MSR 0x259 0x0000000000000000
2575 11:45:13.944656 MTRR: Fixed MSR 0x258 0x0606060606060606
2576 11:45:13.947624 MTRR: Fixed MSR 0x268 0x0606060606060606
2577 11:45:13.951349 MTRR: Fixed MSR 0x269 0x0606060606060606
2578 11:45:13.954186 MTRR: Fixed MSR 0x259 0x0000000000000000
2579 11:45:13.960830 MTRR: Fixed MSR 0x268 0x0606060606060606
2580 11:45:13.964336 MTRR: Fixed MSR 0x269 0x0606060606060606
2581 11:45:13.967651 MTRR: Fixed MSR 0x26a 0x0606060606060606
2582 11:45:13.970614 MTRR: Fixed MSR 0x26b 0x0606060606060606
2583 11:45:13.977263 MTRR: Fixed MSR 0x26c 0x0606060606060606
2584 11:45:13.980694 MTRR: Fixed MSR 0x26d 0x0606060606060606
2585 11:45:13.984016 MTRR: Fixed MSR 0x26e 0x0606060606060606
2586 11:45:13.987315 MTRR: Fixed MSR 0x26f 0x0606060606060606
2587 11:45:13.994080 MTRR: Fixed MSR 0x26a 0x0606060606060606
2588 11:45:13.997242 call enable_fixed_mtrr()
2589 11:45:14.000702 MTRR: Fixed MSR 0x26b 0x0606060606060606
2590 11:45:14.003988 MTRR: Fixed MSR 0x26c 0x0606060606060606
2591 11:45:14.007526 MTRR: Fixed MSR 0x26d 0x0606060606060606
2592 11:45:14.014213 MTRR: Fixed MSR 0x26e 0x0606060606060606
2593 11:45:14.017062 MTRR: Fixed MSR 0x26f 0x0606060606060606
2594 11:45:14.020492 CPU physical address size: 39 bits
2595 11:45:14.024058 call enable_fixed_mtrr()
2596 11:45:14.027061 CPU physical address size: 39 bits
2597 11:45:14.030190
2598 11:45:14.030638 MTRR check
2599 11:45:14.033879 Fixed MTRRs : Enabled
2600 11:45:14.034374 Variable MTRRs: Enabled
2601 11:45:14.034762
2602 11:45:14.039917 BS: BS_WRITE_TABLES exit times (exec / console): 253 / 150 ms
2603 11:45:14.043428 Checking cr50 for pending updates
2604 11:45:14.055997 Reading cr50 TPM mode
2605 11:45:14.070945 BS: BS_PAYLOAD_LOAD entry times (exec / console): 17 / 6 ms
2606 11:45:14.081380 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2607 11:45:14.084395 Checking segment from ROM address 0xf96cbe6c
2608 11:45:14.087425 Checking segment from ROM address 0xf96cbe88
2609 11:45:14.094329 Loading segment from ROM address 0xf96cbe6c
2610 11:45:14.094831 code (compression=1)
2611 11:45:14.104250 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2612 11:45:14.114278 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2613 11:45:14.114734 using LZMA
2614 11:45:14.136338 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2615 11:45:14.143242 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2616 11:45:14.151406 Loading segment from ROM address 0xf96cbe88
2617 11:45:14.154595 Entry Point 0x30000000
2618 11:45:14.155011 Loaded segments
2619 11:45:14.161281 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2620 11:45:14.168014 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2621 11:45:14.170947 Finalizing chipset.
2622 11:45:14.174684 apm_control: Finalizing SMM.
2623 11:45:14.175194 APMC done.
2624 11:45:14.177604 HECI: CSE device 16.1 is disabled
2625 11:45:14.181302 HECI: CSE device 16.2 is disabled
2626 11:45:14.184327 HECI: CSE device 16.3 is disabled
2627 11:45:14.187794 HECI: CSE device 16.4 is disabled
2628 11:45:14.190686 HECI: CSE device 16.5 is disabled
2629 11:45:14.194237 HECI: Sending End-of-Post
2630 11:45:14.203201 CSE: EOP requested action: continue boot
2631 11:45:14.206333 CSE EOP successful, continuing boot
2632 11:45:14.213044 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2633 11:45:14.216064 mp_park_aps done after 0 msecs.
2634 11:45:14.219337 Jumping to boot code at 0x30000000(0x76891000)
2635 11:45:14.228914 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2636 11:45:14.233242
2637 11:45:14.233739
2638 11:45:14.234074
2639 11:45:14.236559 Starting depthcharge on Volmar...
2640 11:45:14.237034
2641 11:45:14.238144 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2642 11:45:14.238669 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2643 11:45:14.239088 Setting prompt string to ['brya:']
2644 11:45:14.239598 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
2645 11:45:14.243694 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2646 11:45:14.244298
2647 11:45:14.249830 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2648 11:45:14.250249
2649 11:45:14.256528 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2650 11:45:14.256943
2651 11:45:14.259582 configure_storage: Failed to remap 1C:2
2652 11:45:14.259999
2653 11:45:14.263587 Wipe memory regions:
2654 11:45:14.264000
2655 11:45:14.266614 [0x00000000001000, 0x000000000a0000)
2656 11:45:14.267139
2657 11:45:14.269409 [0x00000000100000, 0x00000030000000)
2658 11:45:14.372717
2659 11:45:14.375830 [0x00000032668e60, 0x00000076857000)
2660 11:45:14.519591
2661 11:45:14.523036 [0x00000100000000, 0x0000027fc00000)
2662 11:45:15.333459
2663 11:45:15.336452 ec_init: CrosEC protocol v3 supported (256, 256)
2664 11:45:15.944971
2665 11:45:15.945457 R8152: Initializing
2666 11:45:15.945783
2667 11:45:15.947965 Version 9 (ocp_data = 6010)
2668 11:45:15.948411
2669 11:45:15.951122 R8152: Done initializing
2670 11:45:15.951535
2671 11:45:15.954854 Adding net device
2672 11:45:16.255763
2673 11:45:16.259051 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2674 11:45:16.259639
2675 11:45:16.260051
2676 11:45:16.260390
2677 11:45:16.261171 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2679 11:45:16.362371 brya: tftpboot 192.168.201.1 13627374/tftp-deploy-ant0q1sl/kernel/bzImage 13627374/tftp-deploy-ant0q1sl/kernel/cmdline 13627374/tftp-deploy-ant0q1sl/ramdisk/ramdisk.cpio.gz
2680 11:45:16.363179 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2681 11:45:16.363703 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2682 11:45:16.368550 tftpboot 192.168.201.1 13627374/tftp-deploy-ant0q1sl/kernel/bzIploy-ant0q1sl/kernel/cmdline 13627374/tftp-deploy-ant0q1sl/ramdisk/ramdisk.cpio.gz
2683 11:45:16.369034
2684 11:45:16.369560 Waiting for link
2685 11:45:16.571057
2686 11:45:16.571619 done.
2687 11:45:16.571987
2688 11:45:16.572348 MAC: 00:e0:4c:68:01:22
2689 11:45:16.572964
2690 11:45:16.574513 Sending DHCP discover... done.
2691 11:45:16.574944
2692 11:45:16.577604 Waiting for reply... done.
2693 11:45:16.578118
2694 11:45:16.581122 Sending DHCP request... done.
2695 11:45:16.581583
2696 11:45:16.587575 Waiting for reply... done.
2697 11:45:16.588034
2698 11:45:16.588394 My ip is 192.168.201.15
2699 11:45:16.588733
2700 11:45:16.590629 The DHCP server ip is 192.168.201.1
2701 11:45:16.594422
2702 11:45:16.597930 TFTP server IP predefined by user: 192.168.201.1
2703 11:45:16.598392
2704 11:45:16.603964 Bootfile predefined by user: 13627374/tftp-deploy-ant0q1sl/kernel/bzImage
2705 11:45:16.604384
2706 11:45:16.607435 Sending tftp read request... done.
2707 11:45:16.607852
2708 11:45:16.616177 Waiting for the transfer...
2709 11:45:16.616619
2710 11:45:16.907829 00000000 ################################################################
2711 11:45:16.907981
2712 11:45:17.187538 00080000 ################################################################
2713 11:45:17.187704
2714 11:45:17.472004 00100000 ################################################################
2715 11:45:17.472139
2716 11:45:17.757809 00180000 ################################################################
2717 11:45:17.757946
2718 11:45:18.038377 00200000 ################################################################
2719 11:45:18.038557
2720 11:45:18.319045 00280000 ################################################################
2721 11:45:18.319184
2722 11:45:18.577946 00300000 ################################################################
2723 11:45:18.578085
2724 11:45:18.835932 00380000 ################################################################
2725 11:45:18.836073
2726 11:45:19.090384 00400000 ################################################################
2727 11:45:19.090558
2728 11:45:19.358958 00480000 ################################################################
2729 11:45:19.359090
2730 11:45:19.639664 00500000 ################################################################
2731 11:45:19.639834
2732 11:45:19.893791 00580000 ################################################################
2733 11:45:19.893959
2734 11:45:20.156872 00600000 ################################################################
2735 11:45:20.157005
2736 11:45:20.420028 00680000 ################################################################
2737 11:45:20.420166
2738 11:45:20.671893 00700000 ################################################################
2739 11:45:20.672036
2740 11:45:20.908679 00780000 ################################################################
2741 11:45:20.908835
2742 11:45:21.166557 00800000 ################################################################
2743 11:45:21.166690
2744 11:45:21.430700 00880000 ################################################################
2745 11:45:21.430838
2746 11:45:21.680584 00900000 ################################################################
2747 11:45:21.680724
2748 11:45:21.942105 00980000 ################################################################
2749 11:45:21.942239
2750 11:45:22.201610 00a00000 ################################################################
2751 11:45:22.201773
2752 11:45:22.457554 00a80000 ################################################################
2753 11:45:22.457685
2754 11:45:22.732670 00b00000 ################################################################
2755 11:45:22.732803
2756 11:45:23.009974 00b80000 ################################################################
2757 11:45:23.010107
2758 11:45:23.264039 00c00000 ################################################################
2759 11:45:23.264173
2760 11:45:23.532329 00c80000 ################################################################
2761 11:45:23.532466
2762 11:45:23.768646 00d00000 ######################################################## done.
2763 11:45:23.768793
2764 11:45:23.771901 The bootfile was 14090128 bytes long.
2765 11:45:23.772020
2766 11:45:23.775087 Sending tftp read request... done.
2767 11:45:23.775210
2768 11:45:23.778547 Waiting for the transfer...
2769 11:45:23.778655
2770 11:45:24.126734 00000000 ################################################################
2771 11:45:24.127266
2772 11:45:24.421824 00080000 ################################################################
2773 11:45:24.421957
2774 11:45:24.688995 00100000 ################################################################
2775 11:45:24.689135
2776 11:45:24.948956 00180000 ################################################################
2777 11:45:24.949129
2778 11:45:25.212649 00200000 ################################################################
2779 11:45:25.212783
2780 11:45:25.489319 00280000 ################################################################
2781 11:45:25.489455
2782 11:45:25.745173 00300000 ################################################################
2783 11:45:25.745310
2784 11:45:26.008149 00380000 ################################################################
2785 11:45:26.008302
2786 11:45:26.248497 00400000 ################################################################
2787 11:45:26.248687
2788 11:45:26.509169 00480000 ################################################################
2789 11:45:26.509316
2790 11:45:26.763590 00500000 ################################################################
2791 11:45:26.763729
2792 11:45:27.032487 00580000 ################################################################
2793 11:45:27.032637
2794 11:45:27.267794 00600000 ########################################################### done.
2795 11:45:27.267930
2796 11:45:27.271145 Sending tftp read request... done.
2797 11:45:27.274607
2798 11:45:27.274715 Waiting for the transfer...
2799 11:45:27.274807
2800 11:45:27.278003 00000000 # done.
2801 11:45:27.278111
2802 11:45:27.288022 Command line loaded dynamically from TFTP file: 13627374/tftp-deploy-ant0q1sl/kernel/cmdline
2803 11:45:27.288131
2804 11:45:27.310339 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/13627374/extract-nfsrootfs-zmhz5cd6,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2805 11:45:27.318656
2806 11:45:27.321405 Shutting down all USB controllers.
2807 11:45:27.321478
2808 11:45:27.321540 Removing current net device
2809 11:45:27.321599
2810 11:45:27.325139 Finalizing coreboot
2811 11:45:27.325240
2812 11:45:27.331204 Exiting depthcharge with code 4 at timestamp: 23344122
2813 11:45:27.331288
2814 11:45:27.331356
2815 11:45:27.331418 Starting kernel ...
2816 11:45:27.331478
2817 11:45:27.331542
2818 11:45:27.331948 end: 2.2.4 bootloader-commands (duration 00:00:13) [common]
2819 11:45:27.332050 start: 2.2.5 auto-login-action (timeout 00:04:28) [common]
2820 11:45:27.332124 Setting prompt string to ['Linux version [0-9]']
2821 11:45:27.332193 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2822 11:45:27.332259 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2824 11:49:55.332791 end: 2.2.5 auto-login-action (duration 00:04:28) [common]
2826 11:49:55.333579 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 268 seconds'
2828 11:49:55.334232 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2831 11:49:55.335491 end: 2 depthcharge-action (duration 00:05:00) [common]
2833 11:49:55.336432 Cleaning after the job
2834 11:49:55.336813 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13627374/tftp-deploy-ant0q1sl/ramdisk
2835 11:49:55.340932 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13627374/tftp-deploy-ant0q1sl/kernel
2836 11:49:55.348069 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13627374/tftp-deploy-ant0q1sl/nfsrootfs
2837 11:49:55.405735 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13627374/tftp-deploy-ant0q1sl/modules
2838 11:49:55.406287 start: 4.1 power-off (timeout 00:00:30) [common]
2839 11:49:55.406483 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-4' '--port=1' '--command=off'
2840 11:49:55.487638 >> Command sent successfully.
2841 11:49:55.497866 Returned 0 in 0 seconds
2842 11:49:55.599119 end: 4.1 power-off (duration 00:00:00) [common]
2844 11:49:55.600724 start: 4.2 read-feedback (timeout 00:10:00) [common]
2845 11:49:55.602036 Listened to connection for namespace 'common' for up to 1s
2847 11:49:55.603412 Listened to connection for namespace 'common' for up to 1s
2848 11:49:56.602689 Finalising connection for namespace 'common'
2849 11:49:56.603581 Disconnecting from shell: Finalise
2850 11:49:56.604007
2851 11:49:56.705033 end: 4.2 read-feedback (duration 00:00:01) [common]
2852 11:49:56.705667 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13627374
2853 11:49:57.006158 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13627374
2854 11:49:57.006350 JobError: Your job cannot terminate cleanly.