Boot log: acer-cp514-2h-1130g7-volteer
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 11:44:11.629015 lava-dispatcher, installed at version: 2024.01
2 11:44:11.629219 start: 0 validate
3 11:44:11.629368 Start time: 2024-05-03 11:44:11.629360+00:00 (UTC)
4 11:44:11.629493 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:44:11.629626 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-cros-ec%2F20240313.0%2Famd64%2Frootfs.cpio.gz exists
6 11:44:11.892181 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:44:11.892970 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2481-gef9c8224c1829%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:44:12.155861 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:44:12.156788 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2481-gef9c8224c1829%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 11:44:17.058562 validate duration: 5.43
12 11:44:17.058850 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 11:44:17.058961 start: 1.1 download-retry (timeout 00:10:00) [common]
14 11:44:17.059069 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 11:44:17.059195 Not decompressing ramdisk as can be used compressed.
16 11:44:17.059279 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-cros-ec/20240313.0/amd64/rootfs.cpio.gz
17 11:44:17.059356 saving as /var/lib/lava/dispatcher/tmp/13627310/tftp-deploy-f9b58v3h/ramdisk/rootfs.cpio.gz
18 11:44:17.059420 total size: 40325651 (38 MB)
19 11:44:17.684333 progress 0 % (0 MB)
20 11:44:17.694921 progress 5 % (1 MB)
21 11:44:17.705271 progress 10 % (3 MB)
22 11:44:17.715447 progress 15 % (5 MB)
23 11:44:17.725771 progress 20 % (7 MB)
24 11:44:17.735866 progress 25 % (9 MB)
25 11:44:17.746185 progress 30 % (11 MB)
26 11:44:17.756430 progress 35 % (13 MB)
27 11:44:17.766670 progress 40 % (15 MB)
28 11:44:17.776761 progress 45 % (17 MB)
29 11:44:17.786948 progress 50 % (19 MB)
30 11:44:17.797090 progress 55 % (21 MB)
31 11:44:17.807261 progress 60 % (23 MB)
32 11:44:17.817269 progress 65 % (25 MB)
33 11:44:17.827627 progress 70 % (26 MB)
34 11:44:17.837890 progress 75 % (28 MB)
35 11:44:17.848264 progress 80 % (30 MB)
36 11:44:17.858544 progress 85 % (32 MB)
37 11:44:17.868669 progress 90 % (34 MB)
38 11:44:17.878675 progress 95 % (36 MB)
39 11:44:17.888485 progress 100 % (38 MB)
40 11:44:17.888696 38 MB downloaded in 0.83 s (46.37 MB/s)
41 11:44:17.888861 end: 1.1.1 http-download (duration 00:00:01) [common]
43 11:44:17.889105 end: 1.1 download-retry (duration 00:00:01) [common]
44 11:44:17.889192 start: 1.2 download-retry (timeout 00:09:59) [common]
45 11:44:17.889277 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 11:44:17.889413 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2481-gef9c8224c1829/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 11:44:17.889494 saving as /var/lib/lava/dispatcher/tmp/13627310/tftp-deploy-f9b58v3h/kernel/bzImage
48 11:44:17.889556 total size: 14090128 (13 MB)
49 11:44:17.889617 No compression specified
50 11:44:17.890765 progress 0 % (0 MB)
51 11:44:17.894472 progress 5 % (0 MB)
52 11:44:17.898107 progress 10 % (1 MB)
53 11:44:17.901781 progress 15 % (2 MB)
54 11:44:17.905286 progress 20 % (2 MB)
55 11:44:17.908952 progress 25 % (3 MB)
56 11:44:17.912465 progress 30 % (4 MB)
57 11:44:17.916133 progress 35 % (4 MB)
58 11:44:17.919634 progress 40 % (5 MB)
59 11:44:17.923300 progress 45 % (6 MB)
60 11:44:17.926849 progress 50 % (6 MB)
61 11:44:17.930503 progress 55 % (7 MB)
62 11:44:17.934053 progress 60 % (8 MB)
63 11:44:17.938109 progress 65 % (8 MB)
64 11:44:17.941819 progress 70 % (9 MB)
65 11:44:17.945535 progress 75 % (10 MB)
66 11:44:17.949151 progress 80 % (10 MB)
67 11:44:17.952782 progress 85 % (11 MB)
68 11:44:17.956316 progress 90 % (12 MB)
69 11:44:17.959980 progress 95 % (12 MB)
70 11:44:17.963481 progress 100 % (13 MB)
71 11:44:17.963720 13 MB downloaded in 0.07 s (181.19 MB/s)
72 11:44:17.963867 end: 1.2.1 http-download (duration 00:00:00) [common]
74 11:44:17.964097 end: 1.2 download-retry (duration 00:00:00) [common]
75 11:44:17.964188 start: 1.3 download-retry (timeout 00:09:59) [common]
76 11:44:17.964277 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 11:44:17.964458 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2481-gef9c8224c1829/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 11:44:17.964530 saving as /var/lib/lava/dispatcher/tmp/13627310/tftp-deploy-f9b58v3h/modules/modules.tar
79 11:44:17.964591 total size: 484648 (0 MB)
80 11:44:17.964655 Using unxz to decompress xz
81 11:44:17.968754 progress 6 % (0 MB)
82 11:44:17.969162 progress 13 % (0 MB)
83 11:44:17.969399 progress 20 % (0 MB)
84 11:44:17.970986 progress 27 % (0 MB)
85 11:44:17.972747 progress 33 % (0 MB)
86 11:44:17.974719 progress 40 % (0 MB)
87 11:44:17.976499 progress 47 % (0 MB)
88 11:44:17.978177 progress 54 % (0 MB)
89 11:44:17.979962 progress 60 % (0 MB)
90 11:44:17.981567 progress 67 % (0 MB)
91 11:44:17.983289 progress 74 % (0 MB)
92 11:44:17.985210 progress 81 % (0 MB)
93 11:44:17.986897 progress 87 % (0 MB)
94 11:44:17.988762 progress 94 % (0 MB)
95 11:44:17.990474 progress 100 % (0 MB)
96 11:44:17.996065 0 MB downloaded in 0.03 s (14.69 MB/s)
97 11:44:17.996300 end: 1.3.1 http-download (duration 00:00:00) [common]
99 11:44:17.996642 end: 1.3 download-retry (duration 00:00:00) [common]
100 11:44:17.996735 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
101 11:44:17.996834 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
102 11:44:17.996916 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 11:44:17.997002 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
104 11:44:17.997230 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13627310/lava-overlay-ximx6pvj
105 11:44:17.997401 makedir: /var/lib/lava/dispatcher/tmp/13627310/lava-overlay-ximx6pvj/lava-13627310/bin
106 11:44:17.997512 makedir: /var/lib/lava/dispatcher/tmp/13627310/lava-overlay-ximx6pvj/lava-13627310/tests
107 11:44:17.997613 makedir: /var/lib/lava/dispatcher/tmp/13627310/lava-overlay-ximx6pvj/lava-13627310/results
108 11:44:17.997729 Creating /var/lib/lava/dispatcher/tmp/13627310/lava-overlay-ximx6pvj/lava-13627310/bin/lava-add-keys
109 11:44:17.997875 Creating /var/lib/lava/dispatcher/tmp/13627310/lava-overlay-ximx6pvj/lava-13627310/bin/lava-add-sources
110 11:44:17.998004 Creating /var/lib/lava/dispatcher/tmp/13627310/lava-overlay-ximx6pvj/lava-13627310/bin/lava-background-process-start
111 11:44:17.998133 Creating /var/lib/lava/dispatcher/tmp/13627310/lava-overlay-ximx6pvj/lava-13627310/bin/lava-background-process-stop
112 11:44:17.998261 Creating /var/lib/lava/dispatcher/tmp/13627310/lava-overlay-ximx6pvj/lava-13627310/bin/lava-common-functions
113 11:44:17.998386 Creating /var/lib/lava/dispatcher/tmp/13627310/lava-overlay-ximx6pvj/lava-13627310/bin/lava-echo-ipv4
114 11:44:17.998514 Creating /var/lib/lava/dispatcher/tmp/13627310/lava-overlay-ximx6pvj/lava-13627310/bin/lava-install-packages
115 11:44:17.998639 Creating /var/lib/lava/dispatcher/tmp/13627310/lava-overlay-ximx6pvj/lava-13627310/bin/lava-installed-packages
116 11:44:17.998763 Creating /var/lib/lava/dispatcher/tmp/13627310/lava-overlay-ximx6pvj/lava-13627310/bin/lava-os-build
117 11:44:17.998887 Creating /var/lib/lava/dispatcher/tmp/13627310/lava-overlay-ximx6pvj/lava-13627310/bin/lava-probe-channel
118 11:44:17.999012 Creating /var/lib/lava/dispatcher/tmp/13627310/lava-overlay-ximx6pvj/lava-13627310/bin/lava-probe-ip
119 11:44:17.999135 Creating /var/lib/lava/dispatcher/tmp/13627310/lava-overlay-ximx6pvj/lava-13627310/bin/lava-target-ip
120 11:44:17.999262 Creating /var/lib/lava/dispatcher/tmp/13627310/lava-overlay-ximx6pvj/lava-13627310/bin/lava-target-mac
121 11:44:17.999384 Creating /var/lib/lava/dispatcher/tmp/13627310/lava-overlay-ximx6pvj/lava-13627310/bin/lava-target-storage
122 11:44:17.999515 Creating /var/lib/lava/dispatcher/tmp/13627310/lava-overlay-ximx6pvj/lava-13627310/bin/lava-test-case
123 11:44:17.999640 Creating /var/lib/lava/dispatcher/tmp/13627310/lava-overlay-ximx6pvj/lava-13627310/bin/lava-test-event
124 11:44:17.999762 Creating /var/lib/lava/dispatcher/tmp/13627310/lava-overlay-ximx6pvj/lava-13627310/bin/lava-test-feedback
125 11:44:17.999885 Creating /var/lib/lava/dispatcher/tmp/13627310/lava-overlay-ximx6pvj/lava-13627310/bin/lava-test-raise
126 11:44:18.000026 Creating /var/lib/lava/dispatcher/tmp/13627310/lava-overlay-ximx6pvj/lava-13627310/bin/lava-test-reference
127 11:44:18.000196 Creating /var/lib/lava/dispatcher/tmp/13627310/lava-overlay-ximx6pvj/lava-13627310/bin/lava-test-runner
128 11:44:18.000328 Creating /var/lib/lava/dispatcher/tmp/13627310/lava-overlay-ximx6pvj/lava-13627310/bin/lava-test-set
129 11:44:18.000488 Creating /var/lib/lava/dispatcher/tmp/13627310/lava-overlay-ximx6pvj/lava-13627310/bin/lava-test-shell
130 11:44:18.000621 Updating /var/lib/lava/dispatcher/tmp/13627310/lava-overlay-ximx6pvj/lava-13627310/bin/lava-install-packages (oe)
131 11:44:18.000774 Updating /var/lib/lava/dispatcher/tmp/13627310/lava-overlay-ximx6pvj/lava-13627310/bin/lava-installed-packages (oe)
132 11:44:18.000896 Creating /var/lib/lava/dispatcher/tmp/13627310/lava-overlay-ximx6pvj/lava-13627310/environment
133 11:44:18.000996 LAVA metadata
134 11:44:18.001074 - LAVA_JOB_ID=13627310
135 11:44:18.001140 - LAVA_DISPATCHER_IP=192.168.201.1
136 11:44:18.001243 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
137 11:44:18.001313 skipped lava-vland-overlay
138 11:44:18.001396 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 11:44:18.001479 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
140 11:44:18.001541 skipped lava-multinode-overlay
141 11:44:18.001613 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 11:44:18.001696 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
143 11:44:18.001769 Loading test definitions
144 11:44:18.001860 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
145 11:44:18.001933 Using /lava-13627310 at stage 0
146 11:44:18.002246 uuid=13627310_1.4.2.3.1 testdef=None
147 11:44:18.002334 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 11:44:18.002420 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
149 11:44:18.002949 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 11:44:18.003166 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
152 11:44:18.003767 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 11:44:18.003992 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
155 11:44:18.004619 runner path: /var/lib/lava/dispatcher/tmp/13627310/lava-overlay-ximx6pvj/lava-13627310/0/tests/0_cros-ec test_uuid 13627310_1.4.2.3.1
156 11:44:18.004775 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 11:44:18.004982 Creating lava-test-runner.conf files
159 11:44:18.005045 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13627310/lava-overlay-ximx6pvj/lava-13627310/0 for stage 0
160 11:44:18.005133 - 0_cros-ec
161 11:44:18.005229 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
162 11:44:18.005317 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
163 11:44:18.012512 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
164 11:44:18.012616 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
165 11:44:18.012702 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
166 11:44:18.012786 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
167 11:44:18.012870 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
168 11:44:19.095364 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
169 11:44:19.095761 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
170 11:44:19.095883 extracting modules file /var/lib/lava/dispatcher/tmp/13627310/tftp-deploy-f9b58v3h/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13627310/extract-overlay-ramdisk-wv02kgd4/ramdisk
171 11:44:19.111504 end: 1.4.4 extract-modules (duration 00:00:00) [common]
172 11:44:19.111628 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
173 11:44:19.111717 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13627310/compress-overlay-ed12h_1r/overlay-1.4.2.4.tar.gz to ramdisk
174 11:44:19.111789 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13627310/compress-overlay-ed12h_1r/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13627310/extract-overlay-ramdisk-wv02kgd4/ramdisk
175 11:44:19.118545 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
176 11:44:19.118662 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
177 11:44:19.118757 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
178 11:44:19.118847 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
179 11:44:19.118926 Building ramdisk /var/lib/lava/dispatcher/tmp/13627310/extract-overlay-ramdisk-wv02kgd4/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13627310/extract-overlay-ramdisk-wv02kgd4/ramdisk
180 11:44:19.662314 >> 209923 blocks
181 11:44:23.583976 rename /var/lib/lava/dispatcher/tmp/13627310/extract-overlay-ramdisk-wv02kgd4/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13627310/tftp-deploy-f9b58v3h/ramdisk/ramdisk.cpio.gz
182 11:44:23.584484 end: 1.4.7 compress-ramdisk (duration 00:00:04) [common]
183 11:44:23.584617 start: 1.4.8 prepare-kernel (timeout 00:09:53) [common]
184 11:44:23.584718 start: 1.4.8.1 prepare-fit (timeout 00:09:53) [common]
185 11:44:23.584815 No mkimage arch provided, not using FIT.
186 11:44:23.584907 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
187 11:44:23.584997 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
188 11:44:23.585105 end: 1.4 prepare-tftp-overlay (duration 00:00:06) [common]
189 11:44:23.585200 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:53) [common]
190 11:44:23.585281 No LXC device requested
191 11:44:23.585365 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
192 11:44:23.585451 start: 1.6 deploy-device-env (timeout 00:09:53) [common]
193 11:44:23.585531 end: 1.6 deploy-device-env (duration 00:00:00) [common]
194 11:44:23.585604 Checking files for TFTP limit of 4294967296 bytes.
195 11:44:23.586011 end: 1 tftp-deploy (duration 00:00:07) [common]
196 11:44:23.586116 start: 2 depthcharge-action (timeout 00:05:00) [common]
197 11:44:23.586211 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
198 11:44:23.586338 substitutions:
199 11:44:23.586405 - {DTB}: None
200 11:44:23.586468 - {INITRD}: 13627310/tftp-deploy-f9b58v3h/ramdisk/ramdisk.cpio.gz
201 11:44:23.586527 - {KERNEL}: 13627310/tftp-deploy-f9b58v3h/kernel/bzImage
202 11:44:23.586585 - {LAVA_MAC}: None
203 11:44:23.586642 - {PRESEED_CONFIG}: None
204 11:44:23.586698 - {PRESEED_LOCAL}: None
205 11:44:23.586753 - {RAMDISK}: 13627310/tftp-deploy-f9b58v3h/ramdisk/ramdisk.cpio.gz
206 11:44:23.586808 - {ROOT_PART}: None
207 11:44:23.586863 - {ROOT}: None
208 11:44:23.586935 - {SERVER_IP}: 192.168.201.1
209 11:44:23.586995 - {TEE}: None
210 11:44:23.587051 Parsed boot commands:
211 11:44:23.587105 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
212 11:44:23.587280 Parsed boot commands: tftpboot 192.168.201.1 13627310/tftp-deploy-f9b58v3h/kernel/bzImage 13627310/tftp-deploy-f9b58v3h/kernel/cmdline 13627310/tftp-deploy-f9b58v3h/ramdisk/ramdisk.cpio.gz
213 11:44:23.587367 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
214 11:44:23.587454 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
215 11:44:23.587546 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
216 11:44:23.587633 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
217 11:44:23.587707 Not connected, no need to disconnect.
218 11:44:23.587784 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
219 11:44:23.587865 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
220 11:44:23.587936 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cp514-2h-1130g7-volteer-cbg-6'
221 11:44:23.591791 Setting prompt string to ['lava-test: # ']
222 11:44:23.592179 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
223 11:44:23.592287 end: 2.2.1 reset-connection (duration 00:00:00) [common]
224 11:44:23.592425 start: 2.2.2 reset-device (timeout 00:05:00) [common]
225 11:44:23.592685 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
226 11:44:23.592858 Calling: '/usr/local/bin/chromebook-reboot.sh' 'acer-cp514-2h-1130g7-volteer-cbg-6'
227 11:44:32.389475 Returned 0 in 8 seconds
228 11:44:32.490697 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
230 11:44:32.492435 end: 2.2.2 reset-device (duration 00:00:09) [common]
231 11:44:32.493105 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
232 11:44:32.493680 Setting prompt string to 'Starting depthcharge on Voema...'
233 11:44:32.494142 Changing prompt to 'Starting depthcharge on Voema...'
234 11:44:32.494636 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
235 11:44:32.496293 [Enter `^Ec?' for help]
236 11:44:32.497084
237 11:44:32.497829
238 11:44:32.498570 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
239 11:44:32.499220 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
240 11:44:32.499750 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
241 11:44:32.500268 CPU: AES supported, TXT NOT supported, VT supported
242 11:44:32.500816 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
243 11:44:32.501311 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
244 11:44:32.501800 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
245 11:44:32.502342 VBOOT: Loading verstage.
246 11:44:32.502843 FMAP: Found "FLASH" version 1.1 at 0x1804000.
247 11:44:32.503301 FMAP: base = 0x0 size = 0x2000000 #areas = 32
248 11:44:32.503741 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
249 11:44:32.504181 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
250 11:44:32.504794 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
251 11:44:32.505242
252 11:44:32.505818
253 11:44:32.506338 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
254 11:44:32.506691 Probing TPM: . done!
255 11:44:32.507017 TPM ready after 0 ms
256 11:44:32.507352 Connected to device vid:did:rid of 1ae0:0028:00
257 11:44:32.507673 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
258 11:44:32.507993 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
259 11:44:32.508309 Initialized TPM device CR50 revision 0
260 11:44:32.508675 tlcl_send_startup: Startup return code is 0
261 11:44:32.508991 TPM: setup succeeded
262 11:44:32.509300 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
263 11:44:32.509614 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
264 11:44:32.509926 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
265 11:44:32.510236 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
266 11:44:32.510542 Chrome EC: UHEPI supported
267 11:44:32.510848 Phase 1
268 11:44:32.511151 FMAP: area GBB found @ 1805000 (458752 bytes)
269 11:44:32.511460 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
270 11:44:32.511767 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
271 11:44:32.512076 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
272 11:44:32.512416 VB2:vb2_check_recovery() Recovery was requested manually
273 11:44:32.512736 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x7
274 11:44:32.513044 Recovery requested (1009000e)
275 11:44:32.513350 TPM: Extending digest for VBOOT: boot mode into PCR 0
276 11:44:32.513659 tlcl_extend: response is 0
277 11:44:32.513962 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
278 11:44:32.514270 tlcl_extend: response is 0
279 11:44:32.514576 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
280 11:44:32.514881 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
281 11:44:32.515210 BS: verstage times (exec / console): total (unknown) / 148 ms
282 11:44:32.515641
283 11:44:32.515954
284 11:44:32.516264 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
285 11:44:32.516627 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
286 11:44:32.516945 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
287 11:44:32.517256 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
288 11:44:32.517565 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
289 11:44:32.517875 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
290 11:44:32.518182 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
291 11:44:32.518492 TCO_STS: 0000 0000
292 11:44:32.518798 GEN_PMCON: d0015038 00002200
293 11:44:32.519103 GBLRST_CAUSE: 00000000 00000000
294 11:44:32.519411 HPR_CAUSE0: 00000000
295 11:44:32.519718 prev_sleep_state 5
296 11:44:32.520022 Boot Count incremented to 28941
297 11:44:32.520328 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
298 11:44:32.520690 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
299 11:44:32.521002 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
300 11:44:32.521307 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
301 11:44:32.521619 Chrome EC: UHEPI supported
302 11:44:32.521933 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
303 11:44:32.522153 Probing TPM: done!
304 11:44:32.522415 Connected to device vid:did:rid of 1ae0:0028:00
305 11:44:32.522640 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
306 11:44:32.522863 Initialized TPM device CR50 revision 0
307 11:44:32.523082 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
308 11:44:32.523300 MRC: Hash idx 0x100b comparison successful.
309 11:44:32.523518 MRC cache found, size faa8
310 11:44:32.523750 bootmode is set to: 2
311 11:44:32.524064 SPD index = 0
312 11:44:32.524485 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
313 11:44:32.524799 SPD: module type is LPDDR4X
314 11:44:32.525103 SPD: module part number is MT53E512M64D4NW-046
315 11:44:32.525404 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
316 11:44:32.525703 SPD: device width 16 bits, bus width 16 bits
317 11:44:32.526075 SPD: module size is 1024 MB (per channel)
318 11:44:32.526447 CBMEM:
319 11:44:32.526743 IMD: root @ 0x76fff000 254 entries.
320 11:44:32.527064 IMD: root @ 0x76ffec00 62 entries.
321 11:44:32.527283 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
322 11:44:32.527768 FMAP: area RW_VPD found @ f35000 (8192 bytes)
323 11:44:32.527974 External stage cache:
324 11:44:32.528254 IMD: root @ 0x7b3ff000 254 entries.
325 11:44:32.528517 IMD: root @ 0x7b3fec00 62 entries.
326 11:44:32.528749 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
327 11:44:32.528978 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
328 11:44:32.529259 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
329 11:44:32.529484 MRC: 'RECOVERY_MRC_CACHE' does not need update.
330 11:44:32.529708 cse_lite: Skip switching to RW in the recovery path
331 11:44:32.529987 8 DIMMs found
332 11:44:32.530271 SMM Memory Map
333 11:44:32.530493 SMRAM : 0x7b000000 0x800000
334 11:44:32.530717 Subregion 0: 0x7b000000 0x200000
335 11:44:32.530939 Subregion 1: 0x7b200000 0x200000
336 11:44:32.531160 Subregion 2: 0x7b400000 0x400000
337 11:44:32.531435 top_of_ram = 0x77000000
338 11:44:32.531657 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
339 11:44:32.531891 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
340 11:44:32.532112 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
341 11:44:32.532333 MTRR Range: Start=ff000000 End=0 (Size 1000000)
342 11:44:32.532524 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
343 11:44:32.532703 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
344 11:44:32.532880 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
345 11:44:32.533058 Processing 211 relocs. Offset value of 0x74c0b000
346 11:44:32.533279 BS: romstage times (exec / console): total (unknown) / 277 ms
347 11:44:32.533502
348 11:44:32.533674
349 11:44:32.533849 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
350 11:44:32.534070 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
351 11:44:32.534246 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
352 11:44:32.534423 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
353 11:44:32.534598 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
354 11:44:32.534774 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
355 11:44:32.534993 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
356 11:44:32.535215 Processing 5008 relocs. Offset value of 0x75d98000
357 11:44:32.535436 BS: postcar times (exec / console): total (unknown) / 59 ms
358 11:44:32.535655
359 11:44:32.535873
360 11:44:32.536092 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
361 11:44:32.536313 Normal boot
362 11:44:32.536548 FW_CONFIG value is 0x804c02
363 11:44:32.536772 PCI: 00:07.0 disabled by fw_config
364 11:44:32.536985 PCI: 00:07.1 disabled by fw_config
365 11:44:32.537167 PCI: 00:0d.2 disabled by fw_config
366 11:44:32.537349 PCI: 00:1c.7 disabled by fw_config
367 11:44:32.537529 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
368 11:44:32.537711 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
369 11:44:32.537893 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
370 11:44:32.538075 GENERIC: 0.0 disabled by fw_config
371 11:44:32.538254 GENERIC: 1.0 disabled by fw_config
372 11:44:32.538434 fw_config match found: DB_USB=USB3_ACTIVE
373 11:44:32.538615 fw_config match found: DB_USB=USB3_ACTIVE
374 11:44:32.538796 fw_config match found: DB_USB=USB3_ACTIVE
375 11:44:32.538975 fw_config match found: DB_USB=USB3_ACTIVE
376 11:44:32.539155 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
377 11:44:32.539338 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
378 11:44:32.539519 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
379 11:44:32.539701 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
380 11:44:32.539884 microcode: sig=0x806c1 pf=0x80 revision=0x86
381 11:44:32.540067 microcode: Update skipped, already up-to-date
382 11:44:32.540249 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
383 11:44:32.540444 Detected 4 core, 8 thread CPU.
384 11:44:32.540592 Setting up SMI for CPU
385 11:44:32.540736 IED base = 0x7b400000
386 11:44:32.540880 IED size = 0x00400000
387 11:44:32.541023 Will perform SMM setup.
388 11:44:32.541165 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
389 11:44:32.541346 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
390 11:44:32.541529 Processing 16 relocs. Offset value of 0x00030000
391 11:44:32.541711 Attempting to start 7 APs
392 11:44:32.541859 Waiting for 10ms after sending INIT.
393 11:44:32.541998 Waiting for 1st SIPI to complete...done.
394 11:44:32.542121 AP: slot 1 apic_id 1.
395 11:44:32.542243 Waiting for 2nd SIPI to complete...done.
396 11:44:32.542366 AP: slot 5 apic_id 4.
397 11:44:32.542488 AP: slot 7 apic_id 6.
398 11:44:32.542642 AP: slot 3 apic_id 7.
399 11:44:32.542796 AP: slot 6 apic_id 2.
400 11:44:32.542949 AP: slot 2 apic_id 3.
401 11:44:32.543070 AP: slot 4 apic_id 5.
402 11:44:32.543193 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
403 11:44:32.543348 Processing 13 relocs. Offset value of 0x00038000
404 11:44:32.543505 Unable to locate Global NVS
405 11:44:32.543660 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
406 11:44:32.543816 Installing permanent SMM handler to 0x7b000000
407 11:44:32.543972 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
408 11:44:32.544129 Processing 794 relocs. Offset value of 0x7b010000
409 11:44:32.544495 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
410 11:44:32.544619 Processing 13 relocs. Offset value of 0x7b008000
411 11:44:32.544750 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
412 11:44:32.544879 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
413 11:44:32.545005 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
414 11:44:32.545130 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
415 11:44:32.545255 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
416 11:44:32.545379 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
417 11:44:32.545535 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
418 11:44:32.545690 Unable to locate Global NVS
419 11:44:32.545847 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
420 11:44:32.545970 Clearing SMI status registers
421 11:44:32.546126 SMI_STS: PM1
422 11:44:32.546281 PM1_STS: PWRBTN
423 11:44:32.546435 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
424 11:44:32.546591 In relocation handler: CPU 0
425 11:44:32.546746 New SMBASE=0x7b000000 IEDBASE=0x7b400000
426 11:44:32.546916 Writing SMRR. base = 0x7b000006, mask=0xff800c00
427 11:44:32.547053 Relocation complete.
428 11:44:32.547187 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
429 11:44:32.547323 In relocation handler: CPU 1
430 11:44:32.547457 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
431 11:44:32.547592 Relocation complete.
432 11:44:32.547727 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
433 11:44:32.547862 In relocation handler: CPU 6
434 11:44:32.547997 New SMBASE=0x7affe800 IEDBASE=0x7b400000
435 11:44:32.548132 Writing SMRR. base = 0x7b000006, mask=0xff800c00
436 11:44:32.548267 Relocation complete.
437 11:44:32.548410 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
438 11:44:32.548546 In relocation handler: CPU 2
439 11:44:32.548681 New SMBASE=0x7afff800 IEDBASE=0x7b400000
440 11:44:32.548817 Relocation complete.
441 11:44:32.548951 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
442 11:44:32.549087 In relocation handler: CPU 3
443 11:44:32.549221 New SMBASE=0x7afff400 IEDBASE=0x7b400000
444 11:44:32.549356 Relocation complete.
445 11:44:32.549490 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
446 11:44:32.549624 In relocation handler: CPU 7
447 11:44:32.549758 New SMBASE=0x7affe400 IEDBASE=0x7b400000
448 11:44:32.549893 Writing SMRR. base = 0x7b000006, mask=0xff800c00
449 11:44:32.550027 Relocation complete.
450 11:44:32.550161 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
451 11:44:32.550297 In relocation handler: CPU 4
452 11:44:32.550431 New SMBASE=0x7afff000 IEDBASE=0x7b400000
453 11:44:32.550566 Relocation complete.
454 11:44:32.550699 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
455 11:44:32.550840 In relocation handler: CPU 5
456 11:44:32.550949 New SMBASE=0x7affec00 IEDBASE=0x7b400000
457 11:44:32.551057 Writing SMRR. base = 0x7b000006, mask=0xff800c00
458 11:44:32.551165 Relocation complete.
459 11:44:32.551299 Initializing CPU #0
460 11:44:32.551434 CPU: vendor Intel device 806c1
461 11:44:32.551569 CPU: family 06, model 8c, stepping 01
462 11:44:32.551704 Clearing out pending MCEs
463 11:44:32.551839 Setting up local APIC...
464 11:44:32.551979 apic_id: 0x00 done.
465 11:44:32.552098 Turbo is available but hidden
466 11:44:32.552218 Turbo is available and visible
467 11:44:32.552338 microcode: Update skipped, already up-to-date
468 11:44:32.552468 CPU #0 initialized
469 11:44:32.552589 Initializing CPU #1
470 11:44:32.552709 Initializing CPU #2
471 11:44:32.552829 Initializing CPU #6
472 11:44:32.552948 CPU: vendor Intel device 806c1
473 11:44:32.553067 CPU: family 06, model 8c, stepping 01
474 11:44:32.553186 CPU: vendor Intel device 806c1
475 11:44:32.553304 CPU: family 06, model 8c, stepping 01
476 11:44:32.553423 CPU: vendor Intel device 806c1
477 11:44:32.553542 CPU: family 06, model 8c, stepping 01
478 11:44:32.553659 Clearing out pending MCEs
479 11:44:32.553778 Clearing out pending MCEs
480 11:44:32.553896 Setting up local APIC...
481 11:44:32.554014 Clearing out pending MCEs
482 11:44:32.554132 Initializing CPU #4
483 11:44:32.554250 Initializing CPU #5
484 11:44:32.554369 CPU: vendor Intel device 806c1
485 11:44:32.554487 CPU: family 06, model 8c, stepping 01
486 11:44:32.554605 CPU: vendor Intel device 806c1
487 11:44:32.554724 CPU: family 06, model 8c, stepping 01
488 11:44:32.554842 Clearing out pending MCEs
489 11:44:32.554960 Clearing out pending MCEs
490 11:44:32.555078 Setting up local APIC...
491 11:44:32.555196 Initializing CPU #3
492 11:44:32.555314 apic_id: 0x03 done.
493 11:44:32.555432 Setting up local APIC...
494 11:44:32.555550 Setting up local APIC...
495 11:44:32.555668 Initializing CPU #7
496 11:44:32.555786 CPU: vendor Intel device 806c1
497 11:44:32.555904 CPU: family 06, model 8c, stepping 01
498 11:44:32.556024 CPU: vendor Intel device 806c1
499 11:44:32.556142 CPU: family 06, model 8c, stepping 01
500 11:44:32.556261 Clearing out pending MCEs
501 11:44:32.556387 Clearing out pending MCEs
502 11:44:32.556482 Setting up local APIC...
503 11:44:32.556578 apic_id: 0x02 done.
504 11:44:32.556673 microcode: Update skipped, already up-to-date
505 11:44:32.556767 microcode: Update skipped, already up-to-date
506 11:44:32.556896 apic_id: 0x07 done.
507 11:44:32.557003 Setting up local APIC...
508 11:44:32.557109 CPU #2 initialized
509 11:44:32.557216 CPU #6 initialized
510 11:44:32.557323 Setting up local APIC...
511 11:44:32.557429 apic_id: 0x01 done.
512 11:44:32.557535 apic_id: 0x06 done.
513 11:44:32.557641 microcode: Update skipped, already up-to-date
514 11:44:32.557748 apic_id: 0x05 done.
515 11:44:32.557854 apic_id: 0x04 done.
516 11:44:32.557961 microcode: Update skipped, already up-to-date
517 11:44:32.558068 microcode: Update skipped, already up-to-date
518 11:44:32.558174 microcode: Update skipped, already up-to-date
519 11:44:32.558280 CPU #3 initialized
520 11:44:32.558386 CPU #7 initialized
521 11:44:32.558493 microcode: Update skipped, already up-to-date
522 11:44:32.558599 CPU #4 initialized
523 11:44:32.558916 CPU #5 initialized
524 11:44:32.559024 CPU #1 initialized
525 11:44:32.559134 bsp_do_flight_plan done after 468 msecs.
526 11:44:32.559243 CPU: frequency set to 4000 MHz
527 11:44:32.559351 Enabling SMIs.
528 11:44:32.559459 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
529 11:44:32.559567 SATAXPCIE1 indicates PCIe NVMe is present
530 11:44:32.559675 Probing TPM: done!
531 11:44:32.559782 Connected to device vid:did:rid of 1ae0:0028:00
532 11:44:32.559890 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
533 11:44:32.559999 Initialized TPM device CR50 revision 0
534 11:44:32.560106 Enabling S0i3.4
535 11:44:32.560213 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
536 11:44:32.560322 Found a VBT of 8704 bytes after decompression
537 11:44:32.560439 cse_lite: CSE RO boot. HybridStorageMode disabled
538 11:44:32.560548 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
539 11:44:32.560657 FSPS returned 0
540 11:44:32.560770 Executing Phase 1 of FspMultiPhaseSiInit
541 11:44:32.560881 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
542 11:44:32.560991 port C0 DISC req: usage 1 usb3 1 usb2 5
543 11:44:32.561099 Raw Buffer output 0 00000511
544 11:44:32.561208 Raw Buffer output 1 00000000
545 11:44:32.561315 pmc_send_ipc_cmd succeeded
546 11:44:32.561422 port C1 DISC req: usage 1 usb3 2 usb2 3
547 11:44:32.561530 Raw Buffer output 0 00000321
548 11:44:32.561637 Raw Buffer output 1 00000000
549 11:44:32.561744 pmc_send_ipc_cmd succeeded
550 11:44:32.561851 Detected 4 core, 8 thread CPU.
551 11:44:32.561968 Detected 4 core, 8 thread CPU.
552 11:44:32.562064 Display FSP Version Info HOB
553 11:44:32.562161 Reference Code - CPU = a.0.4c.31
554 11:44:32.562258 uCode Version = 0.0.0.86
555 11:44:32.562354 TXT ACM version = ff.ff.ff.ffff
556 11:44:32.562452 Reference Code - ME = a.0.4c.31
557 11:44:32.562548 MEBx version = 0.0.0.0
558 11:44:32.562645 ME Firmware Version = Consumer SKU
559 11:44:32.562742 Reference Code - PCH = a.0.4c.31
560 11:44:32.562838 PCH-CRID Status = Disabled
561 11:44:32.562935 PCH-CRID Original Value = ff.ff.ff.ffff
562 11:44:32.563032 PCH-CRID New Value = ff.ff.ff.ffff
563 11:44:32.563128 OPROM - RST - RAID = ff.ff.ff.ffff
564 11:44:32.563225 PCH Hsio Version = 4.0.0.0
565 11:44:32.563322 Reference Code - SA - System Agent = a.0.4c.31
566 11:44:32.563419 Reference Code - MRC = 2.0.0.1
567 11:44:32.563515 SA - PCIe Version = a.0.4c.31
568 11:44:32.563611 SA-CRID Status = Disabled
569 11:44:32.563708 SA-CRID Original Value = 0.0.0.1
570 11:44:32.563806 SA-CRID New Value = 0.0.0.1
571 11:44:32.563903 OPROM - VBIOS = ff.ff.ff.ffff
572 11:44:32.564000 IO Manageability Engine FW Version = 11.1.4.0
573 11:44:32.564098 PHY Build Version = 0.0.0.e0
574 11:44:32.564194 Thunderbolt(TM) FW Version = 0.0.0.0
575 11:44:32.564292 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
576 11:44:32.564398 ITSS IRQ Polarities Before:
577 11:44:32.564496 IPC0: 0xffffffff
578 11:44:32.564594 IPC1: 0xffffffff
579 11:44:32.564691 IPC2: 0xffffffff
580 11:44:32.564788 IPC3: 0xffffffff
581 11:44:32.564896 ITSS IRQ Polarities After:
582 11:44:32.564994 IPC0: 0xffffffff
583 11:44:32.565090 IPC1: 0xffffffff
584 11:44:32.565187 IPC2: 0xffffffff
585 11:44:32.565284 IPC3: 0xffffffff
586 11:44:32.565380 Found PCIe Root Port #9 at PCI: 00:1d.0.
587 11:44:32.565478 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
588 11:44:32.565579 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
589 11:44:32.565677 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
590 11:44:32.565775 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
591 11:44:32.565873 Enumerating buses...
592 11:44:32.565971 Show all devs... Before device enumeration.
593 11:44:32.566068 Root Device: enabled 1
594 11:44:32.566165 DOMAIN: 0000: enabled 1
595 11:44:32.566262 CPU_CLUSTER: 0: enabled 1
596 11:44:32.566359 PCI: 00:00.0: enabled 1
597 11:44:32.566457 PCI: 00:02.0: enabled 1
598 11:44:32.566554 PCI: 00:04.0: enabled 1
599 11:44:32.566651 PCI: 00:05.0: enabled 1
600 11:44:32.566748 PCI: 00:06.0: enabled 0
601 11:44:32.566844 PCI: 00:07.0: enabled 0
602 11:44:32.566950 PCI: 00:07.1: enabled 0
603 11:44:32.567042 PCI: 00:07.2: enabled 0
604 11:44:32.567134 PCI: 00:07.3: enabled 0
605 11:44:32.567226 PCI: 00:08.0: enabled 1
606 11:44:32.567318 PCI: 00:09.0: enabled 0
607 11:44:32.567410 PCI: 00:0a.0: enabled 0
608 11:44:32.567502 PCI: 00:0d.0: enabled 1
609 11:44:32.567594 PCI: 00:0d.1: enabled 0
610 11:44:32.567686 PCI: 00:0d.2: enabled 0
611 11:44:32.567779 PCI: 00:0d.3: enabled 0
612 11:44:32.567870 PCI: 00:0e.0: enabled 0
613 11:44:32.567962 PCI: 00:10.2: enabled 1
614 11:44:32.568054 PCI: 00:10.6: enabled 0
615 11:44:32.568146 PCI: 00:10.7: enabled 0
616 11:44:32.568238 PCI: 00:12.0: enabled 0
617 11:44:32.568330 PCI: 00:12.6: enabled 0
618 11:44:32.568469 PCI: 00:13.0: enabled 0
619 11:44:32.568596 PCI: 00:14.0: enabled 1
620 11:44:32.568689 PCI: 00:14.1: enabled 0
621 11:44:32.568781 PCI: 00:14.2: enabled 1
622 11:44:32.568873 PCI: 00:14.3: enabled 1
623 11:44:32.568965 PCI: 00:15.0: enabled 1
624 11:44:32.569057 PCI: 00:15.1: enabled 1
625 11:44:32.569149 PCI: 00:15.2: enabled 1
626 11:44:32.569241 PCI: 00:15.3: enabled 1
627 11:44:32.569333 PCI: 00:16.0: enabled 1
628 11:44:32.569424 PCI: 00:16.1: enabled 0
629 11:44:32.569516 PCI: 00:16.2: enabled 0
630 11:44:32.569608 PCI: 00:16.3: enabled 0
631 11:44:32.569700 PCI: 00:16.4: enabled 0
632 11:44:32.569792 PCI: 00:16.5: enabled 0
633 11:44:32.569884 PCI: 00:17.0: enabled 1
634 11:44:32.569976 PCI: 00:19.0: enabled 0
635 11:44:32.570068 PCI: 00:19.1: enabled 1
636 11:44:32.570163 PCI: 00:19.2: enabled 0
637 11:44:32.570254 PCI: 00:1c.0: enabled 1
638 11:44:32.570346 PCI: 00:1c.1: enabled 0
639 11:44:32.570440 PCI: 00:1c.2: enabled 0
640 11:44:32.570534 PCI: 00:1c.3: enabled 0
641 11:44:32.570627 PCI: 00:1c.4: enabled 0
642 11:44:32.570720 PCI: 00:1c.5: enabled 0
643 11:44:32.570812 PCI: 00:1c.6: enabled 1
644 11:44:32.570904 PCI: 00:1c.7: enabled 0
645 11:44:32.570995 PCI: 00:1d.0: enabled 1
646 11:44:32.571286 PCI: 00:1d.1: enabled 0
647 11:44:32.571380 PCI: 00:1d.2: enabled 1
648 11:44:32.571475 PCI: 00:1d.3: enabled 0
649 11:44:32.571569 PCI: 00:1e.0: enabled 1
650 11:44:32.571664 PCI: 00:1e.1: enabled 0
651 11:44:32.571759 PCI: 00:1e.2: enabled 1
652 11:44:32.571853 PCI: 00:1e.3: enabled 1
653 11:44:32.571947 PCI: 00:1f.0: enabled 1
654 11:44:32.572039 PCI: 00:1f.1: enabled 0
655 11:44:32.572132 PCI: 00:1f.2: enabled 1
656 11:44:32.572225 PCI: 00:1f.3: enabled 1
657 11:44:32.572317 PCI: 00:1f.4: enabled 0
658 11:44:32.572417 PCI: 00:1f.5: enabled 1
659 11:44:32.572511 PCI: 00:1f.6: enabled 0
660 11:44:32.572603 PCI: 00:1f.7: enabled 0
661 11:44:32.572695 APIC: 00: enabled 1
662 11:44:32.572787 GENERIC: 0.0: enabled 1
663 11:44:32.572879 GENERIC: 0.0: enabled 1
664 11:44:32.572971 GENERIC: 1.0: enabled 1
665 11:44:32.573063 GENERIC: 0.0: enabled 1
666 11:44:32.573156 GENERIC: 1.0: enabled 1
667 11:44:32.573248 USB0 port 0: enabled 1
668 11:44:32.573341 GENERIC: 0.0: enabled 1
669 11:44:32.573433 USB0 port 0: enabled 1
670 11:44:32.573525 GENERIC: 0.0: enabled 1
671 11:44:32.573618 I2C: 00:1a: enabled 1
672 11:44:32.573710 I2C: 00:31: enabled 1
673 11:44:32.573802 I2C: 00:32: enabled 1
674 11:44:32.573894 I2C: 00:10: enabled 1
675 11:44:32.573987 I2C: 00:15: enabled 1
676 11:44:32.574079 GENERIC: 0.0: enabled 0
677 11:44:32.574171 GENERIC: 1.0: enabled 0
678 11:44:32.574263 GENERIC: 0.0: enabled 1
679 11:44:32.574355 SPI: 00: enabled 1
680 11:44:32.574447 SPI: 00: enabled 1
681 11:44:32.574539 PNP: 0c09.0: enabled 1
682 11:44:32.574632 GENERIC: 0.0: enabled 1
683 11:44:32.574724 USB3 port 0: enabled 1
684 11:44:32.574815 USB3 port 1: enabled 1
685 11:44:32.574907 USB3 port 2: enabled 0
686 11:44:32.574999 USB3 port 3: enabled 0
687 11:44:32.575091 USB2 port 0: enabled 0
688 11:44:32.575182 USB2 port 1: enabled 1
689 11:44:32.575274 USB2 port 2: enabled 1
690 11:44:32.575366 USB2 port 3: enabled 0
691 11:44:32.575458 USB2 port 4: enabled 1
692 11:44:32.575550 USB2 port 5: enabled 0
693 11:44:32.575642 USB2 port 6: enabled 0
694 11:44:32.575734 USB2 port 7: enabled 0
695 11:44:32.575826 USB2 port 8: enabled 0
696 11:44:32.575917 USB2 port 9: enabled 0
697 11:44:32.576009 USB3 port 0: enabled 0
698 11:44:32.576101 USB3 port 1: enabled 1
699 11:44:32.576193 USB3 port 2: enabled 0
700 11:44:32.576285 USB3 port 3: enabled 0
701 11:44:32.576382 GENERIC: 0.0: enabled 1
702 11:44:32.576552 GENERIC: 1.0: enabled 1
703 11:44:32.576645 APIC: 01: enabled 1
704 11:44:32.576737 APIC: 03: enabled 1
705 11:44:32.576829 APIC: 07: enabled 1
706 11:44:32.576921 APIC: 05: enabled 1
707 11:44:32.577013 APIC: 04: enabled 1
708 11:44:32.577106 APIC: 02: enabled 1
709 11:44:32.577198 APIC: 06: enabled 1
710 11:44:32.577290 Compare with tree...
711 11:44:32.577382 Root Device: enabled 1
712 11:44:32.577474 DOMAIN: 0000: enabled 1
713 11:44:32.577566 PCI: 00:00.0: enabled 1
714 11:44:32.577658 PCI: 00:02.0: enabled 1
715 11:44:32.577751 PCI: 00:04.0: enabled 1
716 11:44:32.577843 GENERIC: 0.0: enabled 1
717 11:44:32.577935 PCI: 00:05.0: enabled 1
718 11:44:32.578026 PCI: 00:06.0: enabled 0
719 11:44:32.578118 PCI: 00:07.0: enabled 0
720 11:44:32.578210 GENERIC: 0.0: enabled 1
721 11:44:32.578302 PCI: 00:07.1: enabled 0
722 11:44:32.578394 GENERIC: 1.0: enabled 1
723 11:44:32.578485 PCI: 00:07.2: enabled 0
724 11:44:32.578577 GENERIC: 0.0: enabled 1
725 11:44:32.578669 PCI: 00:07.3: enabled 0
726 11:44:32.578761 GENERIC: 1.0: enabled 1
727 11:44:32.578852 PCI: 00:08.0: enabled 1
728 11:44:32.578944 PCI: 00:09.0: enabled 0
729 11:44:32.579036 PCI: 00:0a.0: enabled 0
730 11:44:32.579128 PCI: 00:0d.0: enabled 1
731 11:44:32.579220 USB0 port 0: enabled 1
732 11:44:32.579312 USB3 port 0: enabled 1
733 11:44:32.579404 USB3 port 1: enabled 1
734 11:44:32.579496 USB3 port 2: enabled 0
735 11:44:32.579588 USB3 port 3: enabled 0
736 11:44:32.579680 PCI: 00:0d.1: enabled 0
737 11:44:32.579772 PCI: 00:0d.2: enabled 0
738 11:44:32.579864 GENERIC: 0.0: enabled 1
739 11:44:32.579956 PCI: 00:0d.3: enabled 0
740 11:44:32.580047 PCI: 00:0e.0: enabled 0
741 11:44:32.580139 PCI: 00:10.2: enabled 1
742 11:44:32.580231 PCI: 00:10.6: enabled 0
743 11:44:32.580323 PCI: 00:10.7: enabled 0
744 11:44:32.580463 PCI: 00:12.0: enabled 0
745 11:44:32.580590 PCI: 00:12.6: enabled 0
746 11:44:32.580683 PCI: 00:13.0: enabled 0
747 11:44:32.580775 PCI: 00:14.0: enabled 1
748 11:44:32.580867 USB0 port 0: enabled 1
749 11:44:32.580959 USB2 port 0: enabled 0
750 11:44:32.581051 USB2 port 1: enabled 1
751 11:44:32.581144 USB2 port 2: enabled 1
752 11:44:32.581236 USB2 port 3: enabled 0
753 11:44:32.581328 USB2 port 4: enabled 1
754 11:44:32.581420 USB2 port 5: enabled 0
755 11:44:32.581512 USB2 port 6: enabled 0
756 11:44:32.581604 USB2 port 7: enabled 0
757 11:44:32.581695 USB2 port 8: enabled 0
758 11:44:32.581787 USB2 port 9: enabled 0
759 11:44:32.581879 USB3 port 0: enabled 0
760 11:44:32.581971 USB3 port 1: enabled 1
761 11:44:32.582063 USB3 port 2: enabled 0
762 11:44:32.582155 USB3 port 3: enabled 0
763 11:44:32.582247 PCI: 00:14.1: enabled 0
764 11:44:32.582339 PCI: 00:14.2: enabled 1
765 11:44:32.582432 PCI: 00:14.3: enabled 1
766 11:44:32.582524 GENERIC: 0.0: enabled 1
767 11:44:32.582616 PCI: 00:15.0: enabled 1
768 11:44:32.582708 I2C: 00:1a: enabled 1
769 11:44:32.582800 I2C: 00:31: enabled 1
770 11:44:32.582892 I2C: 00:32: enabled 1
771 11:44:32.582984 PCI: 00:15.1: enabled 1
772 11:44:32.583076 I2C: 00:10: enabled 1
773 11:44:32.583168 PCI: 00:15.2: enabled 1
774 11:44:32.583259 PCI: 00:15.3: enabled 1
775 11:44:32.583351 PCI: 00:16.0: enabled 1
776 11:44:32.583443 PCI: 00:16.1: enabled 0
777 11:44:32.583534 PCI: 00:16.2: enabled 0
778 11:44:32.583626 PCI: 00:16.3: enabled 0
779 11:44:32.583718 PCI: 00:16.4: enabled 0
780 11:44:32.583810 PCI: 00:16.5: enabled 0
781 11:44:32.583902 PCI: 00:17.0: enabled 1
782 11:44:32.583993 PCI: 00:19.0: enabled 0
783 11:44:32.584085 PCI: 00:19.1: enabled 1
784 11:44:32.584176 I2C: 00:15: enabled 1
785 11:44:32.584268 PCI: 00:19.2: enabled 0
786 11:44:32.584367 PCI: 00:1d.0: enabled 1
787 11:44:32.584501 GENERIC: 0.0: enabled 1
788 11:44:32.584631 PCI: 00:1e.0: enabled 1
789 11:44:32.584704 PCI: 00:1e.1: enabled 0
790 11:44:32.584778 PCI: 00:1e.2: enabled 1
791 11:44:32.584852 SPI: 00: enabled 1
792 11:44:32.584927 PCI: 00:1e.3: enabled 1
793 11:44:32.585020 SPI: 00: enabled 1
794 11:44:32.585112 PCI: 00:1f.0: enabled 1
795 11:44:32.585205 PNP: 0c09.0: enabled 1
796 11:44:32.585297 PCI: 00:1f.1: enabled 0
797 11:44:32.585389 PCI: 00:1f.2: enabled 1
798 11:44:32.585481 GENERIC: 0.0: enabled 1
799 11:44:32.585574 GENERIC: 0.0: enabled 1
800 11:44:32.585666 GENERIC: 1.0: enabled 1
801 11:44:32.585759 PCI: 00:1f.3: enabled 1
802 11:44:32.585851 PCI: 00:1f.4: enabled 0
803 11:44:32.585943 PCI: 00:1f.5: enabled 1
804 11:44:32.586035 PCI: 00:1f.6: enabled 0
805 11:44:32.586323 PCI: 00:1f.7: enabled 0
806 11:44:32.586417 CPU_CLUSTER: 0: enabled 1
807 11:44:32.586511 APIC: 00: enabled 1
808 11:44:32.586605 APIC: 01: enabled 1
809 11:44:32.586699 APIC: 03: enabled 1
810 11:44:32.586792 APIC: 07: enabled 1
811 11:44:32.586885 APIC: 05: enabled 1
812 11:44:32.586978 APIC: 04: enabled 1
813 11:44:32.587070 APIC: 02: enabled 1
814 11:44:32.587163 APIC: 06: enabled 1
815 11:44:32.587255 Root Device scanning...
816 11:44:32.587348 scan_static_bus for Root Device
817 11:44:32.587441 DOMAIN: 0000 enabled
818 11:44:32.587533 CPU_CLUSTER: 0 enabled
819 11:44:32.587625 DOMAIN: 0000 scanning...
820 11:44:32.587717 PCI: pci_scan_bus for bus 00
821 11:44:32.587810 PCI: 00:00.0 [8086/0000] ops
822 11:44:32.587903 PCI: 00:00.0 [8086/9a12] enabled
823 11:44:32.587995 PCI: 00:02.0 [8086/0000] bus ops
824 11:44:32.588088 PCI: 00:02.0 [8086/9a40] enabled
825 11:44:32.588180 PCI: 00:04.0 [8086/0000] bus ops
826 11:44:32.588273 PCI: 00:04.0 [8086/9a03] enabled
827 11:44:32.588373 PCI: 00:05.0 [8086/9a19] enabled
828 11:44:32.588467 PCI: 00:07.0 [0000/0000] hidden
829 11:44:32.588560 PCI: 00:08.0 [8086/9a11] enabled
830 11:44:32.588653 PCI: 00:0a.0 [8086/9a0d] disabled
831 11:44:32.588746 PCI: 00:0d.0 [8086/0000] bus ops
832 11:44:32.588839 PCI: 00:0d.0 [8086/9a13] enabled
833 11:44:32.588932 PCI: 00:14.0 [8086/0000] bus ops
834 11:44:32.589024 PCI: 00:14.0 [8086/a0ed] enabled
835 11:44:32.589117 PCI: 00:14.2 [8086/a0ef] enabled
836 11:44:32.589209 PCI: 00:14.3 [8086/0000] bus ops
837 11:44:32.589301 PCI: 00:14.3 [8086/a0f0] enabled
838 11:44:32.589393 PCI: 00:15.0 [8086/0000] bus ops
839 11:44:32.589486 PCI: 00:15.0 [8086/a0e8] enabled
840 11:44:32.589578 PCI: 00:15.1 [8086/0000] bus ops
841 11:44:32.589670 PCI: 00:15.1 [8086/a0e9] enabled
842 11:44:32.589762 PCI: 00:15.2 [8086/0000] bus ops
843 11:44:32.589854 PCI: 00:15.2 [8086/a0ea] enabled
844 11:44:32.589946 PCI: 00:15.3 [8086/0000] bus ops
845 11:44:32.590038 PCI: 00:15.3 [8086/a0eb] enabled
846 11:44:32.590130 PCI: 00:16.0 [8086/0000] ops
847 11:44:32.590222 PCI: 00:16.0 [8086/a0e0] enabled
848 11:44:32.590314 PCI: Static device PCI: 00:17.0 not found, disabling it.
849 11:44:32.590413 PCI: 00:19.0 [8086/0000] bus ops
850 11:44:32.590507 PCI: 00:19.0 [8086/a0c5] disabled
851 11:44:32.590601 PCI: 00:19.1 [8086/0000] bus ops
852 11:44:32.590693 PCI: 00:19.1 [8086/a0c6] enabled
853 11:44:32.590786 PCI: 00:1d.0 [8086/0000] bus ops
854 11:44:32.590878 PCI: 00:1d.0 [8086/a0b0] enabled
855 11:44:32.590971 PCI: 00:1e.0 [8086/0000] ops
856 11:44:32.591063 PCI: 00:1e.0 [8086/a0a8] enabled
857 11:44:32.591155 PCI: 00:1e.2 [8086/0000] bus ops
858 11:44:32.591247 PCI: 00:1e.2 [8086/a0aa] enabled
859 11:44:32.591340 PCI: 00:1e.3 [8086/0000] bus ops
860 11:44:32.591432 PCI: 00:1e.3 [8086/a0ab] enabled
861 11:44:32.591523 PCI: 00:1f.0 [8086/0000] bus ops
862 11:44:32.591615 PCI: 00:1f.0 [8086/a087] enabled
863 11:44:32.591707 RTC Init
864 11:44:32.591799 Set power on after power failure.
865 11:44:32.591892 Disabling Deep S3
866 11:44:32.591984 Disabling Deep S3
867 11:44:32.592076 Disabling Deep S4
868 11:44:32.592168 Disabling Deep S4
869 11:44:32.592259 Disabling Deep S5
870 11:44:32.592351 Disabling Deep S5
871 11:44:32.592482 PCI: 00:1f.2 [0000/0000] hidden
872 11:44:32.592575 PCI: 00:1f.3 [8086/0000] bus ops
873 11:44:32.592667 PCI: 00:1f.3 [8086/a0c8] enabled
874 11:44:32.592759 PCI: 00:1f.5 [8086/0000] bus ops
875 11:44:32.592851 PCI: 00:1f.5 [8086/a0a4] enabled
876 11:44:32.592943 PCI: Leftover static devices:
877 11:44:32.593035 PCI: 00:10.2
878 11:44:32.593128 PCI: 00:10.6
879 11:44:32.593221 PCI: 00:10.7
880 11:44:32.593313 PCI: 00:06.0
881 11:44:32.593406 PCI: 00:07.1
882 11:44:32.593498 PCI: 00:07.2
883 11:44:32.593590 PCI: 00:07.3
884 11:44:32.593682 PCI: 00:09.0
885 11:44:32.593774 PCI: 00:0d.1
886 11:44:32.593866 PCI: 00:0d.2
887 11:44:32.593957 PCI: 00:0d.3
888 11:44:32.594049 PCI: 00:0e.0
889 11:44:32.594140 PCI: 00:12.0
890 11:44:32.594232 PCI: 00:12.6
891 11:44:32.594324 PCI: 00:13.0
892 11:44:32.594416 PCI: 00:14.1
893 11:44:32.594508 PCI: 00:16.1
894 11:44:32.594600 PCI: 00:16.2
895 11:44:32.594691 PCI: 00:16.3
896 11:44:32.594783 PCI: 00:16.4
897 11:44:32.594874 PCI: 00:16.5
898 11:44:32.594966 PCI: 00:17.0
899 11:44:32.595057 PCI: 00:19.2
900 11:44:32.595149 PCI: 00:1e.1
901 11:44:32.595240 PCI: 00:1f.1
902 11:44:32.595333 PCI: 00:1f.4
903 11:44:32.595424 PCI: 00:1f.6
904 11:44:32.595516 PCI: 00:1f.7
905 11:44:32.595607 PCI: Check your devicetree.cb.
906 11:44:32.595700 PCI: 00:02.0 scanning...
907 11:44:32.595793 scan_generic_bus for PCI: 00:02.0
908 11:44:32.595885 scan_generic_bus for PCI: 00:02.0 done
909 11:44:32.595978 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
910 11:44:32.596070 PCI: 00:04.0 scanning...
911 11:44:32.596163 scan_generic_bus for PCI: 00:04.0
912 11:44:32.596256 GENERIC: 0.0 enabled
913 11:44:32.596348 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
914 11:44:32.596483 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
915 11:44:32.596577 PCI: 00:0d.0 scanning...
916 11:44:32.596670 scan_static_bus for PCI: 00:0d.0
917 11:44:32.596763 USB0 port 0 enabled
918 11:44:32.596855 USB0 port 0 scanning...
919 11:44:32.596950 scan_static_bus for USB0 port 0
920 11:44:32.597044 USB3 port 0 enabled
921 11:44:32.597137 USB3 port 1 enabled
922 11:44:32.597231 USB3 port 2 disabled
923 11:44:32.597324 USB3 port 3 disabled
924 11:44:32.597417 USB3 port 0 scanning...
925 11:44:32.597509 scan_static_bus for USB3 port 0
926 11:44:32.597602 scan_static_bus for USB3 port 0 done
927 11:44:32.597695 scan_bus: bus USB3 port 0 finished in 6 msecs
928 11:44:32.597787 USB3 port 1 scanning...
929 11:44:32.597880 scan_static_bus for USB3 port 1
930 11:44:32.597972 scan_static_bus for USB3 port 1 done
931 11:44:32.598064 scan_bus: bus USB3 port 1 finished in 6 msecs
932 11:44:32.598158 scan_static_bus for USB0 port 0 done
933 11:44:32.598250 scan_bus: bus USB0 port 0 finished in 43 msecs
934 11:44:32.598343 scan_static_bus for PCI: 00:0d.0 done
935 11:44:32.598435 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
936 11:44:32.598528 PCI: 00:14.0 scanning...
937 11:44:32.598621 scan_static_bus for PCI: 00:14.0
938 11:44:32.598713 USB0 port 0 enabled
939 11:44:32.598805 USB0 port 0 scanning...
940 11:44:32.598898 scan_static_bus for USB0 port 0
941 11:44:32.598990 USB2 port 0 disabled
942 11:44:32.599082 USB2 port 1 enabled
943 11:44:32.599175 USB2 port 2 enabled
944 11:44:32.599267 USB2 port 3 disabled
945 11:44:32.599361 USB2 port 4 enabled
946 11:44:32.599454 USB2 port 5 disabled
947 11:44:32.599548 USB2 port 6 disabled
948 11:44:32.599641 USB2 port 7 disabled
949 11:44:32.599732 USB2 port 8 disabled
950 11:44:32.599824 USB2 port 9 disabled
951 11:44:32.599916 USB3 port 0 disabled
952 11:44:32.600008 USB3 port 1 enabled
953 11:44:32.600100 USB3 port 2 disabled
954 11:44:32.600191 USB3 port 3 disabled
955 11:44:32.600478 USB2 port 1 scanning...
956 11:44:32.600573 scan_static_bus for USB2 port 1
957 11:44:32.600668 scan_static_bus for USB2 port 1 done
958 11:44:32.600763 scan_bus: bus USB2 port 1 finished in 6 msecs
959 11:44:32.600857 USB2 port 2 scanning...
960 11:44:32.600951 scan_static_bus for USB2 port 2
961 11:44:32.601044 scan_static_bus for USB2 port 2 done
962 11:44:32.601137 scan_bus: bus USB2 port 2 finished in 6 msecs
963 11:44:32.601229 USB2 port 4 scanning...
964 11:44:32.601322 scan_static_bus for USB2 port 4
965 11:44:32.601414 scan_static_bus for USB2 port 4 done
966 11:44:32.601508 scan_bus: bus USB2 port 4 finished in 6 msecs
967 11:44:32.601600 USB3 port 1 scanning...
968 11:44:32.601692 scan_static_bus for USB3 port 1
969 11:44:32.601785 scan_static_bus for USB3 port 1 done
970 11:44:32.601877 scan_bus: bus USB3 port 1 finished in 6 msecs
971 11:44:32.601969 scan_static_bus for USB0 port 0 done
972 11:44:32.602062 scan_bus: bus USB0 port 0 finished in 93 msecs
973 11:44:32.602154 scan_static_bus for PCI: 00:14.0 done
974 11:44:32.602247 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
975 11:44:32.602340 PCI: 00:14.3 scanning...
976 11:44:32.602432 scan_static_bus for PCI: 00:14.3
977 11:44:32.602525 GENERIC: 0.0 enabled
978 11:44:32.602617 scan_static_bus for PCI: 00:14.3 done
979 11:44:32.602711 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
980 11:44:32.602804 PCI: 00:15.0 scanning...
981 11:44:32.602896 scan_static_bus for PCI: 00:15.0
982 11:44:32.602989 I2C: 00:1a enabled
983 11:44:32.603081 I2C: 00:31 enabled
984 11:44:32.603173 I2C: 00:32 enabled
985 11:44:32.603265 scan_static_bus for PCI: 00:15.0 done
986 11:44:32.603357 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
987 11:44:32.603449 PCI: 00:15.1 scanning...
988 11:44:32.603541 scan_static_bus for PCI: 00:15.1
989 11:44:32.603634 I2C: 00:10 enabled
990 11:44:32.603726 scan_static_bus for PCI: 00:15.1 done
991 11:44:32.603818 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
992 11:44:32.603910 PCI: 00:15.2 scanning...
993 11:44:32.604002 scan_static_bus for PCI: 00:15.2
994 11:44:32.604094 scan_static_bus for PCI: 00:15.2 done
995 11:44:32.604186 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
996 11:44:32.604278 PCI: 00:15.3 scanning...
997 11:44:32.604375 scan_static_bus for PCI: 00:15.3
998 11:44:32.604507 scan_static_bus for PCI: 00:15.3 done
999 11:44:32.604599 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1000 11:44:32.604692 PCI: 00:19.1 scanning...
1001 11:44:32.604784 scan_static_bus for PCI: 00:19.1
1002 11:44:32.604876 I2C: 00:15 enabled
1003 11:44:32.604968 scan_static_bus for PCI: 00:19.1 done
1004 11:44:32.605060 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1005 11:44:32.605152 PCI: 00:1d.0 scanning...
1006 11:44:32.605244 do_pci_scan_bridge for PCI: 00:1d.0
1007 11:44:32.605336 PCI: pci_scan_bus for bus 01
1008 11:44:32.605428 PCI: 01:00.0 [1c5c/174a] enabled
1009 11:44:32.605519 GENERIC: 0.0 enabled
1010 11:44:32.605611 Enabling Common Clock Configuration
1011 11:44:32.605703 L1 Sub-State supported from root port 29
1012 11:44:32.605795 L1 Sub-State Support = 0xf
1013 11:44:32.605887 CommonModeRestoreTime = 0x28
1014 11:44:32.605979 Power On Value = 0x16, Power On Scale = 0x0
1015 11:44:32.606072 ASPM: Enabled L1
1016 11:44:32.606164 PCIe: Max_Payload_Size adjusted to 128
1017 11:44:32.606267 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1018 11:44:32.606358 PCI: 00:1e.2 scanning...
1019 11:44:32.606443 scan_generic_bus for PCI: 00:1e.2
1020 11:44:32.606527 SPI: 00 enabled
1021 11:44:32.606612 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1022 11:44:32.606697 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1023 11:44:32.606780 PCI: 00:1e.3 scanning...
1024 11:44:32.606864 scan_generic_bus for PCI: 00:1e.3
1025 11:44:32.606953 SPI: 00 enabled
1026 11:44:32.607039 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1027 11:44:32.607126 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1028 11:44:32.607209 PCI: 00:1f.0 scanning...
1029 11:44:32.607292 scan_static_bus for PCI: 00:1f.0
1030 11:44:32.607374 PNP: 0c09.0 enabled
1031 11:44:32.607455 PNP: 0c09.0 scanning...
1032 11:44:32.607537 scan_static_bus for PNP: 0c09.0
1033 11:44:32.607619 scan_static_bus for PNP: 0c09.0 done
1034 11:44:32.607701 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1035 11:44:32.607783 scan_static_bus for PCI: 00:1f.0 done
1036 11:44:32.607866 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1037 11:44:32.607948 PCI: 00:1f.2 scanning...
1038 11:44:32.608030 scan_static_bus for PCI: 00:1f.2
1039 11:44:32.608111 GENERIC: 0.0 enabled
1040 11:44:32.608193 GENERIC: 0.0 scanning...
1041 11:44:32.608274 scan_static_bus for GENERIC: 0.0
1042 11:44:32.608380 GENERIC: 0.0 enabled
1043 11:44:32.608477 GENERIC: 1.0 enabled
1044 11:44:32.608560 scan_static_bus for GENERIC: 0.0 done
1045 11:44:32.608642 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1046 11:44:32.608724 scan_static_bus for PCI: 00:1f.2 done
1047 11:44:32.608807 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1048 11:44:32.608889 PCI: 00:1f.3 scanning...
1049 11:44:32.608971 scan_static_bus for PCI: 00:1f.3
1050 11:44:32.609053 scan_static_bus for PCI: 00:1f.3 done
1051 11:44:32.609135 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1052 11:44:32.609217 PCI: 00:1f.5 scanning...
1053 11:44:32.609299 scan_generic_bus for PCI: 00:1f.5
1054 11:44:32.609381 scan_generic_bus for PCI: 00:1f.5 done
1055 11:44:32.609463 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1056 11:44:32.609546 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1057 11:44:32.609628 scan_static_bus for Root Device done
1058 11:44:32.609710 scan_bus: bus Root Device finished in 737 msecs
1059 11:44:32.609792 done
1060 11:44:32.609875 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1061 11:44:32.609957 Chrome EC: UHEPI supported
1062 11:44:32.610040 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1063 11:44:32.610124 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1064 11:44:32.610207 SPI flash protection: WPSW=1 SRP0=0
1065 11:44:32.610289 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1066 11:44:32.610372 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1067 11:44:32.610455 found VGA at PCI: 00:02.0
1068 11:44:32.610537 Setting up VGA for PCI: 00:02.0
1069 11:44:32.610814 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1070 11:44:32.610902 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1071 11:44:32.610985 Allocating resources...
1072 11:44:32.611067 Reading resources...
1073 11:44:32.611149 Root Device read_resources bus 0 link: 0
1074 11:44:32.611231 DOMAIN: 0000 read_resources bus 0 link: 0
1075 11:44:32.611313 PCI: 00:04.0 read_resources bus 1 link: 0
1076 11:44:32.611396 PCI: 00:04.0 read_resources bus 1 link: 0 done
1077 11:44:32.611478 PCI: 00:0d.0 read_resources bus 0 link: 0
1078 11:44:32.611560 USB0 port 0 read_resources bus 0 link: 0
1079 11:44:32.611643 USB0 port 0 read_resources bus 0 link: 0 done
1080 11:44:32.611725 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1081 11:44:32.611807 PCI: 00:14.0 read_resources bus 0 link: 0
1082 11:44:32.611890 USB0 port 0 read_resources bus 0 link: 0
1083 11:44:32.611972 USB0 port 0 read_resources bus 0 link: 0 done
1084 11:44:32.612054 PCI: 00:14.0 read_resources bus 0 link: 0 done
1085 11:44:32.612136 PCI: 00:14.3 read_resources bus 0 link: 0
1086 11:44:32.612219 PCI: 00:14.3 read_resources bus 0 link: 0 done
1087 11:44:32.612301 PCI: 00:15.0 read_resources bus 0 link: 0
1088 11:44:32.612430 PCI: 00:15.0 read_resources bus 0 link: 0 done
1089 11:44:32.612513 PCI: 00:15.1 read_resources bus 0 link: 0
1090 11:44:32.612596 PCI: 00:15.1 read_resources bus 0 link: 0 done
1091 11:44:32.612678 PCI: 00:19.1 read_resources bus 0 link: 0
1092 11:44:32.612761 PCI: 00:19.1 read_resources bus 0 link: 0 done
1093 11:44:32.612843 PCI: 00:1d.0 read_resources bus 1 link: 0
1094 11:44:32.612925 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1095 11:44:32.613007 PCI: 00:1e.2 read_resources bus 2 link: 0
1096 11:44:32.613090 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1097 11:44:32.613172 PCI: 00:1e.3 read_resources bus 3 link: 0
1098 11:44:32.613254 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1099 11:44:32.613336 PCI: 00:1f.0 read_resources bus 0 link: 0
1100 11:44:32.613418 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1101 11:44:32.613500 PCI: 00:1f.2 read_resources bus 0 link: 0
1102 11:44:32.613583 GENERIC: 0.0 read_resources bus 0 link: 0
1103 11:44:32.613665 GENERIC: 0.0 read_resources bus 0 link: 0 done
1104 11:44:32.613748 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1105 11:44:32.613830 DOMAIN: 0000 read_resources bus 0 link: 0 done
1106 11:44:32.613912 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1107 11:44:32.613994 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1108 11:44:32.614077 Root Device read_resources bus 0 link: 0 done
1109 11:44:32.614158 Done reading resources.
1110 11:44:32.614241 Show resources in subtree (Root Device)...After reading.
1111 11:44:32.614324 Root Device child on link 0 DOMAIN: 0000
1112 11:44:32.614406 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1113 11:44:32.614490 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1114 11:44:32.614574 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1115 11:44:32.614657 PCI: 00:00.0
1116 11:44:32.614740 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1117 11:44:32.614824 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1118 11:44:32.614908 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1119 11:44:32.614993 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1120 11:44:32.615077 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1121 11:44:32.615161 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1122 11:44:32.615245 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1123 11:44:32.615329 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1124 11:44:32.615413 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1125 11:44:32.615498 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1126 11:44:32.615589 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1127 11:44:32.615674 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1128 11:44:32.615758 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1129 11:44:32.615842 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1130 11:44:32.615926 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1131 11:44:32.616010 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1132 11:44:32.616094 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1133 11:44:32.616179 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1134 11:44:32.616262 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1135 11:44:32.616537 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1136 11:44:32.616601 PCI: 00:02.0
1137 11:44:32.616657 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1138 11:44:32.616711 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1139 11:44:32.616765 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1140 11:44:32.616819 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1141 11:44:32.616873 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1142 11:44:32.616927 GENERIC: 0.0
1143 11:44:32.616979 PCI: 00:05.0
1144 11:44:32.617032 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1145 11:44:32.617086 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1146 11:44:32.617139 GENERIC: 0.0
1147 11:44:32.617192 PCI: 00:08.0
1148 11:44:32.617245 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1149 11:44:32.617299 PCI: 00:0a.0
1150 11:44:32.617352 PCI: 00:0d.0 child on link 0 USB0 port 0
1151 11:44:32.617405 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1152 11:44:32.617459 USB0 port 0 child on link 0 USB3 port 0
1153 11:44:32.617512 USB3 port 0
1154 11:44:32.617564 USB3 port 1
1155 11:44:32.617617 USB3 port 2
1156 11:44:32.617670 USB3 port 3
1157 11:44:32.617723 PCI: 00:14.0 child on link 0 USB0 port 0
1158 11:44:32.617775 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1159 11:44:32.617828 USB0 port 0 child on link 0 USB2 port 0
1160 11:44:32.617881 USB2 port 0
1161 11:44:32.617933 USB2 port 1
1162 11:44:32.617985 USB2 port 2
1163 11:44:32.618037 USB2 port 3
1164 11:44:32.618089 USB2 port 4
1165 11:44:32.618142 USB2 port 5
1166 11:44:32.618193 USB2 port 6
1167 11:44:32.618246 USB2 port 7
1168 11:44:32.618298 USB2 port 8
1169 11:44:32.618350 USB2 port 9
1170 11:44:32.618402 USB3 port 0
1171 11:44:32.618454 USB3 port 1
1172 11:44:32.618506 USB3 port 2
1173 11:44:32.618558 USB3 port 3
1174 11:44:32.618609 PCI: 00:14.2
1175 11:44:32.618662 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1176 11:44:32.618716 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1177 11:44:32.618769 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1178 11:44:32.618822 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1179 11:44:32.618876 GENERIC: 0.0
1180 11:44:32.618928 PCI: 00:15.0 child on link 0 I2C: 00:1a
1181 11:44:32.618981 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1182 11:44:32.619034 I2C: 00:1a
1183 11:44:32.619086 I2C: 00:31
1184 11:44:32.619139 I2C: 00:32
1185 11:44:32.621884 PCI: 00:15.1 child on link 0 I2C: 00:10
1186 11:44:32.632165 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 11:44:32.632327 I2C: 00:10
1188 11:44:32.635429 PCI: 00:15.2
1189 11:44:32.644923 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 11:44:32.645020 PCI: 00:15.3
1191 11:44:32.654972 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1192 11:44:32.658152 PCI: 00:16.0
1193 11:44:32.668170 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 11:44:32.668260 PCI: 00:19.0
1195 11:44:32.671513 PCI: 00:19.1 child on link 0 I2C: 00:15
1196 11:44:32.682001 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 11:44:32.684637 I2C: 00:15
1198 11:44:32.687943 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1199 11:44:32.698357 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1200 11:44:32.707897 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1201 11:44:32.717902 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1202 11:44:32.717994 GENERIC: 0.0
1203 11:44:32.721428 PCI: 01:00.0
1204 11:44:32.731221 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1205 11:44:32.737714 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1206 11:44:32.747940 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1207 11:44:32.750925 PCI: 00:1e.0
1208 11:44:32.760979 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1209 11:44:32.764331 PCI: 00:1e.2 child on link 0 SPI: 00
1210 11:44:32.774238 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1211 11:44:32.777866 SPI: 00
1212 11:44:32.780756 PCI: 00:1e.3 child on link 0 SPI: 00
1213 11:44:32.790946 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 11:44:32.791041 SPI: 00
1215 11:44:32.797743 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1216 11:44:32.803951 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1217 11:44:32.807481 PNP: 0c09.0
1218 11:44:32.813986 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1219 11:44:32.820656 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1220 11:44:32.830753 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1221 11:44:32.837011 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1222 11:44:32.843745 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1223 11:44:32.843847 GENERIC: 0.0
1224 11:44:32.847508 GENERIC: 1.0
1225 11:44:32.847593 PCI: 00:1f.3
1226 11:44:32.856927 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1227 11:44:32.867156 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1228 11:44:32.870167 PCI: 00:1f.5
1229 11:44:32.880292 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1230 11:44:32.883524 CPU_CLUSTER: 0 child on link 0 APIC: 00
1231 11:44:32.883617 APIC: 00
1232 11:44:32.886825 APIC: 01
1233 11:44:32.886932 APIC: 03
1234 11:44:32.887025 APIC: 07
1235 11:44:32.890400 APIC: 05
1236 11:44:32.890510 APIC: 04
1237 11:44:32.893421 APIC: 02
1238 11:44:32.893503 APIC: 06
1239 11:44:32.899901 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1240 11:44:32.907091 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1241 11:44:32.913178 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1242 11:44:32.920558 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1243 11:44:32.923417 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1244 11:44:32.926981 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1245 11:44:32.933264 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1246 11:44:32.939822 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1247 11:44:32.946557 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1248 11:44:32.952895 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1249 11:44:32.963424 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1250 11:44:32.966560 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1251 11:44:32.976299 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1252 11:44:32.983083 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1253 11:44:32.990016 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1254 11:44:32.992854 DOMAIN: 0000: Resource ranges:
1255 11:44:32.996086 * Base: 1000, Size: 800, Tag: 100
1256 11:44:32.999559 * Base: 1900, Size: e700, Tag: 100
1257 11:44:33.006006 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1258 11:44:33.012578 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1259 11:44:33.019887 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1260 11:44:33.025850 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1261 11:44:33.035930 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1262 11:44:33.042550 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1263 11:44:33.049100 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1264 11:44:33.059674 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1265 11:44:33.065823 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1266 11:44:33.072530 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1267 11:44:33.082366 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1268 11:44:33.089014 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1269 11:44:33.095687 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1270 11:44:33.105353 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1271 11:44:33.112088 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1272 11:44:33.118951 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1273 11:44:33.128897 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1274 11:44:33.135370 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1275 11:44:33.141955 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1276 11:44:33.151755 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1277 11:44:33.158796 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1278 11:44:33.165260 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1279 11:44:33.174948 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1280 11:44:33.181786 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1281 11:44:33.188087 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1282 11:44:33.191426 DOMAIN: 0000: Resource ranges:
1283 11:44:33.198369 * Base: 7fc00000, Size: 40400000, Tag: 200
1284 11:44:33.201823 * Base: d0000000, Size: 28000000, Tag: 200
1285 11:44:33.205160 * Base: fa000000, Size: 1000000, Tag: 200
1286 11:44:33.208138 * Base: fb001000, Size: 2fff000, Tag: 200
1287 11:44:33.215111 * Base: fe010000, Size: 2e000, Tag: 200
1288 11:44:33.218222 * Base: fe03f000, Size: d41000, Tag: 200
1289 11:44:33.221615 * Base: fed88000, Size: 8000, Tag: 200
1290 11:44:33.224882 * Base: fed93000, Size: d000, Tag: 200
1291 11:44:33.231544 * Base: feda2000, Size: 1e000, Tag: 200
1292 11:44:33.235519 * Base: fede0000, Size: 1220000, Tag: 200
1293 11:44:33.238500 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1294 11:44:33.248323 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1295 11:44:33.254757 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1296 11:44:33.261395 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1297 11:44:33.268153 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1298 11:44:33.274667 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1299 11:44:33.281378 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1300 11:44:33.287914 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1301 11:44:33.294608 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1302 11:44:33.301031 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1303 11:44:33.307786 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1304 11:44:33.314284 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1305 11:44:33.321103 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1306 11:44:33.327665 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1307 11:44:33.334025 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1308 11:44:33.340721 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1309 11:44:33.347385 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1310 11:44:33.354193 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1311 11:44:33.360845 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1312 11:44:33.367201 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1313 11:44:33.374124 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1314 11:44:33.380572 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1315 11:44:33.386842 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1316 11:44:33.393703 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1317 11:44:33.400101 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1318 11:44:33.403587 PCI: 00:1d.0: Resource ranges:
1319 11:44:33.407324 * Base: 7fc00000, Size: 100000, Tag: 200
1320 11:44:33.413654 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1321 11:44:33.420361 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1322 11:44:33.426874 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1323 11:44:33.436889 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1324 11:44:33.443141 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1325 11:44:33.446929 Root Device assign_resources, bus 0 link: 0
1326 11:44:33.453646 DOMAIN: 0000 assign_resources, bus 0 link: 0
1327 11:44:33.460060 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1328 11:44:33.470182 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1329 11:44:33.476747 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1330 11:44:33.486683 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1331 11:44:33.490221 PCI: 00:04.0 assign_resources, bus 1 link: 0
1332 11:44:33.497031 PCI: 00:04.0 assign_resources, bus 1 link: 0
1333 11:44:33.503097 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1334 11:44:33.513141 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1335 11:44:33.519694 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1336 11:44:33.523106 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1337 11:44:33.529651 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1338 11:44:33.536229 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1339 11:44:33.542902 PCI: 00:14.0 assign_resources, bus 0 link: 0
1340 11:44:33.546640 PCI: 00:14.0 assign_resources, bus 0 link: 0
1341 11:44:33.556027 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1342 11:44:33.562780 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1343 11:44:33.572529 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1344 11:44:33.576138 PCI: 00:14.3 assign_resources, bus 0 link: 0
1345 11:44:33.578915 PCI: 00:14.3 assign_resources, bus 0 link: 0
1346 11:44:33.589021 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1347 11:44:33.592278 PCI: 00:15.0 assign_resources, bus 0 link: 0
1348 11:44:33.599108 PCI: 00:15.0 assign_resources, bus 0 link: 0
1349 11:44:33.605637 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1350 11:44:33.608765 PCI: 00:15.1 assign_resources, bus 0 link: 0
1351 11:44:33.615879 PCI: 00:15.1 assign_resources, bus 0 link: 0
1352 11:44:33.622098 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1353 11:44:33.632277 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1354 11:44:33.639077 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1355 11:44:33.648348 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1356 11:44:33.651873 PCI: 00:19.1 assign_resources, bus 0 link: 0
1357 11:44:33.658609 PCI: 00:19.1 assign_resources, bus 0 link: 0
1358 11:44:33.664842 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1359 11:44:33.674822 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1360 11:44:33.684919 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1361 11:44:33.688830 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1362 11:44:33.698242 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1363 11:44:33.704808 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1364 11:44:33.711231 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1365 11:44:33.718320 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1366 11:44:33.724915 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1367 11:44:33.731248 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1368 11:44:33.735151 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1369 11:44:33.744765 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1370 11:44:33.747805 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1371 11:44:33.750962 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1372 11:44:33.758201 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1373 11:44:33.761514 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1374 11:44:33.768267 LPC: Trying to open IO window from 800 size 1ff
1375 11:44:33.774578 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1376 11:44:33.784502 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1377 11:44:33.791540 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1378 11:44:33.797563 DOMAIN: 0000 assign_resources, bus 0 link: 0
1379 11:44:33.801077 Root Device assign_resources, bus 0 link: 0
1380 11:44:33.804164 Done setting resources.
1381 11:44:33.810631 Show resources in subtree (Root Device)...After assigning values.
1382 11:44:33.814023 Root Device child on link 0 DOMAIN: 0000
1383 11:44:33.817608 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1384 11:44:33.827287 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1385 11:44:33.837165 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1386 11:44:33.840560 PCI: 00:00.0
1387 11:44:33.850383 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1388 11:44:33.860115 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1389 11:44:33.867289 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1390 11:44:33.876891 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1391 11:44:33.886779 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1392 11:44:33.896520 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1393 11:44:33.906696 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1394 11:44:33.916530 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1395 11:44:33.923266 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1396 11:44:33.933124 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1397 11:44:33.942939 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1398 11:44:33.953188 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1399 11:44:33.962753 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1400 11:44:33.969800 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1401 11:44:33.979334 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1402 11:44:33.989447 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1403 11:44:33.999108 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1404 11:44:34.009220 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1405 11:44:34.018755 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1406 11:44:34.028969 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1407 11:44:34.029081 PCI: 00:02.0
1408 11:44:34.038676 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1409 11:44:34.052204 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1410 11:44:34.058974 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1411 11:44:34.065622 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1412 11:44:34.075563 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1413 11:44:34.075682 GENERIC: 0.0
1414 11:44:34.078948 PCI: 00:05.0
1415 11:44:34.088298 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1416 11:44:34.095528 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1417 11:44:34.095623 GENERIC: 0.0
1418 11:44:34.098661 PCI: 00:08.0
1419 11:44:34.108823 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1420 11:44:34.108927 PCI: 00:0a.0
1421 11:44:34.111825 PCI: 00:0d.0 child on link 0 USB0 port 0
1422 11:44:34.124997 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1423 11:44:34.128472 USB0 port 0 child on link 0 USB3 port 0
1424 11:44:34.128570 USB3 port 0
1425 11:44:34.131653 USB3 port 1
1426 11:44:34.135139 USB3 port 2
1427 11:44:34.135222 USB3 port 3
1428 11:44:34.138364 PCI: 00:14.0 child on link 0 USB0 port 0
1429 11:44:34.151637 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1430 11:44:34.154909 USB0 port 0 child on link 0 USB2 port 0
1431 11:44:34.155000 USB2 port 0
1432 11:44:34.158450 USB2 port 1
1433 11:44:34.158534 USB2 port 2
1434 11:44:34.162046 USB2 port 3
1435 11:44:34.164792 USB2 port 4
1436 11:44:34.164874 USB2 port 5
1437 11:44:34.168199 USB2 port 6
1438 11:44:34.168281 USB2 port 7
1439 11:44:34.171840 USB2 port 8
1440 11:44:34.171947 USB2 port 9
1441 11:44:34.174852 USB3 port 0
1442 11:44:34.174935 USB3 port 1
1443 11:44:34.178225 USB3 port 2
1444 11:44:34.178345 USB3 port 3
1445 11:44:34.182011 PCI: 00:14.2
1446 11:44:34.191519 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1447 11:44:34.201503 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1448 11:44:34.205041 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1449 11:44:34.218253 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1450 11:44:34.218375 GENERIC: 0.0
1451 11:44:34.221235 PCI: 00:15.0 child on link 0 I2C: 00:1a
1452 11:44:34.231263 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1453 11:44:34.234695 I2C: 00:1a
1454 11:44:34.234785 I2C: 00:31
1455 11:44:34.237871 I2C: 00:32
1456 11:44:34.241398 PCI: 00:15.1 child on link 0 I2C: 00:10
1457 11:44:34.251450 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1458 11:44:34.254887 I2C: 00:10
1459 11:44:34.254976 PCI: 00:15.2
1460 11:44:34.264679 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1461 11:44:34.267921 PCI: 00:15.3
1462 11:44:34.278027 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1463 11:44:34.278124 PCI: 00:16.0
1464 11:44:34.291240 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1465 11:44:34.291346 PCI: 00:19.0
1466 11:44:34.294345 PCI: 00:19.1 child on link 0 I2C: 00:15
1467 11:44:34.307907 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1468 11:44:34.308028 I2C: 00:15
1469 11:44:34.311053 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1470 11:44:34.320890 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1471 11:44:34.334503 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1472 11:44:34.344357 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1473 11:44:34.344487 GENERIC: 0.0
1474 11:44:34.347670 PCI: 01:00.0
1475 11:44:34.357575 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1476 11:44:34.367640 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1477 11:44:34.378122 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1478 11:44:34.380911 PCI: 00:1e.0
1479 11:44:34.390860 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1480 11:44:34.393973 PCI: 00:1e.2 child on link 0 SPI: 00
1481 11:44:34.404091 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1482 11:44:34.407358 SPI: 00
1483 11:44:34.410443 PCI: 00:1e.3 child on link 0 SPI: 00
1484 11:44:34.420958 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1485 11:44:34.424042 SPI: 00
1486 11:44:34.427428 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1487 11:44:34.437408 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1488 11:44:34.437493 PNP: 0c09.0
1489 11:44:34.447092 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1490 11:44:34.451111 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1491 11:44:34.460816 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1492 11:44:34.470292 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1493 11:44:34.473668 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1494 11:44:34.476995 GENERIC: 0.0
1495 11:44:34.477075 GENERIC: 1.0
1496 11:44:34.480051 PCI: 00:1f.3
1497 11:44:34.490295 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1498 11:44:34.500062 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1499 11:44:34.500149 PCI: 00:1f.5
1500 11:44:34.513263 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1501 11:44:34.516737 CPU_CLUSTER: 0 child on link 0 APIC: 00
1502 11:44:34.516839 APIC: 00
1503 11:44:34.519910 APIC: 01
1504 11:44:34.519982 APIC: 03
1505 11:44:34.520050 APIC: 07
1506 11:44:34.523508 APIC: 05
1507 11:44:34.523592 APIC: 04
1508 11:44:34.526764 APIC: 02
1509 11:44:34.526861 APIC: 06
1510 11:44:34.530213 Done allocating resources.
1511 11:44:34.536280 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1512 11:44:34.539973 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1513 11:44:34.546329 Configure GPIOs for I2S audio on UP4.
1514 11:44:34.552920 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1515 11:44:34.553004 Enabling resources...
1516 11:44:34.560521 PCI: 00:00.0 subsystem <- 8086/9a12
1517 11:44:34.560605 PCI: 00:00.0 cmd <- 06
1518 11:44:34.563412 PCI: 00:02.0 subsystem <- 8086/9a40
1519 11:44:34.566477 PCI: 00:02.0 cmd <- 03
1520 11:44:34.569552 PCI: 00:04.0 subsystem <- 8086/9a03
1521 11:44:34.573339 PCI: 00:04.0 cmd <- 02
1522 11:44:34.576549 PCI: 00:05.0 subsystem <- 8086/9a19
1523 11:44:34.579607 PCI: 00:05.0 cmd <- 02
1524 11:44:34.582990 PCI: 00:08.0 subsystem <- 8086/9a11
1525 11:44:34.586230 PCI: 00:08.0 cmd <- 06
1526 11:44:34.589589 PCI: 00:0d.0 subsystem <- 8086/9a13
1527 11:44:34.592958 PCI: 00:0d.0 cmd <- 02
1528 11:44:34.596141 PCI: 00:14.0 subsystem <- 8086/a0ed
1529 11:44:34.599714 PCI: 00:14.0 cmd <- 02
1530 11:44:34.602767 PCI: 00:14.2 subsystem <- 8086/a0ef
1531 11:44:34.602849 PCI: 00:14.2 cmd <- 02
1532 11:44:34.609505 PCI: 00:14.3 subsystem <- 8086/a0f0
1533 11:44:34.609591 PCI: 00:14.3 cmd <- 02
1534 11:44:34.612755 PCI: 00:15.0 subsystem <- 8086/a0e8
1535 11:44:34.615933 PCI: 00:15.0 cmd <- 02
1536 11:44:34.619651 PCI: 00:15.1 subsystem <- 8086/a0e9
1537 11:44:34.622681 PCI: 00:15.1 cmd <- 02
1538 11:44:34.625954 PCI: 00:15.2 subsystem <- 8086/a0ea
1539 11:44:34.629342 PCI: 00:15.2 cmd <- 02
1540 11:44:34.632646 PCI: 00:15.3 subsystem <- 8086/a0eb
1541 11:44:34.635853 PCI: 00:15.3 cmd <- 02
1542 11:44:34.639026 PCI: 00:16.0 subsystem <- 8086/a0e0
1543 11:44:34.642228 PCI: 00:16.0 cmd <- 02
1544 11:44:34.646293 PCI: 00:19.1 subsystem <- 8086/a0c6
1545 11:44:34.649164 PCI: 00:19.1 cmd <- 02
1546 11:44:34.652510 PCI: 00:1d.0 bridge ctrl <- 0013
1547 11:44:34.655606 PCI: 00:1d.0 subsystem <- 8086/a0b0
1548 11:44:34.655713 PCI: 00:1d.0 cmd <- 06
1549 11:44:34.662248 PCI: 00:1e.0 subsystem <- 8086/a0a8
1550 11:44:34.662335 PCI: 00:1e.0 cmd <- 06
1551 11:44:34.665729 PCI: 00:1e.2 subsystem <- 8086/a0aa
1552 11:44:34.668954 PCI: 00:1e.2 cmd <- 06
1553 11:44:34.672162 PCI: 00:1e.3 subsystem <- 8086/a0ab
1554 11:44:34.675643 PCI: 00:1e.3 cmd <- 02
1555 11:44:34.678611 PCI: 00:1f.0 subsystem <- 8086/a087
1556 11:44:34.682085 PCI: 00:1f.0 cmd <- 407
1557 11:44:34.685400 PCI: 00:1f.3 subsystem <- 8086/a0c8
1558 11:44:34.689189 PCI: 00:1f.3 cmd <- 02
1559 11:44:34.692076 PCI: 00:1f.5 subsystem <- 8086/a0a4
1560 11:44:34.695085 PCI: 00:1f.5 cmd <- 406
1561 11:44:34.698733 PCI: 01:00.0 cmd <- 02
1562 11:44:34.703521 done.
1563 11:44:34.706610 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1564 11:44:34.709748 Initializing devices...
1565 11:44:34.713098 Root Device init
1566 11:44:34.716403 Chrome EC: Set SMI mask to 0x0000000000000000
1567 11:44:34.724173 Chrome EC: clear events_b mask to 0x0000000000000000
1568 11:44:34.730801 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1569 11:44:34.737538 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1570 11:44:34.744023 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1571 11:44:34.747098 Chrome EC: Set WAKE mask to 0x0000000000000000
1572 11:44:34.755063 fw_config match found: DB_USB=USB3_ACTIVE
1573 11:44:34.757902 Configure Right Type-C port orientation for retimer
1574 11:44:34.761613 Root Device init finished in 46 msecs
1575 11:44:34.765319 PCI: 00:00.0 init
1576 11:44:34.768742 CPU TDP = 9 Watts
1577 11:44:34.771941 CPU PL1 = 9 Watts
1578 11:44:34.772024 CPU PL2 = 40 Watts
1579 11:44:34.775026 CPU PL4 = 83 Watts
1580 11:44:34.779002 PCI: 00:00.0 init finished in 8 msecs
1581 11:44:34.781885 PCI: 00:02.0 init
1582 11:44:34.781968 GMA: Found VBT in CBFS
1583 11:44:34.784893 GMA: Found valid VBT in CBFS
1584 11:44:34.791790 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1585 11:44:34.798743 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1586 11:44:34.801716 PCI: 00:02.0 init finished in 18 msecs
1587 11:44:34.805247 PCI: 00:05.0 init
1588 11:44:34.808047 PCI: 00:05.0 init finished in 0 msecs
1589 11:44:34.811341 PCI: 00:08.0 init
1590 11:44:34.815217 PCI: 00:08.0 init finished in 0 msecs
1591 11:44:34.818531 PCI: 00:14.0 init
1592 11:44:34.821458 PCI: 00:14.0 init finished in 0 msecs
1593 11:44:34.824546 PCI: 00:14.2 init
1594 11:44:34.828059 PCI: 00:14.2 init finished in 0 msecs
1595 11:44:34.831330 PCI: 00:15.0 init
1596 11:44:34.834967 I2C bus 0 version 0x3230302a
1597 11:44:34.837873 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1598 11:44:34.841249 PCI: 00:15.0 init finished in 6 msecs
1599 11:44:34.844774 PCI: 00:15.1 init
1600 11:44:34.844858 I2C bus 1 version 0x3230302a
1601 11:44:34.851145 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1602 11:44:34.854382 PCI: 00:15.1 init finished in 6 msecs
1603 11:44:34.854465 PCI: 00:15.2 init
1604 11:44:34.857779 I2C bus 2 version 0x3230302a
1605 11:44:34.861206 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1606 11:44:34.867700 PCI: 00:15.2 init finished in 6 msecs
1607 11:44:34.867811 PCI: 00:15.3 init
1608 11:44:34.870952 I2C bus 3 version 0x3230302a
1609 11:44:34.874339 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1610 11:44:34.877230 PCI: 00:15.3 init finished in 6 msecs
1611 11:44:34.881030 PCI: 00:16.0 init
1612 11:44:34.883726 PCI: 00:16.0 init finished in 0 msecs
1613 11:44:34.887035 PCI: 00:19.1 init
1614 11:44:34.890587 I2C bus 5 version 0x3230302a
1615 11:44:34.893572 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1616 11:44:34.897526 PCI: 00:19.1 init finished in 6 msecs
1617 11:44:34.900733 PCI: 00:1d.0 init
1618 11:44:34.903708 Initializing PCH PCIe bridge.
1619 11:44:34.907177 PCI: 00:1d.0 init finished in 3 msecs
1620 11:44:34.910579 PCI: 00:1f.0 init
1621 11:44:34.913587 IOAPIC: Initializing IOAPIC at 0xfec00000
1622 11:44:34.920235 IOAPIC: Bootstrap Processor Local APIC = 0x00
1623 11:44:34.920346 IOAPIC: ID = 0x02
1624 11:44:34.923593 IOAPIC: Dumping registers
1625 11:44:34.926719 reg 0x0000: 0x02000000
1626 11:44:34.926807 reg 0x0001: 0x00770020
1627 11:44:34.930041 reg 0x0002: 0x00000000
1628 11:44:34.933400 PCI: 00:1f.0 init finished in 21 msecs
1629 11:44:34.937080 PCI: 00:1f.2 init
1630 11:44:34.940093 Disabling ACPI via APMC.
1631 11:44:34.944473 APMC done.
1632 11:44:34.948066 PCI: 00:1f.2 init finished in 6 msecs
1633 11:44:34.959794 PCI: 01:00.0 init
1634 11:44:34.962559 PCI: 01:00.0 init finished in 0 msecs
1635 11:44:34.966509 PNP: 0c09.0 init
1636 11:44:34.972429 Google Chrome EC uptime: 10.216 seconds
1637 11:44:34.976025 Google Chrome AP resets since EC boot: 0
1638 11:44:34.978965 Google Chrome most recent AP reset causes:
1639 11:44:34.985832 Google Chrome EC reset flags at last EC boot: reset-pin | hard
1640 11:44:34.988960 PNP: 0c09.0 init finished in 19 msecs
1641 11:44:34.994964 Devices initialized
1642 11:44:34.998371 Show all devs... After init.
1643 11:44:35.001795 Root Device: enabled 1
1644 11:44:35.001879 DOMAIN: 0000: enabled 1
1645 11:44:35.004783 CPU_CLUSTER: 0: enabled 1
1646 11:44:35.008334 PCI: 00:00.0: enabled 1
1647 11:44:35.012068 PCI: 00:02.0: enabled 1
1648 11:44:35.012190 PCI: 00:04.0: enabled 1
1649 11:44:35.015383 PCI: 00:05.0: enabled 1
1650 11:44:35.018697 PCI: 00:06.0: enabled 0
1651 11:44:35.021583 PCI: 00:07.0: enabled 0
1652 11:44:35.021666 PCI: 00:07.1: enabled 0
1653 11:44:35.025101 PCI: 00:07.2: enabled 0
1654 11:44:35.028360 PCI: 00:07.3: enabled 0
1655 11:44:35.031356 PCI: 00:08.0: enabled 1
1656 11:44:35.031438 PCI: 00:09.0: enabled 0
1657 11:44:35.035010 PCI: 00:0a.0: enabled 0
1658 11:44:35.038313 PCI: 00:0d.0: enabled 1
1659 11:44:35.041892 PCI: 00:0d.1: enabled 0
1660 11:44:35.041974 PCI: 00:0d.2: enabled 0
1661 11:44:35.045085 PCI: 00:0d.3: enabled 0
1662 11:44:35.048396 PCI: 00:0e.0: enabled 0
1663 11:44:35.048479 PCI: 00:10.2: enabled 1
1664 11:44:35.051393 PCI: 00:10.6: enabled 0
1665 11:44:35.055082 PCI: 00:10.7: enabled 0
1666 11:44:35.058652 PCI: 00:12.0: enabled 0
1667 11:44:35.058737 PCI: 00:12.6: enabled 0
1668 11:44:35.061623 PCI: 00:13.0: enabled 0
1669 11:44:35.065028 PCI: 00:14.0: enabled 1
1670 11:44:35.068217 PCI: 00:14.1: enabled 0
1671 11:44:35.068316 PCI: 00:14.2: enabled 1
1672 11:44:35.071257 PCI: 00:14.3: enabled 1
1673 11:44:35.074566 PCI: 00:15.0: enabled 1
1674 11:44:35.078300 PCI: 00:15.1: enabled 1
1675 11:44:35.078383 PCI: 00:15.2: enabled 1
1676 11:44:35.081518 PCI: 00:15.3: enabled 1
1677 11:44:35.084725 PCI: 00:16.0: enabled 1
1678 11:44:35.084808 PCI: 00:16.1: enabled 0
1679 11:44:35.087876 PCI: 00:16.2: enabled 0
1680 11:44:35.091590 PCI: 00:16.3: enabled 0
1681 11:44:35.094945 PCI: 00:16.4: enabled 0
1682 11:44:35.095029 PCI: 00:16.5: enabled 0
1683 11:44:35.097971 PCI: 00:17.0: enabled 0
1684 11:44:35.101450 PCI: 00:19.0: enabled 0
1685 11:44:35.104554 PCI: 00:19.1: enabled 1
1686 11:44:35.104638 PCI: 00:19.2: enabled 0
1687 11:44:35.108121 PCI: 00:1c.0: enabled 1
1688 11:44:35.111464 PCI: 00:1c.1: enabled 0
1689 11:44:35.114691 PCI: 00:1c.2: enabled 0
1690 11:44:35.114773 PCI: 00:1c.3: enabled 0
1691 11:44:35.118115 PCI: 00:1c.4: enabled 0
1692 11:44:35.121416 PCI: 00:1c.5: enabled 0
1693 11:44:35.124633 PCI: 00:1c.6: enabled 1
1694 11:44:35.124715 PCI: 00:1c.7: enabled 0
1695 11:44:35.127860 PCI: 00:1d.0: enabled 1
1696 11:44:35.131240 PCI: 00:1d.1: enabled 0
1697 11:44:35.131324 PCI: 00:1d.2: enabled 1
1698 11:44:35.134707 PCI: 00:1d.3: enabled 0
1699 11:44:35.137678 PCI: 00:1e.0: enabled 1
1700 11:44:35.140923 PCI: 00:1e.1: enabled 0
1701 11:44:35.141009 PCI: 00:1e.2: enabled 1
1702 11:44:35.144027 PCI: 00:1e.3: enabled 1
1703 11:44:35.147717 PCI: 00:1f.0: enabled 1
1704 11:44:35.151346 PCI: 00:1f.1: enabled 0
1705 11:44:35.151427 PCI: 00:1f.2: enabled 1
1706 11:44:35.153985 PCI: 00:1f.3: enabled 1
1707 11:44:35.157633 PCI: 00:1f.4: enabled 0
1708 11:44:35.160943 PCI: 00:1f.5: enabled 1
1709 11:44:35.161024 PCI: 00:1f.6: enabled 0
1710 11:44:35.164163 PCI: 00:1f.7: enabled 0
1711 11:44:35.167502 APIC: 00: enabled 1
1712 11:44:35.167583 GENERIC: 0.0: enabled 1
1713 11:44:35.170857 GENERIC: 0.0: enabled 1
1714 11:44:35.174232 GENERIC: 1.0: enabled 1
1715 11:44:35.177356 GENERIC: 0.0: enabled 1
1716 11:44:35.177437 GENERIC: 1.0: enabled 1
1717 11:44:35.180716 USB0 port 0: enabled 1
1718 11:44:35.183941 GENERIC: 0.0: enabled 1
1719 11:44:35.187877 USB0 port 0: enabled 1
1720 11:44:35.187959 GENERIC: 0.0: enabled 1
1721 11:44:35.190779 I2C: 00:1a: enabled 1
1722 11:44:35.194333 I2C: 00:31: enabled 1
1723 11:44:35.194414 I2C: 00:32: enabled 1
1724 11:44:35.197321 I2C: 00:10: enabled 1
1725 11:44:35.200527 I2C: 00:15: enabled 1
1726 11:44:35.200608 GENERIC: 0.0: enabled 0
1727 11:44:35.203687 GENERIC: 1.0: enabled 0
1728 11:44:35.207226 GENERIC: 0.0: enabled 1
1729 11:44:35.207332 SPI: 00: enabled 1
1730 11:44:35.210815 SPI: 00: enabled 1
1731 11:44:35.213833 PNP: 0c09.0: enabled 1
1732 11:44:35.217109 GENERIC: 0.0: enabled 1
1733 11:44:35.217192 USB3 port 0: enabled 1
1734 11:44:35.220545 USB3 port 1: enabled 1
1735 11:44:35.223801 USB3 port 2: enabled 0
1736 11:44:35.223903 USB3 port 3: enabled 0
1737 11:44:35.226988 USB2 port 0: enabled 0
1738 11:44:35.230467 USB2 port 1: enabled 1
1739 11:44:35.230550 USB2 port 2: enabled 1
1740 11:44:35.233655 USB2 port 3: enabled 0
1741 11:44:35.236739 USB2 port 4: enabled 1
1742 11:44:35.240035 USB2 port 5: enabled 0
1743 11:44:35.240118 USB2 port 6: enabled 0
1744 11:44:35.243601 USB2 port 7: enabled 0
1745 11:44:35.247129 USB2 port 8: enabled 0
1746 11:44:35.247212 USB2 port 9: enabled 0
1747 11:44:35.250463 USB3 port 0: enabled 0
1748 11:44:35.253550 USB3 port 1: enabled 1
1749 11:44:35.257073 USB3 port 2: enabled 0
1750 11:44:35.257158 USB3 port 3: enabled 0
1751 11:44:35.260015 GENERIC: 0.0: enabled 1
1752 11:44:35.263264 GENERIC: 1.0: enabled 1
1753 11:44:35.263348 APIC: 01: enabled 1
1754 11:44:35.266916 APIC: 03: enabled 1
1755 11:44:35.269858 APIC: 07: enabled 1
1756 11:44:35.269942 APIC: 05: enabled 1
1757 11:44:35.273486 APIC: 04: enabled 1
1758 11:44:35.273567 APIC: 02: enabled 1
1759 11:44:35.276632 APIC: 06: enabled 1
1760 11:44:35.279731 PCI: 01:00.0: enabled 1
1761 11:44:35.286414 BS: BS_DEV_INIT run times (exec / console): 34 / 537 ms
1762 11:44:35.290065 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1763 11:44:35.292803 ELOG: NV offset 0xf30000 size 0x1000
1764 11:44:35.300302 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1765 11:44:35.306811 ELOG: Event(17) added with size 13 at 2024-05-03 11:44:35 UTC
1766 11:44:35.313619 ELOG: Event(92) added with size 9 at 2024-05-03 11:44:35 UTC
1767 11:44:35.320197 ELOG: Event(93) added with size 9 at 2024-05-03 11:44:35 UTC
1768 11:44:35.326620 ELOG: Event(9E) added with size 10 at 2024-05-03 11:44:35 UTC
1769 11:44:35.333220 ELOG: Event(9F) added with size 14 at 2024-05-03 11:44:35 UTC
1770 11:44:35.340210 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1771 11:44:35.346390 ELOG: Event(A1) added with size 10 at 2024-05-03 11:44:35 UTC
1772 11:44:35.353171 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
1773 11:44:35.359119 ELOG: Event(A0) added with size 9 at 2024-05-03 11:44:35 UTC
1774 11:44:35.362957 elog_add_boot_reason: Logged dev mode boot
1775 11:44:35.369416 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1776 11:44:35.372663 Finalize devices...
1777 11:44:35.372748 Devices finalized
1778 11:44:35.378955 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1779 11:44:35.382921 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1780 11:44:35.389180 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1781 11:44:35.396000 ME: HFSTS1 : 0x80030055
1782 11:44:35.398754 ME: HFSTS2 : 0x30280116
1783 11:44:35.402824 ME: HFSTS3 : 0x00000050
1784 11:44:35.409020 ME: HFSTS4 : 0x00004000
1785 11:44:35.412562 ME: HFSTS5 : 0x00000000
1786 11:44:35.415683 ME: HFSTS6 : 0x00400006
1787 11:44:35.418797 ME: Manufacturing Mode : YES
1788 11:44:35.425619 ME: SPI Protection Mode Enabled : NO
1789 11:44:35.428642 ME: FW Partition Table : OK
1790 11:44:35.432014 ME: Bringup Loader Failure : NO
1791 11:44:35.435333 ME: Firmware Init Complete : NO
1792 11:44:35.438803 ME: Boot Options Present : NO
1793 11:44:35.442209 ME: Update In Progress : NO
1794 11:44:35.445136 ME: D0i3 Support : YES
1795 11:44:35.448532 ME: Low Power State Enabled : NO
1796 11:44:35.454977 ME: CPU Replaced : YES
1797 11:44:35.458400 ME: CPU Replacement Valid : YES
1798 11:44:35.461590 ME: Current Working State : 5
1799 11:44:35.464822 ME: Current Operation State : 1
1800 11:44:35.468256 ME: Current Operation Mode : 3
1801 11:44:35.471760 ME: Error Code : 0
1802 11:44:35.474845 ME: Enhanced Debug Mode : NO
1803 11:44:35.478233 ME: CPU Debug Disabled : YES
1804 11:44:35.484953 ME: TXT Support : NO
1805 11:44:35.488271 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1806 11:44:35.495663 ELOG: Event(91) added with size 10 at 2024-05-03 11:44:35 UTC
1807 11:44:35.502063 Chrome EC: clear events_b mask to 0x0000000020004000
1808 11:44:35.508614 BS: BS_WRITE_TABLES entry times (exec / console): 3 / 11 ms
1809 11:44:35.515183 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1810 11:44:35.518390 CBFS: 'fallback/slic' not found.
1811 11:44:35.524905 ACPI: Writing ACPI tables at 76b01000.
1812 11:44:35.524998 ACPI: * FACS
1813 11:44:35.528294 ACPI: * DSDT
1814 11:44:35.531447 Ramoops buffer: 0x100000@0x76a00000.
1815 11:44:35.534569 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1816 11:44:35.541386 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1817 11:44:35.544860 Google Chrome EC: version:
1818 11:44:35.548158 ro: voema_v2.0.10114-a447f03e46
1819 11:44:35.551301 rw: voema_v2.0.10114-a447f03e46
1820 11:44:35.551412 running image: 1
1821 11:44:35.557837 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1822 11:44:35.562561 ACPI: * FADT
1823 11:44:35.562647 SCI is IRQ9
1824 11:44:35.569382 ACPI: added table 1/32, length now 40
1825 11:44:35.569495 ACPI: * SSDT
1826 11:44:35.572912 Found 1 CPU(s) with 8 core(s) each.
1827 11:44:35.579505 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1828 11:44:35.582365 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1829 11:44:35.585555 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1830 11:44:35.589377 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1831 11:44:35.595454 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1832 11:44:35.602544 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1833 11:44:35.605946 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1834 11:44:35.612381 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1835 11:44:35.618853 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1836 11:44:35.621694 \_SB.PCI0.RP09: Added StorageD3Enable property
1837 11:44:35.628341 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1838 11:44:35.632043 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1839 11:44:35.639103 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1840 11:44:35.642090 PS2K: Passing 80 keymaps to kernel
1841 11:44:35.649348 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1842 11:44:35.655584 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1843 11:44:35.661978 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1844 11:44:35.668835 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1845 11:44:35.674951 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1846 11:44:35.681966 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1847 11:44:35.688792 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1848 11:44:35.695466 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1849 11:44:35.698394 ACPI: added table 2/32, length now 44
1850 11:44:35.701812 ACPI: * MCFG
1851 11:44:35.705066 ACPI: added table 3/32, length now 48
1852 11:44:35.705149 ACPI: * TPM2
1853 11:44:35.708127 TPM2 log created at 0x769f0000
1854 11:44:35.711254 ACPI: added table 4/32, length now 52
1855 11:44:35.714955 ACPI: * MADT
1856 11:44:35.715038 SCI is IRQ9
1857 11:44:35.718494 ACPI: added table 5/32, length now 56
1858 11:44:35.721494 current = 76b09850
1859 11:44:35.721577 ACPI: * DMAR
1860 11:44:35.728111 ACPI: added table 6/32, length now 60
1861 11:44:35.731581 ACPI: added table 7/32, length now 64
1862 11:44:35.731666 ACPI: * HPET
1863 11:44:35.734510 ACPI: added table 8/32, length now 68
1864 11:44:35.738118 ACPI: done.
1865 11:44:35.741248 ACPI tables: 35216 bytes.
1866 11:44:35.744466 smbios_write_tables: 769ef000
1867 11:44:35.747567 EC returned error result code 3
1868 11:44:35.751256 Couldn't obtain OEM name from CBI
1869 11:44:35.754713 Create SMBIOS type 16
1870 11:44:35.754795 Create SMBIOS type 17
1871 11:44:35.757676 GENERIC: 0.0 (WIFI Device)
1872 11:44:35.761165 SMBIOS tables: 1750 bytes.
1873 11:44:35.764156 Writing table forward entry at 0x00000500
1874 11:44:35.770642 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1875 11:44:35.774196 Writing coreboot table at 0x76b25000
1876 11:44:35.780836 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1877 11:44:35.783933 1. 0000000000001000-000000000009ffff: RAM
1878 11:44:35.790865 2. 00000000000a0000-00000000000fffff: RESERVED
1879 11:44:35.794104 3. 0000000000100000-00000000769eefff: RAM
1880 11:44:35.800496 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1881 11:44:35.803923 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1882 11:44:35.810664 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1883 11:44:35.817393 7. 0000000077000000-000000007fbfffff: RESERVED
1884 11:44:35.820634 8. 00000000c0000000-00000000cfffffff: RESERVED
1885 11:44:35.827225 9. 00000000f8000000-00000000f9ffffff: RESERVED
1886 11:44:35.831139 10. 00000000fb000000-00000000fb000fff: RESERVED
1887 11:44:35.834293 11. 00000000fe000000-00000000fe00ffff: RESERVED
1888 11:44:35.840707 12. 00000000fed80000-00000000fed87fff: RESERVED
1889 11:44:35.843767 13. 00000000fed90000-00000000fed92fff: RESERVED
1890 11:44:35.850413 14. 00000000feda0000-00000000feda1fff: RESERVED
1891 11:44:35.853840 15. 00000000fedc0000-00000000feddffff: RESERVED
1892 11:44:35.856989 16. 0000000100000000-00000002803fffff: RAM
1893 11:44:35.860772 Passing 4 GPIOs to payload:
1894 11:44:35.866994 NAME | PORT | POLARITY | VALUE
1895 11:44:35.873589 lid | undefined | high | high
1896 11:44:35.877139 power | undefined | high | low
1897 11:44:35.883754 oprom | undefined | high | low
1898 11:44:35.886785 EC in RW | 0x000000e5 | high | low
1899 11:44:35.893404 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 58b8
1900 11:44:35.896589 coreboot table: 1576 bytes.
1901 11:44:35.900340 IMD ROOT 0. 0x76fff000 0x00001000
1902 11:44:35.903084 IMD SMALL 1. 0x76ffe000 0x00001000
1903 11:44:35.910090 FSP MEMORY 2. 0x76c4e000 0x003b0000
1904 11:44:35.913041 VPD 3. 0x76c4d000 0x00000367
1905 11:44:35.916861 RO MCACHE 4. 0x76c4c000 0x00000fdc
1906 11:44:35.919792 CONSOLE 5. 0x76c2c000 0x00020000
1907 11:44:35.922912 FMAP 6. 0x76c2b000 0x00000578
1908 11:44:35.926909 TIME STAMP 7. 0x76c2a000 0x00000910
1909 11:44:35.929653 VBOOT WORK 8. 0x76c16000 0x00014000
1910 11:44:35.933130 ROMSTG STCK 9. 0x76c15000 0x00001000
1911 11:44:35.939506 AFTER CAR 10. 0x76c0a000 0x0000b000
1912 11:44:35.943098 RAMSTAGE 11. 0x76b97000 0x00073000
1913 11:44:35.946279 REFCODE 12. 0x76b42000 0x00055000
1914 11:44:35.949562 SMM BACKUP 13. 0x76b32000 0x00010000
1915 11:44:35.953004 4f444749 14. 0x76b30000 0x00002000
1916 11:44:35.955969 EXT VBT15. 0x76b2d000 0x0000219f
1917 11:44:35.959150 COREBOOT 16. 0x76b25000 0x00008000
1918 11:44:35.962578 ACPI 17. 0x76b01000 0x00024000
1919 11:44:35.966165 ACPI GNVS 18. 0x76b00000 0x00001000
1920 11:44:35.972495 RAMOOPS 19. 0x76a00000 0x00100000
1921 11:44:35.975805 TPM2 TCGLOG20. 0x769f0000 0x00010000
1922 11:44:35.979205 SMBIOS 21. 0x769ef000 0x00000800
1923 11:44:35.979316 IMD small region:
1924 11:44:35.986065 IMD ROOT 0. 0x76ffec00 0x00000400
1925 11:44:35.989202 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1926 11:44:35.992323 POWER STATE 2. 0x76ffeb80 0x00000044
1927 11:44:35.995394 ROMSTAGE 3. 0x76ffeb60 0x00000004
1928 11:44:35.998693 MEM INFO 4. 0x76ffe980 0x000001e0
1929 11:44:36.005573 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1930 11:44:36.008761 MTRR: Physical address space:
1931 11:44:36.015595 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1932 11:44:36.021858 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1933 11:44:36.028441 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1934 11:44:36.035337 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1935 11:44:36.042023 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1936 11:44:36.045140 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1937 11:44:36.051718 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1938 11:44:36.058244 MTRR: Fixed MSR 0x250 0x0606060606060606
1939 11:44:36.061798 MTRR: Fixed MSR 0x258 0x0606060606060606
1940 11:44:36.065136 MTRR: Fixed MSR 0x259 0x0000000000000000
1941 11:44:36.068667 MTRR: Fixed MSR 0x268 0x0606060606060606
1942 11:44:36.071787 MTRR: Fixed MSR 0x269 0x0606060606060606
1943 11:44:36.078125 MTRR: Fixed MSR 0x26a 0x0606060606060606
1944 11:44:36.081841 MTRR: Fixed MSR 0x26b 0x0606060606060606
1945 11:44:36.084875 MTRR: Fixed MSR 0x26c 0x0606060606060606
1946 11:44:36.088450 MTRR: Fixed MSR 0x26d 0x0606060606060606
1947 11:44:36.094705 MTRR: Fixed MSR 0x26e 0x0606060606060606
1948 11:44:36.098328 MTRR: Fixed MSR 0x26f 0x0606060606060606
1949 11:44:36.101339 call enable_fixed_mtrr()
1950 11:44:36.105241 CPU physical address size: 39 bits
1951 11:44:36.108070 MTRR: default type WB/UC MTRR counts: 6/6.
1952 11:44:36.111695 MTRR: UC selected as default type.
1953 11:44:36.118187 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1954 11:44:36.125638 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1955 11:44:36.131179 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1956 11:44:36.137982 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1957 11:44:36.144610 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1958 11:44:36.151829 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1959 11:44:36.154818 MTRR: Fixed MSR 0x250 0x0606060606060606
1960 11:44:36.161099 MTRR: Fixed MSR 0x258 0x0606060606060606
1961 11:44:36.164688 MTRR: Fixed MSR 0x259 0x0000000000000000
1962 11:44:36.167960 MTRR: Fixed MSR 0x268 0x0606060606060606
1963 11:44:36.171106 MTRR: Fixed MSR 0x269 0x0606060606060606
1964 11:44:36.178057 MTRR: Fixed MSR 0x26a 0x0606060606060606
1965 11:44:36.181244 MTRR: Fixed MSR 0x26b 0x0606060606060606
1966 11:44:36.184159 MTRR: Fixed MSR 0x26c 0x0606060606060606
1967 11:44:36.187870 MTRR: Fixed MSR 0x26d 0x0606060606060606
1968 11:44:36.194532 MTRR: Fixed MSR 0x26e 0x0606060606060606
1969 11:44:36.197443 MTRR: Fixed MSR 0x26f 0x0606060606060606
1970 11:44:36.201394 MTRR: Fixed MSR 0x250 0x0606060606060606
1971 11:44:36.204277 call enable_fixed_mtrr()
1972 11:44:36.207969 MTRR: Fixed MSR 0x258 0x0606060606060606
1973 11:44:36.214026 MTRR: Fixed MSR 0x259 0x0000000000000000
1974 11:44:36.217852 MTRR: Fixed MSR 0x268 0x0606060606060606
1975 11:44:36.220678 MTRR: Fixed MSR 0x269 0x0606060606060606
1976 11:44:36.224547 MTRR: Fixed MSR 0x26a 0x0606060606060606
1977 11:44:36.230648 MTRR: Fixed MSR 0x26b 0x0606060606060606
1978 11:44:36.233892 MTRR: Fixed MSR 0x26c 0x0606060606060606
1979 11:44:36.237526 MTRR: Fixed MSR 0x26d 0x0606060606060606
1980 11:44:36.240922 MTRR: Fixed MSR 0x26e 0x0606060606060606
1981 11:44:36.244074 MTRR: Fixed MSR 0x26f 0x0606060606060606
1982 11:44:36.250705 CPU physical address size: 39 bits
1983 11:44:36.253931 call enable_fixed_mtrr()
1984 11:44:36.257415 MTRR: Fixed MSR 0x250 0x0606060606060606
1985 11:44:36.260661 MTRR: Fixed MSR 0x250 0x0606060606060606
1986 11:44:36.267553 MTRR: Fixed MSR 0x258 0x0606060606060606
1987 11:44:36.270302 MTRR: Fixed MSR 0x259 0x0000000000000000
1988 11:44:36.273994 MTRR: Fixed MSR 0x268 0x0606060606060606
1989 11:44:36.277501 MTRR: Fixed MSR 0x269 0x0606060606060606
1990 11:44:36.283730 MTRR: Fixed MSR 0x26a 0x0606060606060606
1991 11:44:36.287324 MTRR: Fixed MSR 0x26b 0x0606060606060606
1992 11:44:36.290571 MTRR: Fixed MSR 0x26c 0x0606060606060606
1993 11:44:36.293415 MTRR: Fixed MSR 0x26d 0x0606060606060606
1994 11:44:36.300058 MTRR: Fixed MSR 0x26e 0x0606060606060606
1995 11:44:36.303890 MTRR: Fixed MSR 0x26f 0x0606060606060606
1996 11:44:36.307027 CPU physical address size: 39 bits
1997 11:44:36.310194 call enable_fixed_mtrr()
1998 11:44:36.313212 MTRR: Fixed MSR 0x258 0x0606060606060606
1999 11:44:36.316751 CPU physical address size: 39 bits
2000 11:44:36.320499 MTRR: Fixed MSR 0x259 0x0000000000000000
2001 11:44:36.323339
2002 11:44:36.323457 MTRR check
2003 11:44:36.326454 MTRR: Fixed MSR 0x250 0x0606060606060606
2004 11:44:36.329830 Fixed MTRRs : Enabled
2005 11:44:36.333103 Variable MTRRs: Enabled
2006 11:44:36.333218
2007 11:44:36.336763 MTRR: Fixed MSR 0x258 0x0606060606060606
2008 11:44:36.340131 MTRR: Fixed MSR 0x259 0x0000000000000000
2009 11:44:36.343562 MTRR: Fixed MSR 0x268 0x0606060606060606
2010 11:44:36.350332 MTRR: Fixed MSR 0x269 0x0606060606060606
2011 11:44:36.353454 MTRR: Fixed MSR 0x26a 0x0606060606060606
2012 11:44:36.356639 MTRR: Fixed MSR 0x26b 0x0606060606060606
2013 11:44:36.359436 MTRR: Fixed MSR 0x26c 0x0606060606060606
2014 11:44:36.366256 MTRR: Fixed MSR 0x26d 0x0606060606060606
2015 11:44:36.369754 MTRR: Fixed MSR 0x26e 0x0606060606060606
2016 11:44:36.373448 MTRR: Fixed MSR 0x26f 0x0606060606060606
2017 11:44:36.379467 BS: BS_WRITE_TABLES exit times (exec / console): 176 / 150 ms
2018 11:44:36.382763 call enable_fixed_mtrr()
2019 11:44:36.389760 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2020 11:44:36.392620 CPU physical address size: 39 bits
2021 11:44:36.400161 Checking segment from ROM address 0xffc02b38
2022 11:44:36.403957 MTRR: Fixed MSR 0x268 0x0606060606060606
2023 11:44:36.406863 MTRR: Fixed MSR 0x250 0x0606060606060606
2024 11:44:36.413405 MTRR: Fixed MSR 0x250 0x0606060606060606
2025 11:44:36.416883 MTRR: Fixed MSR 0x258 0x0606060606060606
2026 11:44:36.419913 MTRR: Fixed MSR 0x259 0x0000000000000000
2027 11:44:36.423516 MTRR: Fixed MSR 0x268 0x0606060606060606
2028 11:44:36.426603 MTRR: Fixed MSR 0x269 0x0606060606060606
2029 11:44:36.433260 MTRR: Fixed MSR 0x26a 0x0606060606060606
2030 11:44:36.436628 MTRR: Fixed MSR 0x26b 0x0606060606060606
2031 11:44:36.439748 MTRR: Fixed MSR 0x26c 0x0606060606060606
2032 11:44:36.443678 MTRR: Fixed MSR 0x26d 0x0606060606060606
2033 11:44:36.449751 MTRR: Fixed MSR 0x26e 0x0606060606060606
2034 11:44:36.452926 MTRR: Fixed MSR 0x26f 0x0606060606060606
2035 11:44:36.456306 MTRR: Fixed MSR 0x258 0x0606060606060606
2036 11:44:36.459618 call enable_fixed_mtrr()
2037 11:44:36.463392 MTRR: Fixed MSR 0x259 0x0000000000000000
2038 11:44:36.469526 MTRR: Fixed MSR 0x268 0x0606060606060606
2039 11:44:36.472879 MTRR: Fixed MSR 0x269 0x0606060606060606
2040 11:44:36.476257 MTRR: Fixed MSR 0x26a 0x0606060606060606
2041 11:44:36.479666 MTRR: Fixed MSR 0x26b 0x0606060606060606
2042 11:44:36.486214 MTRR: Fixed MSR 0x26c 0x0606060606060606
2043 11:44:36.489354 MTRR: Fixed MSR 0x26d 0x0606060606060606
2044 11:44:36.493207 MTRR: Fixed MSR 0x26e 0x0606060606060606
2045 11:44:36.496243 MTRR: Fixed MSR 0x26f 0x0606060606060606
2046 11:44:36.500511 CPU physical address size: 39 bits
2047 11:44:36.507108 call enable_fixed_mtrr()
2048 11:44:36.510278 Checking segment from ROM address 0xffc02b54
2049 11:44:36.513410 MTRR: Fixed MSR 0x269 0x0606060606060606
2050 11:44:36.520154 Loading segment from ROM address 0xffc02b38
2051 11:44:36.523410 CPU physical address size: 39 bits
2052 11:44:36.523513 code (compression=0)
2053 11:44:36.530224 MTRR: Fixed MSR 0x26a 0x0606060606060606
2054 11:44:36.536536 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2055 11:44:36.540037 MTRR: Fixed MSR 0x26b 0x0606060606060606
2056 11:44:36.546538 MTRR: Fixed MSR 0x26c 0x0606060606060606
2057 11:44:36.550223 MTRR: Fixed MSR 0x26d 0x0606060606060606
2058 11:44:36.553295 MTRR: Fixed MSR 0x26e 0x0606060606060606
2059 11:44:36.556713 MTRR: Fixed MSR 0x26f 0x0606060606060606
2060 11:44:36.566351 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2061 11:44:36.569995 call enable_fixed_mtrr()
2062 11:44:36.570138 it's not compressed!
2063 11:44:36.573366 CPU physical address size: 39 bits
2064 11:44:36.709454 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2065 11:44:36.716443 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2066 11:44:36.722762 Loading segment from ROM address 0xffc02b54
2067 11:44:36.722853 Entry Point 0x30000000
2068 11:44:36.726032 Loaded segments
2069 11:44:36.732610 BS: BS_PAYLOAD_LOAD run times (exec / console): 282 / 64 ms
2070 11:44:36.775492 Finalizing chipset.
2071 11:44:36.779245 Finalizing SMM.
2072 11:44:36.779345 APMC done.
2073 11:44:36.785730 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2074 11:44:36.788425 mp_park_aps done after 0 msecs.
2075 11:44:36.791742 Jumping to boot code at 0x30000000(0x76b25000)
2076 11:44:36.801667 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2077 11:44:36.801799
2078 11:44:36.805236
2079 11:44:36.805321
2080 11:44:36.808162 Starting depthcharge on Voema...
2081 11:44:36.808245
2082 11:44:36.808578 end: 2.2.3 depthcharge-start (duration 00:00:04) [common]
2083 11:44:36.808681 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
2084 11:44:36.808765 Setting prompt string to ['volteer:']
2085 11:44:36.808847 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:47)
2086 11:44:36.814765 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2087 11:44:36.814875
2088 11:44:36.821457 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2089 11:44:36.821548
2090 11:44:36.828006 Looking for NVMe Controller 0x3005f238 @ 00:1d:00
2091 11:44:36.828095
2092 11:44:36.831149 Failed to find eMMC card reader
2093 11:44:36.831232
2094 11:44:36.834772 Wipe memory regions:
2095 11:44:36.834855
2096 11:44:36.838331 [0x00000000001000, 0x000000000a0000)
2097 11:44:36.838413
2098 11:44:36.840970 [0x00000000100000, 0x00000030000000)
2099 11:44:36.866944
2100 11:44:36.870714 [0x00000032662db0, 0x000000769ef000)
2101 11:44:36.906140
2102 11:44:36.909242 [0x00000100000000, 0x00000280400000)
2103 11:44:37.108705
2104 11:44:37.112111 ec_init: CrosEC protocol v3 supported (256, 256)
2105 11:44:37.543965
2106 11:44:37.544140 R8152: Initializing
2107 11:44:37.544240
2108 11:44:37.547099 Version 6 (ocp_data = 5c30)
2109 11:44:37.547196
2110 11:44:37.550989 R8152: Done initializing
2111 11:44:37.551085
2112 11:44:37.554014 Adding net device
2113 11:44:37.856301
2114 11:44:37.859250 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2115 11:44:37.859339
2116 11:44:37.859402
2117 11:44:37.859462
2118 11:44:37.862817 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2120 11:44:37.963219 volteer: tftpboot 192.168.201.1 13627310/tftp-deploy-f9b58v3h/kernel/bzImage 13627310/tftp-deploy-f9b58v3h/kernel/cmdline 13627310/tftp-deploy-f9b58v3h/ramdisk/ramdisk.cpio.gz
2121 11:44:37.963398 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2122 11:44:37.963482 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:46)
2123 11:44:37.967724 tftpboot 192.168.201.1 13627310/tftp-deploy-f9b58v3h/kernel/bzImploy-f9b58v3h/kernel/cmdline 13627310/tftp-deploy-f9b58v3h/ramdisk/ramdisk.cpio.gz
2124 11:44:37.967812
2125 11:44:37.967877 Waiting for link
2126 11:44:38.170957
2127 11:44:38.171140 done.
2128 11:44:38.171213
2129 11:44:38.171319 MAC: 00:24:32:30:77:76
2130 11:44:38.171399
2131 11:44:38.173924 Sending DHCP discover... done.
2132 11:44:38.174062
2133 11:44:38.177358 Waiting for reply... done.
2134 11:44:38.177493
2135 11:44:38.181715 Sending DHCP request... done.
2136 11:44:38.181814
2137 11:44:38.191111 Waiting for reply... done.
2138 11:44:38.191244
2139 11:44:38.191309 My ip is 192.168.201.16
2140 11:44:38.191369
2141 11:44:38.194292 The DHCP server ip is 192.168.201.1
2142 11:44:38.197691
2143 11:44:38.201470 TFTP server IP predefined by user: 192.168.201.1
2144 11:44:38.201589
2145 11:44:38.208311 Bootfile predefined by user: 13627310/tftp-deploy-f9b58v3h/kernel/bzImage
2146 11:44:38.208467
2147 11:44:38.211274 Sending tftp read request... done.
2148 11:44:38.211376
2149 11:44:38.214532 Waiting for the transfer...
2150 11:44:38.214634
2151 11:44:38.781689 00000000 ################################################################
2152 11:44:38.781842
2153 11:44:39.352307 00080000 ################################################################
2154 11:44:39.352492
2155 11:44:39.937993 00100000 ################################################################
2156 11:44:39.938139
2157 11:44:40.533699 00180000 ################################################################
2158 11:44:40.533883
2159 11:44:41.117025 00200000 ################################################################
2160 11:44:41.117194
2161 11:44:41.690008 00280000 ################################################################
2162 11:44:41.690152
2163 11:44:42.267765 00300000 ################################################################
2164 11:44:42.267951
2165 11:44:42.862914 00380000 ################################################################
2166 11:44:42.863062
2167 11:44:43.548118 00400000 ################################################################
2168 11:44:43.548537
2169 11:44:44.245746 00480000 ################################################################
2170 11:44:44.246252
2171 11:44:44.929784 00500000 ################################################################
2172 11:44:44.930343
2173 11:44:45.632478 00580000 ################################################################
2174 11:44:45.632991
2175 11:44:46.329048 00600000 ################################################################
2176 11:44:46.329564
2177 11:44:46.976965 00680000 ################################################################
2178 11:44:46.977101
2179 11:44:47.631258 00700000 ################################################################
2180 11:44:47.631747
2181 11:44:48.322515 00780000 ################################################################
2182 11:44:48.323252
2183 11:44:48.998055 00800000 ################################################################
2184 11:44:48.998190
2185 11:44:49.656015 00880000 ################################################################
2186 11:44:49.656799
2187 11:44:50.358151 00900000 ################################################################
2188 11:44:50.358676
2189 11:44:51.057100 00980000 ################################################################
2190 11:44:51.057600
2191 11:44:51.724669 00a00000 ################################################################
2192 11:44:51.725358
2193 11:44:52.431705 00a80000 ################################################################
2194 11:44:52.432245
2195 11:44:53.007176 00b00000 ################################################################
2196 11:44:53.007305
2197 11:44:53.527871 00b80000 ################################################################
2198 11:44:53.528002
2199 11:44:54.046300 00c00000 ################################################################
2200 11:44:54.046443
2201 11:44:54.565338 00c80000 ################################################################
2202 11:44:54.565495
2203 11:44:55.019713 00d00000 ######################################################## done.
2204 11:44:55.019848
2205 11:44:55.023075 The bootfile was 14090128 bytes long.
2206 11:44:55.023159
2207 11:44:55.026378 Sending tftp read request... done.
2208 11:44:55.026461
2209 11:44:55.029865 Waiting for the transfer...
2210 11:44:55.029948
2211 11:44:55.555177 00000000 ################################################################
2212 11:44:55.555349
2213 11:44:56.076735 00080000 ################################################################
2214 11:44:56.076902
2215 11:44:56.597139 00100000 ################################################################
2216 11:44:56.597302
2217 11:44:57.116075 00180000 ################################################################
2218 11:44:57.116213
2219 11:44:57.637700 00200000 ################################################################
2220 11:44:57.637881
2221 11:44:58.168204 00280000 ################################################################
2222 11:44:58.168396
2223 11:44:58.688188 00300000 ################################################################
2224 11:44:58.688394
2225 11:44:59.207895 00380000 ################################################################
2226 11:44:59.208035
2227 11:44:59.722760 00400000 ################################################################
2228 11:44:59.722906
2229 11:45:00.252044 00480000 ################################################################
2230 11:45:00.252194
2231 11:45:00.769233 00500000 ################################################################
2232 11:45:00.769376
2233 11:45:01.283055 00580000 ################################################################
2234 11:45:01.283190
2235 11:45:01.802223 00600000 ################################################################
2236 11:45:01.802375
2237 11:45:02.318416 00680000 ################################################################
2238 11:45:02.318550
2239 11:45:02.858204 00700000 ################################################################
2240 11:45:02.858376
2241 11:45:03.546924 00780000 ################################################################
2242 11:45:03.547195
2243 11:45:04.181589 00800000 ################################################################
2244 11:45:04.182362
2245 11:45:04.855910 00880000 ################################################################
2246 11:45:04.856442
2247 11:45:05.552833 00900000 ################################################################
2248 11:45:05.553343
2249 11:45:06.254201 00980000 ################################################################
2250 11:45:06.254804
2251 11:45:06.963757 00a00000 ################################################################
2252 11:45:06.964304
2253 11:45:07.651539 00a80000 ################################################################
2254 11:45:07.652085
2255 11:45:08.345044 00b00000 ################################################################
2256 11:45:08.345567
2257 11:45:09.022641 00b80000 ################################################################
2258 11:45:09.023140
2259 11:45:09.688909 00c00000 ################################################################
2260 11:45:09.689399
2261 11:45:10.367570 00c80000 ################################################################
2262 11:45:10.368146
2263 11:45:11.089166 00d00000 ################################################################
2264 11:45:11.089786
2265 11:45:11.789163 00d80000 ################################################################
2266 11:45:11.789897
2267 11:45:12.494943 00e00000 ################################################################
2268 11:45:12.495523
2269 11:45:13.188993 00e80000 ################################################################
2270 11:45:13.189680
2271 11:45:13.883875 00f00000 ################################################################
2272 11:45:13.884522
2273 11:45:14.602259 00f80000 ################################################################
2274 11:45:14.602858
2275 11:45:15.255252 01000000 ################################################################
2276 11:45:15.255778
2277 11:45:15.954017 01080000 ################################################################
2278 11:45:15.954663
2279 11:45:16.669353 01100000 ################################################################
2280 11:45:16.669877
2281 11:45:17.358538 01180000 ################################################################
2282 11:45:17.359105
2283 11:45:18.053651 01200000 ################################################################
2284 11:45:18.054211
2285 11:45:18.747184 01280000 ################################################################
2286 11:45:18.747777
2287 11:45:19.451508 01300000 ################################################################
2288 11:45:19.452216
2289 11:45:20.154860 01380000 ################################################################
2290 11:45:20.155442
2291 11:45:20.864723 01400000 ################################################################
2292 11:45:20.865278
2293 11:45:21.574726 01480000 ################################################################
2294 11:45:21.575246
2295 11:45:22.280044 01500000 ################################################################
2296 11:45:22.280662
2297 11:45:22.984466 01580000 ################################################################
2298 11:45:22.985031
2299 11:45:23.675091 01600000 ################################################################
2300 11:45:23.675307
2301 11:45:24.377019 01680000 ################################################################
2302 11:45:24.377617
2303 11:45:25.091923 01700000 ################################################################
2304 11:45:25.092491
2305 11:45:25.775411 01780000 ################################################################
2306 11:45:25.775972
2307 11:45:26.455672 01800000 ################################################################
2308 11:45:26.456191
2309 11:45:27.162216 01880000 ################################################################
2310 11:45:27.162799
2311 11:45:27.855382 01900000 ################################################################
2312 11:45:27.855949
2313 11:45:28.554008 01980000 ################################################################
2314 11:45:28.554575
2315 11:45:29.256608 01a00000 ################################################################
2316 11:45:29.257180
2317 11:45:29.944688 01a80000 ################################################################
2318 11:45:29.945204
2319 11:45:30.658546 01b00000 ################################################################
2320 11:45:30.659114
2321 11:45:31.376924 01b80000 ################################################################
2322 11:45:31.377468
2323 11:45:32.105909 01c00000 ################################################################
2324 11:45:32.106449
2325 11:45:32.818606 01c80000 ################################################################
2326 11:45:32.819240
2327 11:45:33.528817 01d00000 ################################################################
2328 11:45:33.529378
2329 11:45:34.226008 01d80000 ################################################################
2330 11:45:34.226244
2331 11:45:34.915118 01e00000 ################################################################
2332 11:45:34.915681
2333 11:45:35.609882 01e80000 ################################################################
2334 11:45:35.610445
2335 11:45:36.302121 01f00000 ################################################################
2336 11:45:36.302683
2337 11:45:36.969580 01f80000 ################################################################
2338 11:45:36.970092
2339 11:45:37.653844 02000000 ################################################################
2340 11:45:37.654364
2341 11:45:38.334926 02080000 ################################################################
2342 11:45:38.335523
2343 11:45:39.022022 02100000 ################################################################
2344 11:45:39.022573
2345 11:45:39.728215 02180000 ################################################################
2346 11:45:39.728886
2347 11:45:40.432508 02200000 ################################################################
2348 11:45:40.432659
2349 11:45:41.135856 02280000 ################################################################
2350 11:45:41.136451
2351 11:45:41.834097 02300000 ################################################################
2352 11:45:41.834607
2353 11:45:42.519213 02380000 ################################################################
2354 11:45:42.519716
2355 11:45:43.238271 02400000 ################################################################
2356 11:45:43.239080
2357 11:45:43.938528 02480000 ################################################################
2358 11:45:43.939044
2359 11:45:44.641981 02500000 ################################################################
2360 11:45:44.642540
2361 11:45:45.354527 02580000 ################################################################
2362 11:45:45.355054
2363 11:45:46.054236 02600000 ################################################################
2364 11:45:46.054814
2365 11:45:46.759481 02680000 ################################################################
2366 11:45:46.760053
2367 11:45:46.868646 02700000 ########## done.
2368 11:45:46.869223
2369 11:45:46.871699 Sending tftp read request... done.
2370 11:45:46.872155
2371 11:45:46.875079 Waiting for the transfer...
2372 11:45:46.875533
2373 11:45:46.875895 00000000 # done.
2374 11:45:46.876241
2375 11:45:46.885038 Command line loaded dynamically from TFTP file: 13627310/tftp-deploy-f9b58v3h/kernel/cmdline
2376 11:45:46.885499
2377 11:45:46.901115 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2378 11:45:46.909520
2379 11:45:46.912552 Shutting down all USB controllers.
2380 11:45:46.913195
2381 11:45:46.913721 Removing current net device
2382 11:45:46.914222
2383 11:45:46.916976 Finalizing coreboot
2384 11:45:46.917350
2385 11:45:46.922408 Exiting depthcharge with code 4 at timestamp: 78803699
2386 11:45:46.922963
2387 11:45:46.923328
2388 11:45:46.923665 Starting kernel ...
2389 11:45:46.923990
2390 11:45:46.924304
2391 11:45:46.926386 end: 2.2.4 bootloader-commands (duration 00:01:10) [common]
2392 11:45:46.926903 start: 2.2.5 auto-login-action (timeout 00:03:37) [common]
2393 11:45:46.927299 Setting prompt string to ['Linux version [0-9]']
2394 11:45:46.927675 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2395 11:45:46.928048 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2397 11:49:23.927150 end: 2.2.5 auto-login-action (duration 00:03:37) [common]
2399 11:49:23.927358 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 217 seconds'
2401 11:49:23.927511 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2404 11:49:23.927760 end: 2 depthcharge-action (duration 00:05:00) [common]
2406 11:49:23.927980 Cleaning after the job
2407 11:49:23.928065 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13627310/tftp-deploy-f9b58v3h/ramdisk
2408 11:49:23.932500 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13627310/tftp-deploy-f9b58v3h/kernel
2409 11:49:23.934023 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13627310/tftp-deploy-f9b58v3h/modules
2410 11:49:23.934408 start: 4.1 power-off (timeout 00:00:30) [common]
2411 11:49:23.934575 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cp514-2h-1130g7-volteer-cbg-6' '--port=1' '--command=off'
2412 11:49:24.731568 >> Command sent successfully.
2413 11:49:24.733975 Returned 0 in 0 seconds
2414 11:49:24.834383 end: 4.1 power-off (duration 00:00:01) [common]
2416 11:49:24.834724 start: 4.2 read-feedback (timeout 00:09:59) [common]
2417 11:49:24.834995 Listened to connection for namespace 'common' for up to 1s
2419 11:49:24.835374 Listened to connection for namespace 'common' for up to 1s
2420 11:49:25.836252 Finalising connection for namespace 'common'
2421 11:49:25.836918 Disconnecting from shell: Finalise
2422 11:49:25.837399
2423 11:49:25.938173 end: 4.2 read-feedback (duration 00:00:01) [common]
2424 11:49:25.938360 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13627310
2425 11:49:26.001234 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13627310
2426 11:49:26.001436 JobError: Your job cannot terminate cleanly.