Boot log: acer-cp514-2h-1130g7-volteer
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 11:45:34.889497 lava-dispatcher, installed at version: 2024.01
2 11:45:34.889696 start: 0 validate
3 11:45:34.889824 Start time: 2024-05-03 11:45:34.889815+00:00 (UTC)
4 11:45:34.889941 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:45:34.890065 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-ltp%2F20240313.0%2Famd64%2Finitrd.cpio.gz exists
6 11:45:35.264779 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:45:35.264953 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2481-gef9c8224c1829%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:45:35.521267 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:45:35.521454 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-ltp%2F20240313.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 11:45:42.836344 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:45:42.836511 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2481-gef9c8224c1829%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 11:45:43.094522 validate duration: 8.20
14 11:45:43.094785 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 11:45:43.094889 start: 1.1 download-retry (timeout 00:10:00) [common]
16 11:45:43.094981 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 11:45:43.095100 Not decompressing ramdisk as can be used compressed.
18 11:45:43.095183 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-ltp/20240313.0/amd64/initrd.cpio.gz
19 11:45:43.095249 saving as /var/lib/lava/dispatcher/tmp/13627337/tftp-deploy-d15li98a/ramdisk/initrd.cpio.gz
20 11:45:43.095311 total size: 6464291 (6 MB)
21 11:45:43.735489 progress 0 % (0 MB)
22 11:45:43.737321 progress 5 % (0 MB)
23 11:45:43.739067 progress 10 % (0 MB)
24 11:45:43.740861 progress 15 % (0 MB)
25 11:45:43.742601 progress 20 % (1 MB)
26 11:45:43.744300 progress 25 % (1 MB)
27 11:45:43.746012 progress 30 % (1 MB)
28 11:45:43.747835 progress 35 % (2 MB)
29 11:45:43.749458 progress 40 % (2 MB)
30 11:45:43.751280 progress 45 % (2 MB)
31 11:45:43.752969 progress 50 % (3 MB)
32 11:45:43.754717 progress 55 % (3 MB)
33 11:45:43.756385 progress 60 % (3 MB)
34 11:45:43.758097 progress 65 % (4 MB)
35 11:45:43.759761 progress 70 % (4 MB)
36 11:45:43.761274 progress 75 % (4 MB)
37 11:45:43.762974 progress 80 % (4 MB)
38 11:45:43.764637 progress 85 % (5 MB)
39 11:45:43.766340 progress 90 % (5 MB)
40 11:45:43.768127 progress 95 % (5 MB)
41 11:45:43.769848 progress 100 % (6 MB)
42 11:45:43.769986 6 MB downloaded in 0.67 s (9.14 MB/s)
43 11:45:43.770141 end: 1.1.1 http-download (duration 00:00:01) [common]
45 11:45:43.770377 end: 1.1 download-retry (duration 00:00:01) [common]
46 11:45:43.770462 start: 1.2 download-retry (timeout 00:09:59) [common]
47 11:45:43.770544 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 11:45:43.770674 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2481-gef9c8224c1829/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 11:45:43.770745 saving as /var/lib/lava/dispatcher/tmp/13627337/tftp-deploy-d15li98a/kernel/bzImage
50 11:45:43.770805 total size: 14090128 (13 MB)
51 11:45:43.770865 No compression specified
52 11:45:43.771949 progress 0 % (0 MB)
53 11:45:43.775523 progress 5 % (0 MB)
54 11:45:43.779030 progress 10 % (1 MB)
55 11:45:43.782911 progress 15 % (2 MB)
56 11:45:43.786528 progress 20 % (2 MB)
57 11:45:43.790309 progress 25 % (3 MB)
58 11:45:43.793843 progress 30 % (4 MB)
59 11:45:43.797524 progress 35 % (4 MB)
60 11:45:43.800986 progress 40 % (5 MB)
61 11:45:43.804649 progress 45 % (6 MB)
62 11:45:43.808155 progress 50 % (6 MB)
63 11:45:43.811878 progress 55 % (7 MB)
64 11:45:43.815416 progress 60 % (8 MB)
65 11:45:43.819050 progress 65 % (8 MB)
66 11:45:43.822586 progress 70 % (9 MB)
67 11:45:43.826232 progress 75 % (10 MB)
68 11:45:43.829852 progress 80 % (10 MB)
69 11:45:43.833615 progress 85 % (11 MB)
70 11:45:43.837048 progress 90 % (12 MB)
71 11:45:43.840712 progress 95 % (12 MB)
72 11:45:43.844183 progress 100 % (13 MB)
73 11:45:43.844421 13 MB downloaded in 0.07 s (182.54 MB/s)
74 11:45:43.844567 end: 1.2.1 http-download (duration 00:00:00) [common]
76 11:45:43.844798 end: 1.2 download-retry (duration 00:00:00) [common]
77 11:45:43.844885 start: 1.3 download-retry (timeout 00:09:59) [common]
78 11:45:43.844970 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 11:45:43.845105 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-ltp/20240313.0/amd64/full.rootfs.tar.xz
80 11:45:43.845172 saving as /var/lib/lava/dispatcher/tmp/13627337/tftp-deploy-d15li98a/nfsrootfs/full.rootfs.tar
81 11:45:43.845231 total size: 100036868 (95 MB)
82 11:45:43.845291 Using unxz to decompress xz
83 11:45:43.848849 progress 0 % (0 MB)
84 11:45:44.232190 progress 5 % (4 MB)
85 11:45:44.631717 progress 10 % (9 MB)
86 11:45:45.050687 progress 15 % (14 MB)
87 11:45:45.473979 progress 20 % (19 MB)
88 11:45:45.897899 progress 25 % (23 MB)
89 11:45:46.200920 progress 30 % (28 MB)
90 11:45:46.485335 progress 35 % (33 MB)
91 11:45:46.773890 progress 40 % (38 MB)
92 11:45:47.019848 progress 45 % (42 MB)
93 11:45:47.307088 progress 50 % (47 MB)
94 11:45:47.485145 progress 55 % (52 MB)
95 11:45:47.668770 progress 60 % (57 MB)
96 11:45:47.959980 progress 65 % (62 MB)
97 11:45:48.255507 progress 70 % (66 MB)
98 11:45:48.536338 progress 75 % (71 MB)
99 11:45:48.820514 progress 80 % (76 MB)
100 11:45:49.110809 progress 85 % (81 MB)
101 11:45:49.367295 progress 90 % (85 MB)
102 11:45:49.653793 progress 95 % (90 MB)
103 11:45:49.948942 progress 100 % (95 MB)
104 11:45:49.955412 95 MB downloaded in 6.11 s (15.61 MB/s)
105 11:45:49.955703 end: 1.3.1 http-download (duration 00:00:06) [common]
107 11:45:49.956122 end: 1.3 download-retry (duration 00:00:06) [common]
108 11:45:49.956244 start: 1.4 download-retry (timeout 00:09:53) [common]
109 11:45:49.956370 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 11:45:49.956551 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2481-gef9c8224c1829/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 11:45:49.956660 saving as /var/lib/lava/dispatcher/tmp/13627337/tftp-deploy-d15li98a/modules/modules.tar
112 11:45:49.956750 total size: 484648 (0 MB)
113 11:45:49.956853 Using unxz to decompress xz
114 11:45:49.960924 progress 6 % (0 MB)
115 11:45:49.961409 progress 13 % (0 MB)
116 11:45:49.961666 progress 20 % (0 MB)
117 11:45:49.963069 progress 27 % (0 MB)
118 11:45:49.964887 progress 33 % (0 MB)
119 11:45:49.966975 progress 40 % (0 MB)
120 11:45:49.968820 progress 47 % (0 MB)
121 11:45:49.970615 progress 54 % (0 MB)
122 11:45:49.972555 progress 60 % (0 MB)
123 11:45:49.974196 progress 67 % (0 MB)
124 11:45:49.975986 progress 74 % (0 MB)
125 11:45:49.978003 progress 81 % (0 MB)
126 11:45:49.979697 progress 87 % (0 MB)
127 11:45:49.981723 progress 94 % (0 MB)
128 11:45:49.983445 progress 100 % (0 MB)
129 11:45:49.989602 0 MB downloaded in 0.03 s (14.07 MB/s)
130 11:45:49.989870 end: 1.4.1 http-download (duration 00:00:00) [common]
132 11:45:49.990148 end: 1.4 download-retry (duration 00:00:00) [common]
133 11:45:49.990243 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
134 11:45:49.990343 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
135 11:45:52.872561 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/13627337/extract-nfsrootfs-i64vru7h
136 11:45:52.872803 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
137 11:45:52.872942 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
138 11:45:52.873110 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13627337/lava-overlay-75ao8c95
139 11:45:52.873251 makedir: /var/lib/lava/dispatcher/tmp/13627337/lava-overlay-75ao8c95/lava-13627337/bin
140 11:45:52.873403 makedir: /var/lib/lava/dispatcher/tmp/13627337/lava-overlay-75ao8c95/lava-13627337/tests
141 11:45:52.873551 makedir: /var/lib/lava/dispatcher/tmp/13627337/lava-overlay-75ao8c95/lava-13627337/results
142 11:45:52.873706 Creating /var/lib/lava/dispatcher/tmp/13627337/lava-overlay-75ao8c95/lava-13627337/bin/lava-add-keys
143 11:45:52.873880 Creating /var/lib/lava/dispatcher/tmp/13627337/lava-overlay-75ao8c95/lava-13627337/bin/lava-add-sources
144 11:45:52.874043 Creating /var/lib/lava/dispatcher/tmp/13627337/lava-overlay-75ao8c95/lava-13627337/bin/lava-background-process-start
145 11:45:52.874171 Creating /var/lib/lava/dispatcher/tmp/13627337/lava-overlay-75ao8c95/lava-13627337/bin/lava-background-process-stop
146 11:45:52.874292 Creating /var/lib/lava/dispatcher/tmp/13627337/lava-overlay-75ao8c95/lava-13627337/bin/lava-common-functions
147 11:45:52.874426 Creating /var/lib/lava/dispatcher/tmp/13627337/lava-overlay-75ao8c95/lava-13627337/bin/lava-echo-ipv4
148 11:45:52.874592 Creating /var/lib/lava/dispatcher/tmp/13627337/lava-overlay-75ao8c95/lava-13627337/bin/lava-install-packages
149 11:45:52.874710 Creating /var/lib/lava/dispatcher/tmp/13627337/lava-overlay-75ao8c95/lava-13627337/bin/lava-installed-packages
150 11:45:52.874827 Creating /var/lib/lava/dispatcher/tmp/13627337/lava-overlay-75ao8c95/lava-13627337/bin/lava-os-build
151 11:45:52.874943 Creating /var/lib/lava/dispatcher/tmp/13627337/lava-overlay-75ao8c95/lava-13627337/bin/lava-probe-channel
152 11:45:52.875061 Creating /var/lib/lava/dispatcher/tmp/13627337/lava-overlay-75ao8c95/lava-13627337/bin/lava-probe-ip
153 11:45:52.875179 Creating /var/lib/lava/dispatcher/tmp/13627337/lava-overlay-75ao8c95/lava-13627337/bin/lava-target-ip
154 11:45:52.875295 Creating /var/lib/lava/dispatcher/tmp/13627337/lava-overlay-75ao8c95/lava-13627337/bin/lava-target-mac
155 11:45:52.875411 Creating /var/lib/lava/dispatcher/tmp/13627337/lava-overlay-75ao8c95/lava-13627337/bin/lava-target-storage
156 11:45:52.875530 Creating /var/lib/lava/dispatcher/tmp/13627337/lava-overlay-75ao8c95/lava-13627337/bin/lava-test-case
157 11:45:52.875648 Creating /var/lib/lava/dispatcher/tmp/13627337/lava-overlay-75ao8c95/lava-13627337/bin/lava-test-event
158 11:45:52.875764 Creating /var/lib/lava/dispatcher/tmp/13627337/lava-overlay-75ao8c95/lava-13627337/bin/lava-test-feedback
159 11:45:52.875881 Creating /var/lib/lava/dispatcher/tmp/13627337/lava-overlay-75ao8c95/lava-13627337/bin/lava-test-raise
160 11:45:52.875997 Creating /var/lib/lava/dispatcher/tmp/13627337/lava-overlay-75ao8c95/lava-13627337/bin/lava-test-reference
161 11:45:52.876117 Creating /var/lib/lava/dispatcher/tmp/13627337/lava-overlay-75ao8c95/lava-13627337/bin/lava-test-runner
162 11:45:52.876234 Creating /var/lib/lava/dispatcher/tmp/13627337/lava-overlay-75ao8c95/lava-13627337/bin/lava-test-set
163 11:45:52.876349 Creating /var/lib/lava/dispatcher/tmp/13627337/lava-overlay-75ao8c95/lava-13627337/bin/lava-test-shell
164 11:45:52.876509 Updating /var/lib/lava/dispatcher/tmp/13627337/lava-overlay-75ao8c95/lava-13627337/bin/lava-install-packages (oe)
165 11:45:52.876731 Updating /var/lib/lava/dispatcher/tmp/13627337/lava-overlay-75ao8c95/lava-13627337/bin/lava-installed-packages (oe)
166 11:45:52.876875 Creating /var/lib/lava/dispatcher/tmp/13627337/lava-overlay-75ao8c95/lava-13627337/environment
167 11:45:52.876972 LAVA metadata
168 11:45:52.877040 - LAVA_JOB_ID=13627337
169 11:45:52.877101 - LAVA_DISPATCHER_IP=192.168.201.1
170 11:45:52.877201 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
171 11:45:52.877267 skipped lava-vland-overlay
172 11:45:52.877389 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 11:45:52.877482 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
174 11:45:52.877567 skipped lava-multinode-overlay
175 11:45:52.877651 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 11:45:52.877727 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
177 11:45:52.877812 Loading test definitions
178 11:45:52.877912 start: 1.5.2.3.1 git-repo-action (timeout 00:09:50) [common]
179 11:45:52.877982 Using /lava-13627337 at stage 0
180 11:45:52.878072 Fetching tests from https://github.com/kernelci/test-definitions
181 11:45:52.878154 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/13627337/lava-overlay-75ao8c95/lava-13627337/0/tests/0_ltp-ipc'
182 11:45:54.877729 Running '/usr/bin/git checkout kernelci.org
183 11:45:55.025876 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/13627337/lava-overlay-75ao8c95/lava-13627337/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
184 11:45:55.026911 uuid=13627337_1.5.2.3.1 testdef=None
185 11:45:55.027110 end: 1.5.2.3.1 git-repo-action (duration 00:00:02) [common]
187 11:45:55.027652 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
188 11:45:55.029223 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
190 11:45:55.029624 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
191 11:45:55.031387 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
193 11:45:55.031926 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
194 11:45:55.033846 runner path: /var/lib/lava/dispatcher/tmp/13627337/lava-overlay-75ao8c95/lava-13627337/0/tests/0_ltp-ipc test_uuid 13627337_1.5.2.3.1
195 11:45:55.033972 SKIPFILE='skipfile-lkft.yaml'
196 11:45:55.034070 SKIP_INSTALL='true'
197 11:45:55.034161 TST_CMDFILES='ipc'
198 11:45:55.034351 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
200 11:45:55.034711 Creating lava-test-runner.conf files
201 11:45:55.034809 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13627337/lava-overlay-75ao8c95/lava-13627337/0 for stage 0
202 11:45:55.034932 - 0_ltp-ipc
203 11:45:55.035076 end: 1.5.2.3 test-definition (duration 00:00:02) [common]
204 11:45:55.035197 start: 1.5.2.4 compress-overlay (timeout 00:09:48) [common]
205 11:46:02.684836 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
206 11:46:02.685002 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:40) [common]
207 11:46:02.685097 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
208 11:46:02.685200 end: 1.5.2 lava-overlay (duration 00:00:10) [common]
209 11:46:02.685293 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:40) [common]
210 11:46:02.848329 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
211 11:46:02.848697 start: 1.5.4 extract-modules (timeout 00:09:40) [common]
212 11:46:02.848812 extracting modules file /var/lib/lava/dispatcher/tmp/13627337/tftp-deploy-d15li98a/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13627337/extract-nfsrootfs-i64vru7h
213 11:46:02.863285 extracting modules file /var/lib/lava/dispatcher/tmp/13627337/tftp-deploy-d15li98a/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13627337/extract-overlay-ramdisk-kj4ii86d/ramdisk
214 11:46:02.877729 end: 1.5.4 extract-modules (duration 00:00:00) [common]
215 11:46:02.877882 start: 1.5.5 apply-overlay-tftp (timeout 00:09:40) [common]
216 11:46:02.877981 [common] Applying overlay to NFS
217 11:46:02.878056 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13627337/compress-overlay-_1usl5ii/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13627337/extract-nfsrootfs-i64vru7h
218 11:46:03.844430 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
219 11:46:03.844651 start: 1.5.6 configure-preseed-file (timeout 00:09:39) [common]
220 11:46:03.844796 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
221 11:46:03.844925 start: 1.5.7 compress-ramdisk (timeout 00:09:39) [common]
222 11:46:03.845052 Building ramdisk /var/lib/lava/dispatcher/tmp/13627337/extract-overlay-ramdisk-kj4ii86d/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13627337/extract-overlay-ramdisk-kj4ii86d/ramdisk
223 11:46:03.925741 >> 34109 blocks
224 11:46:04.676545 rename /var/lib/lava/dispatcher/tmp/13627337/extract-overlay-ramdisk-kj4ii86d/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13627337/tftp-deploy-d15li98a/ramdisk/ramdisk.cpio.gz
225 11:46:04.676977 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
226 11:46:04.677107 start: 1.5.8 prepare-kernel (timeout 00:09:38) [common]
227 11:46:04.677213 start: 1.5.8.1 prepare-fit (timeout 00:09:38) [common]
228 11:46:04.677322 No mkimage arch provided, not using FIT.
229 11:46:04.677415 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
230 11:46:04.677505 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
231 11:46:04.677611 end: 1.5 prepare-tftp-overlay (duration 00:00:15) [common]
232 11:46:04.677714 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:38) [common]
233 11:46:04.677802 No LXC device requested
234 11:46:04.677883 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
235 11:46:04.677976 start: 1.7 deploy-device-env (timeout 00:09:38) [common]
236 11:46:04.678062 end: 1.7 deploy-device-env (duration 00:00:00) [common]
237 11:46:04.678138 Checking files for TFTP limit of 4294967296 bytes.
238 11:46:04.678533 end: 1 tftp-deploy (duration 00:00:22) [common]
239 11:46:04.678639 start: 2 depthcharge-action (timeout 00:05:00) [common]
240 11:46:04.678737 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
241 11:46:04.678869 substitutions:
242 11:46:04.678939 - {DTB}: None
243 11:46:04.679003 - {INITRD}: 13627337/tftp-deploy-d15li98a/ramdisk/ramdisk.cpio.gz
244 11:46:04.679066 - {KERNEL}: 13627337/tftp-deploy-d15li98a/kernel/bzImage
245 11:46:04.679126 - {LAVA_MAC}: None
246 11:46:04.679184 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/13627337/extract-nfsrootfs-i64vru7h
247 11:46:04.679244 - {NFS_SERVER_IP}: 192.168.201.1
248 11:46:04.679301 - {PRESEED_CONFIG}: None
249 11:46:04.679357 - {PRESEED_LOCAL}: None
250 11:46:04.679414 - {RAMDISK}: 13627337/tftp-deploy-d15li98a/ramdisk/ramdisk.cpio.gz
251 11:46:04.679471 - {ROOT_PART}: None
252 11:46:04.679527 - {ROOT}: None
253 11:46:04.679582 - {SERVER_IP}: 192.168.201.1
254 11:46:04.679638 - {TEE}: None
255 11:46:04.679693 Parsed boot commands:
256 11:46:04.679748 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
257 11:46:04.679928 Parsed boot commands: tftpboot 192.168.201.1 13627337/tftp-deploy-d15li98a/kernel/bzImage 13627337/tftp-deploy-d15li98a/kernel/cmdline 13627337/tftp-deploy-d15li98a/ramdisk/ramdisk.cpio.gz
258 11:46:04.680020 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
259 11:46:04.680106 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
260 11:46:04.680201 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
261 11:46:04.680288 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
262 11:46:04.680359 Not connected, no need to disconnect.
263 11:46:04.680435 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
264 11:46:04.680518 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
265 11:46:04.680587 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cp514-2h-1130g7-volteer-cbg-1'
266 11:46:04.684031 Setting prompt string to ['lava-test: # ']
267 11:46:04.684388 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
268 11:46:04.684500 end: 2.2.1 reset-connection (duration 00:00:00) [common]
269 11:46:04.684604 start: 2.2.2 reset-device (timeout 00:05:00) [common]
270 11:46:04.684717 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
271 11:46:04.684946 Calling: '/usr/local/bin/chromebook-reboot.sh' 'acer-cp514-2h-1130g7-volteer-cbg-1'
272 11:46:13.318779 Returned 0 in 8 seconds
273 11:46:13.419468 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
275 11:46:13.419795 end: 2.2.2 reset-device (duration 00:00:09) [common]
276 11:46:13.419898 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
277 11:46:13.419986 Setting prompt string to 'Starting depthcharge on Voema...'
278 11:46:13.420058 Changing prompt to 'Starting depthcharge on Voema...'
279 11:46:13.420128 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
280 11:46:13.420418 [Enter `^Ec?' for help]
281 11:46:13.420588
282 11:46:13.420732
283 11:46:13.420876 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
284 11:46:13.421022 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
285 11:46:13.421093 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
286 11:46:13.421158 CPU: AES supported, TXT NOT supported, VT supported
287 11:46:13.421226 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
288 11:46:13.421291 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
289 11:46:13.421361 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
290 11:46:13.421420 VBOOT: Loading verstage.
291 11:46:13.421478 FMAP: Found "FLASH" version 1.1 at 0x1804000.
292 11:46:13.421536 FMAP: base = 0x0 size = 0x2000000 #areas = 32
293 11:46:13.421595 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
294 11:46:13.421652 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
295 11:46:13.421712 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
296 11:46:13.421769
297 11:46:13.421824
298 11:46:13.421880 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
299 11:46:13.421937 Probing TPM: . done!
300 11:46:13.421993 TPM ready after 0 ms
301 11:46:13.422049 Connected to device vid:did:rid of 1ae0:0028:00
302 11:46:13.422106 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.153/cr50_v3.94_pp.113-620c9b9523
303 11:46:13.422167 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
304 11:46:13.422224 Initialized TPM device CR50 revision 0
305 11:46:13.422281 tlcl_send_startup: Startup return code is 0
306 11:46:13.422339 TPM: setup succeeded
307 11:46:13.422396 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
308 11:46:13.422453 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
309 11:46:13.422510 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
310 11:46:13.422567 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
311 11:46:13.422623 Chrome EC: UHEPI supported
312 11:46:13.422679 Phase 1
313 11:46:13.422735 FMAP: area GBB found @ 1805000 (458752 bytes)
314 11:46:13.422791 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
315 11:46:13.422848 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
316 11:46:13.422905 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
317 11:46:13.422962 VB2:vb2_check_recovery() Recovery was requested manually
318 11:46:13.423018 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x7
319 11:46:13.423075 Recovery requested (1009000e)
320 11:46:13.423132 TPM: Extending digest for VBOOT: boot mode into PCR 0
321 11:46:13.423189 tlcl_extend: response is 0
322 11:46:13.423245 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
323 11:46:13.423302 tlcl_extend: response is 0
324 11:46:13.423358 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
325 11:46:13.423415 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
326 11:46:13.423472 BS: verstage times (exec / console): total (unknown) / 148 ms
327 11:46:13.423528
328 11:46:13.423584
329 11:46:13.423639 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
330 11:46:13.423696 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
331 11:46:13.423753 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
332 11:46:13.423809 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
333 11:46:13.423865 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
334 11:46:13.423921 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
335 11:46:13.423977 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
336 11:46:13.424034 TCO_STS: 0000 0000
337 11:46:13.424090 GEN_PMCON: d0015038 00002200
338 11:46:13.424146 GBLRST_CAUSE: 00000000 00000000
339 11:46:13.424202 HPR_CAUSE0: 00000000
340 11:46:13.424257 prev_sleep_state 5
341 11:46:13.424313 Boot Count incremented to 29349
342 11:46:13.424369 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
343 11:46:13.424426 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
344 11:46:13.424482 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
345 11:46:13.424538 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
346 11:46:13.424595 Chrome EC: UHEPI supported
347 11:46:13.424651 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
348 11:46:13.424722 Probing TPM: done!
349 11:46:13.424780 Connected to device vid:did:rid of 1ae0:0028:00
350 11:46:13.424836 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.153/cr50_v3.94_pp.113-620c9b9523
351 11:46:13.424894 Initialized TPM device CR50 revision 0
352 11:46:13.424950 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
353 11:46:13.425008 MRC: Hash idx 0x100b comparison successful.
354 11:46:13.425064 MRC cache found, size faa8
355 11:46:13.425157 bootmode is set to: 2
356 11:46:13.425254 SPD index = 0
357 11:46:13.425339 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
358 11:46:13.425400 SPD: module type is LPDDR4X
359 11:46:13.425458 SPD: module part number is MT53E512M64D4NW-046
360 11:46:13.425515 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
361 11:46:13.425572 SPD: device width 16 bits, bus width 16 bits
362 11:46:13.425629 SPD: module size is 1024 MB (per channel)
363 11:46:13.425686 CBMEM:
364 11:46:13.425742 IMD: root @ 0x76fff000 254 entries.
365 11:46:13.425798 IMD: root @ 0x76ffec00 62 entries.
366 11:46:13.425855 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
367 11:46:13.426114 FMAP: area RW_VPD found @ f35000 (8192 bytes)
368 11:46:13.426260 External stage cache:
369 11:46:13.426397 IMD: root @ 0x7b3ff000 254 entries.
370 11:46:13.426533 IMD: root @ 0x7b3fec00 62 entries.
371 11:46:13.426667 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
372 11:46:13.426777 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
373 11:46:13.426840 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
374 11:46:13.426900 MRC: 'RECOVERY_MRC_CACHE' does not need update.
375 11:46:13.426958 cse_lite: Skip switching to RW in the recovery path
376 11:46:13.427017 8 DIMMs found
377 11:46:13.427075 SMM Memory Map
378 11:46:13.427132 SMRAM : 0x7b000000 0x800000
379 11:46:13.427189 Subregion 0: 0x7b000000 0x200000
380 11:46:13.427246 Subregion 1: 0x7b200000 0x200000
381 11:46:13.427303 Subregion 2: 0x7b400000 0x400000
382 11:46:13.427358 top_of_ram = 0x77000000
383 11:46:13.427416 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
384 11:46:13.427472 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
385 11:46:13.427528 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
386 11:46:13.427585 MTRR Range: Start=ff000000 End=0 (Size 1000000)
387 11:46:13.427642 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
388 11:46:13.427699 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
389 11:46:13.427755 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
390 11:46:13.427812 Processing 211 relocs. Offset value of 0x74c0b000
391 11:46:13.427868 BS: romstage times (exec / console): total (unknown) / 277 ms
392 11:46:13.427925
393 11:46:13.427981
394 11:46:13.428037 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
395 11:46:13.428094 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
396 11:46:13.428151 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
397 11:46:13.428208 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
398 11:46:13.428265 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
399 11:46:13.428322 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
400 11:46:13.428379 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
401 11:46:13.428435 Processing 5008 relocs. Offset value of 0x75d98000
402 11:46:13.428491 BS: postcar times (exec / console): total (unknown) / 59 ms
403 11:46:13.428548
404 11:46:13.428603
405 11:46:13.428658 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
406 11:46:13.428715 Normal boot
407 11:46:13.428775 FW_CONFIG value is 0x804c02
408 11:46:13.428831 PCI: 00:07.0 disabled by fw_config
409 11:46:13.428887 PCI: 00:07.1 disabled by fw_config
410 11:46:13.428943 PCI: 00:0d.2 disabled by fw_config
411 11:46:13.428999 PCI: 00:1c.7 disabled by fw_config
412 11:46:13.429054 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
413 11:46:13.429112 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 11:46:13.429169 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
415 11:46:13.429225 GENERIC: 0.0 disabled by fw_config
416 11:46:13.429281 GENERIC: 1.0 disabled by fw_config
417 11:46:13.429348 fw_config match found: DB_USB=USB3_ACTIVE
418 11:46:13.429404 fw_config match found: DB_USB=USB3_ACTIVE
419 11:46:13.429460 fw_config match found: DB_USB=USB3_ACTIVE
420 11:46:13.429516 fw_config match found: DB_USB=USB3_ACTIVE
421 11:46:13.429571 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
422 11:46:13.429628 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
423 11:46:13.429685 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
424 11:46:13.429741 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
425 11:46:13.429797 microcode: sig=0x806c1 pf=0x80 revision=0x86
426 11:46:13.429854 microcode: Update skipped, already up-to-date
427 11:46:13.429909 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
428 11:46:13.429965 Detected 4 core, 8 thread CPU.
429 11:46:13.430021 Setting up SMI for CPU
430 11:46:13.430077 IED base = 0x7b400000
431 11:46:13.430133 IED size = 0x00400000
432 11:46:13.430188 Will perform SMM setup.
433 11:46:13.430244 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
434 11:46:13.430300 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
435 11:46:13.430357 Processing 16 relocs. Offset value of 0x00030000
436 11:46:13.430413 Attempting to start 7 APs
437 11:46:13.430469 Waiting for 10ms after sending INIT.
438 11:46:13.430525 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
439 11:46:13.430581 done.
440 11:46:13.430637 AP: slot 4 apic_id 7.
441 11:46:13.430693 AP: slot 5 apic_id 6.
442 11:46:13.430749 AP: slot 2 apic_id 3.
443 11:46:13.430804 AP: slot 6 apic_id 2.
444 11:46:13.430860 Waiting for 2nd SIPI to complete...done.
445 11:46:13.430916 AP: slot 7 apic_id 4.
446 11:46:13.430972 AP: slot 3 apic_id 5.
447 11:46:13.431028 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
448 11:46:13.431084 Processing 13 relocs. Offset value of 0x00038000
449 11:46:13.431141 Unable to locate Global NVS
450 11:46:13.431197 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
451 11:46:13.431253 Installing permanent SMM handler to 0x7b000000
452 11:46:13.431310 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
453 11:46:13.431366 Processing 794 relocs. Offset value of 0x7b010000
454 11:46:13.431617 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
455 11:46:13.431757 Processing 13 relocs. Offset value of 0x7b008000
456 11:46:13.431891 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
457 11:46:13.432024 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
458 11:46:13.432155 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
459 11:46:13.432281 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
460 11:46:13.432345 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
461 11:46:13.432405 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
462 11:46:13.432465 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
463 11:46:13.432522 Unable to locate Global NVS
464 11:46:13.432580 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
465 11:46:13.432637 Clearing SMI status registers
466 11:46:13.432694 SMI_STS: PM1
467 11:46:13.432750 PM1_STS: PWRBTN
468 11:46:13.432806 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
469 11:46:13.432862 In relocation handler: CPU 0
470 11:46:13.432919 New SMBASE=0x7b000000 IEDBASE=0x7b400000
471 11:46:13.432976 Writing SMRR. base = 0x7b000006, mask=0xff800c00
472 11:46:13.433032 Relocation complete.
473 11:46:13.433093 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
474 11:46:13.433150 In relocation handler: CPU 1
475 11:46:13.433206 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
476 11:46:13.433263 Relocation complete.
477 11:46:13.433329 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
478 11:46:13.433387 In relocation handler: CPU 3
479 11:46:13.433443 New SMBASE=0x7afff400 IEDBASE=0x7b400000
480 11:46:13.433499 Relocation complete.
481 11:46:13.433556 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
482 11:46:13.433612 In relocation handler: CPU 5
483 11:46:13.433668 New SMBASE=0x7affec00 IEDBASE=0x7b400000
484 11:46:13.433725 Writing SMRR. base = 0x7b000006, mask=0xff800c00
485 11:46:13.433780 Relocation complete.
486 11:46:13.433836 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
487 11:46:13.433893 In relocation handler: CPU 4
488 11:46:13.433949 New SMBASE=0x7afff000 IEDBASE=0x7b400000
489 11:46:13.434005 Relocation complete.
490 11:46:13.434061 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
491 11:46:13.434117 In relocation handler: CPU 2
492 11:46:13.434173 New SMBASE=0x7afff800 IEDBASE=0x7b400000
493 11:46:13.434228 Relocation complete.
494 11:46:13.434284 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
495 11:46:13.434340 In relocation handler: CPU 6
496 11:46:13.434396 New SMBASE=0x7affe800 IEDBASE=0x7b400000
497 11:46:13.434452 Writing SMRR. base = 0x7b000006, mask=0xff800c00
498 11:46:13.434508 Relocation complete.
499 11:46:13.434564 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
500 11:46:13.434620 In relocation handler: CPU 7
501 11:46:13.434676 New SMBASE=0x7affe400 IEDBASE=0x7b400000
502 11:46:13.434732 Writing SMRR. base = 0x7b000006, mask=0xff800c00
503 11:46:13.434788 Relocation complete.
504 11:46:13.434843 Initializing CPU #0
505 11:46:13.434898 CPU: vendor Intel device 806c1
506 11:46:13.434968 CPU: family 06, model 8c, stepping 01
507 11:46:13.435026 Clearing out pending MCEs
508 11:46:13.435082 Setting up local APIC...
509 11:46:13.435138 apic_id: 0x00 done.
510 11:46:13.435193 Turbo is available but hidden
511 11:46:13.435249 Turbo is available and visible
512 11:46:13.435305 microcode: Update skipped, already up-to-date
513 11:46:13.435361 CPU #0 initialized
514 11:46:13.435417 Initializing CPU #6
515 11:46:13.435473 Initializing CPU #2
516 11:46:13.435528 CPU: vendor Intel device 806c1
517 11:46:13.435584 CPU: family 06, model 8c, stepping 01
518 11:46:13.435640 CPU: vendor Intel device 806c1
519 11:46:13.435695 CPU: family 06, model 8c, stepping 01
520 11:46:13.435750 Clearing out pending MCEs
521 11:46:13.435806 Initializing CPU #5
522 11:46:13.435861 Initializing CPU #4
523 11:46:13.435916 CPU: vendor Intel device 806c1
524 11:46:13.435971 CPU: family 06, model 8c, stepping 01
525 11:46:13.436027 CPU: vendor Intel device 806c1
526 11:46:13.436082 CPU: family 06, model 8c, stepping 01
527 11:46:13.436138 Clearing out pending MCEs
528 11:46:13.436194 Initializing CPU #7
529 11:46:13.436249 Initializing CPU #3
530 11:46:13.436304 CPU: vendor Intel device 806c1
531 11:46:13.436360 CPU: family 06, model 8c, stepping 01
532 11:46:13.436416 CPU: vendor Intel device 806c1
533 11:46:13.436471 CPU: family 06, model 8c, stepping 01
534 11:46:13.436526 Clearing out pending MCEs
535 11:46:13.436581 Clearing out pending MCEs
536 11:46:13.436636 Setting up local APIC...
537 11:46:13.436691 Clearing out pending MCEs
538 11:46:13.436746 Setting up local APIC...
539 11:46:13.436801 Setting up local APIC...
540 11:46:13.436856 Setting up local APIC...
541 11:46:13.436911 apic_id: 0x04 done.
542 11:46:13.436967 apic_id: 0x05 done.
543 11:46:13.437022 microcode: Update skipped, already up-to-date
544 11:46:13.437077 microcode: Update skipped, already up-to-date
545 11:46:13.437133 CPU #7 initialized
546 11:46:13.437189 CPU #3 initialized
547 11:46:13.437243 apic_id: 0x03 done.
548 11:46:13.437304 apic_id: 0x02 done.
549 11:46:13.437363 microcode: Update skipped, already up-to-date
550 11:46:13.437419 microcode: Update skipped, already up-to-date
551 11:46:13.437475 CPU #2 initialized
552 11:46:13.437531 CPU #6 initialized
553 11:46:13.437586 Initializing CPU #1
554 11:46:13.437642 Clearing out pending MCEs
555 11:46:13.437698 Setting up local APIC...
556 11:46:13.437754 CPU: vendor Intel device 806c1
557 11:46:13.437810 CPU: family 06, model 8c, stepping 01
558 11:46:13.437866 Clearing out pending MCEs
559 11:46:13.437922 apic_id: 0x06 done.
560 11:46:13.437977 Setting up local APIC...
561 11:46:13.438032 microcode: Update skipped, already up-to-date
562 11:46:13.438088 Setting up local APIC...
563 11:46:13.438144 CPU #5 initialized
564 11:46:13.438199 apic_id: 0x07 done.
565 11:46:13.438254 apic_id: 0x01 done.
566 11:46:13.438312 microcode: Update skipped, already up-to-date
567 11:46:13.438373 microcode: Update skipped, already up-to-date
568 11:46:13.438648 CPU #4 initialized
569 11:46:13.438788 CPU #1 initialized
570 11:46:13.438874 bsp_do_flight_plan done after 459 msecs.
571 11:46:13.438935 CPU: frequency set to 4000 MHz
572 11:46:13.438994 Enabling SMIs.
573 11:46:13.439052 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
574 11:46:13.439109 SATAXPCIE1 indicates PCIe NVMe is present
575 11:46:13.439167 Probing TPM: done!
576 11:46:13.439224 Connected to device vid:did:rid of 1ae0:0028:00
577 11:46:13.439280 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.153/cr50_v3.94_pp.113-620c9b9523
578 11:46:13.439337 Initialized TPM device CR50 revision 0
579 11:46:13.439393 Enabling S0i3.4
580 11:46:13.439449 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
581 11:46:13.439506 Found a VBT of 8704 bytes after decompression
582 11:46:13.439562 cse_lite: CSE RO boot. HybridStorageMode disabled
583 11:46:13.439619 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
584 11:46:13.439675 FSPS returned 0
585 11:46:13.439731 Executing Phase 1 of FspMultiPhaseSiInit
586 11:46:13.439787 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
587 11:46:13.439844 port C0 DISC req: usage 1 usb3 1 usb2 5
588 11:46:13.439900 Raw Buffer output 0 00000511
589 11:46:13.439956 Raw Buffer output 1 00000000
590 11:46:13.440011 pmc_send_ipc_cmd succeeded
591 11:46:13.440067 port C1 DISC req: usage 1 usb3 2 usb2 3
592 11:46:13.440123 Raw Buffer output 0 00000321
593 11:46:13.440178 Raw Buffer output 1 00000000
594 11:46:13.440233 pmc_send_ipc_cmd succeeded
595 11:46:13.440289 Detected 4 core, 8 thread CPU.
596 11:46:13.440344 Detected 4 core, 8 thread CPU.
597 11:46:13.440400 Display FSP Version Info HOB
598 11:46:13.440456 Reference Code - CPU = a.0.4c.31
599 11:46:13.440511 uCode Version = 0.0.0.86
600 11:46:13.440566 TXT ACM version = ff.ff.ff.ffff
601 11:46:13.440622 Reference Code - ME = a.0.4c.31
602 11:46:13.440678 MEBx version = 0.0.0.0
603 11:46:13.440734 ME Firmware Version = Consumer SKU
604 11:46:13.440789 Reference Code - PCH = a.0.4c.31
605 11:46:13.440844 PCH-CRID Status = Disabled
606 11:46:13.440900 PCH-CRID Original Value = ff.ff.ff.ffff
607 11:46:13.440956 PCH-CRID New Value = ff.ff.ff.ffff
608 11:46:13.441011 OPROM - RST - RAID = ff.ff.ff.ffff
609 11:46:13.441067 PCH Hsio Version = 4.0.0.0
610 11:46:13.441123 Reference Code - SA - System Agent = a.0.4c.31
611 11:46:13.441191 Reference Code - MRC = 2.0.0.1
612 11:46:13.441282 SA - PCIe Version = a.0.4c.31
613 11:46:13.441355 SA-CRID Status = Disabled
614 11:46:13.441412 SA-CRID Original Value = 0.0.0.1
615 11:46:13.441468 SA-CRID New Value = 0.0.0.1
616 11:46:13.441525 OPROM - VBIOS = ff.ff.ff.ffff
617 11:46:13.441582 IO Manageability Engine FW Version = 11.1.4.0
618 11:46:13.441638 PHY Build Version = 0.0.0.e0
619 11:46:13.441695 Thunderbolt(TM) FW Version = 0.0.0.0
620 11:46:13.441751 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
621 11:46:13.441808 ITSS IRQ Polarities Before:
622 11:46:13.441864 IPC0: 0xffffffff
623 11:46:13.441920 IPC1: 0xffffffff
624 11:46:13.441976 IPC2: 0xffffffff
625 11:46:13.442031 IPC3: 0xffffffff
626 11:46:13.442086 ITSS IRQ Polarities After:
627 11:46:13.442142 IPC0: 0xffffffff
628 11:46:13.442198 IPC1: 0xffffffff
629 11:46:13.442253 IPC2: 0xffffffff
630 11:46:13.442307 IPC3: 0xffffffff
631 11:46:13.442363 Found PCIe Root Port #9 at PCI: 00:1d.0.
632 11:46:13.442419 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
633 11:46:13.442479 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
634 11:46:13.442536 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
635 11:46:13.442592 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
636 11:46:13.442648 Enumerating buses...
637 11:46:13.442704 Show all devs... Before device enumeration.
638 11:46:13.442759 Root Device: enabled 1
639 11:46:13.442815 DOMAIN: 0000: enabled 1
640 11:46:13.442871 CPU_CLUSTER: 0: enabled 1
641 11:46:13.442927 PCI: 00:00.0: enabled 1
642 11:46:13.442982 PCI: 00:02.0: enabled 1
643 11:46:13.443038 PCI: 00:04.0: enabled 1
644 11:46:13.443093 PCI: 00:05.0: enabled 1
645 11:46:13.443148 PCI: 00:06.0: enabled 0
646 11:46:13.443204 PCI: 00:07.0: enabled 0
647 11:46:13.443259 PCI: 00:07.1: enabled 0
648 11:46:13.443315 PCI: 00:07.2: enabled 0
649 11:46:13.443370 PCI: 00:07.3: enabled 0
650 11:46:13.443426 PCI: 00:08.0: enabled 1
651 11:46:13.443482 PCI: 00:09.0: enabled 0
652 11:46:13.443537 PCI: 00:0a.0: enabled 0
653 11:46:13.443592 PCI: 00:0d.0: enabled 1
654 11:46:13.443647 PCI: 00:0d.1: enabled 0
655 11:46:13.443702 PCI: 00:0d.2: enabled 0
656 11:46:13.443758 PCI: 00:0d.3: enabled 0
657 11:46:13.443813 PCI: 00:0e.0: enabled 0
658 11:46:13.443868 PCI: 00:10.2: enabled 1
659 11:46:13.443923 PCI: 00:10.6: enabled 0
660 11:46:13.443977 PCI: 00:10.7: enabled 0
661 11:46:13.444032 PCI: 00:12.0: enabled 0
662 11:46:13.444088 PCI: 00:12.6: enabled 0
663 11:46:13.444143 PCI: 00:13.0: enabled 0
664 11:46:13.444198 PCI: 00:14.0: enabled 1
665 11:46:13.444253 PCI: 00:14.1: enabled 0
666 11:46:13.444308 PCI: 00:14.2: enabled 1
667 11:46:13.444363 PCI: 00:14.3: enabled 1
668 11:46:13.444418 PCI: 00:15.0: enabled 1
669 11:46:13.444473 PCI: 00:15.1: enabled 1
670 11:46:13.444528 PCI: 00:15.2: enabled 1
671 11:46:13.444583 PCI: 00:15.3: enabled 1
672 11:46:13.444653 PCI: 00:16.0: enabled 1
673 11:46:13.444712 PCI: 00:16.1: enabled 0
674 11:46:13.444768 PCI: 00:16.2: enabled 0
675 11:46:13.444824 PCI: 00:16.3: enabled 0
676 11:46:13.444880 PCI: 00:16.4: enabled 0
677 11:46:13.444936 PCI: 00:16.5: enabled 0
678 11:46:13.444991 PCI: 00:17.0: enabled 1
679 11:46:13.445047 PCI: 00:19.0: enabled 0
680 11:46:13.445103 PCI: 00:19.1: enabled 1
681 11:46:13.445158 PCI: 00:19.2: enabled 0
682 11:46:13.445214 PCI: 00:1c.0: enabled 1
683 11:46:13.445270 PCI: 00:1c.1: enabled 0
684 11:46:13.445336 PCI: 00:1c.2: enabled 0
685 11:46:13.445393 PCI: 00:1c.3: enabled 0
686 11:46:13.445449 PCI: 00:1c.4: enabled 0
687 11:46:13.445504 PCI: 00:1c.5: enabled 0
688 11:46:13.445559 PCI: 00:1c.6: enabled 1
689 11:46:13.445615 PCI: 00:1c.7: enabled 0
690 11:46:13.445670 PCI: 00:1d.0: enabled 1
691 11:46:13.445726 PCI: 00:1d.1: enabled 0
692 11:46:13.445976 PCI: 00:1d.2: enabled 1
693 11:46:13.446040 PCI: 00:1d.3: enabled 0
694 11:46:13.446097 PCI: 00:1e.0: enabled 1
695 11:46:13.446153 PCI: 00:1e.1: enabled 0
696 11:46:13.446209 PCI: 00:1e.2: enabled 1
697 11:46:13.446264 PCI: 00:1e.3: enabled 1
698 11:46:13.446319 PCI: 00:1f.0: enabled 1
699 11:46:13.446374 PCI: 00:1f.1: enabled 0
700 11:46:13.446430 PCI: 00:1f.2: enabled 1
701 11:46:13.446485 PCI: 00:1f.3: enabled 1
702 11:46:13.446541 PCI: 00:1f.4: enabled 0
703 11:46:13.446597 PCI: 00:1f.5: enabled 1
704 11:46:13.446652 PCI: 00:1f.6: enabled 0
705 11:46:13.446707 PCI: 00:1f.7: enabled 0
706 11:46:13.446762 APIC: 00: enabled 1
707 11:46:13.446818 GENERIC: 0.0: enabled 1
708 11:46:13.446873 GENERIC: 0.0: enabled 1
709 11:46:13.446929 GENERIC: 1.0: enabled 1
710 11:46:13.446984 GENERIC: 0.0: enabled 1
711 11:46:13.447039 GENERIC: 1.0: enabled 1
712 11:46:13.447095 USB0 port 0: enabled 1
713 11:46:13.447150 GENERIC: 0.0: enabled 1
714 11:46:13.447206 USB0 port 0: enabled 1
715 11:46:13.447261 GENERIC: 0.0: enabled 1
716 11:46:13.447317 I2C: 00:1a: enabled 1
717 11:46:13.447373 I2C: 00:31: enabled 1
718 11:46:13.447429 I2C: 00:32: enabled 1
719 11:46:13.447484 I2C: 00:10: enabled 1
720 11:46:13.447539 I2C: 00:15: enabled 1
721 11:46:13.447595 GENERIC: 0.0: enabled 0
722 11:46:13.447651 GENERIC: 1.0: enabled 0
723 11:46:13.447706 GENERIC: 0.0: enabled 1
724 11:46:13.447762 SPI: 00: enabled 1
725 11:46:13.447818 SPI: 00: enabled 1
726 11:46:13.447874 PNP: 0c09.0: enabled 1
727 11:46:13.447930 GENERIC: 0.0: enabled 1
728 11:46:13.447985 USB3 port 0: enabled 1
729 11:46:13.448055 USB3 port 1: enabled 1
730 11:46:13.448115 USB3 port 2: enabled 0
731 11:46:13.448172 USB3 port 3: enabled 0
732 11:46:13.448228 USB2 port 0: enabled 0
733 11:46:13.448284 USB2 port 1: enabled 1
734 11:46:13.448340 USB2 port 2: enabled 1
735 11:46:13.448396 USB2 port 3: enabled 0
736 11:46:13.448452 USB2 port 4: enabled 1
737 11:46:13.448508 USB2 port 5: enabled 0
738 11:46:13.448562 USB2 port 6: enabled 0
739 11:46:13.448618 USB2 port 7: enabled 0
740 11:46:13.448674 USB2 port 8: enabled 0
741 11:46:13.448729 USB2 port 9: enabled 0
742 11:46:13.448784 USB3 port 0: enabled 0
743 11:46:13.448840 USB3 port 1: enabled 1
744 11:46:13.448895 USB3 port 2: enabled 0
745 11:46:13.448950 USB3 port 3: enabled 0
746 11:46:13.449005 GENERIC: 0.0: enabled 1
747 11:46:13.449061 GENERIC: 1.0: enabled 1
748 11:46:13.449116 APIC: 01: enabled 1
749 11:46:13.449172 APIC: 03: enabled 1
750 11:46:13.449226 APIC: 05: enabled 1
751 11:46:13.449283 APIC: 07: enabled 1
752 11:46:13.449349 APIC: 06: enabled 1
753 11:46:13.449406 APIC: 02: enabled 1
754 11:46:13.449461 APIC: 04: enabled 1
755 11:46:13.449516 Compare with tree...
756 11:46:13.449572 Root Device: enabled 1
757 11:46:13.449627 DOMAIN: 0000: enabled 1
758 11:46:13.449682 PCI: 00:00.0: enabled 1
759 11:46:13.449738 PCI: 00:02.0: enabled 1
760 11:46:13.449793 PCI: 00:04.0: enabled 1
761 11:46:13.449849 GENERIC: 0.0: enabled 1
762 11:46:13.449904 PCI: 00:05.0: enabled 1
763 11:46:13.449959 PCI: 00:06.0: enabled 0
764 11:46:13.450014 PCI: 00:07.0: enabled 0
765 11:46:13.450069 GENERIC: 0.0: enabled 1
766 11:46:13.450124 PCI: 00:07.1: enabled 0
767 11:46:13.450198 GENERIC: 1.0: enabled 1
768 11:46:13.450256 PCI: 00:07.2: enabled 0
769 11:46:13.450312 GENERIC: 0.0: enabled 1
770 11:46:13.450368 PCI: 00:07.3: enabled 0
771 11:46:13.450425 GENERIC: 1.0: enabled 1
772 11:46:13.450481 PCI: 00:08.0: enabled 1
773 11:46:13.450536 PCI: 00:09.0: enabled 0
774 11:46:13.450591 PCI: 00:0a.0: enabled 0
775 11:46:13.450647 PCI: 00:0d.0: enabled 1
776 11:46:13.450702 USB0 port 0: enabled 1
777 11:46:13.450758 USB3 port 0: enabled 1
778 11:46:13.450813 USB3 port 1: enabled 1
779 11:46:13.450869 USB3 port 2: enabled 0
780 11:46:13.450924 USB3 port 3: enabled 0
781 11:46:13.450980 PCI: 00:0d.1: enabled 0
782 11:46:13.451036 PCI: 00:0d.2: enabled 0
783 11:46:13.451091 GENERIC: 0.0: enabled 1
784 11:46:13.451146 PCI: 00:0d.3: enabled 0
785 11:46:13.451202 PCI: 00:0e.0: enabled 0
786 11:46:13.451257 PCI: 00:10.2: enabled 1
787 11:46:13.451312 PCI: 00:10.6: enabled 0
788 11:46:13.451368 PCI: 00:10.7: enabled 0
789 11:46:13.451423 PCI: 00:12.0: enabled 0
790 11:46:13.451499 PCI: 00:12.6: enabled 0
791 11:46:13.451557 PCI: 00:13.0: enabled 0
792 11:46:13.451614 PCI: 00:14.0: enabled 1
793 11:46:13.451669 USB0 port 0: enabled 1
794 11:46:13.451725 USB2 port 0: enabled 0
795 11:46:13.451781 USB2 port 1: enabled 1
796 11:46:13.451837 USB2 port 2: enabled 1
797 11:46:13.451893 USB2 port 3: enabled 0
798 11:46:13.451948 USB2 port 4: enabled 1
799 11:46:13.452003 USB2 port 5: enabled 0
800 11:46:13.452059 USB2 port 6: enabled 0
801 11:46:13.452114 USB2 port 7: enabled 0
802 11:46:13.452170 USB2 port 8: enabled 0
803 11:46:13.452226 USB2 port 9: enabled 0
804 11:46:13.452282 USB3 port 0: enabled 0
805 11:46:13.452337 USB3 port 1: enabled 1
806 11:46:13.452393 USB3 port 2: enabled 0
807 11:46:13.452449 USB3 port 3: enabled 0
808 11:46:13.452505 PCI: 00:14.1: enabled 0
809 11:46:13.452560 PCI: 00:14.2: enabled 1
810 11:46:13.452615 PCI: 00:14.3: enabled 1
811 11:46:13.452671 GENERIC: 0.0: enabled 1
812 11:46:13.452726 PCI: 00:15.0: enabled 1
813 11:46:13.452782 I2C: 00:1a: enabled 1
814 11:46:13.452837 I2C: 00:31: enabled 1
815 11:46:13.452892 I2C: 00:32: enabled 1
816 11:46:13.452948 PCI: 00:15.1: enabled 1
817 11:46:13.453003 I2C: 00:10: enabled 1
818 11:46:13.453059 PCI: 00:15.2: enabled 1
819 11:46:13.453115 PCI: 00:15.3: enabled 1
820 11:46:13.453170 PCI: 00:16.0: enabled 1
821 11:46:13.453225 PCI: 00:16.1: enabled 0
822 11:46:13.453281 PCI: 00:16.2: enabled 0
823 11:46:13.453351 PCI: 00:16.3: enabled 0
824 11:46:13.453406 PCI: 00:16.4: enabled 0
825 11:46:13.453462 PCI: 00:16.5: enabled 0
826 11:46:13.453518 PCI: 00:17.0: enabled 1
827 11:46:13.453573 PCI: 00:19.0: enabled 0
828 11:46:13.453628 PCI: 00:19.1: enabled 1
829 11:46:13.453684 I2C: 00:15: enabled 1
830 11:46:13.453738 PCI: 00:19.2: enabled 0
831 11:46:13.453794 PCI: 00:1d.0: enabled 1
832 11:46:13.453850 GENERIC: 0.0: enabled 1
833 11:46:13.453905 PCI: 00:1e.0: enabled 1
834 11:46:13.453960 PCI: 00:1e.1: enabled 0
835 11:46:13.454015 PCI: 00:1e.2: enabled 1
836 11:46:13.454071 SPI: 00: enabled 1
837 11:46:13.454126 PCI: 00:1e.3: enabled 1
838 11:46:13.454181 SPI: 00: enabled 1
839 11:46:13.454237 PCI: 00:1f.0: enabled 1
840 11:46:13.454291 PNP: 0c09.0: enabled 1
841 11:46:13.454347 PCI: 00:1f.1: enabled 0
842 11:46:13.454403 PCI: 00:1f.2: enabled 1
843 11:46:13.454459 GENERIC: 0.0: enabled 1
844 11:46:13.454513 GENERIC: 0.0: enabled 1
845 11:46:13.454569 GENERIC: 1.0: enabled 1
846 11:46:13.454624 PCI: 00:1f.3: enabled 1
847 11:46:13.454679 PCI: 00:1f.4: enabled 0
848 11:46:13.454734 PCI: 00:1f.5: enabled 1
849 11:46:13.454798 PCI: 00:1f.6: enabled 0
850 11:46:13.455056 PCI: 00:1f.7: enabled 0
851 11:46:13.455119 CPU_CLUSTER: 0: enabled 1
852 11:46:13.455177 APIC: 00: enabled 1
853 11:46:13.455234 APIC: 01: enabled 1
854 11:46:13.455290 APIC: 03: enabled 1
855 11:46:13.455346 APIC: 05: enabled 1
856 11:46:13.455402 APIC: 07: enabled 1
857 11:46:13.455458 APIC: 06: enabled 1
858 11:46:13.455514 APIC: 02: enabled 1
859 11:46:13.455570 APIC: 04: enabled 1
860 11:46:13.455626 Root Device scanning...
861 11:46:13.455681 scan_static_bus for Root Device
862 11:46:13.455738 DOMAIN: 0000 enabled
863 11:46:13.455794 CPU_CLUSTER: 0 enabled
864 11:46:13.455849 DOMAIN: 0000 scanning...
865 11:46:13.455905 PCI: pci_scan_bus for bus 00
866 11:46:13.455961 PCI: 00:00.0 [8086/0000] ops
867 11:46:13.456017 PCI: 00:00.0 [8086/9a12] enabled
868 11:46:13.456073 PCI: 00:02.0 [8086/0000] bus ops
869 11:46:13.456128 PCI: 00:02.0 [8086/9a40] enabled
870 11:46:13.456183 PCI: 00:04.0 [8086/0000] bus ops
871 11:46:13.456239 PCI: 00:04.0 [8086/9a03] enabled
872 11:46:13.456295 PCI: 00:05.0 [8086/9a19] enabled
873 11:46:13.456351 PCI: 00:07.0 [0000/0000] hidden
874 11:46:13.456406 PCI: 00:08.0 [8086/9a11] enabled
875 11:46:13.456462 PCI: 00:0a.0 [8086/9a0d] disabled
876 11:46:13.456518 PCI: 00:0d.0 [8086/0000] bus ops
877 11:46:13.456574 PCI: 00:0d.0 [8086/9a13] enabled
878 11:46:13.456629 PCI: 00:14.0 [8086/0000] bus ops
879 11:46:13.456685 PCI: 00:14.0 [8086/a0ed] enabled
880 11:46:13.456741 PCI: 00:14.2 [8086/a0ef] enabled
881 11:46:13.456796 PCI: 00:14.3 [8086/0000] bus ops
882 11:46:13.456852 PCI: 00:14.3 [8086/a0f0] enabled
883 11:46:13.456908 PCI: 00:15.0 [8086/0000] bus ops
884 11:46:13.456964 PCI: 00:15.0 [8086/a0e8] enabled
885 11:46:13.457019 PCI: 00:15.1 [8086/0000] bus ops
886 11:46:13.457075 PCI: 00:15.1 [8086/a0e9] enabled
887 11:46:13.457131 PCI: 00:15.2 [8086/0000] bus ops
888 11:46:13.457186 PCI: 00:15.2 [8086/a0ea] enabled
889 11:46:13.457241 PCI: 00:15.3 [8086/0000] bus ops
890 11:46:13.457305 PCI: 00:15.3 [8086/a0eb] enabled
891 11:46:13.457364 PCI: 00:16.0 [8086/0000] ops
892 11:46:13.457420 PCI: 00:16.0 [8086/a0e0] enabled
893 11:46:13.457476 PCI: Static device PCI: 00:17.0 not found, disabling it.
894 11:46:13.457532 PCI: 00:19.0 [8086/0000] bus ops
895 11:46:13.457588 PCI: 00:19.0 [8086/a0c5] disabled
896 11:46:13.457666 PCI: 00:19.1 [8086/0000] bus ops
897 11:46:13.457724 PCI: 00:19.1 [8086/a0c6] enabled
898 11:46:13.457781 PCI: 00:1d.0 [8086/0000] bus ops
899 11:46:13.457837 PCI: 00:1d.0 [8086/a0b0] enabled
900 11:46:13.457893 PCI: 00:1e.0 [8086/0000] ops
901 11:46:13.457949 PCI: 00:1e.0 [8086/a0a8] enabled
902 11:46:13.458006 PCI: 00:1e.2 [8086/0000] bus ops
903 11:46:13.458063 PCI: 00:1e.2 [8086/a0aa] enabled
904 11:46:13.458118 PCI: 00:1e.3 [8086/0000] bus ops
905 11:46:13.458174 PCI: 00:1e.3 [8086/a0ab] enabled
906 11:46:13.458229 PCI: 00:1f.0 [8086/0000] bus ops
907 11:46:13.458284 PCI: 00:1f.0 [8086/a087] enabled
908 11:46:13.458339 RTC Init
909 11:46:13.458395 Set power on after power failure.
910 11:46:13.458451 Disabling Deep S3
911 11:46:13.458506 Disabling Deep S3
912 11:46:13.458561 Disabling Deep S4
913 11:46:13.458617 Disabling Deep S4
914 11:46:13.458672 Disabling Deep S5
915 11:46:13.458727 Disabling Deep S5
916 11:46:13.458782 PCI: 00:1f.2 [0000/0000] hidden
917 11:46:13.458837 PCI: 00:1f.3 [8086/0000] bus ops
918 11:46:13.458892 PCI: 00:1f.3 [8086/a0c8] enabled
919 11:46:13.458948 PCI: 00:1f.5 [8086/0000] bus ops
920 11:46:13.459003 PCI: 00:1f.5 [8086/a0a4] enabled
921 11:46:13.459059 PCI: Leftover static devices:
922 11:46:13.459115 PCI: 00:10.2
923 11:46:13.459170 PCI: 00:10.6
924 11:46:13.459225 PCI: 00:10.7
925 11:46:13.459281 PCI: 00:06.0
926 11:46:13.459336 PCI: 00:07.1
927 11:46:13.459392 PCI: 00:07.2
928 11:46:13.459447 PCI: 00:07.3
929 11:46:13.459502 PCI: 00:09.0
930 11:46:13.459557 PCI: 00:0d.1
931 11:46:13.459613 PCI: 00:0d.2
932 11:46:13.459668 PCI: 00:0d.3
933 11:46:13.459723 PCI: 00:0e.0
934 11:46:13.459779 PCI: 00:12.0
935 11:46:13.459834 PCI: 00:12.6
936 11:46:13.459889 PCI: 00:13.0
937 11:46:13.459944 PCI: 00:14.1
938 11:46:13.459999 PCI: 00:16.1
939 11:46:13.460054 PCI: 00:16.2
940 11:46:13.460109 PCI: 00:16.3
941 11:46:13.460165 PCI: 00:16.4
942 11:46:13.460221 PCI: 00:16.5
943 11:46:13.460276 PCI: 00:17.0
944 11:46:13.460331 PCI: 00:19.2
945 11:46:13.460386 PCI: 00:1e.1
946 11:46:13.460442 PCI: 00:1f.1
947 11:46:13.460497 PCI: 00:1f.4
948 11:46:13.460555 PCI: 00:1f.6
949 11:46:13.460617 PCI: 00:1f.7
950 11:46:13.460673 PCI: Check your devicetree.cb.
951 11:46:13.460730 PCI: 00:02.0 scanning...
952 11:46:13.460786 scan_generic_bus for PCI: 00:02.0
953 11:46:13.460843 scan_generic_bus for PCI: 00:02.0 done
954 11:46:13.460899 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
955 11:46:13.460955 PCI: 00:04.0 scanning...
956 11:46:13.461030 scan_generic_bus for PCI: 00:04.0
957 11:46:13.461089 GENERIC: 0.0 enabled
958 11:46:13.461146 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
959 11:46:13.461203 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
960 11:46:13.461259 PCI: 00:0d.0 scanning...
961 11:46:13.461323 scan_static_bus for PCI: 00:0d.0
962 11:46:13.461381 USB0 port 0 enabled
963 11:46:13.461437 USB0 port 0 scanning...
964 11:46:13.461493 scan_static_bus for USB0 port 0
965 11:46:13.461549 USB3 port 0 enabled
966 11:46:13.461605 USB3 port 1 enabled
967 11:46:13.461661 USB3 port 2 disabled
968 11:46:13.461717 USB3 port 3 disabled
969 11:46:13.461772 USB3 port 0 scanning...
970 11:46:13.461828 scan_static_bus for USB3 port 0
971 11:46:13.461884 scan_static_bus for USB3 port 0 done
972 11:46:13.461940 scan_bus: bus USB3 port 0 finished in 6 msecs
973 11:46:13.461997 USB3 port 1 scanning...
974 11:46:13.462053 scan_static_bus for USB3 port 1
975 11:46:13.462109 scan_static_bus for USB3 port 1 done
976 11:46:13.462165 scan_bus: bus USB3 port 1 finished in 6 msecs
977 11:46:13.462221 scan_static_bus for USB0 port 0 done
978 11:46:13.462276 scan_bus: bus USB0 port 0 finished in 43 msecs
979 11:46:13.462333 scan_static_bus for PCI: 00:0d.0 done
980 11:46:13.462388 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
981 11:46:13.462444 PCI: 00:14.0 scanning...
982 11:46:13.462500 scan_static_bus for PCI: 00:14.0
983 11:46:13.462556 USB0 port 0 enabled
984 11:46:13.462612 USB0 port 0 scanning...
985 11:46:13.462668 scan_static_bus for USB0 port 0
986 11:46:13.462724 USB2 port 0 disabled
987 11:46:13.462780 USB2 port 1 enabled
988 11:46:13.462836 USB2 port 2 enabled
989 11:46:13.462892 USB2 port 3 disabled
990 11:46:13.462947 USB2 port 4 enabled
991 11:46:13.463002 USB2 port 5 disabled
992 11:46:13.463058 USB2 port 6 disabled
993 11:46:13.463114 USB2 port 7 disabled
994 11:46:13.463169 USB2 port 8 disabled
995 11:46:13.463224 USB2 port 9 disabled
996 11:46:13.463287 USB3 port 0 disabled
997 11:46:13.463345 USB3 port 1 enabled
998 11:46:13.463400 USB3 port 2 disabled
999 11:46:13.463456 USB3 port 3 disabled
1000 11:46:13.463704 USB2 port 1 scanning...
1001 11:46:13.463766 scan_static_bus for USB2 port 1
1002 11:46:13.463824 scan_static_bus for USB2 port 1 done
1003 11:46:13.463880 scan_bus: bus USB2 port 1 finished in 6 msecs
1004 11:46:13.463936 USB2 port 2 scanning...
1005 11:46:13.463992 scan_static_bus for USB2 port 2
1006 11:46:13.464048 scan_static_bus for USB2 port 2 done
1007 11:46:13.464104 scan_bus: bus USB2 port 2 finished in 6 msecs
1008 11:46:13.464160 USB2 port 4 scanning...
1009 11:46:13.464216 scan_static_bus for USB2 port 4
1010 11:46:13.464272 scan_static_bus for USB2 port 4 done
1011 11:46:13.464328 scan_bus: bus USB2 port 4 finished in 6 msecs
1012 11:46:13.464384 USB3 port 1 scanning...
1013 11:46:13.464440 scan_static_bus for USB3 port 1
1014 11:46:13.464501 scan_static_bus for USB3 port 1 done
1015 11:46:13.464569 scan_bus: bus USB3 port 1 finished in 6 msecs
1016 11:46:13.464627 scan_static_bus for USB0 port 0 done
1017 11:46:13.464683 scan_bus: bus USB0 port 0 finished in 93 msecs
1018 11:46:13.464740 scan_static_bus for PCI: 00:14.0 done
1019 11:46:13.464797 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1020 11:46:13.464854 PCI: 00:14.3 scanning...
1021 11:46:13.464911 scan_static_bus for PCI: 00:14.3
1022 11:46:13.464967 GENERIC: 0.0 enabled
1023 11:46:13.465023 scan_static_bus for PCI: 00:14.3 done
1024 11:46:13.465080 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1025 11:46:13.465146 PCI: 00:15.0 scanning...
1026 11:46:13.465206 scan_static_bus for PCI: 00:15.0
1027 11:46:13.465264 I2C: 00:1a enabled
1028 11:46:13.465332 I2C: 00:31 enabled
1029 11:46:13.465389 I2C: 00:32 enabled
1030 11:46:13.465444 scan_static_bus for PCI: 00:15.0 done
1031 11:46:13.465500 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
1032 11:46:13.465556 PCI: 00:15.1 scanning...
1033 11:46:13.465612 scan_static_bus for PCI: 00:15.1
1034 11:46:13.465668 I2C: 00:10 enabled
1035 11:46:13.465724 scan_static_bus for PCI: 00:15.1 done
1036 11:46:13.465779 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1037 11:46:13.465835 PCI: 00:15.2 scanning...
1038 11:46:13.465890 scan_static_bus for PCI: 00:15.2
1039 11:46:13.465945 scan_static_bus for PCI: 00:15.2 done
1040 11:46:13.466001 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1041 11:46:13.466056 PCI: 00:15.3 scanning...
1042 11:46:13.466111 scan_static_bus for PCI: 00:15.3
1043 11:46:13.466166 scan_static_bus for PCI: 00:15.3 done
1044 11:46:13.466222 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1045 11:46:13.466277 PCI: 00:19.1 scanning...
1046 11:46:13.466332 scan_static_bus for PCI: 00:19.1
1047 11:46:13.466386 I2C: 00:15 enabled
1048 11:46:13.466441 scan_static_bus for PCI: 00:19.1 done
1049 11:46:13.466497 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1050 11:46:13.466553 PCI: 00:1d.0 scanning...
1051 11:46:13.466608 do_pci_scan_bridge for PCI: 00:1d.0
1052 11:46:13.466663 PCI: pci_scan_bus for bus 01
1053 11:46:13.466719 PCI: 01:00.0 [1c5c/174a] enabled
1054 11:46:13.466774 GENERIC: 0.0 enabled
1055 11:46:13.466829 Enabling Common Clock Configuration
1056 11:46:13.466884 L1 Sub-State supported from root port 29
1057 11:46:13.466940 L1 Sub-State Support = 0xf
1058 11:46:13.466995 CommonModeRestoreTime = 0x28
1059 11:46:13.467051 Power On Value = 0x16, Power On Scale = 0x0
1060 11:46:13.467107 ASPM: Enabled L1
1061 11:46:13.467162 PCIe: Max_Payload_Size adjusted to 128
1062 11:46:13.467217 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1063 11:46:13.467273 PCI: 00:1e.2 scanning...
1064 11:46:13.467328 scan_generic_bus for PCI: 00:1e.2
1065 11:46:13.467383 SPI: 00 enabled
1066 11:46:13.467439 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1067 11:46:13.467495 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1068 11:46:13.467551 PCI: 00:1e.3 scanning...
1069 11:46:13.467606 scan_generic_bus for PCI: 00:1e.3
1070 11:46:13.467661 SPI: 00 enabled
1071 11:46:13.467716 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1072 11:46:13.467772 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1073 11:46:13.467827 PCI: 00:1f.0 scanning...
1074 11:46:13.467902 scan_static_bus for PCI: 00:1f.0
1075 11:46:13.467960 PNP: 0c09.0 enabled
1076 11:46:13.468017 PNP: 0c09.0 scanning...
1077 11:46:13.468072 scan_static_bus for PNP: 0c09.0
1078 11:46:13.468128 scan_static_bus for PNP: 0c09.0 done
1079 11:46:13.468183 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1080 11:46:13.468239 scan_static_bus for PCI: 00:1f.0 done
1081 11:46:13.468294 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1082 11:46:13.468350 PCI: 00:1f.2 scanning...
1083 11:46:13.468405 scan_static_bus for PCI: 00:1f.2
1084 11:46:13.468460 GENERIC: 0.0 enabled
1085 11:46:13.468515 GENERIC: 0.0 scanning...
1086 11:46:13.468570 scan_static_bus for GENERIC: 0.0
1087 11:46:13.468625 GENERIC: 0.0 enabled
1088 11:46:13.468680 GENERIC: 1.0 enabled
1089 11:46:13.468735 scan_static_bus for GENERIC: 0.0 done
1090 11:46:13.468790 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1091 11:46:13.468846 scan_static_bus for PCI: 00:1f.2 done
1092 11:46:13.468901 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1093 11:46:13.468957 PCI: 00:1f.3 scanning...
1094 11:46:13.469013 scan_static_bus for PCI: 00:1f.3
1095 11:46:13.469068 scan_static_bus for PCI: 00:1f.3 done
1096 11:46:13.469124 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1097 11:46:13.469179 PCI: 00:1f.5 scanning...
1098 11:46:13.469235 scan_generic_bus for PCI: 00:1f.5
1099 11:46:13.469290 scan_generic_bus for PCI: 00:1f.5 done
1100 11:46:13.469351 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1101 11:46:13.469406 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1102 11:46:13.469462 scan_static_bus for Root Device done
1103 11:46:13.469517 scan_bus: bus Root Device finished in 736 msecs
1104 11:46:13.469573 done
1105 11:46:13.469628 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1106 11:46:13.469684 Chrome EC: UHEPI supported
1107 11:46:13.469739 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1108 11:46:13.469795 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1109 11:46:13.469851 SPI flash protection: WPSW=1 SRP0=0
1110 11:46:13.469907 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1111 11:46:13.469962 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1112 11:46:13.470018 found VGA at PCI: 00:02.0
1113 11:46:13.470074 Setting up VGA for PCI: 00:02.0
1114 11:46:13.470325 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1115 11:46:13.470390 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1116 11:46:13.470446 Allocating resources...
1117 11:46:13.470502 Reading resources...
1118 11:46:13.470557 Root Device read_resources bus 0 link: 0
1119 11:46:13.470613 DOMAIN: 0000 read_resources bus 0 link: 0
1120 11:46:13.470669 PCI: 00:04.0 read_resources bus 1 link: 0
1121 11:46:13.470724 PCI: 00:04.0 read_resources bus 1 link: 0 done
1122 11:46:13.470780 PCI: 00:0d.0 read_resources bus 0 link: 0
1123 11:46:13.470836 USB0 port 0 read_resources bus 0 link: 0
1124 11:46:13.470891 USB0 port 0 read_resources bus 0 link: 0 done
1125 11:46:13.470946 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1126 11:46:13.471001 PCI: 00:14.0 read_resources bus 0 link: 0
1127 11:46:13.471056 USB0 port 0 read_resources bus 0 link: 0
1128 11:46:13.471110 USB0 port 0 read_resources bus 0 link: 0 done
1129 11:46:13.471185 PCI: 00:14.0 read_resources bus 0 link: 0 done
1130 11:46:13.471243 PCI: 00:14.3 read_resources bus 0 link: 0
1131 11:46:13.471299 PCI: 00:14.3 read_resources bus 0 link: 0 done
1132 11:46:13.471354 PCI: 00:15.0 read_resources bus 0 link: 0
1133 11:46:13.471410 PCI: 00:15.0 read_resources bus 0 link: 0 done
1134 11:46:13.471465 PCI: 00:15.1 read_resources bus 0 link: 0
1135 11:46:13.471521 PCI: 00:15.1 read_resources bus 0 link: 0 done
1136 11:46:13.471576 PCI: 00:19.1 read_resources bus 0 link: 0
1137 11:46:13.471631 PCI: 00:19.1 read_resources bus 0 link: 0 done
1138 11:46:13.471686 PCI: 00:1d.0 read_resources bus 1 link: 0
1139 11:46:13.471741 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1140 11:46:13.471797 PCI: 00:1e.2 read_resources bus 2 link: 0
1141 11:46:13.471853 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1142 11:46:13.471908 PCI: 00:1e.3 read_resources bus 3 link: 0
1143 11:46:13.471963 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1144 11:46:13.472019 PCI: 00:1f.0 read_resources bus 0 link: 0
1145 11:46:13.472074 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1146 11:46:13.472129 PCI: 00:1f.2 read_resources bus 0 link: 0
1147 11:46:13.472185 GENERIC: 0.0 read_resources bus 0 link: 0
1148 11:46:13.472240 GENERIC: 0.0 read_resources bus 0 link: 0 done
1149 11:46:13.472295 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1150 11:46:13.472351 DOMAIN: 0000 read_resources bus 0 link: 0 done
1151 11:46:13.472406 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1152 11:46:13.472462 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1153 11:46:13.472517 Root Device read_resources bus 0 link: 0 done
1154 11:46:13.472573 Done reading resources.
1155 11:46:13.472629 Show resources in subtree (Root Device)...After reading.
1156 11:46:13.472685 Root Device child on link 0 DOMAIN: 0000
1157 11:46:13.472740 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1158 11:46:13.472797 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1159 11:46:13.472854 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1160 11:46:13.472910 PCI: 00:00.0
1161 11:46:13.472966 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1162 11:46:13.473022 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1163 11:46:13.473079 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1164 11:46:13.473135 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1165 11:46:13.473191 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1166 11:46:13.473247 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1167 11:46:13.473319 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1168 11:46:13.473378 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1169 11:46:13.473434 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1170 11:46:13.473490 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1171 11:46:13.473546 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1172 11:46:13.473602 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1173 11:46:13.473659 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1174 11:46:13.473714 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1175 11:46:13.473770 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1176 11:46:13.473826 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1177 11:46:13.473883 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1178 11:46:13.473939 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1179 11:46:13.473995 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1180 11:46:13.474238 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1181 11:46:13.474303 PCI: 00:02.0
1182 11:46:13.474359 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1183 11:46:13.474417 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1184 11:46:13.474474 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1185 11:46:13.474532 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1186 11:46:13.474604 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1187 11:46:13.474662 GENERIC: 0.0
1188 11:46:13.474717 PCI: 00:05.0
1189 11:46:13.474773 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1190 11:46:13.474830 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1191 11:46:13.474886 GENERIC: 0.0
1192 11:46:13.474941 PCI: 00:08.0
1193 11:46:13.474997 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 11:46:13.475053 PCI: 00:0a.0
1195 11:46:13.475108 PCI: 00:0d.0 child on link 0 USB0 port 0
1196 11:46:13.475164 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1197 11:46:13.475220 USB0 port 0 child on link 0 USB3 port 0
1198 11:46:13.475276 USB3 port 0
1199 11:46:13.475331 USB3 port 1
1200 11:46:13.475387 USB3 port 2
1201 11:46:13.475442 USB3 port 3
1202 11:46:13.475497 PCI: 00:14.0 child on link 0 USB0 port 0
1203 11:46:13.475566 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1204 11:46:13.481152 USB0 port 0 child on link 0 USB2 port 0
1205 11:46:13.481265 USB2 port 0
1206 11:46:13.484629 USB2 port 1
1207 11:46:13.484713 USB2 port 2
1208 11:46:13.488024 USB2 port 3
1209 11:46:13.488107 USB2 port 4
1210 11:46:13.491396 USB2 port 5
1211 11:46:13.491513 USB2 port 6
1212 11:46:13.494780 USB2 port 7
1213 11:46:13.494867 USB2 port 8
1214 11:46:13.498072 USB2 port 9
1215 11:46:13.498156 USB3 port 0
1216 11:46:13.501450 USB3 port 1
1217 11:46:13.501534 USB3 port 2
1218 11:46:13.504490 USB3 port 3
1219 11:46:13.504573 PCI: 00:14.2
1220 11:46:13.514433 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1221 11:46:13.524372 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1222 11:46:13.531197 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1223 11:46:13.541287 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1224 11:46:13.541410 GENERIC: 0.0
1225 11:46:13.547631 PCI: 00:15.0 child on link 0 I2C: 00:1a
1226 11:46:13.558028 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1227 11:46:13.558118 I2C: 00:1a
1228 11:46:13.560999 I2C: 00:31
1229 11:46:13.561119 I2C: 00:32
1230 11:46:13.564486 PCI: 00:15.1 child on link 0 I2C: 00:10
1231 11:46:13.574512 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1232 11:46:13.578108 I2C: 00:10
1233 11:46:13.578181 PCI: 00:15.2
1234 11:46:13.588042 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1235 11:46:13.591023 PCI: 00:15.3
1236 11:46:13.601075 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1237 11:46:13.601160 PCI: 00:16.0
1238 11:46:13.611373 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1239 11:46:13.614535 PCI: 00:19.0
1240 11:46:13.617784 PCI: 00:19.1 child on link 0 I2C: 00:15
1241 11:46:13.627982 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1242 11:46:13.628108 I2C: 00:15
1243 11:46:13.634688 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1244 11:46:13.641560 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1245 11:46:13.651396 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1246 11:46:13.661661 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1247 11:46:13.661775 GENERIC: 0.0
1248 11:46:13.664729 PCI: 01:00.0
1249 11:46:13.674591 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1250 11:46:13.684457 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1251 11:46:13.694796 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1252 11:46:13.694888 PCI: 00:1e.0
1253 11:46:13.707931 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1254 11:46:13.711427 PCI: 00:1e.2 child on link 0 SPI: 00
1255 11:46:13.720947 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1256 11:46:13.721036 SPI: 00
1257 11:46:13.724690 PCI: 00:1e.3 child on link 0 SPI: 00
1258 11:46:13.734524 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1259 11:46:13.737582 SPI: 00
1260 11:46:13.741115 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1261 11:46:13.750778 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1262 11:46:13.750869 PNP: 0c09.0
1263 11:46:13.760766 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1264 11:46:13.763980 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1265 11:46:13.774057 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1266 11:46:13.784064 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1267 11:46:13.787812 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1268 11:46:13.790739 GENERIC: 0.0
1269 11:46:13.790844 GENERIC: 1.0
1270 11:46:13.794292 PCI: 00:1f.3
1271 11:46:13.804198 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1272 11:46:13.814178 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1273 11:46:13.814287 PCI: 00:1f.5
1274 11:46:13.824223 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1275 11:46:13.827459 CPU_CLUSTER: 0 child on link 0 APIC: 00
1276 11:46:13.830523 APIC: 00
1277 11:46:13.830617 APIC: 01
1278 11:46:13.830714 APIC: 03
1279 11:46:13.834034 APIC: 05
1280 11:46:13.834136 APIC: 07
1281 11:46:13.837076 APIC: 06
1282 11:46:13.837179 APIC: 02
1283 11:46:13.837269 APIC: 04
1284 11:46:13.847130 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1285 11:46:13.850634 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1286 11:46:13.857170 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1287 11:46:13.864233 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1288 11:46:13.867165 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1289 11:46:13.874067 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1290 11:46:13.877176 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1291 11:46:13.883922 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1292 11:46:13.890812 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1293 11:46:13.900570 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1294 11:46:13.907455 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1295 11:46:13.914310 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1296 11:46:13.920963 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1297 11:46:13.927303 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1298 11:46:13.934045 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1299 11:46:13.937304 DOMAIN: 0000: Resource ranges:
1300 11:46:13.940839 * Base: 1000, Size: 800, Tag: 100
1301 11:46:13.944041 * Base: 1900, Size: e700, Tag: 100
1302 11:46:13.950784 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1303 11:46:13.957310 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1304 11:46:13.964053 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1305 11:46:13.970917 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1306 11:46:13.980727 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1307 11:46:13.987562 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1308 11:46:13.993722 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1309 11:46:14.004088 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1310 11:46:14.010798 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1311 11:46:14.017537 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1312 11:46:14.027209 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1313 11:46:14.034235 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1314 11:46:14.040475 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1315 11:46:14.050836 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1316 11:46:14.057193 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1317 11:46:14.063685 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1318 11:46:14.074073 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1319 11:46:14.080586 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1320 11:46:14.087386 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1321 11:46:14.097086 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1322 11:46:14.103891 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1323 11:46:14.110362 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1324 11:46:14.117160 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1325 11:46:14.127091 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1326 11:46:14.133654 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1327 11:46:14.137107 DOMAIN: 0000: Resource ranges:
1328 11:46:14.140061 * Base: 7fc00000, Size: 40400000, Tag: 200
1329 11:46:14.146883 * Base: d0000000, Size: 28000000, Tag: 200
1330 11:46:14.150240 * Base: fa000000, Size: 1000000, Tag: 200
1331 11:46:14.153647 * Base: fb001000, Size: 2fff000, Tag: 200
1332 11:46:14.160181 * Base: fe010000, Size: 2e000, Tag: 200
1333 11:46:14.163529 * Base: fe03f000, Size: d41000, Tag: 200
1334 11:46:14.167032 * Base: fed88000, Size: 8000, Tag: 200
1335 11:46:14.170249 * Base: fed93000, Size: d000, Tag: 200
1336 11:46:14.173678 * Base: feda2000, Size: 1e000, Tag: 200
1337 11:46:14.180063 * Base: fede0000, Size: 1220000, Tag: 200
1338 11:46:14.183614 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1339 11:46:14.190444 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1340 11:46:14.196967 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1341 11:46:14.203758 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1342 11:46:14.210324 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1343 11:46:14.216702 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1344 11:46:14.223364 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1345 11:46:14.230015 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1346 11:46:14.236553 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1347 11:46:14.243235 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1348 11:46:14.250348 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1349 11:46:14.256528 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1350 11:46:14.263205 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1351 11:46:14.270087 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1352 11:46:14.277066 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1353 11:46:14.283604 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1354 11:46:14.290147 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1355 11:46:14.296555 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1356 11:46:14.303414 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1357 11:46:14.310085 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1358 11:46:14.316518 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1359 11:46:14.323415 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1360 11:46:14.329904 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1361 11:46:14.336714 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1362 11:46:14.346536 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1363 11:46:14.349789 PCI: 00:1d.0: Resource ranges:
1364 11:46:14.353204 * Base: 7fc00000, Size: 100000, Tag: 200
1365 11:46:14.360153 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1366 11:46:14.366821 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1367 11:46:14.373425 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1368 11:46:14.383316 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1369 11:46:14.390096 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1370 11:46:14.392986 Root Device assign_resources, bus 0 link: 0
1371 11:46:14.396478 DOMAIN: 0000 assign_resources, bus 0 link: 0
1372 11:46:14.406879 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1373 11:46:14.413678 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1374 11:46:14.423826 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1375 11:46:14.430487 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1376 11:46:14.437145 PCI: 00:04.0 assign_resources, bus 1 link: 0
1377 11:46:14.440242 PCI: 00:04.0 assign_resources, bus 1 link: 0
1378 11:46:14.446879 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1379 11:46:14.456851 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1380 11:46:14.463604 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1381 11:46:14.470474 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1382 11:46:14.473839 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1383 11:46:14.483679 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1384 11:46:14.487009 PCI: 00:14.0 assign_resources, bus 0 link: 0
1385 11:46:14.490241 PCI: 00:14.0 assign_resources, bus 0 link: 0
1386 11:46:14.500525 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1387 11:46:14.507242 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1388 11:46:14.517176 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1389 11:46:14.520454 PCI: 00:14.3 assign_resources, bus 0 link: 0
1390 11:46:14.523849 PCI: 00:14.3 assign_resources, bus 0 link: 0
1391 11:46:14.534103 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1392 11:46:14.537268 PCI: 00:15.0 assign_resources, bus 0 link: 0
1393 11:46:14.544046 PCI: 00:15.0 assign_resources, bus 0 link: 0
1394 11:46:14.550588 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1395 11:46:14.553971 PCI: 00:15.1 assign_resources, bus 0 link: 0
1396 11:46:14.561041 PCI: 00:15.1 assign_resources, bus 0 link: 0
1397 11:46:14.567343 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1398 11:46:14.577274 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1399 11:46:14.584149 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1400 11:46:14.593988 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1401 11:46:14.597553 PCI: 00:19.1 assign_resources, bus 0 link: 0
1402 11:46:14.600925 PCI: 00:19.1 assign_resources, bus 0 link: 0
1403 11:46:14.611128 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1404 11:46:14.621025 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1405 11:46:14.631180 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1406 11:46:14.634227 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1407 11:46:14.640797 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1408 11:46:14.651004 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1409 11:46:14.657898 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1410 11:46:14.661183 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1411 11:46:14.671680 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1412 11:46:14.674788 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1413 11:46:14.681771 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1414 11:46:14.688205 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1415 11:46:14.691259 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1416 11:46:14.698358 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1417 11:46:14.701581 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1418 11:46:14.708322 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1419 11:46:14.711648 LPC: Trying to open IO window from 800 size 1ff
1420 11:46:14.721743 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1421 11:46:14.728626 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1422 11:46:14.738647 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1423 11:46:14.741499 DOMAIN: 0000 assign_resources, bus 0 link: 0
1424 11:46:14.745251 Root Device assign_resources, bus 0 link: 0
1425 11:46:14.748419 Done setting resources.
1426 11:46:14.755008 Show resources in subtree (Root Device)...After assigning values.
1427 11:46:14.758372 Root Device child on link 0 DOMAIN: 0000
1428 11:46:14.765052 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1429 11:46:14.771751 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1430 11:46:14.781510 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1431 11:46:14.784767 PCI: 00:00.0
1432 11:46:14.794917 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1433 11:46:14.804549 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1434 11:46:14.811407 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1435 11:46:14.821618 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1436 11:46:14.831394 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1437 11:46:14.841201 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1438 11:46:14.851126 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1439 11:46:14.860960 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1440 11:46:14.867850 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1441 11:46:14.877870 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1442 11:46:14.888134 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1443 11:46:14.897778 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1444 11:46:14.907644 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1445 11:46:14.914571 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1446 11:46:14.924430 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1447 11:46:14.934357 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1448 11:46:14.944096 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1449 11:46:14.954259 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1450 11:46:14.964236 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1451 11:46:14.974120 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1452 11:46:14.974213 PCI: 00:02.0
1453 11:46:14.984347 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1454 11:46:14.994397 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1455 11:46:15.004125 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1456 11:46:15.010761 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1457 11:46:15.020827 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1458 11:46:15.020914 GENERIC: 0.0
1459 11:46:15.024221 PCI: 00:05.0
1460 11:46:15.034278 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1461 11:46:15.037713 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1462 11:46:15.040885 GENERIC: 0.0
1463 11:46:15.040988 PCI: 00:08.0
1464 11:46:15.050960 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1465 11:46:15.054516 PCI: 00:0a.0
1466 11:46:15.057703 PCI: 00:0d.0 child on link 0 USB0 port 0
1467 11:46:15.067449 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1468 11:46:15.074451 USB0 port 0 child on link 0 USB3 port 0
1469 11:46:15.074528 USB3 port 0
1470 11:46:15.077824 USB3 port 1
1471 11:46:15.077925 USB3 port 2
1472 11:46:15.081081 USB3 port 3
1473 11:46:15.084537 PCI: 00:14.0 child on link 0 USB0 port 0
1474 11:46:15.094245 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1475 11:46:15.101399 USB0 port 0 child on link 0 USB2 port 0
1476 11:46:15.101523 USB2 port 0
1477 11:46:15.104283 USB2 port 1
1478 11:46:15.104379 USB2 port 2
1479 11:46:15.107703 USB2 port 3
1480 11:46:15.107804 USB2 port 4
1481 11:46:15.111083 USB2 port 5
1482 11:46:15.111192 USB2 port 6
1483 11:46:15.114503 USB2 port 7
1484 11:46:15.114607 USB2 port 8
1485 11:46:15.117952 USB2 port 9
1486 11:46:15.118050 USB3 port 0
1487 11:46:15.121330 USB3 port 1
1488 11:46:15.121434 USB3 port 2
1489 11:46:15.124768 USB3 port 3
1490 11:46:15.124842 PCI: 00:14.2
1491 11:46:15.137813 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1492 11:46:15.147800 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1493 11:46:15.151113 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1494 11:46:15.161252 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1495 11:46:15.164572 GENERIC: 0.0
1496 11:46:15.167601 PCI: 00:15.0 child on link 0 I2C: 00:1a
1497 11:46:15.177736 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1498 11:46:15.177818 I2C: 00:1a
1499 11:46:15.181242 I2C: 00:31
1500 11:46:15.181369 I2C: 00:32
1501 11:46:15.187730 PCI: 00:15.1 child on link 0 I2C: 00:10
1502 11:46:15.197608 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1503 11:46:15.197690 I2C: 00:10
1504 11:46:15.200902 PCI: 00:15.2
1505 11:46:15.211082 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1506 11:46:15.211193 PCI: 00:15.3
1507 11:46:15.224486 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1508 11:46:15.224594 PCI: 00:16.0
1509 11:46:15.234310 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1510 11:46:15.237467 PCI: 00:19.0
1511 11:46:15.240977 PCI: 00:19.1 child on link 0 I2C: 00:15
1512 11:46:15.251180 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1513 11:46:15.254273 I2C: 00:15
1514 11:46:15.257465 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1515 11:46:15.267699 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1516 11:46:15.277496 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1517 11:46:15.287205 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1518 11:46:15.290994 GENERIC: 0.0
1519 11:46:15.291080 PCI: 01:00.0
1520 11:46:15.304221 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1521 11:46:15.314019 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1522 11:46:15.323732 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1523 11:46:15.323821 PCI: 00:1e.0
1524 11:46:15.336982 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1525 11:46:15.340400 PCI: 00:1e.2 child on link 0 SPI: 00
1526 11:46:15.350571 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1527 11:46:15.350660 SPI: 00
1528 11:46:15.357174 PCI: 00:1e.3 child on link 0 SPI: 00
1529 11:46:15.366989 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1530 11:46:15.367115 SPI: 00
1531 11:46:15.370356 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1532 11:46:15.380521 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1533 11:46:15.383489 PNP: 0c09.0
1534 11:46:15.390523 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1535 11:46:15.397147 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1536 11:46:15.403530 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1537 11:46:15.413565 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1538 11:46:15.420551 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1539 11:46:15.420640 GENERIC: 0.0
1540 11:46:15.423772 GENERIC: 1.0
1541 11:46:15.423861 PCI: 00:1f.3
1542 11:46:15.433550 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1543 11:46:15.443630 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1544 11:46:15.447086 PCI: 00:1f.5
1545 11:46:15.457131 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1546 11:46:15.460252 CPU_CLUSTER: 0 child on link 0 APIC: 00
1547 11:46:15.463611 APIC: 00
1548 11:46:15.463695 APIC: 01
1549 11:46:15.463761 APIC: 03
1550 11:46:15.466826 APIC: 05
1551 11:46:15.466909 APIC: 07
1552 11:46:15.470288 APIC: 06
1553 11:46:15.470370 APIC: 02
1554 11:46:15.470435 APIC: 04
1555 11:46:15.473937 Done allocating resources.
1556 11:46:15.480069 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1557 11:46:15.486863 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1558 11:46:15.490429 Configure GPIOs for I2S audio on UP4.
1559 11:46:15.497050 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1560 11:46:15.500384 Enabling resources...
1561 11:46:15.503753 PCI: 00:00.0 subsystem <- 8086/9a12
1562 11:46:15.507209 PCI: 00:00.0 cmd <- 06
1563 11:46:15.510137 PCI: 00:02.0 subsystem <- 8086/9a40
1564 11:46:15.510220 PCI: 00:02.0 cmd <- 03
1565 11:46:15.517208 PCI: 00:04.0 subsystem <- 8086/9a03
1566 11:46:15.517291 PCI: 00:04.0 cmd <- 02
1567 11:46:15.520640 PCI: 00:05.0 subsystem <- 8086/9a19
1568 11:46:15.523641 PCI: 00:05.0 cmd <- 02
1569 11:46:15.527055 PCI: 00:08.0 subsystem <- 8086/9a11
1570 11:46:15.530751 PCI: 00:08.0 cmd <- 06
1571 11:46:15.533705 PCI: 00:0d.0 subsystem <- 8086/9a13
1572 11:46:15.537289 PCI: 00:0d.0 cmd <- 02
1573 11:46:15.540661 PCI: 00:14.0 subsystem <- 8086/a0ed
1574 11:46:15.544167 PCI: 00:14.0 cmd <- 02
1575 11:46:15.547581 PCI: 00:14.2 subsystem <- 8086/a0ef
1576 11:46:15.550444 PCI: 00:14.2 cmd <- 02
1577 11:46:15.553887 PCI: 00:14.3 subsystem <- 8086/a0f0
1578 11:46:15.554000 PCI: 00:14.3 cmd <- 02
1579 11:46:15.560735 PCI: 00:15.0 subsystem <- 8086/a0e8
1580 11:46:15.560824 PCI: 00:15.0 cmd <- 02
1581 11:46:15.564082 PCI: 00:15.1 subsystem <- 8086/a0e9
1582 11:46:15.567557 PCI: 00:15.1 cmd <- 02
1583 11:46:15.571005 PCI: 00:15.2 subsystem <- 8086/a0ea
1584 11:46:15.574196 PCI: 00:15.2 cmd <- 02
1585 11:46:15.577334 PCI: 00:15.3 subsystem <- 8086/a0eb
1586 11:46:15.580838 PCI: 00:15.3 cmd <- 02
1587 11:46:15.583812 PCI: 00:16.0 subsystem <- 8086/a0e0
1588 11:46:15.587137 PCI: 00:16.0 cmd <- 02
1589 11:46:15.590577 PCI: 00:19.1 subsystem <- 8086/a0c6
1590 11:46:15.594066 PCI: 00:19.1 cmd <- 02
1591 11:46:15.597105 PCI: 00:1d.0 bridge ctrl <- 0013
1592 11:46:15.600614 PCI: 00:1d.0 subsystem <- 8086/a0b0
1593 11:46:15.600695 PCI: 00:1d.0 cmd <- 06
1594 11:46:15.607437 PCI: 00:1e.0 subsystem <- 8086/a0a8
1595 11:46:15.607547 PCI: 00:1e.0 cmd <- 06
1596 11:46:15.610709 PCI: 00:1e.2 subsystem <- 8086/a0aa
1597 11:46:15.614110 PCI: 00:1e.2 cmd <- 06
1598 11:46:15.617691 PCI: 00:1e.3 subsystem <- 8086/a0ab
1599 11:46:15.621004 PCI: 00:1e.3 cmd <- 02
1600 11:46:15.624224 PCI: 00:1f.0 subsystem <- 8086/a087
1601 11:46:15.627539 PCI: 00:1f.0 cmd <- 407
1602 11:46:15.630926 PCI: 00:1f.3 subsystem <- 8086/a0c8
1603 11:46:15.634159 PCI: 00:1f.3 cmd <- 02
1604 11:46:15.637593 PCI: 00:1f.5 subsystem <- 8086/a0a4
1605 11:46:15.641130 PCI: 00:1f.5 cmd <- 406
1606 11:46:15.644183 PCI: 01:00.0 cmd <- 02
1607 11:46:15.648548 done.
1608 11:46:15.652076 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1609 11:46:15.654903 Initializing devices...
1610 11:46:15.658270 Root Device init
1611 11:46:15.661814 Chrome EC: Set SMI mask to 0x0000000000000000
1612 11:46:15.668561 Chrome EC: clear events_b mask to 0x0000000000000000
1613 11:46:15.675171 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1614 11:46:15.681661 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1615 11:46:15.685119 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1616 11:46:15.691440 Chrome EC: Set WAKE mask to 0x0000000000000000
1617 11:46:15.698061 fw_config match found: DB_USB=USB3_ACTIVE
1618 11:46:15.701551 Configure Right Type-C port orientation for retimer
1619 11:46:15.705101 Root Device init finished in 45 msecs
1620 11:46:15.709409 PCI: 00:00.0 init
1621 11:46:15.712655 CPU TDP = 9 Watts
1622 11:46:15.712737 CPU PL1 = 9 Watts
1623 11:46:15.716030 CPU PL2 = 40 Watts
1624 11:46:15.719102 CPU PL4 = 83 Watts
1625 11:46:15.722433 PCI: 00:00.0 init finished in 8 msecs
1626 11:46:15.722515 PCI: 00:02.0 init
1627 11:46:15.726102 GMA: Found VBT in CBFS
1628 11:46:15.729087 GMA: Found valid VBT in CBFS
1629 11:46:15.736005 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1630 11:46:15.742237 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1631 11:46:15.745706 PCI: 00:02.0 init finished in 18 msecs
1632 11:46:15.749036 PCI: 00:05.0 init
1633 11:46:15.752564 PCI: 00:05.0 init finished in 0 msecs
1634 11:46:15.755563 PCI: 00:08.0 init
1635 11:46:15.758763 PCI: 00:08.0 init finished in 0 msecs
1636 11:46:15.762536 PCI: 00:14.0 init
1637 11:46:15.765476 PCI: 00:14.0 init finished in 0 msecs
1638 11:46:15.768884 PCI: 00:14.2 init
1639 11:46:15.772252 PCI: 00:14.2 init finished in 0 msecs
1640 11:46:15.775656 PCI: 00:15.0 init
1641 11:46:15.775739 I2C bus 0 version 0x3230302a
1642 11:46:15.782456 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1643 11:46:15.785456 PCI: 00:15.0 init finished in 6 msecs
1644 11:46:15.785539 PCI: 00:15.1 init
1645 11:46:15.788952 I2C bus 1 version 0x3230302a
1646 11:46:15.792136 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1647 11:46:15.795352 PCI: 00:15.1 init finished in 6 msecs
1648 11:46:15.798870 PCI: 00:15.2 init
1649 11:46:15.802496 I2C bus 2 version 0x3230302a
1650 11:46:15.805551 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1651 11:46:15.809114 PCI: 00:15.2 init finished in 6 msecs
1652 11:46:15.812443 PCI: 00:15.3 init
1653 11:46:15.815730 I2C bus 3 version 0x3230302a
1654 11:46:15.819187 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1655 11:46:15.822551 PCI: 00:15.3 init finished in 6 msecs
1656 11:46:15.825660 PCI: 00:16.0 init
1657 11:46:15.828958 PCI: 00:16.0 init finished in 0 msecs
1658 11:46:15.832227 PCI: 00:19.1 init
1659 11:46:15.832335 I2C bus 5 version 0x3230302a
1660 11:46:15.839090 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1661 11:46:15.842334 PCI: 00:19.1 init finished in 6 msecs
1662 11:46:15.842406 PCI: 00:1d.0 init
1663 11:46:15.845764 Initializing PCH PCIe bridge.
1664 11:46:15.849140 PCI: 00:1d.0 init finished in 3 msecs
1665 11:46:15.853236 PCI: 00:1f.0 init
1666 11:46:15.856239 IOAPIC: Initializing IOAPIC at 0xfec00000
1667 11:46:15.863184 IOAPIC: Bootstrap Processor Local APIC = 0x00
1668 11:46:15.863265 IOAPIC: ID = 0x02
1669 11:46:15.866637 IOAPIC: Dumping registers
1670 11:46:15.869749 reg 0x0000: 0x02000000
1671 11:46:15.873164 reg 0x0001: 0x00770020
1672 11:46:15.873231 reg 0x0002: 0x00000000
1673 11:46:15.879615 PCI: 00:1f.0 init finished in 21 msecs
1674 11:46:15.879688 PCI: 00:1f.2 init
1675 11:46:15.883136 Disabling ACPI via APMC.
1676 11:46:15.886489 APMC done.
1677 11:46:15.889588 PCI: 00:1f.2 init finished in 5 msecs
1678 11:46:15.901536 PCI: 01:00.0 init
1679 11:46:15.904810 PCI: 01:00.0 init finished in 0 msecs
1680 11:46:15.908332 PNP: 0c09.0 init
1681 11:46:15.911464 Google Chrome EC uptime: 10.188 seconds
1682 11:46:15.918471 Google Chrome AP resets since EC boot: 0
1683 11:46:15.921706 Google Chrome most recent AP reset causes:
1684 11:46:15.928019 Google Chrome EC reset flags at last EC boot: reset-pin | hard
1685 11:46:15.931493 PNP: 0c09.0 init finished in 19 msecs
1686 11:46:15.936614 Devices initialized
1687 11:46:15.940189 Show all devs... After init.
1688 11:46:15.943689 Root Device: enabled 1
1689 11:46:15.943769 DOMAIN: 0000: enabled 1
1690 11:46:15.946887 CPU_CLUSTER: 0: enabled 1
1691 11:46:15.950253 PCI: 00:00.0: enabled 1
1692 11:46:15.953184 PCI: 00:02.0: enabled 1
1693 11:46:15.953268 PCI: 00:04.0: enabled 1
1694 11:46:15.956599 PCI: 00:05.0: enabled 1
1695 11:46:15.960193 PCI: 00:06.0: enabled 0
1696 11:46:15.963588 PCI: 00:07.0: enabled 0
1697 11:46:15.963683 PCI: 00:07.1: enabled 0
1698 11:46:15.967048 PCI: 00:07.2: enabled 0
1699 11:46:15.970000 PCI: 00:07.3: enabled 0
1700 11:46:15.973555 PCI: 00:08.0: enabled 1
1701 11:46:15.973651 PCI: 00:09.0: enabled 0
1702 11:46:15.976807 PCI: 00:0a.0: enabled 0
1703 11:46:15.980259 PCI: 00:0d.0: enabled 1
1704 11:46:15.980342 PCI: 00:0d.1: enabled 0
1705 11:46:15.983109 PCI: 00:0d.2: enabled 0
1706 11:46:15.986531 PCI: 00:0d.3: enabled 0
1707 11:46:15.989918 PCI: 00:0e.0: enabled 0
1708 11:46:15.990015 PCI: 00:10.2: enabled 1
1709 11:46:15.993251 PCI: 00:10.6: enabled 0
1710 11:46:15.996790 PCI: 00:10.7: enabled 0
1711 11:46:16.000121 PCI: 00:12.0: enabled 0
1712 11:46:16.000204 PCI: 00:12.6: enabled 0
1713 11:46:16.003032 PCI: 00:13.0: enabled 0
1714 11:46:16.006703 PCI: 00:14.0: enabled 1
1715 11:46:16.010063 PCI: 00:14.1: enabled 0
1716 11:46:16.010146 PCI: 00:14.2: enabled 1
1717 11:46:16.013164 PCI: 00:14.3: enabled 1
1718 11:46:16.016286 PCI: 00:15.0: enabled 1
1719 11:46:16.019816 PCI: 00:15.1: enabled 1
1720 11:46:16.019899 PCI: 00:15.2: enabled 1
1721 11:46:16.023236 PCI: 00:15.3: enabled 1
1722 11:46:16.026673 PCI: 00:16.0: enabled 1
1723 11:46:16.026755 PCI: 00:16.1: enabled 0
1724 11:46:16.029569 PCI: 00:16.2: enabled 0
1725 11:46:16.033079 PCI: 00:16.3: enabled 0
1726 11:46:16.036532 PCI: 00:16.4: enabled 0
1727 11:46:16.036615 PCI: 00:16.5: enabled 0
1728 11:46:16.039772 PCI: 00:17.0: enabled 0
1729 11:46:16.043141 PCI: 00:19.0: enabled 0
1730 11:46:16.046081 PCI: 00:19.1: enabled 1
1731 11:46:16.046202 PCI: 00:19.2: enabled 0
1732 11:46:16.049580 PCI: 00:1c.0: enabled 1
1733 11:46:16.052725 PCI: 00:1c.1: enabled 0
1734 11:46:16.056099 PCI: 00:1c.2: enabled 0
1735 11:46:16.056203 PCI: 00:1c.3: enabled 0
1736 11:46:16.059700 PCI: 00:1c.4: enabled 0
1737 11:46:16.063141 PCI: 00:1c.5: enabled 0
1738 11:46:16.063264 PCI: 00:1c.6: enabled 1
1739 11:46:16.066203 PCI: 00:1c.7: enabled 0
1740 11:46:16.069558 PCI: 00:1d.0: enabled 1
1741 11:46:16.073046 PCI: 00:1d.1: enabled 0
1742 11:46:16.073160 PCI: 00:1d.2: enabled 1
1743 11:46:16.076122 PCI: 00:1d.3: enabled 0
1744 11:46:16.079577 PCI: 00:1e.0: enabled 1
1745 11:46:16.082877 PCI: 00:1e.1: enabled 0
1746 11:46:16.082981 PCI: 00:1e.2: enabled 1
1747 11:46:16.086333 PCI: 00:1e.3: enabled 1
1748 11:46:16.089321 PCI: 00:1f.0: enabled 1
1749 11:46:16.092722 PCI: 00:1f.1: enabled 0
1750 11:46:16.092806 PCI: 00:1f.2: enabled 1
1751 11:46:16.096091 PCI: 00:1f.3: enabled 1
1752 11:46:16.099563 PCI: 00:1f.4: enabled 0
1753 11:46:16.102910 PCI: 00:1f.5: enabled 1
1754 11:46:16.102992 PCI: 00:1f.6: enabled 0
1755 11:46:16.106300 PCI: 00:1f.7: enabled 0
1756 11:46:16.109612 APIC: 00: enabled 1
1757 11:46:16.109696 GENERIC: 0.0: enabled 1
1758 11:46:16.112473 GENERIC: 0.0: enabled 1
1759 11:46:16.116329 GENERIC: 1.0: enabled 1
1760 11:46:16.119392 GENERIC: 0.0: enabled 1
1761 11:46:16.119475 GENERIC: 1.0: enabled 1
1762 11:46:16.122708 USB0 port 0: enabled 1
1763 11:46:16.126148 GENERIC: 0.0: enabled 1
1764 11:46:16.126231 USB0 port 0: enabled 1
1765 11:46:16.129225 GENERIC: 0.0: enabled 1
1766 11:46:16.132463 I2C: 00:1a: enabled 1
1767 11:46:16.135916 I2C: 00:31: enabled 1
1768 11:46:16.136020 I2C: 00:32: enabled 1
1769 11:46:16.139273 I2C: 00:10: enabled 1
1770 11:46:16.142528 I2C: 00:15: enabled 1
1771 11:46:16.142612 GENERIC: 0.0: enabled 0
1772 11:46:16.146051 GENERIC: 1.0: enabled 0
1773 11:46:16.149065 GENERIC: 0.0: enabled 1
1774 11:46:16.149138 SPI: 00: enabled 1
1775 11:46:16.152564 SPI: 00: enabled 1
1776 11:46:16.155795 PNP: 0c09.0: enabled 1
1777 11:46:16.155877 GENERIC: 0.0: enabled 1
1778 11:46:16.159254 USB3 port 0: enabled 1
1779 11:46:16.162718 USB3 port 1: enabled 1
1780 11:46:16.162793 USB3 port 2: enabled 0
1781 11:46:16.166251 USB3 port 3: enabled 0
1782 11:46:16.169099 USB2 port 0: enabled 0
1783 11:46:16.172547 USB2 port 1: enabled 1
1784 11:46:16.172631 USB2 port 2: enabled 1
1785 11:46:16.176000 USB2 port 3: enabled 0
1786 11:46:16.179412 USB2 port 4: enabled 1
1787 11:46:16.179489 USB2 port 5: enabled 0
1788 11:46:16.182810 USB2 port 6: enabled 0
1789 11:46:16.186232 USB2 port 7: enabled 0
1790 11:46:16.189148 USB2 port 8: enabled 0
1791 11:46:16.189217 USB2 port 9: enabled 0
1792 11:46:16.192657 USB3 port 0: enabled 0
1793 11:46:16.195637 USB3 port 1: enabled 1
1794 11:46:16.195708 USB3 port 2: enabled 0
1795 11:46:16.198973 USB3 port 3: enabled 0
1796 11:46:16.202443 GENERIC: 0.0: enabled 1
1797 11:46:16.206024 GENERIC: 1.0: enabled 1
1798 11:46:16.206096 APIC: 01: enabled 1
1799 11:46:16.208845 APIC: 03: enabled 1
1800 11:46:16.208915 APIC: 05: enabled 1
1801 11:46:16.212566 APIC: 07: enabled 1
1802 11:46:16.215825 APIC: 06: enabled 1
1803 11:46:16.215932 APIC: 02: enabled 1
1804 11:46:16.218890 APIC: 04: enabled 1
1805 11:46:16.222467 PCI: 01:00.0: enabled 1
1806 11:46:16.225566 BS: BS_DEV_INIT run times (exec / console): 32 / 536 ms
1807 11:46:16.232284 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1808 11:46:16.235926 ELOG: NV offset 0xf30000 size 0x1000
1809 11:46:16.242306 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1810 11:46:16.248900 ELOG: Event(17) added with size 13 at 2024-05-03 11:45:04 UTC
1811 11:46:16.255402 ELOG: Event(92) added with size 9 at 2024-05-03 11:45:04 UTC
1812 11:46:16.262388 ELOG: Event(93) added with size 9 at 2024-05-03 11:45:04 UTC
1813 11:46:16.269152 ELOG: Event(9E) added with size 10 at 2024-05-03 11:45:04 UTC
1814 11:46:16.275622 ELOG: Event(9F) added with size 14 at 2024-05-03 11:45:04 UTC
1815 11:46:16.279086 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1816 11:46:16.285821 ELOG: Event(A1) added with size 10 at 2024-05-03 11:45:04 UTC
1817 11:46:16.295737 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
1818 11:46:16.299076 ELOG: Event(A0) added with size 9 at 2024-05-03 11:45:04 UTC
1819 11:46:16.305501 elog_add_boot_reason: Logged dev mode boot
1820 11:46:16.312125 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1821 11:46:16.312208 Finalize devices...
1822 11:46:16.315295 Devices finalized
1823 11:46:16.318599 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1824 11:46:16.325564 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1825 11:46:16.332111 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1826 11:46:16.335241 ME: HFSTS1 : 0x80030055
1827 11:46:16.338876 ME: HFSTS2 : 0x30280116
1828 11:46:16.345419 ME: HFSTS3 : 0x00000050
1829 11:46:16.348576 ME: HFSTS4 : 0x00004000
1830 11:46:16.352033 ME: HFSTS5 : 0x00000000
1831 11:46:17.709760 ME: HFSTS6 : 0x00400006
1832 11:46:17.709900 ME: Manufacturing Mode : YES
1833 11:46:17.709969 ME: SPI Protection Mode Enabled : NO
1834 11:46:17.710032 ME: FW Partition Table : OK
1835 11:46:17.710091 ME: Bringup Loader Failure : NO
1836 11:46:17.710149 ME: Firmware Init Complete : NO
1837 11:46:17.710211 ME: Boot Options Present : NO
1838 11:46:17.710270 ME: Update In Progress : NO
1839 11:46:17.710326 ME: D0i3 Support : YES
1840 11:46:17.710384 ME: Low Power State Enabled : NO
1841 11:46:17.710440 ME: CPU Replaced : YES
1842 11:46:17.710496 ME: CPU Replacement Valid : YES
1843 11:46:17.710551 ME: Current Working State : 5
1844 11:46:17.710606 ME: Current Operation State : 1
1845 11:46:17.710660 ME: Current Operation Mode : 3
1846 11:46:17.710714 ME: Error Code : 0
1847 11:46:17.710771 ME: Enhanced Debug Mode : NO
1848 11:46:17.710827 ME: CPU Debug Disabled : YES
1849 11:46:17.710882 ME: TXT Support : NO
1850 11:46:17.710936 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1851 11:46:17.710995 ELOG: Event(91) added with size 10 at 2024-05-03 11:45:05 UTC
1852 11:46:17.711050 Chrome EC: clear events_b mask to 0x0000000020004000
1853 11:46:17.711104 BS: BS_WRITE_TABLES entry times (exec / console): 2 / 11 ms
1854 11:46:17.711160 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1855 11:46:17.711218 CBFS: 'fallback/slic' not found.
1856 11:46:17.711273 ACPI: Writing ACPI tables at 76b01000.
1857 11:46:17.711327 ACPI: * FACS
1858 11:46:17.711380 ACPI: * DSDT
1859 11:46:17.711434 Ramoops buffer: 0x100000@0x76a00000.
1860 11:46:17.711488 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1861 11:46:17.711547 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1862 11:46:17.711601 Google Chrome EC: version:
1863 11:46:17.711656 ro: voema_v2.0.7540-147f8d37d1
1864 11:46:17.711710 rw: voema_v2.0.7540-147f8d37d1
1865 11:46:17.711764 running image: 1
1866 11:46:17.711818 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1867 11:46:17.711872 ACPI: * FADT
1868 11:46:17.711929 SCI is IRQ9
1869 11:46:17.711987 ACPI: added table 1/32, length now 40
1870 11:46:17.712041 ACPI: * SSDT
1871 11:46:17.712095 Found 1 CPU(s) with 8 core(s) each.
1872 11:46:17.712149 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1873 11:46:17.712204 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1874 11:46:17.712257 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1875 11:46:17.712313 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1876 11:46:17.712368 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1877 11:46:17.712422 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1878 11:46:17.712476 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1879 11:46:17.712530 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1880 11:46:17.712583 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1881 11:46:17.712638 \_SB.PCI0.RP09: Added StorageD3Enable property
1882 11:46:17.712694 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1883 11:46:17.712752 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1884 11:46:17.712806 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1885 11:46:17.712861 PS2K: Passing 80 keymaps to kernel
1886 11:46:17.712918 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1887 11:46:17.712973 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1888 11:46:17.713027 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1889 11:46:17.713082 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1890 11:46:17.713136 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1891 11:46:17.713189 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1892 11:46:17.713243 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1893 11:46:17.713331 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1894 11:46:17.713388 ACPI: added table 2/32, length now 44
1895 11:46:17.713442 ACPI: * MCFG
1896 11:46:17.713496 ACPI: added table 3/32, length now 48
1897 11:46:17.713550 ACPI: * TPM2
1898 11:46:17.713603 TPM2 log created at 0x769f0000
1899 11:46:17.713661 ACPI: added table 4/32, length now 52
1900 11:46:17.713715 ACPI: * MADT
1901 11:46:17.713769 SCI is IRQ9
1902 11:46:17.713822 ACPI: added table 5/32, length now 56
1903 11:46:17.713876 current = 76b09850
1904 11:46:17.713929 ACPI: * DMAR
1905 11:46:17.713983 ACPI: added table 6/32, length now 60
1906 11:46:17.714040 ACPI: added table 7/32, length now 64
1907 11:46:17.714096 ACPI: * HPET
1908 11:46:17.714150 ACPI: added table 8/32, length now 68
1909 11:46:17.714204 ACPI: done.
1910 11:46:17.714261 ACPI tables: 35216 bytes.
1911 11:46:17.714315 smbios_write_tables: 769ef000
1912 11:46:17.714369 EC returned error result code 3
1913 11:46:17.714426 Couldn't obtain OEM name from CBI
1914 11:46:17.714483 Create SMBIOS type 16
1915 11:46:17.714537 Create SMBIOS type 17
1916 11:46:17.714591 GENERIC: 0.0 (WIFI Device)
1917 11:46:17.714647 SMBIOS tables: 1750 bytes.
1918 11:46:17.714700 Writing table forward entry at 0x00000500
1919 11:46:17.714754 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1920 11:46:17.714809 Writing coreboot table at 0x76b25000
1921 11:46:17.714862 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1922 11:46:17.714916 1. 0000000000001000-000000000009ffff: RAM
1923 11:46:17.714975 2. 00000000000a0000-00000000000fffff: RESERVED
1924 11:46:17.715031 3. 0000000000100000-00000000769eefff: RAM
1925 11:46:17.715088 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1926 11:46:17.715142 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1927 11:46:17.715199 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1928 11:46:17.715254 7. 0000000077000000-000000007fbfffff: RESERVED
1929 11:46:17.715308 8. 00000000c0000000-00000000cfffffff: RESERVED
1930 11:46:17.715562 9. 00000000f8000000-00000000f9ffffff: RESERVED
1931 11:46:17.715623 10. 00000000fb000000-00000000fb000fff: RESERVED
1932 11:46:17.715682 11. 00000000fe000000-00000000fe00ffff: RESERVED
1933 11:46:17.715739 12. 00000000fed80000-00000000fed87fff: RESERVED
1934 11:46:17.715799 13. 00000000fed90000-00000000fed92fff: RESERVED
1935 11:46:17.715855 14. 00000000feda0000-00000000feda1fff: RESERVED
1936 11:46:17.715910 15. 00000000fedc0000-00000000feddffff: RESERVED
1937 11:46:17.715966 16. 0000000100000000-00000002803fffff: RAM
1938 11:46:17.716022 Passing 4 GPIOs to payload:
1939 11:46:17.716077 NAME | PORT | POLARITY | VALUE
1940 11:46:17.716135 lid | undefined | high | high
1941 11:46:17.716196 power | undefined | high | low
1942 11:46:17.716283 oprom | undefined | high | low
1943 11:46:17.716371 EC in RW | 0x000000e5 | high | low
1944 11:46:17.716458 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 9d30
1945 11:46:17.716545 coreboot table: 1576 bytes.
1946 11:46:17.716631 IMD ROOT 0. 0x76fff000 0x00001000
1947 11:46:17.716717 IMD SMALL 1. 0x76ffe000 0x00001000
1948 11:46:17.716806 FSP MEMORY 2. 0x76c4e000 0x003b0000
1949 11:46:17.716892 VPD 3. 0x76c4d000 0x00000367
1950 11:46:17.716978 RO MCACHE 4. 0x76c4c000 0x00000fdc
1951 11:46:17.717064 CONSOLE 5. 0x76c2c000 0x00020000
1952 11:46:17.717152 FMAP 6. 0x76c2b000 0x00000578
1953 11:46:17.717238 TIME STAMP 7. 0x76c2a000 0x00000910
1954 11:46:17.717328 VBOOT WORK 8. 0x76c16000 0x00014000
1955 11:46:17.717386 ROMSTG STCK 9. 0x76c15000 0x00001000
1956 11:46:17.717442 AFTER CAR 10. 0x76c0a000 0x0000b000
1957 11:46:17.717500 RAMSTAGE 11. 0x76b97000 0x00073000
1958 11:46:17.717559 REFCODE 12. 0x76b42000 0x00055000
1959 11:46:17.717615 SMM BACKUP 13. 0x76b32000 0x00010000
1960 11:46:17.717673 4f444749 14. 0x76b30000 0x00002000
1961 11:46:17.717730 EXT VBT15. 0x76b2d000 0x0000219f
1962 11:46:17.717786 COREBOOT 16. 0x76b25000 0x00008000
1963 11:46:17.717841 ACPI 17. 0x76b01000 0x00024000
1964 11:46:17.717897 ACPI GNVS 18. 0x76b00000 0x00001000
1965 11:46:17.717951 RAMOOPS 19. 0x76a00000 0x00100000
1966 11:46:17.718007 TPM2 TCGLOG20. 0x769f0000 0x00010000
1967 11:46:17.718065 SMBIOS 21. 0x769ef000 0x00000800
1968 11:46:17.718123 IMD small region:
1969 11:46:17.718179 IMD ROOT 0. 0x76ffec00 0x00000400
1970 11:46:17.718235 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1971 11:46:17.718289 POWER STATE 2. 0x76ffeb80 0x00000044
1972 11:46:17.718345 ROMSTAGE 3. 0x76ffeb60 0x00000004
1973 11:46:17.718400 MEM INFO 4. 0x76ffe980 0x000001e0
1974 11:46:17.718458 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1975 11:46:17.718514 MTRR: Physical address space:
1976 11:46:17.718569 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1977 11:46:17.718630 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1978 11:46:17.718694 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1979 11:46:17.718785 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1980 11:46:17.718876 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1981 11:46:17.718966 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1982 11:46:17.719055 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1983 11:46:17.719144 MTRR: Fixed MSR 0x250 0x0606060606060606
1984 11:46:17.719232 MTRR: Fixed MSR 0x258 0x0606060606060606
1985 11:46:17.719319 MTRR: Fixed MSR 0x259 0x0000000000000000
1986 11:46:17.719405 MTRR: Fixed MSR 0x268 0x0606060606060606
1987 11:46:17.719490 MTRR: Fixed MSR 0x269 0x0606060606060606
1988 11:46:17.719575 MTRR: Fixed MSR 0x26a 0x0606060606060606
1989 11:46:17.719663 MTRR: Fixed MSR 0x26b 0x0606060606060606
1990 11:46:17.719748 MTRR: Fixed MSR 0x26c 0x0606060606060606
1991 11:46:17.719837 MTRR: Fixed MSR 0x26d 0x0606060606060606
1992 11:46:17.719923 MTRR: Fixed MSR 0x26e 0x0606060606060606
1993 11:46:17.720009 MTRR: Fixed MSR 0x26f 0x0606060606060606
1994 11:46:17.720093 call enable_fixed_mtrr()
1995 11:46:17.720180 CPU physical address size: 39 bits
1996 11:46:17.720266 MTRR: default type WB/UC MTRR counts: 6/6.
1997 11:46:17.720351 MTRR: UC selected as default type.
1998 11:46:17.720437 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1999 11:46:17.720524 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2000 11:46:17.720595 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2001 11:46:17.720655 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2002 11:46:17.720711 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2003 11:46:17.720784 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2004 11:46:17.720869
2005 11:46:17.720954 MTRR check
2006 11:46:17.721039 Fixed MTRRs : Enabled
2007 11:46:17.721125 Variable MTRRs: Enabled
2008 11:46:17.721212
2009 11:46:17.721302 MTRR: Fixed MSR 0x250 0x0606060606060606
2010 11:46:17.721363 MTRR: Fixed MSR 0x258 0x0606060606060606
2011 11:46:17.721419 MTRR: Fixed MSR 0x259 0x0000000000000000
2012 11:46:17.721475 MTRR: Fixed MSR 0x268 0x0606060606060606
2013 11:46:17.721533 MTRR: Fixed MSR 0x269 0x0606060606060606
2014 11:46:17.721589 MTRR: Fixed MSR 0x26a 0x0606060606060606
2015 11:46:17.721644 MTRR: Fixed MSR 0x26b 0x0606060606060606
2016 11:46:17.721699 MTRR: Fixed MSR 0x26c 0x0606060606060606
2017 11:46:17.721755 MTRR: Fixed MSR 0x26d 0x0606060606060606
2018 11:46:17.721810 MTRR: Fixed MSR 0x26e 0x0606060606060606
2019 11:46:17.721864 MTRR: Fixed MSR 0x26f 0x0606060606060606
2020 11:46:17.721922 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2021 11:46:17.721982 call enable_fixed_mtrr()
2022 11:46:17.722037 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2023 11:46:17.722094 CPU physical address size: 39 bits
2024 11:46:17.722380 Checking segment from ROM address 0xffc02b38
2025 11:46:17.722475 MTRR: Fixed MSR 0x250 0x0606060606060606
2026 11:46:17.722564 MTRR: Fixed MSR 0x250 0x0606060606060606
2027 11:46:17.722650 MTRR: Fixed MSR 0x258 0x0606060606060606
2028 11:46:17.722736 MTRR: Fixed MSR 0x259 0x0000000000000000
2029 11:46:17.722822 MTRR: Fixed MSR 0x268 0x0606060606060606
2030 11:46:17.722911 MTRR: Fixed MSR 0x269 0x0606060606060606
2031 11:46:17.722997 MTRR: Fixed MSR 0x26a 0x0606060606060606
2032 11:46:17.723085 MTRR: Fixed MSR 0x26b 0x0606060606060606
2033 11:46:17.723171 MTRR: Fixed MSR 0x26c 0x0606060606060606
2034 11:46:17.723258 MTRR: Fixed MSR 0x26d 0x0606060606060606
2035 11:46:17.723345 MTRR: Fixed MSR 0x26e 0x0606060606060606
2036 11:46:17.723431 MTRR: Fixed MSR 0x26f 0x0606060606060606
2037 11:46:17.723517 MTRR: Fixed MSR 0x258 0x0606060606060606
2038 11:46:17.723603 MTRR: Fixed MSR 0x259 0x0000000000000000
2039 11:46:17.723690 MTRR: Fixed MSR 0x268 0x0606060606060606
2040 11:46:17.723776 MTRR: Fixed MSR 0x269 0x0606060606060606
2041 11:46:17.723864 MTRR: Fixed MSR 0x26a 0x0606060606060606
2042 11:46:17.723950 MTRR: Fixed MSR 0x26b 0x0606060606060606
2043 11:46:17.724038 MTRR: Fixed MSR 0x26c 0x0606060606060606
2044 11:46:17.724124 MTRR: Fixed MSR 0x26d 0x0606060606060606
2045 11:46:17.724211 MTRR: Fixed MSR 0x26e 0x0606060606060606
2046 11:46:17.724298 MTRR: Fixed MSR 0x26f 0x0606060606060606
2047 11:46:17.724384 call enable_fixed_mtrr()
2048 11:46:17.724469 call enable_fixed_mtrr()
2049 11:46:17.724554 MTRR: Fixed MSR 0x250 0x0606060606060606
2050 11:46:17.724625 MTRR: Fixed MSR 0x250 0x0606060606060606
2051 11:46:17.724682 MTRR: Fixed MSR 0x258 0x0606060606060606
2052 11:46:17.724737 MTRR: Fixed MSR 0x259 0x0000000000000000
2053 11:46:17.724792 MTRR: Fixed MSR 0x268 0x0606060606060606
2054 11:46:17.724848 MTRR: Fixed MSR 0x269 0x0606060606060606
2055 11:46:17.724903 MTRR: Fixed MSR 0x26a 0x0606060606060606
2056 11:46:17.724958 MTRR: Fixed MSR 0x26b 0x0606060606060606
2057 11:46:17.725039 MTRR: Fixed MSR 0x26c 0x0606060606060606
2058 11:46:17.725125 MTRR: Fixed MSR 0x26d 0x0606060606060606
2059 11:46:17.725212 MTRR: Fixed MSR 0x26e 0x0606060606060606
2060 11:46:17.725312 MTRR: Fixed MSR 0x26f 0x0606060606060606
2061 11:46:17.725400 MTRR: Fixed MSR 0x258 0x0606060606060606
2062 11:46:17.725460 call enable_fixed_mtrr()
2063 11:46:17.725516 MTRR: Fixed MSR 0x259 0x0000000000000000
2064 11:46:17.725574 MTRR: Fixed MSR 0x268 0x0606060606060606
2065 11:46:17.725633 MTRR: Fixed MSR 0x269 0x0606060606060606
2066 11:46:17.725688 MTRR: Fixed MSR 0x26a 0x0606060606060606
2067 11:46:17.725744 MTRR: Fixed MSR 0x26b 0x0606060606060606
2068 11:46:17.725799 MTRR: Fixed MSR 0x26c 0x0606060606060606
2069 11:46:17.725855 MTRR: Fixed MSR 0x26d 0x0606060606060606
2070 11:46:17.725909 MTRR: Fixed MSR 0x26e 0x0606060606060606
2071 11:46:17.725969 MTRR: Fixed MSR 0x26f 0x0606060606060606
2072 11:46:17.726023 CPU physical address size: 39 bits
2073 11:46:17.726079 call enable_fixed_mtrr()
2074 11:46:17.726134 MTRR: Fixed MSR 0x250 0x0606060606060606
2075 11:46:17.726190 MTRR: Fixed MSR 0x250 0x0606060606060606
2076 11:46:17.726244 MTRR: Fixed MSR 0x258 0x0606060606060606
2077 11:46:17.726300 MTRR: Fixed MSR 0x259 0x0000000000000000
2078 11:46:17.726361 MTRR: Fixed MSR 0x268 0x0606060606060606
2079 11:46:17.726448 MTRR: Fixed MSR 0x269 0x0606060606060606
2080 11:46:17.726535 MTRR: Fixed MSR 0x26a 0x0606060606060606
2081 11:46:17.726621 MTRR: Fixed MSR 0x26b 0x0606060606060606
2082 11:46:17.726709 MTRR: Fixed MSR 0x26c 0x0606060606060606
2083 11:46:17.726796 MTRR: Fixed MSR 0x26d 0x0606060606060606
2084 11:46:17.726883 MTRR: Fixed MSR 0x26e 0x0606060606060606
2085 11:46:17.726969 MTRR: Fixed MSR 0x26f 0x0606060606060606
2086 11:46:17.727055 MTRR: Fixed MSR 0x258 0x0606060606060606
2087 11:46:17.727140 call enable_fixed_mtrr()
2088 11:46:17.727225 MTRR: Fixed MSR 0x259 0x0000000000000000
2089 11:46:17.727314 MTRR: Fixed MSR 0x268 0x0606060606060606
2090 11:46:17.727400 MTRR: Fixed MSR 0x269 0x0606060606060606
2091 11:46:17.727487 MTRR: Fixed MSR 0x26a 0x0606060606060606
2092 11:46:17.727573 MTRR: Fixed MSR 0x26b 0x0606060606060606
2093 11:46:17.727658 MTRR: Fixed MSR 0x26c 0x0606060606060606
2094 11:46:17.727747 MTRR: Fixed MSR 0x26d 0x0606060606060606
2095 11:46:17.727833 MTRR: Fixed MSR 0x26e 0x0606060606060606
2096 11:46:17.727918 MTRR: Fixed MSR 0x26f 0x0606060606060606
2097 11:46:17.728003 CPU physical address size: 39 bits
2098 11:46:17.728090 call enable_fixed_mtrr()
2099 11:46:17.728176 CPU physical address size: 39 bits
2100 11:46:17.728262 Checking segment from ROM address 0xffc02b54
2101 11:46:17.728347 CPU physical address size: 39 bits
2102 11:46:17.728433 CPU physical address size: 39 bits
2103 11:46:17.728492 CPU physical address size: 39 bits
2104 11:46:17.728549 Loading segment from ROM address 0xffc02b38
2105 11:46:17.728605 code (compression=0)
2106 11:46:17.728664 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2107 11:46:17.728721 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2108 11:46:17.728777 it's not compressed!
2109 11:46:17.728837 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2110 11:46:17.728939 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2111 11:46:17.729028 Loading segment from ROM address 0xffc02b54
2112 11:46:17.729116 Entry Point 0x30000000
2113 11:46:17.729202 Loaded segments
2114 11:46:17.729290 BS: BS_PAYLOAD_LOAD run times (exec / console): 458 / 64 ms
2115 11:46:17.729391 Finalizing chipset.
2116 11:46:17.729496 Finalizing SMM.
2117 11:46:17.729584 APMC done.
2118 11:46:17.732094 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2119 11:46:17.735386 mp_park_aps done after 0 msecs.
2120 11:46:17.738785 Jumping to boot code at 0x30000000(0x76b25000)
2121 11:46:17.748769 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2122 11:46:17.748877
2123 11:46:17.748976
2124 11:46:17.749072
2125 11:46:17.752034 Starting depthcharge on Voema...
2126 11:46:17.752140
2127 11:46:17.752515 end: 2.2.3 depthcharge-start (duration 00:00:04) [common]
2128 11:46:17.752643 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
2129 11:46:17.752732 Setting prompt string to ['volteer:']
2130 11:46:17.752816 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:47)
2131 11:46:17.762181 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2132 11:46:17.762298
2133 11:46:17.768754 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2134 11:46:17.768841
2135 11:46:17.772238 Looking for NVMe Controller 0x3005f238 @ 00:1d:00
2136 11:46:17.776276
2137 11:46:17.776360 Failed to find eMMC card reader
2138 11:46:17.776429
2139 11:46:17.779573 Wipe memory regions:
2140 11:46:17.779654
2141 11:46:17.782989 [0x00000000001000, 0x000000000a0000)
2142 11:46:17.783089
2143 11:46:17.786321 [0x00000000100000, 0x00000030000000)
2144 11:46:17.813534
2145 11:46:17.816738 [0x00000032662db0, 0x000000769ef000)
2146 11:46:17.851980
2147 11:46:17.855479 [0x00000100000000, 0x00000280400000)
2148 11:46:18.055661
2149 11:46:18.059098 ec_init: CrosEC protocol v3 supported (256, 256)
2150 11:46:18.059207
2151 11:46:18.065632 update_port_state: port C0 state: usb enable 1 mux conn 0
2152 11:46:18.065735
2153 11:46:18.075323 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2154 11:46:18.075438
2155 11:46:18.082027 pmc_check_ipc_sts: STS_BUSY done after 1512 us
2156 11:46:18.082107
2157 11:46:18.085244 send_conn_disc_msg: pmc_send_cmd succeeded
2158 11:46:18.517995
2159 11:46:18.518161 R8152: Initializing
2160 11:46:18.518257
2161 11:46:18.521103 Version 6 (ocp_data = 5c30)
2162 11:46:18.521177
2163 11:46:18.524850 R8152: Done initializing
2164 11:46:18.524925
2165 11:46:18.528049 Adding net device
2166 11:46:18.830863
2167 11:46:18.834124 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2168 11:46:18.834260
2169 11:46:18.834355
2170 11:46:18.834433
2171 11:46:18.837631 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2173 11:46:18.937996 volteer: tftpboot 192.168.201.1 13627337/tftp-deploy-d15li98a/kernel/bzImage 13627337/tftp-deploy-d15li98a/kernel/cmdline 13627337/tftp-deploy-d15li98a/ramdisk/ramdisk.cpio.gz
2174 11:46:18.938168 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2175 11:46:18.938251 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:46)
2176 11:46:18.941961 tftpboot 192.168.201.1 13627337/tftp-deploy-d15li98a/kernel/bzIploy-d15li98a/kernel/cmdline 13627337/tftp-deploy-d15li98a/ramdisk/ramdisk.cpio.gz
2177 11:46:18.942075
2178 11:46:18.942169 Waiting for link
2179 11:46:19.145774
2180 11:46:19.145983 done.
2181 11:46:19.146091
2182 11:46:19.146195 MAC: 00:24:32:30:78:74
2183 11:46:19.146297
2184 11:46:19.148699 Sending DHCP discover... done.
2185 11:46:19.148814
2186 11:46:19.151970 Waiting for reply... done.
2187 11:46:19.152062
2188 11:46:19.155315 Sending DHCP request... done.
2189 11:46:19.155408
2190 11:46:19.158801 Waiting for reply... done.
2191 11:46:19.158873
2192 11:46:19.162010 My ip is 192.168.201.14
2193 11:46:19.162118
2194 11:46:19.165436 The DHCP server ip is 192.168.201.1
2195 11:46:19.165517
2196 11:46:19.168710 TFTP server IP predefined by user: 192.168.201.1
2197 11:46:19.168819
2198 11:46:19.175695 Bootfile predefined by user: 13627337/tftp-deploy-d15li98a/kernel/bzImage
2199 11:46:19.175773
2200 11:46:19.178941 Sending tftp read request... done.
2201 11:46:19.182196
2202 11:46:19.185764 Waiting for the transfer...
2203 11:46:19.185846
2204 11:46:19.839097 00000000 ################################################################
2205 11:46:19.839237
2206 11:46:20.500608 00080000 ################################################################
2207 11:46:20.500758
2208 11:46:21.164222 00100000 ################################################################
2209 11:46:21.164360
2210 11:46:21.836331 00180000 ################################################################
2211 11:46:21.836478
2212 11:46:22.508003 00200000 ################################################################
2213 11:46:22.508154
2214 11:46:23.177991 00280000 ################################################################
2215 11:46:23.178139
2216 11:46:23.844194 00300000 ################################################################
2217 11:46:23.844360
2218 11:46:24.514974 00380000 ################################################################
2219 11:46:24.515143
2220 11:46:25.183181 00400000 ################################################################
2221 11:46:25.183337
2222 11:46:25.852159 00480000 ################################################################
2223 11:46:25.852312
2224 11:46:26.517786 00500000 ################################################################
2225 11:46:26.517938
2226 11:46:27.182596 00580000 ################################################################
2227 11:46:27.182746
2228 11:46:27.852740 00600000 ################################################################
2229 11:46:27.852877
2230 11:46:28.522330 00680000 ################################################################
2231 11:46:28.522524
2232 11:46:29.185214 00700000 ################################################################
2233 11:46:29.185414
2234 11:46:29.859099 00780000 ################################################################
2235 11:46:29.859253
2236 11:46:30.528203 00800000 ################################################################
2237 11:46:30.528384
2238 11:46:31.192081 00880000 ################################################################
2239 11:46:31.192232
2240 11:46:31.855553 00900000 ################################################################
2241 11:46:31.855737
2242 11:46:32.526227 00980000 ################################################################
2243 11:46:32.526376
2244 11:46:33.196629 00a00000 ################################################################
2245 11:46:33.196806
2246 11:46:33.868676 00a80000 ################################################################
2247 11:46:33.868852
2248 11:46:34.529581 00b00000 ################################################################
2249 11:46:34.529725
2250 11:46:35.202787 00b80000 ################################################################
2251 11:46:35.202942
2252 11:46:35.872948 00c00000 ################################################################
2253 11:46:35.873102
2254 11:46:36.543039 00c80000 ################################################################
2255 11:46:36.543209
2256 11:46:37.128717 00d00000 ######################################################## done.
2257 11:46:37.128896
2258 11:46:37.132003 The bootfile was 14090128 bytes long.
2259 11:46:37.132080
2260 11:46:37.135506 Sending tftp read request... done.
2261 11:46:37.135619
2262 11:46:37.138465 Waiting for the transfer...
2263 11:46:37.138563
2264 11:46:37.804745 00000000 ################################################################
2265 11:46:37.804900
2266 11:46:38.465291 00080000 ################################################################
2267 11:46:38.465462
2268 11:46:39.132523 00100000 ################################################################
2269 11:46:39.132714
2270 11:46:39.799423 00180000 ################################################################
2271 11:46:39.799572
2272 11:46:40.464296 00200000 ################################################################
2273 11:46:40.464445
2274 11:46:41.137538 00280000 ################################################################
2275 11:46:41.137691
2276 11:46:41.806792 00300000 ################################################################
2277 11:46:41.806975
2278 11:46:42.474377 00380000 ################################################################
2279 11:46:42.474544
2280 11:46:43.144338 00400000 ################################################################
2281 11:46:43.144492
2282 11:46:43.810407 00480000 ################################################################
2283 11:46:43.810559
2284 11:46:44.490446 00500000 ################################################################
2285 11:46:44.490658
2286 11:46:45.157873 00580000 ################################################################
2287 11:46:45.158047
2288 11:46:45.829848 00600000 ################################################################
2289 11:46:45.830004
2290 11:46:46.182823 00680000 ################################## done.
2291 11:46:46.183047
2292 11:46:46.186200 Sending tftp read request... done.
2293 11:46:46.186292
2294 11:46:46.189281 Waiting for the transfer...
2295 11:46:46.189397
2296 11:46:46.189468 00000000 # done.
2297 11:46:46.189534
2298 11:46:46.199633 Command line loaded dynamically from TFTP file: 13627337/tftp-deploy-d15li98a/kernel/cmdline
2299 11:46:46.199768
2300 11:46:46.222525 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/13627337/extract-nfsrootfs-i64vru7h,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2301 11:46:46.229860
2302 11:46:46.233089 Shutting down all USB controllers.
2303 11:46:46.233193
2304 11:46:46.233260 Removing current net device
2305 11:46:46.233384
2306 11:46:46.236386 Finalizing coreboot
2307 11:46:46.236475
2308 11:46:46.242993 Exiting depthcharge with code 4 at timestamp: 37157727
2309 11:46:46.243103
2310 11:46:46.243172
2311 11:46:46.243235 Starting kernel ...
2312 11:46:46.243295
2313 11:46:46.243353
2314 11:46:46.243740 end: 2.2.4 bootloader-commands (duration 00:00:28) [common]
2315 11:46:46.243836 start: 2.2.5 auto-login-action (timeout 00:04:18) [common]
2316 11:46:46.243912 Setting prompt string to ['Linux version [0-9]']
2317 11:46:46.243980 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2318 11:46:46.244047 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2320 11:51:04.244352 end: 2.2.5 auto-login-action (duration 00:04:18) [common]
2322 11:51:04.244588 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 258 seconds'
2324 11:51:04.244747 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2327 11:51:04.245024 end: 2 depthcharge-action (duration 00:05:00) [common]
2329 11:51:04.245266 Cleaning after the job
2330 11:51:04.245390 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13627337/tftp-deploy-d15li98a/ramdisk
2331 11:51:04.246351 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13627337/tftp-deploy-d15li98a/kernel
2332 11:51:04.248058 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13627337/tftp-deploy-d15li98a/nfsrootfs
2333 11:51:04.330582 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13627337/tftp-deploy-d15li98a/modules
2334 11:51:04.331122 start: 4.1 power-off (timeout 00:00:30) [common]
2335 11:51:04.331331 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cp514-2h-1130g7-volteer-cbg-1' '--port=1' '--command=off'
2336 11:51:05.252383 >> Command sent successfully.
2337 11:51:05.254918 Returned 0 in 0 seconds
2338 11:51:05.355427 end: 4.1 power-off (duration 00:00:01) [common]
2340 11:51:05.355751 start: 4.2 read-feedback (timeout 00:09:59) [common]
2341 11:51:05.356005 Listened to connection for namespace 'common' for up to 1s
2343 11:51:05.356379 Listened to connection for namespace 'common' for up to 1s
2344 11:51:06.356963 Finalising connection for namespace 'common'
2345 11:51:06.357134 Disconnecting from shell: Finalise
2346 11:51:06.357210
2347 11:51:06.457563 end: 4.2 read-feedback (duration 00:00:01) [common]
2348 11:51:06.457719 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13627337
2349 11:51:06.852844 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13627337
2350 11:51:06.853035 JobError: Your job cannot terminate cleanly.