Boot log: acer-cp514-2h-1130g7-volteer

    1 11:44:31.594619  lava-dispatcher, installed at version: 2024.01
    2 11:44:31.594874  start: 0 validate
    3 11:44:31.595007  Start time: 2024-05-03 11:44:31.594999+00:00 (UTC)
    4 11:44:31.595133  Using caching service: 'http://localhost/cache/?uri=%s'
    5 11:44:31.595256  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-wifi%2F20240313.0%2Famd64%2Finitrd.cpio.gz exists
    6 11:44:31.856719  Using caching service: 'http://localhost/cache/?uri=%s'
    7 11:44:31.857478  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2481-gef9c8224c1829%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
    8 11:44:32.112393  Using caching service: 'http://localhost/cache/?uri=%s'
    9 11:44:32.113159  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-wifi%2F20240313.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 11:44:32.374154  Using caching service: 'http://localhost/cache/?uri=%s'
   11 11:44:32.374457  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2481-gef9c8224c1829%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
   12 11:44:32.634365  validate duration: 1.04
   14 11:44:32.634650  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 11:44:32.634745  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 11:44:32.634827  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 11:44:32.634956  Not decompressing ramdisk as can be used compressed.
   18 11:44:32.635038  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-wifi/20240313.0/amd64/initrd.cpio.gz
   19 11:44:32.635100  saving as /var/lib/lava/dispatcher/tmp/13627369/tftp-deploy-jhkkbobu/ramdisk/initrd.cpio.gz
   20 11:44:32.635162  total size: 6137763 (5 MB)
   21 11:44:32.636772  progress   0 % (0 MB)
   22 11:44:32.638526  progress   5 % (0 MB)
   23 11:44:32.640044  progress  10 % (0 MB)
   24 11:44:32.641733  progress  15 % (0 MB)
   25 11:44:32.643257  progress  20 % (1 MB)
   26 11:44:32.644820  progress  25 % (1 MB)
   27 11:44:32.646520  progress  30 % (1 MB)
   28 11:44:32.648058  progress  35 % (2 MB)
   29 11:44:32.649630  progress  40 % (2 MB)
   30 11:44:32.651321  progress  45 % (2 MB)
   31 11:44:32.652917  progress  50 % (2 MB)
   32 11:44:32.654593  progress  55 % (3 MB)
   33 11:44:32.656134  progress  60 % (3 MB)
   34 11:44:32.657736  progress  65 % (3 MB)
   35 11:44:32.659449  progress  70 % (4 MB)
   36 11:44:32.661032  progress  75 % (4 MB)
   37 11:44:32.662538  progress  80 % (4 MB)
   38 11:44:32.664219  progress  85 % (5 MB)
   39 11:44:32.665781  progress  90 % (5 MB)
   40 11:44:32.667279  progress  95 % (5 MB)
   41 11:44:32.668993  progress 100 % (5 MB)
   42 11:44:32.669152  5 MB downloaded in 0.03 s (172.21 MB/s)
   43 11:44:32.669303  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 11:44:32.669541  end: 1.1 download-retry (duration 00:00:00) [common]
   46 11:44:32.669625  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 11:44:32.669707  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 11:44:32.669842  downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2481-gef9c8224c1829/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
   49 11:44:32.669913  saving as /var/lib/lava/dispatcher/tmp/13627369/tftp-deploy-jhkkbobu/kernel/bzImage
   50 11:44:32.669973  total size: 14090128 (13 MB)
   51 11:44:32.670032  No compression specified
   52 11:44:32.671246  progress   0 % (0 MB)
   53 11:44:32.674799  progress   5 % (0 MB)
   54 11:44:32.678287  progress  10 % (1 MB)
   55 11:44:32.681954  progress  15 % (2 MB)
   56 11:44:32.685515  progress  20 % (2 MB)
   57 11:44:32.689179  progress  25 % (3 MB)
   58 11:44:32.692774  progress  30 % (4 MB)
   59 11:44:32.696543  progress  35 % (4 MB)
   60 11:44:32.700051  progress  40 % (5 MB)
   61 11:44:32.703751  progress  45 % (6 MB)
   62 11:44:32.707384  progress  50 % (6 MB)
   63 11:44:32.711199  progress  55 % (7 MB)
   64 11:44:32.714757  progress  60 % (8 MB)
   65 11:44:32.718483  progress  65 % (8 MB)
   66 11:44:32.721994  progress  70 % (9 MB)
   67 11:44:32.725597  progress  75 % (10 MB)
   68 11:44:32.729061  progress  80 % (10 MB)
   69 11:44:32.732699  progress  85 % (11 MB)
   70 11:44:32.736123  progress  90 % (12 MB)
   71 11:44:32.739778  progress  95 % (12 MB)
   72 11:44:32.743255  progress 100 % (13 MB)
   73 11:44:32.743493  13 MB downloaded in 0.07 s (182.78 MB/s)
   74 11:44:32.743635  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 11:44:32.743868  end: 1.2 download-retry (duration 00:00:00) [common]
   77 11:44:32.743952  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 11:44:32.744040  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 11:44:32.744180  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-wifi/20240313.0/amd64/full.rootfs.tar.xz
   80 11:44:32.744247  saving as /var/lib/lava/dispatcher/tmp/13627369/tftp-deploy-jhkkbobu/nfsrootfs/full.rootfs.tar
   81 11:44:32.744306  total size: 58462052 (55 MB)
   82 11:44:32.744400  Using unxz to decompress xz
   83 11:44:32.749797  progress   0 % (0 MB)
   84 11:44:32.908965  progress   5 % (2 MB)
   85 11:44:33.073746  progress  10 % (5 MB)
   86 11:44:33.241910  progress  15 % (8 MB)
   87 11:44:33.381504  progress  20 % (11 MB)
   88 11:44:33.545872  progress  25 % (13 MB)
   89 11:44:33.721604  progress  30 % (16 MB)
   90 11:44:33.848237  progress  35 % (19 MB)
   91 11:44:33.915193  progress  40 % (22 MB)
   92 11:44:34.075547  progress  45 % (25 MB)
   93 11:44:34.250601  progress  50 % (27 MB)
   94 11:44:34.402213  progress  55 % (30 MB)
   95 11:44:34.559548  progress  60 % (33 MB)
   96 11:44:34.718484  progress  65 % (36 MB)
   97 11:44:34.873378  progress  70 % (39 MB)
   98 11:44:35.050486  progress  75 % (41 MB)
   99 11:44:35.198176  progress  80 % (44 MB)
  100 11:44:35.348520  progress  85 % (47 MB)
  101 11:44:35.521573  progress  90 % (50 MB)
  102 11:44:35.691832  progress  95 % (52 MB)
  103 11:44:35.863853  progress 100 % (55 MB)
  104 11:44:35.868630  55 MB downloaded in 3.12 s (17.85 MB/s)
  105 11:44:35.868886  end: 1.3.1 http-download (duration 00:00:03) [common]
  107 11:44:35.869147  end: 1.3 download-retry (duration 00:00:03) [common]
  108 11:44:35.869234  start: 1.4 download-retry (timeout 00:09:57) [common]
  109 11:44:35.869322  start: 1.4.1 http-download (timeout 00:09:57) [common]
  110 11:44:35.869477  downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2481-gef9c8224c1829/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
  111 11:44:35.869548  saving as /var/lib/lava/dispatcher/tmp/13627369/tftp-deploy-jhkkbobu/modules/modules.tar
  112 11:44:35.869609  total size: 484648 (0 MB)
  113 11:44:35.869672  Using unxz to decompress xz
  114 11:44:35.873745  progress   6 % (0 MB)
  115 11:44:35.874192  progress  13 % (0 MB)
  116 11:44:35.874435  progress  20 % (0 MB)
  117 11:44:35.876048  progress  27 % (0 MB)
  118 11:44:35.877857  progress  33 % (0 MB)
  119 11:44:35.879825  progress  40 % (0 MB)
  120 11:44:35.881630  progress  47 % (0 MB)
  121 11:44:35.883300  progress  54 % (0 MB)
  122 11:44:35.885149  progress  60 % (0 MB)
  123 11:44:35.886791  progress  67 % (0 MB)
  124 11:44:35.888570  progress  74 % (0 MB)
  125 11:44:35.890495  progress  81 % (0 MB)
  126 11:44:35.892175  progress  87 % (0 MB)
  127 11:44:35.894108  progress  94 % (0 MB)
  128 11:44:35.895822  progress 100 % (0 MB)
  129 11:44:35.901480  0 MB downloaded in 0.03 s (14.50 MB/s)
  130 11:44:35.901717  end: 1.4.1 http-download (duration 00:00:00) [common]
  132 11:44:35.901981  end: 1.4 download-retry (duration 00:00:00) [common]
  133 11:44:35.902072  start: 1.5 prepare-tftp-overlay (timeout 00:09:57) [common]
  134 11:44:35.902166  start: 1.5.1 extract-nfsrootfs (timeout 00:09:57) [common]
  135 11:44:37.145016  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/13627369/extract-nfsrootfs-fgjspyc9
  136 11:44:37.145218  end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
  137 11:44:37.145316  start: 1.5.2 lava-overlay (timeout 00:09:55) [common]
  138 11:44:37.145488  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13627369/lava-overlay-pn5dij2o
  139 11:44:37.145620  makedir: /var/lib/lava/dispatcher/tmp/13627369/lava-overlay-pn5dij2o/lava-13627369/bin
  140 11:44:37.145725  makedir: /var/lib/lava/dispatcher/tmp/13627369/lava-overlay-pn5dij2o/lava-13627369/tests
  141 11:44:37.145826  makedir: /var/lib/lava/dispatcher/tmp/13627369/lava-overlay-pn5dij2o/lava-13627369/results
  142 11:44:37.145925  Creating /var/lib/lava/dispatcher/tmp/13627369/lava-overlay-pn5dij2o/lava-13627369/bin/lava-add-keys
  143 11:44:37.146117  Creating /var/lib/lava/dispatcher/tmp/13627369/lava-overlay-pn5dij2o/lava-13627369/bin/lava-add-sources
  144 11:44:37.146246  Creating /var/lib/lava/dispatcher/tmp/13627369/lava-overlay-pn5dij2o/lava-13627369/bin/lava-background-process-start
  145 11:44:37.146375  Creating /var/lib/lava/dispatcher/tmp/13627369/lava-overlay-pn5dij2o/lava-13627369/bin/lava-background-process-stop
  146 11:44:37.146500  Creating /var/lib/lava/dispatcher/tmp/13627369/lava-overlay-pn5dij2o/lava-13627369/bin/lava-common-functions
  147 11:44:37.146622  Creating /var/lib/lava/dispatcher/tmp/13627369/lava-overlay-pn5dij2o/lava-13627369/bin/lava-echo-ipv4
  148 11:44:37.146749  Creating /var/lib/lava/dispatcher/tmp/13627369/lava-overlay-pn5dij2o/lava-13627369/bin/lava-install-packages
  149 11:44:37.146869  Creating /var/lib/lava/dispatcher/tmp/13627369/lava-overlay-pn5dij2o/lava-13627369/bin/lava-installed-packages
  150 11:44:37.146992  Creating /var/lib/lava/dispatcher/tmp/13627369/lava-overlay-pn5dij2o/lava-13627369/bin/lava-os-build
  151 11:44:37.147112  Creating /var/lib/lava/dispatcher/tmp/13627369/lava-overlay-pn5dij2o/lava-13627369/bin/lava-probe-channel
  152 11:44:37.147234  Creating /var/lib/lava/dispatcher/tmp/13627369/lava-overlay-pn5dij2o/lava-13627369/bin/lava-probe-ip
  153 11:44:37.147355  Creating /var/lib/lava/dispatcher/tmp/13627369/lava-overlay-pn5dij2o/lava-13627369/bin/lava-target-ip
  154 11:44:37.147475  Creating /var/lib/lava/dispatcher/tmp/13627369/lava-overlay-pn5dij2o/lava-13627369/bin/lava-target-mac
  155 11:44:37.147594  Creating /var/lib/lava/dispatcher/tmp/13627369/lava-overlay-pn5dij2o/lava-13627369/bin/lava-target-storage
  156 11:44:37.147716  Creating /var/lib/lava/dispatcher/tmp/13627369/lava-overlay-pn5dij2o/lava-13627369/bin/lava-test-case
  157 11:44:37.147837  Creating /var/lib/lava/dispatcher/tmp/13627369/lava-overlay-pn5dij2o/lava-13627369/bin/lava-test-event
  158 11:44:37.147957  Creating /var/lib/lava/dispatcher/tmp/13627369/lava-overlay-pn5dij2o/lava-13627369/bin/lava-test-feedback
  159 11:44:37.148076  Creating /var/lib/lava/dispatcher/tmp/13627369/lava-overlay-pn5dij2o/lava-13627369/bin/lava-test-raise
  160 11:44:37.148196  Creating /var/lib/lava/dispatcher/tmp/13627369/lava-overlay-pn5dij2o/lava-13627369/bin/lava-test-reference
  161 11:44:37.148321  Creating /var/lib/lava/dispatcher/tmp/13627369/lava-overlay-pn5dij2o/lava-13627369/bin/lava-test-runner
  162 11:44:37.148638  Creating /var/lib/lava/dispatcher/tmp/13627369/lava-overlay-pn5dij2o/lava-13627369/bin/lava-test-set
  163 11:44:37.148764  Creating /var/lib/lava/dispatcher/tmp/13627369/lava-overlay-pn5dij2o/lava-13627369/bin/lava-test-shell
  164 11:44:37.148890  Updating /var/lib/lava/dispatcher/tmp/13627369/lava-overlay-pn5dij2o/lava-13627369/bin/lava-install-packages (oe)
  165 11:44:37.149040  Updating /var/lib/lava/dispatcher/tmp/13627369/lava-overlay-pn5dij2o/lava-13627369/bin/lava-installed-packages (oe)
  166 11:44:37.149159  Creating /var/lib/lava/dispatcher/tmp/13627369/lava-overlay-pn5dij2o/lava-13627369/environment
  167 11:44:37.149254  LAVA metadata
  168 11:44:37.149331  - LAVA_JOB_ID=13627369
  169 11:44:37.149395  - LAVA_DISPATCHER_IP=192.168.201.1
  170 11:44:37.149498  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:55) [common]
  171 11:44:37.149565  skipped lava-vland-overlay
  172 11:44:37.149639  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  173 11:44:37.149717  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:55) [common]
  174 11:44:37.149777  skipped lava-multinode-overlay
  175 11:44:37.149847  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  176 11:44:37.149922  start: 1.5.2.3 test-definition (timeout 00:09:55) [common]
  177 11:44:37.149995  Loading test definitions
  178 11:44:37.150082  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:55) [common]
  179 11:44:37.150151  Using /lava-13627369 at stage 0
  180 11:44:37.150439  uuid=13627369_1.5.2.3.1 testdef=None
  181 11:44:37.150526  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  182 11:44:37.150609  start: 1.5.2.3.2 test-overlay (timeout 00:09:55) [common]
  183 11:44:37.151086  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  185 11:44:37.151304  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:55) [common]
  186 11:44:37.151891  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  188 11:44:37.152122  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:55) [common]
  189 11:44:37.152801  runner path: /var/lib/lava/dispatcher/tmp/13627369/lava-overlay-pn5dij2o/lava-13627369/0/tests/0_wifi-basic test_uuid 13627369_1.5.2.3.1
  190 11:44:37.152956  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  192 11:44:37.153155  Creating lava-test-runner.conf files
  193 11:44:37.153217  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13627369/lava-overlay-pn5dij2o/lava-13627369/0 for stage 0
  194 11:44:37.153306  - 0_wifi-basic
  195 11:44:37.153401  end: 1.5.2.3 test-definition (duration 00:00:00) [common]
  196 11:44:37.153484  start: 1.5.2.4 compress-overlay (timeout 00:09:55) [common]
  197 11:44:37.159605  end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
  198 11:44:37.159714  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:55) [common]
  199 11:44:37.159798  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  200 11:44:37.159881  end: 1.5.2 lava-overlay (duration 00:00:00) [common]
  201 11:44:37.159980  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:55) [common]
  202 11:44:37.313544  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  203 11:44:37.313945  start: 1.5.4 extract-modules (timeout 00:09:55) [common]
  204 11:44:37.314060  extracting modules file /var/lib/lava/dispatcher/tmp/13627369/tftp-deploy-jhkkbobu/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13627369/extract-nfsrootfs-fgjspyc9
  205 11:44:37.328745  extracting modules file /var/lib/lava/dispatcher/tmp/13627369/tftp-deploy-jhkkbobu/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13627369/extract-overlay-ramdisk-f1gzxp2u/ramdisk
  206 11:44:37.343217  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  207 11:44:37.343364  start: 1.5.5 apply-overlay-tftp (timeout 00:09:55) [common]
  208 11:44:37.343457  [common] Applying overlay to NFS
  209 11:44:37.343527  [common] Applying overlay /var/lib/lava/dispatcher/tmp/13627369/compress-overlay-lm2cd2_7/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13627369/extract-nfsrootfs-fgjspyc9
  210 11:44:37.349786  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  211 11:44:37.349898  start: 1.5.6 configure-preseed-file (timeout 00:09:55) [common]
  212 11:44:37.349989  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  213 11:44:37.350076  start: 1.5.7 compress-ramdisk (timeout 00:09:55) [common]
  214 11:44:37.350152  Building ramdisk /var/lib/lava/dispatcher/tmp/13627369/extract-overlay-ramdisk-f1gzxp2u/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13627369/extract-overlay-ramdisk-f1gzxp2u/ramdisk
  215 11:44:37.430700  >> 32557 blocks

  216 11:44:38.099186  rename /var/lib/lava/dispatcher/tmp/13627369/extract-overlay-ramdisk-f1gzxp2u/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13627369/tftp-deploy-jhkkbobu/ramdisk/ramdisk.cpio.gz
  217 11:44:38.099641  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  218 11:44:38.099771  start: 1.5.8 prepare-kernel (timeout 00:09:55) [common]
  219 11:44:38.099878  start: 1.5.8.1 prepare-fit (timeout 00:09:55) [common]
  220 11:44:38.099967  No mkimage arch provided, not using FIT.
  221 11:44:38.100055  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  222 11:44:38.100138  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  223 11:44:38.100240  end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
  224 11:44:38.100329  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:55) [common]
  225 11:44:38.100430  No LXC device requested
  226 11:44:38.100511  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  227 11:44:38.100599  start: 1.7 deploy-device-env (timeout 00:09:55) [common]
  228 11:44:38.100689  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  229 11:44:38.100771  Checking files for TFTP limit of 4294967296 bytes.
  230 11:44:38.101172  end: 1 tftp-deploy (duration 00:00:05) [common]
  231 11:44:38.101275  start: 2 depthcharge-action (timeout 00:05:00) [common]
  232 11:44:38.101365  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  233 11:44:38.101644  substitutions:
  234 11:44:38.101714  - {DTB}: None
  235 11:44:38.101801  - {INITRD}: 13627369/tftp-deploy-jhkkbobu/ramdisk/ramdisk.cpio.gz
  236 11:44:38.101862  - {KERNEL}: 13627369/tftp-deploy-jhkkbobu/kernel/bzImage
  237 11:44:38.101919  - {LAVA_MAC}: None
  238 11:44:38.101974  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/13627369/extract-nfsrootfs-fgjspyc9
  239 11:44:38.102031  - {NFS_SERVER_IP}: 192.168.201.1
  240 11:44:38.102085  - {PRESEED_CONFIG}: None
  241 11:44:38.102138  - {PRESEED_LOCAL}: None
  242 11:44:38.102191  - {RAMDISK}: 13627369/tftp-deploy-jhkkbobu/ramdisk/ramdisk.cpio.gz
  243 11:44:38.102244  - {ROOT_PART}: None
  244 11:44:38.102297  - {ROOT}: None
  245 11:44:38.102351  - {SERVER_IP}: 192.168.201.1
  246 11:44:38.102403  - {TEE}: None
  247 11:44:38.102455  Parsed boot commands:
  248 11:44:38.102509  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  249 11:44:38.102684  Parsed boot commands: tftpboot 192.168.201.1 13627369/tftp-deploy-jhkkbobu/kernel/bzImage 13627369/tftp-deploy-jhkkbobu/kernel/cmdline 13627369/tftp-deploy-jhkkbobu/ramdisk/ramdisk.cpio.gz
  250 11:44:38.102768  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  251 11:44:38.102851  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  252 11:44:38.102937  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  253 11:44:38.103017  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  254 11:44:38.103087  Not connected, no need to disconnect.
  255 11:44:38.103159  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  256 11:44:38.103235  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  257 11:44:38.103301  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cp514-2h-1130g7-volteer-cbg-7'
  258 11:44:38.107047  Setting prompt string to ['lava-test: # ']
  259 11:44:38.107406  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  260 11:44:38.107511  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  261 11:44:38.107607  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  262 11:44:38.107731  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  263 11:44:38.107907  Calling: '/usr/local/bin/chromebook-reboot.sh' 'acer-cp514-2h-1130g7-volteer-cbg-7'
  264 11:44:46.796007  Returned 0 in 8 seconds
  265 11:44:46.896714  end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
  267 11:44:46.897037  end: 2.2.2 reset-device (duration 00:00:09) [common]
  268 11:44:46.897139  start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
  269 11:44:46.897231  Setting prompt string to 'Starting depthcharge on Voema...'
  270 11:44:46.897298  Changing prompt to 'Starting depthcharge on Voema...'
  271 11:44:46.897368  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  272 11:44:46.897646  [Enter `^Ec?' for help]

  273 11:44:46.897725  

  274 11:44:46.897793  

  275 11:44:46.897854  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...

  276 11:44:46.897918  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz

  277 11:44:46.897980  CPU: ID 806c1, Tigerlake B0, ucode: 00000086

  278 11:44:46.898039  CPU: AES supported, TXT NOT supported, VT supported

  279 11:44:46.898097  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2

  280 11:44:46.898153  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU

  281 11:44:46.898208  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2

  282 11:44:46.898262  VBOOT: Loading verstage.

  283 11:44:46.898316  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  284 11:44:46.898370  FMAP: base = 0x0 size = 0x2000000 #areas = 32

  285 11:44:46.898425  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  286 11:44:46.898491  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes

  287 11:44:46.898551  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984

  288 11:44:46.898628  

  289 11:44:46.898791  

  290 11:44:46.898897  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...

  291 11:44:46.898965  Probing TPM: . done!

  292 11:44:46.899031  TPM ready after 0 ms

  293 11:44:46.899126  Connected to device vid:did:rid of 1ae0:0028:00

  294 11:44:46.899213  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6

  295 11:44:46.899300  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  296 11:44:46.899385  Initialized TPM device CR50 revision 0

  297 11:44:46.899470  tlcl_send_startup: Startup return code is 0

  298 11:44:46.899554  TPM: setup succeeded

  299 11:44:46.899639  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  300 11:44:46.899724  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  301 11:44:46.899809  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  302 11:44:46.899893  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  303 11:44:46.899977  Chrome EC: UHEPI supported

  304 11:44:46.900060  Phase 1

  305 11:44:46.900144  FMAP: area GBB found @ 1805000 (458752 bytes)

  306 11:44:46.900229  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  307 11:44:46.900314  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  308 11:44:46.900426  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  309 11:44:46.900483  VB2:vb2_check_recovery() Recovery was requested manually

  310 11:44:46.900538  VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x7

  311 11:44:46.900592  Recovery requested (1009000e)

  312 11:44:46.900646  TPM: Extending digest for VBOOT: boot mode into PCR 0

  313 11:44:46.900700  tlcl_extend: response is 0

  314 11:44:46.900754  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  315 11:44:46.900808  tlcl_extend: response is 0

  316 11:44:46.900861  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  317 11:44:46.900915  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638

  318 11:44:46.900969  BS: verstage times (exec / console): total (unknown) / 147 ms

  319 11:44:46.901023  

  320 11:44:46.901076  

  321 11:44:46.901129  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...

  322 11:44:46.901183  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  323 11:44:46.901237  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  324 11:44:46.901291  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000

  325 11:44:46.901344  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  326 11:44:46.901397  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000

  327 11:44:46.901451  gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000

  328 11:44:46.901505  TCO_STS:   0000 0000

  329 11:44:46.901558  GEN_PMCON: d0015038 00002200

  330 11:44:46.901611  GBLRST_CAUSE: 00000000 00000000

  331 11:44:46.901663  HPR_CAUSE0: 00000000

  332 11:44:46.901716  prev_sleep_state 5

  333 11:44:46.901769  Boot Count incremented to 29574

  334 11:44:46.901822  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  335 11:44:46.901876  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  336 11:44:46.901930  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  337 11:44:46.901983  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c

  338 11:44:46.902037  Chrome EC: UHEPI supported

  339 11:44:46.902090  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  340 11:44:46.902144  Probing TPM:  done!

  341 11:44:46.902197  Connected to device vid:did:rid of 1ae0:0028:00

  342 11:44:46.902251  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6

  343 11:44:46.902305  Initialized TPM device CR50 revision 0

  344 11:44:46.902358  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  345 11:44:46.902411  MRC: Hash idx 0x100b comparison successful.

  346 11:44:46.902464  MRC cache found, size faa8

  347 11:44:46.902517  bootmode is set to: 2

  348 11:44:46.902569  SPD index = 0

  349 11:44:46.902621  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c

  350 11:44:46.902675  SPD: module type is LPDDR4X

  351 11:44:46.902728  SPD: module part number is MT53E512M64D4NW-046

  352 11:44:46.902781  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  353 11:44:46.902835  SPD: device width 16 bits, bus width 16 bits

  354 11:44:46.902888  SPD: module size is 1024 MB (per channel)

  355 11:44:46.902941  CBMEM:

  356 11:44:46.902994  IMD: root @ 0x76fff000 254 entries.

  357 11:44:46.903047  IMD: root @ 0x76ffec00 62 entries.

  358 11:44:46.903100  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  359 11:44:46.903342  FMAP: area RW_VPD found @ f35000 (8192 bytes)

  360 11:44:46.903407  External stage cache:

  361 11:44:46.903462  IMD: root @ 0x7b3ff000 254 entries.

  362 11:44:46.903516  IMD: root @ 0x7b3fec00 62 entries.

  363 11:44:46.903569  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  364 11:44:46.903623  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  365 11:44:46.903677  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  366 11:44:46.903731  MRC: 'RECOVERY_MRC_CACHE' does not need update.

  367 11:44:46.903785  cse_lite: Skip switching to RW in the recovery path

  368 11:44:46.903839  8 DIMMs found

  369 11:44:46.903894  SMM Memory Map

  370 11:44:46.903947  SMRAM       : 0x7b000000 0x800000

  371 11:44:46.904001   Subregion 0: 0x7b000000 0x200000

  372 11:44:46.904054   Subregion 1: 0x7b200000 0x200000

  373 11:44:46.904108   Subregion 2: 0x7b400000 0x400000

  374 11:44:46.904160  top_of_ram = 0x77000000

  375 11:44:46.904214  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  376 11:44:46.904267  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)

  377 11:44:46.904320  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  378 11:44:46.904418  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  379 11:44:46.904473  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c

  380 11:44:46.904528  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)

  381 11:44:46.904581  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500

  382 11:44:46.904635  Processing 211 relocs. Offset value of 0x74c0b000

  383 11:44:46.904688  BS: romstage times (exec / console): total (unknown) / 277 ms

  384 11:44:46.904741  

  385 11:44:46.904794  

  386 11:44:46.904847  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...

  387 11:44:46.904901  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  388 11:44:46.904955  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  389 11:44:46.905009  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  390 11:44:46.905063  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec

  391 11:44:46.905117  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)

  392 11:44:46.905170  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270

  393 11:44:46.905225  Processing 5008 relocs. Offset value of 0x75d98000

  394 11:44:46.905278  BS: postcar times (exec / console): total (unknown) / 59 ms

  395 11:44:46.905332  

  396 11:44:46.905385  

  397 11:44:46.905438  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...

  398 11:44:46.905492  Normal boot

  399 11:44:46.905548  FW_CONFIG value is 0x804c02

  400 11:44:46.905602  PCI: 00:07.0 disabled by fw_config

  401 11:44:46.905655  PCI: 00:07.1 disabled by fw_config

  402 11:44:46.905708  PCI: 00:0d.2 disabled by fw_config

  403 11:44:46.905761  PCI: 00:1c.7 disabled by fw_config

  404 11:44:46.905814  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  405 11:44:46.905868  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  406 11:44:46.905922  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  407 11:44:46.905975  GENERIC: 0.0 disabled by fw_config

  408 11:44:46.906029  GENERIC: 1.0 disabled by fw_config

  409 11:44:46.906081  fw_config match found: DB_USB=USB3_ACTIVE

  410 11:44:46.906135  fw_config match found: DB_USB=USB3_ACTIVE

  411 11:44:46.906188  fw_config match found: DB_USB=USB3_ACTIVE

  412 11:44:46.906242  fw_config match found: DB_USB=USB3_ACTIVE

  413 11:44:46.906295  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  414 11:44:46.906349  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  415 11:44:46.906403  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  416 11:44:46.906456  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c

  417 11:44:46.906510  microcode: sig=0x806c1 pf=0x80 revision=0x86

  418 11:44:46.906563  microcode: Update skipped, already up-to-date

  419 11:44:46.906617  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c

  420 11:44:46.906670  Detected 4 core, 8 thread CPU.

  421 11:44:46.906723  Setting up SMI for CPU

  422 11:44:46.906788  IED base = 0x7b400000

  423 11:44:46.906899  IED size = 0x00400000

  424 11:44:46.907010  Will perform SMM setup.

  425 11:44:46.907123  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.

  426 11:44:46.907213  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

  427 11:44:46.907274  Processing 16 relocs. Offset value of 0x00030000

  428 11:44:46.907332  Attempting to start 7 APs

  429 11:44:46.907390  Waiting for 10ms after sending INIT.

  430 11:44:46.907446  Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.

  431 11:44:46.907501  AP: slot 4 apic_id 6.

  432 11:44:46.907556  AP: slot 5 apic_id 7.

  433 11:44:46.907610  AP: slot 6 apic_id 2.

  434 11:44:46.907663  AP: slot 2 apic_id 3.

  435 11:44:46.907717  done.

  436 11:44:46.907770  AP: slot 3 apic_id 4.

  437 11:44:46.907824  AP: slot 7 apic_id 5.

  438 11:44:46.907877  Waiting for 2nd SIPI to complete...done.

  439 11:44:46.907931  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

  440 11:44:46.907985  Processing 13 relocs. Offset value of 0x00038000

  441 11:44:46.908044  Unable to locate Global NVS

  442 11:44:46.908132  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)

  443 11:44:46.908233  Installing permanent SMM handler to 0x7b000000

  444 11:44:46.908321  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908

  445 11:44:46.908454  Processing 794 relocs. Offset value of 0x7b010000

  446 11:44:46.908753  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8

  447 11:44:46.908882  Processing 13 relocs. Offset value of 0x7b008000

  448 11:44:46.908958  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd

  449 11:44:46.909022  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd

  450 11:44:46.909117  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd

  451 11:44:46.909227  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd

  452 11:44:46.909284  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd

  453 11:44:46.909339  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd

  454 11:44:46.909394  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd

  455 11:44:46.909449  Unable to locate Global NVS

  456 11:44:46.909504  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)

  457 11:44:46.909564  Clearing SMI status registers

  458 11:44:46.909620  SMI_STS: PM1 

  459 11:44:46.909685  PM1_STS: PWRBTN 

  460 11:44:46.909740  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0

  461 11:44:46.909794  In relocation handler: CPU 0

  462 11:44:46.909848  New SMBASE=0x7b000000 IEDBASE=0x7b400000

  463 11:44:46.909902  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  464 11:44:46.909956  Relocation complete.

  465 11:44:46.910009  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1

  466 11:44:46.910063  In relocation handler: CPU 1

  467 11:44:46.910116  New SMBASE=0x7afffc00 IEDBASE=0x7b400000

  468 11:44:46.910170  Relocation complete.

  469 11:44:46.910224  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7

  470 11:44:46.910277  In relocation handler: CPU 7

  471 11:44:46.910330  New SMBASE=0x7affe400 IEDBASE=0x7b400000

  472 11:44:46.910384  Relocation complete.

  473 11:44:46.910437  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3

  474 11:44:46.910490  In relocation handler: CPU 3

  475 11:44:46.910543  New SMBASE=0x7afff400 IEDBASE=0x7b400000

  476 11:44:46.910597  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  477 11:44:46.910650  Relocation complete.

  478 11:44:46.910703  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6

  479 11:44:46.910756  In relocation handler: CPU 6

  480 11:44:46.910810  New SMBASE=0x7affe800 IEDBASE=0x7b400000

  481 11:44:46.910864  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  482 11:44:46.910918  Relocation complete.

  483 11:44:46.910971  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2

  484 11:44:46.911024  In relocation handler: CPU 2

  485 11:44:46.911078  New SMBASE=0x7afff800 IEDBASE=0x7b400000

  486 11:44:46.911131  Relocation complete.

  487 11:44:46.911184  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4

  488 11:44:46.911238  In relocation handler: CPU 4

  489 11:44:46.911291  New SMBASE=0x7afff000 IEDBASE=0x7b400000

  490 11:44:46.911344  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  491 11:44:46.911398  Relocation complete.

  492 11:44:46.911451  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5

  493 11:44:46.911504  In relocation handler: CPU 5

  494 11:44:46.911558  New SMBASE=0x7affec00 IEDBASE=0x7b400000

  495 11:44:46.911611  Relocation complete.

  496 11:44:46.911664  Initializing CPU #0

  497 11:44:46.911720  CPU: vendor Intel device 806c1

  498 11:44:46.911773  CPU: family 06, model 8c, stepping 01

  499 11:44:46.911826  Clearing out pending MCEs

  500 11:44:46.911879  Setting up local APIC...

  501 11:44:46.911932   apic_id: 0x00 done.

  502 11:44:46.911985  Turbo is available but hidden

  503 11:44:46.912038  Turbo is available and visible

  504 11:44:46.912091  microcode: Update skipped, already up-to-date

  505 11:44:46.912144  CPU #0 initialized

  506 11:44:46.912197  Initializing CPU #4

  507 11:44:46.912250  Initializing CPU #5

  508 11:44:46.912303  CPU: vendor Intel device 806c1

  509 11:44:46.912380  CPU: family 06, model 8c, stepping 01

  510 11:44:46.912450  CPU: vendor Intel device 806c1

  511 11:44:46.912504  CPU: family 06, model 8c, stepping 01

  512 11:44:46.912557  Clearing out pending MCEs

  513 11:44:46.912611  Clearing out pending MCEs

  514 11:44:46.912664  Setting up local APIC...

  515 11:44:46.912716  Initializing CPU #6

  516 11:44:46.912769  Initializing CPU #2

  517 11:44:46.912821  CPU: vendor Intel device 806c1

  518 11:44:46.912874  CPU: family 06, model 8c, stepping 01

  519 11:44:46.912927  CPU: vendor Intel device 806c1

  520 11:44:46.912980  CPU: family 06, model 8c, stepping 01

  521 11:44:46.913033  Clearing out pending MCEs

  522 11:44:46.913086  Clearing out pending MCEs

  523 11:44:46.913139  Setting up local APIC...

  524 11:44:46.913192  Initializing CPU #1

  525 11:44:46.913244   apic_id: 0x06 done.

  526 11:44:46.913296  Setting up local APIC...

  527 11:44:46.913349  Initializing CPU #7

  528 11:44:46.913402  Initializing CPU #3

  529 11:44:46.913454  CPU: vendor Intel device 806c1

  530 11:44:46.913507  CPU: family 06, model 8c, stepping 01

  531 11:44:46.913560  CPU: vendor Intel device 806c1

  532 11:44:46.913613  CPU: family 06, model 8c, stepping 01

  533 11:44:46.913666  Clearing out pending MCEs

  534 11:44:46.913720  microcode: Update skipped, already up-to-date

  535 11:44:46.913773   apic_id: 0x07 done.

  536 11:44:46.913894  CPU #4 initialized

  537 11:44:46.914032  microcode: Update skipped, already up-to-date

  538 11:44:46.914118  Clearing out pending MCEs

  539 11:44:46.914176  Setting up local APIC...

  540 11:44:46.914231   apic_id: 0x02 done.

  541 11:44:46.914285  Setting up local APIC...

  542 11:44:46.914338  CPU #5 initialized

  543 11:44:46.914391  Setting up local APIC...

  544 11:44:46.914445   apic_id: 0x05 done.

  545 11:44:46.914498   apic_id: 0x04 done.

  546 11:44:46.914551  microcode: Update skipped, already up-to-date

  547 11:44:46.914604  microcode: Update skipped, already up-to-date

  548 11:44:46.914657  CPU #7 initialized

  549 11:44:46.914709  CPU #3 initialized

  550 11:44:46.914762  microcode: Update skipped, already up-to-date

  551 11:44:46.914814   apic_id: 0x03 done.

  552 11:44:46.914867  CPU: vendor Intel device 806c1

  553 11:44:46.914920  CPU: family 06, model 8c, stepping 01

  554 11:44:46.914973  CPU #6 initialized

  555 11:44:46.915026  microcode: Update skipped, already up-to-date

  556 11:44:46.915079  Clearing out pending MCEs

  557 11:44:46.915132  CPU #2 initialized

  558 11:44:46.915184  Setting up local APIC...

  559 11:44:46.915237   apic_id: 0x01 done.

  560 11:44:46.915490  microcode: Update skipped, already up-to-date

  561 11:44:46.915549  CPU #1 initialized

  562 11:44:46.915604  bsp_do_flight_plan done after 455 msecs.

  563 11:44:46.915658  CPU: frequency set to 4000 MHz

  564 11:44:46.915711  Enabling SMIs.

  565 11:44:46.915765  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 349 / 317 ms

  566 11:44:46.915819  SATAXPCIE1 indicates PCIe NVMe is present

  567 11:44:46.915873  Probing TPM:  done!

  568 11:44:46.915927  Connected to device vid:did:rid of 1ae0:0028:00

  569 11:44:46.915980  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6

  570 11:44:46.916035  Initialized TPM device CR50 revision 0

  571 11:44:46.916088  Enabling S0i3.4

  572 11:44:46.916141  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc

  573 11:44:46.916194  Found a VBT of 8704 bytes after decompression

  574 11:44:46.916248  cse_lite: CSE RO boot. HybridStorageMode disabled

  575 11:44:46.916302  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called

  576 11:44:46.916363  FSPS returned 0

  577 11:44:46.916448  Executing Phase 1 of FspMultiPhaseSiInit

  578 11:44:46.916502  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  579 11:44:46.916556  port C0 DISC req: usage 1 usb3 1 usb2 5

  580 11:44:46.916609  Raw Buffer output 0 00000511

  581 11:44:46.916662  Raw Buffer output 1 00000000

  582 11:44:46.916715  pmc_send_ipc_cmd succeeded

  583 11:44:46.916767  port C1 DISC req: usage 1 usb3 2 usb2 3

  584 11:44:46.916820  Raw Buffer output 0 00000321

  585 11:44:46.916873  Raw Buffer output 1 00000000

  586 11:44:46.916934  pmc_send_ipc_cmd succeeded

  587 11:44:46.916995  Detected 4 core, 8 thread CPU.

  588 11:44:46.917049  Detected 4 core, 8 thread CPU.

  589 11:44:46.917102  Display FSP Version Info HOB

  590 11:44:46.917156  Reference Code - CPU = a.0.4c.31

  591 11:44:46.917242  uCode Version = 0.0.0.86

  592 11:44:46.917404  TXT ACM version = ff.ff.ff.ffff

  593 11:44:46.917507  Reference Code - ME = a.0.4c.31

  594 11:44:46.917570  MEBx version = 0.0.0.0

  595 11:44:46.917635  ME Firmware Version = Consumer SKU

  596 11:44:46.917703  Reference Code - PCH = a.0.4c.31

  597 11:44:46.917791  PCH-CRID Status = Disabled

  598 11:44:46.917876  PCH-CRID Original Value = ff.ff.ff.ffff

  599 11:44:46.917960  PCH-CRID New Value = ff.ff.ff.ffff

  600 11:44:46.918044  OPROM - RST - RAID = ff.ff.ff.ffff

  601 11:44:46.918128  PCH Hsio Version = 4.0.0.0

  602 11:44:46.918212  Reference Code - SA - System Agent = a.0.4c.31

  603 11:44:46.918295  Reference Code - MRC = 2.0.0.1

  604 11:44:46.918378  SA - PCIe Version = a.0.4c.31

  605 11:44:46.918461  SA-CRID Status = Disabled

  606 11:44:46.918545  SA-CRID Original Value = 0.0.0.1

  607 11:44:46.918628  SA-CRID New Value = 0.0.0.1

  608 11:44:46.918711  OPROM - VBIOS = ff.ff.ff.ffff

  609 11:44:46.918794  IO Manageability Engine FW Version = 11.1.4.0

  610 11:44:46.918878  PHY Build Version = 0.0.0.e0

  611 11:44:46.918961  Thunderbolt(TM) FW Version = 0.0.0.0

  612 11:44:46.919045  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  613 11:44:46.919128  ITSS IRQ Polarities Before:

  614 11:44:46.919211  IPC0: 0xffffffff

  615 11:44:46.919294  IPC1: 0xffffffff

  616 11:44:46.919376  IPC2: 0xffffffff

  617 11:44:46.919459  IPC3: 0xffffffff

  618 11:44:46.919541  ITSS IRQ Polarities After:

  619 11:44:46.919624  IPC0: 0xffffffff

  620 11:44:46.919706  IPC1: 0xffffffff

  621 11:44:46.919788  IPC2: 0xffffffff

  622 11:44:46.919871  IPC3: 0xffffffff

  623 11:44:46.919953  Found PCIe Root Port #9 at PCI: 00:1d.0.

  624 11:44:46.920039  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.

  625 11:44:46.920128  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.

  626 11:44:46.920216  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.

  627 11:44:46.920301  BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms

  628 11:44:46.920428  Enumerating buses...

  629 11:44:46.920513  Show all devs... Before device enumeration.

  630 11:44:46.920596  Root Device: enabled 1

  631 11:44:46.920679  DOMAIN: 0000: enabled 1

  632 11:44:46.920762  CPU_CLUSTER: 0: enabled 1

  633 11:44:46.920845  PCI: 00:00.0: enabled 1

  634 11:44:46.920928  PCI: 00:02.0: enabled 1

  635 11:44:46.921010  PCI: 00:04.0: enabled 1

  636 11:44:46.921093  PCI: 00:05.0: enabled 1

  637 11:44:46.921176  PCI: 00:06.0: enabled 0

  638 11:44:46.921259  PCI: 00:07.0: enabled 0

  639 11:44:46.921341  PCI: 00:07.1: enabled 0

  640 11:44:46.921424  PCI: 00:07.2: enabled 0

  641 11:44:46.921506  PCI: 00:07.3: enabled 0

  642 11:44:46.921589  PCI: 00:08.0: enabled 1

  643 11:44:46.921672  PCI: 00:09.0: enabled 0

  644 11:44:46.921754  PCI: 00:0a.0: enabled 0

  645 11:44:46.921837  PCI: 00:0d.0: enabled 1

  646 11:44:46.921919  PCI: 00:0d.1: enabled 0

  647 11:44:46.922002  PCI: 00:0d.2: enabled 0

  648 11:44:46.922084  PCI: 00:0d.3: enabled 0

  649 11:44:46.922167  PCI: 00:0e.0: enabled 0

  650 11:44:46.922244  PCI: 00:10.2: enabled 1

  651 11:44:46.922298  PCI: 00:10.6: enabled 0

  652 11:44:46.922351  PCI: 00:10.7: enabled 0

  653 11:44:46.922404  PCI: 00:12.0: enabled 0

  654 11:44:46.922457  PCI: 00:12.6: enabled 0

  655 11:44:46.922509  PCI: 00:13.0: enabled 0

  656 11:44:46.922562  PCI: 00:14.0: enabled 1

  657 11:44:46.922619  PCI: 00:14.1: enabled 0

  658 11:44:46.922674  PCI: 00:14.2: enabled 1

  659 11:44:46.922729  PCI: 00:14.3: enabled 1

  660 11:44:46.922783  PCI: 00:15.0: enabled 1

  661 11:44:46.922836  PCI: 00:15.1: enabled 1

  662 11:44:46.922889  PCI: 00:15.2: enabled 1

  663 11:44:46.922942  PCI: 00:15.3: enabled 1

  664 11:44:46.922995  PCI: 00:16.0: enabled 1

  665 11:44:46.923048  PCI: 00:16.1: enabled 0

  666 11:44:46.923101  PCI: 00:16.2: enabled 0

  667 11:44:46.923153  PCI: 00:16.3: enabled 0

  668 11:44:46.923206  PCI: 00:16.4: enabled 0

  669 11:44:46.923259  PCI: 00:16.5: enabled 0

  670 11:44:46.923312  PCI: 00:17.0: enabled 1

  671 11:44:46.923365  PCI: 00:19.0: enabled 0

  672 11:44:46.923418  PCI: 00:19.1: enabled 1

  673 11:44:46.923470  PCI: 00:19.2: enabled 0

  674 11:44:46.923523  PCI: 00:1c.0: enabled 1

  675 11:44:46.923576  PCI: 00:1c.1: enabled 0

  676 11:44:46.923629  PCI: 00:1c.2: enabled 0

  677 11:44:46.923682  PCI: 00:1c.3: enabled 0

  678 11:44:46.923735  PCI: 00:1c.4: enabled 0

  679 11:44:46.923787  PCI: 00:1c.5: enabled 0

  680 11:44:46.923840  PCI: 00:1c.6: enabled 1

  681 11:44:46.923893  PCI: 00:1c.7: enabled 0

  682 11:44:46.923945  PCI: 00:1d.0: enabled 1

  683 11:44:46.923998  PCI: 00:1d.1: enabled 0

  684 11:44:46.924243  PCI: 00:1d.2: enabled 1

  685 11:44:46.924306  PCI: 00:1d.3: enabled 0

  686 11:44:46.924387  PCI: 00:1e.0: enabled 1

  687 11:44:46.924457  PCI: 00:1e.1: enabled 0

  688 11:44:46.924511  PCI: 00:1e.2: enabled 1

  689 11:44:46.924564  PCI: 00:1e.3: enabled 1

  690 11:44:46.924616  PCI: 00:1f.0: enabled 1

  691 11:44:46.924669  PCI: 00:1f.1: enabled 0

  692 11:44:46.924722  PCI: 00:1f.2: enabled 1

  693 11:44:46.924775  PCI: 00:1f.3: enabled 1

  694 11:44:46.924828  PCI: 00:1f.4: enabled 0

  695 11:44:46.924881  PCI: 00:1f.5: enabled 1

  696 11:44:46.924934  PCI: 00:1f.6: enabled 0

  697 11:44:46.924986  PCI: 00:1f.7: enabled 0

  698 11:44:46.925040  APIC: 00: enabled 1

  699 11:44:46.925093  GENERIC: 0.0: enabled 1

  700 11:44:46.925145  GENERIC: 0.0: enabled 1

  701 11:44:46.925198  GENERIC: 1.0: enabled 1

  702 11:44:46.925251  GENERIC: 0.0: enabled 1

  703 11:44:46.925304  GENERIC: 1.0: enabled 1

  704 11:44:46.925356  USB0 port 0: enabled 1

  705 11:44:46.925409  GENERIC: 0.0: enabled 1

  706 11:44:46.925461  USB0 port 0: enabled 1

  707 11:44:46.925514  GENERIC: 0.0: enabled 1

  708 11:44:46.925567  I2C: 00:1a: enabled 1

  709 11:44:46.925619  I2C: 00:31: enabled 1

  710 11:44:46.925672  I2C: 00:32: enabled 1

  711 11:44:46.925725  I2C: 00:10: enabled 1

  712 11:44:46.925777  I2C: 00:15: enabled 1

  713 11:44:46.925830  GENERIC: 0.0: enabled 0

  714 11:44:46.925884  GENERIC: 1.0: enabled 0

  715 11:44:46.925936  GENERIC: 0.0: enabled 1

  716 11:44:46.925989  SPI: 00: enabled 1

  717 11:44:46.926042  SPI: 00: enabled 1

  718 11:44:46.926094  PNP: 0c09.0: enabled 1

  719 11:44:46.926147  GENERIC: 0.0: enabled 1

  720 11:44:46.926200  USB3 port 0: enabled 1

  721 11:44:46.926253  USB3 port 1: enabled 1

  722 11:44:46.926306  USB3 port 2: enabled 0

  723 11:44:46.926358  USB3 port 3: enabled 0

  724 11:44:46.926411  USB2 port 0: enabled 0

  725 11:44:46.926464  USB2 port 1: enabled 1

  726 11:44:46.926517  USB2 port 2: enabled 1

  727 11:44:46.926570  USB2 port 3: enabled 0

  728 11:44:46.926623  USB2 port 4: enabled 1

  729 11:44:46.926675  USB2 port 5: enabled 0

  730 11:44:46.926728  USB2 port 6: enabled 0

  731 11:44:46.926781  USB2 port 7: enabled 0

  732 11:44:46.926833  USB2 port 8: enabled 0

  733 11:44:46.926886  USB2 port 9: enabled 0

  734 11:44:46.926939  USB3 port 0: enabled 0

  735 11:44:46.926992  USB3 port 1: enabled 1

  736 11:44:46.927044  USB3 port 2: enabled 0

  737 11:44:46.927096  USB3 port 3: enabled 0

  738 11:44:46.927149  GENERIC: 0.0: enabled 1

  739 11:44:46.927202  GENERIC: 1.0: enabled 1

  740 11:44:46.927254  APIC: 01: enabled 1

  741 11:44:46.927307  APIC: 03: enabled 1

  742 11:44:46.927359  APIC: 04: enabled 1

  743 11:44:46.927412  APIC: 06: enabled 1

  744 11:44:46.927465  APIC: 07: enabled 1

  745 11:44:46.927517  APIC: 02: enabled 1

  746 11:44:46.927570  APIC: 05: enabled 1

  747 11:44:46.927622  Compare with tree...

  748 11:44:46.927675  Root Device: enabled 1

  749 11:44:46.927727   DOMAIN: 0000: enabled 1

  750 11:44:46.927779    PCI: 00:00.0: enabled 1

  751 11:44:46.927832    PCI: 00:02.0: enabled 1

  752 11:44:46.927884    PCI: 00:04.0: enabled 1

  753 11:44:46.927937     GENERIC: 0.0: enabled 1

  754 11:44:46.927990    PCI: 00:05.0: enabled 1

  755 11:44:46.928043    PCI: 00:06.0: enabled 0

  756 11:44:46.928095    PCI: 00:07.0: enabled 0

  757 11:44:46.928147     GENERIC: 0.0: enabled 1

  758 11:44:46.928200    PCI: 00:07.1: enabled 0

  759 11:44:46.928252     GENERIC: 1.0: enabled 1

  760 11:44:46.928305    PCI: 00:07.2: enabled 0

  761 11:44:46.928382     GENERIC: 0.0: enabled 1

  762 11:44:46.928451    PCI: 00:07.3: enabled 0

  763 11:44:46.928504     GENERIC: 1.0: enabled 1

  764 11:44:46.928557    PCI: 00:08.0: enabled 1

  765 11:44:46.928610    PCI: 00:09.0: enabled 0

  766 11:44:46.928663    PCI: 00:0a.0: enabled 0

  767 11:44:46.928716    PCI: 00:0d.0: enabled 1

  768 11:44:46.928769     USB0 port 0: enabled 1

  769 11:44:46.928822      USB3 port 0: enabled 1

  770 11:44:46.928875      USB3 port 1: enabled 1

  771 11:44:46.928928      USB3 port 2: enabled 0

  772 11:44:46.928981      USB3 port 3: enabled 0

  773 11:44:46.929034    PCI: 00:0d.1: enabled 0

  774 11:44:46.929086    PCI: 00:0d.2: enabled 0

  775 11:44:46.929139     GENERIC: 0.0: enabled 1

  776 11:44:46.929192    PCI: 00:0d.3: enabled 0

  777 11:44:46.929245    PCI: 00:0e.0: enabled 0

  778 11:44:46.929299    PCI: 00:10.2: enabled 1

  779 11:44:46.929351    PCI: 00:10.6: enabled 0

  780 11:44:46.929404    PCI: 00:10.7: enabled 0

  781 11:44:46.929457    PCI: 00:12.0: enabled 0

  782 11:44:46.929509    PCI: 00:12.6: enabled 0

  783 11:44:46.929562    PCI: 00:13.0: enabled 0

  784 11:44:46.929615    PCI: 00:14.0: enabled 1

  785 11:44:46.929668     USB0 port 0: enabled 1

  786 11:44:46.929721      USB2 port 0: enabled 0

  787 11:44:46.929773      USB2 port 1: enabled 1

  788 11:44:46.929826      USB2 port 2: enabled 1

  789 11:44:46.929879      USB2 port 3: enabled 0

  790 11:44:46.929931      USB2 port 4: enabled 1

  791 11:44:46.929984      USB2 port 5: enabled 0

  792 11:44:46.930036      USB2 port 6: enabled 0

  793 11:44:46.930089      USB2 port 7: enabled 0

  794 11:44:46.930142      USB2 port 8: enabled 0

  795 11:44:46.930195      USB2 port 9: enabled 0

  796 11:44:46.930247      USB3 port 0: enabled 0

  797 11:44:46.930300      USB3 port 1: enabled 1

  798 11:44:46.930352      USB3 port 2: enabled 0

  799 11:44:46.930405      USB3 port 3: enabled 0

  800 11:44:46.930457    PCI: 00:14.1: enabled 0

  801 11:44:46.930510    PCI: 00:14.2: enabled 1

  802 11:44:46.930562    PCI: 00:14.3: enabled 1

  803 11:44:46.930615     GENERIC: 0.0: enabled 1

  804 11:44:46.930668    PCI: 00:15.0: enabled 1

  805 11:44:46.930721     I2C: 00:1a: enabled 1

  806 11:44:46.930774     I2C: 00:31: enabled 1

  807 11:44:46.930826     I2C: 00:32: enabled 1

  808 11:44:46.930879    PCI: 00:15.1: enabled 1

  809 11:44:46.930931     I2C: 00:10: enabled 1

  810 11:44:46.930984    PCI: 00:15.2: enabled 1

  811 11:44:46.931037    PCI: 00:15.3: enabled 1

  812 11:44:46.931090    PCI: 00:16.0: enabled 1

  813 11:44:46.931143    PCI: 00:16.1: enabled 0

  814 11:44:46.931196    PCI: 00:16.2: enabled 0

  815 11:44:46.931249    PCI: 00:16.3: enabled 0

  816 11:44:46.931302    PCI: 00:16.4: enabled 0

  817 11:44:46.931354    PCI: 00:16.5: enabled 0

  818 11:44:46.931407    PCI: 00:17.0: enabled 1

  819 11:44:46.931459    PCI: 00:19.0: enabled 0

  820 11:44:46.931512    PCI: 00:19.1: enabled 1

  821 11:44:46.931564     I2C: 00:15: enabled 1

  822 11:44:46.931616    PCI: 00:19.2: enabled 0

  823 11:44:46.931669    PCI: 00:1d.0: enabled 1

  824 11:44:46.931722     GENERIC: 0.0: enabled 1

  825 11:44:46.931775    PCI: 00:1e.0: enabled 1

  826 11:44:46.931828    PCI: 00:1e.1: enabled 0

  827 11:44:46.931880    PCI: 00:1e.2: enabled 1

  828 11:44:46.931933     SPI: 00: enabled 1

  829 11:44:46.931985    PCI: 00:1e.3: enabled 1

  830 11:44:46.932038     SPI: 00: enabled 1

  831 11:44:46.932090    PCI: 00:1f.0: enabled 1

  832 11:44:46.932143     PNP: 0c09.0: enabled 1

  833 11:44:46.932195    PCI: 00:1f.1: enabled 0

  834 11:44:46.932247    PCI: 00:1f.2: enabled 1

  835 11:44:46.932300     GENERIC: 0.0: enabled 1

  836 11:44:46.932358      GENERIC: 0.0: enabled 1

  837 11:44:46.932446      GENERIC: 1.0: enabled 1

  838 11:44:46.932499    PCI: 00:1f.3: enabled 1

  839 11:44:46.932552    PCI: 00:1f.4: enabled 0

  840 11:44:46.932604    PCI: 00:1f.5: enabled 1

  841 11:44:46.932657    PCI: 00:1f.6: enabled 0

  842 11:44:46.932899    PCI: 00:1f.7: enabled 0

  843 11:44:46.932958   CPU_CLUSTER: 0: enabled 1

  844 11:44:46.933012    APIC: 00: enabled 1

  845 11:44:46.933066    APIC: 01: enabled 1

  846 11:44:46.933119    APIC: 03: enabled 1

  847 11:44:46.933172    APIC: 04: enabled 1

  848 11:44:46.933224    APIC: 06: enabled 1

  849 11:44:46.933277    APIC: 07: enabled 1

  850 11:44:46.933330    APIC: 02: enabled 1

  851 11:44:46.933383    APIC: 05: enabled 1

  852 11:44:46.933436  Root Device scanning...

  853 11:44:46.933489  scan_static_bus for Root Device

  854 11:44:46.933542  DOMAIN: 0000 enabled

  855 11:44:46.933595  CPU_CLUSTER: 0 enabled

  856 11:44:46.933648  DOMAIN: 0000 scanning...

  857 11:44:46.933702  PCI: pci_scan_bus for bus 00

  858 11:44:46.933755  PCI: 00:00.0 [8086/0000] ops

  859 11:44:46.933809  PCI: 00:00.0 [8086/9a12] enabled

  860 11:44:46.933862  PCI: 00:02.0 [8086/0000] bus ops

  861 11:44:46.933915  PCI: 00:02.0 [8086/9a40] enabled

  862 11:44:46.933968  PCI: 00:04.0 [8086/0000] bus ops

  863 11:44:46.934021  PCI: 00:04.0 [8086/9a03] enabled

  864 11:44:46.934074  PCI: 00:05.0 [8086/9a19] enabled

  865 11:44:46.934127  PCI: 00:07.0 [0000/0000] hidden

  866 11:44:46.934179  PCI: 00:08.0 [8086/9a11] enabled

  867 11:44:46.934232  PCI: 00:0a.0 [8086/9a0d] disabled

  868 11:44:46.934285  PCI: 00:0d.0 [8086/0000] bus ops

  869 11:44:46.934338  PCI: 00:0d.0 [8086/9a13] enabled

  870 11:44:46.934391  PCI: 00:14.0 [8086/0000] bus ops

  871 11:44:46.934444  PCI: 00:14.0 [8086/a0ed] enabled

  872 11:44:46.934497  PCI: 00:14.2 [8086/a0ef] enabled

  873 11:44:46.934550  PCI: 00:14.3 [8086/0000] bus ops

  874 11:44:46.934603  PCI: 00:14.3 [8086/a0f0] enabled

  875 11:44:46.934655  PCI: 00:15.0 [8086/0000] bus ops

  876 11:44:46.934708  PCI: 00:15.0 [8086/a0e8] enabled

  877 11:44:46.934761  PCI: 00:15.1 [8086/0000] bus ops

  878 11:44:46.934814  PCI: 00:15.1 [8086/a0e9] enabled

  879 11:44:46.934866  PCI: 00:15.2 [8086/0000] bus ops

  880 11:44:46.934919  PCI: 00:15.2 [8086/a0ea] enabled

  881 11:44:46.934972  PCI: 00:15.3 [8086/0000] bus ops

  882 11:44:46.935025  PCI: 00:15.3 [8086/a0eb] enabled

  883 11:44:46.935078  PCI: 00:16.0 [8086/0000] ops

  884 11:44:46.935131  PCI: 00:16.0 [8086/a0e0] enabled

  885 11:44:46.935184  PCI: Static device PCI: 00:17.0 not found, disabling it.

  886 11:44:46.935237  PCI: 00:19.0 [8086/0000] bus ops

  887 11:44:46.935290  PCI: 00:19.0 [8086/a0c5] disabled

  888 11:44:46.935344  PCI: 00:19.1 [8086/0000] bus ops

  889 11:44:46.935397  PCI: 00:19.1 [8086/a0c6] enabled

  890 11:44:46.935449  PCI: 00:1d.0 [8086/0000] bus ops

  891 11:44:46.935502  PCI: 00:1d.0 [8086/a0b0] enabled

  892 11:44:46.935555  PCI: 00:1e.0 [8086/0000] ops

  893 11:44:46.935608  PCI: 00:1e.0 [8086/a0a8] enabled

  894 11:44:46.935660  PCI: 00:1e.2 [8086/0000] bus ops

  895 11:44:46.935713  PCI: 00:1e.2 [8086/a0aa] enabled

  896 11:44:46.935766  PCI: 00:1e.3 [8086/0000] bus ops

  897 11:44:46.935819  PCI: 00:1e.3 [8086/a0ab] enabled

  898 11:44:46.935872  PCI: 00:1f.0 [8086/0000] bus ops

  899 11:44:46.935924  PCI: 00:1f.0 [8086/a087] enabled

  900 11:44:46.935977  RTC Init

  901 11:44:46.936030  Set power on after power failure.

  902 11:44:46.936083  Disabling Deep S3

  903 11:44:46.936136  Disabling Deep S3

  904 11:44:46.936189  Disabling Deep S4

  905 11:44:46.936241  Disabling Deep S4

  906 11:44:46.936294  Disabling Deep S5

  907 11:44:46.936347  Disabling Deep S5

  908 11:44:46.936447  PCI: 00:1f.2 [0000/0000] hidden

  909 11:44:46.936500  PCI: 00:1f.3 [8086/0000] bus ops

  910 11:44:46.936553  PCI: 00:1f.3 [8086/a0c8] enabled

  911 11:44:46.936606  PCI: 00:1f.5 [8086/0000] bus ops

  912 11:44:46.936659  PCI: 00:1f.5 [8086/a0a4] enabled

  913 11:44:46.936712  PCI: Leftover static devices:

  914 11:44:46.936766  PCI: 00:10.2

  915 11:44:46.936818  PCI: 00:10.6

  916 11:44:46.936871  PCI: 00:10.7

  917 11:44:46.936923  PCI: 00:06.0

  918 11:44:46.936975  PCI: 00:07.1

  919 11:44:46.937028  PCI: 00:07.2

  920 11:44:46.937081  PCI: 00:07.3

  921 11:44:46.937134  PCI: 00:09.0

  922 11:44:46.937186  PCI: 00:0d.1

  923 11:44:46.937239  PCI: 00:0d.2

  924 11:44:46.937292  PCI: 00:0d.3

  925 11:44:46.937344  PCI: 00:0e.0

  926 11:44:46.937397  PCI: 00:12.0

  927 11:44:46.937449  PCI: 00:12.6

  928 11:44:46.937502  PCI: 00:13.0

  929 11:44:46.937554  PCI: 00:14.1

  930 11:44:46.937607  PCI: 00:16.1

  931 11:44:46.937659  PCI: 00:16.2

  932 11:44:46.937712  PCI: 00:16.3

  933 11:44:46.937764  PCI: 00:16.4

  934 11:44:46.937817  PCI: 00:16.5

  935 11:44:46.937870  PCI: 00:17.0

  936 11:44:46.937923  PCI: 00:19.2

  937 11:44:46.937975  PCI: 00:1e.1

  938 11:44:46.938028  PCI: 00:1f.1

  939 11:44:46.938088  PCI: 00:1f.4

  940 11:44:46.938151  PCI: 00:1f.6

  941 11:44:46.938204  PCI: 00:1f.7

  942 11:44:46.938257  PCI: Check your devicetree.cb.

  943 11:44:46.938311  PCI: 00:02.0 scanning...

  944 11:44:46.938365  scan_generic_bus for PCI: 00:02.0

  945 11:44:46.938418  scan_generic_bus for PCI: 00:02.0 done

  946 11:44:46.938471  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

  947 11:44:46.938524  PCI: 00:04.0 scanning...

  948 11:44:46.938578  scan_generic_bus for PCI: 00:04.0

  949 11:44:46.938631  GENERIC: 0.0 enabled

  950 11:44:46.938684  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

  951 11:44:46.938738  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

  952 11:44:46.938791  PCI: 00:0d.0 scanning...

  953 11:44:46.938844  scan_static_bus for PCI: 00:0d.0

  954 11:44:46.938897  USB0 port 0 enabled

  955 11:44:46.938950  USB0 port 0 scanning...

  956 11:44:46.939002  scan_static_bus for USB0 port 0

  957 11:44:46.939056  USB3 port 0 enabled

  958 11:44:46.939109  USB3 port 1 enabled

  959 11:44:46.939162  USB3 port 2 disabled

  960 11:44:46.939214  USB3 port 3 disabled

  961 11:44:46.939266  USB3 port 0 scanning...

  962 11:44:46.939319  scan_static_bus for USB3 port 0

  963 11:44:46.939372  scan_static_bus for USB3 port 0 done

  964 11:44:46.939425  scan_bus: bus USB3 port 0 finished in 6 msecs

  965 11:44:46.939478  USB3 port 1 scanning...

  966 11:44:46.939531  scan_static_bus for USB3 port 1

  967 11:44:46.939583  scan_static_bus for USB3 port 1 done

  968 11:44:46.939636  scan_bus: bus USB3 port 1 finished in 6 msecs

  969 11:44:46.939689  scan_static_bus for USB0 port 0 done

  970 11:44:46.939742  scan_bus: bus USB0 port 0 finished in 43 msecs

  971 11:44:46.939795  scan_static_bus for PCI: 00:0d.0 done

  972 11:44:46.939877  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs

  973 11:44:46.939971  PCI: 00:14.0 scanning...

  974 11:44:46.940056  scan_static_bus for PCI: 00:14.0

  975 11:44:46.940139  USB0 port 0 enabled

  976 11:44:46.940222  USB0 port 0 scanning...

  977 11:44:46.940305  scan_static_bus for USB0 port 0

  978 11:44:46.940403  USB2 port 0 disabled

  979 11:44:46.940473  USB2 port 1 enabled

  980 11:44:46.940526  USB2 port 2 enabled

  981 11:44:46.940579  USB2 port 3 disabled

  982 11:44:46.940632  USB2 port 4 enabled

  983 11:44:46.940685  USB2 port 5 disabled

  984 11:44:46.940738  USB2 port 6 disabled

  985 11:44:46.940791  USB2 port 7 disabled

  986 11:44:46.940854  USB2 port 8 disabled

  987 11:44:46.940928  USB2 port 9 disabled

  988 11:44:46.940983  USB3 port 0 disabled

  989 11:44:46.941036  USB3 port 1 enabled

  990 11:44:46.941089  USB3 port 2 disabled

  991 11:44:46.941142  USB3 port 3 disabled

  992 11:44:46.941386  USB2 port 1 scanning...

  993 11:44:46.941444  scan_static_bus for USB2 port 1

  994 11:44:46.941499  scan_static_bus for USB2 port 1 done

  995 11:44:46.941558  scan_bus: bus USB2 port 1 finished in 6 msecs

  996 11:44:46.941611  USB2 port 2 scanning...

  997 11:44:46.941675  scan_static_bus for USB2 port 2

  998 11:44:46.941732  scan_static_bus for USB2 port 2 done

  999 11:44:46.941788  scan_bus: bus USB2 port 2 finished in 6 msecs

 1000 11:44:46.941842  USB2 port 4 scanning...

 1001 11:44:46.941895  scan_static_bus for USB2 port 4

 1002 11:44:46.941948  scan_static_bus for USB2 port 4 done

 1003 11:44:46.942000  scan_bus: bus USB2 port 4 finished in 6 msecs

 1004 11:44:46.942057  USB3 port 1 scanning...

 1005 11:44:46.942139  scan_static_bus for USB3 port 1

 1006 11:44:46.942218  scan_static_bus for USB3 port 1 done

 1007 11:44:46.942273  scan_bus: bus USB3 port 1 finished in 6 msecs

 1008 11:44:46.942327  scan_static_bus for USB0 port 0 done

 1009 11:44:46.942380  scan_bus: bus USB0 port 0 finished in 93 msecs

 1010 11:44:46.942433  scan_static_bus for PCI: 00:14.0 done

 1011 11:44:46.942486  scan_bus: bus PCI: 00:14.0 finished in 110 msecs

 1012 11:44:46.942539  PCI: 00:14.3 scanning...

 1013 11:44:46.942592  scan_static_bus for PCI: 00:14.3

 1014 11:44:46.942645  GENERIC: 0.0 enabled

 1015 11:44:46.942697  scan_static_bus for PCI: 00:14.3 done

 1016 11:44:46.942750  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

 1017 11:44:46.942804  PCI: 00:15.0 scanning...

 1018 11:44:46.942858  scan_static_bus for PCI: 00:15.0

 1019 11:44:46.942910  I2C: 00:1a enabled

 1020 11:44:46.942963  I2C: 00:31 enabled

 1021 11:44:46.943016  I2C: 00:32 enabled

 1022 11:44:46.943068  scan_static_bus for PCI: 00:15.0 done

 1023 11:44:46.943121  scan_bus: bus PCI: 00:15.0 finished in 13 msecs

 1024 11:44:46.943174  PCI: 00:15.1 scanning...

 1025 11:44:46.943234  scan_static_bus for PCI: 00:15.1

 1026 11:44:46.943289  I2C: 00:10 enabled

 1027 11:44:46.943344  scan_static_bus for PCI: 00:15.1 done

 1028 11:44:46.943396  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

 1029 11:44:46.943449  PCI: 00:15.2 scanning...

 1030 11:44:46.943500  scan_static_bus for PCI: 00:15.2

 1031 11:44:46.943552  scan_static_bus for PCI: 00:15.2 done

 1032 11:44:46.943604  scan_bus: bus PCI: 00:15.2 finished in 7 msecs

 1033 11:44:46.943656  PCI: 00:15.3 scanning...

 1034 11:44:46.943708  scan_static_bus for PCI: 00:15.3

 1035 11:44:46.943759  scan_static_bus for PCI: 00:15.3 done

 1036 11:44:46.943811  scan_bus: bus PCI: 00:15.3 finished in 7 msecs

 1037 11:44:46.943862  PCI: 00:19.1 scanning...

 1038 11:44:46.943914  scan_static_bus for PCI: 00:19.1

 1039 11:44:46.943965  I2C: 00:15 enabled

 1040 11:44:46.944016  scan_static_bus for PCI: 00:19.1 done

 1041 11:44:46.944068  scan_bus: bus PCI: 00:19.1 finished in 9 msecs

 1042 11:44:46.944131  PCI: 00:1d.0 scanning...

 1043 11:44:46.944330  do_pci_scan_bridge for PCI: 00:1d.0

 1044 11:44:46.944467  PCI: pci_scan_bus for bus 01

 1045 11:44:46.944525  PCI: 01:00.0 [1c5c/174a] enabled

 1046 11:44:46.944579  GENERIC: 0.0 enabled

 1047 11:44:46.944632  Enabling Common Clock Configuration

 1048 11:44:46.944684  L1 Sub-State supported from root port 29

 1049 11:44:46.944737  L1 Sub-State Support = 0xf

 1050 11:44:46.944789  CommonModeRestoreTime = 0x28

 1051 11:44:46.944841  Power On Value = 0x16, Power On Scale = 0x0

 1052 11:44:46.944893  ASPM: Enabled L1

 1053 11:44:46.944962  PCIe: Max_Payload_Size adjusted to 128

 1054 11:44:46.945040  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs

 1055 11:44:46.945216  PCI: 00:1e.2 scanning...

 1056 11:44:46.945321  scan_generic_bus for PCI: 00:1e.2

 1057 11:44:46.945385  SPI: 00 enabled

 1058 11:44:46.945440  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done

 1059 11:44:46.945493  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

 1060 11:44:46.945546  PCI: 00:1e.3 scanning...

 1061 11:44:46.945598  scan_generic_bus for PCI: 00:1e.3

 1062 11:44:46.945651  SPI: 00 enabled

 1063 11:44:46.945703  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1064 11:44:46.945755  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1065 11:44:46.945807  PCI: 00:1f.0 scanning...

 1066 11:44:46.945859  scan_static_bus for PCI: 00:1f.0

 1067 11:44:46.945911  PNP: 0c09.0 enabled

 1068 11:44:46.945962  PNP: 0c09.0 scanning...

 1069 11:44:46.946014  scan_static_bus for PNP: 0c09.0

 1070 11:44:46.946066  scan_static_bus for PNP: 0c09.0 done

 1071 11:44:46.946118  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1072 11:44:46.946170  scan_static_bus for PCI: 00:1f.0 done

 1073 11:44:46.946221  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1074 11:44:46.946273  PCI: 00:1f.2 scanning...

 1075 11:44:46.946325  scan_static_bus for PCI: 00:1f.2

 1076 11:44:46.946377  GENERIC: 0.0 enabled

 1077 11:44:46.946429  GENERIC: 0.0 scanning...

 1078 11:44:46.946480  scan_static_bus for GENERIC: 0.0

 1079 11:44:46.946531  GENERIC: 0.0 enabled

 1080 11:44:46.946583  GENERIC: 1.0 enabled

 1081 11:44:46.946634  scan_static_bus for GENERIC: 0.0 done

 1082 11:44:46.946686  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1083 11:44:46.946754  scan_static_bus for PCI: 00:1f.2 done

 1084 11:44:46.946807  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1085 11:44:46.946858  PCI: 00:1f.3 scanning...

 1086 11:44:46.946928  scan_static_bus for PCI: 00:1f.3

 1087 11:44:46.947044  scan_static_bus for PCI: 00:1f.3 done

 1088 11:44:46.947098  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1089 11:44:46.947150  PCI: 00:1f.5 scanning...

 1090 11:44:46.947203  scan_generic_bus for PCI: 00:1f.5

 1091 11:44:46.947255  scan_generic_bus for PCI: 00:1f.5 done

 1092 11:44:46.947307  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1093 11:44:46.947359  scan_bus: bus DOMAIN: 0000 finished in 717 msecs

 1094 11:44:46.947418  scan_static_bus for Root Device done

 1095 11:44:46.947477  scan_bus: bus Root Device finished in 736 msecs

 1096 11:44:46.947532  done

 1097 11:44:46.947584  BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms

 1098 11:44:46.947637  Chrome EC: UHEPI supported

 1099 11:44:46.947689  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)

 1100 11:44:46.947742  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1101 11:44:46.947794  SPI flash protection: WPSW=1 SRP0=0

 1102 11:44:46.947846  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1103 11:44:46.947898  BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms

 1104 11:44:46.947950  found VGA at PCI: 00:02.0

 1105 11:44:46.948003  Setting up VGA for PCI: 00:02.0

 1106 11:44:46.948247  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1107 11:44:46.948308  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1108 11:44:46.948383  Allocating resources...

 1109 11:44:46.948450  Reading resources...

 1110 11:44:46.948502  Root Device read_resources bus 0 link: 0

 1111 11:44:46.948555  DOMAIN: 0000 read_resources bus 0 link: 0

 1112 11:44:46.948606  PCI: 00:04.0 read_resources bus 1 link: 0

 1113 11:44:46.948658  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1114 11:44:46.948710  PCI: 00:0d.0 read_resources bus 0 link: 0

 1115 11:44:46.948762  USB0 port 0 read_resources bus 0 link: 0

 1116 11:44:46.948814  USB0 port 0 read_resources bus 0 link: 0 done

 1117 11:44:46.948866  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1118 11:44:46.948918  PCI: 00:14.0 read_resources bus 0 link: 0

 1119 11:44:46.948970  USB0 port 0 read_resources bus 0 link: 0

 1120 11:44:46.949022  USB0 port 0 read_resources bus 0 link: 0 done

 1121 11:44:46.949074  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1122 11:44:46.949126  PCI: 00:14.3 read_resources bus 0 link: 0

 1123 11:44:46.949179  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1124 11:44:46.949231  PCI: 00:15.0 read_resources bus 0 link: 0

 1125 11:44:46.949283  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1126 11:44:46.949335  PCI: 00:15.1 read_resources bus 0 link: 0

 1127 11:44:46.949387  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1128 11:44:46.949439  PCI: 00:19.1 read_resources bus 0 link: 0

 1129 11:44:46.949491  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1130 11:44:46.949543  PCI: 00:1d.0 read_resources bus 1 link: 0

 1131 11:44:46.949595  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1132 11:44:46.949647  PCI: 00:1e.2 read_resources bus 2 link: 0

 1133 11:44:46.949699  PCI: 00:1e.2 read_resources bus 2 link: 0 done

 1134 11:44:46.949751  PCI: 00:1e.3 read_resources bus 3 link: 0

 1135 11:44:46.949804  PCI: 00:1e.3 read_resources bus 3 link: 0 done

 1136 11:44:46.949864  PCI: 00:1f.0 read_resources bus 0 link: 0

 1137 11:44:46.950105  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1138 11:44:46.950205  PCI: 00:1f.2 read_resources bus 0 link: 0

 1139 11:44:46.950290  GENERIC: 0.0 read_resources bus 0 link: 0

 1140 11:44:46.950467  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1141 11:44:46.950571  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1142 11:44:46.950635  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1143 11:44:46.950690  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1144 11:44:46.950743  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1145 11:44:46.950796  Root Device read_resources bus 0 link: 0 done

 1146 11:44:46.950849  Done reading resources.

 1147 11:44:46.950901  Show resources in subtree (Root Device)...After reading.

 1148 11:44:46.950987   Root Device child on link 0 DOMAIN: 0000

 1149 11:44:46.951084    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1150 11:44:46.951167    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1151 11:44:46.951251    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1152 11:44:46.951334     PCI: 00:00.0

 1153 11:44:46.951417     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1154 11:44:46.951500     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1155 11:44:46.951584     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1156 11:44:46.951668     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1157 11:44:46.951751     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1158 11:44:46.951834     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1159 11:44:46.951921     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1160 11:44:46.952058     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1161 11:44:46.952183     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1162 11:44:46.952280     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1163 11:44:46.952416     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1164 11:44:46.952476     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1165 11:44:46.952529     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1166 11:44:46.952583     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1167 11:44:46.952636     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1168 11:44:46.952689     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1169 11:44:46.952742     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1170 11:44:46.952795     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1171 11:44:46.952848     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1172 11:44:46.953092     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1173 11:44:46.953158     PCI: 00:02.0

 1174 11:44:46.953214     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1175 11:44:46.953268     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1176 11:44:46.953323     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1177 11:44:46.953376     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1178 11:44:46.953429     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1179 11:44:46.953486      GENERIC: 0.0

 1180 11:44:46.953539     PCI: 00:05.0

 1181 11:44:46.953591     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1182 11:44:46.953657     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1183 11:44:46.953711      GENERIC: 0.0

 1184 11:44:46.953875     PCI: 00:08.0

 1185 11:44:46.953984     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1186 11:44:46.954054     PCI: 00:0a.0

 1187 11:44:46.954111     PCI: 00:0d.0 child on link 0 USB0 port 0

 1188 11:44:46.954169     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1189 11:44:46.954256      USB0 port 0 child on link 0 USB3 port 0

 1190 11:44:46.954339       USB3 port 0

 1191 11:44:46.954420       USB3 port 1

 1192 11:44:46.954599       USB3 port 2

 1193 11:44:46.954732       USB3 port 3

 1194 11:44:46.954830     PCI: 00:14.0 child on link 0 USB0 port 0

 1195 11:44:46.954916     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1196 11:44:46.955000      USB0 port 0 child on link 0 USB2 port 0

 1197 11:44:46.955082       USB2 port 0

 1198 11:44:46.955164       USB2 port 1

 1199 11:44:46.955345       USB2 port 2

 1200 11:44:46.955469       USB2 port 3

 1201 11:44:46.955565       USB2 port 4

 1202 11:44:46.955648       USB2 port 5

 1203 11:44:46.955730       USB2 port 6

 1204 11:44:46.955811       USB2 port 7

 1205 11:44:46.955892       USB2 port 8

 1206 11:44:46.955973       USB2 port 9

 1207 11:44:46.956054       USB3 port 0

 1208 11:44:46.956149       USB3 port 1

 1209 11:44:46.956232       USB3 port 2

 1210 11:44:46.957555       USB3 port 3

 1211 11:44:46.957638     PCI: 00:14.2

 1212 11:44:46.967421     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1213 11:44:46.977583     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1214 11:44:46.984439     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1215 11:44:46.994212     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1216 11:44:46.994294      GENERIC: 0.0

 1217 11:44:47.000610     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1218 11:44:47.007726     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1219 11:44:47.011037      I2C: 00:1a

 1220 11:44:47.011121      I2C: 00:31

 1221 11:44:47.014502      I2C: 00:32

 1222 11:44:47.017780     PCI: 00:15.1 child on link 0 I2C: 00:10

 1223 11:44:47.027445     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1224 11:44:47.030754      I2C: 00:10

 1225 11:44:47.030837     PCI: 00:15.2

 1226 11:44:47.040717     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1227 11:44:47.043873     PCI: 00:15.3

 1228 11:44:47.054099     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1229 11:44:47.054183     PCI: 00:16.0

 1230 11:44:47.063780     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1231 11:44:47.067433     PCI: 00:19.0

 1232 11:44:47.070570     PCI: 00:19.1 child on link 0 I2C: 00:15

 1233 11:44:47.080206     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1234 11:44:47.080291      I2C: 00:15

 1235 11:44:47.086745     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1236 11:44:47.093865     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1237 11:44:47.103384     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1238 11:44:47.113793     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1239 11:44:47.116559      GENERIC: 0.0

 1240 11:44:47.116641      PCI: 01:00.0

 1241 11:44:47.126640      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1242 11:44:47.136901      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18

 1243 11:44:47.146999      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c

 1244 11:44:47.147085     PCI: 00:1e.0

 1245 11:44:47.160033     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1246 11:44:47.163352     PCI: 00:1e.2 child on link 0 SPI: 00

 1247 11:44:47.173186     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1248 11:44:47.173296      SPI: 00

 1249 11:44:47.176816     PCI: 00:1e.3 child on link 0 SPI: 00

 1250 11:44:47.186364     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1251 11:44:47.190221      SPI: 00

 1252 11:44:47.193217     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1253 11:44:47.203060     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1254 11:44:47.203142      PNP: 0c09.0

 1255 11:44:47.213082      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1256 11:44:47.216405     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1257 11:44:47.226706     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1258 11:44:47.236509     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1259 11:44:47.239812      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1260 11:44:47.243033       GENERIC: 0.0

 1261 11:44:47.243129       GENERIC: 1.0

 1262 11:44:47.246380     PCI: 00:1f.3

 1263 11:44:47.256433     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1264 11:44:47.266106     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1265 11:44:47.266193     PCI: 00:1f.5

 1266 11:44:47.276253     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1267 11:44:47.282705    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1268 11:44:47.282816     APIC: 00

 1269 11:44:47.282902     APIC: 01

 1270 11:44:47.286103     APIC: 03

 1271 11:44:47.286216     APIC: 04

 1272 11:44:47.286301     APIC: 06

 1273 11:44:47.289754     APIC: 07

 1274 11:44:47.289874     APIC: 02

 1275 11:44:47.292780     APIC: 05

 1276 11:44:47.299601  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1277 11:44:47.305998   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1278 11:44:47.309748   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1279 11:44:47.316122   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1280 11:44:47.322605    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1281 11:44:47.325962    PCI: 01:00.0 18 *  [0x4000 - 0x4fff] mem

 1282 11:44:47.329370    PCI: 01:00.0 1c *  [0x5000 - 0x5fff] mem

 1283 11:44:47.336121   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1284 11:44:47.342923   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1285 11:44:47.352778   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1286 11:44:47.359423  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1287 11:44:47.366111  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1288 11:44:47.372692   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1289 11:44:47.379667   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1290 11:44:47.389125   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1291 11:44:47.392626   DOMAIN: 0000: Resource ranges:

 1292 11:44:47.396033   * Base: 1000, Size: 800, Tag: 100

 1293 11:44:47.399104   * Base: 1900, Size: e700, Tag: 100

 1294 11:44:47.402615    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1295 11:44:47.408778  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1296 11:44:47.416012  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1297 11:44:47.425279   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)

 1298 11:44:47.432013   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)

 1299 11:44:47.438655   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 1300 11:44:47.449028   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 1301 11:44:47.455333   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)

 1302 11:44:47.462075   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 1303 11:44:47.472170   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)

 1304 11:44:47.478753   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)

 1305 11:44:47.485275   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)

 1306 11:44:47.495502   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)

 1307 11:44:47.502273   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)

 1308 11:44:47.509081   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)

 1309 11:44:47.518902   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)

 1310 11:44:47.525434   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)

 1311 11:44:47.531921   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)

 1312 11:44:47.541839   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)

 1313 11:44:47.548543   update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)

 1314 11:44:47.555379   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)

 1315 11:44:47.564854   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)

 1316 11:44:47.571856   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)

 1317 11:44:47.578471   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1318 11:44:47.588396   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1319 11:44:47.591584   DOMAIN: 0000: Resource ranges:

 1320 11:44:47.594782   * Base: 7fc00000, Size: 40400000, Tag: 200

 1321 11:44:47.598334   * Base: d0000000, Size: 28000000, Tag: 200

 1322 11:44:47.605160   * Base: fa000000, Size: 1000000, Tag: 200

 1323 11:44:47.608549   * Base: fb001000, Size: 2fff000, Tag: 200

 1324 11:44:47.611708   * Base: fe010000, Size: 2e000, Tag: 200

 1325 11:44:47.614600   * Base: fe03f000, Size: d41000, Tag: 200

 1326 11:44:47.621739   * Base: fed88000, Size: 8000, Tag: 200

 1327 11:44:47.625000   * Base: fed93000, Size: d000, Tag: 200

 1328 11:44:47.628337   * Base: feda2000, Size: 1e000, Tag: 200

 1329 11:44:47.631455   * Base: fede0000, Size: 1220000, Tag: 200

 1330 11:44:47.638093   * Base: 280400000, Size: 7d7fc00000, Tag: 100200

 1331 11:44:47.644923    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem

 1332 11:44:47.651624    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem

 1333 11:44:47.657980    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem

 1334 11:44:47.664775    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem

 1335 11:44:47.671494    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem

 1336 11:44:47.678218    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem

 1337 11:44:47.684227    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem

 1338 11:44:47.691076    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem

 1339 11:44:47.697857    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem

 1340 11:44:47.704178    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem

 1341 11:44:47.710811    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem

 1342 11:44:47.717571    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem

 1343 11:44:47.724347    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem

 1344 11:44:47.730909    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem

 1345 11:44:47.737466    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem

 1346 11:44:47.744136    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem

 1347 11:44:47.750742    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem

 1348 11:44:47.757276    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem

 1349 11:44:47.763796    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem

 1350 11:44:47.770899    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem

 1351 11:44:47.777089    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem

 1352 11:44:47.783705    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem

 1353 11:44:47.790459  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1354 11:44:47.800666  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff

 1355 11:44:47.804005   PCI: 00:1d.0: Resource ranges:

 1356 11:44:47.807035   * Base: 7fc00000, Size: 100000, Tag: 200

 1357 11:44:47.813677    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem

 1358 11:44:47.820602    PCI: 01:00.0 18 *  [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem

 1359 11:44:47.827125    PCI: 01:00.0 1c *  [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem

 1360 11:44:47.833543  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done

 1361 11:44:47.840284  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1362 11:44:47.847177  Root Device assign_resources, bus 0 link: 0

 1363 11:44:47.850463  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1364 11:44:47.860492  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64

 1365 11:44:47.867026  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64

 1366 11:44:47.876907  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1367 11:44:47.883607  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64

 1368 11:44:47.886947  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1369 11:44:47.893573  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1370 11:44:47.900264  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64

 1371 11:44:47.910460  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64

 1372 11:44:47.917095  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64

 1373 11:44:47.923725  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1374 11:44:47.927003  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1375 11:44:47.936811  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64

 1376 11:44:47.940171  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1377 11:44:47.943529  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1378 11:44:47.953607  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64

 1379 11:44:47.960219  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64

 1380 11:44:47.969771  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64

 1381 11:44:47.973368  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1382 11:44:47.976838  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1383 11:44:47.986872  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64

 1384 11:44:47.989837  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1385 11:44:47.996431  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1386 11:44:48.003470  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64

 1387 11:44:48.010109  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1388 11:44:48.013192  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1389 11:44:48.019621  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64

 1390 11:44:48.029974  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64

 1391 11:44:48.036768  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64

 1392 11:44:48.046299  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64

 1393 11:44:48.049641  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1394 11:44:48.056384  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1395 11:44:48.062906  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1396 11:44:48.072839  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1397 11:44:48.083083  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem

 1398 11:44:48.086343  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1399 11:44:48.096049  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64

 1400 11:44:48.102633  PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem

 1401 11:44:48.109388  PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem

 1402 11:44:48.116090  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1403 11:44:48.122743  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64

 1404 11:44:48.129424  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1405 11:44:48.132808  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1406 11:44:48.142754  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64

 1407 11:44:48.146150  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1408 11:44:48.149267  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1409 11:44:48.156004  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1410 11:44:48.159255  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1411 11:44:48.166069  LPC: Trying to open IO window from 800 size 1ff

 1412 11:44:48.172645  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64

 1413 11:44:48.182652  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64

 1414 11:44:48.189222  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem

 1415 11:44:48.195957  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1416 11:44:48.199379  Root Device assign_resources, bus 0 link: 0

 1417 11:44:48.202462  Done setting resources.

 1418 11:44:48.209069  Show resources in subtree (Root Device)...After assigning values.

 1419 11:44:48.212332   Root Device child on link 0 DOMAIN: 0000

 1420 11:44:48.216043    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1421 11:44:48.225898    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1422 11:44:48.235635    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1423 11:44:48.238869     PCI: 00:00.0

 1424 11:44:48.249066     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1425 11:44:48.255798     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1426 11:44:48.265746     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1427 11:44:48.275678     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1428 11:44:48.285581     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1429 11:44:48.295362     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1430 11:44:48.302047     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1431 11:44:48.312311     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1432 11:44:48.322040     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1433 11:44:48.332158     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1434 11:44:48.342348     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1435 11:44:48.352251     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1436 11:44:48.358893     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1437 11:44:48.368625     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1438 11:44:48.378506     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1439 11:44:48.388449     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1440 11:44:48.398570     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1441 11:44:48.408463     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1442 11:44:48.414871     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1443 11:44:48.424857     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1444 11:44:48.428095     PCI: 00:02.0

 1445 11:44:48.438016     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10

 1446 11:44:48.448005     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18

 1447 11:44:48.458094     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1448 11:44:48.461364     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1449 11:44:48.474781     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10

 1450 11:44:48.475207      GENERIC: 0.0

 1451 11:44:48.477950     PCI: 00:05.0

 1452 11:44:48.487829     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10

 1453 11:44:48.491843     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1454 11:44:48.494721      GENERIC: 0.0

 1455 11:44:48.495358     PCI: 00:08.0

 1456 11:44:48.505162     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10

 1457 11:44:48.508333     PCI: 00:0a.0

 1458 11:44:48.511622     PCI: 00:0d.0 child on link 0 USB0 port 0

 1459 11:44:48.521120     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10

 1460 11:44:48.528042      USB0 port 0 child on link 0 USB3 port 0

 1461 11:44:48.528617       USB3 port 0

 1462 11:44:48.531138       USB3 port 1

 1463 11:44:48.531555       USB3 port 2

 1464 11:44:48.534425       USB3 port 3

 1465 11:44:48.537827     PCI: 00:14.0 child on link 0 USB0 port 0

 1466 11:44:48.548095     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10

 1467 11:44:48.551109      USB0 port 0 child on link 0 USB2 port 0

 1468 11:44:48.554658       USB2 port 0

 1469 11:44:48.558031       USB2 port 1

 1470 11:44:48.558524       USB2 port 2

 1471 11:44:48.561115       USB2 port 3

 1472 11:44:48.561533       USB2 port 4

 1473 11:44:48.564700       USB2 port 5

 1474 11:44:48.565118       USB2 port 6

 1475 11:44:48.568016       USB2 port 7

 1476 11:44:48.568461       USB2 port 8

 1477 11:44:48.571350       USB2 port 9

 1478 11:44:48.571768       USB3 port 0

 1479 11:44:48.574576       USB3 port 1

 1480 11:44:48.574995       USB3 port 2

 1481 11:44:48.577865       USB3 port 3

 1482 11:44:48.578320     PCI: 00:14.2

 1483 11:44:48.590792     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10

 1484 11:44:48.600693     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18

 1485 11:44:48.603881     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1486 11:44:48.614090     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10

 1487 11:44:48.617111      GENERIC: 0.0

 1488 11:44:48.621119     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1489 11:44:48.630632     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10

 1490 11:44:48.633926      I2C: 00:1a

 1491 11:44:48.634344      I2C: 00:31

 1492 11:44:48.634672      I2C: 00:32

 1493 11:44:48.640513     PCI: 00:15.1 child on link 0 I2C: 00:10

 1494 11:44:48.650907     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10

 1495 11:44:48.651331      I2C: 00:10

 1496 11:44:48.654042     PCI: 00:15.2

 1497 11:44:48.663848     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10

 1498 11:44:48.664284     PCI: 00:15.3

 1499 11:44:48.677082     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10

 1500 11:44:48.677516     PCI: 00:16.0

 1501 11:44:48.686995     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10

 1502 11:44:48.690455     PCI: 00:19.0

 1503 11:44:48.693865     PCI: 00:19.1 child on link 0 I2C: 00:15

 1504 11:44:48.703672     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10

 1505 11:44:48.707378      I2C: 00:15

 1506 11:44:48.710803     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1507 11:44:48.720416     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1508 11:44:48.730527     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1509 11:44:48.740474     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20

 1510 11:44:48.743877      GENERIC: 0.0

 1511 11:44:48.744336      PCI: 01:00.0

 1512 11:44:48.756624      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10

 1513 11:44:48.766825      PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18

 1514 11:44:48.777093      PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c

 1515 11:44:48.777517     PCI: 00:1e.0

 1516 11:44:48.790396     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1517 11:44:48.794102     PCI: 00:1e.2 child on link 0 SPI: 00

 1518 11:44:48.803333     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10

 1519 11:44:48.803816      SPI: 00

 1520 11:44:48.809818     PCI: 00:1e.3 child on link 0 SPI: 00

 1521 11:44:48.820040     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10

 1522 11:44:48.820504      SPI: 00

 1523 11:44:48.823396     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1524 11:44:48.833566     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1525 11:44:48.836761      PNP: 0c09.0

 1526 11:44:48.843338      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1527 11:44:48.850067     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1528 11:44:48.856788     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1529 11:44:48.866306     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1530 11:44:48.872943      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1531 11:44:48.873355       GENERIC: 0.0

 1532 11:44:48.876306       GENERIC: 1.0

 1533 11:44:48.876795     PCI: 00:1f.3

 1534 11:44:48.886235     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10

 1535 11:44:48.899487     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20

 1536 11:44:48.899991     PCI: 00:1f.5

 1537 11:44:48.909790     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10

 1538 11:44:48.912787    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1539 11:44:48.916142     APIC: 00

 1540 11:44:48.916632     APIC: 01

 1541 11:44:48.919330     APIC: 03

 1542 11:44:48.919750     APIC: 04

 1543 11:44:48.920083     APIC: 06

 1544 11:44:48.923019     APIC: 07

 1545 11:44:48.923439     APIC: 02

 1546 11:44:48.923771     APIC: 05

 1547 11:44:48.926174  Done allocating resources.

 1548 11:44:48.933135  BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms

 1549 11:44:48.939209  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

 1550 11:44:48.942354  Configure GPIOs for I2S audio on UP4.

 1551 11:44:48.949387  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms

 1552 11:44:48.952640  Enabling resources...

 1553 11:44:48.955894  PCI: 00:00.0 subsystem <- 8086/9a12

 1554 11:44:48.959253  PCI: 00:00.0 cmd <- 06

 1555 11:44:48.962609  PCI: 00:02.0 subsystem <- 8086/9a40

 1556 11:44:48.966102  PCI: 00:02.0 cmd <- 03

 1557 11:44:48.968906  PCI: 00:04.0 subsystem <- 8086/9a03

 1558 11:44:48.972165  PCI: 00:04.0 cmd <- 02

 1559 11:44:48.975597  PCI: 00:05.0 subsystem <- 8086/9a19

 1560 11:44:48.975679  PCI: 00:05.0 cmd <- 02

 1561 11:44:48.982229  PCI: 00:08.0 subsystem <- 8086/9a11

 1562 11:44:48.982311  PCI: 00:08.0 cmd <- 06

 1563 11:44:48.985620  PCI: 00:0d.0 subsystem <- 8086/9a13

 1564 11:44:48.988959  PCI: 00:0d.0 cmd <- 02

 1565 11:44:48.992154  PCI: 00:14.0 subsystem <- 8086/a0ed

 1566 11:44:48.995332  PCI: 00:14.0 cmd <- 02

 1567 11:44:48.998639  PCI: 00:14.2 subsystem <- 8086/a0ef

 1568 11:44:49.001934  PCI: 00:14.2 cmd <- 02

 1569 11:44:49.005230  PCI: 00:14.3 subsystem <- 8086/a0f0

 1570 11:44:49.008952  PCI: 00:14.3 cmd <- 02

 1571 11:44:49.012042  PCI: 00:15.0 subsystem <- 8086/a0e8

 1572 11:44:49.015310  PCI: 00:15.0 cmd <- 02

 1573 11:44:49.018770  PCI: 00:15.1 subsystem <- 8086/a0e9

 1574 11:44:49.022777  PCI: 00:15.1 cmd <- 02

 1575 11:44:49.025279  PCI: 00:15.2 subsystem <- 8086/a0ea

 1576 11:44:49.025361  PCI: 00:15.2 cmd <- 02

 1577 11:44:49.031725  PCI: 00:15.3 subsystem <- 8086/a0eb

 1578 11:44:49.031807  PCI: 00:15.3 cmd <- 02

 1579 11:44:49.035015  PCI: 00:16.0 subsystem <- 8086/a0e0

 1580 11:44:49.038442  PCI: 00:16.0 cmd <- 02

 1581 11:44:49.041632  PCI: 00:19.1 subsystem <- 8086/a0c6

 1582 11:44:49.045508  PCI: 00:19.1 cmd <- 02

 1583 11:44:49.048534  PCI: 00:1d.0 bridge ctrl <- 0013

 1584 11:44:49.051721  PCI: 00:1d.0 subsystem <- 8086/a0b0

 1585 11:44:49.055149  PCI: 00:1d.0 cmd <- 06

 1586 11:44:49.058555  PCI: 00:1e.0 subsystem <- 8086/a0a8

 1587 11:44:49.061801  PCI: 00:1e.0 cmd <- 06

 1588 11:44:49.065148  PCI: 00:1e.2 subsystem <- 8086/a0aa

 1589 11:44:49.068637  PCI: 00:1e.2 cmd <- 06

 1590 11:44:49.071918  PCI: 00:1e.3 subsystem <- 8086/a0ab

 1591 11:44:49.075328  PCI: 00:1e.3 cmd <- 02

 1592 11:44:49.078071  PCI: 00:1f.0 subsystem <- 8086/a087

 1593 11:44:49.078183  PCI: 00:1f.0 cmd <- 407

 1594 11:44:49.085332  PCI: 00:1f.3 subsystem <- 8086/a0c8

 1595 11:44:49.085415  PCI: 00:1f.3 cmd <- 02

 1596 11:44:49.088642  PCI: 00:1f.5 subsystem <- 8086/a0a4

 1597 11:44:49.091473  PCI: 00:1f.5 cmd <- 406

 1598 11:44:49.096288  PCI: 01:00.0 cmd <- 02

 1599 11:44:49.100940  done.

 1600 11:44:49.104222  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms

 1601 11:44:49.107578  Initializing devices...

 1602 11:44:49.110839  Root Device init

 1603 11:44:49.114141  Chrome EC: Set SMI mask to 0x0000000000000000

 1604 11:44:49.121036  Chrome EC: clear events_b mask to 0x0000000000000000

 1605 11:44:49.127777  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1606 11:44:49.130493  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e

 1607 11:44:49.137667  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e

 1608 11:44:49.144273  Chrome EC: Set WAKE mask to 0x0000000000000000

 1609 11:44:49.147533  fw_config match found: DB_USB=USB3_ACTIVE

 1610 11:44:49.154177  Configure Right Type-C port orientation for retimer

 1611 11:44:49.157561  Root Device init finished in 43 msecs

 1612 11:44:49.160407  PCI: 00:00.0 init

 1613 11:44:49.163717  CPU TDP = 9 Watts

 1614 11:44:49.163798  CPU PL1 = 9 Watts

 1615 11:44:49.167214  CPU PL2 = 40 Watts

 1616 11:44:49.170549  CPU PL4 = 83 Watts

 1617 11:44:49.173877  PCI: 00:00.0 init finished in 8 msecs

 1618 11:44:49.173963  PCI: 00:02.0 init

 1619 11:44:49.177317  GMA: Found VBT in CBFS

 1620 11:44:49.180615  GMA: Found valid VBT in CBFS

 1621 11:44:49.187191  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1622 11:44:49.193873                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000

 1623 11:44:49.197071  PCI: 00:02.0 init finished in 18 msecs

 1624 11:44:49.200481  PCI: 00:05.0 init

 1625 11:44:49.203841  PCI: 00:05.0 init finished in 0 msecs

 1626 11:44:49.206764  PCI: 00:08.0 init

 1627 11:44:49.210230  PCI: 00:08.0 init finished in 0 msecs

 1628 11:44:49.213563  PCI: 00:14.0 init

 1629 11:44:49.216859  PCI: 00:14.0 init finished in 0 msecs

 1630 11:44:49.220136  PCI: 00:14.2 init

 1631 11:44:49.223884  PCI: 00:14.2 init finished in 0 msecs

 1632 11:44:49.226998  PCI: 00:15.0 init

 1633 11:44:49.227265  I2C bus 0 version 0x3230302a

 1634 11:44:49.233739  DW I2C bus 0 at 0x7fe4e000 (400 KHz)

 1635 11:44:49.237260  PCI: 00:15.0 init finished in 6 msecs

 1636 11:44:49.237685  PCI: 00:15.1 init

 1637 11:44:49.240330  I2C bus 1 version 0x3230302a

 1638 11:44:49.243733  DW I2C bus 1 at 0x7fe4f000 (400 KHz)

 1639 11:44:49.246944  PCI: 00:15.1 init finished in 6 msecs

 1640 11:44:49.250913  PCI: 00:15.2 init

 1641 11:44:49.253626  I2C bus 2 version 0x3230302a

 1642 11:44:49.256911  DW I2C bus 2 at 0x7fe50000 (400 KHz)

 1643 11:44:49.260830  PCI: 00:15.2 init finished in 6 msecs

 1644 11:44:49.263923  PCI: 00:15.3 init

 1645 11:44:49.267156  I2C bus 3 version 0x3230302a

 1646 11:44:49.270604  DW I2C bus 3 at 0x7fe51000 (400 KHz)

 1647 11:44:49.274352  PCI: 00:15.3 init finished in 6 msecs

 1648 11:44:49.277330  PCI: 00:16.0 init

 1649 11:44:49.280794  PCI: 00:16.0 init finished in 0 msecs

 1650 11:44:49.284129  PCI: 00:19.1 init

 1651 11:44:49.284637  I2C bus 5 version 0x3230302a

 1652 11:44:49.290363  DW I2C bus 5 at 0x7fe53000 (400 KHz)

 1653 11:44:49.293636  PCI: 00:19.1 init finished in 6 msecs

 1654 11:44:49.294061  PCI: 00:1d.0 init

 1655 11:44:49.297120  Initializing PCH PCIe bridge.

 1656 11:44:49.300422  PCI: 00:1d.0 init finished in 3 msecs

 1657 11:44:49.304894  PCI: 00:1f.0 init

 1658 11:44:49.308163  IOAPIC: Initializing IOAPIC at 0xfec00000

 1659 11:44:49.314927  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1660 11:44:49.315393  IOAPIC: ID = 0x02

 1661 11:44:49.318393  IOAPIC: Dumping registers

 1662 11:44:49.321179    reg 0x0000: 0x02000000

 1663 11:44:49.324470    reg 0x0001: 0x00770020

 1664 11:44:49.324893    reg 0x0002: 0x00000000

 1665 11:44:49.331154  PCI: 00:1f.0 init finished in 21 msecs

 1666 11:44:49.331577  PCI: 00:1f.2 init

 1667 11:44:49.334666  Disabling ACPI via APMC.

 1668 11:44:49.338016  APMC done.

 1669 11:44:49.341433  PCI: 00:1f.2 init finished in 5 msecs

 1670 11:44:49.353361  PCI: 01:00.0 init

 1671 11:44:49.356487  PCI: 01:00.0 init finished in 0 msecs

 1672 11:44:49.359458  PNP: 0c09.0 init

 1673 11:44:49.362709  Google Chrome EC uptime: 10.108 seconds

 1674 11:44:49.370076  Google Chrome AP resets since EC boot: 0

 1675 11:44:49.372853  Google Chrome most recent AP reset causes:

 1676 11:44:49.379777  Google Chrome EC reset flags at last EC boot: reset-pin | hard

 1677 11:44:49.383144  PNP: 0c09.0 init finished in 19 msecs

 1678 11:44:49.388142  Devices initialized

 1679 11:44:49.391576  Show all devs... After init.

 1680 11:44:49.394782  Root Device: enabled 1

 1681 11:44:49.395199  DOMAIN: 0000: enabled 1

 1682 11:44:49.398125  CPU_CLUSTER: 0: enabled 1

 1683 11:44:49.401604  PCI: 00:00.0: enabled 1

 1684 11:44:49.404834  PCI: 00:02.0: enabled 1

 1685 11:44:49.405255  PCI: 00:04.0: enabled 1

 1686 11:44:49.408253  PCI: 00:05.0: enabled 1

 1687 11:44:49.411600  PCI: 00:06.0: enabled 0

 1688 11:44:49.414858  PCI: 00:07.0: enabled 0

 1689 11:44:49.415282  PCI: 00:07.1: enabled 0

 1690 11:44:49.417940  PCI: 00:07.2: enabled 0

 1691 11:44:49.421047  PCI: 00:07.3: enabled 0

 1692 11:44:49.424920  PCI: 00:08.0: enabled 1

 1693 11:44:49.425365  PCI: 00:09.0: enabled 0

 1694 11:44:49.428257  PCI: 00:0a.0: enabled 0

 1695 11:44:49.431057  PCI: 00:0d.0: enabled 1

 1696 11:44:49.434438  PCI: 00:0d.1: enabled 0

 1697 11:44:49.434859  PCI: 00:0d.2: enabled 0

 1698 11:44:49.438217  PCI: 00:0d.3: enabled 0

 1699 11:44:49.441757  PCI: 00:0e.0: enabled 0

 1700 11:44:49.442177  PCI: 00:10.2: enabled 1

 1701 11:44:49.444645  PCI: 00:10.6: enabled 0

 1702 11:44:49.448241  PCI: 00:10.7: enabled 0

 1703 11:44:49.451334  PCI: 00:12.0: enabled 0

 1704 11:44:49.451752  PCI: 00:12.6: enabled 0

 1705 11:44:49.454664  PCI: 00:13.0: enabled 0

 1706 11:44:49.457544  PCI: 00:14.0: enabled 1

 1707 11:44:49.461096  PCI: 00:14.1: enabled 0

 1708 11:44:49.461517  PCI: 00:14.2: enabled 1

 1709 11:44:49.464550  PCI: 00:14.3: enabled 1

 1710 11:44:49.467643  PCI: 00:15.0: enabled 1

 1711 11:44:49.470922  PCI: 00:15.1: enabled 1

 1712 11:44:49.471337  PCI: 00:15.2: enabled 1

 1713 11:44:49.474319  PCI: 00:15.3: enabled 1

 1714 11:44:49.477622  PCI: 00:16.0: enabled 1

 1715 11:44:49.481053  PCI: 00:16.1: enabled 0

 1716 11:44:49.481468  PCI: 00:16.2: enabled 0

 1717 11:44:49.484416  PCI: 00:16.3: enabled 0

 1718 11:44:49.487569  PCI: 00:16.4: enabled 0

 1719 11:44:49.487983  PCI: 00:16.5: enabled 0

 1720 11:44:49.491198  PCI: 00:17.0: enabled 0

 1721 11:44:49.494241  PCI: 00:19.0: enabled 0

 1722 11:44:49.497564  PCI: 00:19.1: enabled 1

 1723 11:44:49.497986  PCI: 00:19.2: enabled 0

 1724 11:44:49.500806  PCI: 00:1c.0: enabled 1

 1725 11:44:49.504403  PCI: 00:1c.1: enabled 0

 1726 11:44:49.507399  PCI: 00:1c.2: enabled 0

 1727 11:44:49.507814  PCI: 00:1c.3: enabled 0

 1728 11:44:49.510847  PCI: 00:1c.4: enabled 0

 1729 11:44:49.514165  PCI: 00:1c.5: enabled 0

 1730 11:44:49.517419  PCI: 00:1c.6: enabled 1

 1731 11:44:49.517836  PCI: 00:1c.7: enabled 0

 1732 11:44:49.520796  PCI: 00:1d.0: enabled 1

 1733 11:44:49.524262  PCI: 00:1d.1: enabled 0

 1734 11:44:49.527427  PCI: 00:1d.2: enabled 1

 1735 11:44:49.527881  PCI: 00:1d.3: enabled 0

 1736 11:44:49.530687  PCI: 00:1e.0: enabled 1

 1737 11:44:49.533948  PCI: 00:1e.1: enabled 0

 1738 11:44:49.534371  PCI: 00:1e.2: enabled 1

 1739 11:44:49.537295  PCI: 00:1e.3: enabled 1

 1740 11:44:49.540710  PCI: 00:1f.0: enabled 1

 1741 11:44:49.543908  PCI: 00:1f.1: enabled 0

 1742 11:44:49.544469  PCI: 00:1f.2: enabled 1

 1743 11:44:49.547105  PCI: 00:1f.3: enabled 1

 1744 11:44:49.550871  PCI: 00:1f.4: enabled 0

 1745 11:44:49.554087  PCI: 00:1f.5: enabled 1

 1746 11:44:49.554576  PCI: 00:1f.6: enabled 0

 1747 11:44:49.557460  PCI: 00:1f.7: enabled 0

 1748 11:44:49.560791  APIC: 00: enabled 1

 1749 11:44:49.561315  GENERIC: 0.0: enabled 1

 1750 11:44:49.563687  GENERIC: 0.0: enabled 1

 1751 11:44:49.567466  GENERIC: 1.0: enabled 1

 1752 11:44:49.570588  GENERIC: 0.0: enabled 1

 1753 11:44:49.571075  GENERIC: 1.0: enabled 1

 1754 11:44:49.573962  USB0 port 0: enabled 1

 1755 11:44:49.577288  GENERIC: 0.0: enabled 1

 1756 11:44:49.580468  USB0 port 0: enabled 1

 1757 11:44:49.580911  GENERIC: 0.0: enabled 1

 1758 11:44:49.583826  I2C: 00:1a: enabled 1

 1759 11:44:49.587130  I2C: 00:31: enabled 1

 1760 11:44:49.587589  I2C: 00:32: enabled 1

 1761 11:44:49.590252  I2C: 00:10: enabled 1

 1762 11:44:49.593740  I2C: 00:15: enabled 1

 1763 11:44:49.594157  GENERIC: 0.0: enabled 0

 1764 11:44:49.596764  GENERIC: 1.0: enabled 0

 1765 11:44:49.600642  GENERIC: 0.0: enabled 1

 1766 11:44:49.601059  SPI: 00: enabled 1

 1767 11:44:49.603962  SPI: 00: enabled 1

 1768 11:44:49.606793  PNP: 0c09.0: enabled 1

 1769 11:44:49.607209  GENERIC: 0.0: enabled 1

 1770 11:44:49.610246  USB3 port 0: enabled 1

 1771 11:44:49.613963  USB3 port 1: enabled 1

 1772 11:44:49.616903  USB3 port 2: enabled 0

 1773 11:44:49.617322  USB3 port 3: enabled 0

 1774 11:44:49.620253  USB2 port 0: enabled 0

 1775 11:44:49.623468  USB2 port 1: enabled 1

 1776 11:44:49.623882  USB2 port 2: enabled 1

 1777 11:44:49.627018  USB2 port 3: enabled 0

 1778 11:44:49.630491  USB2 port 4: enabled 1

 1779 11:44:49.633652  USB2 port 5: enabled 0

 1780 11:44:49.634070  USB2 port 6: enabled 0

 1781 11:44:49.637017  USB2 port 7: enabled 0

 1782 11:44:49.640130  USB2 port 8: enabled 0

 1783 11:44:49.640575  USB2 port 9: enabled 0

 1784 11:44:49.643632  USB3 port 0: enabled 0

 1785 11:44:49.646771  USB3 port 1: enabled 1

 1786 11:44:49.647198  USB3 port 2: enabled 0

 1787 11:44:49.650175  USB3 port 3: enabled 0

 1788 11:44:49.653317  GENERIC: 0.0: enabled 1

 1789 11:44:49.656724  GENERIC: 1.0: enabled 1

 1790 11:44:49.657143  APIC: 01: enabled 1

 1791 11:44:49.660047  APIC: 03: enabled 1

 1792 11:44:49.660489  APIC: 04: enabled 1

 1793 11:44:49.663242  APIC: 06: enabled 1

 1794 11:44:49.667173  APIC: 07: enabled 1

 1795 11:44:49.667599  APIC: 02: enabled 1

 1796 11:44:49.670372  APIC: 05: enabled 1

 1797 11:44:49.673395  PCI: 01:00.0: enabled 1

 1798 11:44:49.676857  BS: BS_DEV_INIT run times (exec / console): 29 / 537 ms

 1799 11:44:49.683276  FMAP: area RW_ELOG found @ f30000 (4096 bytes)

 1800 11:44:49.686625  ELOG: NV offset 0xf30000 size 0x1000

 1801 11:44:49.693254  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1802 11:44:49.699898  ELOG: Event(17) added with size 13 at 2024-05-03 11:44:50 UTC

 1803 11:44:49.706558  ELOG: Event(92) added with size 9 at 2024-05-03 11:44:50 UTC

 1804 11:44:49.713011  ELOG: Event(93) added with size 9 at 2024-05-03 11:44:50 UTC

 1805 11:44:49.719801  ELOG: Event(9E) added with size 10 at 2024-05-03 11:44:50 UTC

 1806 11:44:49.726737  ELOG: Event(9F) added with size 14 at 2024-05-03 11:44:50 UTC

 1807 11:44:49.732601  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms

 1808 11:44:49.739723  ELOG: Event(A1) added with size 10 at 2024-05-03 11:44:50 UTC

 1809 11:44:49.746374  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02

 1810 11:44:49.752959  ELOG: Event(A0) added with size 9 at 2024-05-03 11:44:50 UTC

 1811 11:44:49.755927  elog_add_boot_reason: Logged dev mode boot

 1812 11:44:49.762637  BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms

 1813 11:44:49.763104  Finalize devices...

 1814 11:44:49.766077  Devices finalized

 1815 11:44:49.772666  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

 1816 11:44:49.776273  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)

 1817 11:44:49.782416  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 1818 11:44:49.785711  ME: HFSTS1                      : 0x80030055

 1819 11:44:49.792249  ME: HFSTS2                      : 0x30280116

 1820 11:44:49.795599  ME: HFSTS3                      : 0x00000050

 1821 11:44:49.799021  ME: HFSTS4                      : 0x00004000

 1822 11:44:49.806037  ME: HFSTS5                      : 0x00000000

 1823 11:44:49.808786  ME: HFSTS6                      : 0x00400006

 1824 11:44:49.812751  ME: Manufacturing Mode          : YES

 1825 11:44:49.815998  ME: SPI Protection Mode Enabled : NO

 1826 11:44:49.822301  ME: FW Partition Table          : OK

 1827 11:44:49.825719  ME: Bringup Loader Failure      : NO

 1828 11:44:49.829415  ME: Firmware Init Complete      : NO

 1829 11:44:49.832321  ME: Boot Options Present        : NO

 1830 11:44:49.835611  ME: Update In Progress          : NO

 1831 11:44:49.838827  ME: D0i3 Support                : YES

 1832 11:44:49.842465  ME: Low Power State Enabled     : NO

 1833 11:44:49.845746  ME: CPU Replaced                : YES

 1834 11:44:49.852016  ME: CPU Replacement Valid       : YES

 1835 11:44:49.855346  ME: Current Working State       : 5

 1836 11:44:49.859004  ME: Current Operation State     : 1

 1837 11:44:49.861973  ME: Current Operation Mode      : 3

 1838 11:44:49.865611  ME: Error Code                  : 0

 1839 11:44:49.868972  ME: Enhanced Debug Mode         : NO

 1840 11:44:49.872236  ME: CPU Debug Disabled          : YES

 1841 11:44:49.875564  ME: TXT Support                 : NO

 1842 11:44:49.881637  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms

 1843 11:44:49.888917  ELOG: Event(91) added with size 10 at 2024-05-03 11:44:50 UTC

 1844 11:44:49.895367  Chrome EC: clear events_b mask to 0x0000000020004000

 1845 11:44:49.902727  BS: BS_WRITE_TABLES entry times (exec / console): 4 / 11 ms

 1846 11:44:49.912644  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4

 1847 11:44:49.915918  CBFS: 'fallback/slic' not found.

 1848 11:44:49.919213  ACPI: Writing ACPI tables at 76b01000.

 1849 11:44:49.919637  ACPI:    * FACS

 1850 11:44:49.922068  ACPI:    * DSDT

 1851 11:44:49.925397  Ramoops buffer: 0x100000@0x76a00000.

 1852 11:44:49.929109  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

 1853 11:44:49.935568  FMAP: area RW_VPD found @ f35000 (8192 bytes)

 1854 11:44:49.938585  Google Chrome EC: version:

 1855 11:44:49.942266  	ro: voema_v2.0.7540-147f8d37d1

 1856 11:44:49.945405  	rw: voema_v2.0.7540-147f8d37d1

 1857 11:44:49.945866    running image: 1

 1858 11:44:49.952086  PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000

 1859 11:44:49.957008  ACPI:    * FADT

 1860 11:44:49.957469  SCI is IRQ9

 1861 11:44:49.963420  ACPI: added table 1/32, length now 40

 1862 11:44:49.963869  ACPI:     * SSDT

 1863 11:44:49.966983  Found 1 CPU(s) with 8 core(s) each.

 1864 11:44:49.973417  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2

 1865 11:44:49.976832  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 1866 11:44:49.980405  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 1867 11:44:49.983143  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a

 1868 11:44:49.989937  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 1869 11:44:49.996843  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 1870 11:44:49.999912  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10

 1871 11:44:50.006318  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 1872 11:44:50.013305  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)

 1873 11:44:50.016323  \_SB.PCI0.RP09: Added StorageD3Enable property

 1874 11:44:50.023020  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1875 11:44:50.026363  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 1876 11:44:50.033260  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 1877 11:44:50.036496  PS2K: Passing 80 keymaps to kernel

 1878 11:44:50.042856  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 1879 11:44:50.050013  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1

 1880 11:44:50.056079  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1

 1881 11:44:50.062797  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 1882 11:44:50.069754  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4

 1883 11:44:50.076190  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1

 1884 11:44:50.082987  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 1885 11:44:50.089125  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 1886 11:44:50.092494  ACPI: added table 2/32, length now 44

 1887 11:44:50.093129  ACPI:    * MCFG

 1888 11:44:50.095912  ACPI: added table 3/32, length now 48

 1889 11:44:50.099114  ACPI:    * TPM2

 1890 11:44:50.102523  TPM2 log created at 0x769f0000

 1891 11:44:50.105821  ACPI: added table 4/32, length now 52

 1892 11:44:50.106287  ACPI:    * MADT

 1893 11:44:50.109225  SCI is IRQ9

 1894 11:44:50.112468  ACPI: added table 5/32, length now 56

 1895 11:44:50.115705  current = 76b09850

 1896 11:44:50.116123  ACPI:    * DMAR

 1897 11:44:50.119255  ACPI: added table 6/32, length now 60

 1898 11:44:50.122498  ACPI: added table 7/32, length now 64

 1899 11:44:50.125352  ACPI:    * HPET

 1900 11:44:50.128797  ACPI: added table 8/32, length now 68

 1901 11:44:50.129398  ACPI: done.

 1902 11:44:50.132105  ACPI tables: 35216 bytes.

 1903 11:44:50.135798  smbios_write_tables: 769ef000

 1904 11:44:50.138980  EC returned error result code 3

 1905 11:44:50.142332  Couldn't obtain OEM name from CBI

 1906 11:44:50.145679  Create SMBIOS type 16

 1907 11:44:50.149032  Create SMBIOS type 17

 1908 11:44:50.152512  GENERIC: 0.0 (WIFI Device)

 1909 11:44:50.155675  SMBIOS tables: 1750 bytes.

 1910 11:44:50.159405  Writing table forward entry at 0x00000500

 1911 11:44:50.165401  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c

 1912 11:44:50.168837  Writing coreboot table at 0x76b25000

 1913 11:44:50.175964   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1914 11:44:50.179037   1. 0000000000001000-000000000009ffff: RAM

 1915 11:44:50.182300   2. 00000000000a0000-00000000000fffff: RESERVED

 1916 11:44:50.188570   3. 0000000000100000-00000000769eefff: RAM

 1917 11:44:50.191713   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES

 1918 11:44:50.198482   5. 0000000076b98000-0000000076c09fff: RAMSTAGE

 1919 11:44:50.205269   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES

 1920 11:44:50.208524   7. 0000000077000000-000000007fbfffff: RESERVED

 1921 11:44:50.215217   8. 00000000c0000000-00000000cfffffff: RESERVED

 1922 11:44:50.218573   9. 00000000f8000000-00000000f9ffffff: RESERVED

 1923 11:44:50.221969  10. 00000000fb000000-00000000fb000fff: RESERVED

 1924 11:44:50.228695  11. 00000000fe000000-00000000fe00ffff: RESERVED

 1925 11:44:50.231981  12. 00000000fed80000-00000000fed87fff: RESERVED

 1926 11:44:50.238540  13. 00000000fed90000-00000000fed92fff: RESERVED

 1927 11:44:50.241945  14. 00000000feda0000-00000000feda1fff: RESERVED

 1928 11:44:50.248166  15. 00000000fedc0000-00000000feddffff: RESERVED

 1929 11:44:50.251487  16. 0000000100000000-00000002803fffff: RAM

 1930 11:44:50.254904  Passing 4 GPIOs to payload:

 1931 11:44:50.258265              NAME |       PORT | POLARITY |     VALUE

 1932 11:44:50.264738               lid |  undefined |     high |      high

 1933 11:44:50.271329             power |  undefined |     high |       low

 1934 11:44:50.274993             oprom |  undefined |     high |       low

 1935 11:44:50.281880          EC in RW | 0x000000e5 |     high |       low

 1936 11:44:50.288385  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 6b30

 1937 11:44:50.291605  coreboot table: 1576 bytes.

 1938 11:44:50.294824  IMD ROOT    0. 0x76fff000 0x00001000

 1939 11:44:50.297794  IMD SMALL   1. 0x76ffe000 0x00001000

 1940 11:44:50.301049  FSP MEMORY  2. 0x76c4e000 0x003b0000

 1941 11:44:50.304606  VPD         3. 0x76c4d000 0x00000367

 1942 11:44:50.307819  RO MCACHE   4. 0x76c4c000 0x00000fdc

 1943 11:44:50.311171  CONSOLE     5. 0x76c2c000 0x00020000

 1944 11:44:50.314380  FMAP        6. 0x76c2b000 0x00000578

 1945 11:44:50.321106  TIME STAMP  7. 0x76c2a000 0x00000910

 1946 11:44:50.324588  VBOOT WORK  8. 0x76c16000 0x00014000

 1947 11:44:50.327800  ROMSTG STCK 9. 0x76c15000 0x00001000

 1948 11:44:50.331126  AFTER CAR  10. 0x76c0a000 0x0000b000

 1949 11:44:50.334691  RAMSTAGE   11. 0x76b97000 0x00073000

 1950 11:44:50.337940  REFCODE    12. 0x76b42000 0x00055000

 1951 11:44:50.341382  SMM BACKUP 13. 0x76b32000 0x00010000

 1952 11:44:50.344154  4f444749   14. 0x76b30000 0x00002000

 1953 11:44:50.347661  EXT VBT15. 0x76b2d000 0x0000219f

 1954 11:44:50.354568  COREBOOT   16. 0x76b25000 0x00008000

 1955 11:44:50.357572  ACPI       17. 0x76b01000 0x00024000

 1956 11:44:50.360821  ACPI GNVS  18. 0x76b00000 0x00001000

 1957 11:44:50.364004  RAMOOPS    19. 0x76a00000 0x00100000

 1958 11:44:50.367680  TPM2 TCGLOG20. 0x769f0000 0x00010000

 1959 11:44:50.370650  SMBIOS     21. 0x769ef000 0x00000800

 1960 11:44:50.374231  IMD small region:

 1961 11:44:50.377427    IMD ROOT    0. 0x76ffec00 0x00000400

 1962 11:44:50.380607    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 1963 11:44:50.384239    POWER STATE 2. 0x76ffeb80 0x00000044

 1964 11:44:50.390503    ROMSTAGE    3. 0x76ffeb60 0x00000004

 1965 11:44:50.393918    MEM INFO    4. 0x76ffe980 0x000001e0

 1966 11:44:50.397147  BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms

 1967 11:44:50.400552  MTRR: Physical address space:

 1968 11:44:50.407234  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1969 11:44:50.413906  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1970 11:44:50.420643  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 1971 11:44:50.426932  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0

 1972 11:44:50.433689  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1

 1973 11:44:50.439897  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0

 1974 11:44:50.446648  0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6

 1975 11:44:50.449950  MTRR: Fixed MSR 0x250 0x0606060606060606

 1976 11:44:50.453379  MTRR: Fixed MSR 0x258 0x0606060606060606

 1977 11:44:50.456567  MTRR: Fixed MSR 0x259 0x0000000000000000

 1978 11:44:50.463256  MTRR: Fixed MSR 0x268 0x0606060606060606

 1979 11:44:50.466531  MTRR: Fixed MSR 0x269 0x0606060606060606

 1980 11:44:50.469850  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1981 11:44:50.473049  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1982 11:44:50.479783  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1983 11:44:50.483227  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1984 11:44:50.486544  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1985 11:44:50.489561  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1986 11:44:50.493865  call enable_fixed_mtrr()

 1987 11:44:50.496963  CPU physical address size: 39 bits

 1988 11:44:50.503689  MTRR: default type WB/UC MTRR counts: 6/6.

 1989 11:44:50.506883  MTRR: UC selected as default type.

 1990 11:44:50.513798  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 1991 11:44:50.516900  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 1992 11:44:50.523715  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 1993 11:44:50.529967  MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1

 1994 11:44:50.536707  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 1995 11:44:50.543381  MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6

 1996 11:44:50.543810  

 1997 11:44:50.546750  MTRR check

 1998 11:44:50.550115  Fixed MTRRs   : Enabled

 1999 11:44:50.550535  Variable MTRRs: Enabled

 2000 11:44:50.550955  

 2001 11:44:50.556338  MTRR: Fixed MSR 0x250 0x0606060606060606

 2002 11:44:50.559996  MTRR: Fixed MSR 0x258 0x0606060606060606

 2003 11:44:50.562991  MTRR: Fixed MSR 0x259 0x0000000000000000

 2004 11:44:50.566359  MTRR: Fixed MSR 0x268 0x0606060606060606

 2005 11:44:50.572957  MTRR: Fixed MSR 0x269 0x0606060606060606

 2006 11:44:50.576080  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2007 11:44:50.579360  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2008 11:44:50.582686  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2009 11:44:50.589403  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2010 11:44:50.593055  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2011 11:44:50.596249  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2012 11:44:50.602734  BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms

 2013 11:44:50.605913  call enable_fixed_mtrr()

 2014 11:44:50.612492  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60

 2015 11:44:50.616156  CPU physical address size: 39 bits

 2016 11:44:50.623286  Checking segment from ROM address 0xffc02b38

 2017 11:44:50.626475  MTRR: Fixed MSR 0x250 0x0606060606060606

 2018 11:44:50.629890  MTRR: Fixed MSR 0x250 0x0606060606060606

 2019 11:44:50.633061  MTRR: Fixed MSR 0x258 0x0606060606060606

 2020 11:44:50.639842  MTRR: Fixed MSR 0x259 0x0000000000000000

 2021 11:44:50.643219  MTRR: Fixed MSR 0x268 0x0606060606060606

 2022 11:44:50.646560  MTRR: Fixed MSR 0x269 0x0606060606060606

 2023 11:44:50.649448  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2024 11:44:50.656007  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2025 11:44:50.659488  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2026 11:44:50.663089  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2027 11:44:50.666665  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2028 11:44:50.672911  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2029 11:44:50.676270  MTRR: Fixed MSR 0x258 0x0606060606060606

 2030 11:44:50.679541  call enable_fixed_mtrr()

 2031 11:44:50.682899  MTRR: Fixed MSR 0x259 0x0000000000000000

 2032 11:44:50.685995  MTRR: Fixed MSR 0x268 0x0606060606060606

 2033 11:44:50.692980  MTRR: Fixed MSR 0x269 0x0606060606060606

 2034 11:44:50.695993  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2035 11:44:50.699277  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2036 11:44:50.702986  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2037 11:44:50.709542  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2038 11:44:50.712432  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2039 11:44:50.715756  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2040 11:44:50.719080  CPU physical address size: 39 bits

 2041 11:44:50.724151  call enable_fixed_mtrr()

 2042 11:44:50.727358  MTRR: Fixed MSR 0x250 0x0606060606060606

 2043 11:44:50.733542  MTRR: Fixed MSR 0x250 0x0606060606060606

 2044 11:44:50.736951  MTRR: Fixed MSR 0x258 0x0606060606060606

 2045 11:44:50.740037  MTRR: Fixed MSR 0x259 0x0000000000000000

 2046 11:44:50.743340  MTRR: Fixed MSR 0x268 0x0606060606060606

 2047 11:44:50.750270  MTRR: Fixed MSR 0x269 0x0606060606060606

 2048 11:44:50.753549  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2049 11:44:50.757007  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2050 11:44:50.760384  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2051 11:44:50.766678  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2052 11:44:50.770220  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2053 11:44:50.773620  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2054 11:44:50.780258  MTRR: Fixed MSR 0x258 0x0606060606060606

 2055 11:44:50.783514  MTRR: Fixed MSR 0x259 0x0000000000000000

 2056 11:44:50.786374  MTRR: Fixed MSR 0x268 0x0606060606060606

 2057 11:44:50.789981  MTRR: Fixed MSR 0x269 0x0606060606060606

 2058 11:44:50.796847  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2059 11:44:50.799842  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2060 11:44:50.803166  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2061 11:44:50.806368  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2062 11:44:50.813238  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2063 11:44:50.816980  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2064 11:44:50.819846  call enable_fixed_mtrr()

 2065 11:44:50.823208  call enable_fixed_mtrr()

 2066 11:44:50.826243  MTRR: Fixed MSR 0x250 0x0606060606060606

 2067 11:44:50.829623  MTRR: Fixed MSR 0x250 0x0606060606060606

 2068 11:44:50.832980  MTRR: Fixed MSR 0x258 0x0606060606060606

 2069 11:44:50.839573  MTRR: Fixed MSR 0x259 0x0000000000000000

 2070 11:44:50.842667  MTRR: Fixed MSR 0x268 0x0606060606060606

 2071 11:44:50.845887  MTRR: Fixed MSR 0x269 0x0606060606060606

 2072 11:44:50.849490  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2073 11:44:50.855955  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2074 11:44:50.859606  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2075 11:44:50.862466  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2076 11:44:50.865763  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2077 11:44:50.869004  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2078 11:44:50.876133  MTRR: Fixed MSR 0x258 0x0606060606060606

 2079 11:44:50.879492  call enable_fixed_mtrr()

 2080 11:44:50.882797  MTRR: Fixed MSR 0x259 0x0000000000000000

 2081 11:44:50.885910  MTRR: Fixed MSR 0x268 0x0606060606060606

 2082 11:44:50.892154  MTRR: Fixed MSR 0x269 0x0606060606060606

 2083 11:44:50.895897  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2084 11:44:50.899144  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2085 11:44:50.902436  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2086 11:44:50.905748  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2087 11:44:50.912260  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2088 11:44:50.915503  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2089 11:44:50.918854  CPU physical address size: 39 bits

 2090 11:44:50.922733  call enable_fixed_mtrr()

 2091 11:44:50.926470  CPU physical address size: 39 bits

 2092 11:44:50.929541  CPU physical address size: 39 bits

 2093 11:44:50.936477  Checking segment from ROM address 0xffc02b54

 2094 11:44:50.939432  CPU physical address size: 39 bits

 2095 11:44:50.943217  CPU physical address size: 39 bits

 2096 11:44:50.946335  Loading segment from ROM address 0xffc02b38

 2097 11:44:50.949706    code (compression=0)

 2098 11:44:50.959397    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64

 2099 11:44:50.966123  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64

 2100 11:44:50.969357  it's not compressed!

 2101 11:44:51.108153  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70

 2102 11:44:51.115076  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c

 2103 11:44:51.121615  Loading segment from ROM address 0xffc02b54

 2104 11:44:51.122060    Entry Point 0x30000000

 2105 11:44:51.124918  Loaded segments

 2106 11:44:51.131564  BS: BS_PAYLOAD_LOAD run times (exec / console): 458 / 64 ms

 2107 11:44:51.174771  Finalizing chipset.

 2108 11:44:51.177725  Finalizing SMM.

 2109 11:44:51.178081  APMC done.

 2110 11:44:51.184167  BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms

 2111 11:44:51.187210  mp_park_aps done after 0 msecs.

 2112 11:44:51.190504  Jumping to boot code at 0x30000000(0x76b25000)

 2113 11:44:51.200537  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes

 2114 11:44:51.200743  

 2115 11:44:51.200879  

 2116 11:44:51.203992  

 2117 11:44:51.204125  Starting depthcharge on Voema...

 2118 11:44:51.204518  end: 2.2.3 depthcharge-start (duration 00:00:04) [common]
 2119 11:44:51.204661  start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
 2120 11:44:51.204780  Setting prompt string to ['volteer:']
 2121 11:44:51.204895  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:47)
 2122 11:44:51.207216  

 2123 11:44:51.213769  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2124 11:44:51.213900  

 2125 11:44:51.220193  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2126 11:44:51.220309  

 2127 11:44:51.226779  Looking for NVMe Controller 0x3005f238 @ 00:1d:00

 2128 11:44:51.226903  

 2129 11:44:51.230017  Failed to find eMMC card reader

 2130 11:44:51.230103  

 2131 11:44:51.230170  Wipe memory regions:

 2132 11:44:51.233583  

 2133 11:44:51.236552  	[0x00000000001000, 0x000000000a0000)

 2134 11:44:51.236664  

 2135 11:44:51.239844  	[0x00000000100000, 0x00000030000000)

 2136 11:44:51.265787  

 2137 11:44:51.269081  	[0x00000032662db0, 0x000000769ef000)

 2138 11:44:51.305208  

 2139 11:44:51.308427  	[0x00000100000000, 0x00000280400000)

 2140 11:44:51.511007  

 2141 11:44:51.514233  ec_init: CrosEC protocol v3 supported (256, 256)

 2142 11:44:51.514474  

 2143 11:44:51.520914  update_port_state: port C0 state: usb enable 1 mux conn 0

 2144 11:44:51.521211  

 2145 11:44:51.530816  update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1

 2146 11:44:51.531234  

 2147 11:44:51.537778  pmc_check_ipc_sts: STS_BUSY done after 1561 us

 2148 11:44:51.538239  

 2149 11:44:51.541005  send_conn_disc_msg: pmc_send_cmd succeeded

 2150 11:44:51.972418  

 2151 11:44:51.972963  R8152: Initializing

 2152 11:44:51.973410  

 2153 11:44:51.976235  Version 9 (ocp_data = 6010)

 2154 11:44:51.976742  

 2155 11:44:51.978909  R8152: Done initializing

 2156 11:44:51.979365  

 2157 11:44:51.982096  Adding net device

 2158 11:44:52.283944  

 2159 11:44:52.287108  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35

 2160 11:44:52.287587  

 2161 11:44:52.287944  

 2162 11:44:52.288280  

 2163 11:44:52.290990  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2165 11:44:52.392410  volteer: tftpboot 192.168.201.1 13627369/tftp-deploy-jhkkbobu/kernel/bzImage 13627369/tftp-deploy-jhkkbobu/kernel/cmdline 13627369/tftp-deploy-jhkkbobu/ramdisk/ramdisk.cpio.gz

 2166 11:44:52.393057  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2167 11:44:52.393489  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:46)
 2168 11:44:52.397954  tftpboot 192.168.201.1 13627369/tftp-deploy-jhkkbobu/kernel/bzIploy-jhkkbobu/kernel/cmdline 13627369/tftp-deploy-jhkkbobu/ramdisk/ramdisk.cpio.gz

 2169 11:44:52.398437  

 2170 11:44:52.398797  Waiting for link

 2171 11:44:52.602240  

 2172 11:44:52.602785  done.

 2173 11:44:52.603152  

 2174 11:44:52.603492  MAC: 00:e0:4c:71:a6:42

 2175 11:44:52.603868  

 2176 11:44:52.605548  Sending DHCP discover... done.

 2177 11:44:52.606043  

 2178 11:44:52.608884  Waiting for reply... done.

 2179 11:44:52.609302  

 2180 11:44:52.612133  Sending DHCP request... done.

 2181 11:44:52.612599  

 2182 11:44:52.615255  Waiting for reply... done.

 2183 11:44:52.615674  

 2184 11:44:52.618474  My ip is 192.168.201.18

 2185 11:44:52.618899  

 2186 11:44:52.621862  The DHCP server ip is 192.168.201.1

 2187 11:44:52.622286  

 2188 11:44:52.625530  TFTP server IP predefined by user: 192.168.201.1

 2189 11:44:52.626056  

 2190 11:44:52.632247  Bootfile predefined by user: 13627369/tftp-deploy-jhkkbobu/kernel/bzImage

 2191 11:44:52.632719  

 2192 11:44:52.635574  Sending tftp read request... done.

 2193 11:44:52.638939  

 2194 11:44:52.639366  Waiting for the transfer... 

 2195 11:44:52.639699  

 2196 11:44:52.886776  00000000 ################################################################

 2197 11:44:52.886925  

 2198 11:44:53.131076  00080000 ################################################################

 2199 11:44:53.131223  

 2200 11:44:53.376907  00100000 ################################################################

 2201 11:44:53.377046  

 2202 11:44:53.620197  00180000 ################################################################

 2203 11:44:53.620379  

 2204 11:44:53.869240  00200000 ################################################################

 2205 11:44:53.869391  

 2206 11:44:54.113729  00280000 ################################################################

 2207 11:44:54.113870  

 2208 11:44:54.358191  00300000 ################################################################

 2209 11:44:54.358337  

 2210 11:44:54.607513  00380000 ################################################################

 2211 11:44:54.607652  

 2212 11:44:54.862861  00400000 ################################################################

 2213 11:44:54.863007  

 2214 11:44:55.108013  00480000 ################################################################

 2215 11:44:55.108163  

 2216 11:44:55.354732  00500000 ################################################################

 2217 11:44:55.354915  

 2218 11:44:55.601565  00580000 ################################################################

 2219 11:44:55.601703  

 2220 11:44:55.844577  00600000 ################################################################

 2221 11:44:55.844715  

 2222 11:44:56.087704  00680000 ################################################################

 2223 11:44:56.087834  

 2224 11:44:56.338750  00700000 ################################################################

 2225 11:44:56.339008  

 2226 11:44:56.587665  00780000 ################################################################

 2227 11:44:56.587804  

 2228 11:44:56.838981  00800000 ################################################################

 2229 11:44:56.839115  

 2230 11:44:57.099733  00880000 ################################################################

 2231 11:44:57.099888  

 2232 11:44:57.354580  00900000 ################################################################

 2233 11:44:57.354720  

 2234 11:44:57.612026  00980000 ################################################################

 2235 11:44:57.612188  

 2236 11:44:57.859309  00a00000 ################################################################

 2237 11:44:57.859445  

 2238 11:44:58.111870  00a80000 ################################################################

 2239 11:44:58.112011  

 2240 11:44:58.364000  00b00000 ################################################################

 2241 11:44:58.364140  

 2242 11:44:58.607810  00b80000 ################################################################

 2243 11:44:58.607943  

 2244 11:44:58.851391  00c00000 ################################################################

 2245 11:44:58.851530  

 2246 11:44:59.094691  00c80000 ################################################################

 2247 11:44:59.094838  

 2248 11:44:59.305695  00d00000 ######################################################## done.

 2249 11:44:59.305839  

 2250 11:44:59.309062  The bootfile was 14090128 bytes long.

 2251 11:44:59.309147  

 2252 11:44:59.312875  Sending tftp read request... done.

 2253 11:44:59.312961  

 2254 11:44:59.315581  Waiting for the transfer... 

 2255 11:44:59.315663  

 2256 11:44:59.564100  00000000 ################################################################

 2257 11:44:59.564264  

 2258 11:44:59.807244  00080000 ################################################################

 2259 11:44:59.807377  

 2260 11:45:00.060532  00100000 ################################################################

 2261 11:45:00.060678  

 2262 11:45:00.327388  00180000 ################################################################

 2263 11:45:00.327562  

 2264 11:45:00.580646  00200000 ################################################################

 2265 11:45:00.580794  

 2266 11:45:00.824536  00280000 ################################################################

 2267 11:45:00.824701  

 2268 11:45:01.067462  00300000 ################################################################

 2269 11:45:01.067633  

 2270 11:45:01.307932  00380000 ################################################################

 2271 11:45:01.308107  

 2272 11:45:01.558658  00400000 ################################################################

 2273 11:45:01.558800  

 2274 11:45:01.808817  00480000 ################################################################

 2275 11:45:01.808949  

 2276 11:45:02.059617  00500000 ################################################################

 2277 11:45:02.059791  

 2278 11:45:02.305996  00580000 ################################################################

 2279 11:45:02.306139  

 2280 11:45:02.524853  00600000 ########################################################### done.

 2281 11:45:02.524998  

 2282 11:45:02.528613  Sending tftp read request... done.

 2283 11:45:02.528701  

 2284 11:45:02.531444  Waiting for the transfer... 

 2285 11:45:02.531526  

 2286 11:45:02.534903  00000000 # done.

 2287 11:45:02.535007  

 2288 11:45:02.541607  Command line loaded dynamically from TFTP file: 13627369/tftp-deploy-jhkkbobu/kernel/cmdline

 2289 11:45:02.541709  

 2290 11:45:02.568134  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/13627369/extract-nfsrootfs-fgjspyc9,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2291 11:45:02.573628  

 2292 11:45:02.576548  Shutting down all USB controllers.

 2293 11:45:02.576627  

 2294 11:45:02.576697  Removing current net device

 2295 11:45:02.576760  

 2296 11:45:02.579894  Finalizing coreboot

 2297 11:45:02.579974  

 2298 11:45:02.586386  Exiting depthcharge with code 4 at timestamp: 20048594

 2299 11:45:02.586475  

 2300 11:45:02.586540  

 2301 11:45:02.586600  Starting kernel ...

 2302 11:45:02.586658  

 2303 11:45:02.586713  

 2304 11:45:02.587098  end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
 2305 11:45:02.587192  start: 2.2.5 auto-login-action (timeout 00:04:36) [common]
 2306 11:45:02.587268  Setting prompt string to ['Linux version [0-9]']
 2307 11:45:02.587333  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2308 11:45:02.587399  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2310 11:49:38.587521  end: 2.2.5 auto-login-action (duration 00:04:36) [common]
 2312 11:49:38.587727  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 276 seconds'
 2314 11:49:38.587884  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2317 11:49:38.588132  end: 2 depthcharge-action (duration 00:05:00) [common]
 2319 11:49:38.588451  Cleaning after the job
 2320 11:49:38.588539  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13627369/tftp-deploy-jhkkbobu/ramdisk
 2321 11:49:38.589360  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13627369/tftp-deploy-jhkkbobu/kernel
 2322 11:49:38.590975  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13627369/tftp-deploy-jhkkbobu/nfsrootfs
 2323 11:49:38.618654  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13627369/tftp-deploy-jhkkbobu/modules
 2324 11:49:38.619161  start: 4.1 power-off (timeout 00:00:30) [common]
 2325 11:49:38.619335  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cp514-2h-1130g7-volteer-cbg-7' '--port=1' '--command=off'
 2326 11:49:43.063393  >> Command sent successfully.

 2327 11:49:43.065781  Returned 0 in 4 seconds
 2328 11:49:43.166211  end: 4.1 power-off (duration 00:00:05) [common]
 2330 11:49:43.166693  start: 4.2 read-feedback (timeout 00:09:55) [common]
 2331 11:49:43.167007  Listened to connection for namespace 'common' for up to 1s
 2333 11:49:43.167424  Listened to connection for namespace 'common' for up to 1s
 2334 11:49:44.167969  Finalising connection for namespace 'common'
 2335 11:49:44.168158  Disconnecting from shell: Finalise
 2336 11:49:44.168237  
 2337 11:49:44.268549  end: 4.2 read-feedback (duration 00:00:01) [common]
 2338 11:49:44.268716  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13627369
 2339 11:49:44.426477  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13627369
 2340 11:49:44.426673  JobError: Your job cannot terminate cleanly.