Boot log: acer-cbv514-1h-34uz-brya
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 15:36:57.692982 lava-dispatcher, installed at version: 2024.03
2 15:36:57.693228 start: 0 validate
3 15:36:57.693343 Start time: 2024-06-03 15:36:57.693337+00:00 (UTC)
4 15:36:57.693478 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:36:57.693621 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Fx86%2Frootfs.cpio.gz exists
6 15:36:57.958275 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:36:57.959141 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2560-gecbb82ce18d07%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:36:58.221042 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:36:58.221731 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2560-gecbb82ce18d07%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 15:36:58.479247 validate duration: 0.79
12 15:36:58.480385 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 15:36:58.480836 start: 1.1 download-retry (timeout 00:10:00) [common]
14 15:36:58.481319 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 15:36:58.482208 Not decompressing ramdisk as can be used compressed.
16 15:36:58.482676 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/x86/rootfs.cpio.gz
17 15:36:58.483035 saving as /var/lib/lava/dispatcher/tmp/14152816/tftp-deploy-vhof0zm9/ramdisk/rootfs.cpio.gz
18 15:36:58.483387 total size: 8417901 (8 MB)
19 15:36:58.488013 progress 0 % (0 MB)
20 15:36:58.499271 progress 5 % (0 MB)
21 15:36:58.507633 progress 10 % (0 MB)
22 15:36:58.513239 progress 15 % (1 MB)
23 15:36:58.517877 progress 20 % (1 MB)
24 15:36:58.521826 progress 25 % (2 MB)
25 15:36:58.525277 progress 30 % (2 MB)
26 15:36:58.528272 progress 35 % (2 MB)
27 15:36:58.531284 progress 40 % (3 MB)
28 15:36:58.534061 progress 45 % (3 MB)
29 15:36:58.536740 progress 50 % (4 MB)
30 15:36:58.539162 progress 55 % (4 MB)
31 15:36:58.541589 progress 60 % (4 MB)
32 15:36:58.543659 progress 65 % (5 MB)
33 15:36:58.545859 progress 70 % (5 MB)
34 15:36:58.548054 progress 75 % (6 MB)
35 15:36:58.550296 progress 80 % (6 MB)
36 15:36:58.552446 progress 85 % (6 MB)
37 15:36:58.554628 progress 90 % (7 MB)
38 15:36:58.556783 progress 95 % (7 MB)
39 15:36:58.558826 progress 100 % (8 MB)
40 15:36:58.559057 8 MB downloaded in 0.08 s (106.09 MB/s)
41 15:36:58.559215 end: 1.1.1 http-download (duration 00:00:00) [common]
43 15:36:58.559432 end: 1.1 download-retry (duration 00:00:00) [common]
44 15:36:58.559515 start: 1.2 download-retry (timeout 00:10:00) [common]
45 15:36:58.559593 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 15:36:58.559725 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2560-gecbb82ce18d07/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 15:36:58.559792 saving as /var/lib/lava/dispatcher/tmp/14152816/tftp-deploy-vhof0zm9/kernel/bzImage
48 15:36:58.559848 total size: 14155664 (13 MB)
49 15:36:58.559904 No compression specified
50 15:36:58.560902 progress 0 % (0 MB)
51 15:36:58.564500 progress 5 % (0 MB)
52 15:36:58.568211 progress 10 % (1 MB)
53 15:36:58.571765 progress 15 % (2 MB)
54 15:36:58.575468 progress 20 % (2 MB)
55 15:36:58.579009 progress 25 % (3 MB)
56 15:36:58.582769 progress 30 % (4 MB)
57 15:36:58.586470 progress 35 % (4 MB)
58 15:36:58.590074 progress 40 % (5 MB)
59 15:36:58.593752 progress 45 % (6 MB)
60 15:36:58.597329 progress 50 % (6 MB)
61 15:36:58.601092 progress 55 % (7 MB)
62 15:36:58.604718 progress 60 % (8 MB)
63 15:36:58.608271 progress 65 % (8 MB)
64 15:36:58.611940 progress 70 % (9 MB)
65 15:36:58.615436 progress 75 % (10 MB)
66 15:36:58.619065 progress 80 % (10 MB)
67 15:36:58.622670 progress 85 % (11 MB)
68 15:36:58.626128 progress 90 % (12 MB)
69 15:36:58.629742 progress 95 % (12 MB)
70 15:36:58.633224 progress 100 % (13 MB)
71 15:36:58.633458 13 MB downloaded in 0.07 s (183.41 MB/s)
72 15:36:58.633624 end: 1.2.1 http-download (duration 00:00:00) [common]
74 15:36:58.633838 end: 1.2 download-retry (duration 00:00:00) [common]
75 15:36:58.633921 start: 1.3 download-retry (timeout 00:10:00) [common]
76 15:36:58.633997 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 15:36:58.634125 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2560-gecbb82ce18d07/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 15:36:58.634187 saving as /var/lib/lava/dispatcher/tmp/14152816/tftp-deploy-vhof0zm9/modules/modules.tar
79 15:36:58.634241 total size: 705112 (0 MB)
80 15:36:58.634297 Using unxz to decompress xz
81 15:36:58.635632 progress 4 % (0 MB)
82 15:36:58.635869 progress 9 % (0 MB)
83 15:36:58.637727 progress 18 % (0 MB)
84 15:36:58.639553 progress 23 % (0 MB)
85 15:36:58.643286 progress 32 % (0 MB)
86 15:36:58.645047 progress 37 % (0 MB)
87 15:36:58.648548 progress 46 % (0 MB)
88 15:36:58.650414 progress 51 % (0 MB)
89 15:36:58.654203 progress 60 % (0 MB)
90 15:36:58.655889 progress 65 % (0 MB)
91 15:36:58.659748 progress 74 % (0 MB)
92 15:36:58.661524 progress 79 % (0 MB)
93 15:36:58.664909 progress 88 % (0 MB)
94 15:36:58.668807 progress 97 % (0 MB)
95 15:36:58.675940 0 MB downloaded in 0.04 s (16.13 MB/s)
96 15:36:58.676088 end: 1.3.1 http-download (duration 00:00:00) [common]
98 15:36:58.676342 end: 1.3 download-retry (duration 00:00:00) [common]
99 15:36:58.676424 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
100 15:36:58.676504 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
101 15:36:58.676576 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
102 15:36:58.676657 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
103 15:36:58.676837 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14152816/lava-overlay-_twnfw59
104 15:36:58.676953 makedir: /var/lib/lava/dispatcher/tmp/14152816/lava-overlay-_twnfw59/lava-14152816/bin
105 15:36:58.677083 makedir: /var/lib/lava/dispatcher/tmp/14152816/lava-overlay-_twnfw59/lava-14152816/tests
106 15:36:58.677172 makedir: /var/lib/lava/dispatcher/tmp/14152816/lava-overlay-_twnfw59/lava-14152816/results
107 15:36:58.677257 Creating /var/lib/lava/dispatcher/tmp/14152816/lava-overlay-_twnfw59/lava-14152816/bin/lava-add-keys
108 15:36:58.677387 Creating /var/lib/lava/dispatcher/tmp/14152816/lava-overlay-_twnfw59/lava-14152816/bin/lava-add-sources
109 15:36:58.677503 Creating /var/lib/lava/dispatcher/tmp/14152816/lava-overlay-_twnfw59/lava-14152816/bin/lava-background-process-start
110 15:36:58.677616 Creating /var/lib/lava/dispatcher/tmp/14152816/lava-overlay-_twnfw59/lava-14152816/bin/lava-background-process-stop
111 15:36:58.677739 Creating /var/lib/lava/dispatcher/tmp/14152816/lava-overlay-_twnfw59/lava-14152816/bin/lava-common-functions
112 15:36:58.677865 Creating /var/lib/lava/dispatcher/tmp/14152816/lava-overlay-_twnfw59/lava-14152816/bin/lava-echo-ipv4
113 15:36:58.677977 Creating /var/lib/lava/dispatcher/tmp/14152816/lava-overlay-_twnfw59/lava-14152816/bin/lava-install-packages
114 15:36:58.678085 Creating /var/lib/lava/dispatcher/tmp/14152816/lava-overlay-_twnfw59/lava-14152816/bin/lava-installed-packages
115 15:36:58.678193 Creating /var/lib/lava/dispatcher/tmp/14152816/lava-overlay-_twnfw59/lava-14152816/bin/lava-os-build
116 15:36:58.678303 Creating /var/lib/lava/dispatcher/tmp/14152816/lava-overlay-_twnfw59/lava-14152816/bin/lava-probe-channel
117 15:36:58.678420 Creating /var/lib/lava/dispatcher/tmp/14152816/lava-overlay-_twnfw59/lava-14152816/bin/lava-probe-ip
118 15:36:58.678530 Creating /var/lib/lava/dispatcher/tmp/14152816/lava-overlay-_twnfw59/lava-14152816/bin/lava-target-ip
119 15:36:58.678639 Creating /var/lib/lava/dispatcher/tmp/14152816/lava-overlay-_twnfw59/lava-14152816/bin/lava-target-mac
120 15:36:58.678747 Creating /var/lib/lava/dispatcher/tmp/14152816/lava-overlay-_twnfw59/lava-14152816/bin/lava-target-storage
121 15:36:58.678865 Creating /var/lib/lava/dispatcher/tmp/14152816/lava-overlay-_twnfw59/lava-14152816/bin/lava-test-case
122 15:36:58.678976 Creating /var/lib/lava/dispatcher/tmp/14152816/lava-overlay-_twnfw59/lava-14152816/bin/lava-test-event
123 15:36:58.679085 Creating /var/lib/lava/dispatcher/tmp/14152816/lava-overlay-_twnfw59/lava-14152816/bin/lava-test-feedback
124 15:36:58.679211 Creating /var/lib/lava/dispatcher/tmp/14152816/lava-overlay-_twnfw59/lava-14152816/bin/lava-test-raise
125 15:36:58.679337 Creating /var/lib/lava/dispatcher/tmp/14152816/lava-overlay-_twnfw59/lava-14152816/bin/lava-test-reference
126 15:36:58.679455 Creating /var/lib/lava/dispatcher/tmp/14152816/lava-overlay-_twnfw59/lava-14152816/bin/lava-test-runner
127 15:36:58.679583 Creating /var/lib/lava/dispatcher/tmp/14152816/lava-overlay-_twnfw59/lava-14152816/bin/lava-test-set
128 15:36:58.679724 Creating /var/lib/lava/dispatcher/tmp/14152816/lava-overlay-_twnfw59/lava-14152816/bin/lava-test-shell
129 15:36:58.679842 Updating /var/lib/lava/dispatcher/tmp/14152816/lava-overlay-_twnfw59/lava-14152816/bin/lava-install-packages (oe)
130 15:36:58.679989 Updating /var/lib/lava/dispatcher/tmp/14152816/lava-overlay-_twnfw59/lava-14152816/bin/lava-installed-packages (oe)
131 15:36:58.680101 Creating /var/lib/lava/dispatcher/tmp/14152816/lava-overlay-_twnfw59/lava-14152816/environment
132 15:36:58.680187 LAVA metadata
133 15:36:58.680253 - LAVA_JOB_ID=14152816
134 15:36:58.680310 - LAVA_DISPATCHER_IP=192.168.201.1
135 15:36:58.680405 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
136 15:36:58.680504 skipped lava-vland-overlay
137 15:36:58.680583 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
138 15:36:58.680658 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
139 15:36:58.680717 skipped lava-multinode-overlay
140 15:36:58.680784 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
141 15:36:58.680855 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
142 15:36:58.680918 Loading test definitions
143 15:36:58.681000 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
144 15:36:58.681114 Using /lava-14152816 at stage 0
145 15:36:58.681441 uuid=14152816_1.4.2.3.1 testdef=None
146 15:36:58.681531 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
147 15:36:58.681610 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
148 15:36:58.682083 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
150 15:36:58.682286 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
151 15:36:58.682913 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
153 15:36:58.683134 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
154 15:36:58.683870 runner path: /var/lib/lava/dispatcher/tmp/14152816/lava-overlay-_twnfw59/lava-14152816/0/tests/0_dmesg test_uuid 14152816_1.4.2.3.1
155 15:36:58.684023 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
157 15:36:58.684214 Creating lava-test-runner.conf files
158 15:36:58.684272 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14152816/lava-overlay-_twnfw59/lava-14152816/0 for stage 0
159 15:36:58.684352 - 0_dmesg
160 15:36:58.684443 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
161 15:36:58.684520 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
162 15:36:58.690722 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
163 15:36:58.690818 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
164 15:36:58.690897 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
165 15:36:58.690976 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
166 15:36:58.691057 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
167 15:36:58.928468 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
168 15:36:58.928598 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
169 15:36:58.928684 extracting modules file /var/lib/lava/dispatcher/tmp/14152816/tftp-deploy-vhof0zm9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14152816/extract-overlay-ramdisk-1fenz3j_/ramdisk
170 15:36:58.949962 end: 1.4.4 extract-modules (duration 00:00:00) [common]
171 15:36:58.950079 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
172 15:36:58.950159 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14152816/compress-overlay-vijmdp46/overlay-1.4.2.4.tar.gz to ramdisk
173 15:36:58.950222 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14152816/compress-overlay-vijmdp46/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14152816/extract-overlay-ramdisk-1fenz3j_/ramdisk
174 15:36:58.956676 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
175 15:36:58.956771 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
176 15:36:58.956851 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
177 15:36:58.956930 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
178 15:36:58.957005 Building ramdisk /var/lib/lava/dispatcher/tmp/14152816/extract-overlay-ramdisk-1fenz3j_/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14152816/extract-overlay-ramdisk-1fenz3j_/ramdisk
179 15:36:59.083461 >> 53627 blocks
180 15:36:59.995995 rename /var/lib/lava/dispatcher/tmp/14152816/extract-overlay-ramdisk-1fenz3j_/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14152816/tftp-deploy-vhof0zm9/ramdisk/ramdisk.cpio.gz
181 15:36:59.996151 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
182 15:36:59.996240 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
183 15:36:59.996319 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
184 15:36:59.996396 No mkimage arch provided, not using FIT.
185 15:36:59.996469 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
186 15:36:59.996541 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
187 15:36:59.996615 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
188 15:36:59.996689 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
189 15:36:59.996746 No LXC device requested
190 15:36:59.996813 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
191 15:36:59.996885 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
192 15:36:59.996960 end: 1.6 deploy-device-env (duration 00:00:00) [common]
193 15:36:59.997022 Checking files for TFTP limit of 4294967296 bytes.
194 15:36:59.997340 end: 1 tftp-deploy (duration 00:00:02) [common]
195 15:36:59.997427 start: 2 depthcharge-action (timeout 00:05:00) [common]
196 15:36:59.997511 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
197 15:36:59.997601 substitutions:
198 15:36:59.997661 - {DTB}: None
199 15:36:59.997716 - {INITRD}: 14152816/tftp-deploy-vhof0zm9/ramdisk/ramdisk.cpio.gz
200 15:36:59.997769 - {KERNEL}: 14152816/tftp-deploy-vhof0zm9/kernel/bzImage
201 15:36:59.997820 - {LAVA_MAC}: None
202 15:36:59.997872 - {PRESEED_CONFIG}: None
203 15:36:59.997923 - {PRESEED_LOCAL}: None
204 15:36:59.997974 - {RAMDISK}: 14152816/tftp-deploy-vhof0zm9/ramdisk/ramdisk.cpio.gz
205 15:36:59.998038 - {ROOT_PART}: None
206 15:36:59.998115 - {ROOT}: None
207 15:36:59.998179 - {SERVER_IP}: 192.168.201.1
208 15:36:59.998228 - {TEE}: None
209 15:36:59.998277 Parsed boot commands:
210 15:36:59.998337 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
211 15:36:59.998472 Parsed boot commands: tftpboot 192.168.201.1 14152816/tftp-deploy-vhof0zm9/kernel/bzImage 14152816/tftp-deploy-vhof0zm9/kernel/cmdline 14152816/tftp-deploy-vhof0zm9/ramdisk/ramdisk.cpio.gz
212 15:36:59.998552 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
213 15:36:59.998632 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
214 15:36:59.998708 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
215 15:36:59.998781 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
216 15:36:59.998836 Not connected, no need to disconnect.
217 15:36:59.998903 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
218 15:36:59.998973 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
219 15:36:59.999032 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-6'
220 15:37:00.002469 Setting prompt string to ['lava-test: # ']
221 15:37:00.002793 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
222 15:37:00.002891 end: 2.2.1 reset-connection (duration 00:00:00) [common]
223 15:37:00.002984 start: 2.2.2 reset-device (timeout 00:05:00) [common]
224 15:37:00.003094 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
225 15:37:00.003283 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'acer-cbv514-1h-34uz-brya-cbg-6']
226 15:37:13.565702 Returned 0 in 13 seconds
227 15:37:13.666242 end: 2.2.2.1 pdu-reboot (duration 00:00:14) [common]
229 15:37:13.666570 end: 2.2.2 reset-device (duration 00:00:14) [common]
230 15:37:13.666679 start: 2.2.3 depthcharge-start (timeout 00:04:46) [common]
231 15:37:13.666773 Setting prompt string to 'Starting depthcharge on Volmar...'
232 15:37:13.666847 Changing prompt to 'Starting depthcharge on Volmar...'
233 15:37:13.666922 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
234 15:37:13.667340 [Enter `^Ec?' for help]
235 15:37:13.667428
236 15:37:13.667489
237 15:37:13.667573 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
238 15:37:13.667645 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
239 15:37:13.667701 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
240 15:37:13.667763 CPU: AES supported, TXT NOT supported, VT supported
241 15:37:13.667822 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
242 15:37:13.667883 Cache size = 10 MiB
243 15:37:13.667937 MCH: device id 4609 (rev 04) is Alderlake-P
244 15:37:13.667995 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
245 15:37:13.668047 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
246 15:37:13.668108 VBOOT: Loading verstage.
247 15:37:13.668160 FMAP: Found "FLASH" version 1.1 at 0x1804000.
248 15:37:13.668218 FMAP: base = 0x0 size = 0x2000000 #areas = 37
249 15:37:13.668270 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
250 15:37:13.668329 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
251 15:37:13.668415 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
252 15:37:13.668476
253 15:37:13.668530
254 15:37:13.668588 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
255 15:37:13.668647 Probing TPM I2C: I2C bus 1 version 0x3230302a
256 15:37:13.668702 DW I2C bus 1 at 0xfe022000 (400 KHz)
257 15:37:13.668754 done! DID_VID 0x00281ae0
258 15:37:13.668810 TPM ready after 0 ms
259 15:37:13.668868 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
260 15:37:13.668920 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
261 15:37:13.668972 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
262 15:37:13.669045 tlcl_send_startup: Startup return code is 0
263 15:37:13.669121 TPM: setup succeeded
264 15:37:13.669175 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
265 15:37:13.669227 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
266 15:37:13.669277 Chrome EC: UHEPI supported
267 15:37:13.669336 Reading cr50 boot mode
268 15:37:13.669393 Cr50 says boot_mode is VERIFIED_RW(0x00).
269 15:37:13.669444 Phase 1
270 15:37:13.669494 FMAP: area GBB found @ 1805000 (458752 bytes)
271 15:37:13.669546 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
272 15:37:13.669608 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
273 15:37:13.669660 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
274 15:37:13.669747 VB2:vb2_check_recovery() Recovery was requested manually
275 15:37:13.669807 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
276 15:37:13.669865 Recovery requested (1009000e)
277 15:37:13.669917 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
278 15:37:13.669968 tlcl_extend: response is 0
279 15:37:13.670019 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
280 15:37:13.670076 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
281 15:37:13.670134 tlcl_extend: response is 0
282 15:37:13.670184 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
283 15:37:13.670237 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
284 15:37:13.670293 CBFS: Found 'fallback/romstage' @0x80 size 0x1d810 in mcache @0xfef8562c
285 15:37:13.670351 BS: verstage times (exec / console): total (unknown) / 149 ms
286 15:37:13.670403
287 15:37:13.670453
288 15:37:13.670503 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
289 15:37:13.670614 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
290 15:37:13.670686 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
291 15:37:13.670740 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
292 15:37:13.670804 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
293 15:37:13.670856 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
294 15:37:13.670906 gpe0_sts[3]: 00000000 gpe0_en[3]: 00080000
295 15:37:13.670956 TCO_STS: 0000 0000
296 15:37:13.671014 GEN_PMCON: d0015038 00002200
297 15:37:13.671071 GBLRST_CAUSE: 00000000 00000000
298 15:37:13.671122 HPR_CAUSE0: 00000000
299 15:37:13.671172 prev_sleep_state 5
300 15:37:13.671228 Abort disabling TXT, as CPU is not TXT capable.
301 15:37:13.671287 cse_lite: Skip switching to RW in the recovery path
302 15:37:13.671339 Boot Count incremented to 10006
303 15:37:13.671390 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
304 15:37:13.671442 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
305 15:37:13.671500 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
306 15:37:13.671557 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef8589c
307 15:37:13.671608 Chrome EC: UHEPI supported
308 15:37:13.671658 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
309 15:37:13.671716 Probing TPM I2C: done! DID_VID 0x00281ae0
310 15:37:13.671772 Locality already claimed
311 15:37:13.671824 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
312 15:37:13.671893 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
313 15:37:13.671963 MRC: Hash idx 0x100b comparison successful.
314 15:37:13.672025 MRC cache found, size f6c8
315 15:37:13.672076 bootmode is set to: 2
316 15:37:13.672126 EC returned error result code 3
317 15:37:13.672178 FW_CONFIG value from CBI is 0x131
318 15:37:13.672234 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
319 15:37:13.672306 SPD index = 0
320 15:37:13.672362 CBFS: Found 'spd.bin' @0x78480 size 0x400 in mcache @0xfef857c8
321 15:37:13.672424 SPD: module type is LPDDR4X
322 15:37:13.672505 SPD: module part number is K4U6E3S4AB-MGCL
323 15:37:13.672558 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
324 15:37:13.672609 SPD: device width 16 bits, bus width 16 bits
325 15:37:13.672854 SPD: module size is 1024 MB (per channel)
326 15:37:13.672913 CBMEM:
327 15:37:13.672965 IMD: root @ 0x76fff000 254 entries.
328 15:37:13.673031 IMD: root @ 0x76ffec00 62 entries.
329 15:37:13.673117 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
330 15:37:13.673184 RO_VPD is uninitialized or empty.
331 15:37:13.673236 FMAP: area RW_VPD found @ f29000 (8192 bytes)
332 15:37:13.673309 External stage cache:
333 15:37:13.673365 IMD: root @ 0x7bbff000 254 entries.
334 15:37:13.673415 IMD: root @ 0x7bbfec00 62 entries.
335 15:37:13.673466 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
336 15:37:13.673516 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
337 15:37:13.673567 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
338 15:37:13.673618 MRC: 'RECOVERY_MRC_CACHE' does not need update.
339 15:37:13.673669 8 DIMMs found
340 15:37:13.673722 SMM Memory Map
341 15:37:13.673787 SMRAM : 0x7b800000 0x800000
342 15:37:13.673839 Subregion 0: 0x7b800000 0x200000
343 15:37:13.673889 Subregion 1: 0x7ba00000 0x200000
344 15:37:13.673939 Subregion 2: 0x7bc00000 0x400000
345 15:37:13.673996 top_of_ram = 0x77000000
346 15:37:13.674054 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
347 15:37:13.674105 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
348 15:37:13.674156 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
349 15:37:13.674213 MTRR Range: Start=ff000000 End=0 (Size 1000000)
350 15:37:13.674269 Normal boot
351 15:37:13.674321 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef85910
352 15:37:13.674372 Loading module at 0x76aba000 with entry 0x76aba031. filesize: 0x50e8 memsize: 0xa4a0
353 15:37:13.674429 Processing 237 relocs. Offset value of 0x74aba000
354 15:37:13.674486 BS: romstage times (exec / console): total (unknown) / 280 ms
355 15:37:13.674537
356 15:37:13.674588
357 15:37:13.674643 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
358 15:37:13.674695 Normal boot
359 15:37:13.674751 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
360 15:37:13.674802 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
361 15:37:13.674858 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
362 15:37:13.674911 CBFS: Found 'fallback/ramstage' @0x52e00 size 0x24b33 in mcache @0x76add10c
363 15:37:13.674968 Loading module at 0x76a30000 with entry 0x76a30000. filesize: 0x51f70 memsize: 0x880d0
364 15:37:13.675021 Processing 5931 relocs. Offset value of 0x72a30000
365 15:37:13.675076 BS: postcar times (exec / console): total (unknown) / 51 ms
366 15:37:13.675128
367 15:37:13.675182
368 15:37:13.675233 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
369 15:37:13.675288 Reserving BERT start 76a1f000, size 10000
370 15:37:13.675340 Normal boot
371 15:37:13.675391 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
372 15:37:13.675448 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
373 15:37:13.675504 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
374 15:37:13.675557 FMAP: area RW_VPD found @ f29000 (8192 bytes)
375 15:37:13.675607 Google Chrome EC: version:
376 15:37:13.675663 ro: volmar_v2.0.14126-e605144e9c
377 15:37:13.675718 rw: volmar_v0.0.55-22d1557
378 15:37:13.675769 running image: 1
379 15:37:13.675820 ACPI _SWS is PM1 Index 8 GPE Index -1
380 15:37:13.675885 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
381 15:37:13.675962 EC returned error result code 3
382 15:37:13.676014 FW_CONFIG value from CBI is 0x131
383 15:37:13.676064 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
384 15:37:13.676121 PCI: 00:1c.2 disabled by fw_config
385 15:37:13.676178 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
386 15:37:13.676229 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
387 15:37:13.676280 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
388 15:37:13.676336 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
389 15:37:13.676393 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
390 15:37:13.676445 CBFS: Found 'cpu_microcode_blob.bin' @0x1d940 size 0x35400 in mcache @0x76add0ac
391 15:37:13.676495 microcode: sig=0x906a4 pf=0x80 revision=0x423
392 15:37:13.676546 microcode: Update skipped, already up-to-date
393 15:37:13.676607 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add2dc
394 15:37:13.676680 Detected 6 core, 8 thread CPU.
395 15:37:13.676735 Setting up SMI for CPU
396 15:37:13.676792 IED base = 0x7bc00000
397 15:37:13.676849 IED size = 0x00400000
398 15:37:13.676898 Will perform SMM setup.
399 15:37:13.676948 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
400 15:37:13.676998 LAPIC 0x0 in XAPIC mode.
401 15:37:13.677071 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
402 15:37:13.677126 Processing 18 relocs. Offset value of 0x00030000
403 15:37:13.677177 Attempting to start 7 APs
404 15:37:13.677227 Waiting for 10ms after sending INIT.
405 15:37:13.677284 Waiting for SIPI to complete...
406 15:37:13.677342 LAPIC 0x16 in XAPIC mode.
407 15:37:13.677392 LAPIC 0x9 in XAPIC mode.
408 15:37:13.677441 LAPIC 0x8 in XAPIC mode.
409 15:37:13.677496 LAPIC 0x12 in XAPIC mode.
410 15:37:13.677552 LAPIC 0x14 in XAPIC mode.
411 15:37:13.677604 AP: slot 3 apic_id 12, MCU rev: 0x00000423
412 15:37:13.677654 AP: slot 4 apic_id 14, MCU rev: 0x00000423
413 15:37:13.677704 AP: slot 1 apic_id 16, MCU rev: 0x00000423
414 15:37:13.677790 LAPIC 0x10 in XAPIC mode.
415 15:37:13.677847 done.
416 15:37:13.677897 AP: slot 2 apic_id 10, MCU rev: 0x00000423
417 15:37:13.677954 AP: slot 7 apic_id 8, MCU rev: 0x00000423
418 15:37:13.678012 AP: slot 5 apic_id 9, MCU rev: 0x00000423
419 15:37:13.678063 Waiting for SIPI to complete...
420 15:37:13.678113 done.
421 15:37:13.678164 LAPIC 0x1 in XAPIC mode.
422 15:37:13.678221 AP: slot 6 apic_id 1, MCU rev: 0x00000423
423 15:37:13.678474 smm_setup_relocation_handler: enter
424 15:37:13.678564 smm_setup_relocation_handler: exit
425 15:37:13.678645 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
426 15:37:13.678728 Processing 11 relocs. Offset value of 0x00038000
427 15:37:13.678783 smm_module_setup_stub: stack_top = 0x7b804000
428 15:37:13.678835 smm_module_setup_stub: per cpu stack_size = 0x800
429 15:37:13.678888 smm_module_setup_stub: runtime.start32_offset = 0x4c
430 15:37:13.678950 smm_module_setup_stub: runtime.smm_size = 0x10000
431 15:37:13.679002 SMM Module: stub loaded at 38000. Will call 0x76a53094
432 15:37:13.679053 Installing permanent SMM handler to 0x7b800000
433 15:37:13.679104 smm_load_module: total_smm_space_needed e468, available -> 200000
434 15:37:13.679160 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
435 15:37:13.679221 Processing 255 relocs. Offset value of 0x7b9f6000
436 15:37:13.679273 smm_load_module: smram_start: 0x7b800000
437 15:37:13.679325 smm_load_module: smram_end: 7ba00000
438 15:37:13.679380 smm_load_module: handler start 0x7b9f6d5f
439 15:37:13.679437 smm_load_module: handler_size 98d0
440 15:37:13.679488 smm_load_module: fxsave_area 0x7b9ff000
441 15:37:13.679538 smm_load_module: fxsave_size 1000
442 15:37:13.679588 smm_load_module: CONFIG_MSEG_SIZE 0x0
443 15:37:13.679643 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
444 15:37:13.679701 smm_load_module: handler_mod_params.smbase = 0x7b800000
445 15:37:13.679751 smm_load_module: per_cpu_save_state_size = 0x400
446 15:37:13.679802 smm_load_module: num_cpus = 0x8
447 15:37:13.679858 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
448 15:37:13.679914 smm_load_module: total_save_state_size = 0x2000
449 15:37:13.679964 smm_load_module: cpu0 entry: 7b9e6000
450 15:37:13.680039 smm_create_map: cpus allowed in one segment 30
451 15:37:13.680099 smm_create_map: min # of segments needed 1
452 15:37:13.680157 CPU 0x0
453 15:37:13.680208 smbase 7b9e6000 entry 7b9ee000
454 15:37:13.680260 ss_start 7b9f5c00 code_end 7b9ee208
455 15:37:13.680317 CPU 0x1
456 15:37:13.680375 smbase 7b9e5c00 entry 7b9edc00
457 15:37:13.680426 ss_start 7b9f5800 code_end 7b9ede08
458 15:37:13.680476 CPU 0x2
459 15:37:13.680526 smbase 7b9e5800 entry 7b9ed800
460 15:37:13.680583 ss_start 7b9f5400 code_end 7b9eda08
461 15:37:13.680639 CPU 0x3
462 15:37:13.680690 smbase 7b9e5400 entry 7b9ed400
463 15:37:13.680741 ss_start 7b9f5000 code_end 7b9ed608
464 15:37:13.680792 CPU 0x4
465 15:37:13.680854 smbase 7b9e5000 entry 7b9ed000
466 15:37:13.680906 ss_start 7b9f4c00 code_end 7b9ed208
467 15:37:13.680957 CPU 0x5
468 15:37:13.681007 smbase 7b9e4c00 entry 7b9ecc00
469 15:37:13.681080 ss_start 7b9f4800 code_end 7b9ece08
470 15:37:13.681160 CPU 0x6
471 15:37:13.681219 smbase 7b9e4800 entry 7b9ec800
472 15:37:13.681270 ss_start 7b9f4400 code_end 7b9eca08
473 15:37:13.681328 CPU 0x7
474 15:37:13.681385 smbase 7b9e4400 entry 7b9ec400
475 15:37:13.681436 ss_start 7b9f4000 code_end 7b9ec608
476 15:37:13.681489 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
477 15:37:13.681546 Processing 11 relocs. Offset value of 0x7b9ee000
478 15:37:13.681603 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
479 15:37:13.681656 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
480 15:37:13.681706 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
481 15:37:13.681758 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
482 15:37:13.681814 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
483 15:37:13.681872 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
484 15:37:13.681922 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
485 15:37:13.682011 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
486 15:37:13.682098 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
487 15:37:13.682178 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
488 15:37:13.682262 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
489 15:37:13.682316 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
490 15:37:13.682366 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
491 15:37:13.682417 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
492 15:37:13.682473 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
493 15:37:13.682530 smm_module_setup_stub: stack_top = 0x7b804000
494 15:37:13.682580 smm_module_setup_stub: per cpu stack_size = 0x800
495 15:37:13.682631 smm_module_setup_stub: runtime.start32_offset = 0x4c
496 15:37:13.682686 smm_module_setup_stub: runtime.smm_size = 0x200000
497 15:37:13.682755 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
498 15:37:13.682805 Clearing SMI status registers
499 15:37:13.682854 SMI_STS: PM1
500 15:37:13.682904 PM1_STS: PWRBTN
501 15:37:13.682965 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
502 15:37:13.683017 In relocation handler: CPU 0
503 15:37:13.683066 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
504 15:37:13.683116 Writing SMRR. base = 0x7b800006, mask=0xff800c00
505 15:37:13.683170 Relocation complete.
506 15:37:13.683225 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
507 15:37:13.683275 In relocation handler: CPU 6
508 15:37:13.683325 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
509 15:37:13.683375 Relocation complete.
510 15:37:13.683434 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
511 15:37:13.683489 In relocation handler: CPU 2
512 15:37:13.683741 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
513 15:37:13.683798 Writing SMRR. base = 0x7b800006, mask=0xff800c00
514 15:37:13.683849 Relocation complete.
515 15:37:13.683910 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
516 15:37:13.683961 In relocation handler: CPU 3
517 15:37:13.684011 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
518 15:37:13.684060 Writing SMRR. base = 0x7b800006, mask=0xff800c00
519 15:37:13.684116 Relocation complete.
520 15:37:13.684170 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
521 15:37:13.684220 In relocation handler: CPU 1
522 15:37:13.684270 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
523 15:37:13.684335 Writing SMRR. base = 0x7b800006, mask=0xff800c00
524 15:37:13.684388 Relocation complete.
525 15:37:13.684438 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
526 15:37:13.684497 In relocation handler: CPU 4
527 15:37:13.684559 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
528 15:37:13.684611 Writing SMRR. base = 0x7b800006, mask=0xff800c00
529 15:37:13.684661 Relocation complete.
530 15:37:13.684711 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
531 15:37:13.684760 In relocation handler: CPU 5
532 15:37:13.684816 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
533 15:37:13.684869 Relocation complete.
534 15:37:13.684934 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
535 15:37:13.684988 In relocation handler: CPU 7
536 15:37:13.685093 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
537 15:37:13.685145 Writing SMRR. base = 0x7b800006, mask=0xff800c00
538 15:37:13.685195 Relocation complete.
539 15:37:13.685245 Initializing CPU #0
540 15:37:13.685368 CPU: vendor Intel device 906a4
541 15:37:13.685480 CPU: family 06, model 9a, stepping 04
542 15:37:13.685537 Clearing out pending MCEs
543 15:37:13.685608 cpu: energy policy set to 7
544 15:37:13.685673 Turbo is available but hidden
545 15:37:13.685723 Turbo is available and visible
546 15:37:13.685778 microcode: Update skipped, already up-to-date
547 15:37:13.685828 CPU #0 initialized
548 15:37:13.685882 Initializing CPU #6
549 15:37:13.685933 Initializing CPU #1
550 15:37:13.685986 Initializing CPU #3
551 15:37:13.686036 Initializing CPU #4
552 15:37:13.686085 CPU: vendor Intel device 906a4
553 15:37:13.686134 CPU: family 06, model 9a, stepping 04
554 15:37:13.686189 CPU: vendor Intel device 906a4
555 15:37:13.686245 CPU: family 06, model 9a, stepping 04
556 15:37:13.686294 Clearing out pending MCEs
557 15:37:13.686343 CPU: vendor Intel device 906a4
558 15:37:13.686392 CPU: family 06, model 9a, stepping 04
559 15:37:13.686448 Clearing out pending MCEs
560 15:37:13.686500 cpu: energy policy set to 7
561 15:37:13.686549 cpu: energy policy set to 7
562 15:37:13.686598 microcode: Update skipped, already up-to-date
563 15:37:13.686646 CPU #1 initialized
564 15:37:13.686701 Initializing CPU #2
565 15:37:13.686756 microcode: Update skipped, already up-to-date
566 15:37:13.686806 CPU #4 initialized
567 15:37:13.686855 CPU: vendor Intel device 906a4
568 15:37:13.686911 CPU: family 06, model 9a, stepping 04
569 15:37:13.686960 Clearing out pending MCEs
570 15:37:13.687015 Clearing out pending MCEs
571 15:37:13.687064 cpu: energy policy set to 7
572 15:37:13.687117 cpu: energy policy set to 7
573 15:37:13.687167 microcode: Update skipped, already up-to-date
574 15:37:13.687215 CPU #3 initialized
575 15:37:13.687270 microcode: Update skipped, already up-to-date
576 15:37:13.687319 CPU #2 initialized
577 15:37:13.687374 Initializing CPU #5
578 15:37:13.687424 Initializing CPU #7
579 15:37:13.687472 CPU: vendor Intel device 906a4
580 15:37:13.687521 CPU: family 06, model 9a, stepping 04
581 15:37:13.687580 CPU: vendor Intel device 906a4
582 15:37:13.687630 CPU: family 06, model 9a, stepping 04
583 15:37:13.687679 CPU: vendor Intel device 906a4
584 15:37:13.687728 CPU: family 06, model 9a, stepping 04
585 15:37:13.687778 Clearing out pending MCEs
586 15:37:13.687835 Clearing out pending MCEs
587 15:37:13.687886 Clearing out pending MCEs
588 15:37:13.687934 cpu: energy policy set to 7
589 15:37:13.687983 cpu: energy policy set to 7
590 15:37:13.688032 cpu: energy policy set to 7
591 15:37:13.688092 microcode: Update skipped, already up-to-date
592 15:37:13.688142 CPU #7 initialized
593 15:37:13.688191 microcode: Update skipped, already up-to-date
594 15:37:13.688240 CPU #5 initialized
595 15:37:13.688294 microcode: Update skipped, already up-to-date
596 15:37:13.688349 CPU #6 initialized
597 15:37:13.688399 bsp_do_flight_plan done after 695 msecs.
598 15:37:13.688448 CPU: frequency set to 4400 MHz
599 15:37:13.688501 Enabling SMIs.
600 15:37:13.688551 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 379 / 520 ms
601 15:37:13.688601 Probing TPM I2C: done! DID_VID 0x00281ae0
602 15:37:13.688656 Locality already claimed
603 15:37:13.688705 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
604 15:37:13.688760 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
605 15:37:13.688811 Enabling GPIO PM b/c CR50 has long IRQ pulse support
606 15:37:13.688861 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
607 15:37:13.688917 CBFS: Found 'vbt.bin' @0x7d8c0 size 0x4e9 in mcache @0x76add214
608 15:37:13.688972 Found a VBT of 9216 bytes after decompression
609 15:37:13.689072 PCI 1.0, PIN A, using IRQ #16
610 15:37:13.689131 PCI 2.0, PIN A, using IRQ #17
611 15:37:13.689187 PCI 4.0, PIN A, using IRQ #18
612 15:37:13.689239 PCI 5.0, PIN A, using IRQ #16
613 15:37:13.689333 PCI 6.0, PIN A, using IRQ #16
614 15:37:13.689425 PCI 6.2, PIN C, using IRQ #18
615 15:37:13.689491 PCI 7.0, PIN A, using IRQ #19
616 15:37:13.689539 PCI 7.1, PIN B, using IRQ #20
617 15:37:13.689588 PCI 7.2, PIN C, using IRQ #21
618 15:37:13.689643 PCI 7.3, PIN D, using IRQ #22
619 15:37:13.689699 PCI 8.0, PIN A, using IRQ #23
620 15:37:13.689748 PCI D.0, PIN A, using IRQ #17
621 15:37:13.689797 PCI D.1, PIN B, using IRQ #19
622 15:37:13.689903 PCI 10.0, PIN A, using IRQ #24
623 15:37:13.689970 PCI 10.1, PIN B, using IRQ #25
624 15:37:13.690019 PCI 10.6, PIN C, using IRQ #20
625 15:37:13.690068 PCI 10.7, PIN D, using IRQ #21
626 15:37:13.690116 PCI 11.0, PIN A, using IRQ #26
627 15:37:13.690233 PCI 11.1, PIN B, using IRQ #27
628 15:37:13.690490 PCI 11.2, PIN C, using IRQ #28
629 15:37:13.690547 PCI 11.3, PIN D, using IRQ #29
630 15:37:13.690597 PCI 12.0, PIN A, using IRQ #30
631 15:37:13.690646 PCI 12.6, PIN B, using IRQ #31
632 15:37:13.690695 PCI 12.7, PIN C, using IRQ #22
633 15:37:13.690744 PCI 13.0, PIN A, using IRQ #32
634 15:37:13.690793 PCI 13.1, PIN B, using IRQ #33
635 15:37:13.690842 PCI 13.2, PIN C, using IRQ #34
636 15:37:13.690890 PCI 13.3, PIN D, using IRQ #35
637 15:37:13.690939 PCI 14.0, PIN B, using IRQ #23
638 15:37:13.690988 PCI 14.1, PIN A, using IRQ #36
639 15:37:13.691037 PCI 14.3, PIN C, using IRQ #17
640 15:37:13.691085 PCI 15.0, PIN A, using IRQ #37
641 15:37:13.691134 PCI 15.1, PIN B, using IRQ #38
642 15:37:13.691183 PCI 15.2, PIN C, using IRQ #39
643 15:37:13.691230 PCI 15.3, PIN D, using IRQ #40
644 15:37:13.691278 PCI 16.0, PIN A, using IRQ #18
645 15:37:13.691327 PCI 16.1, PIN B, using IRQ #19
646 15:37:13.691376 PCI 16.2, PIN C, using IRQ #20
647 15:37:13.691425 PCI 16.3, PIN D, using IRQ #21
648 15:37:13.691473 PCI 16.4, PIN A, using IRQ #18
649 15:37:13.691522 PCI 16.5, PIN B, using IRQ #19
650 15:37:13.691570 PCI 17.0, PIN A, using IRQ #22
651 15:37:13.691619 PCI 19.0, PIN A, using IRQ #41
652 15:37:13.691667 PCI 19.1, PIN B, using IRQ #42
653 15:37:13.691723 PCI 19.2, PIN C, using IRQ #43
654 15:37:13.691805 PCI 1C.0, PIN A, using IRQ #16
655 15:37:13.691853 PCI 1C.1, PIN B, using IRQ #17
656 15:37:13.691908 PCI 1C.2, PIN C, using IRQ #18
657 15:37:13.691958 PCI 1C.3, PIN D, using IRQ #19
658 15:37:13.692012 PCI 1C.4, PIN A, using IRQ #16
659 15:37:13.692061 PCI 1C.5, PIN B, using IRQ #17
660 15:37:13.692109 PCI 1C.6, PIN C, using IRQ #18
661 15:37:13.692164 PCI 1C.7, PIN D, using IRQ #19
662 15:37:13.692213 PCI 1D.0, PIN A, using IRQ #16
663 15:37:13.692268 PCI 1D.1, PIN B, using IRQ #17
664 15:37:13.692318 PCI 1D.2, PIN C, using IRQ #18
665 15:37:13.692372 PCI 1D.3, PIN D, using IRQ #19
666 15:37:13.692422 PCI 1E.0, PIN A, using IRQ #23
667 15:37:13.692471 PCI 1E.1, PIN B, using IRQ #20
668 15:37:13.692559 PCI 1E.2, PIN C, using IRQ #44
669 15:37:13.692614 PCI 1E.3, PIN D, using IRQ #45
670 15:37:13.692663 PCI 1F.3, PIN B, using IRQ #22
671 15:37:13.692711 PCI 1F.4, PIN C, using IRQ #23
672 15:37:13.692764 PCI 1F.6, PIN D, using IRQ #20
673 15:37:13.692855 PCI 1F.7, PIN A, using IRQ #21
674 15:37:13.692905 IRQ: Using dynamically assigned PCI IO-APIC IRQs
675 15:37:13.692956 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
676 15:37:13.693005 FSPS returned 0
677 15:37:13.693105 Executing Phase 1 of FspMultiPhaseSiInit
678 15:37:13.693156 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
679 15:37:13.693255 port C0 DISC req: usage 1 usb3 1 usb2 1
680 15:37:13.693323 Raw Buffer output 0 00000111
681 15:37:13.693375 Raw Buffer output 1 00000000
682 15:37:13.693425 pmc_send_ipc_cmd succeeded
683 15:37:13.693476 port C1 DISC req: usage 1 usb3 3 usb2 3
684 15:37:13.693565 Raw Buffer output 0 00000331
685 15:37:13.693629 Raw Buffer output 1 00000000
686 15:37:13.693677 pmc_send_ipc_cmd succeeded
687 15:37:13.693726 Detected 6 core, 8 thread CPU.
688 15:37:13.693786 Detected 6 core, 8 thread CPU.
689 15:37:13.693853 Detected 6 core, 8 thread CPU.
690 15:37:13.693904 Detected 6 core, 8 thread CPU.
691 15:37:13.693954 Detected 6 core, 8 thread CPU.
692 15:37:13.694010 Detected 6 core, 8 thread CPU.
693 15:37:13.694066 Detected 6 core, 8 thread CPU.
694 15:37:13.694129 Detected 6 core, 8 thread CPU.
695 15:37:13.694177 Detected 6 core, 8 thread CPU.
696 15:37:13.694232 Detected 6 core, 8 thread CPU.
697 15:37:13.694285 Detected 6 core, 8 thread CPU.
698 15:37:13.694335 Detected 6 core, 8 thread CPU.
699 15:37:13.694383 Detected 6 core, 8 thread CPU.
700 15:37:13.694436 Detected 6 core, 8 thread CPU.
701 15:37:13.694492 Detected 6 core, 8 thread CPU.
702 15:37:13.694548 Detected 6 core, 8 thread CPU.
703 15:37:13.694598 Detected 6 core, 8 thread CPU.
704 15:37:13.694647 Detected 6 core, 8 thread CPU.
705 15:37:13.694702 Detected 6 core, 8 thread CPU.
706 15:37:13.694756 Detected 6 core, 8 thread CPU.
707 15:37:13.694805 Detected 6 core, 8 thread CPU.
708 15:37:13.694854 Detected 6 core, 8 thread CPU.
709 15:37:13.694908 Detected 6 core, 8 thread CPU.
710 15:37:13.694963 Detected 6 core, 8 thread CPU.
711 15:37:13.695013 Detected 6 core, 8 thread CPU.
712 15:37:13.695063 Detected 6 core, 8 thread CPU.
713 15:37:13.695117 Detected 6 core, 8 thread CPU.
714 15:37:13.695167 Detected 6 core, 8 thread CPU.
715 15:37:13.695222 Detected 6 core, 8 thread CPU.
716 15:37:13.695271 Detected 6 core, 8 thread CPU.
717 15:37:13.695320 Detected 6 core, 8 thread CPU.
718 15:37:13.695375 Detected 6 core, 8 thread CPU.
719 15:37:13.695428 Detected 6 core, 8 thread CPU.
720 15:37:13.695479 Detected 6 core, 8 thread CPU.
721 15:37:13.695528 Detected 6 core, 8 thread CPU.
722 15:37:13.695582 Detected 6 core, 8 thread CPU.
723 15:37:13.695632 Detected 6 core, 8 thread CPU.
724 15:37:13.695687 Detected 6 core, 8 thread CPU.
725 15:37:13.695737 Detected 6 core, 8 thread CPU.
726 15:37:13.695790 Detected 6 core, 8 thread CPU.
727 15:37:13.695839 Detected 6 core, 8 thread CPU.
728 15:37:13.695889 Detected 6 core, 8 thread CPU.
729 15:37:13.695943 Display FSP Version Info HOB
730 15:37:13.695993 Reference Code - CPU = c.0.65.70
731 15:37:13.696048 uCode Version = 0.0.4.23
732 15:37:13.696096 TXT ACM version = ff.ff.ff.ffff
733 15:37:13.696146 Reference Code - ME = c.0.65.70
734 15:37:13.696200 MEBx version = 0.0.0.0
735 15:37:13.696254 ME Firmware Version = Consumer SKU
736 15:37:13.696304 Reference Code - PCH = c.0.65.70
737 15:37:13.696352 PCH-CRID Status = Disabled
738 15:37:13.696401 PCH-CRID Original Value = ff.ff.ff.ffff
739 15:37:13.696456 PCH-CRID New Value = ff.ff.ff.ffff
740 15:37:13.696511 OPROM - RST - RAID = ff.ff.ff.ffff
741 15:37:13.696561 PCH Hsio Version = 4.0.0.0
742 15:37:13.696609 Reference Code - SA - System Agent = c.0.65.70
743 15:37:13.696664 Reference Code - MRC = 0.0.3.80
744 15:37:13.696719 SA - PCIe Version = c.0.65.70
745 15:37:13.696769 SA-CRID Status = Disabled
746 15:37:13.696818 SA-CRID Original Value = 0.0.0.4
747 15:37:13.696866 SA-CRID New Value = 0.0.0.4
748 15:37:13.696921 OPROM - VBIOS = ff.ff.ff.ffff
749 15:37:13.696978 IO Manageability Engine FW Version = 24.0.4.0
750 15:37:13.697056 PHY Build Version = 0.0.0.2016
751 15:37:13.697325 Thunderbolt(TM) FW Version = 0.0.0.0
752 15:37:13.697404 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
753 15:37:13.697462 BS: BS_DEV_INIT_CHIPS run times (exec / console): 463 / 507 ms
754 15:37:13.697537 Enumerating buses...
755 15:37:13.697594 Show all devs... Before device enumeration.
756 15:37:13.697650 Root Device: enabled 1
757 15:37:13.697701 CPU_CLUSTER: 0: enabled 1
758 15:37:13.697767 DOMAIN: 0000: enabled 1
759 15:37:13.697836 GPIO: 0: enabled 1
760 15:37:13.697897 PCI: 00:00.0: enabled 1
761 15:37:13.697988 PCI: 00:01.0: enabled 0
762 15:37:13.698077 PCI: 00:01.1: enabled 0
763 15:37:13.698134 PCI: 00:02.0: enabled 1
764 15:37:13.698183 PCI: 00:04.0: enabled 1
765 15:37:13.698232 PCI: 00:05.0: enabled 0
766 15:37:13.698302 PCI: 00:06.0: enabled 1
767 15:37:13.698370 PCI: 00:06.2: enabled 0
768 15:37:13.698419 PCI: 00:07.0: enabled 0
769 15:37:13.698468 PCI: 00:07.1: enabled 0
770 15:37:13.698549 PCI: 00:07.2: enabled 0
771 15:37:13.698676 PCI: 00:07.3: enabled 0
772 15:37:13.698730 PCI: 00:08.0: enabled 0
773 15:37:13.698787 PCI: 00:09.0: enabled 0
774 15:37:13.698843 PCI: 00:0a.0: enabled 1
775 15:37:13.698894 PCI: 00:0d.0: enabled 1
776 15:37:13.698944 PCI: 00:0d.1: enabled 0
777 15:37:13.699012 PCI: 00:0d.2: enabled 0
778 15:37:13.699096 PCI: 00:0d.3: enabled 0
779 15:37:13.699145 PCI: 00:0e.0: enabled 0
780 15:37:13.699194 PCI: 00:10.0: enabled 0
781 15:37:13.699244 PCI: 00:10.1: enabled 0
782 15:37:13.699322 PCI: 00:10.6: enabled 0
783 15:37:13.699384 PCI: 00:10.7: enabled 0
784 15:37:13.699450 PCI: 00:12.0: enabled 0
785 15:37:13.699510 PCI: 00:12.6: enabled 0
786 15:37:13.699593 PCI: 00:12.7: enabled 0
787 15:37:13.699642 PCI: 00:13.0: enabled 0
788 15:37:13.699691 PCI: 00:14.0: enabled 1
789 15:37:13.699740 PCI: 00:14.1: enabled 0
790 15:37:13.699814 PCI: 00:14.2: enabled 1
791 15:37:13.699877 PCI: 00:14.3: enabled 1
792 15:37:13.699925 PCI: 00:15.0: enabled 1
793 15:37:13.699974 PCI: 00:15.1: enabled 1
794 15:37:13.700048 PCI: 00:15.2: enabled 0
795 15:37:13.700112 PCI: 00:15.3: enabled 1
796 15:37:13.700160 PCI: 00:16.0: enabled 1
797 15:37:13.700208 PCI: 00:16.1: enabled 0
798 15:37:13.700279 PCI: 00:16.2: enabled 0
799 15:37:13.700347 PCI: 00:16.3: enabled 0
800 15:37:13.700395 PCI: 00:16.4: enabled 0
801 15:37:13.700443 PCI: 00:16.5: enabled 0
802 15:37:13.700498 PCI: 00:17.0: enabled 1
803 15:37:13.700569 PCI: 00:19.0: enabled 0
804 15:37:13.700633 PCI: 00:19.1: enabled 1
805 15:37:13.700682 PCI: 00:19.2: enabled 0
806 15:37:13.700736 PCI: 00:1a.0: enabled 0
807 15:37:13.700806 PCI: 00:1c.0: enabled 0
808 15:37:13.700873 PCI: 00:1c.1: enabled 0
809 15:37:13.700928 PCI: 00:1c.2: enabled 0
810 15:37:13.700980 PCI: 00:1c.3: enabled 0
811 15:37:13.701079 PCI: 00:1c.4: enabled 0
812 15:37:13.701150 PCI: 00:1c.5: enabled 0
813 15:37:13.701200 PCI: 00:1c.6: enabled 0
814 15:37:13.701249 PCI: 00:1c.7: enabled 0
815 15:37:13.701302 PCI: 00:1d.0: enabled 0
816 15:37:13.701357 PCI: 00:1d.1: enabled 0
817 15:37:13.701414 PCI: 00:1d.2: enabled 0
818 15:37:13.701465 PCI: 00:1d.3: enabled 0
819 15:37:13.701513 PCI: 00:1e.0: enabled 1
820 15:37:13.701567 PCI: 00:1e.1: enabled 0
821 15:37:13.701623 PCI: 00:1e.2: enabled 0
822 15:37:13.701672 PCI: 00:1e.3: enabled 1
823 15:37:13.701721 PCI: 00:1f.0: enabled 1
824 15:37:13.755993 PCI: 00:1f.1: enabled 0
825 15:37:13.756119 PCI: 00:1f.2: enabled 1
826 15:37:13.756210 PCI: 00:1f.3: enabled 1
827 15:37:13.756294 PCI: 00:1f.4: enabled 0
828 15:37:13.756377 PCI: 00:1f.5: enabled 1
829 15:37:13.756457 PCI: 00:1f.6: enabled 0
830 15:37:13.756538 PCI: 00:1f.7: enabled 0
831 15:37:13.756617 GENERIC: 0.0: enabled 1
832 15:37:13.756697 GENERIC: 0.0: enabled 1
833 15:37:13.756775 GENERIC: 1.0: enabled 1
834 15:37:13.756883 GENERIC: 0.0: enabled 1
835 15:37:13.756964 GENERIC: 1.0: enabled 1
836 15:37:13.757082 USB0 port 0: enabled 1
837 15:37:13.757213 USB0 port 0: enabled 1
838 15:37:13.757302 GENERIC: 0.0: enabled 1
839 15:37:13.757414 I2C: 00:1a: enabled 1
840 15:37:13.757493 I2C: 00:31: enabled 1
841 15:37:13.757572 I2C: 00:32: enabled 1
842 15:37:13.757652 I2C: 00:50: enabled 1
843 15:37:13.757731 I2C: 00:10: enabled 1
844 15:37:13.757814 I2C: 00:15: enabled 1
845 15:37:13.757897 I2C: 00:2c: enabled 1
846 15:37:13.757976 GENERIC: 0.0: enabled 1
847 15:37:13.758054 SPI: 00: enabled 1
848 15:37:13.758133 PNP: 0c09.0: enabled 1
849 15:37:13.758212 GENERIC: 0.0: enabled 1
850 15:37:13.758291 USB3 port 0: enabled 1
851 15:37:13.758381 USB3 port 1: enabled 0
852 15:37:13.758504 USB3 port 2: enabled 1
853 15:37:13.758583 USB3 port 3: enabled 0
854 15:37:13.758659 USB2 port 0: enabled 1
855 15:37:13.758735 USB2 port 1: enabled 0
856 15:37:13.758812 USB2 port 2: enabled 1
857 15:37:13.758925 USB2 port 3: enabled 0
858 15:37:13.759014 USB2 port 4: enabled 0
859 15:37:13.759096 USB2 port 5: enabled 1
860 15:37:13.759206 USB2 port 6: enabled 0
861 15:37:13.759283 USB2 port 7: enabled 0
862 15:37:13.759398 USB2 port 8: enabled 1
863 15:37:13.759491 USB2 port 9: enabled 1
864 15:37:13.759572 USB3 port 0: enabled 1
865 15:37:13.759678 USB3 port 1: enabled 0
866 15:37:13.759757 USB3 port 2: enabled 0
867 15:37:13.759836 USB3 port 3: enabled 0
868 15:37:13.759942 GENERIC: 0.0: enabled 1
869 15:37:13.760021 GENERIC: 1.0: enabled 1
870 15:37:13.760098 APIC: 00: enabled 1
871 15:37:13.760215 APIC: 16: enabled 1
872 15:37:13.760305 APIC: 10: enabled 1
873 15:37:13.760398 APIC: 12: enabled 1
874 15:37:13.760479 APIC: 14: enabled 1
875 15:37:13.760570 APIC: 09: enabled 1
876 15:37:13.760685 APIC: 01: enabled 1
877 15:37:13.760776 APIC: 08: enabled 1
878 15:37:13.760870 Compare with tree...
879 15:37:13.760950 Root Device: enabled 1
880 15:37:13.761050 CPU_CLUSTER: 0: enabled 1
881 15:37:13.761159 APIC: 00: enabled 1
882 15:37:13.761252 APIC: 16: enabled 1
883 15:37:13.761329 APIC: 10: enabled 1
884 15:37:13.761407 APIC: 12: enabled 1
885 15:37:13.761485 APIC: 14: enabled 1
886 15:37:13.761562 APIC: 09: enabled 1
887 15:37:13.761640 APIC: 01: enabled 1
888 15:37:13.761716 APIC: 08: enabled 1
889 15:37:13.761803 DOMAIN: 0000: enabled 1
890 15:37:13.761887 GPIO: 0: enabled 1
891 15:37:13.761966 PCI: 00:00.0: enabled 1
892 15:37:13.762045 PCI: 00:01.0: enabled 0
893 15:37:13.762125 PCI: 00:01.1: enabled 0
894 15:37:13.762202 PCI: 00:02.0: enabled 1
895 15:37:13.762280 PCI: 00:04.0: enabled 1
896 15:37:13.762359 GENERIC: 0.0: enabled 1
897 15:37:13.762437 PCI: 00:05.0: enabled 0
898 15:37:13.762546 PCI: 00:06.0: enabled 1
899 15:37:13.762625 PCI: 00:06.2: enabled 0
900 15:37:13.762702 PCI: 00:08.0: enabled 0
901 15:37:13.762781 PCI: 00:09.0: enabled 0
902 15:37:13.762858 PCI: 00:0a.0: enabled 1
903 15:37:13.762937 PCI: 00:0d.0: enabled 1
904 15:37:13.763014 USB0 port 0: enabled 1
905 15:37:13.763096 USB3 port 0: enabled 1
906 15:37:13.763272 USB3 port 1: enabled 0
907 15:37:13.763418 USB3 port 2: enabled 1
908 15:37:13.763497 USB3 port 3: enabled 0
909 15:37:13.763607 PCI: 00:0d.1: enabled 0
910 15:37:13.763686 PCI: 00:0d.2: enabled 0
911 15:37:13.763764 PCI: 00:0d.3: enabled 0
912 15:37:13.763841 PCI: 00:0e.0: enabled 0
913 15:37:13.764136 PCI: 00:10.0: enabled 0
914 15:37:13.764273 PCI: 00:10.1: enabled 0
915 15:37:13.764354 PCI: 00:10.6: enabled 0
916 15:37:13.764447 PCI: 00:10.7: enabled 0
917 15:37:13.764540 PCI: 00:12.0: enabled 0
918 15:37:13.764620 PCI: 00:12.6: enabled 0
919 15:37:13.764701 PCI: 00:12.7: enabled 0
920 15:37:13.764808 PCI: 00:13.0: enabled 0
921 15:37:13.764889 PCI: 00:14.0: enabled 1
922 15:37:13.764970 USB0 port 0: enabled 1
923 15:37:13.765078 USB2 port 0: enabled 1
924 15:37:13.765202 USB2 port 1: enabled 0
925 15:37:13.765286 USB2 port 2: enabled 1
926 15:37:13.765378 USB2 port 3: enabled 0
927 15:37:13.765473 USB2 port 4: enabled 0
928 15:37:13.765560 USB2 port 5: enabled 1
929 15:37:13.765661 USB2 port 6: enabled 0
930 15:37:13.765755 USB2 port 7: enabled 0
931 15:37:13.765863 USB2 port 8: enabled 1
932 15:37:13.765941 USB2 port 9: enabled 1
933 15:37:13.766019 USB3 port 0: enabled 1
934 15:37:13.766097 USB3 port 1: enabled 0
935 15:37:13.766177 USB3 port 2: enabled 0
936 15:37:13.766255 USB3 port 3: enabled 0
937 15:37:13.766334 PCI: 00:14.1: enabled 0
938 15:37:13.766432 PCI: 00:14.2: enabled 1
939 15:37:13.766512 PCI: 00:14.3: enabled 1
940 15:37:13.766591 GENERIC: 0.0: enabled 1
941 15:37:13.766669 PCI: 00:15.0: enabled 1
942 15:37:13.766756 I2C: 00:1a: enabled 1
943 15:37:13.766848 I2C: 00:31: enabled 1
944 15:37:13.766928 I2C: 00:32: enabled 1
945 15:37:13.767007 PCI: 00:15.1: enabled 1
946 15:37:13.767090 I2C: 00:50: enabled 1
947 15:37:13.767215 PCI: 00:15.2: enabled 0
948 15:37:13.767294 PCI: 00:15.3: enabled 1
949 15:37:13.767373 I2C: 00:10: enabled 1
950 15:37:13.767457 PCI: 00:16.0: enabled 1
951 15:37:13.767551 PCI: 00:16.1: enabled 0
952 15:37:13.767662 PCI: 00:16.2: enabled 0
953 15:37:13.767740 PCI: 00:16.3: enabled 0
954 15:37:13.767818 PCI: 00:16.4: enabled 0
955 15:37:13.767896 PCI: 00:16.5: enabled 0
956 15:37:13.767975 PCI: 00:17.0: enabled 1
957 15:37:13.768054 PCI: 00:19.0: enabled 0
958 15:37:13.768182 PCI: 00:19.1: enabled 1
959 15:37:13.768264 I2C: 00:15: enabled 1
960 15:37:13.768341 I2C: 00:2c: enabled 1
961 15:37:13.768418 PCI: 00:19.2: enabled 0
962 15:37:13.768500 PCI: 00:1a.0: enabled 0
963 15:37:13.768577 PCI: 00:1e.0: enabled 1
964 15:37:13.768655 PCI: 00:1e.1: enabled 0
965 15:37:13.768731 PCI: 00:1e.2: enabled 0
966 15:37:13.768807 PCI: 00:1e.3: enabled 1
967 15:37:13.768887 SPI: 00: enabled 1
968 15:37:13.768964 PCI: 00:1f.0: enabled 1
969 15:37:13.769082 PNP: 0c09.0: enabled 1
970 15:37:13.769166 PCI: 00:1f.1: enabled 0
971 15:37:13.769245 PCI: 00:1f.2: enabled 1
972 15:37:13.769334 GENERIC: 0.0: enabled 1
973 15:37:13.769425 GENERIC: 0.0: enabled 1
974 15:37:13.769503 GENERIC: 1.0: enabled 1
975 15:37:13.769580 PCI: 00:1f.3: enabled 1
976 15:37:13.769660 PCI: 00:1f.4: enabled 0
977 15:37:13.769739 PCI: 00:1f.5: enabled 1
978 15:37:13.769818 PCI: 00:1f.6: enabled 0
979 15:37:13.769896 PCI: 00:1f.7: enabled 0
980 15:37:13.769973 Root Device scanning...
981 15:37:13.770053 scan_static_bus for Root Device
982 15:37:13.770130 CPU_CLUSTER: 0 enabled
983 15:37:13.770208 DOMAIN: 0000 enabled
984 15:37:13.770286 DOMAIN: 0000 scanning...
985 15:37:13.770363 PCI: pci_scan_bus for bus 00
986 15:37:13.770444 PCI: 00:00.0 [8086/0000] ops
987 15:37:13.770525 PCI: 00:00.0 [8086/4609] enabled
988 15:37:13.770623 PCI: 00:02.0 [8086/0000] bus ops
989 15:37:13.770704 PCI: 00:02.0 [8086/46b3] enabled
990 15:37:13.770782 PCI: 00:04.0 [8086/0000] bus ops
991 15:37:13.770860 PCI: 00:04.0 [8086/461d] enabled
992 15:37:13.770939 PCI: 00:06.0 [8086/0000] bus ops
993 15:37:13.771027 PCI: 00:06.0 [8086/464d] enabled
994 15:37:13.771163 PCI: 00:08.0 [8086/464f] disabled
995 15:37:13.771243 PCI: 00:0a.0 [8086/467d] enabled
996 15:37:13.771322 PCI: 00:0d.0 [8086/0000] bus ops
997 15:37:13.771399 PCI: 00:0d.0 [8086/461e] enabled
998 15:37:13.771479 PCI: 00:14.0 [8086/0000] bus ops
999 15:37:13.771558 PCI: 00:14.0 [8086/51ed] enabled
1000 15:37:13.771668 PCI: 00:14.2 [8086/51ef] enabled
1001 15:37:13.771763 PCI: 00:14.3 [8086/0000] bus ops
1002 15:37:13.771840 PCI: 00:14.3 [8086/51f0] enabled
1003 15:37:13.771919 PCI: 00:15.0 [8086/0000] bus ops
1004 15:37:13.771999 PCI: 00:15.0 [8086/51e8] enabled
1005 15:37:13.772077 PCI: 00:15.1 [8086/0000] bus ops
1006 15:37:13.772151 PCI: 00:15.1 [8086/51e9] enabled
1007 15:37:13.772205 PCI: 00:15.2 [8086/0000] bus ops
1008 15:37:13.772273 PCI: 00:15.2 [8086/51ea] disabled
1009 15:37:13.772350 PCI: 00:15.3 [8086/0000] bus ops
1010 15:37:13.772430 PCI: 00:15.3 [8086/51eb] enabled
1011 15:37:13.772509 PCI: 00:16.0 [8086/0000] ops
1012 15:37:13.772586 PCI: 00:16.0 [8086/51e0] enabled
1013 15:37:13.772667 PCI: Static device PCI: 00:17.0 not found, disabling it.
1014 15:37:13.772747 PCI: 00:19.0 [8086/0000] bus ops
1015 15:37:13.772824 PCI: 00:19.0 [8086/51c5] disabled
1016 15:37:13.772907 PCI: 00:19.1 [8086/0000] bus ops
1017 15:37:13.772986 PCI: 00:19.1 [8086/51c6] enabled
1018 15:37:13.773107 PCI: 00:1e.0 [8086/0000] ops
1019 15:37:13.773200 PCI: 00:1e.0 [8086/51a8] enabled
1020 15:37:13.773293 PCI: 00:1e.3 [8086/0000] bus ops
1021 15:37:13.773384 PCI: 00:1e.3 [8086/51ab] enabled
1022 15:37:13.773465 PCI: 00:1f.0 [8086/0000] bus ops
1023 15:37:13.773543 PCI: 00:1f.0 [8086/5182] enabled
1024 15:37:13.773622 RTC Init
1025 15:37:13.773702 Set power on after power failure.
1026 15:37:13.773779 Disabling Deep S3
1027 15:37:13.773858 Disabling Deep S3
1028 15:37:13.773937 Disabling Deep S4
1029 15:37:13.774022 Disabling Deep S4
1030 15:37:13.774145 Disabling Deep S5
1031 15:37:13.774222 Disabling Deep S5
1032 15:37:13.774301 PCI: 00:1f.2 [0000/0000] hidden
1033 15:37:13.774381 PCI: 00:1f.3 [8086/0000] bus ops
1034 15:37:13.774460 PCI: 00:1f.3 [8086/51c8] enabled
1035 15:37:13.774539 PCI: 00:1f.5 [8086/0000] bus ops
1036 15:37:13.774618 PCI: 00:1f.5 [8086/51a4] enabled
1037 15:37:13.774695 GPIO: 0 enabled
1038 15:37:13.774773 PCI: Leftover static devices:
1039 15:37:13.774892 PCI: 00:01.0
1040 15:37:13.774968 PCI: 00:01.1
1041 15:37:13.775048 PCI: 00:05.0
1042 15:37:13.775217 PCI: 00:06.2
1043 15:37:13.775315 PCI: 00:09.0
1044 15:37:13.775436 PCI: 00:0d.1
1045 15:37:13.775516 PCI: 00:0d.2
1046 15:37:13.775609 PCI: 00:0d.3
1047 15:37:13.775702 PCI: 00:0e.0
1048 15:37:13.775781 PCI: 00:10.0
1049 15:37:13.775857 PCI: 00:10.1
1050 15:37:13.775964 PCI: 00:10.6
1051 15:37:13.776042 PCI: 00:10.7
1052 15:37:13.776118 PCI: 00:12.0
1053 15:37:13.776197 PCI: 00:12.6
1054 15:37:13.776275 PCI: 00:12.7
1055 15:37:13.776352 PCI: 00:13.0
1056 15:37:13.776431 PCI: 00:14.1
1057 15:37:13.776507 PCI: 00:16.1
1058 15:37:13.776594 PCI: 00:16.2
1059 15:37:13.776707 PCI: 00:16.3
1060 15:37:13.776784 PCI: 00:16.4
1061 15:37:13.776862 PCI: 00:16.5
1062 15:37:13.776939 PCI: 00:17.0
1063 15:37:13.777035 PCI: 00:19.2
1064 15:37:13.777163 PCI: 00:1a.0
1065 15:37:13.777249 PCI: 00:1e.1
1066 15:37:13.777372 PCI: 00:1e.2
1067 15:37:13.777454 PCI: 00:1f.1
1068 15:37:13.777560 PCI: 00:1f.4
1069 15:37:13.777851 PCI: 00:1f.6
1070 15:37:13.777976 PCI: 00:1f.7
1071 15:37:13.778056 PCI: Check your devicetree.cb.
1072 15:37:13.778133 PCI: 00:02.0 scanning...
1073 15:37:13.778224 scan_generic_bus for PCI: 00:02.0
1074 15:37:13.778317 scan_generic_bus for PCI: 00:02.0 done
1075 15:37:13.778394 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1076 15:37:13.778487 PCI: 00:04.0 scanning...
1077 15:37:13.778578 scan_generic_bus for PCI: 00:04.0
1078 15:37:13.778656 GENERIC: 0.0 enabled
1079 15:37:13.778762 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1080 15:37:13.778842 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1081 15:37:13.778921 PCI: 00:06.0 scanning...
1082 15:37:13.779028 do_pci_scan_bridge for PCI: 00:06.0
1083 15:37:13.779111 PCI: pci_scan_bus for bus 01
1084 15:37:13.779228 PCI: 01:00.0 [15b7/5009] enabled
1085 15:37:13.779325 Enabling Common Clock Configuration
1086 15:37:13.779405 L1 Sub-State supported from root port 6
1087 15:37:13.779488 L1 Sub-State Support = 0x5
1088 15:37:13.779568 CommonModeRestoreTime = 0x6e
1089 15:37:13.779648 Power On Value = 0x5, Power On Scale = 0x2
1090 15:37:13.779729 ASPM: Enabled L1
1091 15:37:13.779809 PCIe: Max_Payload_Size adjusted to 256
1092 15:37:13.779889 PCI: 01:00.0: Enabled LTR
1093 15:37:13.779983 PCI: 01:00.0: Programmed LTR max latencies
1094 15:37:13.780074 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1095 15:37:13.780141 PCI: 00:0d.0 scanning...
1096 15:37:13.780209 scan_static_bus for PCI: 00:0d.0
1097 15:37:13.780288 USB0 port 0 enabled
1098 15:37:13.780369 USB0 port 0 scanning...
1099 15:37:13.780472 scan_static_bus for USB0 port 0
1100 15:37:13.780552 USB3 port 0 enabled
1101 15:37:13.780634 USB3 port 1 disabled
1102 15:37:13.780715 USB3 port 2 enabled
1103 15:37:13.780794 USB3 port 3 disabled
1104 15:37:13.780875 USB3 port 0 scanning...
1105 15:37:13.780955 scan_static_bus for USB3 port 0
1106 15:37:13.781100 scan_static_bus for USB3 port 0 done
1107 15:37:13.781210 scan_bus: bus USB3 port 0 finished in 6 msecs
1108 15:37:13.781289 USB3 port 2 scanning...
1109 15:37:13.781366 scan_static_bus for USB3 port 2
1110 15:37:13.781446 scan_static_bus for USB3 port 2 done
1111 15:37:13.781525 scan_bus: bus USB3 port 2 finished in 6 msecs
1112 15:37:13.781603 scan_static_bus for USB0 port 0 done
1113 15:37:13.781683 scan_bus: bus USB0 port 0 finished in 43 msecs
1114 15:37:13.781762 scan_static_bus for PCI: 00:0d.0 done
1115 15:37:13.781840 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1116 15:37:13.781919 PCI: 00:14.0 scanning...
1117 15:37:13.781998 scan_static_bus for PCI: 00:14.0
1118 15:37:13.782074 USB0 port 0 enabled
1119 15:37:13.782153 USB0 port 0 scanning...
1120 15:37:13.782231 scan_static_bus for USB0 port 0
1121 15:37:13.782307 USB2 port 0 enabled
1122 15:37:13.782385 USB2 port 1 disabled
1123 15:37:13.782464 USB2 port 2 enabled
1124 15:37:13.782541 USB2 port 3 disabled
1125 15:37:13.782619 USB2 port 4 disabled
1126 15:37:13.782697 USB2 port 5 enabled
1127 15:37:13.782790 USB2 port 6 disabled
1128 15:37:13.782870 USB2 port 7 disabled
1129 15:37:13.782951 USB2 port 8 enabled
1130 15:37:13.783030 USB2 port 9 enabled
1131 15:37:13.783122 USB3 port 0 enabled
1132 15:37:13.783214 USB3 port 1 disabled
1133 15:37:13.783303 USB3 port 2 disabled
1134 15:37:13.783384 USB3 port 3 disabled
1135 15:37:13.783466 USB2 port 0 scanning...
1136 15:37:13.783545 scan_static_bus for USB2 port 0
1137 15:37:13.783626 scan_static_bus for USB2 port 0 done
1138 15:37:13.783708 scan_bus: bus USB2 port 0 finished in 6 msecs
1139 15:37:13.783787 USB2 port 2 scanning...
1140 15:37:13.783879 scan_static_bus for USB2 port 2
1141 15:37:13.783972 scan_static_bus for USB2 port 2 done
1142 15:37:13.784052 scan_bus: bus USB2 port 2 finished in 6 msecs
1143 15:37:13.784123 USB2 port 5 scanning...
1144 15:37:13.784180 scan_static_bus for USB2 port 5
1145 15:37:13.784251 scan_static_bus for USB2 port 5 done
1146 15:37:13.784329 scan_bus: bus USB2 port 5 finished in 6 msecs
1147 15:37:13.784411 USB2 port 8 scanning...
1148 15:37:13.784492 scan_static_bus for USB2 port 8
1149 15:37:13.784571 scan_static_bus for USB2 port 8 done
1150 15:37:13.784653 scan_bus: bus USB2 port 8 finished in 6 msecs
1151 15:37:13.784735 USB2 port 9 scanning...
1152 15:37:13.784821 scan_static_bus for USB2 port 9
1153 15:37:13.784917 scan_static_bus for USB2 port 9 done
1154 15:37:13.784998 scan_bus: bus USB2 port 9 finished in 6 msecs
1155 15:37:13.785090 USB3 port 0 scanning...
1156 15:37:13.785181 scan_static_bus for USB3 port 0
1157 15:37:13.785259 scan_static_bus for USB3 port 0 done
1158 15:37:13.785340 scan_bus: bus USB3 port 0 finished in 6 msecs
1159 15:37:13.785428 scan_static_bus for USB0 port 0 done
1160 15:37:13.785510 scan_bus: bus USB0 port 0 finished in 120 msecs
1161 15:37:13.785588 scan_static_bus for PCI: 00:14.0 done
1162 15:37:13.785668 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1163 15:37:13.785750 PCI: 00:14.3 scanning...
1164 15:37:13.785831 scan_static_bus for PCI: 00:14.3
1165 15:37:13.785911 GENERIC: 0.0 enabled
1166 15:37:13.785991 scan_static_bus for PCI: 00:14.3 done
1167 15:37:13.786072 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1168 15:37:13.786153 PCI: 00:15.0 scanning...
1169 15:37:13.786233 scan_static_bus for PCI: 00:15.0
1170 15:37:13.786313 I2C: 00:1a enabled
1171 15:37:13.786391 I2C: 00:31 enabled
1172 15:37:13.786472 I2C: 00:32 enabled
1173 15:37:13.786552 scan_static_bus for PCI: 00:15.0 done
1174 15:37:13.786631 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1175 15:37:13.786712 PCI: 00:15.1 scanning...
1176 15:37:13.786807 scan_static_bus for PCI: 00:15.1
1177 15:37:13.786895 I2C: 00:50 enabled
1178 15:37:13.786977 scan_static_bus for PCI: 00:15.1 done
1179 15:37:13.787056 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1180 15:37:13.787151 PCI: 00:15.3 scanning...
1181 15:37:13.787260 scan_static_bus for PCI: 00:15.3
1182 15:37:13.787343 I2C: 00:10 enabled
1183 15:37:13.787422 scan_static_bus for PCI: 00:15.3 done
1184 15:37:13.787503 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1185 15:37:13.787584 PCI: 00:19.1 scanning...
1186 15:37:13.787663 scan_static_bus for PCI: 00:19.1
1187 15:37:13.787743 I2C: 00:15 enabled
1188 15:37:13.787824 I2C: 00:2c enabled
1189 15:37:13.787903 scan_static_bus for PCI: 00:19.1 done
1190 15:37:13.787983 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1191 15:37:13.788064 PCI: 00:1e.3 scanning...
1192 15:37:13.788142 scan_generic_bus for PCI: 00:1e.3
1193 15:37:13.788221 SPI: 00 enabled
1194 15:37:13.788303 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1195 15:37:13.788580 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1196 15:37:13.788664 PCI: 00:1f.0 scanning...
1197 15:37:13.788745 scan_static_bus for PCI: 00:1f.0
1198 15:37:13.788824 PNP: 0c09.0 enabled
1199 15:37:13.788904 PNP: 0c09.0 scanning...
1200 15:37:13.788985 scan_static_bus for PNP: 0c09.0
1201 15:37:13.789070 scan_static_bus for PNP: 0c09.0 done
1202 15:37:13.789144 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1203 15:37:13.789221 scan_static_bus for PCI: 00:1f.0 done
1204 15:37:13.789274 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1205 15:37:13.789324 PCI: 00:1f.2 scanning...
1206 15:37:13.789379 scan_static_bus for PCI: 00:1f.2
1207 15:37:13.789447 GENERIC: 0.0 enabled
1208 15:37:13.789527 GENERIC: 0.0 scanning...
1209 15:37:13.789607 scan_static_bus for GENERIC: 0.0
1210 15:37:13.789687 GENERIC: 0.0 enabled
1211 15:37:13.789768 GENERIC: 1.0 enabled
1212 15:37:13.789848 scan_static_bus for GENERIC: 0.0 done
1213 15:37:13.789942 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1214 15:37:13.790035 scan_static_bus for PCI: 00:1f.2 done
1215 15:37:13.790103 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1216 15:37:13.790185 PCI: 00:1f.3 scanning...
1217 15:37:13.790263 scan_static_bus for PCI: 00:1f.3
1218 15:37:13.790324 scan_static_bus for PCI: 00:1f.3 done
1219 15:37:13.790406 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1220 15:37:13.790487 PCI: 00:1f.5 scanning...
1221 15:37:13.790568 scan_generic_bus for PCI: 00:1f.5
1222 15:37:13.790650 scan_generic_bus for PCI: 00:1f.5 done
1223 15:37:13.790731 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1224 15:37:13.790812 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1225 15:37:13.790893 scan_static_bus for Root Device done
1226 15:37:13.790974 scan_bus: bus Root Device finished in 729 msecs
1227 15:37:13.791056 done
1228 15:37:13.791136 BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 1296 ms
1229 15:37:13.791217 Chrome EC: UHEPI supported
1230 15:37:13.791298 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1231 15:37:13.791380 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1232 15:37:13.791461 SPI flash protection: WPSW=0 SRP0=0
1233 15:37:13.791542 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1234 15:37:13.791623 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1235 15:37:13.791703 found VGA at PCI: 00:02.0
1236 15:37:13.791805 Setting up VGA for PCI: 00:02.0
1237 15:37:13.791888 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1238 15:37:13.791969 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1239 15:37:13.792049 Allocating resources...
1240 15:37:13.792130 Reading resources...
1241 15:37:13.792209 Root Device read_resources bus 0 link: 0
1242 15:37:13.792292 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1243 15:37:13.792372 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1244 15:37:13.792468 DOMAIN: 0000 read_resources bus 0 link: 0
1245 15:37:13.792558 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1246 15:37:13.792638 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1247 15:37:13.792720 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1248 15:37:13.792801 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1249 15:37:13.792882 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1250 15:37:13.792963 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1251 15:37:13.793052 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1252 15:37:13.793133 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1253 15:37:13.793214 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1254 15:37:13.793308 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1255 15:37:13.793396 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1256 15:37:13.793479 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1257 15:37:13.793562 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1258 15:37:13.793644 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1259 15:37:13.793723 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1260 15:37:13.793802 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1261 15:37:13.793894 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1262 15:37:13.793974 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1263 15:37:13.794055 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1264 15:37:13.794133 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1265 15:37:13.794208 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1266 15:37:13.794259 PCI: 00:04.0 read_resources bus 1 link: 0
1267 15:37:13.794309 PCI: 00:04.0 read_resources bus 1 link: 0 done
1268 15:37:13.794358 PCI: 00:06.0 read_resources bus 1 link: 0
1269 15:37:13.794414 PCI: 00:06.0 read_resources bus 1 link: 0 done
1270 15:37:13.794465 PCI: 00:0d.0 read_resources bus 0 link: 0
1271 15:37:13.794513 USB0 port 0 read_resources bus 0 link: 0
1272 15:37:13.794563 USB0 port 0 read_resources bus 0 link: 0 done
1273 15:37:13.794616 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1274 15:37:13.794664 PCI: 00:14.0 read_resources bus 0 link: 0
1275 15:37:13.794713 USB0 port 0 read_resources bus 0 link: 0
1276 15:37:13.794764 USB0 port 0 read_resources bus 0 link: 0 done
1277 15:37:13.794814 PCI: 00:14.0 read_resources bus 0 link: 0 done
1278 15:37:13.794863 PCI: 00:14.3 read_resources bus 0 link: 0
1279 15:37:13.794912 PCI: 00:14.3 read_resources bus 0 link: 0 done
1280 15:37:13.794965 PCI: 00:15.0 read_resources bus 0 link: 0
1281 15:37:13.795017 PCI: 00:15.0 read_resources bus 0 link: 0 done
1282 15:37:13.795069 PCI: 00:15.1 read_resources bus 0 link: 0
1283 15:37:13.795125 PCI: 00:15.1 read_resources bus 0 link: 0 done
1284 15:37:13.795372 PCI: 00:15.3 read_resources bus 0 link: 0
1285 15:37:13.795456 PCI: 00:15.3 read_resources bus 0 link: 0 done
1286 15:37:13.795539 PCI: 00:19.1 read_resources bus 0 link: 0
1287 15:37:13.795619 PCI: 00:19.1 read_resources bus 0 link: 0 done
1288 15:37:13.795699 PCI: 00:1e.3 read_resources bus 2 link: 0
1289 15:37:13.795779 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1290 15:37:13.795859 PCI: 00:1f.0 read_resources bus 0 link: 0
1291 15:37:13.795940 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1292 15:37:13.796021 PCI: 00:1f.2 read_resources bus 0 link: 0
1293 15:37:13.796101 GENERIC: 0.0 read_resources bus 0 link: 0
1294 15:37:13.796182 GENERIC: 0.0 read_resources bus 0 link: 0 done
1295 15:37:13.796265 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1296 15:37:13.796345 DOMAIN: 0000 read_resources bus 0 link: 0 done
1297 15:37:13.796425 Root Device read_resources bus 0 link: 0 done
1298 15:37:13.796538 Done reading resources.
1299 15:37:13.796629 Show resources in subtree (Root Device)...After reading.
1300 15:37:13.796711 Root Device child on link 0 CPU_CLUSTER: 0
1301 15:37:13.796792 CPU_CLUSTER: 0 child on link 0 APIC: 00
1302 15:37:13.796872 APIC: 00
1303 15:37:13.796952 APIC: 16
1304 15:37:13.797041 APIC: 10
1305 15:37:13.797123 APIC: 12
1306 15:37:13.797204 APIC: 14
1307 15:37:13.797282 APIC: 09
1308 15:37:13.797356 APIC: 01
1309 15:37:13.797448 APIC: 08
1310 15:37:13.797527 DOMAIN: 0000 child on link 0 GPIO: 0
1311 15:37:13.797603 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1312 15:37:13.797663 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1313 15:37:13.797742 GPIO: 0
1314 15:37:13.797805 PCI: 00:00.0
1315 15:37:13.797861 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1316 15:37:13.797918 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1317 15:37:13.797970 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1318 15:37:13.798020 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1319 15:37:13.798102 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1320 15:37:13.798184 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1321 15:37:13.798265 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1322 15:37:13.798347 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1323 15:37:13.798430 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1324 15:37:13.798522 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1325 15:37:13.798605 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1326 15:37:13.798687 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1327 15:37:13.798771 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1328 15:37:13.798853 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1329 15:37:13.798935 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1330 15:37:13.799017 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1331 15:37:13.799100 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1332 15:37:13.799181 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1333 15:37:13.799263 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1334 15:37:13.799350 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1335 15:37:13.799445 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1336 15:37:13.799527 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1337 15:37:13.799609 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1338 15:37:13.799692 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1339 15:37:13.799774 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1340 15:37:13.799856 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1341 15:37:13.799956 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1342 15:37:13.800041 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1343 15:37:13.800132 PCI: 00:02.0
1344 15:37:13.800222 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1345 15:37:13.800507 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1346 15:37:13.800596 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1347 15:37:13.800678 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1348 15:37:13.800761 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1349 15:37:13.800843 GENERIC: 0.0
1350 15:37:13.800922 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1351 15:37:13.801023 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1352 15:37:13.801117 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1353 15:37:13.801202 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1354 15:37:13.801284 PCI: 01:00.0
1355 15:37:13.801365 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1356 15:37:13.801448 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1357 15:37:13.801529 PCI: 00:08.0
1358 15:37:13.801607 PCI: 00:0a.0
1359 15:37:13.801689 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1360 15:37:13.801770 PCI: 00:0d.0 child on link 0 USB0 port 0
1361 15:37:13.801852 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1362 15:37:13.801933 USB0 port 0 child on link 0 USB3 port 0
1363 15:37:13.802013 USB3 port 0
1364 15:37:13.802092 USB3 port 1
1365 15:37:13.802171 USB3 port 2
1366 15:37:13.802252 USB3 port 3
1367 15:37:13.802330 PCI: 00:14.0 child on link 0 USB0 port 0
1368 15:37:13.802412 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1369 15:37:13.802506 USB0 port 0 child on link 0 USB2 port 0
1370 15:37:13.802584 USB2 port 0
1371 15:37:13.802665 USB2 port 1
1372 15:37:13.802744 USB2 port 2
1373 15:37:13.802823 USB2 port 3
1374 15:37:13.802903 USB2 port 4
1375 15:37:13.802985 USB2 port 5
1376 15:37:13.803062 USB2 port 6
1377 15:37:13.803142 USB2 port 7
1378 15:37:13.803223 USB2 port 8
1379 15:37:13.803302 USB2 port 9
1380 15:37:13.803381 USB3 port 0
1381 15:37:13.803460 USB3 port 1
1382 15:37:13.803539 USB3 port 2
1383 15:37:13.803619 USB3 port 3
1384 15:37:13.803698 PCI: 00:14.2
1385 15:37:13.803779 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1386 15:37:13.803861 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1387 15:37:13.803960 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1388 15:37:13.804044 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1389 15:37:13.804126 GENERIC: 0.0
1390 15:37:13.804205 PCI: 00:15.0 child on link 0 I2C: 00:1a
1391 15:37:13.804270 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1392 15:37:13.804342 I2C: 00:1a
1393 15:37:13.804420 I2C: 00:31
1394 15:37:13.804536 I2C: 00:32
1395 15:37:13.804619 PCI: 00:15.1 child on link 0 I2C: 00:50
1396 15:37:13.804700 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1397 15:37:13.804755 I2C: 00:50
1398 15:37:13.804812 PCI: 00:15.2
1399 15:37:13.804863 PCI: 00:15.3 child on link 0 I2C: 00:10
1400 15:37:13.804913 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1401 15:37:13.804977 I2C: 00:10
1402 15:37:13.805055 PCI: 00:16.0
1403 15:37:13.805137 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1404 15:37:13.805211 PCI: 00:19.0
1405 15:37:13.805294 PCI: 00:19.1 child on link 0 I2C: 00:15
1406 15:37:13.805375 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1407 15:37:13.805444 I2C: 00:15
1408 15:37:13.805501 I2C: 00:2c
1409 15:37:13.805553 PCI: 00:1e.0
1410 15:37:13.805603 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1411 15:37:13.805654 PCI: 00:1e.3 child on link 0 SPI: 00
1412 15:37:13.805738 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1413 15:37:13.805818 SPI: 00
1414 15:37:13.805906 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1415 15:37:13.805988 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1416 15:37:13.806068 PNP: 0c09.0
1417 15:37:13.806149 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1418 15:37:13.806230 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1419 15:37:13.806312 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1420 15:37:13.806401 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1421 15:37:13.806484 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1422 15:37:13.806564 GENERIC: 0.0
1423 15:37:13.806644 GENERIC: 1.0
1424 15:37:13.806739 PCI: 00:1f.3
1425 15:37:13.806825 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1426 15:37:13.806910 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1427 15:37:13.806991 PCI: 00:1f.5
1428 15:37:13.807071 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1429 15:37:13.807352 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1430 15:37:13.807443 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1431 15:37:13.807526 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1432 15:37:13.807607 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1433 15:37:13.807687 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1434 15:37:13.807768 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1435 15:37:13.807849 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1436 15:37:13.807940 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1437 15:37:13.808035 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1438 15:37:13.808114 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1439 15:37:13.808171 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1440 15:37:13.808230 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1441 15:37:13.808310 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1442 15:37:13.808392 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1443 15:37:13.808473 DOMAIN: 0000: Resource ranges:
1444 15:37:13.808552 * Base: 1000, Size: 800, Tag: 100
1445 15:37:13.808655 * Base: 1900, Size: e700, Tag: 100
1446 15:37:13.808738 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1447 15:37:13.808818 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1448 15:37:13.808901 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1449 15:37:13.808982 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1450 15:37:13.809071 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1451 15:37:13.809154 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1452 15:37:13.809236 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1453 15:37:13.809317 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1454 15:37:13.809400 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1455 15:37:13.809481 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1456 15:37:13.809561 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1457 15:37:13.809643 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1458 15:37:13.809724 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1459 15:37:13.809817 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1460 15:37:13.809902 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1461 15:37:13.809983 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1462 15:37:13.810075 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1463 15:37:13.810174 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1464 15:37:13.810257 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1465 15:37:13.810340 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1466 15:37:13.810422 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1467 15:37:13.810504 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1468 15:37:13.810585 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1469 15:37:13.810665 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1470 15:37:13.810747 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1471 15:37:13.810830 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1472 15:37:13.810910 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1473 15:37:13.810991 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1474 15:37:13.811073 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1475 15:37:13.811154 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1476 15:37:13.811235 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1477 15:37:13.811317 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1478 15:37:13.811397 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1479 15:37:13.811477 DOMAIN: 0000: Resource ranges:
1480 15:37:13.811560 * Base: 80400000, Size: 3fc00000, Tag: 200
1481 15:37:13.811640 * Base: d0000000, Size: 28000000, Tag: 200
1482 15:37:13.811721 * Base: fa000000, Size: 1000000, Tag: 200
1483 15:37:13.811802 * Base: fb001000, Size: 17ff000, Tag: 200
1484 15:37:13.811880 * Base: fe800000, Size: 300000, Tag: 200
1485 15:37:13.811972 * Base: feb80000, Size: 80000, Tag: 200
1486 15:37:13.812080 * Base: fed00000, Size: 40000, Tag: 200
1487 15:37:13.812160 * Base: fed70000, Size: 10000, Tag: 200
1488 15:37:13.812242 * Base: fed88000, Size: 8000, Tag: 200
1489 15:37:13.812323 * Base: fed93000, Size: d000, Tag: 200
1490 15:37:13.812592 * Base: feda2000, Size: 1e000, Tag: 200
1491 15:37:13.812677 * Base: fede0000, Size: 1220000, Tag: 200
1492 15:37:13.812760 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1493 15:37:13.812840 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1494 15:37:13.812921 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1495 15:37:13.813003 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1496 15:37:13.813095 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1497 15:37:13.813177 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1498 15:37:13.813259 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1499 15:37:13.813338 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1500 15:37:13.813419 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1501 15:37:13.813502 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1502 15:37:13.813581 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1503 15:37:13.813662 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1504 15:37:13.813744 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1505 15:37:13.813823 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1506 15:37:13.813904 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1507 15:37:13.813987 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1508 15:37:13.814076 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1509 15:37:13.814160 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1510 15:37:13.814247 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1511 15:37:13.814327 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1512 15:37:13.814411 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1513 15:37:13.814494 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1514 15:37:13.814573 PCI: 00:06.0: Resource ranges:
1515 15:37:13.814655 * Base: 80400000, Size: 100000, Tag: 200
1516 15:37:13.814736 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1517 15:37:13.814815 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1518 15:37:13.814898 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1519 15:37:13.814979 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1520 15:37:13.815059 Root Device assign_resources, bus 0 link: 0
1521 15:37:13.815141 DOMAIN: 0000 assign_resources, bus 0 link: 0
1522 15:37:13.815222 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1523 15:37:13.815302 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1524 15:37:13.815385 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1525 15:37:13.815467 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1526 15:37:13.815546 PCI: 00:04.0 assign_resources, bus 1 link: 0
1527 15:37:13.815627 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1528 15:37:13.815708 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1529 15:37:13.815800 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1530 15:37:13.815889 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1531 15:37:13.815986 PCI: 00:06.0 assign_resources, bus 1 link: 0
1532 15:37:13.816097 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1533 15:37:13.816181 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1534 15:37:13.816261 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1535 15:37:13.816343 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1536 15:37:13.816425 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1537 15:37:13.816505 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1538 15:37:13.816586 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1539 15:37:13.816666 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1540 15:37:13.816746 PCI: 00:14.0 assign_resources, bus 0 link: 0
1541 15:37:13.816828 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1542 15:37:13.816909 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1543 15:37:13.816991 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1544 15:37:13.817080 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1545 15:37:13.817161 PCI: 00:14.3 assign_resources, bus 0 link: 0
1546 15:37:13.817242 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1547 15:37:13.817323 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1548 15:37:13.817404 PCI: 00:15.0 assign_resources, bus 0 link: 0
1549 15:37:13.817484 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1550 15:37:13.817565 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1551 15:37:13.817646 PCI: 00:15.1 assign_resources, bus 0 link: 0
1552 15:37:13.817916 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1553 15:37:13.818001 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1554 15:37:13.818083 PCI: 00:15.3 assign_resources, bus 0 link: 0
1555 15:37:13.818162 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1556 15:37:13.818253 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1557 15:37:13.818337 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1558 15:37:13.818417 PCI: 00:19.1 assign_resources, bus 0 link: 0
1559 15:37:13.818505 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1560 15:37:13.818589 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1561 15:37:13.818683 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1562 15:37:13.818770 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1563 15:37:13.818850 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1564 15:37:13.818935 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1565 15:37:13.819028 LPC: Trying to open IO window from 800 size 1ff
1566 15:37:13.819115 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1567 15:37:13.819206 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1568 15:37:13.819290 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1569 15:37:13.819369 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1570 15:37:13.819458 Root Device assign_resources, bus 0 link: 0 done
1571 15:37:13.819541 Done setting resources.
1572 15:37:13.819621 Show resources in subtree (Root Device)...After assigning values.
1573 15:37:13.819711 Root Device child on link 0 CPU_CLUSTER: 0
1574 15:37:13.819793 CPU_CLUSTER: 0 child on link 0 APIC: 00
1575 15:37:13.819874 APIC: 00
1576 15:37:13.819991 APIC: 16
1577 15:37:13.820080 APIC: 10
1578 15:37:13.820169 APIC: 12
1579 15:37:13.820250 APIC: 14
1580 15:37:13.820328 APIC: 09
1581 15:37:13.820415 APIC: 01
1582 15:37:13.820496 APIC: 08
1583 15:37:13.820573 DOMAIN: 0000 child on link 0 GPIO: 0
1584 15:37:13.820663 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1585 15:37:13.820748 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1586 15:37:13.820829 GPIO: 0
1587 15:37:13.820916 PCI: 00:00.0
1588 15:37:13.820998 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1589 15:37:13.821104 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1590 15:37:13.821189 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1591 15:37:13.821271 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1592 15:37:13.821370 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1593 15:37:13.821466 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1594 15:37:13.821550 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1595 15:37:13.821639 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1596 15:37:13.821721 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1597 15:37:13.821811 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1598 15:37:13.821895 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1599 15:37:13.821978 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1600 15:37:13.822067 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1601 15:37:13.822150 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1602 15:37:13.822231 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1603 15:37:13.822337 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1604 15:37:13.822426 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1605 15:37:13.822514 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1606 15:37:13.822610 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1607 15:37:13.822694 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1608 15:37:13.822784 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1609 15:37:13.822867 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1610 15:37:13.822949 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1611 15:37:13.823039 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1612 15:37:13.823316 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1613 15:37:13.823404 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1614 15:37:13.823494 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1615 15:37:13.823566 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1616 15:37:13.823618 PCI: 00:02.0
1617 15:37:13.823668 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1618 15:37:13.823757 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1619 15:37:13.823843 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1620 15:37:13.823936 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1621 15:37:13.824024 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1622 15:37:13.824103 GENERIC: 0.0
1623 15:37:13.824188 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1624 15:37:13.824272 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1625 15:37:13.824355 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1626 15:37:13.824442 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1627 15:37:13.824528 PCI: 01:00.0
1628 15:37:13.824620 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1629 15:37:13.824721 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1630 15:37:13.824804 PCI: 00:08.0
1631 15:37:13.824886 PCI: 00:0a.0
1632 15:37:13.824975 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1633 15:37:13.825067 PCI: 00:0d.0 child on link 0 USB0 port 0
1634 15:37:13.825157 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1635 15:37:13.825241 USB0 port 0 child on link 0 USB3 port 0
1636 15:37:13.825320 USB3 port 0
1637 15:37:13.825422 USB3 port 1
1638 15:37:13.825502 USB3 port 2
1639 15:37:13.825582 USB3 port 3
1640 15:37:13.825668 PCI: 00:14.0 child on link 0 USB0 port 0
1641 15:37:13.825751 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1642 15:37:13.825837 USB0 port 0 child on link 0 USB2 port 0
1643 15:37:13.825929 USB2 port 0
1644 15:37:13.826008 USB2 port 1
1645 15:37:13.826095 USB2 port 2
1646 15:37:13.826179 USB2 port 3
1647 15:37:13.826257 USB2 port 4
1648 15:37:13.826355 USB2 port 5
1649 15:37:13.826442 USB2 port 6
1650 15:37:13.826528 USB2 port 7
1651 15:37:13.826609 USB2 port 8
1652 15:37:13.826688 USB2 port 9
1653 15:37:13.826774 USB3 port 0
1654 15:37:13.826855 USB3 port 1
1655 15:37:13.826933 USB3 port 2
1656 15:37:13.827020 USB3 port 3
1657 15:37:13.827111 PCI: 00:14.2
1658 15:37:13.827191 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1659 15:37:13.827282 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1660 15:37:13.827378 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1661 15:37:13.827465 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1662 15:37:13.827548 GENERIC: 0.0
1663 15:37:13.827638 PCI: 00:15.0 child on link 0 I2C: 00:1a
1664 15:37:13.827728 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1665 15:37:13.827811 I2C: 00:1a
1666 15:37:13.827890 I2C: 00:31
1667 15:37:13.827976 I2C: 00:32
1668 15:37:13.828057 PCI: 00:15.1 child on link 0 I2C: 00:50
1669 15:37:13.828139 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1670 15:37:13.828227 I2C: 00:50
1671 15:37:13.828308 PCI: 00:15.2
1672 15:37:13.828386 PCI: 00:15.3 child on link 0 I2C: 00:10
1673 15:37:13.828476 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1674 15:37:13.828557 I2C: 00:10
1675 15:37:13.828635 PCI: 00:16.0
1676 15:37:13.828724 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1677 15:37:13.828804 PCI: 00:19.0
1678 15:37:13.828887 PCI: 00:19.1 child on link 0 I2C: 00:15
1679 15:37:13.828973 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1680 15:37:13.829063 I2C: 00:15
1681 15:37:13.829150 I2C: 00:2c
1682 15:37:13.829231 PCI: 00:1e.0
1683 15:37:13.829313 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1684 15:37:13.829426 PCI: 00:1e.3 child on link 0 SPI: 00
1685 15:37:13.829512 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1686 15:37:13.829597 SPI: 00
1687 15:37:13.829681 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1688 15:37:13.829763 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1689 15:37:13.829850 PNP: 0c09.0
1690 15:37:13.829933 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1691 15:37:13.830205 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1692 15:37:13.830290 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1693 15:37:13.830385 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1694 15:37:13.830467 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1695 15:37:13.830551 GENERIC: 0.0
1696 15:37:13.830634 GENERIC: 1.0
1697 15:37:13.830713 PCI: 00:1f.3
1698 15:37:13.830800 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1699 15:37:13.830897 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1700 15:37:13.830987 PCI: 00:1f.5
1701 15:37:13.831076 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1702 15:37:13.831159 Done allocating resources.
1703 15:37:13.831239 BS: BS_DEV_RESOURCES run times (exec / console): 2 / 2717 ms
1704 15:37:13.831331 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1705 15:37:13.831429 Configure audio over I2S with MAX98373 NAU88L25B.
1706 15:37:13.831527 Enabling BT offload
1707 15:37:13.831609 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1708 15:37:13.831689 Enabling resources...
1709 15:37:13.831776 PCI: 00:00.0 subsystem <- 8086/4609
1710 15:37:13.831857 PCI: 00:00.0 cmd <- 06
1711 15:37:13.831937 PCI: 00:02.0 subsystem <- 8086/46b3
1712 15:37:13.832024 PCI: 00:02.0 cmd <- 03
1713 15:37:13.832105 PCI: 00:04.0 subsystem <- 8086/461d
1714 15:37:13.832185 PCI: 00:04.0 cmd <- 02
1715 15:37:13.832272 PCI: 00:06.0 bridge ctrl <- 0013
1716 15:37:13.832354 PCI: 00:06.0 subsystem <- 8086/464d
1717 15:37:13.832432 PCI: 00:06.0 cmd <- 106
1718 15:37:13.832519 PCI: 00:0a.0 subsystem <- 8086/467d
1719 15:37:13.832600 PCI: 00:0a.0 cmd <- 02
1720 15:37:13.832691 PCI: 00:0d.0 subsystem <- 8086/461e
1721 15:37:13.832775 PCI: 00:0d.0 cmd <- 02
1722 15:37:13.832856 PCI: 00:14.0 subsystem <- 8086/51ed
1723 15:37:13.832934 PCI: 00:14.0 cmd <- 02
1724 15:37:13.833022 PCI: 00:14.2 subsystem <- 8086/51ef
1725 15:37:13.833104 PCI: 00:14.2 cmd <- 02
1726 15:37:13.833183 PCI: 00:14.3 subsystem <- 8086/51f0
1727 15:37:13.833270 PCI: 00:14.3 cmd <- 02
1728 15:37:13.833355 PCI: 00:15.0 subsystem <- 8086/51e8
1729 15:37:13.833447 PCI: 00:15.0 cmd <- 02
1730 15:37:13.833527 PCI: 00:15.1 subsystem <- 8086/51e9
1731 15:37:13.833606 PCI: 00:15.1 cmd <- 06
1732 15:37:13.833686 PCI: 00:15.3 subsystem <- 8086/51eb
1733 15:37:13.833766 PCI: 00:15.3 cmd <- 02
1734 15:37:13.833843 PCI: 00:16.0 subsystem <- 8086/51e0
1735 15:37:13.833923 PCI: 00:16.0 cmd <- 02
1736 15:37:13.980007 PCI: 00:19.1 subsystem <- 8086/51c6
1737 15:37:13.980148 PCI: 00:19.1 cmd <- 02
1738 15:37:13.980248 PCI: 00:1e.0 subsystem <- 8086/51a8
1739 15:37:13.980342 PCI: 00:1e.0 cmd <- 06
1740 15:37:13.980428 PCI: 00:1e.3 subsystem <- 8086/51ab
1741 15:37:13.980520 PCI: 00:1e.3 cmd <- 02
1742 15:37:13.980604 PCI: 00:1f.0 subsystem <- 8086/5182
1743 15:37:13.980693 PCI: 00:1f.0 cmd <- 407
1744 15:37:13.980776 PCI: 00:1f.3 subsystem <- 8086/51c8
1745 15:37:13.980855 PCI: 00:1f.3 cmd <- 02
1746 15:37:13.980945 PCI: 00:1f.5 subsystem <- 8086/51a4
1747 15:37:13.981037 PCI: 00:1f.5 cmd <- 406
1748 15:37:13.981118 PCI: 01:00.0 cmd <- 02
1749 15:37:13.981217 done.
1750 15:37:13.981315 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1751 15:37:13.981408 ME: Version: Unavailable
1752 15:37:13.981486 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1753 15:37:13.981559 Initializing devices...
1754 15:37:13.981658 Root Device init
1755 15:37:13.981740 mainboard: EC init
1756 15:37:13.981820 Chrome EC: Set SMI mask to 0x0000000000000000
1757 15:37:13.981923 Chrome EC: clear events_b mask to 0x0000000000000000
1758 15:37:13.982008 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1759 15:37:13.982098 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1760 15:37:13.982182 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1761 15:37:13.982264 Chrome EC: Set WAKE mask to 0x0000000000000000
1762 15:37:13.982352 Root Device init finished in 36 msecs
1763 15:37:13.982433 PCI: 00:00.0 init
1764 15:37:13.982524 CPU TDP = 15 Watts
1765 15:37:13.982608 CPU PL1 = 15 Watts
1766 15:37:13.982689 CPU PL2 = 55 Watts
1767 15:37:13.982775 CPU PL4 = 123 Watts
1768 15:37:13.982858 PCI: 00:00.0 init finished in 8 msecs
1769 15:37:13.982940 PCI: 00:02.0 init
1770 15:37:13.983026 GMA: Found VBT in CBFS
1771 15:37:13.983120 GMA: Found valid VBT in CBFS
1772 15:37:13.983210 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1773 15:37:13.983295 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1774 15:37:13.983378 PCI: 00:02.0 init finished in 18 msecs
1775 15:37:13.983467 PCI: 00:06.0 init
1776 15:37:13.983548 Initializing PCH PCIe bridge.
1777 15:37:13.983636 PCI: 00:06.0 init finished in 3 msecs
1778 15:37:13.983719 PCI: 00:0a.0 init
1779 15:37:13.983801 PCI: 00:0a.0 init finished in 0 msecs
1780 15:37:13.983901 PCI: 00:14.0 init
1781 15:37:13.983985 PCI: 00:14.0 init finished in 0 msecs
1782 15:37:13.984066 PCI: 00:14.2 init
1783 15:37:13.984155 PCI: 00:14.2 init finished in 0 msecs
1784 15:37:13.984235 PCI: 00:15.0 init
1785 15:37:13.984317 I2C bus 0 version 0x3230302a
1786 15:37:13.984405 DW I2C bus 0 at 0x80655000 (400 KHz)
1787 15:37:13.984484 PCI: 00:15.0 init finished in 6 msecs
1788 15:37:13.984570 PCI: 00:15.1 init
1789 15:37:13.984653 I2C bus 1 version 0x3230302a
1790 15:37:13.984738 DW I2C bus 1 at 0x80656000 (400 KHz)
1791 15:37:13.984828 PCI: 00:15.1 init finished in 6 msecs
1792 15:37:13.984908 PCI: 00:15.3 init
1793 15:37:13.984989 I2C bus 3 version 0x3230302a
1794 15:37:13.985098 DW I2C bus 3 at 0x80657000 (400 KHz)
1795 15:37:13.985189 PCI: 00:15.3 init finished in 6 msecs
1796 15:37:13.985280 PCI: 00:16.0 init
1797 15:37:13.985374 PCI: 00:16.0 init finished in 0 msecs
1798 15:37:13.985467 PCI: 00:19.1 init
1799 15:37:13.985557 I2C bus 5 version 0x3230302a
1800 15:37:13.985638 DW I2C bus 5 at 0x80659000 (400 KHz)
1801 15:37:13.985725 PCI: 00:19.1 init finished in 6 msecs
1802 15:37:13.985808 PCI: 00:1f.0 init
1803 15:37:13.985891 IOAPIC: Initializing IOAPIC at 0xfec00000
1804 15:37:13.985979 IOAPIC: ID = 0x02
1805 15:37:13.986062 IOAPIC: Dumping registers
1806 15:37:13.986350 reg 0x0000: 0x02000000
1807 15:37:13.986447 reg 0x0001: 0x00770020
1808 15:37:13.986534 reg 0x0002: 0x00000000
1809 15:37:13.986627 IOAPIC: 120 interrupts
1810 15:37:13.986716 IOAPIC: Clearing IOAPIC at 0xfec00000
1811 15:37:13.986802 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1812 15:37:13.986900 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1813 15:37:13.986985 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1814 15:37:13.987070 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1815 15:37:13.987182 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1816 15:37:13.987263 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1817 15:37:13.987361 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1818 15:37:13.987468 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1819 15:37:13.987559 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1820 15:37:13.987649 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1821 15:37:13.987731 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1822 15:37:13.987823 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1823 15:37:13.987908 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1824 15:37:13.987994 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1825 15:37:13.988091 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1826 15:37:13.988179 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1827 15:37:13.988268 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1828 15:37:13.988358 IOAPIC: vector 0x11 value 0x00000000 0x00010000
1829 15:37:13.988443 IOAPIC: vector 0x12 value 0x00000000 0x00010000
1830 15:37:13.988538 IOAPIC: vector 0x13 value 0x00000000 0x00010000
1831 15:37:13.988622 IOAPIC: vector 0x14 value 0x00000000 0x00010000
1832 15:37:13.988715 IOAPIC: vector 0x15 value 0x00000000 0x00010000
1833 15:37:13.988806 IOAPIC: vector 0x16 value 0x00000000 0x00010000
1834 15:37:13.988887 IOAPIC: vector 0x17 value 0x00000000 0x00010000
1835 15:37:13.988987 IOAPIC: vector 0x18 value 0x00000000 0x00010000
1836 15:37:13.989085 IOAPIC: vector 0x19 value 0x00000000 0x00010000
1837 15:37:13.989178 IOAPIC: vector 0x1a value 0x00000000 0x00010000
1838 15:37:13.989273 IOAPIC: vector 0x1b value 0x00000000 0x00010000
1839 15:37:13.989374 IOAPIC: vector 0x1c value 0x00000000 0x00010000
1840 15:37:13.989476 IOAPIC: vector 0x1d value 0x00000000 0x00010000
1841 15:37:13.989564 IOAPIC: vector 0x1e value 0x00000000 0x00010000
1842 15:37:13.989653 IOAPIC: vector 0x1f value 0x00000000 0x00010000
1843 15:37:13.989742 IOAPIC: vector 0x20 value 0x00000000 0x00010000
1844 15:37:13.989825 IOAPIC: vector 0x21 value 0x00000000 0x00010000
1845 15:37:13.989917 IOAPIC: vector 0x22 value 0x00000000 0x00010000
1846 15:37:13.990004 IOAPIC: vector 0x23 value 0x00000000 0x00010000
1847 15:37:13.990087 IOAPIC: vector 0x24 value 0x00000000 0x00010000
1848 15:37:13.990181 IOAPIC: vector 0x25 value 0x00000000 0x00010000
1849 15:37:13.990263 IOAPIC: vector 0x26 value 0x00000000 0x00010000
1850 15:37:13.990351 IOAPIC: vector 0x27 value 0x00000000 0x00010000
1851 15:37:13.990442 IOAPIC: vector 0x28 value 0x00000000 0x00010000
1852 15:37:13.990523 IOAPIC: vector 0x29 value 0x00000000 0x00010000
1853 15:37:13.990617 IOAPIC: vector 0x2a value 0x00000000 0x00010000
1854 15:37:13.990701 IOAPIC: vector 0x2b value 0x00000000 0x00010000
1855 15:37:13.990783 IOAPIC: vector 0x2c value 0x00000000 0x00010000
1856 15:37:13.990877 IOAPIC: vector 0x2d value 0x00000000 0x00010000
1857 15:37:13.990971 IOAPIC: vector 0x2e value 0x00000000 0x00010000
1858 15:37:13.991068 IOAPIC: vector 0x2f value 0x00000000 0x00010000
1859 15:37:13.991159 IOAPIC: vector 0x30 value 0x00000000 0x00010000
1860 15:37:13.991241 IOAPIC: vector 0x31 value 0x00000000 0x00010000
1861 15:37:13.991334 IOAPIC: vector 0x32 value 0x00000000 0x00010000
1862 15:37:13.991419 IOAPIC: vector 0x33 value 0x00000000 0x00010000
1863 15:37:13.991500 IOAPIC: vector 0x34 value 0x00000000 0x00010000
1864 15:37:13.991594 IOAPIC: vector 0x35 value 0x00000000 0x00010000
1865 15:37:13.991678 IOAPIC: vector 0x36 value 0x00000000 0x00010000
1866 15:37:13.991761 IOAPIC: vector 0x37 value 0x00000000 0x00010000
1867 15:37:13.991854 IOAPIC: vector 0x38 value 0x00000000 0x00010000
1868 15:37:13.991937 IOAPIC: vector 0x39 value 0x00000000 0x00010000
1869 15:37:13.992026 IOAPIC: vector 0x3a value 0x00000000 0x00010000
1870 15:37:13.992114 IOAPIC: vector 0x3b value 0x00000000 0x00010000
1871 15:37:13.992197 IOAPIC: vector 0x3c value 0x00000000 0x00010000
1872 15:37:13.992291 IOAPIC: vector 0x3d value 0x00000000 0x00010000
1873 15:37:13.992384 IOAPIC: vector 0x3e value 0x00000000 0x00010000
1874 15:37:13.992466 IOAPIC: vector 0x3f value 0x00000000 0x00010000
1875 15:37:13.992562 IOAPIC: vector 0x40 value 0x00000000 0x00010000
1876 15:37:13.992644 IOAPIC: vector 0x41 value 0x00000000 0x00010000
1877 15:37:13.992729 IOAPIC: vector 0x42 value 0x00000000 0x00010000
1878 15:37:13.992832 IOAPIC: vector 0x43 value 0x00000000 0x00010000
1879 15:37:13.992914 IOAPIC: vector 0x44 value 0x00000000 0x00010000
1880 15:37:13.993003 IOAPIC: vector 0x45 value 0x00000000 0x00010000
1881 15:37:13.993097 IOAPIC: vector 0x46 value 0x00000000 0x00010000
1882 15:37:13.993179 IOAPIC: vector 0x47 value 0x00000000 0x00010000
1883 15:37:13.993274 IOAPIC: vector 0x48 value 0x00000000 0x00010000
1884 15:37:13.993357 IOAPIC: vector 0x49 value 0x00000000 0x00010000
1885 15:37:13.993444 IOAPIC: vector 0x4a value 0x00000000 0x00010000
1886 15:37:13.993535 IOAPIC: vector 0x4b value 0x00000000 0x00010000
1887 15:37:13.993618 IOAPIC: vector 0x4c value 0x00000000 0x00010000
1888 15:37:13.993702 IOAPIC: vector 0x4d value 0x00000000 0x00010000
1889 15:37:13.993792 IOAPIC: vector 0x4e value 0x00000000 0x00010000
1890 15:37:13.993875 IOAPIC: vector 0x4f value 0x00000000 0x00010000
1891 15:37:13.994161 IOAPIC: vector 0x50 value 0x00000000 0x00010000
1892 15:37:13.994257 IOAPIC: vector 0x51 value 0x00000000 0x00010000
1893 15:37:13.994341 IOAPIC: vector 0x52 value 0x00000000 0x00010000
1894 15:37:13.994423 IOAPIC: vector 0x53 value 0x00000000 0x00010000
1895 15:37:13.994518 IOAPIC: vector 0x54 value 0x00000000 0x00010000
1896 15:37:13.994601 IOAPIC: vector 0x55 value 0x00000000 0x00010000
1897 15:37:13.994683 IOAPIC: vector 0x56 value 0x00000000 0x00010000
1898 15:37:13.994777 IOAPIC: vector 0x57 value 0x00000000 0x00010000
1899 15:37:13.994859 IOAPIC: vector 0x58 value 0x00000000 0x00010000
1900 15:37:13.994969 IOAPIC: vector 0x59 value 0x00000000 0x00010000
1901 15:37:13.995056 IOAPIC: vector 0x5a value 0x00000000 0x00010000
1902 15:37:13.995136 IOAPIC: vector 0x5b value 0x00000000 0x00010000
1903 15:37:13.995230 IOAPIC: vector 0x5c value 0x00000000 0x00010000
1904 15:37:13.995314 IOAPIC: vector 0x5d value 0x00000000 0x00010000
1905 15:37:13.995393 IOAPIC: vector 0x5e value 0x00000000 0x00010000
1906 15:37:13.995487 IOAPIC: vector 0x5f value 0x00000000 0x00010000
1907 15:37:13.995573 IOAPIC: vector 0x60 value 0x00000000 0x00010000
1908 15:37:13.995658 IOAPIC: vector 0x61 value 0x00000000 0x00010000
1909 15:37:13.995747 IOAPIC: vector 0x62 value 0x00000000 0x00010000
1910 15:37:13.995830 IOAPIC: vector 0x63 value 0x00000000 0x00010000
1911 15:37:13.995918 IOAPIC: vector 0x64 value 0x00000000 0x00010000
1912 15:37:13.996007 IOAPIC: vector 0x65 value 0x00000000 0x00010000
1913 15:37:13.996088 IOAPIC: vector 0x66 value 0x00000000 0x00010000
1914 15:37:13.996192 IOAPIC: vector 0x67 value 0x00000000 0x00010000
1915 15:37:13.996286 IOAPIC: vector 0x68 value 0x00000000 0x00010000
1916 15:37:13.996371 IOAPIC: vector 0x69 value 0x00000000 0x00010000
1917 15:37:13.996461 IOAPIC: vector 0x6a value 0x00000000 0x00010000
1918 15:37:13.996542 IOAPIC: vector 0x6b value 0x00000000 0x00010000
1919 15:37:13.996626 IOAPIC: vector 0x6c value 0x00000000 0x00010000
1920 15:37:13.996716 IOAPIC: vector 0x6d value 0x00000000 0x00010000
1921 15:37:13.996797 IOAPIC: vector 0x6e value 0x00000000 0x00010000
1922 15:37:13.996885 IOAPIC: vector 0x6f value 0x00000000 0x00010000
1923 15:37:13.996974 IOAPIC: vector 0x70 value 0x00000000 0x00010000
1924 15:37:13.997066 IOAPIC: vector 0x71 value 0x00000000 0x00010000
1925 15:37:13.997161 IOAPIC: vector 0x72 value 0x00000000 0x00010000
1926 15:37:13.997244 IOAPIC: vector 0x73 value 0x00000000 0x00010000
1927 15:37:13.997326 IOAPIC: vector 0x74 value 0x00000000 0x00010000
1928 15:37:13.997419 IOAPIC: vector 0x75 value 0x00000000 0x00010000
1929 15:37:13.997500 IOAPIC: vector 0x76 value 0x00000000 0x00010000
1930 15:37:13.997579 IOAPIC: vector 0x77 value 0x00000000 0x00010000
1931 15:37:13.997663 IOAPIC: Bootstrap Processor Local APIC = 0x00
1932 15:37:13.997742 IOAPIC: vector 0x00 value 0x00000000 0x00000700
1933 15:37:13.997822 PCI: 00:1f.0 init finished in 607 msecs
1934 15:37:13.997900 PCI: 00:1f.2 init
1935 15:37:13.997979 apm_control: Disabling ACPI.
1936 15:37:13.998059 APMC done.
1937 15:37:13.998138 PCI: 00:1f.2 init finished in 8 msecs
1938 15:37:13.998217 PCI: 00:1f.3 init
1939 15:37:13.998296 PCI: 00:1f.3 init finished in 0 msecs
1940 15:37:13.998374 PCI: 01:00.0 init
1941 15:37:13.998459 PCI: 01:00.0 init finished in 0 msecs
1942 15:37:13.998537 PNP: 0c09.0 init
1943 15:37:13.998623 Google Chrome EC uptime: 10.874 seconds
1944 15:37:13.998711 Google Chrome AP resets since EC boot: 0
1945 15:37:13.998792 Google Chrome most recent AP reset causes:
1946 15:37:13.998889 Google Chrome EC reset flags at last EC boot: reset-pin | hard
1947 15:37:13.998988 PNP: 0c09.0 init finished in 19 msecs
1948 15:37:13.999080 GENERIC: 0.0 init
1949 15:37:13.999176 GENERIC: 0.0 init finished in 0 msecs
1950 15:37:13.999257 GENERIC: 1.0 init
1951 15:37:13.999345 GENERIC: 1.0 init finished in 0 msecs
1952 15:37:13.999442 Devices initialized
1953 15:37:13.999523 Show all devs... After init.
1954 15:37:13.999612 Root Device: enabled 1
1955 15:37:13.999700 CPU_CLUSTER: 0: enabled 1
1956 15:37:13.999781 DOMAIN: 0000: enabled 1
1957 15:37:13.999873 GPIO: 0: enabled 1
1958 15:37:13.999955 PCI: 00:00.0: enabled 1
1959 15:37:14.000035 PCI: 00:01.0: enabled 0
1960 15:37:14.000137 PCI: 00:01.1: enabled 0
1961 15:37:14.000220 PCI: 00:02.0: enabled 1
1962 15:37:14.000305 PCI: 00:04.0: enabled 1
1963 15:37:14.000394 PCI: 00:05.0: enabled 0
1964 15:37:14.000475 PCI: 00:06.0: enabled 1
1965 15:37:14.000563 PCI: 00:06.2: enabled 0
1966 15:37:14.000651 PCI: 00:07.0: enabled 0
1967 15:37:14.000732 PCI: 00:07.1: enabled 0
1968 15:37:14.000825 PCI: 00:07.2: enabled 0
1969 15:37:14.000907 PCI: 00:07.3: enabled 0
1970 15:37:14.000987 PCI: 00:08.0: enabled 0
1971 15:37:14.001096 PCI: 00:09.0: enabled 0
1972 15:37:14.001178 PCI: 00:0a.0: enabled 1
1973 15:37:14.001263 PCI: 00:0d.0: enabled 1
1974 15:37:14.001357 PCI: 00:0d.1: enabled 0
1975 15:37:14.001450 PCI: 00:0d.2: enabled 0
1976 15:37:14.001541 PCI: 00:0d.3: enabled 0
1977 15:37:14.001626 PCI: 00:0e.0: enabled 0
1978 15:37:14.001707 PCI: 00:10.0: enabled 0
1979 15:37:14.001799 PCI: 00:10.1: enabled 0
1980 15:37:14.001882 PCI: 00:10.6: enabled 0
1981 15:37:14.001962 PCI: 00:10.7: enabled 0
1982 15:37:14.002055 PCI: 00:12.0: enabled 0
1983 15:37:14.002138 PCI: 00:12.6: enabled 0
1984 15:37:14.002224 PCI: 00:12.7: enabled 0
1985 15:37:14.002323 PCI: 00:13.0: enabled 0
1986 15:37:14.002404 PCI: 00:14.0: enabled 1
1987 15:37:14.002495 PCI: 00:14.1: enabled 0
1988 15:37:14.002579 PCI: 00:14.2: enabled 1
1989 15:37:14.002660 PCI: 00:14.3: enabled 1
1990 15:37:14.002752 PCI: 00:15.0: enabled 1
1991 15:37:14.002835 PCI: 00:15.1: enabled 1
1992 15:37:14.002915 PCI: 00:15.2: enabled 0
1993 15:37:14.003008 PCI: 00:15.3: enabled 1
1994 15:37:14.003090 PCI: 00:16.0: enabled 1
1995 15:37:14.003170 PCI: 00:16.1: enabled 0
1996 15:37:14.003262 PCI: 00:16.2: enabled 0
1997 15:37:14.003347 PCI: 00:16.3: enabled 0
1998 15:37:14.003442 PCI: 00:16.4: enabled 0
1999 15:37:14.003543 PCI: 00:16.5: enabled 0
2000 15:37:14.003625 PCI: 00:17.0: enabled 0
2001 15:37:14.003709 PCI: 00:19.0: enabled 0
2002 15:37:14.003797 PCI: 00:19.1: enabled 1
2003 15:37:14.003876 PCI: 00:19.2: enabled 0
2004 15:37:14.003962 PCI: 00:1a.0: enabled 0
2005 15:37:14.004050 PCI: 00:1c.0: enabled 0
2006 15:37:14.004141 PCI: 00:1c.1: enabled 0
2007 15:37:14.004234 PCI: 00:1c.2: enabled 0
2008 15:37:14.004317 PCI: 00:1c.3: enabled 0
2009 15:37:14.004395 PCI: 00:1c.4: enabled 0
2010 15:37:14.004684 PCI: 00:1c.5: enabled 0
2011 15:37:14.004776 PCI: 00:1c.6: enabled 0
2012 15:37:14.004857 PCI: 00:1c.7: enabled 0
2013 15:37:14.004950 PCI: 00:1d.0: enabled 0
2014 15:37:14.005046 PCI: 00:1d.1: enabled 0
2015 15:37:14.005127 PCI: 00:1d.2: enabled 0
2016 15:37:14.005220 PCI: 00:1d.3: enabled 0
2017 15:37:14.005313 PCI: 00:1e.0: enabled 1
2018 15:37:14.005420 PCI: 00:1e.1: enabled 0
2019 15:37:14.005519 PCI: 00:1e.2: enabled 0
2020 15:37:14.005600 PCI: 00:1e.3: enabled 1
2021 15:37:14.005693 PCI: 00:1f.0: enabled 1
2022 15:37:14.005776 PCI: 00:1f.1: enabled 0
2023 15:37:14.005857 PCI: 00:1f.2: enabled 1
2024 15:37:14.005952 PCI: 00:1f.3: enabled 1
2025 15:37:14.006033 PCI: 00:1f.4: enabled 0
2026 15:37:14.006119 PCI: 00:1f.5: enabled 1
2027 15:37:14.006208 PCI: 00:1f.6: enabled 0
2028 15:37:14.006289 PCI: 00:1f.7: enabled 0
2029 15:37:14.006376 GENERIC: 0.0: enabled 1
2030 15:37:14.006464 GENERIC: 0.0: enabled 1
2031 15:37:14.006544 GENERIC: 1.0: enabled 1
2032 15:37:14.006636 GENERIC: 0.0: enabled 1
2033 15:37:14.006718 GENERIC: 1.0: enabled 1
2034 15:37:14.006799 USB0 port 0: enabled 1
2035 15:37:14.006893 USB0 port 0: enabled 1
2036 15:37:14.006975 GENERIC: 0.0: enabled 1
2037 15:37:14.007058 I2C: 00:1a: enabled 1
2038 15:37:14.007151 I2C: 00:31: enabled 1
2039 15:37:14.007240 I2C: 00:32: enabled 1
2040 15:37:14.007329 I2C: 00:50: enabled 1
2041 15:37:14.007424 I2C: 00:10: enabled 1
2042 15:37:14.007505 I2C: 00:15: enabled 1
2043 15:37:14.007597 I2C: 00:2c: enabled 1
2044 15:37:14.007681 GENERIC: 0.0: enabled 1
2045 15:37:14.007764 SPI: 00: enabled 1
2046 15:37:14.007860 PNP: 0c09.0: enabled 1
2047 15:37:14.007942 GENERIC: 0.0: enabled 1
2048 15:37:14.008027 USB3 port 0: enabled 1
2049 15:37:14.008115 USB3 port 1: enabled 0
2050 15:37:14.008196 USB3 port 2: enabled 1
2051 15:37:14.008282 USB3 port 3: enabled 0
2052 15:37:14.008370 USB2 port 0: enabled 1
2053 15:37:14.008452 USB2 port 1: enabled 0
2054 15:37:14.008554 USB2 port 2: enabled 1
2055 15:37:14.008637 USB2 port 3: enabled 0
2056 15:37:14.008716 USB2 port 4: enabled 0
2057 15:37:14.008821 USB2 port 5: enabled 1
2058 15:37:14.008905 USB2 port 6: enabled 0
2059 15:37:14.008992 USB2 port 7: enabled 0
2060 15:37:14.009115 USB2 port 8: enabled 1
2061 15:37:14.009197 USB2 port 9: enabled 1
2062 15:37:14.009276 USB3 port 0: enabled 1
2063 15:37:14.009358 USB3 port 1: enabled 0
2064 15:37:14.009444 USB3 port 2: enabled 0
2065 15:37:14.009522 USB3 port 3: enabled 0
2066 15:37:14.009603 GENERIC: 0.0: enabled 1
2067 15:37:14.009684 GENERIC: 1.0: enabled 1
2068 15:37:14.009771 APIC: 00: enabled 1
2069 15:37:14.009852 APIC: 16: enabled 1
2070 15:37:14.009930 APIC: 10: enabled 1
2071 15:37:14.010017 APIC: 12: enabled 1
2072 15:37:14.010096 APIC: 14: enabled 1
2073 15:37:14.010184 APIC: 09: enabled 1
2074 15:37:14.010265 APIC: 01: enabled 1
2075 15:37:14.010347 APIC: 08: enabled 1
2076 15:37:14.010434 PCI: 01:00.0: enabled 1
2077 15:37:14.010517 BS: BS_DEV_INIT run times (exec / console): 11 / 1127 ms
2078 15:37:14.010602 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2079 15:37:14.010691 ELOG: NV offset 0xf20000 size 0x4000
2080 15:37:14.010774 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2081 15:37:14.010860 ELOG: Event(17) added with size 13 at 2024-06-03 15:37:12 UTC
2082 15:37:14.010945 ELOG: Event(92) added with size 9 at 2024-06-03 15:37:12 UTC
2083 15:37:14.011027 ELOG: Event(93) added with size 9 at 2024-06-03 15:37:12 UTC
2084 15:37:14.011116 ELOG: Event(9E) added with size 10 at 2024-06-03 15:37:12 UTC
2085 15:37:14.011198 ELOG: Event(9F) added with size 14 at 2024-06-03 15:37:12 UTC
2086 15:37:14.011280 BS: BS_DEV_INIT exit times (exec / console): 4 / 45 ms
2087 15:37:14.011382 ELOG: Event(A1) added with size 10 at 2024-06-03 15:37:12 UTC
2088 15:37:14.011476 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
2089 15:37:14.011566 ELOG: Event(A0) added with size 9 at 2024-06-03 15:37:12 UTC
2090 15:37:14.011649 elog_add_boot_reason: Logged dev mode boot
2091 15:37:14.011731 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
2092 15:37:14.011811 Finalize devices...
2093 15:37:14.011892 PCI: 00:16.0 final
2094 15:37:14.011972 PCI: 00:1f.2 final
2095 15:37:14.012051 GENERIC: 0.0 final
2096 15:37:14.012141 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2097 15:37:14.012232 GENERIC: 1.0 final
2098 15:37:14.012312 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2099 15:37:14.012392 Devices finalized
2100 15:37:14.012472 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2101 15:37:14.012553 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2102 15:37:14.012635 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2103 15:37:14.012724 ME: HFSTS1 : 0x80030045
2104 15:37:14.012806 ME: HFSTS2 : 0x30280116
2105 15:37:14.012888 ME: HFSTS3 : 0x00000050
2106 15:37:14.012977 ME: HFSTS4 : 0x00004000
2107 15:37:14.013069 ME: HFSTS5 : 0x00000000
2108 15:37:14.013157 ME: HFSTS6 : 0x40400006
2109 15:37:14.013240 ME: Manufacturing Mode : YES
2110 15:37:14.013330 ME: SPI Protection Mode Enabled : YES
2111 15:37:14.013427 ME: FPFs Committed : YES
2112 15:37:14.013509 ME: Manufacturing Vars Locked : NO
2113 15:37:14.013591 ME: FW Partition Table : OK
2114 15:37:14.013670 ME: Bringup Loader Failure : NO
2115 15:37:14.013750 ME: Firmware Init Complete : NO
2116 15:37:14.013831 ME: Boot Options Present : NO
2117 15:37:14.013909 ME: Update In Progress : NO
2118 15:37:14.013989 ME: D0i3 Support : YES
2119 15:37:14.014069 ME: Low Power State Enabled : NO
2120 15:37:14.014148 ME: CPU Replaced : YES
2121 15:37:14.014228 ME: CPU Replacement Valid : YES
2122 15:37:14.014310 ME: Current Working State : 5
2123 15:37:14.014390 ME: Current Operation State : 1
2124 15:37:14.014473 ME: Current Operation Mode : 3
2125 15:37:14.014554 ME: Error Code : 0
2126 15:37:14.014634 ME: Enhanced Debug Mode : NO
2127 15:37:14.014714 ME: CPU Debug Disabled : YES
2128 15:37:14.014795 ME: TXT Support : NO
2129 15:37:14.014875 ME: WP for RO is enabled : YES
2130 15:37:14.014956 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2131 15:37:14.015038 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2132 15:37:14.015325 ELOG: Event(91) added with size 10 at 2024-06-03 15:37:12 UTC
2133 15:37:14.015421 Chrome EC: clear events_b mask to 0x0000000020004000
2134 15:37:14.015503 Ramoops buffer: 0x100000@0x7689a000.
2135 15:37:14.015584 BS: BS_WRITE_TABLES entry times (exec / console): 1 / 15 ms
2136 15:37:14.015666 CBFS: Found 'fallback/dsdt.aml' @0x788c0 size 0x4fd1 in mcache @0x76add1e8
2137 15:37:14.015748 CBFS: 'fallback/slic' not found.
2138 15:37:14.015827 ACPI: Writing ACPI tables at 7686e000.
2139 15:37:14.015921 ACPI: * FACS
2140 15:37:14.016005 ACPI: * DSDT
2141 15:37:14.016087 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2142 15:37:14.016172 ACPI: * FADT
2143 15:37:14.016253 SCI is IRQ9
2144 15:37:14.016331 ACPI: added table 1/32, length now 40
2145 15:37:14.016411 ACPI: * SSDT
2146 15:37:14.016490 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2147 15:37:14.016586 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2148 15:37:14.016669 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2149 15:37:14.016748 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2150 15:37:14.016830 CBFS: Found 'wifi_sar_0.hex' @0x3b1c40 size 0xe6 in mcache @0x76addf40
2151 15:37:14.016909 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2152 15:37:14.017002 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2153 15:37:14.017092 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2154 15:37:14.017177 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2155 15:37:14.017258 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2156 15:37:14.017342 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2157 15:37:14.017433 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2158 15:37:14.017512 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2159 15:37:14.017594 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2160 15:37:14.017673 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2161 15:37:14.017755 PS2K: Passing 80 keymaps to kernel
2162 15:37:14.017836 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2163 15:37:14.017918 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2164 15:37:14.018000 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2165 15:37:14.018080 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2166 15:37:14.018162 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2167 15:37:14.018244 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2168 15:37:14.018324 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2169 15:37:14.018406 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2170 15:37:14.018487 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2171 15:37:14.018569 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2172 15:37:14.018651 ACPI: added table 2/32, length now 44
2173 15:37:14.018732 ACPI: * MCFG
2174 15:37:14.018823 ACPI: added table 3/32, length now 48
2175 15:37:14.018907 ACPI: * TPM2
2176 15:37:14.018987 TPM2 log created at 0x7685e000
2177 15:37:14.019069 ACPI: added table 4/32, length now 52
2178 15:37:14.019149 ACPI: * LPIT
2179 15:37:14.019230 ACPI: added table 5/32, length now 56
2180 15:37:14.019309 ACPI: * MADT
2181 15:37:14.019398 SCI is IRQ9
2182 15:37:14.019480 ACPI: added table 6/32, length now 60
2183 15:37:14.019560 cmd_reg from pmc_make_ipc_cmd 1052838
2184 15:37:14.019641 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2185 15:37:14.019723 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2186 15:37:14.019806 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2187 15:37:14.019887 PMC CrashLog size in discovery mode: 0xC00
2188 15:37:14.019967 cpu crashlog bar addr: 0x80640000
2189 15:37:14.020048 cpu discovery table offset: 0x6030
2190 15:37:14.020128 cpu_crashlog_discovery_table buffer count: 0x3
2191 15:37:14.020211 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2192 15:37:14.020294 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2193 15:37:14.020374 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2194 15:37:14.020456 PMC crashLog size in discovery mode : 0xC00
2195 15:37:14.020538 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2196 15:37:14.020618 discover mode PMC crashlog size adjusted to: 0x200
2197 15:37:14.020700 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2198 15:37:14.020781 discover mode PMC crashlog size adjusted to: 0x0
2199 15:37:14.020859 m_cpu_crashLog_size : 0x3480 bytes
2200 15:37:14.020940 CPU crashLog present.
2201 15:37:14.021029 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2202 15:37:14.021111 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2203 15:37:14.021192 current = 76877550
2204 15:37:14.021273 ACPI: * DMAR
2205 15:37:14.021358 ACPI: added table 7/32, length now 64
2206 15:37:14.021445 ACPI: added table 8/32, length now 68
2207 15:37:14.021523 ACPI: * HPET
2208 15:37:14.021604 ACPI: added table 9/32, length now 72
2209 15:37:14.021708 ACPI: done.
2210 15:37:14.021801 ACPI tables: 38528 bytes.
2211 15:37:14.021881 smbios_write_tables: 76858000
2212 15:37:14.021962 EC returned error result code 3
2213 15:37:14.022042 Couldn't obtain OEM name from CBI
2214 15:37:14.022122 Create SMBIOS type 16
2215 15:37:14.022203 Create SMBIOS type 17
2216 15:37:14.022284 Create SMBIOS type 20
2217 15:37:14.022364 GENERIC: 0.0 (WIFI Device)
2218 15:37:14.022445 SMBIOS tables: 2156 bytes.
2219 15:37:14.022526 Writing table forward entry at 0x00000500
2220 15:37:14.022607 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 6955
2221 15:37:14.022687 Writing coreboot table at 0x76892000
2222 15:37:14.022768 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2223 15:37:14.022858 1. 0000000000001000-000000000009ffff: RAM
2224 15:37:14.023134 2. 00000000000a0000-00000000000fffff: RESERVED
2225 15:37:14.023219 3. 0000000000100000-0000000076857fff: RAM
2226 15:37:14.023299 4. 0000000076858000-0000000076a2ffff: CONFIGURATION TABLES
2227 15:37:14.023397 5. 0000000076a30000-0000000076ab8fff: RAMSTAGE
2228 15:37:14.023480 6. 0000000076ab9000-0000000076ffffff: CONFIGURATION TABLES
2229 15:37:14.023561 7. 0000000077000000-00000000803fffff: RESERVED
2230 15:37:14.023644 8. 00000000c0000000-00000000cfffffff: RESERVED
2231 15:37:14.023726 9. 00000000f8000000-00000000f9ffffff: RESERVED
2232 15:37:14.023805 10. 00000000fb000000-00000000fb000fff: RESERVED
2233 15:37:14.023889 11. 00000000fc800000-00000000fe7fffff: RESERVED
2234 15:37:14.023972 12. 00000000feb00000-00000000feb7ffff: RESERVED
2235 15:37:14.024055 13. 00000000fec00000-00000000fecfffff: RESERVED
2236 15:37:14.024137 14. 00000000fed40000-00000000fed6ffff: RESERVED
2237 15:37:14.024221 15. 00000000fed80000-00000000fed87fff: RESERVED
2238 15:37:14.024302 16. 00000000fed90000-00000000fed92fff: RESERVED
2239 15:37:14.024385 17. 00000000feda0000-00000000feda1fff: RESERVED
2240 15:37:14.024469 18. 00000000fedc0000-00000000feddffff: RESERVED
2241 15:37:14.024551 19. 0000000100000000-000000027fbfffff: RAM
2242 15:37:14.024642 Passing 4 GPIOs to payload:
2243 15:37:14.024726 NAME | PORT | POLARITY | VALUE
2244 15:37:14.024805 lid | undefined | high | high
2245 15:37:14.024902 power | undefined | high | low
2246 15:37:14.024990 oprom | undefined | high | low
2247 15:37:14.025090 EC in RW | 0x00000151 | high | low
2248 15:37:14.025172 Board ID: 3
2249 15:37:14.025252 FW config: 0x131
2250 15:37:14.025345 Wrote coreboot table at: 0x76892000, 0x6cc bytes, checksum dada
2251 15:37:14.025443 coreboot table: 1764 bytes.
2252 15:37:14.025542 IMD ROOT 0. 0x76fff000 0x00001000
2253 15:37:14.025634 IMD SMALL 1. 0x76ffe000 0x00001000
2254 15:37:14.025714 FSP MEMORY 2. 0x76afe000 0x00500000
2255 15:37:14.025803 CONSOLE 3. 0x76ade000 0x00020000
2256 15:37:14.025893 RO MCACHE 4. 0x76add000 0x00000fd8
2257 15:37:14.025979 FMAP 5. 0x76adc000 0x0000064a
2258 15:37:14.026062 TIME STAMP 6. 0x76adb000 0x00000910
2259 15:37:14.026142 VBOOT WORK 7. 0x76ac7000 0x00014000
2260 15:37:14.026223 MEM INFO 8. 0x76ac6000 0x000003b8
2261 15:37:14.026310 ROMSTG STCK 9. 0x76ac5000 0x00001000
2262 15:37:14.026393 AFTER CAR 10. 0x76ab9000 0x0000c000
2263 15:37:14.026476 RAMSTAGE 11. 0x76a2f000 0x0008a000
2264 15:37:14.026564 ACPI BERT 12. 0x76a1f000 0x00010000
2265 15:37:14.026644 CHROMEOS NVS13. 0x76a1e000 0x00000f00
2266 15:37:14.026724 REFCODE 14. 0x769af000 0x0006f000
2267 15:37:14.026811 SMM BACKUP 15. 0x7699f000 0x00010000
2268 15:37:14.026893 IGD OPREGION16. 0x7699a000 0x00004203
2269 15:37:14.026973 RAMOOPS 17. 0x7689a000 0x00100000
2270 15:37:14.027060 COREBOOT 18. 0x76892000 0x00008000
2271 15:37:14.027142 ACPI 19. 0x7686e000 0x00024000
2272 15:37:14.027220 TPM2 TCGLOG20. 0x7685e000 0x00010000
2273 15:37:14.027318 PMC CRASHLOG21. 0x7685d000 0x00000c00
2274 15:37:14.027414 CPU CRASHLOG22. 0x76859000 0x00003480
2275 15:37:14.027492 SMBIOS 23. 0x76858000 0x00001000
2276 15:37:14.027581 IMD small region:
2277 15:37:14.027663 IMD ROOT 0. 0x76ffec00 0x00000400
2278 15:37:14.027744 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2279 15:37:14.027834 VPD 2. 0x76ffeb60 0x0000006c
2280 15:37:14.027916 POWER STATE 3. 0x76ffeb00 0x00000044
2281 15:37:14.027994 ROMSTAGE 4. 0x76ffeae0 0x00000004
2282 15:37:14.028075 ACPI GNVS 5. 0x76ffea80 0x00000048
2283 15:37:14.028152 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2284 15:37:14.028232 BS: BS_WRITE_TABLES run times (exec / console): 7 / 624 ms
2285 15:37:14.028311 MTRR: Physical address space:
2286 15:37:14.028396 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2287 15:37:14.028479 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2288 15:37:14.028579 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2289 15:37:14.028663 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2290 15:37:14.028747 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2291 15:37:14.028837 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2292 15:37:14.028921 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2293 15:37:14.029019 MTRR: Fixed MSR 0x250 0x0606060606060606
2294 15:37:14.029099 MTRR: Fixed MSR 0x258 0x0606060606060606
2295 15:37:14.029179 MTRR: Fixed MSR 0x259 0x0000000000000000
2296 15:37:14.029269 MTRR: Fixed MSR 0x268 0x0606060606060606
2297 15:37:14.029354 MTRR: Fixed MSR 0x269 0x0606060606060606
2298 15:37:14.029443 MTRR: Fixed MSR 0x26a 0x0606060606060606
2299 15:37:14.029531 MTRR: Fixed MSR 0x26b 0x0606060606060606
2300 15:37:14.029610 MTRR: Fixed MSR 0x26c 0x0606060606060606
2301 15:37:14.029698 MTRR: Fixed MSR 0x26d 0x0606060606060606
2302 15:37:14.029782 MTRR: Fixed MSR 0x26e 0x0606060606060606
2303 15:37:14.029867 MTRR: Fixed MSR 0x26f 0x0606060606060606
2304 15:37:14.029946 call enable_fixed_mtrr()
2305 15:37:14.030026 CPU physical address size: 39 bits
2306 15:37:14.030112 MTRR: default type WB/UC MTRR counts: 6/6.
2307 15:37:14.030193 MTRR: UC selected as default type.
2308 15:37:14.030275 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2309 15:37:14.030356 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2310 15:37:14.030445 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2311 15:37:14.030525 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2312 15:37:14.030605 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2313 15:37:14.030685 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2314 15:37:14.030763 MTRR: Fixed MSR 0x250 0x0606060606060606
2315 15:37:14.031037 MTRR: Fixed MSR 0x258 0x0606060606060606
2316 15:37:14.031120 MTRR: Fixed MSR 0x259 0x0000000000000000
2317 15:37:14.031201 MTRR: Fixed MSR 0x268 0x0606060606060606
2318 15:37:14.031279 MTRR: Fixed MSR 0x269 0x0606060606060606
2319 15:37:14.031381 MTRR: Fixed MSR 0x26a 0x0606060606060606
2320 15:37:14.031487 MTRR: Fixed MSR 0x26b 0x0606060606060606
2321 15:37:14.031577 MTRR: Fixed MSR 0x26c 0x0606060606060606
2322 15:37:14.031657 MTRR: Fixed MSR 0x26d 0x0606060606060606
2323 15:37:14.031736 MTRR: Fixed MSR 0x26e 0x0606060606060606
2324 15:37:14.031818 MTRR: Fixed MSR 0x26f 0x0606060606060606
2325 15:37:14.031898 MTRR: Fixed MSR 0x250 0x0606060606060606
2326 15:37:14.031986 call enable_fixed_mtrr()
2327 15:37:14.032065 MTRR: Fixed MSR 0x258 0x0606060606060606
2328 15:37:14.032143 MTRR: Fixed MSR 0x259 0x0000000000000000
2329 15:37:14.032233 MTRR: Fixed MSR 0x268 0x0606060606060606
2330 15:37:14.032312 MTRR: Fixed MSR 0x269 0x0606060606060606
2331 15:37:14.032393 MTRR: Fixed MSR 0x26a 0x0606060606060606
2332 15:37:14.032479 MTRR: Fixed MSR 0x26b 0x0606060606060606
2333 15:37:14.032561 MTRR: Fixed MSR 0x26c 0x0606060606060606
2334 15:37:14.032639 MTRR: Fixed MSR 0x26d 0x0606060606060606
2335 15:37:14.032728 MTRR: Fixed MSR 0x26e 0x0606060606060606
2336 15:37:14.032809 MTRR: Fixed MSR 0x26f 0x0606060606060606
2337 15:37:14.032891 MTRR: Fixed MSR 0x250 0x0606060606060606
2338 15:37:14.032975 call enable_fixed_mtrr()
2339 15:37:14.033063 MTRR: Fixed MSR 0x258 0x0606060606060606
2340 15:37:14.033151 MTRR: Fixed MSR 0x259 0x0000000000000000
2341 15:37:14.033233 MTRR: Fixed MSR 0x268 0x0606060606060606
2342 15:37:14.033312 MTRR: Fixed MSR 0x269 0x0606060606060606
2343 15:37:14.033420 CPU physical address size: 39 bits
2344 15:37:14.033501 MTRR: Fixed MSR 0x250 0x0606060606060606
2345 15:37:14.033580 MTRR: Fixed MSR 0x26a 0x0606060606060606
2346 15:37:14.033669 MTRR: Fixed MSR 0x258 0x0606060606060606
2347 15:37:14.033749 MTRR: Fixed MSR 0x259 0x0000000000000000
2348 15:37:14.033827 MTRR: Fixed MSR 0x268 0x0606060606060606
2349 15:37:14.033925 MTRR: Fixed MSR 0x269 0x0606060606060606
2350 15:37:14.034006 MTRR: Fixed MSR 0x250 0x0606060606060606
2351 15:37:14.034084 MTRR: Fixed MSR 0x258 0x0606060606060606
2352 15:37:14.034172 MTRR: Fixed MSR 0x259 0x0000000000000000
2353 15:37:14.034253 MTRR: Fixed MSR 0x268 0x0606060606060606
2354 15:37:14.034331 MTRR: Fixed MSR 0x269 0x0606060606060606
2355 15:37:14.034419 MTRR: Fixed MSR 0x26b 0x0606060606060606
2356 15:37:14.034500 MTRR: Fixed MSR 0x26c 0x0606060606060606
2357 15:37:14.034578 MTRR: Fixed MSR 0x26d 0x0606060606060606
2358 15:37:14.034666 MTRR: Fixed MSR 0x26e 0x0606060606060606
2359 15:37:14.034747 MTRR: Fixed MSR 0x26f 0x0606060606060606
2360 15:37:14.034825 MTRR: Fixed MSR 0x26a 0x0606060606060606
2361 15:37:14.034914 MTRR: Fixed MSR 0x26a 0x0606060606060606
2362 15:37:14.034994 call enable_fixed_mtrr()
2363 15:37:14.035072 MTRR: Fixed MSR 0x26b 0x0606060606060606
2364 15:37:14.035161 MTRR: Fixed MSR 0x26c 0x0606060606060606
2365 15:37:14.035242 MTRR: Fixed MSR 0x26d 0x0606060606060606
2366 15:37:14.035320 MTRR: Fixed MSR 0x26e 0x0606060606060606
2367 15:37:14.035408 MTRR: Fixed MSR 0x26f 0x0606060606060606
2368 15:37:14.035488 CPU physical address size: 39 bits
2369 15:37:14.035570 CPU physical address size: 39 bits
2370 15:37:14.035659 call enable_fixed_mtrr()
2371 15:37:14.035743 MTRR: Fixed MSR 0x26b 0x0606060606060606
2372 15:37:14.035823 MTRR: Fixed MSR 0x26c 0x0606060606060606
2373 15:37:14.035921 MTRR: Fixed MSR 0x26d 0x0606060606060606
2374 15:37:14.036001 MTRR: Fixed MSR 0x26e 0x0606060606060606
2375 15:37:14.036083 MTRR: Fixed MSR 0x26f 0x0606060606060606
2376 15:37:14.036169 CPU physical address size: 39 bits
2377 15:37:14.036248 call enable_fixed_mtrr()
2378 15:37:14.036331 MTRR: Fixed MSR 0x250 0x0606060606060606
2379 15:37:14.036416 CPU physical address size: 39 bits
2380 15:37:14.036495 MTRR: Fixed MSR 0x250 0x0606060606060606
2381 15:37:14.036578 MTRR: Fixed MSR 0x258 0x0606060606060606
2382 15:37:14.036662 MTRR: Fixed MSR 0x258 0x0606060606060606
2383 15:37:14.036741 MTRR: Fixed MSR 0x259 0x0000000000000000
2384 15:37:14.036827 MTRR: Fixed MSR 0x268 0x0606060606060606
2385 15:37:14.036910 MTRR: Fixed MSR 0x269 0x0606060606060606
2386 15:37:14.036989 MTRR: Fixed MSR 0x26a 0x0606060606060606
2387 15:37:14.037091 MTRR: Fixed MSR 0x26b 0x0606060606060606
2388 15:37:14.037173 MTRR: Fixed MSR 0x26c 0x0606060606060606
2389 15:37:14.037252 MTRR: Fixed MSR 0x26d 0x0606060606060606
2390 15:37:14.037341 MTRR: Fixed MSR 0x26e 0x0606060606060606
2391 15:37:14.037422 MTRR: Fixed MSR 0x26f 0x0606060606060606
2392 15:37:14.037500 MTRR: Fixed MSR 0x259 0x0000000000000000
2393 15:37:14.037591 call enable_fixed_mtrr()
2394 15:37:14.037680 MTRR: Fixed MSR 0x268 0x0606060606060606
2395 15:37:14.037759 MTRR: Fixed MSR 0x269 0x0606060606060606
2396 15:37:14.037847 CPU physical address size: 39 bits
2397 15:37:14.037928 MTRR: Fixed MSR 0x26a 0x0606060606060606
2398 15:37:14.038019 MTRR: Fixed MSR 0x26b 0x0606060606060606
2399 15:37:14.038106 MTRR: Fixed MSR 0x26c 0x0606060606060606
2400 15:37:14.038187 MTRR: Fixed MSR 0x26d 0x0606060606060606
2401 15:37:14.038273 MTRR: Fixed MSR 0x26e 0x0606060606060606
2402 15:37:14.038354 MTRR: Fixed MSR 0x26f 0x0606060606060606
2403 15:37:14.038433 call enable_fixed_mtrr()
2404 15:37:14.038520 CPU physical address size: 39 bits
2405 15:37:14.038600
2406 15:37:14.038678 MTRR check
2407 15:37:14.038767 Fixed MTRRs : Enabled
2408 15:37:14.038848 Variable MTRRs: Enabled
2409 15:37:14.038925
2410 15:37:14.039013 BS: BS_WRITE_TABLES exit times (exec / console): 253 / 150 ms
2411 15:37:14.039095 CBFS: Found 'fallback/payload' @0x3b1d80 size 0x25902 in mcache @0x76addf68
2412 15:37:14.039175 Checking segment from ROM address 0xffc26dac
2413 15:37:14.039272 Checking segment from ROM address 0xffc26dc8
2414 15:37:14.039353 Loading segment from ROM address 0xffc26dac
2415 15:37:14.039439 code (compression=1)
2416 15:37:14.039522 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xffc26de4 filesize 0x258ca
2417 15:37:14.039797 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2418 15:37:14.039891 using LZMA
2419 15:37:14.039983 [ 0x30000000, 30051214, 0x32668e60) <- ffc26de4
2420 15:37:14.040065 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2421 15:37:14.040144 Loading segment from ROM address 0xffc26dc8
2422 15:37:14.040234 Entry Point 0x30000000
2423 15:37:14.040314 Loaded segments
2424 15:37:14.040393 BS: BS_PAYLOAD_LOAD run times (exec / console): 87 / 62 ms
2425 15:37:14.040483 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2426 15:37:14.040564 Finalizing chipset.
2427 15:37:14.040644 apm_control: Finalizing SMM.
2428 15:37:14.040731 APMC done.
2429 15:37:14.040812 HECI: CSE device 16.0 is hidden
2430 15:37:14.040891 HECI: CSE device 16.1 is disabled
2431 15:37:14.040980 HECI: CSE device 16.2 is disabled
2432 15:37:14.041068 HECI: CSE device 16.3 is disabled
2433 15:37:14.041146 HECI: CSE device 16.4 is disabled
2434 15:37:14.041236 HECI: CSE device 16.5 is disabled
2435 15:37:14.041316 HECI: CSE device 16.0 is hidden
2436 15:37:14.041394 CSE is disabled, cannot send End-of-Post (EOP) message
2437 15:37:14.041484 BS: BS_PAYLOAD_BOOT entry times (exec / console): 0 / 35 ms
2438 15:37:14.041565 mp_park_aps done after 0 msecs.
2439 15:37:14.041644 Jumping to boot code at 0x30000000(0x76892000)
2440 15:37:14.041743 CPU0: stack: 0x76a9a000 - 0x76a9b000, lowest used address 0x76a9a3dc, stack used: 3108 bytes
2441 15:37:14.041834
2442 15:37:14.041912
2443 15:37:14.042000
2444 15:37:14.042081 Starting depthcharge on Volmar...
2445 15:37:14.042158
2446 15:37:14.042245 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2447 15:37:14.042327
2448 15:37:14.042406 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2449 15:37:14.042493
2450 15:37:14.042575 Looking for NVMe Controller 0x300653c0 @ 00:06:00
2451 15:37:14.042657
2452 15:37:14.042741 configure_storage: Failed to remap 1C:2
2453 15:37:14.042822
2454 15:37:14.042906 Wipe memory regions:
2455 15:37:14.042987
2456 15:37:14.043077 [0x00000000001000, 0x000000000a0000)
2457 15:37:14.043165
2458 15:37:14.043244 [0x00000000100000, 0x00000030000000)
2459 15:37:14.043610 end: 2.2.3 depthcharge-start (duration 00:00:00) [common]
2460 15:37:14.043733 start: 2.2.4 bootloader-commands (timeout 00:04:46) [common]
2461 15:37:14.043852 Setting prompt string to ['brya:']
2462 15:37:14.043955 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:46)
2463 15:37:14.133560
2464 15:37:14.137910 [0x00000032668e60, 0x00000076858000)
2465 15:37:14.285044
2466 15:37:14.288628 [0x00000100000000, 0x0000027fc00000)
2467 15:37:15.111457
2468 15:37:15.115409 ec_init: CrosEC protocol v3 supported (256, 256)
2469 15:37:15.723158
2470 15:37:15.723280 R8152: Initializing
2471 15:37:15.723347
2472 15:37:15.727318 Version 9 (ocp_data = 6010)
2473 15:37:15.727422
2474 15:37:15.729455 R8152: Done initializing
2475 15:37:15.729559
2476 15:37:15.732732 Adding net device
2477 15:37:16.034841
2478 15:37:16.037489 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2479 15:37:16.037592
2480 15:37:16.037687
2481 15:37:16.037997 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2483 15:37:16.138371 brya: tftpboot 192.168.201.1 14152816/tftp-deploy-vhof0zm9/kernel/bzImage 14152816/tftp-deploy-vhof0zm9/kernel/cmdline 14152816/tftp-deploy-vhof0zm9/ramdisk/ramdisk.cpio.gz
2484 15:37:16.138599 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2485 15:37:16.138774 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:44)
2486 15:37:16.144477 tftpboot 192.168.201.1 14152816/tftp-deploy-vhof0zm9/kernel/bzImploy-vhof0zm9/kernel/cmdline 14152816/tftp-deploy-vhof0zm9/ramdisk/ramdisk.cpio.gz
2487 15:37:16.144623
2488 15:37:16.144711 Waiting for link
2489 15:37:16.347874
2490 15:37:16.348021 done.
2491 15:37:16.348099
2492 15:37:16.348160 MAC: 00:e0:4c:68:02:be
2493 15:37:16.348216
2494 15:37:16.350947 Sending DHCP discover... done.
2495 15:37:16.351017
2496 15:37:16.354406 Waiting for reply... done.
2497 15:37:16.354492
2498 15:37:16.357953 Sending DHCP request... done.
2499 15:37:16.358039
2500 15:37:16.361010 Waiting for reply... done.
2501 15:37:16.364498
2502 15:37:16.364573 My ip is 192.168.201.17
2503 15:37:16.364637
2504 15:37:16.368574 The DHCP server ip is 192.168.201.1
2505 15:37:16.368649
2506 15:37:16.374462 TFTP server IP predefined by user: 192.168.201.1
2507 15:37:16.374541
2508 15:37:16.381235 Bootfile predefined by user: 14152816/tftp-deploy-vhof0zm9/kernel/bzImage
2509 15:37:16.381320
2510 15:37:16.384518 Sending tftp read request... done.
2511 15:37:16.384595
2512 15:37:16.387757 Waiting for the transfer...
2513 15:37:16.387840
2514 15:37:16.634435 00000000 ################################################################
2515 15:37:16.634571
2516 15:37:16.880928 00080000 ################################################################
2517 15:37:16.881111
2518 15:37:17.126524 00100000 ################################################################
2519 15:37:17.126651
2520 15:37:17.369922 00180000 ################################################################
2521 15:37:17.370071
2522 15:37:17.614295 00200000 ################################################################
2523 15:37:17.614432
2524 15:37:17.864715 00280000 ################################################################
2525 15:37:17.864860
2526 15:37:18.114996 00300000 ################################################################
2527 15:37:18.115125
2528 15:37:18.366251 00380000 ################################################################
2529 15:37:18.366398
2530 15:37:18.612871 00400000 ################################################################
2531 15:37:18.612990
2532 15:37:18.868195 00480000 ################################################################
2533 15:37:18.868345
2534 15:37:19.120805 00500000 ################################################################
2535 15:37:19.120957
2536 15:37:19.375040 00580000 ################################################################
2537 15:37:19.375165
2538 15:37:19.625542 00600000 ################################################################
2539 15:37:19.625656
2540 15:37:19.875353 00680000 ################################################################
2541 15:37:19.875475
2542 15:37:20.117180 00700000 ################################################################
2543 15:37:20.117321
2544 15:37:20.379951 00780000 ################################################################
2545 15:37:20.380068
2546 15:37:20.637930 00800000 ################################################################
2547 15:37:20.638049
2548 15:37:20.888420 00880000 ################################################################
2549 15:37:20.888536
2550 15:37:21.132938 00900000 ################################################################
2551 15:37:21.133063
2552 15:37:21.381508 00980000 ################################################################
2553 15:37:21.381625
2554 15:37:21.628197 00a00000 ################################################################
2555 15:37:21.628313
2556 15:37:21.873309 00a80000 ################################################################
2557 15:37:21.873463
2558 15:37:22.116009 00b00000 ################################################################
2559 15:37:22.116148
2560 15:37:22.371900 00b80000 ################################################################
2561 15:37:22.372050
2562 15:37:22.636223 00c00000 ################################################################
2563 15:37:22.636343
2564 15:37:22.873131 00c80000 ################################################################
2565 15:37:22.873250
2566 15:37:23.134031 00d00000 ################################################################ done.
2567 15:37:23.134147
2568 15:37:23.136535 The bootfile was 14155664 bytes long.
2569 15:37:23.136614
2570 15:37:23.140207 Sending tftp read request... done.
2571 15:37:23.140297
2572 15:37:23.145276 Waiting for the transfer...
2573 15:37:23.145361
2574 15:37:23.403990 00000000 ################################################################
2575 15:37:23.404110
2576 15:37:23.657440 00080000 ################################################################
2577 15:37:23.657563
2578 15:37:23.909920 00100000 ################################################################
2579 15:37:23.910034
2580 15:37:24.161501 00180000 ################################################################
2581 15:37:24.161624
2582 15:37:24.417471 00200000 ################################################################
2583 15:37:24.417599
2584 15:37:24.674729 00280000 ################################################################
2585 15:37:24.674849
2586 15:37:24.926098 00300000 ################################################################
2587 15:37:24.926216
2588 15:37:25.200186 00380000 ################################################################
2589 15:37:25.200300
2590 15:37:25.478501 00400000 ################################################################
2591 15:37:25.478613
2592 15:37:25.732171 00480000 ################################################################
2593 15:37:25.732288
2594 15:37:25.991448 00500000 ################################################################
2595 15:37:25.991568
2596 15:37:26.246490 00580000 ################################################################
2597 15:37:26.246609
2598 15:37:26.499869 00600000 ################################################################
2599 15:37:26.499993
2600 15:37:26.752237 00680000 ################################################################
2601 15:37:26.752363
2602 15:37:27.002912 00700000 ################################################################
2603 15:37:27.003031
2604 15:37:27.269264 00780000 ################################################################
2605 15:37:27.269383
2606 15:37:27.536697 00800000 ################################################################
2607 15:37:27.536837
2608 15:37:27.808892 00880000 ################################################################ done.
2609 15:37:27.809054
2610 15:37:27.811300 Sending tftp read request... done.
2611 15:37:27.811455
2612 15:37:27.814864 Waiting for the transfer...
2613 15:37:27.814962
2614 15:37:27.818041 00000000 # done.
2615 15:37:27.818148
2616 15:37:27.825166 Command line loaded dynamically from TFTP file: 14152816/tftp-deploy-vhof0zm9/kernel/cmdline
2617 15:37:27.828170
2618 15:37:27.841376 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2619 15:37:27.848113
2620 15:37:27.851582 Shutting down all USB controllers.
2621 15:37:27.851664
2622 15:37:27.851725 Removing current net device
2623 15:37:27.851781
2624 15:37:27.856319 Finalizing coreboot
2625 15:37:27.856397
2626 15:37:27.861490 Exiting depthcharge with code 4 at timestamp: 23717403
2627 15:37:27.861574
2628 15:37:27.861635
2629 15:37:27.861692 Starting kernel ...
2630 15:37:27.861747
2631 15:37:27.861799
2632 15:37:27.862432 end: 2.2.4 bootloader-commands (duration 00:00:14) [common]
2633 15:37:27.862553 start: 2.2.5 auto-login-action (timeout 00:04:32) [common]
2634 15:37:27.862652 Setting prompt string to ['Linux version [0-9]']
2635 15:37:27.862743 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2636 15:37:27.862834 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2638 15:41:59.863408 end: 2.2.5 auto-login-action (duration 00:04:32) [common]
2640 15:41:59.864359 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 272 seconds'
2642 15:41:59.865240 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2645 15:41:59.866722 end: 2 depthcharge-action (duration 00:05:00) [common]
2647 15:41:59.867805 Cleaning after the job
2648 15:41:59.868252 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14152816/tftp-deploy-vhof0zm9/ramdisk
2649 15:41:59.873119 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14152816/tftp-deploy-vhof0zm9/kernel
2650 15:41:59.880377 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14152816/tftp-deploy-vhof0zm9/modules
2651 15:41:59.883174 start: 4.1 power-off (timeout 00:00:30) [common]
2652 15:41:59.883869 Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cbv514-1h-34uz-brya-cbg-6', '--port=1', '--command=off']
2653 15:42:00.843107 >> Command sent successfully.
2654 15:42:00.846401 Returned 0 in 0 seconds
2655 15:42:00.946738 end: 4.1 power-off (duration 00:00:01) [common]
2657 15:42:00.947036 start: 4.2 read-feedback (timeout 00:09:59) [common]
2658 15:42:00.947268 Listened to connection for namespace 'common' for up to 1s
2660 15:42:00.947628 Listened to connection for namespace 'common' for up to 1s
2661 15:42:01.948231 Finalising connection for namespace 'common'
2662 15:42:01.948442 Disconnecting from shell: Finalise
2663 15:42:01.948519
2664 15:42:02.048793 end: 4.2 read-feedback (duration 00:00:01) [common]
2665 15:42:02.048939 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14152816
2666 15:42:02.063947 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14152816
2667 15:42:02.064117 JobError: Your job cannot terminate cleanly.