Boot log: acer-cp514-2h-1130g7-volteer
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 15:36:51.121352 lava-dispatcher, installed at version: 2024.03
2 15:36:51.121558 start: 0 validate
3 15:36:51.121671 Start time: 2024-06-03 15:36:51.121666+00:00 (UTC)
4 15:36:51.121787 Using caching service: 'http://localhost/cache/?uri=%s'
5 15:36:51.121918 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-cros-ec%2F20240313.0%2Famd64%2Frootfs.cpio.gz exists
6 15:36:51.396647 Using caching service: 'http://localhost/cache/?uri=%s'
7 15:36:51.397355 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2560-gecbb82ce18d07%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 15:36:51.659495 Using caching service: 'http://localhost/cache/?uri=%s'
9 15:36:51.660349 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2560-gecbb82ce18d07%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 15:36:57.840271 validate duration: 6.72
12 15:36:57.840901 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 15:36:57.841197 start: 1.1 download-retry (timeout 00:10:00) [common]
14 15:36:57.841442 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 15:36:57.841808 Not decompressing ramdisk as can be used compressed.
16 15:36:57.842080 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-cros-ec/20240313.0/amd64/rootfs.cpio.gz
17 15:36:57.842296 saving as /var/lib/lava/dispatcher/tmp/14152759/tftp-deploy-thuvnxzo/ramdisk/rootfs.cpio.gz
18 15:36:57.842527 total size: 40325651 (38 MB)
19 15:36:59.215999 progress 0 % (0 MB)
20 15:36:59.260663 progress 5 % (1 MB)
21 15:36:59.276818 progress 10 % (3 MB)
22 15:36:59.288181 progress 15 % (5 MB)
23 15:36:59.298263 progress 20 % (7 MB)
24 15:36:59.308262 progress 25 % (9 MB)
25 15:36:59.318296 progress 30 % (11 MB)
26 15:36:59.328045 progress 35 % (13 MB)
27 15:36:59.337849 progress 40 % (15 MB)
28 15:36:59.347663 progress 45 % (17 MB)
29 15:36:59.357491 progress 50 % (19 MB)
30 15:36:59.367138 progress 55 % (21 MB)
31 15:36:59.376849 progress 60 % (23 MB)
32 15:36:59.386386 progress 65 % (25 MB)
33 15:36:59.396097 progress 70 % (26 MB)
34 15:36:59.405769 progress 75 % (28 MB)
35 15:36:59.415680 progress 80 % (30 MB)
36 15:36:59.425761 progress 85 % (32 MB)
37 15:36:59.435458 progress 90 % (34 MB)
38 15:36:59.445625 progress 95 % (36 MB)
39 15:36:59.455052 progress 100 % (38 MB)
40 15:36:59.455254 38 MB downloaded in 1.61 s (23.85 MB/s)
41 15:36:59.455417 end: 1.1.1 http-download (duration 00:00:02) [common]
43 15:36:59.455709 end: 1.1 download-retry (duration 00:00:02) [common]
44 15:36:59.455801 start: 1.2 download-retry (timeout 00:09:58) [common]
45 15:36:59.455890 start: 1.2.1 http-download (timeout 00:09:58) [common]
46 15:36:59.456040 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2560-gecbb82ce18d07/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 15:36:59.456126 saving as /var/lib/lava/dispatcher/tmp/14152759/tftp-deploy-thuvnxzo/kernel/bzImage
48 15:36:59.456212 total size: 14155664 (13 MB)
49 15:36:59.456299 No compression specified
50 15:36:59.457696 progress 0 % (0 MB)
51 15:36:59.461166 progress 5 % (0 MB)
52 15:36:59.464750 progress 10 % (1 MB)
53 15:36:59.468138 progress 15 % (2 MB)
54 15:36:59.471605 progress 20 % (2 MB)
55 15:36:59.474907 progress 25 % (3 MB)
56 15:36:59.478501 progress 30 % (4 MB)
57 15:36:59.482002 progress 35 % (4 MB)
58 15:36:59.485270 progress 40 % (5 MB)
59 15:36:59.488779 progress 45 % (6 MB)
60 15:36:59.492096 progress 50 % (6 MB)
61 15:36:59.495500 progress 55 % (7 MB)
62 15:36:59.498934 progress 60 % (8 MB)
63 15:36:59.502245 progress 65 % (8 MB)
64 15:36:59.505789 progress 70 % (9 MB)
65 15:36:59.509246 progress 75 % (10 MB)
66 15:36:59.512890 progress 80 % (10 MB)
67 15:36:59.516489 progress 85 % (11 MB)
68 15:36:59.519788 progress 90 % (12 MB)
69 15:36:59.523224 progress 95 % (12 MB)
70 15:36:59.526629 progress 100 % (13 MB)
71 15:36:59.526862 13 MB downloaded in 0.07 s (191.09 MB/s)
72 15:36:59.527018 end: 1.2.1 http-download (duration 00:00:00) [common]
74 15:36:59.527252 end: 1.2 download-retry (duration 00:00:00) [common]
75 15:36:59.527345 start: 1.3 download-retry (timeout 00:09:58) [common]
76 15:36:59.527445 start: 1.3.1 http-download (timeout 00:09:58) [common]
77 15:36:59.527614 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2560-gecbb82ce18d07/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 15:36:59.527679 saving as /var/lib/lava/dispatcher/tmp/14152759/tftp-deploy-thuvnxzo/modules/modules.tar
79 15:36:59.527764 total size: 705112 (0 MB)
80 15:36:59.527852 Using unxz to decompress xz
81 15:36:59.529636 progress 4 % (0 MB)
82 15:36:59.529894 progress 9 % (0 MB)
83 15:36:59.531545 progress 18 % (0 MB)
84 15:36:59.533386 progress 23 % (0 MB)
85 15:36:59.536997 progress 32 % (0 MB)
86 15:36:59.538730 progress 37 % (0 MB)
87 15:36:59.542168 progress 46 % (0 MB)
88 15:36:59.543852 progress 51 % (0 MB)
89 15:36:59.547341 progress 60 % (0 MB)
90 15:36:59.548997 progress 65 % (0 MB)
91 15:36:59.552604 progress 74 % (0 MB)
92 15:36:59.554241 progress 79 % (0 MB)
93 15:36:59.557637 progress 88 % (0 MB)
94 15:36:59.561375 progress 97 % (0 MB)
95 15:36:59.568017 0 MB downloaded in 0.04 s (16.71 MB/s)
96 15:36:59.568175 end: 1.3.1 http-download (duration 00:00:00) [common]
98 15:36:59.568461 end: 1.3 download-retry (duration 00:00:00) [common]
99 15:36:59.568555 start: 1.4 prepare-tftp-overlay (timeout 00:09:58) [common]
100 15:36:59.568647 start: 1.4.1 extract-nfsrootfs (timeout 00:09:58) [common]
101 15:36:59.568729 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
102 15:36:59.568840 start: 1.4.2 lava-overlay (timeout 00:09:58) [common]
103 15:36:59.569044 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14152759/lava-overlay-h3wzemlf
104 15:36:59.569195 makedir: /var/lib/lava/dispatcher/tmp/14152759/lava-overlay-h3wzemlf/lava-14152759/bin
105 15:36:59.569321 makedir: /var/lib/lava/dispatcher/tmp/14152759/lava-overlay-h3wzemlf/lava-14152759/tests
106 15:36:59.569463 makedir: /var/lib/lava/dispatcher/tmp/14152759/lava-overlay-h3wzemlf/lava-14152759/results
107 15:36:59.569569 Creating /var/lib/lava/dispatcher/tmp/14152759/lava-overlay-h3wzemlf/lava-14152759/bin/lava-add-keys
108 15:36:59.569706 Creating /var/lib/lava/dispatcher/tmp/14152759/lava-overlay-h3wzemlf/lava-14152759/bin/lava-add-sources
109 15:36:59.569857 Creating /var/lib/lava/dispatcher/tmp/14152759/lava-overlay-h3wzemlf/lava-14152759/bin/lava-background-process-start
110 15:36:59.569986 Creating /var/lib/lava/dispatcher/tmp/14152759/lava-overlay-h3wzemlf/lava-14152759/bin/lava-background-process-stop
111 15:36:59.570131 Creating /var/lib/lava/dispatcher/tmp/14152759/lava-overlay-h3wzemlf/lava-14152759/bin/lava-common-functions
112 15:36:59.570283 Creating /var/lib/lava/dispatcher/tmp/14152759/lava-overlay-h3wzemlf/lava-14152759/bin/lava-echo-ipv4
113 15:36:59.570433 Creating /var/lib/lava/dispatcher/tmp/14152759/lava-overlay-h3wzemlf/lava-14152759/bin/lava-install-packages
114 15:36:59.570582 Creating /var/lib/lava/dispatcher/tmp/14152759/lava-overlay-h3wzemlf/lava-14152759/bin/lava-installed-packages
115 15:36:59.570726 Creating /var/lib/lava/dispatcher/tmp/14152759/lava-overlay-h3wzemlf/lava-14152759/bin/lava-os-build
116 15:36:59.570852 Creating /var/lib/lava/dispatcher/tmp/14152759/lava-overlay-h3wzemlf/lava-14152759/bin/lava-probe-channel
117 15:36:59.570976 Creating /var/lib/lava/dispatcher/tmp/14152759/lava-overlay-h3wzemlf/lava-14152759/bin/lava-probe-ip
118 15:36:59.571101 Creating /var/lib/lava/dispatcher/tmp/14152759/lava-overlay-h3wzemlf/lava-14152759/bin/lava-target-ip
119 15:36:59.571224 Creating /var/lib/lava/dispatcher/tmp/14152759/lava-overlay-h3wzemlf/lava-14152759/bin/lava-target-mac
120 15:36:59.571346 Creating /var/lib/lava/dispatcher/tmp/14152759/lava-overlay-h3wzemlf/lava-14152759/bin/lava-target-storage
121 15:36:59.571493 Creating /var/lib/lava/dispatcher/tmp/14152759/lava-overlay-h3wzemlf/lava-14152759/bin/lava-test-case
122 15:36:59.571654 Creating /var/lib/lava/dispatcher/tmp/14152759/lava-overlay-h3wzemlf/lava-14152759/bin/lava-test-event
123 15:36:59.571803 Creating /var/lib/lava/dispatcher/tmp/14152759/lava-overlay-h3wzemlf/lava-14152759/bin/lava-test-feedback
124 15:36:59.571949 Creating /var/lib/lava/dispatcher/tmp/14152759/lava-overlay-h3wzemlf/lava-14152759/bin/lava-test-raise
125 15:36:59.572080 Creating /var/lib/lava/dispatcher/tmp/14152759/lava-overlay-h3wzemlf/lava-14152759/bin/lava-test-reference
126 15:36:59.572205 Creating /var/lib/lava/dispatcher/tmp/14152759/lava-overlay-h3wzemlf/lava-14152759/bin/lava-test-runner
127 15:36:59.572331 Creating /var/lib/lava/dispatcher/tmp/14152759/lava-overlay-h3wzemlf/lava-14152759/bin/lava-test-set
128 15:36:59.572481 Creating /var/lib/lava/dispatcher/tmp/14152759/lava-overlay-h3wzemlf/lava-14152759/bin/lava-test-shell
129 15:36:59.572636 Updating /var/lib/lava/dispatcher/tmp/14152759/lava-overlay-h3wzemlf/lava-14152759/bin/lava-install-packages (oe)
130 15:36:59.572811 Updating /var/lib/lava/dispatcher/tmp/14152759/lava-overlay-h3wzemlf/lava-14152759/bin/lava-installed-packages (oe)
131 15:36:59.572957 Creating /var/lib/lava/dispatcher/tmp/14152759/lava-overlay-h3wzemlf/lava-14152759/environment
132 15:36:59.573076 LAVA metadata
133 15:36:59.573171 - LAVA_JOB_ID=14152759
134 15:36:59.573261 - LAVA_DISPATCHER_IP=192.168.201.1
135 15:36:59.573391 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:58) [common]
136 15:36:59.573475 skipped lava-vland-overlay
137 15:36:59.573582 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
138 15:36:59.573690 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:58) [common]
139 15:36:59.573774 skipped lava-multinode-overlay
140 15:36:59.573879 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
141 15:36:59.573985 start: 1.4.2.3 test-definition (timeout 00:09:58) [common]
142 15:36:59.574086 Loading test definitions
143 15:36:59.574198 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:58) [common]
144 15:36:59.574294 Using /lava-14152759 at stage 0
145 15:36:59.574700 uuid=14152759_1.4.2.3.1 testdef=None
146 15:36:59.574814 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
147 15:36:59.574924 start: 1.4.2.3.2 test-overlay (timeout 00:09:58) [common]
148 15:36:59.575536 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
150 15:36:59.575916 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:58) [common]
151 15:36:59.576471 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
153 15:36:59.576706 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:58) [common]
154 15:36:59.577248 runner path: /var/lib/lava/dispatcher/tmp/14152759/lava-overlay-h3wzemlf/lava-14152759/0/tests/0_cros-ec test_uuid 14152759_1.4.2.3.1
155 15:36:59.577417 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
157 15:36:59.577606 Creating lava-test-runner.conf files
158 15:36:59.577661 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14152759/lava-overlay-h3wzemlf/lava-14152759/0 for stage 0
159 15:36:59.577739 - 0_cros-ec
160 15:36:59.577825 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
161 15:36:59.577901 start: 1.4.2.4 compress-overlay (timeout 00:09:58) [common]
162 15:36:59.583814 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
163 15:36:59.583906 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:58) [common]
164 15:36:59.583983 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
165 15:36:59.584058 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
166 15:36:59.584134 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:58) [common]
167 15:37:00.544082 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
168 15:37:00.544228 start: 1.4.4 extract-modules (timeout 00:09:57) [common]
169 15:37:00.544302 extracting modules file /var/lib/lava/dispatcher/tmp/14152759/tftp-deploy-thuvnxzo/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14152759/extract-overlay-ramdisk-cfa4w8ts/ramdisk
170 15:37:00.566020 end: 1.4.4 extract-modules (duration 00:00:00) [common]
171 15:37:00.566133 start: 1.4.5 apply-overlay-tftp (timeout 00:09:57) [common]
172 15:37:00.566205 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14152759/compress-overlay-35jjupcy/overlay-1.4.2.4.tar.gz to ramdisk
173 15:37:00.566264 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14152759/compress-overlay-35jjupcy/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14152759/extract-overlay-ramdisk-cfa4w8ts/ramdisk
174 15:37:00.572805 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
175 15:37:00.572901 start: 1.4.6 configure-preseed-file (timeout 00:09:57) [common]
176 15:37:00.572983 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
177 15:37:00.573059 start: 1.4.7 compress-ramdisk (timeout 00:09:57) [common]
178 15:37:00.573122 Building ramdisk /var/lib/lava/dispatcher/tmp/14152759/extract-overlay-ramdisk-cfa4w8ts/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14152759/extract-overlay-ramdisk-cfa4w8ts/ramdisk
179 15:37:01.031050 >> 211899 blocks
180 15:37:04.953438 rename /var/lib/lava/dispatcher/tmp/14152759/extract-overlay-ramdisk-cfa4w8ts/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14152759/tftp-deploy-thuvnxzo/ramdisk/ramdisk.cpio.gz
181 15:37:04.953604 end: 1.4.7 compress-ramdisk (duration 00:00:04) [common]
182 15:37:04.953692 start: 1.4.8 prepare-kernel (timeout 00:09:53) [common]
183 15:37:04.953769 start: 1.4.8.1 prepare-fit (timeout 00:09:53) [common]
184 15:37:04.953838 No mkimage arch provided, not using FIT.
185 15:37:04.953910 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
186 15:37:04.953979 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
187 15:37:04.954051 end: 1.4 prepare-tftp-overlay (duration 00:00:05) [common]
188 15:37:04.954123 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:53) [common]
189 15:37:04.954180 No LXC device requested
190 15:37:04.954244 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
191 15:37:04.954314 start: 1.6 deploy-device-env (timeout 00:09:53) [common]
192 15:37:04.954380 end: 1.6 deploy-device-env (duration 00:00:00) [common]
193 15:37:04.954434 Checking files for TFTP limit of 4294967296 bytes.
194 15:37:04.954712 end: 1 tftp-deploy (duration 00:00:07) [common]
195 15:37:04.954798 start: 2 depthcharge-action (timeout 00:05:00) [common]
196 15:37:04.954874 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
197 15:37:04.954960 substitutions:
198 15:37:04.955018 - {DTB}: None
199 15:37:04.955071 - {INITRD}: 14152759/tftp-deploy-thuvnxzo/ramdisk/ramdisk.cpio.gz
200 15:37:04.955122 - {KERNEL}: 14152759/tftp-deploy-thuvnxzo/kernel/bzImage
201 15:37:04.955171 - {LAVA_MAC}: None
202 15:37:04.955219 - {PRESEED_CONFIG}: None
203 15:37:04.955267 - {PRESEED_LOCAL}: None
204 15:37:04.955317 - {RAMDISK}: 14152759/tftp-deploy-thuvnxzo/ramdisk/ramdisk.cpio.gz
205 15:37:04.955386 - {ROOT_PART}: None
206 15:37:04.955446 - {ROOT}: None
207 15:37:04.955504 - {SERVER_IP}: 192.168.201.1
208 15:37:04.955551 - {TEE}: None
209 15:37:04.955612 Parsed boot commands:
210 15:37:04.955692 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
211 15:37:04.955824 Parsed boot commands: tftpboot 192.168.201.1 14152759/tftp-deploy-thuvnxzo/kernel/bzImage 14152759/tftp-deploy-thuvnxzo/kernel/cmdline 14152759/tftp-deploy-thuvnxzo/ramdisk/ramdisk.cpio.gz
212 15:37:04.955902 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
213 15:37:04.955973 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
214 15:37:04.956044 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
215 15:37:04.956113 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
216 15:37:04.956166 Not connected, no need to disconnect.
217 15:37:04.956231 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
218 15:37:04.956298 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
219 15:37:04.956351 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cp514-2h-1130g7-volteer-cbg-7'
220 15:37:04.959543 Setting prompt string to ['lava-test: # ']
221 15:37:04.959886 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
222 15:37:04.959980 end: 2.2.1 reset-connection (duration 00:00:00) [common]
223 15:37:04.960072 start: 2.2.2 reset-device (timeout 00:05:00) [common]
224 15:37:04.960155 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
225 15:37:04.960322 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'acer-cp514-2h-1130g7-volteer-cbg-7']
226 15:37:13.779711 Returned 0 in 8 seconds
227 15:37:13.880811 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
229 15:37:13.882224 end: 2.2.2 reset-device (duration 00:00:09) [common]
230 15:37:13.882765 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
231 15:37:13.883226 Setting prompt string to 'Starting depthcharge on Voema...'
232 15:37:13.883546 Changing prompt to 'Starting depthcharge on Voema...'
233 15:37:13.883978 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
234 15:37:13.885820 [Enter `^Ec?' for help]
235 15:37:13.886231
236 15:37:13.886559
237 15:37:13.886904 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
238 15:37:13.887246 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
239 15:37:13.887561 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
240 15:37:13.887927 CPU: AES supported, TXT NOT supported, VT supported
241 15:37:13.888266 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
242 15:37:13.888576 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
243 15:37:13.889095 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
244 15:37:13.889607 VBOOT: Loading verstage.
245 15:37:13.889948 FMAP: Found "FLASH" version 1.1 at 0x1804000.
246 15:37:13.890258 FMAP: base = 0x0 size = 0x2000000 #areas = 32
247 15:37:13.890582 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
248 15:37:13.890900 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
249 15:37:13.891199 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
250 15:37:13.891478
251 15:37:13.891859
252 15:37:13.892151 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
253 15:37:13.892467 Probing TPM: . done!
254 15:37:13.892749 TPM ready after 0 ms
255 15:37:13.893024 Connected to device vid:did:rid of 1ae0:0028:00
256 15:37:13.893312 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
257 15:37:13.893611 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
258 15:37:13.893974 Initialized TPM device CR50 revision 0
259 15:37:13.894383 tlcl_send_startup: Startup return code is 0
260 15:37:13.894790 TPM: setup succeeded
261 15:37:13.895110 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
262 15:37:13.895406 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
263 15:37:13.895776 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
264 15:37:13.896102 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
265 15:37:13.896388 Chrome EC: UHEPI supported
266 15:37:13.896662 Phase 1
267 15:37:13.896933 FMAP: area GBB found @ 1805000 (458752 bytes)
268 15:37:13.897211 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
269 15:37:13.897488 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
270 15:37:13.897878 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
271 15:37:13.898194 VB2:vb2_check_recovery() Recovery was requested manually
272 15:37:13.898478 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x7
273 15:37:13.898752 Recovery requested (1009000e)
274 15:37:13.899024 TPM: Extending digest for VBOOT: boot mode into PCR 0
275 15:37:13.899339 tlcl_extend: response is 0
276 15:37:13.899673 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
277 15:37:13.899966 tlcl_extend: response is 0
278 15:37:13.900243 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
279 15:37:13.900523 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
280 15:37:13.900801 BS: verstage times (exec / console): total (unknown) / 148 ms
281 15:37:13.901075
282 15:37:13.901377
283 15:37:13.901687 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
284 15:37:13.902157 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
285 15:37:13.902464 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
286 15:37:13.902772 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
287 15:37:13.903055 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
288 15:37:13.903328 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
289 15:37:13.903636 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
290 15:37:13.903978 TCO_STS: 0000 0000
291 15:37:13.904257 GEN_PMCON: d0015038 00002200
292 15:37:13.904530 GBLRST_CAUSE: 00000000 00000000
293 15:37:13.904836 HPR_CAUSE0: 00000000
294 15:37:13.905112 prev_sleep_state 5
295 15:37:13.905382 Boot Count incremented to 31701
296 15:37:13.905656 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
297 15:37:13.906019 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
298 15:37:13.906309 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
299 15:37:13.906591 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
300 15:37:13.906869 Chrome EC: UHEPI supported
301 15:37:13.907142 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
302 15:37:13.907418 Probing TPM: done!
303 15:37:13.907734 Connected to device vid:did:rid of 1ae0:0028:00
304 15:37:13.908136 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
305 15:37:13.908434 Initialized TPM device CR50 revision 0
306 15:37:13.908713 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
307 15:37:13.908991 MRC: Hash idx 0x100b comparison successful.
308 15:37:13.909311 MRC cache found, size faa8
309 15:37:13.909589 bootmode is set to: 2
310 15:37:13.909861 SPD index = 0
311 15:37:13.910135 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
312 15:37:13.910412 SPD: module type is LPDDR4X
313 15:37:13.910682 SPD: module part number is MT53E512M64D4NW-046
314 15:37:13.910954 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
315 15:37:13.911229 SPD: device width 16 bits, bus width 16 bits
316 15:37:13.911500 SPD: module size is 1024 MB (per channel)
317 15:37:13.911831 CBMEM:
318 15:37:13.912086 IMD: root @ 0x76fff000 254 entries.
319 15:37:13.912279 IMD: root @ 0x76ffec00 62 entries.
320 15:37:13.912506 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
321 15:37:13.913000 FMAP: area RW_VPD found @ f35000 (8192 bytes)
322 15:37:13.913215 External stage cache:
323 15:37:13.913408 IMD: root @ 0x7b3ff000 254 entries.
324 15:37:13.913600 IMD: root @ 0x7b3fec00 62 entries.
325 15:37:13.913790 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
326 15:37:13.913998 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
327 15:37:13.914194 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
328 15:37:13.914386 MRC: 'RECOVERY_MRC_CACHE' does not need update.
329 15:37:13.914576 cse_lite: Skip switching to RW in the recovery path
330 15:37:13.914766 8 DIMMs found
331 15:37:13.914961 SMM Memory Map
332 15:37:13.915150 SMRAM : 0x7b000000 0x800000
333 15:37:13.915341 Subregion 0: 0x7b000000 0x200000
334 15:37:13.915534 Subregion 1: 0x7b200000 0x200000
335 15:37:13.915796 Subregion 2: 0x7b400000 0x400000
336 15:37:13.916011 top_of_ram = 0x77000000
337 15:37:13.916246 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
338 15:37:13.916442 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
339 15:37:13.916635 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
340 15:37:13.916827 MTRR Range: Start=ff000000 End=0 (Size 1000000)
341 15:37:13.917034 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
342 15:37:13.917177 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
343 15:37:13.917318 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
344 15:37:13.917460 Processing 211 relocs. Offset value of 0x74c0b000
345 15:37:13.917606 BS: romstage times (exec / console): total (unknown) / 277 ms
346 15:37:13.917749
347 15:37:13.917887
348 15:37:13.918044 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
349 15:37:13.918195 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
350 15:37:13.918339 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
351 15:37:13.918483 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
352 15:37:13.918626 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
353 15:37:13.918768 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
354 15:37:13.918910 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
355 15:37:13.919052 Processing 5008 relocs. Offset value of 0x75d98000
356 15:37:13.919208 BS: postcar times (exec / console): total (unknown) / 59 ms
357 15:37:13.919354
358 15:37:13.919494
359 15:37:13.919658 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
360 15:37:13.919807 Normal boot
361 15:37:13.919948 FW_CONFIG value is 0x804c02
362 15:37:13.920106 PCI: 00:07.0 disabled by fw_config
363 15:37:13.920249 PCI: 00:07.1 disabled by fw_config
364 15:37:13.920390 PCI: 00:0d.2 disabled by fw_config
365 15:37:13.920533 PCI: 00:1c.7 disabled by fw_config
366 15:37:13.920675 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
367 15:37:13.920819 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
368 15:37:13.920963 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
369 15:37:13.921103 GENERIC: 0.0 disabled by fw_config
370 15:37:13.921250 GENERIC: 1.0 disabled by fw_config
371 15:37:13.921389 fw_config match found: DB_USB=USB3_ACTIVE
372 15:37:13.921528 fw_config match found: DB_USB=USB3_ACTIVE
373 15:37:13.921669 fw_config match found: DB_USB=USB3_ACTIVE
374 15:37:13.921809 fw_config match found: DB_USB=USB3_ACTIVE
375 15:37:13.921950 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
376 15:37:13.922111 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
377 15:37:13.922228 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
378 15:37:13.922340 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
379 15:37:13.922457 microcode: sig=0x806c1 pf=0x80 revision=0x86
380 15:37:13.922582 microcode: Update skipped, already up-to-date
381 15:37:13.922696 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
382 15:37:13.922809 Detected 4 core, 8 thread CPU.
383 15:37:13.922919 Setting up SMI for CPU
384 15:37:13.923030 IED base = 0x7b400000
385 15:37:13.923142 IED size = 0x00400000
386 15:37:13.923252 Will perform SMM setup.
387 15:37:13.923360 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
388 15:37:13.923471 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
389 15:37:13.923585 Processing 16 relocs. Offset value of 0x00030000
390 15:37:13.923749 Attempting to start 7 APs
391 15:37:13.923863 Waiting for 10ms after sending INIT.
392 15:37:13.923984 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
393 15:37:13.924098 AP: slot 5 apic_id 6.
394 15:37:13.924209 AP: slot 4 apic_id 7.
395 15:37:13.924319 AP: slot 6 apic_id 2.
396 15:37:13.924428 AP: slot 2 apic_id 3.
397 15:37:13.924537 done.
398 15:37:13.924647 AP: slot 3 apic_id 5.
399 15:37:13.924757 AP: slot 7 apic_id 4.
400 15:37:13.924867 Waiting for 2nd SIPI to complete...done.
401 15:37:13.924980 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
402 15:37:13.925092 Processing 13 relocs. Offset value of 0x00038000
403 15:37:13.925202 Unable to locate Global NVS
404 15:37:13.925312 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
405 15:37:13.925424 Installing permanent SMM handler to 0x7b000000
406 15:37:13.925546 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
407 15:37:13.925671 Processing 794 relocs. Offset value of 0x7b010000
408 15:37:13.926025 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
409 15:37:13.926159 Processing 13 relocs. Offset value of 0x7b008000
410 15:37:13.926273 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
411 15:37:13.926385 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
412 15:37:13.926496 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
413 15:37:13.926608 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
414 15:37:13.926721 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
415 15:37:13.926833 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
416 15:37:13.926945 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
417 15:37:13.927059 Unable to locate Global NVS
418 15:37:13.927153 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
419 15:37:13.927247 Clearing SMI status registers
420 15:37:13.927339 SMI_STS: PM1
421 15:37:13.927431 PM1_STS: PWRBTN
422 15:37:13.927523 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
423 15:37:13.927632 In relocation handler: CPU 0
424 15:37:13.927729 New SMBASE=0x7b000000 IEDBASE=0x7b400000
425 15:37:13.927823 Writing SMRR. base = 0x7b000006, mask=0xff800c00
426 15:37:13.927916 Relocation complete.
427 15:37:13.928032 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
428 15:37:13.928167 In relocation handler: CPU 1
429 15:37:13.928276 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
430 15:37:13.928416 Relocation complete.
431 15:37:13.928584 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
432 15:37:13.928732 In relocation handler: CPU 5
433 15:37:13.928878 New SMBASE=0x7affec00 IEDBASE=0x7b400000
434 15:37:13.929025 Writing SMRR. base = 0x7b000006, mask=0xff800c00
435 15:37:13.929186 Relocation complete.
436 15:37:13.929333 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
437 15:37:13.929478 In relocation handler: CPU 4
438 15:37:13.929623 New SMBASE=0x7afff000 IEDBASE=0x7b400000
439 15:37:13.929770 Relocation complete.
440 15:37:13.929917 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
441 15:37:13.930072 In relocation handler: CPU 2
442 15:37:13.930218 New SMBASE=0x7afff800 IEDBASE=0x7b400000
443 15:37:13.930364 Relocation complete.
444 15:37:13.930511 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
445 15:37:13.930657 In relocation handler: CPU 6
446 15:37:13.930802 New SMBASE=0x7affe800 IEDBASE=0x7b400000
447 15:37:13.930949 Writing SMRR. base = 0x7b000006, mask=0xff800c00
448 15:37:13.931093 Relocation complete.
449 15:37:13.931239 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
450 15:37:13.931385 In relocation handler: CPU 7
451 15:37:13.931529 New SMBASE=0x7affe400 IEDBASE=0x7b400000
452 15:37:13.931670 Writing SMRR. base = 0x7b000006, mask=0xff800c00
453 15:37:13.931765 Relocation complete.
454 15:37:13.931859 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
455 15:37:13.931953 In relocation handler: CPU 3
456 15:37:13.932052 New SMBASE=0x7afff400 IEDBASE=0x7b400000
457 15:37:13.932131 Relocation complete.
458 15:37:13.932221 Initializing CPU #0
459 15:37:13.932303 CPU: vendor Intel device 806c1
460 15:37:13.932383 CPU: family 06, model 8c, stepping 01
461 15:37:13.932463 Clearing out pending MCEs
462 15:37:13.932541 Setting up local APIC...
463 15:37:13.932619 apic_id: 0x00 done.
464 15:37:13.932697 Turbo is available but hidden
465 15:37:13.932777 Turbo is available and visible
466 15:37:13.932856 microcode: Update skipped, already up-to-date
467 15:37:13.932963 CPU #0 initialized
468 15:37:13.933044 Initializing CPU #1
469 15:37:13.933124 Initializing CPU #2
470 15:37:13.933203 Initializing CPU #6
471 15:37:13.933281 CPU: vendor Intel device 806c1
472 15:37:13.933360 CPU: family 06, model 8c, stepping 01
473 15:37:13.933439 CPU: vendor Intel device 806c1
474 15:37:13.933518 CPU: family 06, model 8c, stepping 01
475 15:37:13.933597 Clearing out pending MCEs
476 15:37:13.933675 Clearing out pending MCEs
477 15:37:13.933753 Setting up local APIC...
478 15:37:13.933831 Initializing CPU #4
479 15:37:13.933910 Initializing CPU #5
480 15:37:13.933989 CPU: vendor Intel device 806c1
481 15:37:13.934067 CPU: family 06, model 8c, stepping 01
482 15:37:13.934146 CPU: vendor Intel device 806c1
483 15:37:13.934223 CPU: family 06, model 8c, stepping 01
484 15:37:13.934302 Clearing out pending MCEs
485 15:37:13.934380 Clearing out pending MCEs
486 15:37:13.934458 Setting up local APIC...
487 15:37:13.934535 Initializing CPU #3
488 15:37:13.934613 Initializing CPU #7
489 15:37:13.934692 CPU: vendor Intel device 806c1
490 15:37:13.934771 CPU: family 06, model 8c, stepping 01
491 15:37:13.934848 CPU: vendor Intel device 806c1
492 15:37:13.934925 CPU: family 06, model 8c, stepping 01
493 15:37:13.935003 Clearing out pending MCEs
494 15:37:13.935081 Clearing out pending MCEs
495 15:37:13.935158 Setting up local APIC...
496 15:37:13.935236 CPU: vendor Intel device 806c1
497 15:37:13.935313 CPU: family 06, model 8c, stepping 01
498 15:37:13.935391 Setting up local APIC...
499 15:37:13.935470 apic_id: 0x05 done.
500 15:37:13.935548 Setting up local APIC...
501 15:37:13.935642 apic_id: 0x06 done.
502 15:37:13.935722 apic_id: 0x07 done.
503 15:37:13.935802 microcode: Update skipped, already up-to-date
504 15:37:13.935885 microcode: Update skipped, already up-to-date
505 15:37:13.935965 CPU #5 initialized
506 15:37:13.936066 CPU #4 initialized
507 15:37:13.936145 Clearing out pending MCEs
508 15:37:13.936223 microcode: Update skipped, already up-to-date
509 15:37:13.936302 apic_id: 0x04 done.
510 15:37:13.936381 CPU #3 initialized
511 15:37:13.936462 apic_id: 0x03 done.
512 15:37:13.936541 Setting up local APIC...
513 15:37:13.936620 Setting up local APIC...
514 15:37:13.936700 microcode: Update skipped, already up-to-date
515 15:37:13.936779 microcode: Update skipped, already up-to-date
516 15:37:13.936857 apic_id: 0x02 done.
517 15:37:13.936935 CPU #2 initialized
518 15:37:13.937024 microcode: Update skipped, already up-to-date
519 15:37:13.937092 apic_id: 0x01 done.
520 15:37:13.937160 CPU #7 initialized
521 15:37:13.937229 microcode: Update skipped, already up-to-date
522 15:37:13.937522 CPU #6 initialized
523 15:37:13.937602 CPU #1 initialized
524 15:37:13.937672 bsp_do_flight_plan done after 454 msecs.
525 15:37:13.937741 CPU: frequency set to 4000 MHz
526 15:37:13.937810 Enabling SMIs.
527 15:37:13.937879 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
528 15:37:13.937949 SATAXPCIE1 indicates PCIe NVMe is present
529 15:37:13.938017 Probing TPM: done!
530 15:37:13.938086 Connected to device vid:did:rid of 1ae0:0028:00
531 15:37:13.938156 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
532 15:37:13.938225 Initialized TPM device CR50 revision 0
533 15:37:13.938293 Enabling S0i3.4
534 15:37:13.938361 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
535 15:37:13.938431 Found a VBT of 8704 bytes after decompression
536 15:37:13.938500 cse_lite: CSE RO boot. HybridStorageMode disabled
537 15:37:13.938569 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
538 15:37:13.938639 FSPS returned 0
539 15:37:13.938708 Executing Phase 1 of FspMultiPhaseSiInit
540 15:37:13.938777 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
541 15:37:13.938850 port C0 DISC req: usage 1 usb3 1 usb2 5
542 15:37:13.938932 Raw Buffer output 0 00000511
543 15:37:13.939004 Raw Buffer output 1 00000000
544 15:37:13.939074 pmc_send_ipc_cmd succeeded
545 15:37:13.939143 port C1 DISC req: usage 1 usb3 2 usb2 3
546 15:37:13.939211 Raw Buffer output 0 00000321
547 15:37:13.939279 Raw Buffer output 1 00000000
548 15:37:13.939346 pmc_send_ipc_cmd succeeded
549 15:37:13.939415 Detected 4 core, 8 thread CPU.
550 15:37:13.939483 Detected 4 core, 8 thread CPU.
551 15:37:13.939551 Display FSP Version Info HOB
552 15:37:13.939629 Reference Code - CPU = a.0.4c.31
553 15:37:13.939700 uCode Version = 0.0.0.86
554 15:37:13.939779 TXT ACM version = ff.ff.ff.ffff
555 15:37:13.939859 Reference Code - ME = a.0.4c.31
556 15:37:13.939928 MEBx version = 0.0.0.0
557 15:37:13.939997 ME Firmware Version = Consumer SKU
558 15:37:13.940066 Reference Code - PCH = a.0.4c.31
559 15:37:13.940134 PCH-CRID Status = Disabled
560 15:37:13.940202 PCH-CRID Original Value = ff.ff.ff.ffff
561 15:37:13.940269 PCH-CRID New Value = ff.ff.ff.ffff
562 15:37:13.940337 OPROM - RST - RAID = ff.ff.ff.ffff
563 15:37:13.940405 PCH Hsio Version = 4.0.0.0
564 15:37:13.940474 Reference Code - SA - System Agent = a.0.4c.31
565 15:37:13.940543 Reference Code - MRC = 2.0.0.1
566 15:37:13.940610 SA - PCIe Version = a.0.4c.31
567 15:37:13.940677 SA-CRID Status = Disabled
568 15:37:13.940746 SA-CRID Original Value = 0.0.0.1
569 15:37:13.940813 SA-CRID New Value = 0.0.0.1
570 15:37:13.940879 OPROM - VBIOS = ff.ff.ff.ffff
571 15:37:13.940947 IO Manageability Engine FW Version = 11.1.4.0
572 15:37:13.941015 PHY Build Version = 0.0.0.e0
573 15:37:13.941083 Thunderbolt(TM) FW Version = 0.0.0.0
574 15:37:13.941152 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
575 15:37:13.941219 ITSS IRQ Polarities Before:
576 15:37:13.941286 IPC0: 0xffffffff
577 15:37:13.941353 IPC1: 0xffffffff
578 15:37:13.941421 IPC2: 0xffffffff
579 15:37:13.941488 IPC3: 0xffffffff
580 15:37:13.941554 ITSS IRQ Polarities After:
581 15:37:13.941621 IPC0: 0xffffffff
582 15:37:13.941688 IPC1: 0xffffffff
583 15:37:13.941756 IPC2: 0xffffffff
584 15:37:13.941823 IPC3: 0xffffffff
585 15:37:13.941901 Found PCIe Root Port #9 at PCI: 00:1d.0.
586 15:37:13.941995 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
587 15:37:13.942063 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
588 15:37:13.942126 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
589 15:37:13.942188 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
590 15:37:13.942250 Enumerating buses...
591 15:37:13.942310 Show all devs... Before device enumeration.
592 15:37:13.942372 Root Device: enabled 1
593 15:37:13.942431 DOMAIN: 0000: enabled 1
594 15:37:13.942492 CPU_CLUSTER: 0: enabled 1
595 15:37:13.942552 PCI: 00:00.0: enabled 1
596 15:37:13.942621 PCI: 00:02.0: enabled 1
597 15:37:13.942681 PCI: 00:04.0: enabled 1
598 15:37:13.942741 PCI: 00:05.0: enabled 1
599 15:37:13.942801 PCI: 00:06.0: enabled 0
600 15:37:13.942861 PCI: 00:07.0: enabled 0
601 15:37:13.942921 PCI: 00:07.1: enabled 0
602 15:37:13.942981 PCI: 00:07.2: enabled 0
603 15:37:13.943041 PCI: 00:07.3: enabled 0
604 15:37:13.943101 PCI: 00:08.0: enabled 1
605 15:37:13.943161 PCI: 00:09.0: enabled 0
606 15:37:13.943222 PCI: 00:0a.0: enabled 0
607 15:37:13.943282 PCI: 00:0d.0: enabled 1
608 15:37:13.943342 PCI: 00:0d.1: enabled 0
609 15:37:13.943401 PCI: 00:0d.2: enabled 0
610 15:37:13.943462 PCI: 00:0d.3: enabled 0
611 15:37:13.943522 PCI: 00:0e.0: enabled 0
612 15:37:13.943582 PCI: 00:10.2: enabled 1
613 15:37:13.943648 PCI: 00:10.6: enabled 0
614 15:37:13.943708 PCI: 00:10.7: enabled 0
615 15:37:13.943769 PCI: 00:12.0: enabled 0
616 15:37:13.943829 PCI: 00:12.6: enabled 0
617 15:37:13.943888 PCI: 00:13.0: enabled 0
618 15:37:13.943947 PCI: 00:14.0: enabled 1
619 15:37:13.944007 PCI: 00:14.1: enabled 0
620 15:37:13.944066 PCI: 00:14.2: enabled 1
621 15:37:13.944127 PCI: 00:14.3: enabled 1
622 15:37:13.944187 PCI: 00:15.0: enabled 1
623 15:37:13.944247 PCI: 00:15.1: enabled 1
624 15:37:13.944306 PCI: 00:15.2: enabled 1
625 15:37:13.944366 PCI: 00:15.3: enabled 1
626 15:37:13.944426 PCI: 00:16.0: enabled 1
627 15:37:13.944486 PCI: 00:16.1: enabled 0
628 15:37:13.944545 PCI: 00:16.2: enabled 0
629 15:37:13.944605 PCI: 00:16.3: enabled 0
630 15:37:13.944665 PCI: 00:16.4: enabled 0
631 15:37:13.944725 PCI: 00:16.5: enabled 0
632 15:37:13.944785 PCI: 00:17.0: enabled 1
633 15:37:13.944845 PCI: 00:19.0: enabled 0
634 15:37:13.944904 PCI: 00:19.1: enabled 1
635 15:37:13.944964 PCI: 00:19.2: enabled 0
636 15:37:13.945024 PCI: 00:1c.0: enabled 1
637 15:37:13.945084 PCI: 00:1c.1: enabled 0
638 15:37:13.945142 PCI: 00:1c.2: enabled 0
639 15:37:13.945202 PCI: 00:1c.3: enabled 0
640 15:37:13.945262 PCI: 00:1c.4: enabled 0
641 15:37:13.945322 PCI: 00:1c.5: enabled 0
642 15:37:13.945382 PCI: 00:1c.6: enabled 1
643 15:37:13.945442 PCI: 00:1c.7: enabled 0
644 15:37:13.945502 PCI: 00:1d.0: enabled 1
645 15:37:13.945562 PCI: 00:1d.1: enabled 0
646 15:37:13.945822 PCI: 00:1d.2: enabled 1
647 15:37:13.945889 PCI: 00:1d.3: enabled 0
648 15:37:13.945963 PCI: 00:1e.0: enabled 1
649 15:37:13.946024 PCI: 00:1e.1: enabled 0
650 15:37:13.946085 PCI: 00:1e.2: enabled 1
651 15:37:13.946145 PCI: 00:1e.3: enabled 1
652 15:37:13.946204 PCI: 00:1f.0: enabled 1
653 15:37:13.946264 PCI: 00:1f.1: enabled 0
654 15:37:13.946325 PCI: 00:1f.2: enabled 1
655 15:37:13.946385 PCI: 00:1f.3: enabled 1
656 15:37:13.946445 PCI: 00:1f.4: enabled 0
657 15:37:13.946505 PCI: 00:1f.5: enabled 1
658 15:37:13.946565 PCI: 00:1f.6: enabled 0
659 15:37:13.946624 PCI: 00:1f.7: enabled 0
660 15:37:13.946683 APIC: 00: enabled 1
661 15:37:13.946743 GENERIC: 0.0: enabled 1
662 15:37:13.946802 GENERIC: 0.0: enabled 1
663 15:37:13.946862 GENERIC: 1.0: enabled 1
664 15:37:13.946922 GENERIC: 0.0: enabled 1
665 15:37:13.946981 GENERIC: 1.0: enabled 1
666 15:37:13.947051 USB0 port 0: enabled 1
667 15:37:13.947104 GENERIC: 0.0: enabled 1
668 15:37:13.947157 USB0 port 0: enabled 1
669 15:37:13.947211 GENERIC: 0.0: enabled 1
670 15:37:13.947265 I2C: 00:1a: enabled 1
671 15:37:13.947320 I2C: 00:31: enabled 1
672 15:37:13.947374 I2C: 00:32: enabled 1
673 15:37:13.947428 I2C: 00:10: enabled 1
674 15:37:13.947482 I2C: 00:15: enabled 1
675 15:37:13.947536 GENERIC: 0.0: enabled 0
676 15:37:13.947590 GENERIC: 1.0: enabled 0
677 15:37:13.947653 GENERIC: 0.0: enabled 1
678 15:37:13.947706 SPI: 00: enabled 1
679 15:37:13.947760 SPI: 00: enabled 1
680 15:37:13.947814 PNP: 0c09.0: enabled 1
681 15:37:13.947870 GENERIC: 0.0: enabled 1
682 15:37:13.947924 USB3 port 0: enabled 1
683 15:37:13.947977 USB3 port 1: enabled 1
684 15:37:13.948030 USB3 port 2: enabled 0
685 15:37:13.948085 USB3 port 3: enabled 0
686 15:37:13.948139 USB2 port 0: enabled 0
687 15:37:13.948191 USB2 port 1: enabled 1
688 15:37:13.948245 USB2 port 2: enabled 1
689 15:37:13.948299 USB2 port 3: enabled 0
690 15:37:13.948353 USB2 port 4: enabled 1
691 15:37:13.948406 USB2 port 5: enabled 0
692 15:37:13.948460 USB2 port 6: enabled 0
693 15:37:13.948514 USB2 port 7: enabled 0
694 15:37:13.948567 USB2 port 8: enabled 0
695 15:37:13.948621 USB2 port 9: enabled 0
696 15:37:13.948676 USB3 port 0: enabled 0
697 15:37:13.948730 USB3 port 1: enabled 1
698 15:37:13.948783 USB3 port 2: enabled 0
699 15:37:13.948837 USB3 port 3: enabled 0
700 15:37:13.948891 GENERIC: 0.0: enabled 1
701 15:37:13.948945 GENERIC: 1.0: enabled 1
702 15:37:13.949000 APIC: 01: enabled 1
703 15:37:13.949053 APIC: 03: enabled 1
704 15:37:13.949107 APIC: 05: enabled 1
705 15:37:13.949160 APIC: 07: enabled 1
706 15:37:13.949224 APIC: 06: enabled 1
707 15:37:13.949279 APIC: 02: enabled 1
708 15:37:13.949333 APIC: 04: enabled 1
709 15:37:13.949386 Compare with tree...
710 15:37:13.949441 Root Device: enabled 1
711 15:37:13.949495 DOMAIN: 0000: enabled 1
712 15:37:13.949550 PCI: 00:00.0: enabled 1
713 15:37:13.949604 PCI: 00:02.0: enabled 1
714 15:37:13.949658 PCI: 00:04.0: enabled 1
715 15:37:13.949712 GENERIC: 0.0: enabled 1
716 15:37:13.949766 PCI: 00:05.0: enabled 1
717 15:37:13.949820 PCI: 00:06.0: enabled 0
718 15:37:13.949875 PCI: 00:07.0: enabled 0
719 15:37:13.949929 GENERIC: 0.0: enabled 1
720 15:37:13.949982 PCI: 00:07.1: enabled 0
721 15:37:13.950036 GENERIC: 1.0: enabled 1
722 15:37:13.950091 PCI: 00:07.2: enabled 0
723 15:37:13.950145 GENERIC: 0.0: enabled 1
724 15:37:13.950198 PCI: 00:07.3: enabled 0
725 15:37:13.950252 GENERIC: 1.0: enabled 1
726 15:37:13.950307 PCI: 00:08.0: enabled 1
727 15:37:13.950361 PCI: 00:09.0: enabled 0
728 15:37:13.950416 PCI: 00:0a.0: enabled 0
729 15:37:13.950470 PCI: 00:0d.0: enabled 1
730 15:37:13.950524 USB0 port 0: enabled 1
731 15:37:13.950577 USB3 port 0: enabled 1
732 15:37:13.950631 USB3 port 1: enabled 1
733 15:37:13.950685 USB3 port 2: enabled 0
734 15:37:13.950739 USB3 port 3: enabled 0
735 15:37:13.950792 PCI: 00:0d.1: enabled 0
736 15:37:13.950846 PCI: 00:0d.2: enabled 0
737 15:37:13.950899 GENERIC: 0.0: enabled 1
738 15:37:13.950953 PCI: 00:0d.3: enabled 0
739 15:37:13.951006 PCI: 00:0e.0: enabled 0
740 15:37:13.951059 PCI: 00:10.2: enabled 1
741 15:37:13.951113 PCI: 00:10.6: enabled 0
742 15:37:13.951168 PCI: 00:10.7: enabled 0
743 15:37:13.951223 PCI: 00:12.0: enabled 0
744 15:37:13.951277 PCI: 00:12.6: enabled 0
745 15:37:13.951330 PCI: 00:13.0: enabled 0
746 15:37:13.951384 PCI: 00:14.0: enabled 1
747 15:37:13.951438 USB0 port 0: enabled 1
748 15:37:13.951491 USB2 port 0: enabled 0
749 15:37:13.951544 USB2 port 1: enabled 1
750 15:37:13.951604 USB2 port 2: enabled 1
751 15:37:13.951660 USB2 port 3: enabled 0
752 15:37:13.951714 USB2 port 4: enabled 1
753 15:37:13.951768 USB2 port 5: enabled 0
754 15:37:13.951823 USB2 port 6: enabled 0
755 15:37:13.951876 USB2 port 7: enabled 0
756 15:37:13.951929 USB2 port 8: enabled 0
757 15:37:13.951996 USB2 port 9: enabled 0
758 15:37:13.952045 USB3 port 0: enabled 0
759 15:37:13.952093 USB3 port 1: enabled 1
760 15:37:13.952142 USB3 port 2: enabled 0
761 15:37:13.952191 USB3 port 3: enabled 0
762 15:37:13.952239 PCI: 00:14.1: enabled 0
763 15:37:13.952289 PCI: 00:14.2: enabled 1
764 15:37:13.952338 PCI: 00:14.3: enabled 1
765 15:37:13.952387 GENERIC: 0.0: enabled 1
766 15:37:13.952436 PCI: 00:15.0: enabled 1
767 15:37:13.952485 I2C: 00:1a: enabled 1
768 15:37:13.952535 I2C: 00:31: enabled 1
769 15:37:13.952591 I2C: 00:32: enabled 1
770 15:37:13.952639 PCI: 00:15.1: enabled 1
771 15:37:13.952688 I2C: 00:10: enabled 1
772 15:37:13.952737 PCI: 00:15.2: enabled 1
773 15:37:13.952786 PCI: 00:15.3: enabled 1
774 15:37:13.952835 PCI: 00:16.0: enabled 1
775 15:37:13.952884 PCI: 00:16.1: enabled 0
776 15:37:13.952933 PCI: 00:16.2: enabled 0
777 15:37:13.952982 PCI: 00:16.3: enabled 0
778 15:37:13.953031 PCI: 00:16.4: enabled 0
779 15:37:13.953080 PCI: 00:16.5: enabled 0
780 15:37:13.953128 PCI: 00:17.0: enabled 1
781 15:37:13.953177 PCI: 00:19.0: enabled 0
782 15:37:13.953226 PCI: 00:19.1: enabled 1
783 15:37:13.953275 I2C: 00:15: enabled 1
784 15:37:13.953324 PCI: 00:19.2: enabled 0
785 15:37:13.953373 PCI: 00:1d.0: enabled 1
786 15:37:13.953421 GENERIC: 0.0: enabled 1
787 15:37:13.953470 PCI: 00:1e.0: enabled 1
788 15:37:13.953518 PCI: 00:1e.1: enabled 0
789 15:37:13.953567 PCI: 00:1e.2: enabled 1
790 15:37:13.953616 SPI: 00: enabled 1
791 15:37:13.953665 PCI: 00:1e.3: enabled 1
792 15:37:13.953714 SPI: 00: enabled 1
793 15:37:13.953762 PCI: 00:1f.0: enabled 1
794 15:37:13.953811 PNP: 0c09.0: enabled 1
795 15:37:13.953860 PCI: 00:1f.1: enabled 0
796 15:37:13.953909 PCI: 00:1f.2: enabled 1
797 15:37:13.953959 GENERIC: 0.0: enabled 1
798 15:37:13.954008 GENERIC: 0.0: enabled 1
799 15:37:13.954056 GENERIC: 1.0: enabled 1
800 15:37:13.954105 PCI: 00:1f.3: enabled 1
801 15:37:13.954154 PCI: 00:1f.4: enabled 0
802 15:37:13.954203 PCI: 00:1f.5: enabled 1
803 15:37:13.954252 PCI: 00:1f.6: enabled 0
804 15:37:13.954497 PCI: 00:1f.7: enabled 0
805 15:37:13.954554 CPU_CLUSTER: 0: enabled 1
806 15:37:13.954604 APIC: 00: enabled 1
807 15:37:13.954654 APIC: 01: enabled 1
808 15:37:13.954704 APIC: 03: enabled 1
809 15:37:13.954753 APIC: 05: enabled 1
810 15:37:13.954803 APIC: 07: enabled 1
811 15:37:13.954852 APIC: 06: enabled 1
812 15:37:13.954902 APIC: 02: enabled 1
813 15:37:13.954951 APIC: 04: enabled 1
814 15:37:13.955000 Root Device scanning...
815 15:37:13.955049 scan_static_bus for Root Device
816 15:37:13.955097 DOMAIN: 0000 enabled
817 15:37:13.955146 CPU_CLUSTER: 0 enabled
818 15:37:13.955195 DOMAIN: 0000 scanning...
819 15:37:13.955244 PCI: pci_scan_bus for bus 00
820 15:37:13.955294 PCI: 00:00.0 [8086/0000] ops
821 15:37:13.955343 PCI: 00:00.0 [8086/9a12] enabled
822 15:37:13.955392 PCI: 00:02.0 [8086/0000] bus ops
823 15:37:13.955441 PCI: 00:02.0 [8086/9a40] enabled
824 15:37:13.955490 PCI: 00:04.0 [8086/0000] bus ops
825 15:37:13.955540 PCI: 00:04.0 [8086/9a03] enabled
826 15:37:13.955588 PCI: 00:05.0 [8086/9a19] enabled
827 15:37:13.955647 PCI: 00:07.0 [0000/0000] hidden
828 15:37:13.955696 PCI: 00:08.0 [8086/9a11] enabled
829 15:37:13.955745 PCI: 00:0a.0 [8086/9a0d] disabled
830 15:37:13.955795 PCI: 00:0d.0 [8086/0000] bus ops
831 15:37:13.955844 PCI: 00:0d.0 [8086/9a13] enabled
832 15:37:13.955893 PCI: 00:14.0 [8086/0000] bus ops
833 15:37:13.955951 PCI: 00:14.0 [8086/a0ed] enabled
834 15:37:13.956002 PCI: 00:14.2 [8086/a0ef] enabled
835 15:37:13.956051 PCI: 00:14.3 [8086/0000] bus ops
836 15:37:13.956099 PCI: 00:14.3 [8086/a0f0] enabled
837 15:37:13.956148 PCI: 00:15.0 [8086/0000] bus ops
838 15:37:13.956198 PCI: 00:15.0 [8086/a0e8] enabled
839 15:37:13.956247 PCI: 00:15.1 [8086/0000] bus ops
840 15:37:13.956296 PCI: 00:15.1 [8086/a0e9] enabled
841 15:37:13.956345 PCI: 00:15.2 [8086/0000] bus ops
842 15:37:13.956395 PCI: 00:15.2 [8086/a0ea] enabled
843 15:37:13.956444 PCI: 00:15.3 [8086/0000] bus ops
844 15:37:13.956493 PCI: 00:15.3 [8086/a0eb] enabled
845 15:37:13.956542 PCI: 00:16.0 [8086/0000] ops
846 15:37:13.956591 PCI: 00:16.0 [8086/a0e0] enabled
847 15:37:13.956641 PCI: Static device PCI: 00:17.0 not found, disabling it.
848 15:37:13.956691 PCI: 00:19.0 [8086/0000] bus ops
849 15:37:13.956741 PCI: 00:19.0 [8086/a0c5] disabled
850 15:37:13.956790 PCI: 00:19.1 [8086/0000] bus ops
851 15:37:13.956839 PCI: 00:19.1 [8086/a0c6] enabled
852 15:37:13.956888 PCI: 00:1d.0 [8086/0000] bus ops
853 15:37:13.956938 PCI: 00:1d.0 [8086/a0b0] enabled
854 15:37:13.956987 PCI: 00:1e.0 [8086/0000] ops
855 15:37:13.957048 PCI: 00:1e.0 [8086/a0a8] enabled
856 15:37:13.957095 PCI: 00:1e.2 [8086/0000] bus ops
857 15:37:13.957142 PCI: 00:1e.2 [8086/a0aa] enabled
858 15:37:13.957190 PCI: 00:1e.3 [8086/0000] bus ops
859 15:37:13.957237 PCI: 00:1e.3 [8086/a0ab] enabled
860 15:37:13.957284 PCI: 00:1f.0 [8086/0000] bus ops
861 15:37:13.957331 PCI: 00:1f.0 [8086/a087] enabled
862 15:37:13.957378 RTC Init
863 15:37:13.957425 Set power on after power failure.
864 15:37:13.957473 Disabling Deep S3
865 15:37:13.957519 Disabling Deep S3
866 15:37:13.957566 Disabling Deep S4
867 15:37:13.957613 Disabling Deep S4
868 15:37:13.957660 Disabling Deep S5
869 15:37:13.957707 Disabling Deep S5
870 15:37:13.957753 PCI: 00:1f.2 [0000/0000] hidden
871 15:37:13.957800 PCI: 00:1f.3 [8086/0000] bus ops
872 15:37:13.957848 PCI: 00:1f.3 [8086/a0c8] enabled
873 15:37:13.957895 PCI: 00:1f.5 [8086/0000] bus ops
874 15:37:13.957942 PCI: 00:1f.5 [8086/a0a4] enabled
875 15:37:13.957989 PCI: Leftover static devices:
876 15:37:13.958036 PCI: 00:10.2
877 15:37:13.958083 PCI: 00:10.6
878 15:37:13.958130 PCI: 00:10.7
879 15:37:13.958176 PCI: 00:06.0
880 15:37:13.958223 PCI: 00:07.1
881 15:37:13.958270 PCI: 00:07.2
882 15:37:13.958317 PCI: 00:07.3
883 15:37:13.958364 PCI: 00:09.0
884 15:37:13.958410 PCI: 00:0d.1
885 15:37:13.958457 PCI: 00:0d.2
886 15:37:13.958504 PCI: 00:0d.3
887 15:37:13.958550 PCI: 00:0e.0
888 15:37:13.958597 PCI: 00:12.0
889 15:37:13.958644 PCI: 00:12.6
890 15:37:13.958691 PCI: 00:13.0
891 15:37:13.958738 PCI: 00:14.1
892 15:37:13.958785 PCI: 00:16.1
893 15:37:13.958832 PCI: 00:16.2
894 15:37:13.958879 PCI: 00:16.3
895 15:37:13.958925 PCI: 00:16.4
896 15:37:13.958971 PCI: 00:16.5
897 15:37:13.959018 PCI: 00:17.0
898 15:37:13.959064 PCI: 00:19.2
899 15:37:13.959111 PCI: 00:1e.1
900 15:37:13.959157 PCI: 00:1f.1
901 15:37:13.959209 PCI: 00:1f.4
902 15:37:13.959258 PCI: 00:1f.6
903 15:37:13.959304 PCI: 00:1f.7
904 15:37:13.959351 PCI: Check your devicetree.cb.
905 15:37:13.959398 PCI: 00:02.0 scanning...
906 15:37:13.959445 scan_generic_bus for PCI: 00:02.0
907 15:37:13.959491 scan_generic_bus for PCI: 00:02.0 done
908 15:37:13.959539 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
909 15:37:13.959586 PCI: 00:04.0 scanning...
910 15:37:13.959638 scan_generic_bus for PCI: 00:04.0
911 15:37:13.959685 GENERIC: 0.0 enabled
912 15:37:13.959731 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
913 15:37:13.959778 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
914 15:37:13.959826 PCI: 00:0d.0 scanning...
915 15:37:13.959873 scan_static_bus for PCI: 00:0d.0
916 15:37:13.959919 USB0 port 0 enabled
917 15:37:13.959966 USB0 port 0 scanning...
918 15:37:13.960012 scan_static_bus for USB0 port 0
919 15:37:13.960058 USB3 port 0 enabled
920 15:37:13.960104 USB3 port 1 enabled
921 15:37:13.960151 USB3 port 2 disabled
922 15:37:13.960197 USB3 port 3 disabled
923 15:37:13.960244 USB3 port 0 scanning...
924 15:37:13.960290 scan_static_bus for USB3 port 0
925 15:37:13.960338 scan_static_bus for USB3 port 0 done
926 15:37:13.960385 scan_bus: bus USB3 port 0 finished in 6 msecs
927 15:37:13.960432 USB3 port 1 scanning...
928 15:37:13.960478 scan_static_bus for USB3 port 1
929 15:37:13.960525 scan_static_bus for USB3 port 1 done
930 15:37:13.960572 scan_bus: bus USB3 port 1 finished in 6 msecs
931 15:37:13.960619 scan_static_bus for USB0 port 0 done
932 15:37:13.960666 scan_bus: bus USB0 port 0 finished in 43 msecs
933 15:37:13.960714 scan_static_bus for PCI: 00:0d.0 done
934 15:37:13.960761 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
935 15:37:13.960807 PCI: 00:14.0 scanning...
936 15:37:13.960854 scan_static_bus for PCI: 00:14.0
937 15:37:13.960900 USB0 port 0 enabled
938 15:37:13.960947 USB0 port 0 scanning...
939 15:37:13.960994 scan_static_bus for USB0 port 0
940 15:37:13.961042 USB2 port 0 disabled
941 15:37:13.961088 USB2 port 1 enabled
942 15:37:13.961135 USB2 port 2 enabled
943 15:37:13.961182 USB2 port 3 disabled
944 15:37:13.961228 USB2 port 4 enabled
945 15:37:13.961274 USB2 port 5 disabled
946 15:37:13.961320 USB2 port 6 disabled
947 15:37:13.961366 USB2 port 7 disabled
948 15:37:13.961413 USB2 port 8 disabled
949 15:37:13.961460 USB2 port 9 disabled
950 15:37:13.961506 USB3 port 0 disabled
951 15:37:13.961553 USB3 port 1 enabled
952 15:37:13.961599 USB3 port 2 disabled
953 15:37:13.961645 USB3 port 3 disabled
954 15:37:13.961888 USB2 port 1 scanning...
955 15:37:13.961941 scan_static_bus for USB2 port 1
956 15:37:13.961989 scan_static_bus for USB2 port 1 done
957 15:37:13.962037 scan_bus: bus USB2 port 1 finished in 6 msecs
958 15:37:13.962085 USB2 port 2 scanning...
959 15:37:13.962131 scan_static_bus for USB2 port 2
960 15:37:13.962178 scan_static_bus for USB2 port 2 done
961 15:37:13.962224 scan_bus: bus USB2 port 2 finished in 6 msecs
962 15:37:13.962271 USB2 port 4 scanning...
963 15:37:13.962326 scan_static_bus for USB2 port 4
964 15:37:13.962375 scan_static_bus for USB2 port 4 done
965 15:37:13.962422 scan_bus: bus USB2 port 4 finished in 6 msecs
966 15:37:13.962470 USB3 port 1 scanning...
967 15:37:13.962517 scan_static_bus for USB3 port 1
968 15:37:13.962564 scan_static_bus for USB3 port 1 done
969 15:37:13.962610 scan_bus: bus USB3 port 1 finished in 6 msecs
970 15:37:13.962658 scan_static_bus for USB0 port 0 done
971 15:37:13.962705 scan_bus: bus USB0 port 0 finished in 93 msecs
972 15:37:13.962752 scan_static_bus for PCI: 00:14.0 done
973 15:37:13.962799 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
974 15:37:13.962847 PCI: 00:14.3 scanning...
975 15:37:13.962894 scan_static_bus for PCI: 00:14.3
976 15:37:13.962941 GENERIC: 0.0 enabled
977 15:37:13.962988 scan_static_bus for PCI: 00:14.3 done
978 15:37:13.963035 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
979 15:37:13.963082 PCI: 00:15.0 scanning...
980 15:37:13.963129 scan_static_bus for PCI: 00:15.0
981 15:37:13.963176 I2C: 00:1a enabled
982 15:37:13.963222 I2C: 00:31 enabled
983 15:37:13.963268 I2C: 00:32 enabled
984 15:37:13.963315 scan_static_bus for PCI: 00:15.0 done
985 15:37:13.963362 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
986 15:37:13.963409 PCI: 00:15.1 scanning...
987 15:37:13.963456 scan_static_bus for PCI: 00:15.1
988 15:37:13.963503 I2C: 00:10 enabled
989 15:37:13.963549 scan_static_bus for PCI: 00:15.1 done
990 15:37:13.963596 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
991 15:37:13.963687 PCI: 00:15.2 scanning...
992 15:37:13.963733 scan_static_bus for PCI: 00:15.2
993 15:37:13.963780 scan_static_bus for PCI: 00:15.2 done
994 15:37:13.963827 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
995 15:37:13.963873 PCI: 00:15.3 scanning...
996 15:37:13.963920 scan_static_bus for PCI: 00:15.3
997 15:37:13.963966 scan_static_bus for PCI: 00:15.3 done
998 15:37:13.964012 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
999 15:37:13.964059 PCI: 00:19.1 scanning...
1000 15:37:13.964106 scan_static_bus for PCI: 00:19.1
1001 15:37:13.964152 I2C: 00:15 enabled
1002 15:37:13.964198 scan_static_bus for PCI: 00:19.1 done
1003 15:37:13.964245 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1004 15:37:13.964291 PCI: 00:1d.0 scanning...
1005 15:37:13.964339 do_pci_scan_bridge for PCI: 00:1d.0
1006 15:37:13.964386 PCI: pci_scan_bus for bus 01
1007 15:37:13.964433 PCI: 01:00.0 [1c5c/174a] enabled
1008 15:37:13.964480 GENERIC: 0.0 enabled
1009 15:37:13.964528 Enabling Common Clock Configuration
1010 15:37:13.964575 L1 Sub-State supported from root port 29
1011 15:37:13.964621 L1 Sub-State Support = 0xf
1012 15:37:13.964668 CommonModeRestoreTime = 0x28
1013 15:37:13.964715 Power On Value = 0x16, Power On Scale = 0x0
1014 15:37:13.964763 ASPM: Enabled L1
1015 15:37:13.964810 PCIe: Max_Payload_Size adjusted to 128
1016 15:37:13.964857 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1017 15:37:13.964905 PCI: 00:1e.2 scanning...
1018 15:37:13.964952 scan_generic_bus for PCI: 00:1e.2
1019 15:37:13.964999 SPI: 00 enabled
1020 15:37:13.965044 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1021 15:37:13.965091 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1022 15:37:13.965140 PCI: 00:1e.3 scanning...
1023 15:37:13.965187 scan_generic_bus for PCI: 00:1e.3
1024 15:37:13.965235 SPI: 00 enabled
1025 15:37:13.965282 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1026 15:37:13.965330 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1027 15:37:13.965377 PCI: 00:1f.0 scanning...
1028 15:37:13.965423 scan_static_bus for PCI: 00:1f.0
1029 15:37:13.965469 PNP: 0c09.0 enabled
1030 15:37:13.965516 PNP: 0c09.0 scanning...
1031 15:37:13.965563 scan_static_bus for PNP: 0c09.0
1032 15:37:13.965610 scan_static_bus for PNP: 0c09.0 done
1033 15:37:13.965657 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1034 15:37:13.965704 scan_static_bus for PCI: 00:1f.0 done
1035 15:37:13.965750 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1036 15:37:13.965797 PCI: 00:1f.2 scanning...
1037 15:37:13.965844 scan_static_bus for PCI: 00:1f.2
1038 15:37:13.965890 GENERIC: 0.0 enabled
1039 15:37:13.965942 GENERIC: 0.0 scanning...
1040 15:37:13.965990 scan_static_bus for GENERIC: 0.0
1041 15:37:13.966037 GENERIC: 0.0 enabled
1042 15:37:13.966084 GENERIC: 1.0 enabled
1043 15:37:13.966130 scan_static_bus for GENERIC: 0.0 done
1044 15:37:13.966177 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1045 15:37:13.966224 scan_static_bus for PCI: 00:1f.2 done
1046 15:37:13.966271 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1047 15:37:13.966318 PCI: 00:1f.3 scanning...
1048 15:37:13.966363 scan_static_bus for PCI: 00:1f.3
1049 15:37:13.966410 scan_static_bus for PCI: 00:1f.3 done
1050 15:37:13.966457 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1051 15:37:13.966504 PCI: 00:1f.5 scanning...
1052 15:37:13.966550 scan_generic_bus for PCI: 00:1f.5
1053 15:37:13.966596 scan_generic_bus for PCI: 00:1f.5 done
1054 15:37:13.966643 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1055 15:37:13.966690 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1056 15:37:13.966737 scan_static_bus for Root Device done
1057 15:37:13.966784 scan_bus: bus Root Device finished in 736 msecs
1058 15:37:13.966831 done
1059 15:37:13.966877 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1060 15:37:13.966924 Chrome EC: UHEPI supported
1061 15:37:13.966971 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1062 15:37:13.967019 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1063 15:37:13.967067 SPI flash protection: WPSW=0 SRP0=0
1064 15:37:13.967114 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1065 15:37:13.967161 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1066 15:37:13.967208 found VGA at PCI: 00:02.0
1067 15:37:13.967255 Setting up VGA for PCI: 00:02.0
1068 15:37:13.967491 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1069 15:37:13.967544 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1070 15:37:13.967592 Allocating resources...
1071 15:37:13.967681 Reading resources...
1072 15:37:13.967728 Root Device read_resources bus 0 link: 0
1073 15:37:13.967776 DOMAIN: 0000 read_resources bus 0 link: 0
1074 15:37:13.967823 PCI: 00:04.0 read_resources bus 1 link: 0
1075 15:37:13.967870 PCI: 00:04.0 read_resources bus 1 link: 0 done
1076 15:37:13.967917 PCI: 00:0d.0 read_resources bus 0 link: 0
1077 15:37:13.967964 USB0 port 0 read_resources bus 0 link: 0
1078 15:37:13.968011 USB0 port 0 read_resources bus 0 link: 0 done
1079 15:37:13.968059 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1080 15:37:13.968106 PCI: 00:14.0 read_resources bus 0 link: 0
1081 15:37:13.968153 USB0 port 0 read_resources bus 0 link: 0
1082 15:37:13.968200 USB0 port 0 read_resources bus 0 link: 0 done
1083 15:37:13.968247 PCI: 00:14.0 read_resources bus 0 link: 0 done
1084 15:37:13.968293 PCI: 00:14.3 read_resources bus 0 link: 0
1085 15:37:13.968341 PCI: 00:14.3 read_resources bus 0 link: 0 done
1086 15:37:13.968388 PCI: 00:15.0 read_resources bus 0 link: 0
1087 15:37:13.968436 PCI: 00:15.0 read_resources bus 0 link: 0 done
1088 15:37:13.968484 PCI: 00:15.1 read_resources bus 0 link: 0
1089 15:37:13.968531 PCI: 00:15.1 read_resources bus 0 link: 0 done
1090 15:37:13.968579 PCI: 00:19.1 read_resources bus 0 link: 0
1091 15:37:13.968626 PCI: 00:19.1 read_resources bus 0 link: 0 done
1092 15:37:13.968673 PCI: 00:1d.0 read_resources bus 1 link: 0
1093 15:37:13.968721 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1094 15:37:13.968768 PCI: 00:1e.2 read_resources bus 2 link: 0
1095 15:37:13.968818 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1096 15:37:13.968870 PCI: 00:1e.3 read_resources bus 3 link: 0
1097 15:37:13.968918 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1098 15:37:13.968965 PCI: 00:1f.0 read_resources bus 0 link: 0
1099 15:37:13.969012 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1100 15:37:13.969060 PCI: 00:1f.2 read_resources bus 0 link: 0
1101 15:37:13.969111 GENERIC: 0.0 read_resources bus 0 link: 0
1102 15:37:13.969167 GENERIC: 0.0 read_resources bus 0 link: 0 done
1103 15:37:13.969215 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1104 15:37:13.969263 DOMAIN: 0000 read_resources bus 0 link: 0 done
1105 15:37:13.969310 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1106 15:37:13.969357 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1107 15:37:13.969405 Root Device read_resources bus 0 link: 0 done
1108 15:37:13.969451 Done reading resources.
1109 15:37:13.969499 Show resources in subtree (Root Device)...After reading.
1110 15:37:13.969547 Root Device child on link 0 DOMAIN: 0000
1111 15:37:13.969594 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1112 15:37:13.969642 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1113 15:37:13.969690 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1114 15:37:13.969739 PCI: 00:00.0
1115 15:37:13.969786 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1116 15:37:13.969835 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1117 15:37:13.969883 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1118 15:37:13.969931 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1119 15:37:13.969979 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1120 15:37:13.970027 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1121 15:37:13.970075 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1122 15:37:13.970123 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1123 15:37:13.970171 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1124 15:37:13.970219 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1125 15:37:13.970267 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1126 15:37:13.970316 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1127 15:37:13.970364 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1128 15:37:13.970412 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1129 15:37:13.970460 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1130 15:37:13.970508 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1131 15:37:13.970556 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1132 15:37:13.970604 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1133 15:37:13.970653 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1134 15:37:13.970893 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1135 15:37:13.970950 PCI: 00:02.0
1136 15:37:13.970998 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1137 15:37:13.971046 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1138 15:37:13.971095 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1139 15:37:13.971143 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1140 15:37:13.971190 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1141 15:37:13.971238 GENERIC: 0.0
1142 15:37:13.971284 PCI: 00:05.0
1143 15:37:13.971331 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1144 15:37:13.971379 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1145 15:37:13.971427 GENERIC: 0.0
1146 15:37:13.971474 PCI: 00:08.0
1147 15:37:13.971522 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 15:37:13.971571 PCI: 00:0a.0
1149 15:37:13.971657 PCI: 00:0d.0 child on link 0 USB0 port 0
1150 15:37:13.971706 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1151 15:37:13.971754 USB0 port 0 child on link 0 USB3 port 0
1152 15:37:13.971801 USB3 port 0
1153 15:37:13.971847 USB3 port 1
1154 15:37:13.971894 USB3 port 2
1155 15:37:13.971941 USB3 port 3
1156 15:37:13.971989 PCI: 00:14.0 child on link 0 USB0 port 0
1157 15:37:13.972035 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1158 15:37:13.972083 USB0 port 0 child on link 0 USB2 port 0
1159 15:37:13.972130 USB2 port 0
1160 15:37:13.972184 USB2 port 1
1161 15:37:13.972231 USB2 port 2
1162 15:37:13.972277 USB2 port 3
1163 15:37:13.972323 USB2 port 4
1164 15:37:13.972369 USB2 port 5
1165 15:37:13.972415 USB2 port 6
1166 15:37:13.972462 USB2 port 7
1167 15:37:13.972508 USB2 port 8
1168 15:37:13.972555 USB2 port 9
1169 15:37:13.972602 USB3 port 0
1170 15:37:13.972648 USB3 port 1
1171 15:37:13.972695 USB3 port 2
1172 15:37:13.972741 USB3 port 3
1173 15:37:13.972787 PCI: 00:14.2
1174 15:37:13.972833 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1175 15:37:13.972881 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1176 15:37:13.972929 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1177 15:37:13.972976 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1178 15:37:13.973034 GENERIC: 0.0
1179 15:37:13.976087 PCI: 00:15.0 child on link 0 I2C: 00:1a
1180 15:37:13.986041 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1181 15:37:13.989497 I2C: 00:1a
1182 15:37:13.989726 I2C: 00:31
1183 15:37:13.992696 I2C: 00:32
1184 15:37:13.996102 PCI: 00:15.1 child on link 0 I2C: 00:10
1185 15:37:14.006479 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1186 15:37:14.006778 I2C: 00:10
1187 15:37:14.009312 PCI: 00:15.2
1188 15:37:14.019487 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1189 15:37:14.019746 PCI: 00:15.3
1190 15:37:14.029297 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 15:37:14.032701 PCI: 00:16.0
1192 15:37:14.042567 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 15:37:14.043026 PCI: 00:19.0
1194 15:37:14.049286 PCI: 00:19.1 child on link 0 I2C: 00:15
1195 15:37:14.059293 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 15:37:14.059846 I2C: 00:15
1197 15:37:14.063030 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1198 15:37:14.073151 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1199 15:37:14.082898 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1200 15:37:14.092693 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1201 15:37:14.093208 GENERIC: 0.0
1202 15:37:14.095883 PCI: 01:00.0
1203 15:37:14.106422 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1204 15:37:14.115851 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1205 15:37:14.122257 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1206 15:37:14.125944 PCI: 00:1e.0
1207 15:37:14.135875 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1208 15:37:14.142317 PCI: 00:1e.2 child on link 0 SPI: 00
1209 15:37:14.152761 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1210 15:37:14.153337 SPI: 00
1211 15:37:14.155443 PCI: 00:1e.3 child on link 0 SPI: 00
1212 15:37:14.165471 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1213 15:37:14.165968 SPI: 00
1214 15:37:14.172603 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1215 15:37:14.178675 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1216 15:37:14.182594 PNP: 0c09.0
1217 15:37:14.192487 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1218 15:37:14.195596 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1219 15:37:14.206325 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1220 15:37:14.215711 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1221 15:37:14.218923 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1222 15:37:14.219438 GENERIC: 0.0
1223 15:37:14.222053 GENERIC: 1.0
1224 15:37:14.225654 PCI: 00:1f.3
1225 15:37:14.235443 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1226 15:37:14.245108 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1227 15:37:14.245540 PCI: 00:1f.5
1228 15:37:14.255377 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1229 15:37:14.258500 CPU_CLUSTER: 0 child on link 0 APIC: 00
1230 15:37:14.261776 APIC: 00
1231 15:37:14.262183 APIC: 01
1232 15:37:14.262411 APIC: 03
1233 15:37:14.264970 APIC: 05
1234 15:37:14.265261 APIC: 07
1235 15:37:14.265487 APIC: 06
1236 15:37:14.268400 APIC: 02
1237 15:37:14.268619 APIC: 04
1238 15:37:14.278150 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1239 15:37:14.281731 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1240 15:37:14.288306 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1241 15:37:14.294809 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1242 15:37:14.298057 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1243 15:37:14.301598 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1244 15:37:14.308423 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1245 15:37:14.314897 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1246 15:37:14.321498 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1247 15:37:14.327968 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1248 15:37:14.338525 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1249 15:37:14.341773 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1250 15:37:14.351574 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1251 15:37:14.358395 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1252 15:37:14.364917 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1253 15:37:14.368190 DOMAIN: 0000: Resource ranges:
1254 15:37:14.371362 * Base: 1000, Size: 800, Tag: 100
1255 15:37:14.374900 * Base: 1900, Size: e700, Tag: 100
1256 15:37:14.381288 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1257 15:37:14.388151 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1258 15:37:14.394571 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1259 15:37:14.401421 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1260 15:37:14.411413 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1261 15:37:14.418051 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1262 15:37:14.424421 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1263 15:37:14.434475 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1264 15:37:14.441623 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1265 15:37:14.448033 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1266 15:37:14.458107 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1267 15:37:14.464656 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1268 15:37:14.471085 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1269 15:37:14.484735 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1270 15:37:14.487711 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1271 15:37:14.494526 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1272 15:37:14.504212 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1273 15:37:14.510926 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1274 15:37:14.517575 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1275 15:37:14.527590 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1276 15:37:14.534334 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1277 15:37:14.541122 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1278 15:37:14.551125 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1279 15:37:14.557426 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1280 15:37:14.563975 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1281 15:37:14.567416 DOMAIN: 0000: Resource ranges:
1282 15:37:14.573755 * Base: 7fc00000, Size: 40400000, Tag: 200
1283 15:37:14.577132 * Base: d0000000, Size: 28000000, Tag: 200
1284 15:37:14.580477 * Base: fa000000, Size: 1000000, Tag: 200
1285 15:37:14.583677 * Base: fb001000, Size: 2fff000, Tag: 200
1286 15:37:14.590605 * Base: fe010000, Size: 2e000, Tag: 200
1287 15:37:14.593869 * Base: fe03f000, Size: d41000, Tag: 200
1288 15:37:14.597121 * Base: fed88000, Size: 8000, Tag: 200
1289 15:37:14.600533 * Base: fed93000, Size: d000, Tag: 200
1290 15:37:14.607187 * Base: feda2000, Size: 1e000, Tag: 200
1291 15:37:14.610686 * Base: fede0000, Size: 1220000, Tag: 200
1292 15:37:14.613763 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1293 15:37:14.620384 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1294 15:37:14.627154 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1295 15:37:14.633554 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1296 15:37:14.640507 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1297 15:37:14.647203 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1298 15:37:14.653907 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1299 15:37:14.660206 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1300 15:37:14.667290 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1301 15:37:14.673369 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1302 15:37:14.679579 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1303 15:37:14.686950 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1304 15:37:14.693244 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1305 15:37:14.699672 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1306 15:37:14.706426 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1307 15:37:14.712977 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1308 15:37:14.719785 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1309 15:37:14.726429 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1310 15:37:14.733370 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1311 15:37:14.739941 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1312 15:37:14.746497 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1313 15:37:14.753298 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1314 15:37:14.759736 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1315 15:37:14.769887 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1316 15:37:14.776249 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1317 15:37:14.779745 PCI: 00:1d.0: Resource ranges:
1318 15:37:14.783052 * Base: 7fc00000, Size: 100000, Tag: 200
1319 15:37:14.789489 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1320 15:37:14.796166 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1321 15:37:14.803111 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1322 15:37:14.812747 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1323 15:37:14.819434 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1324 15:37:14.822750 Root Device assign_resources, bus 0 link: 0
1325 15:37:14.829160 DOMAIN: 0000 assign_resources, bus 0 link: 0
1326 15:37:14.835771 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1327 15:37:14.846363 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1328 15:37:14.852631 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1329 15:37:14.862629 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1330 15:37:14.866227 PCI: 00:04.0 assign_resources, bus 1 link: 0
1331 15:37:14.869197 PCI: 00:04.0 assign_resources, bus 1 link: 0
1332 15:37:14.879273 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1333 15:37:14.885824 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1334 15:37:14.895728 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1335 15:37:14.899388 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1336 15:37:14.906061 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1337 15:37:14.912505 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1338 15:37:14.915942 PCI: 00:14.0 assign_resources, bus 0 link: 0
1339 15:37:14.922735 PCI: 00:14.0 assign_resources, bus 0 link: 0
1340 15:37:14.929617 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1341 15:37:14.938960 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1342 15:37:14.945743 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1343 15:37:14.952260 PCI: 00:14.3 assign_resources, bus 0 link: 0
1344 15:37:14.955853 PCI: 00:14.3 assign_resources, bus 0 link: 0
1345 15:37:14.965466 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1346 15:37:14.968852 PCI: 00:15.0 assign_resources, bus 0 link: 0
1347 15:37:14.972062 PCI: 00:15.0 assign_resources, bus 0 link: 0
1348 15:37:14.982121 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1349 15:37:14.985416 PCI: 00:15.1 assign_resources, bus 0 link: 0
1350 15:37:14.992154 PCI: 00:15.1 assign_resources, bus 0 link: 0
1351 15:37:14.998786 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1352 15:37:15.008727 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1353 15:37:15.015896 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1354 15:37:15.025558 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1355 15:37:15.028342 PCI: 00:19.1 assign_resources, bus 0 link: 0
1356 15:37:15.032062 PCI: 00:19.1 assign_resources, bus 0 link: 0
1357 15:37:15.042010 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1358 15:37:15.051533 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1359 15:37:15.061903 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1360 15:37:15.065043 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1361 15:37:15.071657 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1362 15:37:15.081841 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1363 15:37:15.088790 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1364 15:37:15.095241 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1365 15:37:15.101970 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1366 15:37:15.104504 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1367 15:37:15.111796 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1368 15:37:15.118420 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1369 15:37:15.125021 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1370 15:37:15.127855 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1371 15:37:15.135099 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1372 15:37:15.137898 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1373 15:37:15.141334 LPC: Trying to open IO window from 800 size 1ff
1374 15:37:15.151845 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1375 15:37:15.158365 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1376 15:37:15.168357 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1377 15:37:15.172077 DOMAIN: 0000 assign_resources, bus 0 link: 0
1378 15:37:15.178574 Root Device assign_resources, bus 0 link: 0
1379 15:37:15.179075 Done setting resources.
1380 15:37:15.185131 Show resources in subtree (Root Device)...After assigning values.
1381 15:37:15.191234 Root Device child on link 0 DOMAIN: 0000
1382 15:37:15.194977 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1383 15:37:15.205053 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1384 15:37:15.215216 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1385 15:37:15.215783 PCI: 00:00.0
1386 15:37:15.224634 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1387 15:37:15.234482 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1388 15:37:15.244433 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1389 15:37:15.254007 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1390 15:37:15.261181 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1391 15:37:15.270936 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1392 15:37:15.280977 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1393 15:37:15.290696 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1394 15:37:15.300919 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1395 15:37:15.310812 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1396 15:37:15.317231 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1397 15:37:15.327370 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1398 15:37:15.337075 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1399 15:37:15.347451 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1400 15:37:15.356920 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1401 15:37:15.363812 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1402 15:37:15.373991 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1403 15:37:15.383937 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1404 15:37:15.393549 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1405 15:37:15.403835 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1406 15:37:15.406845 PCI: 00:02.0
1407 15:37:15.416674 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1408 15:37:15.426826 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1409 15:37:15.437113 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1410 15:37:15.440363 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1411 15:37:15.450459 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1412 15:37:15.453246 GENERIC: 0.0
1413 15:37:15.453671 PCI: 00:05.0
1414 15:37:15.463717 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1415 15:37:15.469920 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1416 15:37:15.470465 GENERIC: 0.0
1417 15:37:15.472982 PCI: 00:08.0
1418 15:37:15.483074 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1419 15:37:15.483587 PCI: 00:0a.0
1420 15:37:15.490219 PCI: 00:0d.0 child on link 0 USB0 port 0
1421 15:37:15.500179 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1422 15:37:15.503762 USB0 port 0 child on link 0 USB3 port 0
1423 15:37:15.506660 USB3 port 0
1424 15:37:15.507086 USB3 port 1
1425 15:37:15.510246 USB3 port 2
1426 15:37:15.510791 USB3 port 3
1427 15:37:15.516862 PCI: 00:14.0 child on link 0 USB0 port 0
1428 15:37:15.526585 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1429 15:37:15.529609 USB0 port 0 child on link 0 USB2 port 0
1430 15:37:15.532989 USB2 port 0
1431 15:37:15.533411 USB2 port 1
1432 15:37:15.536169 USB2 port 2
1433 15:37:15.536595 USB2 port 3
1434 15:37:15.539439 USB2 port 4
1435 15:37:15.539991 USB2 port 5
1436 15:37:15.543332 USB2 port 6
1437 15:37:15.543889 USB2 port 7
1438 15:37:15.546352 USB2 port 8
1439 15:37:15.546833 USB2 port 9
1440 15:37:15.549683 USB3 port 0
1441 15:37:15.552835 USB3 port 1
1442 15:37:15.553286 USB3 port 2
1443 15:37:15.556310 USB3 port 3
1444 15:37:15.556734 PCI: 00:14.2
1445 15:37:15.566663 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1446 15:37:15.576066 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1447 15:37:15.582705 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1448 15:37:15.592853 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1449 15:37:15.593351 GENERIC: 0.0
1450 15:37:15.599339 PCI: 00:15.0 child on link 0 I2C: 00:1a
1451 15:37:15.609411 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1452 15:37:15.609913 I2C: 00:1a
1453 15:37:15.612576 I2C: 00:31
1454 15:37:15.613014 I2C: 00:32
1455 15:37:15.616229 PCI: 00:15.1 child on link 0 I2C: 00:10
1456 15:37:15.629034 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1457 15:37:15.629466 I2C: 00:10
1458 15:37:15.632984 PCI: 00:15.2
1459 15:37:15.642674 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1460 15:37:15.643186 PCI: 00:15.3
1461 15:37:15.652775 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1462 15:37:15.655714 PCI: 00:16.0
1463 15:37:15.666305 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1464 15:37:15.666821 PCI: 00:19.0
1465 15:37:15.672703 PCI: 00:19.1 child on link 0 I2C: 00:15
1466 15:37:15.682331 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1467 15:37:15.682854 I2C: 00:15
1468 15:37:15.689393 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1469 15:37:15.696132 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1470 15:37:15.709609 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1471 15:37:15.719464 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1472 15:37:15.722347 GENERIC: 0.0
1473 15:37:15.722771 PCI: 01:00.0
1474 15:37:15.732477 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1475 15:37:15.742119 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1476 15:37:15.755823 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1477 15:37:15.756349 PCI: 00:1e.0
1478 15:37:15.765952 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1479 15:37:15.772367 PCI: 00:1e.2 child on link 0 SPI: 00
1480 15:37:15.782209 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1481 15:37:15.782700 SPI: 00
1482 15:37:15.785185 PCI: 00:1e.3 child on link 0 SPI: 00
1483 15:37:15.795287 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1484 15:37:15.798375 SPI: 00
1485 15:37:15.801604 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1486 15:37:15.812039 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1487 15:37:15.812564 PNP: 0c09.0
1488 15:37:15.821959 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1489 15:37:15.825412 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1490 15:37:15.835021 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1491 15:37:15.844838 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1492 15:37:15.848242 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1493 15:37:15.851813 GENERIC: 0.0
1494 15:37:15.852253 GENERIC: 1.0
1495 15:37:15.854746 PCI: 00:1f.3
1496 15:37:15.865125 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1497 15:37:15.874650 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1498 15:37:15.877741 PCI: 00:1f.5
1499 15:37:15.887844 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1500 15:37:15.891216 CPU_CLUSTER: 0 child on link 0 APIC: 00
1501 15:37:15.891316 APIC: 00
1502 15:37:15.894658 APIC: 01
1503 15:37:15.894758 APIC: 03
1504 15:37:15.897890 APIC: 05
1505 15:37:15.898002 APIC: 07
1506 15:37:15.898087 APIC: 06
1507 15:37:15.901066 APIC: 02
1508 15:37:15.901188 APIC: 04
1509 15:37:15.904267 Done allocating resources.
1510 15:37:15.911298 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1511 15:37:15.917952 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1512 15:37:15.921509 Configure GPIOs for I2S audio on UP4.
1513 15:37:15.927755 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1514 15:37:15.931131 Enabling resources...
1515 15:37:15.934846 PCI: 00:00.0 subsystem <- 8086/9a12
1516 15:37:15.937751 PCI: 00:00.0 cmd <- 06
1517 15:37:15.941012 PCI: 00:02.0 subsystem <- 8086/9a40
1518 15:37:15.941397 PCI: 00:02.0 cmd <- 03
1519 15:37:15.947670 PCI: 00:04.0 subsystem <- 8086/9a03
1520 15:37:15.948056 PCI: 00:04.0 cmd <- 02
1521 15:37:15.950987 PCI: 00:05.0 subsystem <- 8086/9a19
1522 15:37:15.954383 PCI: 00:05.0 cmd <- 02
1523 15:37:15.957599 PCI: 00:08.0 subsystem <- 8086/9a11
1524 15:37:15.961429 PCI: 00:08.0 cmd <- 06
1525 15:37:15.964319 PCI: 00:0d.0 subsystem <- 8086/9a13
1526 15:37:15.967533 PCI: 00:0d.0 cmd <- 02
1527 15:37:15.971165 PCI: 00:14.0 subsystem <- 8086/a0ed
1528 15:37:15.974542 PCI: 00:14.0 cmd <- 02
1529 15:37:15.978128 PCI: 00:14.2 subsystem <- 8086/a0ef
1530 15:37:15.981086 PCI: 00:14.2 cmd <- 02
1531 15:37:15.984834 PCI: 00:14.3 subsystem <- 8086/a0f0
1532 15:37:15.985463 PCI: 00:14.3 cmd <- 02
1533 15:37:15.991052 PCI: 00:15.0 subsystem <- 8086/a0e8
1534 15:37:15.991439 PCI: 00:15.0 cmd <- 02
1535 15:37:15.994250 PCI: 00:15.1 subsystem <- 8086/a0e9
1536 15:37:15.997336 PCI: 00:15.1 cmd <- 02
1537 15:37:16.000752 PCI: 00:15.2 subsystem <- 8086/a0ea
1538 15:37:16.003962 PCI: 00:15.2 cmd <- 02
1539 15:37:16.007754 PCI: 00:15.3 subsystem <- 8086/a0eb
1540 15:37:16.010634 PCI: 00:15.3 cmd <- 02
1541 15:37:16.013817 PCI: 00:16.0 subsystem <- 8086/a0e0
1542 15:37:16.017334 PCI: 00:16.0 cmd <- 02
1543 15:37:16.020643 PCI: 00:19.1 subsystem <- 8086/a0c6
1544 15:37:16.024272 PCI: 00:19.1 cmd <- 02
1545 15:37:16.027514 PCI: 00:1d.0 bridge ctrl <- 0013
1546 15:37:16.031158 PCI: 00:1d.0 subsystem <- 8086/a0b0
1547 15:37:16.034471 PCI: 00:1d.0 cmd <- 06
1548 15:37:16.037840 PCI: 00:1e.0 subsystem <- 8086/a0a8
1549 15:37:16.038263 PCI: 00:1e.0 cmd <- 06
1550 15:37:16.045143 PCI: 00:1e.2 subsystem <- 8086/a0aa
1551 15:37:16.045530 PCI: 00:1e.2 cmd <- 06
1552 15:37:16.047472 PCI: 00:1e.3 subsystem <- 8086/a0ab
1553 15:37:16.050927 PCI: 00:1e.3 cmd <- 02
1554 15:37:16.054235 PCI: 00:1f.0 subsystem <- 8086/a087
1555 15:37:16.057529 PCI: 00:1f.0 cmd <- 407
1556 15:37:16.060853 PCI: 00:1f.3 subsystem <- 8086/a0c8
1557 15:37:16.064083 PCI: 00:1f.3 cmd <- 02
1558 15:37:16.067456 PCI: 00:1f.5 subsystem <- 8086/a0a4
1559 15:37:16.070673 PCI: 00:1f.5 cmd <- 406
1560 15:37:16.074697 PCI: 01:00.0 cmd <- 02
1561 15:37:16.078794 done.
1562 15:37:16.082676 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1563 15:37:16.086042 Initializing devices...
1564 15:37:16.089220 Root Device init
1565 15:37:16.092126 Chrome EC: Set SMI mask to 0x0000000000000000
1566 15:37:16.099030 Chrome EC: clear events_b mask to 0x0000000000000000
1567 15:37:16.105453 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1568 15:37:16.112490 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1569 15:37:16.118619 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1570 15:37:16.121883 Chrome EC: Set WAKE mask to 0x0000000000000000
1571 15:37:16.129584 fw_config match found: DB_USB=USB3_ACTIVE
1572 15:37:16.132356 Configure Right Type-C port orientation for retimer
1573 15:37:16.139038 Root Device init finished in 45 msecs
1574 15:37:16.139447 PCI: 00:00.0 init
1575 15:37:16.142762 CPU TDP = 9 Watts
1576 15:37:16.146328 CPU PL1 = 9 Watts
1577 15:37:16.146709 CPU PL2 = 40 Watts
1578 15:37:16.149552 CPU PL4 = 83 Watts
1579 15:37:16.152353 PCI: 00:00.0 init finished in 8 msecs
1580 15:37:16.155879 PCI: 00:02.0 init
1581 15:37:16.156448 GMA: Found VBT in CBFS
1582 15:37:16.159720 GMA: Found valid VBT in CBFS
1583 15:37:16.165685 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1584 15:37:16.172684 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1585 15:37:16.176050 PCI: 00:02.0 init finished in 18 msecs
1586 15:37:16.179294 PCI: 00:05.0 init
1587 15:37:16.182882 PCI: 00:05.0 init finished in 0 msecs
1588 15:37:16.185929 PCI: 00:08.0 init
1589 15:37:16.189468 PCI: 00:08.0 init finished in 0 msecs
1590 15:37:16.192560 PCI: 00:14.0 init
1591 15:37:16.195741 PCI: 00:14.0 init finished in 0 msecs
1592 15:37:16.199467 PCI: 00:14.2 init
1593 15:37:16.202904 PCI: 00:14.2 init finished in 0 msecs
1594 15:37:16.206149 PCI: 00:15.0 init
1595 15:37:16.209642 I2C bus 0 version 0x3230302a
1596 15:37:16.212326 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1597 15:37:16.216122 PCI: 00:15.0 init finished in 6 msecs
1598 15:37:16.218952 PCI: 00:15.1 init
1599 15:37:16.219435 I2C bus 1 version 0x3230302a
1600 15:37:16.225678 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1601 15:37:16.229561 PCI: 00:15.1 init finished in 6 msecs
1602 15:37:16.230112 PCI: 00:15.2 init
1603 15:37:16.232198 I2C bus 2 version 0x3230302a
1604 15:37:16.235431 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1605 15:37:16.239161 PCI: 00:15.2 init finished in 6 msecs
1606 15:37:16.242720 PCI: 00:15.3 init
1607 15:37:16.245821 I2C bus 3 version 0x3230302a
1608 15:37:16.249386 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1609 15:37:16.252605 PCI: 00:15.3 init finished in 6 msecs
1610 15:37:16.256143 PCI: 00:16.0 init
1611 15:37:16.259430 PCI: 00:16.0 init finished in 0 msecs
1612 15:37:16.262614 PCI: 00:19.1 init
1613 15:37:16.265914 I2C bus 5 version 0x3230302a
1614 15:37:16.269198 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1615 15:37:16.272424 PCI: 00:19.1 init finished in 6 msecs
1616 15:37:16.275898 PCI: 00:1d.0 init
1617 15:37:16.276283 Initializing PCH PCIe bridge.
1618 15:37:16.282322 PCI: 00:1d.0 init finished in 3 msecs
1619 15:37:16.285510 PCI: 00:1f.0 init
1620 15:37:16.288887 IOAPIC: Initializing IOAPIC at 0xfec00000
1621 15:37:16.292076 IOAPIC: Bootstrap Processor Local APIC = 0x00
1622 15:37:16.295711 IOAPIC: ID = 0x02
1623 15:37:16.299017 IOAPIC: Dumping registers
1624 15:37:16.299402 reg 0x0000: 0x02000000
1625 15:37:16.302227 reg 0x0001: 0x00770020
1626 15:37:16.305586 reg 0x0002: 0x00000000
1627 15:37:16.308734 PCI: 00:1f.0 init finished in 21 msecs
1628 15:37:16.312281 PCI: 00:1f.2 init
1629 15:37:16.315404 Disabling ACPI via APMC.
1630 15:37:16.315867 APMC done.
1631 15:37:16.319385 PCI: 00:1f.2 init finished in 5 msecs
1632 15:37:16.333053 PCI: 01:00.0 init
1633 15:37:16.335938 PCI: 01:00.0 init finished in 0 msecs
1634 15:37:16.339741 PNP: 0c09.0 init
1635 15:37:16.342647 Google Chrome EC uptime: 10.130 seconds
1636 15:37:16.349630 Google Chrome AP resets since EC boot: 0
1637 15:37:16.352690 Google Chrome most recent AP reset causes:
1638 15:37:16.358818 Google Chrome EC reset flags at last EC boot: reset-pin | hard
1639 15:37:16.362362 PNP: 0c09.0 init finished in 19 msecs
1640 15:37:16.367851 Devices initialized
1641 15:37:16.370857 Show all devs... After init.
1642 15:37:16.374422 Root Device: enabled 1
1643 15:37:16.374870 DOMAIN: 0000: enabled 1
1644 15:37:16.377441 CPU_CLUSTER: 0: enabled 1
1645 15:37:16.380895 PCI: 00:00.0: enabled 1
1646 15:37:16.384148 PCI: 00:02.0: enabled 1
1647 15:37:16.384580 PCI: 00:04.0: enabled 1
1648 15:37:16.387449 PCI: 00:05.0: enabled 1
1649 15:37:16.390940 PCI: 00:06.0: enabled 0
1650 15:37:16.394365 PCI: 00:07.0: enabled 0
1651 15:37:16.394789 PCI: 00:07.1: enabled 0
1652 15:37:16.397770 PCI: 00:07.2: enabled 0
1653 15:37:16.400843 PCI: 00:07.3: enabled 0
1654 15:37:16.404366 PCI: 00:08.0: enabled 1
1655 15:37:16.404747 PCI: 00:09.0: enabled 0
1656 15:37:16.407355 PCI: 00:0a.0: enabled 0
1657 15:37:16.410740 PCI: 00:0d.0: enabled 1
1658 15:37:16.413847 PCI: 00:0d.1: enabled 0
1659 15:37:16.414259 PCI: 00:0d.2: enabled 0
1660 15:37:16.417393 PCI: 00:0d.3: enabled 0
1661 15:37:16.420871 PCI: 00:0e.0: enabled 0
1662 15:37:16.421278 PCI: 00:10.2: enabled 1
1663 15:37:16.423845 PCI: 00:10.6: enabled 0
1664 15:37:16.427491 PCI: 00:10.7: enabled 0
1665 15:37:16.430314 PCI: 00:12.0: enabled 0
1666 15:37:16.430697 PCI: 00:12.6: enabled 0
1667 15:37:16.434191 PCI: 00:13.0: enabled 0
1668 15:37:16.437431 PCI: 00:14.0: enabled 1
1669 15:37:16.440218 PCI: 00:14.1: enabled 0
1670 15:37:16.440649 PCI: 00:14.2: enabled 1
1671 15:37:16.443574 PCI: 00:14.3: enabled 1
1672 15:37:16.447013 PCI: 00:15.0: enabled 1
1673 15:37:16.450611 PCI: 00:15.1: enabled 1
1674 15:37:16.450992 PCI: 00:15.2: enabled 1
1675 15:37:16.454176 PCI: 00:15.3: enabled 1
1676 15:37:16.457291 PCI: 00:16.0: enabled 1
1677 15:37:16.460096 PCI: 00:16.1: enabled 0
1678 15:37:16.460172 PCI: 00:16.2: enabled 0
1679 15:37:16.463297 PCI: 00:16.3: enabled 0
1680 15:37:16.466638 PCI: 00:16.4: enabled 0
1681 15:37:16.466714 PCI: 00:16.5: enabled 0
1682 15:37:16.469944 PCI: 00:17.0: enabled 0
1683 15:37:16.473376 PCI: 00:19.0: enabled 0
1684 15:37:16.476483 PCI: 00:19.1: enabled 1
1685 15:37:16.476558 PCI: 00:19.2: enabled 0
1686 15:37:16.480283 PCI: 00:1c.0: enabled 1
1687 15:37:16.483347 PCI: 00:1c.1: enabled 0
1688 15:37:16.486578 PCI: 00:1c.2: enabled 0
1689 15:37:16.486658 PCI: 00:1c.3: enabled 0
1690 15:37:16.489790 PCI: 00:1c.4: enabled 0
1691 15:37:16.493208 PCI: 00:1c.5: enabled 0
1692 15:37:16.497003 PCI: 00:1c.6: enabled 1
1693 15:37:16.497100 PCI: 00:1c.7: enabled 0
1694 15:37:16.499780 PCI: 00:1d.0: enabled 1
1695 15:37:16.503306 PCI: 00:1d.1: enabled 0
1696 15:37:16.503420 PCI: 00:1d.2: enabled 1
1697 15:37:16.506782 PCI: 00:1d.3: enabled 0
1698 15:37:16.509882 PCI: 00:1e.0: enabled 1
1699 15:37:16.513269 PCI: 00:1e.1: enabled 0
1700 15:37:16.513343 PCI: 00:1e.2: enabled 1
1701 15:37:16.516465 PCI: 00:1e.3: enabled 1
1702 15:37:16.519742 PCI: 00:1f.0: enabled 1
1703 15:37:16.523031 PCI: 00:1f.1: enabled 0
1704 15:37:16.523111 PCI: 00:1f.2: enabled 1
1705 15:37:16.526659 PCI: 00:1f.3: enabled 1
1706 15:37:16.529867 PCI: 00:1f.4: enabled 0
1707 15:37:16.532970 PCI: 00:1f.5: enabled 1
1708 15:37:16.533083 PCI: 00:1f.6: enabled 0
1709 15:37:16.536530 PCI: 00:1f.7: enabled 0
1710 15:37:16.539562 APIC: 00: enabled 1
1711 15:37:16.539682 GENERIC: 0.0: enabled 1
1712 15:37:16.542932 GENERIC: 0.0: enabled 1
1713 15:37:16.546384 GENERIC: 1.0: enabled 1
1714 15:37:16.550131 GENERIC: 0.0: enabled 1
1715 15:37:16.550339 GENERIC: 1.0: enabled 1
1716 15:37:16.553092 USB0 port 0: enabled 1
1717 15:37:16.556293 GENERIC: 0.0: enabled 1
1718 15:37:16.556501 USB0 port 0: enabled 1
1719 15:37:16.560369 GENERIC: 0.0: enabled 1
1720 15:37:16.563477 I2C: 00:1a: enabled 1
1721 15:37:16.566532 I2C: 00:31: enabled 1
1722 15:37:16.566827 I2C: 00:32: enabled 1
1723 15:37:16.569906 I2C: 00:10: enabled 1
1724 15:37:16.573056 I2C: 00:15: enabled 1
1725 15:37:16.573345 GENERIC: 0.0: enabled 0
1726 15:37:16.576483 GENERIC: 1.0: enabled 0
1727 15:37:16.579698 GENERIC: 0.0: enabled 1
1728 15:37:16.580311 SPI: 00: enabled 1
1729 15:37:16.583053 SPI: 00: enabled 1
1730 15:37:16.586820 PNP: 0c09.0: enabled 1
1731 15:37:16.587257 GENERIC: 0.0: enabled 1
1732 15:37:16.590079 USB3 port 0: enabled 1
1733 15:37:16.593503 USB3 port 1: enabled 1
1734 15:37:16.596631 USB3 port 2: enabled 0
1735 15:37:16.597018 USB3 port 3: enabled 0
1736 15:37:16.599864 USB2 port 0: enabled 0
1737 15:37:16.603103 USB2 port 1: enabled 1
1738 15:37:16.603487 USB2 port 2: enabled 1
1739 15:37:16.606332 USB2 port 3: enabled 0
1740 15:37:16.609601 USB2 port 4: enabled 1
1741 15:37:16.609871 USB2 port 5: enabled 0
1742 15:37:16.612674 USB2 port 6: enabled 0
1743 15:37:16.616310 USB2 port 7: enabled 0
1744 15:37:16.619797 USB2 port 8: enabled 0
1745 15:37:16.619963 USB2 port 9: enabled 0
1746 15:37:16.622984 USB3 port 0: enabled 0
1747 15:37:16.626240 USB3 port 1: enabled 1
1748 15:37:16.626406 USB3 port 2: enabled 0
1749 15:37:16.629664 USB3 port 3: enabled 0
1750 15:37:16.632770 GENERIC: 0.0: enabled 1
1751 15:37:16.636369 GENERIC: 1.0: enabled 1
1752 15:37:16.636534 APIC: 01: enabled 1
1753 15:37:16.639473 APIC: 03: enabled 1
1754 15:37:16.639657 APIC: 05: enabled 1
1755 15:37:16.642951 APIC: 07: enabled 1
1756 15:37:16.646090 APIC: 06: enabled 1
1757 15:37:16.646256 APIC: 02: enabled 1
1758 15:37:16.649256 APIC: 04: enabled 1
1759 15:37:16.652740 PCI: 01:00.0: enabled 1
1760 15:37:16.656535 BS: BS_DEV_INIT run times (exec / console): 31 / 537 ms
1761 15:37:16.662665 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1762 15:37:16.666184 ELOG: NV offset 0xf30000 size 0x1000
1763 15:37:16.673146 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1764 15:37:16.679482 ELOG: Event(17) added with size 13 at 2024-06-03 15:37:17 UTC
1765 15:37:16.686033 ELOG: Event(92) added with size 9 at 2024-06-03 15:37:17 UTC
1766 15:37:16.693067 ELOG: Event(93) added with size 9 at 2024-06-03 15:37:17 UTC
1767 15:37:16.699520 ELOG: Event(9E) added with size 10 at 2024-06-03 15:37:17 UTC
1768 15:37:16.705933 ELOG: Event(9F) added with size 14 at 2024-06-03 15:37:17 UTC
1769 15:37:16.712505 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1770 15:37:16.719284 ELOG: Event(A1) added with size 10 at 2024-06-03 15:37:17 UTC
1771 15:37:16.725796 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
1772 15:37:16.732091 ELOG: Event(A0) added with size 9 at 2024-06-03 15:37:17 UTC
1773 15:37:16.736111 elog_add_boot_reason: Logged dev mode boot
1774 15:37:16.742044 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1775 15:37:16.742476 Finalize devices...
1776 15:37:16.745624 Devices finalized
1777 15:37:16.751916 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1778 15:37:16.755185 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1779 15:37:16.762089 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1780 15:37:16.765378 ME: HFSTS1 : 0x80030055
1781 15:37:16.772016 ME: HFSTS2 : 0x30280116
1782 15:37:16.775349 ME: HFSTS3 : 0x00000050
1783 15:37:16.778539 ME: HFSTS4 : 0x00004000
1784 15:37:16.785033 ME: HFSTS5 : 0x00000000
1785 15:37:16.788362 ME: HFSTS6 : 0x00400006
1786 15:37:16.791671 ME: Manufacturing Mode : YES
1787 15:37:16.795271 ME: SPI Protection Mode Enabled : NO
1788 15:37:16.801747 ME: FW Partition Table : OK
1789 15:37:16.804923 ME: Bringup Loader Failure : NO
1790 15:37:16.808505 ME: Firmware Init Complete : NO
1791 15:37:16.811974 ME: Boot Options Present : NO
1792 15:37:16.815024 ME: Update In Progress : NO
1793 15:37:16.818479 ME: D0i3 Support : YES
1794 15:37:16.821781 ME: Low Power State Enabled : NO
1795 15:37:16.825073 ME: CPU Replaced : YES
1796 15:37:16.831737 ME: CPU Replacement Valid : YES
1797 15:37:16.834944 ME: Current Working State : 5
1798 15:37:16.838223 ME: Current Operation State : 1
1799 15:37:16.841680 ME: Current Operation Mode : 3
1800 15:37:16.845172 ME: Error Code : 0
1801 15:37:16.848444 ME: Enhanced Debug Mode : NO
1802 15:37:16.851270 ME: CPU Debug Disabled : YES
1803 15:37:16.854946 ME: TXT Support : NO
1804 15:37:16.861486 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1805 15:37:16.868223 ELOG: Event(91) added with size 10 at 2024-06-03 15:37:17 UTC
1806 15:37:16.875031 Chrome EC: clear events_b mask to 0x0000000020004000
1807 15:37:16.881648 BS: BS_WRITE_TABLES entry times (exec / console): 4 / 11 ms
1808 15:37:16.891469 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1809 15:37:16.894790 CBFS: 'fallback/slic' not found.
1810 15:37:16.898395 ACPI: Writing ACPI tables at 76b01000.
1811 15:37:16.898824 ACPI: * FACS
1812 15:37:16.901635 ACPI: * DSDT
1813 15:37:16.904849 Ramoops buffer: 0x100000@0x76a00000.
1814 15:37:16.908221 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1815 15:37:16.914760 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1816 15:37:16.918147 Google Chrome EC: version:
1817 15:37:16.921382 ro: voema_v2.0.7540-147f8d37d1
1818 15:37:16.924731 rw: voema_v2.0.7540-147f8d37d1
1819 15:37:16.928170 running image: 1
1820 15:37:16.934807 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1821 15:37:16.937955 ACPI: * FADT
1822 15:37:16.938411 SCI is IRQ9
1823 15:37:16.941157 ACPI: added table 1/32, length now 40
1824 15:37:16.944386 ACPI: * SSDT
1825 15:37:16.948018 Found 1 CPU(s) with 8 core(s) each.
1826 15:37:16.951214 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1827 15:37:16.954434 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1828 15:37:16.961355 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1829 15:37:16.964283 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1830 15:37:16.971288 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1831 15:37:16.974372 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1832 15:37:16.980619 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1833 15:37:16.987745 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1834 15:37:16.994003 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1835 15:37:16.997705 \_SB.PCI0.RP09: Added StorageD3Enable property
1836 15:37:17.000951 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1837 15:37:17.007295 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1838 15:37:17.010639 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1839 15:37:17.013912 PS2K: Passing 80 keymaps to kernel
1840 15:37:17.020812 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1841 15:37:17.027271 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1842 15:37:17.033730 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1843 15:37:17.040953 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1844 15:37:17.047232 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1845 15:37:17.053499 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1846 15:37:17.060398 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1847 15:37:17.067182 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1848 15:37:17.070588 ACPI: added table 2/32, length now 44
1849 15:37:17.073290 ACPI: * MCFG
1850 15:37:17.076686 ACPI: added table 3/32, length now 48
1851 15:37:17.080504 ACPI: * TPM2
1852 15:37:17.083890 TPM2 log created at 0x769f0000
1853 15:37:17.086907 ACPI: added table 4/32, length now 52
1854 15:37:17.087384 ACPI: * MADT
1855 15:37:17.090175 SCI is IRQ9
1856 15:37:17.093518 ACPI: added table 5/32, length now 56
1857 15:37:17.093949 current = 76b09850
1858 15:37:17.096903 ACPI: * DMAR
1859 15:37:17.099943 ACPI: added table 6/32, length now 60
1860 15:37:17.103185 ACPI: added table 7/32, length now 64
1861 15:37:17.106987 ACPI: * HPET
1862 15:37:17.110273 ACPI: added table 8/32, length now 68
1863 15:37:17.110703 ACPI: done.
1864 15:37:17.113649 ACPI tables: 35216 bytes.
1865 15:37:17.116639 smbios_write_tables: 769ef000
1866 15:37:17.119701 EC returned error result code 3
1867 15:37:17.123469 Couldn't obtain OEM name from CBI
1868 15:37:17.126830 Create SMBIOS type 16
1869 15:37:17.130231 Create SMBIOS type 17
1870 15:37:17.130740 GENERIC: 0.0 (WIFI Device)
1871 15:37:17.133428 SMBIOS tables: 1750 bytes.
1872 15:37:17.136862 Writing table forward entry at 0x00000500
1873 15:37:17.143531 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1874 15:37:17.146968 Writing coreboot table at 0x76b25000
1875 15:37:17.153603 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1876 15:37:17.159918 1. 0000000000001000-000000000009ffff: RAM
1877 15:37:17.163270 2. 00000000000a0000-00000000000fffff: RESERVED
1878 15:37:17.166997 3. 0000000000100000-00000000769eefff: RAM
1879 15:37:17.172967 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1880 15:37:17.179467 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1881 15:37:17.182982 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1882 15:37:17.190048 7. 0000000077000000-000000007fbfffff: RESERVED
1883 15:37:17.193101 8. 00000000c0000000-00000000cfffffff: RESERVED
1884 15:37:17.199738 9. 00000000f8000000-00000000f9ffffff: RESERVED
1885 15:37:17.203052 10. 00000000fb000000-00000000fb000fff: RESERVED
1886 15:37:17.209239 11. 00000000fe000000-00000000fe00ffff: RESERVED
1887 15:37:17.212932 12. 00000000fed80000-00000000fed87fff: RESERVED
1888 15:37:17.216139 13. 00000000fed90000-00000000fed92fff: RESERVED
1889 15:37:17.222871 14. 00000000feda0000-00000000feda1fff: RESERVED
1890 15:37:17.225828 15. 00000000fedc0000-00000000feddffff: RESERVED
1891 15:37:17.232617 16. 0000000100000000-00000002803fffff: RAM
1892 15:37:17.233095 Passing 4 GPIOs to payload:
1893 15:37:17.239525 NAME | PORT | POLARITY | VALUE
1894 15:37:17.245918 lid | undefined | high | high
1895 15:37:17.249423 power | undefined | high | low
1896 15:37:17.256038 oprom | undefined | high | low
1897 15:37:17.259383 EC in RW | 0x000000e5 | high | low
1898 15:37:17.266187 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum af31
1899 15:37:17.269364 coreboot table: 1576 bytes.
1900 15:37:17.272268 IMD ROOT 0. 0x76fff000 0x00001000
1901 15:37:17.276093 IMD SMALL 1. 0x76ffe000 0x00001000
1902 15:37:17.282756 FSP MEMORY 2. 0x76c4e000 0x003b0000
1903 15:37:17.285627 VPD 3. 0x76c4d000 0x00000367
1904 15:37:17.289153 RO MCACHE 4. 0x76c4c000 0x00000fdc
1905 15:37:17.292356 CONSOLE 5. 0x76c2c000 0x00020000
1906 15:37:17.295692 FMAP 6. 0x76c2b000 0x00000578
1907 15:37:17.298938 TIME STAMP 7. 0x76c2a000 0x00000910
1908 15:37:17.302173 VBOOT WORK 8. 0x76c16000 0x00014000
1909 15:37:17.305941 ROMSTG STCK 9. 0x76c15000 0x00001000
1910 15:37:17.312723 AFTER CAR 10. 0x76c0a000 0x0000b000
1911 15:37:17.315772 RAMSTAGE 11. 0x76b97000 0x00073000
1912 15:37:17.319117 REFCODE 12. 0x76b42000 0x00055000
1913 15:37:17.322290 SMM BACKUP 13. 0x76b32000 0x00010000
1914 15:37:17.325812 4f444749 14. 0x76b30000 0x00002000
1915 15:37:17.328882 EXT VBT15. 0x76b2d000 0x0000219f
1916 15:37:17.333060 COREBOOT 16. 0x76b25000 0x00008000
1917 15:37:17.335910 ACPI 17. 0x76b01000 0x00024000
1918 15:37:17.339435 ACPI GNVS 18. 0x76b00000 0x00001000
1919 15:37:17.342496 RAMOOPS 19. 0x76a00000 0x00100000
1920 15:37:17.348928 TPM2 TCGLOG20. 0x769f0000 0x00010000
1921 15:37:17.352572 SMBIOS 21. 0x769ef000 0x00000800
1922 15:37:17.353006 IMD small region:
1923 15:37:17.355780 IMD ROOT 0. 0x76ffec00 0x00000400
1924 15:37:17.362447 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1925 15:37:17.365888 POWER STATE 2. 0x76ffeb80 0x00000044
1926 15:37:17.368928 ROMSTAGE 3. 0x76ffeb60 0x00000004
1927 15:37:17.372285 MEM INFO 4. 0x76ffe980 0x000001e0
1928 15:37:17.378813 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1929 15:37:17.382714 MTRR: Physical address space:
1930 15:37:17.389491 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1931 15:37:17.395438 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1932 15:37:17.401993 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1933 15:37:17.405256 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1934 15:37:17.411954 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1935 15:37:17.418460 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1936 15:37:17.425360 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1937 15:37:17.428629 MTRR: Fixed MSR 0x250 0x0606060606060606
1938 15:37:17.435262 MTRR: Fixed MSR 0x258 0x0606060606060606
1939 15:37:17.438541 MTRR: Fixed MSR 0x259 0x0000000000000000
1940 15:37:17.441894 MTRR: Fixed MSR 0x268 0x0606060606060606
1941 15:37:17.445416 MTRR: Fixed MSR 0x269 0x0606060606060606
1942 15:37:17.451926 MTRR: Fixed MSR 0x26a 0x0606060606060606
1943 15:37:17.455412 MTRR: Fixed MSR 0x26b 0x0606060606060606
1944 15:37:17.458383 MTRR: Fixed MSR 0x26c 0x0606060606060606
1945 15:37:17.461881 MTRR: Fixed MSR 0x26d 0x0606060606060606
1946 15:37:17.464708 MTRR: Fixed MSR 0x26e 0x0606060606060606
1947 15:37:17.471564 MTRR: Fixed MSR 0x26f 0x0606060606060606
1948 15:37:17.475095 call enable_fixed_mtrr()
1949 15:37:17.478250 CPU physical address size: 39 bits
1950 15:37:17.481301 MTRR: default type WB/UC MTRR counts: 6/6.
1951 15:37:17.485007 MTRR: UC selected as default type.
1952 15:37:17.491568 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1953 15:37:17.498318 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1954 15:37:17.504799 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1955 15:37:17.511334 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1956 15:37:17.518087 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1957 15:37:17.524364 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1958 15:37:17.524856
1959 15:37:17.525191 MTRR check
1960 15:37:17.527675 Fixed MTRRs : Enabled
1961 15:37:17.531423 Variable MTRRs: Enabled
1962 15:37:17.531901
1963 15:37:17.534964 MTRR: Fixed MSR 0x250 0x0606060606060606
1964 15:37:17.537960 MTRR: Fixed MSR 0x258 0x0606060606060606
1965 15:37:17.544753 MTRR: Fixed MSR 0x259 0x0000000000000000
1966 15:37:17.548102 MTRR: Fixed MSR 0x268 0x0606060606060606
1967 15:37:17.551307 MTRR: Fixed MSR 0x269 0x0606060606060606
1968 15:37:17.554353 MTRR: Fixed MSR 0x26a 0x0606060606060606
1969 15:37:17.561698 MTRR: Fixed MSR 0x26b 0x0606060606060606
1970 15:37:17.564301 MTRR: Fixed MSR 0x26c 0x0606060606060606
1971 15:37:17.567724 MTRR: Fixed MSR 0x26d 0x0606060606060606
1972 15:37:17.570920 MTRR: Fixed MSR 0x26e 0x0606060606060606
1973 15:37:17.577540 MTRR: Fixed MSR 0x26f 0x0606060606060606
1974 15:37:17.584126 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1975 15:37:17.584598 call enable_fixed_mtrr()
1976 15:37:17.593981 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
1977 15:37:17.597318 CPU physical address size: 39 bits
1978 15:37:17.600884 Checking segment from ROM address 0xffc02b38
1979 15:37:17.607514 MTRR: Fixed MSR 0x250 0x0606060606060606
1980 15:37:17.610603 MTRR: Fixed MSR 0x250 0x0606060606060606
1981 15:37:17.613816 MTRR: Fixed MSR 0x258 0x0606060606060606
1982 15:37:17.617386 MTRR: Fixed MSR 0x259 0x0000000000000000
1983 15:37:17.624308 MTRR: Fixed MSR 0x268 0x0606060606060606
1984 15:37:17.627154 MTRR: Fixed MSR 0x269 0x0606060606060606
1985 15:37:17.630269 MTRR: Fixed MSR 0x26a 0x0606060606060606
1986 15:37:17.633743 MTRR: Fixed MSR 0x26b 0x0606060606060606
1987 15:37:17.640775 MTRR: Fixed MSR 0x26c 0x0606060606060606
1988 15:37:17.643720 MTRR: Fixed MSR 0x26d 0x0606060606060606
1989 15:37:17.647242 MTRR: Fixed MSR 0x26e 0x0606060606060606
1990 15:37:17.650265 MTRR: Fixed MSR 0x26f 0x0606060606060606
1991 15:37:17.657701 MTRR: Fixed MSR 0x258 0x0606060606060606
1992 15:37:17.658251 call enable_fixed_mtrr()
1993 15:37:17.664438 MTRR: Fixed MSR 0x259 0x0000000000000000
1994 15:37:17.667710 MTRR: Fixed MSR 0x268 0x0606060606060606
1995 15:37:17.670945 MTRR: Fixed MSR 0x269 0x0606060606060606
1996 15:37:17.674430 MTRR: Fixed MSR 0x26a 0x0606060606060606
1997 15:37:17.680839 MTRR: Fixed MSR 0x26b 0x0606060606060606
1998 15:37:17.684222 MTRR: Fixed MSR 0x26c 0x0606060606060606
1999 15:37:17.687631 MTRR: Fixed MSR 0x26d 0x0606060606060606
2000 15:37:17.690834 MTRR: Fixed MSR 0x26e 0x0606060606060606
2001 15:37:17.697497 MTRR: Fixed MSR 0x26f 0x0606060606060606
2002 15:37:17.700560 CPU physical address size: 39 bits
2003 15:37:17.704592 call enable_fixed_mtrr()
2004 15:37:17.707250 Checking segment from ROM address 0xffc02b54
2005 15:37:17.714057 MTRR: Fixed MSR 0x250 0x0606060606060606
2006 15:37:17.717494 MTRR: Fixed MSR 0x250 0x0606060606060606
2007 15:37:17.720822 MTRR: Fixed MSR 0x258 0x0606060606060606
2008 15:37:17.723948 MTRR: Fixed MSR 0x259 0x0000000000000000
2009 15:37:17.730845 MTRR: Fixed MSR 0x268 0x0606060606060606
2010 15:37:17.733608 MTRR: Fixed MSR 0x269 0x0606060606060606
2011 15:37:17.737518 MTRR: Fixed MSR 0x26a 0x0606060606060606
2012 15:37:17.740723 MTRR: Fixed MSR 0x26b 0x0606060606060606
2013 15:37:17.747009 MTRR: Fixed MSR 0x26c 0x0606060606060606
2014 15:37:17.750401 MTRR: Fixed MSR 0x26d 0x0606060606060606
2015 15:37:17.753518 MTRR: Fixed MSR 0x26e 0x0606060606060606
2016 15:37:17.756957 MTRR: Fixed MSR 0x26f 0x0606060606060606
2017 15:37:17.764010 MTRR: Fixed MSR 0x258 0x0606060606060606
2018 15:37:17.764609 call enable_fixed_mtrr()
2019 15:37:17.770982 MTRR: Fixed MSR 0x259 0x0000000000000000
2020 15:37:17.774182 MTRR: Fixed MSR 0x268 0x0606060606060606
2021 15:37:17.777513 MTRR: Fixed MSR 0x269 0x0606060606060606
2022 15:37:17.780272 MTRR: Fixed MSR 0x26a 0x0606060606060606
2023 15:37:17.787130 MTRR: Fixed MSR 0x26b 0x0606060606060606
2024 15:37:17.790241 MTRR: Fixed MSR 0x26c 0x0606060606060606
2025 15:37:17.794193 MTRR: Fixed MSR 0x26d 0x0606060606060606
2026 15:37:17.797244 MTRR: Fixed MSR 0x26e 0x0606060606060606
2027 15:37:17.803651 MTRR: Fixed MSR 0x26f 0x0606060606060606
2028 15:37:17.806992 CPU physical address size: 39 bits
2029 15:37:17.810291 call enable_fixed_mtrr()
2030 15:37:17.813663 CPU physical address size: 39 bits
2031 15:37:17.817084 MTRR: Fixed MSR 0x250 0x0606060606060606
2032 15:37:17.823696 MTRR: Fixed MSR 0x250 0x0606060606060606
2033 15:37:17.826936 MTRR: Fixed MSR 0x258 0x0606060606060606
2034 15:37:17.830060 MTRR: Fixed MSR 0x259 0x0000000000000000
2035 15:37:17.833958 MTRR: Fixed MSR 0x268 0x0606060606060606
2036 15:37:17.840397 MTRR: Fixed MSR 0x269 0x0606060606060606
2037 15:37:17.843477 MTRR: Fixed MSR 0x26a 0x0606060606060606
2038 15:37:17.846750 MTRR: Fixed MSR 0x26b 0x0606060606060606
2039 15:37:17.849840 MTRR: Fixed MSR 0x26c 0x0606060606060606
2040 15:37:17.853227 MTRR: Fixed MSR 0x26d 0x0606060606060606
2041 15:37:17.859711 MTRR: Fixed MSR 0x26e 0x0606060606060606
2042 15:37:17.863184 MTRR: Fixed MSR 0x26f 0x0606060606060606
2043 15:37:17.869881 MTRR: Fixed MSR 0x258 0x0606060606060606
2044 15:37:17.873321 MTRR: Fixed MSR 0x259 0x0000000000000000
2045 15:37:17.876362 MTRR: Fixed MSR 0x268 0x0606060606060606
2046 15:37:17.879577 MTRR: Fixed MSR 0x269 0x0606060606060606
2047 15:37:17.883065 MTRR: Fixed MSR 0x26a 0x0606060606060606
2048 15:37:17.889938 MTRR: Fixed MSR 0x26b 0x0606060606060606
2049 15:37:17.893040 MTRR: Fixed MSR 0x26c 0x0606060606060606
2050 15:37:17.896772 MTRR: Fixed MSR 0x26d 0x0606060606060606
2051 15:37:17.899689 MTRR: Fixed MSR 0x26e 0x0606060606060606
2052 15:37:17.906438 MTRR: Fixed MSR 0x26f 0x0606060606060606
2053 15:37:17.909867 call enable_fixed_mtrr()
2054 15:37:17.910252 call enable_fixed_mtrr()
2055 15:37:17.916259 CPU physical address size: 39 bits
2056 15:37:17.919480 CPU physical address size: 39 bits
2057 15:37:17.923303 CPU physical address size: 39 bits
2058 15:37:17.926363 Loading segment from ROM address 0xffc02b38
2059 15:37:17.929527 code (compression=0)
2060 15:37:17.939641 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2061 15:37:17.946320 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2062 15:37:17.949298 it's not compressed!
2063 15:37:18.088274 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2064 15:37:18.094655 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2065 15:37:18.101391 Loading segment from ROM address 0xffc02b54
2066 15:37:18.104645 Entry Point 0x30000000
2067 15:37:18.105027 Loaded segments
2068 15:37:18.111280 BS: BS_PAYLOAD_LOAD run times (exec / console): 458 / 64 ms
2069 15:37:18.154429 Finalizing chipset.
2070 15:37:18.157689 Finalizing SMM.
2071 15:37:18.158071 APMC done.
2072 15:37:18.164090 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2073 15:37:18.167905 mp_park_aps done after 0 msecs.
2074 15:37:18.170567 Jumping to boot code at 0x30000000(0x76b25000)
2075 15:37:18.180833 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2076 15:37:18.181246
2077 15:37:18.181541
2078 15:37:18.181814
2079 15:37:18.184642 Starting depthcharge on Voema...
2080 15:37:18.185113
2081 15:37:18.186058 end: 2.2.3 depthcharge-start (duration 00:00:04) [common]
2082 15:37:18.186507 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
2083 15:37:18.186859 Setting prompt string to ['volteer:']
2084 15:37:18.187224 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:47)
2085 15:37:18.194155 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2086 15:37:18.194539
2087 15:37:18.200678 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2088 15:37:18.201093
2089 15:37:18.207131 Looking for NVMe Controller 0x3005f238 @ 00:1d:00
2090 15:37:18.207558
2091 15:37:18.210966 Failed to find eMMC card reader
2092 15:37:18.211403
2093 15:37:18.211760 Wipe memory regions:
2094 15:37:18.212051
2095 15:37:18.217523 [0x00000000001000, 0x000000000a0000)
2096 15:37:18.218154
2097 15:37:18.220482 [0x00000000100000, 0x00000030000000)
2098 15:37:18.246750
2099 15:37:18.249893 [0x00000032662db0, 0x000000769ef000)
2100 15:37:18.285705
2101 15:37:18.289003 [0x00000100000000, 0x00000280400000)
2102 15:37:18.491522
2103 15:37:18.494736 ec_init: CrosEC protocol v3 supported (256, 256)
2104 15:37:18.495177
2105 15:37:18.501529 update_port_state: port C0 state: usb enable 1 mux conn 0
2106 15:37:18.501964
2107 15:37:18.508039 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2108 15:37:18.513021
2109 15:37:18.516090 pmc_check_ipc_sts: STS_BUSY done after 1512 us
2110 15:37:18.516499
2111 15:37:18.519659 send_conn_disc_msg: pmc_send_cmd succeeded
2112 15:37:18.951930
2113 15:37:18.952440 R8152: Initializing
2114 15:37:18.952776
2115 15:37:18.954917 Version 9 (ocp_data = 6010)
2116 15:37:18.955423
2117 15:37:18.958208 R8152: Done initializing
2118 15:37:18.958723
2119 15:37:18.961181 Adding net device
2120 15:37:19.264121
2121 15:37:19.267410 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2122 15:37:19.267916
2123 15:37:19.268233
2124 15:37:19.270962 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2126 15:37:19.372272 volteer: tftpboot 192.168.201.1 14152759/tftp-deploy-thuvnxzo/kernel/bzImage 14152759/tftp-deploy-thuvnxzo/kernel/cmdline 14152759/tftp-deploy-thuvnxzo/ramdisk/ramdisk.cpio.gz
2127 15:37:19.372497 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2128 15:37:19.372578 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:46)
2129 15:37:19.376752 tftpboot 192.168.201.1 14152759/tftp-deploy-thuvnxzo/kernel/bzIploy-thuvnxzo/kernel/cmdline 14152759/tftp-deploy-thuvnxzo/ramdisk/ramdisk.cpio.gz
2130 15:37:19.376832
2131 15:37:19.376892 Waiting for link
2132 15:37:19.581423
2133 15:37:19.581925 done.
2134 15:37:19.582315
2135 15:37:19.582893 MAC: 00:e0:4c:71:a6:42
2136 15:37:19.583289
2137 15:37:19.584240 Sending DHCP discover... done.
2138 15:37:19.584701
2139 15:37:19.587687 Waiting for reply... done.
2140 15:37:19.588265
2141 15:37:19.591152 Sending DHCP request... done.
2142 15:37:19.591658
2143 15:37:19.597416 Waiting for reply... done.
2144 15:37:19.597584
2145 15:37:19.597714 My ip is 192.168.201.18
2146 15:37:19.597835
2147 15:37:19.600781 The DHCP server ip is 192.168.201.1
2148 15:37:19.600949
2149 15:37:19.607434 TFTP server IP predefined by user: 192.168.201.1
2150 15:37:19.607677
2151 15:37:19.614250 Bootfile predefined by user: 14152759/tftp-deploy-thuvnxzo/kernel/bzImage
2152 15:37:19.614514
2153 15:37:19.617567 Sending tftp read request... done.
2154 15:37:19.617882
2155 15:37:19.625145 Waiting for the transfer...
2156 15:37:19.625445
2157 15:37:19.920595 00000000 ################################################################
2158 15:37:19.920717
2159 15:37:20.184847 00080000 ################################################################
2160 15:37:20.184966
2161 15:37:20.437265 00100000 ################################################################
2162 15:37:20.437375
2163 15:37:20.695303 00180000 ################################################################
2164 15:37:20.695413
2165 15:37:20.948053 00200000 ################################################################
2166 15:37:20.948161
2167 15:37:21.194186 00280000 ################################################################
2168 15:37:21.194312
2169 15:37:21.442783 00300000 ################################################################
2170 15:37:21.442903
2171 15:37:21.692526 00380000 ################################################################
2172 15:37:21.692636
2173 15:37:21.944245 00400000 ################################################################
2174 15:37:21.944371
2175 15:37:22.190351 00480000 ################################################################
2176 15:37:22.190496
2177 15:37:22.449468 00500000 ################################################################
2178 15:37:22.449587
2179 15:37:22.708360 00580000 ################################################################
2180 15:37:22.708486
2181 15:37:22.978621 00600000 ################################################################
2182 15:37:22.978739
2183 15:37:23.266229 00680000 ################################################################
2184 15:37:23.266343
2185 15:37:23.518639 00700000 ################################################################
2186 15:37:23.518751
2187 15:37:23.786080 00780000 ################################################################
2188 15:37:23.786198
2189 15:37:24.041049 00800000 ################################################################
2190 15:37:24.041161
2191 15:37:24.291125 00880000 ################################################################
2192 15:37:24.291278
2193 15:37:24.563278 00900000 ################################################################
2194 15:37:24.563399
2195 15:37:24.840765 00980000 ################################################################
2196 15:37:24.840892
2197 15:37:25.084374 00a00000 ################################################################
2198 15:37:25.084484
2199 15:37:25.327648 00a80000 ################################################################
2200 15:37:25.327757
2201 15:37:25.578848 00b00000 ################################################################
2202 15:37:25.578966
2203 15:37:25.831972 00b80000 ################################################################
2204 15:37:25.832100
2205 15:37:26.080234 00c00000 ################################################################
2206 15:37:26.080355
2207 15:37:26.332700 00c80000 ################################################################
2208 15:37:26.332806
2209 15:37:26.582813 00d00000 ################################################################ done.
2210 15:37:26.583267
2211 15:37:26.586258 The bootfile was 14155664 bytes long.
2212 15:37:26.586884
2213 15:37:26.589408 Sending tftp read request... done.
2214 15:37:26.589795
2215 15:37:26.592795 Waiting for the transfer...
2216 15:37:26.593179
2217 15:37:26.854139 00000000 ################################################################
2218 15:37:26.854255
2219 15:37:27.098820 00080000 ################################################################
2220 15:37:27.098945
2221 15:37:27.344810 00100000 ################################################################
2222 15:37:27.344920
2223 15:37:27.600738 00180000 ################################################################
2224 15:37:27.600868
2225 15:37:27.844434 00200000 ################################################################
2226 15:37:27.844565
2227 15:37:28.089194 00280000 ################################################################
2228 15:37:28.089317
2229 15:37:28.333963 00300000 ################################################################
2230 15:37:28.334089
2231 15:37:28.578657 00380000 ################################################################
2232 15:37:28.578769
2233 15:37:28.854660 00400000 ################################################################
2234 15:37:28.854788
2235 15:37:29.108475 00480000 ################################################################
2236 15:37:29.108601
2237 15:37:29.383520 00500000 ################################################################
2238 15:37:29.383696
2239 15:37:29.645657 00580000 ################################################################
2240 15:37:29.645791
2241 15:37:29.896873 00600000 ################################################################
2242 15:37:29.896999
2243 15:37:30.141279 00680000 ################################################################
2244 15:37:30.141407
2245 15:37:30.393426 00700000 ################################################################
2246 15:37:30.393580
2247 15:37:30.641106 00780000 ################################################################
2248 15:37:30.641252
2249 15:37:30.887089 00800000 ################################################################
2250 15:37:30.887203
2251 15:37:31.132237 00880000 ################################################################
2252 15:37:31.132364
2253 15:37:31.382460 00900000 ################################################################
2254 15:37:31.382586
2255 15:37:31.638135 00980000 ################################################################
2256 15:37:31.638266
2257 15:37:31.888346 00a00000 ################################################################
2258 15:37:31.888454
2259 15:37:32.141252 00a80000 ################################################################
2260 15:37:32.141385
2261 15:37:32.408531 00b00000 ################################################################
2262 15:37:32.408657
2263 15:37:32.681965 00b80000 ################################################################
2264 15:37:32.682092
2265 15:37:32.964364 00c00000 ################################################################
2266 15:37:32.964506
2267 15:37:33.245326 00c80000 ################################################################
2268 15:37:33.245455
2269 15:37:33.536295 00d00000 ################################################################
2270 15:37:33.536422
2271 15:37:33.813906 00d80000 ################################################################
2272 15:37:33.814026
2273 15:37:34.058984 00e00000 ################################################################
2274 15:37:34.059105
2275 15:37:34.305123 00e80000 ################################################################
2276 15:37:34.305232
2277 15:37:34.550667 00f00000 ################################################################
2278 15:37:34.550784
2279 15:37:34.796315 00f80000 ################################################################
2280 15:37:34.796430
2281 15:37:35.041033 01000000 ################################################################
2282 15:37:35.041158
2283 15:37:35.281428 01080000 ################################################################
2284 15:37:35.281541
2285 15:37:35.526815 01100000 ################################################################
2286 15:37:35.526921
2287 15:37:35.772326 01180000 ################################################################
2288 15:37:35.772447
2289 15:37:36.016296 01200000 ################################################################
2290 15:37:36.016418
2291 15:37:36.259503 01280000 ################################################################
2292 15:37:36.259654
2293 15:37:36.504696 01300000 ################################################################
2294 15:37:36.504808
2295 15:37:36.749902 01380000 ################################################################
2296 15:37:36.750016
2297 15:37:36.995060 01400000 ################################################################
2298 15:37:36.995182
2299 15:37:37.240132 01480000 ################################################################
2300 15:37:37.240255
2301 15:37:37.484814 01500000 ################################################################
2302 15:37:37.484926
2303 15:37:37.729673 01580000 ################################################################
2304 15:37:37.729790
2305 15:37:37.974927 01600000 ################################################################
2306 15:37:37.975050
2307 15:37:38.219741 01680000 ################################################################
2308 15:37:38.219855
2309 15:37:38.461752 01700000 ################################################################
2310 15:37:38.461882
2311 15:37:38.706841 01780000 ################################################################
2312 15:37:38.706960
2313 15:37:38.956296 01800000 ################################################################
2314 15:37:38.956443
2315 15:37:39.201568 01880000 ################################################################
2316 15:37:39.201683
2317 15:37:39.447068 01900000 ################################################################
2318 15:37:39.447189
2319 15:37:39.694754 01980000 ################################################################
2320 15:37:39.694879
2321 15:37:39.952616 01a00000 ################################################################
2322 15:37:39.952732
2323 15:37:40.211782 01a80000 ################################################################
2324 15:37:40.211906
2325 15:37:40.455033 01b00000 ################################################################
2326 15:37:40.455173
2327 15:37:40.702934 01b80000 ################################################################
2328 15:37:40.703045
2329 15:37:40.948154 01c00000 ################################################################
2330 15:37:40.948267
2331 15:37:41.193350 01c80000 ################################################################
2332 15:37:41.193456
2333 15:37:41.438791 01d00000 ################################################################
2334 15:37:41.438901
2335 15:37:41.685157 01d80000 ################################################################
2336 15:37:41.685282
2337 15:37:41.935258 01e00000 ################################################################
2338 15:37:41.935402
2339 15:37:42.183579 01e80000 ################################################################
2340 15:37:42.183749
2341 15:37:42.431708 01f00000 ################################################################
2342 15:37:42.431843
2343 15:37:42.690476 01f80000 ################################################################
2344 15:37:42.690612
2345 15:37:42.941334 02000000 ################################################################
2346 15:37:42.941473
2347 15:37:43.192188 02080000 ################################################################
2348 15:37:43.192329
2349 15:37:43.447560 02100000 ################################################################
2350 15:37:43.447700
2351 15:37:43.699689 02180000 ################################################################
2352 15:37:43.699836
2353 15:37:43.948801 02200000 ################################################################
2354 15:37:43.948911
2355 15:37:44.195761 02280000 ################################################################
2356 15:37:44.195870
2357 15:37:44.442332 02300000 ################################################################
2358 15:37:44.442442
2359 15:37:44.692632 02380000 ################################################################
2360 15:37:44.692775
2361 15:37:44.948703 02400000 ################################################################
2362 15:37:44.948823
2363 15:37:45.207676 02480000 ################################################################
2364 15:37:45.207803
2365 15:37:45.466392 02500000 ################################################################
2366 15:37:45.466498
2367 15:37:45.721078 02580000 ################################################################
2368 15:37:45.721197
2369 15:37:45.980150 02600000 ################################################################
2370 15:37:45.980262
2371 15:37:46.241095 02680000 ################################################################
2372 15:37:46.241208
2373 15:37:46.424138 02700000 ############################################# done.
2374 15:37:46.424256
2375 15:37:46.427351 Sending tftp read request... done.
2376 15:37:46.427427
2377 15:37:46.430727 Waiting for the transfer...
2378 15:37:46.430803
2379 15:37:46.430860 00000000 # done.
2380 15:37:46.430916
2381 15:37:46.440876 Command line loaded dynamically from TFTP file: 14152759/tftp-deploy-thuvnxzo/kernel/cmdline
2382 15:37:46.440954
2383 15:37:46.457363 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2384 15:37:46.463993
2385 15:37:46.467349 Shutting down all USB controllers.
2386 15:37:46.467425
2387 15:37:46.467484 Removing current net device
2388 15:37:46.467539
2389 15:37:46.470567 Finalizing coreboot
2390 15:37:46.470643
2391 15:37:46.477349 Exiting depthcharge with code 4 at timestamp: 36964304
2392 15:37:46.477426
2393 15:37:46.477486
2394 15:37:46.477541 Starting kernel ...
2395 15:37:46.477593
2396 15:37:46.477645
2397 15:37:46.478132 end: 2.2.4 bootloader-commands (duration 00:00:28) [common]
2398 15:37:46.478221 start: 2.2.5 auto-login-action (timeout 00:04:18) [common]
2399 15:37:46.478289 Setting prompt string to ['Linux version [0-9]']
2400 15:37:46.478353 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2401 15:37:46.478417 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2403 15:42:04.479747 end: 2.2.5 auto-login-action (duration 00:04:18) [common]
2405 15:42:04.480813 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 258 seconds'
2407 15:42:04.481669 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2410 15:42:04.482989 end: 2 depthcharge-action (duration 00:05:00) [common]
2412 15:42:04.484105 Cleaning after the job
2413 15:42:04.484194 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14152759/tftp-deploy-thuvnxzo/ramdisk
2414 15:42:04.488343 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14152759/tftp-deploy-thuvnxzo/kernel
2415 15:42:04.489871 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14152759/tftp-deploy-thuvnxzo/modules
2416 15:42:04.490360 start: 4.1 power-off (timeout 00:00:30) [common]
2417 15:42:04.490503 Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cp514-2h-1130g7-volteer-cbg-7', '--port=1', '--command=off']
2418 15:42:05.419577 >> Command sent successfully.
2419 15:42:05.433182 Returned 0 in 0 seconds
2420 15:42:05.534910 end: 4.1 power-off (duration 00:00:01) [common]
2422 15:42:05.536660 start: 4.2 read-feedback (timeout 00:09:59) [common]
2423 15:42:05.538022 Listened to connection for namespace 'common' for up to 1s
2425 15:42:05.539335 Listened to connection for namespace 'common' for up to 1s
2426 15:42:06.538541 Finalising connection for namespace 'common'
2427 15:42:06.539177 Disconnecting from shell: Finalise
2428 15:42:06.539569
2429 15:42:06.640516 end: 4.2 read-feedback (duration 00:00:01) [common]
2430 15:42:06.641099 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14152759
2431 15:42:06.738133 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14152759
2432 15:42:06.738318 JobError: Your job cannot terminate cleanly.