Boot log: acer-cp514-2h-1130g7-volteer

    1 09:42:52.463837  lava-dispatcher, installed at version: 2024.05
    2 09:42:52.464029  start: 0 validate
    3 09:42:52.464143  Start time: 2024-07-02 09:42:52.464138+00:00 (UTC)
    4 09:42:52.464266  Using caching service: 'http://localhost/cache/?uri=%s'
    5 09:42:52.464408  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Fx86%2Frootfs.cpio.gz exists
    6 09:42:52.726414  Using caching service: 'http://localhost/cache/?uri=%s'
    7 09:42:52.727087  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2603-g61ace8e627ca6%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
    8 09:42:52.982014  Using caching service: 'http://localhost/cache/?uri=%s'
    9 09:42:52.982753  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2603-g61ace8e627ca6%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
   10 09:42:57.491837  validate duration: 5.03
   12 09:42:57.492935  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 09:42:57.493424  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 09:42:57.493843  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 09:42:57.494523  Not decompressing ramdisk as can be used compressed.
   16 09:42:57.494967  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/x86/rootfs.cpio.gz
   17 09:42:57.495257  saving as /var/lib/lava/dispatcher/tmp/14692351/tftp-deploy-y9_1t3wp/ramdisk/rootfs.cpio.gz
   18 09:42:57.495575  total size: 8417901 (8 MB)
   19 09:42:58.233146  progress   0 % (0 MB)
   20 09:42:58.238713  progress   5 % (0 MB)
   21 09:42:58.240886  progress  10 % (0 MB)
   22 09:42:58.242936  progress  15 % (1 MB)
   23 09:42:58.245040  progress  20 % (1 MB)
   24 09:42:58.247286  progress  25 % (2 MB)
   25 09:42:58.249452  progress  30 % (2 MB)
   26 09:42:58.251438  progress  35 % (2 MB)
   27 09:42:58.253651  progress  40 % (3 MB)
   28 09:42:58.255765  progress  45 % (3 MB)
   29 09:42:58.257798  progress  50 % (4 MB)
   30 09:42:58.259913  progress  55 % (4 MB)
   31 09:42:58.261968  progress  60 % (4 MB)
   32 09:42:58.264033  progress  65 % (5 MB)
   33 09:42:58.266052  progress  70 % (5 MB)
   34 09:42:58.268142  progress  75 % (6 MB)
   35 09:42:58.270155  progress  80 % (6 MB)
   36 09:42:58.272218  progress  85 % (6 MB)
   37 09:42:58.274233  progress  90 % (7 MB)
   38 09:42:58.276316  progress  95 % (7 MB)
   39 09:42:58.278219  progress 100 % (8 MB)
   40 09:42:58.278435  8 MB downloaded in 0.78 s (10.25 MB/s)
   41 09:42:58.278575  end: 1.1.1 http-download (duration 00:00:01) [common]
   43 09:42:58.278787  end: 1.1 download-retry (duration 00:00:01) [common]
   44 09:42:58.278864  start: 1.2 download-retry (timeout 00:09:59) [common]
   45 09:42:58.278937  start: 1.2.1 http-download (timeout 00:09:59) [common]
   46 09:42:58.279066  downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2603-g61ace8e627ca6/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
   47 09:42:58.279127  saving as /var/lib/lava/dispatcher/tmp/14692351/tftp-deploy-y9_1t3wp/kernel/bzImage
   48 09:42:58.279179  total size: 14155664 (13 MB)
   49 09:42:58.279231  No compression specified
   50 09:42:58.280286  progress   0 % (0 MB)
   51 09:42:58.283728  progress   5 % (0 MB)
   52 09:42:58.287284  progress  10 % (1 MB)
   53 09:42:58.290562  progress  15 % (2 MB)
   54 09:42:58.294018  progress  20 % (2 MB)
   55 09:42:58.297294  progress  25 % (3 MB)
   56 09:42:58.300779  progress  30 % (4 MB)
   57 09:42:58.304280  progress  35 % (4 MB)
   58 09:42:58.307706  progress  40 % (5 MB)
   59 09:42:58.311158  progress  45 % (6 MB)
   60 09:42:58.314506  progress  50 % (6 MB)
   61 09:42:58.318022  progress  55 % (7 MB)
   62 09:42:58.321552  progress  60 % (8 MB)
   63 09:42:58.325141  progress  65 % (8 MB)
   64 09:42:58.328610  progress  70 % (9 MB)
   65 09:42:58.331912  progress  75 % (10 MB)
   66 09:42:58.335301  progress  80 % (10 MB)
   67 09:42:58.338753  progress  85 % (11 MB)
   68 09:42:58.342002  progress  90 % (12 MB)
   69 09:42:58.345385  progress  95 % (12 MB)
   70 09:42:58.348656  progress 100 % (13 MB)
   71 09:42:58.348877  13 MB downloaded in 0.07 s (193.70 MB/s)
   72 09:42:58.349015  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 09:42:58.349216  end: 1.2 download-retry (duration 00:00:00) [common]
   75 09:42:58.349292  start: 1.3 download-retry (timeout 00:09:59) [common]
   76 09:42:58.349364  start: 1.3.1 http-download (timeout 00:09:59) [common]
   77 09:42:58.349489  downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2603-g61ace8e627ca6/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
   78 09:42:58.349547  saving as /var/lib/lava/dispatcher/tmp/14692351/tftp-deploy-y9_1t3wp/modules/modules.tar
   79 09:42:58.349597  total size: 714860 (0 MB)
   80 09:42:58.349649  Using unxz to decompress xz
   81 09:42:58.350995  progress   4 % (0 MB)
   82 09:42:58.351221  progress   9 % (0 MB)
   83 09:42:58.352959  progress  18 % (0 MB)
   84 09:42:58.356567  progress  27 % (0 MB)
   85 09:42:58.358339  progress  32 % (0 MB)
   86 09:42:58.361955  progress  41 % (0 MB)
   87 09:42:58.365331  progress  50 % (0 MB)
   88 09:42:58.366897  progress  55 % (0 MB)
   89 09:42:58.370268  progress  64 % (0 MB)
   90 09:42:58.373801  progress  73 % (0 MB)
   91 09:42:58.377024  progress  82 % (0 MB)
   92 09:42:58.379073  progress  87 % (0 MB)
   93 09:42:58.382733  progress  96 % (0 MB)
   94 09:42:58.389894  0 MB downloaded in 0.04 s (16.92 MB/s)
   95 09:42:58.390041  end: 1.3.1 http-download (duration 00:00:00) [common]
   97 09:42:58.390248  end: 1.3 download-retry (duration 00:00:00) [common]
   98 09:42:58.390324  start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
   99 09:42:58.390400  start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
  100 09:42:58.390468  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
  101 09:42:58.390538  start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
  102 09:42:58.390751  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14692351/lava-overlay-2jsgujq7
  103 09:42:58.390932  makedir: /var/lib/lava/dispatcher/tmp/14692351/lava-overlay-2jsgujq7/lava-14692351/bin
  104 09:42:58.391022  makedir: /var/lib/lava/dispatcher/tmp/14692351/lava-overlay-2jsgujq7/lava-14692351/tests
  105 09:42:58.391126  makedir: /var/lib/lava/dispatcher/tmp/14692351/lava-overlay-2jsgujq7/lava-14692351/results
  106 09:42:58.391227  Creating /var/lib/lava/dispatcher/tmp/14692351/lava-overlay-2jsgujq7/lava-14692351/bin/lava-add-keys
  107 09:42:58.391451  Creating /var/lib/lava/dispatcher/tmp/14692351/lava-overlay-2jsgujq7/lava-14692351/bin/lava-add-sources
  108 09:42:58.391567  Creating /var/lib/lava/dispatcher/tmp/14692351/lava-overlay-2jsgujq7/lava-14692351/bin/lava-background-process-start
  109 09:42:58.391711  Creating /var/lib/lava/dispatcher/tmp/14692351/lava-overlay-2jsgujq7/lava-14692351/bin/lava-background-process-stop
  110 09:42:58.391848  Creating /var/lib/lava/dispatcher/tmp/14692351/lava-overlay-2jsgujq7/lava-14692351/bin/lava-common-functions
  111 09:42:58.391975  Creating /var/lib/lava/dispatcher/tmp/14692351/lava-overlay-2jsgujq7/lava-14692351/bin/lava-echo-ipv4
  112 09:42:58.392086  Creating /var/lib/lava/dispatcher/tmp/14692351/lava-overlay-2jsgujq7/lava-14692351/bin/lava-install-packages
  113 09:42:58.392226  Creating /var/lib/lava/dispatcher/tmp/14692351/lava-overlay-2jsgujq7/lava-14692351/bin/lava-installed-packages
  114 09:42:58.392334  Creating /var/lib/lava/dispatcher/tmp/14692351/lava-overlay-2jsgujq7/lava-14692351/bin/lava-os-build
  115 09:42:58.392448  Creating /var/lib/lava/dispatcher/tmp/14692351/lava-overlay-2jsgujq7/lava-14692351/bin/lava-probe-channel
  116 09:42:58.392556  Creating /var/lib/lava/dispatcher/tmp/14692351/lava-overlay-2jsgujq7/lava-14692351/bin/lava-probe-ip
  117 09:42:58.392664  Creating /var/lib/lava/dispatcher/tmp/14692351/lava-overlay-2jsgujq7/lava-14692351/bin/lava-target-ip
  118 09:42:58.392777  Creating /var/lib/lava/dispatcher/tmp/14692351/lava-overlay-2jsgujq7/lava-14692351/bin/lava-target-mac
  119 09:42:58.392886  Creating /var/lib/lava/dispatcher/tmp/14692351/lava-overlay-2jsgujq7/lava-14692351/bin/lava-target-storage
  120 09:42:58.392997  Creating /var/lib/lava/dispatcher/tmp/14692351/lava-overlay-2jsgujq7/lava-14692351/bin/lava-test-case
  121 09:42:58.393122  Creating /var/lib/lava/dispatcher/tmp/14692351/lava-overlay-2jsgujq7/lava-14692351/bin/lava-test-event
  122 09:42:58.393242  Creating /var/lib/lava/dispatcher/tmp/14692351/lava-overlay-2jsgujq7/lava-14692351/bin/lava-test-feedback
  123 09:42:58.393379  Creating /var/lib/lava/dispatcher/tmp/14692351/lava-overlay-2jsgujq7/lava-14692351/bin/lava-test-raise
  124 09:42:58.393522  Creating /var/lib/lava/dispatcher/tmp/14692351/lava-overlay-2jsgujq7/lava-14692351/bin/lava-test-reference
  125 09:42:58.393648  Creating /var/lib/lava/dispatcher/tmp/14692351/lava-overlay-2jsgujq7/lava-14692351/bin/lava-test-runner
  126 09:42:58.393803  Creating /var/lib/lava/dispatcher/tmp/14692351/lava-overlay-2jsgujq7/lava-14692351/bin/lava-test-set
  127 09:42:58.393928  Creating /var/lib/lava/dispatcher/tmp/14692351/lava-overlay-2jsgujq7/lava-14692351/bin/lava-test-shell
  128 09:42:58.394041  Updating /var/lib/lava/dispatcher/tmp/14692351/lava-overlay-2jsgujq7/lava-14692351/bin/lava-install-packages (oe)
  129 09:42:58.394182  Updating /var/lib/lava/dispatcher/tmp/14692351/lava-overlay-2jsgujq7/lava-14692351/bin/lava-installed-packages (oe)
  130 09:42:58.394292  Creating /var/lib/lava/dispatcher/tmp/14692351/lava-overlay-2jsgujq7/lava-14692351/environment
  131 09:42:58.394382  LAVA metadata
  132 09:42:58.394444  - LAVA_JOB_ID=14692351
  133 09:42:58.394500  - LAVA_DISPATCHER_IP=192.168.201.1
  134 09:42:58.394588  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
  135 09:42:58.394643  skipped lava-vland-overlay
  136 09:42:58.394709  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  137 09:42:58.394780  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
  138 09:42:58.394835  skipped lava-multinode-overlay
  139 09:42:58.394899  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  140 09:42:58.394968  start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
  141 09:42:58.395029  Loading test definitions
  142 09:42:58.395103  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
  143 09:42:58.395184  Using /lava-14692351 at stage 0
  144 09:42:58.395639  uuid=14692351_1.4.2.3.1 testdef=None
  145 09:42:58.395748  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  146 09:42:58.395850  start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
  147 09:42:58.396492  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  149 09:42:58.396808  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
  150 09:42:58.397647  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  152 09:42:58.397980  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
  153 09:42:58.398799  runner path: /var/lib/lava/dispatcher/tmp/14692351/lava-overlay-2jsgujq7/lava-14692351/0/tests/0_dmesg test_uuid 14692351_1.4.2.3.1
  154 09:42:58.398970  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  156 09:42:58.399286  Creating lava-test-runner.conf files
  157 09:42:58.399421  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14692351/lava-overlay-2jsgujq7/lava-14692351/0 for stage 0
  158 09:42:58.399525  - 0_dmesg
  159 09:42:58.399638  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  160 09:42:58.399738  start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
  161 09:42:58.406739  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  162 09:42:58.406832  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
  163 09:42:58.406909  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  164 09:42:58.406984  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  165 09:42:58.407057  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
  166 09:42:58.619101  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  167 09:42:58.619252  start: 1.4.4 extract-modules (timeout 00:09:59) [common]
  168 09:42:58.619343  extracting modules file /var/lib/lava/dispatcher/tmp/14692351/tftp-deploy-y9_1t3wp/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14692351/extract-overlay-ramdisk-gl03dzdp/ramdisk
  169 09:42:58.640884  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  170 09:42:58.640989  start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
  171 09:42:58.641064  [common] Applying overlay /var/lib/lava/dispatcher/tmp/14692351/compress-overlay-48oncm_d/overlay-1.4.2.4.tar.gz to ramdisk
  172 09:42:58.641124  [common] Applying overlay /var/lib/lava/dispatcher/tmp/14692351/compress-overlay-48oncm_d/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14692351/extract-overlay-ramdisk-gl03dzdp/ramdisk
  173 09:42:58.647425  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  174 09:42:58.647520  start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
  175 09:42:58.647601  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  176 09:42:58.647676  start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
  177 09:42:58.647739  Building ramdisk /var/lib/lava/dispatcher/tmp/14692351/extract-overlay-ramdisk-gl03dzdp/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14692351/extract-overlay-ramdisk-gl03dzdp/ramdisk
  178 09:42:58.763533  >> 53732 blocks

  179 09:42:59.682284  rename /var/lib/lava/dispatcher/tmp/14692351/extract-overlay-ramdisk-gl03dzdp/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14692351/tftp-deploy-y9_1t3wp/ramdisk/ramdisk.cpio.gz
  180 09:42:59.682438  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  181 09:42:59.682526  start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
  182 09:42:59.682604  start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
  183 09:42:59.682670  No mkimage arch provided, not using FIT.
  184 09:42:59.682740  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  185 09:42:59.682809  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  186 09:42:59.682880  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  187 09:42:59.682952  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
  188 09:42:59.683007  No LXC device requested
  189 09:42:59.683072  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  190 09:42:59.683140  start: 1.6 deploy-device-env (timeout 00:09:58) [common]
  191 09:42:59.683209  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  192 09:42:59.683264  Checking files for TFTP limit of 4294967296 bytes.
  193 09:42:59.683597  end: 1 tftp-deploy (duration 00:00:02) [common]
  194 09:42:59.683681  start: 2 depthcharge-action (timeout 00:05:00) [common]
  195 09:42:59.683762  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  196 09:42:59.683849  substitutions:
  197 09:42:59.683905  - {DTB}: None
  198 09:42:59.683958  - {INITRD}: 14692351/tftp-deploy-y9_1t3wp/ramdisk/ramdisk.cpio.gz
  199 09:42:59.684008  - {KERNEL}: 14692351/tftp-deploy-y9_1t3wp/kernel/bzImage
  200 09:42:59.684058  - {LAVA_MAC}: None
  201 09:42:59.684108  - {PRESEED_CONFIG}: None
  202 09:42:59.684156  - {PRESEED_LOCAL}: None
  203 09:42:59.684205  - {RAMDISK}: 14692351/tftp-deploy-y9_1t3wp/ramdisk/ramdisk.cpio.gz
  204 09:42:59.684260  - {ROOT_PART}: None
  205 09:42:59.684310  - {ROOT}: None
  206 09:42:59.684359  - {SERVER_IP}: 192.168.201.1
  207 09:42:59.684407  - {TEE}: None
  208 09:42:59.684455  Parsed boot commands:
  209 09:42:59.684500  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  210 09:42:59.684638  Parsed boot commands: tftpboot 192.168.201.1 14692351/tftp-deploy-y9_1t3wp/kernel/bzImage 14692351/tftp-deploy-y9_1t3wp/kernel/cmdline 14692351/tftp-deploy-y9_1t3wp/ramdisk/ramdisk.cpio.gz
  211 09:42:59.684716  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  212 09:42:59.684787  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  213 09:42:59.684858  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  214 09:42:59.684927  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  215 09:42:59.684981  Not connected, no need to disconnect.
  216 09:42:59.685044  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  217 09:42:59.685111  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  218 09:42:59.685163  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cp514-2h-1130g7-volteer-cbg-6'
  219 09:42:59.688303  Setting prompt string to ['lava-test: # ']
  220 09:42:59.688595  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  221 09:42:59.688691  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  222 09:42:59.688775  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  223 09:42:59.688896  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  224 09:42:59.689063  Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cp514-2h-1130g7-volteer-cbg-6', '--port=1', '--command=reboot']
  225 09:43:08.819258  >> Command sent successfully.
  226 09:43:08.832674  Returned 0 in 9 seconds
  227 09:43:08.833287  end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
  229 09:43:08.834338  end: 2.2.2 reset-device (duration 00:00:09) [common]
  230 09:43:08.834780  start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
  231 09:43:08.835140  Setting prompt string to 'Starting depthcharge on Voema...'
  232 09:43:08.835490  Changing prompt to 'Starting depthcharge on Voema...'
  233 09:43:08.835812  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  234 09:43:08.837356  [Enter `^Ec?' for help]

  235 09:43:10.894702  

  236 09:43:10.895282  

  237 09:43:10.904626  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...

  238 09:43:10.907835  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz

  239 09:43:10.914425  CPU: ID 806c1, Tigerlake B0, ucode: 00000086

  240 09:43:10.917655  CPU: AES supported, TXT NOT supported, VT supported

  241 09:43:10.924545  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2

  242 09:43:10.931124  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU

  243 09:43:10.934397  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2

  244 09:43:10.937739  VBOOT: Loading verstage.

  245 09:43:10.944094  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  246 09:43:10.947537  FMAP: base = 0x0 size = 0x2000000 #areas = 32

  247 09:43:10.950707  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  248 09:43:10.961603  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes

  249 09:43:10.968199  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984

  250 09:43:10.968273  

  251 09:43:10.968329  

  252 09:43:10.981428  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...

  253 09:43:10.994791  Probing TPM: . done!

  254 09:43:10.998108  TPM ready after 0 ms

  255 09:43:11.001734  Connected to device vid:did:rid of 1ae0:0028:00

  256 09:43:11.012820  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9

  257 09:43:11.019614  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  258 09:43:11.022749  Initialized TPM device CR50 revision 0

  259 09:43:11.073863  tlcl_send_startup: Startup return code is 0

  260 09:43:11.074278  TPM: setup succeeded

  261 09:43:11.089197  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  262 09:43:11.108278  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  263 09:43:11.121863  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  264 09:43:11.132526  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  265 09:43:11.135856  Chrome EC: UHEPI supported

  266 09:43:11.139272  Phase 1

  267 09:43:11.142332  FMAP: area GBB found @ 1805000 (458752 bytes)

  268 09:43:11.152501  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  269 09:43:11.158919  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  270 09:43:11.165603  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  271 09:43:11.172189  VB2:vb2_check_recovery() Recovery was requested manually

  272 09:43:11.178745  VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x7

  273 09:43:11.179329  Recovery requested (1009000e)

  274 09:43:11.185924  TPM: Extending digest for VBOOT: boot mode into PCR 0

  275 09:43:11.196406  tlcl_extend: response is 0

  276 09:43:11.202627  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  277 09:43:11.212595  tlcl_extend: response is 0

  278 09:43:11.219360  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  279 09:43:11.226015  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638

  280 09:43:11.232537  BS: verstage times (exec / console): total (unknown) / 148 ms

  281 09:43:11.232921  

  282 09:43:11.233221  

  283 09:43:11.245728  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...

  284 09:43:11.252403  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  285 09:43:11.255888  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  286 09:43:11.258721  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000

  287 09:43:11.265673  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  288 09:43:11.268912  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000

  289 09:43:11.272333  gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000

  290 09:43:11.275649  TCO_STS:   0000 0000

  291 09:43:11.279064  GEN_PMCON: d0015038 00002200

  292 09:43:11.282370  GBLRST_CAUSE: 00000000 00000000

  293 09:43:11.285608  HPR_CAUSE0: 00000000

  294 09:43:11.285990  prev_sleep_state 5

  295 09:43:11.288900  Boot Count incremented to 33115

  296 09:43:11.295167  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  297 09:43:11.301964  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  298 09:43:11.311879  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  299 09:43:11.318626  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c

  300 09:43:11.321729  Chrome EC: UHEPI supported

  301 09:43:11.328312  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  302 09:43:11.339626  Probing TPM:  done!

  303 09:43:11.346207  Connected to device vid:did:rid of 1ae0:0028:00

  304 09:43:11.356066  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9

  305 09:43:11.359746  Initialized TPM device CR50 revision 0

  306 09:43:11.374583  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  307 09:43:11.381520  MRC: Hash idx 0x100b comparison successful.

  308 09:43:11.384483  MRC cache found, size faa8

  309 09:43:11.384913  bootmode is set to: 2

  310 09:43:11.387928  SPD index = 0

  311 09:43:11.394787  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c

  312 09:43:11.398000  SPD: module type is LPDDR4X

  313 09:43:11.401383  SPD: module part number is MT53E512M64D4NW-046

  314 09:43:11.407961  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  315 09:43:11.410871  SPD: device width 16 bits, bus width 16 bits

  316 09:43:11.417654  SPD: module size is 1024 MB (per channel)

  317 09:43:11.850544  CBMEM:

  318 09:43:11.853974  IMD: root @ 0x76fff000 254 entries.

  319 09:43:11.857072  IMD: root @ 0x76ffec00 62 entries.

  320 09:43:11.860047  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  321 09:43:11.866559  FMAP: area RW_VPD found @ f35000 (8192 bytes)

  322 09:43:11.869908  External stage cache:

  323 09:43:11.873265  IMD: root @ 0x7b3ff000 254 entries.

  324 09:43:11.876593  IMD: root @ 0x7b3fec00 62 entries.

  325 09:43:11.891967  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  326 09:43:11.898402  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  327 09:43:11.905317  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  328 09:43:11.919328  MRC: 'RECOVERY_MRC_CACHE' does not need update.

  329 09:43:11.925847  cse_lite: Skip switching to RW in the recovery path

  330 09:43:11.926008  8 DIMMs found

  331 09:43:11.926138  SMM Memory Map

  332 09:43:11.932546  SMRAM       : 0x7b000000 0x800000

  333 09:43:11.935832   Subregion 0: 0x7b000000 0x200000

  334 09:43:11.939646   Subregion 1: 0x7b200000 0x200000

  335 09:43:11.943038   Subregion 2: 0x7b400000 0x400000

  336 09:43:11.943441  top_of_ram = 0x77000000

  337 09:43:11.949535  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  338 09:43:11.956165  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)

  339 09:43:11.959620  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  340 09:43:11.965979  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  341 09:43:11.972765  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c

  342 09:43:11.978977  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)

  343 09:43:11.989463  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500

  344 09:43:11.995934  Processing 211 relocs. Offset value of 0x74c0b000

  345 09:43:12.002582  BS: romstage times (exec / console): total (unknown) / 277 ms

  346 09:43:12.008581  

  347 09:43:12.008966  

  348 09:43:12.018572  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...

  349 09:43:12.021876  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  350 09:43:12.031813  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  351 09:43:12.038493  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  352 09:43:12.045228  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec

  353 09:43:12.051801  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)

  354 09:43:12.098545  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270

  355 09:43:12.105469  Processing 5008 relocs. Offset value of 0x75d98000

  356 09:43:12.108785  BS: postcar times (exec / console): total (unknown) / 59 ms

  357 09:43:12.112131  

  358 09:43:12.112511  

  359 09:43:12.121773  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...

  360 09:43:12.122163  Normal boot

  361 09:43:12.124909  FW_CONFIG value is 0x804c02

  362 09:43:12.128585  PCI: 00:07.0 disabled by fw_config

  363 09:43:12.131468  PCI: 00:07.1 disabled by fw_config

  364 09:43:12.135388  PCI: 00:0d.2 disabled by fw_config

  365 09:43:12.141879  PCI: 00:1c.7 disabled by fw_config

  366 09:43:12.145208  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  367 09:43:12.151725  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  368 09:43:12.155229  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  369 09:43:12.161248  GENERIC: 0.0 disabled by fw_config

  370 09:43:12.164627  GENERIC: 1.0 disabled by fw_config

  371 09:43:12.168368  fw_config match found: DB_USB=USB3_ACTIVE

  372 09:43:12.171437  fw_config match found: DB_USB=USB3_ACTIVE

  373 09:43:12.174982  fw_config match found: DB_USB=USB3_ACTIVE

  374 09:43:12.181283  fw_config match found: DB_USB=USB3_ACTIVE

  375 09:43:12.184621  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  376 09:43:12.191619  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  377 09:43:12.201424  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  378 09:43:12.207881  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c

  379 09:43:12.211394  microcode: sig=0x806c1 pf=0x80 revision=0x86

  380 09:43:12.217892  microcode: Update skipped, already up-to-date

  381 09:43:12.224265  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c

  382 09:43:12.252362  Detected 4 core, 8 thread CPU.

  383 09:43:12.255758  Setting up SMI for CPU

  384 09:43:12.259014  IED base = 0x7b400000

  385 09:43:12.262284  IED size = 0x00400000

  386 09:43:12.262672  Will perform SMM setup.

  387 09:43:12.268494  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.

  388 09:43:12.275369  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

  389 09:43:12.281943  Processing 16 relocs. Offset value of 0x00030000

  390 09:43:12.285142  Attempting to start 7 APs

  391 09:43:12.288539  Waiting for 10ms after sending INIT.

  392 09:43:12.304427  Waiting for 1st SIPI to complete...done.

  393 09:43:12.304820  AP: slot 1 apic_id 1.

  394 09:43:12.307755  AP: slot 3 apic_id 6.

  395 09:43:12.311327  AP: slot 7 apic_id 7.

  396 09:43:12.311717  AP: slot 5 apic_id 4.

  397 09:43:12.314154  AP: slot 4 apic_id 5.

  398 09:43:12.317471  AP: slot 2 apic_id 3.

  399 09:43:12.317866  AP: slot 6 apic_id 2.

  400 09:43:12.324146  Waiting for 2nd SIPI to complete...done.

  401 09:43:12.330746  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

  402 09:43:12.338366  Processing 13 relocs. Offset value of 0x00038000

  403 09:43:12.338989  Unable to locate Global NVS

  404 09:43:12.344801  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)

  405 09:43:12.350919  Installing permanent SMM handler to 0x7b000000

  406 09:43:12.357510  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908

  407 09:43:12.364180  Processing 794 relocs. Offset value of 0x7b010000

  408 09:43:12.371012  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8

  409 09:43:12.377625  Processing 13 relocs. Offset value of 0x7b008000

  410 09:43:12.383883  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd

  411 09:43:12.387230  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd

  412 09:43:12.393899  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd

  413 09:43:12.400660  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd

  414 09:43:12.407257  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd

  415 09:43:12.413735  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd

  416 09:43:12.420174  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd

  417 09:43:12.420262  Unable to locate Global NVS

  418 09:43:12.430204  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)

  419 09:43:12.433503  Clearing SMI status registers

  420 09:43:12.433582  SMI_STS: PM1 

  421 09:43:12.436843  PM1_STS: PWRBTN 

  422 09:43:12.443490  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0

  423 09:43:12.446565  In relocation handler: CPU 0

  424 09:43:12.449594  New SMBASE=0x7b000000 IEDBASE=0x7b400000

  425 09:43:12.456317  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  426 09:43:12.456398  Relocation complete.

  427 09:43:12.466434  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1

  428 09:43:12.469983  In relocation handler: CPU 1

  429 09:43:12.473354  New SMBASE=0x7afffc00 IEDBASE=0x7b400000

  430 09:43:12.473433  Relocation complete.

  431 09:43:12.482765  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7

  432 09:43:12.486334  In relocation handler: CPU 7

  433 09:43:12.489592  New SMBASE=0x7affe400 IEDBASE=0x7b400000

  434 09:43:12.489670  Relocation complete.

  435 09:43:12.499536  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3

  436 09:43:12.502985  In relocation handler: CPU 3

  437 09:43:12.505679  New SMBASE=0x7afff400 IEDBASE=0x7b400000

  438 09:43:12.509063  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  439 09:43:12.512408  Relocation complete.

  440 09:43:12.518778  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4

  441 09:43:12.522521  In relocation handler: CPU 4

  442 09:43:12.525469  New SMBASE=0x7afff000 IEDBASE=0x7b400000

  443 09:43:12.529012  Relocation complete.

  444 09:43:12.535308  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5

  445 09:43:12.538882  In relocation handler: CPU 5

  446 09:43:12.542322  New SMBASE=0x7affec00 IEDBASE=0x7b400000

  447 09:43:12.548490  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  448 09:43:12.548586  Relocation complete.

  449 09:43:12.558637  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6

  450 09:43:12.558720  In relocation handler: CPU 6

  451 09:43:12.565285  New SMBASE=0x7affe800 IEDBASE=0x7b400000

  452 09:43:12.568212  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  453 09:43:12.572195  Relocation complete.

  454 09:43:12.578328  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2

  455 09:43:12.581596  In relocation handler: CPU 2

  456 09:43:12.585048  New SMBASE=0x7afff800 IEDBASE=0x7b400000

  457 09:43:12.588421  Relocation complete.

  458 09:43:12.588496  Initializing CPU #0

  459 09:43:12.591843  CPU: vendor Intel device 806c1

  460 09:43:12.598645  CPU: family 06, model 8c, stepping 01

  461 09:43:12.598733  Clearing out pending MCEs

  462 09:43:12.601879  Setting up local APIC...

  463 09:43:12.605207   apic_id: 0x00 done.

  464 09:43:12.608604  Turbo is available but hidden

  465 09:43:12.611963  Turbo is available and visible

  466 09:43:12.614848  microcode: Update skipped, already up-to-date

  467 09:43:12.618203  CPU #0 initialized

  468 09:43:12.618350  Initializing CPU #6

  469 09:43:12.621562  Initializing CPU #2

  470 09:43:12.624879  CPU: vendor Intel device 806c1

  471 09:43:12.628196  CPU: family 06, model 8c, stepping 01

  472 09:43:12.631580  CPU: vendor Intel device 806c1

  473 09:43:12.635004  CPU: family 06, model 8c, stepping 01

  474 09:43:12.638416  Clearing out pending MCEs

  475 09:43:12.641742  Clearing out pending MCEs

  476 09:43:12.645067  Setting up local APIC...

  477 09:43:12.645429  Initializing CPU #7

  478 09:43:12.648137  Initializing CPU #3

  479 09:43:12.651671  CPU: vendor Intel device 806c1

  480 09:43:12.654861  CPU: family 06, model 8c, stepping 01

  481 09:43:12.658499  Initializing CPU #1

  482 09:43:12.658895   apic_id: 0x03 done.

  483 09:43:12.662011  Clearing out pending MCEs

  484 09:43:12.665006  CPU: vendor Intel device 806c1

  485 09:43:12.668240  CPU: family 06, model 8c, stepping 01

  486 09:43:12.671389  Setting up local APIC...

  487 09:43:12.674861  Setting up local APIC...

  488 09:43:12.675257  Initializing CPU #5

  489 09:43:12.678279  Initializing CPU #4

  490 09:43:12.681618  CPU: vendor Intel device 806c1

  491 09:43:12.684878  CPU: family 06, model 8c, stepping 01

  492 09:43:12.688266  CPU: vendor Intel device 806c1

  493 09:43:12.691601  CPU: family 06, model 8c, stepping 01

  494 09:43:12.694862  Clearing out pending MCEs

  495 09:43:12.698365  Clearing out pending MCEs

  496 09:43:12.698760  Setting up local APIC...

  497 09:43:12.701672  CPU: vendor Intel device 806c1

  498 09:43:12.704996  CPU: family 06, model 8c, stepping 01

  499 09:43:12.707958  Clearing out pending MCEs

  500 09:43:12.711228  Clearing out pending MCEs

  501 09:43:12.714547   apic_id: 0x07 done.

  502 09:43:12.714927  Setting up local APIC...

  503 09:43:12.721302  microcode: Update skipped, already up-to-date

  504 09:43:12.721685   apic_id: 0x06 done.

  505 09:43:12.724644  CPU #7 initialized

  506 09:43:12.727885  microcode: Update skipped, already up-to-date

  507 09:43:12.731281  Setting up local APIC...

  508 09:43:12.734739   apic_id: 0x04 done.

  509 09:43:12.737957  Setting up local APIC...

  510 09:43:12.738338  CPU #3 initialized

  511 09:43:12.741282   apic_id: 0x01 done.

  512 09:43:12.741665   apic_id: 0x05 done.

  513 09:43:12.748012  microcode: Update skipped, already up-to-date

  514 09:43:12.751194  microcode: Update skipped, already up-to-date

  515 09:43:12.754480  CPU #5 initialized

  516 09:43:12.754861  CPU #4 initialized

  517 09:43:12.757819   apic_id: 0x02 done.

  518 09:43:12.761167  microcode: Update skipped, already up-to-date

  519 09:43:12.767629  microcode: Update skipped, already up-to-date

  520 09:43:12.768011  CPU #2 initialized

  521 09:43:12.771370  CPU #6 initialized

  522 09:43:12.774507  microcode: Update skipped, already up-to-date

  523 09:43:12.778032  CPU #1 initialized

  524 09:43:12.780955  bsp_do_flight_plan done after 455 msecs.

  525 09:43:12.784388  CPU: frequency set to 4000 MHz

  526 09:43:12.787921  Enabling SMIs.

  527 09:43:12.794017  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms

  528 09:43:12.809306  SATAXPCIE1 indicates PCIe NVMe is present

  529 09:43:12.812651  Probing TPM:  done!

  530 09:43:12.815437  Connected to device vid:did:rid of 1ae0:0028:00

  531 09:43:12.826780  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9

  532 09:43:12.829974  Initialized TPM device CR50 revision 0

  533 09:43:12.833327  Enabling S0i3.4

  534 09:43:12.840134  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc

  535 09:43:12.843405  Found a VBT of 8704 bytes after decompression

  536 09:43:12.850033  cse_lite: CSE RO boot. HybridStorageMode disabled

  537 09:43:12.856066  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called

  538 09:43:12.932429  FSPS returned 0

  539 09:43:12.935862  Executing Phase 1 of FspMultiPhaseSiInit

  540 09:43:12.945797  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  541 09:43:12.949137  port C0 DISC req: usage 1 usb3 1 usb2 5

  542 09:43:12.952500  Raw Buffer output 0 00000511

  543 09:43:12.955970  Raw Buffer output 1 00000000

  544 09:43:12.959440  pmc_send_ipc_cmd succeeded

  545 09:43:12.966139  port C1 DISC req: usage 1 usb3 2 usb2 3

  546 09:43:12.966544  Raw Buffer output 0 00000321

  547 09:43:12.969339  Raw Buffer output 1 00000000

  548 09:43:12.973338  pmc_send_ipc_cmd succeeded

  549 09:43:12.978292  Detected 4 core, 8 thread CPU.

  550 09:43:12.981627  Detected 4 core, 8 thread CPU.

  551 09:43:13.215816  Display FSP Version Info HOB

  552 09:43:13.218961  Reference Code - CPU = a.0.4c.31

  553 09:43:13.222615  uCode Version = 0.0.0.86

  554 09:43:13.225536  TXT ACM version = ff.ff.ff.ffff

  555 09:43:13.228843  Reference Code - ME = a.0.4c.31

  556 09:43:13.232301  MEBx version = 0.0.0.0

  557 09:43:13.235625  ME Firmware Version = Consumer SKU

  558 09:43:13.238923  Reference Code - PCH = a.0.4c.31

  559 09:43:13.242258  PCH-CRID Status = Disabled

  560 09:43:13.245491  PCH-CRID Original Value = ff.ff.ff.ffff

  561 09:43:13.248766  PCH-CRID New Value = ff.ff.ff.ffff

  562 09:43:13.251787  OPROM - RST - RAID = ff.ff.ff.ffff

  563 09:43:13.255200  PCH Hsio Version = 4.0.0.0

  564 09:43:13.258911  Reference Code - SA - System Agent = a.0.4c.31

  565 09:43:13.262218  Reference Code - MRC = 2.0.0.1

  566 09:43:13.265110  SA - PCIe Version = a.0.4c.31

  567 09:43:13.268545  SA-CRID Status = Disabled

  568 09:43:13.271835  SA-CRID Original Value = 0.0.0.1

  569 09:43:13.275053  SA-CRID New Value = 0.0.0.1

  570 09:43:13.278534  OPROM - VBIOS = ff.ff.ff.ffff

  571 09:43:13.281772  IO Manageability Engine FW Version = 11.1.4.0

  572 09:43:13.285141  PHY Build Version = 0.0.0.e0

  573 09:43:13.288506  Thunderbolt(TM) FW Version = 0.0.0.0

  574 09:43:13.295103  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  575 09:43:13.298450  ITSS IRQ Polarities Before:

  576 09:43:13.298830  IPC0: 0xffffffff

  577 09:43:13.301655  IPC1: 0xffffffff

  578 09:43:13.302043  IPC2: 0xffffffff

  579 09:43:13.305204  IPC3: 0xffffffff

  580 09:43:13.308451  ITSS IRQ Polarities After:

  581 09:43:13.308841  IPC0: 0xffffffff

  582 09:43:13.312076  IPC1: 0xffffffff

  583 09:43:13.312464  IPC2: 0xffffffff

  584 09:43:13.315351  IPC3: 0xffffffff

  585 09:43:13.318554  Found PCIe Root Port #9 at PCI: 00:1d.0.

  586 09:43:13.331890  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.

  587 09:43:13.341358  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.

  588 09:43:13.354706  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.

  589 09:43:13.361412  BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms

  590 09:43:13.364708  Enumerating buses...

  591 09:43:13.367888  Show all devs... Before device enumeration.

  592 09:43:13.371113  Root Device: enabled 1

  593 09:43:13.371534  DOMAIN: 0000: enabled 1

  594 09:43:13.374281  CPU_CLUSTER: 0: enabled 1

  595 09:43:13.377812  PCI: 00:00.0: enabled 1

  596 09:43:13.381174  PCI: 00:02.0: enabled 1

  597 09:43:13.381559  PCI: 00:04.0: enabled 1

  598 09:43:13.384613  PCI: 00:05.0: enabled 1

  599 09:43:13.387796  PCI: 00:06.0: enabled 0

  600 09:43:13.391331  PCI: 00:07.0: enabled 0

  601 09:43:13.391722  PCI: 00:07.1: enabled 0

  602 09:43:13.394438  PCI: 00:07.2: enabled 0

  603 09:43:13.397751  PCI: 00:07.3: enabled 0

  604 09:43:13.401290  PCI: 00:08.0: enabled 1

  605 09:43:13.401680  PCI: 00:09.0: enabled 0

  606 09:43:13.403972  PCI: 00:0a.0: enabled 0

  607 09:43:13.407535  PCI: 00:0d.0: enabled 1

  608 09:43:13.411162  PCI: 00:0d.1: enabled 0

  609 09:43:13.411582  PCI: 00:0d.2: enabled 0

  610 09:43:13.414020  PCI: 00:0d.3: enabled 0

  611 09:43:13.417779  PCI: 00:0e.0: enabled 0

  612 09:43:13.420822  PCI: 00:10.2: enabled 1

  613 09:43:13.421215  PCI: 00:10.6: enabled 0

  614 09:43:13.424345  PCI: 00:10.7: enabled 0

  615 09:43:13.427691  PCI: 00:12.0: enabled 0

  616 09:43:13.428080  PCI: 00:12.6: enabled 0

  617 09:43:13.430815  PCI: 00:13.0: enabled 0

  618 09:43:13.434113  PCI: 00:14.0: enabled 1

  619 09:43:13.437418  PCI: 00:14.1: enabled 0

  620 09:43:13.437806  PCI: 00:14.2: enabled 1

  621 09:43:13.440550  PCI: 00:14.3: enabled 1

  622 09:43:13.443821  PCI: 00:15.0: enabled 1

  623 09:43:13.447391  PCI: 00:15.1: enabled 1

  624 09:43:13.447781  PCI: 00:15.2: enabled 1

  625 09:43:13.450314  PCI: 00:15.3: enabled 1

  626 09:43:13.454145  PCI: 00:16.0: enabled 1

  627 09:43:13.457380  PCI: 00:16.1: enabled 0

  628 09:43:13.457768  PCI: 00:16.2: enabled 0

  629 09:43:13.460228  PCI: 00:16.3: enabled 0

  630 09:43:13.463581  PCI: 00:16.4: enabled 0

  631 09:43:13.467120  PCI: 00:16.5: enabled 0

  632 09:43:13.467539  PCI: 00:17.0: enabled 1

  633 09:43:13.470479  PCI: 00:19.0: enabled 0

  634 09:43:13.473608  PCI: 00:19.1: enabled 1

  635 09:43:13.476992  PCI: 00:19.2: enabled 0

  636 09:43:13.477380  PCI: 00:1c.0: enabled 1

  637 09:43:13.480420  PCI: 00:1c.1: enabled 0

  638 09:43:13.483396  PCI: 00:1c.2: enabled 0

  639 09:43:13.483785  PCI: 00:1c.3: enabled 0

  640 09:43:13.486643  PCI: 00:1c.4: enabled 0

  641 09:43:13.490183  PCI: 00:1c.5: enabled 0

  642 09:43:13.493498  PCI: 00:1c.6: enabled 1

  643 09:43:13.493889  PCI: 00:1c.7: enabled 0

  644 09:43:13.496964  PCI: 00:1d.0: enabled 1

  645 09:43:13.500143  PCI: 00:1d.1: enabled 0

  646 09:43:13.503568  PCI: 00:1d.2: enabled 1

  647 09:43:13.503968  PCI: 00:1d.3: enabled 0

  648 09:43:13.506815  PCI: 00:1e.0: enabled 1

  649 09:43:13.509678  PCI: 00:1e.1: enabled 0

  650 09:43:13.513144  PCI: 00:1e.2: enabled 1

  651 09:43:13.513530  PCI: 00:1e.3: enabled 1

  652 09:43:13.516815  PCI: 00:1f.0: enabled 1

  653 09:43:13.519919  PCI: 00:1f.1: enabled 0

  654 09:43:13.523009  PCI: 00:1f.2: enabled 1

  655 09:43:13.523424  PCI: 00:1f.3: enabled 1

  656 09:43:13.526590  PCI: 00:1f.4: enabled 0

  657 09:43:13.529834  PCI: 00:1f.5: enabled 1

  658 09:43:13.533041  PCI: 00:1f.6: enabled 0

  659 09:43:13.533423  PCI: 00:1f.7: enabled 0

  660 09:43:13.536291  APIC: 00: enabled 1

  661 09:43:13.539554  GENERIC: 0.0: enabled 1

  662 09:43:13.539941  GENERIC: 0.0: enabled 1

  663 09:43:13.542756  GENERIC: 1.0: enabled 1

  664 09:43:13.546347  GENERIC: 0.0: enabled 1

  665 09:43:13.549609  GENERIC: 1.0: enabled 1

  666 09:43:13.549998  USB0 port 0: enabled 1

  667 09:43:13.553005  GENERIC: 0.0: enabled 1

  668 09:43:13.556234  USB0 port 0: enabled 1

  669 09:43:13.556622  GENERIC: 0.0: enabled 1

  670 09:43:13.559526  I2C: 00:1a: enabled 1

  671 09:43:13.562900  I2C: 00:31: enabled 1

  672 09:43:13.566132  I2C: 00:32: enabled 1

  673 09:43:13.566523  I2C: 00:10: enabled 1

  674 09:43:13.569534  I2C: 00:15: enabled 1

  675 09:43:13.572773  GENERIC: 0.0: enabled 0

  676 09:43:13.573160  GENERIC: 1.0: enabled 0

  677 09:43:13.576095  GENERIC: 0.0: enabled 1

  678 09:43:13.579153  SPI: 00: enabled 1

  679 09:43:13.579563  SPI: 00: enabled 1

  680 09:43:13.582443  PNP: 0c09.0: enabled 1

  681 09:43:13.586080  GENERIC: 0.0: enabled 1

  682 09:43:13.586469  USB3 port 0: enabled 1

  683 09:43:13.589419  USB3 port 1: enabled 1

  684 09:43:13.592869  USB3 port 2: enabled 0

  685 09:43:13.596115  USB3 port 3: enabled 0

  686 09:43:13.596502  USB2 port 0: enabled 0

  687 09:43:13.599445  USB2 port 1: enabled 1

  688 09:43:13.602705  USB2 port 2: enabled 1

  689 09:43:13.603093  USB2 port 3: enabled 0

  690 09:43:13.605538  USB2 port 4: enabled 1

  691 09:43:13.608962  USB2 port 5: enabled 0

  692 09:43:13.612319  USB2 port 6: enabled 0

  693 09:43:13.612705  USB2 port 7: enabled 0

  694 09:43:13.615580  USB2 port 8: enabled 0

  695 09:43:13.618871  USB2 port 9: enabled 0

  696 09:43:13.619259  USB3 port 0: enabled 0

  697 09:43:13.622182  USB3 port 1: enabled 1

  698 09:43:13.625843  USB3 port 2: enabled 0

  699 09:43:13.628954  USB3 port 3: enabled 0

  700 09:43:13.629343  GENERIC: 0.0: enabled 1

  701 09:43:13.632398  GENERIC: 1.0: enabled 1

  702 09:43:13.635147  APIC: 01: enabled 1

  703 09:43:13.635580  APIC: 03: enabled 1

  704 09:43:13.638997  APIC: 06: enabled 1

  705 09:43:13.642159  APIC: 05: enabled 1

  706 09:43:13.642546  APIC: 04: enabled 1

  707 09:43:13.645396  APIC: 02: enabled 1

  708 09:43:13.645783  APIC: 07: enabled 1

  709 09:43:13.648686  Compare with tree...

  710 09:43:13.652131  Root Device: enabled 1

  711 09:43:13.652523   DOMAIN: 0000: enabled 1

  712 09:43:13.655542    PCI: 00:00.0: enabled 1

  713 09:43:13.658641    PCI: 00:02.0: enabled 1

  714 09:43:13.662016    PCI: 00:04.0: enabled 1

  715 09:43:13.665293     GENERIC: 0.0: enabled 1

  716 09:43:13.668600    PCI: 00:05.0: enabled 1

  717 09:43:13.668987    PCI: 00:06.0: enabled 0

  718 09:43:13.671817    PCI: 00:07.0: enabled 0

  719 09:43:13.674926     GENERIC: 0.0: enabled 1

  720 09:43:13.678321    PCI: 00:07.1: enabled 0

  721 09:43:13.681783     GENERIC: 1.0: enabled 1

  722 09:43:13.682176    PCI: 00:07.2: enabled 0

  723 09:43:13.685056     GENERIC: 0.0: enabled 1

  724 09:43:13.688186    PCI: 00:07.3: enabled 0

  725 09:43:13.691435     GENERIC: 1.0: enabled 1

  726 09:43:13.695141    PCI: 00:08.0: enabled 1

  727 09:43:13.695579    PCI: 00:09.0: enabled 0

  728 09:43:13.698406    PCI: 00:0a.0: enabled 0

  729 09:43:13.701273    PCI: 00:0d.0: enabled 1

  730 09:43:13.704665     USB0 port 0: enabled 1

  731 09:43:13.707990      USB3 port 0: enabled 1

  732 09:43:13.708375      USB3 port 1: enabled 1

  733 09:43:13.711351      USB3 port 2: enabled 0

  734 09:43:13.714603      USB3 port 3: enabled 0

  735 09:43:13.717887    PCI: 00:0d.1: enabled 0

  736 09:43:13.721743    PCI: 00:0d.2: enabled 0

  737 09:43:13.724545     GENERIC: 0.0: enabled 1

  738 09:43:13.724931    PCI: 00:0d.3: enabled 0

  739 09:43:13.727860    PCI: 00:0e.0: enabled 0

  740 09:43:13.731408    PCI: 00:10.2: enabled 1

  741 09:43:13.734594    PCI: 00:10.6: enabled 0

  742 09:43:13.737748    PCI: 00:10.7: enabled 0

  743 09:43:13.738133    PCI: 00:12.0: enabled 0

  744 09:43:13.741393    PCI: 00:12.6: enabled 0

  745 09:43:13.744623    PCI: 00:13.0: enabled 0

  746 09:43:13.747891    PCI: 00:14.0: enabled 1

  747 09:43:13.751265     USB0 port 0: enabled 1

  748 09:43:13.751687      USB2 port 0: enabled 0

  749 09:43:13.754618      USB2 port 1: enabled 1

  750 09:43:13.757713      USB2 port 2: enabled 1

  751 09:43:13.761325      USB2 port 3: enabled 0

  752 09:43:13.764502      USB2 port 4: enabled 1

  753 09:43:13.764892      USB2 port 5: enabled 0

  754 09:43:13.767861      USB2 port 6: enabled 0

  755 09:43:13.770898      USB2 port 7: enabled 0

  756 09:43:13.774593      USB2 port 8: enabled 0

  757 09:43:13.777886      USB2 port 9: enabled 0

  758 09:43:13.781108      USB3 port 0: enabled 0

  759 09:43:13.781496      USB3 port 1: enabled 1

  760 09:43:13.784380      USB3 port 2: enabled 0

  761 09:43:13.787625      USB3 port 3: enabled 0

  762 09:43:13.790777    PCI: 00:14.1: enabled 0

  763 09:43:13.794183    PCI: 00:14.2: enabled 1

  764 09:43:13.794573    PCI: 00:14.3: enabled 1

  765 09:43:13.797513     GENERIC: 0.0: enabled 1

  766 09:43:13.800623    PCI: 00:15.0: enabled 1

  767 09:43:13.803761     I2C: 00:1a: enabled 1

  768 09:43:13.807085     I2C: 00:31: enabled 1

  769 09:43:13.807511     I2C: 00:32: enabled 1

  770 09:43:13.810587    PCI: 00:15.1: enabled 1

  771 09:43:13.813860     I2C: 00:10: enabled 1

  772 09:43:13.817303    PCI: 00:15.2: enabled 1

  773 09:43:13.820526    PCI: 00:15.3: enabled 1

  774 09:43:13.820917    PCI: 00:16.0: enabled 1

  775 09:43:13.823760    PCI: 00:16.1: enabled 0

  776 09:43:13.827158    PCI: 00:16.2: enabled 0

  777 09:43:13.830458    PCI: 00:16.3: enabled 0

  778 09:43:13.833906    PCI: 00:16.4: enabled 0

  779 09:43:13.834295    PCI: 00:16.5: enabled 0

  780 09:43:13.837100    PCI: 00:17.0: enabled 1

  781 09:43:13.840287    PCI: 00:19.0: enabled 0

  782 09:43:13.885262    PCI: 00:19.1: enabled 1

  783 09:43:13.885684     I2C: 00:15: enabled 1

  784 09:43:13.886028    PCI: 00:19.2: enabled 0

  785 09:43:13.886335    PCI: 00:1d.0: enabled 1

  786 09:43:13.886650     GENERIC: 0.0: enabled 1

  787 09:43:13.887287    PCI: 00:1e.0: enabled 1

  788 09:43:13.887625    PCI: 00:1e.1: enabled 0

  789 09:43:13.887893    PCI: 00:1e.2: enabled 1

  790 09:43:13.888154     SPI: 00: enabled 1

  791 09:43:13.888412    PCI: 00:1e.3: enabled 1

  792 09:43:13.888668     SPI: 00: enabled 1

  793 09:43:13.888920    PCI: 00:1f.0: enabled 1

  794 09:43:13.889172     PNP: 0c09.0: enabled 1

  795 09:43:13.889424    PCI: 00:1f.1: enabled 0

  796 09:43:13.889678    PCI: 00:1f.2: enabled 1

  797 09:43:13.889930     GENERIC: 0.0: enabled 1

  798 09:43:13.890182      GENERIC: 0.0: enabled 1

  799 09:43:13.890739      GENERIC: 1.0: enabled 1

  800 09:43:13.891017    PCI: 00:1f.3: enabled 1

  801 09:43:13.893610    PCI: 00:1f.4: enabled 0

  802 09:43:13.897385    PCI: 00:1f.5: enabled 1

  803 09:43:13.897775    PCI: 00:1f.6: enabled 0

  804 09:43:13.900640    PCI: 00:1f.7: enabled 0

  805 09:43:13.903888   CPU_CLUSTER: 0: enabled 1

  806 09:43:13.906909    APIC: 00: enabled 1

  807 09:43:13.907326    APIC: 01: enabled 1

  808 09:43:13.910654    APIC: 03: enabled 1

  809 09:43:13.913854    APIC: 06: enabled 1

  810 09:43:13.914241    APIC: 05: enabled 1

  811 09:43:13.917165    APIC: 04: enabled 1

  812 09:43:13.919896    APIC: 02: enabled 1

  813 09:43:13.920287    APIC: 07: enabled 1

  814 09:43:13.924533  Root Device scanning...

  815 09:43:13.927788  scan_static_bus for Root Device

  816 09:43:13.931052  DOMAIN: 0000 enabled

  817 09:43:13.934402  CPU_CLUSTER: 0 enabled

  818 09:43:13.934791  DOMAIN: 0000 scanning...

  819 09:43:13.937667  PCI: pci_scan_bus for bus 00

  820 09:43:13.940805  PCI: 00:00.0 [8086/0000] ops

  821 09:43:13.944659  PCI: 00:00.0 [8086/9a12] enabled

  822 09:43:13.947816  PCI: 00:02.0 [8086/0000] bus ops

  823 09:43:13.950965  PCI: 00:02.0 [8086/9a40] enabled

  824 09:43:13.954116  PCI: 00:04.0 [8086/0000] bus ops

  825 09:43:13.957671  PCI: 00:04.0 [8086/9a03] enabled

  826 09:43:13.961169  PCI: 00:05.0 [8086/9a19] enabled

  827 09:43:13.964347  PCI: 00:07.0 [0000/0000] hidden

  828 09:43:13.967146  PCI: 00:08.0 [8086/9a11] enabled

  829 09:43:13.970669  PCI: 00:0a.0 [8086/9a0d] disabled

  830 09:43:13.974382  PCI: 00:0d.0 [8086/0000] bus ops

  831 09:43:13.977476  PCI: 00:0d.0 [8086/9a13] enabled

  832 09:43:13.980542  PCI: 00:14.0 [8086/0000] bus ops

  833 09:43:13.983699  PCI: 00:14.0 [8086/a0ed] enabled

  834 09:43:13.986942  PCI: 00:14.2 [8086/a0ef] enabled

  835 09:43:13.990485  PCI: 00:14.3 [8086/0000] bus ops

  836 09:43:13.993725  PCI: 00:14.3 [8086/a0f0] enabled

  837 09:43:13.997140  PCI: 00:15.0 [8086/0000] bus ops

  838 09:43:14.000336  PCI: 00:15.0 [8086/a0e8] enabled

  839 09:43:14.003662  PCI: 00:15.1 [8086/0000] bus ops

  840 09:43:14.006976  PCI: 00:15.1 [8086/a0e9] enabled

  841 09:43:14.010314  PCI: 00:15.2 [8086/0000] bus ops

  842 09:43:14.013707  PCI: 00:15.2 [8086/a0ea] enabled

  843 09:43:14.016980  PCI: 00:15.3 [8086/0000] bus ops

  844 09:43:14.020301  PCI: 00:15.3 [8086/a0eb] enabled

  845 09:43:14.023644  PCI: 00:16.0 [8086/0000] ops

  846 09:43:14.027091  PCI: 00:16.0 [8086/a0e0] enabled

  847 09:43:14.033740  PCI: Static device PCI: 00:17.0 not found, disabling it.

  848 09:43:14.036679  PCI: 00:19.0 [8086/0000] bus ops

  849 09:43:14.039916  PCI: 00:19.0 [8086/a0c5] disabled

  850 09:43:14.043661  PCI: 00:19.1 [8086/0000] bus ops

  851 09:43:14.046805  PCI: 00:19.1 [8086/a0c6] enabled

  852 09:43:14.050076  PCI: 00:1d.0 [8086/0000] bus ops

  853 09:43:14.053292  PCI: 00:1d.0 [8086/a0b0] enabled

  854 09:43:14.056514  PCI: 00:1e.0 [8086/0000] ops

  855 09:43:14.059664  PCI: 00:1e.0 [8086/a0a8] enabled

  856 09:43:14.063283  PCI: 00:1e.2 [8086/0000] bus ops

  857 09:43:14.066449  PCI: 00:1e.2 [8086/a0aa] enabled

  858 09:43:14.069893  PCI: 00:1e.3 [8086/0000] bus ops

  859 09:43:14.073264  PCI: 00:1e.3 [8086/a0ab] enabled

  860 09:43:14.076227  PCI: 00:1f.0 [8086/0000] bus ops

  861 09:43:14.079931  PCI: 00:1f.0 [8086/a087] enabled

  862 09:43:14.082958  RTC Init

  863 09:43:14.086158  Set power on after power failure.

  864 09:43:14.086538  Disabling Deep S3

  865 09:43:14.089298  Disabling Deep S3

  866 09:43:14.089677  Disabling Deep S4

  867 09:43:14.092774  Disabling Deep S4

  868 09:43:14.093155  Disabling Deep S5

  869 09:43:14.096090  Disabling Deep S5

  870 09:43:14.099613  PCI: 00:1f.2 [0000/0000] hidden

  871 09:43:14.102890  PCI: 00:1f.3 [8086/0000] bus ops

  872 09:43:14.105900  PCI: 00:1f.3 [8086/a0c8] enabled

  873 09:43:14.109266  PCI: 00:1f.5 [8086/0000] bus ops

  874 09:43:14.112549  PCI: 00:1f.5 [8086/a0a4] enabled

  875 09:43:14.116407  PCI: Leftover static devices:

  876 09:43:14.116885  PCI: 00:10.2

  877 09:43:14.119619  PCI: 00:10.6

  878 09:43:14.119998  PCI: 00:10.7

  879 09:43:14.122928  PCI: 00:06.0

  880 09:43:14.123358  PCI: 00:07.1

  881 09:43:14.123673  PCI: 00:07.2

  882 09:43:14.125751  PCI: 00:07.3

  883 09:43:14.126138  PCI: 00:09.0

  884 09:43:14.129101  PCI: 00:0d.1

  885 09:43:14.129489  PCI: 00:0d.2

  886 09:43:14.132341  PCI: 00:0d.3

  887 09:43:14.132727  PCI: 00:0e.0

  888 09:43:14.133063  PCI: 00:12.0

  889 09:43:14.135695  PCI: 00:12.6

  890 09:43:14.136080  PCI: 00:13.0

  891 09:43:14.139026  PCI: 00:14.1

  892 09:43:14.139454  PCI: 00:16.1

  893 09:43:14.139765  PCI: 00:16.2

  894 09:43:14.142578  PCI: 00:16.3

  895 09:43:14.142962  PCI: 00:16.4

  896 09:43:14.145819  PCI: 00:16.5

  897 09:43:14.146207  PCI: 00:17.0

  898 09:43:14.148997  PCI: 00:19.2

  899 09:43:14.149383  PCI: 00:1e.1

  900 09:43:14.149727  PCI: 00:1f.1

  901 09:43:14.152179  PCI: 00:1f.4

  902 09:43:14.152566  PCI: 00:1f.6

  903 09:43:14.155643  PCI: 00:1f.7

  904 09:43:14.158750  PCI: Check your devicetree.cb.

  905 09:43:14.159336  PCI: 00:02.0 scanning...

  906 09:43:14.162122  scan_generic_bus for PCI: 00:02.0

  907 09:43:14.168682  scan_generic_bus for PCI: 00:02.0 done

  908 09:43:14.172140  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

  909 09:43:14.175481  PCI: 00:04.0 scanning...

  910 09:43:14.178856  scan_generic_bus for PCI: 00:04.0

  911 09:43:14.182149  GENERIC: 0.0 enabled

  912 09:43:14.185366  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

  913 09:43:14.191966  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

  914 09:43:14.195055  PCI: 00:0d.0 scanning...

  915 09:43:14.198390  scan_static_bus for PCI: 00:0d.0

  916 09:43:14.198718  USB0 port 0 enabled

  917 09:43:14.201680  USB0 port 0 scanning...

  918 09:43:14.205127  scan_static_bus for USB0 port 0

  919 09:43:14.208937  USB3 port 0 enabled

  920 09:43:14.209345  USB3 port 1 enabled

  921 09:43:14.212059  USB3 port 2 disabled

  922 09:43:14.215075  USB3 port 3 disabled

  923 09:43:14.215470  USB3 port 0 scanning...

  924 09:43:14.218627  scan_static_bus for USB3 port 0

  925 09:43:14.225009  scan_static_bus for USB3 port 0 done

  926 09:43:14.228427  scan_bus: bus USB3 port 0 finished in 6 msecs

  927 09:43:14.231629  USB3 port 1 scanning...

  928 09:43:14.234956  scan_static_bus for USB3 port 1

  929 09:43:14.238312  scan_static_bus for USB3 port 1 done

  930 09:43:14.241276  scan_bus: bus USB3 port 1 finished in 6 msecs

  931 09:43:14.244658  scan_static_bus for USB0 port 0 done

  932 09:43:14.251253  scan_bus: bus USB0 port 0 finished in 43 msecs

  933 09:43:14.254350  scan_static_bus for PCI: 00:0d.0 done

  934 09:43:14.257773  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs

  935 09:43:14.261051  PCI: 00:14.0 scanning...

  936 09:43:14.264369  scan_static_bus for PCI: 00:14.0

  937 09:43:14.267779  USB0 port 0 enabled

  938 09:43:14.271171  USB0 port 0 scanning...

  939 09:43:14.274585  scan_static_bus for USB0 port 0

  940 09:43:14.274749  USB2 port 0 disabled

  941 09:43:14.278065  USB2 port 1 enabled

  942 09:43:14.278230  USB2 port 2 enabled

  943 09:43:14.281039  USB2 port 3 disabled

  944 09:43:14.284722  USB2 port 4 enabled

  945 09:43:14.284916  USB2 port 5 disabled

  946 09:43:14.288154  USB2 port 6 disabled

  947 09:43:14.291477  USB2 port 7 disabled

  948 09:43:14.291795  USB2 port 8 disabled

  949 09:43:14.294671  USB2 port 9 disabled

  950 09:43:14.297688  USB3 port 0 disabled

  951 09:43:14.298025  USB3 port 1 enabled

  952 09:43:14.301157  USB3 port 2 disabled

  953 09:43:14.304511  USB3 port 3 disabled

  954 09:43:14.304836  USB2 port 1 scanning...

  955 09:43:14.307887  scan_static_bus for USB2 port 1

  956 09:43:14.311095  scan_static_bus for USB2 port 1 done

  957 09:43:14.317762  scan_bus: bus USB2 port 1 finished in 6 msecs

  958 09:43:14.320733  USB2 port 2 scanning...

  959 09:43:14.323874  scan_static_bus for USB2 port 2

  960 09:43:14.327163  scan_static_bus for USB2 port 2 done

  961 09:43:14.330969  scan_bus: bus USB2 port 2 finished in 6 msecs

  962 09:43:14.333825  USB2 port 4 scanning...

  963 09:43:14.337082  scan_static_bus for USB2 port 4

  964 09:43:14.340537  scan_static_bus for USB2 port 4 done

  965 09:43:14.343862  scan_bus: bus USB2 port 4 finished in 6 msecs

  966 09:43:14.347116  USB3 port 1 scanning...

  967 09:43:14.350508  scan_static_bus for USB3 port 1

  968 09:43:14.353861  scan_static_bus for USB3 port 1 done

  969 09:43:14.360380  scan_bus: bus USB3 port 1 finished in 6 msecs

  970 09:43:14.363626  scan_static_bus for USB0 port 0 done

  971 09:43:14.366716  scan_bus: bus USB0 port 0 finished in 93 msecs

  972 09:43:14.370185  scan_static_bus for PCI: 00:14.0 done

  973 09:43:14.376836  scan_bus: bus PCI: 00:14.0 finished in 110 msecs

  974 09:43:14.380109  PCI: 00:14.3 scanning...

  975 09:43:14.383529  scan_static_bus for PCI: 00:14.3

  976 09:43:14.383623  GENERIC: 0.0 enabled

  977 09:43:14.389920  scan_static_bus for PCI: 00:14.3 done

  978 09:43:14.393469  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

  979 09:43:14.396840  PCI: 00:15.0 scanning...

  980 09:43:14.400115  scan_static_bus for PCI: 00:15.0

  981 09:43:14.400196  I2C: 00:1a enabled

  982 09:43:14.403436  I2C: 00:31 enabled

  983 09:43:14.406889  I2C: 00:32 enabled

  984 09:43:14.409882  scan_static_bus for PCI: 00:15.0 done

  985 09:43:14.413294  scan_bus: bus PCI: 00:15.0 finished in 13 msecs

  986 09:43:14.416349  PCI: 00:15.1 scanning...

  987 09:43:14.419974  scan_static_bus for PCI: 00:15.1

  988 09:43:14.422827  I2C: 00:10 enabled

  989 09:43:14.426588  scan_static_bus for PCI: 00:15.1 done

  990 09:43:14.429901  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

  991 09:43:14.433078  PCI: 00:15.2 scanning...

  992 09:43:14.436205  scan_static_bus for PCI: 00:15.2

  993 09:43:14.439548  scan_static_bus for PCI: 00:15.2 done

  994 09:43:14.446079  scan_bus: bus PCI: 00:15.2 finished in 7 msecs

  995 09:43:14.446200  PCI: 00:15.3 scanning...

  996 09:43:14.449537  scan_static_bus for PCI: 00:15.3

  997 09:43:14.456070  scan_static_bus for PCI: 00:15.3 done

  998 09:43:14.459375  scan_bus: bus PCI: 00:15.3 finished in 7 msecs

  999 09:43:14.462697  PCI: 00:19.1 scanning...

 1000 09:43:14.466410  scan_static_bus for PCI: 00:19.1

 1001 09:43:14.466500  I2C: 00:15 enabled

 1002 09:43:14.473101  scan_static_bus for PCI: 00:19.1 done

 1003 09:43:14.476434  scan_bus: bus PCI: 00:19.1 finished in 9 msecs

 1004 09:43:14.479700  PCI: 00:1d.0 scanning...

 1005 09:43:14.482522  do_pci_scan_bridge for PCI: 00:1d.0

 1006 09:43:14.485790  PCI: pci_scan_bus for bus 01

 1007 09:43:14.489105  PCI: 01:00.0 [1c5c/174a] enabled

 1008 09:43:14.492457  GENERIC: 0.0 enabled

 1009 09:43:14.495656  Enabling Common Clock Configuration

 1010 09:43:14.499265  L1 Sub-State supported from root port 29

 1011 09:43:14.502393  L1 Sub-State Support = 0xf

 1012 09:43:14.505670  CommonModeRestoreTime = 0x28

 1013 09:43:14.509196  Power On Value = 0x16, Power On Scale = 0x0

 1014 09:43:14.512393  ASPM: Enabled L1

 1015 09:43:14.515653  PCIe: Max_Payload_Size adjusted to 128

 1016 09:43:14.518862  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs

 1017 09:43:14.522076  PCI: 00:1e.2 scanning...

 1018 09:43:14.525746  scan_generic_bus for PCI: 00:1e.2

 1019 09:43:14.528788  SPI: 00 enabled

 1020 09:43:14.532509  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done

 1021 09:43:14.538759  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

 1022 09:43:14.542218  PCI: 00:1e.3 scanning...

 1023 09:43:14.545535  scan_generic_bus for PCI: 00:1e.3

 1024 09:43:14.545993  SPI: 00 enabled

 1025 09:43:14.552353  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1026 09:43:14.558677  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1027 09:43:14.559233  PCI: 00:1f.0 scanning...

 1028 09:43:14.561974  scan_static_bus for PCI: 00:1f.0

 1029 09:43:14.565387  PNP: 0c09.0 enabled

 1030 09:43:14.568606  PNP: 0c09.0 scanning...

 1031 09:43:14.571865  scan_static_bus for PNP: 0c09.0

 1032 09:43:14.575640  scan_static_bus for PNP: 0c09.0 done

 1033 09:43:14.578443  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1034 09:43:14.585179  scan_static_bus for PCI: 00:1f.0 done

 1035 09:43:14.588488  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1036 09:43:14.591924  PCI: 00:1f.2 scanning...

 1037 09:43:14.595187  scan_static_bus for PCI: 00:1f.2

 1038 09:43:14.598631  GENERIC: 0.0 enabled

 1039 09:43:14.599031  GENERIC: 0.0 scanning...

 1040 09:43:14.601880  scan_static_bus for GENERIC: 0.0

 1041 09:43:14.605073  GENERIC: 0.0 enabled

 1042 09:43:14.608633  GENERIC: 1.0 enabled

 1043 09:43:14.611653  scan_static_bus for GENERIC: 0.0 done

 1044 09:43:14.614967  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1045 09:43:14.618234  scan_static_bus for PCI: 00:1f.2 done

 1046 09:43:14.624757  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1047 09:43:14.628123  PCI: 00:1f.3 scanning...

 1048 09:43:14.631326  scan_static_bus for PCI: 00:1f.3

 1049 09:43:14.634548  scan_static_bus for PCI: 00:1f.3 done

 1050 09:43:14.637642  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1051 09:43:14.641348  PCI: 00:1f.5 scanning...

 1052 09:43:14.644187  scan_generic_bus for PCI: 00:1f.5

 1053 09:43:14.647997  scan_generic_bus for PCI: 00:1f.5 done

 1054 09:43:14.654155  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1055 09:43:14.657476  scan_bus: bus DOMAIN: 0000 finished in 717 msecs

 1056 09:43:14.660836  scan_static_bus for Root Device done

 1057 09:43:14.667379  scan_bus: bus Root Device finished in 737 msecs

 1058 09:43:14.667779  done

 1059 09:43:14.673809  BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms

 1060 09:43:14.677619  Chrome EC: UHEPI supported

 1061 09:43:14.684159  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)

 1062 09:43:14.690320  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1063 09:43:14.693996  SPI flash protection: WPSW=0 SRP0=0

 1064 09:43:14.696983  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1065 09:43:14.703866  BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms

 1066 09:43:14.707190  found VGA at PCI: 00:02.0

 1067 09:43:14.710628  Setting up VGA for PCI: 00:02.0

 1068 09:43:14.713888  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1069 09:43:14.720382  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1070 09:43:14.723631  Allocating resources...

 1071 09:43:14.724020  Reading resources...

 1072 09:43:14.726904  Root Device read_resources bus 0 link: 0

 1073 09:43:14.733648  DOMAIN: 0000 read_resources bus 0 link: 0

 1074 09:43:14.737272  PCI: 00:04.0 read_resources bus 1 link: 0

 1075 09:43:14.743793  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1076 09:43:14.747264  PCI: 00:0d.0 read_resources bus 0 link: 0

 1077 09:43:14.753497  USB0 port 0 read_resources bus 0 link: 0

 1078 09:43:14.756746  USB0 port 0 read_resources bus 0 link: 0 done

 1079 09:43:14.763507  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1080 09:43:14.766611  PCI: 00:14.0 read_resources bus 0 link: 0

 1081 09:43:14.769901  USB0 port 0 read_resources bus 0 link: 0

 1082 09:43:14.777688  USB0 port 0 read_resources bus 0 link: 0 done

 1083 09:43:14.780853  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1084 09:43:14.788155  PCI: 00:14.3 read_resources bus 0 link: 0

 1085 09:43:14.791476  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1086 09:43:14.798389  PCI: 00:15.0 read_resources bus 0 link: 0

 1087 09:43:14.801032  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1088 09:43:14.807817  PCI: 00:15.1 read_resources bus 0 link: 0

 1089 09:43:14.810972  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1090 09:43:14.818341  PCI: 00:19.1 read_resources bus 0 link: 0

 1091 09:43:14.821669  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1092 09:43:14.828289  PCI: 00:1d.0 read_resources bus 1 link: 0

 1093 09:43:14.831630  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1094 09:43:14.838385  PCI: 00:1e.2 read_resources bus 2 link: 0

 1095 09:43:14.841724  PCI: 00:1e.2 read_resources bus 2 link: 0 done

 1096 09:43:14.848194  PCI: 00:1e.3 read_resources bus 3 link: 0

 1097 09:43:14.851372  PCI: 00:1e.3 read_resources bus 3 link: 0 done

 1098 09:43:14.857867  PCI: 00:1f.0 read_resources bus 0 link: 0

 1099 09:43:14.861360  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1100 09:43:14.867908  PCI: 00:1f.2 read_resources bus 0 link: 0

 1101 09:43:14.871341  GENERIC: 0.0 read_resources bus 0 link: 0

 1102 09:43:14.877883  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1103 09:43:14.881037  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1104 09:43:14.887878  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1105 09:43:14.890819  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1106 09:43:14.897848  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1107 09:43:14.900786  Root Device read_resources bus 0 link: 0 done

 1108 09:43:14.904000  Done reading resources.

 1109 09:43:14.910636  Show resources in subtree (Root Device)...After reading.

 1110 09:43:14.914058   Root Device child on link 0 DOMAIN: 0000

 1111 09:43:14.917300    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1112 09:43:14.927266    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1113 09:43:14.937420    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1114 09:43:14.940687     PCI: 00:00.0

 1115 09:43:14.950199     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1116 09:43:14.957345     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1117 09:43:14.967053     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1118 09:43:14.976944     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1119 09:43:14.986835     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1120 09:43:14.996674     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1121 09:43:15.006516     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1122 09:43:15.013617     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1123 09:43:15.023202     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1124 09:43:15.033148     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1125 09:43:15.042834     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1126 09:43:15.052623     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1127 09:43:15.060129     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1128 09:43:15.070347     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1129 09:43:15.080347     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1130 09:43:15.090342     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1131 09:43:15.099639     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1132 09:43:15.109591     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1133 09:43:15.116058     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1134 09:43:15.125933     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1135 09:43:15.129291     PCI: 00:02.0

 1136 09:43:15.139413     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1137 09:43:15.149456     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1138 09:43:15.159208     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1139 09:43:15.162581     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1140 09:43:15.172644     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1141 09:43:15.172750      GENERIC: 0.0

 1142 09:43:15.176290     PCI: 00:05.0

 1143 09:43:15.185646     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1144 09:43:15.188946     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1145 09:43:15.192270      GENERIC: 0.0

 1146 09:43:15.192436     PCI: 00:08.0

 1147 09:43:15.202505     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1148 09:43:15.205940     PCI: 00:0a.0

 1149 09:43:15.209269     PCI: 00:0d.0 child on link 0 USB0 port 0

 1150 09:43:15.219362     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1151 09:43:15.226005      USB0 port 0 child on link 0 USB3 port 0

 1152 09:43:15.226390       USB3 port 0

 1153 09:43:15.229110       USB3 port 1

 1154 09:43:15.229497       USB3 port 2

 1155 09:43:15.232622       USB3 port 3

 1156 09:43:15.236035     PCI: 00:14.0 child on link 0 USB0 port 0

 1157 09:43:15.246057     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1158 09:43:15.249012      USB0 port 0 child on link 0 USB2 port 0

 1159 09:43:15.252413       USB2 port 0

 1160 09:43:15.255726       USB2 port 1

 1161 09:43:15.256110       USB2 port 2

 1162 09:43:15.258885       USB2 port 3

 1163 09:43:15.259268       USB2 port 4

 1164 09:43:15.262289       USB2 port 5

 1165 09:43:15.262673       USB2 port 6

 1166 09:43:15.265464       USB2 port 7

 1167 09:43:15.265848       USB2 port 8

 1168 09:43:15.268839       USB2 port 9

 1169 09:43:15.269225       USB3 port 0

 1170 09:43:15.272211       USB3 port 1

 1171 09:43:15.272596       USB3 port 2

 1172 09:43:15.275276       USB3 port 3

 1173 09:43:15.275713     PCI: 00:14.2

 1174 09:43:15.285646     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1175 09:43:15.295576     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1176 09:43:15.302229     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1177 09:43:15.312290     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1178 09:43:15.312690      GENERIC: 0.0

 1179 09:43:15.318861     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1180 09:43:15.328758     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1181 09:43:15.329148      I2C: 00:1a

 1182 09:43:15.332031      I2C: 00:31

 1183 09:43:15.332475      I2C: 00:32

 1184 09:43:15.335124     PCI: 00:15.1 child on link 0 I2C: 00:10

 1185 09:43:15.345262     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1186 09:43:15.348220      I2C: 00:10

 1187 09:43:15.348609     PCI: 00:15.2

 1188 09:43:15.358434     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1189 09:43:15.361750     PCI: 00:15.3

 1190 09:43:15.371610     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1191 09:43:15.372001     PCI: 00:16.0

 1192 09:43:15.381501     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1193 09:43:15.384813     PCI: 00:19.0

 1194 09:43:15.388046     PCI: 00:19.1 child on link 0 I2C: 00:15

 1195 09:43:15.398208     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1196 09:43:15.401130      I2C: 00:15

 1197 09:43:15.404712     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1198 09:43:15.414913     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1199 09:43:15.424808     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1200 09:43:15.431224     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1201 09:43:15.434382      GENERIC: 0.0

 1202 09:43:15.434771      PCI: 01:00.0

 1203 09:43:15.444509      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1204 09:43:15.454230      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18

 1205 09:43:15.464260      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c

 1206 09:43:15.467552     PCI: 00:1e.0

 1207 09:43:15.477526     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1208 09:43:15.480776     PCI: 00:1e.2 child on link 0 SPI: 00

 1209 09:43:15.490795     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1210 09:43:15.494345      SPI: 00

 1211 09:43:15.497281     PCI: 00:1e.3 child on link 0 SPI: 00

 1212 09:43:15.507395     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1213 09:43:15.507786      SPI: 00

 1214 09:43:15.510676     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1215 09:43:15.520511     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1216 09:43:15.524378      PNP: 0c09.0

 1217 09:43:15.531024      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1218 09:43:15.536991     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1219 09:43:15.543978     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1220 09:43:15.553641     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1221 09:43:15.560144      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1222 09:43:15.560530       GENERIC: 0.0

 1223 09:43:15.563627       GENERIC: 1.0

 1224 09:43:15.564006     PCI: 00:1f.3

 1225 09:43:15.573408     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1226 09:43:15.583362     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1227 09:43:15.586798     PCI: 00:1f.5

 1228 09:43:15.596641     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1229 09:43:15.599811    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1230 09:43:15.600316     APIC: 00

 1231 09:43:15.603141     APIC: 01

 1232 09:43:15.603568     APIC: 03

 1233 09:43:15.603866     APIC: 06

 1234 09:43:15.606525     APIC: 05

 1235 09:43:15.606905     APIC: 04

 1236 09:43:15.609878     APIC: 02

 1237 09:43:15.610254     APIC: 07

 1238 09:43:15.616823  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1239 09:43:15.623210   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1240 09:43:15.629667   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1241 09:43:15.636300   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1242 09:43:15.639918    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1243 09:43:15.643155    PCI: 01:00.0 18 *  [0x4000 - 0x4fff] mem

 1244 09:43:15.649617    PCI: 01:00.0 1c *  [0x5000 - 0x5fff] mem

 1245 09:43:15.655911   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1246 09:43:15.662883   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1247 09:43:15.669061   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1248 09:43:15.675737  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1249 09:43:15.682817  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1250 09:43:15.692305   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1251 09:43:15.699090   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1252 09:43:15.706106   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1253 09:43:15.708887   DOMAIN: 0000: Resource ranges:

 1254 09:43:15.712374   * Base: 1000, Size: 800, Tag: 100

 1255 09:43:15.715552   * Base: 1900, Size: e700, Tag: 100

 1256 09:43:15.722588    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1257 09:43:15.728918  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1258 09:43:15.735905  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1259 09:43:15.742360   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)

 1260 09:43:15.751955   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)

 1261 09:43:15.758554   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 1262 09:43:15.765299   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 1263 09:43:15.775036   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)

 1264 09:43:15.782071   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 1265 09:43:15.788724   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)

 1266 09:43:15.798652   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)

 1267 09:43:15.805115   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)

 1268 09:43:15.811541   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)

 1269 09:43:15.821292   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)

 1270 09:43:15.828111   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)

 1271 09:43:15.834722   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)

 1272 09:43:15.844811   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)

 1273 09:43:15.851142   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)

 1274 09:43:15.857963   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)

 1275 09:43:15.867733   update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)

 1276 09:43:15.874698   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)

 1277 09:43:15.880903   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)

 1278 09:43:15.890729   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)

 1279 09:43:15.897355   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1280 09:43:15.904077   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1281 09:43:15.907384   DOMAIN: 0000: Resource ranges:

 1282 09:43:15.913934   * Base: 7fc00000, Size: 40400000, Tag: 200

 1283 09:43:15.917370   * Base: d0000000, Size: 28000000, Tag: 200

 1284 09:43:15.920717   * Base: fa000000, Size: 1000000, Tag: 200

 1285 09:43:15.927256   * Base: fb001000, Size: 2fff000, Tag: 200

 1286 09:43:15.930467   * Base: fe010000, Size: 2e000, Tag: 200

 1287 09:43:15.933686   * Base: fe03f000, Size: d41000, Tag: 200

 1288 09:43:15.937361   * Base: fed88000, Size: 8000, Tag: 200

 1289 09:43:15.943479   * Base: fed93000, Size: d000, Tag: 200

 1290 09:43:15.946990   * Base: feda2000, Size: 1e000, Tag: 200

 1291 09:43:15.950614   * Base: fede0000, Size: 1220000, Tag: 200

 1292 09:43:15.957141   * Base: 280400000, Size: 7d7fc00000, Tag: 100200

 1293 09:43:15.963382    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem

 1294 09:43:15.970270    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem

 1295 09:43:15.976952    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem

 1296 09:43:15.983436    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem

 1297 09:43:15.990136    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem

 1298 09:43:15.996596    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem

 1299 09:43:16.003354    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem

 1300 09:43:16.009746    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem

 1301 09:43:16.016303    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem

 1302 09:43:16.022990    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem

 1303 09:43:16.029741    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem

 1304 09:43:16.036443    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem

 1305 09:43:16.043345    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem

 1306 09:43:16.049807    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem

 1307 09:43:16.056090    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem

 1308 09:43:16.062071    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem

 1309 09:43:16.069263    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem

 1310 09:43:16.076030    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem

 1311 09:43:16.082613    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem

 1312 09:43:16.088818    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem

 1313 09:43:16.095495    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem

 1314 09:43:16.102178    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem

 1315 09:43:16.108831  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1316 09:43:16.115600  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff

 1317 09:43:16.118702   PCI: 00:1d.0: Resource ranges:

 1318 09:43:16.125459   * Base: 7fc00000, Size: 100000, Tag: 200

 1319 09:43:16.132623    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem

 1320 09:43:16.138923    PCI: 01:00.0 18 *  [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem

 1321 09:43:16.145494    PCI: 01:00.0 1c *  [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem

 1322 09:43:16.152117  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done

 1323 09:43:16.158729  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1324 09:43:16.165593  Root Device assign_resources, bus 0 link: 0

 1325 09:43:16.168813  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1326 09:43:16.178747  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64

 1327 09:43:16.185149  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64

 1328 09:43:16.195374  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1329 09:43:16.201612  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64

 1330 09:43:16.205109  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1331 09:43:16.211760  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1332 09:43:16.218270  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64

 1333 09:43:16.228058  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64

 1334 09:43:16.234771  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64

 1335 09:43:16.241517  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1336 09:43:16.244889  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1337 09:43:16.254790  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64

 1338 09:43:16.258008  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1339 09:43:16.261519  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1340 09:43:16.271407  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64

 1341 09:43:16.277997  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64

 1342 09:43:16.287521  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64

 1343 09:43:16.291001  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1344 09:43:16.296924  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1345 09:43:16.303649  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64

 1346 09:43:16.310582  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1347 09:43:16.314340  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1348 09:43:16.320407  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64

 1349 09:43:16.326865  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1350 09:43:16.330028  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1351 09:43:16.340443  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64

 1352 09:43:16.347389  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64

 1353 09:43:16.357055  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64

 1354 09:43:16.363535  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64

 1355 09:43:16.370071  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1356 09:43:16.373729  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1357 09:43:16.383405  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1358 09:43:16.393464  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1359 09:43:16.399860  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem

 1360 09:43:16.406573  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1361 09:43:16.413384  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64

 1362 09:43:16.419892  PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem

 1363 09:43:16.430297  PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem

 1364 09:43:16.432980  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1365 09:43:16.443050  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64

 1366 09:43:16.446259  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1367 09:43:16.453309  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1368 09:43:16.459337  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64

 1369 09:43:16.465779  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1370 09:43:16.469795  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1371 09:43:16.472352  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1372 09:43:16.479854  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1373 09:43:16.482635  LPC: Trying to open IO window from 800 size 1ff

 1374 09:43:16.492940  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64

 1375 09:43:16.499824  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64

 1376 09:43:16.509101  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem

 1377 09:43:16.512045  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1378 09:43:16.518597  Root Device assign_resources, bus 0 link: 0

 1379 09:43:16.519030  Done setting resources.

 1380 09:43:16.525652  Show resources in subtree (Root Device)...After assigning values.

 1381 09:43:16.531930   Root Device child on link 0 DOMAIN: 0000

 1382 09:43:16.535211    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1383 09:43:16.545381    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1384 09:43:16.555386    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1385 09:43:16.555819     PCI: 00:00.0

 1386 09:43:16.565333     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1387 09:43:16.575123     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1388 09:43:16.585168     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1389 09:43:16.595118     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1390 09:43:16.602442     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1391 09:43:16.611750     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1392 09:43:16.621454     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1393 09:43:16.632083     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1394 09:43:16.641461     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1395 09:43:16.651495     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1396 09:43:16.658206     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1397 09:43:16.667973     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1398 09:43:16.678010     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1399 09:43:16.687949     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1400 09:43:16.697968     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1401 09:43:16.704555     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1402 09:43:16.714614     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1403 09:43:16.724426     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1404 09:43:16.734229     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1405 09:43:16.744513     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1406 09:43:16.744909     PCI: 00:02.0

 1407 09:43:16.757912     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10

 1408 09:43:16.767862     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18

 1409 09:43:16.777473     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1410 09:43:16.780669     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1411 09:43:16.791231     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10

 1412 09:43:16.794429      GENERIC: 0.0

 1413 09:43:16.794935     PCI: 00:05.0

 1414 09:43:16.804282     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10

 1415 09:43:16.810998     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1416 09:43:16.811554      GENERIC: 0.0

 1417 09:43:16.813745     PCI: 00:08.0

 1418 09:43:16.823900     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10

 1419 09:43:16.824408     PCI: 00:0a.0

 1420 09:43:16.830572     PCI: 00:0d.0 child on link 0 USB0 port 0

 1421 09:43:16.840380     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10

 1422 09:43:16.843653      USB0 port 0 child on link 0 USB3 port 0

 1423 09:43:16.846908       USB3 port 0

 1424 09:43:16.847379       USB3 port 1

 1425 09:43:16.850135       USB3 port 2

 1426 09:43:16.850630       USB3 port 3

 1427 09:43:16.857147     PCI: 00:14.0 child on link 0 USB0 port 0

 1428 09:43:16.866822     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10

 1429 09:43:16.870559      USB0 port 0 child on link 0 USB2 port 0

 1430 09:43:16.873427       USB2 port 0

 1431 09:43:16.873858       USB2 port 1

 1432 09:43:16.876780       USB2 port 2

 1433 09:43:16.877211       USB2 port 3

 1434 09:43:16.880220       USB2 port 4

 1435 09:43:16.880730       USB2 port 5

 1436 09:43:16.883453       USB2 port 6

 1437 09:43:16.883964       USB2 port 7

 1438 09:43:16.886934       USB2 port 8

 1439 09:43:16.890006       USB2 port 9

 1440 09:43:16.890517       USB3 port 0

 1441 09:43:16.893497       USB3 port 1

 1442 09:43:16.894006       USB3 port 2

 1443 09:43:16.896693       USB3 port 3

 1444 09:43:16.897125     PCI: 00:14.2

 1445 09:43:16.906810     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10

 1446 09:43:16.916684     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18

 1447 09:43:16.923192     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1448 09:43:16.933147     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10

 1449 09:43:16.933588      GENERIC: 0.0

 1450 09:43:16.939911     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1451 09:43:16.949701     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10

 1452 09:43:16.950231      I2C: 00:1a

 1453 09:43:16.953184      I2C: 00:31

 1454 09:43:16.953692      I2C: 00:32

 1455 09:43:16.959290     PCI: 00:15.1 child on link 0 I2C: 00:10

 1456 09:43:16.969409     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10

 1457 09:43:16.969930      I2C: 00:10

 1458 09:43:16.972589     PCI: 00:15.2

 1459 09:43:16.982687     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10

 1460 09:43:16.983205     PCI: 00:15.3

 1461 09:43:16.992215     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10

 1462 09:43:16.995763     PCI: 00:16.0

 1463 09:43:17.005590     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10

 1464 09:43:17.008933     PCI: 00:19.0

 1465 09:43:17.012115     PCI: 00:19.1 child on link 0 I2C: 00:15

 1466 09:43:17.022112     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10

 1467 09:43:17.025402      I2C: 00:15

 1468 09:43:17.028663     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1469 09:43:17.038956     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1470 09:43:17.048860     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1471 09:43:17.058728     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20

 1472 09:43:17.061828      GENERIC: 0.0

 1473 09:43:17.062337      PCI: 01:00.0

 1474 09:43:17.075000      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10

 1475 09:43:17.084960      PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18

 1476 09:43:17.094936      PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c

 1477 09:43:17.095497     PCI: 00:1e.0

 1478 09:43:17.107908     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1479 09:43:17.111557     PCI: 00:1e.2 child on link 0 SPI: 00

 1480 09:43:17.121055     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10

 1481 09:43:17.124636      SPI: 00

 1482 09:43:17.128149     PCI: 00:1e.3 child on link 0 SPI: 00

 1483 09:43:17.138159     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10

 1484 09:43:17.138672      SPI: 00

 1485 09:43:17.144527     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1486 09:43:17.151157     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1487 09:43:17.154504      PNP: 0c09.0

 1488 09:43:17.161000      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1489 09:43:17.167668     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1490 09:43:17.177645     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1491 09:43:17.183972     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1492 09:43:17.190729      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1493 09:43:17.191246       GENERIC: 0.0

 1494 09:43:17.194019       GENERIC: 1.0

 1495 09:43:17.194524     PCI: 00:1f.3

 1496 09:43:17.207074     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10

 1497 09:43:17.216892     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20

 1498 09:43:17.217535     PCI: 00:1f.5

 1499 09:43:17.227018     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10

 1500 09:43:17.233658    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1501 09:43:17.234158     APIC: 00

 1502 09:43:17.234498     APIC: 01

 1503 09:43:17.236889     APIC: 03

 1504 09:43:17.237328     APIC: 06

 1505 09:43:17.240430     APIC: 05

 1506 09:43:17.240817     APIC: 04

 1507 09:43:17.241224     APIC: 02

 1508 09:43:17.243242     APIC: 07

 1509 09:43:17.246546  Done allocating resources.

 1510 09:43:17.249844  BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms

 1511 09:43:17.256784  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

 1512 09:43:17.260267  Configure GPIOs for I2S audio on UP4.

 1513 09:43:17.267799  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms

 1514 09:43:17.271191  Enabling resources...

 1515 09:43:17.274070  PCI: 00:00.0 subsystem <- 8086/9a12

 1516 09:43:17.277690  PCI: 00:00.0 cmd <- 06

 1517 09:43:17.280597  PCI: 00:02.0 subsystem <- 8086/9a40

 1518 09:43:17.283851  PCI: 00:02.0 cmd <- 03

 1519 09:43:17.287113  PCI: 00:04.0 subsystem <- 8086/9a03

 1520 09:43:17.290619  PCI: 00:04.0 cmd <- 02

 1521 09:43:17.293732  PCI: 00:05.0 subsystem <- 8086/9a19

 1522 09:43:17.294123  PCI: 00:05.0 cmd <- 02

 1523 09:43:17.300883  PCI: 00:08.0 subsystem <- 8086/9a11

 1524 09:43:17.301382  PCI: 00:08.0 cmd <- 06

 1525 09:43:17.303886  PCI: 00:0d.0 subsystem <- 8086/9a13

 1526 09:43:17.307066  PCI: 00:0d.0 cmd <- 02

 1527 09:43:17.310743  PCI: 00:14.0 subsystem <- 8086/a0ed

 1528 09:43:17.314317  PCI: 00:14.0 cmd <- 02

 1529 09:43:17.317544  PCI: 00:14.2 subsystem <- 8086/a0ef

 1530 09:43:17.320457  PCI: 00:14.2 cmd <- 02

 1531 09:43:17.323756  PCI: 00:14.3 subsystem <- 8086/a0f0

 1532 09:43:17.326822  PCI: 00:14.3 cmd <- 02

 1533 09:43:17.330654  PCI: 00:15.0 subsystem <- 8086/a0e8

 1534 09:43:17.333608  PCI: 00:15.0 cmd <- 02

 1535 09:43:17.337048  PCI: 00:15.1 subsystem <- 8086/a0e9

 1536 09:43:17.340444  PCI: 00:15.1 cmd <- 02

 1537 09:43:17.343934  PCI: 00:15.2 subsystem <- 8086/a0ea

 1538 09:43:17.346787  PCI: 00:15.2 cmd <- 02

 1539 09:43:17.349984  PCI: 00:15.3 subsystem <- 8086/a0eb

 1540 09:43:17.350463  PCI: 00:15.3 cmd <- 02

 1541 09:43:17.356283  PCI: 00:16.0 subsystem <- 8086/a0e0

 1542 09:43:17.356449  PCI: 00:16.0 cmd <- 02

 1543 09:43:17.359806  PCI: 00:19.1 subsystem <- 8086/a0c6

 1544 09:43:17.363245  PCI: 00:19.1 cmd <- 02

 1545 09:43:17.366008  PCI: 00:1d.0 bridge ctrl <- 0013

 1546 09:43:17.370270  PCI: 00:1d.0 subsystem <- 8086/a0b0

 1547 09:43:17.372731  PCI: 00:1d.0 cmd <- 06

 1548 09:43:17.376341  PCI: 00:1e.0 subsystem <- 8086/a0a8

 1549 09:43:17.379657  PCI: 00:1e.0 cmd <- 06

 1550 09:43:17.382534  PCI: 00:1e.2 subsystem <- 8086/a0aa

 1551 09:43:17.386258  PCI: 00:1e.2 cmd <- 06

 1552 09:43:17.389441  PCI: 00:1e.3 subsystem <- 8086/a0ab

 1553 09:43:17.392594  PCI: 00:1e.3 cmd <- 02

 1554 09:43:17.395517  PCI: 00:1f.0 subsystem <- 8086/a087

 1555 09:43:17.399368  PCI: 00:1f.0 cmd <- 407

 1556 09:43:17.402965  PCI: 00:1f.3 subsystem <- 8086/a0c8

 1557 09:43:17.405434  PCI: 00:1f.3 cmd <- 02

 1558 09:43:17.409178  PCI: 00:1f.5 subsystem <- 8086/a0a4

 1559 09:43:17.412482  PCI: 00:1f.5 cmd <- 406

 1560 09:43:17.415885  PCI: 01:00.0 cmd <- 02

 1561 09:43:17.419895  done.

 1562 09:43:17.422865  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms

 1563 09:43:17.426038  Initializing devices...

 1564 09:43:17.429352  Root Device init

 1565 09:43:17.432837  Chrome EC: Set SMI mask to 0x0000000000000000

 1566 09:43:17.439367  Chrome EC: clear events_b mask to 0x0000000000000000

 1567 09:43:17.445715  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1568 09:43:17.452516  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e

 1569 09:43:17.456229  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e

 1570 09:43:17.462435  Chrome EC: Set WAKE mask to 0x0000000000000000

 1571 09:43:17.468901  fw_config match found: DB_USB=USB3_ACTIVE

 1572 09:43:17.472241  Configure Right Type-C port orientation for retimer

 1573 09:43:17.475672  Root Device init finished in 44 msecs

 1574 09:43:17.479515  PCI: 00:00.0 init

 1575 09:43:17.482639  CPU TDP = 9 Watts

 1576 09:43:17.483148  CPU PL1 = 9 Watts

 1577 09:43:17.485739  CPU PL2 = 40 Watts

 1578 09:43:17.489317  CPU PL4 = 83 Watts

 1579 09:43:17.492286  PCI: 00:00.0 init finished in 8 msecs

 1580 09:43:17.495584  PCI: 00:02.0 init

 1581 09:43:17.496147  GMA: Found VBT in CBFS

 1582 09:43:17.498576  GMA: Found valid VBT in CBFS

 1583 09:43:17.505177  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1584 09:43:17.511788                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000

 1585 09:43:17.515214  PCI: 00:02.0 init finished in 18 msecs

 1586 09:43:17.519428  PCI: 00:05.0 init

 1587 09:43:17.521781  PCI: 00:05.0 init finished in 0 msecs

 1588 09:43:17.525296  PCI: 00:08.0 init

 1589 09:43:17.528529  PCI: 00:08.0 init finished in 0 msecs

 1590 09:43:17.531602  PCI: 00:14.0 init

 1591 09:43:17.535082  PCI: 00:14.0 init finished in 0 msecs

 1592 09:43:17.538462  PCI: 00:14.2 init

 1593 09:43:17.541683  PCI: 00:14.2 init finished in 0 msecs

 1594 09:43:17.545257  PCI: 00:15.0 init

 1595 09:43:17.548416  I2C bus 0 version 0x3230302a

 1596 09:43:17.551949  DW I2C bus 0 at 0x7fe4e000 (400 KHz)

 1597 09:43:17.554654  PCI: 00:15.0 init finished in 6 msecs

 1598 09:43:17.558453  PCI: 00:15.1 init

 1599 09:43:17.558930  I2C bus 1 version 0x3230302a

 1600 09:43:17.564858  DW I2C bus 1 at 0x7fe4f000 (400 KHz)

 1601 09:43:17.568067  PCI: 00:15.1 init finished in 6 msecs

 1602 09:43:17.568539  PCI: 00:15.2 init

 1603 09:43:17.571263  I2C bus 2 version 0x3230302a

 1604 09:43:17.574722  DW I2C bus 2 at 0x7fe50000 (400 KHz)

 1605 09:43:17.581595  PCI: 00:15.2 init finished in 6 msecs

 1606 09:43:17.581986  PCI: 00:15.3 init

 1607 09:43:17.585164  I2C bus 3 version 0x3230302a

 1608 09:43:17.588199  DW I2C bus 3 at 0x7fe51000 (400 KHz)

 1609 09:43:17.591465  PCI: 00:15.3 init finished in 6 msecs

 1610 09:43:17.594281  PCI: 00:16.0 init

 1611 09:43:17.597572  PCI: 00:16.0 init finished in 0 msecs

 1612 09:43:17.601185  PCI: 00:19.1 init

 1613 09:43:17.604141  I2C bus 5 version 0x3230302a

 1614 09:43:17.607398  DW I2C bus 5 at 0x7fe53000 (400 KHz)

 1615 09:43:17.611042  PCI: 00:19.1 init finished in 6 msecs

 1616 09:43:17.614160  PCI: 00:1d.0 init

 1617 09:43:17.617727  Initializing PCH PCIe bridge.

 1618 09:43:17.621254  PCI: 00:1d.0 init finished in 3 msecs

 1619 09:43:17.623853  PCI: 00:1f.0 init

 1620 09:43:17.627159  IOAPIC: Initializing IOAPIC at 0xfec00000

 1621 09:43:17.634210  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1622 09:43:17.634724  IOAPIC: ID = 0x02

 1623 09:43:17.637349  IOAPIC: Dumping registers

 1624 09:43:17.640302    reg 0x0000: 0x02000000

 1625 09:43:17.640732    reg 0x0001: 0x00770020

 1626 09:43:17.643791    reg 0x0002: 0x00000000

 1627 09:43:17.650675  PCI: 00:1f.0 init finished in 21 msecs

 1628 09:43:17.651153  PCI: 00:1f.2 init

 1629 09:43:17.653773  Disabling ACPI via APMC.

 1630 09:43:17.657973  APMC done.

 1631 09:43:17.661250  PCI: 00:1f.2 init finished in 6 msecs

 1632 09:43:17.673550  PCI: 01:00.0 init

 1633 09:43:17.676439  PCI: 01:00.0 init finished in 0 msecs

 1634 09:43:17.679715  PNP: 0c09.0 init

 1635 09:43:17.686700  Google Chrome EC uptime: 10.182 seconds

 1636 09:43:17.689879  Google Chrome AP resets since EC boot: 0

 1637 09:43:17.693260  Google Chrome most recent AP reset causes:

 1638 09:43:17.699826  Google Chrome EC reset flags at last EC boot: reset-pin | hard

 1639 09:43:17.702739  PNP: 0c09.0 init finished in 20 msecs

 1640 09:43:17.709496  Devices initialized

 1641 09:43:17.712739  Show all devs... After init.

 1642 09:43:17.715864  Root Device: enabled 1

 1643 09:43:17.716362  DOMAIN: 0000: enabled 1

 1644 09:43:17.718892  CPU_CLUSTER: 0: enabled 1

 1645 09:43:17.722600  PCI: 00:00.0: enabled 1

 1646 09:43:17.725620  PCI: 00:02.0: enabled 1

 1647 09:43:17.726054  PCI: 00:04.0: enabled 1

 1648 09:43:17.728737  PCI: 00:05.0: enabled 1

 1649 09:43:17.732174  PCI: 00:06.0: enabled 0

 1650 09:43:17.735504  PCI: 00:07.0: enabled 0

 1651 09:43:17.735893  PCI: 00:07.1: enabled 0

 1652 09:43:17.738758  PCI: 00:07.2: enabled 0

 1653 09:43:17.742358  PCI: 00:07.3: enabled 0

 1654 09:43:17.745721  PCI: 00:08.0: enabled 1

 1655 09:43:17.746426  PCI: 00:09.0: enabled 0

 1656 09:43:17.748879  PCI: 00:0a.0: enabled 0

 1657 09:43:17.752204  PCI: 00:0d.0: enabled 1

 1658 09:43:17.754962  PCI: 00:0d.1: enabled 0

 1659 09:43:17.755388  PCI: 00:0d.2: enabled 0

 1660 09:43:17.758353  PCI: 00:0d.3: enabled 0

 1661 09:43:17.761790  PCI: 00:0e.0: enabled 0

 1662 09:43:17.765006  PCI: 00:10.2: enabled 1

 1663 09:43:17.765393  PCI: 00:10.6: enabled 0

 1664 09:43:17.768650  PCI: 00:10.7: enabled 0

 1665 09:43:17.771452  PCI: 00:12.0: enabled 0

 1666 09:43:17.774967  PCI: 00:12.6: enabled 0

 1667 09:43:17.775412  PCI: 00:13.0: enabled 0

 1668 09:43:17.778087  PCI: 00:14.0: enabled 1

 1669 09:43:17.781454  PCI: 00:14.1: enabled 0

 1670 09:43:17.784994  PCI: 00:14.2: enabled 1

 1671 09:43:17.785385  PCI: 00:14.3: enabled 1

 1672 09:43:17.787734  PCI: 00:15.0: enabled 1

 1673 09:43:17.790986  PCI: 00:15.1: enabled 1

 1674 09:43:17.794382  PCI: 00:15.2: enabled 1

 1675 09:43:17.794774  PCI: 00:15.3: enabled 1

 1676 09:43:17.797927  PCI: 00:16.0: enabled 1

 1677 09:43:17.801053  PCI: 00:16.1: enabled 0

 1678 09:43:17.804441  PCI: 00:16.2: enabled 0

 1679 09:43:17.804829  PCI: 00:16.3: enabled 0

 1680 09:43:17.807758  PCI: 00:16.4: enabled 0

 1681 09:43:17.811072  PCI: 00:16.5: enabled 0

 1682 09:43:17.814414  PCI: 00:17.0: enabled 0

 1683 09:43:17.815028  PCI: 00:19.0: enabled 0

 1684 09:43:17.817822  PCI: 00:19.1: enabled 1

 1685 09:43:17.820567  PCI: 00:19.2: enabled 0

 1686 09:43:17.823919  PCI: 00:1c.0: enabled 1

 1687 09:43:17.824668  PCI: 00:1c.1: enabled 0

 1688 09:43:17.827117  PCI: 00:1c.2: enabled 0

 1689 09:43:17.830585  PCI: 00:1c.3: enabled 0

 1690 09:43:17.830975  PCI: 00:1c.4: enabled 0

 1691 09:43:17.834063  PCI: 00:1c.5: enabled 0

 1692 09:43:17.837066  PCI: 00:1c.6: enabled 1

 1693 09:43:17.840494  PCI: 00:1c.7: enabled 0

 1694 09:43:17.840880  PCI: 00:1d.0: enabled 1

 1695 09:43:17.844096  PCI: 00:1d.1: enabled 0

 1696 09:43:17.847163  PCI: 00:1d.2: enabled 1

 1697 09:43:17.850440  PCI: 00:1d.3: enabled 0

 1698 09:43:17.850838  PCI: 00:1e.0: enabled 1

 1699 09:43:17.853471  PCI: 00:1e.1: enabled 0

 1700 09:43:17.856683  PCI: 00:1e.2: enabled 1

 1701 09:43:17.859931  PCI: 00:1e.3: enabled 1

 1702 09:43:17.860319  PCI: 00:1f.0: enabled 1

 1703 09:43:17.863864  PCI: 00:1f.1: enabled 0

 1704 09:43:17.866501  PCI: 00:1f.2: enabled 1

 1705 09:43:17.869931  PCI: 00:1f.3: enabled 1

 1706 09:43:17.870316  PCI: 00:1f.4: enabled 0

 1707 09:43:17.873531  PCI: 00:1f.5: enabled 1

 1708 09:43:17.876760  PCI: 00:1f.6: enabled 0

 1709 09:43:17.879566  PCI: 00:1f.7: enabled 0

 1710 09:43:17.879951  APIC: 00: enabled 1

 1711 09:43:17.882764  GENERIC: 0.0: enabled 1

 1712 09:43:17.886395  GENERIC: 0.0: enabled 1

 1713 09:43:17.886796  GENERIC: 1.0: enabled 1

 1714 09:43:17.889832  GENERIC: 0.0: enabled 1

 1715 09:43:17.893261  GENERIC: 1.0: enabled 1

 1716 09:43:17.896477  USB0 port 0: enabled 1

 1717 09:43:17.896864  GENERIC: 0.0: enabled 1

 1718 09:43:17.899354  USB0 port 0: enabled 1

 1719 09:43:17.903045  GENERIC: 0.0: enabled 1

 1720 09:43:17.906461  I2C: 00:1a: enabled 1

 1721 09:43:17.906902  I2C: 00:31: enabled 1

 1722 09:43:17.909490  I2C: 00:32: enabled 1

 1723 09:43:17.913044  I2C: 00:10: enabled 1

 1724 09:43:17.913434  I2C: 00:15: enabled 1

 1725 09:43:17.916446  GENERIC: 0.0: enabled 0

 1726 09:43:17.919254  GENERIC: 1.0: enabled 0

 1727 09:43:17.919669  GENERIC: 0.0: enabled 1

 1728 09:43:17.922934  SPI: 00: enabled 1

 1729 09:43:17.925916  SPI: 00: enabled 1

 1730 09:43:17.926301  PNP: 0c09.0: enabled 1

 1731 09:43:17.929249  GENERIC: 0.0: enabled 1

 1732 09:43:17.933093  USB3 port 0: enabled 1

 1733 09:43:17.936302  USB3 port 1: enabled 1

 1734 09:43:17.936764  USB3 port 2: enabled 0

 1735 09:43:17.939461  USB3 port 3: enabled 0

 1736 09:43:17.942355  USB2 port 0: enabled 0

 1737 09:43:17.942821  USB2 port 1: enabled 1

 1738 09:43:17.945720  USB2 port 2: enabled 1

 1739 09:43:17.948906  USB2 port 3: enabled 0

 1740 09:43:17.952618  USB2 port 4: enabled 1

 1741 09:43:17.953085  USB2 port 5: enabled 0

 1742 09:43:17.955402  USB2 port 6: enabled 0

 1743 09:43:17.959002  USB2 port 7: enabled 0

 1744 09:43:17.959435  USB2 port 8: enabled 0

 1745 09:43:17.962269  USB2 port 9: enabled 0

 1746 09:43:17.965337  USB3 port 0: enabled 0

 1747 09:43:17.968643  USB3 port 1: enabled 1

 1748 09:43:17.969027  USB3 port 2: enabled 0

 1749 09:43:17.972549  USB3 port 3: enabled 0

 1750 09:43:17.975194  GENERIC: 0.0: enabled 1

 1751 09:43:17.975633  GENERIC: 1.0: enabled 1

 1752 09:43:17.978759  APIC: 01: enabled 1

 1753 09:43:17.981875  APIC: 03: enabled 1

 1754 09:43:17.982338  APIC: 06: enabled 1

 1755 09:43:17.985287  APIC: 05: enabled 1

 1756 09:43:17.988331  APIC: 04: enabled 1

 1757 09:43:17.988721  APIC: 02: enabled 1

 1758 09:43:17.991709  APIC: 07: enabled 1

 1759 09:43:17.994752  PCI: 01:00.0: enabled 1

 1760 09:43:17.998464  BS: BS_DEV_INIT run times (exec / console): 33 / 536 ms

 1761 09:43:18.005456  FMAP: area RW_ELOG found @ f30000 (4096 bytes)

 1762 09:43:18.008569  ELOG: NV offset 0xf30000 size 0x1000

 1763 09:43:18.014538  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1764 09:43:18.021778  ELOG: Event(17) added with size 13 at 2024-07-02 09:43:16 UTC

 1765 09:43:18.027987  ELOG: Event(92) added with size 9 at 2024-07-02 09:43:16 UTC

 1766 09:43:18.034699  ELOG: Event(93) added with size 9 at 2024-07-02 09:43:16 UTC

 1767 09:43:18.041175  ELOG: Event(9E) added with size 10 at 2024-07-02 09:43:16 UTC

 1768 09:43:18.047965  ELOG: Event(9F) added with size 14 at 2024-07-02 09:43:16 UTC

 1769 09:43:18.054674  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms

 1770 09:43:18.061050  ELOG: Event(A1) added with size 10 at 2024-07-02 09:43:16 UTC

 1771 09:43:18.067545  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02

 1772 09:43:18.073635  ELOG: Event(A0) added with size 9 at 2024-07-02 09:43:16 UTC

 1773 09:43:18.077357  elog_add_boot_reason: Logged dev mode boot

 1774 09:43:18.083600  BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms

 1775 09:43:18.083997  Finalize devices...

 1776 09:43:18.087473  Devices finalized

 1777 09:43:18.093931  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

 1778 09:43:18.096947  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)

 1779 09:43:18.103690  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 1780 09:43:18.106758  ME: HFSTS1                      : 0x80030055

 1781 09:43:18.113670  ME: HFSTS2                      : 0x30280116

 1782 09:43:18.116983  ME: HFSTS3                      : 0x00000050

 1783 09:43:18.120320  ME: HFSTS4                      : 0x00004000

 1784 09:43:18.126559  ME: HFSTS5                      : 0x00000000

 1785 09:43:18.130049  ME: HFSTS6                      : 0x00400006

 1786 09:43:18.133544  ME: Manufacturing Mode          : YES

 1787 09:43:18.136954  ME: SPI Protection Mode Enabled : NO

 1788 09:43:18.143110  ME: FW Partition Table          : OK

 1789 09:43:18.146689  ME: Bringup Loader Failure      : NO

 1790 09:43:18.150081  ME: Firmware Init Complete      : NO

 1791 09:43:18.152896  ME: Boot Options Present        : NO

 1792 09:43:18.156307  ME: Update In Progress          : NO

 1793 09:43:18.159663  ME: D0i3 Support                : YES

 1794 09:43:18.163078  ME: Low Power State Enabled     : NO

 1795 09:43:18.170161  ME: CPU Replaced                : YES

 1796 09:43:18.172650  ME: CPU Replacement Valid       : YES

 1797 09:43:18.176066  ME: Current Working State       : 5

 1798 09:43:18.179537  ME: Current Operation State     : 1

 1799 09:43:18.182958  ME: Current Operation Mode      : 3

 1800 09:43:18.186336  ME: Error Code                  : 0

 1801 09:43:18.189143  ME: Enhanced Debug Mode         : NO

 1802 09:43:18.192818  ME: CPU Debug Disabled          : YES

 1803 09:43:18.196214  ME: TXT Support                 : NO

 1804 09:43:18.203031  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms

 1805 09:43:18.209146  ELOG: Event(91) added with size 10 at 2024-07-02 09:43:16 UTC

 1806 09:43:18.216567  Chrome EC: clear events_b mask to 0x0000000020004000

 1807 09:43:18.222506  BS: BS_WRITE_TABLES entry times (exec / console): 2 / 11 ms

 1808 09:43:18.229048  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4

 1809 09:43:18.232768  CBFS: 'fallback/slic' not found.

 1810 09:43:18.235637  ACPI: Writing ACPI tables at 76b01000.

 1811 09:43:18.238810  ACPI:    * FACS

 1812 09:43:18.239193  ACPI:    * DSDT

 1813 09:43:18.245800  Ramoops buffer: 0x100000@0x76a00000.

 1814 09:43:18.248854  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

 1815 09:43:18.252429  FMAP: area RW_VPD found @ f35000 (8192 bytes)

 1816 09:43:18.256328  Google Chrome EC: version:

 1817 09:43:18.259758  	ro: voema_v2.0.10114-a447f03e46

 1818 09:43:18.262853  	rw: voema_v2.0.10114-a447f03e46

 1819 09:43:18.265942    running image: 1

 1820 09:43:18.272916  PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000

 1821 09:43:18.276041  ACPI:    * FADT

 1822 09:43:18.276512  SCI is IRQ9

 1823 09:43:18.282798  ACPI: added table 1/32, length now 40

 1824 09:43:18.283266  ACPI:     * SSDT

 1825 09:43:18.286193  Found 1 CPU(s) with 8 core(s) each.

 1826 09:43:18.292850  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2

 1827 09:43:18.295705  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 1828 09:43:18.299058  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 1829 09:43:18.302495  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a

 1830 09:43:18.309120  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 1831 09:43:18.315385  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 1832 09:43:18.318655  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10

 1833 09:43:18.325500  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 1834 09:43:18.332004  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)

 1835 09:43:18.335186  \_SB.PCI0.RP09: Added StorageD3Enable property

 1836 09:43:18.341775  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1837 09:43:18.345439  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 1838 09:43:18.351739  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 1839 09:43:18.355347  PS2K: Passing 80 keymaps to kernel

 1840 09:43:18.362049  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 1841 09:43:18.368320  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1

 1842 09:43:18.375007  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1

 1843 09:43:18.381711  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 1844 09:43:18.388005  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4

 1845 09:43:18.394543  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1

 1846 09:43:18.401520  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 1847 09:43:18.408151  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 1848 09:43:18.411456  ACPI: added table 2/32, length now 44

 1849 09:43:18.414725  ACPI:    * MCFG

 1850 09:43:18.418216  ACPI: added table 3/32, length now 48

 1851 09:43:18.418679  ACPI:    * TPM2

 1852 09:43:18.421123  TPM2 log created at 0x769f0000

 1853 09:43:18.424848  ACPI: added table 4/32, length now 52

 1854 09:43:18.427361  ACPI:    * MADT

 1855 09:43:18.427749  SCI is IRQ9

 1856 09:43:18.430791  ACPI: added table 5/32, length now 56

 1857 09:43:18.433961  current = 76b09850

 1858 09:43:18.437337  ACPI:    * DMAR

 1859 09:43:18.441074  ACPI: added table 6/32, length now 60

 1860 09:43:18.444129  ACPI: added table 7/32, length now 64

 1861 09:43:18.444515  ACPI:    * HPET

 1862 09:43:18.447425  ACPI: added table 8/32, length now 68

 1863 09:43:18.450692  ACPI: done.

 1864 09:43:18.453848  ACPI tables: 35216 bytes.

 1865 09:43:18.457244  smbios_write_tables: 769ef000

 1866 09:43:18.461107  EC returned error result code 3

 1867 09:43:18.464090  Couldn't obtain OEM name from CBI

 1868 09:43:18.467317  Create SMBIOS type 16

 1869 09:43:18.470761  Create SMBIOS type 17

 1870 09:43:18.471221  GENERIC: 0.0 (WIFI Device)

 1871 09:43:18.473572  SMBIOS tables: 1750 bytes.

 1872 09:43:18.480229  Writing table forward entry at 0x00000500

 1873 09:43:18.483532  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c

 1874 09:43:18.489996  Writing coreboot table at 0x76b25000

 1875 09:43:18.493714   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1876 09:43:18.499901   1. 0000000000001000-000000000009ffff: RAM

 1877 09:43:18.503170   2. 00000000000a0000-00000000000fffff: RESERVED

 1878 09:43:18.506987   3. 0000000000100000-00000000769eefff: RAM

 1879 09:43:18.513273   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES

 1880 09:43:18.520095   5. 0000000076b98000-0000000076c09fff: RAMSTAGE

 1881 09:43:18.526102   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES

 1882 09:43:18.529871   7. 0000000077000000-000000007fbfffff: RESERVED

 1883 09:43:18.532841   8. 00000000c0000000-00000000cfffffff: RESERVED

 1884 09:43:18.539488   9. 00000000f8000000-00000000f9ffffff: RESERVED

 1885 09:43:18.542756  10. 00000000fb000000-00000000fb000fff: RESERVED

 1886 09:43:18.549699  11. 00000000fe000000-00000000fe00ffff: RESERVED

 1887 09:43:18.553004  12. 00000000fed80000-00000000fed87fff: RESERVED

 1888 09:43:18.559126  13. 00000000fed90000-00000000fed92fff: RESERVED

 1889 09:43:18.562581  14. 00000000feda0000-00000000feda1fff: RESERVED

 1890 09:43:18.569094  15. 00000000fedc0000-00000000feddffff: RESERVED

 1891 09:43:18.572815  16. 0000000100000000-00000002803fffff: RAM

 1892 09:43:18.575872  Passing 4 GPIOs to payload:

 1893 09:43:18.578865              NAME |       PORT | POLARITY |     VALUE

 1894 09:43:18.586015               lid |  undefined |     high |      high

 1895 09:43:18.592674             power |  undefined |     high |       low

 1896 09:43:18.595418             oprom |  undefined |     high |       low

 1897 09:43:18.602372          EC in RW | 0x000000e5 |     high |       low

 1898 09:43:18.608463  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum dcc6

 1899 09:43:18.611897  coreboot table: 1576 bytes.

 1900 09:43:18.615073  IMD ROOT    0. 0x76fff000 0x00001000

 1901 09:43:18.618686  IMD SMALL   1. 0x76ffe000 0x00001000

 1902 09:43:18.621951  FSP MEMORY  2. 0x76c4e000 0x003b0000

 1903 09:43:18.625391  VPD         3. 0x76c4d000 0x00000367

 1904 09:43:18.628680  RO MCACHE   4. 0x76c4c000 0x00000fdc

 1905 09:43:18.631999  CONSOLE     5. 0x76c2c000 0x00020000

 1906 09:43:18.635210  FMAP        6. 0x76c2b000 0x00000578

 1907 09:43:18.641423  TIME STAMP  7. 0x76c2a000 0x00000910

 1908 09:43:18.644839  VBOOT WORK  8. 0x76c16000 0x00014000

 1909 09:43:18.648138  ROMSTG STCK 9. 0x76c15000 0x00001000

 1910 09:43:18.651595  AFTER CAR  10. 0x76c0a000 0x0000b000

 1911 09:43:18.655075  RAMSTAGE   11. 0x76b97000 0x00073000

 1912 09:43:18.657773  REFCODE    12. 0x76b42000 0x00055000

 1913 09:43:18.661160  SMM BACKUP 13. 0x76b32000 0x00010000

 1914 09:43:18.667843  4f444749   14. 0x76b30000 0x00002000

 1915 09:43:18.671270  EXT VBT15. 0x76b2d000 0x0000219f

 1916 09:43:18.674264  COREBOOT   16. 0x76b25000 0x00008000

 1917 09:43:18.677825  ACPI       17. 0x76b01000 0x00024000

 1918 09:43:18.681181  ACPI GNVS  18. 0x76b00000 0x00001000

 1919 09:43:18.684440  RAMOOPS    19. 0x76a00000 0x00100000

 1920 09:43:18.687813  TPM2 TCGLOG20. 0x769f0000 0x00010000

 1921 09:43:18.690973  SMBIOS     21. 0x769ef000 0x00000800

 1922 09:43:18.693901  IMD small region:

 1923 09:43:18.697595    IMD ROOT    0. 0x76ffec00 0x00000400

 1924 09:43:18.700495    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 1925 09:43:18.706967    POWER STATE 2. 0x76ffeb80 0x00000044

 1926 09:43:18.710593    ROMSTAGE    3. 0x76ffeb60 0x00000004

 1927 09:43:18.713463    MEM INFO    4. 0x76ffe980 0x000001e0

 1928 09:43:18.720542  BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms

 1929 09:43:18.723786  MTRR: Physical address space:

 1930 09:43:18.729953  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1931 09:43:18.733429  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1932 09:43:18.740016  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 1933 09:43:18.746526  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0

 1934 09:43:18.753141  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1

 1935 09:43:18.759746  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0

 1936 09:43:18.766349  0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6

 1937 09:43:18.769811  MTRR: Fixed MSR 0x250 0x0606060606060606

 1938 09:43:18.773169  MTRR: Fixed MSR 0x258 0x0606060606060606

 1939 09:43:18.779710  MTRR: Fixed MSR 0x259 0x0000000000000000

 1940 09:43:18.783102  MTRR: Fixed MSR 0x268 0x0606060606060606

 1941 09:43:18.786452  MTRR: Fixed MSR 0x269 0x0606060606060606

 1942 09:43:18.789477  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1943 09:43:18.796349  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1944 09:43:18.799350  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1945 09:43:18.802445  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1946 09:43:18.805893  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1947 09:43:18.812585  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1948 09:43:18.815764  call enable_fixed_mtrr()

 1949 09:43:18.819044  CPU physical address size: 39 bits

 1950 09:43:18.822258  MTRR: default type WB/UC MTRR counts: 6/6.

 1951 09:43:18.825835  MTRR: UC selected as default type.

 1952 09:43:18.831953  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 1953 09:43:18.838875  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 1954 09:43:18.845658  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 1955 09:43:18.851751  MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1

 1956 09:43:18.858848  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 1957 09:43:18.865174  MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6

 1958 09:43:18.865603  

 1959 09:43:18.865897  MTRR check

 1960 09:43:18.868349  Fixed MTRRs   : Enabled

 1961 09:43:18.871833  Variable MTRRs: Enabled

 1962 09:43:18.872271  

 1963 09:43:18.875241  MTRR: Fixed MSR 0x250 0x0606060606060606

 1964 09:43:18.878451  MTRR: Fixed MSR 0x258 0x0606060606060606

 1965 09:43:18.884811  MTRR: Fixed MSR 0x259 0x0000000000000000

 1966 09:43:18.888174  MTRR: Fixed MSR 0x268 0x0606060606060606

 1967 09:43:18.891358  MTRR: Fixed MSR 0x269 0x0606060606060606

 1968 09:43:18.894892  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1969 09:43:18.901698  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1970 09:43:18.904508  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1971 09:43:18.907742  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1972 09:43:18.911271  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1973 09:43:18.917851  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1974 09:43:18.924091  BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms

 1975 09:43:18.927406  call enable_fixed_mtrr()

 1976 09:43:18.934387  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60

 1977 09:43:18.937211  CPU physical address size: 39 bits

 1978 09:43:18.943987  Checking segment from ROM address 0xffc02b38

 1979 09:43:18.947368  MTRR: Fixed MSR 0x250 0x0606060606060606

 1980 09:43:18.950620  MTRR: Fixed MSR 0x250 0x0606060606060606

 1981 09:43:18.954046  MTRR: Fixed MSR 0x258 0x0606060606060606

 1982 09:43:18.960768  MTRR: Fixed MSR 0x259 0x0000000000000000

 1983 09:43:18.964189  MTRR: Fixed MSR 0x268 0x0606060606060606

 1984 09:43:18.966916  MTRR: Fixed MSR 0x269 0x0606060606060606

 1985 09:43:18.970089  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1986 09:43:18.977075  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1987 09:43:18.980170  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1988 09:43:18.983595  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1989 09:43:18.986839  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1990 09:43:18.993842  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1991 09:43:18.997193  MTRR: Fixed MSR 0x258 0x0606060606060606

 1992 09:43:19.000265  MTRR: Fixed MSR 0x259 0x0000000000000000

 1993 09:43:19.006888  MTRR: Fixed MSR 0x268 0x0606060606060606

 1994 09:43:19.009809  MTRR: Fixed MSR 0x269 0x0606060606060606

 1995 09:43:19.013462  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1996 09:43:19.016789  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1997 09:43:19.023329  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1998 09:43:19.026467  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1999 09:43:19.029695  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2000 09:43:19.032973  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2001 09:43:19.037290  call enable_fixed_mtrr()

 2002 09:43:19.040539  call enable_fixed_mtrr()

 2003 09:43:19.043647  MTRR: Fixed MSR 0x250 0x0606060606060606

 2004 09:43:19.047053  MTRR: Fixed MSR 0x250 0x0606060606060606

 2005 09:43:19.053767  MTRR: Fixed MSR 0x258 0x0606060606060606

 2006 09:43:19.056719  MTRR: Fixed MSR 0x259 0x0000000000000000

 2007 09:43:19.059906  MTRR: Fixed MSR 0x268 0x0606060606060606

 2008 09:43:19.063338  MTRR: Fixed MSR 0x269 0x0606060606060606

 2009 09:43:19.069637  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2010 09:43:19.072982  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2011 09:43:19.076413  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2012 09:43:19.079549  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2013 09:43:19.086314  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2014 09:43:19.089754  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2015 09:43:19.096273  MTRR: Fixed MSR 0x258 0x0606060606060606

 2016 09:43:19.096662  call enable_fixed_mtrr()

 2017 09:43:19.102623  MTRR: Fixed MSR 0x259 0x0000000000000000

 2018 09:43:19.105951  MTRR: Fixed MSR 0x268 0x0606060606060606

 2019 09:43:19.109314  MTRR: Fixed MSR 0x269 0x0606060606060606

 2020 09:43:19.112499  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2021 09:43:19.119229  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2022 09:43:19.122204  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2023 09:43:19.126005  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2024 09:43:19.129402  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2025 09:43:19.135447  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2026 09:43:19.139102  CPU physical address size: 39 bits

 2027 09:43:19.142211  call enable_fixed_mtrr()

 2028 09:43:19.145497  MTRR: Fixed MSR 0x250 0x0606060606060606

 2029 09:43:19.151824  MTRR: Fixed MSR 0x250 0x0606060606060606

 2030 09:43:19.155424  MTRR: Fixed MSR 0x258 0x0606060606060606

 2031 09:43:19.158679  MTRR: Fixed MSR 0x259 0x0000000000000000

 2032 09:43:19.162053  MTRR: Fixed MSR 0x268 0x0606060606060606

 2033 09:43:19.168281  MTRR: Fixed MSR 0x269 0x0606060606060606

 2034 09:43:19.171612  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2035 09:43:19.174900  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2036 09:43:19.178412  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2037 09:43:19.185129  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2038 09:43:19.187826  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2039 09:43:19.191338  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2040 09:43:19.198416  MTRR: Fixed MSR 0x258 0x0606060606060606

 2041 09:43:19.198863  call enable_fixed_mtrr()

 2042 09:43:19.204649  MTRR: Fixed MSR 0x259 0x0000000000000000

 2043 09:43:19.208271  MTRR: Fixed MSR 0x268 0x0606060606060606

 2044 09:43:19.211393  MTRR: Fixed MSR 0x269 0x0606060606060606

 2045 09:43:19.214879  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2046 09:43:19.221507  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2047 09:43:19.224270  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2048 09:43:19.227727  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2049 09:43:19.231371  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2050 09:43:19.237442  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2051 09:43:19.240488  CPU physical address size: 39 bits

 2052 09:43:19.244209  call enable_fixed_mtrr()

 2053 09:43:19.247176  CPU physical address size: 39 bits

 2054 09:43:19.250964  CPU physical address size: 39 bits

 2055 09:43:19.254466  CPU physical address size: 39 bits

 2056 09:43:19.260649  CPU physical address size: 39 bits

 2057 09:43:19.263999  Checking segment from ROM address 0xffc02b54

 2058 09:43:19.267325  Loading segment from ROM address 0xffc02b38

 2059 09:43:19.271074    code (compression=0)

 2060 09:43:19.281024    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64

 2061 09:43:19.287278  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64

 2062 09:43:19.290681  it's not compressed!

 2063 09:43:19.428721  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70

 2064 09:43:19.435478  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c

 2065 09:43:19.441815  Loading segment from ROM address 0xffc02b54

 2066 09:43:19.445432    Entry Point 0x30000000

 2067 09:43:19.445901  Loaded segments

 2068 09:43:19.452168  BS: BS_PAYLOAD_LOAD run times (exec / console): 458 / 64 ms

 2069 09:43:19.495117  Finalizing chipset.

 2070 09:43:19.498407  Finalizing SMM.

 2071 09:43:19.498853  APMC done.

 2072 09:43:19.505137  BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms

 2073 09:43:19.508229  mp_park_aps done after 0 msecs.

 2074 09:43:19.511464  Jumping to boot code at 0x30000000(0x76b25000)

 2075 09:43:19.521392  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes

 2076 09:43:19.521874  

 2077 09:43:19.522174  

 2078 09:43:19.524533  

 2079 09:43:19.524953  Starting depthcharge on Voema...

 2080 09:43:19.526019  end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
 2081 09:43:19.526469  start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
 2082 09:43:19.526834  Setting prompt string to ['volteer:']
 2083 09:43:19.527155  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:40)
 2084 09:43:19.527928  

 2085 09:43:19.534398  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2086 09:43:19.534990  

 2087 09:43:19.541310  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2088 09:43:19.541752  

 2089 09:43:19.547415  Looking for NVMe Controller 0x3005f238 @ 00:1d:00

 2090 09:43:19.547878  

 2091 09:43:19.550830  Failed to find eMMC card reader

 2092 09:43:19.551260  

 2093 09:43:19.554230  Wipe memory regions:

 2094 09:43:19.554687  

 2095 09:43:19.557266  	[0x00000000001000, 0x000000000a0000)

 2096 09:43:19.557721  

 2097 09:43:19.561004  	[0x00000000100000, 0x00000030000000)

 2098 09:43:19.586326  

 2099 09:43:19.590132  	[0x00000032662db0, 0x000000769ef000)

 2100 09:43:19.626413  

 2101 09:43:19.629127  	[0x00000100000000, 0x00000280400000)

 2102 09:43:19.831350  

 2103 09:43:19.834539  ec_init: CrosEC protocol v3 supported (256, 256)

 2104 09:43:20.266503  

 2105 09:43:20.266952  R8152: Initializing

 2106 09:43:20.267263  

 2107 09:43:20.269620  Version 6 (ocp_data = 5c30)

 2108 09:43:20.270005  

 2109 09:43:20.273238  R8152: Done initializing

 2110 09:43:20.273686  

 2111 09:43:20.276219  Adding net device

 2112 09:43:20.577690  

 2113 09:43:20.581064  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35

 2114 09:43:20.581467  

 2115 09:43:20.581774  


 2116 09:43:20.584299  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2117 09:43:20.584736  Sending line: 'tftpboot 192.168.201.1 14692351/tftp-deploy-y9_1t3wp/kernel/bzImage 14692351/tftp-deploy-y9_1t3wp/kernel/cmdline 14692351/tftp-deploy-y9_1t3wp/ramdisk/ramdisk.cpio.gz'
 2119 09:43:20.685842  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2120 09:43:20.685955  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
 2121 09:43:20.690952  volteer: tftpboot 192.168.201.1 14692351/tftp-deploy-y9_1t3wp/kernel/bzIploy-y9_1t3wp/kernel/cmdline 14692351/tftp-deploy-y9_1t3wp/ramdisk/ramdisk.cpio.gz

 2122 09:43:20.691063  

 2123 09:43:20.691124  Waiting for link

 2124 09:43:20.895603  

 2125 09:43:20.896196  done.

 2126 09:43:20.896631  

 2127 09:43:20.897068  MAC: 00:24:32:30:77:76

 2128 09:43:20.897477  

 2129 09:43:20.898564  Sending DHCP discover... done.

 2130 09:43:20.898953  

 2131 09:43:20.902049  Waiting for reply... done.

 2132 09:43:20.902436  

 2133 09:43:20.905505  Sending DHCP request... done.

 2134 09:43:20.905891  

 2135 09:43:20.911465  Waiting for reply... done.

 2136 09:43:20.911851  

 2137 09:43:20.912148  My ip is 192.168.201.16

 2138 09:43:20.912430  

 2139 09:43:20.914579  The DHCP server ip is 192.168.201.1

 2140 09:43:20.918583  

 2141 09:43:20.921800  TFTP server IP predefined by user: 192.168.201.1

 2142 09:43:20.922194  

 2143 09:43:20.928056  Bootfile predefined by user: 14692351/tftp-deploy-y9_1t3wp/kernel/bzImage

 2144 09:43:20.928510  

 2145 09:43:20.931471  Sending tftp read request... done.

 2146 09:43:20.931888  

 2147 09:43:20.941323  Waiting for the transfer... 

 2148 09:43:20.941922  

 2149 09:43:21.646744  00000000 ################################################################

 2150 09:43:21.647207  

 2151 09:43:22.357517  00080000 ################################################################

 2152 09:43:22.357955  

 2153 09:43:23.053566  00100000 ################################################################

 2154 09:43:23.054086  

 2155 09:43:23.791173  00180000 ################################################################

 2156 09:43:23.791666  

 2157 09:43:24.454949  00200000 ################################################################

 2158 09:43:24.455429  

 2159 09:43:25.059520  00280000 ################################################################

 2160 09:43:25.059638  

 2161 09:43:25.616546  00300000 ################################################################

 2162 09:43:25.616658  

 2163 09:43:26.142375  00380000 ################################################################

 2164 09:43:26.142517  

 2165 09:43:26.692457  00400000 ################################################################

 2166 09:43:26.692579  

 2167 09:43:27.236522  00480000 ################################################################

 2168 09:43:27.236645  

 2169 09:43:27.776215  00500000 ################################################################

 2170 09:43:27.776340  

 2171 09:43:28.291110  00580000 ################################################################

 2172 09:43:28.291234  

 2173 09:43:28.814832  00600000 ################################################################

 2174 09:43:28.814953  

 2175 09:43:29.348242  00680000 ################################################################

 2176 09:43:29.348361  

 2177 09:43:29.872514  00700000 ################################################################

 2178 09:43:29.872635  

 2179 09:43:30.396938  00780000 ################################################################

 2180 09:43:30.397074  

 2181 09:43:30.929903  00800000 ################################################################

 2182 09:43:30.930044  

 2183 09:43:31.473864  00880000 ################################################################

 2184 09:43:31.474005  

 2185 09:43:32.012454  00900000 ################################################################

 2186 09:43:32.012583  

 2187 09:43:32.697327  00980000 ################################################################

 2188 09:43:32.697889  

 2189 09:43:33.420967  00a00000 ################################################################

 2190 09:43:33.421465  

 2191 09:43:34.129277  00a80000 ################################################################

 2192 09:43:34.129739  

 2193 09:43:34.861350  00b00000 ################################################################

 2194 09:43:34.861811  

 2195 09:43:35.590265  00b80000 ################################################################

 2196 09:43:35.590710  

 2197 09:43:36.298365  00c00000 ################################################################

 2198 09:43:36.298811  

 2199 09:43:36.996203  00c80000 ################################################################

 2200 09:43:36.996698  

 2201 09:43:37.710877  00d00000 ################################################################ done.

 2202 09:43:37.711343  

 2203 09:43:37.714207  The bootfile was 14155664 bytes long.

 2204 09:43:37.714602  

 2205 09:43:37.717321  Sending tftp read request... done.

 2206 09:43:37.717715  

 2207 09:43:37.720831  Waiting for the transfer... 

 2208 09:43:37.721219  

 2209 09:43:38.376952  00000000 ################################################################

 2210 09:43:38.377080  

 2211 09:43:39.057104  00080000 ################################################################

 2212 09:43:39.057458  

 2213 09:43:39.758403  00100000 ################################################################

 2214 09:43:39.758850  

 2215 09:43:40.465826  00180000 ################################################################

 2216 09:43:40.466309  

 2217 09:43:41.186992  00200000 ################################################################

 2218 09:43:41.187526  

 2219 09:43:41.904196  00280000 ################################################################

 2220 09:43:41.904680  

 2221 09:43:42.613276  00300000 ################################################################

 2222 09:43:42.613725  

 2223 09:43:43.348806  00380000 ################################################################

 2224 09:43:43.349304  

 2225 09:43:44.057525  00400000 ################################################################

 2226 09:43:44.058042  

 2227 09:43:44.787590  00480000 ################################################################

 2228 09:43:44.788066  

 2229 09:43:45.485996  00500000 ################################################################

 2230 09:43:45.486511  

 2231 09:43:46.190193  00580000 ################################################################

 2232 09:43:46.190641  

 2233 09:43:46.853184  00600000 ################################################################

 2234 09:43:46.853702  

 2235 09:43:47.497144  00680000 ################################################################

 2236 09:43:47.497338  

 2237 09:43:48.171929  00700000 ################################################################

 2238 09:43:48.172430  

 2239 09:43:48.876724  00780000 ################################################################

 2240 09:43:48.877183  

 2241 09:43:49.562191  00800000 ################################################################

 2242 09:43:49.562659  

 2243 09:43:50.264225  00880000 ################################################################

 2244 09:43:50.264748  

 2245 09:43:50.273981  00900000 # done.

 2246 09:43:50.274384  

 2247 09:43:50.277337  Sending tftp read request... done.

 2248 09:43:50.277751  

 2249 09:43:50.280683  Waiting for the transfer... 

 2250 09:43:50.280958  

 2251 09:43:50.281170  00000000 # done.

 2252 09:43:50.284097  

 2253 09:43:50.290674  Command line loaded dynamically from TFTP file: 14692351/tftp-deploy-y9_1t3wp/kernel/cmdline

 2254 09:43:50.290885  

 2255 09:43:50.306926  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2256 09:43:50.311973  

 2257 09:43:50.315587  Shutting down all USB controllers.

 2258 09:43:50.315913  

 2259 09:43:50.316124  Removing current net device

 2260 09:43:50.316309  

 2261 09:43:50.318915  Finalizing coreboot

 2262 09:43:50.319357  

 2263 09:43:50.325606  Exiting depthcharge with code 4 at timestamp: 39474535

 2264 09:43:50.326267  

 2265 09:43:50.326849  

 2266 09:43:50.327613  Starting kernel ...

 2267 09:43:50.328310  

 2268 09:43:50.328901  

 2269 09:43:50.334852  end: 2.2.4 bootloader-commands (duration 00:00:31) [common]
 2270 09:43:50.335735  start: 2.2.5 auto-login-action (timeout 00:04:09) [common]
 2271 09:43:50.336520  Setting prompt string to ['Linux version [0-9]']
 2272 09:43:50.337276  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2273 09:43:50.338190  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2275 09:47:59.336508  end: 2.2.5 auto-login-action (duration 00:04:09) [common]
 2277 09:47:59.336857  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 249 seconds'
 2279 09:47:59.337032  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2282 09:47:59.337266  end: 2 depthcharge-action (duration 00:05:00) [common]
 2284 09:47:59.337471  Cleaning after the job
 2285 09:47:59.337557  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14692351/tftp-deploy-y9_1t3wp/ramdisk
 2286 09:47:59.338870  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14692351/tftp-deploy-y9_1t3wp/kernel
 2287 09:47:59.340495  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14692351/tftp-deploy-y9_1t3wp/modules
 2288 09:47:59.341114  start: 4.1 power-off (timeout 00:00:30) [common]
 2289 09:47:59.341248  Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cp514-2h-1130g7-volteer-cbg-6', '--port=1', '--command=off']
 2290 09:48:01.417807  >> Command sent successfully.
 2291 09:48:01.421421  Returned 0 in 2 seconds
 2292 09:48:01.421587  end: 4.1 power-off (duration 00:00:02) [common]
 2294 09:48:01.421837  start: 4.2 read-feedback (timeout 00:04:58) [common]
 2295 09:48:01.421989  Listened to connection for namespace 'common' for up to 1s
 2297 09:48:01.422358  Listened to connection for namespace 'common' for up to 1s
 2298 09:48:02.423116  Finalising connection for namespace 'common'
 2299 09:48:02.423679  Disconnecting from shell: Finalise
 2300 09:48:02.424148  
 2301 09:48:02.524976  end: 4.2 read-feedback (duration 00:00:01) [common]
 2302 09:48:02.525533  Removing override tmp directory at /var/lib/lava/dispatcher/tmp/14692351
 2303 09:48:02.575679  Removing root tmp directory at /var/lib/lava/dispatcher/tmp/14692351
 2304 09:48:02.575880  JobError: Your job cannot terminate cleanly.