Boot log: acer-cp514-2h-1130g7-volteer

    1 09:43:23.193771  lava-dispatcher, installed at version: 2024.05
    2 09:43:23.193984  start: 0 validate
    3 09:43:23.194099  Start time: 2024-07-02 09:43:23.194094+00:00 (UTC)
    4 09:43:23.194234  Using caching service: 'http://localhost/cache/?uri=%s'
    5 09:43:23.194380  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-cros-ec%2F20240313.0%2Famd64%2Frootfs.cpio.gz exists
    6 09:43:23.445898  Using caching service: 'http://localhost/cache/?uri=%s'
    7 09:43:23.446071  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2603-g61ace8e627ca6%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
    8 09:43:23.704569  Using caching service: 'http://localhost/cache/?uri=%s'
    9 09:43:23.704744  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2603-g61ace8e627ca6%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
   10 09:43:23.963411  validate duration: 0.77
   12 09:43:23.963681  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 09:43:23.963779  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 09:43:23.963865  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 09:43:23.964032  Not decompressing ramdisk as can be used compressed.
   16 09:43:23.964122  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-cros-ec/20240313.0/amd64/rootfs.cpio.gz
   17 09:43:23.964183  saving as /var/lib/lava/dispatcher/tmp/14692359/tftp-deploy-2gsprdrl/ramdisk/rootfs.cpio.gz
   18 09:43:23.964245  total size: 40325651 (38 MB)
   19 09:43:23.965338  progress   0 % (0 MB)
   20 09:43:23.976516  progress   5 % (1 MB)
   21 09:43:23.987134  progress  10 % (3 MB)
   22 09:43:23.997353  progress  15 % (5 MB)
   23 09:43:24.007970  progress  20 % (7 MB)
   24 09:43:24.018217  progress  25 % (9 MB)
   25 09:43:24.028773  progress  30 % (11 MB)
   26 09:43:24.038991  progress  35 % (13 MB)
   27 09:43:24.049431  progress  40 % (15 MB)
   28 09:43:24.059833  progress  45 % (17 MB)
   29 09:43:24.070431  progress  50 % (19 MB)
   30 09:43:24.081050  progress  55 % (21 MB)
   31 09:43:24.091934  progress  60 % (23 MB)
   32 09:43:24.102741  progress  65 % (25 MB)
   33 09:43:24.113345  progress  70 % (26 MB)
   34 09:43:24.123711  progress  75 % (28 MB)
   35 09:43:24.134338  progress  80 % (30 MB)
   36 09:43:24.144697  progress  85 % (32 MB)
   37 09:43:24.154861  progress  90 % (34 MB)
   38 09:43:24.165082  progress  95 % (36 MB)
   39 09:43:24.175086  progress 100 % (38 MB)
   40 09:43:24.175295  38 MB downloaded in 0.21 s (182.23 MB/s)
   41 09:43:24.175455  end: 1.1.1 http-download (duration 00:00:00) [common]
   43 09:43:24.175677  end: 1.1 download-retry (duration 00:00:00) [common]
   44 09:43:24.175758  start: 1.2 download-retry (timeout 00:10:00) [common]
   45 09:43:24.175834  start: 1.2.1 http-download (timeout 00:10:00) [common]
   46 09:43:24.175968  downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2603-g61ace8e627ca6/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
   47 09:43:24.176031  saving as /var/lib/lava/dispatcher/tmp/14692359/tftp-deploy-2gsprdrl/kernel/bzImage
   48 09:43:24.176085  total size: 14155664 (13 MB)
   49 09:43:24.176139  No compression specified
   50 09:43:24.177252  progress   0 % (0 MB)
   51 09:43:24.181191  progress   5 % (0 MB)
   52 09:43:24.184913  progress  10 % (1 MB)
   53 09:43:24.188611  progress  15 % (2 MB)
   54 09:43:24.192327  progress  20 % (2 MB)
   55 09:43:24.195970  progress  25 % (3 MB)
   56 09:43:24.199693  progress  30 % (4 MB)
   57 09:43:24.203515  progress  35 % (4 MB)
   58 09:43:24.207056  progress  40 % (5 MB)
   59 09:43:24.210851  progress  45 % (6 MB)
   60 09:43:24.214430  progress  50 % (6 MB)
   61 09:43:24.218135  progress  55 % (7 MB)
   62 09:43:24.221872  progress  60 % (8 MB)
   63 09:43:24.225421  progress  65 % (8 MB)
   64 09:43:24.229127  progress  70 % (9 MB)
   65 09:43:24.232637  progress  75 % (10 MB)
   66 09:43:24.236422  progress  80 % (10 MB)
   67 09:43:24.240089  progress  85 % (11 MB)
   68 09:43:24.243596  progress  90 % (12 MB)
   69 09:43:24.247205  progress  95 % (12 MB)
   70 09:43:24.250810  progress 100 % (13 MB)
   71 09:43:24.251047  13 MB downloaded in 0.07 s (180.10 MB/s)
   72 09:43:24.251189  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 09:43:24.251394  end: 1.2 download-retry (duration 00:00:00) [common]
   75 09:43:24.251542  start: 1.3 download-retry (timeout 00:10:00) [common]
   76 09:43:24.251630  start: 1.3.1 http-download (timeout 00:10:00) [common]
   77 09:43:24.251789  downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2603-g61ace8e627ca6/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
   78 09:43:24.251848  saving as /var/lib/lava/dispatcher/tmp/14692359/tftp-deploy-2gsprdrl/modules/modules.tar
   79 09:43:24.251900  total size: 714860 (0 MB)
   80 09:43:24.251953  Using unxz to decompress xz
   81 09:43:24.253318  progress   4 % (0 MB)
   82 09:43:24.253551  progress   9 % (0 MB)
   83 09:43:24.255409  progress  18 % (0 MB)
   84 09:43:24.259141  progress  27 % (0 MB)
   85 09:43:24.261023  progress  32 % (0 MB)
   86 09:43:24.264577  progress  41 % (0 MB)
   87 09:43:24.268100  progress  50 % (0 MB)
   88 09:43:24.269734  progress  55 % (0 MB)
   89 09:43:24.273237  progress  64 % (0 MB)
   90 09:43:24.276963  progress  73 % (0 MB)
   91 09:43:24.280350  progress  82 % (0 MB)
   92 09:43:24.282089  progress  87 % (0 MB)
   93 09:43:24.285793  progress  96 % (0 MB)
   94 09:43:24.293060  0 MB downloaded in 0.04 s (16.56 MB/s)
   95 09:43:24.293217  end: 1.3.1 http-download (duration 00:00:00) [common]
   97 09:43:24.293425  end: 1.3 download-retry (duration 00:00:00) [common]
   98 09:43:24.293502  start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
   99 09:43:24.293578  start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
  100 09:43:24.293666  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
  101 09:43:24.293738  start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
  102 09:43:24.293900  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14692359/lava-overlay-fgpur2xt
  103 09:43:24.294014  makedir: /var/lib/lava/dispatcher/tmp/14692359/lava-overlay-fgpur2xt/lava-14692359/bin
  104 09:43:24.294103  makedir: /var/lib/lava/dispatcher/tmp/14692359/lava-overlay-fgpur2xt/lava-14692359/tests
  105 09:43:24.294199  makedir: /var/lib/lava/dispatcher/tmp/14692359/lava-overlay-fgpur2xt/lava-14692359/results
  106 09:43:24.294286  Creating /var/lib/lava/dispatcher/tmp/14692359/lava-overlay-fgpur2xt/lava-14692359/bin/lava-add-keys
  107 09:43:24.294433  Creating /var/lib/lava/dispatcher/tmp/14692359/lava-overlay-fgpur2xt/lava-14692359/bin/lava-add-sources
  108 09:43:24.294672  Creating /var/lib/lava/dispatcher/tmp/14692359/lava-overlay-fgpur2xt/lava-14692359/bin/lava-background-process-start
  109 09:43:24.294805  Creating /var/lib/lava/dispatcher/tmp/14692359/lava-overlay-fgpur2xt/lava-14692359/bin/lava-background-process-stop
  110 09:43:24.294932  Creating /var/lib/lava/dispatcher/tmp/14692359/lava-overlay-fgpur2xt/lava-14692359/bin/lava-common-functions
  111 09:43:24.295090  Creating /var/lib/lava/dispatcher/tmp/14692359/lava-overlay-fgpur2xt/lava-14692359/bin/lava-echo-ipv4
  112 09:43:24.295273  Creating /var/lib/lava/dispatcher/tmp/14692359/lava-overlay-fgpur2xt/lava-14692359/bin/lava-install-packages
  113 09:43:24.295417  Creating /var/lib/lava/dispatcher/tmp/14692359/lava-overlay-fgpur2xt/lava-14692359/bin/lava-installed-packages
  114 09:43:24.295556  Creating /var/lib/lava/dispatcher/tmp/14692359/lava-overlay-fgpur2xt/lava-14692359/bin/lava-os-build
  115 09:43:24.295669  Creating /var/lib/lava/dispatcher/tmp/14692359/lava-overlay-fgpur2xt/lava-14692359/bin/lava-probe-channel
  116 09:43:24.295791  Creating /var/lib/lava/dispatcher/tmp/14692359/lava-overlay-fgpur2xt/lava-14692359/bin/lava-probe-ip
  117 09:43:24.295903  Creating /var/lib/lava/dispatcher/tmp/14692359/lava-overlay-fgpur2xt/lava-14692359/bin/lava-target-ip
  118 09:43:24.296019  Creating /var/lib/lava/dispatcher/tmp/14692359/lava-overlay-fgpur2xt/lava-14692359/bin/lava-target-mac
  119 09:43:24.296129  Creating /var/lib/lava/dispatcher/tmp/14692359/lava-overlay-fgpur2xt/lava-14692359/bin/lava-target-storage
  120 09:43:24.296244  Creating /var/lib/lava/dispatcher/tmp/14692359/lava-overlay-fgpur2xt/lava-14692359/bin/lava-test-case
  121 09:43:24.296371  Creating /var/lib/lava/dispatcher/tmp/14692359/lava-overlay-fgpur2xt/lava-14692359/bin/lava-test-event
  122 09:43:24.296480  Creating /var/lib/lava/dispatcher/tmp/14692359/lava-overlay-fgpur2xt/lava-14692359/bin/lava-test-feedback
  123 09:43:24.296591  Creating /var/lib/lava/dispatcher/tmp/14692359/lava-overlay-fgpur2xt/lava-14692359/bin/lava-test-raise
  124 09:43:24.296706  Creating /var/lib/lava/dispatcher/tmp/14692359/lava-overlay-fgpur2xt/lava-14692359/bin/lava-test-reference
  125 09:43:24.296836  Creating /var/lib/lava/dispatcher/tmp/14692359/lava-overlay-fgpur2xt/lava-14692359/bin/lava-test-runner
  126 09:43:24.296987  Creating /var/lib/lava/dispatcher/tmp/14692359/lava-overlay-fgpur2xt/lava-14692359/bin/lava-test-set
  127 09:43:24.297141  Creating /var/lib/lava/dispatcher/tmp/14692359/lava-overlay-fgpur2xt/lava-14692359/bin/lava-test-shell
  128 09:43:24.297262  Updating /var/lib/lava/dispatcher/tmp/14692359/lava-overlay-fgpur2xt/lava-14692359/bin/lava-install-packages (oe)
  129 09:43:24.297419  Updating /var/lib/lava/dispatcher/tmp/14692359/lava-overlay-fgpur2xt/lava-14692359/bin/lava-installed-packages (oe)
  130 09:43:24.297538  Creating /var/lib/lava/dispatcher/tmp/14692359/lava-overlay-fgpur2xt/lava-14692359/environment
  131 09:43:24.297633  LAVA metadata
  132 09:43:24.297697  - LAVA_JOB_ID=14692359
  133 09:43:24.297753  - LAVA_DISPATCHER_IP=192.168.201.1
  134 09:43:24.297851  start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
  135 09:43:24.297909  skipped lava-vland-overlay
  136 09:43:24.297974  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  137 09:43:24.298048  start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
  138 09:43:24.298101  skipped lava-multinode-overlay
  139 09:43:24.298164  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  140 09:43:24.298234  start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
  141 09:43:24.298297  Loading test definitions
  142 09:43:24.298387  start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
  143 09:43:24.298447  Using /lava-14692359 at stage 0
  144 09:43:24.298731  uuid=14692359_1.4.2.3.1 testdef=None
  145 09:43:24.298811  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  146 09:43:24.298898  start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
  147 09:43:24.299324  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  149 09:43:24.299638  start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
  150 09:43:24.300205  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  152 09:43:24.300444  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
  153 09:43:24.301125  runner path: /var/lib/lava/dispatcher/tmp/14692359/lava-overlay-fgpur2xt/lava-14692359/0/tests/0_cros-ec test_uuid 14692359_1.4.2.3.1
  154 09:43:24.301268  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  156 09:43:24.301453  Creating lava-test-runner.conf files
  157 09:43:24.301515  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14692359/lava-overlay-fgpur2xt/lava-14692359/0 for stage 0
  158 09:43:24.301628  - 0_cros-ec
  159 09:43:24.301746  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  160 09:43:24.301849  start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
  161 09:43:24.308391  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  162 09:43:24.308491  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
  163 09:43:24.308570  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  164 09:43:24.308646  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  165 09:43:24.308720  start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
  166 09:43:25.443491  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
  167 09:43:25.443630  start: 1.4.4 extract-modules (timeout 00:09:59) [common]
  168 09:43:25.443703  extracting modules file /var/lib/lava/dispatcher/tmp/14692359/tftp-deploy-2gsprdrl/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14692359/extract-overlay-ramdisk-eo3wdrpd/ramdisk
  169 09:43:25.469377  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  170 09:43:25.469508  start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
  171 09:43:25.469587  [common] Applying overlay /var/lib/lava/dispatcher/tmp/14692359/compress-overlay-bwzchrte/overlay-1.4.2.4.tar.gz to ramdisk
  172 09:43:25.469647  [common] Applying overlay /var/lib/lava/dispatcher/tmp/14692359/compress-overlay-bwzchrte/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14692359/extract-overlay-ramdisk-eo3wdrpd/ramdisk
  173 09:43:25.475905  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  174 09:43:25.475999  start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
  175 09:43:25.476076  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  176 09:43:25.476152  start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
  177 09:43:25.476217  Building ramdisk /var/lib/lava/dispatcher/tmp/14692359/extract-overlay-ramdisk-eo3wdrpd/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14692359/extract-overlay-ramdisk-eo3wdrpd/ramdisk
  178 09:43:25.977245  >> 212004 blocks

  179 09:43:30.151956  rename /var/lib/lava/dispatcher/tmp/14692359/extract-overlay-ramdisk-eo3wdrpd/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14692359/tftp-deploy-2gsprdrl/ramdisk/ramdisk.cpio.gz
  180 09:43:30.152139  end: 1.4.7 compress-ramdisk (duration 00:00:05) [common]
  181 09:43:30.152254  start: 1.4.8 prepare-kernel (timeout 00:09:54) [common]
  182 09:43:30.152359  start: 1.4.8.1 prepare-fit (timeout 00:09:54) [common]
  183 09:43:30.152503  No mkimage arch provided, not using FIT.
  184 09:43:30.152614  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  185 09:43:30.152755  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  186 09:43:30.152872  end: 1.4 prepare-tftp-overlay (duration 00:00:06) [common]
  187 09:43:30.152949  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:54) [common]
  188 09:43:30.153042  No LXC device requested
  189 09:43:30.153112  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  190 09:43:30.153196  start: 1.6 deploy-device-env (timeout 00:09:54) [common]
  191 09:43:30.153262  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  192 09:43:30.153316  Checking files for TFTP limit of 4294967296 bytes.
  193 09:43:30.153719  end: 1 tftp-deploy (duration 00:00:06) [common]
  194 09:43:30.153820  start: 2 depthcharge-action (timeout 00:05:00) [common]
  195 09:43:30.153928  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  196 09:43:30.154058  substitutions:
  197 09:43:30.154143  - {DTB}: None
  198 09:43:30.154225  - {INITRD}: 14692359/tftp-deploy-2gsprdrl/ramdisk/ramdisk.cpio.gz
  199 09:43:30.154304  - {KERNEL}: 14692359/tftp-deploy-2gsprdrl/kernel/bzImage
  200 09:43:30.154397  - {LAVA_MAC}: None
  201 09:43:30.154504  - {PRESEED_CONFIG}: None
  202 09:43:30.154580  - {PRESEED_LOCAL}: None
  203 09:43:30.154656  - {RAMDISK}: 14692359/tftp-deploy-2gsprdrl/ramdisk/ramdisk.cpio.gz
  204 09:43:30.154737  - {ROOT_PART}: None
  205 09:43:30.154830  - {ROOT}: None
  206 09:43:30.154966  - {SERVER_IP}: 192.168.201.1
  207 09:43:30.155043  - {TEE}: None
  208 09:43:30.155120  Parsed boot commands:
  209 09:43:30.155224  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  210 09:43:30.155419  Parsed boot commands: tftpboot 192.168.201.1 14692359/tftp-deploy-2gsprdrl/kernel/bzImage 14692359/tftp-deploy-2gsprdrl/kernel/cmdline 14692359/tftp-deploy-2gsprdrl/ramdisk/ramdisk.cpio.gz
  211 09:43:30.155566  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  212 09:43:30.155651  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  213 09:43:30.155723  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  214 09:43:30.155793  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  215 09:43:30.155846  Not connected, no need to disconnect.
  216 09:43:30.155912  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  217 09:43:30.155980  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  218 09:43:30.156032  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cp514-2h-1130g7-volteer-cbg-8'
  219 09:43:30.158989  Setting prompt string to ['lava-test: # ']
  220 09:43:30.159338  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  221 09:43:30.159508  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  222 09:43:30.159641  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  223 09:43:30.159719  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  224 09:43:30.159953  Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cp514-2h-1130g7-volteer-cbg-8', '--port=1', '--command=reboot']
  225 09:43:39.322467  >> Command sent successfully.
  226 09:43:39.333060  Returned 0 in 9 seconds
  227 09:43:39.333640  end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
  229 09:43:39.334798  end: 2.2.2 reset-device (duration 00:00:09) [common]
  230 09:43:39.335124  start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
  231 09:43:39.335518  Setting prompt string to 'Starting depthcharge on Voema...'
  232 09:43:39.335814  Changing prompt to 'Starting depthcharge on Voema...'
  233 09:43:39.336044  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  234 09:43:39.337160  [Enter `^Ec?' for help]

  235 09:43:41.424278  

  236 09:43:41.424725  

  237 09:43:41.433772  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...

  238 09:43:41.440517  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz

  239 09:43:41.443905  CPU: ID 806c1, Tigerlake B0, ucode: 00000086

  240 09:43:41.447033  CPU: AES supported, TXT NOT supported, VT supported

  241 09:43:41.453567  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2

  242 09:43:41.459992  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU

  243 09:43:41.463944  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2

  244 09:43:41.467075  VBOOT: Loading verstage.

  245 09:43:41.473637  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  246 09:43:41.476822  FMAP: base = 0x0 size = 0x2000000 #areas = 32

  247 09:43:41.483230  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  248 09:43:41.489955  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes

  249 09:43:41.496170  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984

  250 09:43:41.500267  

  251 09:43:41.500831  

  252 09:43:41.510200  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...

  253 09:43:41.525112  Probing TPM: . done!

  254 09:43:41.528391  TPM ready after 0 ms

  255 09:43:41.531508  Connected to device vid:did:rid of 1ae0:0028:00

  256 09:43:41.542516  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6

  257 09:43:41.549530  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  258 09:43:41.552957  Initialized TPM device CR50 revision 0

  259 09:43:41.607882  tlcl_send_startup: Startup return code is 0

  260 09:43:41.608327  TPM: setup succeeded

  261 09:43:41.622383  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  262 09:43:41.637496  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  263 09:43:41.649110  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  264 09:43:41.658741  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  265 09:43:41.662246  Chrome EC: UHEPI supported

  266 09:43:41.666145  Phase 1

  267 09:43:41.668993  FMAP: area GBB found @ 1805000 (458752 bytes)

  268 09:43:41.678864  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  269 09:43:41.685664  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  270 09:43:41.692051  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  271 09:43:41.698519  VB2:vb2_check_recovery() Recovery was requested manually

  272 09:43:41.705386  VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x7

  273 09:43:41.705784  Recovery requested (1009000e)

  274 09:43:41.712596  TPM: Extending digest for VBOOT: boot mode into PCR 0

  275 09:43:41.722838  tlcl_extend: response is 0

  276 09:43:41.728972  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  277 09:43:41.738952  tlcl_extend: response is 0

  278 09:43:41.745515  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  279 09:43:41.752508  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638

  280 09:43:41.758715  BS: verstage times (exec / console): total (unknown) / 148 ms

  281 09:43:41.759108  

  282 09:43:41.759407  

  283 09:43:41.772018  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...

  284 09:43:41.778427  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  285 09:43:41.781953  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  286 09:43:41.785471  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000

  287 09:43:41.791982  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  288 09:43:41.795158  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000

  289 09:43:41.798571  gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000

  290 09:43:41.801735  TCO_STS:   0000 0000

  291 09:43:41.804974  GEN_PMCON: d0015038 00002200

  292 09:43:41.808491  GBLRST_CAUSE: 00000000 00000000

  293 09:43:41.811507  HPR_CAUSE0: 00000000

  294 09:43:41.811904  prev_sleep_state 5

  295 09:43:41.814849  Boot Count incremented to 32769

  296 09:43:41.821584  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  297 09:43:41.828068  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  298 09:43:41.838182  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  299 09:43:41.844583  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c

  300 09:43:41.847831  Chrome EC: UHEPI supported

  301 09:43:41.854369  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  302 09:43:41.866402  Probing TPM:  done!

  303 09:43:41.872841  Connected to device vid:did:rid of 1ae0:0028:00

  304 09:43:41.882516  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6

  305 09:43:41.886244  Initialized TPM device CR50 revision 0

  306 09:43:41.904024  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  307 09:43:41.907377  MRC: Hash idx 0x100b comparison successful.

  308 09:43:41.910560  MRC cache found, size faa8

  309 09:43:41.910943  bootmode is set to: 2

  310 09:43:41.914416  SPD index = 0

  311 09:43:41.921163  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c

  312 09:43:41.924462  SPD: module type is LPDDR4X

  313 09:43:41.927417  SPD: module part number is MT53E512M64D4NW-046

  314 09:43:41.933978  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  315 09:43:41.940588  SPD: device width 16 bits, bus width 16 bits

  316 09:43:41.943747  SPD: module size is 1024 MB (per channel)

  317 09:43:42.389159  CBMEM:

  318 09:43:42.392323  IMD: root @ 0x76fff000 254 entries.

  319 09:43:42.395753  IMD: root @ 0x76ffec00 62 entries.

  320 09:43:42.398975  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  321 09:43:42.405206  FMAP: area RW_VPD found @ f35000 (8192 bytes)

  322 09:43:42.408798  External stage cache:

  323 09:43:42.411762  IMD: root @ 0x7b3ff000 254 entries.

  324 09:43:42.415067  IMD: root @ 0x7b3fec00 62 entries.

  325 09:43:42.431141  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  326 09:43:42.437744  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  327 09:43:42.443620  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  328 09:43:42.458508  MRC: 'RECOVERY_MRC_CACHE' does not need update.

  329 09:43:42.464720  cse_lite: Skip switching to RW in the recovery path

  330 09:43:42.465178  8 DIMMs found

  331 09:43:42.468175  SMM Memory Map

  332 09:43:42.471496  SMRAM       : 0x7b000000 0x800000

  333 09:43:42.474783   Subregion 0: 0x7b000000 0x200000

  334 09:43:42.477714   Subregion 1: 0x7b200000 0x200000

  335 09:43:42.481375   Subregion 2: 0x7b400000 0x400000

  336 09:43:42.481760  top_of_ram = 0x77000000

  337 09:43:42.487937  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  338 09:43:42.494070  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)

  339 09:43:42.497431  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  340 09:43:42.503756  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  341 09:43:42.510794  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c

  342 09:43:42.517175  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)

  343 09:43:42.527908  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500

  344 09:43:42.534257  Processing 211 relocs. Offset value of 0x74c0b000

  345 09:43:42.540759  BS: romstage times (exec / console): total (unknown) / 277 ms

  346 09:43:42.546776  

  347 09:43:42.547047  

  348 09:43:42.556666  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...

  349 09:43:42.559947  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  350 09:43:42.569775  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  351 09:43:42.576752  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  352 09:43:42.583247  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec

  353 09:43:42.589946  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)

  354 09:43:42.636687  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270

  355 09:43:42.643340  Processing 5008 relocs. Offset value of 0x75d98000

  356 09:43:42.646194  BS: postcar times (exec / console): total (unknown) / 59 ms

  357 09:43:42.650130  

  358 09:43:42.650346  

  359 09:43:42.659488  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...

  360 09:43:42.659795  Normal boot

  361 09:43:42.662828  FW_CONFIG value is 0x804c02

  362 09:43:42.666241  PCI: 00:07.0 disabled by fw_config

  363 09:43:42.669791  PCI: 00:07.1 disabled by fw_config

  364 09:43:42.676422  PCI: 00:0d.2 disabled by fw_config

  365 09:43:42.679758  PCI: 00:1c.7 disabled by fw_config

  366 09:43:42.682911  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  367 09:43:42.689586  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  368 09:43:42.696304  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  369 09:43:42.699462  GENERIC: 0.0 disabled by fw_config

  370 09:43:42.702764  GENERIC: 1.0 disabled by fw_config

  371 09:43:42.705908  fw_config match found: DB_USB=USB3_ACTIVE

  372 09:43:42.709566  fw_config match found: DB_USB=USB3_ACTIVE

  373 09:43:42.716115  fw_config match found: DB_USB=USB3_ACTIVE

  374 09:43:42.719392  fw_config match found: DB_USB=USB3_ACTIVE

  375 09:43:42.722664  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  376 09:43:42.732762  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  377 09:43:42.739287  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  378 09:43:42.745855  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c

  379 09:43:42.752442  microcode: sig=0x806c1 pf=0x80 revision=0x86

  380 09:43:42.755352  microcode: Update skipped, already up-to-date

  381 09:43:42.761849  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c

  382 09:43:42.790410  Detected 4 core, 8 thread CPU.

  383 09:43:42.793924  Setting up SMI for CPU

  384 09:43:42.797188  IED base = 0x7b400000

  385 09:43:42.797708  IED size = 0x00400000

  386 09:43:42.800423  Will perform SMM setup.

  387 09:43:42.807011  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.

  388 09:43:42.813474  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

  389 09:43:42.820723  Processing 16 relocs. Offset value of 0x00030000

  390 09:43:42.824612  Attempting to start 7 APs

  391 09:43:42.827887  Waiting for 10ms after sending INIT.

  392 09:43:42.842836  Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.

  393 09:43:42.843227  done.

  394 09:43:42.845926  AP: slot 6 apic_id 2.

  395 09:43:42.849341  AP: slot 2 apic_id 3.

  396 09:43:42.849822  AP: slot 4 apic_id 5.

  397 09:43:42.852881  AP: slot 5 apic_id 4.

  398 09:43:42.855969  Waiting for 2nd SIPI to complete...done.

  399 09:43:42.859037  AP: slot 7 apic_id 7.

  400 09:43:42.862378  AP: slot 3 apic_id 6.

  401 09:43:42.868798  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

  402 09:43:42.875379  Processing 13 relocs. Offset value of 0x00038000

  403 09:43:42.878638  Unable to locate Global NVS

  404 09:43:42.885957  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)

  405 09:43:42.889074  Installing permanent SMM handler to 0x7b000000

  406 09:43:42.898516  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908

  407 09:43:42.901772  Processing 794 relocs. Offset value of 0x7b010000

  408 09:43:42.911875  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8

  409 09:43:42.915251  Processing 13 relocs. Offset value of 0x7b008000

  410 09:43:42.921760  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd

  411 09:43:42.928486  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd

  412 09:43:42.934683  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd

  413 09:43:42.937908  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd

  414 09:43:42.944434  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd

  415 09:43:42.951681  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd

  416 09:43:42.957989  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd

  417 09:43:42.961313  Unable to locate Global NVS

  418 09:43:42.968202  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)

  419 09:43:42.970887  Clearing SMI status registers

  420 09:43:42.974044  SMI_STS: PM1 

  421 09:43:42.974477  PM1_STS: PWRBTN 

  422 09:43:42.980864  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0

  423 09:43:42.984185  In relocation handler: CPU 0

  424 09:43:42.990675  New SMBASE=0x7b000000 IEDBASE=0x7b400000

  425 09:43:42.994218  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  426 09:43:42.997623  Relocation complete.

  427 09:43:43.004044  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1

  428 09:43:43.007036  In relocation handler: CPU 1

  429 09:43:43.010494  New SMBASE=0x7afffc00 IEDBASE=0x7b400000

  430 09:43:43.013509  Relocation complete.

  431 09:43:43.020011  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5

  432 09:43:43.023265  In relocation handler: CPU 5

  433 09:43:43.026590  New SMBASE=0x7affec00 IEDBASE=0x7b400000

  434 09:43:43.032965  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  435 09:43:43.033093  Relocation complete.

  436 09:43:43.039706  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4

  437 09:43:43.042898  In relocation handler: CPU 4

  438 09:43:43.049344  New SMBASE=0x7afff000 IEDBASE=0x7b400000

  439 09:43:43.049445  Relocation complete.

  440 09:43:43.059364  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6

  441 09:43:43.059528  In relocation handler: CPU 6

  442 09:43:43.066118  New SMBASE=0x7affe800 IEDBASE=0x7b400000

  443 09:43:43.069151  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  444 09:43:43.072388  Relocation complete.

  445 09:43:43.079405  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2

  446 09:43:43.082654  In relocation handler: CPU 2

  447 09:43:43.085425  New SMBASE=0x7afff800 IEDBASE=0x7b400000

  448 09:43:43.088841  Relocation complete.

  449 09:43:43.095629  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7

  450 09:43:43.099077  In relocation handler: CPU 7

  451 09:43:43.102371  New SMBASE=0x7affe400 IEDBASE=0x7b400000

  452 09:43:43.105494  Relocation complete.

  453 09:43:43.112112  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3

  454 09:43:43.115671  In relocation handler: CPU 3

  455 09:43:43.118693  New SMBASE=0x7afff400 IEDBASE=0x7b400000

  456 09:43:43.125478  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  457 09:43:43.125575  Relocation complete.

  458 09:43:43.128649  Initializing CPU #0

  459 09:43:43.132059  CPU: vendor Intel device 806c1

  460 09:43:43.135300  CPU: family 06, model 8c, stepping 01

  461 09:43:43.138663  Clearing out pending MCEs

  462 09:43:43.141904  Setting up local APIC...

  463 09:43:43.141981   apic_id: 0x00 done.

  464 09:43:43.145170  Turbo is available but hidden

  465 09:43:43.148448  Turbo is available and visible

  466 09:43:43.154847  microcode: Update skipped, already up-to-date

  467 09:43:43.154931  CPU #0 initialized

  468 09:43:43.158572  Initializing CPU #2

  469 09:43:43.161271  Initializing CPU #6

  470 09:43:43.164637  CPU: vendor Intel device 806c1

  471 09:43:43.167954  CPU: family 06, model 8c, stepping 01

  472 09:43:43.168022  Initializing CPU #5

  473 09:43:43.171154  Initializing CPU #4

  474 09:43:43.174411  CPU: vendor Intel device 806c1

  475 09:43:43.178247  CPU: family 06, model 8c, stepping 01

  476 09:43:43.181506  CPU: vendor Intel device 806c1

  477 09:43:43.184468  CPU: family 06, model 8c, stepping 01

  478 09:43:43.188067  Clearing out pending MCEs

  479 09:43:43.191325  Clearing out pending MCEs

  480 09:43:43.191411  Setting up local APIC...

  481 09:43:43.194355  Clearing out pending MCEs

  482 09:43:43.197299  CPU: vendor Intel device 806c1

  483 09:43:43.200837  CPU: family 06, model 8c, stepping 01

  484 09:43:43.204192  Setting up local APIC...

  485 09:43:43.207405  Clearing out pending MCEs

  486 09:43:43.210900   apic_id: 0x03 done.

  487 09:43:43.210972   apic_id: 0x04 done.

  488 09:43:43.214104  Setting up local APIC...

  489 09:43:43.217386  Setting up local APIC...

  490 09:43:43.217453  Initializing CPU #1

  491 09:43:43.223837  microcode: Update skipped, already up-to-date

  492 09:43:43.223911   apic_id: 0x05 done.

  493 09:43:43.227403  CPU #5 initialized

  494 09:43:43.230424  microcode: Update skipped, already up-to-date

  495 09:43:43.233689   apic_id: 0x02 done.

  496 09:43:43.237605  CPU #4 initialized

  497 09:43:43.237699  Initializing CPU #3

  498 09:43:43.240766  Initializing CPU #7

  499 09:43:43.244035  CPU: vendor Intel device 806c1

  500 09:43:43.247262  CPU: family 06, model 8c, stepping 01

  501 09:43:43.250521  CPU: vendor Intel device 806c1

  502 09:43:43.253933  CPU: family 06, model 8c, stepping 01

  503 09:43:43.257472  Clearing out pending MCEs

  504 09:43:43.260451  Clearing out pending MCEs

  505 09:43:43.263694  Setting up local APIC...

  506 09:43:43.267184  microcode: Update skipped, already up-to-date

  507 09:43:43.270273  microcode: Update skipped, already up-to-date

  508 09:43:43.273545  CPU #2 initialized

  509 09:43:43.273632  CPU #6 initialized

  510 09:43:43.276758  Setting up local APIC...

  511 09:43:43.279975  CPU: vendor Intel device 806c1

  512 09:43:43.283196  CPU: family 06, model 8c, stepping 01

  513 09:43:43.286507  Clearing out pending MCEs

  514 09:43:43.289898   apic_id: 0x07 done.

  515 09:43:43.290015   apic_id: 0x06 done.

  516 09:43:43.296596  microcode: Update skipped, already up-to-date

  517 09:43:43.299979  microcode: Update skipped, already up-to-date

  518 09:43:43.303157  CPU #7 initialized

  519 09:43:43.303349  CPU #3 initialized

  520 09:43:43.306468  Setting up local APIC...

  521 09:43:43.309750   apic_id: 0x01 done.

  522 09:43:43.312951  microcode: Update skipped, already up-to-date

  523 09:43:43.316517  CPU #1 initialized

  524 09:43:43.320161  bsp_do_flight_plan done after 459 msecs.

  525 09:43:43.323396  CPU: frequency set to 4000 MHz

  526 09:43:43.326388  Enabling SMIs.

  527 09:43:43.333060  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms

  528 09:43:43.347924  SATAXPCIE1 indicates PCIe NVMe is present

  529 09:43:43.350902  Probing TPM:  done!

  530 09:43:43.354857  Connected to device vid:did:rid of 1ae0:0028:00

  531 09:43:43.364772  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6

  532 09:43:43.368090  Initialized TPM device CR50 revision 0

  533 09:43:43.371508  Enabling S0i3.4

  534 09:43:43.378301  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc

  535 09:43:43.381598  Found a VBT of 8704 bytes after decompression

  536 09:43:43.388132  cse_lite: CSE RO boot. HybridStorageMode disabled

  537 09:43:43.394632  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called

  538 09:43:43.470460  FSPS returned 0

  539 09:43:43.473774  Executing Phase 1 of FspMultiPhaseSiInit

  540 09:43:43.483579  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  541 09:43:43.487395  port C0 DISC req: usage 1 usb3 1 usb2 5

  542 09:43:43.490527  Raw Buffer output 0 00000511

  543 09:43:43.493382  Raw Buffer output 1 00000000

  544 09:43:43.497660  pmc_send_ipc_cmd succeeded

  545 09:43:43.504299  port C1 DISC req: usage 1 usb3 2 usb2 3

  546 09:43:43.504818  Raw Buffer output 0 00000321

  547 09:43:43.507672  Raw Buffer output 1 00000000

  548 09:43:43.511702  pmc_send_ipc_cmd succeeded

  549 09:43:43.517040  Detected 4 core, 8 thread CPU.

  550 09:43:43.520319  Detected 4 core, 8 thread CPU.

  551 09:43:43.753792  Display FSP Version Info HOB

  552 09:43:43.756977  Reference Code - CPU = a.0.4c.31

  553 09:43:43.760174  uCode Version = 0.0.0.86

  554 09:43:43.764258  TXT ACM version = ff.ff.ff.ffff

  555 09:43:43.767260  Reference Code - ME = a.0.4c.31

  556 09:43:43.770386  MEBx version = 0.0.0.0

  557 09:43:43.773590  ME Firmware Version = Consumer SKU

  558 09:43:43.777021  Reference Code - PCH = a.0.4c.31

  559 09:43:43.780168  PCH-CRID Status = Disabled

  560 09:43:43.783679  PCH-CRID Original Value = ff.ff.ff.ffff

  561 09:43:43.787031  PCH-CRID New Value = ff.ff.ff.ffff

  562 09:43:43.790108  OPROM - RST - RAID = ff.ff.ff.ffff

  563 09:43:43.793638  PCH Hsio Version = 4.0.0.0

  564 09:43:43.796834  Reference Code - SA - System Agent = a.0.4c.31

  565 09:43:43.800373  Reference Code - MRC = 2.0.0.1

  566 09:43:43.803368  SA - PCIe Version = a.0.4c.31

  567 09:43:43.806470  SA-CRID Status = Disabled

  568 09:43:43.810078  SA-CRID Original Value = 0.0.0.1

  569 09:43:43.812869  SA-CRID New Value = 0.0.0.1

  570 09:43:43.816156  OPROM - VBIOS = ff.ff.ff.ffff

  571 09:43:43.819699  IO Manageability Engine FW Version = 11.1.4.0

  572 09:43:43.822830  PHY Build Version = 0.0.0.e0

  573 09:43:43.826531  Thunderbolt(TM) FW Version = 0.0.0.0

  574 09:43:43.833248  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  575 09:43:43.836176  ITSS IRQ Polarities Before:

  576 09:43:43.839025  IPC0: 0xffffffff

  577 09:43:43.839379  IPC1: 0xffffffff

  578 09:43:43.842671  IPC2: 0xffffffff

  579 09:43:43.842956  IPC3: 0xffffffff

  580 09:43:43.845994  ITSS IRQ Polarities After:

  581 09:43:43.849247  IPC0: 0xffffffff

  582 09:43:43.849541  IPC1: 0xffffffff

  583 09:43:43.852592  IPC2: 0xffffffff

  584 09:43:43.852874  IPC3: 0xffffffff

  585 09:43:43.855853  Found PCIe Root Port #9 at PCI: 00:1d.0.

  586 09:43:43.868557  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.

  587 09:43:43.882142  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.

  588 09:43:43.892107  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.

  589 09:43:43.898316  BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms

  590 09:43:43.901857  Enumerating buses...

  591 09:43:43.905154  Show all devs... Before device enumeration.

  592 09:43:43.908414  Root Device: enabled 1

  593 09:43:43.911727  DOMAIN: 0000: enabled 1

  594 09:43:43.915004  CPU_CLUSTER: 0: enabled 1

  595 09:43:43.915387  PCI: 00:00.0: enabled 1

  596 09:43:43.918480  PCI: 00:02.0: enabled 1

  597 09:43:43.921589  PCI: 00:04.0: enabled 1

  598 09:43:43.924660  PCI: 00:05.0: enabled 1

  599 09:43:43.925047  PCI: 00:06.0: enabled 0

  600 09:43:43.928364  PCI: 00:07.0: enabled 0

  601 09:43:43.931326  PCI: 00:07.1: enabled 0

  602 09:43:43.934785  PCI: 00:07.2: enabled 0

  603 09:43:43.935166  PCI: 00:07.3: enabled 0

  604 09:43:43.937788  PCI: 00:08.0: enabled 1

  605 09:43:43.941146  PCI: 00:09.0: enabled 0

  606 09:43:43.941714  PCI: 00:0a.0: enabled 0

  607 09:43:43.945041  PCI: 00:0d.0: enabled 1

  608 09:43:43.947863  PCI: 00:0d.1: enabled 0

  609 09:43:43.951492  PCI: 00:0d.2: enabled 0

  610 09:43:43.951878  PCI: 00:0d.3: enabled 0

  611 09:43:43.954376  PCI: 00:0e.0: enabled 0

  612 09:43:43.957630  PCI: 00:10.2: enabled 1

  613 09:43:43.961117  PCI: 00:10.6: enabled 0

  614 09:43:43.961496  PCI: 00:10.7: enabled 0

  615 09:43:43.964433  PCI: 00:12.0: enabled 0

  616 09:43:43.967713  PCI: 00:12.6: enabled 0

  617 09:43:43.970922  PCI: 00:13.0: enabled 0

  618 09:43:43.971511  PCI: 00:14.0: enabled 1

  619 09:43:43.974295  PCI: 00:14.1: enabled 0

  620 09:43:43.977432  PCI: 00:14.2: enabled 1

  621 09:43:43.980750  PCI: 00:14.3: enabled 1

  622 09:43:43.981243  PCI: 00:15.0: enabled 1

  623 09:43:43.984012  PCI: 00:15.1: enabled 1

  624 09:43:43.987061  PCI: 00:15.2: enabled 1

  625 09:43:43.990809  PCI: 00:15.3: enabled 1

  626 09:43:43.991160  PCI: 00:16.0: enabled 1

  627 09:43:43.993429  PCI: 00:16.1: enabled 0

  628 09:43:43.996589  PCI: 00:16.2: enabled 0

  629 09:43:43.999861  PCI: 00:16.3: enabled 0

  630 09:43:44.000084  PCI: 00:16.4: enabled 0

  631 09:43:44.003632  PCI: 00:16.5: enabled 0

  632 09:43:44.006771  PCI: 00:17.0: enabled 1

  633 09:43:44.009882  PCI: 00:19.0: enabled 0

  634 09:43:44.010052  PCI: 00:19.1: enabled 1

  635 09:43:44.013141  PCI: 00:19.2: enabled 0

  636 09:43:44.016441  PCI: 00:1c.0: enabled 1

  637 09:43:44.019669  PCI: 00:1c.1: enabled 0

  638 09:43:44.019789  PCI: 00:1c.2: enabled 0

  639 09:43:44.022985  PCI: 00:1c.3: enabled 0

  640 09:43:44.026175  PCI: 00:1c.4: enabled 0

  641 09:43:44.026277  PCI: 00:1c.5: enabled 0

  642 09:43:44.029373  PCI: 00:1c.6: enabled 1

  643 09:43:44.032745  PCI: 00:1c.7: enabled 0

  644 09:43:44.035964  PCI: 00:1d.0: enabled 1

  645 09:43:44.039206  PCI: 00:1d.1: enabled 0

  646 09:43:44.039280  PCI: 00:1d.2: enabled 1

  647 09:43:44.042871  PCI: 00:1d.3: enabled 0

  648 09:43:44.045975  PCI: 00:1e.0: enabled 1

  649 09:43:44.046050  PCI: 00:1e.1: enabled 0

  650 09:43:44.049455  PCI: 00:1e.2: enabled 1

  651 09:43:44.052733  PCI: 00:1e.3: enabled 1

  652 09:43:44.055892  PCI: 00:1f.0: enabled 1

  653 09:43:44.055969  PCI: 00:1f.1: enabled 0

  654 09:43:44.059046  PCI: 00:1f.2: enabled 1

  655 09:43:44.062351  PCI: 00:1f.3: enabled 1

  656 09:43:44.065836  PCI: 00:1f.4: enabled 0

  657 09:43:44.065912  PCI: 00:1f.5: enabled 1

  658 09:43:44.069052  PCI: 00:1f.6: enabled 0

  659 09:43:44.072259  PCI: 00:1f.7: enabled 0

  660 09:43:44.075528  APIC: 00: enabled 1

  661 09:43:44.075604  GENERIC: 0.0: enabled 1

  662 09:43:44.078922  GENERIC: 0.0: enabled 1

  663 09:43:44.082338  GENERIC: 1.0: enabled 1

  664 09:43:44.085398  GENERIC: 0.0: enabled 1

  665 09:43:44.085507  GENERIC: 1.0: enabled 1

  666 09:43:44.088539  USB0 port 0: enabled 1

  667 09:43:44.091854  GENERIC: 0.0: enabled 1

  668 09:43:44.091947  USB0 port 0: enabled 1

  669 09:43:44.094912  GENERIC: 0.0: enabled 1

  670 09:43:44.098822  I2C: 00:1a: enabled 1

  671 09:43:44.102049  I2C: 00:31: enabled 1

  672 09:43:44.102148  I2C: 00:32: enabled 1

  673 09:43:44.105353  I2C: 00:10: enabled 1

  674 09:43:44.108622  I2C: 00:15: enabled 1

  675 09:43:44.108714  GENERIC: 0.0: enabled 0

  676 09:43:44.111970  GENERIC: 1.0: enabled 0

  677 09:43:44.115046  GENERIC: 0.0: enabled 1

  678 09:43:44.115142  SPI: 00: enabled 1

  679 09:43:44.118196  SPI: 00: enabled 1

  680 09:43:44.121311  PNP: 0c09.0: enabled 1

  681 09:43:44.121405  GENERIC: 0.0: enabled 1

  682 09:43:44.124589  USB3 port 0: enabled 1

  683 09:43:44.127913  USB3 port 1: enabled 1

  684 09:43:44.131610  USB3 port 2: enabled 0

  685 09:43:44.131687  USB3 port 3: enabled 0

  686 09:43:44.134821  USB2 port 0: enabled 0

  687 09:43:44.138052  USB2 port 1: enabled 1

  688 09:43:44.138151  USB2 port 2: enabled 1

  689 09:43:44.141417  USB2 port 3: enabled 0

  690 09:43:44.144662  USB2 port 4: enabled 1

  691 09:43:44.147988  USB2 port 5: enabled 0

  692 09:43:44.148063  USB2 port 6: enabled 0

  693 09:43:44.151138  USB2 port 7: enabled 0

  694 09:43:44.154205  USB2 port 8: enabled 0

  695 09:43:44.154280  USB2 port 9: enabled 0

  696 09:43:44.157652  USB3 port 0: enabled 0

  697 09:43:44.160668  USB3 port 1: enabled 1

  698 09:43:44.163964  USB3 port 2: enabled 0

  699 09:43:44.164040  USB3 port 3: enabled 0

  700 09:43:44.167217  GENERIC: 0.0: enabled 1

  701 09:43:44.170887  GENERIC: 1.0: enabled 1

  702 09:43:44.170981  APIC: 01: enabled 1

  703 09:43:44.173994  APIC: 03: enabled 1

  704 09:43:44.177551  APIC: 06: enabled 1

  705 09:43:44.177654  APIC: 05: enabled 1

  706 09:43:44.180433  APIC: 04: enabled 1

  707 09:43:44.183691  APIC: 02: enabled 1

  708 09:43:44.183768  APIC: 07: enabled 1

  709 09:43:44.187605  Compare with tree...

  710 09:43:44.190723  Root Device: enabled 1

  711 09:43:44.190813   DOMAIN: 0000: enabled 1

  712 09:43:44.193967    PCI: 00:00.0: enabled 1

  713 09:43:44.197088    PCI: 00:02.0: enabled 1

  714 09:43:44.200161    PCI: 00:04.0: enabled 1

  715 09:43:44.203345     GENERIC: 0.0: enabled 1

  716 09:43:44.203482    PCI: 00:05.0: enabled 1

  717 09:43:44.206570    PCI: 00:06.0: enabled 0

  718 09:43:44.209982    PCI: 00:07.0: enabled 0

  719 09:43:44.213295     GENERIC: 0.0: enabled 1

  720 09:43:44.216635    PCI: 00:07.1: enabled 0

  721 09:43:44.216711     GENERIC: 1.0: enabled 1

  722 09:43:44.219840    PCI: 00:07.2: enabled 0

  723 09:43:44.223767     GENERIC: 0.0: enabled 1

  724 09:43:44.226749    PCI: 00:07.3: enabled 0

  725 09:43:44.230104     GENERIC: 1.0: enabled 1

  726 09:43:44.233433    PCI: 00:08.0: enabled 1

  727 09:43:44.233510    PCI: 00:09.0: enabled 0

  728 09:43:44.236689    PCI: 00:0a.0: enabled 0

  729 09:43:44.239878    PCI: 00:0d.0: enabled 1

  730 09:43:44.243322     USB0 port 0: enabled 1

  731 09:43:44.246730      USB3 port 0: enabled 1

  732 09:43:44.246830      USB3 port 1: enabled 1

  733 09:43:44.249998      USB3 port 2: enabled 0

  734 09:43:44.253347      USB3 port 3: enabled 0

  735 09:43:44.256460    PCI: 00:0d.1: enabled 0

  736 09:43:44.259636    PCI: 00:0d.2: enabled 0

  737 09:43:44.259713     GENERIC: 0.0: enabled 1

  738 09:43:44.262788    PCI: 00:0d.3: enabled 0

  739 09:43:44.266354    PCI: 00:0e.0: enabled 0

  740 09:43:44.269281    PCI: 00:10.2: enabled 1

  741 09:43:44.272555    PCI: 00:10.6: enabled 0

  742 09:43:44.272632    PCI: 00:10.7: enabled 0

  743 09:43:44.275808    PCI: 00:12.0: enabled 0

  744 09:43:44.279092    PCI: 00:12.6: enabled 0

  745 09:43:44.282449    PCI: 00:13.0: enabled 0

  746 09:43:44.286086    PCI: 00:14.0: enabled 1

  747 09:43:44.286162     USB0 port 0: enabled 1

  748 09:43:44.288972      USB2 port 0: enabled 0

  749 09:43:44.292675      USB2 port 1: enabled 1

  750 09:43:44.295855      USB2 port 2: enabled 1

  751 09:43:44.299082      USB2 port 3: enabled 0

  752 09:43:44.302262      USB2 port 4: enabled 1

  753 09:43:44.302339      USB2 port 5: enabled 0

  754 09:43:44.305479      USB2 port 6: enabled 0

  755 09:43:44.309173      USB2 port 7: enabled 0

  756 09:43:44.312480      USB2 port 8: enabled 0

  757 09:43:44.315695      USB2 port 9: enabled 0

  758 09:43:44.318977      USB3 port 0: enabled 0

  759 09:43:44.319053      USB3 port 1: enabled 1

  760 09:43:44.322328      USB3 port 2: enabled 0

  761 09:43:44.325626      USB3 port 3: enabled 0

  762 09:43:44.328806    PCI: 00:14.1: enabled 0

  763 09:43:44.331965    PCI: 00:14.2: enabled 1

  764 09:43:44.334890    PCI: 00:14.3: enabled 1

  765 09:43:44.334972     GENERIC: 0.0: enabled 1

  766 09:43:44.338300    PCI: 00:15.0: enabled 1

  767 09:43:44.342253     I2C: 00:1a: enabled 1

  768 09:43:44.345351     I2C: 00:31: enabled 1

  769 09:43:44.345428     I2C: 00:32: enabled 1

  770 09:43:44.348617    PCI: 00:15.1: enabled 1

  771 09:43:44.351872     I2C: 00:10: enabled 1

  772 09:43:44.355198    PCI: 00:15.2: enabled 1

  773 09:43:44.358342    PCI: 00:15.3: enabled 1

  774 09:43:44.358419    PCI: 00:16.0: enabled 1

  775 09:43:44.361612    PCI: 00:16.1: enabled 0

  776 09:43:44.373052    PCI: 00:16.2: enabled 0

  777 09:43:44.373141    PCI: 00:16.3: enabled 0

  778 09:43:44.382355    PCI: 00:16.4: enabled 0

  779 09:43:44.382442    PCI: 00:16.5: enabled 0

  780 09:43:44.382520    PCI: 00:17.0: enabled 1

  781 09:43:44.382774    PCI: 00:19.0: enabled 0

  782 09:43:44.382838    PCI: 00:19.1: enabled 1

  783 09:43:44.388341     I2C: 00:15: enabled 1

  784 09:43:44.388416    PCI: 00:19.2: enabled 0

  785 09:43:44.395883    PCI: 00:1d.0: enabled 1

  786 09:43:44.395963     GENERIC: 0.0: enabled 1

  787 09:43:44.396041    PCI: 00:1e.0: enabled 1

  788 09:43:44.403400    PCI: 00:1e.1: enabled 0

  789 09:43:44.403525    PCI: 00:1e.2: enabled 1

  790 09:43:44.408674     SPI: 00: enabled 1

  791 09:43:44.408766    PCI: 00:1e.3: enabled 1

  792 09:43:44.408841     SPI: 00: enabled 1

  793 09:43:44.413160    PCI: 00:1f.0: enabled 1

  794 09:43:44.413237     PNP: 0c09.0: enabled 1

  795 09:43:44.416850    PCI: 00:1f.1: enabled 0

  796 09:43:44.416928    PCI: 00:1f.2: enabled 1

  797 09:43:44.424694     GENERIC: 0.0: enabled 1

  798 09:43:44.424777      GENERIC: 0.0: enabled 1

  799 09:43:44.432063      GENERIC: 1.0: enabled 1

  800 09:43:44.432143    PCI: 00:1f.3: enabled 1

  801 09:43:44.432202    PCI: 00:1f.4: enabled 0

  802 09:43:44.440829    PCI: 00:1f.5: enabled 1

  803 09:43:44.440915    PCI: 00:1f.6: enabled 0

  804 09:43:44.449104    PCI: 00:1f.7: enabled 0

  805 09:43:44.449188   CPU_CLUSTER: 0: enabled 1

  806 09:43:44.449430    APIC: 00: enabled 1

  807 09:43:44.449492    APIC: 01: enabled 1

  808 09:43:44.449546    APIC: 03: enabled 1

  809 09:43:44.455719    APIC: 06: enabled 1

  810 09:43:44.455797    APIC: 05: enabled 1

  811 09:43:44.455855    APIC: 04: enabled 1

  812 09:43:44.459012    APIC: 02: enabled 1

  813 09:43:44.459112    APIC: 07: enabled 1

  814 09:43:44.465498  Root Device scanning...

  815 09:43:44.465575  scan_static_bus for Root Device

  816 09:43:44.469973  DOMAIN: 0000 enabled

  817 09:43:44.470048  CPU_CLUSTER: 0 enabled

  818 09:43:44.483857  DOMAIN: 0000 scanning...

  819 09:43:44.483942  PCI: pci_scan_bus for bus 00

  820 09:43:44.484183  PCI: 00:00.0 [8086/0000] ops

  821 09:43:44.484243  PCI: 00:00.0 [8086/9a12] enabled

  822 09:43:44.521031  PCI: 00:02.0 [8086/0000] bus ops

  823 09:43:44.521150  PCI: 00:02.0 [8086/9a40] enabled

  824 09:43:44.521402  PCI: 00:04.0 [8086/0000] bus ops

  825 09:43:44.521465  PCI: 00:04.0 [8086/9a03] enabled

  826 09:43:44.521520  PCI: 00:05.0 [8086/9a19] enabled

  827 09:43:44.521585  PCI: 00:07.0 [0000/0000] hidden

  828 09:43:44.521651  PCI: 00:08.0 [8086/9a11] enabled

  829 09:43:44.521872  PCI: 00:0a.0 [8086/9a0d] disabled

  830 09:43:44.521953  PCI: 00:0d.0 [8086/0000] bus ops

  831 09:43:44.522022  PCI: 00:0d.0 [8086/9a13] enabled

  832 09:43:44.522078  PCI: 00:14.0 [8086/0000] bus ops

  833 09:43:44.525959  PCI: 00:14.0 [8086/a0ed] enabled

  834 09:43:44.526038  PCI: 00:14.2 [8086/a0ef] enabled

  835 09:43:44.530624  PCI: 00:14.3 [8086/0000] bus ops

  836 09:43:44.561673  PCI: 00:14.3 [8086/a0f0] enabled

  837 09:43:44.561800  PCI: 00:15.0 [8086/0000] bus ops

  838 09:43:44.562054  PCI: 00:15.0 [8086/a0e8] enabled

  839 09:43:44.562129  PCI: 00:15.1 [8086/0000] bus ops

  840 09:43:44.562185  PCI: 00:15.1 [8086/a0e9] enabled

  841 09:43:44.562239  PCI: 00:15.2 [8086/0000] bus ops

  842 09:43:44.562290  PCI: 00:15.2 [8086/a0ea] enabled

  843 09:43:44.562341  PCI: 00:15.3 [8086/0000] bus ops

  844 09:43:44.562401  PCI: 00:15.3 [8086/a0eb] enabled

  845 09:43:44.562454  PCI: 00:16.0 [8086/0000] ops

  846 09:43:44.572723  PCI: 00:16.0 [8086/a0e0] enabled

  847 09:43:44.576143  PCI: Static device PCI: 00:17.0 not found, disabling it.

  848 09:43:44.576228  PCI: 00:19.0 [8086/0000] bus ops

  849 09:43:44.579324  PCI: 00:19.0 [8086/a0c5] disabled

  850 09:43:44.582609  PCI: 00:19.1 [8086/0000] bus ops

  851 09:43:44.585884  PCI: 00:19.1 [8086/a0c6] enabled

  852 09:43:44.588942  PCI: 00:1d.0 [8086/0000] bus ops

  853 09:43:44.591888  PCI: 00:1d.0 [8086/a0b0] enabled

  854 09:43:44.595619  PCI: 00:1e.0 [8086/0000] ops

  855 09:43:44.598853  PCI: 00:1e.0 [8086/a0a8] enabled

  856 09:43:44.602043  PCI: 00:1e.2 [8086/0000] bus ops

  857 09:43:44.605299  PCI: 00:1e.2 [8086/a0aa] enabled

  858 09:43:44.608665  PCI: 00:1e.3 [8086/0000] bus ops

  859 09:43:44.611746  PCI: 00:1e.3 [8086/a0ab] enabled

  860 09:43:44.615345  PCI: 00:1f.0 [8086/0000] bus ops

  861 09:43:44.618362  PCI: 00:1f.0 [8086/a087] enabled

  862 09:43:44.618457  RTC Init

  863 09:43:44.622032  Set power on after power failure.

  864 09:43:44.625292  Disabling Deep S3

  865 09:43:44.628493  Disabling Deep S3

  866 09:43:44.628559  Disabling Deep S4

  867 09:43:44.631583  Disabling Deep S4

  868 09:43:44.631647  Disabling Deep S5

  869 09:43:44.634768  Disabling Deep S5

  870 09:43:44.638046  PCI: 00:1f.2 [0000/0000] hidden

  871 09:43:44.641265  PCI: 00:1f.3 [8086/0000] bus ops

  872 09:43:44.644597  PCI: 00:1f.3 [8086/a0c8] enabled

  873 09:43:44.648527  PCI: 00:1f.5 [8086/0000] bus ops

  874 09:43:44.651456  PCI: 00:1f.5 [8086/a0a4] enabled

  875 09:43:44.654675  PCI: Leftover static devices:

  876 09:43:44.654739  PCI: 00:10.2

  877 09:43:44.657950  PCI: 00:10.6

  878 09:43:44.658044  PCI: 00:10.7

  879 09:43:44.658126  PCI: 00:06.0

  880 09:43:44.661083  PCI: 00:07.1

  881 09:43:44.661144  PCI: 00:07.2

  882 09:43:44.664497  PCI: 00:07.3

  883 09:43:44.664557  PCI: 00:09.0

  884 09:43:44.667531  PCI: 00:0d.1

  885 09:43:44.667589  PCI: 00:0d.2

  886 09:43:44.667640  PCI: 00:0d.3

  887 09:43:44.671323  PCI: 00:0e.0

  888 09:43:44.671405  PCI: 00:12.0

  889 09:43:44.674750  PCI: 00:12.6

  890 09:43:44.674833  PCI: 00:13.0

  891 09:43:44.674918  PCI: 00:14.1

  892 09:43:44.677919  PCI: 00:16.1

  893 09:43:44.677981  PCI: 00:16.2

  894 09:43:44.681114  PCI: 00:16.3

  895 09:43:44.681171  PCI: 00:16.4

  896 09:43:44.684457  PCI: 00:16.5

  897 09:43:44.684513  PCI: 00:17.0

  898 09:43:44.684563  PCI: 00:19.2

  899 09:43:44.687741  PCI: 00:1e.1

  900 09:43:44.687816  PCI: 00:1f.1

  901 09:43:44.691090  PCI: 00:1f.4

  902 09:43:44.691188  PCI: 00:1f.6

  903 09:43:44.691272  PCI: 00:1f.7

  904 09:43:44.694287  PCI: Check your devicetree.cb.

  905 09:43:44.697399  PCI: 00:02.0 scanning...

  906 09:43:44.700922  scan_generic_bus for PCI: 00:02.0

  907 09:43:44.704180  scan_generic_bus for PCI: 00:02.0 done

  908 09:43:44.710368  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

  909 09:43:44.713697  PCI: 00:04.0 scanning...

  910 09:43:44.716969  scan_generic_bus for PCI: 00:04.0

  911 09:43:44.717040  GENERIC: 0.0 enabled

  912 09:43:44.723956  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

  913 09:43:44.730228  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

  914 09:43:44.733423  PCI: 00:0d.0 scanning...

  915 09:43:44.736655  scan_static_bus for PCI: 00:0d.0

  916 09:43:44.736724  USB0 port 0 enabled

  917 09:43:44.740422  USB0 port 0 scanning...

  918 09:43:44.743792  scan_static_bus for USB0 port 0

  919 09:43:44.746728  USB3 port 0 enabled

  920 09:43:44.746795  USB3 port 1 enabled

  921 09:43:44.749947  USB3 port 2 disabled

  922 09:43:44.753270  USB3 port 3 disabled

  923 09:43:44.753360  USB3 port 0 scanning...

  924 09:43:44.756404  scan_static_bus for USB3 port 0

  925 09:43:44.759788  scan_static_bus for USB3 port 0 done

  926 09:43:44.766306  scan_bus: bus USB3 port 0 finished in 6 msecs

  927 09:43:44.770073  USB3 port 1 scanning...

  928 09:43:44.773211  scan_static_bus for USB3 port 1

  929 09:43:44.776386  scan_static_bus for USB3 port 1 done

  930 09:43:44.779673  scan_bus: bus USB3 port 1 finished in 6 msecs

  931 09:43:44.782970  scan_static_bus for USB0 port 0 done

  932 09:43:44.789576  scan_bus: bus USB0 port 0 finished in 43 msecs

  933 09:43:44.792937  scan_static_bus for PCI: 00:0d.0 done

  934 09:43:44.796237  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs

  935 09:43:44.799622  PCI: 00:14.0 scanning...

  936 09:43:44.802747  scan_static_bus for PCI: 00:14.0

  937 09:43:44.805832  USB0 port 0 enabled

  938 09:43:44.808976  USB0 port 0 scanning...

  939 09:43:44.812561  scan_static_bus for USB0 port 0

  940 09:43:44.812636  USB2 port 0 disabled

  941 09:43:44.815746  USB2 port 1 enabled

  942 09:43:44.819154  USB2 port 2 enabled

  943 09:43:44.819229  USB2 port 3 disabled

  944 09:43:44.822393  USB2 port 4 enabled

  945 09:43:44.822468  USB2 port 5 disabled

  946 09:43:44.825605  USB2 port 6 disabled

  947 09:43:44.828859  USB2 port 7 disabled

  948 09:43:44.828935  USB2 port 8 disabled

  949 09:43:44.832708  USB2 port 9 disabled

  950 09:43:44.835824  USB3 port 0 disabled

  951 09:43:44.835946  USB3 port 1 enabled

  952 09:43:44.838790  USB3 port 2 disabled

  953 09:43:44.842478  USB3 port 3 disabled

  954 09:43:44.842554  USB2 port 1 scanning...

  955 09:43:44.845530  scan_static_bus for USB2 port 1

  956 09:43:44.852205  scan_static_bus for USB2 port 1 done

  957 09:43:44.855778  scan_bus: bus USB2 port 1 finished in 6 msecs

  958 09:43:44.859029  USB2 port 2 scanning...

  959 09:43:44.862057  scan_static_bus for USB2 port 2

  960 09:43:44.865384  scan_static_bus for USB2 port 2 done

  961 09:43:44.868617  scan_bus: bus USB2 port 2 finished in 6 msecs

  962 09:43:44.872009  USB2 port 4 scanning...

  963 09:43:44.875114  scan_static_bus for USB2 port 4

  964 09:43:44.878414  scan_static_bus for USB2 port 4 done

  965 09:43:44.885342  scan_bus: bus USB2 port 4 finished in 6 msecs

  966 09:43:44.885425  USB3 port 1 scanning...

  967 09:43:44.888637  scan_static_bus for USB3 port 1

  968 09:43:44.891891  scan_static_bus for USB3 port 1 done

  969 09:43:44.898537  scan_bus: bus USB3 port 1 finished in 6 msecs

  970 09:43:44.901733  scan_static_bus for USB0 port 0 done

  971 09:43:44.905037  scan_bus: bus USB0 port 0 finished in 93 msecs

  972 09:43:44.911388  scan_static_bus for PCI: 00:14.0 done

  973 09:43:44.914565  scan_bus: bus PCI: 00:14.0 finished in 110 msecs

  974 09:43:44.917741  PCI: 00:14.3 scanning...

  975 09:43:44.921548  scan_static_bus for PCI: 00:14.3

  976 09:43:44.924605  GENERIC: 0.0 enabled

  977 09:43:44.927779  scan_static_bus for PCI: 00:14.3 done

  978 09:43:44.930950  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

  979 09:43:44.934141  PCI: 00:15.0 scanning...

  980 09:43:44.937435  scan_static_bus for PCI: 00:15.0

  981 09:43:44.940777  I2C: 00:1a enabled

  982 09:43:44.940854  I2C: 00:31 enabled

  983 09:43:44.943941  I2C: 00:32 enabled

  984 09:43:44.947703  scan_static_bus for PCI: 00:15.0 done

  985 09:43:44.950905  scan_bus: bus PCI: 00:15.0 finished in 12 msecs

  986 09:43:44.954197  PCI: 00:15.1 scanning...

  987 09:43:44.957513  scan_static_bus for PCI: 00:15.1

  988 09:43:44.960636  I2C: 00:10 enabled

  989 09:43:44.964156  scan_static_bus for PCI: 00:15.1 done

  990 09:43:44.967350  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

  991 09:43:44.970450  PCI: 00:15.2 scanning...

  992 09:43:44.973977  scan_static_bus for PCI: 00:15.2

  993 09:43:44.977034  scan_static_bus for PCI: 00:15.2 done

  994 09:43:44.983978  scan_bus: bus PCI: 00:15.2 finished in 7 msecs

  995 09:43:44.987259  PCI: 00:15.3 scanning...

  996 09:43:44.990340  scan_static_bus for PCI: 00:15.3

  997 09:43:44.993497  scan_static_bus for PCI: 00:15.3 done

  998 09:43:44.996798  scan_bus: bus PCI: 00:15.3 finished in 7 msecs

  999 09:43:45.000116  PCI: 00:19.1 scanning...

 1000 09:43:45.003263  scan_static_bus for PCI: 00:19.1

 1001 09:43:45.006666  I2C: 00:15 enabled

 1002 09:43:45.010047  scan_static_bus for PCI: 00:19.1 done

 1003 09:43:45.013164  scan_bus: bus PCI: 00:19.1 finished in 9 msecs

 1004 09:43:45.016860  PCI: 00:1d.0 scanning...

 1005 09:43:45.019546  do_pci_scan_bridge for PCI: 00:1d.0

 1006 09:43:45.022837  PCI: pci_scan_bus for bus 01

 1007 09:43:45.026572  PCI: 01:00.0 [1c5c/174a] enabled

 1008 09:43:45.029562  GENERIC: 0.0 enabled

 1009 09:43:45.033235  Enabling Common Clock Configuration

 1010 09:43:45.036388  L1 Sub-State supported from root port 29

 1011 09:43:45.039656  L1 Sub-State Support = 0xf

 1012 09:43:45.042981  CommonModeRestoreTime = 0x28

 1013 09:43:45.046273  Power On Value = 0x16, Power On Scale = 0x0

 1014 09:43:45.049639  ASPM: Enabled L1

 1015 09:43:45.052773  PCIe: Max_Payload_Size adjusted to 128

 1016 09:43:45.059687  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs

 1017 09:43:45.059768  PCI: 00:1e.2 scanning...

 1018 09:43:45.062964  scan_generic_bus for PCI: 00:1e.2

 1019 09:43:45.066249  SPI: 00 enabled

 1020 09:43:45.072418  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done

 1021 09:43:45.075812  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

 1022 09:43:45.079338  PCI: 00:1e.3 scanning...

 1023 09:43:45.082551  scan_generic_bus for PCI: 00:1e.3

 1024 09:43:45.085473  SPI: 00 enabled

 1025 09:43:45.092440  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1026 09:43:45.095839  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1027 09:43:45.098591  PCI: 00:1f.0 scanning...

 1028 09:43:45.101891  scan_static_bus for PCI: 00:1f.0

 1029 09:43:45.101982  PNP: 0c09.0 enabled

 1030 09:43:45.105167  PNP: 0c09.0 scanning...

 1031 09:43:45.108491  scan_static_bus for PNP: 0c09.0

 1032 09:43:45.111776  scan_static_bus for PNP: 0c09.0 done

 1033 09:43:45.118815  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1034 09:43:45.122052  scan_static_bus for PCI: 00:1f.0 done

 1035 09:43:45.125345  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1036 09:43:45.128554  PCI: 00:1f.2 scanning...

 1037 09:43:45.131894  scan_static_bus for PCI: 00:1f.2

 1038 09:43:45.135081  GENERIC: 0.0 enabled

 1039 09:43:45.138051  GENERIC: 0.0 scanning...

 1040 09:43:45.141742  scan_static_bus for GENERIC: 0.0

 1041 09:43:45.141848  GENERIC: 0.0 enabled

 1042 09:43:45.144926  GENERIC: 1.0 enabled

 1043 09:43:45.148315  scan_static_bus for GENERIC: 0.0 done

 1044 09:43:45.154911  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1045 09:43:45.158177  scan_static_bus for PCI: 00:1f.2 done

 1046 09:43:45.161220  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1047 09:43:45.164294  PCI: 00:1f.3 scanning...

 1048 09:43:45.167546  scan_static_bus for PCI: 00:1f.3

 1049 09:43:45.171330  scan_static_bus for PCI: 00:1f.3 done

 1050 09:43:45.177818  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1051 09:43:45.181191  PCI: 00:1f.5 scanning...

 1052 09:43:45.184246  scan_generic_bus for PCI: 00:1f.5

 1053 09:43:45.187646  scan_generic_bus for PCI: 00:1f.5 done

 1054 09:43:45.190708  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1055 09:43:45.197815  scan_bus: bus DOMAIN: 0000 finished in 717 msecs

 1056 09:43:45.201022  scan_static_bus for Root Device done

 1057 09:43:45.204059  scan_bus: bus Root Device finished in 737 msecs

 1058 09:43:45.207015  done

 1059 09:43:45.210586  BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms

 1060 09:43:45.214914  Chrome EC: UHEPI supported

 1061 09:43:45.221377  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)

 1062 09:43:45.227759  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1063 09:43:45.231021  SPI flash protection: WPSW=0 SRP0=0

 1064 09:43:45.237508  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1065 09:43:45.240890  BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms

 1066 09:43:45.244075  found VGA at PCI: 00:02.0

 1067 09:43:45.247183  Setting up VGA for PCI: 00:02.0

 1068 09:43:45.253873  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1069 09:43:45.257182  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1070 09:43:45.260542  Allocating resources...

 1071 09:43:45.263821  Reading resources...

 1072 09:43:45.266979  Root Device read_resources bus 0 link: 0

 1073 09:43:45.270157  DOMAIN: 0000 read_resources bus 0 link: 0

 1074 09:43:45.277376  PCI: 00:04.0 read_resources bus 1 link: 0

 1075 09:43:45.280492  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1076 09:43:45.287345  PCI: 00:0d.0 read_resources bus 0 link: 0

 1077 09:43:45.290716  USB0 port 0 read_resources bus 0 link: 0

 1078 09:43:45.297347  USB0 port 0 read_resources bus 0 link: 0 done

 1079 09:43:45.300506  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1080 09:43:45.307315  PCI: 00:14.0 read_resources bus 0 link: 0

 1081 09:43:45.310405  USB0 port 0 read_resources bus 0 link: 0

 1082 09:43:45.317240  USB0 port 0 read_resources bus 0 link: 0 done

 1083 09:43:45.320338  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1084 09:43:45.327102  PCI: 00:14.3 read_resources bus 0 link: 0

 1085 09:43:45.330392  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1086 09:43:45.336247  PCI: 00:15.0 read_resources bus 0 link: 0

 1087 09:43:45.340319  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1088 09:43:45.346260  PCI: 00:15.1 read_resources bus 0 link: 0

 1089 09:43:45.350033  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1090 09:43:45.356755  PCI: 00:19.1 read_resources bus 0 link: 0

 1091 09:43:45.359884  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1092 09:43:45.367017  PCI: 00:1d.0 read_resources bus 1 link: 0

 1093 09:43:45.370374  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1094 09:43:45.376767  PCI: 00:1e.2 read_resources bus 2 link: 0

 1095 09:43:45.379818  PCI: 00:1e.2 read_resources bus 2 link: 0 done

 1096 09:43:45.386975  PCI: 00:1e.3 read_resources bus 3 link: 0

 1097 09:43:45.390101  PCI: 00:1e.3 read_resources bus 3 link: 0 done

 1098 09:43:45.396455  PCI: 00:1f.0 read_resources bus 0 link: 0

 1099 09:43:45.399651  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1100 09:43:45.406228  PCI: 00:1f.2 read_resources bus 0 link: 0

 1101 09:43:45.409456  GENERIC: 0.0 read_resources bus 0 link: 0

 1102 09:43:45.416158  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1103 09:43:45.419316  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1104 09:43:45.426312  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1105 09:43:45.429617  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1106 09:43:45.436174  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1107 09:43:45.439558  Root Device read_resources bus 0 link: 0 done

 1108 09:43:45.442769  Done reading resources.

 1109 09:43:45.449386  Show resources in subtree (Root Device)...After reading.

 1110 09:43:45.452620   Root Device child on link 0 DOMAIN: 0000

 1111 09:43:45.456016    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1112 09:43:45.465963    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1113 09:43:45.475524    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1114 09:43:45.478894     PCI: 00:00.0

 1115 09:43:45.489058     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1116 09:43:45.495616     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1117 09:43:45.505281     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1118 09:43:45.515008     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1119 09:43:45.525268     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1120 09:43:45.534658     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1121 09:43:45.544540     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1122 09:43:45.551379     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1123 09:43:45.560949     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1124 09:43:45.571272     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1125 09:43:45.580894     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1126 09:43:45.591213     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1127 09:43:45.601018     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1128 09:43:45.607390     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1129 09:43:45.617767     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1130 09:43:45.627590     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1131 09:43:45.637444     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1132 09:43:45.647147     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1133 09:43:45.657232     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1134 09:43:45.666779     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1135 09:43:45.666880     PCI: 00:02.0

 1136 09:43:45.676816     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1137 09:43:45.686822     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1138 09:43:45.696326     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1139 09:43:45.699519     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1140 09:43:45.709443     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1141 09:43:45.713014      GENERIC: 0.0

 1142 09:43:45.713106     PCI: 00:05.0

 1143 09:43:45.726306     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1144 09:43:45.729691     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1145 09:43:45.729782      GENERIC: 0.0

 1146 09:43:45.733038     PCI: 00:08.0

 1147 09:43:45.742827     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1148 09:43:45.742905     PCI: 00:0a.0

 1149 09:43:45.749100     PCI: 00:0d.0 child on link 0 USB0 port 0

 1150 09:43:45.758836     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1151 09:43:45.762252      USB0 port 0 child on link 0 USB3 port 0

 1152 09:43:45.765651       USB3 port 0

 1153 09:43:45.765723       USB3 port 1

 1154 09:43:45.768942       USB3 port 2

 1155 09:43:45.769011       USB3 port 3

 1156 09:43:45.775358     PCI: 00:14.0 child on link 0 USB0 port 0

 1157 09:43:45.785332     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1158 09:43:45.788456      USB0 port 0 child on link 0 USB2 port 0

 1159 09:43:45.792062       USB2 port 0

 1160 09:43:45.792131       USB2 port 1

 1161 09:43:45.795166       USB2 port 2

 1162 09:43:45.795233       USB2 port 3

 1163 09:43:45.798378       USB2 port 4

 1164 09:43:45.798441       USB2 port 5

 1165 09:43:45.801734       USB2 port 6

 1166 09:43:45.801808       USB2 port 7

 1167 09:43:45.805122       USB2 port 8

 1168 09:43:45.805186       USB2 port 9

 1169 09:43:45.808424       USB3 port 0

 1170 09:43:45.811488       USB3 port 1

 1171 09:43:45.811553       USB3 port 2

 1172 09:43:45.814649       USB3 port 3

 1173 09:43:45.814716     PCI: 00:14.2

 1174 09:43:45.824512     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1175 09:43:45.834450     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1176 09:43:45.841048     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1177 09:43:45.851461     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1178 09:43:45.851615      GENERIC: 0.0

 1179 09:43:45.854705     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1180 09:43:45.864255     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1181 09:43:45.867503      I2C: 00:1a

 1182 09:43:45.867634      I2C: 00:31

 1183 09:43:45.870931      I2C: 00:32

 1184 09:43:45.874249     PCI: 00:15.1 child on link 0 I2C: 00:10

 1185 09:43:45.884455     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1186 09:43:45.887339      I2C: 00:10

 1187 09:43:45.887460     PCI: 00:15.2

 1188 09:43:45.897086     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1189 09:43:45.900685     PCI: 00:15.3

 1190 09:43:45.910367     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1191 09:43:45.910444     PCI: 00:16.0

 1192 09:43:45.920600     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1193 09:43:45.923298     PCI: 00:19.0

 1194 09:43:45.927105     PCI: 00:19.1 child on link 0 I2C: 00:15

 1195 09:43:45.936895     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1196 09:43:45.940083      I2C: 00:15

 1197 09:43:45.943401     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1198 09:43:45.953178     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1199 09:43:45.963030     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1200 09:43:45.969901     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1201 09:43:45.973164      GENERIC: 0.0

 1202 09:43:45.973467      PCI: 01:00.0

 1203 09:43:45.983135      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1204 09:43:45.992931      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18

 1205 09:43:46.003135      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c

 1206 09:43:46.006369     PCI: 00:1e.0

 1207 09:43:46.016011     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1208 09:43:46.019264     PCI: 00:1e.2 child on link 0 SPI: 00

 1209 09:43:46.029582     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1210 09:43:46.032834      SPI: 00

 1211 09:43:46.035903     PCI: 00:1e.3 child on link 0 SPI: 00

 1212 09:43:46.045617     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1213 09:43:46.046014      SPI: 00

 1214 09:43:46.052320     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1215 09:43:46.058803     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1216 09:43:46.061977      PNP: 0c09.0

 1217 09:43:46.068446      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1218 09:43:46.075572     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1219 09:43:46.085208     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1220 09:43:46.091682     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1221 09:43:46.098700      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1222 09:43:46.099108       GENERIC: 0.0

 1223 09:43:46.101934       GENERIC: 1.0

 1224 09:43:46.102318     PCI: 00:1f.3

 1225 09:43:46.111618     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1226 09:43:46.121483     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1227 09:43:46.124714     PCI: 00:1f.5

 1228 09:43:46.134412     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1229 09:43:46.138308    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1230 09:43:46.138698     APIC: 00

 1231 09:43:46.141533     APIC: 01

 1232 09:43:46.141919     APIC: 03

 1233 09:43:46.144682     APIC: 06

 1234 09:43:46.145066     APIC: 05

 1235 09:43:46.145365     APIC: 04

 1236 09:43:46.147790     APIC: 02

 1237 09:43:46.148359     APIC: 07

 1238 09:43:46.157534  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1239 09:43:46.160835   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1240 09:43:46.167360   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1241 09:43:46.173737   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1242 09:43:46.176988    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1243 09:43:46.180871    PCI: 01:00.0 18 *  [0x4000 - 0x4fff] mem

 1244 09:43:46.187136    PCI: 01:00.0 1c *  [0x5000 - 0x5fff] mem

 1245 09:43:46.193844   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1246 09:43:46.200563   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1247 09:43:46.206763   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1248 09:43:46.216468  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1249 09:43:46.223783  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1250 09:43:46.229963   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1251 09:43:46.236881   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1252 09:43:46.243464   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1253 09:43:46.246667   DOMAIN: 0000: Resource ranges:

 1254 09:43:46.253149   * Base: 1000, Size: 800, Tag: 100

 1255 09:43:46.256387   * Base: 1900, Size: e700, Tag: 100

 1256 09:43:46.259770    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1257 09:43:46.266269  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1258 09:43:46.273106  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1259 09:43:46.282722   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)

 1260 09:43:46.289245   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)

 1261 09:43:46.296120   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 1262 09:43:46.305911   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 1263 09:43:46.312398   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)

 1264 09:43:46.318645   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 1265 09:43:46.328603   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)

 1266 09:43:46.335424   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)

 1267 09:43:46.342227   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)

 1268 09:43:46.351653   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)

 1269 09:43:46.358841   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)

 1270 09:43:46.365261   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)

 1271 09:43:46.374842   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)

 1272 09:43:46.381414   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)

 1273 09:43:46.388082   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)

 1274 09:43:46.397945   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)

 1275 09:43:46.404619   update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)

 1276 09:43:46.414546   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)

 1277 09:43:46.420619   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)

 1278 09:43:46.427871   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)

 1279 09:43:46.437735   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1280 09:43:46.444110   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1281 09:43:46.447196   DOMAIN: 0000: Resource ranges:

 1282 09:43:46.450313   * Base: 7fc00000, Size: 40400000, Tag: 200

 1283 09:43:46.457131   * Base: d0000000, Size: 28000000, Tag: 200

 1284 09:43:46.460282   * Base: fa000000, Size: 1000000, Tag: 200

 1285 09:43:46.463608   * Base: fb001000, Size: 2fff000, Tag: 200

 1286 09:43:46.466948   * Base: fe010000, Size: 2e000, Tag: 200

 1287 09:43:46.473503   * Base: fe03f000, Size: d41000, Tag: 200

 1288 09:43:46.476695   * Base: fed88000, Size: 8000, Tag: 200

 1289 09:43:46.479967   * Base: fed93000, Size: d000, Tag: 200

 1290 09:43:46.483337   * Base: feda2000, Size: 1e000, Tag: 200

 1291 09:43:46.489824   * Base: fede0000, Size: 1220000, Tag: 200

 1292 09:43:46.493773   * Base: 280400000, Size: 7d7fc00000, Tag: 100200

 1293 09:43:46.499669    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem

 1294 09:43:46.506231    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem

 1295 09:43:46.513182    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem

 1296 09:43:46.519859    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem

 1297 09:43:46.526649    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem

 1298 09:43:46.532734    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem

 1299 09:43:46.539296    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem

 1300 09:43:46.545808    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem

 1301 09:43:46.553014    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem

 1302 09:43:46.559336    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem

 1303 09:43:46.565804    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem

 1304 09:43:46.572630    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem

 1305 09:43:46.579133    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem

 1306 09:43:46.586021    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem

 1307 09:43:46.595325    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem

 1308 09:43:46.601867    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem

 1309 09:43:46.609069    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem

 1310 09:43:46.615732    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem

 1311 09:43:46.622070    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem

 1312 09:43:46.628567    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem

 1313 09:43:46.635365    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem

 1314 09:43:46.641852    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem

 1315 09:43:46.648404  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1316 09:43:46.654999  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff

 1317 09:43:46.658164   PCI: 00:1d.0: Resource ranges:

 1318 09:43:46.661236   * Base: 7fc00000, Size: 100000, Tag: 200

 1319 09:43:46.668372    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem

 1320 09:43:46.678063    PCI: 01:00.0 18 *  [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem

 1321 09:43:46.684502    PCI: 01:00.0 1c *  [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem

 1322 09:43:46.690798  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done

 1323 09:43:46.697649  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1324 09:43:46.704296  Root Device assign_resources, bus 0 link: 0

 1325 09:43:46.707666  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1326 09:43:46.717461  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64

 1327 09:43:46.724186  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64

 1328 09:43:46.733786  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1329 09:43:46.740565  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64

 1330 09:43:46.743490  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1331 09:43:46.750638  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1332 09:43:46.757013  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64

 1333 09:43:46.766721  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64

 1334 09:43:46.773173  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64

 1335 09:43:46.779881  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1336 09:43:46.783089  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1337 09:43:46.793268  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64

 1338 09:43:46.796514  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1339 09:43:46.799873  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1340 09:43:46.809794  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64

 1341 09:43:46.816523  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64

 1342 09:43:46.826344  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64

 1343 09:43:46.829604  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1344 09:43:46.836081  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1345 09:43:46.842324  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64

 1346 09:43:46.849468  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1347 09:43:46.852371  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1348 09:43:46.858700  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64

 1349 09:43:46.865693  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1350 09:43:46.869055  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1351 09:43:46.878997  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64

 1352 09:43:46.885259  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64

 1353 09:43:46.894876  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64

 1354 09:43:46.902211  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64

 1355 09:43:46.908494  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1356 09:43:46.912046  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1357 09:43:46.921218  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1358 09:43:46.931246  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1359 09:43:46.937716  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem

 1360 09:43:46.944400  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1361 09:43:46.951398  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64

 1362 09:43:46.960745  PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem

 1363 09:43:46.967384  PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem

 1364 09:43:46.971031  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1365 09:43:46.981236  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64

 1366 09:43:46.984564  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1367 09:43:46.990813  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1368 09:43:46.997253  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64

 1369 09:43:47.003701  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1370 09:43:47.006879  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1371 09:43:47.013818  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1372 09:43:47.017067  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1373 09:43:47.020345  LPC: Trying to open IO window from 800 size 1ff

 1374 09:43:47.030733  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64

 1375 09:43:47.037304  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64

 1376 09:43:47.047319  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem

 1377 09:43:47.050576  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1378 09:43:47.057036  Root Device assign_resources, bus 0 link: 0

 1379 09:43:47.057444  Done setting resources.

 1380 09:43:47.063707  Show resources in subtree (Root Device)...After assigning values.

 1381 09:43:47.070116   Root Device child on link 0 DOMAIN: 0000

 1382 09:43:47.073311    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1383 09:43:47.083387    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1384 09:43:47.093009    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1385 09:43:47.093419     PCI: 00:00.0

 1386 09:43:47.103132     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1387 09:43:47.112461     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1388 09:43:47.122270     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1389 09:43:47.132342     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1390 09:43:47.142300     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1391 09:43:47.152315     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1392 09:43:47.158793     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1393 09:43:47.168693     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1394 09:43:47.178667     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1395 09:43:47.188341     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1396 09:43:47.198175     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1397 09:43:47.207919     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1398 09:43:47.217807     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1399 09:43:47.224529     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1400 09:43:47.234436     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1401 09:43:47.244656     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1402 09:43:47.254471     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1403 09:43:47.264218     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1404 09:43:47.274212     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1405 09:43:47.283762     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1406 09:43:47.284154     PCI: 00:02.0

 1407 09:43:47.293386     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10

 1408 09:43:47.307082     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18

 1409 09:43:47.313666     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1410 09:43:47.320142     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1411 09:43:47.329923     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10

 1412 09:43:47.330484      GENERIC: 0.0

 1413 09:43:47.332950     PCI: 00:05.0

 1414 09:43:47.343058     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10

 1415 09:43:47.349766     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1416 09:43:47.350178      GENERIC: 0.0

 1417 09:43:47.353109     PCI: 00:08.0

 1418 09:43:47.362841     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10

 1419 09:43:47.363365     PCI: 00:0a.0

 1420 09:43:47.369634     PCI: 00:0d.0 child on link 0 USB0 port 0

 1421 09:43:47.379495     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10

 1422 09:43:47.382675      USB0 port 0 child on link 0 USB3 port 0

 1423 09:43:47.385905       USB3 port 0

 1424 09:43:47.386425       USB3 port 1

 1425 09:43:47.389257       USB3 port 2

 1426 09:43:47.389754       USB3 port 3

 1427 09:43:47.396531     PCI: 00:14.0 child on link 0 USB0 port 0

 1428 09:43:47.405439     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10

 1429 09:43:47.408595      USB0 port 0 child on link 0 USB2 port 0

 1430 09:43:47.412405       USB2 port 0

 1431 09:43:47.412860       USB2 port 1

 1432 09:43:47.415464       USB2 port 2

 1433 09:43:47.415971       USB2 port 3

 1434 09:43:47.418588       USB2 port 4

 1435 09:43:47.418985       USB2 port 5

 1436 09:43:47.421862       USB2 port 6

 1437 09:43:47.422467       USB2 port 7

 1438 09:43:47.425335       USB2 port 8

 1439 09:43:47.425726       USB2 port 9

 1440 09:43:47.428553       USB3 port 0

 1441 09:43:47.431671       USB3 port 1

 1442 09:43:47.432085       USB3 port 2

 1443 09:43:47.435269       USB3 port 3

 1444 09:43:47.435780     PCI: 00:14.2

 1445 09:43:47.444784     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10

 1446 09:43:47.455051     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18

 1447 09:43:47.461657     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1448 09:43:47.471506     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10

 1449 09:43:47.471913      GENERIC: 0.0

 1450 09:43:47.478081     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1451 09:43:47.487985     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10

 1452 09:43:47.488514      I2C: 00:1a

 1453 09:43:47.490958      I2C: 00:31

 1454 09:43:47.491337      I2C: 00:32

 1455 09:43:47.497648     PCI: 00:15.1 child on link 0 I2C: 00:10

 1456 09:43:47.507509     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10

 1457 09:43:47.508119      I2C: 00:10

 1458 09:43:47.510732     PCI: 00:15.2

 1459 09:43:47.520438     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10

 1460 09:43:47.520860     PCI: 00:15.3

 1461 09:43:47.533719     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10

 1462 09:43:47.533948     PCI: 00:16.0

 1463 09:43:47.543368     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10

 1464 09:43:47.546490     PCI: 00:19.0

 1465 09:43:47.550339     PCI: 00:19.1 child on link 0 I2C: 00:15

 1466 09:43:47.559905     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10

 1467 09:43:47.563565      I2C: 00:15

 1468 09:43:47.566807     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1469 09:43:47.576749     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1470 09:43:47.586632     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1471 09:43:47.596365     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20

 1472 09:43:47.599680      GENERIC: 0.0

 1473 09:43:47.599757      PCI: 01:00.0

 1474 09:43:47.612938      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10

 1475 09:43:47.622787      PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18

 1476 09:43:47.632734      PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c

 1477 09:43:47.632879     PCI: 00:1e.0

 1478 09:43:47.645876     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1479 09:43:47.648979     PCI: 00:1e.2 child on link 0 SPI: 00

 1480 09:43:47.659128     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10

 1481 09:43:47.662408      SPI: 00

 1482 09:43:47.666222     PCI: 00:1e.3 child on link 0 SPI: 00

 1483 09:43:47.675787     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10

 1484 09:43:47.676180      SPI: 00

 1485 09:43:47.682678     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1486 09:43:47.689366     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1487 09:43:47.692111      PNP: 0c09.0

 1488 09:43:47.698618      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1489 09:43:47.705319     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1490 09:43:47.715893     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1491 09:43:47.722325     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1492 09:43:47.728733      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1493 09:43:47.729123       GENERIC: 0.0

 1494 09:43:47.731961       GENERIC: 1.0

 1495 09:43:47.735277     PCI: 00:1f.3

 1496 09:43:47.745427     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10

 1497 09:43:47.755018     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20

 1498 09:43:47.755423     PCI: 00:1f.5

 1499 09:43:47.768093     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10

 1500 09:43:47.771364    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1501 09:43:47.771825     APIC: 00

 1502 09:43:47.774597     APIC: 01

 1503 09:43:47.775008     APIC: 03

 1504 09:43:47.775313     APIC: 06

 1505 09:43:47.778002     APIC: 05

 1506 09:43:47.778393     APIC: 04

 1507 09:43:47.781218     APIC: 02

 1508 09:43:47.781626     APIC: 07

 1509 09:43:47.784405  Done allocating resources.

 1510 09:43:47.791109  BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms

 1511 09:43:47.794209  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

 1512 09:43:47.800804  Configure GPIOs for I2S audio on UP4.

 1513 09:43:47.807533  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms

 1514 09:43:47.808043  Enabling resources...

 1515 09:43:47.814224  PCI: 00:00.0 subsystem <- 8086/9a12

 1516 09:43:47.814635  PCI: 00:00.0 cmd <- 06

 1517 09:43:47.817472  PCI: 00:02.0 subsystem <- 8086/9a40

 1518 09:43:47.820816  PCI: 00:02.0 cmd <- 03

 1519 09:43:47.824417  PCI: 00:04.0 subsystem <- 8086/9a03

 1520 09:43:47.827307  PCI: 00:04.0 cmd <- 02

 1521 09:43:47.831114  PCI: 00:05.0 subsystem <- 8086/9a19

 1522 09:43:47.834510  PCI: 00:05.0 cmd <- 02

 1523 09:43:47.837684  PCI: 00:08.0 subsystem <- 8086/9a11

 1524 09:43:47.840905  PCI: 00:08.0 cmd <- 06

 1525 09:43:47.844148  PCI: 00:0d.0 subsystem <- 8086/9a13

 1526 09:43:47.847298  PCI: 00:0d.0 cmd <- 02

 1527 09:43:47.850304  PCI: 00:14.0 subsystem <- 8086/a0ed

 1528 09:43:47.853601  PCI: 00:14.0 cmd <- 02

 1529 09:43:47.856767  PCI: 00:14.2 subsystem <- 8086/a0ef

 1530 09:43:47.860144  PCI: 00:14.2 cmd <- 02

 1531 09:43:47.863510  PCI: 00:14.3 subsystem <- 8086/a0f0

 1532 09:43:47.864005  PCI: 00:14.3 cmd <- 02

 1533 09:43:47.870011  PCI: 00:15.0 subsystem <- 8086/a0e8

 1534 09:43:47.870402  PCI: 00:15.0 cmd <- 02

 1535 09:43:47.873259  PCI: 00:15.1 subsystem <- 8086/a0e9

 1536 09:43:47.876564  PCI: 00:15.1 cmd <- 02

 1537 09:43:47.879891  PCI: 00:15.2 subsystem <- 8086/a0ea

 1538 09:43:47.883213  PCI: 00:15.2 cmd <- 02

 1539 09:43:47.886544  PCI: 00:15.3 subsystem <- 8086/a0eb

 1540 09:43:47.889907  PCI: 00:15.3 cmd <- 02

 1541 09:43:47.893061  PCI: 00:16.0 subsystem <- 8086/a0e0

 1542 09:43:47.896235  PCI: 00:16.0 cmd <- 02

 1543 09:43:47.899519  PCI: 00:19.1 subsystem <- 8086/a0c6

 1544 09:43:47.902653  PCI: 00:19.1 cmd <- 02

 1545 09:43:47.906406  PCI: 00:1d.0 bridge ctrl <- 0013

 1546 09:43:47.909561  PCI: 00:1d.0 subsystem <- 8086/a0b0

 1547 09:43:47.912798  PCI: 00:1d.0 cmd <- 06

 1548 09:43:47.915760  PCI: 00:1e.0 subsystem <- 8086/a0a8

 1549 09:43:47.919369  PCI: 00:1e.0 cmd <- 06

 1550 09:43:47.922695  PCI: 00:1e.2 subsystem <- 8086/a0aa

 1551 09:43:47.925995  PCI: 00:1e.2 cmd <- 06

 1552 09:43:47.928870  PCI: 00:1e.3 subsystem <- 8086/a0ab

 1553 09:43:47.929388  PCI: 00:1e.3 cmd <- 02

 1554 09:43:47.935901  PCI: 00:1f.0 subsystem <- 8086/a087

 1555 09:43:47.936290  PCI: 00:1f.0 cmd <- 407

 1556 09:43:47.942406  PCI: 00:1f.3 subsystem <- 8086/a0c8

 1557 09:43:47.942823  PCI: 00:1f.3 cmd <- 02

 1558 09:43:47.945831  PCI: 00:1f.5 subsystem <- 8086/a0a4

 1559 09:43:47.949079  PCI: 00:1f.5 cmd <- 406

 1560 09:43:47.953440  PCI: 01:00.0 cmd <- 02

 1561 09:43:47.957761  done.

 1562 09:43:47.961437  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms

 1563 09:43:47.964656  Initializing devices...

 1564 09:43:47.967845  Root Device init

 1565 09:43:47.971130  Chrome EC: Set SMI mask to 0x0000000000000000

 1566 09:43:47.978462  Chrome EC: clear events_b mask to 0x0000000000000000

 1567 09:43:47.984938  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1568 09:43:47.991717  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e

 1569 09:43:47.998016  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e

 1570 09:43:48.004638  Chrome EC: Set WAKE mask to 0x0000000000000000

 1571 09:43:48.007897  fw_config match found: DB_USB=USB3_ACTIVE

 1572 09:43:48.014302  Configure Right Type-C port orientation for retimer

 1573 09:43:48.017575  Root Device init finished in 47 msecs

 1574 09:43:48.021409  PCI: 00:00.0 init

 1575 09:43:48.024622  CPU TDP = 9 Watts

 1576 09:43:48.025020  CPU PL1 = 9 Watts

 1577 09:43:48.027877  CPU PL2 = 40 Watts

 1578 09:43:48.030924  CPU PL4 = 83 Watts

 1579 09:43:48.034354  PCI: 00:00.0 init finished in 8 msecs

 1580 09:43:48.034747  PCI: 00:02.0 init

 1581 09:43:48.037432  GMA: Found VBT in CBFS

 1582 09:43:48.040809  GMA: Found valid VBT in CBFS

 1583 09:43:48.047231  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1584 09:43:48.053919                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000

 1585 09:43:48.057288  PCI: 00:02.0 init finished in 18 msecs

 1586 09:43:48.059970  PCI: 00:05.0 init

 1587 09:43:48.063825  PCI: 00:05.0 init finished in 0 msecs

 1588 09:43:48.066921  PCI: 00:08.0 init

 1589 09:43:48.069899  PCI: 00:08.0 init finished in 0 msecs

 1590 09:43:48.073355  PCI: 00:14.0 init

 1591 09:43:48.076405  PCI: 00:14.0 init finished in 0 msecs

 1592 09:43:48.079757  PCI: 00:14.2 init

 1593 09:43:48.082992  PCI: 00:14.2 init finished in 0 msecs

 1594 09:43:48.086305  PCI: 00:15.0 init

 1595 09:43:48.089614  I2C bus 0 version 0x3230302a

 1596 09:43:48.092961  DW I2C bus 0 at 0x7fe4e000 (400 KHz)

 1597 09:43:48.096381  PCI: 00:15.0 init finished in 6 msecs

 1598 09:43:48.099683  PCI: 00:15.1 init

 1599 09:43:48.100067  I2C bus 1 version 0x3230302a

 1600 09:43:48.106025  DW I2C bus 1 at 0x7fe4f000 (400 KHz)

 1601 09:43:48.109351  PCI: 00:15.1 init finished in 6 msecs

 1602 09:43:48.109737  PCI: 00:15.2 init

 1603 09:43:48.112559  I2C bus 2 version 0x3230302a

 1604 09:43:48.119064  DW I2C bus 2 at 0x7fe50000 (400 KHz)

 1605 09:43:48.122175  PCI: 00:15.2 init finished in 6 msecs

 1606 09:43:48.122593  PCI: 00:15.3 init

 1607 09:43:48.125489  I2C bus 3 version 0x3230302a

 1608 09:43:48.128691  DW I2C bus 3 at 0x7fe51000 (400 KHz)

 1609 09:43:48.135266  PCI: 00:15.3 init finished in 6 msecs

 1610 09:43:48.135692  PCI: 00:16.0 init

 1611 09:43:48.138420  PCI: 00:16.0 init finished in 0 msecs

 1612 09:43:48.142324  PCI: 00:19.1 init

 1613 09:43:48.145661  I2C bus 5 version 0x3230302a

 1614 09:43:48.148659  DW I2C bus 5 at 0x7fe53000 (400 KHz)

 1615 09:43:48.152110  PCI: 00:19.1 init finished in 6 msecs

 1616 09:43:48.155394  PCI: 00:1d.0 init

 1617 09:43:48.158765  Initializing PCH PCIe bridge.

 1618 09:43:48.162010  PCI: 00:1d.0 init finished in 3 msecs

 1619 09:43:48.165293  PCI: 00:1f.0 init

 1620 09:43:48.168680  IOAPIC: Initializing IOAPIC at 0xfec00000

 1621 09:43:48.174584  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1622 09:43:48.174979  IOAPIC: ID = 0x02

 1623 09:43:48.177879  IOAPIC: Dumping registers

 1624 09:43:48.181588    reg 0x0000: 0x02000000

 1625 09:43:48.184685    reg 0x0001: 0x00770020

 1626 09:43:48.185071    reg 0x0002: 0x00000000

 1627 09:43:48.191083  PCI: 00:1f.0 init finished in 21 msecs

 1628 09:43:48.191501  PCI: 00:1f.2 init

 1629 09:43:48.194390  Disabling ACPI via APMC.

 1630 09:43:48.197791  APMC done.

 1631 09:43:48.200878  PCI: 00:1f.2 init finished in 5 msecs

 1632 09:43:48.213272  PCI: 01:00.0 init

 1633 09:43:48.216523  PCI: 01:00.0 init finished in 0 msecs

 1634 09:43:48.219745  PNP: 0c09.0 init

 1635 09:43:48.223054  Google Chrome EC uptime: 10.205 seconds

 1636 09:43:48.229560  Google Chrome AP resets since EC boot: 0

 1637 09:43:48.232761  Google Chrome most recent AP reset causes:

 1638 09:43:48.239254  Google Chrome EC reset flags at last EC boot: reset-pin | hard

 1639 09:43:48.242740  PNP: 0c09.0 init finished in 19 msecs

 1640 09:43:48.248354  Devices initialized

 1641 09:43:48.251406  Show all devs... After init.

 1642 09:43:48.254722  Root Device: enabled 1

 1643 09:43:48.255108  DOMAIN: 0000: enabled 1

 1644 09:43:48.258040  CPU_CLUSTER: 0: enabled 1

 1645 09:43:48.261375  PCI: 00:00.0: enabled 1

 1646 09:43:48.264736  PCI: 00:02.0: enabled 1

 1647 09:43:48.267940  PCI: 00:04.0: enabled 1

 1648 09:43:48.268333  PCI: 00:05.0: enabled 1

 1649 09:43:48.271238  PCI: 00:06.0: enabled 0

 1650 09:43:48.274607  PCI: 00:07.0: enabled 0

 1651 09:43:48.278022  PCI: 00:07.1: enabled 0

 1652 09:43:48.278414  PCI: 00:07.2: enabled 0

 1653 09:43:48.280733  PCI: 00:07.3: enabled 0

 1654 09:43:48.284026  PCI: 00:08.0: enabled 1

 1655 09:43:48.287318  PCI: 00:09.0: enabled 0

 1656 09:43:48.287743  PCI: 00:0a.0: enabled 0

 1657 09:43:48.290705  PCI: 00:0d.0: enabled 1

 1658 09:43:48.293737  PCI: 00:0d.1: enabled 0

 1659 09:43:48.297420  PCI: 00:0d.2: enabled 0

 1660 09:43:48.297842  PCI: 00:0d.3: enabled 0

 1661 09:43:48.300316  PCI: 00:0e.0: enabled 0

 1662 09:43:48.303824  PCI: 00:10.2: enabled 1

 1663 09:43:48.304214  PCI: 00:10.6: enabled 0

 1664 09:43:48.307171  PCI: 00:10.7: enabled 0

 1665 09:43:48.310477  PCI: 00:12.0: enabled 0

 1666 09:43:48.313591  PCI: 00:12.6: enabled 0

 1667 09:43:48.313975  PCI: 00:13.0: enabled 0

 1668 09:43:48.316906  PCI: 00:14.0: enabled 1

 1669 09:43:48.320240  PCI: 00:14.1: enabled 0

 1670 09:43:48.323381  PCI: 00:14.2: enabled 1

 1671 09:43:48.323944  PCI: 00:14.3: enabled 1

 1672 09:43:48.326521  PCI: 00:15.0: enabled 1

 1673 09:43:48.329802  PCI: 00:15.1: enabled 1

 1674 09:43:48.332961  PCI: 00:15.2: enabled 1

 1675 09:43:48.333482  PCI: 00:15.3: enabled 1

 1676 09:43:48.336262  PCI: 00:16.0: enabled 1

 1677 09:43:48.339901  PCI: 00:16.1: enabled 0

 1678 09:43:48.343191  PCI: 00:16.2: enabled 0

 1679 09:43:48.343707  PCI: 00:16.3: enabled 0

 1680 09:43:48.346435  PCI: 00:16.4: enabled 0

 1681 09:43:48.349656  PCI: 00:16.5: enabled 0

 1682 09:43:48.352893  PCI: 00:17.0: enabled 0

 1683 09:43:48.353380  PCI: 00:19.0: enabled 0

 1684 09:43:48.355976  PCI: 00:19.1: enabled 1

 1685 09:43:48.359377  PCI: 00:19.2: enabled 0

 1686 09:43:48.362640  PCI: 00:1c.0: enabled 1

 1687 09:43:48.363059  PCI: 00:1c.1: enabled 0

 1688 09:43:48.365920  PCI: 00:1c.2: enabled 0

 1689 09:43:48.369338  PCI: 00:1c.3: enabled 0

 1690 09:43:48.372688  PCI: 00:1c.4: enabled 0

 1691 09:43:48.373070  PCI: 00:1c.5: enabled 0

 1692 09:43:48.375924  PCI: 00:1c.6: enabled 1

 1693 09:43:48.379246  PCI: 00:1c.7: enabled 0

 1694 09:43:48.381929  PCI: 00:1d.0: enabled 1

 1695 09:43:48.382308  PCI: 00:1d.1: enabled 0

 1696 09:43:48.385344  PCI: 00:1d.2: enabled 1

 1697 09:43:48.388723  PCI: 00:1d.3: enabled 0

 1698 09:43:48.391882  PCI: 00:1e.0: enabled 1

 1699 09:43:48.392266  PCI: 00:1e.1: enabled 0

 1700 09:43:48.395044  PCI: 00:1e.2: enabled 1

 1701 09:43:48.398358  PCI: 00:1e.3: enabled 1

 1702 09:43:48.401673  PCI: 00:1f.0: enabled 1

 1703 09:43:48.402097  PCI: 00:1f.1: enabled 0

 1704 09:43:48.404947  PCI: 00:1f.2: enabled 1

 1705 09:43:48.407955  PCI: 00:1f.3: enabled 1

 1706 09:43:48.411725  PCI: 00:1f.4: enabled 0

 1707 09:43:48.412144  PCI: 00:1f.5: enabled 1

 1708 09:43:48.414854  PCI: 00:1f.6: enabled 0

 1709 09:43:48.418402  PCI: 00:1f.7: enabled 0

 1710 09:43:48.418832  APIC: 00: enabled 1

 1711 09:43:48.421304  GENERIC: 0.0: enabled 1

 1712 09:43:48.425110  GENERIC: 0.0: enabled 1

 1713 09:43:48.427624  GENERIC: 1.0: enabled 1

 1714 09:43:48.428049  GENERIC: 0.0: enabled 1

 1715 09:43:48.430909  GENERIC: 1.0: enabled 1

 1716 09:43:48.434641  USB0 port 0: enabled 1

 1717 09:43:48.437836  GENERIC: 0.0: enabled 1

 1718 09:43:48.438257  USB0 port 0: enabled 1

 1719 09:43:48.440951  GENERIC: 0.0: enabled 1

 1720 09:43:48.444168  I2C: 00:1a: enabled 1

 1721 09:43:48.447489  I2C: 00:31: enabled 1

 1722 09:43:48.447930  I2C: 00:32: enabled 1

 1723 09:43:48.450504  I2C: 00:10: enabled 1

 1724 09:43:48.453853  I2C: 00:15: enabled 1

 1725 09:43:48.454239  GENERIC: 0.0: enabled 0

 1726 09:43:48.457586  GENERIC: 1.0: enabled 0

 1727 09:43:48.460813  GENERIC: 0.0: enabled 1

 1728 09:43:48.461212  SPI: 00: enabled 1

 1729 09:43:48.464161  SPI: 00: enabled 1

 1730 09:43:48.467546  PNP: 0c09.0: enabled 1

 1731 09:43:48.468049  GENERIC: 0.0: enabled 1

 1732 09:43:48.470839  USB3 port 0: enabled 1

 1733 09:43:48.473349  USB3 port 1: enabled 1

 1734 09:43:48.476682  USB3 port 2: enabled 0

 1735 09:43:48.477251  USB3 port 3: enabled 0

 1736 09:43:48.480161  USB2 port 0: enabled 0

 1737 09:43:48.483324  USB2 port 1: enabled 1

 1738 09:43:48.486644  USB2 port 2: enabled 1

 1739 09:43:48.487169  USB2 port 3: enabled 0

 1740 09:43:48.489977  USB2 port 4: enabled 1

 1741 09:43:48.493347  USB2 port 5: enabled 0

 1742 09:43:48.493763  USB2 port 6: enabled 0

 1743 09:43:48.496717  USB2 port 7: enabled 0

 1744 09:43:48.500103  USB2 port 8: enabled 0

 1745 09:43:48.503408  USB2 port 9: enabled 0

 1746 09:43:48.503941  USB3 port 0: enabled 0

 1747 09:43:48.506735  USB3 port 1: enabled 1

 1748 09:43:48.509997  USB3 port 2: enabled 0

 1749 09:43:48.510450  USB3 port 3: enabled 0

 1750 09:43:48.513181  GENERIC: 0.0: enabled 1

 1751 09:43:48.516687  GENERIC: 1.0: enabled 1

 1752 09:43:48.517115  APIC: 01: enabled 1

 1753 09:43:48.519968  APIC: 03: enabled 1

 1754 09:43:48.523168  APIC: 06: enabled 1

 1755 09:43:48.523865  APIC: 05: enabled 1

 1756 09:43:48.526112  APIC: 04: enabled 1

 1757 09:43:48.529045  APIC: 02: enabled 1

 1758 09:43:48.529481  APIC: 07: enabled 1

 1759 09:43:48.532698  PCI: 01:00.0: enabled 1

 1760 09:43:48.539091  BS: BS_DEV_INIT run times (exec / console): 34 / 536 ms

 1761 09:43:48.542481  FMAP: area RW_ELOG found @ f30000 (4096 bytes)

 1762 09:43:48.545979  ELOG: NV offset 0xf30000 size 0x1000

 1763 09:43:48.553289  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1764 09:43:48.560104  ELOG: Event(17) added with size 13 at 2024-07-02 09:43:48 UTC

 1765 09:43:48.566846  ELOG: Event(92) added with size 9 at 2024-07-02 09:43:48 UTC

 1766 09:43:48.573201  ELOG: Event(93) added with size 9 at 2024-07-02 09:43:48 UTC

 1767 09:43:48.579639  ELOG: Event(9E) added with size 10 at 2024-07-02 09:43:48 UTC

 1768 09:43:48.586199  ELOG: Event(9F) added with size 14 at 2024-07-02 09:43:48 UTC

 1769 09:43:48.592982  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms

 1770 09:43:48.599378  ELOG: Event(A1) added with size 10 at 2024-07-02 09:43:48 UTC

 1771 09:43:48.605478  elog_add_boot_reason: Logged recovery mode boot, reason: 0x02

 1772 09:43:48.608775  BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms

 1773 09:43:48.611936  Finalize devices...

 1774 09:43:48.615362  Devices finalized

 1775 09:43:48.618728  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

 1776 09:43:48.625309  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)

 1777 09:43:48.631964  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 1778 09:43:48.634986  ME: HFSTS1                      : 0x80030055

 1779 09:43:48.638308  ME: HFSTS2                      : 0x30280116

 1780 09:43:48.644847  ME: HFSTS3                      : 0x00000050

 1781 09:43:48.648033  ME: HFSTS4                      : 0x00004000

 1782 09:43:48.654635  ME: HFSTS5                      : 0x00000000

 1783 09:43:48.658081  ME: HFSTS6                      : 0x00400006

 1784 09:43:48.660919  ME: Manufacturing Mode          : YES

 1785 09:43:48.664475  ME: SPI Protection Mode Enabled : NO

 1786 09:43:48.667557  ME: FW Partition Table          : OK

 1787 09:43:48.671064  ME: Bringup Loader Failure      : NO

 1788 09:43:48.677789  ME: Firmware Init Complete      : NO

 1789 09:43:48.680587  ME: Boot Options Present        : NO

 1790 09:43:48.684036  ME: Update In Progress          : NO

 1791 09:43:48.687610  ME: D0i3 Support                : YES

 1792 09:43:48.691005  ME: Low Power State Enabled     : NO

 1793 09:43:48.693661  ME: CPU Replaced                : YES

 1794 09:43:48.696960  ME: CPU Replacement Valid       : YES

 1795 09:43:48.703650  ME: Current Working State       : 5

 1796 09:43:48.707000  ME: Current Operation State     : 1

 1797 09:43:48.710182  ME: Current Operation Mode      : 3

 1798 09:43:48.713570  ME: Error Code                  : 0

 1799 09:43:48.716720  ME: Enhanced Debug Mode         : NO

 1800 09:43:48.719870  ME: CPU Debug Disabled          : YES

 1801 09:43:48.723374  ME: TXT Support                 : NO

 1802 09:43:48.729792  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms

 1803 09:43:48.736284  ELOG: Event(91) added with size 10 at 2024-07-02 09:43:48 UTC

 1804 09:43:48.742932  Chrome EC: clear events_b mask to 0x0000000020004000

 1805 09:43:48.750034  BS: BS_WRITE_TABLES entry times (exec / console): 2 / 11 ms

 1806 09:43:48.756533  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4

 1807 09:43:48.759909  CBFS: 'fallback/slic' not found.

 1808 09:43:48.763060  ACPI: Writing ACPI tables at 76b01000.

 1809 09:43:48.766183  ACPI:    * FACS

 1810 09:43:48.766653  ACPI:    * DSDT

 1811 09:43:48.773071  Ramoops buffer: 0x100000@0x76a00000.

 1812 09:43:48.775620  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

 1813 09:43:48.779387  FMAP: area RW_VPD found @ f35000 (8192 bytes)

 1814 09:43:48.783418  Google Chrome EC: version:

 1815 09:43:48.786536  	ro: voema_v2.0.7540-147f8d37d1

 1816 09:43:48.789616  	rw: voema_v2.0.7540-147f8d37d1

 1817 09:43:48.792832    running image: 1

 1818 09:43:48.799390  PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000

 1819 09:43:48.802625  ACPI:    * FADT

 1820 09:43:48.803033  SCI is IRQ9

 1821 09:43:48.809422  ACPI: added table 1/32, length now 40

 1822 09:43:48.809828  ACPI:     * SSDT

 1823 09:43:48.812813  Found 1 CPU(s) with 8 core(s) each.

 1824 09:43:48.819424  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2

 1825 09:43:48.822746  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 1826 09:43:48.825363  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 1827 09:43:48.832101  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a

 1828 09:43:48.835336  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 1829 09:43:48.841882  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 1830 09:43:48.845079  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10

 1831 09:43:48.851742  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 1832 09:43:48.858370  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)

 1833 09:43:48.861800  \_SB.PCI0.RP09: Added StorageD3Enable property

 1834 09:43:48.868365  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1835 09:43:48.871782  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 1836 09:43:48.878261  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 1837 09:43:48.881542  PS2K: Passing 80 keymaps to kernel

 1838 09:43:48.888291  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 1839 09:43:48.894804  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1

 1840 09:43:48.901460  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1

 1841 09:43:48.907994  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 1842 09:43:48.914445  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4

 1843 09:43:48.920795  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1

 1844 09:43:48.927284  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 1845 09:43:48.934172  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 1846 09:43:48.937426  ACPI: added table 2/32, length now 44

 1847 09:43:48.940761  ACPI:    * MCFG

 1848 09:43:48.944101  ACPI: added table 3/32, length now 48

 1849 09:43:48.944500  ACPI:    * TPM2

 1850 09:43:48.947505  TPM2 log created at 0x769f0000

 1851 09:43:48.953728  ACPI: added table 4/32, length now 52

 1852 09:43:48.954149  ACPI:    * MADT

 1853 09:43:48.954455  SCI is IRQ9

 1854 09:43:48.960258  ACPI: added table 5/32, length now 56

 1855 09:43:48.960672  current = 76b09850

 1856 09:43:48.963517  ACPI:    * DMAR

 1857 09:43:48.966695  ACPI: added table 6/32, length now 60

 1858 09:43:48.970028  ACPI: added table 7/32, length now 64

 1859 09:43:48.973360  ACPI:    * HPET

 1860 09:43:48.976622  ACPI: added table 8/32, length now 68

 1861 09:43:48.977089  ACPI: done.

 1862 09:43:48.979848  ACPI tables: 35216 bytes.

 1863 09:43:48.982983  smbios_write_tables: 769ef000

 1864 09:43:48.986449  EC returned error result code 3

 1865 09:43:48.989705  Couldn't obtain OEM name from CBI

 1866 09:43:48.992794  Create SMBIOS type 16

 1867 09:43:48.993347  Create SMBIOS type 17

 1868 09:43:48.996500  GENERIC: 0.0 (WIFI Device)

 1869 09:43:48.999616  SMBIOS tables: 1750 bytes.

 1870 09:43:49.002668  Writing table forward entry at 0x00000500

 1871 09:43:49.009391  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c

 1872 09:43:49.012625  Writing coreboot table at 0x76b25000

 1873 09:43:49.019320   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1874 09:43:49.025767   1. 0000000000001000-000000000009ffff: RAM

 1875 09:43:49.028915   2. 00000000000a0000-00000000000fffff: RESERVED

 1876 09:43:49.031858   3. 0000000000100000-00000000769eefff: RAM

 1877 09:43:49.038190   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES

 1878 09:43:49.044744   5. 0000000076b98000-0000000076c09fff: RAMSTAGE

 1879 09:43:49.051338   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES

 1880 09:43:49.054444   7. 0000000077000000-000000007fbfffff: RESERVED

 1881 09:43:49.058265   8. 00000000c0000000-00000000cfffffff: RESERVED

 1882 09:43:49.064658   9. 00000000f8000000-00000000f9ffffff: RESERVED

 1883 09:43:49.068113  10. 00000000fb000000-00000000fb000fff: RESERVED

 1884 09:43:49.074139  11. 00000000fe000000-00000000fe00ffff: RESERVED

 1885 09:43:49.077430  12. 00000000fed80000-00000000fed87fff: RESERVED

 1886 09:43:49.083939  13. 00000000fed90000-00000000fed92fff: RESERVED

 1887 09:43:49.087207  14. 00000000feda0000-00000000feda1fff: RESERVED

 1888 09:43:49.093886  15. 00000000fedc0000-00000000feddffff: RESERVED

 1889 09:43:49.097313  16. 0000000100000000-00000002803fffff: RAM

 1890 09:43:49.100659  Passing 4 GPIOs to payload:

 1891 09:43:49.103842              NAME |       PORT | POLARITY |     VALUE

 1892 09:43:49.110507               lid |  undefined |     high |      high

 1893 09:43:49.117106             power |  undefined |     high |       low

 1894 09:43:49.120422             oprom |  undefined |     high |       low

 1895 09:43:49.126985          EC in RW | 0x000000e5 |     high |       low

 1896 09:43:49.133676  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 3b4b

 1897 09:43:49.137062  coreboot table: 1576 bytes.

 1898 09:43:49.139720  IMD ROOT    0. 0x76fff000 0x00001000

 1899 09:43:49.143015  IMD SMALL   1. 0x76ffe000 0x00001000

 1900 09:43:49.146626  FSP MEMORY  2. 0x76c4e000 0x003b0000

 1901 09:43:49.149727  VPD         3. 0x76c4d000 0x00000367

 1902 09:43:49.152784  RO MCACHE   4. 0x76c4c000 0x00000fdc

 1903 09:43:49.159696  CONSOLE     5. 0x76c2c000 0x00020000

 1904 09:43:49.162636  FMAP        6. 0x76c2b000 0x00000578

 1905 09:43:49.166480  TIME STAMP  7. 0x76c2a000 0x00000910

 1906 09:43:49.168938  VBOOT WORK  8. 0x76c16000 0x00014000

 1907 09:43:49.172455  ROMSTG STCK 9. 0x76c15000 0x00001000

 1908 09:43:49.175688  AFTER CAR  10. 0x76c0a000 0x0000b000

 1909 09:43:49.178791  RAMSTAGE   11. 0x76b97000 0x00073000

 1910 09:43:49.185500  REFCODE    12. 0x76b42000 0x00055000

 1911 09:43:49.188718  SMM BACKUP 13. 0x76b32000 0x00010000

 1912 09:43:49.192047  4f444749   14. 0x76b30000 0x00002000

 1913 09:43:49.195402  EXT VBT15. 0x76b2d000 0x0000219f

 1914 09:43:49.198620  COREBOOT   16. 0x76b25000 0x00008000

 1915 09:43:49.201875  ACPI       17. 0x76b01000 0x00024000

 1916 09:43:49.205157  ACPI GNVS  18. 0x76b00000 0x00001000

 1917 09:43:49.208443  RAMOOPS    19. 0x76a00000 0x00100000

 1918 09:43:49.214830  TPM2 TCGLOG20. 0x769f0000 0x00010000

 1919 09:43:49.218121  SMBIOS     21. 0x769ef000 0x00000800

 1920 09:43:49.218366  IMD small region:

 1921 09:43:49.221807    IMD ROOT    0. 0x76ffec00 0x00000400

 1922 09:43:49.228502    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 1923 09:43:49.231841    POWER STATE 2. 0x76ffeb80 0x00000044

 1924 09:43:49.235161    ROMSTAGE    3. 0x76ffeb60 0x00000004

 1925 09:43:49.238469    MEM INFO    4. 0x76ffe980 0x000001e0

 1926 09:43:49.244956  BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms

 1927 09:43:49.248280  MTRR: Physical address space:

 1928 09:43:49.254337  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1929 09:43:49.260990  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1930 09:43:49.267888  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 1931 09:43:49.273969  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0

 1932 09:43:49.277455  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1

 1933 09:43:49.283982  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0

 1934 09:43:49.290378  0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6

 1935 09:43:49.296862  MTRR: Fixed MSR 0x250 0x0606060606060606

 1936 09:43:49.300172  MTRR: Fixed MSR 0x258 0x0606060606060606

 1937 09:43:49.303401  MTRR: Fixed MSR 0x259 0x0000000000000000

 1938 09:43:49.306659  MTRR: Fixed MSR 0x268 0x0606060606060606

 1939 09:43:49.313312  MTRR: Fixed MSR 0x269 0x0606060606060606

 1940 09:43:49.316714  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1941 09:43:49.319826  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1942 09:43:49.323040  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1943 09:43:49.329963  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1944 09:43:49.333396  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1945 09:43:49.335935  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1946 09:43:49.340082  call enable_fixed_mtrr()

 1947 09:43:49.342602  CPU physical address size: 39 bits

 1948 09:43:49.349307  MTRR: default type WB/UC MTRR counts: 6/6.

 1949 09:43:49.352631  MTRR: UC selected as default type.

 1950 09:43:49.359325  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 1951 09:43:49.365837  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 1952 09:43:49.368969  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 1953 09:43:49.376031  MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1

 1954 09:43:49.382506  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 1955 09:43:49.388897  MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6

 1956 09:43:49.395468  MTRR: Fixed MSR 0x250 0x0606060606060606

 1957 09:43:49.399105  MTRR: Fixed MSR 0x258 0x0606060606060606

 1958 09:43:49.402185  MTRR: Fixed MSR 0x259 0x0000000000000000

 1959 09:43:49.405612  MTRR: Fixed MSR 0x268 0x0606060606060606

 1960 09:43:49.411816  MTRR: Fixed MSR 0x269 0x0606060606060606

 1961 09:43:49.415069  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1962 09:43:49.418163  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1963 09:43:49.425242  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1964 09:43:49.428504  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1965 09:43:49.431181  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1966 09:43:49.435018  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1967 09:43:49.435406  

 1968 09:43:49.438709  MTRR check

 1969 09:43:49.441735  Fixed MTRRs   : Enabled

 1970 09:43:49.442128  Variable MTRRs: Enabled

 1971 09:43:49.442431  

 1972 09:43:49.445118  call enable_fixed_mtrr()

 1973 09:43:49.451683  BS: BS_WRITE_TABLES exit times (exec / console): 48 / 151 ms

 1974 09:43:49.454861  CPU physical address size: 39 bits

 1975 09:43:49.464782  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60

 1976 09:43:49.468014  MTRR: Fixed MSR 0x250 0x0606060606060606

 1977 09:43:49.471297  MTRR: Fixed MSR 0x250 0x0606060606060606

 1978 09:43:49.474525  MTRR: Fixed MSR 0x258 0x0606060606060606

 1979 09:43:49.480900  MTRR: Fixed MSR 0x259 0x0000000000000000

 1980 09:43:49.484856  MTRR: Fixed MSR 0x268 0x0606060606060606

 1981 09:43:49.488123  MTRR: Fixed MSR 0x269 0x0606060606060606

 1982 09:43:49.490635  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1983 09:43:49.497849  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1984 09:43:49.501198  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1985 09:43:49.504326  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1986 09:43:49.510387  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1987 09:43:49.513606  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1988 09:43:49.516851  MTRR: Fixed MSR 0x258 0x0606060606060606

 1989 09:43:49.523706  MTRR: Fixed MSR 0x259 0x0000000000000000

 1990 09:43:49.526749  MTRR: Fixed MSR 0x268 0x0606060606060606

 1991 09:43:49.530023  MTRR: Fixed MSR 0x269 0x0606060606060606

 1992 09:43:49.533660  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1993 09:43:49.539970  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1994 09:43:49.543093  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1995 09:43:49.546434  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1996 09:43:49.549411  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1997 09:43:49.556517  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1998 09:43:49.559823  call enable_fixed_mtrr()

 1999 09:43:49.562552  call enable_fixed_mtrr()

 2000 09:43:49.565842  MTRR: Fixed MSR 0x250 0x0606060606060606

 2001 09:43:49.569288  MTRR: Fixed MSR 0x250 0x0606060606060606

 2002 09:43:49.572214  MTRR: Fixed MSR 0x258 0x0606060606060606

 2003 09:43:49.578922  MTRR: Fixed MSR 0x259 0x0000000000000000

 2004 09:43:49.582711  MTRR: Fixed MSR 0x268 0x0606060606060606

 2005 09:43:49.586007  MTRR: Fixed MSR 0x269 0x0606060606060606

 2006 09:43:49.588750  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2007 09:43:49.595198  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2008 09:43:49.598896  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2009 09:43:49.602192  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2010 09:43:49.605656  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2011 09:43:49.612036  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2012 09:43:49.615382  MTRR: Fixed MSR 0x258 0x0606060606060606

 2013 09:43:49.618631  call enable_fixed_mtrr()

 2014 09:43:49.621791  MTRR: Fixed MSR 0x259 0x0000000000000000

 2015 09:43:49.624935  MTRR: Fixed MSR 0x268 0x0606060606060606

 2016 09:43:49.631481  MTRR: Fixed MSR 0x269 0x0606060606060606

 2017 09:43:49.634765  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2018 09:43:49.638132  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2019 09:43:49.641386  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2020 09:43:49.647887  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2021 09:43:49.650830  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2022 09:43:49.654234  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2023 09:43:49.661020  CPU physical address size: 39 bits

 2024 09:43:49.664443  call enable_fixed_mtrr()

 2025 09:43:49.667839  Checking segment from ROM address 0xffc02b38

 2026 09:43:49.671240  MTRR: Fixed MSR 0x250 0x0606060606060606

 2027 09:43:49.674125  MTRR: Fixed MSR 0x250 0x0606060606060606

 2028 09:43:49.680749  MTRR: Fixed MSR 0x258 0x0606060606060606

 2029 09:43:49.683977  MTRR: Fixed MSR 0x259 0x0000000000000000

 2030 09:43:49.687234  MTRR: Fixed MSR 0x268 0x0606060606060606

 2031 09:43:49.690532  MTRR: Fixed MSR 0x269 0x0606060606060606

 2032 09:43:49.697167  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2033 09:43:49.700290  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2034 09:43:49.703931  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2035 09:43:49.706998  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2036 09:43:49.713747  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2037 09:43:49.717129  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2038 09:43:49.723494  MTRR: Fixed MSR 0x258 0x0606060606060606

 2039 09:43:49.724147  call enable_fixed_mtrr()

 2040 09:43:49.730083  MTRR: Fixed MSR 0x259 0x0000000000000000

 2041 09:43:49.733420  MTRR: Fixed MSR 0x268 0x0606060606060606

 2042 09:43:49.736669  MTRR: Fixed MSR 0x269 0x0606060606060606

 2043 09:43:49.739498  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2044 09:43:49.746242  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2045 09:43:49.749501  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2046 09:43:49.752765  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2047 09:43:49.756083  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2048 09:43:49.762418  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2049 09:43:49.765965  CPU physical address size: 39 bits

 2050 09:43:49.769135  call enable_fixed_mtrr()

 2051 09:43:49.772376  CPU physical address size: 39 bits

 2052 09:43:49.779104  Checking segment from ROM address 0xffc02b54

 2053 09:43:49.782216  CPU physical address size: 39 bits

 2054 09:43:49.785518  CPU physical address size: 39 bits

 2055 09:43:49.788479  CPU physical address size: 39 bits

 2056 09:43:49.791870  Loading segment from ROM address 0xffc02b38

 2057 09:43:49.795366    code (compression=0)

 2058 09:43:49.804976    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64

 2059 09:43:49.811601  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64

 2060 09:43:49.814664  it's not compressed!

 2061 09:43:49.953995  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70

 2062 09:43:49.960686  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c

 2063 09:43:49.967346  Loading segment from ROM address 0xffc02b54

 2064 09:43:49.970594    Entry Point 0x30000000

 2065 09:43:49.971070  Loaded segments

 2066 09:43:49.977041  BS: BS_PAYLOAD_LOAD run times (exec / console): 455 / 64 ms

 2067 09:43:50.020313  Finalizing chipset.

 2068 09:43:50.023205  Finalizing SMM.

 2069 09:43:50.023774  APMC done.

 2070 09:43:50.029673  BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms

 2071 09:43:50.033179  mp_park_aps done after 0 msecs.

 2072 09:43:50.036690  Jumping to boot code at 0x30000000(0x76b25000)

 2073 09:43:50.046230  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes

 2074 09:43:50.049583  

 2075 09:43:50.049931  

 2076 09:43:50.050246  

 2077 09:43:50.052991  Starting depthcharge on Voema...

 2078 09:43:50.053519  

 2079 09:43:50.054549  end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
 2080 09:43:50.055013  start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
 2081 09:43:50.055385  Setting prompt string to ['volteer:']
 2082 09:43:50.055763  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:40)
 2083 09:43:50.059668  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2084 09:43:50.060219  

 2085 09:43:50.066209  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2086 09:43:50.066624  

 2087 09:43:50.072221  Looking for NVMe Controller 0x3005f238 @ 00:1d:00

 2088 09:43:50.072608  

 2089 09:43:50.075608  Failed to find eMMC card reader

 2090 09:43:50.075996  

 2091 09:43:50.078703  Wipe memory regions:

 2092 09:43:50.079085  

 2093 09:43:50.082650  	[0x00000000001000, 0x000000000a0000)

 2094 09:43:50.083076  

 2095 09:43:50.085261  	[0x00000000100000, 0x00000030000000)

 2096 09:43:50.111851  

 2097 09:43:50.115288  	[0x00000032662db0, 0x000000769ef000)

 2098 09:43:50.150433  

 2099 09:43:50.153291  	[0x00000100000000, 0x00000280400000)

 2100 09:43:50.356856  

 2101 09:43:50.360617  ec_init: CrosEC protocol v3 supported (256, 256)

 2102 09:43:50.361094  

 2103 09:43:50.367125  update_port_state: port C0 state: usb enable 1 mux conn 0

 2104 09:43:50.367670  

 2105 09:43:50.376799  update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1

 2106 09:43:50.377247  

 2107 09:43:50.379971  pmc_check_ipc_sts: STS_BUSY done after 1611 us

 2108 09:43:50.380511  

 2109 09:43:50.386684  send_conn_disc_msg: pmc_send_cmd succeeded

 2110 09:43:50.817038  

 2111 09:43:50.817637  R8152: Initializing

 2112 09:43:50.818129  

 2113 09:43:50.820172  Version 6 (ocp_data = 5c30)

 2114 09:43:50.820563  

 2115 09:43:50.823534  R8152: Done initializing

 2116 09:43:50.823923  

 2117 09:43:50.826755  Adding net device

 2118 09:43:51.128470  

 2119 09:43:51.132220  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35

 2120 09:43:51.132739  

 2121 09:43:51.133214  


 2122 09:43:51.135457  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2123 09:43:51.135899  Sending line: 'tftpboot 192.168.201.1 14692359/tftp-deploy-2gsprdrl/kernel/bzImage 14692359/tftp-deploy-2gsprdrl/kernel/cmdline 14692359/tftp-deploy-2gsprdrl/ramdisk/ramdisk.cpio.gz'
 2125 09:43:51.237373  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2126 09:43:51.237753  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
 2127 09:43:51.242660  volteer: tftpboot 192.168.201.1 14692359/tftp-deploy-2gsprdrl/kernel/bzIploy-2gsprdrl/kernel/cmdline 14692359/tftp-deploy-2gsprdrl/ramdisk/ramdisk.cpio.gz

 2128 09:43:51.243056  

 2129 09:43:51.243355  Waiting for link

 2130 09:43:51.446855  

 2131 09:43:51.447286  done.

 2132 09:43:51.447691  

 2133 09:43:51.447994  MAC: 00:24:32:30:79:42

 2134 09:43:51.448296  

 2135 09:43:51.449973  Sending DHCP discover... done.

 2136 09:43:51.450354  

 2137 09:43:51.453363  Waiting for reply... done.

 2138 09:43:51.453786  

 2139 09:43:51.456944  Sending DHCP request... done.

 2140 09:43:51.457329  

 2141 09:43:51.459908  Waiting for reply... done.

 2142 09:43:51.460290  

 2143 09:43:51.462973  My ip is 192.168.201.13

 2144 09:43:51.463352  

 2145 09:43:51.466091  The DHCP server ip is 192.168.201.1

 2146 09:43:51.466553  

 2147 09:43:51.469869  TFTP server IP predefined by user: 192.168.201.1

 2148 09:43:51.470253  

 2149 09:43:51.479400  Bootfile predefined by user: 14692359/tftp-deploy-2gsprdrl/kernel/bzImage

 2150 09:43:51.479848  

 2151 09:43:51.482668  Sending tftp read request... done.

 2152 09:43:51.483194  

 2153 09:43:51.490708  Waiting for the transfer... 

 2154 09:43:51.491097  

 2155 09:43:52.098840  00000000 ################################################################

 2156 09:43:52.098972  

 2157 09:43:52.655545  00080000 ################################################################

 2158 09:43:52.655746  

 2159 09:43:53.217348  00100000 ################################################################

 2160 09:43:53.217470  

 2161 09:43:53.773452  00180000 ################################################################

 2162 09:43:53.773597  

 2163 09:43:54.307584  00200000 ################################################################

 2164 09:43:54.307705  

 2165 09:43:54.859720  00280000 ################################################################

 2166 09:43:54.859857  

 2167 09:43:55.430065  00300000 ################################################################

 2168 09:43:55.430185  

 2169 09:43:56.011777  00380000 ################################################################

 2170 09:43:56.011897  

 2171 09:43:56.638460  00400000 ################################################################

 2172 09:43:56.638947  

 2173 09:43:57.297599  00480000 ################################################################

 2174 09:43:57.298054  

 2175 09:43:57.961146  00500000 ################################################################

 2176 09:43:57.961718  

 2177 09:43:58.621737  00580000 ################################################################

 2178 09:43:58.622175  

 2179 09:43:59.269366  00600000 ################################################################

 2180 09:43:59.269485  

 2181 09:43:59.852542  00680000 ################################################################

 2182 09:43:59.852677  

 2183 09:44:00.417868  00700000 ################################################################

 2184 09:44:00.417980  

 2185 09:44:00.980980  00780000 ################################################################

 2186 09:44:00.981112  

 2187 09:44:01.525629  00800000 ################################################################

 2188 09:44:01.525741  

 2189 09:44:02.112714  00880000 ################################################################

 2190 09:44:02.113301  

 2191 09:44:02.790440  00900000 ################################################################

 2192 09:44:02.791053  

 2193 09:44:03.474116  00980000 ################################################################

 2194 09:44:03.474593  

 2195 09:44:04.072288  00a00000 ################################################################

 2196 09:44:04.072403  

 2197 09:44:04.695391  00a80000 ################################################################

 2198 09:44:04.695863  

 2199 09:44:05.360177  00b00000 ################################################################

 2200 09:44:05.360632  

 2201 09:44:06.041046  00b80000 ################################################################

 2202 09:44:06.041493  

 2203 09:44:06.694720  00c00000 ################################################################

 2204 09:44:06.695010  

 2205 09:44:07.382052  00c80000 ################################################################

 2206 09:44:07.382491  

 2207 09:44:08.017881  00d00000 ################################################################ done.

 2208 09:44:08.018050  

 2209 09:44:08.021164  The bootfile was 14155664 bytes long.

 2210 09:44:08.021246  

 2211 09:44:08.024931  Sending tftp read request... done.

 2212 09:44:08.025011  

 2213 09:44:08.027906  Waiting for the transfer... 

 2214 09:44:08.027983  

 2215 09:44:08.560064  00000000 ################################################################

 2216 09:44:08.560218  

 2217 09:44:09.112661  00080000 ################################################################

 2218 09:44:09.112787  

 2219 09:44:09.693683  00100000 ################################################################

 2220 09:44:09.693803  

 2221 09:44:10.289942  00180000 ################################################################

 2222 09:44:10.290058  

 2223 09:44:10.905908  00200000 ################################################################

 2224 09:44:10.906448  

 2225 09:44:11.550881  00280000 ################################################################

 2226 09:44:11.551328  

 2227 09:44:12.138030  00300000 ################################################################

 2228 09:44:12.138155  

 2229 09:44:12.703098  00380000 ################################################################

 2230 09:44:12.703236  

 2231 09:44:13.311254  00400000 ################################################################

 2232 09:44:13.311405  

 2233 09:44:13.885840  00480000 ################################################################

 2234 09:44:13.885977  

 2235 09:44:14.447514  00500000 ################################################################

 2236 09:44:14.447634  

 2237 09:44:15.012993  00580000 ################################################################

 2238 09:44:15.013105  

 2239 09:44:15.540461  00600000 ################################################################

 2240 09:44:15.540587  

 2241 09:44:16.123941  00680000 ################################################################

 2242 09:44:16.124076  

 2243 09:44:16.654867  00700000 ################################################################

 2244 09:44:16.654979  

 2245 09:44:17.224512  00780000 ################################################################

 2246 09:44:17.224632  

 2247 09:44:17.782257  00800000 ################################################################

 2248 09:44:17.782386  

 2249 09:44:18.325742  00880000 ################################################################

 2250 09:44:18.325900  

 2251 09:44:18.868602  00900000 ################################################################

 2252 09:44:18.868723  

 2253 09:44:19.405212  00980000 ################################################################

 2254 09:44:19.405343  

 2255 09:44:19.954702  00a00000 ################################################################

 2256 09:44:19.954848  

 2257 09:44:20.489777  00a80000 ################################################################

 2258 09:44:20.489905  

 2259 09:44:21.031732  00b00000 ################################################################

 2260 09:44:21.031870  

 2261 09:44:21.595597  00b80000 ################################################################

 2262 09:44:21.595717  

 2263 09:44:22.155713  00c00000 ################################################################

 2264 09:44:22.155894  

 2265 09:44:22.703135  00c80000 ################################################################

 2266 09:44:22.703289  

 2267 09:44:23.249083  00d00000 ################################################################

 2268 09:44:23.249195  

 2269 09:44:23.791676  00d80000 ################################################################

 2270 09:44:23.791794  

 2271 09:44:24.328141  00e00000 ################################################################

 2272 09:44:24.328258  

 2273 09:44:24.872805  00e80000 ################################################################

 2274 09:44:24.872933  

 2275 09:44:25.411103  00f00000 ################################################################

 2276 09:44:25.411253  

 2277 09:44:25.959196  00f80000 ################################################################

 2278 09:44:25.959362  

 2279 09:44:26.490496  01000000 ################################################################

 2280 09:44:26.490643  

 2281 09:44:27.036880  01080000 ################################################################

 2282 09:44:27.037000  

 2283 09:44:27.574635  01100000 ################################################################

 2284 09:44:27.574763  

 2285 09:44:28.125534  01180000 ################################################################

 2286 09:44:28.125664  

 2287 09:44:28.665397  01200000 ################################################################

 2288 09:44:28.665524  

 2289 09:44:29.205265  01280000 ################################################################

 2290 09:44:29.205434  

 2291 09:44:29.753754  01300000 ################################################################

 2292 09:44:29.753883  

 2293 09:44:30.296558  01380000 ################################################################

 2294 09:44:30.296677  

 2295 09:44:30.832231  01400000 ################################################################

 2296 09:44:30.832361  

 2297 09:44:31.358809  01480000 ################################################################

 2298 09:44:31.358944  

 2299 09:44:31.883154  01500000 ################################################################

 2300 09:44:31.883309  

 2301 09:44:32.423995  01580000 ################################################################

 2302 09:44:32.424139  

 2303 09:44:32.993467  01600000 ################################################################

 2304 09:44:32.993584  

 2305 09:44:33.559281  01680000 ################################################################

 2306 09:44:33.559411  

 2307 09:44:34.129127  01700000 ################################################################

 2308 09:44:34.129623  

 2309 09:44:34.760089  01780000 ################################################################

 2310 09:44:34.760424  

 2311 09:44:35.388831  01800000 ################################################################

 2312 09:44:35.389428  

 2313 09:44:36.020326  01880000 ################################################################

 2314 09:44:36.020932  

 2315 09:44:36.699685  01900000 ################################################################

 2316 09:44:36.700143  

 2317 09:44:37.374915  01980000 ################################################################

 2318 09:44:37.375617  

 2319 09:44:38.033265  01a00000 ################################################################

 2320 09:44:38.033378  

 2321 09:44:38.624460  01a80000 ################################################################

 2322 09:44:38.625039  

 2323 09:44:39.310087  01b00000 ################################################################

 2324 09:44:39.310400  

 2325 09:44:39.915915  01b80000 ################################################################

 2326 09:44:39.916035  

 2327 09:44:40.460442  01c00000 ################################################################

 2328 09:44:40.460572  

 2329 09:44:41.083450  01c80000 ################################################################

 2330 09:44:41.083578  

 2331 09:44:41.625136  01d00000 ################################################################

 2332 09:44:41.625267  

 2333 09:44:42.190544  01d80000 ################################################################

 2334 09:44:42.190657  

 2335 09:44:42.818163  01e00000 ################################################################

 2336 09:44:42.818682  

 2337 09:44:43.470918  01e80000 ################################################################

 2338 09:44:43.471559  

 2339 09:44:44.162625  01f00000 ################################################################

 2340 09:44:44.163110  

 2341 09:44:44.803289  01f80000 ################################################################

 2342 09:44:44.803407  

 2343 09:44:45.412410  02000000 ################################################################

 2344 09:44:45.412529  

 2345 09:44:45.974263  02080000 ################################################################

 2346 09:44:45.974395  

 2347 09:44:46.529540  02100000 ################################################################

 2348 09:44:46.529680  

 2349 09:44:47.085413  02180000 ################################################################

 2350 09:44:47.085528  

 2351 09:44:47.634942  02200000 ################################################################

 2352 09:44:47.635059  

 2353 09:44:48.166776  02280000 ################################################################

 2354 09:44:48.166894  

 2355 09:44:48.716388  02300000 ################################################################

 2356 09:44:48.716521  

 2357 09:44:49.271318  02380000 ################################################################

 2358 09:44:49.271443  

 2359 09:44:49.806599  02400000 ################################################################

 2360 09:44:49.806713  

 2361 09:44:50.353537  02480000 ################################################################

 2362 09:44:50.353655  

 2363 09:44:50.901516  02500000 ################################################################

 2364 09:44:50.901649  

 2365 09:44:51.426892  02580000 ################################################################

 2366 09:44:51.427011  

 2367 09:44:51.943546  02600000 ################################################################

 2368 09:44:51.943666  

 2369 09:44:52.485311  02680000 ################################################################

 2370 09:44:52.485467  

 2371 09:44:52.889789  02700000 ################################################ done.

 2372 09:44:52.889959  

 2373 09:44:52.892732  Sending tftp read request... done.

 2374 09:44:52.892808  

 2375 09:44:52.895830  Waiting for the transfer... 

 2376 09:44:52.895909  

 2377 09:44:52.895968  00000000 # done.

 2378 09:44:52.896025  

 2379 09:44:52.905808  Command line loaded dynamically from TFTP file: 14692359/tftp-deploy-2gsprdrl/kernel/cmdline

 2380 09:44:52.905920  

 2381 09:44:52.922425  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2382 09:44:52.929338  

 2383 09:44:52.932440  Shutting down all USB controllers.

 2384 09:44:52.932541  

 2385 09:44:52.932626  Removing current net device

 2386 09:44:52.932708  

 2387 09:44:52.935706  Finalizing coreboot

 2388 09:44:52.935783  

 2389 09:44:52.942200  Exiting depthcharge with code 4 at timestamp: 71576237

 2390 09:44:52.942279  

 2391 09:44:52.942338  

 2392 09:44:52.942393  Starting kernel ...

 2393 09:44:52.942445  

 2394 09:44:52.942947  end: 2.2.4 bootloader-commands (duration 00:01:03) [common]
 2395 09:44:52.943042  start: 2.2.5 auto-login-action (timeout 00:03:37) [common]
 2396 09:44:52.943111  Setting prompt string to ['Linux version [0-9]']
 2397 09:44:52.943178  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2398 09:44:52.943245  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2399 09:44:52.945487  

 2401 09:48:29.943832  end: 2.2.5 auto-login-action (duration 00:03:37) [common]
 2403 09:48:29.944783  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 217 seconds'
 2405 09:48:29.945518  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2408 09:48:29.946767  end: 2 depthcharge-action (duration 00:05:00) [common]
 2410 09:48:29.947971  Cleaning after the job
 2411 09:48:29.948377  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14692359/tftp-deploy-2gsprdrl/ramdisk
 2412 09:48:29.969389  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14692359/tftp-deploy-2gsprdrl/kernel
 2413 09:48:29.975669  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14692359/tftp-deploy-2gsprdrl/modules
 2414 09:48:29.977800  start: 4.1 power-off (timeout 00:00:30) [common]
 2415 09:48:29.978156  Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cp514-2h-1130g7-volteer-cbg-8', '--port=1', '--command=off']
 2416 09:48:32.077187  >> Command sent successfully.
 2417 09:48:32.080239  Returned 0 in 2 seconds
 2418 09:48:32.080373  end: 4.1 power-off (duration 00:00:02) [common]
 2420 09:48:32.080567  start: 4.2 read-feedback (timeout 00:04:58) [common]
 2421 09:48:32.080698  Listened to connection for namespace 'common' for up to 1s
 2423 09:48:32.081083  Listened to connection for namespace 'common' for up to 1s
 2424 09:48:33.081314  Finalising connection for namespace 'common'
 2425 09:48:33.081455  Disconnecting from shell: Finalise
 2426 09:48:33.081543  
 2427 09:48:33.181796  end: 4.2 read-feedback (duration 00:00:01) [common]
 2428 09:48:33.181944  Removing override tmp directory at /var/lib/lava/dispatcher/tmp/14692359
 2429 09:48:33.244620  Removing root tmp directory at /var/lib/lava/dispatcher/tmp/14692359
 2430 09:48:33.244765  JobError: Your job cannot terminate cleanly.