Boot log: asus-C436FA-Flip-hatch
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
1 11:37:27.505049 lava-dispatcher, installed at version: 2024.05
2 11:37:27.505290 start: 0 validate
3 11:37:27.505426 Start time: 2024-07-02 11:37:27.505420+00:00 (UTC)
4 11:37:27.505581 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:37:27.505751 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Fx86%2Frootfs.cpio.gz exists
6 11:37:27.760545 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:37:27.760772 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2604-g2f70a05edfca4%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:37:28.019149 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:37:28.019320 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-2604-g2f70a05edfca4%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 11:37:28.271341 validate duration: 0.77
12 11:37:28.271687 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 11:37:28.271866 start: 1.1 download-retry (timeout 00:10:00) [common]
14 11:37:28.271982 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 11:37:28.272189 Not decompressing ramdisk as can be used compressed.
16 11:37:28.272306 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/x86/rootfs.cpio.gz
17 11:37:28.272399 saving as /var/lib/lava/dispatcher/tmp/14694700/tftp-deploy-6wnggaof/ramdisk/rootfs.cpio.gz
18 11:37:28.272484 total size: 8417901 (8 MB)
19 11:37:28.273841 progress 0 % (0 MB)
20 11:37:28.277346 progress 5 % (0 MB)
21 11:37:28.280861 progress 10 % (0 MB)
22 11:37:28.284280 progress 15 % (1 MB)
23 11:37:28.287712 progress 20 % (1 MB)
24 11:37:28.291187 progress 25 % (2 MB)
25 11:37:28.294654 progress 30 % (2 MB)
26 11:37:28.297911 progress 35 % (2 MB)
27 11:37:28.301295 progress 40 % (3 MB)
28 11:37:28.304745 progress 45 % (3 MB)
29 11:37:28.308143 progress 50 % (4 MB)
30 11:37:28.311488 progress 55 % (4 MB)
31 11:37:28.314888 progress 60 % (4 MB)
32 11:37:28.317159 progress 65 % (5 MB)
33 11:37:28.319312 progress 70 % (5 MB)
34 11:37:28.321567 progress 75 % (6 MB)
35 11:37:28.323718 progress 80 % (6 MB)
36 11:37:28.325983 progress 85 % (6 MB)
37 11:37:28.328114 progress 90 % (7 MB)
38 11:37:28.330157 progress 95 % (7 MB)
39 11:37:28.332109 progress 100 % (8 MB)
40 11:37:28.332342 8 MB downloaded in 0.06 s (134.13 MB/s)
41 11:37:28.332491 end: 1.1.1 http-download (duration 00:00:00) [common]
43 11:37:28.332707 end: 1.1 download-retry (duration 00:00:00) [common]
44 11:37:28.332786 start: 1.2 download-retry (timeout 00:10:00) [common]
45 11:37:28.332860 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 11:37:28.332995 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2604-g2f70a05edfca4/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 11:37:28.333055 saving as /var/lib/lava/dispatcher/tmp/14694700/tftp-deploy-6wnggaof/kernel/bzImage
48 11:37:28.333107 total size: 14155664 (13 MB)
49 11:37:28.333176 No compression specified
50 11:37:28.334180 progress 0 % (0 MB)
51 11:37:28.337788 progress 5 % (0 MB)
52 11:37:28.341635 progress 10 % (1 MB)
53 11:37:28.345349 progress 15 % (2 MB)
54 11:37:28.348950 progress 20 % (2 MB)
55 11:37:28.352365 progress 25 % (3 MB)
56 11:37:28.355890 progress 30 % (4 MB)
57 11:37:28.359640 progress 35 % (4 MB)
58 11:37:28.363028 progress 40 % (5 MB)
59 11:37:28.366772 progress 45 % (6 MB)
60 11:37:28.370533 progress 50 % (6 MB)
61 11:37:28.374194 progress 55 % (7 MB)
62 11:37:28.377855 progress 60 % (8 MB)
63 11:37:28.381308 progress 65 % (8 MB)
64 11:37:28.384954 progress 70 % (9 MB)
65 11:37:28.388446 progress 75 % (10 MB)
66 11:37:28.392054 progress 80 % (10 MB)
67 11:37:28.395825 progress 85 % (11 MB)
68 11:37:28.399493 progress 90 % (12 MB)
69 11:37:28.403370 progress 95 % (12 MB)
70 11:37:28.407178 progress 100 % (13 MB)
71 11:37:28.407479 13 MB downloaded in 0.07 s (181.53 MB/s)
72 11:37:28.407639 end: 1.2.1 http-download (duration 00:00:00) [common]
74 11:37:28.407896 end: 1.2 download-retry (duration 00:00:00) [common]
75 11:37:28.407977 start: 1.3 download-retry (timeout 00:10:00) [common]
76 11:37:28.408086 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 11:37:28.408244 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-2604-g2f70a05edfca4/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 11:37:28.408306 saving as /var/lib/lava/dispatcher/tmp/14694700/tftp-deploy-6wnggaof/modules/modules.tar
79 11:37:28.408361 total size: 714668 (0 MB)
80 11:37:28.408416 Using unxz to decompress xz
81 11:37:28.409819 progress 4 % (0 MB)
82 11:37:28.410072 progress 9 % (0 MB)
83 11:37:28.412301 progress 18 % (0 MB)
84 11:37:28.417119 progress 27 % (0 MB)
85 11:37:28.418991 progress 32 % (0 MB)
86 11:37:28.423161 progress 41 % (0 MB)
87 11:37:28.427149 progress 50 % (0 MB)
88 11:37:28.429130 progress 55 % (0 MB)
89 11:37:28.432781 progress 64 % (0 MB)
90 11:37:28.436442 progress 73 % (0 MB)
91 11:37:28.441053 progress 82 % (0 MB)
92 11:37:28.443189 progress 87 % (0 MB)
93 11:37:28.447527 progress 96 % (0 MB)
94 11:37:28.454791 0 MB downloaded in 0.05 s (14.68 MB/s)
95 11:37:28.454988 end: 1.3.1 http-download (duration 00:00:00) [common]
97 11:37:28.455219 end: 1.3 download-retry (duration 00:00:00) [common]
98 11:37:28.455343 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
99 11:37:28.455451 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
100 11:37:28.455550 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
101 11:37:28.455651 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
102 11:37:28.455855 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14694700/lava-overlay-lsgliw4i
103 11:37:28.456037 makedir: /var/lib/lava/dispatcher/tmp/14694700/lava-overlay-lsgliw4i/lava-14694700/bin
104 11:37:28.456136 makedir: /var/lib/lava/dispatcher/tmp/14694700/lava-overlay-lsgliw4i/lava-14694700/tests
105 11:37:28.456227 makedir: /var/lib/lava/dispatcher/tmp/14694700/lava-overlay-lsgliw4i/lava-14694700/results
106 11:37:28.456313 Creating /var/lib/lava/dispatcher/tmp/14694700/lava-overlay-lsgliw4i/lava-14694700/bin/lava-add-keys
107 11:37:28.456445 Creating /var/lib/lava/dispatcher/tmp/14694700/lava-overlay-lsgliw4i/lava-14694700/bin/lava-add-sources
108 11:37:28.456591 Creating /var/lib/lava/dispatcher/tmp/14694700/lava-overlay-lsgliw4i/lava-14694700/bin/lava-background-process-start
109 11:37:28.456744 Creating /var/lib/lava/dispatcher/tmp/14694700/lava-overlay-lsgliw4i/lava-14694700/bin/lava-background-process-stop
110 11:37:28.456900 Creating /var/lib/lava/dispatcher/tmp/14694700/lava-overlay-lsgliw4i/lava-14694700/bin/lava-common-functions
111 11:37:28.457045 Creating /var/lib/lava/dispatcher/tmp/14694700/lava-overlay-lsgliw4i/lava-14694700/bin/lava-echo-ipv4
112 11:37:28.457210 Creating /var/lib/lava/dispatcher/tmp/14694700/lava-overlay-lsgliw4i/lava-14694700/bin/lava-install-packages
113 11:37:28.457371 Creating /var/lib/lava/dispatcher/tmp/14694700/lava-overlay-lsgliw4i/lava-14694700/bin/lava-installed-packages
114 11:37:28.457488 Creating /var/lib/lava/dispatcher/tmp/14694700/lava-overlay-lsgliw4i/lava-14694700/bin/lava-os-build
115 11:37:28.457604 Creating /var/lib/lava/dispatcher/tmp/14694700/lava-overlay-lsgliw4i/lava-14694700/bin/lava-probe-channel
116 11:37:28.457724 Creating /var/lib/lava/dispatcher/tmp/14694700/lava-overlay-lsgliw4i/lava-14694700/bin/lava-probe-ip
117 11:37:28.457893 Creating /var/lib/lava/dispatcher/tmp/14694700/lava-overlay-lsgliw4i/lava-14694700/bin/lava-target-ip
118 11:37:28.458011 Creating /var/lib/lava/dispatcher/tmp/14694700/lava-overlay-lsgliw4i/lava-14694700/bin/lava-target-mac
119 11:37:28.458126 Creating /var/lib/lava/dispatcher/tmp/14694700/lava-overlay-lsgliw4i/lava-14694700/bin/lava-target-storage
120 11:37:28.458274 Creating /var/lib/lava/dispatcher/tmp/14694700/lava-overlay-lsgliw4i/lava-14694700/bin/lava-test-case
121 11:37:28.458416 Creating /var/lib/lava/dispatcher/tmp/14694700/lava-overlay-lsgliw4i/lava-14694700/bin/lava-test-event
122 11:37:28.458561 Creating /var/lib/lava/dispatcher/tmp/14694700/lava-overlay-lsgliw4i/lava-14694700/bin/lava-test-feedback
123 11:37:28.458705 Creating /var/lib/lava/dispatcher/tmp/14694700/lava-overlay-lsgliw4i/lava-14694700/bin/lava-test-raise
124 11:37:28.458874 Creating /var/lib/lava/dispatcher/tmp/14694700/lava-overlay-lsgliw4i/lava-14694700/bin/lava-test-reference
125 11:37:28.458997 Creating /var/lib/lava/dispatcher/tmp/14694700/lava-overlay-lsgliw4i/lava-14694700/bin/lava-test-runner
126 11:37:28.459177 Creating /var/lib/lava/dispatcher/tmp/14694700/lava-overlay-lsgliw4i/lava-14694700/bin/lava-test-set
127 11:37:28.459295 Creating /var/lib/lava/dispatcher/tmp/14694700/lava-overlay-lsgliw4i/lava-14694700/bin/lava-test-shell
128 11:37:28.459416 Updating /var/lib/lava/dispatcher/tmp/14694700/lava-overlay-lsgliw4i/lava-14694700/bin/lava-install-packages (oe)
129 11:37:28.459562 Updating /var/lib/lava/dispatcher/tmp/14694700/lava-overlay-lsgliw4i/lava-14694700/bin/lava-installed-packages (oe)
130 11:37:28.459727 Creating /var/lib/lava/dispatcher/tmp/14694700/lava-overlay-lsgliw4i/lava-14694700/environment
131 11:37:28.459846 LAVA metadata
132 11:37:28.459914 - LAVA_JOB_ID=14694700
133 11:37:28.459973 - LAVA_DISPATCHER_IP=192.168.201.1
134 11:37:28.460070 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
135 11:37:28.460129 skipped lava-vland-overlay
136 11:37:28.460198 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
137 11:37:28.460276 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
138 11:37:28.460389 skipped lava-multinode-overlay
139 11:37:28.460469 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
140 11:37:28.460541 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
141 11:37:28.460610 Loading test definitions
142 11:37:28.460688 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
143 11:37:28.460758 Using /lava-14694700 at stage 0
144 11:37:28.461102 uuid=14694700_1.4.2.3.1 testdef=None
145 11:37:28.461188 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
146 11:37:28.461268 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
147 11:37:28.461776 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
149 11:37:28.461986 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
150 11:37:28.462807 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
152 11:37:28.463054 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
153 11:37:28.463753 runner path: /var/lib/lava/dispatcher/tmp/14694700/lava-overlay-lsgliw4i/lava-14694700/0/tests/0_dmesg test_uuid 14694700_1.4.2.3.1
154 11:37:28.463902 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
156 11:37:28.464096 Creating lava-test-runner.conf files
157 11:37:28.464185 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14694700/lava-overlay-lsgliw4i/lava-14694700/0 for stage 0
158 11:37:28.464276 - 0_dmesg
159 11:37:28.464369 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
160 11:37:28.464448 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
161 11:37:28.471764 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
162 11:37:28.471891 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
163 11:37:28.471977 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
164 11:37:28.472057 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
165 11:37:28.472137 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
166 11:37:28.700110 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
167 11:37:28.700260 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
168 11:37:28.700397 extracting modules file /var/lib/lava/dispatcher/tmp/14694700/tftp-deploy-6wnggaof/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14694700/extract-overlay-ramdisk-ww5oofwf/ramdisk
169 11:37:28.728822 end: 1.4.4 extract-modules (duration 00:00:00) [common]
170 11:37:28.728966 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
171 11:37:28.729055 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14694700/compress-overlay-13wsk2gc/overlay-1.4.2.4.tar.gz to ramdisk
172 11:37:28.729116 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14694700/compress-overlay-13wsk2gc/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14694700/extract-overlay-ramdisk-ww5oofwf/ramdisk
173 11:37:28.736025 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
174 11:37:28.736149 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
175 11:37:28.736244 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
176 11:37:28.736326 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
177 11:37:28.736398 Building ramdisk /var/lib/lava/dispatcher/tmp/14694700/extract-overlay-ramdisk-ww5oofwf/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14694700/extract-overlay-ramdisk-ww5oofwf/ramdisk
178 11:37:28.843242 >> 53732 blocks
179 11:37:29.836729 rename /var/lib/lava/dispatcher/tmp/14694700/extract-overlay-ramdisk-ww5oofwf/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14694700/tftp-deploy-6wnggaof/ramdisk/ramdisk.cpio.gz
180 11:37:29.836899 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
181 11:37:29.836990 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
182 11:37:29.837079 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
183 11:37:29.837206 No mkimage arch provided, not using FIT.
184 11:37:29.837312 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
185 11:37:29.837388 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
186 11:37:29.837464 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
187 11:37:29.837540 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
188 11:37:29.837599 No LXC device requested
189 11:37:29.837667 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
190 11:37:29.837739 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
191 11:37:29.837808 end: 1.6 deploy-device-env (duration 00:00:00) [common]
192 11:37:29.837864 Checking files for TFTP limit of 4294967296 bytes.
193 11:37:29.838248 end: 1 tftp-deploy (duration 00:00:02) [common]
194 11:37:29.838343 start: 2 depthcharge-action (timeout 00:05:00) [common]
195 11:37:29.838423 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
196 11:37:29.838517 substitutions:
197 11:37:29.838576 - {DTB}: None
198 11:37:29.838632 - {INITRD}: 14694700/tftp-deploy-6wnggaof/ramdisk/ramdisk.cpio.gz
199 11:37:29.838684 - {KERNEL}: 14694700/tftp-deploy-6wnggaof/kernel/bzImage
200 11:37:29.838737 - {LAVA_MAC}: None
201 11:37:29.838809 - {PRESEED_CONFIG}: None
202 11:37:29.838878 - {PRESEED_LOCAL}: None
203 11:37:29.838930 - {RAMDISK}: 14694700/tftp-deploy-6wnggaof/ramdisk/ramdisk.cpio.gz
204 11:37:29.838986 - {ROOT_PART}: None
205 11:37:29.839037 - {ROOT}: None
206 11:37:29.839146 - {SERVER_IP}: 192.168.201.1
207 11:37:29.839210 - {TEE}: None
208 11:37:29.839260 Parsed boot commands:
209 11:37:29.839309 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
210 11:37:29.839449 Parsed boot commands: tftpboot 192.168.201.1 14694700/tftp-deploy-6wnggaof/kernel/bzImage 14694700/tftp-deploy-6wnggaof/kernel/cmdline 14694700/tftp-deploy-6wnggaof/ramdisk/ramdisk.cpio.gz
211 11:37:29.839529 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
212 11:37:29.839602 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
213 11:37:29.839675 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
214 11:37:29.839821 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
215 11:37:29.839886 Not connected, no need to disconnect.
216 11:37:29.839953 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
217 11:37:29.840025 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
218 11:37:29.840081 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-2'
219 11:37:29.843275 Setting prompt string to ['lava-test: # ']
220 11:37:29.843614 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
221 11:37:29.843719 end: 2.2.1 reset-connection (duration 00:00:00) [common]
222 11:37:29.843848 start: 2.2.2 reset-device (timeout 00:05:00) [common]
223 11:37:29.843933 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
224 11:37:29.844171 Calling: ['pduclient', '--daemon=localhost', '--hostname=asus-C436FA-Flip-hatch-cbg-2', '--port=1', '--command=reboot']
225 11:37:38.984661 >> Command sent successfully.
226 11:37:38.988493 Returned 0 in 9 seconds
227 11:37:38.988664 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
229 11:37:38.988886 end: 2.2.2 reset-device (duration 00:00:09) [common]
230 11:37:38.988973 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
231 11:37:38.989048 Setting prompt string to 'Starting depthcharge on Helios...'
232 11:37:38.989107 Changing prompt to 'Starting depthcharge on Helios...'
233 11:37:38.989216 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
234 11:37:38.989656 [Enter `^Ec?' for help]
235 11:37:40.404185
236 11:37:40.404310
237 11:37:40.413734 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
238 11:37:40.417046 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
239 11:37:40.423404 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
240 11:37:40.426936 CPU: AES supported, TXT NOT supported, VT supported
241 11:37:40.433982 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
242 11:37:40.437274 PCH: device id 0284 (rev 00) is Cometlake-U Premium
243 11:37:40.444007 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
244 11:37:40.447203 VBOOT: Loading verstage.
245 11:37:40.450801 FMAP: Found "FLASH" version 1.1 at 0xc04000.
246 11:37:40.457332 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
247 11:37:40.460483 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
248 11:37:40.463825 CBFS @ c08000 size 3f8000
249 11:37:40.470315 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
250 11:37:40.473447 CBFS: Locating 'fallback/verstage'
251 11:37:40.476730 CBFS: Found @ offset 10fb80 size 1072c
252 11:37:40.480480
253 11:37:40.480569
254 11:37:40.490295 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
255 11:37:40.504768 Probing TPM: . done!
256 11:37:40.508021 TPM ready after 0 ms
257 11:37:40.511368 Connected to device vid:did:rid of 1ae0:0028:00
258 11:37:40.522135 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
259 11:37:40.525235 Initialized TPM device CR50 revision 0
260 11:37:40.571062 tlcl_send_startup: Startup return code is 0
261 11:37:40.571188 TPM: setup succeeded
262 11:37:40.583407 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
263 11:37:40.587241 Chrome EC: UHEPI supported
264 11:37:40.590879 Phase 1
265 11:37:40.594245 FMAP: area GBB found @ c05000 (12288 bytes)
266 11:37:40.600392 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
267 11:37:40.607176 VB2:vb2_check_recovery() Recovery was requested manually
268 11:37:40.613580 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
269 11:37:40.620130 Recovery requested (1009000e)
270 11:37:40.626221 tlcl_extend: response is 0
271 11:37:40.634595 tlcl_extend: response is 0
272 11:37:40.641448 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
273 11:37:40.644840 CBFS @ c08000 size 3f8000
274 11:37:40.651536 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
275 11:37:40.654833 CBFS: Locating 'fallback/romstage'
276 11:37:40.658237 CBFS: Found @ offset 80 size 145fc
277 11:37:40.661566 Accumulated console time in verstage 102 ms
278 11:37:40.661662
279 11:37:40.664985
280 11:37:40.674582 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
281 11:37:40.681416 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
282 11:37:40.684122 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
283 11:37:40.687433 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
284 11:37:40.694122 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
285 11:37:40.697442 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
286 11:37:40.700519 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
287 11:37:40.704275 TCO_STS: 0000 0000
288 11:37:40.707246 GEN_PMCON: e0015038 00000200
289 11:37:40.710562 GBLRST_CAUSE: 00000000 00000000
290 11:37:40.713988 prev_sleep_state 5
291 11:37:40.717393 Boot Count incremented to 10781
292 11:37:40.720652 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
293 11:37:40.723910 CBFS @ c08000 size 3f8000
294 11:37:40.730357 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
295 11:37:40.733686 CBFS: Locating 'fspm.bin'
296 11:37:40.736844 CBFS: Found @ offset 5ffc0 size 71000
297 11:37:40.740164 Chrome EC: UHEPI supported
298 11:37:40.746809 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
299 11:37:40.750828 Probing TPM: done!
300 11:37:40.757447 Connected to device vid:did:rid of 1ae0:0028:00
301 11:37:40.767471 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
302 11:37:40.773953 Initialized TPM device CR50 revision 0
303 11:37:40.782465 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
304 11:37:40.792920 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
305 11:37:40.793047 MRC cache found, size 1948
306 11:37:40.795537 bootmode is set to: 2
307 11:37:40.798935 PRMRR disabled by config.
308 11:37:40.802568 SPD INDEX = 1
309 11:37:40.805572 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 11:37:40.808698 CBFS @ c08000 size 3f8000
311 11:37:40.815120 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
312 11:37:40.815242 CBFS: Locating 'spd.bin'
313 11:37:40.821711 CBFS: Found @ offset 5fb80 size 400
314 11:37:40.821900 SPD: module type is LPDDR3
315 11:37:40.824957 SPD: module part is
316 11:37:40.832093 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
317 11:37:40.835398 SPD: device width 4 bits, bus width 8 bits
318 11:37:40.838066 SPD: module size is 4096 MB (per channel)
319 11:37:40.844583 memory slot: 0 configuration done.
320 11:37:40.848293 memory slot: 2 configuration done.
321 11:37:40.896440 CBMEM:
322 11:37:40.899921 IMD: root @ 99fff000 254 entries.
323 11:37:40.903145 IMD: root @ 99ffec00 62 entries.
324 11:37:40.906628 External stage cache:
325 11:37:40.909855 IMD: root @ 9abff000 254 entries.
326 11:37:40.913049 IMD: root @ 9abfec00 62 entries.
327 11:37:40.919548 Chrome EC: clear events_b mask to 0x0000000020004000
328 11:37:40.932569 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
329 11:37:40.945489 tlcl_write: response is 0
330 11:37:40.954936 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
331 11:37:40.961181 MRC: TPM MRC hash updated successfully.
332 11:37:40.961310 2 DIMMs found
333 11:37:40.964508 SMM Memory Map
334 11:37:40.968060 SMRAM : 0x9a000000 0x1000000
335 11:37:40.971180 Subregion 0: 0x9a000000 0xa00000
336 11:37:40.974720 Subregion 1: 0x9aa00000 0x200000
337 11:37:40.977896 Subregion 2: 0x9ac00000 0x400000
338 11:37:40.981186 top_of_ram = 0x9a000000
339 11:37:40.984470 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
340 11:37:40.990658 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
341 11:37:40.994683 MTRR Range: Start=ff000000 End=0 (Size 1000000)
342 11:37:41.001108 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
343 11:37:41.004518 CBFS @ c08000 size 3f8000
344 11:37:41.007130 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
345 11:37:41.013794 CBFS: Locating 'fallback/postcar'
346 11:37:41.017012 CBFS: Found @ offset 107000 size 4b44
347 11:37:41.023843 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
348 11:37:41.033516 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
349 11:37:41.036723 Processing 180 relocs. Offset value of 0x97c0c000
350 11:37:41.045538 Accumulated console time in romstage 286 ms
351 11:37:41.045641
352 11:37:41.045738
353 11:37:41.055646 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
354 11:37:41.062077 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
355 11:37:41.065224 CBFS @ c08000 size 3f8000
356 11:37:41.071628 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
357 11:37:41.074930 CBFS: Locating 'fallback/ramstage'
358 11:37:41.078165 CBFS: Found @ offset 43380 size 1b9e8
359 11:37:41.084835 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
360 11:37:41.116962 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
361 11:37:41.120082 Processing 3976 relocs. Offset value of 0x98db0000
362 11:37:41.127368 Accumulated console time in postcar 52 ms
363 11:37:41.127451
364 11:37:41.127532
365 11:37:41.136843 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
366 11:37:41.143483 FMAP: area RO_VPD found @ c00000 (16384 bytes)
367 11:37:41.146549 WARNING: RO_VPD is uninitialized or empty.
368 11:37:41.150308 FMAP: area RW_VPD found @ af8000 (8192 bytes)
369 11:37:41.156541 FMAP: area RW_VPD found @ af8000 (8192 bytes)
370 11:37:41.156625 Normal boot.
371 11:37:41.163403 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
372 11:37:41.166609 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
373 11:37:41.169960 CBFS @ c08000 size 3f8000
374 11:37:41.176474 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
375 11:37:41.179581 CBFS: Locating 'cpu_microcode_blob.bin'
376 11:37:41.182981 CBFS: Found @ offset 14700 size 2ec00
377 11:37:41.189772 microcode: sig=0x806ec pf=0x4 revision=0xc9
378 11:37:41.189867 Skip microcode update
379 11:37:41.196342 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
380 11:37:41.199583 CBFS @ c08000 size 3f8000
381 11:37:41.202370 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
382 11:37:41.205669 CBFS: Locating 'fsps.bin'
383 11:37:41.209013 CBFS: Found @ offset d1fc0 size 35000
384 11:37:41.235253 Detected 4 core, 8 thread CPU.
385 11:37:41.238468 Setting up SMI for CPU
386 11:37:41.241847 IED base = 0x9ac00000
387 11:37:41.245277 IED size = 0x00400000
388 11:37:41.245388 Will perform SMM setup.
389 11:37:41.251326 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
390 11:37:41.258134 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
391 11:37:41.264690 Processing 16 relocs. Offset value of 0x00030000
392 11:37:41.268047 Attempting to start 7 APs
393 11:37:41.271129 Waiting for 10ms after sending INIT.
394 11:37:41.285074 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
395 11:37:41.285214 done.
396 11:37:41.288270 AP: slot 1 apic_id 2.
397 11:37:41.291631 AP: slot 4 apic_id 3.
398 11:37:41.291745 AP: slot 6 apic_id 7.
399 11:37:41.295038 AP: slot 7 apic_id 6.
400 11:37:41.297896 AP: slot 5 apic_id 5.
401 11:37:41.297976 AP: slot 2 apic_id 4.
402 11:37:41.304659 Waiting for 2nd SIPI to complete...done.
403 11:37:41.311153 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
404 11:37:41.317642 Processing 13 relocs. Offset value of 0x00038000
405 11:37:41.324352 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
406 11:37:41.327831 Installing SMM handler to 0x9a000000
407 11:37:41.334183 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
408 11:37:41.340844 Processing 658 relocs. Offset value of 0x9a010000
409 11:37:41.347104 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
410 11:37:41.351003 Processing 13 relocs. Offset value of 0x9a008000
411 11:37:41.357088 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
412 11:37:41.363892 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
413 11:37:41.370473 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
414 11:37:41.373931 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
415 11:37:41.380373 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
416 11:37:41.386605 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
417 11:37:41.393602 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
418 11:37:41.399658 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
419 11:37:41.402981 Clearing SMI status registers
420 11:37:41.403137 SMI_STS: PM1
421 11:37:41.406596 PM1_STS: PWRBTN
422 11:37:41.406750 TCO_STS: SECOND_TO
423 11:37:41.409763 New SMBASE 0x9a000000
424 11:37:41.413170 In relocation handler: CPU 0
425 11:37:41.416199 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
426 11:37:41.422774 Writing SMRR. base = 0x9a000006, mask=0xff000800
427 11:37:41.422964 Relocation complete.
428 11:37:41.425835 New SMBASE 0x99fff400
429 11:37:41.429020 In relocation handler: CPU 3
430 11:37:41.432344 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
431 11:37:41.438873 Writing SMRR. base = 0x9a000006, mask=0xff000800
432 11:37:41.439012 Relocation complete.
433 11:37:41.442243 New SMBASE 0x99fff000
434 11:37:41.445530 In relocation handler: CPU 4
435 11:37:41.449003 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
436 11:37:41.455727 Writing SMRR. base = 0x9a000006, mask=0xff000800
437 11:37:41.455881 Relocation complete.
438 11:37:41.458502 New SMBASE 0x99fffc00
439 11:37:41.461882 In relocation handler: CPU 1
440 11:37:41.465223 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
441 11:37:41.471874 Writing SMRR. base = 0x9a000006, mask=0xff000800
442 11:37:41.471980 Relocation complete.
443 11:37:41.475222 New SMBASE 0x99fff800
444 11:37:41.478491 In relocation handler: CPU 2
445 11:37:41.481792 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
446 11:37:41.488440 Writing SMRR. base = 0x9a000006, mask=0xff000800
447 11:37:41.488556 Relocation complete.
448 11:37:41.491859 New SMBASE 0x99ffe400
449 11:37:41.495049 In relocation handler: CPU 7
450 11:37:41.498145 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
451 11:37:41.504934 Writing SMRR. base = 0x9a000006, mask=0xff000800
452 11:37:41.505098 Relocation complete.
453 11:37:41.508148 New SMBASE 0x99ffe800
454 11:37:41.511403 In relocation handler: CPU 6
455 11:37:41.514692 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
456 11:37:41.520965 Writing SMRR. base = 0x9a000006, mask=0xff000800
457 11:37:41.521069 Relocation complete.
458 11:37:41.524006 New SMBASE 0x99ffec00
459 11:37:41.527805 In relocation handler: CPU 5
460 11:37:41.531178 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
461 11:37:41.537359 Writing SMRR. base = 0x9a000006, mask=0xff000800
462 11:37:41.537527 Relocation complete.
463 11:37:41.540563 Initializing CPU #0
464 11:37:41.543866 CPU: vendor Intel device 806ec
465 11:37:41.547468 CPU: family 06, model 8e, stepping 0c
466 11:37:41.550364 Clearing out pending MCEs
467 11:37:41.554194 Setting up local APIC...
468 11:37:41.554294 apic_id: 0x00 done.
469 11:37:41.557705 Turbo is available but hidden
470 11:37:41.560448 Turbo is available and visible
471 11:37:41.563993 VMX status: enabled
472 11:37:41.567229 IA32_FEATURE_CONTROL status: locked
473 11:37:41.570589 Skip microcode update
474 11:37:41.570721 CPU #0 initialized
475 11:37:41.573925 Initializing CPU #3
476 11:37:41.573996 Initializing CPU #7
477 11:37:41.576630 Initializing CPU #6
478 11:37:41.579868 Initializing CPU #4
479 11:37:41.579959 Initializing CPU #1
480 11:37:41.583536 CPU: vendor Intel device 806ec
481 11:37:41.586966 CPU: family 06, model 8e, stepping 0c
482 11:37:41.590223 CPU: vendor Intel device 806ec
483 11:37:41.597132 CPU: family 06, model 8e, stepping 0c
484 11:37:41.597225 Clearing out pending MCEs
485 11:37:41.599940 Clearing out pending MCEs
486 11:37:41.603159 Setting up local APIC...
487 11:37:41.606500 CPU: vendor Intel device 806ec
488 11:37:41.609703 CPU: family 06, model 8e, stepping 0c
489 11:37:41.613363 Clearing out pending MCEs
490 11:37:41.613449 apic_id: 0x02 done.
491 11:37:41.616467 Setting up local APIC...
492 11:37:41.619686 CPU: vendor Intel device 806ec
493 11:37:41.623194 CPU: family 06, model 8e, stepping 0c
494 11:37:41.626662 CPU: vendor Intel device 806ec
495 11:37:41.629183 CPU: family 06, model 8e, stepping 0c
496 11:37:41.632630 Clearing out pending MCEs
497 11:37:41.635968 Clearing out pending MCEs
498 11:37:41.639413 Setting up local APIC...
499 11:37:41.639497 VMX status: enabled
500 11:37:41.642715 apic_id: 0x03 done.
501 11:37:41.646026 IA32_FEATURE_CONTROL status: locked
502 11:37:41.649213 VMX status: enabled
503 11:37:41.649297 Skip microcode update
504 11:37:41.655670 IA32_FEATURE_CONTROL status: locked
505 11:37:41.655790 CPU #1 initialized
506 11:37:41.659060 Skip microcode update
507 11:37:41.662584 Setting up local APIC...
508 11:37:41.662670 Initializing CPU #5
509 11:37:41.665661 Initializing CPU #2
510 11:37:41.668893 CPU: vendor Intel device 806ec
511 11:37:41.672009 CPU: family 06, model 8e, stepping 0c
512 11:37:41.675528 CPU #4 initialized
513 11:37:41.675617 Clearing out pending MCEs
514 11:37:41.678741 CPU: vendor Intel device 806ec
515 11:37:41.682027 CPU: family 06, model 8e, stepping 0c
516 11:37:41.685404 Setting up local APIC...
517 11:37:41.688776 Setting up local APIC...
518 11:37:41.692094 apic_id: 0x01 done.
519 11:37:41.692199 Clearing out pending MCEs
520 11:37:41.695416 apic_id: 0x05 done.
521 11:37:41.699014 Setting up local APIC...
522 11:37:41.701457 apic_id: 0x07 done.
523 11:37:41.701547 apic_id: 0x06 done.
524 11:37:41.705096 VMX status: enabled
525 11:37:41.705176 VMX status: enabled
526 11:37:41.711650 IA32_FEATURE_CONTROL status: locked
527 11:37:41.715058 IA32_FEATURE_CONTROL status: locked
528 11:37:41.715169 Skip microcode update
529 11:37:41.718248 Skip microcode update
530 11:37:41.721924 CPU #6 initialized
531 11:37:41.722024 CPU #7 initialized
532 11:37:41.725278 VMX status: enabled
533 11:37:41.725368 apic_id: 0x04 done.
534 11:37:41.728391 IA32_FEATURE_CONTROL status: locked
535 11:37:41.731214 VMX status: enabled
536 11:37:41.734461 Skip microcode update
537 11:37:41.734578 VMX status: enabled
538 11:37:41.741481 IA32_FEATURE_CONTROL status: locked
539 11:37:41.741597 CPU #5 initialized
540 11:37:41.744197 Skip microcode update
541 11:37:41.748016 IA32_FEATURE_CONTROL status: locked
542 11:37:41.748153 CPU #2 initialized
543 11:37:41.751053 Skip microcode update
544 11:37:41.754508 CPU #3 initialized
545 11:37:41.757723 bsp_do_flight_plan done after 452 msecs.
546 11:37:41.761095 CPU: frequency set to 4200 MHz
547 11:37:41.764330 Enabling SMIs.
548 11:37:41.764470 Locking SMM.
549 11:37:41.779065 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
550 11:37:41.782169 CBFS @ c08000 size 3f8000
551 11:37:41.788731 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
552 11:37:41.788855 CBFS: Locating 'vbt.bin'
553 11:37:41.795392 CBFS: Found @ offset 5f5c0 size 499
554 11:37:41.798202 Found a VBT of 4608 bytes after decompression
555 11:37:41.981022 Display FSP Version Info HOB
556 11:37:41.984197 Reference Code - CPU = 9.0.1e.30
557 11:37:41.987614 uCode Version = 0.0.0.ca
558 11:37:41.990936 TXT ACM version = ff.ff.ff.ffff
559 11:37:41.994140 Display FSP Version Info HOB
560 11:37:41.997574 Reference Code - ME = 9.0.1e.30
561 11:37:42.000893 MEBx version = 0.0.0.0
562 11:37:42.004140 ME Firmware Version = Consumer SKU
563 11:37:42.007282 Display FSP Version Info HOB
564 11:37:42.010501 Reference Code - CML PCH = 9.0.1e.30
565 11:37:42.013491 PCH-CRID Status = Disabled
566 11:37:42.016689 PCH-CRID Original Value = ff.ff.ff.ffff
567 11:37:42.019961 PCH-CRID New Value = ff.ff.ff.ffff
568 11:37:42.023366 OPROM - RST - RAID = ff.ff.ff.ffff
569 11:37:42.026567 ChipsetInit Base Version = ff.ff.ff.ffff
570 11:37:42.033295 ChipsetInit Oem Version = ff.ff.ff.ffff
571 11:37:42.033471 Display FSP Version Info HOB
572 11:37:42.039468 Reference Code - SA - System Agent = 9.0.1e.30
573 11:37:42.042971 Reference Code - MRC = 0.7.1.6c
574 11:37:42.046367 SA - PCIe Version = 9.0.1e.30
575 11:37:42.049468 SA-CRID Status = Disabled
576 11:37:42.052834 SA-CRID Original Value = 0.0.0.c
577 11:37:42.052960 SA-CRID New Value = 0.0.0.c
578 11:37:42.056072 OPROM - VBIOS = ff.ff.ff.ffff
579 11:37:42.060109 RTC Init
580 11:37:42.062708 Set power on after power failure.
581 11:37:42.066682 Disabling Deep S3
582 11:37:42.066806 Disabling Deep S3
583 11:37:42.069480 Disabling Deep S4
584 11:37:42.069602 Disabling Deep S4
585 11:37:42.072670 Disabling Deep S5
586 11:37:42.072795 Disabling Deep S5
587 11:37:42.079177 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
588 11:37:42.082568 Enumerating buses...
589 11:37:42.085787 Show all devs... Before device enumeration.
590 11:37:42.089167 Root Device: enabled 1
591 11:37:42.092517 CPU_CLUSTER: 0: enabled 1
592 11:37:42.092639 DOMAIN: 0000: enabled 1
593 11:37:42.095935 APIC: 00: enabled 1
594 11:37:42.099222 PCI: 00:00.0: enabled 1
595 11:37:42.101897 PCI: 00:02.0: enabled 1
596 11:37:42.102023 PCI: 00:04.0: enabled 0
597 11:37:42.105121 PCI: 00:05.0: enabled 0
598 11:37:42.108414 PCI: 00:12.0: enabled 1
599 11:37:42.108538 PCI: 00:12.5: enabled 0
600 11:37:42.111969 PCI: 00:12.6: enabled 0
601 11:37:42.115075 PCI: 00:14.0: enabled 1
602 11:37:42.118371 PCI: 00:14.1: enabled 0
603 11:37:42.118499 PCI: 00:14.3: enabled 1
604 11:37:42.121694 PCI: 00:14.5: enabled 0
605 11:37:42.125244 PCI: 00:15.0: enabled 1
606 11:37:42.128114 PCI: 00:15.1: enabled 1
607 11:37:42.128264 PCI: 00:15.2: enabled 0
608 11:37:42.131626 PCI: 00:15.3: enabled 0
609 11:37:42.135182 PCI: 00:16.0: enabled 1
610 11:37:42.137857 PCI: 00:16.1: enabled 0
611 11:37:42.138020 PCI: 00:16.2: enabled 0
612 11:37:42.141200 PCI: 00:16.3: enabled 0
613 11:37:42.144880 PCI: 00:16.4: enabled 0
614 11:37:42.148027 PCI: 00:16.5: enabled 0
615 11:37:42.148202 PCI: 00:17.0: enabled 1
616 11:37:42.151250 PCI: 00:19.0: enabled 1
617 11:37:42.154460 PCI: 00:19.1: enabled 0
618 11:37:42.157784 PCI: 00:19.2: enabled 0
619 11:37:42.157944 PCI: 00:1a.0: enabled 0
620 11:37:42.161144 PCI: 00:1c.0: enabled 0
621 11:37:42.164409 PCI: 00:1c.1: enabled 0
622 11:37:42.167862 PCI: 00:1c.2: enabled 0
623 11:37:42.167997 PCI: 00:1c.3: enabled 0
624 11:37:42.170587 PCI: 00:1c.4: enabled 0
625 11:37:42.173815 PCI: 00:1c.5: enabled 0
626 11:37:42.177416 PCI: 00:1c.6: enabled 0
627 11:37:42.177539 PCI: 00:1c.7: enabled 0
628 11:37:42.180686 PCI: 00:1d.0: enabled 1
629 11:37:42.183646 PCI: 00:1d.1: enabled 0
630 11:37:42.186697 PCI: 00:1d.2: enabled 0
631 11:37:42.186816 PCI: 00:1d.3: enabled 0
632 11:37:42.190602 PCI: 00:1d.4: enabled 0
633 11:37:42.193852 PCI: 00:1d.5: enabled 1
634 11:37:42.196563 PCI: 00:1e.0: enabled 1
635 11:37:42.196685 PCI: 00:1e.1: enabled 0
636 11:37:42.199894 PCI: 00:1e.2: enabled 1
637 11:37:42.203330 PCI: 00:1e.3: enabled 1
638 11:37:42.206684 PCI: 00:1f.0: enabled 1
639 11:37:42.206807 PCI: 00:1f.1: enabled 1
640 11:37:42.210082 PCI: 00:1f.2: enabled 1
641 11:37:42.213337 PCI: 00:1f.3: enabled 1
642 11:37:42.216575 PCI: 00:1f.4: enabled 1
643 11:37:42.216701 PCI: 00:1f.5: enabled 1
644 11:37:42.219906 PCI: 00:1f.6: enabled 0
645 11:37:42.223210 USB0 port 0: enabled 1
646 11:37:42.223332 I2C: 00:15: enabled 1
647 11:37:42.226061 I2C: 00:5d: enabled 1
648 11:37:42.229329 GENERIC: 0.0: enabled 1
649 11:37:42.232588 I2C: 00:1a: enabled 1
650 11:37:42.232738 I2C: 00:38: enabled 1
651 11:37:42.236153 I2C: 00:39: enabled 1
652 11:37:42.239193 I2C: 00:3a: enabled 1
653 11:37:42.239347 I2C: 00:3b: enabled 1
654 11:37:42.242163 PCI: 00:00.0: enabled 1
655 11:37:42.245706 SPI: 00: enabled 1
656 11:37:42.245846 SPI: 01: enabled 1
657 11:37:42.249047 PNP: 0c09.0: enabled 1
658 11:37:42.252283 USB2 port 0: enabled 1
659 11:37:42.252420 USB2 port 1: enabled 1
660 11:37:42.255500 USB2 port 2: enabled 0
661 11:37:42.258431 USB2 port 3: enabled 0
662 11:37:42.261634 USB2 port 5: enabled 0
663 11:37:42.261765 USB2 port 6: enabled 1
664 11:37:42.265084 USB2 port 9: enabled 1
665 11:37:42.268201 USB3 port 0: enabled 1
666 11:37:42.268329 USB3 port 1: enabled 1
667 11:37:42.271512 USB3 port 2: enabled 1
668 11:37:42.274821 USB3 port 3: enabled 1
669 11:37:42.278250 USB3 port 4: enabled 0
670 11:37:42.278381 APIC: 02: enabled 1
671 11:37:42.281448 APIC: 04: enabled 1
672 11:37:42.281578 APIC: 01: enabled 1
673 11:37:42.284721 APIC: 03: enabled 1
674 11:37:42.288055 APIC: 05: enabled 1
675 11:37:42.288193 APIC: 07: enabled 1
676 11:37:42.291159 APIC: 06: enabled 1
677 11:37:42.294575 Compare with tree...
678 11:37:42.294713 Root Device: enabled 1
679 11:37:42.297819 CPU_CLUSTER: 0: enabled 1
680 11:37:42.300891 APIC: 00: enabled 1
681 11:37:42.304133 APIC: 02: enabled 1
682 11:37:42.304273 APIC: 04: enabled 1
683 11:37:42.307506 APIC: 01: enabled 1
684 11:37:42.310945 APIC: 03: enabled 1
685 11:37:42.311080 APIC: 05: enabled 1
686 11:37:42.314213 APIC: 07: enabled 1
687 11:37:42.317605 APIC: 06: enabled 1
688 11:37:42.317747 DOMAIN: 0000: enabled 1
689 11:37:42.320727 PCI: 00:00.0: enabled 1
690 11:37:42.323612 PCI: 00:02.0: enabled 1
691 11:37:42.327039 PCI: 00:04.0: enabled 0
692 11:37:42.330228 PCI: 00:05.0: enabled 0
693 11:37:42.330357 PCI: 00:12.0: enabled 1
694 11:37:42.333790 PCI: 00:12.5: enabled 0
695 11:37:42.336555 PCI: 00:12.6: enabled 0
696 11:37:42.340514 PCI: 00:14.0: enabled 1
697 11:37:42.343675 USB0 port 0: enabled 1
698 11:37:42.343823 USB2 port 0: enabled 1
699 11:37:42.347139 USB2 port 1: enabled 1
700 11:37:42.350236 USB2 port 2: enabled 0
701 11:37:42.353600 USB2 port 3: enabled 0
702 11:37:42.356576 USB2 port 5: enabled 0
703 11:37:42.360141 USB2 port 6: enabled 1
704 11:37:42.360283 USB2 port 9: enabled 1
705 11:37:42.363029 USB3 port 0: enabled 1
706 11:37:42.366175 USB3 port 1: enabled 1
707 11:37:42.369403 USB3 port 2: enabled 1
708 11:37:42.372828 USB3 port 3: enabled 1
709 11:37:42.376072 USB3 port 4: enabled 0
710 11:37:42.376217 PCI: 00:14.1: enabled 0
711 11:37:42.379451 PCI: 00:14.3: enabled 1
712 11:37:42.382825 PCI: 00:14.5: enabled 0
713 11:37:42.386045 PCI: 00:15.0: enabled 1
714 11:37:42.389163 I2C: 00:15: enabled 1
715 11:37:42.389295 PCI: 00:15.1: enabled 1
716 11:37:42.393268 I2C: 00:5d: enabled 1
717 11:37:42.395600 GENERIC: 0.0: enabled 1
718 11:37:42.398942 PCI: 00:15.2: enabled 0
719 11:37:42.402240 PCI: 00:15.3: enabled 0
720 11:37:42.402378 PCI: 00:16.0: enabled 1
721 11:37:42.405840 PCI: 00:16.1: enabled 0
722 11:37:42.408898 PCI: 00:16.2: enabled 0
723 11:37:42.412126 PCI: 00:16.3: enabled 0
724 11:37:42.415568 PCI: 00:16.4: enabled 0
725 11:37:42.415707 PCI: 00:16.5: enabled 0
726 11:37:42.418969 PCI: 00:17.0: enabled 1
727 11:37:42.422210 PCI: 00:19.0: enabled 1
728 11:37:42.425477 I2C: 00:1a: enabled 1
729 11:37:42.429005 I2C: 00:38: enabled 1
730 11:37:42.429146 I2C: 00:39: enabled 1
731 11:37:42.431536 I2C: 00:3a: enabled 1
732 11:37:42.434757 I2C: 00:3b: enabled 1
733 11:37:42.438222 PCI: 00:19.1: enabled 0
734 11:37:42.441648 PCI: 00:19.2: enabled 0
735 11:37:42.441788 PCI: 00:1a.0: enabled 0
736 11:37:42.444972 PCI: 00:1c.0: enabled 0
737 11:37:42.448172 PCI: 00:1c.1: enabled 0
738 11:37:42.451050 PCI: 00:1c.2: enabled 0
739 11:37:42.454353 PCI: 00:1c.3: enabled 0
740 11:37:42.454494 PCI: 00:1c.4: enabled 0
741 11:37:42.457582 PCI: 00:1c.5: enabled 0
742 11:37:42.460905 PCI: 00:1c.6: enabled 0
743 11:37:42.464275 PCI: 00:1c.7: enabled 0
744 11:37:42.467419 PCI: 00:1d.0: enabled 1
745 11:37:42.467559 PCI: 00:1d.1: enabled 0
746 11:37:42.471193 PCI: 00:1d.2: enabled 0
747 11:37:42.474131 PCI: 00:1d.3: enabled 0
748 11:37:42.477134 PCI: 00:1d.4: enabled 0
749 11:37:42.480903 PCI: 00:1d.5: enabled 1
750 11:37:42.481040 PCI: 00:00.0: enabled 1
751 11:37:42.483976 PCI: 00:1e.0: enabled 1
752 11:37:42.487143 PCI: 00:1e.1: enabled 0
753 11:37:42.490202 PCI: 00:1e.2: enabled 1
754 11:37:42.494052 SPI: 00: enabled 1
755 11:37:42.494157 PCI: 00:1e.3: enabled 1
756 11:37:42.496887 SPI: 01: enabled 1
757 11:37:42.500015 PCI: 00:1f.0: enabled 1
758 11:37:42.503502 PNP: 0c09.0: enabled 1
759 11:37:42.506842 PCI: 00:1f.1: enabled 1
760 11:37:42.506923 PCI: 00:1f.2: enabled 1
761 11:37:42.510085 PCI: 00:1f.3: enabled 1
762 11:37:42.513302 PCI: 00:1f.4: enabled 1
763 11:37:42.516650 PCI: 00:1f.5: enabled 1
764 11:37:42.519638 PCI: 00:1f.6: enabled 0
765 11:37:42.519754 Root Device scanning...
766 11:37:42.522947 scan_static_bus for Root Device
767 11:37:42.526284 CPU_CLUSTER: 0 enabled
768 11:37:42.529437 DOMAIN: 0000 enabled
769 11:37:42.529546 DOMAIN: 0000 scanning...
770 11:37:42.532957 PCI: pci_scan_bus for bus 00
771 11:37:42.536274 PCI: 00:00.0 [8086/0000] ops
772 11:37:42.539547 PCI: 00:00.0 [8086/9b61] enabled
773 11:37:42.542900 PCI: 00:02.0 [8086/0000] bus ops
774 11:37:42.546355 PCI: 00:02.0 [8086/9b41] enabled
775 11:37:42.549595 PCI: 00:04.0 [8086/1903] disabled
776 11:37:42.552898 PCI: 00:08.0 [8086/1911] enabled
777 11:37:42.556299 PCI: 00:12.0 [8086/02f9] enabled
778 11:37:42.562791 PCI: 00:14.0 [8086/0000] bus ops
779 11:37:42.565505 PCI: 00:14.0 [8086/02ed] enabled
780 11:37:42.568775 PCI: 00:14.2 [8086/02ef] enabled
781 11:37:42.572327 PCI: 00:14.3 [8086/02f0] enabled
782 11:37:42.575415 PCI: 00:15.0 [8086/0000] bus ops
783 11:37:42.578617 PCI: 00:15.0 [8086/02e8] enabled
784 11:37:42.582539 PCI: 00:15.1 [8086/0000] bus ops
785 11:37:42.585539 PCI: 00:15.1 [8086/02e9] enabled
786 11:37:42.588638 PCI: 00:16.0 [8086/0000] ops
787 11:37:42.592255 PCI: 00:16.0 [8086/02e0] enabled
788 11:37:42.592348 PCI: 00:17.0 [8086/0000] ops
789 11:37:42.595451 PCI: 00:17.0 [8086/02d3] enabled
790 11:37:42.598538 PCI: 00:19.0 [8086/0000] bus ops
791 11:37:42.601831 PCI: 00:19.0 [8086/02c5] enabled
792 11:37:42.604677 PCI: 00:1d.0 [8086/0000] bus ops
793 11:37:42.611668 PCI: 00:1d.0 [8086/02b0] enabled
794 11:37:42.615093 PCI: Static device PCI: 00:1d.5 not found, disabling it.
795 11:37:42.617918 PCI: 00:1e.0 [8086/0000] ops
796 11:37:42.621350 PCI: 00:1e.0 [8086/02a8] enabled
797 11:37:42.624327 PCI: 00:1e.2 [8086/0000] bus ops
798 11:37:42.627666 PCI: 00:1e.2 [8086/02aa] enabled
799 11:37:42.630827 PCI: 00:1e.3 [8086/0000] bus ops
800 11:37:42.634146 PCI: 00:1e.3 [8086/02ab] enabled
801 11:37:42.637514 PCI: 00:1f.0 [8086/0000] bus ops
802 11:37:42.640780 PCI: 00:1f.0 [8086/0284] enabled
803 11:37:42.647539 PCI: Static device PCI: 00:1f.1 not found, disabling it.
804 11:37:42.654014 PCI: Static device PCI: 00:1f.2 not found, disabling it.
805 11:37:42.656887 PCI: 00:1f.3 [8086/0000] bus ops
806 11:37:42.660088 PCI: 00:1f.3 [8086/02c8] enabled
807 11:37:42.663507 PCI: 00:1f.4 [8086/0000] bus ops
808 11:37:42.666960 PCI: 00:1f.4 [8086/02a3] enabled
809 11:37:42.670254 PCI: 00:1f.5 [8086/0000] bus ops
810 11:37:42.672991 PCI: 00:1f.5 [8086/02a4] enabled
811 11:37:42.676838 PCI: Leftover static devices:
812 11:37:42.676937 PCI: 00:05.0
813 11:37:42.680241 PCI: 00:12.5
814 11:37:42.680345 PCI: 00:12.6
815 11:37:42.680439 PCI: 00:14.1
816 11:37:42.683404 PCI: 00:14.5
817 11:37:42.683500 PCI: 00:15.2
818 11:37:42.686869 PCI: 00:15.3
819 11:37:42.686974 PCI: 00:16.1
820 11:37:42.690135 PCI: 00:16.2
821 11:37:42.690242 PCI: 00:16.3
822 11:37:42.690334 PCI: 00:16.4
823 11:37:42.693414 PCI: 00:16.5
824 11:37:42.693517 PCI: 00:19.1
825 11:37:42.696526 PCI: 00:19.2
826 11:37:42.696642 PCI: 00:1a.0
827 11:37:42.696740 PCI: 00:1c.0
828 11:37:42.699632 PCI: 00:1c.1
829 11:37:42.699742 PCI: 00:1c.2
830 11:37:42.703003 PCI: 00:1c.3
831 11:37:42.703100 PCI: 00:1c.4
832 11:37:42.705767 PCI: 00:1c.5
833 11:37:42.705877 PCI: 00:1c.6
834 11:37:42.705972 PCI: 00:1c.7
835 11:37:42.709667 PCI: 00:1d.1
836 11:37:42.709783 PCI: 00:1d.2
837 11:37:42.712579 PCI: 00:1d.3
838 11:37:42.712692 PCI: 00:1d.4
839 11:37:42.715534 PCI: 00:1d.5
840 11:37:42.715631 PCI: 00:1e.1
841 11:37:42.715724 PCI: 00:1f.1
842 11:37:42.719353 PCI: 00:1f.2
843 11:37:42.719447 PCI: 00:1f.6
844 11:37:42.722459 PCI: Check your devicetree.cb.
845 11:37:42.725674 PCI: 00:02.0 scanning...
846 11:37:42.729050 scan_generic_bus for PCI: 00:02.0
847 11:37:42.732406 scan_generic_bus for PCI: 00:02.0 done
848 11:37:42.738938 scan_bus: scanning of bus PCI: 00:02.0 took 10193 usecs
849 11:37:42.741756 PCI: 00:14.0 scanning...
850 11:37:42.745112 scan_static_bus for PCI: 00:14.0
851 11:37:42.745197 USB0 port 0 enabled
852 11:37:42.748401 USB0 port 0 scanning...
853 11:37:42.751631 scan_static_bus for USB0 port 0
854 11:37:42.755167 USB2 port 0 enabled
855 11:37:42.758246 USB2 port 1 enabled
856 11:37:42.758346 USB2 port 2 disabled
857 11:37:42.761646 USB2 port 3 disabled
858 11:37:42.761750 USB2 port 5 disabled
859 11:37:42.764948 USB2 port 6 enabled
860 11:37:42.768215 USB2 port 9 enabled
861 11:37:42.768316 USB3 port 0 enabled
862 11:37:42.771179 USB3 port 1 enabled
863 11:37:42.774324 USB3 port 2 enabled
864 11:37:42.774431 USB3 port 3 enabled
865 11:37:42.777781 USB3 port 4 disabled
866 11:37:42.780962 USB2 port 0 scanning...
867 11:37:42.784530 scan_static_bus for USB2 port 0
868 11:37:42.787706 scan_static_bus for USB2 port 0 done
869 11:37:42.794181 scan_bus: scanning of bus USB2 port 0 took 9684 usecs
870 11:37:42.794318 USB2 port 1 scanning...
871 11:37:42.797540 scan_static_bus for USB2 port 1
872 11:37:42.800313 scan_static_bus for USB2 port 1 done
873 11:37:42.807199 scan_bus: scanning of bus USB2 port 1 took 9705 usecs
874 11:37:42.810747 USB2 port 6 scanning...
875 11:37:42.813958 scan_static_bus for USB2 port 6
876 11:37:42.817301 scan_static_bus for USB2 port 6 done
877 11:37:42.823305 scan_bus: scanning of bus USB2 port 6 took 9693 usecs
878 11:37:42.823400 USB2 port 9 scanning...
879 11:37:42.827225 scan_static_bus for USB2 port 9
880 11:37:42.833238 scan_static_bus for USB2 port 9 done
881 11:37:42.836531 scan_bus: scanning of bus USB2 port 9 took 9702 usecs
882 11:37:42.840062 USB3 port 0 scanning...
883 11:37:42.843299 scan_static_bus for USB3 port 0
884 11:37:42.846031 scan_static_bus for USB3 port 0 done
885 11:37:42.853072 scan_bus: scanning of bus USB3 port 0 took 9695 usecs
886 11:37:42.856171 USB3 port 1 scanning...
887 11:37:42.859612 scan_static_bus for USB3 port 1
888 11:37:42.862846 scan_static_bus for USB3 port 1 done
889 11:37:42.866091 scan_bus: scanning of bus USB3 port 1 took 9701 usecs
890 11:37:42.868987 USB3 port 2 scanning...
891 11:37:42.872849 scan_static_bus for USB3 port 2
892 11:37:42.876115 scan_static_bus for USB3 port 2 done
893 11:37:42.882161 scan_bus: scanning of bus USB3 port 2 took 9703 usecs
894 11:37:42.885615 USB3 port 3 scanning...
895 11:37:42.889021 scan_static_bus for USB3 port 3
896 11:37:42.892133 scan_static_bus for USB3 port 3 done
897 11:37:42.898805 scan_bus: scanning of bus USB3 port 3 took 9702 usecs
898 11:37:42.902120 scan_static_bus for USB0 port 0 done
899 11:37:42.905273 scan_bus: scanning of bus USB0 port 0 took 155299 usecs
900 11:37:42.911404 scan_static_bus for PCI: 00:14.0 done
901 11:37:42.915116 scan_bus: scanning of bus PCI: 00:14.0 took 172907 usecs
902 11:37:42.918404 PCI: 00:15.0 scanning...
903 11:37:42.921498 scan_generic_bus for PCI: 00:15.0
904 11:37:42.928141 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
905 11:37:42.931447 scan_generic_bus for PCI: 00:15.0 done
906 11:37:42.934605 scan_bus: scanning of bus PCI: 00:15.0 took 14292 usecs
907 11:37:42.937751 PCI: 00:15.1 scanning...
908 11:37:42.940953 scan_generic_bus for PCI: 00:15.1
909 11:37:42.947564 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
910 11:37:42.950854 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
911 11:37:42.954186 scan_generic_bus for PCI: 00:15.1 done
912 11:37:42.960872 scan_bus: scanning of bus PCI: 00:15.1 took 18589 usecs
913 11:37:42.963677 PCI: 00:19.0 scanning...
914 11:37:42.967258 scan_generic_bus for PCI: 00:19.0
915 11:37:42.970401 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
916 11:37:42.973901 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
917 11:37:42.977249 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
918 11:37:42.983235 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
919 11:37:42.986642 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
920 11:37:42.989986 scan_generic_bus for PCI: 00:19.0 done
921 11:37:42.996061 scan_bus: scanning of bus PCI: 00:19.0 took 30713 usecs
922 11:37:42.999892 PCI: 00:1d.0 scanning...
923 11:37:43.003051 do_pci_scan_bridge for PCI: 00:1d.0
924 11:37:43.006270 PCI: pci_scan_bus for bus 01
925 11:37:43.009486 PCI: 01:00.0 [1c5c/1327] enabled
926 11:37:43.013057 Enabling Common Clock Configuration
927 11:37:43.016103 L1 Sub-State supported from root port 29
928 11:37:43.019471 L1 Sub-State Support = 0xf
929 11:37:43.022785 CommonModeRestoreTime = 0x28
930 11:37:43.026002 Power On Value = 0x16, Power On Scale = 0x0
931 11:37:43.029012 ASPM: Enabled L1
932 11:37:43.035851 scan_bus: scanning of bus PCI: 00:1d.0 took 32775 usecs
933 11:37:43.035948 PCI: 00:1e.2 scanning...
934 11:37:43.039211 scan_generic_bus for PCI: 00:1e.2
935 11:37:43.045669 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
936 11:37:43.048951 scan_generic_bus for PCI: 00:1e.2 done
937 11:37:43.055519 scan_bus: scanning of bus PCI: 00:1e.2 took 14008 usecs
938 11:37:43.055622 PCI: 00:1e.3 scanning...
939 11:37:43.058145 scan_generic_bus for PCI: 00:1e.3
940 11:37:43.064623 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
941 11:37:43.068013 scan_generic_bus for PCI: 00:1e.3 done
942 11:37:43.074450 scan_bus: scanning of bus PCI: 00:1e.3 took 13994 usecs
943 11:37:43.074544 PCI: 00:1f.0 scanning...
944 11:37:43.077818 scan_static_bus for PCI: 00:1f.0
945 11:37:43.081276 PNP: 0c09.0 enabled
946 11:37:43.084532 scan_static_bus for PCI: 00:1f.0 done
947 11:37:43.091266 scan_bus: scanning of bus PCI: 00:1f.0 took 12052 usecs
948 11:37:43.094557 PCI: 00:1f.3 scanning...
949 11:37:43.097247 scan_bus: scanning of bus PCI: 00:1f.3 took 2851 usecs
950 11:37:43.101171 PCI: 00:1f.4 scanning...
951 11:37:43.103692 scan_generic_bus for PCI: 00:1f.4
952 11:37:43.110363 scan_generic_bus for PCI: 00:1f.4 done
953 11:37:43.114234 scan_bus: scanning of bus PCI: 00:1f.4 took 10174 usecs
954 11:37:43.116881 PCI: 00:1f.5 scanning...
955 11:37:43.120780 scan_generic_bus for PCI: 00:1f.5
956 11:37:43.123930 scan_generic_bus for PCI: 00:1f.5 done
957 11:37:43.130257 scan_bus: scanning of bus PCI: 00:1f.5 took 10176 usecs
958 11:37:43.136680 scan_bus: scanning of bus DOMAIN: 0000 took 604783 usecs
959 11:37:43.139839 scan_static_bus for Root Device done
960 11:37:43.146369 scan_bus: scanning of bus Root Device took 624649 usecs
961 11:37:43.146506 done
962 11:37:43.150117 Chrome EC: UHEPI supported
963 11:37:43.156311 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
964 11:37:43.159710 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
965 11:37:43.166459 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
966 11:37:43.173009 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
967 11:37:43.176615 SPI flash protection: WPSW=0 SRP0=0
968 11:37:43.183170 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
969 11:37:43.189584 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
970 11:37:43.189733 found VGA at PCI: 00:02.0
971 11:37:43.192892 Setting up VGA for PCI: 00:02.0
972 11:37:43.199610 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
973 11:37:43.202780 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
974 11:37:43.206183 Allocating resources...
975 11:37:43.209008 Reading resources...
976 11:37:43.212125 Root Device read_resources bus 0 link: 0
977 11:37:43.218698 CPU_CLUSTER: 0 read_resources bus 0 link: 0
978 11:37:43.222112 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
979 11:37:43.225036 DOMAIN: 0000 read_resources bus 0 link: 0
980 11:37:43.233235 PCI: 00:14.0 read_resources bus 0 link: 0
981 11:37:43.236521 USB0 port 0 read_resources bus 0 link: 0
982 11:37:43.245174 USB0 port 0 read_resources bus 0 link: 0 done
983 11:37:43.247713 PCI: 00:14.0 read_resources bus 0 link: 0 done
984 11:37:43.255554 PCI: 00:15.0 read_resources bus 1 link: 0
985 11:37:43.259029 PCI: 00:15.0 read_resources bus 1 link: 0 done
986 11:37:43.265503 PCI: 00:15.1 read_resources bus 2 link: 0
987 11:37:43.268689 PCI: 00:15.1 read_resources bus 2 link: 0 done
988 11:37:43.276528 PCI: 00:19.0 read_resources bus 3 link: 0
989 11:37:43.282634 PCI: 00:19.0 read_resources bus 3 link: 0 done
990 11:37:43.285838 PCI: 00:1d.0 read_resources bus 1 link: 0
991 11:37:43.292364 PCI: 00:1d.0 read_resources bus 1 link: 0 done
992 11:37:43.295615 PCI: 00:1e.2 read_resources bus 4 link: 0
993 11:37:43.302310 PCI: 00:1e.2 read_resources bus 4 link: 0 done
994 11:37:43.305543 PCI: 00:1e.3 read_resources bus 5 link: 0
995 11:37:43.312213 PCI: 00:1e.3 read_resources bus 5 link: 0 done
996 11:37:43.315542 PCI: 00:1f.0 read_resources bus 0 link: 0
997 11:37:43.322179 PCI: 00:1f.0 read_resources bus 0 link: 0 done
998 11:37:43.328521 DOMAIN: 0000 read_resources bus 0 link: 0 done
999 11:37:43.331727 Root Device read_resources bus 0 link: 0 done
1000 11:37:43.335755 Done reading resources.
1001 11:37:43.341951 Show resources in subtree (Root Device)...After reading.
1002 11:37:43.345053 Root Device child on link 0 CPU_CLUSTER: 0
1003 11:37:43.348368 CPU_CLUSTER: 0 child on link 0 APIC: 00
1004 11:37:43.351821 APIC: 00
1005 11:37:43.351941 APIC: 02
1006 11:37:43.354986 APIC: 04
1007 11:37:43.355094 APIC: 01
1008 11:37:43.355180 APIC: 03
1009 11:37:43.397432 APIC: 05
1010 11:37:43.397580 APIC: 07
1011 11:37:43.397673 APIC: 06
1012 11:37:43.397950 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1013 11:37:43.398042 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1014 11:37:43.398134 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1015 11:37:43.398217 PCI: 00:00.0
1016 11:37:43.407995 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1017 11:37:43.408147 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1018 11:37:43.414681 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1019 11:37:43.420499 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1020 11:37:43.430462 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1021 11:37:43.440483 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1022 11:37:43.450517 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1023 11:37:43.459828 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1024 11:37:43.469811 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1025 11:37:43.476284 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1026 11:37:43.485670 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1027 11:37:43.495591 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1028 11:37:43.505272 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1029 11:37:43.515595 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1030 11:37:43.524914 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1031 11:37:43.535023 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1032 11:37:43.535170 PCI: 00:02.0
1033 11:37:43.548116 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1034 11:37:43.557748 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1035 11:37:43.564330 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1036 11:37:43.567063 PCI: 00:04.0
1037 11:37:43.567171 PCI: 00:08.0
1038 11:37:43.577308 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1039 11:37:43.580524 PCI: 00:12.0
1040 11:37:43.589843 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1041 11:37:43.593281 PCI: 00:14.0 child on link 0 USB0 port 0
1042 11:37:43.603184 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1043 11:37:43.609816 USB0 port 0 child on link 0 USB2 port 0
1044 11:37:43.609958 USB2 port 0
1045 11:37:43.613118 USB2 port 1
1046 11:37:43.613214 USB2 port 2
1047 11:37:43.616172 USB2 port 3
1048 11:37:43.616287 USB2 port 5
1049 11:37:43.619399 USB2 port 6
1050 11:37:43.619518 USB2 port 9
1051 11:37:43.622735 USB3 port 0
1052 11:37:43.626075 USB3 port 1
1053 11:37:43.626167 USB3 port 2
1054 11:37:43.629602 USB3 port 3
1055 11:37:43.629699 USB3 port 4
1056 11:37:43.632836 PCI: 00:14.2
1057 11:37:43.642240 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1058 11:37:43.652010 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1059 11:37:43.652167 PCI: 00:14.3
1060 11:37:43.662094 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1061 11:37:43.668592 PCI: 00:15.0 child on link 0 I2C: 01:15
1062 11:37:43.677911 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1063 11:37:43.678029 I2C: 01:15
1064 11:37:43.681089 PCI: 00:15.1 child on link 0 I2C: 02:5d
1065 11:37:43.691343 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1066 11:37:43.694659 I2C: 02:5d
1067 11:37:43.697413 GENERIC: 0.0
1068 11:37:43.697558 PCI: 00:16.0
1069 11:37:43.707468 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1070 11:37:43.710756 PCI: 00:17.0
1071 11:37:43.717073 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1072 11:37:43.726920 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1073 11:37:43.736947 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1074 11:37:43.743605 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1075 11:37:43.753186 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1076 11:37:43.763009 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1077 11:37:43.766175 PCI: 00:19.0 child on link 0 I2C: 03:1a
1078 11:37:43.776018 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1079 11:37:43.776199 I2C: 03:1a
1080 11:37:43.778881 I2C: 03:38
1081 11:37:43.779050 I2C: 03:39
1082 11:37:43.782628 I2C: 03:3a
1083 11:37:43.782780 I2C: 03:3b
1084 11:37:43.789248 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1085 11:37:43.795171 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1086 11:37:43.805187 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1087 11:37:43.815031 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1088 11:37:43.818263 PCI: 01:00.0
1089 11:37:43.828389 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1090 11:37:43.828560 PCI: 00:1e.0
1091 11:37:43.840714 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1092 11:37:43.850893 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1093 11:37:43.854239 PCI: 00:1e.2 child on link 0 SPI: 00
1094 11:37:43.864157 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1095 11:37:43.864321 SPI: 00
1096 11:37:43.870213 PCI: 00:1e.3 child on link 0 SPI: 01
1097 11:37:43.879831 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1098 11:37:43.879987 SPI: 01
1099 11:37:43.883673 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1100 11:37:43.893006 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1101 11:37:43.902683 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1102 11:37:43.902849 PNP: 0c09.0
1103 11:37:43.912781 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1104 11:37:43.912941 PCI: 00:1f.3
1105 11:37:43.925504 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1106 11:37:43.935655 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1107 11:37:43.935831 PCI: 00:1f.4
1108 11:37:43.945440 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1109 11:37:43.954934 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1110 11:37:43.955110 PCI: 00:1f.5
1111 11:37:43.964781 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1112 11:37:43.971534 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1113 11:37:43.977972 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1114 11:37:43.984891 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1115 11:37:43.987531 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1116 11:37:43.990809 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1117 11:37:43.994056 PCI: 00:17.0 18 * [0x60 - 0x67] io
1118 11:37:44.000523 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1119 11:37:44.007683 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1120 11:37:44.013955 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1121 11:37:44.020504 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1122 11:37:44.030463 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1123 11:37:44.036488 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1124 11:37:44.039825 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1125 11:37:44.046313 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1126 11:37:44.052962 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1127 11:37:44.056351 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1128 11:37:44.062351 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1129 11:37:44.065827 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1130 11:37:44.072194 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1131 11:37:44.075515 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1132 11:37:44.081991 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1133 11:37:44.085457 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1134 11:37:44.091844 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1135 11:37:44.095114 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1136 11:37:44.101596 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1137 11:37:44.104874 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1138 11:37:44.111556 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1139 11:37:44.114644 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1140 11:37:44.121155 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1141 11:37:44.124288 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1142 11:37:44.131042 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1143 11:37:44.134245 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1144 11:37:44.141081 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1145 11:37:44.144410 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1146 11:37:44.150527 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1147 11:37:44.154005 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1148 11:37:44.160396 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1149 11:37:44.166602 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1150 11:37:44.170162 avoid_fixed_resources: DOMAIN: 0000
1151 11:37:44.176857 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1152 11:37:44.182966 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1153 11:37:44.189455 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1154 11:37:44.199476 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1155 11:37:44.205998 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1156 11:37:44.215390 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1157 11:37:44.222002 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1158 11:37:44.228634 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1159 11:37:44.237978 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1160 11:37:44.245102 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1161 11:37:44.251500 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1162 11:37:44.258031 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1163 11:37:44.261416 Setting resources...
1164 11:37:44.267332 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1165 11:37:44.270614 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1166 11:37:44.273789 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1167 11:37:44.280300 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1168 11:37:44.283879 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1169 11:37:44.290458 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1170 11:37:44.297125 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1171 11:37:44.303779 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1172 11:37:44.309561 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1173 11:37:44.316205 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1174 11:37:44.319379 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1175 11:37:44.326258 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1176 11:37:44.329314 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1177 11:37:44.336266 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1178 11:37:44.339446 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1179 11:37:44.345413 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1180 11:37:44.349030 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1181 11:37:44.352124 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1182 11:37:44.358930 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1183 11:37:44.362316 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1184 11:37:44.368464 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1185 11:37:44.371697 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1186 11:37:44.378365 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1187 11:37:44.382109 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1188 11:37:44.388027 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1189 11:37:44.391861 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1190 11:37:44.398367 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1191 11:37:44.401737 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1192 11:37:44.408115 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1193 11:37:44.410864 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1194 11:37:44.417932 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1195 11:37:44.420511 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1196 11:37:44.430619 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1197 11:37:44.437420 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1198 11:37:44.443428 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1199 11:37:44.449961 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1200 11:37:44.456640 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1201 11:37:44.463230 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1202 11:37:44.469483 Root Device assign_resources, bus 0 link: 0
1203 11:37:44.472676 DOMAIN: 0000 assign_resources, bus 0 link: 0
1204 11:37:44.482353 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1205 11:37:44.489517 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1206 11:37:44.498847 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1207 11:37:44.505919 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1208 11:37:44.515130 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1209 11:37:44.521587 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1210 11:37:44.528214 PCI: 00:14.0 assign_resources, bus 0 link: 0
1211 11:37:44.531441 PCI: 00:14.0 assign_resources, bus 0 link: 0
1212 11:37:44.541535 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1213 11:37:44.548148 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1214 11:37:44.557489 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1215 11:37:44.564046 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1216 11:37:44.570949 PCI: 00:15.0 assign_resources, bus 1 link: 0
1217 11:37:44.573591 PCI: 00:15.0 assign_resources, bus 1 link: 0
1218 11:37:44.583548 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1219 11:37:44.586881 PCI: 00:15.1 assign_resources, bus 2 link: 0
1220 11:37:44.590013 PCI: 00:15.1 assign_resources, bus 2 link: 0
1221 11:37:44.599951 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1222 11:37:44.606447 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1223 11:37:44.616386 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1224 11:37:44.622758 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1225 11:37:44.632401 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1226 11:37:44.638905 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1227 11:37:44.645566 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1228 11:37:44.654844 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1229 11:37:44.658778 PCI: 00:19.0 assign_resources, bus 3 link: 0
1230 11:37:44.664671 PCI: 00:19.0 assign_resources, bus 3 link: 0
1231 11:37:44.671859 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1232 11:37:44.681334 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1233 11:37:44.690983 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1234 11:37:44.694395 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1235 11:37:44.704232 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1236 11:37:44.707308 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1237 11:37:44.716863 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1238 11:37:44.723578 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1239 11:37:44.727042 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1240 11:37:44.733962 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1241 11:37:44.740350 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1242 11:37:44.746841 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1243 11:37:44.750198 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1244 11:37:44.756830 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1245 11:37:44.760027 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1246 11:37:44.766140 LPC: Trying to open IO window from 800 size 1ff
1247 11:37:44.772816 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1248 11:37:44.782761 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1249 11:37:44.788939 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1250 11:37:44.798587 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1251 11:37:44.801977 DOMAIN: 0000 assign_resources, bus 0 link: 0
1252 11:37:44.808786 Root Device assign_resources, bus 0 link: 0
1253 11:37:44.808912 Done setting resources.
1254 11:37:44.815231 Show resources in subtree (Root Device)...After assigning values.
1255 11:37:44.822223 Root Device child on link 0 CPU_CLUSTER: 0
1256 11:37:44.824877 CPU_CLUSTER: 0 child on link 0 APIC: 00
1257 11:37:44.824975 APIC: 00
1258 11:37:44.828316 APIC: 02
1259 11:37:44.828403 APIC: 04
1260 11:37:44.831501 APIC: 01
1261 11:37:44.831619 APIC: 03
1262 11:37:44.831708 APIC: 05
1263 11:37:44.834724 APIC: 07
1264 11:37:44.834833 APIC: 06
1265 11:37:44.838174 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1266 11:37:44.848151 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1267 11:37:44.860831 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1268 11:37:44.860981 PCI: 00:00.0
1269 11:37:44.870460 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1270 11:37:44.880342 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1271 11:37:44.890443 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1272 11:37:44.900390 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1273 11:37:44.910166 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1274 11:37:44.919444 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1275 11:37:44.926085 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1276 11:37:44.935995 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1277 11:37:44.946004 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1278 11:37:44.955457 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1279 11:37:44.965148 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1280 11:37:44.975046 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1281 11:37:44.984929 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1282 11:37:44.994879 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1283 11:37:45.001601 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1284 11:37:45.011229 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1285 11:37:45.014386 PCI: 00:02.0
1286 11:37:45.023895 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1287 11:37:45.034158 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1288 11:37:45.044032 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1289 11:37:45.046763 PCI: 00:04.0
1290 11:37:45.046871 PCI: 00:08.0
1291 11:37:45.056913 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1292 11:37:45.060055 PCI: 00:12.0
1293 11:37:45.069501 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1294 11:37:45.073278 PCI: 00:14.0 child on link 0 USB0 port 0
1295 11:37:45.082720 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1296 11:37:45.089459 USB0 port 0 child on link 0 USB2 port 0
1297 11:37:45.089612 USB2 port 0
1298 11:37:45.092644 USB2 port 1
1299 11:37:45.092761 USB2 port 2
1300 11:37:45.095621 USB2 port 3
1301 11:37:45.099188 USB2 port 5
1302 11:37:45.099335 USB2 port 6
1303 11:37:45.102582 USB2 port 9
1304 11:37:45.102688 USB3 port 0
1305 11:37:45.105267 USB3 port 1
1306 11:37:45.105367 USB3 port 2
1307 11:37:45.109193 USB3 port 3
1308 11:37:45.109318 USB3 port 4
1309 11:37:45.111839 PCI: 00:14.2
1310 11:37:45.121592 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1311 11:37:45.131690 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1312 11:37:45.134665 PCI: 00:14.3
1313 11:37:45.144367 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1314 11:37:45.148000 PCI: 00:15.0 child on link 0 I2C: 01:15
1315 11:37:45.157724 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1316 11:37:45.161211 I2C: 01:15
1317 11:37:45.164450 PCI: 00:15.1 child on link 0 I2C: 02:5d
1318 11:37:45.173846 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1319 11:37:45.176776 I2C: 02:5d
1320 11:37:45.176882 GENERIC: 0.0
1321 11:37:45.180639 PCI: 00:16.0
1322 11:37:45.190531 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1323 11:37:45.190649 PCI: 00:17.0
1324 11:37:45.203511 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1325 11:37:45.213060 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1326 11:37:45.220001 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1327 11:37:45.229163 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1328 11:37:45.239025 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1329 11:37:45.249615 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1330 11:37:45.252635 PCI: 00:19.0 child on link 0 I2C: 03:1a
1331 11:37:45.262517 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1332 11:37:45.265749 I2C: 03:1a
1333 11:37:45.265852 I2C: 03:38
1334 11:37:45.269224 I2C: 03:39
1335 11:37:45.269328 I2C: 03:3a
1336 11:37:45.272695 I2C: 03:3b
1337 11:37:45.276627 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1338 11:37:45.286442 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1339 11:37:45.296288 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1340 11:37:45.306179 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1341 11:37:45.309111 PCI: 01:00.0
1342 11:37:45.318891 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1343 11:37:45.319044 PCI: 00:1e.0
1344 11:37:45.332546 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1345 11:37:45.342362 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1346 11:37:45.345037 PCI: 00:1e.2 child on link 0 SPI: 00
1347 11:37:45.355033 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1348 11:37:45.358251 SPI: 00
1349 11:37:45.361282 PCI: 00:1e.3 child on link 0 SPI: 01
1350 11:37:45.370975 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1351 11:37:45.371128 SPI: 01
1352 11:37:45.377792 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1353 11:37:45.384589 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1354 11:37:45.394301 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1355 11:37:45.397503 PNP: 0c09.0
1356 11:37:45.404115 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1357 11:37:45.407084 PCI: 00:1f.3
1358 11:37:45.417018 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1359 11:37:45.427082 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1360 11:37:45.429789 PCI: 00:1f.4
1361 11:37:45.436382 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1362 11:37:45.449534 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1363 11:37:45.449693 PCI: 00:1f.5
1364 11:37:45.459406 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1365 11:37:45.462644 Done allocating resources.
1366 11:37:45.469223 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1367 11:37:45.472311 Enabling resources...
1368 11:37:45.475271 PCI: 00:00.0 subsystem <- 8086/9b61
1369 11:37:45.478480 PCI: 00:00.0 cmd <- 06
1370 11:37:45.481904 PCI: 00:02.0 subsystem <- 8086/9b41
1371 11:37:45.485169 PCI: 00:02.0 cmd <- 03
1372 11:37:45.485293 PCI: 00:08.0 cmd <- 06
1373 11:37:45.492021 PCI: 00:12.0 subsystem <- 8086/02f9
1374 11:37:45.492144 PCI: 00:12.0 cmd <- 02
1375 11:37:45.495405 PCI: 00:14.0 subsystem <- 8086/02ed
1376 11:37:45.498576 PCI: 00:14.0 cmd <- 02
1377 11:37:45.501860 PCI: 00:14.2 cmd <- 02
1378 11:37:45.505203 PCI: 00:14.3 subsystem <- 8086/02f0
1379 11:37:45.508134 PCI: 00:14.3 cmd <- 02
1380 11:37:45.511912 PCI: 00:15.0 subsystem <- 8086/02e8
1381 11:37:45.514892 PCI: 00:15.0 cmd <- 02
1382 11:37:45.518292 PCI: 00:15.1 subsystem <- 8086/02e9
1383 11:37:45.521114 PCI: 00:15.1 cmd <- 02
1384 11:37:45.524602 PCI: 00:16.0 subsystem <- 8086/02e0
1385 11:37:45.527996 PCI: 00:16.0 cmd <- 02
1386 11:37:45.531465 PCI: 00:17.0 subsystem <- 8086/02d3
1387 11:37:45.534617 PCI: 00:17.0 cmd <- 03
1388 11:37:45.537553 PCI: 00:19.0 subsystem <- 8086/02c5
1389 11:37:45.540852 PCI: 00:19.0 cmd <- 02
1390 11:37:45.544172 PCI: 00:1d.0 bridge ctrl <- 0013
1391 11:37:45.547331 PCI: 00:1d.0 subsystem <- 8086/02b0
1392 11:37:45.547447 PCI: 00:1d.0 cmd <- 06
1393 11:37:45.554353 PCI: 00:1e.0 subsystem <- 8086/02a8
1394 11:37:45.554495 PCI: 00:1e.0 cmd <- 06
1395 11:37:45.560933 PCI: 00:1e.2 subsystem <- 8086/02aa
1396 11:37:45.561076 PCI: 00:1e.2 cmd <- 06
1397 11:37:45.563958 PCI: 00:1e.3 subsystem <- 8086/02ab
1398 11:37:45.567323 PCI: 00:1e.3 cmd <- 02
1399 11:37:45.570590 PCI: 00:1f.0 subsystem <- 8086/0284
1400 11:37:45.573927 PCI: 00:1f.0 cmd <- 407
1401 11:37:45.577119 PCI: 00:1f.3 subsystem <- 8086/02c8
1402 11:37:45.580308 PCI: 00:1f.3 cmd <- 02
1403 11:37:45.583756 PCI: 00:1f.4 subsystem <- 8086/02a3
1404 11:37:45.586918 PCI: 00:1f.4 cmd <- 03
1405 11:37:45.590388 PCI: 00:1f.5 subsystem <- 8086/02a4
1406 11:37:45.593009 PCI: 00:1f.5 cmd <- 406
1407 11:37:45.602165 PCI: 01:00.0 cmd <- 02
1408 11:37:45.607020 done.
1409 11:37:45.619322 ME: Version: 14.0.39.1367
1410 11:37:45.626196 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1411 11:37:45.629507 Initializing devices...
1412 11:37:45.629637 Root Device init ...
1413 11:37:45.636174 Chrome EC: Set SMI mask to 0x0000000000000000
1414 11:37:45.642655 Chrome EC: clear events_b mask to 0x0000000000000000
1415 11:37:45.646015 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1416 11:37:45.652174 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1417 11:37:45.658818 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1418 11:37:45.662146 Chrome EC: Set WAKE mask to 0x0000000000000000
1419 11:37:45.668624 Root Device init finished in 35163 usecs
1420 11:37:45.671653 CPU_CLUSTER: 0 init ...
1421 11:37:45.674865 CPU_CLUSTER: 0 init finished in 2447 usecs
1422 11:37:45.680283 PCI: 00:00.0 init ...
1423 11:37:45.683616 CPU TDP: 15 Watts
1424 11:37:45.686873 CPU PL2 = 64 Watts
1425 11:37:45.690147 PCI: 00:00.0 init finished in 7070 usecs
1426 11:37:45.693746 PCI: 00:02.0 init ...
1427 11:37:45.696296 PCI: 00:02.0 init finished in 2251 usecs
1428 11:37:45.699624 PCI: 00:08.0 init ...
1429 11:37:45.702823 PCI: 00:08.0 init finished in 2251 usecs
1430 11:37:45.706422 PCI: 00:12.0 init ...
1431 11:37:45.709597 PCI: 00:12.0 init finished in 2241 usecs
1432 11:37:45.712503 PCI: 00:14.0 init ...
1433 11:37:45.715643 PCI: 00:14.0 init finished in 2250 usecs
1434 11:37:45.718959 PCI: 00:14.2 init ...
1435 11:37:45.722354 PCI: 00:14.2 init finished in 2251 usecs
1436 11:37:45.725769 PCI: 00:14.3 init ...
1437 11:37:45.729138 PCI: 00:14.3 init finished in 2269 usecs
1438 11:37:45.732426 PCI: 00:15.0 init ...
1439 11:37:45.736060 DW I2C bus 0 at 0xd121f000 (400 KHz)
1440 11:37:45.742322 PCI: 00:15.0 init finished in 5974 usecs
1441 11:37:45.742445 PCI: 00:15.1 init ...
1442 11:37:45.748872 DW I2C bus 1 at 0xd1220000 (400 KHz)
1443 11:37:45.752168 PCI: 00:15.1 init finished in 5974 usecs
1444 11:37:45.755266 PCI: 00:16.0 init ...
1445 11:37:45.758741 PCI: 00:16.0 init finished in 2252 usecs
1446 11:37:45.762211 PCI: 00:19.0 init ...
1447 11:37:45.764635 DW I2C bus 4 at 0xd1222000 (400 KHz)
1448 11:37:45.768043 PCI: 00:19.0 init finished in 5973 usecs
1449 11:37:45.771450 PCI: 00:1d.0 init ...
1450 11:37:45.774727 Initializing PCH PCIe bridge.
1451 11:37:45.777988 PCI: 00:1d.0 init finished in 5273 usecs
1452 11:37:45.782024 PCI: 00:1f.0 init ...
1453 11:37:45.785202 IOAPIC: Initializing IOAPIC at 0xfec00000
1454 11:37:45.792060 IOAPIC: Bootstrap Processor Local APIC = 0x00
1455 11:37:45.792186 IOAPIC: ID = 0x02
1456 11:37:45.794735 IOAPIC: Dumping registers
1457 11:37:45.798248 reg 0x0000: 0x02000000
1458 11:37:45.801597 reg 0x0001: 0x00770020
1459 11:37:45.804619 reg 0x0002: 0x00000000
1460 11:37:45.808122 PCI: 00:1f.0 init finished in 23536 usecs
1461 11:37:45.811336 PCI: 00:1f.4 init ...
1462 11:37:45.814601 PCI: 00:1f.4 init finished in 2261 usecs
1463 11:37:45.825991 PCI: 01:00.0 init ...
1464 11:37:45.829530 PCI: 01:00.0 init finished in 2241 usecs
1465 11:37:45.834166 PNP: 0c09.0 init ...
1466 11:37:45.836642 Google Chrome EC uptime: 8.148 seconds
1467 11:37:45.843285 Google Chrome AP resets since EC boot: 0
1468 11:37:45.846979 Google Chrome most recent AP reset causes:
1469 11:37:45.853277 Google Chrome EC reset flags at last EC boot: reset-pin | hard | ap-off
1470 11:37:45.856276 PNP: 0c09.0 init finished in 22044 usecs
1471 11:37:45.859694 Devices initialized
1472 11:37:45.863291 Show all devs... After init.
1473 11:37:45.866724 Root Device: enabled 1
1474 11:37:45.869544 CPU_CLUSTER: 0: enabled 1
1475 11:37:45.869644 DOMAIN: 0000: enabled 1
1476 11:37:45.872782 APIC: 00: enabled 1
1477 11:37:45.876026 PCI: 00:00.0: enabled 1
1478 11:37:45.876126 PCI: 00:02.0: enabled 1
1479 11:37:45.879361 PCI: 00:04.0: enabled 0
1480 11:37:45.883220 PCI: 00:05.0: enabled 0
1481 11:37:45.886379 PCI: 00:12.0: enabled 1
1482 11:37:45.886505 PCI: 00:12.5: enabled 0
1483 11:37:45.889485 PCI: 00:12.6: enabled 0
1484 11:37:45.892719 PCI: 00:14.0: enabled 1
1485 11:37:45.896158 PCI: 00:14.1: enabled 0
1486 11:37:45.896267 PCI: 00:14.3: enabled 1
1487 11:37:45.899510 PCI: 00:14.5: enabled 0
1488 11:37:45.902189 PCI: 00:15.0: enabled 1
1489 11:37:45.905574 PCI: 00:15.1: enabled 1
1490 11:37:45.905680 PCI: 00:15.2: enabled 0
1491 11:37:45.908881 PCI: 00:15.3: enabled 0
1492 11:37:45.912427 PCI: 00:16.0: enabled 1
1493 11:37:45.915318 PCI: 00:16.1: enabled 0
1494 11:37:45.915435 PCI: 00:16.2: enabled 0
1495 11:37:45.918410 PCI: 00:16.3: enabled 0
1496 11:37:45.922127 PCI: 00:16.4: enabled 0
1497 11:37:45.925379 PCI: 00:16.5: enabled 0
1498 11:37:45.925483 PCI: 00:17.0: enabled 1
1499 11:37:45.928376 PCI: 00:19.0: enabled 1
1500 11:37:45.931901 PCI: 00:19.1: enabled 0
1501 11:37:45.934660 PCI: 00:19.2: enabled 0
1502 11:37:45.934754 PCI: 00:1a.0: enabled 0
1503 11:37:45.938526 PCI: 00:1c.0: enabled 0
1504 11:37:45.941274 PCI: 00:1c.1: enabled 0
1505 11:37:45.944565 PCI: 00:1c.2: enabled 0
1506 11:37:45.944676 PCI: 00:1c.3: enabled 0
1507 11:37:45.948221 PCI: 00:1c.4: enabled 0
1508 11:37:45.951214 PCI: 00:1c.5: enabled 0
1509 11:37:45.954128 PCI: 00:1c.6: enabled 0
1510 11:37:45.954232 PCI: 00:1c.7: enabled 0
1511 11:37:45.957860 PCI: 00:1d.0: enabled 1
1512 11:37:45.961097 PCI: 00:1d.1: enabled 0
1513 11:37:45.964238 PCI: 00:1d.2: enabled 0
1514 11:37:45.964339 PCI: 00:1d.3: enabled 0
1515 11:37:45.967442 PCI: 00:1d.4: enabled 0
1516 11:37:45.971012 PCI: 00:1d.5: enabled 0
1517 11:37:45.973961 PCI: 00:1e.0: enabled 1
1518 11:37:45.974062 PCI: 00:1e.1: enabled 0
1519 11:37:45.977208 PCI: 00:1e.2: enabled 1
1520 11:37:45.980668 PCI: 00:1e.3: enabled 1
1521 11:37:45.984029 PCI: 00:1f.0: enabled 1
1522 11:37:45.984130 PCI: 00:1f.1: enabled 0
1523 11:37:45.987367 PCI: 00:1f.2: enabled 0
1524 11:37:45.990742 PCI: 00:1f.3: enabled 1
1525 11:37:45.990861 PCI: 00:1f.4: enabled 1
1526 11:37:45.993382 PCI: 00:1f.5: enabled 1
1527 11:37:45.997066 PCI: 00:1f.6: enabled 0
1528 11:37:46.000095 USB0 port 0: enabled 1
1529 11:37:46.000198 I2C: 01:15: enabled 1
1530 11:37:46.003415 I2C: 02:5d: enabled 1
1531 11:37:46.006931 GENERIC: 0.0: enabled 1
1532 11:37:46.010258 I2C: 03:1a: enabled 1
1533 11:37:46.010358 I2C: 03:38: enabled 1
1534 11:37:46.013017 I2C: 03:39: enabled 1
1535 11:37:46.016206 I2C: 03:3a: enabled 1
1536 11:37:46.016304 I2C: 03:3b: enabled 1
1537 11:37:46.019588 PCI: 00:00.0: enabled 1
1538 11:37:46.022713 SPI: 00: enabled 1
1539 11:37:46.022905 SPI: 01: enabled 1
1540 11:37:46.026643 PNP: 0c09.0: enabled 1
1541 11:37:46.029513 USB2 port 0: enabled 1
1542 11:37:46.029613 USB2 port 1: enabled 1
1543 11:37:46.032476 USB2 port 2: enabled 0
1544 11:37:46.036139 USB2 port 3: enabled 0
1545 11:37:46.036258 USB2 port 5: enabled 0
1546 11:37:46.039218 USB2 port 6: enabled 1
1547 11:37:46.042365 USB2 port 9: enabled 1
1548 11:37:46.045589 USB3 port 0: enabled 1
1549 11:37:46.045691 USB3 port 1: enabled 1
1550 11:37:46.049020 USB3 port 2: enabled 1
1551 11:37:46.052279 USB3 port 3: enabled 1
1552 11:37:46.052387 USB3 port 4: enabled 0
1553 11:37:46.055475 APIC: 02: enabled 1
1554 11:37:46.058777 APIC: 04: enabled 1
1555 11:37:46.058893 APIC: 01: enabled 1
1556 11:37:46.062170 APIC: 03: enabled 1
1557 11:37:46.065253 APIC: 05: enabled 1
1558 11:37:46.065369 APIC: 07: enabled 1
1559 11:37:46.068415 APIC: 06: enabled 1
1560 11:37:46.071554 PCI: 00:08.0: enabled 1
1561 11:37:46.071692 PCI: 00:14.2: enabled 1
1562 11:37:46.074976 PCI: 01:00.0: enabled 1
1563 11:37:46.078575 Disabling ACPI via APMC:
1564 11:37:46.082313 done.
1565 11:37:46.085764 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1566 11:37:46.088884 ELOG: NV offset 0xaf0000 size 0x4000
1567 11:37:46.096220 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1568 11:37:46.102934 ELOG: Event(17) added with size 13 at 2024-07-02 11:37:45 UTC
1569 11:37:46.109449 ELOG: Event(92) added with size 9 at 2024-07-02 11:37:45 UTC
1570 11:37:46.116267 ELOG: Event(93) added with size 9 at 2024-07-02 11:37:45 UTC
1571 11:37:46.122778 ELOG: Event(9E) added with size 10 at 2024-07-02 11:37:45 UTC
1572 11:37:46.129414 ELOG: Event(9F) added with size 14 at 2024-07-02 11:37:45 UTC
1573 11:37:46.135466 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1574 11:37:46.142110 ELOG: Event(A1) added with size 10 at 2024-07-02 11:37:45 UTC
1575 11:37:46.148574 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
1576 11:37:46.155546 ELOG: Event(A0) added with size 9 at 2024-07-02 11:37:45 UTC
1577 11:37:46.158500 elog_add_boot_reason: Logged dev mode boot
1578 11:37:46.161964 Finalize devices...
1579 11:37:46.164988 PCI: 00:17.0 final
1580 11:37:46.165089 Devices finalized
1581 11:37:46.171557 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1582 11:37:46.174810 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1583 11:37:46.181529 ME: HFSTS1 : 0x90000245
1584 11:37:46.184979 ME: HFSTS2 : 0x30850126
1585 11:37:46.188140 ME: HFSTS3 : 0x00000020
1586 11:37:46.191172 ME: HFSTS4 : 0x00004800
1587 11:37:46.198335 ME: HFSTS5 : 0x00000000
1588 11:37:46.201155 ME: HFSTS6 : 0x40400006
1589 11:37:46.204454 ME: Manufacturing Mode : NO
1590 11:37:46.207715 ME: FW Partition Table : OK
1591 11:37:46.211128 ME: Bringup Loader Failure : NO
1592 11:37:46.214450 ME: Firmware Init Complete : YES
1593 11:37:46.217234 ME: Boot Options Present : NO
1594 11:37:46.220365 ME: Update In Progress : NO
1595 11:37:46.224052 ME: D0i3 Support : YES
1596 11:37:46.227529 ME: Low Power State Enabled : NO
1597 11:37:46.230693 ME: CPU Replaced : NO
1598 11:37:46.233522 ME: CPU Replacement Valid : YES
1599 11:37:46.236880 ME: Current Working State : 5
1600 11:37:46.240248 ME: Current Operation State : 1
1601 11:37:46.243535 ME: Current Operation Mode : 0
1602 11:37:46.246986 ME: Error Code : 0
1603 11:37:46.250368 ME: CPU Debug Disabled : YES
1604 11:37:46.253525 ME: TXT Support : NO
1605 11:37:46.260025 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1606 11:37:46.266199 ELOG: Event(91) added with size 10 at 2024-07-02 11:37:45 UTC
1607 11:37:46.269468 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1608 11:37:46.273082 CBFS @ c08000 size 3f8000
1609 11:37:46.279760 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1610 11:37:46.282595 CBFS: Locating 'fallback/dsdt.aml'
1611 11:37:46.285608 CBFS: Found @ offset 10bb80 size 3fa5
1612 11:37:46.292932 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1613 11:37:46.295630 CBFS @ c08000 size 3f8000
1614 11:37:46.302324 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1615 11:37:46.302473 CBFS: Locating 'fallback/slic'
1616 11:37:46.310896 CBFS: 'fallback/slic' not found.
1617 11:37:46.314086 ACPI: Writing ACPI tables at 99b3e000.
1618 11:37:46.314202 ACPI: * FACS
1619 11:37:46.317411 ACPI: * DSDT
1620 11:37:46.320256 Ramoops buffer: 0x100000@0x99a3d000.
1621 11:37:46.323448 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1622 11:37:46.330367 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1623 11:37:46.333671 Google Chrome EC: version:
1624 11:37:46.336963 ro: helios_v2.0.2659-56403530b
1625 11:37:46.340254 rw: helios_v2.0.2849-c41de27e7d
1626 11:37:46.340362 running image: 1
1627 11:37:46.345050 ACPI: * FADT
1628 11:37:46.345159 SCI is IRQ9
1629 11:37:46.351699 ACPI: added table 1/32, length now 40
1630 11:37:46.351856 ACPI: * SSDT
1631 11:37:46.354196 Found 1 CPU(s) with 8 core(s) each.
1632 11:37:46.360952 Error: Could not locate 'wifi_sar' in VPD.
1633 11:37:46.364350 Checking CBFS for default SAR values
1634 11:37:46.367760 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1635 11:37:46.371097 CBFS @ c08000 size 3f8000
1636 11:37:46.377156 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1637 11:37:46.380887 CBFS: Locating 'wifi_sar_defaults.hex'
1638 11:37:46.383964 CBFS: Found @ offset 5fac0 size 77
1639 11:37:46.387196 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1640 11:37:46.393968 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1641 11:37:46.396992 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1642 11:37:46.403136 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1643 11:37:46.407095 failed to find key in VPD: dsm_calib_r0_0
1644 11:37:46.416121 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1645 11:37:46.422829 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1646 11:37:46.426389 failed to find key in VPD: dsm_calib_r0_1
1647 11:37:46.435958 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1648 11:37:46.439033 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1649 11:37:46.446006 failed to find key in VPD: dsm_calib_r0_2
1650 11:37:46.452132 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1651 11:37:46.458937 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1652 11:37:46.462242 failed to find key in VPD: dsm_calib_r0_3
1653 11:37:46.471504 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1654 11:37:46.478188 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1655 11:37:46.481490 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1656 11:37:46.485185 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1657 11:37:46.488258 EC returned error result code 1
1658 11:37:46.494453 EC returned error result code 1
1659 11:37:46.497811 EC returned error result code 1
1660 11:37:46.501092 PS2K: Bad resp from EC. Vivaldi disabled!
1661 11:37:46.507287 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1662 11:37:46.513870 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1663 11:37:46.517506 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1664 11:37:46.523639 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1665 11:37:46.527102 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1666 11:37:46.533783 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1667 11:37:46.540212 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1668 11:37:46.546550 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1669 11:37:46.549982 ACPI: added table 2/32, length now 44
1670 11:37:46.553505 ACPI: * MCFG
1671 11:37:46.556188 ACPI: added table 3/32, length now 48
1672 11:37:46.556282 ACPI: * TPM2
1673 11:37:46.559559 TPM2 log created at 99a2d000
1674 11:37:46.562856 ACPI: added table 4/32, length now 52
1675 11:37:46.566104 ACPI: * MADT
1676 11:37:46.566222 SCI is IRQ9
1677 11:37:46.569065 ACPI: added table 5/32, length now 56
1678 11:37:46.572363 current = 99b43ac0
1679 11:37:46.572453 ACPI: * DMAR
1680 11:37:46.578938 ACPI: added table 6/32, length now 60
1681 11:37:46.579061 ACPI: * IGD OpRegion
1682 11:37:46.582391 GMA: Found VBT in CBFS
1683 11:37:46.585459 GMA: Found valid VBT in CBFS
1684 11:37:46.588806 ACPI: added table 7/32, length now 64
1685 11:37:46.592196 ACPI: * HPET
1686 11:37:46.595338 ACPI: added table 8/32, length now 68
1687 11:37:46.595464 ACPI: done.
1688 11:37:46.598340 ACPI tables: 31744 bytes.
1689 11:37:46.601746 smbios_write_tables: 99a2c000
1690 11:37:46.605214 EC returned error result code 3
1691 11:37:46.608376 Couldn't obtain OEM name from CBI
1692 11:37:46.611578 Create SMBIOS type 17
1693 11:37:46.614732 PCI: 00:00.0 (Intel Cannonlake)
1694 11:37:46.617969 PCI: 00:14.3 (Intel WiFi)
1695 11:37:46.621422 SMBIOS tables: 939 bytes.
1696 11:37:46.624974 Writing table forward entry at 0x00000500
1697 11:37:46.631073 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1698 11:37:46.634364 Writing coreboot table at 0x99b62000
1699 11:37:46.640948 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1700 11:37:46.644192 1. 0000000000001000-000000000009ffff: RAM
1701 11:37:46.647656 2. 00000000000a0000-00000000000fffff: RESERVED
1702 11:37:46.653776 3. 0000000000100000-0000000099a2bfff: RAM
1703 11:37:46.660325 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1704 11:37:46.664116 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1705 11:37:46.670138 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1706 11:37:46.673600 7. 000000009a000000-000000009f7fffff: RESERVED
1707 11:37:46.680379 8. 00000000e0000000-00000000efffffff: RESERVED
1708 11:37:46.683635 9. 00000000fc000000-00000000fc000fff: RESERVED
1709 11:37:46.690207 10. 00000000fe000000-00000000fe00ffff: RESERVED
1710 11:37:46.693502 11. 00000000fed10000-00000000fed17fff: RESERVED
1711 11:37:46.699358 12. 00000000fed80000-00000000fed83fff: RESERVED
1712 11:37:46.702821 13. 00000000fed90000-00000000fed91fff: RESERVED
1713 11:37:46.709785 14. 00000000feda0000-00000000feda1fff: RESERVED
1714 11:37:46.713006 15. 0000000100000000-000000045e7fffff: RAM
1715 11:37:46.716292 Graphics framebuffer located at 0xc0000000
1716 11:37:46.718975 Passing 5 GPIOs to payload:
1717 11:37:46.725877 NAME | PORT | POLARITY | VALUE
1718 11:37:46.728906 write protect | undefined | high | low
1719 11:37:46.735719 lid | undefined | high | high
1720 11:37:46.742111 power | undefined | high | low
1721 11:37:46.745437 oprom | undefined | high | low
1722 11:37:46.751894 EC in RW | 0x000000cb | high | low
1723 11:37:46.752021 Board ID: 4
1724 11:37:46.757966 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1725 11:37:46.761379 CBFS @ c08000 size 3f8000
1726 11:37:46.764644 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1727 11:37:46.771373 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum f826
1728 11:37:46.774369 coreboot table: 1492 bytes.
1729 11:37:46.777393 IMD ROOT 0. 99fff000 00001000
1730 11:37:46.781145 IMD SMALL 1. 99ffe000 00001000
1731 11:37:46.784392 FSP MEMORY 2. 99c4e000 003b0000
1732 11:37:46.787699 CONSOLE 3. 99c2e000 00020000
1733 11:37:46.791049 FMAP 4. 99c2d000 0000054e
1734 11:37:46.793963 TIME STAMP 5. 99c2c000 00000910
1735 11:37:46.797430 VBOOT WORK 6. 99c18000 00014000
1736 11:37:46.800717 MRC DATA 7. 99c16000 00001958
1737 11:37:46.803416 ROMSTG STCK 8. 99c15000 00001000
1738 11:37:46.807232 AFTER CAR 9. 99c0b000 0000a000
1739 11:37:46.810090 RAMSTAGE 10. 99baf000 0005c000
1740 11:37:46.813489 REFCODE 11. 99b7a000 00035000
1741 11:37:46.816674 SMM BACKUP 12. 99b6a000 00010000
1742 11:37:46.820098 COREBOOT 13. 99b62000 00008000
1743 11:37:46.823484 ACPI 14. 99b3e000 00024000
1744 11:37:46.826557 ACPI GNVS 15. 99b3d000 00001000
1745 11:37:46.829598 RAMOOPS 16. 99a3d000 00100000
1746 11:37:46.833216 TPM2 TCGLOG17. 99a2d000 00010000
1747 11:37:46.836371 SMBIOS 18. 99a2c000 00000800
1748 11:37:46.839849 IMD small region:
1749 11:37:46.842695 IMD ROOT 0. 99ffec00 00000400
1750 11:37:46.846350 FSP RUNTIME 1. 99ffebe0 00000004
1751 11:37:46.849273 EC HOSTEVENT 2. 99ffebc0 00000008
1752 11:37:46.853062 POWER STATE 3. 99ffeb80 00000040
1753 11:37:46.856128 ROMSTAGE 4. 99ffeb60 00000004
1754 11:37:46.859211 MEM INFO 5. 99ffe9a0 000001b9
1755 11:37:46.865935 VPD 6. 99ffe960 00000027
1756 11:37:46.866059 MTRR: Physical address space:
1757 11:37:46.872507 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1758 11:37:46.878676 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1759 11:37:46.885490 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1760 11:37:46.892118 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1761 11:37:46.898590 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1762 11:37:46.905112 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1763 11:37:46.912042 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1764 11:37:46.914683 MTRR: Fixed MSR 0x250 0x0606060606060606
1765 11:37:46.917993 MTRR: Fixed MSR 0x258 0x0606060606060606
1766 11:37:46.924648 MTRR: Fixed MSR 0x259 0x0000000000000000
1767 11:37:46.928045 MTRR: Fixed MSR 0x268 0x0606060606060606
1768 11:37:46.931253 MTRR: Fixed MSR 0x269 0x0606060606060606
1769 11:37:46.934175 MTRR: Fixed MSR 0x26a 0x0606060606060606
1770 11:37:46.940756 MTRR: Fixed MSR 0x26b 0x0606060606060606
1771 11:37:46.943975 MTRR: Fixed MSR 0x26c 0x0606060606060606
1772 11:37:46.947077 MTRR: Fixed MSR 0x26d 0x0606060606060606
1773 11:37:46.950415 MTRR: Fixed MSR 0x26e 0x0606060606060606
1774 11:37:46.957103 MTRR: Fixed MSR 0x26f 0x0606060606060606
1775 11:37:46.960728 call enable_fixed_mtrr()
1776 11:37:46.963660 CPU physical address size: 39 bits
1777 11:37:46.966639 MTRR: default type WB/UC MTRR counts: 6/8.
1778 11:37:46.970139 MTRR: WB selected as default type.
1779 11:37:46.976722 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1780 11:37:46.983308 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1781 11:37:46.989969 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1782 11:37:46.996388 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1783 11:37:47.002944 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1784 11:37:47.009148 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1785 11:37:47.012408 MTRR: Fixed MSR 0x250 0x0606060606060606
1786 11:37:47.015937 MTRR: Fixed MSR 0x258 0x0606060606060606
1787 11:37:47.022216 MTRR: Fixed MSR 0x259 0x0000000000000000
1788 11:37:47.025600 MTRR: Fixed MSR 0x268 0x0606060606060606
1789 11:37:47.029152 MTRR: Fixed MSR 0x269 0x0606060606060606
1790 11:37:47.032597 MTRR: Fixed MSR 0x26a 0x0606060606060606
1791 11:37:47.038442 MTRR: Fixed MSR 0x26b 0x0606060606060606
1792 11:37:47.041823 MTRR: Fixed MSR 0x26c 0x0606060606060606
1793 11:37:47.045572 MTRR: Fixed MSR 0x26d 0x0606060606060606
1794 11:37:47.048843 MTRR: Fixed MSR 0x26e 0x0606060606060606
1795 11:37:47.054781 MTRR: Fixed MSR 0x26f 0x0606060606060606
1796 11:37:47.054937
1797 11:37:47.055030 MTRR check
1798 11:37:47.058233 Fixed MTRRs : Enabled
1799 11:37:47.061425 Variable MTRRs: Enabled
1800 11:37:47.061544
1801 11:37:47.061632 call enable_fixed_mtrr()
1802 11:37:47.068475 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1803 11:37:47.071460 CPU physical address size: 39 bits
1804 11:37:47.078030 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1805 11:37:47.080886 MTRR: Fixed MSR 0x250 0x0606060606060606
1806 11:37:47.083973 MTRR: Fixed MSR 0x258 0x0606060606060606
1807 11:37:47.090587 MTRR: Fixed MSR 0x259 0x0000000000000000
1808 11:37:47.093908 MTRR: Fixed MSR 0x268 0x0606060606060606
1809 11:37:47.097391 MTRR: Fixed MSR 0x269 0x0606060606060606
1810 11:37:47.100560 MTRR: Fixed MSR 0x26a 0x0606060606060606
1811 11:37:47.107277 MTRR: Fixed MSR 0x26b 0x0606060606060606
1812 11:37:47.110490 MTRR: Fixed MSR 0x26c 0x0606060606060606
1813 11:37:47.113578 MTRR: Fixed MSR 0x26d 0x0606060606060606
1814 11:37:47.117144 MTRR: Fixed MSR 0x26e 0x0606060606060606
1815 11:37:47.123647 MTRR: Fixed MSR 0x26f 0x0606060606060606
1816 11:37:47.126630 MTRR: Fixed MSR 0x250 0x0606060606060606
1817 11:37:47.130060 call enable_fixed_mtrr()
1818 11:37:47.133521 MTRR: Fixed MSR 0x258 0x0606060606060606
1819 11:37:47.136776 MTRR: Fixed MSR 0x259 0x0000000000000000
1820 11:37:47.142792 MTRR: Fixed MSR 0x268 0x0606060606060606
1821 11:37:47.146023 MTRR: Fixed MSR 0x269 0x0606060606060606
1822 11:37:47.149530 MTRR: Fixed MSR 0x26a 0x0606060606060606
1823 11:37:47.152975 MTRR: Fixed MSR 0x26b 0x0606060606060606
1824 11:37:47.159401 MTRR: Fixed MSR 0x26c 0x0606060606060606
1825 11:37:47.162815 MTRR: Fixed MSR 0x26d 0x0606060606060606
1826 11:37:47.165524 MTRR: Fixed MSR 0x26e 0x0606060606060606
1827 11:37:47.169254 MTRR: Fixed MSR 0x26f 0x0606060606060606
1828 11:37:47.172526 CPU physical address size: 39 bits
1829 11:37:47.176248 call enable_fixed_mtrr()
1830 11:37:47.182212 MTRR: Fixed MSR 0x250 0x0606060606060606
1831 11:37:47.185345 MTRR: Fixed MSR 0x258 0x0606060606060606
1832 11:37:47.188689 MTRR: Fixed MSR 0x259 0x0000000000000000
1833 11:37:47.192112 MTRR: Fixed MSR 0x268 0x0606060606060606
1834 11:37:47.198848 MTRR: Fixed MSR 0x269 0x0606060606060606
1835 11:37:47.202288 MTRR: Fixed MSR 0x26a 0x0606060606060606
1836 11:37:47.205459 MTRR: Fixed MSR 0x26b 0x0606060606060606
1837 11:37:47.208840 MTRR: Fixed MSR 0x26c 0x0606060606060606
1838 11:37:47.215534 MTRR: Fixed MSR 0x26d 0x0606060606060606
1839 11:37:47.218712 MTRR: Fixed MSR 0x26e 0x0606060606060606
1840 11:37:47.222025 MTRR: Fixed MSR 0x26f 0x0606060606060606
1841 11:37:47.225007 MTRR: Fixed MSR 0x250 0x0606060606060606
1842 11:37:47.228308 call enable_fixed_mtrr()
1843 11:37:47.231370 MTRR: Fixed MSR 0x258 0x0606060606060606
1844 11:37:47.237563 MTRR: Fixed MSR 0x259 0x0000000000000000
1845 11:37:47.240940 MTRR: Fixed MSR 0x268 0x0606060606060606
1846 11:37:47.244236 MTRR: Fixed MSR 0x269 0x0606060606060606
1847 11:37:47.247831 MTRR: Fixed MSR 0x26a 0x0606060606060606
1848 11:37:47.254623 MTRR: Fixed MSR 0x26b 0x0606060606060606
1849 11:37:47.257009 MTRR: Fixed MSR 0x26c 0x0606060606060606
1850 11:37:47.260600 MTRR: Fixed MSR 0x26d 0x0606060606060606
1851 11:37:47.263645 MTRR: Fixed MSR 0x26e 0x0606060606060606
1852 11:37:47.270472 MTRR: Fixed MSR 0x26f 0x0606060606060606
1853 11:37:47.273708 CPU physical address size: 39 bits
1854 11:37:47.277045 call enable_fixed_mtrr()
1855 11:37:47.280406 CBFS @ c08000 size 3f8000
1856 11:37:47.283655 CPU physical address size: 39 bits
1857 11:37:47.286705 CPU physical address size: 39 bits
1858 11:37:47.290124 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1859 11:37:47.296545 MTRR: Fixed MSR 0x250 0x0606060606060606
1860 11:37:47.299664 MTRR: Fixed MSR 0x250 0x0606060606060606
1861 11:37:47.302620 MTRR: Fixed MSR 0x258 0x0606060606060606
1862 11:37:47.306609 MTRR: Fixed MSR 0x259 0x0000000000000000
1863 11:37:47.312797 MTRR: Fixed MSR 0x268 0x0606060606060606
1864 11:37:47.316412 MTRR: Fixed MSR 0x269 0x0606060606060606
1865 11:37:47.319471 MTRR: Fixed MSR 0x26a 0x0606060606060606
1866 11:37:47.322870 MTRR: Fixed MSR 0x26b 0x0606060606060606
1867 11:37:47.329113 MTRR: Fixed MSR 0x26c 0x0606060606060606
1868 11:37:47.332281 MTRR: Fixed MSR 0x26d 0x0606060606060606
1869 11:37:47.335139 MTRR: Fixed MSR 0x26e 0x0606060606060606
1870 11:37:47.342108 MTRR: Fixed MSR 0x26f 0x0606060606060606
1871 11:37:47.345264 MTRR: Fixed MSR 0x258 0x0606060606060606
1872 11:37:47.348462 call enable_fixed_mtrr()
1873 11:37:47.351833 MTRR: Fixed MSR 0x259 0x0000000000000000
1874 11:37:47.355214 MTRR: Fixed MSR 0x268 0x0606060606060606
1875 11:37:47.358518 MTRR: Fixed MSR 0x269 0x0606060606060606
1876 11:37:47.364613 MTRR: Fixed MSR 0x26a 0x0606060606060606
1877 11:37:47.368532 MTRR: Fixed MSR 0x26b 0x0606060606060606
1878 11:37:47.371146 MTRR: Fixed MSR 0x26c 0x0606060606060606
1879 11:37:47.374932 MTRR: Fixed MSR 0x26d 0x0606060606060606
1880 11:37:47.381371 MTRR: Fixed MSR 0x26e 0x0606060606060606
1881 11:37:47.384513 MTRR: Fixed MSR 0x26f 0x0606060606060606
1882 11:37:47.387552 CPU physical address size: 39 bits
1883 11:37:47.391084 call enable_fixed_mtrr()
1884 11:37:47.394511 CBFS: Locating 'fallback/payload'
1885 11:37:47.397875 CPU physical address size: 39 bits
1886 11:37:47.400685 CBFS: Found @ offset 1c96c0 size 3f798
1887 11:37:47.407004 Checking segment from ROM address 0xffdd16f8
1888 11:37:47.410531 Checking segment from ROM address 0xffdd1714
1889 11:37:47.413858 Loading segment from ROM address 0xffdd16f8
1890 11:37:47.416875 code (compression=0)
1891 11:37:47.427178 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1892 11:37:47.433857 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1893 11:37:47.436351 it's not compressed!
1894 11:37:47.528867 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1895 11:37:47.535575 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1896 11:37:47.541531 Loading segment from ROM address 0xffdd1714
1897 11:37:47.541688 Entry Point 0x30000000
1898 11:37:47.544798 Loaded segments
1899 11:37:47.551292 Finalizing chipset.
1900 11:37:47.554346 Finalizing SMM.
1901 11:37:47.557458 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1902 11:37:47.560586 mp_park_aps done after 0 msecs.
1903 11:37:47.567012 Jumping to boot code at 30000000(99b62000)
1904 11:37:47.573921 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1905 11:37:47.574082
1906 11:37:47.574173
1907 11:37:47.574257
1908 11:37:47.577244 Starting depthcharge on Helios...
1909 11:37:47.577351
1910 11:37:47.577761 end: 2.2.3 depthcharge-start (duration 00:00:09) [common]
1911 11:37:47.577893 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
1912 11:37:47.578005 Setting prompt string to ['hatch:']
1913 11:37:47.578102 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
1914 11:37:47.587296 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1915 11:37:47.587469
1916 11:37:47.593299 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1917 11:37:47.593447
1918 11:37:47.599949 board_setup: Info: eMMC controller not present; skipping
1919 11:37:47.600109
1920 11:37:47.603007 New NVMe Controller 0x30053ac0 @ 00:1d:00
1921 11:37:47.603128
1922 11:37:47.609895 board_setup: Info: SDHCI controller not present; skipping
1923 11:37:47.610055
1924 11:37:47.616174 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1925 11:37:47.616329
1926 11:37:47.616422 Wipe memory regions:
1927 11:37:47.616507
1928 11:37:47.622851 [0x00000000001000, 0x000000000a0000)
1929 11:37:47.623004
1930 11:37:47.626337 [0x00000000100000, 0x00000030000000)
1931 11:37:47.690526
1932 11:37:47.693256 [0x00000030657430, 0x00000099a2c000)
1933 11:37:47.831355
1934 11:37:47.834514 [0x00000100000000, 0x0000045e800000)
1935 11:37:49.217270
1936 11:37:49.217441 R8152: Initializing
1937 11:37:49.217531
1938 11:37:49.220461 Version 9 (ocp_data = 6010)
1939 11:37:49.224650
1940 11:37:49.224766 R8152: Done initializing
1941 11:37:49.224854
1942 11:37:49.227825 Adding net device
1943 11:37:49.860304
1944 11:37:49.860474 R8152: Initializing
1945 11:37:49.860564
1946 11:37:49.863436 Version 6 (ocp_data = 5c30)
1947 11:37:49.863545
1948 11:37:49.866906 R8152: Done initializing
1949 11:37:49.867017
1950 11:37:49.874011 net_add_device: Attemp to include the same device
1951 11:37:49.874157
1952 11:37:49.880734 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
1953 11:37:49.880881
1954 11:37:49.880970
1955 11:37:49.881270 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1956 11:37:49.881374 Sending line: 'tftpboot 192.168.201.1 14694700/tftp-deploy-6wnggaof/kernel/bzImage 14694700/tftp-deploy-6wnggaof/kernel/cmdline 14694700/tftp-deploy-6wnggaof/ramdisk/ramdisk.cpio.gz'
1958 11:37:49.981915 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1959 11:37:49.982033 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
1960 11:37:49.986450 hatch: tftpboot 192.168.201.1 14694700/tftp-deploy-6wnggaof/kernel/bzIploy-6wnggaof/kernel/cmdline 14694700/tftp-deploy-6wnggaof/ramdisk/ramdisk.cpio.gz
1961 11:37:49.986560
1962 11:37:49.986647 Waiting for link
1963 11:37:50.186669
1964 11:37:50.186835 done.
1965 11:37:50.186922
1966 11:37:50.187004 MAC: 00:24:32:30:7f:7f
1967 11:37:50.187086
1968 11:37:50.189943 Sending DHCP discover... done.
1969 11:37:50.190046
1970 11:37:50.193125 Waiting for reply... done.
1971 11:37:50.193225
1972 11:37:50.196280 Sending DHCP request... done.
1973 11:37:50.196386
1974 11:37:50.200076 Waiting for reply... done.
1975 11:37:50.200177
1976 11:37:50.202682 My ip is 192.168.201.15
1977 11:37:50.202782
1978 11:37:50.206099 The DHCP server ip is 192.168.201.1
1979 11:37:50.206202
1980 11:37:50.212936 TFTP server IP predefined by user: 192.168.201.1
1981 11:37:50.213053
1982 11:37:50.219492 Bootfile predefined by user: 14694700/tftp-deploy-6wnggaof/kernel/bzImage
1983 11:37:50.219603
1984 11:37:50.222715 Sending tftp read request... done.
1985 11:37:50.222817
1986 11:37:50.225811 Waiting for the transfer...
1987 11:37:50.225914
1988 11:37:50.758890 00000000 ################################################################
1989 11:37:50.759052
1990 11:37:51.305005 00080000 ################################################################
1991 11:37:51.305173
1992 11:37:51.863422 00100000 ################################################################
1993 11:37:51.863585
1994 11:37:52.402129 00180000 ################################################################
1995 11:37:52.402289
1996 11:37:52.951624 00200000 ################################################################
1997 11:37:52.951778
1998 11:37:53.489688 00280000 ################################################################
1999 11:37:53.489818
2000 11:37:54.024552 00300000 ################################################################
2001 11:37:54.024711
2002 11:37:54.561186 00380000 ################################################################
2003 11:37:54.561345
2004 11:37:55.108828 00400000 ################################################################
2005 11:37:55.108973
2006 11:37:55.666976 00480000 ################################################################
2007 11:37:55.667101
2008 11:37:56.198872 00500000 ################################################################
2009 11:37:56.199008
2010 11:37:56.724144 00580000 ################################################################
2011 11:37:56.724298
2012 11:37:57.250348 00600000 ################################################################
2013 11:37:57.250496
2014 11:37:57.788407 00680000 ################################################################
2015 11:37:57.788549
2016 11:37:58.364552 00700000 ################################################################
2017 11:37:58.365030
2018 11:37:58.987200 00780000 ################################################################
2019 11:37:58.987861
2020 11:37:59.551486 00800000 ################################################################
2021 11:37:59.551688
2022 11:38:00.074804 00880000 ################################################################
2023 11:38:00.074940
2024 11:38:00.597024 00900000 ################################################################
2025 11:38:00.597161
2026 11:38:01.135568 00980000 ################################################################
2027 11:38:01.135700
2028 11:38:01.652231 00a00000 ################################################################
2029 11:38:01.652345
2030 11:38:02.173603 00a80000 ################################################################
2031 11:38:02.173756
2032 11:38:02.716998 00b00000 ################################################################
2033 11:38:02.717115
2034 11:38:03.252405 00b80000 ################################################################
2035 11:38:03.252518
2036 11:38:03.798609 00c00000 ################################################################
2037 11:38:03.798725
2038 11:38:04.373505 00c80000 ################################################################
2039 11:38:04.373997
2040 11:38:04.921763 00d00000 ################################################################ done.
2041 11:38:04.921916
2042 11:38:04.925087 The bootfile was 14155664 bytes long.
2043 11:38:04.925188
2044 11:38:04.928276 Sending tftp read request... done.
2045 11:38:04.928381
2046 11:38:04.931558 Waiting for the transfer...
2047 11:38:04.931651
2048 11:38:05.491663 00000000 ################################################################
2049 11:38:05.491802
2050 11:38:06.059969 00080000 ################################################################
2051 11:38:06.060083
2052 11:38:06.665802 00100000 ################################################################
2053 11:38:06.665951
2054 11:38:07.216014 00180000 ################################################################
2055 11:38:07.216176
2056 11:38:07.748024 00200000 ################################################################
2057 11:38:07.748167
2058 11:38:08.294658 00280000 ################################################################
2059 11:38:08.294773
2060 11:38:08.859066 00300000 ################################################################
2061 11:38:08.859195
2062 11:38:09.416564 00380000 ################################################################
2063 11:38:09.416693
2064 11:38:09.997459 00400000 ################################################################
2065 11:38:09.997581
2066 11:38:10.555955 00480000 ################################################################
2067 11:38:10.556110
2068 11:38:11.129076 00500000 ################################################################
2069 11:38:11.129190
2070 11:38:11.697381 00580000 ################################################################
2071 11:38:11.697535
2072 11:38:12.270717 00600000 ################################################################
2073 11:38:12.270889
2074 11:38:12.825775 00680000 ################################################################
2075 11:38:12.825907
2076 11:38:13.374215 00700000 ################################################################
2077 11:38:13.374344
2078 11:38:13.931937 00780000 ################################################################
2079 11:38:13.932122
2080 11:38:14.502745 00800000 ################################################################
2081 11:38:14.502892
2082 11:38:15.063301 00880000 ################################################################ done.
2083 11:38:15.063422
2084 11:38:15.066433 Sending tftp read request... done.
2085 11:38:15.069707
2086 11:38:15.069802 Waiting for the transfer...
2087 11:38:15.069887
2088 11:38:15.072920 00000000 # done.
2089 11:38:15.073016
2090 11:38:15.082965 Command line loaded dynamically from TFTP file: 14694700/tftp-deploy-6wnggaof/kernel/cmdline
2091 11:38:15.083059
2092 11:38:15.102736 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2093 11:38:15.102874
2094 11:38:15.106132 ec_init(0): CrosEC protocol v3 supported (256, 256)
2095 11:38:15.113456
2096 11:38:15.116647 Shutting down all USB controllers.
2097 11:38:15.116809
2098 11:38:15.116959 Removing current net device
2099 11:38:15.120922
2100 11:38:15.121065 Finalizing coreboot
2101 11:38:15.121258
2102 11:38:15.127487 Exiting depthcharge with code 4 at timestamp: 34935146
2103 11:38:15.127691
2104 11:38:15.127895
2105 11:38:15.128048 Starting kernel ...
2106 11:38:15.128127
2107 11:38:15.128205
2108 11:38:15.128884 end: 2.2.4 bootloader-commands (duration 00:00:28) [common]
2109 11:38:15.129000 start: 2.2.5 auto-login-action (timeout 00:04:15) [common]
2110 11:38:15.129106 Setting prompt string to ['Linux version [0-9]']
2111 11:38:15.129206 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2112 11:38:15.129295 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2114 11:42:30.129273 end: 2.2.5 auto-login-action (duration 00:04:15) [common]
2116 11:42:30.129481 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 255 seconds'
2118 11:42:30.129626 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2121 11:42:30.129898 end: 2 depthcharge-action (duration 00:05:00) [common]
2123 11:42:30.130159 Cleaning after the job
2124 11:42:30.130259 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14694700/tftp-deploy-6wnggaof/ramdisk
2125 11:42:30.131391 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14694700/tftp-deploy-6wnggaof/kernel
2126 11:42:30.133197 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14694700/tftp-deploy-6wnggaof/modules
2127 11:42:30.133885 start: 4.1 power-off (timeout 00:00:30) [common]
2128 11:42:30.134035 Calling: ['pduclient', '--daemon=localhost', '--hostname=asus-C436FA-Flip-hatch-cbg-2', '--port=1', '--command=off']
2129 11:42:32.205059 >> Command sent successfully.
2130 11:42:32.208356 Returned 0 in 2 seconds
2131 11:42:32.208516 end: 4.1 power-off (duration 00:00:02) [common]
2133 11:42:32.208824 start: 4.2 read-feedback (timeout 00:04:58) [common]
2134 11:42:32.209001 Listened to connection for namespace 'common' for up to 1s
2136 11:42:32.209452 Listened to connection for namespace 'common' for up to 1s
2137 11:42:32.209899 Listened to connection for namespace 'common' for up to 1s
2138 11:42:32.210391 Listened to connection for namespace 'common' for up to 1s
2139 11:42:33.210118 Finalising connection for namespace 'common'
2140 11:42:33.210769 Disconnecting from shell: Finalise
2141 11:42:33.211121
2142 11:42:33.312450 end: 4.2 read-feedback (duration 00:00:01) [common]
2143 11:42:33.312581 Removing override tmp directory at /var/lib/lava/dispatcher/tmp/14694700
2144 11:42:33.328006 Removing root tmp directory at /var/lib/lava/dispatcher/tmp/14694700
2145 11:42:33.328130 JobError: Your job cannot terminate cleanly.