Boot log: asus-C436FA-Flip-hatch
- Errors: 2
- Boot result: FAIL
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
1 06:52:19.810514 lava-dispatcher, installed at version: 2022.11
2 06:52:19.810715 start: 0 validate
3 06:52:19.810850 Start time: 2023-01-10 06:52:19.810844+00:00 (UTC)
4 06:52:19.810985 Using caching service: 'http://localhost/cache/?uri=%s'
5 06:52:19.811112 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230109.0%2Fx86%2Frootfs.cpio.gz exists
6 06:52:20.102376 Using caching service: 'http://localhost/cache/?uri=%s'
7 06:52:20.102618 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-799-g1229c813bcd9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 06:52:22.602661 Using caching service: 'http://localhost/cache/?uri=%s'
9 06:52:22.602825 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-799-g1229c813bcd9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 06:52:22.605135 validate duration: 2.79
12 06:52:22.605373 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 06:52:22.605511 start: 1.1 download-retry (timeout 00:10:00) [common]
14 06:52:22.605604 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 06:52:22.605712 Not decompressing ramdisk as can be used compressed.
16 06:52:22.605796 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230109.0/x86/rootfs.cpio.gz
17 06:52:22.605861 saving as /var/lib/lava/dispatcher/tmp/8649827/tftp-deploy-3rocu2ea/ramdisk/rootfs.cpio.gz
18 06:52:22.605923 total size: 8423805 (8MB)
19 06:52:22.606849 progress 0% (0MB)
20 06:52:22.609018 progress 5% (0MB)
21 06:52:22.611197 progress 10% (0MB)
22 06:52:22.613286 progress 15% (1MB)
23 06:52:22.615424 progress 20% (1MB)
24 06:52:22.617552 progress 25% (2MB)
25 06:52:22.619637 progress 30% (2MB)
26 06:52:22.621599 progress 35% (2MB)
27 06:52:22.623683 progress 40% (3MB)
28 06:52:22.625817 progress 45% (3MB)
29 06:52:22.627863 progress 50% (4MB)
30 06:52:22.629951 progress 55% (4MB)
31 06:52:22.631993 progress 60% (4MB)
32 06:52:22.634069 progress 65% (5MB)
33 06:52:22.635961 progress 70% (5MB)
34 06:52:22.638003 progress 75% (6MB)
35 06:52:22.640040 progress 80% (6MB)
36 06:52:22.642076 progress 85% (6MB)
37 06:52:22.644105 progress 90% (7MB)
38 06:52:22.646145 progress 95% (7MB)
39 06:52:22.648195 progress 100% (8MB)
40 06:52:22.648367 8MB downloaded in 0.04s (189.29MB/s)
41 06:52:22.648518 end: 1.1.1 http-download (duration 00:00:00) [common]
43 06:52:22.648759 end: 1.1 download-retry (duration 00:00:00) [common]
44 06:52:22.648848 start: 1.2 download-retry (timeout 00:10:00) [common]
45 06:52:22.648935 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 06:52:22.649043 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-799-g1229c813bcd9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 06:52:22.649111 saving as /var/lib/lava/dispatcher/tmp/8649827/tftp-deploy-3rocu2ea/kernel/bzImage
48 06:52:22.649173 total size: 7573392 (7MB)
49 06:52:22.649233 No compression specified
50 06:52:22.650299 progress 0% (0MB)
51 06:52:22.652235 progress 5% (0MB)
52 06:52:22.654280 progress 10% (0MB)
53 06:52:22.656056 progress 15% (1MB)
54 06:52:22.657995 progress 20% (1MB)
55 06:52:22.659770 progress 25% (1MB)
56 06:52:22.661702 progress 30% (2MB)
57 06:52:22.663472 progress 35% (2MB)
58 06:52:22.665412 progress 40% (2MB)
59 06:52:22.667308 progress 45% (3MB)
60 06:52:22.669104 progress 50% (3MB)
61 06:52:22.671080 progress 55% (4MB)
62 06:52:22.672820 progress 60% (4MB)
63 06:52:22.674753 progress 65% (4MB)
64 06:52:22.676491 progress 70% (5MB)
65 06:52:22.678419 progress 75% (5MB)
66 06:52:22.680156 progress 80% (5MB)
67 06:52:22.682049 progress 85% (6MB)
68 06:52:22.683933 progress 90% (6MB)
69 06:52:22.685681 progress 95% (6MB)
70 06:52:22.687694 progress 100% (7MB)
71 06:52:22.687877 7MB downloaded in 0.04s (186.64MB/s)
72 06:52:22.688030 end: 1.2.1 http-download (duration 00:00:00) [common]
74 06:52:22.688277 end: 1.2 download-retry (duration 00:00:00) [common]
75 06:52:22.688400 start: 1.3 download-retry (timeout 00:10:00) [common]
76 06:52:22.688491 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 06:52:22.688597 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-799-g1229c813bcd9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 06:52:22.688666 saving as /var/lib/lava/dispatcher/tmp/8649827/tftp-deploy-3rocu2ea/modules/modules.tar
79 06:52:22.688729 total size: 51848 (0MB)
80 06:52:22.688790 Using unxz to decompress xz
81 06:52:22.692060 progress 63% (0MB)
82 06:52:22.692430 progress 100% (0MB)
83 06:52:22.695704 0MB downloaded in 0.01s (7.10MB/s)
84 06:52:22.695936 end: 1.3.1 http-download (duration 00:00:00) [common]
86 06:52:22.696198 end: 1.3 download-retry (duration 00:00:00) [common]
87 06:52:22.696294 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
88 06:52:22.696393 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
89 06:52:22.696479 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 06:52:22.696569 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
91 06:52:22.696738 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8649827/lava-overlay-6_vy10ox
92 06:52:22.696843 makedir: /var/lib/lava/dispatcher/tmp/8649827/lava-overlay-6_vy10ox/lava-8649827/bin
93 06:52:22.696927 makedir: /var/lib/lava/dispatcher/tmp/8649827/lava-overlay-6_vy10ox/lava-8649827/tests
94 06:52:22.697008 makedir: /var/lib/lava/dispatcher/tmp/8649827/lava-overlay-6_vy10ox/lava-8649827/results
95 06:52:22.697118 Creating /var/lib/lava/dispatcher/tmp/8649827/lava-overlay-6_vy10ox/lava-8649827/bin/lava-add-keys
96 06:52:22.697250 Creating /var/lib/lava/dispatcher/tmp/8649827/lava-overlay-6_vy10ox/lava-8649827/bin/lava-add-sources
97 06:52:22.697373 Creating /var/lib/lava/dispatcher/tmp/8649827/lava-overlay-6_vy10ox/lava-8649827/bin/lava-background-process-start
98 06:52:22.697524 Creating /var/lib/lava/dispatcher/tmp/8649827/lava-overlay-6_vy10ox/lava-8649827/bin/lava-background-process-stop
99 06:52:22.697636 Creating /var/lib/lava/dispatcher/tmp/8649827/lava-overlay-6_vy10ox/lava-8649827/bin/lava-common-functions
100 06:52:22.697746 Creating /var/lib/lava/dispatcher/tmp/8649827/lava-overlay-6_vy10ox/lava-8649827/bin/lava-echo-ipv4
101 06:52:22.697858 Creating /var/lib/lava/dispatcher/tmp/8649827/lava-overlay-6_vy10ox/lava-8649827/bin/lava-install-packages
102 06:52:22.697968 Creating /var/lib/lava/dispatcher/tmp/8649827/lava-overlay-6_vy10ox/lava-8649827/bin/lava-installed-packages
103 06:52:22.698077 Creating /var/lib/lava/dispatcher/tmp/8649827/lava-overlay-6_vy10ox/lava-8649827/bin/lava-os-build
104 06:52:22.698189 Creating /var/lib/lava/dispatcher/tmp/8649827/lava-overlay-6_vy10ox/lava-8649827/bin/lava-probe-channel
105 06:52:22.698299 Creating /var/lib/lava/dispatcher/tmp/8649827/lava-overlay-6_vy10ox/lava-8649827/bin/lava-probe-ip
106 06:52:22.698407 Creating /var/lib/lava/dispatcher/tmp/8649827/lava-overlay-6_vy10ox/lava-8649827/bin/lava-target-ip
107 06:52:22.698516 Creating /var/lib/lava/dispatcher/tmp/8649827/lava-overlay-6_vy10ox/lava-8649827/bin/lava-target-mac
108 06:52:22.698624 Creating /var/lib/lava/dispatcher/tmp/8649827/lava-overlay-6_vy10ox/lava-8649827/bin/lava-target-storage
109 06:52:22.698737 Creating /var/lib/lava/dispatcher/tmp/8649827/lava-overlay-6_vy10ox/lava-8649827/bin/lava-test-case
110 06:52:22.698847 Creating /var/lib/lava/dispatcher/tmp/8649827/lava-overlay-6_vy10ox/lava-8649827/bin/lava-test-event
111 06:52:22.698956 Creating /var/lib/lava/dispatcher/tmp/8649827/lava-overlay-6_vy10ox/lava-8649827/bin/lava-test-feedback
112 06:52:22.699063 Creating /var/lib/lava/dispatcher/tmp/8649827/lava-overlay-6_vy10ox/lava-8649827/bin/lava-test-raise
113 06:52:22.699179 Creating /var/lib/lava/dispatcher/tmp/8649827/lava-overlay-6_vy10ox/lava-8649827/bin/lava-test-reference
114 06:52:22.699288 Creating /var/lib/lava/dispatcher/tmp/8649827/lava-overlay-6_vy10ox/lava-8649827/bin/lava-test-runner
115 06:52:22.699397 Creating /var/lib/lava/dispatcher/tmp/8649827/lava-overlay-6_vy10ox/lava-8649827/bin/lava-test-set
116 06:52:22.699505 Creating /var/lib/lava/dispatcher/tmp/8649827/lava-overlay-6_vy10ox/lava-8649827/bin/lava-test-shell
117 06:52:22.699616 Updating /var/lib/lava/dispatcher/tmp/8649827/lava-overlay-6_vy10ox/lava-8649827/bin/lava-install-packages (oe)
118 06:52:22.699729 Updating /var/lib/lava/dispatcher/tmp/8649827/lava-overlay-6_vy10ox/lava-8649827/bin/lava-installed-packages (oe)
119 06:52:22.699829 Creating /var/lib/lava/dispatcher/tmp/8649827/lava-overlay-6_vy10ox/lava-8649827/environment
120 06:52:22.699925 LAVA metadata
121 06:52:22.699998 - LAVA_JOB_ID=8649827
122 06:52:22.700065 - LAVA_DISPATCHER_IP=192.168.201.1
123 06:52:22.700171 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
124 06:52:22.700239 skipped lava-vland-overlay
125 06:52:22.700356 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 06:52:22.700445 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
127 06:52:22.700508 skipped lava-multinode-overlay
128 06:52:22.700585 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 06:52:22.700669 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
130 06:52:22.700747 Loading test definitions
131 06:52:22.700847 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
132 06:52:22.700923 Using /lava-8649827 at stage 0
133 06:52:22.701197 uuid=8649827_1.4.2.3.1 testdef=None
134 06:52:22.701290 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 06:52:22.701415 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
136 06:52:22.701940 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 06:52:22.702175 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
139 06:52:22.702785 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 06:52:22.703027 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
142 06:52:22.703566 runner path: /var/lib/lava/dispatcher/tmp/8649827/lava-overlay-6_vy10ox/lava-8649827/0/tests/0_dmesg test_uuid 8649827_1.4.2.3.1
143 06:52:22.703719 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 06:52:22.703955 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
146 06:52:22.704029 Using /lava-8649827 at stage 1
147 06:52:22.704277 uuid=8649827_1.4.2.3.5 testdef=None
148 06:52:22.704381 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 06:52:22.704473 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
150 06:52:22.704919 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 06:52:22.705148 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
153 06:52:22.705755 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 06:52:22.705995 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
156 06:52:22.706592 runner path: /var/lib/lava/dispatcher/tmp/8649827/lava-overlay-6_vy10ox/lava-8649827/1/tests/1_bootrr test_uuid 8649827_1.4.2.3.5
157 06:52:22.706739 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 06:52:22.706952 Creating lava-test-runner.conf files
160 06:52:22.707017 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8649827/lava-overlay-6_vy10ox/lava-8649827/0 for stage 0
161 06:52:22.707100 - 0_dmesg
162 06:52:22.707177 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8649827/lava-overlay-6_vy10ox/lava-8649827/1 for stage 1
163 06:52:22.707260 - 1_bootrr
164 06:52:22.707353 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 06:52:22.707444 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
166 06:52:22.713725 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 06:52:22.713846 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
168 06:52:22.713938 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 06:52:22.714026 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 06:52:22.714113 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
171 06:52:22.905122 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 06:52:22.905561 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
173 06:52:22.905694 extracting modules file /var/lib/lava/dispatcher/tmp/8649827/tftp-deploy-3rocu2ea/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8649827/extract-overlay-ramdisk-eby0todl/ramdisk
174 06:52:22.910012 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 06:52:22.910148 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
176 06:52:22.910244 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8649827/compress-overlay-kohub0q_/overlay-1.4.2.4.tar.gz to ramdisk
177 06:52:22.910319 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8649827/compress-overlay-kohub0q_/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8649827/extract-overlay-ramdisk-eby0todl/ramdisk
178 06:52:22.914258 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 06:52:22.914374 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
180 06:52:22.914469 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 06:52:22.914563 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
182 06:52:22.914644 Building ramdisk /var/lib/lava/dispatcher/tmp/8649827/extract-overlay-ramdisk-eby0todl/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8649827/extract-overlay-ramdisk-eby0todl/ramdisk
183 06:52:22.979803 >> 48119 blocks
184 06:52:23.767199 rename /var/lib/lava/dispatcher/tmp/8649827/extract-overlay-ramdisk-eby0todl/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8649827/tftp-deploy-3rocu2ea/ramdisk/ramdisk.cpio.gz
185 06:52:23.767703 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 06:52:23.767878 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
187 06:52:23.768026 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
188 06:52:23.768166 No mkimage arch provided, not using FIT.
189 06:52:23.768303 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 06:52:23.768434 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 06:52:23.768584 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 06:52:23.768725 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
193 06:52:23.768843 No LXC device requested
194 06:52:23.768972 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 06:52:23.769109 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
196 06:52:23.769245 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 06:52:23.769361 Checking files for TFTP limit of 4294967296 bytes.
198 06:52:23.769907 end: 1 tftp-deploy (duration 00:00:01) [common]
199 06:52:23.770064 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 06:52:23.770202 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 06:52:23.770382 substitutions:
202 06:52:23.770490 - {DTB}: None
203 06:52:23.770591 - {INITRD}: 8649827/tftp-deploy-3rocu2ea/ramdisk/ramdisk.cpio.gz
204 06:52:23.770688 - {KERNEL}: 8649827/tftp-deploy-3rocu2ea/kernel/bzImage
205 06:52:23.770785 - {LAVA_MAC}: None
206 06:52:23.770882 - {PRESEED_CONFIG}: None
207 06:52:23.770979 - {PRESEED_LOCAL}: None
208 06:52:23.771078 - {RAMDISK}: 8649827/tftp-deploy-3rocu2ea/ramdisk/ramdisk.cpio.gz
209 06:52:23.771175 - {ROOT_PART}: None
210 06:52:23.771271 - {ROOT}: None
211 06:52:23.771367 - {SERVER_IP}: 192.168.201.1
212 06:52:23.771463 - {TEE}: None
213 06:52:23.771559 Parsed boot commands:
214 06:52:23.771653 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 06:52:23.771872 Parsed boot commands: tftpboot 192.168.201.1 8649827/tftp-deploy-3rocu2ea/kernel/bzImage 8649827/tftp-deploy-3rocu2ea/kernel/cmdline 8649827/tftp-deploy-3rocu2ea/ramdisk/ramdisk.cpio.gz
216 06:52:23.772014 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 06:52:23.772152 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 06:52:23.772301 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 06:52:23.772446 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 06:52:23.772558 Not connected, no need to disconnect.
221 06:52:23.772681 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 06:52:23.772811 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 06:52:23.772922 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-3'
224 06:52:23.776090 Setting prompt string to ['lava-test: # ']
225 06:52:23.776465 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 06:52:23.776618 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 06:52:23.776767 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 06:52:23.776900 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 06:52:23.777180 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
230 06:52:23.799204 >> Command sent successfully.
231 06:52:23.801948 Returned 0 in 0 seconds
232 06:52:23.902799 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 06:52:23.903269 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 06:52:23.903429 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 06:52:23.903561 Setting prompt string to 'Starting depthcharge on Helios...'
237 06:52:23.903665 Changing prompt to 'Starting depthcharge on Helios...'
238 06:52:23.903775 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
239 06:52:23.904178 [Enter `^Ec?' for help]
240 06:52:30.497381
241 06:52:30.497562
242 06:52:30.506972 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
243 06:52:30.510370 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
244 06:52:30.517336 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
245 06:52:30.520329 CPU: AES supported, TXT NOT supported, VT supported
246 06:52:30.527438 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
247 06:52:30.530169 PCH: device id 0284 (rev 00) is Cometlake-U Premium
248 06:52:30.537182 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
249 06:52:30.540239 VBOOT: Loading verstage.
250 06:52:30.543401 FMAP: Found "FLASH" version 1.1 at 0xc04000.
251 06:52:30.549937 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
252 06:52:30.553635 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
253 06:52:30.556862
254 06:52:30.556998 CBFS @ c08000 size 3f8000
255 06:52:30.563295 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
256 06:52:30.566411 CBFS: Locating 'fallback/verstage'
257 06:52:30.569609 CBFS: Found @ offset 10fb80 size 1072c
258 06:52:30.574046
259 06:52:30.574142
260 06:52:30.583784 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
261 06:52:30.598297 Probing TPM: . done!
262 06:52:30.601356 TPM ready after 0 ms
263 06:52:30.605330 Connected to device vid:did:rid of 1ae0:0028:00
264 06:52:30.614808 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
265 06:52:30.618649 Initialized TPM device CR50 revision 0
266 06:52:30.657548 tlcl_send_startup: Startup return code is 0
267 06:52:30.657691 TPM: setup succeeded
268 06:52:30.669897 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
269 06:52:30.674209 Chrome EC: UHEPI supported
270 06:52:30.677150 Phase 1
271 06:52:30.680255 FMAP: area GBB found @ c05000 (12288 bytes)
272 06:52:30.686772 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
273 06:52:30.690161 Phase 2
274 06:52:30.690254 Phase 3
275 06:52:30.693355 FMAP: area GBB found @ c05000 (12288 bytes)
276 06:52:30.700180 VB2:vb2_report_dev_firmware() This is developer signed firmware
277 06:52:30.706879 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
278 06:52:30.709994 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
279 06:52:30.716425 VB2:vb2_verify_keyblock() Checking keyblock signature...
280 06:52:30.732333 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
281 06:52:30.736014 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
282 06:52:30.742756 VB2:vb2_verify_fw_preamble() Verifying preamble.
283 06:52:30.746520 Phase 4
284 06:52:30.750130 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
285 06:52:30.756295 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
286 06:52:30.936284 VB2:vb2_rsa_verify_digest() Digest check failed!
287 06:52:30.942673 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
288 06:52:30.942851 Saving nvdata
289 06:52:30.946401 Reboot requested (10020007)
290 06:52:30.949259 board_reset() called!
291 06:52:30.949393 full_reset() called!
292 06:52:35.464199
293 06:52:35.464361
294 06:52:35.474412 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
295 06:52:35.477259 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
296 06:52:35.484234 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
297 06:52:35.487368 CPU: AES supported, TXT NOT supported, VT supported
298 06:52:35.493554 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
299 06:52:35.497258 PCH: device id 0284 (rev 00) is Cometlake-U Premium
300 06:52:35.503811 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
301 06:52:35.506996 VBOOT: Loading verstage.
302 06:52:35.510412 FMAP: Found "FLASH" version 1.1 at 0xc04000.
303 06:52:35.516823 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
304 06:52:35.523284 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
305 06:52:35.523370 CBFS @ c08000 size 3f8000
306 06:52:35.530265 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
307 06:52:35.533560 CBFS: Locating 'fallback/verstage'
308 06:52:35.536607 CBFS: Found @ offset 10fb80 size 1072c
309 06:52:35.541156
310 06:52:35.541248
311 06:52:35.551099 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
312 06:52:35.565148 Probing TPM: . done!
313 06:52:35.568684 TPM ready after 0 ms
314 06:52:35.571601 Connected to device vid:did:rid of 1ae0:0028:00
315 06:52:35.582041 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
316 06:52:35.585129 Initialized TPM device CR50 revision 0
317 06:52:35.624007 tlcl_send_startup: Startup return code is 0
318 06:52:35.624129 TPM: setup succeeded
319 06:52:35.636582 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
320 06:52:35.640507 Chrome EC: UHEPI supported
321 06:52:35.643708 Phase 1
322 06:52:35.647318 FMAP: area GBB found @ c05000 (12288 bytes)
323 06:52:35.653650 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
324 06:52:35.660668 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
325 06:52:35.663705 Recovery requested (1009000e)
326 06:52:35.669554 Saving nvdata
327 06:52:35.675961 tlcl_extend: response is 0
328 06:52:35.684614 tlcl_extend: response is 0
329 06:52:35.691490 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
330 06:52:35.694642 CBFS @ c08000 size 3f8000
331 06:52:35.701274 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
332 06:52:35.704635 CBFS: Locating 'fallback/romstage'
333 06:52:35.707820 CBFS: Found @ offset 80 size 145fc
334 06:52:35.711083 Accumulated console time in verstage 98 ms
335 06:52:35.711169
336 06:52:35.711247
337 06:52:35.714213
338 06:52:35.724710 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
339 06:52:35.730742 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
340 06:52:35.733912 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
341 06:52:35.737611 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
342 06:52:35.744267 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
343 06:52:35.747138 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
344 06:52:35.750737 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
345 06:52:35.754072 TCO_STS: 0000 0000
346 06:52:35.757037 GEN_PMCON: e0015238 00000200
347 06:52:35.760286 GBLRST_CAUSE: 00000000 00000000
348 06:52:35.760371 prev_sleep_state 5
349 06:52:35.763935 Boot Count incremented to 44049
350 06:52:35.770934 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
351 06:52:35.774394 CBFS @ c08000 size 3f8000
352 06:52:35.780766 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
353 06:52:35.780853 CBFS: Locating 'fspm.bin'
354 06:52:35.787766 CBFS: Found @ offset 5ffc0 size 71000
355 06:52:35.790649 Chrome EC: UHEPI supported
356 06:52:35.796991 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
357 06:52:35.800740 Probing TPM: done!
358 06:52:35.807396 Connected to device vid:did:rid of 1ae0:0028:00
359 06:52:35.817612 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
360 06:52:35.823282 Initialized TPM device CR50 revision 0
361 06:52:35.832141 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
362 06:52:35.838870 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
363 06:52:35.842222
364 06:52:35.842308 MRC cache found, size 1948
365 06:52:35.845813 bootmode is set to: 2
366 06:52:35.849010 PRMRR disabled by config.
367 06:52:35.852021 SPD INDEX = 1
368 06:52:35.855763 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
369 06:52:35.858870 CBFS @ c08000 size 3f8000
370 06:52:35.865214 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
371 06:52:35.865301 CBFS: Locating 'spd.bin'
372 06:52:35.868748 CBFS: Found @ offset 5fb80 size 400
373 06:52:35.872231 SPD: module type is LPDDR3
374 06:52:35.875281 SPD: module part is
375 06:52:35.881865 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
376 06:52:35.884913 SPD: device width 4 bits, bus width 8 bits
377 06:52:35.888580 SPD: module size is 4096 MB (per channel)
378 06:52:35.891597 memory slot: 0 configuration done.
379 06:52:35.894784 memory slot: 2 configuration done.
380 06:52:35.898423
381 06:52:35.947281 CBMEM:
382 06:52:35.950470 IMD: root @ 99fff000 254 entries.
383 06:52:35.953561 IMD: root @ 99ffec00 62 entries.
384 06:52:35.957222 External stage cache:
385 06:52:35.960328 IMD: root @ 9abff000 254 entries.
386 06:52:35.963547 IMD: root @ 9abfec00 62 entries.
387 06:52:35.970408 Chrome EC: clear events_b mask to 0x0000000020004000
388 06:52:35.983207 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
389 06:52:35.996517 tlcl_write: response is 0
390 06:52:36.004921 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
391 06:52:36.012003 MRC: TPM MRC hash updated successfully.
392 06:52:36.012100 2 DIMMs found
393 06:52:36.015269 SMM Memory Map
394 06:52:36.018703 SMRAM : 0x9a000000 0x1000000
395 06:52:36.021816 Subregion 0: 0x9a000000 0xa00000
396 06:52:36.024871 Subregion 1: 0x9aa00000 0x200000
397 06:52:36.028118 Subregion 2: 0x9ac00000 0x400000
398 06:52:36.031221 top_of_ram = 0x9a000000
399 06:52:36.034570 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
400 06:52:36.041182 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
401 06:52:36.044463 MTRR Range: Start=ff000000 End=0 (Size 1000000)
402 06:52:36.051252 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
403 06:52:36.054234 CBFS @ c08000 size 3f8000
404 06:52:36.057557 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
405 06:52:36.061093 CBFS: Locating 'fallback/postcar'
406 06:52:36.064355
407 06:52:36.067499 CBFS: Found @ offset 107000 size 4b44
408 06:52:36.073829 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
409 06:52:36.084427 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
410 06:52:36.087584 Processing 180 relocs. Offset value of 0x97c0c000
411 06:52:36.095743 Accumulated console time in romstage 286 ms
412 06:52:36.095831
413 06:52:36.095900
414 06:52:36.105632 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
415 06:52:36.112651 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
416 06:52:36.115904 CBFS @ c08000 size 3f8000
417 06:52:36.119260 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
418 06:52:36.125337 CBFS: Locating 'fallback/ramstage'
419 06:52:36.128717 CBFS: Found @ offset 43380 size 1b9e8
420 06:52:36.135562 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
421 06:52:36.167283 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
422 06:52:36.170566 Processing 3976 relocs. Offset value of 0x98db0000
423 06:52:36.177493 Accumulated console time in postcar 52 ms
424 06:52:36.177581
425 06:52:36.177650
426 06:52:36.187038 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
427 06:52:36.193879 FMAP: area RO_VPD found @ c00000 (16384 bytes)
428 06:52:36.196937 WARNING: RO_VPD is uninitialized or empty.
429 06:52:36.200241 FMAP: area RW_VPD found @ af8000 (8192 bytes)
430 06:52:36.207012 FMAP: area RW_VPD found @ af8000 (8192 bytes)
431 06:52:36.207128 Normal boot.
432 06:52:36.213974 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
433 06:52:36.217126 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
434 06:52:36.220414 CBFS @ c08000 size 3f8000
435 06:52:36.226747 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
436 06:52:36.229948 CBFS: Locating 'cpu_microcode_blob.bin'
437 06:52:36.233083 CBFS: Found @ offset 14700 size 2ec00
438 06:52:36.236191 microcode: sig=0x806ec pf=0x4 revision=0xc9
439 06:52:36.239975 Skip microcode update
440 06:52:36.246497 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
441 06:52:36.246584 CBFS @ c08000 size 3f8000
442 06:52:36.252998 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
443 06:52:36.256246 CBFS: Locating 'fsps.bin'
444 06:52:36.259898 CBFS: Found @ offset d1fc0 size 35000
445 06:52:36.285404 Detected 4 core, 8 thread CPU.
446 06:52:36.289024 Setting up SMI for CPU
447 06:52:36.292197 IED base = 0x9ac00000
448 06:52:36.292285 IED size = 0x00400000
449 06:52:36.295794 Will perform SMM setup.
450 06:52:36.302252 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
451 06:52:36.308723 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
452 06:52:36.311992 Processing 16 relocs. Offset value of 0x00030000
453 06:52:36.315164
454 06:52:36.315251 Attempting to start 7 APs
455 06:52:36.321538 Waiting for 10ms after sending INIT.
456 06:52:36.335605 Waiting for 1st SIPI to complete...done.
457 06:52:36.335712 AP: slot 4 apic_id 4.
458 06:52:36.338751 AP: slot 5 apic_id 5.
459 06:52:36.342000 AP: slot 3 apic_id 2.
460 06:52:36.342100 AP: slot 1 apic_id 3.
461 06:52:36.345265 AP: slot 7 apic_id 6.
462 06:52:36.348901 AP: slot 6 apic_id 7.
463 06:52:36.351593 Waiting for 2nd SIPI to complete...done.
464 06:52:36.355391 AP: slot 2 apic_id 1.
465 06:52:36.361628 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
466 06:52:36.368560 Processing 13 relocs. Offset value of 0x00038000
467 06:52:36.374902 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
468 06:52:36.378103 Installing SMM handler to 0x9a000000
469 06:52:36.384941 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
470 06:52:36.391262 Processing 658 relocs. Offset value of 0x9a010000
471 06:52:36.397577 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
472 06:52:36.400975 Processing 13 relocs. Offset value of 0x9a008000
473 06:52:36.408250 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
474 06:52:36.414206 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
475 06:52:36.420740 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
476 06:52:36.424583 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
477 06:52:36.431022 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
478 06:52:36.437345 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
479 06:52:36.444129 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
480 06:52:36.450555 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
481 06:52:36.454279 Clearing SMI status registers
482 06:52:36.454364 SMI_STS: PM1
483 06:52:36.457208 PM1_STS: PWRBTN
484 06:52:36.457293 TCO_STS: SECOND_TO
485 06:52:36.460310 New SMBASE 0x9a000000
486 06:52:36.464013 In relocation handler: CPU 0
487 06:52:36.467265 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
488 06:52:36.473460 Writing SMRR. base = 0x9a000006, mask=0xff000800
489 06:52:36.473546 Relocation complete.
490 06:52:36.476789 New SMBASE 0x99fff800
491 06:52:36.480380 In relocation handler: CPU 2
492 06:52:36.483579 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
493 06:52:36.490169 Writing SMRR. base = 0x9a000006, mask=0xff000800
494 06:52:36.490256 Relocation complete.
495 06:52:36.493239 New SMBASE 0x99fffc00
496 06:52:36.496978 In relocation handler: CPU 1
497 06:52:36.499903 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
498 06:52:36.506268 Writing SMRR. base = 0x9a000006, mask=0xff000800
499 06:52:36.506354 Relocation complete.
500 06:52:36.509321 New SMBASE 0x99fff400
501 06:52:36.512812 In relocation handler: CPU 3
502 06:52:36.515996 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
503 06:52:36.522658 Writing SMRR. base = 0x9a000006, mask=0xff000800
504 06:52:36.522743 Relocation complete.
505 06:52:36.526583 New SMBASE 0x99ffe400
506 06:52:36.529703 In relocation handler: CPU 7
507 06:52:36.532842 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
508 06:52:36.535983 Writing SMRR. base = 0x9a000006, mask=0xff000800
509 06:52:36.539069
510 06:52:36.539153 Relocation complete.
511 06:52:36.542245 New SMBASE 0x99ffe800
512 06:52:36.545646 In relocation handler: CPU 6
513 06:52:36.549290 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
514 06:52:36.552458 Writing SMRR. base = 0x9a000006, mask=0xff000800
515 06:52:36.555587 Relocation complete.
516 06:52:36.559246 New SMBASE 0x99fff000
517 06:52:36.562568 In relocation handler: CPU 4
518 06:52:36.565597 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
519 06:52:36.569352 Writing SMRR. base = 0x9a000006, mask=0xff000800
520 06:52:36.572413 Relocation complete.
521 06:52:36.575604 New SMBASE 0x99ffec00
522 06:52:36.578703 In relocation handler: CPU 5
523 06:52:36.582494 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
524 06:52:36.585538 Writing SMRR. base = 0x9a000006, mask=0xff000800
525 06:52:36.588807 Relocation complete.
526 06:52:36.592243 Initializing CPU #0
527 06:52:36.595415 CPU: vendor Intel device 806ec
528 06:52:36.598509 CPU: family 06, model 8e, stepping 0c
529 06:52:36.602169 Clearing out pending MCEs
530 06:52:36.602279 Setting up local APIC...
531 06:52:36.605294 apic_id: 0x00 done.
532 06:52:36.608552 Turbo is available but hidden
533 06:52:36.611522 Turbo is available and visible
534 06:52:36.615115 VMX status: enabled
535 06:52:36.618372 IA32_FEATURE_CONTROL status: locked
536 06:52:36.618457 Skip microcode update
537 06:52:36.621360 CPU #0 initialized
538 06:52:36.624788 Initializing CPU #2
539 06:52:36.624879 Initializing CPU #1
540 06:52:36.628008 Initializing CPU #3
541 06:52:36.631757 CPU: vendor Intel device 806ec
542 06:52:36.635074 CPU: family 06, model 8e, stepping 0c
543 06:52:36.637943 CPU: vendor Intel device 806ec
544 06:52:36.641164 CPU: family 06, model 8e, stepping 0c
545 06:52:36.644613 Clearing out pending MCEs
546 06:52:36.648166 Clearing out pending MCEs
547 06:52:36.648271 Setting up local APIC...
548 06:52:36.651373 CPU: vendor Intel device 806ec
549 06:52:36.654473 CPU: family 06, model 8e, stepping 0c
550 06:52:36.657557
551 06:52:36.657643 Clearing out pending MCEs
552 06:52:36.660877 Initializing CPU #4
553 06:52:36.664635 Initializing CPU #5
554 06:52:36.664719 CPU: vendor Intel device 806ec
555 06:52:36.667725
556 06:52:36.671218 CPU: family 06, model 8e, stepping 0c
557 06:52:36.671303 Initializing CPU #7
558 06:52:36.674485 Clearing out pending MCEs
559 06:52:36.677294 CPU: vendor Intel device 806ec
560 06:52:36.681182 CPU: family 06, model 8e, stepping 0c
561 06:52:36.684641 Setting up local APIC...
562 06:52:36.687567 Setting up local APIC...
563 06:52:36.687657 Clearing out pending MCEs
564 06:52:36.691173 apic_id: 0x04 done.
565 06:52:36.694120 Setting up local APIC...
566 06:52:36.697739 apic_id: 0x01 done.
567 06:52:36.697822 apic_id: 0x05 done.
568 06:52:36.700806 VMX status: enabled
569 06:52:36.700890 VMX status: enabled
570 06:52:36.703906 IA32_FEATURE_CONTROL status: locked
571 06:52:36.707628
572 06:52:36.710867 IA32_FEATURE_CONTROL status: locked
573 06:52:36.710948 Skip microcode update
574 06:52:36.713976 Skip microcode update
575 06:52:36.717543 CPU #4 initialized
576 06:52:36.717629 CPU #5 initialized
577 06:52:36.720876 Initializing CPU #6
578 06:52:36.724052 CPU: vendor Intel device 806ec
579 06:52:36.727305 CPU: family 06, model 8e, stepping 0c
580 06:52:36.730521 CPU: vendor Intel device 806ec
581 06:52:36.733594 CPU: family 06, model 8e, stepping 0c
582 06:52:36.736831 Clearing out pending MCEs
583 06:52:36.736926 Clearing out pending MCEs
584 06:52:36.740776
585 06:52:36.740862 Setting up local APIC...
586 06:52:36.743842 VMX status: enabled
587 06:52:36.747058 apic_id: 0x03 done.
588 06:52:36.747135 Setting up local APIC...
589 06:52:36.750220 apic_id: 0x07 done.
590 06:52:36.753524 Setting up local APIC...
591 06:52:36.753633 apic_id: 0x02 done.
592 06:52:36.757234 VMX status: enabled
593 06:52:36.760339 VMX status: enabled
594 06:52:36.763388 IA32_FEATURE_CONTROL status: locked
595 06:52:36.767098 IA32_FEATURE_CONTROL status: locked
596 06:52:36.767218 Skip microcode update
597 06:52:36.770215 Skip microcode update
598 06:52:36.773623 CPU #1 initialized
599 06:52:36.773765 CPU #3 initialized
600 06:52:36.776854 IA32_FEATURE_CONTROL status: locked
601 06:52:36.780130 apic_id: 0x06 done.
602 06:52:36.783398 VMX status: enabled
603 06:52:36.783480 VMX status: enabled
604 06:52:36.786467 IA32_FEATURE_CONTROL status: locked
605 06:52:36.790239 IA32_FEATURE_CONTROL status: locked
606 06:52:36.793313 Skip microcode update
607 06:52:36.797031 Skip microcode update
608 06:52:36.797115 CPU #6 initialized
609 06:52:36.800250 CPU #7 initialized
610 06:52:36.803653 Skip microcode update
611 06:52:36.803755 CPU #2 initialized
612 06:52:36.810227 bsp_do_flight_plan done after 454 msecs.
613 06:52:36.810369 CPU: frequency set to 4200 MHz
614 06:52:36.813299
615 06:52:36.813415 Enabling SMIs.
616 06:52:36.813487 Locking SMM.
617 06:52:36.829843 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
618 06:52:36.832925 CBFS @ c08000 size 3f8000
619 06:52:36.839486 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
620 06:52:36.839574 CBFS: Locating 'vbt.bin'
621 06:52:36.842590 CBFS: Found @ offset 5f5c0 size 499
622 06:52:36.845739
623 06:52:36.848858 Found a VBT of 4608 bytes after decompression
624 06:52:37.034831 Display FSP Version Info HOB
625 06:52:37.037980 Reference Code - CPU = 9.0.1e.30
626 06:52:37.041093 uCode Version = 0.0.0.ca
627 06:52:37.044541 TXT ACM version = ff.ff.ff.ffff
628 06:52:37.047568 Display FSP Version Info HOB
629 06:52:37.050614 Reference Code - ME = 9.0.1e.30
630 06:52:37.053834 MEBx version = 0.0.0.0
631 06:52:37.057769 ME Firmware Version = Consumer SKU
632 06:52:37.060299 Display FSP Version Info HOB
633 06:52:37.064014 Reference Code - CML PCH = 9.0.1e.30
634 06:52:37.067110 PCH-CRID Status = Disabled
635 06:52:37.070459 PCH-CRID Original Value = ff.ff.ff.ffff
636 06:52:37.073444 PCH-CRID New Value = ff.ff.ff.ffff
637 06:52:37.077134 OPROM - RST - RAID = ff.ff.ff.ffff
638 06:52:37.080122 ChipsetInit Base Version = ff.ff.ff.ffff
639 06:52:37.083453 ChipsetInit Oem Version = ff.ff.ff.ffff
640 06:52:37.087107
641 06:52:37.087187 Display FSP Version Info HOB
642 06:52:37.093430 Reference Code - SA - System Agent = 9.0.1e.30
643 06:52:37.096460 Reference Code - MRC = 0.7.1.6c
644 06:52:37.099614 SA - PCIe Version = 9.0.1e.30
645 06:52:37.102882 SA-CRID Status = Disabled
646 06:52:37.106567 SA-CRID Original Value = 0.0.0.c
647 06:52:37.106691 SA-CRID New Value = 0.0.0.c
648 06:52:37.109643 OPROM - VBIOS = ff.ff.ff.ffff
649 06:52:37.113358 RTC Init
650 06:52:37.116571 Set power on after power failure.
651 06:52:37.116661 Disabling Deep S3
652 06:52:37.119703
653 06:52:37.119789 Disabling Deep S3
654 06:52:37.122790 Disabling Deep S4
655 06:52:37.122875 Disabling Deep S4
656 06:52:37.125876 Disabling Deep S5
657 06:52:37.125968 Disabling Deep S5
658 06:52:37.132927 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 196 exit 1
659 06:52:37.136181 Enumerating buses...
660 06:52:37.139264 Show all devs... Before device enumeration.
661 06:52:37.142500 Root Device: enabled 1
662 06:52:37.145818 CPU_CLUSTER: 0: enabled 1
663 06:52:37.145912 DOMAIN: 0000: enabled 1
664 06:52:37.149001 APIC: 00: enabled 1
665 06:52:37.152213 PCI: 00:00.0: enabled 1
666 06:52:37.152297 PCI: 00:02.0: enabled 1
667 06:52:37.155875 PCI: 00:04.0: enabled 0
668 06:52:37.159085 PCI: 00:05.0: enabled 0
669 06:52:37.162009 PCI: 00:12.0: enabled 1
670 06:52:37.162091 PCI: 00:12.5: enabled 0
671 06:52:37.165320 PCI: 00:12.6: enabled 0
672 06:52:37.168858 PCI: 00:14.0: enabled 1
673 06:52:37.172214 PCI: 00:14.1: enabled 0
674 06:52:37.172298 PCI: 00:14.3: enabled 1
675 06:52:37.175195 PCI: 00:14.5: enabled 0
676 06:52:37.178510 PCI: 00:15.0: enabled 1
677 06:52:37.181535 PCI: 00:15.1: enabled 1
678 06:52:37.181618 PCI: 00:15.2: enabled 0
679 06:52:37.185295 PCI: 00:15.3: enabled 0
680 06:52:37.188231 PCI: 00:16.0: enabled 1
681 06:52:37.191636 PCI: 00:16.1: enabled 0
682 06:52:37.191785 PCI: 00:16.2: enabled 0
683 06:52:37.194840 PCI: 00:16.3: enabled 0
684 06:52:37.198540 PCI: 00:16.4: enabled 0
685 06:52:37.201493 PCI: 00:16.5: enabled 0
686 06:52:37.201607 PCI: 00:17.0: enabled 1
687 06:52:37.204717 PCI: 00:19.0: enabled 1
688 06:52:37.207834 PCI: 00:19.1: enabled 0
689 06:52:37.210891 PCI: 00:19.2: enabled 0
690 06:52:37.211021 PCI: 00:1a.0: enabled 0
691 06:52:37.214526 PCI: 00:1c.0: enabled 0
692 06:52:37.217863 PCI: 00:1c.1: enabled 0
693 06:52:37.221058 PCI: 00:1c.2: enabled 0
694 06:52:37.221164 PCI: 00:1c.3: enabled 0
695 06:52:37.224277 PCI: 00:1c.4: enabled 0
696 06:52:37.227809 PCI: 00:1c.5: enabled 0
697 06:52:37.227894 PCI: 00:1c.6: enabled 0
698 06:52:37.231035
699 06:52:37.231120 PCI: 00:1c.7: enabled 0
700 06:52:37.234285 PCI: 00:1d.0: enabled 1
701 06:52:37.237697 PCI: 00:1d.1: enabled 0
702 06:52:37.237786 PCI: 00:1d.2: enabled 0
703 06:52:37.240685 PCI: 00:1d.3: enabled 0
704 06:52:37.243944 PCI: 00:1d.4: enabled 0
705 06:52:37.247159 PCI: 00:1d.5: enabled 1
706 06:52:37.247241 PCI: 00:1e.0: enabled 1
707 06:52:37.250353 PCI: 00:1e.1: enabled 0
708 06:52:37.253595 PCI: 00:1e.2: enabled 1
709 06:52:37.257284 PCI: 00:1e.3: enabled 1
710 06:52:37.257377 PCI: 00:1f.0: enabled 1
711 06:52:37.260237 PCI: 00:1f.1: enabled 1
712 06:52:37.263333 PCI: 00:1f.2: enabled 1
713 06:52:37.267070 PCI: 00:1f.3: enabled 1
714 06:52:37.267200 PCI: 00:1f.4: enabled 1
715 06:52:37.270169 PCI: 00:1f.5: enabled 1
716 06:52:37.273312 PCI: 00:1f.6: enabled 0
717 06:52:37.276913 USB0 port 0: enabled 1
718 06:52:37.277018 I2C: 00:15: enabled 1
719 06:52:37.280085 I2C: 00:5d: enabled 1
720 06:52:37.283024 GENERIC: 0.0: enabled 1
721 06:52:37.283122 I2C: 00:1a: enabled 1
722 06:52:37.286842 I2C: 00:38: enabled 1
723 06:52:37.289874 I2C: 00:39: enabled 1
724 06:52:37.289974 I2C: 00:3a: enabled 1
725 06:52:37.293091 I2C: 00:3b: enabled 1
726 06:52:37.296216 PCI: 00:00.0: enabled 1
727 06:52:37.296324 SPI: 00: enabled 1
728 06:52:37.299482 SPI: 01: enabled 1
729 06:52:37.303261 PNP: 0c09.0: enabled 1
730 06:52:37.303351 USB2 port 0: enabled 1
731 06:52:37.306217
732 06:52:37.306335 USB2 port 1: enabled 1
733 06:52:37.309248 USB2 port 2: enabled 0
734 06:52:37.313252 USB2 port 3: enabled 0
735 06:52:37.313351 USB2 port 5: enabled 0
736 06:52:37.316239 USB2 port 6: enabled 1
737 06:52:37.319395 USB2 port 9: enabled 1
738 06:52:37.319489 USB3 port 0: enabled 1
739 06:52:37.322390
740 06:52:37.322483 USB3 port 1: enabled 1
741 06:52:37.326090 USB3 port 2: enabled 1
742 06:52:37.329192 USB3 port 3: enabled 1
743 06:52:37.329285 USB3 port 4: enabled 0
744 06:52:37.332296 APIC: 03: enabled 1
745 06:52:37.335727 APIC: 01: enabled 1
746 06:52:37.335816 APIC: 02: enabled 1
747 06:52:37.339425 APIC: 04: enabled 1
748 06:52:37.339513 APIC: 05: enabled 1
749 06:52:37.342740 APIC: 07: enabled 1
750 06:52:37.345772 APIC: 06: enabled 1
751 06:52:37.345905 Compare with tree...
752 06:52:37.349188 Root Device: enabled 1
753 06:52:37.352121 CPU_CLUSTER: 0: enabled 1
754 06:52:37.355368 APIC: 00: enabled 1
755 06:52:37.355485 APIC: 03: enabled 1
756 06:52:37.358529 APIC: 01: enabled 1
757 06:52:37.362195 APIC: 02: enabled 1
758 06:52:37.362346 APIC: 04: enabled 1
759 06:52:37.365470 APIC: 05: enabled 1
760 06:52:37.368581 APIC: 07: enabled 1
761 06:52:37.368700 APIC: 06: enabled 1
762 06:52:37.371769 DOMAIN: 0000: enabled 1
763 06:52:37.374887 PCI: 00:00.0: enabled 1
764 06:52:37.378574 PCI: 00:02.0: enabled 1
765 06:52:37.381654 PCI: 00:04.0: enabled 0
766 06:52:37.381796 PCI: 00:05.0: enabled 0
767 06:52:37.385225 PCI: 00:12.0: enabled 1
768 06:52:37.388214 PCI: 00:12.5: enabled 0
769 06:52:37.391279 PCI: 00:12.6: enabled 0
770 06:52:37.395004 PCI: 00:14.0: enabled 1
771 06:52:37.395132 USB0 port 0: enabled 1
772 06:52:37.398145 USB2 port 0: enabled 1
773 06:52:37.401263 USB2 port 1: enabled 1
774 06:52:37.404551 USB2 port 2: enabled 0
775 06:52:37.407784 USB2 port 3: enabled 0
776 06:52:37.407898 USB2 port 5: enabled 0
777 06:52:37.411559 USB2 port 6: enabled 1
778 06:52:37.414859 USB2 port 9: enabled 1
779 06:52:37.417727 USB3 port 0: enabled 1
780 06:52:37.421517 USB3 port 1: enabled 1
781 06:52:37.424826 USB3 port 2: enabled 1
782 06:52:37.424915 USB3 port 3: enabled 1
783 06:52:37.428032 USB3 port 4: enabled 0
784 06:52:37.430994 PCI: 00:14.1: enabled 0
785 06:52:37.434726 PCI: 00:14.3: enabled 1
786 06:52:37.437951 PCI: 00:14.5: enabled 0
787 06:52:37.438044 PCI: 00:15.0: enabled 1
788 06:52:37.441117 I2C: 00:15: enabled 1
789 06:52:37.444298 PCI: 00:15.1: enabled 1
790 06:52:37.447505 I2C: 00:5d: enabled 1
791 06:52:37.450832 GENERIC: 0.0: enabled 1
792 06:52:37.450912 PCI: 00:15.2: enabled 0
793 06:52:37.454234 PCI: 00:15.3: enabled 0
794 06:52:37.457347 PCI: 00:16.0: enabled 1
795 06:52:37.460525 PCI: 00:16.1: enabled 0
796 06:52:37.464144 PCI: 00:16.2: enabled 0
797 06:52:37.464242 PCI: 00:16.3: enabled 0
798 06:52:37.467269 PCI: 00:16.4: enabled 0
799 06:52:37.470445 PCI: 00:16.5: enabled 0
800 06:52:37.473729 PCI: 00:17.0: enabled 1
801 06:52:37.477275 PCI: 00:19.0: enabled 1
802 06:52:37.477363 I2C: 00:1a: enabled 1
803 06:52:37.480360 I2C: 00:38: enabled 1
804 06:52:37.483513 I2C: 00:39: enabled 1
805 06:52:37.486824 I2C: 00:3a: enabled 1
806 06:52:37.490122 I2C: 00:3b: enabled 1
807 06:52:37.490212 PCI: 00:19.1: enabled 0
808 06:52:37.493202 PCI: 00:19.2: enabled 0
809 06:52:37.497054 PCI: 00:1a.0: enabled 0
810 06:52:37.500130 PCI: 00:1c.0: enabled 0
811 06:52:37.503309 PCI: 00:1c.1: enabled 0
812 06:52:37.503396 PCI: 00:1c.2: enabled 0
813 06:52:37.506497 PCI: 00:1c.3: enabled 0
814 06:52:37.509746 PCI: 00:1c.4: enabled 0
815 06:52:37.512875 PCI: 00:1c.5: enabled 0
816 06:52:37.516104 PCI: 00:1c.6: enabled 0
817 06:52:37.516193 PCI: 00:1c.7: enabled 0
818 06:52:37.519204 PCI: 00:1d.0: enabled 1
819 06:52:37.522659 PCI: 00:1d.1: enabled 0
820 06:52:37.526427 PCI: 00:1d.2: enabled 0
821 06:52:37.529473 PCI: 00:1d.3: enabled 0
822 06:52:37.529563 PCI: 00:1d.4: enabled 0
823 06:52:37.532491 PCI: 00:1d.5: enabled 1
824 06:52:37.535755 PCI: 00:00.0: enabled 1
825 06:52:37.538918 PCI: 00:1e.0: enabled 1
826 06:52:37.542217 PCI: 00:1e.1: enabled 0
827 06:52:37.542303 PCI: 00:1e.2: enabled 1
828 06:52:37.545325 SPI: 00: enabled 1
829 06:52:37.548644 PCI: 00:1e.3: enabled 1
830 06:52:37.552535 SPI: 01: enabled 1
831 06:52:37.552623 PCI: 00:1f.0: enabled 1
832 06:52:37.555853 PNP: 0c09.0: enabled 1
833 06:52:37.559190 PCI: 00:1f.1: enabled 1
834 06:52:37.562245 PCI: 00:1f.2: enabled 1
835 06:52:37.565530 PCI: 00:1f.3: enabled 1
836 06:52:37.565619 PCI: 00:1f.4: enabled 1
837 06:52:37.568772 PCI: 00:1f.5: enabled 1
838 06:52:37.572276 PCI: 00:1f.6: enabled 0
839 06:52:37.575120 Root Device scanning...
840 06:52:37.578915 scan_static_bus for Root Device
841 06:52:37.579012 CPU_CLUSTER: 0 enabled
842 06:52:37.582212 DOMAIN: 0000 enabled
843 06:52:37.585192 DOMAIN: 0000 scanning...
844 06:52:37.588485 PCI: pci_scan_bus for bus 00
845 06:52:37.591636 PCI: 00:00.0 [8086/0000] ops
846 06:52:37.594757 PCI: 00:00.0 [8086/9b61] enabled
847 06:52:37.598380 PCI: 00:02.0 [8086/0000] bus ops
848 06:52:37.601529 PCI: 00:02.0 [8086/9b41] enabled
849 06:52:37.604759 PCI: 00:04.0 [8086/1903] disabled
850 06:52:37.608139 PCI: 00:08.0 [8086/1911] enabled
851 06:52:37.611716 PCI: 00:12.0 [8086/02f9] enabled
852 06:52:37.614699 PCI: 00:14.0 [8086/0000] bus ops
853 06:52:37.617866 PCI: 00:14.0 [8086/02ed] enabled
854 06:52:37.621197 PCI: 00:14.2 [8086/02ef] enabled
855 06:52:37.624223 PCI: 00:14.3 [8086/02f0] enabled
856 06:52:37.628180 PCI: 00:15.0 [8086/0000] bus ops
857 06:52:37.631229 PCI: 00:15.0 [8086/02e8] enabled
858 06:52:37.634352 PCI: 00:15.1 [8086/0000] bus ops
859 06:52:37.637478 PCI: 00:15.1 [8086/02e9] enabled
860 06:52:37.640832 PCI: 00:16.0 [8086/0000] ops
861 06:52:37.643827 PCI: 00:16.0 [8086/02e0] enabled
862 06:52:37.647875 PCI: 00:17.0 [8086/0000] ops
863 06:52:37.650396 PCI: 00:17.0 [8086/02d3] enabled
864 06:52:37.654222 PCI: 00:19.0 [8086/0000] bus ops
865 06:52:37.657659 PCI: 00:19.0 [8086/02c5] enabled
866 06:52:37.660710 PCI: 00:1d.0 [8086/0000] bus ops
867 06:52:37.663931 PCI: 00:1d.0 [8086/02b0] enabled
868 06:52:37.670155 PCI: Static device PCI: 00:1d.5 not found, disabling it.
869 06:52:37.673522 PCI: 00:1e.0 [8086/0000] ops
870 06:52:37.676602 PCI: 00:1e.0 [8086/02a8] enabled
871 06:52:37.679870 PCI: 00:1e.2 [8086/0000] bus ops
872 06:52:37.683610 PCI: 00:1e.2 [8086/02aa] enabled
873 06:52:37.686756 PCI: 00:1e.3 [8086/0000] bus ops
874 06:52:37.689897 PCI: 00:1e.3 [8086/02ab] enabled
875 06:52:37.693137 PCI: 00:1f.0 [8086/0000] bus ops
876 06:52:37.696308 PCI: 00:1f.0 [8086/0284] enabled
877 06:52:37.699502 PCI: Static device PCI: 00:1f.1 not found, disabling it.
878 06:52:37.706518 PCI: Static device PCI: 00:1f.2 not found, disabling it.
879 06:52:37.709714 PCI: 00:1f.3 [8086/0000] bus ops
880 06:52:37.712858 PCI: 00:1f.3 [8086/02c8] enabled
881 06:52:37.716131 PCI: 00:1f.4 [8086/0000] bus ops
882 06:52:37.719370 PCI: 00:1f.4 [8086/02a3] enabled
883 06:52:37.722614 PCI: 00:1f.5 [8086/0000] bus ops
884 06:52:37.726283 PCI: 00:1f.5 [8086/02a4] enabled
885 06:52:37.729319 PCI: Leftover static devices:
886 06:52:37.732552 PCI: 00:05.0
887 06:52:37.732636 PCI: 00:12.5
888 06:52:37.732702 PCI: 00:12.6
889 06:52:37.736169 PCI: 00:14.1
890 06:52:37.736264 PCI: 00:14.5
891 06:52:37.738915 PCI: 00:15.2
892 06:52:37.739001 PCI: 00:15.3
893 06:52:37.739067 PCI: 00:16.1
894 06:52:37.742058
895 06:52:37.742142 PCI: 00:16.2
896 06:52:37.742224 PCI: 00:16.3
897 06:52:37.745310 PCI: 00:16.4
898 06:52:37.745432 PCI: 00:16.5
899 06:52:37.748504 PCI: 00:19.1
900 06:52:37.748588 PCI: 00:19.2
901 06:52:37.748653 PCI: 00:1a.0
902 06:52:37.751749 PCI: 00:1c.0
903 06:52:37.751833 PCI: 00:1c.1
904 06:52:37.755235 PCI: 00:1c.2
905 06:52:37.755318 PCI: 00:1c.3
906 06:52:37.755383 PCI: 00:1c.4
907 06:52:37.758582
908 06:52:37.758666 PCI: 00:1c.5
909 06:52:37.758731 PCI: 00:1c.6
910 06:52:37.761639 PCI: 00:1c.7
911 06:52:37.761723 PCI: 00:1d.1
912 06:52:37.764824 PCI: 00:1d.2
913 06:52:37.764908 PCI: 00:1d.3
914 06:52:37.764974 PCI: 00:1d.4
915 06:52:37.768691 PCI: 00:1d.5
916 06:52:37.768774 PCI: 00:1e.1
917 06:52:37.771887 PCI: 00:1f.1
918 06:52:37.771969 PCI: 00:1f.2
919 06:52:37.772035 PCI: 00:1f.6
920 06:52:37.775054
921 06:52:37.775141 PCI: Check your devicetree.cb.
922 06:52:37.778323 PCI: 00:02.0 scanning...
923 06:52:37.781329 scan_generic_bus for PCI: 00:02.0
924 06:52:37.787867 scan_generic_bus for PCI: 00:02.0 done
925 06:52:37.791126 scan_bus: scanning of bus PCI: 00:02.0 took 10200 usecs
926 06:52:37.794353 PCI: 00:14.0 scanning...
927 06:52:37.798032 scan_static_bus for PCI: 00:14.0
928 06:52:37.801079 USB0 port 0 enabled
929 06:52:37.801183 USB0 port 0 scanning...
930 06:52:37.804296
931 06:52:37.807334 scan_static_bus for USB0 port 0
932 06:52:37.807440 USB2 port 0 enabled
933 06:52:37.810516 USB2 port 1 enabled
934 06:52:37.810622 USB2 port 2 disabled
935 06:52:37.814461
936 06:52:37.814561 USB2 port 3 disabled
937 06:52:37.817655 USB2 port 5 disabled
938 06:52:37.817760 USB2 port 6 enabled
939 06:52:37.820790 USB2 port 9 enabled
940 06:52:37.824009 USB3 port 0 enabled
941 06:52:37.824116 USB3 port 1 enabled
942 06:52:37.827192 USB3 port 2 enabled
943 06:52:37.830411 USB3 port 3 enabled
944 06:52:37.830518 USB3 port 4 disabled
945 06:52:37.833771 USB2 port 0 scanning...
946 06:52:37.836846 scan_static_bus for USB2 port 0
947 06:52:37.840774 scan_static_bus for USB2 port 0 done
948 06:52:37.847029 scan_bus: scanning of bus USB2 port 0 took 9710 usecs
949 06:52:37.847145 USB2 port 1 scanning...
950 06:52:37.850270
951 06:52:37.853520 scan_static_bus for USB2 port 1
952 06:52:37.856647 scan_static_bus for USB2 port 1 done
953 06:52:37.859869 scan_bus: scanning of bus USB2 port 1 took 9708 usecs
954 06:52:37.863061 USB2 port 6 scanning...
955 06:52:37.866898 scan_static_bus for USB2 port 6
956 06:52:37.869611 scan_static_bus for USB2 port 6 done
957 06:52:37.876521 scan_bus: scanning of bus USB2 port 6 took 9714 usecs
958 06:52:37.879663 USB2 port 9 scanning...
959 06:52:37.882780 scan_static_bus for USB2 port 9
960 06:52:37.886064 scan_static_bus for USB2 port 9 done
961 06:52:37.892456 scan_bus: scanning of bus USB2 port 9 took 9703 usecs
962 06:52:37.892597 USB3 port 0 scanning...
963 06:52:37.895796 scan_static_bus for USB3 port 0
964 06:52:37.899533 scan_static_bus for USB3 port 0 done
965 06:52:37.905969 scan_bus: scanning of bus USB3 port 0 took 9711 usecs
966 06:52:37.909108 USB3 port 1 scanning...
967 06:52:37.912460 scan_static_bus for USB3 port 1
968 06:52:37.915603 scan_static_bus for USB3 port 1 done
969 06:52:37.922078 scan_bus: scanning of bus USB3 port 1 took 9701 usecs
970 06:52:37.922185 USB3 port 2 scanning...
971 06:52:37.926074 scan_static_bus for USB3 port 2
972 06:52:37.931989 scan_static_bus for USB3 port 2 done
973 06:52:37.935265 scan_bus: scanning of bus USB3 port 2 took 9699 usecs
974 06:52:37.938557 USB3 port 3 scanning...
975 06:52:37.941708 scan_static_bus for USB3 port 3
976 06:52:37.945090 scan_static_bus for USB3 port 3 done
977 06:52:37.951740 scan_bus: scanning of bus USB3 port 3 took 9702 usecs
978 06:52:37.954966 scan_static_bus for USB0 port 0 done
979 06:52:37.961432 scan_bus: scanning of bus USB0 port 0 took 155405 usecs
980 06:52:37.964782 scan_static_bus for PCI: 00:14.0 done
981 06:52:37.968179 scan_bus: scanning of bus PCI: 00:14.0 took 173041 usecs
982 06:52:37.971343
983 06:52:37.971427 PCI: 00:15.0 scanning...
984 06:52:37.974679 scan_generic_bus for PCI: 00:15.0
985 06:52:37.981194 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
986 06:52:37.984314 scan_generic_bus for PCI: 00:15.0 done
987 06:52:37.991307 scan_bus: scanning of bus PCI: 00:15.0 took 14310 usecs
988 06:52:37.991404 PCI: 00:15.1 scanning...
989 06:52:37.994411 scan_generic_bus for PCI: 00:15.1
990 06:52:38.001119 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
991 06:52:38.004450 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
992 06:52:38.007444 scan_generic_bus for PCI: 00:15.1 done
993 06:52:38.013894 scan_bus: scanning of bus PCI: 00:15.1 took 18595 usecs
994 06:52:38.017195 PCI: 00:19.0 scanning...
995 06:52:38.020986 scan_generic_bus for PCI: 00:19.0
996 06:52:38.024047 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
997 06:52:38.027090 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
998 06:52:38.033854 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
999 06:52:38.036833 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1000 06:52:38.039980 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1001 06:52:38.043880 scan_generic_bus for PCI: 00:19.0 done
1002 06:52:38.050418 scan_bus: scanning of bus PCI: 00:19.0 took 30748 usecs
1003 06:52:38.053573 PCI: 00:1d.0 scanning...
1004 06:52:38.056863 do_pci_scan_bridge for PCI: 00:1d.0
1005 06:52:38.060171 PCI: pci_scan_bus for bus 01
1006 06:52:38.063359 PCI: 01:00.0 [1c5c/1327] enabled
1007 06:52:38.066752 Enabling Common Clock Configuration
1008 06:52:38.069902 L1 Sub-State supported from root port 29
1009 06:52:38.073033 L1 Sub-State Support = 0xf
1010 06:52:38.076409 CommonModeRestoreTime = 0x28
1011 06:52:38.079586 Power On Value = 0x16, Power On Scale = 0x0
1012 06:52:38.082748 ASPM: Enabled L1
1013 06:52:38.089699 scan_bus: scanning of bus PCI: 00:1d.0 took 32804 usecs
1014 06:52:38.089803 PCI: 00:1e.2 scanning...
1015 06:52:38.092898 scan_generic_bus for PCI: 00:1e.2
1016 06:52:38.099165 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1017 06:52:38.102323 scan_generic_bus for PCI: 00:1e.2 done
1018 06:52:38.105601 scan_bus: scanning of bus PCI: 00:1e.2 took 14006 usecs
1019 06:52:38.108857
1020 06:52:38.108954 PCI: 00:1e.3 scanning...
1021 06:52:38.112034 scan_generic_bus for PCI: 00:1e.3
1022 06:52:38.119011 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1023 06:52:38.122125 scan_generic_bus for PCI: 00:1e.3 done
1024 06:52:38.125403 scan_bus: scanning of bus PCI: 00:1e.3 took 14011 usecs
1025 06:52:38.128671 PCI: 00:1f.0 scanning...
1026 06:52:38.131947 scan_static_bus for PCI: 00:1f.0
1027 06:52:38.135324 PNP: 0c09.0 enabled
1028 06:52:38.138468 scan_static_bus for PCI: 00:1f.0 done
1029 06:52:38.145468 scan_bus: scanning of bus PCI: 00:1f.0 took 12038 usecs
1030 06:52:38.148051 PCI: 00:1f.3 scanning...
1031 06:52:38.152014 scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs
1032 06:52:38.154709 PCI: 00:1f.4 scanning...
1033 06:52:38.157919 scan_generic_bus for PCI: 00:1f.4
1034 06:52:38.161304 scan_generic_bus for PCI: 00:1f.4 done
1035 06:52:38.167964 scan_bus: scanning of bus PCI: 00:1f.4 took 10193 usecs
1036 06:52:38.171367 PCI: 00:1f.5 scanning...
1037 06:52:38.174711 scan_generic_bus for PCI: 00:1f.5
1038 06:52:38.177954 scan_generic_bus for PCI: 00:1f.5 done
1039 06:52:38.184317 scan_bus: scanning of bus PCI: 00:1f.5 took 10201 usecs
1040 06:52:38.190954 scan_bus: scanning of bus DOMAIN: 0000 took 605179 usecs
1041 06:52:38.194099 scan_static_bus for Root Device done
1042 06:52:38.197883 scan_bus: scanning of bus Root Device took 625066 usecs
1043 06:52:38.200496
1044 06:52:38.200596 done
1045 06:52:38.203781 Chrome EC: UHEPI supported
1046 06:52:38.210859 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1047 06:52:38.214055 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1048 06:52:38.220445 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1049 06:52:38.227279 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1050 06:52:38.230660 SPI flash protection: WPSW=0 SRP0=1
1051 06:52:38.237653 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1052 06:52:38.240830 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1053 06:52:38.244004 found VGA at PCI: 00:02.0
1054 06:52:38.247329 Setting up VGA for PCI: 00:02.0
1055 06:52:38.253743 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1056 06:52:38.257020 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1057 06:52:38.260307 Allocating resources...
1058 06:52:38.263694 Reading resources...
1059 06:52:38.266922 Root Device read_resources bus 0 link: 0
1060 06:52:38.270352 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1061 06:52:38.276555 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1062 06:52:38.279690 DOMAIN: 0000 read_resources bus 0 link: 0
1063 06:52:38.287978 PCI: 00:14.0 read_resources bus 0 link: 0
1064 06:52:38.291030 USB0 port 0 read_resources bus 0 link: 0
1065 06:52:38.299419 USB0 port 0 read_resources bus 0 link: 0 done
1066 06:52:38.302527 PCI: 00:14.0 read_resources bus 0 link: 0 done
1067 06:52:38.309625 PCI: 00:15.0 read_resources bus 1 link: 0
1068 06:52:38.312866 PCI: 00:15.0 read_resources bus 1 link: 0 done
1069 06:52:38.319878 PCI: 00:15.1 read_resources bus 2 link: 0
1070 06:52:38.323134 PCI: 00:15.1 read_resources bus 2 link: 0 done
1071 06:52:38.330105 PCI: 00:19.0 read_resources bus 3 link: 0
1072 06:52:38.337088 PCI: 00:19.0 read_resources bus 3 link: 0 done
1073 06:52:38.340421 PCI: 00:1d.0 read_resources bus 1 link: 0
1074 06:52:38.346822 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1075 06:52:38.349929 PCI: 00:1e.2 read_resources bus 4 link: 0
1076 06:52:38.356381 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1077 06:52:38.359687 PCI: 00:1e.3 read_resources bus 5 link: 0
1078 06:52:38.366202 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1079 06:52:38.369523 PCI: 00:1f.0 read_resources bus 0 link: 0
1080 06:52:38.376612 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1081 06:52:38.382818 DOMAIN: 0000 read_resources bus 0 link: 0 done
1082 06:52:38.386504 Root Device read_resources bus 0 link: 0 done
1083 06:52:38.389583 Done reading resources.
1084 06:52:38.396005 Show resources in subtree (Root Device)...After reading.
1085 06:52:38.399339 Root Device child on link 0 CPU_CLUSTER: 0
1086 06:52:38.402643 CPU_CLUSTER: 0 child on link 0 APIC: 00
1087 06:52:38.406030 APIC: 00
1088 06:52:38.406113 APIC: 03
1089 06:52:38.406180 APIC: 01
1090 06:52:38.409105
1091 06:52:38.409188 APIC: 02
1092 06:52:38.409255 APIC: 04
1093 06:52:38.412424 APIC: 05
1094 06:52:38.412516 APIC: 07
1095 06:52:38.412656 APIC: 06
1096 06:52:38.419246 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1097 06:52:38.428581 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1098 06:52:38.478565 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1099 06:52:38.478748 PCI: 00:00.0
1100 06:52:38.479005 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1101 06:52:38.479696 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1102 06:52:38.479966 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1103 06:52:38.480260 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1104 06:52:38.525955 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1105 06:52:38.526262 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1106 06:52:38.526560 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1107 06:52:38.527178 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1108 06:52:38.527799 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1109 06:52:38.533603 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1110 06:52:38.539849 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1111 06:52:38.549585 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1112 06:52:38.559417 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1113 06:52:38.569671 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1114 06:52:38.579500 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1115 06:52:38.589107 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1116 06:52:38.589195 PCI: 00:02.0
1117 06:52:38.601973 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1118 06:52:38.611811 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1119 06:52:38.618824 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1120 06:52:38.622013 PCI: 00:04.0
1121 06:52:38.622099 PCI: 00:08.0
1122 06:52:38.631427 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1123 06:52:38.635232 PCI: 00:12.0
1124 06:52:38.644633 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1125 06:52:38.647826 PCI: 00:14.0 child on link 0 USB0 port 0
1126 06:52:38.658009 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1127 06:52:38.664215 USB0 port 0 child on link 0 USB2 port 0
1128 06:52:38.664336 USB2 port 0
1129 06:52:38.667582 USB2 port 1
1130 06:52:38.667673 USB2 port 2
1131 06:52:38.671211 USB2 port 3
1132 06:52:38.671300 USB2 port 5
1133 06:52:38.674497 USB2 port 6
1134 06:52:38.674584 USB2 port 9
1135 06:52:38.677247 USB3 port 0
1136 06:52:38.677350 USB3 port 1
1137 06:52:38.680329 USB3 port 2
1138 06:52:38.683610 USB3 port 3
1139 06:52:38.683696 USB3 port 4
1140 06:52:38.687540 PCI: 00:14.2
1141 06:52:38.696885 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1142 06:52:38.707007 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1143 06:52:38.707154 PCI: 00:14.3
1144 06:52:38.716671 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1145 06:52:38.723019 PCI: 00:15.0 child on link 0 I2C: 01:15
1146 06:52:38.733075 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1147 06:52:38.733216 I2C: 01:15
1148 06:52:38.736182 PCI: 00:15.1 child on link 0 I2C: 02:5d
1149 06:52:38.746197 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1150 06:52:38.749247 I2C: 02:5d
1151 06:52:38.749343 GENERIC: 0.0
1152 06:52:38.752435 PCI: 00:16.0
1153 06:52:38.762618 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 06:52:38.762777 PCI: 00:17.0
1155 06:52:38.772484 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1156 06:52:38.782292 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1157 06:52:38.788720 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1158 06:52:38.798193 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1159 06:52:38.807985 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1160 06:52:38.814778 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1161 06:52:38.821135 PCI: 00:19.0 child on link 0 I2C: 03:1a
1162 06:52:38.831309 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1163 06:52:38.831396 I2C: 03:1a
1164 06:52:38.834385 I2C: 03:38
1165 06:52:38.834469 I2C: 03:39
1166 06:52:38.837640 I2C: 03:3a
1167 06:52:38.837724 I2C: 03:3b
1168 06:52:38.840657 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1169 06:52:38.850683 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1170 06:52:38.860273 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1171 06:52:38.870390 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1172 06:52:38.870476 PCI: 01:00.0
1173 06:52:38.880234 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1174 06:52:38.883516 PCI: 00:1e.0
1175 06:52:38.893097 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1176 06:52:38.903106 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1177 06:52:38.909314 PCI: 00:1e.2 child on link 0 SPI: 00
1178 06:52:38.919491 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1179 06:52:38.919582 SPI: 00
1180 06:52:38.922675 PCI: 00:1e.3 child on link 0 SPI: 01
1181 06:52:38.932739 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1182 06:52:38.935748 SPI: 01
1183 06:52:38.939033 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1184 06:52:38.949002 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1185 06:52:38.955277 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1186 06:52:38.958504 PNP: 0c09.0
1187 06:52:38.967946 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1188 06:52:38.968032 PCI: 00:1f.3
1189 06:52:38.978420 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1190 06:52:38.988174 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1191 06:52:38.991331 PCI: 00:1f.4
1192 06:52:38.997670 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1193 06:52:39.007705 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1194 06:52:39.010883 PCI: 00:1f.5
1195 06:52:39.020578 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1196 06:52:39.027519 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1197 06:52:39.033671 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1198 06:52:39.040668 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1199 06:52:39.043766 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1200 06:52:39.046915 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1201 06:52:39.050166 PCI: 00:17.0 18 * [0x60 - 0x67] io
1202 06:52:39.053834 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1203 06:52:39.060231 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1204 06:52:39.066616 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1205 06:52:39.076847 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1206 06:52:39.083380 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1207 06:52:39.089812 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1208 06:52:39.092989 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1209 06:52:39.103226 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1210 06:52:39.106358 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1211 06:52:39.112626 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1212 06:52:39.116029 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1213 06:52:39.122910 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1214 06:52:39.126156 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1215 06:52:39.132575 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1216 06:52:39.135823 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1217 06:52:39.139082 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1218 06:52:39.142788
1219 06:52:39.145878 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1220 06:52:39.149109 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1221 06:52:39.155840 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1222 06:52:39.159020 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1223 06:52:39.165478 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1224 06:52:39.169064 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1225 06:52:39.175450 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1226 06:52:39.178728 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1227 06:52:39.185216 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1228 06:52:39.188446 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1229 06:52:39.195405 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1230 06:52:39.198661 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1231 06:52:39.205058 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1232 06:52:39.208124 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1233 06:52:39.214960 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1234 06:52:39.221265 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1235 06:52:39.224664 avoid_fixed_resources: DOMAIN: 0000
1236 06:52:39.230950 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1237 06:52:39.237220 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1238 06:52:39.244286 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1239 06:52:39.253588 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1240 06:52:39.260119 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1241 06:52:39.266696 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1242 06:52:39.276627 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1243 06:52:39.283267 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1244 06:52:39.289822 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1245 06:52:39.299706 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1246 06:52:39.306419 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1247 06:52:39.312543 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1248 06:52:39.316322 Setting resources...
1249 06:52:39.322754 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1250 06:52:39.326009 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1251 06:52:39.329325 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1252 06:52:39.332322 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1253 06:52:39.339265 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1254 06:52:39.345507 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1255 06:52:39.348676 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1256 06:52:39.355695 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1257 06:52:39.365167 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1258 06:52:39.368435 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1259 06:52:39.374802 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1260 06:52:39.378572 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1261 06:52:39.384601 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1262 06:52:39.388391 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1263 06:52:39.394881 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1264 06:52:39.398143 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1265 06:52:39.404351 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1266 06:52:39.407529 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1267 06:52:39.413843 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1268 06:52:39.417572 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1269 06:52:39.424094 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1270 06:52:39.427321 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1271 06:52:39.433755 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1272 06:52:39.436998 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1273 06:52:39.444046 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1274 06:52:39.447120 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1275 06:52:39.453318 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1276 06:52:39.456581 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1277 06:52:39.463739 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1278 06:52:39.466954 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1279 06:52:39.473315 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1280 06:52:39.476383 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1281 06:52:39.482760 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1282 06:52:39.492656 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1283 06:52:39.499743 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1284 06:52:39.506023 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1285 06:52:39.512357 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1286 06:52:39.519337 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1287 06:52:39.522505 Root Device assign_resources, bus 0 link: 0
1288 06:52:39.528775 DOMAIN: 0000 assign_resources, bus 0 link: 0
1289 06:52:39.535141 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1290 06:52:39.545274 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1291 06:52:39.551515 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1292 06:52:39.561728 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1293 06:52:39.568048 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1294 06:52:39.578001 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1295 06:52:39.581165 PCI: 00:14.0 assign_resources, bus 0 link: 0
1296 06:52:39.587610 PCI: 00:14.0 assign_resources, bus 0 link: 0
1297 06:52:39.594007 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1298 06:52:39.603711 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1299 06:52:39.610596 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1300 06:52:39.620182 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1301 06:52:39.623323 PCI: 00:15.0 assign_resources, bus 1 link: 0
1302 06:52:39.629811 PCI: 00:15.0 assign_resources, bus 1 link: 0
1303 06:52:39.636221 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1304 06:52:39.640051 PCI: 00:15.1 assign_resources, bus 2 link: 0
1305 06:52:39.646382 PCI: 00:15.1 assign_resources, bus 2 link: 0
1306 06:52:39.653279 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1307 06:52:39.662764 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1308 06:52:39.669587 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1309 06:52:39.679751 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1310 06:52:39.686109 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1311 06:52:39.692446 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1312 06:52:39.702120 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1313 06:52:39.708557 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1314 06:52:39.712534 PCI: 00:19.0 assign_resources, bus 3 link: 0
1315 06:52:39.715351
1316 06:52:39.719034 PCI: 00:19.0 assign_resources, bus 3 link: 0
1317 06:52:39.728623 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1318 06:52:39.734915 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1319 06:52:39.744584 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1320 06:52:39.748293 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1321 06:52:39.757759 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1322 06:52:39.761527 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1323 06:52:39.770868 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1324 06:52:39.777337 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1325 06:52:39.784233 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1326 06:52:39.787314 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1327 06:52:39.797042 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1328 06:52:39.800195 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1329 06:52:39.806625 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1330 06:52:39.810404 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1331 06:52:39.816797 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1332 06:52:39.819900 LPC: Trying to open IO window from 800 size 1ff
1333 06:52:39.829842 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1334 06:52:39.836455 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1335 06:52:39.846323 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1336 06:52:39.852863 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1337 06:52:39.858934 DOMAIN: 0000 assign_resources, bus 0 link: 0
1338 06:52:39.862662 Root Device assign_resources, bus 0 link: 0
1339 06:52:39.865855 Done setting resources.
1340 06:52:39.871959 Show resources in subtree (Root Device)...After assigning values.
1341 06:52:39.875838 Root Device child on link 0 CPU_CLUSTER: 0
1342 06:52:39.879118 CPU_CLUSTER: 0 child on link 0 APIC: 00
1343 06:52:39.882140 APIC: 00
1344 06:52:39.882226 APIC: 03
1345 06:52:39.885322 APIC: 01
1346 06:52:39.885443 APIC: 02
1347 06:52:39.885510 APIC: 04
1348 06:52:39.888574 APIC: 05
1349 06:52:39.888658 APIC: 07
1350 06:52:39.888725 APIC: 06
1351 06:52:39.895046 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1352 06:52:39.904943 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1353 06:52:39.914313 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1354 06:52:39.918141 PCI: 00:00.0
1355 06:52:39.927441 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1356 06:52:39.934431 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1357 06:52:39.944085 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1358 06:52:39.954237 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1359 06:52:39.963556 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1360 06:52:39.973819 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1361 06:52:39.983136 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1362 06:52:39.993296 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1363 06:52:39.999850 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1364 06:52:40.009649 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1365 06:52:40.019334 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1366 06:52:40.029264 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1367 06:52:40.038802 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1368 06:52:40.048972 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1369 06:52:40.058439 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1370 06:52:40.068544 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1371 06:52:40.068639 PCI: 00:02.0
1372 06:52:40.078051 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1373 06:52:40.091366 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1374 06:52:40.097846 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1375 06:52:40.101001 PCI: 00:04.0
1376 06:52:40.101085 PCI: 00:08.0
1377 06:52:40.110694 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1378 06:52:40.113860
1379 06:52:40.113946 PCI: 00:12.0
1380 06:52:40.123992 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1381 06:52:40.127185 PCI: 00:14.0 child on link 0 USB0 port 0
1382 06:52:40.130354
1383 06:52:40.140614 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1384 06:52:40.143774 USB0 port 0 child on link 0 USB2 port 0
1385 06:52:40.146850 USB2 port 0
1386 06:52:40.146950 USB2 port 1
1387 06:52:40.150035 USB2 port 2
1388 06:52:40.150120 USB2 port 3
1389 06:52:40.153161 USB2 port 5
1390 06:52:40.153246 USB2 port 6
1391 06:52:40.156888 USB2 port 9
1392 06:52:40.156973 USB3 port 0
1393 06:52:40.160046 USB3 port 1
1394 06:52:40.160131 USB3 port 2
1395 06:52:40.163315 USB3 port 3
1396 06:52:40.163400 USB3 port 4
1397 06:52:40.166348 PCI: 00:14.2
1398 06:52:40.176006 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1399 06:52:40.186160 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1400 06:52:40.189329 PCI: 00:14.3
1401 06:52:40.199459 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1402 06:52:40.202849 PCI: 00:15.0 child on link 0 I2C: 01:15
1403 06:52:40.212535 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1404 06:52:40.215695 I2C: 01:15
1405 06:52:40.218925 PCI: 00:15.1 child on link 0 I2C: 02:5d
1406 06:52:40.228599 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1407 06:52:40.231718 I2C: 02:5d
1408 06:52:40.231804 GENERIC: 0.0
1409 06:52:40.235470 PCI: 00:16.0
1410 06:52:40.245194 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1411 06:52:40.248326 PCI: 00:17.0
1412 06:52:40.257937 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1413 06:52:40.268035 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1414 06:52:40.277572 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1415 06:52:40.284001 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1416 06:52:40.293970 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1417 06:52:40.303736 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1418 06:52:40.306912 PCI: 00:19.0 child on link 0 I2C: 03:1a
1419 06:52:40.310551
1420 06:52:40.320076 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1421 06:52:40.320162 I2C: 03:1a
1422 06:52:40.323792 I2C: 03:38
1423 06:52:40.323914 I2C: 03:39
1424 06:52:40.327174 I2C: 03:3a
1425 06:52:40.327258 I2C: 03:3b
1426 06:52:40.329777 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1427 06:52:40.339853 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1428 06:52:40.349381 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1429 06:52:40.359588 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1430 06:52:40.362894
1431 06:52:40.362978 PCI: 01:00.0
1432 06:52:40.372783 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1433 06:52:40.375982 PCI: 00:1e.0
1434 06:52:40.385314 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1435 06:52:40.395423 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1436 06:52:40.398634 PCI: 00:1e.2 child on link 0 SPI: 00
1437 06:52:40.411914 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1438 06:52:40.411999 SPI: 00
1439 06:52:40.415329 PCI: 00:1e.3 child on link 0 SPI: 01
1440 06:52:40.424909 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1441 06:52:40.428542 SPI: 01
1442 06:52:40.431672 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1443 06:52:40.441286 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1444 06:52:40.447892 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1445 06:52:40.450955
1446 06:52:40.451040 PNP: 0c09.0
1447 06:52:40.461120 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1448 06:52:40.461205 PCI: 00:1f.3
1449 06:52:40.470816 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1450 06:52:40.483389 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1451 06:52:40.483476 PCI: 00:1f.4
1452 06:52:40.493564 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1453 06:52:40.503346 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1454 06:52:40.503433 PCI: 00:1f.5
1455 06:52:40.506376
1456 06:52:40.516160 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1457 06:52:40.516251 Done allocating resources.
1458 06:52:40.519517
1459 06:52:40.522854 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1460 06:52:40.525906 Enabling resources...
1461 06:52:40.529099 PCI: 00:00.0 subsystem <- 8086/9b61
1462 06:52:40.532299 PCI: 00:00.0 cmd <- 06
1463 06:52:40.536019 PCI: 00:02.0 subsystem <- 8086/9b41
1464 06:52:40.539073 PCI: 00:02.0 cmd <- 03
1465 06:52:40.542090 PCI: 00:08.0 cmd <- 06
1466 06:52:40.545893 PCI: 00:12.0 subsystem <- 8086/02f9
1467 06:52:40.549018 PCI: 00:12.0 cmd <- 02
1468 06:52:40.552101 PCI: 00:14.0 subsystem <- 8086/02ed
1469 06:52:40.555329 PCI: 00:14.0 cmd <- 02
1470 06:52:40.555418 PCI: 00:14.2 cmd <- 02
1471 06:52:40.558541
1472 06:52:40.561723 PCI: 00:14.3 subsystem <- 8086/02f0
1473 06:52:40.561808 PCI: 00:14.3 cmd <- 02
1474 06:52:40.568629 PCI: 00:15.0 subsystem <- 8086/02e8
1475 06:52:40.568715 PCI: 00:15.0 cmd <- 02
1476 06:52:40.571699 PCI: 00:15.1 subsystem <- 8086/02e9
1477 06:52:40.575418 PCI: 00:15.1 cmd <- 02
1478 06:52:40.578530 PCI: 00:16.0 subsystem <- 8086/02e0
1479 06:52:40.581764 PCI: 00:16.0 cmd <- 02
1480 06:52:40.584871 PCI: 00:17.0 subsystem <- 8086/02d3
1481 06:52:40.588052 PCI: 00:17.0 cmd <- 03
1482 06:52:40.591264 PCI: 00:19.0 subsystem <- 8086/02c5
1483 06:52:40.594617 PCI: 00:19.0 cmd <- 02
1484 06:52:40.597772 PCI: 00:1d.0 bridge ctrl <- 0013
1485 06:52:40.601621 PCI: 00:1d.0 subsystem <- 8086/02b0
1486 06:52:40.604872 PCI: 00:1d.0 cmd <- 06
1487 06:52:40.607929 PCI: 00:1e.0 subsystem <- 8086/02a8
1488 06:52:40.611255 PCI: 00:1e.0 cmd <- 06
1489 06:52:40.614594 PCI: 00:1e.2 subsystem <- 8086/02aa
1490 06:52:40.617874 PCI: 00:1e.2 cmd <- 06
1491 06:52:40.621087 PCI: 00:1e.3 subsystem <- 8086/02ab
1492 06:52:40.624214 PCI: 00:1e.3 cmd <- 02
1493 06:52:40.627533 PCI: 00:1f.0 subsystem <- 8086/0284
1494 06:52:40.630658 PCI: 00:1f.0 cmd <- 407
1495 06:52:40.633777 PCI: 00:1f.3 subsystem <- 8086/02c8
1496 06:52:40.633862 PCI: 00:1f.3 cmd <- 02
1497 06:52:40.637016
1498 06:52:40.640212 PCI: 00:1f.4 subsystem <- 8086/02a3
1499 06:52:40.640296 PCI: 00:1f.4 cmd <- 03
1500 06:52:40.646635 PCI: 00:1f.5 subsystem <- 8086/02a4
1501 06:52:40.646720 PCI: 00:1f.5 cmd <- 406
1502 06:52:40.656926 PCI: 01:00.0 cmd <- 02
1503 06:52:40.662078 done.
1504 06:52:40.675197 ME: Version: 14.0.39.1367
1505 06:52:40.681897 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1506 06:52:40.684987 Initializing devices...
1507 06:52:40.685072 Root Device init ...
1508 06:52:40.691774 Chrome EC: Set SMI mask to 0x0000000000000000
1509 06:52:40.695074 Chrome EC: clear events_b mask to 0x0000000000000000
1510 06:52:40.701295 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1511 06:52:40.708363 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1512 06:52:40.715024 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1513 06:52:40.718134 Chrome EC: Set WAKE mask to 0x0000000000000000
1514 06:52:40.724824 Root Device init finished in 35154 usecs
1515 06:52:40.724909 CPU_CLUSTER: 0 init ...
1516 06:52:40.731062 CPU_CLUSTER: 0 init finished in 2446 usecs
1517 06:52:40.735726 PCI: 00:00.0 init ...
1518 06:52:40.739257 CPU TDP: 15 Watts
1519 06:52:40.742500 CPU PL2 = 64 Watts
1520 06:52:40.745790 PCI: 00:00.0 init finished in 7079 usecs
1521 06:52:40.748726 PCI: 00:02.0 init ...
1522 06:52:40.752516 PCI: 00:02.0 init finished in 2252 usecs
1523 06:52:40.755711 PCI: 00:08.0 init ...
1524 06:52:40.758957 PCI: 00:08.0 init finished in 2251 usecs
1525 06:52:40.762129 PCI: 00:12.0 init ...
1526 06:52:40.765276 PCI: 00:12.0 init finished in 2251 usecs
1527 06:52:40.768384 PCI: 00:14.0 init ...
1528 06:52:40.771744 PCI: 00:14.0 init finished in 2243 usecs
1529 06:52:40.774841 PCI: 00:14.2 init ...
1530 06:52:40.778047 PCI: 00:14.2 init finished in 2250 usecs
1531 06:52:40.781647 PCI: 00:14.3 init ...
1532 06:52:40.784929 PCI: 00:14.3 init finished in 2268 usecs
1533 06:52:40.788085 PCI: 00:15.0 init ...
1534 06:52:40.791539 DW I2C bus 0 at 0xd121f000 (400 KHz)
1535 06:52:40.797698 PCI: 00:15.0 init finished in 5967 usecs
1536 06:52:40.797782 PCI: 00:15.1 init ...
1537 06:52:40.804492 DW I2C bus 1 at 0xd1220000 (400 KHz)
1538 06:52:40.807661 PCI: 00:15.1 init finished in 5974 usecs
1539 06:52:40.810870 PCI: 00:16.0 init ...
1540 06:52:40.814187 PCI: 00:16.0 init finished in 2252 usecs
1541 06:52:40.817505 PCI: 00:19.0 init ...
1542 06:52:40.820688 DW I2C bus 4 at 0xd1222000 (400 KHz)
1543 06:52:40.823919 PCI: 00:19.0 init finished in 5974 usecs
1544 06:52:40.827198 PCI: 00:1d.0 init ...
1545 06:52:40.830481 Initializing PCH PCIe bridge.
1546 06:52:40.833511 PCI: 00:1d.0 init finished in 5282 usecs
1547 06:52:40.837550 PCI: 00:1f.0 init ...
1548 06:52:40.840656 IOAPIC: Initializing IOAPIC at 0xfec00000
1549 06:52:40.847689 IOAPIC: Bootstrap Processor Local APIC = 0x00
1550 06:52:40.847795 IOAPIC: ID = 0x02
1551 06:52:40.850765 IOAPIC: Dumping registers
1552 06:52:40.853961 reg 0x0000: 0x02000000
1553 06:52:40.857207 reg 0x0001: 0x00770020
1554 06:52:40.860322 reg 0x0002: 0x00000000
1555 06:52:40.863526 PCI: 00:1f.0 init finished in 23533 usecs
1556 06:52:40.866693 PCI: 00:1f.4 init ...
1557 06:52:40.870532 PCI: 00:1f.4 init finished in 2261 usecs
1558 06:52:40.881823 PCI: 01:00.0 init ...
1559 06:52:40.884926 PCI: 01:00.0 init finished in 2252 usecs
1560 06:52:40.889345 PNP: 0c09.0 init ...
1561 06:52:40.892920 Google Chrome EC uptime: 11.096 seconds
1562 06:52:40.899450 Google Chrome AP resets since EC boot: 0
1563 06:52:40.902569 Google Chrome most recent AP reset causes:
1564 06:52:40.908992 Google Chrome EC reset flags at last EC boot: reset-pin
1565 06:52:40.912310 PNP: 0c09.0 init finished in 20553 usecs
1566 06:52:40.915601 Devices initialized
1567 06:52:40.919017 Show all devs... After init.
1568 06:52:40.919103 Root Device: enabled 1
1569 06:52:40.922043 CPU_CLUSTER: 0: enabled 1
1570 06:52:40.925276 DOMAIN: 0000: enabled 1
1571 06:52:40.925360 APIC: 00: enabled 1
1572 06:52:40.928563 PCI: 00:00.0: enabled 1
1573 06:52:40.932230 PCI: 00:02.0: enabled 1
1574 06:52:40.935486 PCI: 00:04.0: enabled 0
1575 06:52:40.935575 PCI: 00:05.0: enabled 0
1576 06:52:40.938659 PCI: 00:12.0: enabled 1
1577 06:52:40.941932 PCI: 00:12.5: enabled 0
1578 06:52:40.945123 PCI: 00:12.6: enabled 0
1579 06:52:40.945206 PCI: 00:14.0: enabled 1
1580 06:52:40.948342 PCI: 00:14.1: enabled 0
1581 06:52:40.951612 PCI: 00:14.3: enabled 1
1582 06:52:40.954784 PCI: 00:14.5: enabled 0
1583 06:52:40.954867 PCI: 00:15.0: enabled 1
1584 06:52:40.958679 PCI: 00:15.1: enabled 1
1585 06:52:40.961887 PCI: 00:15.2: enabled 0
1586 06:52:40.965287 PCI: 00:15.3: enabled 0
1587 06:52:40.965394 PCI: 00:16.0: enabled 1
1588 06:52:40.968315 PCI: 00:16.1: enabled 0
1589 06:52:40.971494 PCI: 00:16.2: enabled 0
1590 06:52:40.974776 PCI: 00:16.3: enabled 0
1591 06:52:40.974861 PCI: 00:16.4: enabled 0
1592 06:52:40.978007 PCI: 00:16.5: enabled 0
1593 06:52:40.981034 PCI: 00:17.0: enabled 1
1594 06:52:40.984698 PCI: 00:19.0: enabled 1
1595 06:52:40.984782 PCI: 00:19.1: enabled 0
1596 06:52:40.987846 PCI: 00:19.2: enabled 0
1597 06:52:40.990809 PCI: 00:1a.0: enabled 0
1598 06:52:40.990893 PCI: 00:1c.0: enabled 0
1599 06:52:40.994465
1600 06:52:40.994549 PCI: 00:1c.1: enabled 0
1601 06:52:40.997366 PCI: 00:1c.2: enabled 0
1602 06:52:41.000711 PCI: 00:1c.3: enabled 0
1603 06:52:41.000795 PCI: 00:1c.4: enabled 0
1604 06:52:41.003797
1605 06:52:41.003881 PCI: 00:1c.5: enabled 0
1606 06:52:41.007657 PCI: 00:1c.6: enabled 0
1607 06:52:41.010851 PCI: 00:1c.7: enabled 0
1608 06:52:41.010934 PCI: 00:1d.0: enabled 1
1609 06:52:41.013890 PCI: 00:1d.1: enabled 0
1610 06:52:41.017102 PCI: 00:1d.2: enabled 0
1611 06:52:41.020470 PCI: 00:1d.3: enabled 0
1612 06:52:41.020554 PCI: 00:1d.4: enabled 0
1613 06:52:41.023707 PCI: 00:1d.5: enabled 0
1614 06:52:41.026948 PCI: 00:1e.0: enabled 1
1615 06:52:41.030288 PCI: 00:1e.1: enabled 0
1616 06:52:41.030373 PCI: 00:1e.2: enabled 1
1617 06:52:41.033341 PCI: 00:1e.3: enabled 1
1618 06:52:41.036614 PCI: 00:1f.0: enabled 1
1619 06:52:41.040575 PCI: 00:1f.1: enabled 0
1620 06:52:41.040658 PCI: 00:1f.2: enabled 0
1621 06:52:41.043634 PCI: 00:1f.3: enabled 1
1622 06:52:41.046851 PCI: 00:1f.4: enabled 1
1623 06:52:41.049943 PCI: 00:1f.5: enabled 1
1624 06:52:41.050027 PCI: 00:1f.6: enabled 0
1625 06:52:41.053120 USB0 port 0: enabled 1
1626 06:52:41.056997 I2C: 01:15: enabled 1
1627 06:52:41.057081 I2C: 02:5d: enabled 1
1628 06:52:41.059593 GENERIC: 0.0: enabled 1
1629 06:52:41.063288 I2C: 03:1a: enabled 1
1630 06:52:41.066439 I2C: 03:38: enabled 1
1631 06:52:41.066523 I2C: 03:39: enabled 1
1632 06:52:41.069697 I2C: 03:3a: enabled 1
1633 06:52:41.072784 I2C: 03:3b: enabled 1
1634 06:52:41.072868 PCI: 00:00.0: enabled 1
1635 06:52:41.075981 SPI: 00: enabled 1
1636 06:52:41.076065 SPI: 01: enabled 1
1637 06:52:41.079667
1638 06:52:41.079752 PNP: 0c09.0: enabled 1
1639 06:52:41.082734 USB2 port 0: enabled 1
1640 06:52:41.085829 USB2 port 1: enabled 1
1641 06:52:41.085913 USB2 port 2: enabled 0
1642 06:52:41.088895 USB2 port 3: enabled 0
1643 06:52:41.092522 USB2 port 5: enabled 0
1644 06:52:41.092607 USB2 port 6: enabled 1
1645 06:52:41.095698
1646 06:52:41.095782 USB2 port 9: enabled 1
1647 06:52:41.099370 USB3 port 0: enabled 1
1648 06:52:41.102708 USB3 port 1: enabled 1
1649 06:52:41.102792 USB3 port 2: enabled 1
1650 06:52:41.105915 USB3 port 3: enabled 1
1651 06:52:41.109003 USB3 port 4: enabled 0
1652 06:52:41.109087 APIC: 03: enabled 1
1653 06:52:41.112354 APIC: 01: enabled 1
1654 06:52:41.115488 APIC: 02: enabled 1
1655 06:52:41.115573 APIC: 04: enabled 1
1656 06:52:41.118730 APIC: 05: enabled 1
1657 06:52:41.121851 APIC: 07: enabled 1
1658 06:52:41.121936 APIC: 06: enabled 1
1659 06:52:41.125102 PCI: 00:08.0: enabled 1
1660 06:52:41.128283 PCI: 00:14.2: enabled 1
1661 06:52:41.128368 PCI: 01:00.0: enabled 1
1662 06:52:41.132881 Disabling ACPI via APMC:
1663 06:52:41.136915 done.
1664 06:52:41.140692 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1665 06:52:41.143606 ELOG: NV offset 0xaf0000 size 0x4000
1666 06:52:41.151167 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1667 06:52:41.157254 ELOG: Event(17) added with size 13 at 2023-01-10 06:52:41 UTC
1668 06:52:41.164201 POST: Unexpected post code in previous boot: 0x73
1669 06:52:41.170735 ELOG: Event(A3) added with size 11 at 2023-01-10 06:52:41 UTC
1670 06:52:41.177125 ELOG: Event(A6) added with size 13 at 2023-01-10 06:52:41 UTC
1671 06:52:41.183616 ELOG: Event(92) added with size 9 at 2023-01-10 06:52:41 UTC
1672 06:52:41.189979 ELOG: Event(93) added with size 9 at 2023-01-10 06:52:41 UTC
1673 06:52:41.193314 ELOG: Event(9A) added with size 9 at 2023-01-10 06:52:41 UTC
1674 06:52:41.196951
1675 06:52:41.200020 ELOG: Event(9E) added with size 10 at 2023-01-10 06:52:41 UTC
1676 06:52:41.206713 ELOG: Event(9F) added with size 14 at 2023-01-10 06:52:41 UTC
1677 06:52:41.213638 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1678 06:52:41.220309 ELOG: Event(A1) added with size 10 at 2023-01-10 06:52:41 UTC
1679 06:52:41.226554 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1680 06:52:41.232988 ELOG: Event(A0) added with size 9 at 2023-01-10 06:52:41 UTC
1681 06:52:41.239458 elog_add_boot_reason: Logged dev mode boot
1682 06:52:41.239543 Finalize devices...
1683 06:52:41.242719 PCI: 00:17.0 final
1684 06:52:41.242803 Devices finalized
1685 06:52:41.249908 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1686 06:52:41.256335 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1687 06:52:41.259492 ME: HFSTS1 : 0x90000245
1688 06:52:41.262961 ME: HFSTS2 : 0x3B850126
1689 06:52:41.265937 ME: HFSTS3 : 0x00000020
1690 06:52:41.272365 ME: HFSTS4 : 0x00004800
1691 06:52:41.275573 ME: HFSTS5 : 0x00000000
1692 06:52:41.278709 ME: HFSTS6 : 0x40400006
1693 06:52:41.282066 ME: Manufacturing Mode : NO
1694 06:52:41.285230 ME: FW Partition Table : OK
1695 06:52:41.288574 ME: Bringup Loader Failure : NO
1696 06:52:41.291792 ME: Firmware Init Complete : YES
1697 06:52:41.295078 ME: Boot Options Present : NO
1698 06:52:41.298966 ME: Update In Progress : NO
1699 06:52:41.301831 ME: D0i3 Support : YES
1700 06:52:41.304989 ME: Low Power State Enabled : NO
1701 06:52:41.308205 ME: CPU Replaced : NO
1702 06:52:41.311307 ME: CPU Replacement Valid : YES
1703 06:52:41.314522 ME: Current Working State : 5
1704 06:52:41.318372 ME: Current Operation State : 1
1705 06:52:41.321644 ME: Current Operation Mode : 0
1706 06:52:41.324898 ME: Error Code : 0
1707 06:52:41.328109 ME: CPU Debug Disabled : YES
1708 06:52:41.331321 ME: TXT Support : NO
1709 06:52:41.337538 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1710 06:52:41.344475 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1711 06:52:41.344560 CBFS @ c08000 size 3f8000
1712 06:52:41.350867 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1713 06:52:41.354066 CBFS: Locating 'fallback/dsdt.aml'
1714 06:52:41.357133 CBFS: Found @ offset 10bb80 size 3fa5
1715 06:52:41.360517
1716 06:52:41.364126 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1717 06:52:41.367210 CBFS @ c08000 size 3f8000
1718 06:52:41.373660 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1719 06:52:41.376896 CBFS: Locating 'fallback/slic'
1720 06:52:41.379994 CBFS: 'fallback/slic' not found.
1721 06:52:41.383172 ACPI: Writing ACPI tables at 99b3e000.
1722 06:52:41.387068 ACPI: * FACS
1723 06:52:41.387152 ACPI: * DSDT
1724 06:52:41.393364 Ramoops buffer: 0x100000@0x99a3d000.
1725 06:52:41.396546 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1726 06:52:41.399681 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1727 06:52:41.403417 Google Chrome EC: version:
1728 06:52:41.406656 ro: helios_v2.0.2659-56403530b
1729 06:52:41.409922 rw: helios_v2.0.2849-c41de27e7d
1730 06:52:41.413771 running image: 1
1731 06:52:41.416875 ACPI: * FADT
1732 06:52:41.417003 SCI is IRQ9
1733 06:52:41.423317 ACPI: added table 1/32, length now 40
1734 06:52:41.423401 ACPI: * SSDT
1735 06:52:41.426583 Found 1 CPU(s) with 8 core(s) each.
1736 06:52:41.429758 Error: Could not locate 'wifi_sar' in VPD.
1737 06:52:41.433075
1738 06:52:41.436310 Checking CBFS for default SAR values
1739 06:52:41.439537 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1740 06:52:41.442894 CBFS @ c08000 size 3f8000
1741 06:52:41.449640 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1742 06:52:41.453007 CBFS: Locating 'wifi_sar_defaults.hex'
1743 06:52:41.456034 CBFS: Found @ offset 5fac0 size 77
1744 06:52:41.459217 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1745 06:52:41.465537 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1746 06:52:41.468765 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1747 06:52:41.475631 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1748 06:52:41.478825 failed to find key in VPD: dsm_calib_r0_0
1749 06:52:41.488187 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1750 06:52:41.494643 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1751 06:52:41.498581 failed to find key in VPD: dsm_calib_r0_1
1752 06:52:41.504736 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1753 06:52:41.507981
1754 06:52:41.511039 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1755 06:52:41.514232 failed to find key in VPD: dsm_calib_r0_2
1756 06:52:41.524331 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1757 06:52:41.530863 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1758 06:52:41.534021 failed to find key in VPD: dsm_calib_r0_3
1759 06:52:41.543762 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1760 06:52:41.546971 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1761 06:52:41.553796 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1762 06:52:41.557034 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1763 06:52:41.560914 EC returned error result code 1
1764 06:52:41.564149 EC returned error result code 1
1765 06:52:41.567302 EC returned error result code 1
1766 06:52:41.573743 PS2K: Bad resp from EC. Vivaldi disabled!
1767 06:52:41.577566 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1768 06:52:41.583863 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1769 06:52:41.590250 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1770 06:52:41.594112 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1771 06:52:41.600409 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1772 06:52:41.606801 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1773 06:52:41.610532 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1774 06:52:41.613679
1775 06:52:41.616879 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1776 06:52:41.620084 ACPI: added table 2/32, length now 44
1777 06:52:41.623219
1778 06:52:41.623306 ACPI: * MCFG
1779 06:52:41.626474 ACPI: added table 3/32, length now 48
1780 06:52:41.629763 ACPI: * TPM2
1781 06:52:41.632957 TPM2 log created at 99a2d000
1782 06:52:41.636327 ACPI: added table 4/32, length now 52
1783 06:52:41.636411 ACPI: * MADT
1784 06:52:41.639357 SCI is IRQ9
1785 06:52:41.642615 ACPI: added table 5/32, length now 56
1786 06:52:41.642698 current = 99b43ac0
1787 06:52:41.645752 ACPI: * DMAR
1788 06:52:41.649003 ACPI: added table 6/32, length now 60
1789 06:52:41.652882 ACPI: * IGD OpRegion
1790 06:52:41.652966 GMA: Found VBT in CBFS
1791 06:52:41.656016
1792 06:52:41.656100 GMA: Found valid VBT in CBFS
1793 06:52:41.662438 ACPI: added table 7/32, length now 64
1794 06:52:41.662522 ACPI: * HPET
1795 06:52:41.665723 ACPI: added table 8/32, length now 68
1796 06:52:41.668856 ACPI: done.
1797 06:52:41.668939 ACPI tables: 31744 bytes.
1798 06:52:41.671952 smbios_write_tables: 99a2c000
1799 06:52:41.675678 EC returned error result code 3
1800 06:52:41.678855 Couldn't obtain OEM name from CBI
1801 06:52:41.682097
1802 06:52:41.682181 Create SMBIOS type 17
1803 06:52:41.685216 PCI: 00:00.0 (Intel Cannonlake)
1804 06:52:41.688983 PCI: 00:14.3 (Intel WiFi)
1805 06:52:41.692166 SMBIOS tables: 939 bytes.
1806 06:52:41.695299 Writing table forward entry at 0x00000500
1807 06:52:41.701716 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1808 06:52:41.705599 Writing coreboot table at 0x99b62000
1809 06:52:41.711788 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1810 06:52:41.714933 1. 0000000000001000-000000000009ffff: RAM
1811 06:52:41.721327 2. 00000000000a0000-00000000000fffff: RESERVED
1812 06:52:41.724702 3. 0000000000100000-0000000099a2bfff: RAM
1813 06:52:41.730831 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1814 06:52:41.734275 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1815 06:52:41.741314 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1816 06:52:41.747783 7. 000000009a000000-000000009f7fffff: RESERVED
1817 06:52:41.751007 8. 00000000e0000000-00000000efffffff: RESERVED
1818 06:52:41.757364 9. 00000000fc000000-00000000fc000fff: RESERVED
1819 06:52:41.760650 10. 00000000fe000000-00000000fe00ffff: RESERVED
1820 06:52:41.763780 11. 00000000fed10000-00000000fed17fff: RESERVED
1821 06:52:41.767009
1822 06:52:41.770699 12. 00000000fed80000-00000000fed83fff: RESERVED
1823 06:52:41.773986 13. 00000000fed90000-00000000fed91fff: RESERVED
1824 06:52:41.780414 14. 00000000feda0000-00000000feda1fff: RESERVED
1825 06:52:41.783495 15. 0000000100000000-000000045e7fffff: RAM
1826 06:52:41.786617 Graphics framebuffer located at 0xc0000000
1827 06:52:41.790434 Passing 5 GPIOs to payload:
1828 06:52:41.797003 NAME | PORT | POLARITY | VALUE
1829 06:52:41.802946 write protect | undefined | high | low
1830 06:52:41.806827 lid | undefined | high | high
1831 06:52:41.813285 power | undefined | high | low
1832 06:52:41.816318 oprom | undefined | high | low
1833 06:52:41.822746 EC in RW | 0x000000cb | high | low
1834 06:52:41.822832 Board ID: 4
1835 06:52:41.829687 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1836 06:52:41.832867 CBFS @ c08000 size 3f8000
1837 06:52:41.836035 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1838 06:52:41.842351 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1839 06:52:41.845724 coreboot table: 1492 bytes.
1840 06:52:41.848979 IMD ROOT 0. 99fff000 00001000
1841 06:52:41.852214 IMD SMALL 1. 99ffe000 00001000
1842 06:52:41.855380 FSP MEMORY 2. 99c4e000 003b0000
1843 06:52:41.858556 CONSOLE 3. 99c2e000 00020000
1844 06:52:41.861758 FMAP 4. 99c2d000 0000054e
1845 06:52:41.865385 TIME STAMP 5. 99c2c000 00000910
1846 06:52:41.868621 VBOOT WORK 6. 99c18000 00014000
1847 06:52:41.871745 MRC DATA 7. 99c16000 00001958
1848 06:52:41.874831 ROMSTG STCK 8. 99c15000 00001000
1849 06:52:41.878788 AFTER CAR 9. 99c0b000 0000a000
1850 06:52:41.881887 RAMSTAGE 10. 99baf000 0005c000
1851 06:52:41.884960 REFCODE 11. 99b7a000 00035000
1852 06:52:41.888157 SMM BACKUP 12. 99b6a000 00010000
1853 06:52:41.891249 COREBOOT 13. 99b62000 00008000
1854 06:52:41.894677 ACPI 14. 99b3e000 00024000
1855 06:52:41.897983 ACPI GNVS 15. 99b3d000 00001000
1856 06:52:41.901000
1857 06:52:41.901084 RAMOOPS 16. 99a3d000 00100000
1858 06:52:41.904785
1859 06:52:41.908003 TPM2 TCGLOG17. 99a2d000 00010000
1860 06:52:41.911172 SMBIOS 18. 99a2c000 00000800
1861 06:52:41.911256 IMD small region:
1862 06:52:41.914127 IMD ROOT 0. 99ffec00 00000400
1863 06:52:41.917886 FSP RUNTIME 1. 99ffebe0 00000004
1864 06:52:41.921055 EC HOSTEVENT 2. 99ffebc0 00000008
1865 06:52:41.924232 POWER STATE 3. 99ffeb80 00000040
1866 06:52:41.930541 ROMSTAGE 4. 99ffeb60 00000004
1867 06:52:41.933783 MEM INFO 5. 99ffe9a0 000001b9
1868 06:52:41.937036 VPD 6. 99ffe920 0000006c
1869 06:52:41.940317 MTRR: Physical address space:
1870 06:52:41.946725 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1871 06:52:41.949977 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1872 06:52:41.956508 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1873 06:52:41.963484 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1874 06:52:41.969672 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1875 06:52:41.976683 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1876 06:52:41.983101 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1877 06:52:41.986237 MTRR: Fixed MSR 0x250 0x0606060606060606
1878 06:52:41.989331 MTRR: Fixed MSR 0x258 0x0606060606060606
1879 06:52:41.995719 MTRR: Fixed MSR 0x259 0x0000000000000000
1880 06:52:41.998962 MTRR: Fixed MSR 0x268 0x0606060606060606
1881 06:52:42.002703 MTRR: Fixed MSR 0x269 0x0606060606060606
1882 06:52:42.005925 MTRR: Fixed MSR 0x26a 0x0606060606060606
1883 06:52:42.012380 MTRR: Fixed MSR 0x26b 0x0606060606060606
1884 06:52:42.015469 MTRR: Fixed MSR 0x26c 0x0606060606060606
1885 06:52:42.018539 MTRR: Fixed MSR 0x26d 0x0606060606060606
1886 06:52:42.021816 MTRR: Fixed MSR 0x26e 0x0606060606060606
1887 06:52:42.028801 MTRR: Fixed MSR 0x26f 0x0606060606060606
1888 06:52:42.031874 call enable_fixed_mtrr()
1889 06:52:42.035205 CPU physical address size: 39 bits
1890 06:52:42.038397 MTRR: default type WB/UC MTRR counts: 6/8.
1891 06:52:42.041874 MTRR: WB selected as default type.
1892 06:52:42.048142 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1893 06:52:42.054558 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1894 06:52:42.060878 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1895 06:52:42.067731 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1896 06:52:42.074062 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1897 06:52:42.081146 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1898 06:52:42.084407 MTRR: Fixed MSR 0x250 0x0606060606060606
1899 06:52:42.087437 MTRR: Fixed MSR 0x258 0x0606060606060606
1900 06:52:42.094346 MTRR: Fixed MSR 0x259 0x0000000000000000
1901 06:52:42.097642 MTRR: Fixed MSR 0x268 0x0606060606060606
1902 06:52:42.100591 MTRR: Fixed MSR 0x269 0x0606060606060606
1903 06:52:42.103854 MTRR: Fixed MSR 0x26a 0x0606060606060606
1904 06:52:42.110779 MTRR: Fixed MSR 0x26b 0x0606060606060606
1905 06:52:42.113952 MTRR: Fixed MSR 0x26c 0x0606060606060606
1906 06:52:42.117197 MTRR: Fixed MSR 0x26d 0x0606060606060606
1907 06:52:42.120481 MTRR: Fixed MSR 0x26e 0x0606060606060606
1908 06:52:42.126770 MTRR: Fixed MSR 0x26f 0x0606060606060606
1909 06:52:42.126855
1910 06:52:42.126922 MTRR check
1911 06:52:42.130020 Fixed MTRRs : Enabled
1912 06:52:42.133068 Variable MTRRs: Enabled
1913 06:52:42.133152
1914 06:52:42.133220 call enable_fixed_mtrr()
1915 06:52:42.136822
1916 06:52:42.140111 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1917 06:52:42.143355 CPU physical address size: 39 bits
1918 06:52:42.149771 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1919 06:52:42.153062 MTRR: Fixed MSR 0x250 0x0606060606060606
1920 06:52:42.156297 MTRR: Fixed MSR 0x258 0x0606060606060606
1921 06:52:42.162487 MTRR: Fixed MSR 0x259 0x0000000000000000
1922 06:52:42.166300 MTRR: Fixed MSR 0x268 0x0606060606060606
1923 06:52:42.169644 MTRR: Fixed MSR 0x269 0x0606060606060606
1924 06:52:42.172652 MTRR: Fixed MSR 0x26a 0x0606060606060606
1925 06:52:42.178948 MTRR: Fixed MSR 0x26b 0x0606060606060606
1926 06:52:42.182118 MTRR: Fixed MSR 0x26c 0x0606060606060606
1927 06:52:42.186140 MTRR: Fixed MSR 0x26d 0x0606060606060606
1928 06:52:42.189183 MTRR: Fixed MSR 0x26e 0x0606060606060606
1929 06:52:42.192325 MTRR: Fixed MSR 0x26f 0x0606060606060606
1930 06:52:42.195598
1931 06:52:42.198718 MTRR: Fixed MSR 0x250 0x0606060606060606
1932 06:52:42.201969 call enable_fixed_mtrr()
1933 06:52:42.205675 MTRR: Fixed MSR 0x258 0x0606060606060606
1934 06:52:42.209013 MTRR: Fixed MSR 0x259 0x0000000000000000
1935 06:52:42.212221 MTRR: Fixed MSR 0x268 0x0606060606060606
1936 06:52:42.218508 MTRR: Fixed MSR 0x269 0x0606060606060606
1937 06:52:42.222389 MTRR: Fixed MSR 0x26a 0x0606060606060606
1938 06:52:42.225516 MTRR: Fixed MSR 0x26b 0x0606060606060606
1939 06:52:42.228214 MTRR: Fixed MSR 0x26c 0x0606060606060606
1940 06:52:42.235133 MTRR: Fixed MSR 0x26d 0x0606060606060606
1941 06:52:42.238261 MTRR: Fixed MSR 0x26e 0x0606060606060606
1942 06:52:42.241356 MTRR: Fixed MSR 0x26f 0x0606060606060606
1943 06:52:42.244714 CPU physical address size: 39 bits
1944 06:52:42.248534 call enable_fixed_mtrr()
1945 06:52:42.251893 MTRR: Fixed MSR 0x250 0x0606060606060606
1946 06:52:42.258580 MTRR: Fixed MSR 0x258 0x0606060606060606
1947 06:52:42.261386 MTRR: Fixed MSR 0x259 0x0000000000000000
1948 06:52:42.264779 MTRR: Fixed MSR 0x268 0x0606060606060606
1949 06:52:42.267647 MTRR: Fixed MSR 0x269 0x0606060606060606
1950 06:52:42.274599 MTRR: Fixed MSR 0x26a 0x0606060606060606
1951 06:52:42.277568 MTRR: Fixed MSR 0x26b 0x0606060606060606
1952 06:52:42.280895 MTRR: Fixed MSR 0x26c 0x0606060606060606
1953 06:52:42.283932 MTRR: Fixed MSR 0x26d 0x0606060606060606
1954 06:52:42.291149 MTRR: Fixed MSR 0x26e 0x0606060606060606
1955 06:52:42.294233 MTRR: Fixed MSR 0x26f 0x0606060606060606
1956 06:52:42.297282 MTRR: Fixed MSR 0x250 0x0606060606060606
1957 06:52:42.300389 call enable_fixed_mtrr()
1958 06:52:42.303707 MTRR: Fixed MSR 0x258 0x0606060606060606
1959 06:52:42.307373 MTRR: Fixed MSR 0x259 0x0000000000000000
1960 06:52:42.313705 MTRR: Fixed MSR 0x268 0x0606060606060606
1961 06:52:42.316814 MTRR: Fixed MSR 0x269 0x0606060606060606
1962 06:52:42.319918 MTRR: Fixed MSR 0x26a 0x0606060606060606
1963 06:52:42.323618 MTRR: Fixed MSR 0x26b 0x0606060606060606
1964 06:52:42.330366 MTRR: Fixed MSR 0x26c 0x0606060606060606
1965 06:52:42.333254 MTRR: Fixed MSR 0x26d 0x0606060606060606
1966 06:52:42.336394 MTRR: Fixed MSR 0x26e 0x0606060606060606
1967 06:52:42.340267 MTRR: Fixed MSR 0x26f 0x0606060606060606
1968 06:52:42.346633 CPU physical address size: 39 bits
1969 06:52:42.346718 call enable_fixed_mtrr()
1970 06:52:42.349721
1971 06:52:42.352960 MTRR: Fixed MSR 0x250 0x0606060606060606
1972 06:52:42.356256 MTRR: Fixed MSR 0x258 0x0606060606060606
1973 06:52:42.359358 MTRR: Fixed MSR 0x259 0x0000000000000000
1974 06:52:42.362544 MTRR: Fixed MSR 0x268 0x0606060606060606
1975 06:52:42.365691
1976 06:52:42.368928 MTRR: Fixed MSR 0x269 0x0606060606060606
1977 06:52:42.372688 MTRR: Fixed MSR 0x26a 0x0606060606060606
1978 06:52:42.375828 MTRR: Fixed MSR 0x26b 0x0606060606060606
1979 06:52:42.378910 MTRR: Fixed MSR 0x26c 0x0606060606060606
1980 06:52:42.382235
1981 06:52:42.385291 MTRR: Fixed MSR 0x26d 0x0606060606060606
1982 06:52:42.389157 MTRR: Fixed MSR 0x26e 0x0606060606060606
1983 06:52:42.392213 MTRR: Fixed MSR 0x26f 0x0606060606060606
1984 06:52:42.398645 MTRR: Fixed MSR 0x250 0x0606060606060606
1985 06:52:42.402377 MTRR: Fixed MSR 0x258 0x0606060606060606
1986 06:52:42.405646 MTRR: Fixed MSR 0x259 0x0000000000000000
1987 06:52:42.408760 MTRR: Fixed MSR 0x268 0x0606060606060606
1988 06:52:42.411896 MTRR: Fixed MSR 0x269 0x0606060606060606
1989 06:52:42.415126
1990 06:52:42.418476 MTRR: Fixed MSR 0x26a 0x0606060606060606
1991 06:52:42.422086 MTRR: Fixed MSR 0x26b 0x0606060606060606
1992 06:52:42.425091 MTRR: Fixed MSR 0x26c 0x0606060606060606
1993 06:52:42.428236 MTRR: Fixed MSR 0x26d 0x0606060606060606
1994 06:52:42.434721 MTRR: Fixed MSR 0x26e 0x0606060606060606
1995 06:52:42.437859 MTRR: Fixed MSR 0x26f 0x0606060606060606
1996 06:52:42.441800 call enable_fixed_mtrr()
1997 06:52:42.445016 call enable_fixed_mtrr()
1998 06:52:42.448246 CPU physical address size: 39 bits
1999 06:52:42.451466 CPU physical address size: 39 bits
2000 06:52:42.454703 CPU physical address size: 39 bits
2001 06:52:42.457927 CPU physical address size: 39 bits
2002 06:52:42.461106 CBFS @ c08000 size 3f8000
2003 06:52:42.464378 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
2004 06:52:42.467502
2005 06:52:42.470660 CBFS: Locating 'fallback/payload'
2006 06:52:42.474366 CBFS: Found @ offset 1c96c0 size 3f798
2007 06:52:42.477554 Checking segment from ROM address 0xffdd16f8
2008 06:52:42.483803 Checking segment from ROM address 0xffdd1714
2009 06:52:42.486933 Loading segment from ROM address 0xffdd16f8
2010 06:52:42.490284 code (compression=0)
2011 06:52:42.497115 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2012 06:52:42.506601 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2013 06:52:42.509828 it's not compressed!
2014 06:52:42.601475 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2015 06:52:42.607851 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2016 06:52:42.611024 Loading segment from ROM address 0xffdd1714
2017 06:52:42.614231
2018 06:52:42.614333 Entry Point 0x30000000
2019 06:52:42.617443 Loaded segments
2020 06:52:42.623729 Finalizing chipset.
2021 06:52:42.626833 Finalizing SMM.
2022 06:52:42.629803 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
2023 06:52:42.633097 mp_park_aps done after 0 msecs.
2024 06:52:42.639603 Jumping to boot code at 30000000(99b62000)
2025 06:52:42.646587 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2026 06:52:42.646673
2027 06:52:42.646740
2028 06:52:42.646804
2029 06:52:42.649801 Starting depthcharge on Helios...
2030 06:52:42.649887
2031 06:52:42.650269 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
2032 06:52:42.650371 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2033 06:52:42.650459 Setting prompt string to ['hatch:']
2034 06:52:42.650580 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
2035 06:52:42.659394 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2036 06:52:42.659480
2037 06:52:42.666329 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2038 06:52:42.666414
2039 06:52:42.672642 board_setup: Info: eMMC controller not present; skipping
2040 06:52:42.672728
2041 06:52:42.675994 New NVMe Controller 0x30053ac0 @ 00:1d:00
2042 06:52:42.676081
2043 06:52:42.682722 board_setup: Info: SDHCI controller not present; skipping
2044 06:52:42.682822
2045 06:52:42.689178 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2046 06:52:42.689264
2047 06:52:42.689331 Wipe memory regions:
2048 06:52:42.689430
2049 06:52:42.692241 [0x00000000001000, 0x000000000a0000)
2050 06:52:42.695379
2051 06:52:42.699137 [0x00000000100000, 0x00000030000000)
2052 06:52:42.699217
2053 06:52:42.765619 [0x00000030657430, 0x00000099a2c000)
2054 06:52:42.765767
2055 06:52:42.906264 [0x00000100000000, 0x0000045e800000)
2056 06:52:42.906406
2057 06:52:44.289035 R8152: Initializing
2058 06:52:44.289185
2059 06:52:44.292267 Version 9 (ocp_data = 6010)
2060 06:52:44.292348
2061 06:52:44.296726 R8152: Done initializing
2062 06:52:44.296802
2063 06:52:44.300009 Adding net device
2064 06:52:44.300082
2065 06:52:44.783047 R8152: Initializing
2066 06:52:44.783188
2067 06:52:44.786169 Version 6 (ocp_data = 5c30)
2068 06:52:44.786254
2069 06:52:44.789244 R8152: Done initializing
2070 06:52:44.789325
2071 06:52:44.795689 net_add_device: Attemp to include the same device
2072 06:52:44.795772
2073 06:52:44.803092 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2074 06:52:44.803178
2075 06:52:44.803250
2076 06:52:44.803315
2077 06:52:44.803590 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2079 06:52:44.904282 hatch: tftpboot 192.168.201.1 8649827/tftp-deploy-3rocu2ea/kernel/bzImage 8649827/tftp-deploy-3rocu2ea/kernel/cmdline 8649827/tftp-deploy-3rocu2ea/ramdisk/ramdisk.cpio.gz
2080 06:52:44.904456 Setting prompt string to 'Starting kernel'
2081 06:52:44.904552 Setting prompt string to ['Starting kernel']
2082 06:52:44.904628 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2083 06:52:44.904711 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2084 06:52:44.909244 tftpboot 192.168.201.1 8649827/tftp-deploy-3rocu2ea/kernel/bzImoy-3rocu2ea/kernel/cmdline 8649827/tftp-deploy-3rocu2ea/ramdisk/ramdisk.cpio.gz
2085 06:52:44.909331
2086 06:52:44.909408 Waiting for link
2087 06:52:44.909473
2088 06:52:45.110308 done.
2089 06:52:45.110445
2090 06:52:45.110520 MAC: 00:24:32:50:19:be
2091 06:52:45.110585
2092 06:52:45.113521 Sending DHCP discover... done.
2093 06:52:45.113614
2094 06:52:45.116175 Waiting for reply... done.
2095 06:52:45.116252
2096 06:52:45.120079 Sending DHCP request... done.
2097 06:52:45.120159
2098 06:52:45.123540 Waiting for reply... done.
2099 06:52:45.123625
2100 06:52:45.126131 My ip is 192.168.201.15
2101 06:52:45.126212
2102 06:52:45.129414 The DHCP server ip is 192.168.201.1
2103 06:52:45.129498
2104 06:52:45.132667 TFTP server IP predefined by user: 192.168.201.1
2105 06:52:45.132744
2106 06:52:45.139220 Bootfile predefined by user: 8649827/tftp-deploy-3rocu2ea/kernel/bzImage
2107 06:52:45.139304
2108 06:52:45.142476 Sending tftp read request... done.
2109 06:52:45.145967
2110 06:52:45.149051 Waiting for the transfer...
2111 06:52:45.149130
2112 06:52:45.669079 00000000 ################################################################
2113 06:52:45.669212
2114 06:52:46.196815 00080000 ################################################################
2115 06:52:46.196951
2116 06:52:46.718831 00100000 ################################################################
2117 06:52:46.718973
2118 06:52:47.235294 00180000 ################################################################
2119 06:52:47.235447
2120 06:52:47.774643 00200000 ################################################################
2121 06:52:47.774811
2122 06:52:48.300551 00280000 ################################################################
2123 06:52:48.300694
2124 06:52:48.853915 00300000 ################################################################
2125 06:52:48.854049
2126 06:52:49.438678 00380000 ################################################################
2127 06:52:49.438811
2128 06:52:50.023594 00400000 ################################################################
2129 06:52:50.024202
2130 06:52:50.710419 00480000 ################################################################
2131 06:52:50.710986
2132 06:52:51.391841 00500000 ################################################################
2133 06:52:51.392341
2134 06:52:51.949826 00580000 ################################################################
2135 06:52:51.949963
2136 06:52:52.494213 00600000 ################################################################
2137 06:52:52.494355
2138 06:52:53.029449 00680000 ################################################################
2139 06:52:53.029585
2140 06:52:53.273970 00700000 ############################# done.
2141 06:52:53.274109
2142 06:52:53.277160 The bootfile was 7573392 bytes long.
2143 06:52:53.277252
2144 06:52:53.280497 Sending tftp read request... done.
2145 06:52:53.280594
2146 06:52:53.284027 Waiting for the transfer...
2147 06:52:53.284152
2148 06:52:53.832084 00000000 ################################################################
2149 06:52:53.832224
2150 06:52:54.387444 00080000 ################################################################
2151 06:52:54.387599
2152 06:52:54.946447 00100000 ################################################################
2153 06:52:54.946589
2154 06:52:55.483234 00180000 ################################################################
2155 06:52:55.483381
2156 06:52:56.021266 00200000 ################################################################
2157 06:52:56.021442
2158 06:52:56.557748 00280000 ################################################################
2159 06:52:56.557919
2160 06:52:57.091561 00300000 ################################################################
2161 06:52:57.091703
2162 06:52:57.613838 00380000 ################################################################
2163 06:52:57.614015
2164 06:52:58.158070 00400000 ################################################################
2165 06:52:58.158241
2166 06:52:58.698618 00480000 ################################################################
2167 06:52:58.698796
2168 06:52:59.238997 00500000 ################################################################
2169 06:52:59.239139
2170 06:52:59.772641 00580000 ################################################################
2171 06:52:59.772812
2172 06:53:00.310868 00600000 ################################################################
2173 06:53:00.311011
2174 06:53:00.835394 00680000 ################################################################
2175 06:53:00.835534
2176 06:53:01.365112 00700000 ################################################################
2177 06:53:01.365268
2178 06:53:01.895602 00780000 ################################################################
2179 06:53:01.895754
2180 06:53:02.067025 00800000 ##################### done.
2181 06:53:02.067164
2182 06:53:02.070381 Sending tftp read request... done.
2183 06:53:02.070517
2184 06:53:02.073603 Waiting for the transfer...
2185 06:53:02.073682
2186 06:53:02.073756 00000000 # done.
2187 06:53:02.073820
2188 06:53:02.083562 Command line loaded dynamically from TFTP file: 8649827/tftp-deploy-3rocu2ea/kernel/cmdline
2189 06:53:02.083658
2190 06:53:02.100071 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2191 06:53:02.100199
2192 06:53:02.106098 ec_init(0): CrosEC protocol v3 supported (256, 256)
2193 06:53:02.106249
2194 06:53:02.114178 Shutting down all USB controllers.
2195 06:53:02.114275
2196 06:53:02.114345 Removing current net device
2197 06:53:02.114407
2198 06:53:02.117313 Finalizing coreboot
2199 06:53:02.117450
2200 06:53:02.124030 Exiting depthcharge with code 4 at timestamp: 26826319
2201 06:53:02.124120
2202 06:53:02.124188
2203 06:53:02.124265 Starting kernel ...
2204 06:53:02.124338
2205 06:53:02.124713 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
2206 06:53:02.124832 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
2207 06:53:02.124922 Setting prompt string to ['Linux version [0-9]']
2208 06:53:02.124995 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2209 06:53:02.125065 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2210 06:53:02.127254
2211 06:53:02.127340
2212 06:53:02.127422
2214 06:57:24.125102 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
2216 06:57:24.125321 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
2218 06:57:24.125520 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2221 06:57:24.125785 end: 2 depthcharge-action (duration 00:05:00) [common]
2223 06:57:24.126012 Cleaning after the job
2224 06:57:24.126097 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8649827/tftp-deploy-3rocu2ea/ramdisk
2225 06:57:24.126740 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8649827/tftp-deploy-3rocu2ea/kernel
2226 06:57:24.127300 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8649827/tftp-deploy-3rocu2ea/modules
2227 06:57:24.127487 start: 5.1 power-off (timeout 00:00:30) [common]
2228 06:57:24.127637 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2229 06:57:24.146967 >> Command sent successfully.
2230 06:57:24.148897 Returned 0 in 0 seconds
2231 06:57:24.249528 end: 5.1 power-off (duration 00:00:00) [common]
2233 06:57:24.249856 start: 5.2 read-feedback (timeout 00:10:00) [common]
2234 06:57:24.250094 Listened to connection for namespace 'common' for up to 1s
2235 06:57:25.253469 Finalising connection for namespace 'common'
2236 06:57:25.253667 Disconnecting from shell: Finalise
2237 06:57:25.354460 end: 5.2 read-feedback (duration 00:00:01) [common]
2238 06:57:25.354628 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8649827
2239 06:57:25.359546 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8649827
2240 06:57:25.359678 JobError: Your job cannot terminate cleanly.