Boot log: asus-cx9400-volteer
- Errors: 2
- Boot result: FAIL
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
1 06:52:20.431324 lava-dispatcher, installed at version: 2022.11
2 06:52:20.431511 start: 0 validate
3 06:52:20.431642 Start time: 2023-01-10 06:52:20.431635+00:00 (UTC)
4 06:52:20.431768 Using caching service: 'http://localhost/cache/?uri=%s'
5 06:52:20.431896 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230109.0%2Fx86%2Frootfs.cpio.gz exists
6 06:52:20.726390 Using caching service: 'http://localhost/cache/?uri=%s'
7 06:52:20.727133 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-799-g1229c813bcd9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 06:52:21.023499 Using caching service: 'http://localhost/cache/?uri=%s'
9 06:52:21.024216 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-799-g1229c813bcd9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 06:52:21.322379 validate duration: 0.89
12 06:52:21.322652 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 06:52:21.322753 start: 1.1 download-retry (timeout 00:10:00) [common]
14 06:52:21.322846 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 06:52:21.322952 Not decompressing ramdisk as can be used compressed.
16 06:52:21.323039 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230109.0/x86/rootfs.cpio.gz
17 06:52:21.323104 saving as /var/lib/lava/dispatcher/tmp/8649811/tftp-deploy-l2tt9gqe/ramdisk/rootfs.cpio.gz
18 06:52:21.323163 total size: 8423805 (8MB)
19 06:52:21.325991 progress 0% (0MB)
20 06:52:21.329203 progress 5% (0MB)
21 06:52:21.333045 progress 10% (0MB)
22 06:52:21.336609 progress 15% (1MB)
23 06:52:21.339949 progress 20% (1MB)
24 06:52:21.343924 progress 25% (2MB)
25 06:52:21.347217 progress 30% (2MB)
26 06:52:21.350529 progress 35% (2MB)
27 06:52:21.354168 progress 40% (3MB)
28 06:52:21.357836 progress 45% (3MB)
29 06:52:21.361388 progress 50% (4MB)
30 06:52:21.365059 progress 55% (4MB)
31 06:52:21.369190 progress 60% (4MB)
32 06:52:21.372385 progress 65% (5MB)
33 06:52:21.375604 progress 70% (5MB)
34 06:52:21.379291 progress 75% (6MB)
35 06:52:21.382907 progress 80% (6MB)
36 06:52:21.386578 progress 85% (6MB)
37 06:52:21.390188 progress 90% (7MB)
38 06:52:21.393843 progress 95% (7MB)
39 06:52:21.397369 progress 100% (8MB)
40 06:52:21.397583 8MB downloaded in 0.07s (107.96MB/s)
41 06:52:21.397738 end: 1.1.1 http-download (duration 00:00:00) [common]
43 06:52:21.397988 end: 1.1 download-retry (duration 00:00:00) [common]
44 06:52:21.398075 start: 1.2 download-retry (timeout 00:10:00) [common]
45 06:52:21.398160 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 06:52:21.398264 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-799-g1229c813bcd9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 06:52:21.398331 saving as /var/lib/lava/dispatcher/tmp/8649811/tftp-deploy-l2tt9gqe/kernel/bzImage
48 06:52:21.398392 total size: 7573392 (7MB)
49 06:52:21.398451 No compression specified
50 06:52:21.400336 progress 0% (0MB)
51 06:52:21.403958 progress 5% (0MB)
52 06:52:21.407279 progress 10% (0MB)
53 06:52:21.410544 progress 15% (1MB)
54 06:52:21.413817 progress 20% (1MB)
55 06:52:21.416467 progress 25% (1MB)
56 06:52:21.419919 progress 30% (2MB)
57 06:52:21.422997 progress 35% (2MB)
58 06:52:21.426284 progress 40% (2MB)
59 06:52:21.429717 progress 45% (3MB)
60 06:52:21.432816 progress 50% (3MB)
61 06:52:21.436049 progress 55% (4MB)
62 06:52:21.439120 progress 60% (4MB)
63 06:52:21.442961 progress 65% (4MB)
64 06:52:21.445678 progress 70% (5MB)
65 06:52:21.448945 progress 75% (5MB)
66 06:52:21.451994 progress 80% (5MB)
67 06:52:21.455281 progress 85% (6MB)
68 06:52:21.458702 progress 90% (6MB)
69 06:52:21.461776 progress 95% (6MB)
70 06:52:21.465072 progress 100% (7MB)
71 06:52:21.465246 7MB downloaded in 0.07s (108.04MB/s)
72 06:52:21.465396 end: 1.2.1 http-download (duration 00:00:00) [common]
74 06:52:21.465679 end: 1.2 download-retry (duration 00:00:00) [common]
75 06:52:21.465766 start: 1.3 download-retry (timeout 00:10:00) [common]
76 06:52:21.465852 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 06:52:21.465958 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-799-g1229c813bcd9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 06:52:21.466033 saving as /var/lib/lava/dispatcher/tmp/8649811/tftp-deploy-l2tt9gqe/modules/modules.tar
79 06:52:21.466095 total size: 51848 (0MB)
80 06:52:21.466156 Using unxz to decompress xz
81 06:52:21.470278 progress 63% (0MB)
82 06:52:21.470646 progress 100% (0MB)
83 06:52:21.473937 0MB downloaded in 0.01s (6.31MB/s)
84 06:52:21.474157 end: 1.3.1 http-download (duration 00:00:00) [common]
86 06:52:21.474416 end: 1.3 download-retry (duration 00:00:00) [common]
87 06:52:21.474513 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
88 06:52:21.474613 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
89 06:52:21.474700 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 06:52:21.474786 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
91 06:52:21.474952 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8649811/lava-overlay-3j27ff11
92 06:52:21.475060 makedir: /var/lib/lava/dispatcher/tmp/8649811/lava-overlay-3j27ff11/lava-8649811/bin
93 06:52:21.475145 makedir: /var/lib/lava/dispatcher/tmp/8649811/lava-overlay-3j27ff11/lava-8649811/tests
94 06:52:21.475242 makedir: /var/lib/lava/dispatcher/tmp/8649811/lava-overlay-3j27ff11/lava-8649811/results
95 06:52:21.475348 Creating /var/lib/lava/dispatcher/tmp/8649811/lava-overlay-3j27ff11/lava-8649811/bin/lava-add-keys
96 06:52:21.475478 Creating /var/lib/lava/dispatcher/tmp/8649811/lava-overlay-3j27ff11/lava-8649811/bin/lava-add-sources
97 06:52:21.475594 Creating /var/lib/lava/dispatcher/tmp/8649811/lava-overlay-3j27ff11/lava-8649811/bin/lava-background-process-start
98 06:52:21.475707 Creating /var/lib/lava/dispatcher/tmp/8649811/lava-overlay-3j27ff11/lava-8649811/bin/lava-background-process-stop
99 06:52:21.475820 Creating /var/lib/lava/dispatcher/tmp/8649811/lava-overlay-3j27ff11/lava-8649811/bin/lava-common-functions
100 06:52:21.475930 Creating /var/lib/lava/dispatcher/tmp/8649811/lava-overlay-3j27ff11/lava-8649811/bin/lava-echo-ipv4
101 06:52:21.476042 Creating /var/lib/lava/dispatcher/tmp/8649811/lava-overlay-3j27ff11/lava-8649811/bin/lava-install-packages
102 06:52:21.476153 Creating /var/lib/lava/dispatcher/tmp/8649811/lava-overlay-3j27ff11/lava-8649811/bin/lava-installed-packages
103 06:52:21.476262 Creating /var/lib/lava/dispatcher/tmp/8649811/lava-overlay-3j27ff11/lava-8649811/bin/lava-os-build
104 06:52:21.476371 Creating /var/lib/lava/dispatcher/tmp/8649811/lava-overlay-3j27ff11/lava-8649811/bin/lava-probe-channel
105 06:52:21.476481 Creating /var/lib/lava/dispatcher/tmp/8649811/lava-overlay-3j27ff11/lava-8649811/bin/lava-probe-ip
106 06:52:21.476591 Creating /var/lib/lava/dispatcher/tmp/8649811/lava-overlay-3j27ff11/lava-8649811/bin/lava-target-ip
107 06:52:21.476700 Creating /var/lib/lava/dispatcher/tmp/8649811/lava-overlay-3j27ff11/lava-8649811/bin/lava-target-mac
108 06:52:21.476808 Creating /var/lib/lava/dispatcher/tmp/8649811/lava-overlay-3j27ff11/lava-8649811/bin/lava-target-storage
109 06:52:21.476922 Creating /var/lib/lava/dispatcher/tmp/8649811/lava-overlay-3j27ff11/lava-8649811/bin/lava-test-case
110 06:52:21.477031 Creating /var/lib/lava/dispatcher/tmp/8649811/lava-overlay-3j27ff11/lava-8649811/bin/lava-test-event
111 06:52:21.477142 Creating /var/lib/lava/dispatcher/tmp/8649811/lava-overlay-3j27ff11/lava-8649811/bin/lava-test-feedback
112 06:52:21.477300 Creating /var/lib/lava/dispatcher/tmp/8649811/lava-overlay-3j27ff11/lava-8649811/bin/lava-test-raise
113 06:52:21.477426 Creating /var/lib/lava/dispatcher/tmp/8649811/lava-overlay-3j27ff11/lava-8649811/bin/lava-test-reference
114 06:52:21.477583 Creating /var/lib/lava/dispatcher/tmp/8649811/lava-overlay-3j27ff11/lava-8649811/bin/lava-test-runner
115 06:52:21.477695 Creating /var/lib/lava/dispatcher/tmp/8649811/lava-overlay-3j27ff11/lava-8649811/bin/lava-test-set
116 06:52:21.477805 Creating /var/lib/lava/dispatcher/tmp/8649811/lava-overlay-3j27ff11/lava-8649811/bin/lava-test-shell
117 06:52:21.477919 Updating /var/lib/lava/dispatcher/tmp/8649811/lava-overlay-3j27ff11/lava-8649811/bin/lava-install-packages (oe)
118 06:52:21.478033 Updating /var/lib/lava/dispatcher/tmp/8649811/lava-overlay-3j27ff11/lava-8649811/bin/lava-installed-packages (oe)
119 06:52:21.478134 Creating /var/lib/lava/dispatcher/tmp/8649811/lava-overlay-3j27ff11/lava-8649811/environment
120 06:52:21.478223 LAVA metadata
121 06:52:21.478295 - LAVA_JOB_ID=8649811
122 06:52:21.478364 - LAVA_DISPATCHER_IP=192.168.201.1
123 06:52:21.478467 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
124 06:52:21.478536 skipped lava-vland-overlay
125 06:52:21.478614 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 06:52:21.478700 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
127 06:52:21.478767 skipped lava-multinode-overlay
128 06:52:21.478843 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 06:52:21.478926 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
130 06:52:21.479005 Loading test definitions
131 06:52:21.479104 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
132 06:52:21.479180 Using /lava-8649811 at stage 0
133 06:52:21.479451 uuid=8649811_1.4.2.3.1 testdef=None
134 06:52:21.479542 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 06:52:21.479635 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
136 06:52:21.480129 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 06:52:21.480360 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
139 06:52:21.480938 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 06:52:21.481177 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
142 06:52:21.481755 runner path: /var/lib/lava/dispatcher/tmp/8649811/lava-overlay-3j27ff11/lava-8649811/0/tests/0_dmesg test_uuid 8649811_1.4.2.3.1
143 06:52:21.481906 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 06:52:21.482139 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
146 06:52:21.482213 Using /lava-8649811 at stage 1
147 06:52:21.482454 uuid=8649811_1.4.2.3.5 testdef=None
148 06:52:21.482544 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 06:52:21.482632 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
150 06:52:21.483078 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 06:52:21.483328 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
153 06:52:21.483944 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 06:52:21.484184 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
156 06:52:21.484737 runner path: /var/lib/lava/dispatcher/tmp/8649811/lava-overlay-3j27ff11/lava-8649811/1/tests/1_bootrr test_uuid 8649811_1.4.2.3.5
157 06:52:21.484879 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 06:52:21.485087 Creating lava-test-runner.conf files
160 06:52:21.485151 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8649811/lava-overlay-3j27ff11/lava-8649811/0 for stage 0
161 06:52:21.485232 - 0_dmesg
162 06:52:21.485305 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8649811/lava-overlay-3j27ff11/lava-8649811/1 for stage 1
163 06:52:21.485387 - 1_bootrr
164 06:52:21.485497 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 06:52:21.485604 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
166 06:52:21.491666 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 06:52:21.491775 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
168 06:52:21.491865 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 06:52:21.491952 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 06:52:21.492041 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
171 06:52:21.678284 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 06:52:21.678628 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
173 06:52:21.678746 extracting modules file /var/lib/lava/dispatcher/tmp/8649811/tftp-deploy-l2tt9gqe/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8649811/extract-overlay-ramdisk-q5xyw7fl/ramdisk
174 06:52:21.683012 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 06:52:21.683130 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
176 06:52:21.683217 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8649811/compress-overlay-7om5zjqz/overlay-1.4.2.4.tar.gz to ramdisk
177 06:52:21.683293 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8649811/compress-overlay-7om5zjqz/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8649811/extract-overlay-ramdisk-q5xyw7fl/ramdisk
178 06:52:21.687150 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 06:52:21.687266 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
180 06:52:21.687357 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 06:52:21.687450 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
182 06:52:21.687535 Building ramdisk /var/lib/lava/dispatcher/tmp/8649811/extract-overlay-ramdisk-q5xyw7fl/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8649811/extract-overlay-ramdisk-q5xyw7fl/ramdisk
183 06:52:21.753212 >> 48119 blocks
184 06:52:22.526626 rename /var/lib/lava/dispatcher/tmp/8649811/extract-overlay-ramdisk-q5xyw7fl/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8649811/tftp-deploy-l2tt9gqe/ramdisk/ramdisk.cpio.gz
185 06:52:22.527102 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 06:52:22.527233 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
187 06:52:22.527348 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
188 06:52:22.527446 No mkimage arch provided, not using FIT.
189 06:52:22.527541 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 06:52:22.527637 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 06:52:22.527743 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 06:52:22.527849 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
193 06:52:22.527932 No LXC device requested
194 06:52:22.528027 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 06:52:22.528122 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
196 06:52:22.528217 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 06:52:22.528291 Checking files for TFTP limit of 4294967296 bytes.
198 06:52:22.528706 end: 1 tftp-deploy (duration 00:00:01) [common]
199 06:52:22.528824 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 06:52:22.528920 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 06:52:22.529078 substitutions:
202 06:52:22.529182 - {DTB}: None
203 06:52:22.529253 - {INITRD}: 8649811/tftp-deploy-l2tt9gqe/ramdisk/ramdisk.cpio.gz
204 06:52:22.529315 - {KERNEL}: 8649811/tftp-deploy-l2tt9gqe/kernel/bzImage
205 06:52:22.529390 - {LAVA_MAC}: None
206 06:52:22.529452 - {PRESEED_CONFIG}: None
207 06:52:22.529555 - {PRESEED_LOCAL}: None
208 06:52:22.529624 - {RAMDISK}: 8649811/tftp-deploy-l2tt9gqe/ramdisk/ramdisk.cpio.gz
209 06:52:22.529683 - {ROOT_PART}: None
210 06:52:22.529750 - {ROOT}: None
211 06:52:22.529810 - {SERVER_IP}: 192.168.201.1
212 06:52:22.529865 - {TEE}: None
213 06:52:22.529924 Parsed boot commands:
214 06:52:22.529987 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 06:52:22.530156 Parsed boot commands: tftpboot 192.168.201.1 8649811/tftp-deploy-l2tt9gqe/kernel/bzImage 8649811/tftp-deploy-l2tt9gqe/kernel/cmdline 8649811/tftp-deploy-l2tt9gqe/ramdisk/ramdisk.cpio.gz
216 06:52:22.530250 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 06:52:22.530350 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 06:52:22.530450 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 06:52:22.530555 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 06:52:22.530630 Not connected, no need to disconnect.
221 06:52:22.530738 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 06:52:22.530828 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 06:52:22.530923 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-10'
224 06:52:22.533894 Setting prompt string to ['lava-test: # ']
225 06:52:22.534208 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 06:52:22.534345 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 06:52:22.534456 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 06:52:22.534557 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 06:52:22.534761 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=reboot'
230 06:52:22.555678 >> Command sent successfully.
231 06:52:22.557800 Returned 0 in 0 seconds
232 06:52:22.658577 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 06:52:22.659166 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 06:52:22.659278 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 06:52:22.659366 Setting prompt string to 'Starting depthcharge on Voema...'
237 06:52:22.659449 Changing prompt to 'Starting depthcharge on Voema...'
238 06:52:22.659517 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
239 06:52:22.659798 [Enter `^Ec?' for help]
240 06:52:30.598258
241 06:52:30.598834
242 06:52:30.607606 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
243 06:52:30.610978 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
244 06:52:30.617622 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
245 06:52:30.621209 CPU: AES supported, TXT NOT supported, VT supported
246 06:52:30.627959 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
247 06:52:30.631426 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
248 06:52:30.637878 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
249 06:52:30.641215 VBOOT: Loading verstage.
250 06:52:30.644895 FMAP: Found "FLASH" version 1.1 at 0x1804000.
251 06:52:30.651430 FMAP: base = 0x0 size = 0x2000000 #areas = 32
252 06:52:30.654514 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
253 06:52:30.665032 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
254 06:52:30.671301 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
255 06:52:30.671741
256 06:52:30.672081
257 06:52:30.681710 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
258 06:52:30.698178 Probing TPM: . done!
259 06:52:30.701277 TPM ready after 0 ms
260 06:52:30.705383 Connected to device vid:did:rid of 1ae0:0028:00
261 06:52:30.715855 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
262 06:52:30.722337 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
263 06:52:30.726073 Initialized TPM device CR50 revision 0
264 06:52:30.783575 tlcl_send_startup: Startup return code is 0
265 06:52:30.783739 TPM: setup succeeded
266 06:52:30.798630 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
267 06:52:30.813393 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
268 06:52:30.825784 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
269 06:52:30.835711 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
270 06:52:30.839282 Chrome EC: UHEPI supported
271 06:52:30.842407 Phase 1
272 06:52:30.845677 FMAP: area GBB found @ 1805000 (458752 bytes)
273 06:52:30.855635 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
274 06:52:30.862176 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
275 06:52:30.868923 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
276 06:52:30.875723 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
277 06:52:30.878704 Recovery requested (1009000e)
278 06:52:30.882668 TPM: Extending digest for VBOOT: boot mode into PCR 0
279 06:52:30.893728 tlcl_extend: response is 0
280 06:52:30.900366 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
281 06:52:30.910842 tlcl_extend: response is 0
282 06:52:30.917384 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
283 06:52:30.923623 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
284 06:52:30.930364 BS: verstage times (exec / console): total (unknown) / 142 ms
285 06:52:30.930456
286 06:52:30.930524
287 06:52:30.943607 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
288 06:52:30.950278 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
289 06:52:30.953718 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
290 06:52:30.956958 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
291 06:52:30.963294 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
292 06:52:30.966469 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
293 06:52:30.969932 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
294 06:52:30.973458 TCO_STS: 0000 0000
295 06:52:30.976673 GEN_PMCON: d0015038 00002200
296 06:52:30.979906 GBLRST_CAUSE: 00000000 00000000
297 06:52:30.983239 HPR_CAUSE0: 00000000
298 06:52:30.983341 prev_sleep_state 5
299 06:52:30.986188 Boot Count incremented to 12079
300 06:52:30.993181 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
301 06:52:30.999356 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
302 06:52:31.009388 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
303 06:52:31.016118 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
304 06:52:31.019471 Chrome EC: UHEPI supported
305 06:52:31.026614 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
306 06:52:31.037713 Probing TPM: done!
307 06:52:31.044082 Connected to device vid:did:rid of 1ae0:0028:00
308 06:52:31.054059 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
309 06:52:31.057016 Initialized TPM device CR50 revision 0
310 06:52:31.072524 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
311 06:52:31.078809 MRC: Hash idx 0x100b comparison successful.
312 06:52:31.082417 MRC cache found, size faa8
313 06:52:31.082543 bootmode is set to: 2
314 06:52:31.085508 SPD index = 2
315 06:52:31.092043 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
316 06:52:31.095746 SPD: module type is LPDDR4X
317 06:52:31.098541 SPD: module part number is MT53D1G64D4NW-046
318 06:52:31.105019 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
319 06:52:31.108662 SPD: device width 16 bits, bus width 16 bits
320 06:52:31.114960 SPD: module size is 2048 MB (per channel)
321 06:52:31.544444 CBMEM:
322 06:52:31.547922 IMD: root @ 0x76fff000 254 entries.
323 06:52:31.551499 IMD: root @ 0x76ffec00 62 entries.
324 06:52:31.554491 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
325 06:52:31.561290 FMAP: area RW_VPD found @ f35000 (8192 bytes)
326 06:52:31.564532 External stage cache:
327 06:52:31.567575 IMD: root @ 0x7b3ff000 254 entries.
328 06:52:31.571392 IMD: root @ 0x7b3fec00 62 entries.
329 06:52:31.586007 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
330 06:52:31.592284 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
331 06:52:31.598999 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
332 06:52:31.612759 MRC: 'RECOVERY_MRC_CACHE' does not need update.
333 06:52:31.616522 cse_lite: Skip switching to RW in the recovery path
334 06:52:31.619782
335 06:52:31.619868 8 DIMMs found
336 06:52:31.619936 SMM Memory Map
337 06:52:31.622909 SMRAM : 0x7b000000 0x800000
338 06:52:31.626198
339 06:52:31.629235 Subregion 0: 0x7b000000 0x200000
340 06:52:31.632574 Subregion 1: 0x7b200000 0x200000
341 06:52:31.636089 Subregion 2: 0x7b400000 0x400000
342 06:52:31.636173 top_of_ram = 0x77000000
343 06:52:31.642402 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
344 06:52:31.649377 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
345 06:52:31.652360 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
346 06:52:31.659350 MTRR Range: Start=ff000000 End=0 (Size 1000000)
347 06:52:31.665807 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
348 06:52:31.672528 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
349 06:52:31.682598 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
350 06:52:31.685883 Processing 211 relocs. Offset value of 0x74c0b000
351 06:52:31.689392
352 06:52:31.695550 BS: romstage times (exec / console): total (unknown) / 277 ms
353 06:52:31.702070
354 06:52:31.702168
355 06:52:31.711922 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
356 06:52:31.715151 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
357 06:52:31.721809 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
358 06:52:31.731822 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
359 06:52:31.738485 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
360 06:52:31.745108 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
361 06:52:31.788603 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
362 06:52:31.795124 Processing 5008 relocs. Offset value of 0x75d98000
363 06:52:31.798259 BS: postcar times (exec / console): total (unknown) / 59 ms
364 06:52:31.801153
365 06:52:31.801401
366 06:52:31.811599 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
367 06:52:31.811751 Normal boot
368 06:52:31.814429 FW_CONFIG value is 0x804c02
369 06:52:31.817888 PCI: 00:07.0 disabled by fw_config
370 06:52:31.821035 PCI: 00:07.1 disabled by fw_config
371 06:52:31.824657 PCI: 00:0d.2 disabled by fw_config
372 06:52:31.830984 PCI: 00:1c.7 disabled by fw_config
373 06:52:31.834237 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
374 06:52:31.841175 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
375 06:52:31.844801 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
376 06:52:31.851089 GENERIC: 0.0 disabled by fw_config
377 06:52:31.854254 GENERIC: 1.0 disabled by fw_config
378 06:52:31.857784 fw_config match found: DB_USB=USB3_ACTIVE
379 06:52:31.861228 fw_config match found: DB_USB=USB3_ACTIVE
380 06:52:31.864356 fw_config match found: DB_USB=USB3_ACTIVE
381 06:52:31.870917 fw_config match found: DB_USB=USB3_ACTIVE
382 06:52:31.874007 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
383 06:52:31.880912 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
384 06:52:31.884390
385 06:52:31.890417 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
386 06:52:31.896879 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
387 06:52:31.903724 microcode: sig=0x806c1 pf=0x80 revision=0x86
388 06:52:31.907338 microcode: Update skipped, already up-to-date
389 06:52:31.913962 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
390 06:52:31.942193 Detected 4 core, 8 thread CPU.
391 06:52:31.945813 Setting up SMI for CPU
392 06:52:31.948537 IED base = 0x7b400000
393 06:52:31.949082 IED size = 0x00400000
394 06:52:31.952090 Will perform SMM setup.
395 06:52:31.958369 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
396 06:52:31.965049 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
397 06:52:31.971899 Processing 16 relocs. Offset value of 0x00030000
398 06:52:31.974864 Attempting to start 7 APs
399 06:52:31.978072 Waiting for 10ms after sending INIT.
400 06:52:31.993642 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
401 06:52:31.996917 AP: slot 5 apic_id 4.
402 06:52:32.000088 AP: slot 4 apic_id 5.
403 06:52:32.000173 AP: slot 2 apic_id 3.
404 06:52:32.003524 AP: slot 6 apic_id 2.
405 06:52:32.006748 AP: slot 3 apic_id 7.
406 06:52:32.006837 AP: slot 7 apic_id 6.
407 06:52:32.006931 done.
408 06:52:32.013379 Waiting for 2nd SIPI to complete...done.
409 06:52:32.020132 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
410 06:52:32.026815 Processing 13 relocs. Offset value of 0x00038000
411 06:52:32.030169 Unable to locate Global NVS
412 06:52:32.036514 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
413 06:52:32.039980 Installing permanent SMM handler to 0x7b000000
414 06:52:32.049391 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
415 06:52:32.052702 Processing 794 relocs. Offset value of 0x7b010000
416 06:52:32.062913 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
417 06:52:32.066209 Processing 13 relocs. Offset value of 0x7b008000
418 06:52:32.073455 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
419 06:52:32.079406 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
420 06:52:32.082983 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
421 06:52:32.086093
422 06:52:32.089715 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
423 06:52:32.096185 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
424 06:52:32.102578 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
425 06:52:32.109394 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
426 06:52:32.112996 Unable to locate Global NVS
427 06:52:32.119259 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
428 06:52:32.122630 Clearing SMI status registers
429 06:52:32.122717 SMI_STS: PM1
430 06:52:32.126158 PM1_STS: PWRBTN
431 06:52:32.132343 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
432 06:52:32.136172 In relocation handler: CPU 0
433 06:52:32.139197 New SMBASE=0x7b000000 IEDBASE=0x7b400000
434 06:52:32.145797 Writing SMRR. base = 0x7b000006, mask=0xff800c00
435 06:52:32.145885 Relocation complete.
436 06:52:32.149124
437 06:52:32.155791 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
438 06:52:32.158910 In relocation handler: CPU 1
439 06:52:32.162207 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
440 06:52:32.162296 Relocation complete.
441 06:52:32.172598 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
442 06:52:32.172682 In relocation handler: CPU 7
443 06:52:32.175761
444 06:52:32.179123 New SMBASE=0x7affe400 IEDBASE=0x7b400000
445 06:52:32.182659 Writing SMRR. base = 0x7b000006, mask=0xff800c00
446 06:52:32.185746 Relocation complete.
447 06:52:32.192071 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
448 06:52:32.195476 In relocation handler: CPU 4
449 06:52:32.198684 New SMBASE=0x7afff000 IEDBASE=0x7b400000
450 06:52:32.202139 Relocation complete.
451 06:52:32.208645 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
452 06:52:32.212187 In relocation handler: CPU 5
453 06:52:32.215354 New SMBASE=0x7affec00 IEDBASE=0x7b400000
454 06:52:32.222239 Writing SMRR. base = 0x7b000006, mask=0xff800c00
455 06:52:32.222323 Relocation complete.
456 06:52:32.228377 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
457 06:52:32.231909
458 06:52:32.231987 In relocation handler: CPU 6
459 06:52:32.238714 New SMBASE=0x7affe800 IEDBASE=0x7b400000
460 06:52:32.241659 Writing SMRR. base = 0x7b000006, mask=0xff800c00
461 06:52:32.245152 Relocation complete.
462 06:52:32.251464 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
463 06:52:32.254955 In relocation handler: CPU 2
464 06:52:32.258120 New SMBASE=0x7afff800 IEDBASE=0x7b400000
465 06:52:32.261416 Relocation complete.
466 06:52:32.268183 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
467 06:52:32.271716 In relocation handler: CPU 3
468 06:52:32.274746 New SMBASE=0x7afff400 IEDBASE=0x7b400000
469 06:52:32.278091 Relocation complete.
470 06:52:32.278176 Initializing CPU #0
471 06:52:32.281161 CPU: vendor Intel device 806c1
472 06:52:32.288160 CPU: family 06, model 8c, stepping 01
473 06:52:32.288245 Clearing out pending MCEs
474 06:52:32.291086 Setting up local APIC...
475 06:52:32.294558 apic_id: 0x00 done.
476 06:52:32.298122 Turbo is available but hidden
477 06:52:32.301374 Turbo is available and visible
478 06:52:32.304663 microcode: Update skipped, already up-to-date
479 06:52:32.307950 CPU #0 initialized
480 06:52:32.308038 Initializing CPU #4
481 06:52:32.310884 Initializing CPU #5
482 06:52:32.314835 CPU: vendor Intel device 806c1
483 06:52:32.317658 CPU: family 06, model 8c, stepping 01
484 06:52:32.320853 CPU: vendor Intel device 806c1
485 06:52:32.324466 CPU: family 06, model 8c, stepping 01
486 06:52:32.327601 Initializing CPU #2
487 06:52:32.327678 Initializing CPU #6
488 06:52:32.330841 CPU: vendor Intel device 806c1
489 06:52:32.337452 CPU: family 06, model 8c, stepping 01
490 06:52:32.337562 CPU: vendor Intel device 806c1
491 06:52:32.340998
492 06:52:32.344185 CPU: family 06, model 8c, stepping 01
493 06:52:32.344260 Clearing out pending MCEs
494 06:52:32.347288 Clearing out pending MCEs
495 06:52:32.350561 Setting up local APIC...
496 06:52:32.354060 Clearing out pending MCEs
497 06:52:32.357178 Setting up local APIC...
498 06:52:32.357259 Initializing CPU #1
499 06:52:32.360324 Clearing out pending MCEs
500 06:52:32.363795 Setting up local APIC...
501 06:52:32.363874 Initializing CPU #3
502 06:52:32.367850 Initializing CPU #7
503 06:52:32.371530 CPU: vendor Intel device 806c1
504 06:52:32.374857 CPU: family 06, model 8c, stepping 01
505 06:52:32.378251 CPU: vendor Intel device 806c1
506 06:52:32.381325 CPU: family 06, model 8c, stepping 01
507 06:52:32.384878 Clearing out pending MCEs
508 06:52:32.384961 Clearing out pending MCEs
509 06:52:32.388014 Setting up local APIC...
510 06:52:32.391214 apic_id: 0x05 done.
511 06:52:32.394574 apic_id: 0x04 done.
512 06:52:32.398175 microcode: Update skipped, already up-to-date
513 06:52:32.401250 microcode: Update skipped, already up-to-date
514 06:52:32.404563 CPU #4 initialized
515 06:52:32.404642 CPU #5 initialized
516 06:52:32.407856
517 06:52:32.407933 CPU: vendor Intel device 806c1
518 06:52:32.414672 CPU: family 06, model 8c, stepping 01
519 06:52:32.414759 apic_id: 0x02 done.
520 06:52:32.417689 Setting up local APIC...
521 06:52:32.421101 microcode: Update skipped, already up-to-date
522 06:52:32.424728 apic_id: 0x03 done.
523 06:52:32.427792 CPU #6 initialized
524 06:52:32.431578 microcode: Update skipped, already up-to-date
525 06:52:32.434440 Setting up local APIC...
526 06:52:32.434518 CPU #2 initialized
527 06:52:32.437725 apic_id: 0x06 done.
528 06:52:32.441097 apic_id: 0x07 done.
529 06:52:32.444262 microcode: Update skipped, already up-to-date
530 06:52:32.447813 microcode: Update skipped, already up-to-date
531 06:52:32.451000 CPU #7 initialized
532 06:52:32.454179 CPU #3 initialized
533 06:52:32.454265 Clearing out pending MCEs
534 06:52:32.457569 Setting up local APIC...
535 06:52:32.460887 apic_id: 0x01 done.
536 06:52:32.464181 microcode: Update skipped, already up-to-date
537 06:52:32.467237 CPU #1 initialized
538 06:52:32.470913 bsp_do_flight_plan done after 454 msecs.
539 06:52:32.474345 CPU: frequency set to 4400 MHz
540 06:52:32.477647 Enabling SMIs.
541 06:52:32.484028 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
542 06:52:32.499056 SATAXPCIE1 indicates PCIe NVMe is present
543 06:52:32.502372 Probing TPM: done!
544 06:52:32.505083 Connected to device vid:did:rid of 1ae0:0028:00
545 06:52:32.516039 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
546 06:52:32.519522 Initialized TPM device CR50 revision 0
547 06:52:32.522442 Enabling S0i3.4
548 06:52:32.529199 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
549 06:52:32.533020 Found a VBT of 8704 bytes after decompression
550 06:52:32.539311 cse_lite: CSE RO boot. HybridStorageMode disabled
551 06:52:32.545399 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
552 06:52:32.620732 FSPS returned 0
553 06:52:32.624283 Executing Phase 1 of FspMultiPhaseSiInit
554 06:52:32.633860 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
555 06:52:32.637469 port C0 DISC req: usage 1 usb3 1 usb2 5
556 06:52:32.641004 Raw Buffer output 0 00000511
557 06:52:32.644071 Raw Buffer output 1 00000000
558 06:52:32.647773 pmc_send_ipc_cmd succeeded
559 06:52:32.654415 port C1 DISC req: usage 1 usb3 2 usb2 3
560 06:52:32.654497 Raw Buffer output 0 00000321
561 06:52:32.657221 Raw Buffer output 1 00000000
562 06:52:32.661796 pmc_send_ipc_cmd succeeded
563 06:52:32.667299 Detected 4 core, 8 thread CPU.
564 06:52:32.670057 Detected 4 core, 8 thread CPU.
565 06:52:32.870278 Display FSP Version Info HOB
566 06:52:32.873842 Reference Code - CPU = a.0.4c.31
567 06:52:32.877007 uCode Version = 0.0.0.86
568 06:52:32.880233 TXT ACM version = ff.ff.ff.ffff
569 06:52:32.883400 Reference Code - ME = a.0.4c.31
570 06:52:32.886704 MEBx version = 0.0.0.0
571 06:52:32.890336 ME Firmware Version = Consumer SKU
572 06:52:32.893656 Reference Code - PCH = a.0.4c.31
573 06:52:32.896735 PCH-CRID Status = Disabled
574 06:52:32.900431 PCH-CRID Original Value = ff.ff.ff.ffff
575 06:52:32.903447 PCH-CRID New Value = ff.ff.ff.ffff
576 06:52:32.906566 OPROM - RST - RAID = ff.ff.ff.ffff
577 06:52:32.910103 PCH Hsio Version = 4.0.0.0
578 06:52:32.913450 Reference Code - SA - System Agent = a.0.4c.31
579 06:52:32.916458 Reference Code - MRC = 2.0.0.1
580 06:52:32.919897 SA - PCIe Version = a.0.4c.31
581 06:52:32.923370 SA-CRID Status = Disabled
582 06:52:32.926579 SA-CRID Original Value = 0.0.0.1
583 06:52:32.929801 SA-CRID New Value = 0.0.0.1
584 06:52:32.933159 OPROM - VBIOS = ff.ff.ff.ffff
585 06:52:32.936473 IO Manageability Engine FW Version = 11.1.4.0
586 06:52:32.939482 PHY Build Version = 0.0.0.e0
587 06:52:32.942935 Thunderbolt(TM) FW Version = 0.0.0.0
588 06:52:32.950792 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
589 06:52:32.950908 ITSS IRQ Polarities Before:
590 06:52:32.954858
591 06:52:32.954971 IPC0: 0xffffffff
592 06:52:32.955103 IPC1: 0xffffffff
593 06:52:32.957667 IPC2: 0xffffffff
594 06:52:32.960843 IPC3: 0xffffffff
595 06:52:32.960935 ITSS IRQ Polarities After:
596 06:52:32.964539 IPC0: 0xffffffff
597 06:52:32.964617 IPC1: 0xffffffff
598 06:52:32.967612 IPC2: 0xffffffff
599 06:52:32.970986 IPC3: 0xffffffff
600 06:52:32.974189 Found PCIe Root Port #9 at PCI: 00:1d.0.
601 06:52:32.984409 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
602 06:52:32.997458 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
603 06:52:33.010557 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
604 06:52:33.017027 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
605 06:52:33.017120 Enumerating buses...
606 06:52:33.023549 Show all devs... Before device enumeration.
607 06:52:33.023658 Root Device: enabled 1
608 06:52:33.027232 DOMAIN: 0000: enabled 1
609 06:52:33.030192 CPU_CLUSTER: 0: enabled 1
610 06:52:33.033807 PCI: 00:00.0: enabled 1
611 06:52:33.033893 PCI: 00:02.0: enabled 1
612 06:52:33.036713 PCI: 00:04.0: enabled 1
613 06:52:33.040120 PCI: 00:05.0: enabled 1
614 06:52:33.043895 PCI: 00:06.0: enabled 0
615 06:52:33.043986 PCI: 00:07.0: enabled 0
616 06:52:33.046859 PCI: 00:07.1: enabled 0
617 06:52:33.050295 PCI: 00:07.2: enabled 0
618 06:52:33.050380 PCI: 00:07.3: enabled 0
619 06:52:33.053485
620 06:52:33.053578 PCI: 00:08.0: enabled 1
621 06:52:33.057054 PCI: 00:09.0: enabled 0
622 06:52:33.060380 PCI: 00:0a.0: enabled 0
623 06:52:33.060478 PCI: 00:0d.0: enabled 1
624 06:52:33.063527 PCI: 00:0d.1: enabled 0
625 06:52:33.066636 PCI: 00:0d.2: enabled 0
626 06:52:33.070102 PCI: 00:0d.3: enabled 0
627 06:52:33.070190 PCI: 00:0e.0: enabled 0
628 06:52:33.073708 PCI: 00:10.2: enabled 1
629 06:52:33.077007 PCI: 00:10.6: enabled 0
630 06:52:33.080158 PCI: 00:10.7: enabled 0
631 06:52:33.080242 PCI: 00:12.0: enabled 0
632 06:52:33.083415 PCI: 00:12.6: enabled 0
633 06:52:33.086570 PCI: 00:13.0: enabled 0
634 06:52:33.090184 PCI: 00:14.0: enabled 1
635 06:52:33.090274 PCI: 00:14.1: enabled 0
636 06:52:33.093186 PCI: 00:14.2: enabled 1
637 06:52:33.096439 PCI: 00:14.3: enabled 1
638 06:52:33.096522 PCI: 00:15.0: enabled 1
639 06:52:33.099682
640 06:52:33.099766 PCI: 00:15.1: enabled 1
641 06:52:33.103044 PCI: 00:15.2: enabled 1
642 06:52:33.106693 PCI: 00:15.3: enabled 1
643 06:52:33.106774 PCI: 00:16.0: enabled 1
644 06:52:33.110031 PCI: 00:16.1: enabled 0
645 06:52:33.112901 PCI: 00:16.2: enabled 0
646 06:52:33.116100 PCI: 00:16.3: enabled 0
647 06:52:33.116178 PCI: 00:16.4: enabled 0
648 06:52:33.119877 PCI: 00:16.5: enabled 0
649 06:52:33.122790 PCI: 00:17.0: enabled 1
650 06:52:33.126197 PCI: 00:19.0: enabled 0
651 06:52:33.126286 PCI: 00:19.1: enabled 1
652 06:52:33.129664 PCI: 00:19.2: enabled 0
653 06:52:33.133006 PCI: 00:1c.0: enabled 1
654 06:52:33.136058 PCI: 00:1c.1: enabled 0
655 06:52:33.136147 PCI: 00:1c.2: enabled 0
656 06:52:33.139322 PCI: 00:1c.3: enabled 0
657 06:52:33.142511 PCI: 00:1c.4: enabled 0
658 06:52:33.145820 PCI: 00:1c.5: enabled 0
659 06:52:33.145909 PCI: 00:1c.6: enabled 1
660 06:52:33.148916 PCI: 00:1c.7: enabled 0
661 06:52:33.152959 PCI: 00:1d.0: enabled 1
662 06:52:33.155630 PCI: 00:1d.1: enabled 0
663 06:52:33.155718 PCI: 00:1d.2: enabled 1
664 06:52:33.159067 PCI: 00:1d.3: enabled 0
665 06:52:33.162348 PCI: 00:1e.0: enabled 1
666 06:52:33.166173 PCI: 00:1e.1: enabled 0
667 06:52:33.166268 PCI: 00:1e.2: enabled 1
668 06:52:33.169161 PCI: 00:1e.3: enabled 1
669 06:52:33.172037 PCI: 00:1f.0: enabled 1
670 06:52:33.175536 PCI: 00:1f.1: enabled 0
671 06:52:33.175617 PCI: 00:1f.2: enabled 1
672 06:52:33.178676 PCI: 00:1f.3: enabled 1
673 06:52:33.182165 PCI: 00:1f.4: enabled 0
674 06:52:33.182248 PCI: 00:1f.5: enabled 1
675 06:52:33.185562 PCI: 00:1f.6: enabled 0
676 06:52:33.189257 PCI: 00:1f.7: enabled 0
677 06:52:33.192188 APIC: 00: enabled 1
678 06:52:33.192272 GENERIC: 0.0: enabled 1
679 06:52:33.195781 GENERIC: 0.0: enabled 1
680 06:52:33.198532 GENERIC: 1.0: enabled 1
681 06:52:33.198619 GENERIC: 0.0: enabled 1
682 06:52:33.202119
683 06:52:33.202206 GENERIC: 1.0: enabled 1
684 06:52:33.205238 USB0 port 0: enabled 1
685 06:52:33.208904 GENERIC: 0.0: enabled 1
686 06:52:33.208985 USB0 port 0: enabled 1
687 06:52:33.211652 GENERIC: 0.0: enabled 1
688 06:52:33.215180 I2C: 00:1a: enabled 1
689 06:52:33.218569 I2C: 00:31: enabled 1
690 06:52:33.218677 I2C: 00:32: enabled 1
691 06:52:33.221619 I2C: 00:10: enabled 1
692 06:52:33.225142 I2C: 00:15: enabled 1
693 06:52:33.225236 GENERIC: 0.0: enabled 0
694 06:52:33.228139 GENERIC: 1.0: enabled 0
695 06:52:33.231466 GENERIC: 0.0: enabled 1
696 06:52:33.231567 SPI: 00: enabled 1
697 06:52:33.234787 SPI: 00: enabled 1
698 06:52:33.238290 PNP: 0c09.0: enabled 1
699 06:52:33.238376 GENERIC: 0.0: enabled 1
700 06:52:33.241243 USB3 port 0: enabled 1
701 06:52:33.244469 USB3 port 1: enabled 1
702 06:52:33.248089 USB3 port 2: enabled 0
703 06:52:33.248167 USB3 port 3: enabled 0
704 06:52:33.251530 USB2 port 0: enabled 0
705 06:52:33.254490 USB2 port 1: enabled 1
706 06:52:33.254569 USB2 port 2: enabled 1
707 06:52:33.257754 USB2 port 3: enabled 0
708 06:52:33.261403 USB2 port 4: enabled 1
709 06:52:33.264772 USB2 port 5: enabled 0
710 06:52:33.264850 USB2 port 6: enabled 0
711 06:52:33.267803 USB2 port 7: enabled 0
712 06:52:33.271440 USB2 port 8: enabled 0
713 06:52:33.271518 USB2 port 9: enabled 0
714 06:52:33.275034 USB3 port 0: enabled 0
715 06:52:33.278251 USB3 port 1: enabled 1
716 06:52:33.278338 USB3 port 2: enabled 0
717 06:52:33.281286 USB3 port 3: enabled 0
718 06:52:33.284297 GENERIC: 0.0: enabled 1
719 06:52:33.287782 GENERIC: 1.0: enabled 1
720 06:52:33.287858 APIC: 01: enabled 1
721 06:52:33.291054 APIC: 03: enabled 1
722 06:52:33.291128 APIC: 07: enabled 1
723 06:52:33.294327
724 06:52:33.294412 APIC: 05: enabled 1
725 06:52:33.297821 APIC: 04: enabled 1
726 06:52:33.297905 APIC: 02: enabled 1
727 06:52:33.301117 APIC: 06: enabled 1
728 06:52:33.304762 Compare with tree...
729 06:52:33.304847 Root Device: enabled 1
730 06:52:33.307640 DOMAIN: 0000: enabled 1
731 06:52:33.310869 PCI: 00:00.0: enabled 1
732 06:52:33.314472 PCI: 00:02.0: enabled 1
733 06:52:33.314561 PCI: 00:04.0: enabled 1
734 06:52:33.317809 GENERIC: 0.0: enabled 1
735 06:52:33.320933 PCI: 00:05.0: enabled 1
736 06:52:33.324230 PCI: 00:06.0: enabled 0
737 06:52:33.327569 PCI: 00:07.0: enabled 0
738 06:52:33.331193 GENERIC: 0.0: enabled 1
739 06:52:33.331289 PCI: 00:07.1: enabled 0
740 06:52:33.334093 GENERIC: 1.0: enabled 1
741 06:52:33.337405 PCI: 00:07.2: enabled 0
742 06:52:33.340996 GENERIC: 0.0: enabled 1
743 06:52:33.344303 PCI: 00:07.3: enabled 0
744 06:52:33.344389 GENERIC: 1.0: enabled 1
745 06:52:33.347433 PCI: 00:08.0: enabled 1
746 06:52:33.350876 PCI: 00:09.0: enabled 0
747 06:52:33.354391 PCI: 00:0a.0: enabled 0
748 06:52:33.357474 PCI: 00:0d.0: enabled 1
749 06:52:33.357562 USB0 port 0: enabled 1
750 06:52:33.360747 USB3 port 0: enabled 1
751 06:52:33.363809 USB3 port 1: enabled 1
752 06:52:33.367138 USB3 port 2: enabled 0
753 06:52:33.371063 USB3 port 3: enabled 0
754 06:52:33.371153 PCI: 00:0d.1: enabled 0
755 06:52:33.374039
756 06:52:33.374117 PCI: 00:0d.2: enabled 0
757 06:52:33.377458 GENERIC: 0.0: enabled 1
758 06:52:33.381011 PCI: 00:0d.3: enabled 0
759 06:52:33.384289 PCI: 00:0e.0: enabled 0
760 06:52:33.384380 PCI: 00:10.2: enabled 1
761 06:52:33.387118
762 06:52:33.387202 PCI: 00:10.6: enabled 0
763 06:52:33.390549 PCI: 00:10.7: enabled 0
764 06:52:33.393809 PCI: 00:12.0: enabled 0
765 06:52:33.397417 PCI: 00:12.6: enabled 0
766 06:52:33.397525 PCI: 00:13.0: enabled 0
767 06:52:33.400276
768 06:52:33.400362 PCI: 00:14.0: enabled 1
769 06:52:33.403716 USB0 port 0: enabled 1
770 06:52:33.407080 USB2 port 0: enabled 0
771 06:52:33.410770 USB2 port 1: enabled 1
772 06:52:33.413434 USB2 port 2: enabled 1
773 06:52:33.413542 USB2 port 3: enabled 0
774 06:52:33.417275 USB2 port 4: enabled 1
775 06:52:33.420171 USB2 port 5: enabled 0
776 06:52:33.423563 USB2 port 6: enabled 0
777 06:52:33.427239 USB2 port 7: enabled 0
778 06:52:33.427327 USB2 port 8: enabled 0
779 06:52:33.430168
780 06:52:33.430245 USB2 port 9: enabled 0
781 06:52:33.433846 USB3 port 0: enabled 0
782 06:52:33.436970 USB3 port 1: enabled 1
783 06:52:33.440538 USB3 port 2: enabled 0
784 06:52:33.443616 USB3 port 3: enabled 0
785 06:52:33.443696 PCI: 00:14.1: enabled 0
786 06:52:33.446744 PCI: 00:14.2: enabled 1
787 06:52:33.450430 PCI: 00:14.3: enabled 1
788 06:52:33.453408 GENERIC: 0.0: enabled 1
789 06:52:33.456490 PCI: 00:15.0: enabled 1
790 06:52:33.456564 I2C: 00:1a: enabled 1
791 06:52:33.459814 I2C: 00:31: enabled 1
792 06:52:33.463380 I2C: 00:32: enabled 1
793 06:52:33.467059 PCI: 00:15.1: enabled 1
794 06:52:33.467137 I2C: 00:10: enabled 1
795 06:52:33.470228
796 06:52:33.470307 PCI: 00:15.2: enabled 1
797 06:52:33.473659 PCI: 00:15.3: enabled 1
798 06:52:33.476475 PCI: 00:16.0: enabled 1
799 06:52:33.480119 PCI: 00:16.1: enabled 0
800 06:52:33.480204 PCI: 00:16.2: enabled 0
801 06:52:33.483581 PCI: 00:16.3: enabled 0
802 06:52:33.486748 PCI: 00:16.4: enabled 0
803 06:52:33.489776 PCI: 00:16.5: enabled 0
804 06:52:33.493011 PCI: 00:17.0: enabled 1
805 06:52:33.493102 PCI: 00:19.0: enabled 0
806 06:52:33.496717 PCI: 00:19.1: enabled 1
807 06:52:33.500186 I2C: 00:15: enabled 1
808 06:52:33.502857 PCI: 00:19.2: enabled 0
809 06:52:33.506637 PCI: 00:1d.0: enabled 1
810 06:52:33.506707 GENERIC: 0.0: enabled 1
811 06:52:33.509841 PCI: 00:1e.0: enabled 1
812 06:52:33.513118 PCI: 00:1e.1: enabled 0
813 06:52:33.516379 PCI: 00:1e.2: enabled 1
814 06:52:33.516463 SPI: 00: enabled 1
815 06:52:33.519609
816 06:52:33.519694 PCI: 00:1e.3: enabled 1
817 06:52:33.522911 SPI: 00: enabled 1
818 06:52:33.526107 PCI: 00:1f.0: enabled 1
819 06:52:33.529777 PNP: 0c09.0: enabled 1
820 06:52:33.529863 PCI: 00:1f.1: enabled 0
821 06:52:33.533020 PCI: 00:1f.2: enabled 1
822 06:52:33.536371 GENERIC: 0.0: enabled 1
823 06:52:33.539887 GENERIC: 0.0: enabled 1
824 06:52:33.542835 GENERIC: 1.0: enabled 1
825 06:52:33.542907 PCI: 00:1f.3: enabled 1
826 06:52:33.594774 PCI: 00:1f.4: enabled 0
827 06:52:33.594893 PCI: 00:1f.5: enabled 1
828 06:52:33.595162 PCI: 00:1f.6: enabled 0
829 06:52:33.595236 PCI: 00:1f.7: enabled 0
830 06:52:33.595655 CPU_CLUSTER: 0: enabled 1
831 06:52:33.595742 APIC: 00: enabled 1
832 06:52:33.595811 APIC: 01: enabled 1
833 06:52:33.596153 APIC: 03: enabled 1
834 06:52:33.596246 APIC: 07: enabled 1
835 06:52:33.596320 APIC: 05: enabled 1
836 06:52:33.596635 APIC: 04: enabled 1
837 06:52:33.596722 APIC: 02: enabled 1
838 06:52:33.596784 APIC: 06: enabled 1
839 06:52:33.596843 Root Device scanning...
840 06:52:33.596905 scan_static_bus for Root Device
841 06:52:33.596963 DOMAIN: 0000 enabled
842 06:52:33.597030 CPU_CLUSTER: 0 enabled
843 06:52:33.597275 DOMAIN: 0000 scanning...
844 06:52:33.597338 PCI: pci_scan_bus for bus 00
845 06:52:33.597399 PCI: 00:00.0 [8086/0000] ops
846 06:52:33.645404 PCI: 00:00.0 [8086/9a12] enabled
847 06:52:33.645896 PCI: 00:02.0 [8086/0000] bus ops
848 06:52:33.645990 PCI: 00:02.0 [8086/9a40] enabled
849 06:52:33.646249 PCI: 00:04.0 [8086/0000] bus ops
850 06:52:33.646318 PCI: 00:04.0 [8086/9a03] enabled
851 06:52:33.646613 PCI: 00:05.0 [8086/9a19] enabled
852 06:52:33.646688 PCI: 00:07.0 [0000/0000] hidden
853 06:52:33.646932 PCI: 00:08.0 [8086/9a11] enabled
854 06:52:33.647006 PCI: 00:0a.0 [8086/9a0d] disabled
855 06:52:33.647255 PCI: 00:0d.0 [8086/0000] bus ops
856 06:52:33.647319 PCI: 00:0d.0 [8086/9a13] enabled
857 06:52:33.647813 PCI: 00:14.0 [8086/0000] bus ops
858 06:52:33.647910 PCI: 00:14.0 [8086/a0ed] enabled
859 06:52:33.648165 PCI: 00:14.2 [8086/a0ef] enabled
860 06:52:33.648234 PCI: 00:14.3 [8086/0000] bus ops
861 06:52:33.689424 PCI: 00:14.3 [8086/a0f0] enabled
862 06:52:33.689598 PCI: 00:15.0 [8086/0000] bus ops
863 06:52:33.689876 PCI: 00:15.0 [8086/a0e8] enabled
864 06:52:33.689946 PCI: 00:15.1 [8086/0000] bus ops
865 06:52:33.690009 PCI: 00:15.1 [8086/a0e9] enabled
866 06:52:33.690494 PCI: 00:15.2 [8086/0000] bus ops
867 06:52:33.690582 PCI: 00:15.2 [8086/a0ea] enabled
868 06:52:33.691084 PCI: 00:15.3 [8086/0000] bus ops
869 06:52:33.691160 PCI: 00:15.3 [8086/a0eb] enabled
870 06:52:33.691440 PCI: 00:16.0 [8086/0000] ops
871 06:52:33.691506 PCI: 00:16.0 [8086/a0e0] enabled
872 06:52:33.691966 PCI: Static device PCI: 00:17.0 not found, disabling it.
873 06:52:33.694625 PCI: 00:19.0 [8086/0000] bus ops
874 06:52:33.694709 PCI: 00:19.0 [8086/a0c5] disabled
875 06:52:33.697923 PCI: 00:19.1 [8086/0000] bus ops
876 06:52:33.701528 PCI: 00:19.1 [8086/a0c6] enabled
877 06:52:33.704466 PCI: 00:1d.0 [8086/0000] bus ops
878 06:52:33.707742 PCI: 00:1d.0 [8086/a0b0] enabled
879 06:52:33.710962 PCI: 00:1e.0 [8086/0000] ops
880 06:52:33.714668 PCI: 00:1e.0 [8086/a0a8] enabled
881 06:52:33.717580 PCI: 00:1e.2 [8086/0000] bus ops
882 06:52:33.720801 PCI: 00:1e.2 [8086/a0aa] enabled
883 06:52:33.724281 PCI: 00:1e.3 [8086/0000] bus ops
884 06:52:33.727700 PCI: 00:1e.3 [8086/a0ab] enabled
885 06:52:33.730899 PCI: 00:1f.0 [8086/0000] bus ops
886 06:52:33.734359 PCI: 00:1f.0 [8086/a087] enabled
887 06:52:33.734443 RTC Init
888 06:52:33.737418 Set power on after power failure.
889 06:52:33.740916
890 06:52:33.741002 Disabling Deep S3
891 06:52:33.744262 Disabling Deep S3
892 06:52:33.744346 Disabling Deep S4
893 06:52:33.747274 Disabling Deep S4
894 06:52:33.747375 Disabling Deep S5
895 06:52:33.750716 Disabling Deep S5
896 06:52:33.753929 PCI: 00:1f.2 [0000/0000] hidden
897 06:52:33.757300 PCI: 00:1f.3 [8086/0000] bus ops
898 06:52:33.760360 PCI: 00:1f.3 [8086/a0c8] enabled
899 06:52:33.764057 PCI: 00:1f.5 [8086/0000] bus ops
900 06:52:33.767218 PCI: 00:1f.5 [8086/a0a4] enabled
901 06:52:33.770669 PCI: Leftover static devices:
902 06:52:33.770754 PCI: 00:10.2
903 06:52:33.773656 PCI: 00:10.6
904 06:52:33.773741 PCI: 00:10.7
905 06:52:33.776859 PCI: 00:06.0
906 06:52:33.776944 PCI: 00:07.1
907 06:52:33.777010 PCI: 00:07.2
908 06:52:33.780652 PCI: 00:07.3
909 06:52:33.780736 PCI: 00:09.0
910 06:52:33.784098 PCI: 00:0d.1
911 06:52:33.784182 PCI: 00:0d.2
912 06:52:33.784248 PCI: 00:0d.3
913 06:52:33.786941 PCI: 00:0e.0
914 06:52:33.787026 PCI: 00:12.0
915 06:52:33.790517 PCI: 00:12.6
916 06:52:33.790611 PCI: 00:13.0
917 06:52:33.790680 PCI: 00:14.1
918 06:52:33.793634 PCI: 00:16.1
919 06:52:33.793707 PCI: 00:16.2
920 06:52:33.796766 PCI: 00:16.3
921 06:52:33.796836 PCI: 00:16.4
922 06:52:33.800665 PCI: 00:16.5
923 06:52:33.800746 PCI: 00:17.0
924 06:52:33.800810 PCI: 00:19.2
925 06:52:33.803396 PCI: 00:1e.1
926 06:52:33.803465 PCI: 00:1f.1
927 06:52:33.807123 PCI: 00:1f.4
928 06:52:33.807197 PCI: 00:1f.6
929 06:52:33.807261 PCI: 00:1f.7
930 06:52:33.809995 PCI: Check your devicetree.cb.
931 06:52:33.813420 PCI: 00:02.0 scanning...
932 06:52:33.816694 scan_generic_bus for PCI: 00:02.0
933 06:52:33.820365 scan_generic_bus for PCI: 00:02.0 done
934 06:52:33.826493 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
935 06:52:33.829705 PCI: 00:04.0 scanning...
936 06:52:33.833079 scan_generic_bus for PCI: 00:04.0
937 06:52:33.833149 GENERIC: 0.0 enabled
938 06:52:33.839613 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
939 06:52:33.846840 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
940 06:52:33.846918 PCI: 00:0d.0 scanning...
941 06:52:33.850101 scan_static_bus for PCI: 00:0d.0
942 06:52:33.853718 USB0 port 0 enabled
943 06:52:33.856420 USB0 port 0 scanning...
944 06:52:33.859938 scan_static_bus for USB0 port 0
945 06:52:33.860016 USB3 port 0 enabled
946 06:52:33.863315
947 06:52:33.863390 USB3 port 1 enabled
948 06:52:33.866731 USB3 port 2 disabled
949 06:52:33.866804 USB3 port 3 disabled
950 06:52:33.869773 USB3 port 0 scanning...
951 06:52:33.873220 scan_static_bus for USB3 port 0
952 06:52:33.876684 scan_static_bus for USB3 port 0 done
953 06:52:33.883260 scan_bus: bus USB3 port 0 finished in 6 msecs
954 06:52:33.883339 USB3 port 1 scanning...
955 06:52:33.886669 scan_static_bus for USB3 port 1
956 06:52:33.893012 scan_static_bus for USB3 port 1 done
957 06:52:33.896827 scan_bus: bus USB3 port 1 finished in 6 msecs
958 06:52:33.899781 scan_static_bus for USB0 port 0 done
959 06:52:33.903576 scan_bus: bus USB0 port 0 finished in 43 msecs
960 06:52:33.910130 scan_static_bus for PCI: 00:0d.0 done
961 06:52:33.913034 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
962 06:52:33.916163 PCI: 00:14.0 scanning...
963 06:52:33.919902 scan_static_bus for PCI: 00:14.0
964 06:52:33.923049 USB0 port 0 enabled
965 06:52:33.923122 USB0 port 0 scanning...
966 06:52:33.926119 scan_static_bus for USB0 port 0
967 06:52:33.929654 USB2 port 0 disabled
968 06:52:33.932974 USB2 port 1 enabled
969 06:52:33.933047 USB2 port 2 enabled
970 06:52:33.936039 USB2 port 3 disabled
971 06:52:33.936109 USB2 port 4 enabled
972 06:52:33.939765 USB2 port 5 disabled
973 06:52:33.942633 USB2 port 6 disabled
974 06:52:33.942705 USB2 port 7 disabled
975 06:52:33.946278 USB2 port 8 disabled
976 06:52:33.949185 USB2 port 9 disabled
977 06:52:33.949260 USB3 port 0 disabled
978 06:52:33.952730 USB3 port 1 enabled
979 06:52:33.955981 USB3 port 2 disabled
980 06:52:33.956055 USB3 port 3 disabled
981 06:52:33.959123 USB2 port 1 scanning...
982 06:52:33.962731 scan_static_bus for USB2 port 1
983 06:52:33.965836 scan_static_bus for USB2 port 1 done
984 06:52:33.972528 scan_bus: bus USB2 port 1 finished in 6 msecs
985 06:52:33.972614 USB2 port 2 scanning...
986 06:52:33.975603 scan_static_bus for USB2 port 2
987 06:52:33.982505 scan_static_bus for USB2 port 2 done
988 06:52:33.985892 scan_bus: bus USB2 port 2 finished in 6 msecs
989 06:52:33.988970 USB2 port 4 scanning...
990 06:52:33.992547 scan_static_bus for USB2 port 4
991 06:52:33.995902 scan_static_bus for USB2 port 4 done
992 06:52:33.998633 scan_bus: bus USB2 port 4 finished in 6 msecs
993 06:52:34.002269 USB3 port 1 scanning...
994 06:52:34.005471 scan_static_bus for USB3 port 1
995 06:52:34.008887 scan_static_bus for USB3 port 1 done
996 06:52:34.015178 scan_bus: bus USB3 port 1 finished in 6 msecs
997 06:52:34.019009 scan_static_bus for USB0 port 0 done
998 06:52:34.021904 scan_bus: bus USB0 port 0 finished in 93 msecs
999 06:52:34.025196 scan_static_bus for PCI: 00:14.0 done
1000 06:52:34.032041 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1001 06:52:34.032127 PCI: 00:14.3 scanning...
1002 06:52:34.036010 scan_static_bus for PCI: 00:14.3
1003 06:52:34.038573 GENERIC: 0.0 enabled
1004 06:52:34.041946 scan_static_bus for PCI: 00:14.3 done
1005 06:52:34.048637 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1006 06:52:34.048723 PCI: 00:15.0 scanning...
1007 06:52:34.055271 scan_static_bus for PCI: 00:15.0
1008 06:52:34.055357 I2C: 00:1a enabled
1009 06:52:34.058591 I2C: 00:31 enabled
1010 06:52:34.058682 I2C: 00:32 enabled
1011 06:52:34.061842 scan_static_bus for PCI: 00:15.0 done
1012 06:52:34.068374 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1013 06:52:34.071566 PCI: 00:15.1 scanning...
1014 06:52:34.075323 scan_static_bus for PCI: 00:15.1
1015 06:52:34.075409 I2C: 00:10 enabled
1016 06:52:34.078368 scan_static_bus for PCI: 00:15.1 done
1017 06:52:34.081800
1018 06:52:34.084770 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1019 06:52:34.087876 PCI: 00:15.2 scanning...
1020 06:52:34.091475 scan_static_bus for PCI: 00:15.2
1021 06:52:34.094488 scan_static_bus for PCI: 00:15.2 done
1022 06:52:34.097772 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1023 06:52:34.101717 PCI: 00:15.3 scanning...
1024 06:52:34.104640 scan_static_bus for PCI: 00:15.3
1025 06:52:34.107655 scan_static_bus for PCI: 00:15.3 done
1026 06:52:34.114620 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1027 06:52:34.117358 PCI: 00:19.1 scanning...
1028 06:52:34.120937 scan_static_bus for PCI: 00:19.1
1029 06:52:34.121014 I2C: 00:15 enabled
1030 06:52:34.124221 scan_static_bus for PCI: 00:19.1 done
1031 06:52:34.130872 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1032 06:52:34.134306 PCI: 00:1d.0 scanning...
1033 06:52:34.137513 do_pci_scan_bridge for PCI: 00:1d.0
1034 06:52:34.141415 PCI: pci_scan_bus for bus 01
1035 06:52:34.144198 PCI: 01:00.0 [15b7/5009] enabled
1036 06:52:34.144283 GENERIC: 0.0 enabled
1037 06:52:34.150393 Enabling Common Clock Configuration
1038 06:52:34.154125 L1 Sub-State supported from root port 29
1039 06:52:34.157092 L1 Sub-State Support = 0x5
1040 06:52:34.160492 CommonModeRestoreTime = 0x28
1041 06:52:34.164082 Power On Value = 0x16, Power On Scale = 0x0
1042 06:52:34.164168 ASPM: Enabled L1
1043 06:52:34.170422 PCIe: Max_Payload_Size adjusted to 128
1044 06:52:34.173637 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1045 06:52:34.176706 PCI: 00:1e.2 scanning...
1046 06:52:34.180420 scan_generic_bus for PCI: 00:1e.2
1047 06:52:34.180505 SPI: 00 enabled
1048 06:52:34.186709 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1049 06:52:34.193801 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1050 06:52:34.193897 PCI: 00:1e.3 scanning...
1051 06:52:34.197027
1052 06:52:34.197120 scan_generic_bus for PCI: 00:1e.3
1053 06:52:34.200708
1054 06:52:34.200802 SPI: 00 enabled
1055 06:52:34.207274 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1056 06:52:34.210441 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1057 06:52:34.213688 PCI: 00:1f.0 scanning...
1058 06:52:34.216969 scan_static_bus for PCI: 00:1f.0
1059 06:52:34.220634 PNP: 0c09.0 enabled
1060 06:52:34.220724 PNP: 0c09.0 scanning...
1061 06:52:34.223755 scan_static_bus for PNP: 0c09.0
1062 06:52:34.230299 scan_static_bus for PNP: 0c09.0 done
1063 06:52:34.234053 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1064 06:52:34.236795 scan_static_bus for PCI: 00:1f.0 done
1065 06:52:34.243291 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1066 06:52:34.243377 PCI: 00:1f.2 scanning...
1067 06:52:34.246716 scan_static_bus for PCI: 00:1f.2
1068 06:52:34.249999 GENERIC: 0.0 enabled
1069 06:52:34.253444 GENERIC: 0.0 scanning...
1070 06:52:34.256506 scan_static_bus for GENERIC: 0.0
1071 06:52:34.260375 GENERIC: 0.0 enabled
1072 06:52:34.260460 GENERIC: 1.0 enabled
1073 06:52:34.263413 scan_static_bus for GENERIC: 0.0 done
1074 06:52:34.270110 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1075 06:52:34.273277 scan_static_bus for PCI: 00:1f.2 done
1076 06:52:34.276645 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1077 06:52:34.280041 PCI: 00:1f.3 scanning...
1078 06:52:34.283501 scan_static_bus for PCI: 00:1f.3
1079 06:52:34.286336 scan_static_bus for PCI: 00:1f.3 done
1080 06:52:34.293226 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1081 06:52:34.296672 PCI: 00:1f.5 scanning...
1082 06:52:34.299484 scan_generic_bus for PCI: 00:1f.5
1083 06:52:34.302988 scan_generic_bus for PCI: 00:1f.5 done
1084 06:52:34.306485 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1085 06:52:34.312637 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1086 06:52:34.316077 scan_static_bus for Root Device done
1087 06:52:34.319611 scan_bus: bus Root Device finished in 735 msecs
1088 06:52:34.322903 done
1089 06:52:34.326349 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1090 06:52:34.329421 Chrome EC: UHEPI supported
1091 06:52:34.336423 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1092 06:52:34.342733 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1093 06:52:34.345965 SPI flash protection: WPSW=0 SRP0=1
1094 06:52:34.352568 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1095 06:52:34.356128 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1096 06:52:34.359361 found VGA at PCI: 00:02.0
1097 06:52:34.362675 Setting up VGA for PCI: 00:02.0
1098 06:52:34.369523 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1099 06:52:34.373371 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1100 06:52:34.375541 Allocating resources...
1101 06:52:34.379150 Reading resources...
1102 06:52:34.382592 Root Device read_resources bus 0 link: 0
1103 06:52:34.385882 DOMAIN: 0000 read_resources bus 0 link: 0
1104 06:52:34.392722 PCI: 00:04.0 read_resources bus 1 link: 0
1105 06:52:34.395458 PCI: 00:04.0 read_resources bus 1 link: 0 done
1106 06:52:34.402594 PCI: 00:0d.0 read_resources bus 0 link: 0
1107 06:52:34.405435 USB0 port 0 read_resources bus 0 link: 0
1108 06:52:34.412302 USB0 port 0 read_resources bus 0 link: 0 done
1109 06:52:34.415806 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1110 06:52:34.418623 PCI: 00:14.0 read_resources bus 0 link: 0
1111 06:52:34.422016
1112 06:52:34.425487 USB0 port 0 read_resources bus 0 link: 0
1113 06:52:34.432474 USB0 port 0 read_resources bus 0 link: 0 done
1114 06:52:34.435492 PCI: 00:14.0 read_resources bus 0 link: 0 done
1115 06:52:34.441971 PCI: 00:14.3 read_resources bus 0 link: 0
1116 06:52:34.445055 PCI: 00:14.3 read_resources bus 0 link: 0 done
1117 06:52:34.448419 PCI: 00:15.0 read_resources bus 0 link: 0
1118 06:52:34.456058 PCI: 00:15.0 read_resources bus 0 link: 0 done
1119 06:52:34.459425 PCI: 00:15.1 read_resources bus 0 link: 0
1120 06:52:34.465787 PCI: 00:15.1 read_resources bus 0 link: 0 done
1121 06:52:34.469134 PCI: 00:19.1 read_resources bus 0 link: 0
1122 06:52:34.475971 PCI: 00:19.1 read_resources bus 0 link: 0 done
1123 06:52:34.479308 PCI: 00:1d.0 read_resources bus 1 link: 0
1124 06:52:34.485905 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1125 06:52:34.489411 PCI: 00:1e.2 read_resources bus 2 link: 0
1126 06:52:34.495985 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1127 06:52:34.499345 PCI: 00:1e.3 read_resources bus 3 link: 0
1128 06:52:34.505851 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1129 06:52:34.509382 PCI: 00:1f.0 read_resources bus 0 link: 0
1130 06:52:34.515571 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1131 06:52:34.519366 PCI: 00:1f.2 read_resources bus 0 link: 0
1132 06:52:34.522385 GENERIC: 0.0 read_resources bus 0 link: 0
1133 06:52:34.529378 GENERIC: 0.0 read_resources bus 0 link: 0 done
1134 06:52:34.532854 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1135 06:52:34.539923 DOMAIN: 0000 read_resources bus 0 link: 0 done
1136 06:52:34.543758 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1137 06:52:34.549840 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1138 06:52:34.553013 Root Device read_resources bus 0 link: 0 done
1139 06:52:34.556365 Done reading resources.
1140 06:52:34.562939 Show resources in subtree (Root Device)...After reading.
1141 06:52:34.566647 Root Device child on link 0 DOMAIN: 0000
1142 06:52:34.569754 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1143 06:52:34.579522 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1144 06:52:34.589359 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1145 06:52:34.592985 PCI: 00:00.0
1146 06:52:34.602711 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1147 06:52:34.609372 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1148 06:52:34.619677 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1149 06:52:34.629350 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1150 06:52:34.639217 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1151 06:52:34.649016 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1152 06:52:34.659238 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1153 06:52:34.666014 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1154 06:52:34.676011 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1155 06:52:34.685739 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1156 06:52:34.695712 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1157 06:52:34.705227 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1158 06:52:34.715509 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1159 06:52:34.721859 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1160 06:52:34.732020 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1161 06:52:34.742018 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1162 06:52:34.751900 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1163 06:52:34.761992 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1164 06:52:34.771481 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1165 06:52:34.781512 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1166 06:52:34.781604 PCI: 00:02.0
1167 06:52:34.791404 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1168 06:52:34.801760 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1169 06:52:34.811643 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1170 06:52:34.814602 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1171 06:52:34.824446 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1172 06:52:34.827744 GENERIC: 0.0
1173 06:52:34.827833 PCI: 00:05.0
1174 06:52:34.837892 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1175 06:52:34.844292 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1176 06:52:34.844380 GENERIC: 0.0
1177 06:52:34.847760 PCI: 00:08.0
1178 06:52:34.857422 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1179 06:52:34.857526 PCI: 00:0a.0
1180 06:52:34.864277 PCI: 00:0d.0 child on link 0 USB0 port 0
1181 06:52:34.873819 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1182 06:52:34.877115 USB0 port 0 child on link 0 USB3 port 0
1183 06:52:34.880408 USB3 port 0
1184 06:52:34.880485 USB3 port 1
1185 06:52:34.883947 USB3 port 2
1186 06:52:34.884021 USB3 port 3
1187 06:52:34.890415 PCI: 00:14.0 child on link 0 USB0 port 0
1188 06:52:34.900157 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1189 06:52:34.903584 USB0 port 0 child on link 0 USB2 port 0
1190 06:52:34.903666 USB2 port 0
1191 06:52:34.906763
1192 06:52:34.906837 USB2 port 1
1193 06:52:34.910098 USB2 port 2
1194 06:52:34.910169 USB2 port 3
1195 06:52:34.913320 USB2 port 4
1196 06:52:34.913394 USB2 port 5
1197 06:52:34.916597 USB2 port 6
1198 06:52:34.916673 USB2 port 7
1199 06:52:34.920119 USB2 port 8
1200 06:52:34.920196 USB2 port 9
1201 06:52:34.923290 USB3 port 0
1202 06:52:34.923362 USB3 port 1
1203 06:52:34.926785 USB3 port 2
1204 06:52:34.926861 USB3 port 3
1205 06:52:34.929982 PCI: 00:14.2
1206 06:52:34.940146 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1207 06:52:34.949926 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1208 06:52:34.953008 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1209 06:52:34.962632 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1210 06:52:34.965991 GENERIC: 0.0
1211 06:52:34.969419 PCI: 00:15.0 child on link 0 I2C: 00:1a
1212 06:52:34.979386 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1213 06:52:34.982750 I2C: 00:1a
1214 06:52:34.982827 I2C: 00:31
1215 06:52:34.985735 I2C: 00:32
1216 06:52:34.989354 PCI: 00:15.1 child on link 0 I2C: 00:10
1217 06:52:34.999460 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1218 06:52:34.999546 I2C: 00:10
1219 06:52:35.002678 PCI: 00:15.2
1220 06:52:35.012508 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1221 06:52:35.012595 PCI: 00:15.3
1222 06:52:35.022133 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1223 06:52:35.025682
1224 06:52:35.025769 PCI: 00:16.0
1225 06:52:35.035936 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1226 06:52:35.036025 PCI: 00:19.0
1227 06:52:35.038962
1228 06:52:35.041882 PCI: 00:19.1 child on link 0 I2C: 00:15
1229 06:52:35.052164 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1230 06:52:35.052251 I2C: 00:15
1231 06:52:35.058578 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1232 06:52:35.065376 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1233 06:52:35.074936 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1234 06:52:35.085061 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1235 06:52:35.088550 GENERIC: 0.0
1236 06:52:35.088636 PCI: 01:00.0
1237 06:52:35.098052 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1238 06:52:35.108165 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1239 06:52:35.111399 PCI: 00:1e.0
1240 06:52:35.121144 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1241 06:52:35.124720 PCI: 00:1e.2 child on link 0 SPI: 00
1242 06:52:35.134796 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 06:52:35.137421 SPI: 00
1244 06:52:35.140793 PCI: 00:1e.3 child on link 0 SPI: 00
1245 06:52:35.150944 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1246 06:52:35.151042 SPI: 00
1247 06:52:35.157512 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1248 06:52:35.163957 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1249 06:52:35.167278 PNP: 0c09.0
1250 06:52:35.174131 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1251 06:52:35.180519 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1252 06:52:35.190490 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1253 06:52:35.197234 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1254 06:52:35.203456 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1255 06:52:35.203542 GENERIC: 0.0
1256 06:52:35.207196 GENERIC: 1.0
1257 06:52:35.207283 PCI: 00:1f.3
1258 06:52:35.216738 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1259 06:52:35.226654 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1260 06:52:35.229977
1261 06:52:35.230063 PCI: 00:1f.5
1262 06:52:35.239969 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1263 06:52:35.243128 CPU_CLUSTER: 0 child on link 0 APIC: 00
1264 06:52:35.243213 APIC: 00
1265 06:52:35.246436 APIC: 01
1266 06:52:35.246520 APIC: 03
1267 06:52:35.249724 APIC: 07
1268 06:52:35.249810 APIC: 05
1269 06:52:35.249875 APIC: 04
1270 06:52:35.253401 APIC: 02
1271 06:52:35.253492 APIC: 06
1272 06:52:35.259827 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1273 06:52:35.263117
1274 06:52:35.266550 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1275 06:52:35.272798 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1276 06:52:35.279847 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1277 06:52:35.282877 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1278 06:52:35.286399 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1279 06:52:35.295952 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1280 06:52:35.303098 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1281 06:52:35.309108 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1282 06:52:35.315854 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1283 06:52:35.322472 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1284 06:52:35.332470 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1285 06:52:35.338911 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1286 06:52:35.345227 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1287 06:52:35.348743 DOMAIN: 0000: Resource ranges:
1288 06:52:35.351951 * Base: 1000, Size: 800, Tag: 100
1289 06:52:35.355562 * Base: 1900, Size: e700, Tag: 100
1290 06:52:35.361841 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1291 06:52:35.368759 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1292 06:52:35.375522 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1293 06:52:35.381637 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1294 06:52:35.391720 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1295 06:52:35.398533 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1296 06:52:35.405200 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1297 06:52:35.414985 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1298 06:52:35.421393 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1299 06:52:35.428076 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1300 06:52:35.437676 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1301 06:52:35.444760 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1302 06:52:35.451258 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1303 06:52:35.460724 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1304 06:52:35.467685 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1305 06:52:35.473951 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1306 06:52:35.483911 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1307 06:52:35.490482 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1308 06:52:35.497615 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1309 06:52:35.507000 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1310 06:52:35.514094 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1311 06:52:35.520280 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1312 06:52:35.530475 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1313 06:52:35.536604 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1314 06:52:35.543467 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1315 06:52:35.546709 DOMAIN: 0000: Resource ranges:
1316 06:52:35.553460 * Base: 7fc00000, Size: 40400000, Tag: 200
1317 06:52:35.556527 * Base: d0000000, Size: 28000000, Tag: 200
1318 06:52:35.559756 * Base: fa000000, Size: 1000000, Tag: 200
1319 06:52:35.566783 * Base: fb001000, Size: 2fff000, Tag: 200
1320 06:52:35.569753 * Base: fe010000, Size: 2e000, Tag: 200
1321 06:52:35.573107 * Base: fe03f000, Size: d41000, Tag: 200
1322 06:52:35.577008 * Base: fed88000, Size: 8000, Tag: 200
1323 06:52:35.583082 * Base: fed93000, Size: d000, Tag: 200
1324 06:52:35.586984 * Base: feda2000, Size: 1e000, Tag: 200
1325 06:52:35.589962 * Base: fede0000, Size: 1220000, Tag: 200
1326 06:52:35.596450 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1327 06:52:35.603330 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1328 06:52:35.609866 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1329 06:52:35.616086 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1330 06:52:35.622573 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1331 06:52:35.629384 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1332 06:52:35.635808 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1333 06:52:35.642407 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1334 06:52:35.649422 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1335 06:52:35.655560 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1336 06:52:35.662256 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1337 06:52:35.668897 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1338 06:52:35.675656 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1339 06:52:35.682091 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1340 06:52:35.688837 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1341 06:52:35.695624 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1342 06:52:35.702062 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1343 06:52:35.708930 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1344 06:52:35.715485 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1345 06:52:35.721776 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1346 06:52:35.728285 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1347 06:52:35.734714 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1348 06:52:35.741786 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1349 06:52:35.748127 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1350 06:52:35.758108 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1351 06:52:35.758185 PCI: 00:1d.0: Resource ranges:
1352 06:52:35.761243
1353 06:52:35.764815 * Base: 7fc00000, Size: 100000, Tag: 200
1354 06:52:35.771552 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1355 06:52:35.777704 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1356 06:52:35.784566 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1357 06:52:35.794521 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1358 06:52:35.797605 Root Device assign_resources, bus 0 link: 0
1359 06:52:35.800737 DOMAIN: 0000 assign_resources, bus 0 link: 0
1360 06:52:35.810648 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1361 06:52:35.817673 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1362 06:52:35.827439 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1363 06:52:35.834138 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1364 06:52:35.840579 PCI: 00:04.0 assign_resources, bus 1 link: 0
1365 06:52:35.843557 PCI: 00:04.0 assign_resources, bus 1 link: 0
1366 06:52:35.853669 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1367 06:52:35.860054 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1368 06:52:35.870135 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1369 06:52:35.873268 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1370 06:52:35.877069 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1371 06:52:35.886696 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1372 06:52:35.890300 PCI: 00:14.0 assign_resources, bus 0 link: 0
1373 06:52:35.896897 PCI: 00:14.0 assign_resources, bus 0 link: 0
1374 06:52:35.903083 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1375 06:52:35.913123 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1376 06:52:35.919395 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1377 06:52:35.922810 PCI: 00:14.3 assign_resources, bus 0 link: 0
1378 06:52:35.929536 PCI: 00:14.3 assign_resources, bus 0 link: 0
1379 06:52:35.936330 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1380 06:52:35.942784 PCI: 00:15.0 assign_resources, bus 0 link: 0
1381 06:52:35.945845 PCI: 00:15.0 assign_resources, bus 0 link: 0
1382 06:52:35.955828 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1383 06:52:35.959336 PCI: 00:15.1 assign_resources, bus 0 link: 0
1384 06:52:35.962244 PCI: 00:15.1 assign_resources, bus 0 link: 0
1385 06:52:35.972638 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1386 06:52:35.978835 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1387 06:52:35.989340 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1388 06:52:35.995528 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1389 06:52:36.002305 PCI: 00:19.1 assign_resources, bus 0 link: 0
1390 06:52:36.005722 PCI: 00:19.1 assign_resources, bus 0 link: 0
1391 06:52:36.015248 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1392 06:52:36.025318 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1393 06:52:36.031873 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1394 06:52:36.038863 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1395 06:52:36.045358 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1396 06:52:36.055173 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1397 06:52:36.058377 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1398 06:52:36.068462 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1399 06:52:36.071407 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1400 06:52:36.074602 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1401 06:52:36.085142 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1402 06:52:36.088087 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1403 06:52:36.094889 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1404 06:52:36.098249 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1405 06:52:36.104628 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1406 06:52:36.108075 LPC: Trying to open IO window from 800 size 1ff
1407 06:52:36.118509 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1408 06:52:36.124584 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1409 06:52:36.131425 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1410 06:52:36.138306 DOMAIN: 0000 assign_resources, bus 0 link: 0
1411 06:52:36.141306 Root Device assign_resources, bus 0 link: 0
1412 06:52:36.144532 Done setting resources.
1413 06:52:36.151897 Show resources in subtree (Root Device)...After assigning values.
1414 06:52:36.154701 Root Device child on link 0 DOMAIN: 0000
1415 06:52:36.161427 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1416 06:52:36.168494 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1417 06:52:36.177914 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1418 06:52:36.180892 PCI: 00:00.0
1419 06:52:36.191073 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1420 06:52:36.200704 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1421 06:52:36.207666 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1422 06:52:36.217329 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1423 06:52:36.227403 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1424 06:52:36.237147 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1425 06:52:36.247055 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1426 06:52:36.256970 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1427 06:52:36.263585 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1428 06:52:36.267103
1429 06:52:36.273669 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1430 06:52:36.283442 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1431 06:52:36.293409 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1432 06:52:36.302896 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1433 06:52:36.309834 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1434 06:52:36.313120
1435 06:52:36.319554 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1436 06:52:36.329624 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1437 06:52:36.339589 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1438 06:52:36.349471 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1439 06:52:36.359259 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1440 06:52:36.369236 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1441 06:52:36.369339 PCI: 00:02.0
1442 06:52:36.382378 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1443 06:52:36.392215 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1444 06:52:36.401985 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1445 06:52:36.405354 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1446 06:52:36.415337 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1447 06:52:36.418601 GENERIC: 0.0
1448 06:52:36.418687 PCI: 00:05.0
1449 06:52:36.428507 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1450 06:52:36.435242 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1451 06:52:36.435324 GENERIC: 0.0
1452 06:52:36.438761 PCI: 00:08.0
1453 06:52:36.448166 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1454 06:52:36.448247 PCI: 00:0a.0
1455 06:52:36.455020 PCI: 00:0d.0 child on link 0 USB0 port 0
1456 06:52:36.464840 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1457 06:52:36.468122 USB0 port 0 child on link 0 USB3 port 0
1458 06:52:36.471411 USB3 port 0
1459 06:52:36.471499 USB3 port 1
1460 06:52:36.475010 USB3 port 2
1461 06:52:36.475086 USB3 port 3
1462 06:52:36.481585 PCI: 00:14.0 child on link 0 USB0 port 0
1463 06:52:36.491461 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1464 06:52:36.494559 USB0 port 0 child on link 0 USB2 port 0
1465 06:52:36.497693 USB2 port 0
1466 06:52:36.497766 USB2 port 1
1467 06:52:36.501293 USB2 port 2
1468 06:52:36.501366 USB2 port 3
1469 06:52:36.504746 USB2 port 4
1470 06:52:36.504816 USB2 port 5
1471 06:52:36.507627
1472 06:52:36.507698 USB2 port 6
1473 06:52:36.510880 USB2 port 7
1474 06:52:36.510954 USB2 port 8
1475 06:52:36.514122 USB2 port 9
1476 06:52:36.514192 USB3 port 0
1477 06:52:36.517819 USB3 port 1
1478 06:52:36.517890 USB3 port 2
1479 06:52:36.521106 USB3 port 3
1480 06:52:36.521174 PCI: 00:14.2
1481 06:52:36.531080 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1482 06:52:36.544002 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1483 06:52:36.547276 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1484 06:52:36.556947 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1485 06:52:36.560744 GENERIC: 0.0
1486 06:52:36.563703 PCI: 00:15.0 child on link 0 I2C: 00:1a
1487 06:52:36.573660 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1488 06:52:36.573741 I2C: 00:1a
1489 06:52:36.576972 I2C: 00:31
1490 06:52:36.577047 I2C: 00:32
1491 06:52:36.584028 PCI: 00:15.1 child on link 0 I2C: 00:10
1492 06:52:36.593333 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1493 06:52:36.593410 I2C: 00:10
1494 06:52:36.596671 PCI: 00:15.2
1495 06:52:36.606662 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1496 06:52:36.606743 PCI: 00:15.3
1497 06:52:36.619764 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1498 06:52:36.619843 PCI: 00:16.0
1499 06:52:36.629685 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1500 06:52:36.633230 PCI: 00:19.0
1501 06:52:36.636130 PCI: 00:19.1 child on link 0 I2C: 00:15
1502 06:52:36.646606 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1503 06:52:36.649588 I2C: 00:15
1504 06:52:36.652744 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1505 06:52:36.662994 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1506 06:52:36.672674 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1507 06:52:36.686230 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1508 06:52:36.686310 GENERIC: 0.0
1509 06:52:36.689080 PCI: 01:00.0
1510 06:52:36.699365 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1511 06:52:36.709024 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1512 06:52:36.709101 PCI: 00:1e.0
1513 06:52:36.722267 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1514 06:52:36.725420 PCI: 00:1e.2 child on link 0 SPI: 00
1515 06:52:36.735356 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1516 06:52:36.735435 SPI: 00
1517 06:52:36.738640
1518 06:52:36.741719 PCI: 00:1e.3 child on link 0 SPI: 00
1519 06:52:36.751588 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1520 06:52:36.751664 SPI: 00
1521 06:52:36.758349 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1522 06:52:36.764777 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1523 06:52:36.768056 PNP: 0c09.0
1524 06:52:36.774685 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1525 06:52:36.781273 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1526 06:52:36.791045 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1527 06:52:36.797735 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1528 06:52:36.804300 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1529 06:52:36.804383 GENERIC: 0.0
1530 06:52:36.807746 GENERIC: 1.0
1531 06:52:36.807819 PCI: 00:1f.3
1532 06:52:36.821253 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1533 06:52:36.830873 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1534 06:52:36.830958 PCI: 00:1f.5
1535 06:52:36.841163 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1536 06:52:36.847380 CPU_CLUSTER: 0 child on link 0 APIC: 00
1537 06:52:36.847465 APIC: 00
1538 06:52:36.847531 APIC: 01
1539 06:52:36.850765 APIC: 03
1540 06:52:36.850849 APIC: 07
1541 06:52:36.853804 APIC: 05
1542 06:52:36.853888 APIC: 04
1543 06:52:36.853954 APIC: 02
1544 06:52:36.857471 APIC: 06
1545 06:52:36.860571 Done allocating resources.
1546 06:52:36.863738 BS: BS_DEV_RESOURCES run times (exec / console): 27 / 2475 ms
1547 06:52:36.871033 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1548 06:52:36.873895 Configure GPIOs for I2S audio on UP4.
1549 06:52:36.881850 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1550 06:52:36.884623 Enabling resources...
1551 06:52:36.888065 PCI: 00:00.0 subsystem <- 8086/9a12
1552 06:52:36.891221 PCI: 00:00.0 cmd <- 06
1553 06:52:36.894533 PCI: 00:02.0 subsystem <- 8086/9a40
1554 06:52:36.897958 PCI: 00:02.0 cmd <- 03
1555 06:52:36.901304 PCI: 00:04.0 subsystem <- 8086/9a03
1556 06:52:36.904942 PCI: 00:04.0 cmd <- 02
1557 06:52:36.907658 PCI: 00:05.0 subsystem <- 8086/9a19
1558 06:52:36.907743 PCI: 00:05.0 cmd <- 02
1559 06:52:36.914456 PCI: 00:08.0 subsystem <- 8086/9a11
1560 06:52:36.914541 PCI: 00:08.0 cmd <- 06
1561 06:52:36.917932 PCI: 00:0d.0 subsystem <- 8086/9a13
1562 06:52:36.920974 PCI: 00:0d.0 cmd <- 02
1563 06:52:36.924418 PCI: 00:14.0 subsystem <- 8086/a0ed
1564 06:52:36.927866 PCI: 00:14.0 cmd <- 02
1565 06:52:36.931262 PCI: 00:14.2 subsystem <- 8086/a0ef
1566 06:52:36.934296 PCI: 00:14.2 cmd <- 02
1567 06:52:36.937465 PCI: 00:14.3 subsystem <- 8086/a0f0
1568 06:52:36.940878 PCI: 00:14.3 cmd <- 02
1569 06:52:36.944473 PCI: 00:15.0 subsystem <- 8086/a0e8
1570 06:52:36.947377 PCI: 00:15.0 cmd <- 02
1571 06:52:36.951188 PCI: 00:15.1 subsystem <- 8086/a0e9
1572 06:52:36.954021 PCI: 00:15.1 cmd <- 02
1573 06:52:36.957408 PCI: 00:15.2 subsystem <- 8086/a0ea
1574 06:52:36.957528 PCI: 00:15.2 cmd <- 02
1575 06:52:36.964479 PCI: 00:15.3 subsystem <- 8086/a0eb
1576 06:52:36.964563 PCI: 00:15.3 cmd <- 02
1577 06:52:36.967304 PCI: 00:16.0 subsystem <- 8086/a0e0
1578 06:52:36.970704 PCI: 00:16.0 cmd <- 02
1579 06:52:36.974411 PCI: 00:19.1 subsystem <- 8086/a0c6
1580 06:52:36.977783 PCI: 00:19.1 cmd <- 02
1581 06:52:36.980696 PCI: 00:1d.0 bridge ctrl <- 0013
1582 06:52:36.984611 PCI: 00:1d.0 subsystem <- 8086/a0b0
1583 06:52:36.987133 PCI: 00:1d.0 cmd <- 06
1584 06:52:36.990411 PCI: 00:1e.0 subsystem <- 8086/a0a8
1585 06:52:36.993794 PCI: 00:1e.0 cmd <- 06
1586 06:52:36.996940 PCI: 00:1e.2 subsystem <- 8086/a0aa
1587 06:52:37.000319 PCI: 00:1e.2 cmd <- 06
1588 06:52:37.003579 PCI: 00:1e.3 subsystem <- 8086/a0ab
1589 06:52:37.006880 PCI: 00:1e.3 cmd <- 02
1590 06:52:37.010058 PCI: 00:1f.0 subsystem <- 8086/a087
1591 06:52:37.010141 PCI: 00:1f.0 cmd <- 407
1592 06:52:37.013447
1593 06:52:37.016662 PCI: 00:1f.3 subsystem <- 8086/a0c8
1594 06:52:37.016745 PCI: 00:1f.3 cmd <- 02
1595 06:52:37.023258 PCI: 00:1f.5 subsystem <- 8086/a0a4
1596 06:52:37.023341 PCI: 00:1f.5 cmd <- 406
1597 06:52:37.028626 PCI: 01:00.0 cmd <- 02
1598 06:52:37.033407 done.
1599 06:52:37.036477 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1600 06:52:37.039772 Initializing devices...
1601 06:52:37.043319 Root Device init
1602 06:52:37.046196 Chrome EC: Set SMI mask to 0x0000000000000000
1603 06:52:37.053416 Chrome EC: clear events_b mask to 0x0000000000000000
1604 06:52:37.059260 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1605 06:52:37.062690 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1606 06:52:37.069778 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1607 06:52:37.076311 Chrome EC: Set WAKE mask to 0x0000000000000000
1608 06:52:37.079702 fw_config match found: DB_USB=USB3_ACTIVE
1609 06:52:37.086165 Configure Right Type-C port orientation for retimer
1610 06:52:37.089374 Root Device init finished in 42 msecs
1611 06:52:37.092748 PCI: 00:00.0 init
1612 06:52:37.092834 CPU TDP = 9 Watts
1613 06:52:37.096348
1614 06:52:37.096433 CPU PL1 = 9 Watts
1615 06:52:37.099588 CPU PL2 = 40 Watts
1616 06:52:37.099672 CPU PL4 = 83 Watts
1617 06:52:37.102792 PCI: 00:00.0 init finished in 8 msecs
1618 06:52:37.105941 PCI: 00:02.0 init
1619 06:52:37.109459 GMA: Found VBT in CBFS
1620 06:52:37.113185 GMA: Found valid VBT in CBFS
1621 06:52:37.115856 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1622 06:52:37.125900 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1623 06:52:37.129354 PCI: 00:02.0 init finished in 18 msecs
1624 06:52:37.132762 PCI: 00:05.0 init
1625 06:52:37.135944 PCI: 00:05.0 init finished in 0 msecs
1626 06:52:37.136029 PCI: 00:08.0 init
1627 06:52:37.139321
1628 06:52:37.142411 PCI: 00:08.0 init finished in 0 msecs
1629 06:52:37.142496 PCI: 00:14.0 init
1630 06:52:37.146225
1631 06:52:37.149360 PCI: 00:14.0 init finished in 0 msecs
1632 06:52:37.149451 PCI: 00:14.2 init
1633 06:52:37.152434 PCI: 00:14.2 init finished in 0 msecs
1634 06:52:37.156123 PCI: 00:15.0 init
1635 06:52:37.159374 I2C bus 0 version 0x3230302a
1636 06:52:37.163040 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1637 06:52:37.165951 PCI: 00:15.0 init finished in 6 msecs
1638 06:52:37.169617 PCI: 00:15.1 init
1639 06:52:37.172844 I2C bus 1 version 0x3230302a
1640 06:52:37.175952 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1641 06:52:37.179119 PCI: 00:15.1 init finished in 6 msecs
1642 06:52:37.182355 PCI: 00:15.2 init
1643 06:52:37.186150 I2C bus 2 version 0x3230302a
1644 06:52:37.189626 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1645 06:52:37.192483 PCI: 00:15.2 init finished in 6 msecs
1646 06:52:37.195870 PCI: 00:15.3 init
1647 06:52:37.195946 I2C bus 3 version 0x3230302a
1648 06:52:37.202492 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1649 06:52:37.205427 PCI: 00:15.3 init finished in 6 msecs
1650 06:52:37.205537 PCI: 00:16.0 init
1651 06:52:37.209314 PCI: 00:16.0 init finished in 0 msecs
1652 06:52:37.212661
1653 06:52:37.212735 PCI: 00:19.1 init
1654 06:52:37.215515 I2C bus 5 version 0x3230302a
1655 06:52:37.218788 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1656 06:52:37.222423 PCI: 00:19.1 init finished in 6 msecs
1657 06:52:37.225618 PCI: 00:1d.0 init
1658 06:52:37.229380 Initializing PCH PCIe bridge.
1659 06:52:37.231961 PCI: 00:1d.0 init finished in 3 msecs
1660 06:52:37.235728 PCI: 00:1f.0 init
1661 06:52:37.239108 IOAPIC: Initializing IOAPIC at 0xfec00000
1662 06:52:37.245434 IOAPIC: Bootstrap Processor Local APIC = 0x00
1663 06:52:37.245557 IOAPIC: ID = 0x02
1664 06:52:37.248788 IOAPIC: Dumping registers
1665 06:52:37.251850 reg 0x0000: 0x02000000
1666 06:52:37.255261 reg 0x0001: 0x00770020
1667 06:52:37.255347 reg 0x0002: 0x00000000
1668 06:52:37.261904 PCI: 00:1f.0 init finished in 21 msecs
1669 06:52:37.261990 PCI: 00:1f.2 init
1670 06:52:37.265173 Disabling ACPI via APMC.
1671 06:52:37.270557 APMC done.
1672 06:52:37.273459 PCI: 00:1f.2 init finished in 6 msecs
1673 06:52:37.285642 PCI: 01:00.0 init
1674 06:52:37.288456 PCI: 01:00.0 init finished in 0 msecs
1675 06:52:37.291967 PNP: 0c09.0 init
1676 06:52:37.298232 Google Chrome EC uptime: 8.261 seconds
1677 06:52:37.301988 Google Chrome AP resets since EC boot: 1
1678 06:52:37.305313 Google Chrome most recent AP reset causes:
1679 06:52:37.308445 0.453: 32775 shutdown: entering G3
1680 06:52:37.314852 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1681 06:52:37.318328 PNP: 0c09.0 init finished in 23 msecs
1682 06:52:37.324909 Devices initialized
1683 06:52:37.328439 Show all devs... After init.
1684 06:52:37.331493 Root Device: enabled 1
1685 06:52:37.331579 DOMAIN: 0000: enabled 1
1686 06:52:37.335184 CPU_CLUSTER: 0: enabled 1
1687 06:52:37.338070 PCI: 00:00.0: enabled 1
1688 06:52:37.341884 PCI: 00:02.0: enabled 1
1689 06:52:37.341970 PCI: 00:04.0: enabled 1
1690 06:52:37.344800 PCI: 00:05.0: enabled 1
1691 06:52:37.348080 PCI: 00:06.0: enabled 0
1692 06:52:37.351346 PCI: 00:07.0: enabled 0
1693 06:52:37.351433 PCI: 00:07.1: enabled 0
1694 06:52:37.354917 PCI: 00:07.2: enabled 0
1695 06:52:37.357962 PCI: 00:07.3: enabled 0
1696 06:52:37.361068 PCI: 00:08.0: enabled 1
1697 06:52:37.361154 PCI: 00:09.0: enabled 0
1698 06:52:37.364388 PCI: 00:0a.0: enabled 0
1699 06:52:37.367792 PCI: 00:0d.0: enabled 1
1700 06:52:37.371419 PCI: 00:0d.1: enabled 0
1701 06:52:37.371505 PCI: 00:0d.2: enabled 0
1702 06:52:37.374745 PCI: 00:0d.3: enabled 0
1703 06:52:37.377857 PCI: 00:0e.0: enabled 0
1704 06:52:37.381225 PCI: 00:10.2: enabled 1
1705 06:52:37.381311 PCI: 00:10.6: enabled 0
1706 06:52:37.384404 PCI: 00:10.7: enabled 0
1707 06:52:37.387554 PCI: 00:12.0: enabled 0
1708 06:52:37.387640 PCI: 00:12.6: enabled 0
1709 06:52:37.390767
1710 06:52:37.390854 PCI: 00:13.0: enabled 0
1711 06:52:37.394296 PCI: 00:14.0: enabled 1
1712 06:52:37.397761 PCI: 00:14.1: enabled 0
1713 06:52:37.397847 PCI: 00:14.2: enabled 1
1714 06:52:37.401034 PCI: 00:14.3: enabled 1
1715 06:52:37.404172 PCI: 00:15.0: enabled 1
1716 06:52:37.407615 PCI: 00:15.1: enabled 1
1717 06:52:37.407700 PCI: 00:15.2: enabled 1
1718 06:52:37.411201 PCI: 00:15.3: enabled 1
1719 06:52:37.414350 PCI: 00:16.0: enabled 1
1720 06:52:37.417373 PCI: 00:16.1: enabled 0
1721 06:52:37.417458 PCI: 00:16.2: enabled 0
1722 06:52:37.420814 PCI: 00:16.3: enabled 0
1723 06:52:37.423999 PCI: 00:16.4: enabled 0
1724 06:52:37.427143 PCI: 00:16.5: enabled 0
1725 06:52:37.427228 PCI: 00:17.0: enabled 0
1726 06:52:37.430683 PCI: 00:19.0: enabled 0
1727 06:52:37.434106 PCI: 00:19.1: enabled 1
1728 06:52:37.434191 PCI: 00:19.2: enabled 0
1729 06:52:37.437723
1730 06:52:37.437809 PCI: 00:1c.0: enabled 1
1731 06:52:37.440683 PCI: 00:1c.1: enabled 0
1732 06:52:37.443840 PCI: 00:1c.2: enabled 0
1733 06:52:37.443925 PCI: 00:1c.3: enabled 0
1734 06:52:37.447278 PCI: 00:1c.4: enabled 0
1735 06:52:37.450990 PCI: 00:1c.5: enabled 0
1736 06:52:37.453884 PCI: 00:1c.6: enabled 1
1737 06:52:37.453969 PCI: 00:1c.7: enabled 0
1738 06:52:37.457082 PCI: 00:1d.0: enabled 1
1739 06:52:37.461001 PCI: 00:1d.1: enabled 0
1740 06:52:37.463760 PCI: 00:1d.2: enabled 1
1741 06:52:37.463845 PCI: 00:1d.3: enabled 0
1742 06:52:37.466967 PCI: 00:1e.0: enabled 1
1743 06:52:37.470283 PCI: 00:1e.1: enabled 0
1744 06:52:37.473757 PCI: 00:1e.2: enabled 1
1745 06:52:37.473842 PCI: 00:1e.3: enabled 1
1746 06:52:37.477267 PCI: 00:1f.0: enabled 1
1747 06:52:37.480653 PCI: 00:1f.1: enabled 0
1748 06:52:37.480745 PCI: 00:1f.2: enabled 1
1749 06:52:37.483925
1750 06:52:37.484020 PCI: 00:1f.3: enabled 1
1751 06:52:37.487257 PCI: 00:1f.4: enabled 0
1752 06:52:37.490202 PCI: 00:1f.5: enabled 1
1753 06:52:37.490278 PCI: 00:1f.6: enabled 0
1754 06:52:37.493909 PCI: 00:1f.7: enabled 0
1755 06:52:37.496907 APIC: 00: enabled 1
1756 06:52:37.499990 GENERIC: 0.0: enabled 1
1757 06:52:37.500072 GENERIC: 0.0: enabled 1
1758 06:52:37.503778 GENERIC: 1.0: enabled 1
1759 06:52:37.506518 GENERIC: 0.0: enabled 1
1760 06:52:37.509869 GENERIC: 1.0: enabled 1
1761 06:52:37.509954 USB0 port 0: enabled 1
1762 06:52:37.513439 GENERIC: 0.0: enabled 1
1763 06:52:37.516555 USB0 port 0: enabled 1
1764 06:52:37.516639 GENERIC: 0.0: enabled 1
1765 06:52:37.520129 I2C: 00:1a: enabled 1
1766 06:52:37.523161 I2C: 00:31: enabled 1
1767 06:52:37.523245 I2C: 00:32: enabled 1
1768 06:52:37.526587 I2C: 00:10: enabled 1
1769 06:52:37.529697 I2C: 00:15: enabled 1
1770 06:52:37.533184 GENERIC: 0.0: enabled 0
1771 06:52:37.533269 GENERIC: 1.0: enabled 0
1772 06:52:37.536355 GENERIC: 0.0: enabled 1
1773 06:52:37.539729 SPI: 00: enabled 1
1774 06:52:37.539813 SPI: 00: enabled 1
1775 06:52:37.542985 PNP: 0c09.0: enabled 1
1776 06:52:37.546463 GENERIC: 0.0: enabled 1
1777 06:52:37.546548 USB3 port 0: enabled 1
1778 06:52:37.549991 USB3 port 1: enabled 1
1779 06:52:37.552726 USB3 port 2: enabled 0
1780 06:52:37.556105 USB3 port 3: enabled 0
1781 06:52:37.556179 USB2 port 0: enabled 0
1782 06:52:37.559777 USB2 port 1: enabled 1
1783 06:52:37.562789 USB2 port 2: enabled 1
1784 06:52:37.562873 USB2 port 3: enabled 0
1785 06:52:37.566025 USB2 port 4: enabled 1
1786 06:52:37.569309 USB2 port 5: enabled 0
1787 06:52:37.569393 USB2 port 6: enabled 0
1788 06:52:37.572877
1789 06:52:37.572961 USB2 port 7: enabled 0
1790 06:52:37.576084 USB2 port 8: enabled 0
1791 06:52:37.579510 USB2 port 9: enabled 0
1792 06:52:37.579595 USB3 port 0: enabled 0
1793 06:52:37.582701 USB3 port 1: enabled 1
1794 06:52:37.585984 USB3 port 2: enabled 0
1795 06:52:37.586078 USB3 port 3: enabled 0
1796 06:52:37.589342 GENERIC: 0.0: enabled 1
1797 06:52:37.592531 GENERIC: 1.0: enabled 1
1798 06:52:37.595872 APIC: 01: enabled 1
1799 06:52:37.595957 APIC: 03: enabled 1
1800 06:52:37.598985 APIC: 07: enabled 1
1801 06:52:37.599070 APIC: 05: enabled 1
1802 06:52:37.602516 APIC: 04: enabled 1
1803 06:52:37.606057 APIC: 02: enabled 1
1804 06:52:37.606142 APIC: 06: enabled 1
1805 06:52:37.609357 PCI: 01:00.0: enabled 1
1806 06:52:37.615590 BS: BS_DEV_INIT run times (exec / console): 31 / 540 ms
1807 06:52:37.619129 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1808 06:52:37.622128 ELOG: NV offset 0xf30000 size 0x1000
1809 06:52:37.630265 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1810 06:52:37.636534 ELOG: Event(17) added with size 13 at 2023-01-10 06:52:36 UTC
1811 06:52:37.643149 ELOG: Event(92) added with size 9 at 2023-01-10 06:52:36 UTC
1812 06:52:37.649777 ELOG: Event(93) added with size 9 at 2023-01-10 06:52:36 UTC
1813 06:52:37.656695 ELOG: Event(9E) added with size 10 at 2023-01-10 06:52:36 UTC
1814 06:52:37.663012 ELOG: Event(9F) added with size 14 at 2023-01-10 06:52:36 UTC
1815 06:52:37.669561 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1816 06:52:37.676256 ELOG: Event(A1) added with size 10 at 2023-01-10 06:52:36 UTC
1817 06:52:37.682532 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1818 06:52:37.689182 ELOG: Event(A0) added with size 9 at 2023-01-10 06:52:36 UTC
1819 06:52:37.692622 elog_add_boot_reason: Logged dev mode boot
1820 06:52:37.699449 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1821 06:52:37.702548 Finalize devices...
1822 06:52:37.702634 Devices finalized
1823 06:52:37.708991 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1824 06:52:37.712495 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1825 06:52:37.718990 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1826 06:52:37.721935 ME: HFSTS1 : 0x80030055
1827 06:52:37.725313
1828 06:52:37.728771 ME: HFSTS2 : 0x30280116
1829 06:52:37.732353 ME: HFSTS3 : 0x00000050
1830 06:52:37.738615 ME: HFSTS4 : 0x00004000
1831 06:52:37.741889 ME: HFSTS5 : 0x00000000
1832 06:52:37.745143 ME: HFSTS6 : 0x40400006
1833 06:52:37.748550 ME: Manufacturing Mode : YES
1834 06:52:37.755305 ME: SPI Protection Mode Enabled : NO
1835 06:52:37.758459 ME: FW Partition Table : OK
1836 06:52:37.761565 ME: Bringup Loader Failure : NO
1837 06:52:37.764932 ME: Firmware Init Complete : NO
1838 06:52:37.768299 ME: Boot Options Present : NO
1839 06:52:37.771570 ME: Update In Progress : NO
1840 06:52:37.775224 ME: D0i3 Support : YES
1841 06:52:37.778320 ME: Low Power State Enabled : NO
1842 06:52:37.784919 ME: CPU Replaced : YES
1843 06:52:37.788016 ME: CPU Replacement Valid : YES
1844 06:52:37.791539 ME: Current Working State : 5
1845 06:52:37.795105 ME: Current Operation State : 1
1846 06:52:37.797939 ME: Current Operation Mode : 3
1847 06:52:37.801458 ME: Error Code : 0
1848 06:52:37.804664 ME: Enhanced Debug Mode : NO
1849 06:52:37.807807 ME: CPU Debug Disabled : YES
1850 06:52:37.814501 ME: TXT Support : NO
1851 06:52:37.817751 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1852 06:52:37.827726 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1853 06:52:37.830868 CBFS: 'fallback/slic' not found.
1854 06:52:37.834471 ACPI: Writing ACPI tables at 76b01000.
1855 06:52:37.834555 ACPI: * FACS
1856 06:52:37.837764 ACPI: * DSDT
1857 06:52:37.840949 Ramoops buffer: 0x100000@0x76a00000.
1858 06:52:37.847584 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1859 06:52:37.850912 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1860 06:52:37.853928 Google Chrome EC: version:
1861 06:52:37.857400 ro: voema_v2.0.10114-a447f03e46
1862 06:52:37.861079 rw: voema_v2.0.10114-a447f03e46
1863 06:52:37.863931 running image: 2
1864 06:52:37.870657 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1865 06:52:37.874050 ACPI: * FADT
1866 06:52:37.874134 SCI is IRQ9
1867 06:52:37.877274 ACPI: added table 1/32, length now 40
1868 06:52:37.880628
1869 06:52:37.880711 ACPI: * SSDT
1870 06:52:37.883943 Found 1 CPU(s) with 8 core(s) each.
1871 06:52:37.890215 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1872 06:52:37.893723 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1873 06:52:37.896940 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1874 06:52:37.900224 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1875 06:52:37.906950 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1876 06:52:37.913427 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1877 06:52:37.917010 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1878 06:52:37.923169 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1879 06:52:37.930165 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1880 06:52:37.933107 \_SB.PCI0.RP09: Added StorageD3Enable property
1881 06:52:37.940141 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1882 06:52:37.943447 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1883 06:52:37.950235 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1884 06:52:37.953452 PS2K: Passing 80 keymaps to kernel
1885 06:52:37.960412 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1886 06:52:37.966450 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1887 06:52:37.973243 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1888 06:52:37.979966 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1889 06:52:37.986396 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1890 06:52:37.993402 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1891 06:52:38.000066 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1892 06:52:38.006306 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1893 06:52:38.010002 ACPI: added table 2/32, length now 44
1894 06:52:38.013098 ACPI: * MCFG
1895 06:52:38.016390 ACPI: added table 3/32, length now 48
1896 06:52:38.016481 ACPI: * TPM2
1897 06:52:38.019864 TPM2 log created at 0x769f0000
1898 06:52:38.022970 ACPI: added table 4/32, length now 52
1899 06:52:38.026310 ACPI: * MADT
1900 06:52:38.026398 SCI is IRQ9
1901 06:52:38.029729 ACPI: added table 5/32, length now 56
1902 06:52:38.032730 current = 76b09850
1903 06:52:38.032813 ACPI: * DMAR
1904 06:52:38.039693 ACPI: added table 6/32, length now 60
1905 06:52:38.042923 ACPI: added table 7/32, length now 64
1906 06:52:38.043007 ACPI: * HPET
1907 06:52:38.046151 ACPI: added table 8/32, length now 68
1908 06:52:38.049630 ACPI: done.
1909 06:52:38.052748 ACPI tables: 35216 bytes.
1910 06:52:38.052832 smbios_write_tables: 769ef000
1911 06:52:38.056126 EC returned error result code 3
1912 06:52:38.059763 Couldn't obtain OEM name from CBI
1913 06:52:38.062675
1914 06:52:38.066054 Create SMBIOS type 16
1915 06:52:38.066138 Create SMBIOS type 17
1916 06:52:38.069375 GENERIC: 0.0 (WIFI Device)
1917 06:52:38.072685 SMBIOS tables: 1734 bytes.
1918 06:52:38.075829 Writing table forward entry at 0x00000500
1919 06:52:38.082402 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1920 06:52:38.085798 Writing coreboot table at 0x76b25000
1921 06:52:38.092707 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1922 06:52:38.099389 1. 0000000000001000-000000000009ffff: RAM
1923 06:52:38.102281 2. 00000000000a0000-00000000000fffff: RESERVED
1924 06:52:38.105608 3. 0000000000100000-00000000769eefff: RAM
1925 06:52:38.112564 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1926 06:52:38.115599 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1927 06:52:38.119126
1928 06:52:38.122183 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1929 06:52:38.128845 7. 0000000077000000-000000007fbfffff: RESERVED
1930 06:52:38.132320 8. 00000000c0000000-00000000cfffffff: RESERVED
1931 06:52:38.139323 9. 00000000f8000000-00000000f9ffffff: RESERVED
1932 06:52:38.142507 10. 00000000fb000000-00000000fb000fff: RESERVED
1933 06:52:38.145370 11. 00000000fe000000-00000000fe00ffff: RESERVED
1934 06:52:38.148802
1935 06:52:38.152056 12. 00000000fed80000-00000000fed87fff: RESERVED
1936 06:52:38.155287 13. 00000000fed90000-00000000fed92fff: RESERVED
1937 06:52:38.161891 14. 00000000feda0000-00000000feda1fff: RESERVED
1938 06:52:38.165728 15. 00000000fedc0000-00000000feddffff: RESERVED
1939 06:52:38.171951 16. 0000000100000000-00000004803fffff: RAM
1940 06:52:38.172037 Passing 4 GPIOs to payload:
1941 06:52:38.178813 NAME | PORT | POLARITY | VALUE
1942 06:52:38.185249 lid | undefined | high | high
1943 06:52:38.188509 power | undefined | high | low
1944 06:52:38.195647 oprom | undefined | high | low
1945 06:52:38.198266 EC in RW | 0x000000e5 | high | high
1946 06:52:38.205342 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f865
1947 06:52:38.208704 coreboot table: 1576 bytes.
1948 06:52:38.211747 IMD ROOT 0. 0x76fff000 0x00001000
1949 06:52:38.214703 IMD SMALL 1. 0x76ffe000 0x00001000
1950 06:52:38.221751 FSP MEMORY 2. 0x76c4e000 0x003b0000
1951 06:52:38.224817 VPD 3. 0x76c4d000 0x00000367
1952 06:52:38.228123 RO MCACHE 4. 0x76c4c000 0x00000fdc
1953 06:52:38.231561 CONSOLE 5. 0x76c2c000 0x00020000
1954 06:52:38.234755 FMAP 6. 0x76c2b000 0x00000578
1955 06:52:38.238419 TIME STAMP 7. 0x76c2a000 0x00000910
1956 06:52:38.241302 VBOOT WORK 8. 0x76c16000 0x00014000
1957 06:52:38.244719 ROMSTG STCK 9. 0x76c15000 0x00001000
1958 06:52:38.248110
1959 06:52:38.251511 AFTER CAR 10. 0x76c0a000 0x0000b000
1960 06:52:38.254359 RAMSTAGE 11. 0x76b97000 0x00073000
1961 06:52:38.258642 REFCODE 12. 0x76b42000 0x00055000
1962 06:52:38.261173 SMM BACKUP 13. 0x76b32000 0x00010000
1963 06:52:38.264119 4f444749 14. 0x76b30000 0x00002000
1964 06:52:38.267881 EXT VBT15. 0x76b2d000 0x0000219f
1965 06:52:38.271197 COREBOOT 16. 0x76b25000 0x00008000
1966 06:52:38.274499 ACPI 17. 0x76b01000 0x00024000
1967 06:52:38.280760 ACPI GNVS 18. 0x76b00000 0x00001000
1968 06:52:38.284070 RAMOOPS 19. 0x76a00000 0x00100000
1969 06:52:38.287176 TPM2 TCGLOG20. 0x769f0000 0x00010000
1970 06:52:38.290771 SMBIOS 21. 0x769ef000 0x00000800
1971 06:52:38.290855 IMD small region:
1972 06:52:38.293890
1973 06:52:38.297204 IMD ROOT 0. 0x76ffec00 0x00000400
1974 06:52:38.300919 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1975 06:52:38.303772 POWER STATE 2. 0x76ffeb80 0x00000044
1976 06:52:38.307137 ROMSTAGE 3. 0x76ffeb60 0x00000004
1977 06:52:38.310584 MEM INFO 4. 0x76ffe980 0x000001e0
1978 06:52:38.317429 BS: BS_WRITE_TABLES run times (exec / console): 9 / 484 ms
1979 06:52:38.320453 MTRR: Physical address space:
1980 06:52:38.326942 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1981 06:52:38.333695 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1982 06:52:38.340308 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1983 06:52:38.346956 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1984 06:52:38.353377 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1985 06:52:38.357149 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1986 06:52:38.363295 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1987 06:52:38.369954 MTRR: Fixed MSR 0x250 0x0606060606060606
1988 06:52:38.372950 MTRR: Fixed MSR 0x258 0x0606060606060606
1989 06:52:38.376853 MTRR: Fixed MSR 0x259 0x0000000000000000
1990 06:52:38.379892 MTRR: Fixed MSR 0x268 0x0606060606060606
1991 06:52:38.386303 MTRR: Fixed MSR 0x269 0x0606060606060606
1992 06:52:38.389847 MTRR: Fixed MSR 0x26a 0x0606060606060606
1993 06:52:38.392927 MTRR: Fixed MSR 0x26b 0x0606060606060606
1994 06:52:38.396232 MTRR: Fixed MSR 0x26c 0x0606060606060606
1995 06:52:38.402932 MTRR: Fixed MSR 0x26d 0x0606060606060606
1996 06:52:38.406600 MTRR: Fixed MSR 0x26e 0x0606060606060606
1997 06:52:38.409568 MTRR: Fixed MSR 0x26f 0x0606060606060606
1998 06:52:38.413552 call enable_fixed_mtrr()
1999 06:52:38.417092 CPU physical address size: 39 bits
2000 06:52:38.423738 MTRR: default type WB/UC MTRR counts: 6/7.
2001 06:52:38.426830 MTRR: WB selected as default type.
2002 06:52:38.433406 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2003 06:52:38.436676 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2004 06:52:38.443252 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2005 06:52:38.450072 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
2006 06:52:38.456561 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
2007 06:52:38.462921 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
2008 06:52:38.467209
2009 06:52:38.467295 MTRR check
2010 06:52:38.470347 Fixed MTRRs : Enabled
2011 06:52:38.470436 Variable MTRRs: Enabled
2012 06:52:38.470504
2013 06:52:38.476862 MTRR: Fixed MSR 0x250 0x0606060606060606
2014 06:52:38.480048 MTRR: Fixed MSR 0x258 0x0606060606060606
2015 06:52:38.483309 MTRR: Fixed MSR 0x259 0x0000000000000000
2016 06:52:38.486769 MTRR: Fixed MSR 0x268 0x0606060606060606
2017 06:52:38.493442 MTRR: Fixed MSR 0x269 0x0606060606060606
2018 06:52:38.496892 MTRR: Fixed MSR 0x26a 0x0606060606060606
2019 06:52:38.500298 MTRR: Fixed MSR 0x26b 0x0606060606060606
2020 06:52:38.503652 MTRR: Fixed MSR 0x26c 0x0606060606060606
2021 06:52:38.509882 MTRR: Fixed MSR 0x26d 0x0606060606060606
2022 06:52:38.513190 MTRR: Fixed MSR 0x26e 0x0606060606060606
2023 06:52:38.516474 MTRR: Fixed MSR 0x26f 0x0606060606060606
2024 06:52:38.524218 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
2025 06:52:38.527276 call enable_fixed_mtrr()
2026 06:52:38.531101 Checking cr50 for pending updates
2027 06:52:38.534691 MTRR: Fixed MSR 0x250 0x0606060606060606
2028 06:52:38.538090 MTRR: Fixed MSR 0x250 0x0606060606060606
2029 06:52:38.544389 MTRR: Fixed MSR 0x258 0x0606060606060606
2030 06:52:38.548097 MTRR: Fixed MSR 0x259 0x0000000000000000
2031 06:52:38.551080 MTRR: Fixed MSR 0x268 0x0606060606060606
2032 06:52:38.554383 MTRR: Fixed MSR 0x269 0x0606060606060606
2033 06:52:38.557772 MTRR: Fixed MSR 0x26a 0x0606060606060606
2034 06:52:38.564767 MTRR: Fixed MSR 0x26b 0x0606060606060606
2035 06:52:38.567671 MTRR: Fixed MSR 0x26c 0x0606060606060606
2036 06:52:38.571085 MTRR: Fixed MSR 0x26d 0x0606060606060606
2037 06:52:38.574409 MTRR: Fixed MSR 0x26e 0x0606060606060606
2038 06:52:38.580915 MTRR: Fixed MSR 0x26f 0x0606060606060606
2039 06:52:38.584223 MTRR: Fixed MSR 0x258 0x0606060606060606
2040 06:52:38.587343 call enable_fixed_mtrr()
2041 06:52:38.590988 MTRR: Fixed MSR 0x259 0x0000000000000000
2042 06:52:38.597661 MTRR: Fixed MSR 0x268 0x0606060606060606
2043 06:52:38.600870 MTRR: Fixed MSR 0x269 0x0606060606060606
2044 06:52:38.604010 MTRR: Fixed MSR 0x26a 0x0606060606060606
2045 06:52:38.607473 MTRR: Fixed MSR 0x26b 0x0606060606060606
2046 06:52:38.613819 MTRR: Fixed MSR 0x26c 0x0606060606060606
2047 06:52:38.617462 MTRR: Fixed MSR 0x26d 0x0606060606060606
2048 06:52:38.620453 MTRR: Fixed MSR 0x26e 0x0606060606060606
2049 06:52:38.623678 MTRR: Fixed MSR 0x26f 0x0606060606060606
2050 06:52:38.629219 CPU physical address size: 39 bits
2051 06:52:38.635728 call enable_fixed_mtrr()
2052 06:52:38.638951 MTRR: Fixed MSR 0x250 0x0606060606060606
2053 06:52:38.642169 MTRR: Fixed MSR 0x250 0x0606060606060606
2054 06:52:38.645172 CPU physical address size: 39 bits
2055 06:52:38.650920 Reading cr50 TPM mode
2056 06:52:38.654499 MTRR: Fixed MSR 0x250 0x0606060606060606
2057 06:52:38.657675 MTRR: Fixed MSR 0x250 0x0606060606060606
2058 06:52:38.664568 MTRR: Fixed MSR 0x258 0x0606060606060606
2059 06:52:38.668095 MTRR: Fixed MSR 0x259 0x0000000000000000
2060 06:52:38.670951 MTRR: Fixed MSR 0x268 0x0606060606060606
2061 06:52:38.674508 MTRR: Fixed MSR 0x269 0x0606060606060606
2062 06:52:38.680966 MTRR: Fixed MSR 0x26a 0x0606060606060606
2063 06:52:38.684635 MTRR: Fixed MSR 0x26b 0x0606060606060606
2064 06:52:38.687620 MTRR: Fixed MSR 0x26c 0x0606060606060606
2065 06:52:38.690928 MTRR: Fixed MSR 0x26d 0x0606060606060606
2066 06:52:38.694402 MTRR: Fixed MSR 0x26e 0x0606060606060606
2067 06:52:38.700812 MTRR: Fixed MSR 0x26f 0x0606060606060606
2068 06:52:38.704109 MTRR: Fixed MSR 0x258 0x0606060606060606
2069 06:52:38.707423
2070 06:52:38.707508 call enable_fixed_mtrr()
2071 06:52:38.710653 MTRR: Fixed MSR 0x259 0x0000000000000000
2072 06:52:38.713930
2073 06:52:38.717117 MTRR: Fixed MSR 0x268 0x0606060606060606
2074 06:52:38.720693 MTRR: Fixed MSR 0x269 0x0606060606060606
2075 06:52:38.723852 MTRR: Fixed MSR 0x26a 0x0606060606060606
2076 06:52:38.728183 MTRR: Fixed MSR 0x26b 0x0606060606060606
2077 06:52:38.733719 MTRR: Fixed MSR 0x26c 0x0606060606060606
2078 06:52:38.737326 MTRR: Fixed MSR 0x26d 0x0606060606060606
2079 06:52:38.740222 MTRR: Fixed MSR 0x26e 0x0606060606060606
2080 06:52:38.743551 MTRR: Fixed MSR 0x26f 0x0606060606060606
2081 06:52:38.750285 CPU physical address size: 39 bits
2082 06:52:38.754330 call enable_fixed_mtrr()
2083 06:52:38.757624 CPU physical address size: 39 bits
2084 06:52:38.761087 MTRR: Fixed MSR 0x258 0x0606060606060606
2085 06:52:38.767491 MTRR: Fixed MSR 0x258 0x0606060606060606
2086 06:52:38.771101 MTRR: Fixed MSR 0x259 0x0000000000000000
2087 06:52:38.774641 MTRR: Fixed MSR 0x268 0x0606060606060606
2088 06:52:38.777776 MTRR: Fixed MSR 0x269 0x0606060606060606
2089 06:52:38.784001 MTRR: Fixed MSR 0x26a 0x0606060606060606
2090 06:52:38.787809 MTRR: Fixed MSR 0x26b 0x0606060606060606
2091 06:52:38.791114 MTRR: Fixed MSR 0x26c 0x0606060606060606
2092 06:52:38.794116 MTRR: Fixed MSR 0x26d 0x0606060606060606
2093 06:52:38.801000 MTRR: Fixed MSR 0x26e 0x0606060606060606
2094 06:52:38.803758 MTRR: Fixed MSR 0x26f 0x0606060606060606
2095 06:52:38.811003 MTRR: Fixed MSR 0x259 0x0000000000000000
2096 06:52:38.813917 MTRR: Fixed MSR 0x268 0x0606060606060606
2097 06:52:38.817587 MTRR: Fixed MSR 0x269 0x0606060606060606
2098 06:52:38.821148 MTRR: Fixed MSR 0x26a 0x0606060606060606
2099 06:52:38.827063 MTRR: Fixed MSR 0x26b 0x0606060606060606
2100 06:52:38.830867 MTRR: Fixed MSR 0x26c 0x0606060606060606
2101 06:52:38.833827 MTRR: Fixed MSR 0x26d 0x0606060606060606
2102 06:52:38.837168 MTRR: Fixed MSR 0x26e 0x0606060606060606
2103 06:52:38.843463 MTRR: Fixed MSR 0x26f 0x0606060606060606
2104 06:52:38.846788 call enable_fixed_mtrr()
2105 06:52:38.850293 call enable_fixed_mtrr()
2106 06:52:38.853734 CPU physical address size: 39 bits
2107 06:52:38.860173 BS: BS_PAYLOAD_LOAD entry times (exec / console): 123 / 8 ms
2108 06:52:38.863391 CPU physical address size: 39 bits
2109 06:52:38.866708 CPU physical address size: 39 bits
2110 06:52:38.876736 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2111 06:52:38.879649 Checking segment from ROM address 0xffc02b38
2112 06:52:38.882905 Checking segment from ROM address 0xffc02b54
2113 06:52:38.889799 Loading segment from ROM address 0xffc02b38
2114 06:52:38.889884 code (compression=0)
2115 06:52:38.899831 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2116 06:52:38.909468 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2117 06:52:38.909559 it's not compressed!
2118 06:52:39.050567 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2119 06:52:39.057033 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2120 06:52:39.064688 Loading segment from ROM address 0xffc02b54
2121 06:52:39.067305 Entry Point 0x30000000
2122 06:52:39.067390 Loaded segments
2123 06:52:39.074217 BS: BS_PAYLOAD_LOAD run times (exec / console): 146 / 63 ms
2124 06:52:39.119193 Finalizing chipset.
2125 06:52:39.122445 Finalizing SMM.
2126 06:52:39.122530 APMC done.
2127 06:52:39.128966 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2128 06:52:39.132151 mp_park_aps done after 0 msecs.
2129 06:52:39.135828 Jumping to boot code at 0x30000000(0x76b25000)
2130 06:52:39.145834 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2131 06:52:39.145923
2132 06:52:39.146009
2133 06:52:39.146091
2134 06:52:39.148819 Starting depthcharge on Voema...
2135 06:52:39.148906
2136 06:52:39.149286 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2137 06:52:39.149401 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
2138 06:52:39.149498 Setting prompt string to ['volteer:']
2139 06:52:39.149593 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:43)
2140 06:52:39.158501 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2141 06:52:39.158589
2142 06:52:39.165412 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2143 06:52:39.165542
2144 06:52:39.171928 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2145 06:52:39.172016
2146 06:52:39.175493 Failed to find eMMC card reader
2147 06:52:39.175580
2148 06:52:39.175667 Wipe memory regions:
2149 06:52:39.178675
2150 06:52:39.181766 [0x00000000001000, 0x000000000a0000)
2151 06:52:39.181854
2152 06:52:39.185191 [0x00000000100000, 0x00000030000000)
2153 06:52:39.185278
2154 06:52:39.224258 [0x00000032662db0, 0x000000769ef000)
2155 06:52:39.224347
2156 06:52:39.277108 [0x00000100000000, 0x00000480400000)
2157 06:52:39.277202
2158 06:52:39.921937 ec_init: CrosEC protocol v3 supported (256, 256)
2159 06:52:39.922083
2160 06:52:40.353034 R8152: Initializing
2161 06:52:40.353189
2162 06:52:40.356201 Version 6 (ocp_data = 5c30)
2163 06:52:40.356289
2164 06:52:40.359893 R8152: Done initializing
2165 06:52:40.359982
2166 06:52:40.363026 Adding net device
2167 06:52:40.363114
2168 06:52:40.667954 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2169 06:52:40.668105
2170 06:52:40.668172
2171 06:52:40.668238
2172 06:52:40.671028 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2174 06:52:40.771815 volteer: tftpboot 192.168.201.1 8649811/tftp-deploy-l2tt9gqe/kernel/bzImage 8649811/tftp-deploy-l2tt9gqe/kernel/cmdline 8649811/tftp-deploy-l2tt9gqe/ramdisk/ramdisk.cpio.gz
2175 06:52:40.771988 Setting prompt string to 'Starting kernel'
2176 06:52:40.772183 Setting prompt string to ['Starting kernel']
2177 06:52:40.772267 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2178 06:52:40.772342 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
2179 06:52:40.776783 tftpboot 192.168.201.1 8649811/tftp-deploy-l2tt9gqe/kernel/bzImaoy-l2tt9gqe/kernel/cmdline 8649811/tftp-deploy-l2tt9gqe/ramdisk/ramdisk.cpio.gz
2180 06:52:40.776873
2181 06:52:40.776941 Waiting for link
2182 06:52:40.777001
2183 06:52:40.980412 done.
2184 06:52:40.980572
2185 06:52:40.980642 MAC: 00:24:32:30:7a:04
2186 06:52:40.980705
2187 06:52:40.983502 Sending DHCP discover... done.
2188 06:52:40.983590
2189 06:52:40.986900 Waiting for reply... done.
2190 06:52:40.986986
2191 06:52:40.990322 Sending DHCP request... done.
2192 06:52:40.990410
2193 06:52:40.993205 Waiting for reply... done.
2194 06:52:40.993291
2195 06:52:40.996678 My ip is 192.168.201.22
2196 06:52:40.996764
2197 06:52:40.999797 The DHCP server ip is 192.168.201.1
2198 06:52:40.999884
2199 06:52:41.006377 TFTP server IP predefined by user: 192.168.201.1
2200 06:52:41.006466
2201 06:52:41.013306 Bootfile predefined by user: 8649811/tftp-deploy-l2tt9gqe/kernel/bzImage
2202 06:52:41.013394
2203 06:52:41.016220 Sending tftp read request... done.
2204 06:52:41.016305
2205 06:52:41.019519 Waiting for the transfer...
2206 06:52:41.019615
2207 06:52:41.592042 00000000 ################################################################
2208 06:52:41.592193
2209 06:52:42.212458 00080000 ################################################################
2210 06:52:42.212938
2211 06:52:42.883199 00100000 ################################################################
2212 06:52:42.883413
2213 06:52:43.543050 00180000 ################################################################
2214 06:52:43.543568
2215 06:52:44.216632 00200000 ################################################################
2216 06:52:44.217264
2217 06:52:44.902964 00280000 ################################################################
2218 06:52:44.903563
2219 06:52:45.597592 00300000 ################################################################
2220 06:52:45.598114
2221 06:52:46.294186 00380000 ################################################################
2222 06:52:46.294338
2223 06:52:46.973234 00400000 ################################################################
2224 06:52:46.973839
2225 06:52:47.677764 00480000 ################################################################
2226 06:52:47.678375
2227 06:52:48.341046 00500000 ################################################################
2228 06:52:48.341627
2229 06:52:49.006039 00580000 ################################################################
2230 06:52:49.006645
2231 06:52:49.689537 00600000 ################################################################
2232 06:52:49.690243
2233 06:52:50.372165 00680000 ################################################################
2234 06:52:50.372747
2235 06:52:50.667054 00700000 ############################# done.
2236 06:52:50.667281
2237 06:52:50.669728 The bootfile was 7573392 bytes long.
2238 06:52:50.669940
2239 06:52:50.673154 Sending tftp read request... done.
2240 06:52:50.673398
2241 06:52:50.676230 Waiting for the transfer...
2242 06:52:50.676423
2243 06:52:51.356932 00000000 ################################################################
2244 06:52:51.357471
2245 06:52:52.040954 00080000 ################################################################
2246 06:52:52.041504
2247 06:52:52.724538 00100000 ################################################################
2248 06:52:52.724693
2249 06:52:53.399444 00180000 ################################################################
2250 06:52:53.399595
2251 06:52:54.091132 00200000 ################################################################
2252 06:52:54.091647
2253 06:52:54.775441 00280000 ################################################################
2254 06:52:54.775978
2255 06:52:55.465957 00300000 ################################################################
2256 06:52:55.466513
2257 06:52:56.156234 00380000 ################################################################
2258 06:52:56.156761
2259 06:52:56.844265 00400000 ################################################################
2260 06:52:56.844867
2261 06:52:57.537565 00480000 ################################################################
2262 06:52:57.538092
2263 06:52:58.214921 00500000 ################################################################
2264 06:52:58.215487
2265 06:52:58.882938 00580000 ################################################################
2266 06:52:58.883583
2267 06:52:59.559481 00600000 ################################################################
2268 06:52:59.559998
2269 06:53:00.229633 00680000 ################################################################
2270 06:53:00.230293
2271 06:53:00.907038 00700000 ################################################################
2272 06:53:00.907634
2273 06:53:01.564119 00780000 ################################################################
2274 06:53:01.564681
2275 06:53:01.790017 00800000 ##################### done.
2276 06:53:01.790526
2277 06:53:01.793246 Sending tftp read request... done.
2278 06:53:01.793716
2279 06:53:01.796946 Waiting for the transfer...
2280 06:53:01.797576
2281 06:53:01.797972 00000000 # done.
2282 06:53:01.798336
2283 06:53:01.806735 Command line loaded dynamically from TFTP file: 8649811/tftp-deploy-l2tt9gqe/kernel/cmdline
2284 06:53:01.807246
2285 06:53:01.819564 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2286 06:53:01.820201
2287 06:53:01.827521 Shutting down all USB controllers.
2288 06:53:01.828005
2289 06:53:01.828381 Removing current net device
2290 06:53:01.828783
2291 06:53:01.830284 Finalizing coreboot
2292 06:53:01.830763
2293 06:53:01.837088 Exiting depthcharge with code 4 at timestamp: 31265846
2294 06:53:01.837691
2295 06:53:01.838101
2296 06:53:01.838456 Starting kernel ...
2297 06:53:01.838791
2298 06:53:01.839119
2299 06:53:01.840418 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
2300 06:53:01.840979 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2301 06:53:01.841396 Setting prompt string to ['Linux version [0-9]']
2302 06:53:01.841828 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2303 06:53:01.842216 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2304 06:53:01.843169
2306 06:57:22.841898 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2308 06:57:22.842934 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2310 06:57:22.843708 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2313 06:57:22.845030 end: 2 depthcharge-action (duration 00:05:00) [common]
2315 06:57:22.846154 Cleaning after the job
2316 06:57:22.846571 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8649811/tftp-deploy-l2tt9gqe/ramdisk
2317 06:57:22.849719 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8649811/tftp-deploy-l2tt9gqe/kernel
2318 06:57:22.852299 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8649811/tftp-deploy-l2tt9gqe/modules
2319 06:57:22.853216 start: 5.1 power-off (timeout 00:00:30) [common]
2320 06:57:22.854073 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=off'
2321 06:57:22.911733 >> Command sent successfully.
2322 06:57:22.914260 Returned 0 in 0 seconds
2323 06:57:23.015512 end: 5.1 power-off (duration 00:00:00) [common]
2325 06:57:23.017100 start: 5.2 read-feedback (timeout 00:10:00) [common]
2326 06:57:23.018372 Listened to connection for namespace 'common' for up to 1s
2327 06:57:24.023075 Finalising connection for namespace 'common'
2328 06:57:24.023773 Disconnecting from shell: Finalise
2329 06:57:24.125223 end: 5.2 read-feedback (duration 00:00:01) [common]
2330 06:57:24.125886 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8649811
2331 06:57:24.134067 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8649811
2332 06:57:24.134197 JobError: Your job cannot terminate cleanly.