Boot log: dell-latitude-5400-4305U-sarien
- Errors: 2
- Boot result: FAIL
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
1 06:52:20.281621 lava-dispatcher, installed at version: 2022.11
2 06:52:20.281887 start: 0 validate
3 06:52:20.282071 Start time: 2023-01-10 06:52:20.282066+00:00 (UTC)
4 06:52:20.282278 Using caching service: 'http://localhost/cache/?uri=%s'
5 06:52:20.282411 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230109.0%2Fx86%2Frootfs.cpio.gz exists
6 06:52:20.284643 Using caching service: 'http://localhost/cache/?uri=%s'
7 06:52:20.284841 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-799-g1229c813bcd9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 06:52:22.786985 Using caching service: 'http://localhost/cache/?uri=%s'
9 06:52:22.787156 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-799-g1229c813bcd9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 06:52:22.789591 validate duration: 2.51
12 06:52:22.789862 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 06:52:22.789970 start: 1.1 download-retry (timeout 00:10:00) [common]
14 06:52:22.790068 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 06:52:22.790180 Not decompressing ramdisk as can be used compressed.
16 06:52:22.790267 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230109.0/x86/rootfs.cpio.gz
17 06:52:22.790363 saving as /var/lib/lava/dispatcher/tmp/8649874/tftp-deploy-_mojqj89/ramdisk/rootfs.cpio.gz
18 06:52:22.790427 total size: 8423805 (8MB)
19 06:52:22.791497 progress 0% (0MB)
20 06:52:22.793758 progress 5% (0MB)
21 06:52:22.796144 progress 10% (0MB)
22 06:52:22.798468 progress 15% (1MB)
23 06:52:22.800822 progress 20% (1MB)
24 06:52:22.803087 progress 25% (2MB)
25 06:52:22.805412 progress 30% (2MB)
26 06:52:22.807631 progress 35% (2MB)
27 06:52:22.809935 progress 40% (3MB)
28 06:52:22.812191 progress 45% (3MB)
29 06:52:22.814392 progress 50% (4MB)
30 06:52:22.816476 progress 55% (4MB)
31 06:52:22.818578 progress 60% (4MB)
32 06:52:22.820680 progress 65% (5MB)
33 06:52:22.822672 progress 70% (5MB)
34 06:52:22.824758 progress 75% (6MB)
35 06:52:22.826854 progress 80% (6MB)
36 06:52:22.828933 progress 85% (6MB)
37 06:52:22.831027 progress 90% (7MB)
38 06:52:22.833124 progress 95% (7MB)
39 06:52:22.835240 progress 100% (8MB)
40 06:52:22.835429 8MB downloaded in 0.04s (178.54MB/s)
41 06:52:22.835589 end: 1.1.1 http-download (duration 00:00:00) [common]
43 06:52:22.835837 end: 1.1 download-retry (duration 00:00:00) [common]
44 06:52:22.835930 start: 1.2 download-retry (timeout 00:10:00) [common]
45 06:52:22.836019 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 06:52:22.836131 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-799-g1229c813bcd9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 06:52:22.836201 saving as /var/lib/lava/dispatcher/tmp/8649874/tftp-deploy-_mojqj89/kernel/bzImage
48 06:52:22.836263 total size: 7573392 (7MB)
49 06:52:22.836325 No compression specified
50 06:52:22.837391 progress 0% (0MB)
51 06:52:22.839323 progress 5% (0MB)
52 06:52:22.841348 progress 10% (0MB)
53 06:52:22.843166 progress 15% (1MB)
54 06:52:22.845132 progress 20% (1MB)
55 06:52:22.846969 progress 25% (1MB)
56 06:52:22.849055 progress 30% (2MB)
57 06:52:22.851011 progress 35% (2MB)
58 06:52:22.853092 progress 40% (2MB)
59 06:52:22.855158 progress 45% (3MB)
60 06:52:22.857062 progress 50% (3MB)
61 06:52:22.859135 progress 55% (4MB)
62 06:52:22.861092 progress 60% (4MB)
63 06:52:22.863193 progress 65% (4MB)
64 06:52:22.865081 progress 70% (5MB)
65 06:52:22.867149 progress 75% (5MB)
66 06:52:22.869027 progress 80% (5MB)
67 06:52:22.870982 progress 85% (6MB)
68 06:52:22.872970 progress 90% (6MB)
69 06:52:22.875197 progress 95% (6MB)
70 06:52:22.877325 progress 100% (7MB)
71 06:52:22.877572 7MB downloaded in 0.04s (174.87MB/s)
72 06:52:22.877746 end: 1.2.1 http-download (duration 00:00:00) [common]
74 06:52:22.878011 end: 1.2 download-retry (duration 00:00:00) [common]
75 06:52:22.878103 start: 1.3 download-retry (timeout 00:10:00) [common]
76 06:52:22.878192 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 06:52:22.878299 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-799-g1229c813bcd9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 06:52:22.878383 saving as /var/lib/lava/dispatcher/tmp/8649874/tftp-deploy-_mojqj89/modules/modules.tar
79 06:52:22.878448 total size: 51848 (0MB)
80 06:52:22.878512 Using unxz to decompress xz
81 06:52:22.881861 progress 63% (0MB)
82 06:52:22.882243 progress 100% (0MB)
83 06:52:22.885573 0MB downloaded in 0.01s (6.95MB/s)
84 06:52:22.885820 end: 1.3.1 http-download (duration 00:00:00) [common]
86 06:52:22.886095 end: 1.3 download-retry (duration 00:00:00) [common]
87 06:52:22.886198 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
88 06:52:22.886303 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
89 06:52:22.886394 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 06:52:22.886486 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
91 06:52:22.886702 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8649874/lava-overlay-cufjeiuz
92 06:52:22.886855 makedir: /var/lib/lava/dispatcher/tmp/8649874/lava-overlay-cufjeiuz/lava-8649874/bin
93 06:52:22.886978 makedir: /var/lib/lava/dispatcher/tmp/8649874/lava-overlay-cufjeiuz/lava-8649874/tests
94 06:52:22.887066 makedir: /var/lib/lava/dispatcher/tmp/8649874/lava-overlay-cufjeiuz/lava-8649874/results
95 06:52:22.887177 Creating /var/lib/lava/dispatcher/tmp/8649874/lava-overlay-cufjeiuz/lava-8649874/bin/lava-add-keys
96 06:52:22.887319 Creating /var/lib/lava/dispatcher/tmp/8649874/lava-overlay-cufjeiuz/lava-8649874/bin/lava-add-sources
97 06:52:22.887437 Creating /var/lib/lava/dispatcher/tmp/8649874/lava-overlay-cufjeiuz/lava-8649874/bin/lava-background-process-start
98 06:52:22.887592 Creating /var/lib/lava/dispatcher/tmp/8649874/lava-overlay-cufjeiuz/lava-8649874/bin/lava-background-process-stop
99 06:52:22.887714 Creating /var/lib/lava/dispatcher/tmp/8649874/lava-overlay-cufjeiuz/lava-8649874/bin/lava-common-functions
100 06:52:22.887830 Creating /var/lib/lava/dispatcher/tmp/8649874/lava-overlay-cufjeiuz/lava-8649874/bin/lava-echo-ipv4
101 06:52:22.887946 Creating /var/lib/lava/dispatcher/tmp/8649874/lava-overlay-cufjeiuz/lava-8649874/bin/lava-install-packages
102 06:52:22.888060 Creating /var/lib/lava/dispatcher/tmp/8649874/lava-overlay-cufjeiuz/lava-8649874/bin/lava-installed-packages
103 06:52:22.888175 Creating /var/lib/lava/dispatcher/tmp/8649874/lava-overlay-cufjeiuz/lava-8649874/bin/lava-os-build
104 06:52:22.888288 Creating /var/lib/lava/dispatcher/tmp/8649874/lava-overlay-cufjeiuz/lava-8649874/bin/lava-probe-channel
105 06:52:22.888402 Creating /var/lib/lava/dispatcher/tmp/8649874/lava-overlay-cufjeiuz/lava-8649874/bin/lava-probe-ip
106 06:52:22.888526 Creating /var/lib/lava/dispatcher/tmp/8649874/lava-overlay-cufjeiuz/lava-8649874/bin/lava-target-ip
107 06:52:22.888644 Creating /var/lib/lava/dispatcher/tmp/8649874/lava-overlay-cufjeiuz/lava-8649874/bin/lava-target-mac
108 06:52:22.888756 Creating /var/lib/lava/dispatcher/tmp/8649874/lava-overlay-cufjeiuz/lava-8649874/bin/lava-target-storage
109 06:52:22.888871 Creating /var/lib/lava/dispatcher/tmp/8649874/lava-overlay-cufjeiuz/lava-8649874/bin/lava-test-case
110 06:52:22.888984 Creating /var/lib/lava/dispatcher/tmp/8649874/lava-overlay-cufjeiuz/lava-8649874/bin/lava-test-event
111 06:52:22.889095 Creating /var/lib/lava/dispatcher/tmp/8649874/lava-overlay-cufjeiuz/lava-8649874/bin/lava-test-feedback
112 06:52:22.889205 Creating /var/lib/lava/dispatcher/tmp/8649874/lava-overlay-cufjeiuz/lava-8649874/bin/lava-test-raise
113 06:52:22.889324 Creating /var/lib/lava/dispatcher/tmp/8649874/lava-overlay-cufjeiuz/lava-8649874/bin/lava-test-reference
114 06:52:22.889443 Creating /var/lib/lava/dispatcher/tmp/8649874/lava-overlay-cufjeiuz/lava-8649874/bin/lava-test-runner
115 06:52:22.889554 Creating /var/lib/lava/dispatcher/tmp/8649874/lava-overlay-cufjeiuz/lava-8649874/bin/lava-test-set
116 06:52:22.889665 Creating /var/lib/lava/dispatcher/tmp/8649874/lava-overlay-cufjeiuz/lava-8649874/bin/lava-test-shell
117 06:52:22.889780 Updating /var/lib/lava/dispatcher/tmp/8649874/lava-overlay-cufjeiuz/lava-8649874/bin/lava-install-packages (oe)
118 06:52:22.889896 Updating /var/lib/lava/dispatcher/tmp/8649874/lava-overlay-cufjeiuz/lava-8649874/bin/lava-installed-packages (oe)
119 06:52:22.889997 Creating /var/lib/lava/dispatcher/tmp/8649874/lava-overlay-cufjeiuz/lava-8649874/environment
120 06:52:22.890090 LAVA metadata
121 06:52:22.890162 - LAVA_JOB_ID=8649874
122 06:52:22.890228 - LAVA_DISPATCHER_IP=192.168.201.1
123 06:52:22.890339 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
124 06:52:22.890405 skipped lava-vland-overlay
125 06:52:22.890486 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 06:52:22.890614 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
127 06:52:22.890693 skipped lava-multinode-overlay
128 06:52:22.890777 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 06:52:22.890864 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
130 06:52:22.890947 Loading test definitions
131 06:52:22.891047 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
132 06:52:22.891125 Using /lava-8649874 at stage 0
133 06:52:22.891402 uuid=8649874_1.4.2.3.1 testdef=None
134 06:52:22.891497 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 06:52:22.891591 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
136 06:52:22.892095 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 06:52:22.892333 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
139 06:52:22.892919 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 06:52:22.893166 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
142 06:52:22.893725 runner path: /var/lib/lava/dispatcher/tmp/8649874/lava-overlay-cufjeiuz/lava-8649874/0/tests/0_dmesg test_uuid 8649874_1.4.2.3.1
143 06:52:22.893886 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 06:52:22.894126 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
146 06:52:22.894202 Using /lava-8649874 at stage 1
147 06:52:22.894453 uuid=8649874_1.4.2.3.5 testdef=None
148 06:52:22.894561 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 06:52:22.894654 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
150 06:52:22.895112 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 06:52:22.895345 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
153 06:52:22.895928 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 06:52:22.896170 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
156 06:52:22.896782 runner path: /var/lib/lava/dispatcher/tmp/8649874/lava-overlay-cufjeiuz/lava-8649874/1/tests/1_bootrr test_uuid 8649874_1.4.2.3.5
157 06:52:22.896931 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 06:52:22.897150 Creating lava-test-runner.conf files
160 06:52:22.897216 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8649874/lava-overlay-cufjeiuz/lava-8649874/0 for stage 0
161 06:52:22.897301 - 0_dmesg
162 06:52:22.897384 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8649874/lava-overlay-cufjeiuz/lava-8649874/1 for stage 1
163 06:52:22.897472 - 1_bootrr
164 06:52:22.897566 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 06:52:22.897661 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
166 06:52:22.903882 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 06:52:22.904018 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
168 06:52:22.904112 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 06:52:22.904204 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 06:52:22.904293 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
171 06:52:23.093441 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 06:52:23.093884 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
173 06:52:23.094045 extracting modules file /var/lib/lava/dispatcher/tmp/8649874/tftp-deploy-_mojqj89/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8649874/extract-overlay-ramdisk-u24yyd8o/ramdisk
174 06:52:23.100081 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 06:52:23.100242 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
176 06:52:23.100367 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8649874/compress-overlay-_6c17_t3/overlay-1.4.2.4.tar.gz to ramdisk
177 06:52:23.100479 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8649874/compress-overlay-_6c17_t3/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8649874/extract-overlay-ramdisk-u24yyd8o/ramdisk
178 06:52:23.106150 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 06:52:23.106301 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
180 06:52:23.106429 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 06:52:23.106563 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
182 06:52:23.106683 Building ramdisk /var/lib/lava/dispatcher/tmp/8649874/extract-overlay-ramdisk-u24yyd8o/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8649874/extract-overlay-ramdisk-u24yyd8o/ramdisk
183 06:52:23.172187 >> 48119 blocks
184 06:52:23.966029 rename /var/lib/lava/dispatcher/tmp/8649874/extract-overlay-ramdisk-u24yyd8o/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8649874/tftp-deploy-_mojqj89/ramdisk/ramdisk.cpio.gz
185 06:52:23.966544 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 06:52:23.966716 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
187 06:52:23.966857 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
188 06:52:23.966988 No mkimage arch provided, not using FIT.
189 06:52:23.967120 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 06:52:23.967253 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 06:52:23.967399 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 06:52:23.967539 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
193 06:52:23.967653 No LXC device requested
194 06:52:23.967779 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 06:52:23.967914 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
196 06:52:23.968041 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 06:52:23.968154 Checking files for TFTP limit of 4294967296 bytes.
198 06:52:23.968686 end: 1 tftp-deploy (duration 00:00:01) [common]
199 06:52:23.968830 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 06:52:23.968970 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 06:52:23.969150 substitutions:
202 06:52:23.969256 - {DTB}: None
203 06:52:23.969360 - {INITRD}: 8649874/tftp-deploy-_mojqj89/ramdisk/ramdisk.cpio.gz
204 06:52:23.969469 - {KERNEL}: 8649874/tftp-deploy-_mojqj89/kernel/bzImage
205 06:52:23.969568 - {LAVA_MAC}: None
206 06:52:23.969667 - {PRESEED_CONFIG}: None
207 06:52:23.969765 - {PRESEED_LOCAL}: None
208 06:52:23.969860 - {RAMDISK}: 8649874/tftp-deploy-_mojqj89/ramdisk/ramdisk.cpio.gz
209 06:52:23.969957 - {ROOT_PART}: None
210 06:52:23.970053 - {ROOT}: None
211 06:52:23.970150 - {SERVER_IP}: 192.168.201.1
212 06:52:23.970246 - {TEE}: None
213 06:52:23.970342 Parsed boot commands:
214 06:52:23.970435 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 06:52:23.970656 Parsed boot commands: tftpboot 192.168.201.1 8649874/tftp-deploy-_mojqj89/kernel/bzImage 8649874/tftp-deploy-_mojqj89/kernel/cmdline 8649874/tftp-deploy-_mojqj89/ramdisk/ramdisk.cpio.gz
216 06:52:23.970796 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 06:52:23.970932 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 06:52:23.971079 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 06:52:23.971219 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 06:52:23.971328 Not connected, no need to disconnect.
221 06:52:23.971451 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 06:52:23.971582 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 06:52:23.971689 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost dell-latitude-5400-4305U-sarien-cbg-0'
224 06:52:23.974804 Setting prompt string to ['lava-test: # ']
225 06:52:23.975171 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 06:52:23.975320 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 06:52:23.975463 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 06:52:23.975595 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 06:52:23.975884 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-4305U-sarien-cbg-0' '--port=1' '--command=reboot'
230 06:52:23.995905 >> Command sent successfully.
231 06:52:23.997880 Returned 0 in 0 seconds
232 06:52:24.098697 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 06:52:24.099145 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 06:52:24.099292 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 06:52:24.099419 Setting prompt string to 'Starting depthcharge on sarien...'
237 06:52:24.099522 Changing prompt to 'Starting depthcharge on sarien...'
238 06:52:24.099632 depthcharge-start: Wait for prompt Starting depthcharge on sarien... (timeout 00:05:00)
239 06:52:24.100011 [Enter `^Ec?' for help]
240 06:52:37.919943
241 06:52:37.920566
242 06:52:37.920694
243 06:52:37.920989
244 06:52:37.929137 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
245 06:52:37.929833
246 06:52:37.933234 CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz
247 06:52:37.933735
248 06:52:37.938370 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
249 06:52:37.943050 CPU: AES supported, TXT NOT supported, VT supported
250 06:52:37.943518
251 06:52:37.948802 MCH: device id 3e35 (rev 0c) is Whiskeylake W (2+2)
252 06:52:37.949551
253 06:52:37.954122 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
254 06:52:37.957333 IGD: device id 3ea1 (rev 02) is Unknown
255 06:52:37.958071
256 06:52:37.961892 VBOOT: Loading verstage.
257 06:52:37.964593 CBFS @ 1d00000 size 300000
258 06:52:37.970491 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
259 06:52:37.971153
260 06:52:37.974060 CBFS: Locating 'fallback/verstage'
261 06:52:37.978406 CBFS: Found @ offset 10f6c0 size 1435c
262 06:52:37.992276
263 06:52:37.992974
264 06:52:37.993093
265 06:52:38.000382 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
266 06:52:38.000820
267 06:52:38.007390 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
268 06:52:38.011144 done! DID_VID 0x00281ae0
269 06:52:38.012547 TPM ready after 0 ms
270 06:52:38.016513 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
271 06:52:38.106678 tlcl_send_startup: Startup return code is 0
272 06:52:38.108704 TPM: setup succeeded
273 06:52:38.126537 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
274 06:52:38.129949 Checking cr50 for recovery request
275 06:52:38.130516
276 06:52:38.139719 Phase 1
277 06:52:38.144915 FMAP: Found "FLASH" version 1.1 at 1c10000.
278 06:52:38.149205 FMAP: base = fe000000 size = 2000000 #areas = 37
279 06:52:38.149852
280 06:52:38.153914 FMAP: area GBB found @ 1c11000 (978944 bytes)
281 06:52:38.154572
282 06:52:38.161825 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
283 06:52:38.162522 Phase 2
284 06:52:38.163180 Phase 3
285 06:52:38.168465 FMAP: area GBB found @ 1c11000 (978944 bytes)
286 06:52:38.174616 VB2:vb2_report_dev_firmware() This is developer signed firmware
287 06:52:38.175107
288 06:52:38.180368 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
289 06:52:38.184825 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
290 06:52:38.191370 VB2:vb2_verify_keyblock() Checking key block signature...
291 06:52:38.204395 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
292 06:52:38.208930 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
293 06:52:38.214621 VB2:vb2_verify_fw_preamble() Verifying preamble.
294 06:52:38.217748 Phase 4
295 06:52:38.222277 FMAP: area FW_MAIN_A found @ 16e0000 (2555840 bytes)
296 06:52:38.229244 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
297 06:52:38.397294 VB2:vb2_rsa_verify_digest() Digest check failed!
298 06:52:38.402546 VB2:vb2_fail() Need recovery, reason: 0x1b / 0x7
299 06:52:38.404391 Saving nvdata
300 06:52:38.407274 Reboot requested (10020007)
301 06:52:38.407586
302 06:52:38.409603 board_reset() called!
303 06:52:38.412239 full_reset() called!
304 06:52:42.984335
305 06:52:42.984700
306 06:52:42.984783
307 06:52:42.993080 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
308 06:52:42.993354
309 06:52:42.997493 CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz
310 06:52:43.001734 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
311 06:52:43.002015
312 06:52:43.006933 CPU: AES supported, TXT NOT supported, VT supported
313 06:52:43.007302
314 06:52:43.011973 MCH: device id 3e35 (rev 0c) is Whiskeylake W (2+2)
315 06:52:43.017250 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
316 06:52:43.017523
317 06:52:43.022047 IGD: device id 3ea1 (rev 02) is Unknown
318 06:52:43.024937 VBOOT: Loading verstage.
319 06:52:43.027911 CBFS @ 1d00000 size 300000
320 06:52:43.028176
321 06:52:43.033812 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
322 06:52:43.034364
323 06:52:43.037622 CBFS: Locating 'fallback/verstage'
324 06:52:43.041535 CBFS: Found @ offset 10f6c0 size 1435c
325 06:52:43.055883
326 06:52:43.055969
327 06:52:43.064295 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
328 06:52:43.064551
329 06:52:43.071579 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
330 06:52:43.206099 .done! DID_VID 0x00281ae0
331 06:52:43.206405
332 06:52:43.208508 TPM ready after 0 ms
333 06:52:43.212302 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
334 06:52:43.300933 tlcl_send_startup: Startup return code is 0
335 06:52:43.303503 TPM: setup succeeded
336 06:52:43.321349 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
337 06:52:43.321961
338 06:52:43.324770 Checking cr50 for recovery request
339 06:52:43.334250 Phase 1
340 06:52:43.339424 FMAP: Found "FLASH" version 1.1 at 1c10000.
341 06:52:43.344334 FMAP: base = fe000000 size = 2000000 #areas = 37
342 06:52:43.348768 FMAP: area GBB found @ 1c11000 (978944 bytes)
343 06:52:43.356233 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
344 06:52:43.362157 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
345 06:52:43.366019 Recovery requested (1009000e)
346 06:52:43.366942 Saving nvdata
347 06:52:43.383014 tlcl_extend: response is 0
348 06:52:43.398725 tlcl_extend: response is 0
349 06:52:43.398993
350 06:52:43.403271 CBFS @ 1d00000 size 300000
351 06:52:43.409101 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
352 06:52:43.411952 CBFS: Locating 'fallback/romstage'
353 06:52:43.415992 CBFS: Found @ offset 80 size 15b2c
354 06:52:43.416628
355 06:52:43.417200
356 06:52:43.418005
357 06:52:43.426130 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 romstage starting (log level: 8)...
358 06:52:43.430993 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
359 06:52:43.434936 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
360 06:52:43.439591 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
361 06:52:43.443507 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
362 06:52:43.443772
363 06:52:43.447431 gpe0_sts[3]: 00004000 gpe0_en[3]: 00000000
364 06:52:43.449555 TCO_STS: 0000 0004
365 06:52:43.449818
366 06:52:43.452562 GEN_PMCON: d0015209 00002200
367 06:52:43.455989 GBLRST_CAUSE: 00000000 00000000
368 06:52:43.457859 prev_sleep_state 5
369 06:52:43.461731 Boot Count incremented to 24576
370 06:52:43.464842 CBFS @ 1d00000 size 300000
371 06:52:43.471401 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
372 06:52:43.473462 CBFS: Locating 'fspm.bin'
373 06:52:43.477519 CBFS: Found @ offset 60fc0 size 70000
374 06:52:43.483238 FMAP: Found "FLASH" version 1.1 at 1c10000.
375 06:52:43.487866 FMAP: base = fe000000 size = 2000000 #areas = 37
376 06:52:43.493646 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
377 06:52:43.500047 Probing TPM I2C: done! DID_VID 0x00281ae0
378 06:52:43.502006 Locality already claimed
379 06:52:43.505856 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
380 06:52:43.524916 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
381 06:52:43.532106 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
382 06:52:43.535351 MRC cache found, size 18e0
383 06:52:43.537178 bootmode is set to :2
384 06:52:43.626703 CBMEM:
385 06:52:43.629873 IMD: root @ 89fff000 254 entries.
386 06:52:43.630358
387 06:52:43.633627 IMD: root @ 89ffec00 62 entries.
388 06:52:43.636970 External stage cache:
389 06:52:43.639780 IMD: root @ 8abff000 254 entries.
390 06:52:43.643026 IMD: root @ 8abfec00 62 entries.
391 06:52:43.648845 VBOOT: copying vboot_working_data (12288 bytes) to CBMEM...
392 06:52:43.652644 creating vboot_handoff structure
393 06:52:43.673601 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
394 06:52:43.673971
395 06:52:43.688715 tlcl_write: response is 0
396 06:52:43.708073 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
397 06:52:43.711828 MRC: TPM MRC hash updated successfully.
398 06:52:43.713172 1 DIMMs found
399 06:52:43.713533
400 06:52:43.716176 top_of_ram = 0x8a000000
401 06:52:43.721893 MTRR Range: Start=89000000 End=8a000000 (Size 1000000)
402 06:52:43.726017 MTRR Range: Start=ff000000 End=0 (Size 1000000)
403 06:52:43.729035 CBFS @ 1d00000 size 300000
404 06:52:43.735093 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
405 06:52:43.738820 CBFS: Locating 'fallback/postcar'
406 06:52:43.742380 CBFS: Found @ offset 107000 size 41a4
407 06:52:43.748775 Decompressing stage fallback/postcar @ 0x89cdcfc0 (33360 bytes)
408 06:52:43.749124
409 06:52:43.759530 Loading module at 89cdd000 with entry 89cdd000. filesize: 0x3f50 memsize: 0x8210
410 06:52:43.764116 Processing 126 relocs. Offset value of 0x87cdd000
411 06:52:43.765955
412 06:52:43.766528
413 06:52:43.766632
414 06:52:43.774714 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 postcar starting (log level: 8)...
415 06:52:43.777404 CBFS @ 1d00000 size 300000
416 06:52:43.783815 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
417 06:52:43.787270 CBFS: Locating 'fallback/ramstage'
418 06:52:43.791032 CBFS: Found @ offset 458c0 size 1a8a8
419 06:52:43.797515 Decompressing stage fallback/ramstage @ 0x89c80fc0 (372256 bytes)
420 06:52:43.824614 Loading module at 89c81000 with entry 89c81000. filesize: 0x400e0 memsize: 0x5ade0
421 06:52:43.829782 Processing 3754 relocs. Offset value of 0x88e81000
422 06:52:43.830104
423 06:52:43.835551
424 06:52:43.836035
425 06:52:43.836145
426 06:52:43.844510 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 ramstage starting (log level: 8)...
427 06:52:43.849095 FMAP: Found "FLASH" version 1.1 at 1c10000.
428 06:52:43.853570 FMAP: base = fe000000 size = 2000000 #areas = 37
429 06:52:43.858640 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
430 06:52:43.863645 WARNING: RO_VPD is uninitialized or empty.
431 06:52:43.867574 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
432 06:52:43.872560 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
433 06:52:43.873408 Normal boot.
434 06:52:43.880440 BS: BS_PRE_DEVICE times (us): entry 0 run 57 exit 1163
435 06:52:43.881174
436 06:52:43.882667 CBFS @ 1d00000 size 300000
437 06:52:43.883150
438 06:52:43.889404 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
439 06:52:43.893378 CBFS: Locating 'cpu_microcode_blob.bin'
440 06:52:43.897186 CBFS: Found @ offset 15c40 size 2fc00
441 06:52:43.901893 microcode: sig=0x806ec pf=0x80 revision=0xb7
442 06:52:43.903966 Skip microcode update
443 06:52:43.907005 CBFS @ 1d00000 size 300000
444 06:52:43.912712 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
445 06:52:43.913013
446 06:52:43.916156 CBFS: Locating 'fsps.bin'
447 06:52:43.919514 CBFS: Found @ offset d1fc0 size 35000
448 06:52:43.953473 Detected 2 core, 2 thread CPU.
449 06:52:43.955767 Setting up SMI for CPU
450 06:52:43.956547
451 06:52:43.958544 IED base = 0x8ac00000
452 06:52:43.961110 IED size = 0x00400000
453 06:52:43.963295 Will perform SMM setup.
454 06:52:43.963738
455 06:52:43.968163 CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz.
456 06:52:43.968461
457 06:52:43.975973 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
458 06:52:43.976272
459 06:52:43.980844 Processing 16 relocs. Offset value of 0x00030000
460 06:52:43.983398 Attempting to start 1 APs
461 06:52:43.987853 Waiting for 10ms after sending INIT.
462 06:52:44.001578 Waiting for 1st SIPI to complete...done.
463 06:52:44.003135 AP: slot 1 apic_id 2.
464 06:52:44.007108 Waiting for 2nd SIPI to complete...done.
465 06:52:44.007604
466 06:52:44.015897 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
467 06:52:44.020559 Processing 13 relocs. Offset value of 0x00038000
468 06:52:44.026506 SMM Module: stub loaded at 00038000. Will call 89c9b6bd(00000000)
469 06:52:44.030783 Installing SMM handler to 0x8a000000
470 06:52:44.038441 Loading module at 8a010000 with entry 8a010a27. filesize: 0xa988 memsize: 0xfa40
471 06:52:44.039113
472 06:52:44.044181 Processing 867 relocs. Offset value of 0x8a010000
473 06:52:44.052790 Loading module at 8a008000 with entry 8a008000. filesize: 0x1a8 memsize: 0x1a8
474 06:52:44.057290 Processing 13 relocs. Offset value of 0x8a008000
475 06:52:44.062880 SMM Module: placing jmp sequence at 8a007c00 rel16 0x03fd
476 06:52:44.069183 SMM Module: stub loaded at 8a008000. Will call 8a010a27(00000000)
477 06:52:44.069997
478 06:52:44.072444 Clearing SMI status registers
479 06:52:44.072737
480 06:52:44.073823 SMI_STS: PM1
481 06:52:44.074113
482 06:52:44.076449 PM1_STS: WAK PWRBTN
483 06:52:44.079112 TCO_STS: BOOT SECOND_TO
484 06:52:44.080608 GPE0 STD STS: eSPI
485 06:52:44.082556 New SMBASE 0x8a000000
486 06:52:44.085624 In relocation handler: CPU 0
487 06:52:44.085900
488 06:52:44.090460 New SMBASE=0x8a000000 IEDBASE=0x8ac00000
489 06:52:44.094443 Writing SMRR. base = 0x8a000006, mask=0xff000800
490 06:52:44.096626 Relocation complete.
491 06:52:44.099077 New SMBASE 0x89fffc00
492 06:52:44.099349
493 06:52:44.101823 In relocation handler: CPU 1
494 06:52:44.106226 New SMBASE=0x89fffc00 IEDBASE=0x8ac00000
495 06:52:44.111251 Writing SMRR. base = 0x8a000006, mask=0xff000800
496 06:52:44.112609 Relocation complete.
497 06:52:44.113193
498 06:52:44.115796 Initializing CPU #0
499 06:52:44.118422 CPU: vendor Intel device 806ec
500 06:52:44.122150 CPU: family 06, model 8e, stepping 0c
501 06:52:44.124909 Clearing out pending MCEs
502 06:52:44.125571
503 06:52:44.128900 Setting up local APIC... apic_id: 0x00 done.
504 06:52:44.129611
505 06:52:44.132097 Turbo is available but hidden
506 06:52:44.134873 Turbo has been enabled
507 06:52:44.137012 VMX status: enabled
508 06:52:44.140202 IA32_FEATURE_CONTROL status: locked
509 06:52:44.143099 Skip microcode update
510 06:52:44.145056 CPU #0 initialized
511 06:52:44.147038 Initializing CPU #1
512 06:52:44.149952 CPU: vendor Intel device 806ec
513 06:52:44.154246 CPU: family 06, model 8e, stepping 0c
514 06:52:44.156298 Clearing out pending MCEs
515 06:52:44.161196 Setting up local APIC... apic_id: 0x02 done.
516 06:52:44.163335 VMX status: enabled
517 06:52:44.166915 IA32_FEATURE_CONTROL status: locked
518 06:52:44.168586 Skip microcode update
519 06:52:44.169022
520 06:52:44.171096 CPU #1 initialized
521 06:52:44.174831 bsp_do_flight_plan done after 163 msecs.
522 06:52:44.178102 CPU: frequency set to 2200 MHz
523 06:52:44.179444 Enabling SMIs.
524 06:52:44.181473 Locking SMM.
525 06:52:44.184619 CBFS @ 1d00000 size 300000
526 06:52:44.190595 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
527 06:52:44.190873
528 06:52:44.192894 CBFS: Locating 'vbt.bin'
529 06:52:44.196879 CBFS: Found @ offset 60a40 size 4a0
530 06:52:44.201540 Found a VBT of 4608 bytes after decompression
531 06:52:44.215223 FMAP: area GBB found @ 1c11000 (978944 bytes)
532 06:52:44.325696 Detected 2 core, 2 thread CPU.
533 06:52:44.329261 Detected 2 core, 2 thread CPU.
534 06:52:44.557848 Display FSP Version Info HOB
535 06:52:44.561197 Reference Code - CPU = 7.0.5e.40
536 06:52:44.561571
537 06:52:44.564649 uCode Version = 0.0.0.b8
538 06:52:44.566774 Display FSP Version Info HOB
539 06:52:44.570324 Reference Code - ME = 7.0.5e.40
540 06:52:44.570919
541 06:52:44.572414 MEBx version = 0.0.0.0
542 06:52:44.576381 ME Firmware Version = Consumer SKU
543 06:52:44.579110 Display FSP Version Info HOB
544 06:52:44.579414
545 06:52:44.582467 Reference Code - CNL PCH = 7.0.5e.40
546 06:52:44.585938 PCH-CRID Status = Disabled
547 06:52:44.588837 CNL PCH H A0 Hsio Version = 2.0.0.0
548 06:52:44.593245 CNL PCH H Ax Hsio Version = 9.0.0.0
549 06:52:44.596026 CNL PCH H Bx Hsio Version = a.0.0.0
550 06:52:44.599947 CNL PCH LP B0 Hsio Version = 7.0.0.0
551 06:52:44.600646
552 06:52:44.603486 CNL PCH LP Bx Hsio Version = 6.0.0.0
553 06:52:44.606986 CNL PCH LP Dx Hsio Version = 7.0.0.0
554 06:52:44.610553 Display FSP Version Info HOB
555 06:52:44.615012 Reference Code - SA - System Agent = 7.0.5e.40
556 06:52:44.617828 Reference Code - MRC = 0.7.1.68
557 06:52:44.621194 SA - PCIe Version = 7.0.5e.40
558 06:52:44.624314 SA-CRID Status = Disabled
559 06:52:44.627121 SA-CRID Original Value = 0.0.0.c
560 06:52:44.629713 SA-CRID New Value = 0.0.0.c
561 06:52:44.647940 RTC Init
562 06:52:44.648250
563 06:52:44.652515 Set power off after power failure.
564 06:52:44.654011 Disabling Deep S3
565 06:52:44.656419 Disabling Deep S3
566 06:52:44.658347 Disabling Deep S4
567 06:52:44.659686 Disabling Deep S4
568 06:52:44.659988
569 06:52:44.661734 Disabling Deep S5
570 06:52:44.662035
571 06:52:44.663610 Disabling Deep S5
572 06:52:44.670675 BS: BS_DEV_INIT_CHIPS times (us): entry 300923 run 465850 exit 16243
573 06:52:44.673119 Enumerating buses...
574 06:52:44.676619 Show all devs... Before device enumeration.
575 06:52:44.679550 Root Device: enabled 1
576 06:52:44.681649 CPU_CLUSTER: 0: enabled 1
577 06:52:44.683955 DOMAIN: 0000: enabled 1
578 06:52:44.686381 APIC: 00: enabled 1
579 06:52:44.688438 PCI: 00:00.0: enabled 1
580 06:52:44.691416 PCI: 00:02.0: enabled 1
581 06:52:44.694071 PCI: 00:04.0: enabled 1
582 06:52:44.696087 PCI: 00:12.0: enabled 1
583 06:52:44.698871 PCI: 00:12.5: enabled 0
584 06:52:44.700896 PCI: 00:12.6: enabled 0
585 06:52:44.701169
586 06:52:44.703426 PCI: 00:13.0: enabled 0
587 06:52:44.704102
588 06:52:44.705394 PCI: 00:14.0: enabled 1
589 06:52:44.707915 PCI: 00:14.1: enabled 0
590 06:52:44.708187
591 06:52:44.710698 PCI: 00:14.3: enabled 1
592 06:52:44.713275 PCI: 00:14.5: enabled 0
593 06:52:44.715576 PCI: 00:15.0: enabled 1
594 06:52:44.717406 PCI: 00:15.1: enabled 1
595 06:52:44.717978
596 06:52:44.720633 PCI: 00:15.2: enabled 0
597 06:52:44.723141 PCI: 00:15.3: enabled 0
598 06:52:44.725126 PCI: 00:16.0: enabled 1
599 06:52:44.727595 PCI: 00:16.1: enabled 0
600 06:52:44.730343 PCI: 00:16.2: enabled 0
601 06:52:44.731978 PCI: 00:16.3: enabled 0
602 06:52:44.732478
603 06:52:44.734682 PCI: 00:16.4: enabled 0
604 06:52:44.736974 PCI: 00:16.5: enabled 0
605 06:52:44.739530 PCI: 00:17.0: enabled 1
606 06:52:44.742727 PCI: 00:19.0: enabled 1
607 06:52:44.744649 PCI: 00:19.1: enabled 0
608 06:52:44.746902 PCI: 00:19.2: enabled 1
609 06:52:44.747493
610 06:52:44.749465 PCI: 00:1a.0: enabled 0
611 06:52:44.751547 PCI: 00:1c.0: enabled 1
612 06:52:44.754105 PCI: 00:1c.1: enabled 0
613 06:52:44.756445 PCI: 00:1c.2: enabled 0
614 06:52:44.759254 PCI: 00:1c.3: enabled 0
615 06:52:44.761059 PCI: 00:1c.4: enabled 0
616 06:52:44.761331
617 06:52:44.763636 PCI: 00:1c.5: enabled 0
618 06:52:44.766661 PCI: 00:1c.6: enabled 0
619 06:52:44.768671 PCI: 00:1c.7: enabled 1
620 06:52:44.771110 PCI: 00:1d.0: enabled 1
621 06:52:44.773712 PCI: 00:1d.1: enabled 1
622 06:52:44.775687 PCI: 00:1d.2: enabled 0
623 06:52:44.775958
624 06:52:44.778436 PCI: 00:1d.3: enabled 0
625 06:52:44.780863 PCI: 00:1d.4: enabled 1
626 06:52:44.781461
627 06:52:44.782854 PCI: 00:1e.0: enabled 0
628 06:52:44.783936
629 06:52:44.785902 PCI: 00:1e.1: enabled 0
630 06:52:44.786174
631 06:52:44.788425 PCI: 00:1e.2: enabled 0
632 06:52:44.788694
633 06:52:44.791036 PCI: 00:1e.3: enabled 0
634 06:52:44.793590 PCI: 00:1f.0: enabled 1
635 06:52:44.795569 PCI: 00:1f.1: enabled 1
636 06:52:44.798244 PCI: 00:1f.2: enabled 1
637 06:52:44.800924 PCI: 00:1f.3: enabled 1
638 06:52:44.803507 PCI: 00:1f.4: enabled 1
639 06:52:44.805524 PCI: 00:1f.5: enabled 1
640 06:52:44.807516 PCI: 00:1f.6: enabled 1
641 06:52:44.809559 USB0 port 0: enabled 1
642 06:52:44.810149
643 06:52:44.812059 I2C: 00:10: enabled 1
644 06:52:44.814673 I2C: 00:10: enabled 1
645 06:52:44.815287
646 06:52:44.816665 I2C: 00:34: enabled 1
647 06:52:44.818763 I2C: 00:2c: enabled 1
648 06:52:44.819270
649 06:52:44.821404 I2C: 00:50: enabled 1
650 06:52:44.823754 PNP: 0c09.0: enabled 1
651 06:52:44.826449 USB2 port 0: enabled 1
652 06:52:44.827929 USB2 port 1: enabled 1
653 06:52:44.830620 USB2 port 2: enabled 1
654 06:52:44.833207 USB2 port 4: enabled 1
655 06:52:44.835416 USB2 port 5: enabled 1
656 06:52:44.837562 USB2 port 6: enabled 1
657 06:52:44.839446 USB2 port 7: enabled 1
658 06:52:44.839866
659 06:52:44.842466 USB2 port 8: enabled 1
660 06:52:44.844744 USB2 port 9: enabled 1
661 06:52:44.847152 USB3 port 0: enabled 1
662 06:52:44.847832
663 06:52:44.849792 USB3 port 1: enabled 1
664 06:52:44.851116 USB3 port 2: enabled 1
665 06:52:44.851368
666 06:52:44.853715 USB3 port 3: enabled 1
667 06:52:44.856238 USB3 port 4: enabled 1
668 06:52:44.858499 APIC: 02: enabled 1
669 06:52:44.861059 Compare with tree...
670 06:52:44.863115 Root Device: enabled 1
671 06:52:44.865330 CPU_CLUSTER: 0: enabled 1
672 06:52:44.867741 APIC: 00: enabled 1
673 06:52:44.868349
674 06:52:44.869644 APIC: 02: enabled 1
675 06:52:44.869913
676 06:52:44.872488 DOMAIN: 0000: enabled 1
677 06:52:44.875471 PCI: 00:00.0: enabled 1
678 06:52:44.877943 PCI: 00:02.0: enabled 1
679 06:52:44.881264 PCI: 00:04.0: enabled 1
680 06:52:44.882799 PCI: 00:12.0: enabled 1
681 06:52:44.883145
682 06:52:44.885346 PCI: 00:12.5: enabled 0
683 06:52:44.888085 PCI: 00:12.6: enabled 0
684 06:52:44.891392 PCI: 00:13.0: enabled 0
685 06:52:44.893917 PCI: 00:14.0: enabled 1
686 06:52:44.896691 USB0 port 0: enabled 1
687 06:52:44.898839 USB2 port 0: enabled 1
688 06:52:44.901793 USB2 port 1: enabled 1
689 06:52:44.904016 USB2 port 2: enabled 1
690 06:52:44.907124 USB2 port 4: enabled 1
691 06:52:44.909877 USB2 port 5: enabled 1
692 06:52:44.912446 USB2 port 6: enabled 1
693 06:52:44.915215 USB2 port 7: enabled 1
694 06:52:44.918229 USB2 port 8: enabled 1
695 06:52:44.920241 USB2 port 9: enabled 1
696 06:52:44.923099 USB3 port 0: enabled 1
697 06:52:44.925763 USB3 port 1: enabled 1
698 06:52:44.928358 USB3 port 2: enabled 1
699 06:52:44.928738
700 06:52:44.932027 USB3 port 3: enabled 1
701 06:52:44.934257 USB3 port 4: enabled 1
702 06:52:44.936644 PCI: 00:14.1: enabled 0
703 06:52:44.939040 PCI: 00:14.3: enabled 1
704 06:52:44.939820
705 06:52:44.942120 PCI: 00:14.5: enabled 0
706 06:52:44.944780 PCI: 00:15.0: enabled 1
707 06:52:44.945085
708 06:52:44.946906 I2C: 00:10: enabled 1
709 06:52:44.947432
710 06:52:44.949914 I2C: 00:10: enabled 1
711 06:52:44.952049 I2C: 00:34: enabled 1
712 06:52:44.954400 PCI: 00:15.1: enabled 1
713 06:52:44.954952
714 06:52:44.956934 I2C: 00:2c: enabled 1
715 06:52:44.957563
716 06:52:44.960189 PCI: 00:15.2: enabled 0
717 06:52:44.963171 PCI: 00:15.3: enabled 0
718 06:52:44.965761 PCI: 00:16.0: enabled 1
719 06:52:44.968433 PCI: 00:16.1: enabled 0
720 06:52:44.970955 PCI: 00:16.2: enabled 0
721 06:52:44.971260
722 06:52:44.973416 PCI: 00:16.3: enabled 0
723 06:52:44.976471 PCI: 00:16.4: enabled 0
724 06:52:44.978979 PCI: 00:16.5: enabled 0
725 06:52:44.980912 PCI: 00:17.0: enabled 1
726 06:52:44.981216
727 06:52:44.984251 PCI: 00:19.0: enabled 1
728 06:52:44.986419 I2C: 00:50: enabled 1
729 06:52:44.989054 PCI: 00:19.1: enabled 0
730 06:52:44.991436 PCI: 00:19.2: enabled 1
731 06:52:44.994551 PCI: 00:1a.0: enabled 0
732 06:52:44.996984 PCI: 00:1c.0: enabled 1
733 06:52:44.999629 PCI: 00:1c.1: enabled 0
734 06:52:45.002837 PCI: 00:1c.2: enabled 0
735 06:52:45.005409 PCI: 00:1c.3: enabled 0
736 06:52:45.007808 PCI: 00:1c.4: enabled 0
737 06:52:45.008099
738 06:52:45.010481 PCI: 00:1c.5: enabled 0
739 06:52:45.013117 PCI: 00:1c.6: enabled 0
740 06:52:45.015734 PCI: 00:1c.7: enabled 1
741 06:52:45.016025
742 06:52:45.017873 PCI: 00:1d.0: enabled 1
743 06:52:45.020470 PCI: 00:1d.1: enabled 1
744 06:52:45.023168 PCI: 00:1d.2: enabled 0
745 06:52:45.025105 PCI: 00:1d.3: enabled 0
746 06:52:45.025535
747 06:52:45.028398 PCI: 00:1d.4: enabled 1
748 06:52:45.031068 PCI: 00:1e.0: enabled 0
749 06:52:45.033361 PCI: 00:1e.1: enabled 0
750 06:52:45.033665
751 06:52:45.036663 PCI: 00:1e.2: enabled 0
752 06:52:45.039124 PCI: 00:1e.3: enabled 0
753 06:52:45.041278 PCI: 00:1f.0: enabled 1
754 06:52:45.044225 PNP: 0c09.0: enabled 1
755 06:52:45.046494 PCI: 00:1f.1: enabled 1
756 06:52:45.049148 PCI: 00:1f.2: enabled 1
757 06:52:45.051848 PCI: 00:1f.3: enabled 1
758 06:52:45.054924 PCI: 00:1f.4: enabled 1
759 06:52:45.055393
760 06:52:45.057320 PCI: 00:1f.5: enabled 1
761 06:52:45.059861 PCI: 00:1f.6: enabled 1
762 06:52:45.060128
763 06:52:45.062412 Root Device scanning...
764 06:52:45.065855 root_dev_scan_bus for Root Device
765 06:52:45.066538
766 06:52:45.068633 CPU_CLUSTER: 0 enabled
767 06:52:45.070449 DOMAIN: 0000 enabled
768 06:52:45.071062
769 06:52:45.072828 DOMAIN: 0000 scanning...
770 06:52:45.076288 PCI: pci_scan_bus for bus 00
771 06:52:45.079633 PCI: 00:00.0 [8086/0000] ops
772 06:52:45.082226 PCI: 00:00.0 [8086/3e35] enabled
773 06:52:45.085501 PCI: 00:02.0 [8086/0000] ops
774 06:52:45.088750 PCI: 00:02.0 [8086/3ea1] enabled
775 06:52:45.091998 PCI: 00:04.0 [8086/1903] enabled
776 06:52:45.095541 PCI: 00:08.0 [8086/1911] enabled
777 06:52:45.098334 PCI: 00:12.0 [8086/9df9] enabled
778 06:52:45.098731
779 06:52:45.102347 PCI: 00:14.0 [8086/0000] bus ops
780 06:52:45.104983 PCI: 00:14.0 [8086/9ded] enabled
781 06:52:45.108366 PCI: 00:14.2 [8086/9def] enabled
782 06:52:45.109389
783 06:52:45.111806 PCI: 00:14.3 [8086/9df0] enabled
784 06:52:45.112490
785 06:52:45.115159 PCI: 00:15.0 [8086/0000] bus ops
786 06:52:45.115869
787 06:52:45.119190 PCI: 00:15.0 [8086/9de8] enabled
788 06:52:45.122033 PCI: 00:15.1 [8086/0000] bus ops
789 06:52:45.125307 PCI: 00:15.1 [8086/9de9] enabled
790 06:52:45.128445 PCI: 00:16.0 [8086/0000] ops
791 06:52:45.129178
792 06:52:45.131793 PCI: 00:16.0 [8086/9de0] enabled
793 06:52:45.134037 PCI: 00:17.0 [8086/0000] ops
794 06:52:45.134323
795 06:52:45.137800 PCI: 00:17.0 [8086/9dd3] enabled
796 06:52:45.138068
797 06:52:45.140696 PCI: 00:19.0 [8086/0000] bus ops
798 06:52:45.141613
799 06:52:45.144373 PCI: 00:19.0 [8086/9dc5] enabled
800 06:52:45.147532 PCI: 00:19.2 [8086/0000] ops
801 06:52:45.150935 PCI: 00:19.2 [8086/9dc7] enabled
802 06:52:45.154146 PCI: 00:1c.0 [8086/0000] bus ops
803 06:52:45.157019 PCI: 00:1c.0 [8086/9dbf] enabled
804 06:52:45.163210 PCI: Static device PCI: 00:1c.7 not found, disabling it.
805 06:52:45.166255 PCI: 00:1d.0 [8086/0000] bus ops
806 06:52:45.166524
807 06:52:45.170196 PCI: 00:1d.0 [8086/9db4] enabled
808 06:52:45.175485 PCI: Static device PCI: 00:1d.1 not found, disabling it.
809 06:52:45.181074 PCI: Static device PCI: 00:1d.4 not found, disabling it.
810 06:52:45.183835 PCI: 00:1f.0 [8086/0000] bus ops
811 06:52:45.184315
812 06:52:45.187037 PCI: 00:1f.0 [8086/9d84] enabled
813 06:52:45.187536
814 06:52:45.193268 PCI: Static device PCI: 00:1f.1 not found, disabling it.
815 06:52:45.193884
816 06:52:45.199042 PCI: Static device PCI: 00:1f.2 not found, disabling it.
817 06:52:45.202241 PCI: 00:1f.3 [8086/0000] bus ops
818 06:52:45.202520
819 06:52:45.205621 PCI: 00:1f.3 [8086/9dc8] enabled
820 06:52:45.209373 PCI: 00:1f.4 [8086/0000] bus ops
821 06:52:45.212584 PCI: 00:1f.4 [8086/9da3] enabled
822 06:52:45.215940 PCI: 00:1f.5 [8086/0000] bus ops
823 06:52:45.218714 PCI: 00:1f.5 [8086/9da4] enabled
824 06:52:45.221741 PCI: 00:1f.6 [8086/15be] enabled
825 06:52:45.222424
826 06:52:45.225267 PCI: Leftover static devices:
827 06:52:45.226983 PCI: 00:12.5
828 06:52:45.228308 PCI: 00:12.6
829 06:52:45.229573 PCI: 00:13.0
830 06:52:45.230424 PCI: 00:14.1
831 06:52:45.231747 PCI: 00:14.5
832 06:52:45.233057 PCI: 00:15.2
833 06:52:45.234404 PCI: 00:15.3
834 06:52:45.236135 PCI: 00:16.1
835 06:52:45.236765
836 06:52:45.237697 PCI: 00:16.2
837 06:52:45.238946 PCI: 00:16.3
838 06:52:45.240732 PCI: 00:16.4
839 06:52:45.241463 PCI: 00:16.5
840 06:52:45.243290 PCI: 00:19.1
841 06:52:45.244175 PCI: 00:1a.0
842 06:52:45.245743 PCI: 00:1c.1
843 06:52:45.246010
844 06:52:45.246955 PCI: 00:1c.2
845 06:52:45.248779 PCI: 00:1c.3
846 06:52:45.249622 PCI: 00:1c.4
847 06:52:45.251440 PCI: 00:1c.5
848 06:52:45.252273 PCI: 00:1c.6
849 06:52:45.253564 PCI: 00:1c.7
850 06:52:45.254861 PCI: 00:1d.1
851 06:52:45.256104 PCI: 00:1d.2
852 06:52:45.256592
853 06:52:45.257975 PCI: 00:1d.3
854 06:52:45.258786 PCI: 00:1d.4
855 06:52:45.259179
856 06:52:45.260597 PCI: 00:1e.0
857 06:52:45.261701 PCI: 00:1e.1
858 06:52:45.261954
859 06:52:45.263168 PCI: 00:1e.2
860 06:52:45.264516 PCI: 00:1e.3
861 06:52:45.265740 PCI: 00:1f.1
862 06:52:45.267692 PCI: 00:1f.2
863 06:52:45.267962
864 06:52:45.270472 PCI: Check your devicetree.cb.
865 06:52:45.272967 PCI: 00:14.0 scanning...
866 06:52:45.276597 scan_usb_bus for PCI: 00:14.0
867 06:52:45.278019 USB0 port 0 enabled
868 06:52:45.280573 USB0 port 0 scanning...
869 06:52:45.284008 scan_usb_bus for USB0 port 0
870 06:52:45.285839 USB2 port 0 enabled
871 06:52:45.288297 USB2 port 1 enabled
872 06:52:45.290241 USB2 port 2 enabled
873 06:52:45.290854
874 06:52:45.292133 USB2 port 4 enabled
875 06:52:45.292395
876 06:52:45.294671 USB2 port 5 enabled
877 06:52:45.296058 USB2 port 6 enabled
878 06:52:45.296537
879 06:52:45.298116 USB2 port 7 enabled
880 06:52:45.300513 USB2 port 8 enabled
881 06:52:45.302977 USB2 port 9 enabled
882 06:52:45.304998 USB3 port 0 enabled
883 06:52:45.306506 USB3 port 1 enabled
884 06:52:45.308902 USB3 port 2 enabled
885 06:52:45.310467 USB3 port 3 enabled
886 06:52:45.313521 USB3 port 4 enabled
887 06:52:45.314885 USB2 port 0 scanning...
888 06:52:45.318793 scan_usb_bus for USB2 port 0
889 06:52:45.319425
890 06:52:45.321405 scan_usb_bus for USB2 port 0 done
891 06:52:45.327658 scan_bus: scanning of bus USB2 port 0 took 9064 usecs
892 06:52:45.329133 USB2 port 1 scanning...
893 06:52:45.332415 scan_usb_bus for USB2 port 1
894 06:52:45.332981
895 06:52:45.335809 scan_usb_bus for USB2 port 1 done
896 06:52:45.342166 scan_bus: scanning of bus USB2 port 1 took 9065 usecs
897 06:52:45.344032 USB2 port 2 scanning...
898 06:52:45.344727
899 06:52:45.346777 scan_usb_bus for USB2 port 2
900 06:52:45.350607 scan_usb_bus for USB2 port 2 done
901 06:52:45.355706 scan_bus: scanning of bus USB2 port 2 took 9066 usecs
902 06:52:45.356436
903 06:52:45.358532 USB2 port 4 scanning...
904 06:52:45.361644 scan_usb_bus for USB2 port 4
905 06:52:45.364494 scan_usb_bus for USB2 port 4 done
906 06:52:45.364825
907 06:52:45.370795 scan_bus: scanning of bus USB2 port 4 took 9064 usecs
908 06:52:45.372383 USB2 port 5 scanning...
909 06:52:45.372821
910 06:52:45.375687 scan_usb_bus for USB2 port 5
911 06:52:45.376064
912 06:52:45.379383 scan_usb_bus for USB2 port 5 done
913 06:52:45.380043
914 06:52:45.384558 scan_bus: scanning of bus USB2 port 5 took 9065 usecs
915 06:52:45.386916 USB2 port 6 scanning...
916 06:52:45.390414 scan_usb_bus for USB2 port 6
917 06:52:45.393984 scan_usb_bus for USB2 port 6 done
918 06:52:45.399237 scan_bus: scanning of bus USB2 port 6 took 9063 usecs
919 06:52:45.401132 USB2 port 7 scanning...
920 06:52:45.405376 scan_usb_bus for USB2 port 7
921 06:52:45.408681 scan_usb_bus for USB2 port 7 done
922 06:52:45.413388 scan_bus: scanning of bus USB2 port 7 took 9063 usecs
923 06:52:45.416419 USB2 port 8 scanning...
924 06:52:45.419159 scan_usb_bus for USB2 port 8
925 06:52:45.422335 scan_usb_bus for USB2 port 8 done
926 06:52:45.427611 scan_bus: scanning of bus USB2 port 8 took 9063 usecs
927 06:52:45.430720 USB2 port 9 scanning...
928 06:52:45.433537 scan_usb_bus for USB2 port 9
929 06:52:45.436755 scan_usb_bus for USB2 port 9 done
930 06:52:45.442431 scan_bus: scanning of bus USB2 port 9 took 9064 usecs
931 06:52:45.445005 USB3 port 0 scanning...
932 06:52:45.448121 scan_usb_bus for USB3 port 0
933 06:52:45.448399
934 06:52:45.451497 scan_usb_bus for USB3 port 0 done
935 06:52:45.456826 scan_bus: scanning of bus USB3 port 0 took 9062 usecs
936 06:52:45.459240 USB3 port 1 scanning...
937 06:52:45.459836
938 06:52:45.462430 scan_usb_bus for USB3 port 1
939 06:52:45.463074
940 06:52:45.465594 scan_usb_bus for USB3 port 1 done
941 06:52:45.471389 scan_bus: scanning of bus USB3 port 1 took 9062 usecs
942 06:52:45.471934
943 06:52:45.473883 USB3 port 2 scanning...
944 06:52:45.476616 scan_usb_bus for USB3 port 2
945 06:52:45.479781 scan_usb_bus for USB3 port 2 done
946 06:52:45.480060
947 06:52:45.485482 scan_bus: scanning of bus USB3 port 2 took 9063 usecs
948 06:52:45.485753
949 06:52:45.488041 USB3 port 3 scanning...
950 06:52:45.488309
951 06:52:45.490822 scan_usb_bus for USB3 port 3
952 06:52:45.491157
953 06:52:45.494628 scan_usb_bus for USB3 port 3 done
954 06:52:45.499821 scan_bus: scanning of bus USB3 port 3 took 9062 usecs
955 06:52:45.502754 USB3 port 4 scanning...
956 06:52:45.505226 scan_usb_bus for USB3 port 4
957 06:52:45.509113 scan_usb_bus for USB3 port 4 done
958 06:52:45.509402
959 06:52:45.514408 scan_bus: scanning of bus USB3 port 4 took 9063 usecs
960 06:52:45.517714 scan_usb_bus for USB0 port 0 done
961 06:52:45.523165 scan_bus: scanning of bus USB0 port 0 took 239376 usecs
962 06:52:45.527576 scan_usb_bus for PCI: 00:14.0 done
963 06:52:45.532333 scan_bus: scanning of bus PCI: 00:14.0 took 256311 usecs
964 06:52:45.535014 PCI: 00:15.0 scanning...
965 06:52:45.538909 scan_generic_bus for PCI: 00:15.0
966 06:52:45.543288 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
967 06:52:45.547121 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
968 06:52:45.551091 bus: PCI: 00:15.0[0]->I2C: 01:34 enabled
969 06:52:45.554789 scan_generic_bus for PCI: 00:15.0 done
970 06:52:45.560078 scan_bus: scanning of bus PCI: 00:15.0 took 22392 usecs
971 06:52:45.562683 PCI: 00:15.1 scanning...
972 06:52:45.566547 scan_generic_bus for PCI: 00:15.1
973 06:52:45.570734 bus: PCI: 00:15.1[0]->I2C: 02:2c enabled
974 06:52:45.571403
975 06:52:45.574779 scan_generic_bus for PCI: 00:15.1 done
976 06:52:45.580389 scan_bus: scanning of bus PCI: 00:15.1 took 14219 usecs
977 06:52:45.582868 PCI: 00:19.0 scanning...
978 06:52:45.585989 scan_generic_bus for PCI: 00:19.0
979 06:52:45.586867
980 06:52:45.590538 bus: PCI: 00:19.0[0]->I2C: 03:50 enabled
981 06:52:45.590851
982 06:52:45.594009 scan_generic_bus for PCI: 00:19.0 done
983 06:52:45.594437
984 06:52:45.599944 scan_bus: scanning of bus PCI: 00:19.0 took 14216 usecs
985 06:52:45.600622
986 06:52:45.602198 PCI: 00:1c.0 scanning...
987 06:52:45.606772 do_pci_scan_bridge for PCI: 00:1c.0
988 06:52:45.608943 PCI: pci_scan_bus for bus 01
989 06:52:45.612656 PCI: 01:00.0 [10ec/525a] enabled
990 06:52:45.616063 Capability: type 0x01 @ 0x80
991 06:52:45.618641 Capability: type 0x05 @ 0x90
992 06:52:45.618962
993 06:52:45.621337 Capability: type 0x10 @ 0xb0
994 06:52:45.625134 Capability: type 0x10 @ 0x40
995 06:52:45.627867 Enabling Common Clock Configuration
996 06:52:45.632870 L1 Sub-State supported from root port 28
997 06:52:45.634948 L1 Sub-State Support = 0xf
998 06:52:45.638025 CommonModeRestoreTime = 0x3c
999 06:52:45.638299
1000 06:52:45.642098 Power On Value = 0x6, Power On Scale = 0x1
1001 06:52:45.645130 ASPM: Enabled L0s and L1
1002 06:52:45.647722 Capability: type 0x01 @ 0x80
1003 06:52:45.648423
1004 06:52:45.650605 Capability: type 0x05 @ 0x90
1005 06:52:45.653523 Capability: type 0x10 @ 0xb0
1006 06:52:45.653795
1007 06:52:45.659271 scan_bus: scanning of bus PCI: 00:1c.0 took 53675 usecs
1008 06:52:45.659543
1009 06:52:45.661903 PCI: 00:1d.0 scanning...
1010 06:52:45.665279 do_pci_scan_bridge for PCI: 00:1d.0
1011 06:52:45.665791
1012 06:52:45.668515 PCI: pci_scan_bus for bus 02
1013 06:52:45.672072 PCI: 02:00.0 [15b7/5004] enabled
1014 06:52:45.675108 Capability: type 0x01 @ 0x80
1015 06:52:45.677810 Capability: type 0x05 @ 0x90
1016 06:52:45.680515 Capability: type 0x11 @ 0xb0
1017 06:52:45.683839 Capability: type 0x10 @ 0xc0
1018 06:52:45.686369 Capability: type 0x10 @ 0x40
1019 06:52:45.690674 Enabling Common Clock Configuration
1020 06:52:45.694519 L1 Sub-State supported from root port 29
1021 06:52:45.695143
1022 06:52:45.697321 L1 Sub-State Support = 0x5
1023 06:52:45.699902 CommonModeRestoreTime = 0xff
1024 06:52:45.704417 Power On Value = 0x16, Power On Scale = 0x0
1025 06:52:45.705933 ASPM: Enabled L1
1026 06:52:45.706191
1027 06:52:45.709346 Capability: type 0x01 @ 0x80
1028 06:52:45.711870 Capability: type 0x05 @ 0x90
1029 06:52:45.715734 Capability: type 0x11 @ 0xb0
1030 06:52:45.718363 Capability: type 0x10 @ 0xc0
1031 06:52:45.723061 scan_bus: scanning of bus PCI: 00:1d.0 took 58821 usecs
1032 06:52:45.723592
1033 06:52:45.726220 PCI: 00:1f.0 scanning...
1034 06:52:45.729551 scan_lpc_bus for PCI: 00:1f.0
1035 06:52:45.731941 PNP: 0c09.0 enabled
1036 06:52:45.734800 scan_lpc_bus for PCI: 00:1f.0 done
1037 06:52:45.740013 scan_bus: scanning of bus PCI: 00:1f.0 took 11398 usecs
1038 06:52:45.742676 PCI: 00:1f.3 scanning...
1039 06:52:45.748903 scan_bus: scanning of bus PCI: 00:1f.3 took 2841 usecs
1040 06:52:45.750961 PCI: 00:1f.4 scanning...
1041 06:52:45.755363 scan_generic_bus for PCI: 00:1f.4
1042 06:52:45.759065 scan_generic_bus for PCI: 00:1f.4 done
1043 06:52:45.764419 scan_bus: scanning of bus PCI: 00:1f.4 took 10133 usecs
1044 06:52:45.764690
1045 06:52:45.766977 PCI: 00:1f.5 scanning...
1046 06:52:45.767245
1047 06:52:45.770797 scan_generic_bus for PCI: 00:1f.5
1048 06:52:45.774614 scan_generic_bus for PCI: 00:1f.5 done
1049 06:52:45.780248 scan_bus: scanning of bus PCI: 00:1f.5 took 10132 usecs
1050 06:52:45.786020 scan_bus: scanning of bus DOMAIN: 0000 took 709705 usecs
1051 06:52:45.789395 root_dev_scan_bus for Root Device done
1052 06:52:45.795633 scan_bus: scanning of bus Root Device took 729851 usecs
1053 06:52:45.795921 done
1054 06:52:45.801875 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
1055 06:52:45.802473
1056 06:52:45.808353 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1057 06:52:45.815624 SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x2000000
1058 06:52:45.822781 FMAP: area UNIFIED_MRC_CACHE found @ 1bd0000 (131072 bytes)
1059 06:52:45.826205 SPI flash protection: WPSW=1 SRP0=0
1060 06:52:45.830886 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1061 06:52:45.837137 BS: BS_DEV_ENUMERATE times (us): entry 0 run 1125954 exit 34828
1062 06:52:45.837767
1063 06:52:45.839985 found VGA at PCI: 00:02.0
1064 06:52:45.843073 Setting up VGA for PCI: 00:02.0
1065 06:52:45.843337
1066 06:52:45.847907 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1067 06:52:45.848223
1068 06:52:45.853599 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1069 06:52:45.855459 Allocating resources...
1070 06:52:45.858094 Reading resources...
1071 06:52:45.862518 Root Device read_resources bus 0 link: 0
1072 06:52:45.866683 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1073 06:52:45.872317 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1074 06:52:45.876172 DOMAIN: 0000 read_resources bus 0 link: 0
1075 06:52:45.876482
1076 06:52:45.882826 PCI: 00:14.0 read_resources bus 0 link: 0
1077 06:52:45.886468 USB0 port 0 read_resources bus 0 link: 0
1078 06:52:45.886935
1079 06:52:45.896140 USB0 port 0 read_resources bus 0 link: 0 done
1080 06:52:45.900750 PCI: 00:14.0 read_resources bus 0 link: 0 done
1081 06:52:45.906997 PCI: 00:15.0 read_resources bus 1 link: 0
1082 06:52:45.912128 PCI: 00:15.0 read_resources bus 1 link: 0 done
1083 06:52:45.916664 PCI: 00:15.1 read_resources bus 2 link: 0
1084 06:52:45.922090 PCI: 00:15.1 read_resources bus 2 link: 0 done
1085 06:52:45.927435 PCI: 00:19.0 read_resources bus 3 link: 0
1086 06:52:45.933110 PCI: 00:19.0 read_resources bus 3 link: 0 done
1087 06:52:45.937807 PCI: 00:1c.0 read_resources bus 1 link: 0
1088 06:52:45.942836 PCI: 00:1c.0 read_resources bus 1 link: 0 done
1089 06:52:45.943164
1090 06:52:45.947034 PCI: 00:1d.0 read_resources bus 2 link: 0
1091 06:52:45.947517
1092 06:52:45.952421 PCI: 00:1d.0 read_resources bus 2 link: 0 done
1093 06:52:45.952946
1094 06:52:45.957579 PCI: 00:1f.0 read_resources bus 0 link: 0
1095 06:52:45.963175 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1096 06:52:45.969305 DOMAIN: 0000 read_resources bus 0 link: 0 done
1097 06:52:45.974183 Root Device read_resources bus 0 link: 0 done
1098 06:52:45.975953 Done reading resources.
1099 06:52:45.976820
1100 06:52:45.982007 Show resources in subtree (Root Device)...After reading.
1101 06:52:45.982332
1102 06:52:45.986098 Root Device child on link 0 CPU_CLUSTER: 0
1103 06:52:45.986468
1104 06:52:45.991011 CPU_CLUSTER: 0 child on link 0 APIC: 00
1105 06:52:45.992243 APIC: 00
1106 06:52:45.993087 APIC: 02
1107 06:52:45.997469 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1108 06:52:45.998003
1109 06:52:46.006752 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1110 06:52:46.007355
1111 06:52:46.016857 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1112 06:52:46.017802 PCI: 00:00.0
1113 06:52:46.028193 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1114 06:52:46.036768 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1115 06:52:46.037337
1116 06:52:46.046089 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1117 06:52:46.046541
1118 06:52:46.055995 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1119 06:52:46.065204 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1120 06:52:46.073975 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1121 06:52:46.074494
1122 06:52:46.083786 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1123 06:52:46.084410
1124 06:52:46.092964 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1125 06:52:46.101836 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1126 06:52:46.102539
1127 06:52:46.111420 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1128 06:52:46.120858 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1129 06:52:46.121693
1130 06:52:46.131503 PCI: 00:00.0 resource base 100000000 size 6e800000 align 0 gran 0 limit 0 flags e0004200 index c
1131 06:52:46.140364 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1132 06:52:46.149025 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1133 06:52:46.151345 PCI: 00:02.0
1134 06:52:46.161666 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1135 06:52:46.171541 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1136 06:52:46.179865 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1137 06:52:46.181536 PCI: 00:04.0
1138 06:52:46.181850
1139 06:52:46.191411 PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1140 06:52:46.192681 PCI: 00:08.0
1141 06:52:46.203046 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1142 06:52:46.204261 PCI: 00:12.0
1143 06:52:46.204679
1144 06:52:46.214578 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1145 06:52:46.218554 PCI: 00:14.0 child on link 0 USB0 port 0
1146 06:52:46.218867
1147 06:52:46.228888 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1148 06:52:46.233414 USB0 port 0 child on link 0 USB2 port 0
1149 06:52:46.235238 USB2 port 0
1150 06:52:46.235551
1151 06:52:46.236818 USB2 port 1
1152 06:52:46.238535 USB2 port 2
1153 06:52:46.239172
1154 06:52:46.240005 USB2 port 4
1155 06:52:46.242434 USB2 port 5
1156 06:52:46.244381 USB2 port 6
1157 06:52:46.245241 USB2 port 7
1158 06:52:46.245600
1159 06:52:46.247523 USB2 port 8
1160 06:52:46.249186 USB2 port 9
1161 06:52:46.251008 USB3 port 0
1162 06:52:46.252473 USB3 port 1
1163 06:52:46.254434 USB3 port 2
1164 06:52:46.256092 USB3 port 3
1165 06:52:46.256874
1166 06:52:46.258193 USB3 port 4
1167 06:52:46.259647 PCI: 00:14.2
1168 06:52:46.269674 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1169 06:52:46.279602 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1170 06:52:46.280905 PCI: 00:14.3
1171 06:52:46.281219
1172 06:52:46.291111 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1173 06:52:46.295020 PCI: 00:15.0 child on link 0 I2C: 01:10
1174 06:52:46.304817 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1175 06:52:46.305137
1176 06:52:46.307202 I2C: 01:10
1177 06:52:46.307925 I2C: 01:10
1178 06:52:46.309877 I2C: 01:34
1179 06:52:46.314116 PCI: 00:15.1 child on link 0 I2C: 02:2c
1180 06:52:46.314828
1181 06:52:46.324230 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1182 06:52:46.325756 I2C: 02:2c
1183 06:52:46.327448 PCI: 00:16.0
1184 06:52:46.337434 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 06:52:46.339385 PCI: 00:17.0
1186 06:52:46.347827 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1187 06:52:46.348107
1188 06:52:46.357113 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1189 06:52:46.364881 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1190 06:52:46.373902 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1191 06:52:46.381994 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1192 06:52:46.390394 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1193 06:52:46.390859
1194 06:52:46.395116 PCI: 00:19.0 child on link 0 I2C: 03:50
1195 06:52:46.404588 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 06:52:46.405040
1197 06:52:46.415292 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1198 06:52:46.416623 I2C: 03:50
1199 06:52:46.418012 PCI: 00:19.2
1200 06:52:46.418277
1201 06:52:46.429789 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1202 06:52:46.439383 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1203 06:52:46.444003 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1204 06:52:46.451839 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1205 06:52:46.462582 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1206 06:52:46.470779 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1207 06:52:46.471044
1208 06:52:46.473056 PCI: 01:00.0
1209 06:52:46.481919 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
1210 06:52:46.486550 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1211 06:52:46.495211 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1212 06:52:46.504463 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1213 06:52:46.504971
1214 06:52:46.514130 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1215 06:52:46.515657 PCI: 02:00.0
1216 06:52:46.525400 PCI: 02:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1217 06:52:46.525909
1218 06:52:46.530624 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1219 06:52:46.538489 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1220 06:52:46.547954 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1221 06:52:46.549775 PNP: 0c09.0
1222 06:52:46.557981 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1223 06:52:46.567217 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1224 06:52:46.575038 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1225 06:52:46.575842
1226 06:52:46.577126 PCI: 00:1f.3
1227 06:52:46.586544 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1228 06:52:46.597129 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1229 06:52:46.599106 PCI: 00:1f.4
1230 06:52:46.607113 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1231 06:52:46.607625
1232 06:52:46.617394 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1233 06:52:46.619192 PCI: 00:1f.5
1234 06:52:46.627632 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1235 06:52:46.630153 PCI: 00:1f.6
1236 06:52:46.639062 PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
1237 06:52:46.639328
1238 06:52:46.645780 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1239 06:52:46.651942 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1240 06:52:46.658500 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1241 06:52:46.665024 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1242 06:52:46.671323 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1243 06:52:46.675162 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1244 06:52:46.678853 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1245 06:52:46.682932 PCI: 00:17.0 18 * [0x60 - 0x67] io
1246 06:52:46.685656 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1247 06:52:46.685930
1248 06:52:46.693161 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1249 06:52:46.699607 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1250 06:52:46.707276 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1251 06:52:46.715922 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1252 06:52:46.716193
1253 06:52:46.722090 PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1254 06:52:46.722398
1255 06:52:46.726574 PCI: 01:00.0 14 * [0x0 - 0xfff] mem
1256 06:52:46.734612 PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1257 06:52:46.742678 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1258 06:52:46.750249 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1259 06:52:46.750688
1260 06:52:46.758132 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1261 06:52:46.761021 PCI: 02:00.0 10 * [0x0 - 0x3fff] mem
1262 06:52:46.770133 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1263 06:52:46.773703 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1264 06:52:46.778988 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1265 06:52:46.783340 PCI: 00:1c.0 20 * [0x11000000 - 0x110fffff] mem
1266 06:52:46.788193 PCI: 00:1d.0 20 * [0x11100000 - 0x111fffff] mem
1267 06:52:46.793400 PCI: 00:1f.3 20 * [0x11200000 - 0x112fffff] mem
1268 06:52:46.798382 PCI: 00:1f.6 10 * [0x11300000 - 0x1131ffff] mem
1269 06:52:46.803260 PCI: 00:14.0 10 * [0x11320000 - 0x1132ffff] mem
1270 06:52:46.808356 PCI: 00:04.0 10 * [0x11330000 - 0x11337fff] mem
1271 06:52:46.812986 PCI: 00:14.3 10 * [0x11338000 - 0x1133bfff] mem
1272 06:52:46.813254
1273 06:52:46.818157 PCI: 00:1f.3 10 * [0x1133c000 - 0x1133ffff] mem
1274 06:52:46.822690 PCI: 00:14.2 10 * [0x11340000 - 0x11341fff] mem
1275 06:52:46.827887 PCI: 00:17.0 10 * [0x11342000 - 0x11343fff] mem
1276 06:52:46.832078 PCI: 00:08.0 10 * [0x11344000 - 0x11344fff] mem
1277 06:52:46.837154 PCI: 00:12.0 10 * [0x11345000 - 0x11345fff] mem
1278 06:52:46.841489 PCI: 00:14.2 18 * [0x11346000 - 0x11346fff] mem
1279 06:52:46.841963
1280 06:52:46.847202 PCI: 00:15.0 10 * [0x11347000 - 0x11347fff] mem
1281 06:52:46.851810 PCI: 00:15.1 10 * [0x11348000 - 0x11348fff] mem
1282 06:52:46.856161 PCI: 00:16.0 10 * [0x11349000 - 0x11349fff] mem
1283 06:52:46.861928 PCI: 00:19.0 10 * [0x1134a000 - 0x1134afff] mem
1284 06:52:46.866043 PCI: 00:19.0 18 * [0x1134b000 - 0x1134bfff] mem
1285 06:52:46.871217 PCI: 00:19.2 18 * [0x1134c000 - 0x1134cfff] mem
1286 06:52:46.875374 PCI: 00:1f.5 10 * [0x1134d000 - 0x1134dfff] mem
1287 06:52:46.875916
1288 06:52:46.880975 PCI: 00:17.0 24 * [0x1134e000 - 0x1134e7ff] mem
1289 06:52:46.885734 PCI: 00:17.0 14 * [0x1134f000 - 0x1134f0ff] mem
1290 06:52:46.886413
1291 06:52:46.890961 PCI: 00:1f.4 10 * [0x11350000 - 0x113500ff] mem
1292 06:52:46.899168 DOMAIN: 0000 mem: base: 11350100 size: 11350100 align: 28 gran: 0 limit: ffffffff done
1293 06:52:46.902748 avoid_fixed_resources: DOMAIN: 0000
1294 06:52:46.903494
1295 06:52:46.908767 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1296 06:52:46.914300 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1297 06:52:46.921687 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1298 06:52:46.922001
1299 06:52:46.930067 constrain_resources: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)
1300 06:52:46.937708 constrain_resources: PCI: 00:00.0 08 base 000c0000 limit 89ffffff mem (fixed)
1301 06:52:46.945153 constrain_resources: PCI: 00:00.0 0a base 8a000000 limit 8affffff mem (fixed)
1302 06:52:46.952747 constrain_resources: PCI: 00:00.0 0b base 8b000000 limit 8f7fffff mem (fixed)
1303 06:52:46.960103 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1304 06:52:46.968203 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1305 06:52:46.976243 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1306 06:52:46.983131 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1307 06:52:46.989828 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1308 06:52:46.992633 Setting resources...
1309 06:52:46.998770 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1310 06:52:47.002447 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1311 06:52:47.006511 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1312 06:52:47.011050 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1313 06:52:47.014632 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1314 06:52:47.020674 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1315 06:52:47.027625 PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1316 06:52:47.033094 PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1317 06:52:47.039127 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1318 06:52:47.039639
1319 06:52:47.045839 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1320 06:52:47.053920 DOMAIN: 0000 mem: base:c0000000 size:11350100 align:28 gran:0 limit:dfffffff
1321 06:52:47.058811 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1322 06:52:47.064073 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1323 06:52:47.068346 PCI: 00:1c.0 20 * [0xd1000000 - 0xd10fffff] mem
1324 06:52:47.073005 PCI: 00:1d.0 20 * [0xd1100000 - 0xd11fffff] mem
1325 06:52:47.078421 PCI: 00:1f.3 20 * [0xd1200000 - 0xd12fffff] mem
1326 06:52:47.083081 PCI: 00:1f.6 10 * [0xd1300000 - 0xd131ffff] mem
1327 06:52:47.083348
1328 06:52:47.088476 PCI: 00:14.0 10 * [0xd1320000 - 0xd132ffff] mem
1329 06:52:47.092511 PCI: 00:04.0 10 * [0xd1330000 - 0xd1337fff] mem
1330 06:52:47.097387 PCI: 00:14.3 10 * [0xd1338000 - 0xd133bfff] mem
1331 06:52:47.103065 PCI: 00:1f.3 10 * [0xd133c000 - 0xd133ffff] mem
1332 06:52:47.107595 PCI: 00:14.2 10 * [0xd1340000 - 0xd1341fff] mem
1333 06:52:47.112229 PCI: 00:17.0 10 * [0xd1342000 - 0xd1343fff] mem
1334 06:52:47.117593 PCI: 00:08.0 10 * [0xd1344000 - 0xd1344fff] mem
1335 06:52:47.121821 PCI: 00:12.0 10 * [0xd1345000 - 0xd1345fff] mem
1336 06:52:47.127497 PCI: 00:14.2 18 * [0xd1346000 - 0xd1346fff] mem
1337 06:52:47.131669 PCI: 00:15.0 10 * [0xd1347000 - 0xd1347fff] mem
1338 06:52:47.136349 PCI: 00:15.1 10 * [0xd1348000 - 0xd1348fff] mem
1339 06:52:47.136629
1340 06:52:47.141259 PCI: 00:16.0 10 * [0xd1349000 - 0xd1349fff] mem
1341 06:52:47.146559 PCI: 00:19.0 10 * [0xd134a000 - 0xd134afff] mem
1342 06:52:47.151217 PCI: 00:19.0 18 * [0xd134b000 - 0xd134bfff] mem
1343 06:52:47.151894
1344 06:52:47.156193 PCI: 00:19.2 18 * [0xd134c000 - 0xd134cfff] mem
1345 06:52:47.161402 PCI: 00:1f.5 10 * [0xd134d000 - 0xd134dfff] mem
1346 06:52:47.166192 PCI: 00:17.0 24 * [0xd134e000 - 0xd134e7ff] mem
1347 06:52:47.170358 PCI: 00:17.0 14 * [0xd134f000 - 0xd134f0ff] mem
1348 06:52:47.174958 PCI: 00:1f.4 10 * [0xd1350000 - 0xd13500ff] mem
1349 06:52:47.183037 DOMAIN: 0000 mem: next_base: d1350100 size: 11350100 align: 28 gran: 0 done
1350 06:52:47.183314
1351 06:52:47.190883 PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1352 06:52:47.198215 PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1353 06:52:47.204895 PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1354 06:52:47.209921 PCI: 01:00.0 14 * [0xd1000000 - 0xd1000fff] mem
1355 06:52:47.210177
1356 06:52:47.216987 PCI: 00:1c.0 mem: next_base: d1001000 size: 100000 align: 20 gran: 20 done
1357 06:52:47.224818 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1358 06:52:47.231697 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1359 06:52:47.239058 PCI: 00:1d.0 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff
1360 06:52:47.239570
1361 06:52:47.244435 PCI: 02:00.0 10 * [0xd1100000 - 0xd1103fff] mem
1362 06:52:47.251671 PCI: 00:1d.0 mem: next_base: d1104000 size: 100000 align: 20 gran: 20 done
1363 06:52:47.255895 Root Device assign_resources, bus 0 link: 0
1364 06:52:47.261213 DOMAIN: 0000 assign_resources, bus 0 link: 0
1365 06:52:47.269398 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1366 06:52:47.270072
1367 06:52:47.277535 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1368 06:52:47.285279 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1369 06:52:47.294409 PCI: 00:04.0 10 <- [0x00d1330000 - 0x00d1337fff] size 0x00008000 gran 0x0f mem64
1370 06:52:47.301969 PCI: 00:08.0 10 <- [0x00d1344000 - 0x00d1344fff] size 0x00001000 gran 0x0c mem64
1371 06:52:47.310570 PCI: 00:12.0 10 <- [0x00d1345000 - 0x00d1345fff] size 0x00001000 gran 0x0c mem64
1372 06:52:47.318786 PCI: 00:14.0 10 <- [0x00d1320000 - 0x00d132ffff] size 0x00010000 gran 0x10 mem64
1373 06:52:47.323094 PCI: 00:14.0 assign_resources, bus 0 link: 0
1374 06:52:47.328194 PCI: 00:14.0 assign_resources, bus 0 link: 0
1375 06:52:47.335813 PCI: 00:14.2 10 <- [0x00d1340000 - 0x00d1341fff] size 0x00002000 gran 0x0d mem64
1376 06:52:47.336271
1377 06:52:47.343745 PCI: 00:14.2 18 <- [0x00d1346000 - 0x00d1346fff] size 0x00001000 gran 0x0c mem64
1378 06:52:47.344354
1379 06:52:47.352609 PCI: 00:14.3 10 <- [0x00d1338000 - 0x00d133bfff] size 0x00004000 gran 0x0e mem64
1380 06:52:47.360491 PCI: 00:15.0 10 <- [0x00d1347000 - 0x00d1347fff] size 0x00001000 gran 0x0c mem64
1381 06:52:47.361126
1382 06:52:47.365263 PCI: 00:15.0 assign_resources, bus 1 link: 0
1383 06:52:47.365971
1384 06:52:47.369615 PCI: 00:15.0 assign_resources, bus 1 link: 0
1385 06:52:47.378921 PCI: 00:15.1 10 <- [0x00d1348000 - 0x00d1348fff] size 0x00001000 gran 0x0c mem64
1386 06:52:47.382838 PCI: 00:15.1 assign_resources, bus 2 link: 0
1387 06:52:47.383563
1388 06:52:47.387750 PCI: 00:15.1 assign_resources, bus 2 link: 0
1389 06:52:47.396068 PCI: 00:16.0 10 <- [0x00d1349000 - 0x00d1349fff] size 0x00001000 gran 0x0c mem64
1390 06:52:47.404119 PCI: 00:17.0 10 <- [0x00d1342000 - 0x00d1343fff] size 0x00002000 gran 0x0d mem
1391 06:52:47.411830 PCI: 00:17.0 14 <- [0x00d134f000 - 0x00d134f0ff] size 0x00000100 gran 0x08 mem
1392 06:52:47.419799 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1393 06:52:47.427169 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1394 06:52:47.434707 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1395 06:52:47.442838 PCI: 00:17.0 24 <- [0x00d134e000 - 0x00d134e7ff] size 0x00000800 gran 0x0b mem
1396 06:52:47.450413 PCI: 00:19.0 10 <- [0x00d134a000 - 0x00d134afff] size 0x00001000 gran 0x0c mem64
1397 06:52:47.450929
1398 06:52:47.458681 PCI: 00:19.0 18 <- [0x00d134b000 - 0x00d134bfff] size 0x00001000 gran 0x0c mem64
1399 06:52:47.463264 PCI: 00:19.0 assign_resources, bus 3 link: 0
1400 06:52:47.463875
1401 06:52:47.468222 PCI: 00:19.0 assign_resources, bus 3 link: 0
1402 06:52:47.476152 PCI: 00:19.2 18 <- [0x00d134c000 - 0x00d134cfff] size 0x00001000 gran 0x0c mem64
1403 06:52:47.476412
1404 06:52:47.485128 PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1405 06:52:47.493925 PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1406 06:52:47.502053 PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1407 06:52:47.507207 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1408 06:52:47.514563 PCI: 01:00.0 14 <- [0x00d1000000 - 0x00d1000fff] size 0x00001000 gran 0x0c mem
1409 06:52:47.514991
1410 06:52:47.519942 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1411 06:52:47.528974 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io
1412 06:52:47.537692 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
1413 06:52:47.545588 PCI: 00:1d.0 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem
1414 06:52:47.546288
1415 06:52:47.550076 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1416 06:52:47.550764
1417 06:52:47.558931 PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d1103fff] size 0x00004000 gran 0x0e mem64
1418 06:52:47.563818 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1419 06:52:47.567541 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1420 06:52:47.572792 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1421 06:52:47.578046 LPC: Trying to open IO window from 930 size 8
1422 06:52:47.582013 LPC: Trying to open IO window from 940 size 8
1423 06:52:47.582702
1424 06:52:47.586818 LPC: Trying to open IO window from 950 size 10
1425 06:52:47.587603
1426 06:52:47.595237 PCI: 00:1f.3 10 <- [0x00d133c000 - 0x00d133ffff] size 0x00004000 gran 0x0e mem64
1427 06:52:47.603224 PCI: 00:1f.3 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 mem64
1428 06:52:47.611221 PCI: 00:1f.4 10 <- [0x00d1350000 - 0x00d13500ff] size 0x00000100 gran 0x08 mem64
1429 06:52:47.619614 PCI: 00:1f.5 10 <- [0x00d134d000 - 0x00d134dfff] size 0x00001000 gran 0x0c mem
1430 06:52:47.627625 PCI: 00:1f.6 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem
1431 06:52:47.632377 DOMAIN: 0000 assign_resources, bus 0 link: 0
1432 06:52:47.637540 Root Device assign_resources, bus 0 link: 0
1433 06:52:47.639389 Done setting resources.
1434 06:52:47.640007
1435 06:52:47.645538 Show resources in subtree (Root Device)...After assigning values.
1436 06:52:47.646086
1437 06:52:47.650736 Root Device child on link 0 CPU_CLUSTER: 0
1438 06:52:47.654708 CPU_CLUSTER: 0 child on link 0 APIC: 00
1439 06:52:47.656120 APIC: 00
1440 06:52:47.656997 APIC: 02
1441 06:52:47.661133 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1442 06:52:47.661700
1443 06:52:47.671173 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1444 06:52:47.671930
1445 06:52:47.682130 DOMAIN: 0000 resource base c0000000 size 11350100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1446 06:52:47.683430 PCI: 00:00.0
1447 06:52:47.683933
1448 06:52:47.693589 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1449 06:52:47.703488 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1450 06:52:47.711698 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1451 06:52:47.712109
1452 06:52:47.721374 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1453 06:52:47.730846 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1454 06:52:47.740709 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1455 06:52:47.749400 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1456 06:52:47.758292 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1457 06:52:47.767820 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1458 06:52:47.777335 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1459 06:52:47.787396 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1460 06:52:47.797335 PCI: 00:00.0 resource base 100000000 size 6e800000 align 0 gran 0 limit 0 flags e0004200 index c
1461 06:52:47.806610 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1462 06:52:47.814795 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1463 06:52:47.817003 PCI: 00:02.0
1464 06:52:47.827378 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1465 06:52:47.838403 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1466 06:52:47.847811 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1467 06:52:47.848661 PCI: 00:04.0
1468 06:52:47.859169 PCI: 00:04.0 resource base d1330000 size 8000 align 15 gran 15 limit d1337fff flags 60000201 index 10
1469 06:52:47.859832
1470 06:52:47.860615 PCI: 00:08.0
1471 06:52:47.870867 PCI: 00:08.0 resource base d1344000 size 1000 align 12 gran 12 limit d1344fff flags 60000201 index 10
1472 06:52:47.872891 PCI: 00:12.0
1473 06:52:47.873172
1474 06:52:47.882834 PCI: 00:12.0 resource base d1345000 size 1000 align 12 gran 12 limit d1345fff flags 60000201 index 10
1475 06:52:47.887539 PCI: 00:14.0 child on link 0 USB0 port 0
1476 06:52:47.887812
1477 06:52:47.898161 PCI: 00:14.0 resource base d1320000 size 10000 align 16 gran 16 limit d132ffff flags 60000201 index 10
1478 06:52:47.902390 USB0 port 0 child on link 0 USB2 port 0
1479 06:52:47.904132 USB2 port 0
1480 06:52:47.906099 USB2 port 1
1481 06:52:47.907019 USB2 port 2
1482 06:52:47.907496
1483 06:52:47.909460 USB2 port 4
1484 06:52:47.910815 USB2 port 5
1485 06:52:47.912815 USB2 port 6
1486 06:52:47.913591
1487 06:52:47.914365 USB2 port 7
1488 06:52:47.916804 USB2 port 8
1489 06:52:47.918095 USB2 port 9
1490 06:52:47.920087 USB3 port 0
1491 06:52:47.922004 USB3 port 1
1492 06:52:47.923282 USB3 port 2
1493 06:52:47.924005
1494 06:52:47.925188 USB3 port 3
1495 06:52:47.926867 USB3 port 4
1496 06:52:47.928605 PCI: 00:14.2
1497 06:52:47.938438 PCI: 00:14.2 resource base d1340000 size 2000 align 13 gran 13 limit d1341fff flags 60000201 index 10
1498 06:52:47.949417 PCI: 00:14.2 resource base d1346000 size 1000 align 12 gran 12 limit d1346fff flags 60000201 index 18
1499 06:52:47.950942 PCI: 00:14.3
1500 06:52:47.961209 PCI: 00:14.3 resource base d1338000 size 4000 align 14 gran 14 limit d133bfff flags 60000201 index 10
1501 06:52:47.965296 PCI: 00:15.0 child on link 0 I2C: 01:10
1502 06:52:47.965578
1503 06:52:47.975105 PCI: 00:15.0 resource base d1347000 size 1000 align 12 gran 12 limit d1347fff flags 60000201 index 10
1504 06:52:47.977508 I2C: 01:10
1505 06:52:47.978330 I2C: 01:10
1506 06:52:47.980921 I2C: 01:34
1507 06:52:47.984401 PCI: 00:15.1 child on link 0 I2C: 02:2c
1508 06:52:47.984684
1509 06:52:47.994892 PCI: 00:15.1 resource base d1348000 size 1000 align 12 gran 12 limit d1348fff flags 60000201 index 10
1510 06:52:47.996139 I2C: 02:2c
1511 06:52:47.997888 PCI: 00:16.0
1512 06:52:47.998724
1513 06:52:48.008493 PCI: 00:16.0 resource base d1349000 size 1000 align 12 gran 12 limit d1349fff flags 60000201 index 10
1514 06:52:48.010119 PCI: 00:17.0
1515 06:52:48.020121 PCI: 00:17.0 resource base d1342000 size 2000 align 13 gran 13 limit d1343fff flags 60000200 index 10
1516 06:52:48.030705 PCI: 00:17.0 resource base d134f000 size 100 align 12 gran 8 limit d134f0ff flags 60000200 index 14
1517 06:52:48.039204 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1518 06:52:48.048559 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1519 06:52:48.057738 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1520 06:52:48.067396 PCI: 00:17.0 resource base d134e000 size 800 align 12 gran 11 limit d134e7ff flags 60000200 index 24
1521 06:52:48.068038
1522 06:52:48.071725 PCI: 00:19.0 child on link 0 I2C: 03:50
1523 06:52:48.072094
1524 06:52:48.082466 PCI: 00:19.0 resource base d134a000 size 1000 align 12 gran 12 limit d134afff flags 60000201 index 10
1525 06:52:48.093121 PCI: 00:19.0 resource base d134b000 size 1000 align 12 gran 12 limit d134bfff flags 60000201 index 18
1526 06:52:48.094436 I2C: 03:50
1527 06:52:48.095941 PCI: 00:19.2
1528 06:52:48.106621 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1529 06:52:48.117305 PCI: 00:19.2 resource base d134c000 size 1000 align 12 gran 12 limit d134cfff flags 60000201 index 18
1530 06:52:48.121418 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1531 06:52:48.130664 PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1532 06:52:48.140696 PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1533 06:52:48.151918 PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1534 06:52:48.153462 PCI: 01:00.0
1535 06:52:48.163323 PCI: 01:00.0 resource base d1000000 size 1000 align 12 gran 12 limit d1000fff flags 60000200 index 14
1536 06:52:48.168569 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1537 06:52:48.177400 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1538 06:52:48.178150
1539 06:52:48.187567 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1540 06:52:48.198497 PCI: 00:1d.0 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20
1541 06:52:48.199332 PCI: 02:00.0
1542 06:52:48.210161 PCI: 02:00.0 resource base d1100000 size 4000 align 14 gran 14 limit d1103fff flags 60000201 index 10
1543 06:52:48.214126 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1544 06:52:48.223662 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1545 06:52:48.232078 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1546 06:52:48.232664
1547 06:52:48.233954 PNP: 0c09.0
1548 06:52:48.241975 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1549 06:52:48.251099 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1550 06:52:48.259679 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1551 06:52:48.261248 PCI: 00:1f.3
1552 06:52:48.271787 PCI: 00:1f.3 resource base d133c000 size 4000 align 14 gran 14 limit d133ffff flags 60000201 index 10
1553 06:52:48.282160 PCI: 00:1f.3 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60000201 index 20
1554 06:52:48.283121 PCI: 00:1f.4
1555 06:52:48.292542 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1556 06:52:48.303100 PCI: 00:1f.4 resource base d1350000 size 100 align 12 gran 8 limit d13500ff flags 60000201 index 10
1557 06:52:48.304023 PCI: 00:1f.5
1558 06:52:48.304514
1559 06:52:48.314756 PCI: 00:1f.5 resource base d134d000 size 1000 align 12 gran 12 limit d134dfff flags 60000200 index 10
1560 06:52:48.316108 PCI: 00:1f.6
1561 06:52:48.326821 PCI: 00:1f.6 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10
1562 06:52:48.329386 Done allocating resources.
1563 06:52:48.335897 BS: BS_DEV_RESOURCES times (us): entry 0 run 2492131 exit 13
1564 06:52:48.338478 Enabling resources...
1565 06:52:48.342426 PCI: 00:00.0 subsystem <- 1028/3e35
1566 06:52:48.344882 PCI: 00:00.0 cmd <- 06
1567 06:52:48.345597
1568 06:52:48.349386 PCI: 00:02.0 subsystem <- 1028/3ea1
1569 06:52:48.351480 PCI: 00:02.0 cmd <- 03
1570 06:52:48.355438 PCI: 00:04.0 subsystem <- 1028/1903
1571 06:52:48.357461 PCI: 00:04.0 cmd <- 02
1572 06:52:48.360117 PCI: 00:08.0 cmd <- 06
1573 06:52:48.363932 PCI: 00:12.0 subsystem <- 1028/9df9
1574 06:52:48.364566
1575 06:52:48.366082 PCI: 00:12.0 cmd <- 02
1576 06:52:48.370732 PCI: 00:14.0 subsystem <- 1028/9ded
1577 06:52:48.372661 PCI: 00:14.0 cmd <- 02
1578 06:52:48.373370
1579 06:52:48.375071 PCI: 00:14.2 cmd <- 02
1580 06:52:48.379590 PCI: 00:14.3 subsystem <- 1028/9df0
1581 06:52:48.381761 PCI: 00:14.3 cmd <- 02
1582 06:52:48.385215 PCI: 00:15.0 subsystem <- 1028/9de8
1583 06:52:48.385692
1584 06:52:48.387897 PCI: 00:15.0 cmd <- 02
1585 06:52:48.391436 PCI: 00:15.1 subsystem <- 1028/9de9
1586 06:52:48.391947
1587 06:52:48.394031 PCI: 00:15.1 cmd <- 02
1588 06:52:48.398515 PCI: 00:16.0 subsystem <- 1028/9de0
1589 06:52:48.400612 PCI: 00:16.0 cmd <- 02
1590 06:52:48.404657 PCI: 00:17.0 subsystem <- 1028/9dd3
1591 06:52:48.406696 PCI: 00:17.0 cmd <- 03
1592 06:52:48.410863 PCI: 00:19.0 subsystem <- 1028/9dc5
1593 06:52:48.412964 PCI: 00:19.0 cmd <- 06
1594 06:52:48.416701 PCI: 00:19.2 subsystem <- 1028/9dc7
1595 06:52:48.417350
1596 06:52:48.419380 PCI: 00:19.2 cmd <- 06
1597 06:52:48.422283 PCI: 00:1c.0 bridge ctrl <- 0003
1598 06:52:48.422542
1599 06:52:48.426691 PCI: 00:1c.0 subsystem <- 1028/9dbf
1600 06:52:48.429336 Capability: type 0x10 @ 0x40
1601 06:52:48.432115 Capability: type 0x05 @ 0x80
1602 06:52:48.435184 Capability: type 0x0d @ 0x90
1603 06:52:48.437845 PCI: 00:1c.0 cmd <- 06
1604 06:52:48.441177 PCI: 00:1d.0 bridge ctrl <- 0003
1605 06:52:48.441813
1606 06:52:48.444671 PCI: 00:1d.0 subsystem <- 1028/9db4
1607 06:52:48.447852 Capability: type 0x10 @ 0x40
1608 06:52:48.450617 Capability: type 0x05 @ 0x80
1609 06:52:48.451185
1610 06:52:48.453395 Capability: type 0x0d @ 0x90
1611 06:52:48.455522 PCI: 00:1d.0 cmd <- 06
1612 06:52:48.459404 PCI: 00:1f.0 subsystem <- 1028/9d84
1613 06:52:48.462092 PCI: 00:1f.0 cmd <- 407
1614 06:52:48.465886 PCI: 00:1f.3 subsystem <- 1028/9dc8
1615 06:52:48.466608
1616 06:52:48.468480 PCI: 00:1f.3 cmd <- 02
1617 06:52:48.472062 PCI: 00:1f.4 subsystem <- 1028/9da3
1618 06:52:48.474030 PCI: 00:1f.4 cmd <- 03
1619 06:52:48.474291
1620 06:52:48.478182 PCI: 00:1f.5 subsystem <- 1028/9da4
1621 06:52:48.480944 PCI: 00:1f.5 cmd <- 406
1622 06:52:48.484358 PCI: 00:1f.6 subsystem <- 1028/15be
1623 06:52:48.487114 PCI: 00:1f.6 cmd <- 02
1624 06:52:48.497904 PCI: 01:00.0 cmd <- 02
1625 06:52:48.500389 PCI: 02:00.0 cmd <- 02
1626 06:52:48.503007 done.
1627 06:52:48.509049 BS: BS_DEV_ENABLE times (us): entry 377 run 167148 exit 0
1628 06:52:48.511686 Initializing devices...
1629 06:52:48.512967 Root Device init ...
1630 06:52:48.513767
1631 06:52:48.517693 Root Device init finished in 2139 usecs
1632 06:52:48.519931 CPU_CLUSTER: 0 init ...
1633 06:52:48.524558 CPU_CLUSTER: 0 init finished in 2429 usecs
1634 06:52:48.528537 PCI: 00:00.0 init ...
1635 06:52:48.531265 CPU TDP: 15 Watts
1636 06:52:48.531528
1637 06:52:48.533266 CPU PL2 = 51 Watts
1638 06:52:48.533528
1639 06:52:48.537665 PCI: 00:00.0 init finished in 7038 usecs
1640 06:52:48.540400 PCI: 00:02.0 init ...
1641 06:52:48.543901 PCI: 00:02.0 init finished in 2237 usecs
1642 06:52:48.547053 PCI: 00:04.0 init ...
1643 06:52:48.551111 PCI: 00:04.0 init finished in 2236 usecs
1644 06:52:48.551380
1645 06:52:48.553274 PCI: 00:08.0 init ...
1646 06:52:48.557726 PCI: 00:08.0 init finished in 2236 usecs
1647 06:52:48.559864 PCI: 00:12.0 init ...
1648 06:52:48.564413 PCI: 00:12.0 init finished in 2236 usecs
1649 06:52:48.566568 PCI: 00:14.0 init ...
1650 06:52:48.570465 PCI: 00:14.0 init finished in 2236 usecs
1651 06:52:48.570946
1652 06:52:48.573090 PCI: 00:14.2 init ...
1653 06:52:48.573568
1654 06:52:48.577684 PCI: 00:14.2 init finished in 2236 usecs
1655 06:52:48.578473
1656 06:52:48.580470 PCI: 00:14.3 init ...
1657 06:52:48.584529 PCI: 00:14.3 init finished in 2241 usecs
1658 06:52:48.587301 PCI: 00:15.0 init ...
1659 06:52:48.591423 DW I2C bus 0 at 0xd1347000 (400 KHz)
1660 06:52:48.595439 PCI: 00:15.0 init finished in 5934 usecs
1661 06:52:48.598166 PCI: 00:15.1 init ...
1662 06:52:48.601427 DW I2C bus 1 at 0xd1348000 (400 KHz)
1663 06:52:48.604941 PCI: 00:15.1 init finished in 5934 usecs
1664 06:52:48.607591 PCI: 00:16.0 init ...
1665 06:52:48.611670 PCI: 00:16.0 init finished in 2236 usecs
1666 06:52:48.615016 PCI: 00:19.0 init ...
1667 06:52:48.618799 DW I2C bus 4 at 0xd134a000 (400 KHz)
1668 06:52:48.619446
1669 06:52:48.622811 PCI: 00:19.0 init finished in 5916 usecs
1670 06:52:48.625694 PCI: 00:1c.0 init ...
1671 06:52:48.628886 Initializing PCH PCIe bridge.
1672 06:52:48.629473
1673 06:52:48.632871 PCI: 00:1c.0 init finished in 5240 usecs
1674 06:52:48.635459 PCI: 00:1d.0 init ...
1675 06:52:48.636106
1676 06:52:48.638778 Initializing PCH PCIe bridge.
1677 06:52:48.642188 PCI: 00:1d.0 init finished in 5249 usecs
1678 06:52:48.642451
1679 06:52:48.644900 PCI: 00:1f.0 init ...
1680 06:52:48.649505 IOAPIC: Initializing IOAPIC at 0xfec00000
1681 06:52:48.654182 IOAPIC: Bootstrap Processor Local APIC = 0x00
1682 06:52:48.655568 IOAPIC: ID = 0x02
1683 06:52:48.656035
1684 06:52:48.658164 IOAPIC: Dumping registers
1685 06:52:48.658695
1686 06:52:48.661407 reg 0x0000: 0x02000000
1687 06:52:48.664039 reg 0x0001: 0x00770020
1688 06:52:48.664606
1689 06:52:48.666082 reg 0x0002: 0x00000000
1690 06:52:48.670255 PCI: 00:1f.0 init finished in 23332 usecs
1691 06:52:48.672851 PCI: 00:1f.3 init ...
1692 06:52:48.678378 HDA: codec_mask = 05
1693 06:52:48.681088 HDA: Initializing codec #2
1694 06:52:48.683783 HDA: codec viddid: 8086280b
1695 06:52:48.687811 HDA: No verb table entry found
1696 06:52:48.689322 HDA: Initializing codec #0
1697 06:52:48.689601
1698 06:52:48.692398 HDA: codec viddid: 10ec0236
1699 06:52:48.693223
1700 06:52:48.699492 HDA: verb loaded.
1701 06:52:48.704228 PCI: 00:1f.3 init finished in 28834 usecs
1702 06:52:48.707365 PCI: 00:1f.4 init ...
1703 06:52:48.710782 PCI: 00:1f.4 init finished in 2246 usecs
1704 06:52:48.713568 PCI: 00:1f.6 init ...
1705 06:52:48.718139 PCI: 00:1f.6 init finished in 2235 usecs
1706 06:52:48.728696 PCI: 01:00.0 init ...
1707 06:52:48.733568 PCI: 01:00.0 init finished in 2235 usecs
1708 06:52:48.735334 PCI: 02:00.0 init ...
1709 06:52:48.735865
1710 06:52:48.739283 PCI: 02:00.0 init finished in 2237 usecs
1711 06:52:48.742018 PNP: 0c09.0 init ...
1712 06:52:48.746547 EC Label : 00.00.20
1713 06:52:48.749799 EC Revision : 9ca674bba
1714 06:52:48.753898 EC Model Num : 08B9
1715 06:52:48.757069 EC Build Date : 05/10/19
1716 06:52:48.765695 PNP: 0c09.0 init finished in 21747 usecs
1717 06:52:48.768217 Devices initialized
1718 06:52:48.768492
1719 06:52:48.771578 Show all devs... After init.
1720 06:52:48.773742 Root Device: enabled 1
1721 06:52:48.775759 CPU_CLUSTER: 0: enabled 1
1722 06:52:48.776168
1723 06:52:48.778915 DOMAIN: 0000: enabled 1
1724 06:52:48.780388 APIC: 00: enabled 1
1725 06:52:48.783085 PCI: 00:00.0: enabled 1
1726 06:52:48.785306 PCI: 00:02.0: enabled 1
1727 06:52:48.787840 PCI: 00:04.0: enabled 1
1728 06:52:48.789823 PCI: 00:12.0: enabled 1
1729 06:52:48.793142 PCI: 00:12.5: enabled 0
1730 06:52:48.795360 PCI: 00:12.6: enabled 0
1731 06:52:48.797274 PCI: 00:13.0: enabled 0
1732 06:52:48.800354 PCI: 00:14.0: enabled 1
1733 06:52:48.802287 PCI: 00:14.1: enabled 0
1734 06:52:48.804964 PCI: 00:14.3: enabled 1
1735 06:52:48.805602
1736 06:52:48.807109 PCI: 00:14.5: enabled 0
1737 06:52:48.809704 PCI: 00:15.0: enabled 1
1738 06:52:48.809969
1739 06:52:48.812460 PCI: 00:15.1: enabled 1
1740 06:52:48.815286 PCI: 00:15.2: enabled 0
1741 06:52:48.817086 PCI: 00:15.3: enabled 0
1742 06:52:48.817354
1743 06:52:48.819832 PCI: 00:16.0: enabled 1
1744 06:52:48.821935 PCI: 00:16.1: enabled 0
1745 06:52:48.823821 PCI: 00:16.2: enabled 0
1746 06:52:48.824341
1747 06:52:48.826985 PCI: 00:16.3: enabled 0
1748 06:52:48.829710 PCI: 00:16.4: enabled 0
1749 06:52:48.831868 PCI: 00:16.5: enabled 0
1750 06:52:48.834446 PCI: 00:17.0: enabled 1
1751 06:52:48.836570 PCI: 00:19.0: enabled 1
1752 06:52:48.839234 PCI: 00:19.1: enabled 0
1753 06:52:48.841242 PCI: 00:19.2: enabled 1
1754 06:52:48.843844 PCI: 00:1a.0: enabled 0
1755 06:52:48.846325 PCI: 00:1c.0: enabled 1
1756 06:52:48.846596
1757 06:52:48.848478 PCI: 00:1c.1: enabled 0
1758 06:52:48.850663 PCI: 00:1c.2: enabled 0
1759 06:52:48.853259 PCI: 00:1c.3: enabled 0
1760 06:52:48.855909 PCI: 00:1c.4: enabled 0
1761 06:52:48.858563 PCI: 00:1c.5: enabled 0
1762 06:52:48.861134 PCI: 00:1c.6: enabled 0
1763 06:52:48.862695 PCI: 00:1c.7: enabled 0
1764 06:52:48.863130
1765 06:52:48.865851 PCI: 00:1d.0: enabled 1
1766 06:52:48.868429 PCI: 00:1d.1: enabled 0
1767 06:52:48.869989 PCI: 00:1d.2: enabled 0
1768 06:52:48.870249
1769 06:52:48.872427 PCI: 00:1d.3: enabled 0
1770 06:52:48.875149 PCI: 00:1d.4: enabled 0
1771 06:52:48.875839
1772 06:52:48.877860 PCI: 00:1e.0: enabled 0
1773 06:52:48.878114
1774 06:52:48.880010 PCI: 00:1e.1: enabled 0
1775 06:52:48.883151 PCI: 00:1e.2: enabled 0
1776 06:52:48.885297 PCI: 00:1e.3: enabled 0
1777 06:52:48.888038 PCI: 00:1f.0: enabled 1
1778 06:52:48.890068 PCI: 00:1f.1: enabled 0
1779 06:52:48.892869 PCI: 00:1f.2: enabled 0
1780 06:52:48.894448 PCI: 00:1f.3: enabled 1
1781 06:52:48.897626 PCI: 00:1f.4: enabled 1
1782 06:52:48.899818 PCI: 00:1f.5: enabled 1
1783 06:52:48.901916 PCI: 00:1f.6: enabled 1
1784 06:52:48.904581 USB0 port 0: enabled 1
1785 06:52:48.907089 I2C: 01:10: enabled 1
1786 06:52:48.909084 I2C: 01:10: enabled 1
1787 06:52:48.910726 I2C: 01:34: enabled 1
1788 06:52:48.911157
1789 06:52:48.913823 I2C: 02:2c: enabled 1
1790 06:52:48.915802 I2C: 03:50: enabled 1
1791 06:52:48.917949 PNP: 0c09.0: enabled 1
1792 06:52:48.920567 USB2 port 0: enabled 1
1793 06:52:48.922602 USB2 port 1: enabled 1
1794 06:52:48.925255 USB2 port 2: enabled 1
1795 06:52:48.927756 USB2 port 4: enabled 1
1796 06:52:48.929177 USB2 port 5: enabled 1
1797 06:52:48.932036 USB2 port 6: enabled 1
1798 06:52:48.934829 USB2 port 7: enabled 1
1799 06:52:48.936841 USB2 port 8: enabled 1
1800 06:52:48.937107
1801 06:52:48.939450 USB2 port 9: enabled 1
1802 06:52:48.941512 USB3 port 0: enabled 1
1803 06:52:48.944135 USB3 port 1: enabled 1
1804 06:52:48.946292 USB3 port 2: enabled 1
1805 06:52:48.948087 USB3 port 3: enabled 1
1806 06:52:48.951315 USB3 port 4: enabled 1
1807 06:52:48.952216 APIC: 02: enabled 1
1808 06:52:48.952655
1809 06:52:48.955414 PCI: 00:08.0: enabled 1
1810 06:52:48.957488 PCI: 00:14.2: enabled 1
1811 06:52:48.960283 PCI: 01:00.0: enabled 1
1812 06:52:48.962756 PCI: 02:00.0: enabled 1
1813 06:52:48.967944 Disabling ACPI via APMC:
1814 06:52:48.969940 done.
1815 06:52:48.973853 FMAP: area RW_ELOG found @ 1bf0000 (16384 bytes)
1816 06:52:48.978489 ELOG: NV offset 0x1bf0000 size 0x4000
1817 06:52:48.985934 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1818 06:52:48.992796 ELOG: Event(17) added with size 13 at 2023-01-10 06:52:48 UTC
1819 06:52:48.997494 POST: Unexpected post code in previous boot: 0x73
1820 06:52:49.004117 ELOG: Event(A3) added with size 11 at 2023-01-10 06:52:48 UTC
1821 06:52:49.009846 ELOG: Event(92) added with size 9 at 2023-01-10 06:52:48 UTC
1822 06:52:49.016462 ELOG: Event(93) added with size 9 at 2023-01-10 06:52:48 UTC
1823 06:52:49.022453 ELOG: Event(9A) added with size 9 at 2023-01-10 06:52:48 UTC
1824 06:52:49.028468 ELOG: Event(9E) added with size 10 at 2023-01-10 06:52:48 UTC
1825 06:52:49.035287 ELOG: Event(9F) added with size 14 at 2023-01-10 06:52:48 UTC
1826 06:52:49.041217 BS: BS_DEV_INIT times (us): entry 0 run 453577 exit 72510
1827 06:52:49.047180 ELOG: Event(A1) added with size 10 at 2023-01-10 06:52:48 UTC
1828 06:52:49.055745 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1829 06:52:49.061778 ELOG: Event(A0) added with size 9 at 2023-01-10 06:52:48 UTC
1830 06:52:49.065323 elog_add_boot_reason: Logged dev mode boot
1831 06:52:49.067814 Finalize devices...
1832 06:52:49.069895 PCI: 00:17.0 final
1833 06:52:49.071223 Devices finalized
1834 06:52:49.076624 FMAP: area RW_NVRAM found @ 1bfa000 (24576 bytes)
1835 06:52:49.083135 BS: BS_POST_DEVICE times (us): entry 24781 run 5938 exit 5367
1836 06:52:49.083406
1837 06:52:49.088681 BS: BS_OS_RESUME_CHECK times (us): entry 0 run 96 exit 0
1838 06:52:49.097624 disable_unused_touchscreen: VPD key 'touchscreen_hid' not found, default to ELAN900C
1839 06:52:49.102025 disable_unused_touchscreen: Disable ACPI0C50
1840 06:52:49.106652 disable_unused_touchscreen: Enable ELAN900C
1841 06:52:49.108691 CBFS @ 1d00000 size 300000
1842 06:52:49.115628 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1843 06:52:49.118938 CBFS: Locating 'fallback/dsdt.aml'
1844 06:52:49.122489 CBFS: Found @ offset 10b200 size 4448
1845 06:52:49.125726 CBFS @ 1d00000 size 300000
1846 06:52:49.126425
1847 06:52:49.132437 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1848 06:52:49.135177 CBFS: Locating 'fallback/slic'
1849 06:52:49.135446
1850 06:52:49.140605 CBFS: 'fallback/slic' not found.
1851 06:52:49.144154 ACPI: Writing ACPI tables at 89c0f000.
1852 06:52:49.145437 ACPI: * FACS
1853 06:52:49.145844
1854 06:52:49.147409 ACPI: * DSDT
1855 06:52:49.150739 Ramoops buffer: 0x100000@0x89b0e000.
1856 06:52:49.151183
1857 06:52:49.155851 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
1858 06:52:49.156115
1859 06:52:49.161264 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
1860 06:52:49.164161 ACPI: * FADT
1861 06:52:49.165498 SCI is IRQ9
1862 06:52:49.170224 ACPI: added table 1/32, length now 40
1863 06:52:49.171038 ACPI: * SSDT
1864 06:52:49.175487 Found 1 CPU(s) with 2 core(s) each.
1865 06:52:49.178767 Error: Could not locate 'wifi_sar' in VPD.
1866 06:52:49.179423
1867 06:52:49.183201 Error: failed from getting SAR limits!
1868 06:52:49.186595 \_SB.PCI0.WIFI: Intel WiFi PCI: 00:14.3
1869 06:52:49.191504 dw_i2c: bad counts. hcnt = -14 lcnt = 30
1870 06:52:49.195231 dw_i2c: bad counts. hcnt = -20 lcnt = 40
1871 06:52:49.199721 dw_i2c: bad counts. hcnt = -18 lcnt = 48
1872 06:52:49.203838 \_SB.PCI0.I2C0.H010: ELAN Touchscreen at I2C: 01:10
1873 06:52:49.209171 \_SB.PCI0.I2C0.D034: Melfas Touchscreen at I2C: 01:34
1874 06:52:49.209818
1875 06:52:49.214236 \_SB.PCI0.I2C1.D02C: ELAN Touchpad at I2C: 02:2c
1876 06:52:49.218840 \_SB.PCI0.I2C4.TPMI: I2C TPM at I2C: 03:50
1877 06:52:49.224197 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1878 06:52:49.230368 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-A Port 1 at USB2 port 1
1879 06:52:49.236409 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1880 06:52:49.237066
1881 06:52:49.243068 \_SB.PCI0.XHCI.RHUB.HS05: Right Type-A Port 2 at USB2 port 4
1882 06:52:49.246662 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1883 06:52:49.247061
1884 06:52:49.251694 \_SB.PCI0.XHCI.RHUB.HS07: WWAN at USB2 port 6
1885 06:52:49.252341
1886 06:52:49.256854 \_SB.PCI0.XHCI.RHUB.HS08: USH at USB2 port 7
1887 06:52:49.261047 \_SB.PCI0.XHCI.RHUB.HS09: Fingerprint at USB2 port 8
1888 06:52:49.266309 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1889 06:52:49.272317 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1890 06:52:49.278205 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-A Port 1 at USB3 port 1
1891 06:52:49.283500 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1892 06:52:49.289418 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 2 at USB3 port 3
1893 06:52:49.290039
1894 06:52:49.294828 \_SB.PCI0.XHCI.RHUB.SS05: WWAN at USB3 port 4
1895 06:52:49.298405 ACPI: added table 2/32, length now 44
1896 06:52:49.300216 ACPI: * MCFG
1897 06:52:49.303855 ACPI: added table 3/32, length now 48
1898 06:52:49.305129 ACPI: * TPM2
1899 06:52:49.307931 TPM2 log created at 89afe000
1900 06:52:49.308197
1901 06:52:49.312578 ACPI: added table 4/32, length now 52
1902 06:52:49.313405 ACPI: * MADT
1903 06:52:49.314831 SCI is IRQ9
1904 06:52:49.318890 ACPI: added table 5/32, length now 56
1905 06:52:49.321480 current = 89c14720
1906 06:52:49.323557 ACPI: * IGD OpRegion
1907 06:52:49.325673 GMA: Found VBT in CBFS
1908 06:52:49.328457 GMA: Found valid VBT in CBFS
1909 06:52:49.332274 ACPI: added table 6/32, length now 60
1910 06:52:49.333666 ACPI: * HPET
1911 06:52:49.337862 ACPI: added table 7/32, length now 64
1912 06:52:49.338396 ACPI: done.
1913 06:52:49.338993
1914 06:52:49.341723 ACPI tables: 30672 bytes.
1915 06:52:49.341987
1916 06:52:49.344519 smbios_write_tables: 89afd000
1917 06:52:49.346493 recv_ec_data: 0x01
1918 06:52:49.348715 Create SMBIOS type 17
1919 06:52:49.349151
1920 06:52:49.351805 PCI: 00:14.3 (Intel WiFi)
1921 06:52:49.352069
1922 06:52:49.355060 SMBIOS tables: 708 bytes.
1923 06:52:49.358368 Writing table forward entry at 0x00000500
1924 06:52:49.365074 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 461b
1925 06:52:49.367849 Writing coreboot table at 0x89c33000
1926 06:52:49.368317
1927 06:52:49.374489 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1928 06:52:49.378971 1. 0000000000001000-000000000009ffff: RAM
1929 06:52:49.383260 2. 00000000000a0000-00000000000fffff: RESERVED
1930 06:52:49.387791 3. 0000000000100000-0000000089afcfff: RAM
1931 06:52:49.388053
1932 06:52:49.393775 4. 0000000089afd000-0000000089c80fff: CONFIGURATION TABLES
1933 06:52:49.398086 5. 0000000089c81000-0000000089cdbfff: RAMSTAGE
1934 06:52:49.404825 6. 0000000089cdc000-0000000089ffffff: CONFIGURATION TABLES
1935 06:52:49.408865 7. 000000008a000000-000000008f7fffff: RESERVED
1936 06:52:49.413764 8. 00000000e0000000-00000000efffffff: RESERVED
1937 06:52:49.418814 9. 00000000fc000000-00000000fc000fff: RESERVED
1938 06:52:49.423711 10. 00000000fe000000-00000000fe00ffff: RESERVED
1939 06:52:49.427914 11. 00000000fed10000-00000000fed17fff: RESERVED
1940 06:52:49.432459 12. 00000000fed80000-00000000fed83fff: RESERVED
1941 06:52:49.437771 13. 00000000feda0000-00000000feda1fff: RESERVED
1942 06:52:49.442649 14. 0000000100000000-000000016e7fffff: RAM
1943 06:52:49.446787 Graphics framebuffer located at 0xc0000000
1944 06:52:49.449310 Passing 6 GPIOs to payload:
1945 06:52:49.453836 NAME | PORT | POLARITY | VALUE
1946 06:52:49.459659 write protect | 0x000000dc | high | high
1947 06:52:49.465147 recovery | 0x000000d5 | low | high
1948 06:52:49.470049 lid | undefined | high | high
1949 06:52:49.475149 power | undefined | high | low
1950 06:52:49.479984 oprom | undefined | high | low
1951 06:52:49.480385
1952 06:52:49.485979 EC in RW | undefined | high | low
1953 06:52:49.487479 recv_ec_data: 0x01
1954 06:52:49.487845
1955 06:52:49.488742 SKU ID: 3
1956 06:52:49.491813 CBFS @ 1d00000 size 300000
1957 06:52:49.497942 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1958 06:52:49.504307 Wrote coreboot table at: 89c33000, 0x5b4 bytes, checksum 2f4f
1959 06:52:49.507143 coreboot table: 1484 bytes.
1960 06:52:49.510352 IMD ROOT 0. 89fff000 00001000
1961 06:52:49.514259 IMD SMALL 1. 89ffe000 00001000
1962 06:52:49.517675 FSP MEMORY 2. 89d0e000 002f0000
1963 06:52:49.520353 CONSOLE 3. 89cee000 00020000
1964 06:52:49.523736 TIME STAMP 4. 89ced000 00000910
1965 06:52:49.526598 VBOOT WORK 5. 89cea000 00003000
1966 06:52:49.530133 VBOOT 6. 89ce9000 00000c0c
1967 06:52:49.533539 MRC DATA 7. 89ce7000 000018f0
1968 06:52:49.533809
1969 06:52:49.537506 ROMSTG STCK 8. 89ce6000 00000400
1970 06:52:49.540352 AFTER CAR 9. 89cdc000 0000a000
1971 06:52:49.543710 RAMSTAGE 10. 89c80000 0005c000
1972 06:52:49.547068 REFCODE 11. 89c4b000 00035000
1973 06:52:49.547329
1974 06:52:49.550412 SMM BACKUP 12. 89c3b000 00010000
1975 06:52:49.553582 COREBOOT 13. 89c33000 00008000
1976 06:52:49.556494 ACPI 14. 89c0f000 00024000
1977 06:52:49.556882
1978 06:52:49.559822 ACPI GNVS 15. 89c0e000 00001000
1979 06:52:49.560300
1980 06:52:49.563585 RAMOOPS 16. 89b0e000 00100000
1981 06:52:49.563856
1982 06:52:49.566347 TPM2 TCGLOG17. 89afe000 00010000
1983 06:52:49.569848 SMBIOS 18. 89afd000 00000800
1984 06:52:49.571332 IMD small region:
1985 06:52:49.571782
1986 06:52:49.575393 IMD ROOT 0. 89ffec00 00000400
1987 06:52:49.578552 FSP RUNTIME 1. 89ffebe0 00000004
1988 06:52:49.579163
1989 06:52:49.582427 POWER STATE 2. 89ffeba0 00000040
1990 06:52:49.583098
1991 06:52:49.585828 ROMSTAGE 3. 89ffeb80 00000004
1992 06:52:49.586592
1993 06:52:49.589400 MEM INFO 4. 89ffe9c0 000001a9
1994 06:52:49.592718 VPD 5. 89ffe980 00000031
1995 06:52:49.597078 COREBOOTFWD 6. 89ffe940 00000028
1996 06:52:49.599868 MTRR: Physical address space:
1997 06:52:49.605897 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1998 06:52:49.612193 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1999 06:52:49.618791 0x00000000000c0000 - 0x000000008b000000 size 0x8af40000 type 6
2000 06:52:49.624846 0x000000008b000000 - 0x00000000c0000000 size 0x35000000 type 0
2001 06:52:49.630470 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
2002 06:52:49.636838 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
2003 06:52:49.643535 0x0000000100000000 - 0x000000016e800000 size 0x6e800000 type 6
2004 06:52:49.647231 MTRR: Fixed MSR 0x250 0x0606060606060606
2005 06:52:49.651237 MTRR: Fixed MSR 0x258 0x0606060606060606
2006 06:52:49.651969
2007 06:52:49.655118 MTRR: Fixed MSR 0x259 0x0000000000000000
2008 06:52:49.655859
2009 06:52:49.659886 MTRR: Fixed MSR 0x268 0x0606060606060606
2010 06:52:49.663223 MTRR: Fixed MSR 0x269 0x0606060606060606
2011 06:52:49.667081 MTRR: Fixed MSR 0x26a 0x0606060606060606
2012 06:52:49.671868 MTRR: Fixed MSR 0x26b 0x0606060606060606
2013 06:52:49.672445
2014 06:52:49.675781 MTRR: Fixed MSR 0x26c 0x0606060606060606
2015 06:52:49.676488
2016 06:52:49.679880 MTRR: Fixed MSR 0x26d 0x0606060606060606
2017 06:52:49.683830 MTRR: Fixed MSR 0x26e 0x0606060606060606
2018 06:52:49.687728 MTRR: Fixed MSR 0x26f 0x0606060606060606
2019 06:52:49.691117 call enable_fixed_mtrr()
2020 06:52:49.694405 CPU physical address size: 39 bits
2021 06:52:49.698569 MTRR: default type WB/UC MTRR counts: 7/6.
2022 06:52:49.702526 MTRR: UC selected as default type.
2023 06:52:49.708924 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2024 06:52:49.714602 MTRR: 1 base 0x0000000080000000 mask 0x0000007ff8000000 type 6
2025 06:52:49.720742 MTRR: 2 base 0x0000000088000000 mask 0x0000007ffe000000 type 6
2026 06:52:49.727336 MTRR: 3 base 0x000000008a000000 mask 0x0000007fff000000 type 6
2027 06:52:49.733106 MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
2028 06:52:49.739532 MTRR: 5 base 0x0000000100000000 mask 0x0000007f80000000 type 6
2029 06:52:49.740197
2030 06:52:49.740283
2031 06:52:49.741105 MTRR check
2032 06:52:49.744149 Fixed MTRRs : Enabled
2033 06:52:49.746241 Variable MTRRs: Enabled
2034 06:52:49.746831
2035 06:52:49.746916
2036 06:52:49.750989 MTRR: Fixed MSR 0x250 0x0606060606060606
2037 06:52:49.754699 MTRR: Fixed MSR 0x258 0x0606060606060606
2038 06:52:49.758978 MTRR: Fixed MSR 0x259 0x0000000000000000
2039 06:52:49.762910 MTRR: Fixed MSR 0x268 0x0606060606060606
2040 06:52:49.767539 MTRR: Fixed MSR 0x269 0x0606060606060606
2041 06:52:49.770883 MTRR: Fixed MSR 0x26a 0x0606060606060606
2042 06:52:49.771150
2043 06:52:49.775142 MTRR: Fixed MSR 0x26b 0x0606060606060606
2044 06:52:49.779538 MTRR: Fixed MSR 0x26c 0x0606060606060606
2045 06:52:49.783568 MTRR: Fixed MSR 0x26d 0x0606060606060606
2046 06:52:49.787474 MTRR: Fixed MSR 0x26e 0x0606060606060606
2047 06:52:49.790957 MTRR: Fixed MSR 0x26f 0x0606060606060606
2048 06:52:49.797739 BS: BS_WRITE_TABLES times (us): entry 17200 run 490370 exit 150029
2049 06:52:49.800945 call enable_fixed_mtrr()
2050 06:52:49.803009 CBFS @ 1d00000 size 300000
2051 06:52:49.809702 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
2052 06:52:49.813271 CBFS: Locating 'fallback/payload'
2053 06:52:49.816082 CPU physical address size: 39 bits
2054 06:52:49.820569 CBFS: Found @ offset 1cf4c0 size 3a954
2055 06:52:49.824176 Checking segment from ROM address 0xffecf4f8
2056 06:52:49.824827
2057 06:52:49.828863 Checking segment from ROM address 0xffecf514
2058 06:52:49.833568 Loading segment from ROM address 0xffecf4f8
2059 06:52:49.833842
2060 06:52:49.835923 code (compression=0)
2061 06:52:49.844470 New segment dstaddr 0x30100018 memsize 0x26518f8 srcaddr 0xffecf530 filesize 0x3a91c
2062 06:52:49.845146
2063 06:52:49.853288 Loading Segment: addr: 0x30100018 memsz: 0x00000000026518f8 filesz: 0x000000000003a91c
2064 06:52:49.855008 it's not compressed!
2065 06:52:49.937737 [ 0x30100018, 3013a934, 0x32751910) <- ffecf530
2066 06:52:49.943926 Clearing Segment: addr: 0x000000003013a934 memsz: 0x0000000002616fdc
2067 06:52:49.953243 Loading segment from ROM address 0xffecf514
2068 06:52:49.954607 Entry Point 0x30100018
2069 06:52:49.955262
2070 06:52:49.957338 Loaded segments
2071 06:52:49.967743 Finalizing chipset.
2072 06:52:49.968424 Finalizing SMM.
2073 06:52:49.974610 BS: BS_PAYLOAD_LOAD times (us): entry 1 run 158874 exit 11952
2074 06:52:49.978736 mp_park_aps done after 0 msecs.
2075 06:52:49.982349 Jumping to boot code at 30100018(89c33000)
2076 06:52:49.991353 CPU0: stack: 89cca000 - 89ccb000, lowest used address 89ccaa9c, stack used: 1380 bytes
2077 06:52:49.992137
2078 06:52:49.992506
2079 06:52:49.992912
2080 06:52:49.994803 Starting depthcharge on sarien...
2081 06:52:49.995326
2082 06:52:49.997767 end: 2.2.3 depthcharge-start (duration 00:00:26) [common]
2083 06:52:49.998421 start: 2.2.4 bootloader-commands (timeout 00:04:34) [common]
2084 06:52:49.998974 Setting prompt string to ['sarien:']
2085 06:52:49.999480 bootloader-commands: Wait for prompt ['sarien:'] (timeout 00:04:34)
2086 06:52:50.002270 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2087 06:52:50.003041
2088 06:52:50.009835 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2089 06:52:50.010291
2090 06:52:50.018627 WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime!
2091 06:52:50.019088
2092 06:52:50.020785 BIOS MMAP details:
2093 06:52:50.021417
2094 06:52:50.022660 IFD Base Offset : 0x1000000
2095 06:52:50.023114
2096 06:52:50.026153 IFD End Offset : 0x2000000
2097 06:52:50.026594
2098 06:52:50.028886 MMAP Size : 0x1000000
2099 06:52:50.029446
2100 06:52:50.032214 MMAP Start : 0xff000000
2101 06:52:50.032992
2102 06:52:50.038988 Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff
2103 06:52:50.039441
2104 06:52:50.046018 Failed to find BH720 with VID/DID 1217:8620
2105 06:52:50.046475
2106 06:52:50.050322 New NVMe Controller 0x3214e050 @ 00:1d:04
2107 06:52:50.050786
2108 06:52:50.054294 New NVMe Controller 0x3214e118 @ 00:1d:00
2109 06:52:50.054742
2110 06:52:50.059842 The GBB signature is at 0x30000014 and is: 24 47 42 42
2111 06:52:50.060278
2112 06:52:50.066308 Wipe memory regions:
2113 06:52:50.067070
2114 06:52:50.070408 [0x00000000001000, 0x000000000a0000)
2115 06:52:50.070881
2116 06:52:50.073746 [0x00000000100000, 0x00000030000000)
2117 06:52:50.074182
2118 06:52:50.160345 [0x00000032751910, 0x00000089afd000)
2119 06:52:50.160845
2120 06:52:50.314257 [0x00000100000000, 0x0000016e800000)
2121 06:52:50.314767
2122 06:52:50.936545 R8152: Initializing
2123 06:52:50.937473
2124 06:52:50.938801 Version 9 (ocp_data = 6010)
2125 06:52:50.939236
2126 06:52:50.942830 R8152: Done initializing
2127 06:52:50.943372
2128 06:52:50.944717 Adding net device
2129 06:52:50.945190
2130 06:52:50.950217 [firmware-sarien-12200.B-collabora] Apr 9 2021 09:49:38
2131 06:52:50.950799
2132 06:52:50.951172
2133 06:52:50.951619
2134 06:52:50.952650 Setting prompt string to ['sarien:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2136 06:52:51.054268 sarien: tftpboot 192.168.201.1 8649874/tftp-deploy-_mojqj89/kernel/bzImage 8649874/tftp-deploy-_mojqj89/kernel/cmdline 8649874/tftp-deploy-_mojqj89/ramdisk/ramdisk.cpio.gz
2137 06:52:51.054872 Setting prompt string to 'Starting kernel'
2138 06:52:51.055309 Setting prompt string to ['Starting kernel']
2139 06:52:51.055676 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2140 06:52:51.056111 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:33)
2141 06:52:51.059242 tftpboot 192.168.201.1 8649874/tftp-deploy-_mojqj89/kernel/bzImage 8649874/tftp-deploy-_mojqj89/kernel/cmdline 8649874/tftp-deploy-_mojqj89/ramdisk/ramdisk.cpio.gz
2142 06:52:51.059681
2143 06:52:51.060032 Waiting for link
2144 06:52:51.060362
2145 06:52:51.258396 done.
2146 06:52:51.258972
2147 06:52:51.261166 MAC: 00:e0:4c:78:7f:db
2148 06:52:51.261636
2149 06:52:51.264593 Sending DHCP discover... done.
2150 06:52:51.265161
2151 06:52:51.267292 Waiting for reply... done.
2152 06:52:51.267756
2153 06:52:51.270699 Sending DHCP request... done.
2154 06:52:51.271183
2155 06:52:51.276778 Waiting for reply... done.
2156 06:52:51.277313
2157 06:52:51.278771 My ip is 192.168.201.103
2158 06:52:51.279212
2159 06:52:51.282104 The DHCP server ip is 192.168.201.1
2160 06:52:51.282978
2161 06:52:51.287624 TFTP server IP predefined by user: 192.168.201.1
2162 06:52:51.288428
2163 06:52:51.295214 Bootfile predefined by user: 8649874/tftp-deploy-_mojqj89/kernel/bzImage
2164 06:52:51.295661
2165 06:52:51.298483 Sending tftp read request... done.
2166 06:52:51.298949
2167 06:52:51.302447 Waiting for the transfer...
2168 06:52:51.303349
2169 06:52:51.611033 00000000 ################################################################
2170 06:52:51.611365
2171 06:52:51.882246 00080000 ################################################################
2172 06:52:51.882914
2173 06:52:52.146847 00100000 ################################################################
2174 06:52:52.147514
2175 06:52:52.411658 00180000 ################################################################
2176 06:52:52.411791
2177 06:52:52.654666 00200000 ################################################################
2178 06:52:52.655291
2179 06:52:52.915836 00280000 ################################################################
2180 06:52:52.916176
2181 06:52:53.167912 00300000 ################################################################
2182 06:52:53.168048
2183 06:52:53.436597 00380000 ################################################################
2184 06:52:53.436942
2185 06:52:53.682967 00400000 ################################################################
2186 06:52:53.683596
2187 06:52:53.941098 00480000 ################################################################
2188 06:52:53.941805
2189 06:52:54.187868 00500000 ################################################################
2190 06:52:54.188659
2191 06:52:54.437382 00580000 ################################################################
2192 06:52:54.437771
2193 06:52:54.710054 00600000 ################################################################
2194 06:52:54.710188
2195 06:52:54.966112 00680000 ################################################################
2196 06:52:54.966934
2197 06:52:55.073815 00700000 ############################# done.
2198 06:52:55.073945
2199 06:52:55.077188 The bootfile was 7573392 bytes long.
2200 06:52:55.077274
2201 06:52:55.080159 Sending tftp read request... done.
2202 06:52:55.080260
2203 06:52:55.083964 Waiting for the transfer...
2204 06:52:55.084042
2205 06:52:55.344431 00000000 ################################################################
2206 06:52:55.345054
2207 06:52:55.599269 00080000 ################################################################
2208 06:52:55.599640
2209 06:52:55.837477 00100000 ################################################################
2210 06:52:55.837686
2211 06:52:56.087228 00180000 ################################################################
2212 06:52:56.087885
2213 06:52:56.337823 00200000 ################################################################
2214 06:52:56.338198
2215 06:52:56.584554 00280000 ################################################################
2216 06:52:56.584933
2217 06:52:56.836370 00300000 ################################################################
2218 06:52:56.836744
2219 06:52:57.088848 00380000 ################################################################
2220 06:52:57.088987
2221 06:52:57.357191 00400000 ################################################################
2222 06:52:57.357361
2223 06:52:57.620066 00480000 ################################################################
2224 06:52:57.620442
2225 06:52:57.890243 00500000 ################################################################
2226 06:52:57.890620
2227 06:52:58.134286 00580000 ################################################################
2228 06:52:58.134789
2229 06:52:58.403215 00600000 ################################################################
2230 06:52:58.403622
2231 06:52:58.680503 00680000 ################################################################
2232 06:52:58.680645
2233 06:52:58.937080 00700000 ################################################################
2234 06:52:58.937496
2235 06:52:59.189596 00780000 ################################################################
2236 06:52:59.190362
2237 06:52:59.270271 00800000 ##################### done.
2238 06:52:59.270407
2239 06:52:59.274260 Sending tftp read request... done.
2240 06:52:59.274350
2241 06:52:59.276541 Waiting for the transfer...
2242 06:52:59.276626
2243 06:52:59.278987 00000000 # done.
2244 06:52:59.279075
2245 06:52:59.287760 Command line loaded dynamically from TFTP file: 8649874/tftp-deploy-_mojqj89/kernel/cmdline
2246 06:52:59.287857
2247 06:52:59.304072 The command line is: earlyprintk=uart8250,mmio32,0xde000000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2248 06:52:59.304808
2249 06:52:59.311585 Shutting down all USB controllers.
2250 06:52:59.312311
2251 06:52:59.314598 Removing current net device
2252 06:52:59.314680
2253 06:52:59.321071 EC: exit firmware mode
2254 06:52:59.321156
2255 06:52:59.323845 Finalizing coreboot
2256 06:52:59.323931
2257 06:52:59.330747 Exiting depthcharge with code 4 at timestamp: 16365645
2258 06:52:59.330902
2259 06:52:59.330994
2260 06:52:59.332077 Starting kernel ...
2261 06:52:59.332476 end: 2.2.4 bootloader-commands (duration 00:00:09) [common]
2262 06:52:59.332579 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2263 06:52:59.332659 Setting prompt string to ['Linux version [0-9]']
2264 06:52:59.332734 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2265 06:52:59.332807 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2266 06:52:59.333000
2267 06:52:59.333255
2268 06:52:59.333326
2269 06:52:59.333414
2271 06:57:24.332855 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2273 06:57:24.333179 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2275 06:57:24.333475 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2278 06:57:24.333872 end: 2 depthcharge-action (duration 00:05:00) [common]
2280 06:57:24.334106 Cleaning after the job
2281 06:57:24.334195 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8649874/tftp-deploy-_mojqj89/ramdisk
2282 06:57:24.334885 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8649874/tftp-deploy-_mojqj89/kernel
2283 06:57:24.335452 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8649874/tftp-deploy-_mojqj89/modules
2284 06:57:24.335646 start: 5.1 power-off (timeout 00:00:30) [common]
2285 06:57:24.335801 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-4305U-sarien-cbg-0' '--port=1' '--command=off'
2286 06:57:24.354912 >> Command sent successfully.
2287 06:57:24.356889 Returned 0 in 0 seconds
2288 06:57:24.457525 end: 5.1 power-off (duration 00:00:00) [common]
2290 06:57:24.457852 start: 5.2 read-feedback (timeout 00:10:00) [common]
2291 06:57:24.458100 Listened to connection for namespace 'common' for up to 1s
2292 06:57:25.461786 Finalising connection for namespace 'common'
2293 06:57:25.462006 Disconnecting from shell: Finalise
2294 06:57:25.562784 end: 5.2 read-feedback (duration 00:00:01) [common]
2295 06:57:25.562950 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8649874
2296 06:57:25.567919 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8649874
2297 06:57:25.568051 JobError: Your job cannot terminate cleanly.