Boot log: dell-latitude-5400-8665U-sarien

    1 06:52:24.045441  lava-dispatcher, installed at version: 2022.11
    2 06:52:24.045643  start: 0 validate
    3 06:52:24.045814  Start time: 2023-01-10 06:52:24.045805+00:00 (UTC)
    4 06:52:24.045958  Using caching service: 'http://localhost/cache/?uri=%s'
    5 06:52:24.046154  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230109.0%2Fx86%2Frootfs.cpio.gz exists
    6 06:52:24.060818  Using caching service: 'http://localhost/cache/?uri=%s'
    7 06:52:24.061008  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-799-g1229c813bcd9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 06:52:24.084633  Using caching service: 'http://localhost/cache/?uri=%s'
    9 06:52:24.084797  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-799-g1229c813bcd9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 06:52:24.099616  validate duration: 0.05
   12 06:52:24.099903  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 06:52:24.100007  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 06:52:24.100108  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 06:52:24.100219  Not decompressing ramdisk as can be used compressed.
   16 06:52:24.100307  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230109.0/x86/rootfs.cpio.gz
   17 06:52:24.100374  saving as /var/lib/lava/dispatcher/tmp/8649871/tftp-deploy-2qrx1g67/ramdisk/rootfs.cpio.gz
   18 06:52:24.100437  total size: 8423805 (8MB)
   19 06:52:24.113643  progress   0% (0MB)
   20 06:52:24.149667  progress   5% (0MB)
   21 06:52:24.174220  progress  10% (0MB)
   22 06:52:24.202834  progress  15% (1MB)
   23 06:52:24.232049  progress  20% (1MB)
   24 06:52:24.262646  progress  25% (2MB)
   25 06:52:24.288320  progress  30% (2MB)
   26 06:52:24.299649  progress  35% (2MB)
   27 06:52:24.314489  progress  40% (3MB)
   28 06:52:24.339850  progress  45% (3MB)
   29 06:52:24.374448  progress  50% (4MB)
   30 06:52:24.404594  progress  55% (4MB)
   31 06:52:24.434798  progress  60% (4MB)
   32 06:52:24.469743  progress  65% (5MB)
   33 06:52:24.505968  progress  70% (5MB)
   34 06:52:24.535070  progress  75% (6MB)
   35 06:52:24.568161  progress  80% (6MB)
   36 06:52:24.597112  progress  85% (6MB)
   37 06:52:24.627717  progress  90% (7MB)
   38 06:52:24.656250  progress  95% (7MB)
   39 06:52:24.677662  progress 100% (8MB)
   40 06:52:24.677939  8MB downloaded in 0.58s (13.91MB/s)
   41 06:52:24.678151  end: 1.1.1 http-download (duration 00:00:01) [common]
   43 06:52:24.678461  end: 1.1 download-retry (duration 00:00:01) [common]
   44 06:52:24.678568  start: 1.2 download-retry (timeout 00:09:59) [common]
   45 06:52:24.678671  start: 1.2.1 http-download (timeout 00:09:59) [common]
   46 06:52:24.678787  downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-799-g1229c813bcd9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 06:52:24.678867  saving as /var/lib/lava/dispatcher/tmp/8649871/tftp-deploy-2qrx1g67/kernel/bzImage
   48 06:52:24.678985  total size: 7573392 (7MB)
   49 06:52:24.679064  No compression specified
   50 06:52:24.682723  progress   0% (0MB)
   51 06:52:24.694614  progress   5% (0MB)
   52 06:52:24.709241  progress  10% (0MB)
   53 06:52:24.719404  progress  15% (1MB)
   54 06:52:24.734161  progress  20% (1MB)
   55 06:52:24.759918  progress  25% (1MB)
   56 06:52:24.799997  progress  30% (2MB)
   57 06:52:24.838626  progress  35% (2MB)
   58 06:52:24.879575  progress  40% (2MB)
   59 06:52:24.928578  progress  45% (3MB)
   60 06:52:24.993705  progress  50% (3MB)
   61 06:52:25.042262  progress  55% (4MB)
   62 06:52:25.082051  progress  60% (4MB)
   63 06:52:25.137512  progress  65% (4MB)
   64 06:52:25.176061  progress  70% (5MB)
   65 06:52:25.227002  progress  75% (5MB)
   66 06:52:25.271690  progress  80% (5MB)
   67 06:52:25.323847  progress  85% (6MB)
   68 06:52:25.369993  progress  90% (6MB)
   69 06:52:25.397549  progress  95% (6MB)
   70 06:52:25.431215  progress 100% (7MB)
   71 06:52:25.431438  7MB downloaded in 0.75s (9.60MB/s)
   72 06:52:25.431599  end: 1.2.1 http-download (duration 00:00:01) [common]
   74 06:52:25.431841  end: 1.2 download-retry (duration 00:00:01) [common]
   75 06:52:25.431932  start: 1.3 download-retry (timeout 00:09:59) [common]
   76 06:52:25.432019  start: 1.3.1 http-download (timeout 00:09:59) [common]
   77 06:52:25.432125  downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-799-g1229c813bcd9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 06:52:25.432194  saving as /var/lib/lava/dispatcher/tmp/8649871/tftp-deploy-2qrx1g67/modules/modules.tar
   79 06:52:25.432256  total size: 51848 (0MB)
   80 06:52:25.432317  Using unxz to decompress xz
   81 06:52:25.452319  progress  63% (0MB)
   82 06:52:25.453001  progress 100% (0MB)
   83 06:52:25.456162  0MB downloaded in 0.02s (2.07MB/s)
   84 06:52:25.456401  end: 1.3.1 http-download (duration 00:00:00) [common]
   86 06:52:25.456667  end: 1.3 download-retry (duration 00:00:00) [common]
   87 06:52:25.456765  start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
   88 06:52:25.456866  start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
   89 06:52:25.456953  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
   90 06:52:25.457042  start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
   91 06:52:25.457250  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8649871/lava-overlay-9gw_k5rt
   92 06:52:25.457360  makedir: /var/lib/lava/dispatcher/tmp/8649871/lava-overlay-9gw_k5rt/lava-8649871/bin
   93 06:52:25.457447  makedir: /var/lib/lava/dispatcher/tmp/8649871/lava-overlay-9gw_k5rt/lava-8649871/tests
   94 06:52:25.457530  makedir: /var/lib/lava/dispatcher/tmp/8649871/lava-overlay-9gw_k5rt/lava-8649871/results
   95 06:52:25.457639  Creating /var/lib/lava/dispatcher/tmp/8649871/lava-overlay-9gw_k5rt/lava-8649871/bin/lava-add-keys
   96 06:52:25.457770  Creating /var/lib/lava/dispatcher/tmp/8649871/lava-overlay-9gw_k5rt/lava-8649871/bin/lava-add-sources
   97 06:52:25.457889  Creating /var/lib/lava/dispatcher/tmp/8649871/lava-overlay-9gw_k5rt/lava-8649871/bin/lava-background-process-start
   98 06:52:25.458006  Creating /var/lib/lava/dispatcher/tmp/8649871/lava-overlay-9gw_k5rt/lava-8649871/bin/lava-background-process-stop
   99 06:52:25.458163  Creating /var/lib/lava/dispatcher/tmp/8649871/lava-overlay-9gw_k5rt/lava-8649871/bin/lava-common-functions
  100 06:52:25.458276  Creating /var/lib/lava/dispatcher/tmp/8649871/lava-overlay-9gw_k5rt/lava-8649871/bin/lava-echo-ipv4
  101 06:52:25.458401  Creating /var/lib/lava/dispatcher/tmp/8649871/lava-overlay-9gw_k5rt/lava-8649871/bin/lava-install-packages
  102 06:52:25.458517  Creating /var/lib/lava/dispatcher/tmp/8649871/lava-overlay-9gw_k5rt/lava-8649871/bin/lava-installed-packages
  103 06:52:25.458634  Creating /var/lib/lava/dispatcher/tmp/8649871/lava-overlay-9gw_k5rt/lava-8649871/bin/lava-os-build
  104 06:52:25.458750  Creating /var/lib/lava/dispatcher/tmp/8649871/lava-overlay-9gw_k5rt/lava-8649871/bin/lava-probe-channel
  105 06:52:25.458896  Creating /var/lib/lava/dispatcher/tmp/8649871/lava-overlay-9gw_k5rt/lava-8649871/bin/lava-probe-ip
  106 06:52:25.459067  Creating /var/lib/lava/dispatcher/tmp/8649871/lava-overlay-9gw_k5rt/lava-8649871/bin/lava-target-ip
  107 06:52:25.459264  Creating /var/lib/lava/dispatcher/tmp/8649871/lava-overlay-9gw_k5rt/lava-8649871/bin/lava-target-mac
  108 06:52:25.459393  Creating /var/lib/lava/dispatcher/tmp/8649871/lava-overlay-9gw_k5rt/lava-8649871/bin/lava-target-storage
  109 06:52:25.459515  Creating /var/lib/lava/dispatcher/tmp/8649871/lava-overlay-9gw_k5rt/lava-8649871/bin/lava-test-case
  110 06:52:25.459634  Creating /var/lib/lava/dispatcher/tmp/8649871/lava-overlay-9gw_k5rt/lava-8649871/bin/lava-test-event
  111 06:52:25.459783  Creating /var/lib/lava/dispatcher/tmp/8649871/lava-overlay-9gw_k5rt/lava-8649871/bin/lava-test-feedback
  112 06:52:25.459900  Creating /var/lib/lava/dispatcher/tmp/8649871/lava-overlay-9gw_k5rt/lava-8649871/bin/lava-test-raise
  113 06:52:25.460091  Creating /var/lib/lava/dispatcher/tmp/8649871/lava-overlay-9gw_k5rt/lava-8649871/bin/lava-test-reference
  114 06:52:25.460236  Creating /var/lib/lava/dispatcher/tmp/8649871/lava-overlay-9gw_k5rt/lava-8649871/bin/lava-test-runner
  115 06:52:25.460393  Creating /var/lib/lava/dispatcher/tmp/8649871/lava-overlay-9gw_k5rt/lava-8649871/bin/lava-test-set
  116 06:52:25.460522  Creating /var/lib/lava/dispatcher/tmp/8649871/lava-overlay-9gw_k5rt/lava-8649871/bin/lava-test-shell
  117 06:52:25.460650  Updating /var/lib/lava/dispatcher/tmp/8649871/lava-overlay-9gw_k5rt/lava-8649871/bin/lava-install-packages (oe)
  118 06:52:25.460801  Updating /var/lib/lava/dispatcher/tmp/8649871/lava-overlay-9gw_k5rt/lava-8649871/bin/lava-installed-packages (oe)
  119 06:52:25.460934  Creating /var/lib/lava/dispatcher/tmp/8649871/lava-overlay-9gw_k5rt/lava-8649871/environment
  120 06:52:25.461025  LAVA metadata
  121 06:52:25.461124  - LAVA_JOB_ID=8649871
  122 06:52:25.461206  - LAVA_DISPATCHER_IP=192.168.201.1
  123 06:52:25.461313  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
  124 06:52:25.461383  skipped lava-vland-overlay
  125 06:52:25.461461  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  126 06:52:25.461549  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
  127 06:52:25.461616  skipped lava-multinode-overlay
  128 06:52:25.461694  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  129 06:52:25.461778  start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
  130 06:52:25.461855  Loading test definitions
  131 06:52:25.461954  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
  132 06:52:25.462032  Using /lava-8649871 at stage 0
  133 06:52:25.462345  uuid=8649871_1.4.2.3.1 testdef=None
  134 06:52:25.462438  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  135 06:52:25.462531  start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
  136 06:52:25.463034  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  138 06:52:25.463294  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
  139 06:52:25.463870  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  141 06:52:25.464131  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
  142 06:52:25.464747  runner path: /var/lib/lava/dispatcher/tmp/8649871/lava-overlay-9gw_k5rt/lava-8649871/0/tests/0_dmesg test_uuid 8649871_1.4.2.3.1
  143 06:52:25.464903  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  145 06:52:25.465142  start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
  146 06:52:25.465216  Using /lava-8649871 at stage 1
  147 06:52:25.465463  uuid=8649871_1.4.2.3.5 testdef=None
  148 06:52:25.465555  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  149 06:52:25.465645  start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
  150 06:52:25.466132  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  152 06:52:25.466364  start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
  153 06:52:25.466936  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  155 06:52:25.467181  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
  156 06:52:25.467726  runner path: /var/lib/lava/dispatcher/tmp/8649871/lava-overlay-9gw_k5rt/lava-8649871/1/tests/1_bootrr test_uuid 8649871_1.4.2.3.5
  157 06:52:25.467868  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  159 06:52:25.468081  Creating lava-test-runner.conf files
  160 06:52:25.468147  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8649871/lava-overlay-9gw_k5rt/lava-8649871/0 for stage 0
  161 06:52:25.468230  - 0_dmesg
  162 06:52:25.468305  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8649871/lava-overlay-9gw_k5rt/lava-8649871/1 for stage 1
  163 06:52:25.468389  - 1_bootrr
  164 06:52:25.468481  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  165 06:52:25.468572  start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
  166 06:52:25.475061  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  167 06:52:25.475179  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
  168 06:52:25.475272  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  169 06:52:25.475360  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  170 06:52:25.475448  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
  171 06:52:25.661766  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  172 06:52:25.662180  start: 1.4.4 extract-modules (timeout 00:09:58) [common]
  173 06:52:25.662295  extracting modules file /var/lib/lava/dispatcher/tmp/8649871/tftp-deploy-2qrx1g67/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8649871/extract-overlay-ramdisk-d1d0sdk4/ramdisk
  174 06:52:25.666773  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  175 06:52:25.666890  start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
  176 06:52:25.666977  [common] Applying overlay /var/lib/lava/dispatcher/tmp/8649871/compress-overlay-nuffr716/overlay-1.4.2.4.tar.gz to ramdisk
  177 06:52:25.667053  [common] Applying overlay /var/lib/lava/dispatcher/tmp/8649871/compress-overlay-nuffr716/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8649871/extract-overlay-ramdisk-d1d0sdk4/ramdisk
  178 06:52:25.670832  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  179 06:52:25.670941  start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
  180 06:52:25.671035  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  181 06:52:25.671128  start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
  182 06:52:25.671206  Building ramdisk /var/lib/lava/dispatcher/tmp/8649871/extract-overlay-ramdisk-d1d0sdk4/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8649871/extract-overlay-ramdisk-d1d0sdk4/ramdisk
  183 06:52:25.734865  >> 48119 blocks

  184 06:52:26.506820  rename /var/lib/lava/dispatcher/tmp/8649871/extract-overlay-ramdisk-d1d0sdk4/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8649871/tftp-deploy-2qrx1g67/ramdisk/ramdisk.cpio.gz
  185 06:52:26.507237  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  186 06:52:26.507376  start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
  187 06:52:26.507501  start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
  188 06:52:26.507648  No mkimage arch provided, not using FIT.
  189 06:52:26.507760  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  190 06:52:26.507850  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  191 06:52:26.507953  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  192 06:52:26.508056  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
  193 06:52:26.508138  No LXC device requested
  194 06:52:26.508235  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  195 06:52:26.508331  start: 1.6 deploy-device-env (timeout 00:09:58) [common]
  196 06:52:26.508419  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  197 06:52:26.508508  Checking files for TFTP limit of 4294967296 bytes.
  198 06:52:26.508921  end: 1 tftp-deploy (duration 00:00:02) [common]
  199 06:52:26.509036  start: 2 depthcharge-action (timeout 00:05:00) [common]
  200 06:52:26.509135  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  201 06:52:26.509267  substitutions:
  202 06:52:26.509342  - {DTB}: None
  203 06:52:26.509412  - {INITRD}: 8649871/tftp-deploy-2qrx1g67/ramdisk/ramdisk.cpio.gz
  204 06:52:26.509478  - {KERNEL}: 8649871/tftp-deploy-2qrx1g67/kernel/bzImage
  205 06:52:26.509541  - {LAVA_MAC}: None
  206 06:52:26.509601  - {PRESEED_CONFIG}: None
  207 06:52:26.509662  - {PRESEED_LOCAL}: None
  208 06:52:26.509722  - {RAMDISK}: 8649871/tftp-deploy-2qrx1g67/ramdisk/ramdisk.cpio.gz
  209 06:52:26.509781  - {ROOT_PART}: None
  210 06:52:26.509839  - {ROOT}: None
  211 06:52:26.509896  - {SERVER_IP}: 192.168.201.1
  212 06:52:26.509974  - {TEE}: None
  213 06:52:26.510076  Parsed boot commands:
  214 06:52:26.510162  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  215 06:52:26.510337  Parsed boot commands: tftpboot 192.168.201.1 8649871/tftp-deploy-2qrx1g67/kernel/bzImage 8649871/tftp-deploy-2qrx1g67/kernel/cmdline 8649871/tftp-deploy-2qrx1g67/ramdisk/ramdisk.cpio.gz
  216 06:52:26.510437  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  217 06:52:26.510544  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  218 06:52:26.510649  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  219 06:52:26.510744  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  220 06:52:26.510818  Not connected, no need to disconnect.
  221 06:52:26.510898  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  222 06:52:26.510987  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  223 06:52:26.511063  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost dell-latitude-5400-8665U-sarien-cbg-4'
  224 06:52:26.513763  Setting prompt string to ['lava-test: # ']
  225 06:52:26.514096  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  226 06:52:26.514212  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  227 06:52:26.514358  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  228 06:52:26.514487  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  229 06:52:26.514689  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-4' '--port=1' '--command=reboot'
  230 06:52:26.535120  >> Command sent successfully.

  231 06:52:26.537283  Returned 0 in 0 seconds
  232 06:52:26.638138  end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
  234 06:52:26.638916  end: 2.2.2 reset-device (duration 00:00:00) [common]
  235 06:52:26.639066  start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
  236 06:52:26.639192  Setting prompt string to 'Starting depthcharge on sarien...'
  237 06:52:26.639296  Changing prompt to 'Starting depthcharge on sarien...'
  238 06:52:26.639405  depthcharge-start: Wait for prompt Starting depthcharge on sarien... (timeout 00:05:00)
  239 06:52:26.639773  [Enter `^Ec?' for help]
  240 06:52:41.762780  
  241 06:52:41.763125  
  242 06:52:41.763205  
  243 06:52:41.771694  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
  244 06:52:41.776573  CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz
  245 06:52:41.780511  CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
  246 06:52:41.780772  
  247 06:52:41.785827  CPU: AES supported, TXT supported, VT supported
  248 06:52:41.786074  
  249 06:52:41.790405  MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)
  250 06:52:41.790666  
  251 06:52:41.796450  PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
  252 06:52:41.801676  IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1
  253 06:52:41.804474  VBOOT: Loading verstage.
  254 06:52:41.807823  CBFS @ 1d00000 size 300000
  255 06:52:41.813832  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
  256 06:52:41.817014  CBFS: Locating 'fallback/verstage'
  257 06:52:41.817279  
  258 06:52:41.820843  CBFS: Found @ offset 10f6c0 size 1435c
  259 06:52:41.821115  
  260 06:52:41.837920  
  261 06:52:41.838067  
  262 06:52:41.846174  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
  263 06:52:41.853516  Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
  264 06:52:41.854207  
  265 06:52:41.856339  done! DID_VID 0x00281ae0
  266 06:52:41.858194  TPM ready after 0 ms
  267 06:52:41.858516  
  268 06:52:41.862505  cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
  269 06:52:41.927266  tlcl_send_startup: Startup return code is 0
  270 06:52:41.927633  
  271 06:52:41.929527  TPM: setup succeeded
  272 06:52:41.929847  
  273 06:52:41.948220  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
  274 06:52:41.952132  Checking cr50 for recovery request
  275 06:52:41.961419  Phase 1
  276 06:52:41.961724  
  277 06:52:41.966352  FMAP: Found "FLASH" version 1.1 at 1c10000.
  278 06:52:41.971528  FMAP: base = fe000000 size = 2000000 #areas = 37
  279 06:52:41.975787  FMAP: area GBB found @ 1c11000 (978944 bytes)
  280 06:52:41.976058  
  281 06:52:41.982815  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
  282 06:52:41.983572  Phase 2
  283 06:52:41.984027  
  284 06:52:41.984632  Phase 3
  285 06:52:41.984886  
  286 06:52:41.989924  FMAP: area GBB found @ 1c11000 (978944 bytes)
  287 06:52:41.996874  VB2:vb2_report_dev_firmware() This is developer signed firmware
  288 06:52:42.001449  FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
  289 06:52:42.006830  FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
  290 06:52:42.007100  
  291 06:52:42.012646  VB2:vb2_verify_keyblock() Checking key block signature...
  292 06:52:42.012921  
  293 06:52:42.027691  FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
  294 06:52:42.032364  FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
  295 06:52:42.036939  VB2:vb2_verify_fw_preamble() Verifying preamble.
  296 06:52:42.037230  
  297 06:52:42.040691  Phase 4
  298 06:52:42.046318  FMAP: area FW_MAIN_B found @ 1960000 (2555840 bytes)
  299 06:52:42.052706  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
  300 06:52:42.223543  VB2:vb2_rsa_verify_digest() Digest check failed!
  301 06:52:42.224164  
  302 06:52:42.228242  VB2:vb2_fail() Need recovery, reason: 0x1b / 0x7
  303 06:52:42.229542  Saving nvdata
  304 06:52:42.230310  
  305 06:52:42.234330  Reboot requested (10020007)
  306 06:52:42.236110  board_reset() called!
  307 06:52:42.238079  full_reset() called!
  308 06:52:46.861302  
  309 06:52:46.861930  
  310 06:52:46.862028  
  311 06:52:46.870556  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
  312 06:52:46.875209  CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz
  313 06:52:46.879107  CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
  314 06:52:46.884276  CPU: AES supported, TXT supported, VT supported
  315 06:52:46.889355  MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)
  316 06:52:46.894546  PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
  317 06:52:46.900186  IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1
  318 06:52:46.903093  VBOOT: Loading verstage.
  319 06:52:46.903403  
  320 06:52:46.906786  CBFS @ 1d00000 size 300000
  321 06:52:46.912603  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
  322 06:52:46.916503  CBFS: Locating 'fallback/verstage'
  323 06:52:46.919592  CBFS: Found @ offset 10f6c0 size 1435c
  324 06:52:46.920276  
  325 06:52:46.934397  
  326 06:52:46.934725  
  327 06:52:46.934836  
  328 06:52:46.942465  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
  329 06:52:46.943244  
  330 06:52:46.950348  Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
  331 06:52:47.074065  .done! DID_VID 0x00281ae0
  332 06:52:47.076534  TPM ready after 0 ms
  333 06:52:47.080150  cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
  334 06:52:47.145428  tlcl_send_startup: Startup return code is 0
  335 06:52:47.147791  TPM: setup succeeded
  336 06:52:47.166284  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
  337 06:52:47.169595  Checking cr50 for recovery request
  338 06:52:47.179551  Phase 1
  339 06:52:47.184619  FMAP: Found "FLASH" version 1.1 at 1c10000.
  340 06:52:47.188897  FMAP: base = fe000000 size = 2000000 #areas = 37
  341 06:52:47.193554  FMAP: area GBB found @ 1c11000 (978944 bytes)
  342 06:52:47.194203  
  343 06:52:47.200720  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
  344 06:52:47.206941  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
  345 06:52:47.207623  
  346 06:52:47.210347  Recovery requested (1009000e)
  347 06:52:47.211503  Saving nvdata
  348 06:52:47.228024  tlcl_extend: response is 0
  349 06:52:47.243651  tlcl_extend: response is 0
  350 06:52:47.247463  CBFS @ 1d00000 size 300000
  351 06:52:47.253951  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
  352 06:52:47.257406  CBFS: Locating 'fallback/romstage'
  353 06:52:47.260407  CBFS: Found @ offset 80 size 15b2c
  354 06:52:47.261835  
  355 06:52:47.262138  
  356 06:52:47.262216  
  357 06:52:47.270686  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 romstage starting (log level: 8)...
  358 06:52:47.275150  pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
  359 06:52:47.275570  
  360 06:52:47.280094  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
  361 06:52:47.283848  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
  362 06:52:47.284126  
  363 06:52:47.288047  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
  364 06:52:47.292403  gpe0_sts[3]: 00004000 gpe0_en[3]: 00000000
  365 06:52:47.292754  
  366 06:52:47.294677  TCO_STS:   0000 0004
  367 06:52:47.297683  GEN_PMCON: d0015209 00002200
  368 06:52:47.301124  GBLRST_CAUSE: 00000000 00000000
  369 06:52:47.303229  prev_sleep_state 5
  370 06:52:47.306601  Boot Count incremented to 18432
  371 06:52:47.309647  CBFS @ 1d00000 size 300000
  372 06:52:47.315893  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
  373 06:52:47.318971  CBFS: Locating 'fspm.bin'
  374 06:52:47.321969  CBFS: Found @ offset 60fc0 size 70000
  375 06:52:47.328403  FMAP: Found "FLASH" version 1.1 at 1c10000.
  376 06:52:47.332727  FMAP: base = fe000000 size = 2000000 #areas = 37
  377 06:52:47.333010  
  378 06:52:47.338553  FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
  379 06:52:47.344621  Probing TPM I2C: done! DID_VID 0x00281ae0
  380 06:52:47.347598  Locality already claimed
  381 06:52:47.347875  
  382 06:52:47.350428  cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
  383 06:52:47.351271  
  384 06:52:47.370872  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
  385 06:52:47.376841  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
  386 06:52:47.379703  MRC cache found, size 18e0
  387 06:52:47.382097  bootmode is set to :2
  388 06:52:47.475276  CBMEM:
  389 06:52:47.478785  IMD: root @ 89fff000 254 entries.
  390 06:52:47.482139  IMD: root @ 89ffec00 62 entries.
  391 06:52:47.482413  
  392 06:52:47.484611  External stage cache:
  393 06:52:47.485308  
  394 06:52:47.488145  IMD: root @ 8abff000 254 entries.
  395 06:52:47.491330  IMD: root @ 8abfec00 62 entries.
  396 06:52:47.492043  
  397 06:52:47.497785  VBOOT: copying vboot_working_data (12288 bytes) to CBMEM...
  398 06:52:47.501414  creating vboot_handoff structure
  399 06:52:47.521967  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
  400 06:52:47.537561  tlcl_write: response is 0
  401 06:52:47.538319  
  402 06:52:47.556300  src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
  403 06:52:47.556700  
  404 06:52:47.560749  MRC: TPM MRC hash updated successfully.
  405 06:52:47.561917  1 DIMMs found
  406 06:52:47.562373  
  407 06:52:47.564845  top_of_ram = 0x8a000000
  408 06:52:47.570389  MTRR Range: Start=89000000 End=8a000000 (Size 1000000)
  409 06:52:47.574583  MTRR Range: Start=ff000000 End=0 (Size 1000000)
  410 06:52:47.574981  
  411 06:52:47.577510  CBFS @ 1d00000 size 300000
  412 06:52:47.584202  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
  413 06:52:47.587657  CBFS: Locating 'fallback/postcar'
  414 06:52:47.591151  CBFS: Found @ offset 107000 size 41a4
  415 06:52:47.597373  Decompressing stage fallback/postcar @ 0x89cdcfc0 (33360 bytes)
  416 06:52:47.607363  Loading module at 89cdd000 with entry 89cdd000. filesize: 0x3f50 memsize: 0x8210
  417 06:52:47.607651  
  418 06:52:47.612754  Processing 126 relocs. Offset value of 0x87cdd000
  419 06:52:47.613031  
  420 06:52:47.615084  
  421 06:52:47.615744  
  422 06:52:47.616021  
  423 06:52:47.624101  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 postcar starting (log level: 8)...
  424 06:52:47.627115  CBFS @ 1d00000 size 300000
  425 06:52:47.627666  
  426 06:52:47.632966  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
  427 06:52:47.633248  
  428 06:52:47.636595  CBFS: Locating 'fallback/ramstage'
  429 06:52:47.640435  CBFS: Found @ offset 458c0 size 1a8a8
  430 06:52:47.640713  
  431 06:52:47.647762  Decompressing stage fallback/ramstage @ 0x89c80fc0 (372256 bytes)
  432 06:52:47.675905  Loading module at 89c81000 with entry 89c81000. filesize: 0x400e0 memsize: 0x5ade0
  433 06:52:47.676249  
  434 06:52:47.680973  Processing 3754 relocs. Offset value of 0x88e81000
  435 06:52:47.681285  
  436 06:52:47.687337  
  437 06:52:47.687645  
  438 06:52:47.687744  
  439 06:52:47.695625  coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 ramstage starting (log level: 8)...
  440 06:52:47.695932  
  441 06:52:47.700784  FMAP: Found "FLASH" version 1.1 at 1c10000.
  442 06:52:47.705124  FMAP: base = fe000000 size = 2000000 #areas = 37
  443 06:52:47.710654  FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
  444 06:52:47.714778  WARNING: RO_VPD is uninitialized or empty.
  445 06:52:47.715093  
  446 06:52:47.719589  FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
  447 06:52:47.723678  FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
  448 06:52:47.725383  Normal boot.
  449 06:52:47.732507  BS: BS_PRE_DEVICE times (us): entry 0 run 58 exit 1160
  450 06:52:47.734946  CBFS @ 1d00000 size 300000
  451 06:52:47.741291  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
  452 06:52:47.744865  CBFS: Locating 'cpu_microcode_blob.bin'
  453 06:52:47.749098  CBFS: Found @ offset 15c40 size 2fc00
  454 06:52:47.753407  microcode: sig=0x806ec pf=0x80 revision=0xb7
  455 06:52:47.755588  Skip microcode update
  456 06:52:47.758967  CBFS @ 1d00000 size 300000
  457 06:52:47.764341  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
  458 06:52:47.766836  CBFS: Locating 'fsps.bin'
  459 06:52:47.767141  
  460 06:52:47.770891  CBFS: Found @ offset d1fc0 size 35000
  461 06:52:47.771196  
  462 06:52:47.805978  Detected 4 core, 8 thread CPU.
  463 06:52:47.808501  Setting up SMI for CPU
  464 06:52:47.810292  IED base = 0x8ac00000
  465 06:52:47.810592  
  466 06:52:47.812177  IED size = 0x00400000
  467 06:52:47.812453  
  468 06:52:47.815549  Will perform SMM setup.
  469 06:52:47.820006  CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz.
  470 06:52:47.820310  
  471 06:52:47.827759  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
  472 06:52:47.828071  
  473 06:52:47.832488  Processing 16 relocs. Offset value of 0x00030000
  474 06:52:47.832798  
  475 06:52:47.835921  Attempting to start 7 APs
  476 06:52:47.839986  Waiting for 10ms after sending INIT.
  477 06:52:47.840260  
  478 06:52:47.855493  Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
  479 06:52:47.855782  done.
  480 06:52:47.856040  
  481 06:52:47.857988  AP: slot 6 apic_id 4.
  482 06:52:47.858312  
  483 06:52:47.860048  AP: slot 7 apic_id 5.
  484 06:52:47.860713  
  485 06:52:47.864332  Waiting for 2nd SIPI to complete...done.
  486 06:52:47.864601  
  487 06:52:47.867122  AP: slot 1 apic_id 2.
  488 06:52:47.868662  AP: slot 4 apic_id 3.
  489 06:52:47.869019  
  490 06:52:47.871093  AP: slot 2 apic_id 6.
  491 06:52:47.873301  AP: slot 5 apic_id 7.
  492 06:52:47.881343  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
  493 06:52:47.886439  Processing 13 relocs. Offset value of 0x00038000
  494 06:52:47.892360  SMM Module: stub loaded at 00038000. Will call 89c9b6bd(00000000)
  495 06:52:47.892724  
  496 06:52:47.897053  Installing SMM handler to 0x8a000000
  497 06:52:47.904032  Loading module at 8a010000 with entry 8a010a27. filesize: 0xa988 memsize: 0xfa40
  498 06:52:47.910241  Processing 867 relocs. Offset value of 0x8a010000
  499 06:52:47.910529  
  500 06:52:47.917841  Loading module at 8a008000 with entry 8a008000. filesize: 0x1a8 memsize: 0x1a8
  501 06:52:47.918220  
  502 06:52:47.922596  Processing 13 relocs. Offset value of 0x8a008000
  503 06:52:47.922874  
  504 06:52:47.928675  SMM Module: placing jmp sequence at 8a007c00 rel16 0x03fd
  505 06:52:47.929434  
  506 06:52:47.934539  SMM Module: placing jmp sequence at 8a007800 rel16 0x07fd
  507 06:52:47.940144  SMM Module: placing jmp sequence at 8a007400 rel16 0x0bfd
  508 06:52:47.945586  SMM Module: placing jmp sequence at 8a007000 rel16 0x0ffd
  509 06:52:47.945863  
  510 06:52:47.951419  SMM Module: placing jmp sequence at 8a006c00 rel16 0x13fd
  511 06:52:47.957604  SMM Module: placing jmp sequence at 8a006800 rel16 0x17fd
  512 06:52:47.962744  SMM Module: placing jmp sequence at 8a006400 rel16 0x1bfd
  513 06:52:47.963032  
  514 06:52:47.969572  SMM Module: stub loaded at 8a008000. Will call 8a010a27(00000000)
  515 06:52:47.973097  Clearing SMI status registers
  516 06:52:47.973394  
  517 06:52:47.974476  SMI_STS: PM1 
  518 06:52:47.976957  PM1_STS: WAK PWRBTN 
  519 06:52:47.979008  TCO_STS: BOOT SECOND_TO 
  520 06:52:47.981728  GPE0 STD STS: eSPI 
  521 06:52:47.984002  New SMBASE 0x8a000000
  522 06:52:47.986178  In relocation handler: CPU 0
  523 06:52:47.986462  
  524 06:52:47.990372  New SMBASE=0x8a000000 IEDBASE=0x8ac00000
  525 06:52:47.995233  Writing SMRR. base = 0x8a000006, mask=0xff000800
  526 06:52:47.997758  Relocation complete.
  527 06:52:47.999534  New SMBASE 0x89fff400
  528 06:52:47.999821  
  529 06:52:48.003050  In relocation handler: CPU 3
  530 06:52:48.006887  New SMBASE=0x89fff400 IEDBASE=0x8ac00000
  531 06:52:48.012041  Writing SMRR. base = 0x8a000006, mask=0xff000800
  532 06:52:48.014079  Relocation complete.
  533 06:52:48.015922  New SMBASE 0x89fff800
  534 06:52:48.018979  In relocation handler: CPU 2
  535 06:52:48.022937  New SMBASE=0x89fff800 IEDBASE=0x8ac00000
  536 06:52:48.027666  Writing SMRR. base = 0x8a000006, mask=0xff000800
  537 06:52:48.027946  
  538 06:52:48.029888  Relocation complete.
  539 06:52:48.030638  
  540 06:52:48.032720  New SMBASE 0x89ffec00
  541 06:52:48.035254  In relocation handler: CPU 5
  542 06:52:48.039288  New SMBASE=0x89ffec00 IEDBASE=0x8ac00000
  543 06:52:48.044206  Writing SMRR. base = 0x8a000006, mask=0xff000800
  544 06:52:48.046652  Relocation complete.
  545 06:52:48.048371  New SMBASE 0x89ffe400
  546 06:52:48.048641  
  547 06:52:48.051533  In relocation handler: CPU 7
  548 06:52:48.055897  New SMBASE=0x89ffe400 IEDBASE=0x8ac00000
  549 06:52:48.060387  Writing SMRR. base = 0x8a000006, mask=0xff000800
  550 06:52:48.060665  
  551 06:52:48.062809  Relocation complete.
  552 06:52:48.063087  
  553 06:52:48.064853  New SMBASE 0x89ffe800
  554 06:52:48.067621  In relocation handler: CPU 6
  555 06:52:48.071772  New SMBASE=0x89ffe800 IEDBASE=0x8ac00000
  556 06:52:48.076610  Writing SMRR. base = 0x8a000006, mask=0xff000800
  557 06:52:48.078717  Relocation complete.
  558 06:52:48.081409  New SMBASE 0x89fffc00
  559 06:52:48.081676  
  560 06:52:48.084491  In relocation handler: CPU 1
  561 06:52:48.087940  New SMBASE=0x89fffc00 IEDBASE=0x8ac00000
  562 06:52:48.088246  
  563 06:52:48.093658  Writing SMRR. base = 0x8a000006, mask=0xff000800
  564 06:52:48.095048  Relocation complete.
  565 06:52:48.097919  New SMBASE 0x89fff000
  566 06:52:48.101150  In relocation handler: CPU 4
  567 06:52:48.104785  New SMBASE=0x89fff000 IEDBASE=0x8ac00000
  568 06:52:48.109244  Writing SMRR. base = 0x8a000006, mask=0xff000800
  569 06:52:48.111249  Relocation complete.
  570 06:52:48.111550  
  571 06:52:48.113451  Initializing CPU #0
  572 06:52:48.117176  CPU: vendor Intel device 806ec
  573 06:52:48.120412  CPU: family 06, model 8e, stepping 0c
  574 06:52:48.121319  
  575 06:52:48.123608  Clearing out pending MCEs
  576 06:52:48.127624  Setting up local APIC... apic_id: 0x00 done.
  577 06:52:48.130656  Turbo is available but hidden
  578 06:52:48.133599  Turbo has been enabled
  579 06:52:48.134976  VMX status: enabled
  580 06:52:48.138886  IA32_FEATURE_CONTROL status: locked
  581 06:52:48.140815  Skip microcode update
  582 06:52:48.141094  
  583 06:52:48.142867  CPU #0 initialized
  584 06:52:48.143132  
  585 06:52:48.145436  Initializing CPU #3
  586 06:52:48.147416  Initializing CPU #5
  587 06:52:48.149102  Initializing CPU #2
  588 06:52:48.152321  CPU: vendor Intel device 806ec
  589 06:52:48.156003  CPU: family 06, model 8e, stepping 0c
  590 06:52:48.159016  CPU: vendor Intel device 806ec
  591 06:52:48.159566  
  592 06:52:48.163481  CPU: family 06, model 8e, stepping 0c
  593 06:52:48.163782  
  594 06:52:48.165892  Clearing out pending MCEs
  595 06:52:48.166187  
  596 06:52:48.168145  Clearing out pending MCEs
  597 06:52:48.173057  Setting up local APIC...Initializing CPU #4
  598 06:52:48.175284  Initializing CPU #1
  599 06:52:48.178129  CPU: vendor Intel device 806ec
  600 06:52:48.181685  CPU: family 06, model 8e, stepping 0c
  601 06:52:48.184736  CPU: vendor Intel device 806ec
  602 06:52:48.188598  CPU: family 06, model 8e, stepping 0c
  603 06:52:48.188875  
  604 06:52:48.191470  Clearing out pending MCEs
  605 06:52:48.193540  Clearing out pending MCEs
  606 06:52:48.203556  Setting up local APIC...Setting up local APIC...Setting up local APIC... apic_id: 0x07 done.
  607 06:52:48.206424  CPU: vendor Intel device 806ec
  608 06:52:48.210251  CPU: family 06, model 8e, stepping 0c
  609 06:52:48.212244  Clearing out pending MCEs
  610 06:52:48.215022  VMX status: enabled
  611 06:52:48.216850   apic_id: 0x06 done.
  612 06:52:48.217144  
  613 06:52:48.220069  IA32_FEATURE_CONTROL status: locked
  614 06:52:48.222765  VMX status: enabled
  615 06:52:48.224618  Skip microcode update
  616 06:52:48.224933  
  617 06:52:48.228262  IA32_FEATURE_CONTROL status: locked
  618 06:52:48.228542  
  619 06:52:48.229816  CPU #5 initialized
  620 06:52:48.230099  
  621 06:52:48.231934  Skip microcode update
  622 06:52:48.232593  
  623 06:52:48.234454   apic_id: 0x03 done.
  624 06:52:48.235298  
  625 06:52:48.237134   apic_id: 0x02 done.
  626 06:52:48.238974  VMX status: enabled
  627 06:52:48.240459  VMX status: enabled
  628 06:52:48.243964  IA32_FEATURE_CONTROL status: locked
  629 06:52:48.247600  IA32_FEATURE_CONTROL status: locked
  630 06:52:48.249818  Skip microcode update
  631 06:52:48.252991  Skip microcode update
  632 06:52:48.254176  CPU #4 initialized
  633 06:52:48.255844  CPU #1 initialized
  634 06:52:48.256119  
  635 06:52:48.257919  CPU #2 initialized
  636 06:52:48.258222  
  637 06:52:48.262357  Setting up local APIC...Initializing CPU #6
  638 06:52:48.262632  
  639 06:52:48.264403  Initializing CPU #7
  640 06:52:48.267888  CPU: vendor Intel device 806ec
  641 06:52:48.271951  CPU: family 06, model 8e, stepping 0c
  642 06:52:48.274475  CPU: vendor Intel device 806ec
  643 06:52:48.278164  CPU: family 06, model 8e, stepping 0c
  644 06:52:48.280776  Clearing out pending MCEs
  645 06:52:48.283265  Clearing out pending MCEs
  646 06:52:48.283537  
  647 06:52:48.288070  Setting up local APIC... apic_id: 0x01 done.
  648 06:52:48.290034   apic_id: 0x05 done.
  649 06:52:48.294332  Setting up local APIC...VMX status: enabled
  650 06:52:48.294683  
  651 06:52:48.296767   apic_id: 0x04 done.
  652 06:52:48.298485  VMX status: enabled
  653 06:52:48.298769  
  654 06:52:48.300864  VMX status: enabled
  655 06:52:48.304171  IA32_FEATURE_CONTROL status: locked
  656 06:52:48.308319  IA32_FEATURE_CONTROL status: locked
  657 06:52:48.310330  Skip microcode update
  658 06:52:48.310945  
  659 06:52:48.312368  Skip microcode update
  660 06:52:48.314567  CPU #7 initialized
  661 06:52:48.316037  CPU #6 initialized
  662 06:52:48.319704  IA32_FEATURE_CONTROL status: locked
  663 06:52:48.320017  
  664 06:52:48.322169  Skip microcode update
  665 06:52:48.324154  CPU #3 initialized
  666 06:52:48.328725  bsp_do_flight_plan done after 459 msecs.
  667 06:52:48.331180  CPU: frequency set to 4800 MHz
  668 06:52:48.332960  Enabling SMIs.
  669 06:52:48.334149  Locking SMM.
  670 06:52:48.337441  CBFS @ 1d00000 size 300000
  671 06:52:48.343609  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
  672 06:52:48.346918  CBFS: Locating 'vbt.bin'
  673 06:52:48.350093  CBFS: Found @ offset 60a40 size 4a0
  674 06:52:48.354988  Found a VBT of 4608 bytes after decompression
  675 06:52:48.368557  FMAP: area GBB found @ 1c11000 (978944 bytes)
  676 06:52:48.428404  Detected 4 core, 8 thread CPU.
  677 06:52:48.431252  Detected 4 core, 8 thread CPU.
  678 06:52:48.658594  Display FSP Version Info HOB
  679 06:52:48.661457  Reference Code - CPU = 7.0.5e.40
  680 06:52:48.663896  uCode Version = 0.0.0.b8
  681 06:52:48.667329  Display FSP Version Info HOB
  682 06:52:48.670074  Reference Code - ME = 7.0.5e.40
  683 06:52:48.672574  MEBx version = 0.0.0.0
  684 06:52:48.675748  ME Firmware Version = Consumer SKU
  685 06:52:48.676061  
  686 06:52:48.678850  Display FSP Version Info HOB
  687 06:52:48.682770  Reference Code - CNL PCH = 7.0.5e.40
  688 06:52:48.685549  PCH-CRID Status = Disabled
  689 06:52:48.685858  
  690 06:52:48.688578  CNL PCH H A0 Hsio Version = 2.0.0.0
  691 06:52:48.688887  
  692 06:52:48.692340  CNL PCH H Ax Hsio Version = 9.0.0.0
  693 06:52:48.695900  CNL PCH H Bx Hsio Version = a.0.0.0
  694 06:52:48.696213  
  695 06:52:48.700070  CNL PCH LP B0 Hsio Version = 7.0.0.0
  696 06:52:48.703694  CNL PCH LP Bx Hsio Version = 6.0.0.0
  697 06:52:48.703973  
  698 06:52:48.707230  CNL PCH LP Dx Hsio Version = 7.0.0.0
  699 06:52:48.707483  
  700 06:52:48.709838  Display FSP Version Info HOB
  701 06:52:48.710194  
  702 06:52:48.714936  Reference Code - SA - System Agent = 7.0.5e.40
  703 06:52:48.717948  Reference Code - MRC = 0.7.1.68
  704 06:52:48.721256  SA - PCIe Version = 7.0.5e.40
  705 06:52:48.721533  
  706 06:52:48.723468  SA-CRID Status = Disabled
  707 06:52:48.723739  
  708 06:52:48.727185  SA-CRID Original Value = 0.0.0.c
  709 06:52:48.729496  SA-CRID New Value = 0.0.0.c
  710 06:52:48.729769  
  711 06:52:48.747947  RTC Init
  712 06:52:48.748246  
  713 06:52:48.752404  Set power off after power failure.
  714 06:52:48.754388  Disabling Deep S3
  715 06:52:48.756129  Disabling Deep S3
  716 06:52:48.757508  Disabling Deep S4
  717 06:52:48.759348  Disabling Deep S4
  718 06:52:48.761787  Disabling Deep S5
  719 06:52:48.763007  Disabling Deep S5
  720 06:52:48.769826  BS: BS_DEV_INIT_CHIPS times (us): entry 602403 run 412532 exit 16229
  721 06:52:48.770082  
  722 06:52:48.772555  Enumerating buses...
  723 06:52:48.776604  Show all devs... Before device enumeration.
  724 06:52:48.779149  Root Device: enabled 1
  725 06:52:48.781663  CPU_CLUSTER: 0: enabled 1
  726 06:52:48.783679  DOMAIN: 0000: enabled 1
  727 06:52:48.786395  APIC: 00: enabled 1
  728 06:52:48.788405  PCI: 00:00.0: enabled 1
  729 06:52:48.790860  PCI: 00:02.0: enabled 1
  730 06:52:48.793028  PCI: 00:04.0: enabled 1
  731 06:52:48.795981  PCI: 00:12.0: enabled 1
  732 06:52:48.797949  PCI: 00:12.5: enabled 0
  733 06:52:48.798219  
  734 06:52:48.800903  PCI: 00:12.6: enabled 0
  735 06:52:48.802951  PCI: 00:13.0: enabled 0
  736 06:52:48.805387  PCI: 00:14.0: enabled 1
  737 06:52:48.805666  
  738 06:52:48.807769  PCI: 00:14.1: enabled 0
  739 06:52:48.810155  PCI: 00:14.3: enabled 1
  740 06:52:48.812730  PCI: 00:14.5: enabled 0
  741 06:52:48.815627  PCI: 00:15.0: enabled 1
  742 06:52:48.817531  PCI: 00:15.1: enabled 1
  743 06:52:48.819986  PCI: 00:15.2: enabled 0
  744 06:52:48.822731  PCI: 00:15.3: enabled 0
  745 06:52:48.825104  PCI: 00:16.0: enabled 1
  746 06:52:48.827149  PCI: 00:16.1: enabled 0
  747 06:52:48.830054  PCI: 00:16.2: enabled 0
  748 06:52:48.832150  PCI: 00:16.3: enabled 0
  749 06:52:48.834293  PCI: 00:16.4: enabled 0
  750 06:52:48.834958  
  751 06:52:48.837397  PCI: 00:16.5: enabled 0
  752 06:52:48.839371  PCI: 00:17.0: enabled 1
  753 06:52:48.841638  PCI: 00:19.0: enabled 1
  754 06:52:48.841906  
  755 06:52:48.844721  PCI: 00:19.1: enabled 0
  756 06:52:48.847218  PCI: 00:19.2: enabled 1
  757 06:52:48.849249  PCI: 00:1a.0: enabled 0
  758 06:52:48.851695  PCI: 00:1c.0: enabled 1
  759 06:52:48.854035  PCI: 00:1c.1: enabled 0
  760 06:52:48.856246  PCI: 00:1c.2: enabled 0
  761 06:52:48.856545  
  762 06:52:48.859342  PCI: 00:1c.3: enabled 0
  763 06:52:48.861499  PCI: 00:1c.4: enabled 0
  764 06:52:48.863834  PCI: 00:1c.5: enabled 0
  765 06:52:48.864330  
  766 06:52:48.865973  PCI: 00:1c.6: enabled 0
  767 06:52:48.868625  PCI: 00:1c.7: enabled 1
  768 06:52:48.868923  
  769 06:52:48.870757  PCI: 00:1d.0: enabled 1
  770 06:52:48.871258  
  771 06:52:48.873708  PCI: 00:1d.1: enabled 1
  772 06:52:48.875824  PCI: 00:1d.2: enabled 0
  773 06:52:48.878373  PCI: 00:1d.3: enabled 0
  774 06:52:48.881253  PCI: 00:1d.4: enabled 1
  775 06:52:48.883258  PCI: 00:1e.0: enabled 0
  776 06:52:48.885443  PCI: 00:1e.1: enabled 0
  777 06:52:48.887736  PCI: 00:1e.2: enabled 0
  778 06:52:48.888117  
  779 06:52:48.890826  PCI: 00:1e.3: enabled 0
  780 06:52:48.892567  PCI: 00:1f.0: enabled 1
  781 06:52:48.895260  PCI: 00:1f.1: enabled 1
  782 06:52:48.897640  PCI: 00:1f.2: enabled 1
  783 06:52:48.897955  
  784 06:52:48.900387  PCI: 00:1f.3: enabled 1
  785 06:52:48.902920  PCI: 00:1f.4: enabled 1
  786 06:52:48.905056  PCI: 00:1f.5: enabled 1
  787 06:52:48.907593  PCI: 00:1f.6: enabled 1
  788 06:52:48.907904  
  789 06:52:48.910392  USB0 port 0: enabled 1
  790 06:52:48.911903  I2C: 00:10: enabled 1
  791 06:52:48.914374  I2C: 00:10: enabled 1
  792 06:52:48.916708  I2C: 00:34: enabled 1
  793 06:52:48.919236  I2C: 00:2c: enabled 1
  794 06:52:48.920957  I2C: 00:50: enabled 1
  795 06:52:48.921250  
  796 06:52:48.923149  PNP: 0c09.0: enabled 1
  797 06:52:48.923445  
  798 06:52:48.925521  USB2 port 0: enabled 1
  799 06:52:48.925807  
  800 06:52:48.927760  USB2 port 1: enabled 1
  801 06:52:48.930250  USB2 port 2: enabled 1
  802 06:52:48.932334  USB2 port 4: enabled 1
  803 06:52:48.932637  
  804 06:52:48.934879  USB2 port 5: enabled 1
  805 06:52:48.935442  
  806 06:52:48.937073  USB2 port 6: enabled 1
  807 06:52:48.937342  
  808 06:52:48.939809  USB2 port 7: enabled 1
  809 06:52:48.942653  USB2 port 8: enabled 1
  810 06:52:48.944604  USB2 port 9: enabled 1
  811 06:52:48.946697  USB3 port 0: enabled 1
  812 06:52:48.949113  USB3 port 1: enabled 1
  813 06:52:48.951822  USB3 port 2: enabled 1
  814 06:52:48.953477  USB3 port 3: enabled 1
  815 06:52:48.953750  
  816 06:52:48.956506  USB3 port 4: enabled 1
  817 06:52:48.958310  APIC: 02: enabled 1
  818 06:52:48.959920  APIC: 06: enabled 1
  819 06:52:48.962313  APIC: 01: enabled 1
  820 06:52:48.964202  APIC: 03: enabled 1
  821 06:52:48.966199  APIC: 07: enabled 1
  822 06:52:48.968613  APIC: 04: enabled 1
  823 06:52:48.970218  APIC: 05: enabled 1
  824 06:52:48.972261  Compare with tree...
  825 06:52:48.972562  
  826 06:52:48.974674  Root Device: enabled 1
  827 06:52:48.977590   CPU_CLUSTER: 0: enabled 1
  828 06:52:48.978271  
  829 06:52:48.980234    APIC: 00: enabled 1
  830 06:52:48.981876    APIC: 02: enabled 1
  831 06:52:48.984106    APIC: 06: enabled 1
  832 06:52:48.986527    APIC: 01: enabled 1
  833 06:52:48.988483    APIC: 03: enabled 1
  834 06:52:48.990825    APIC: 07: enabled 1
  835 06:52:48.991517  
  836 06:52:48.993010    APIC: 04: enabled 1
  837 06:52:48.993311  
  838 06:52:48.995462    APIC: 05: enabled 1
  839 06:52:48.997810   DOMAIN: 0000: enabled 1
  840 06:52:49.000848    PCI: 00:00.0: enabled 1
  841 06:52:49.003286    PCI: 00:02.0: enabled 1
  842 06:52:49.005946    PCI: 00:04.0: enabled 1
  843 06:52:49.008671    PCI: 00:12.0: enabled 1
  844 06:52:49.011309    PCI: 00:12.5: enabled 0
  845 06:52:49.013447    PCI: 00:12.6: enabled 0
  846 06:52:49.013748  
  847 06:52:49.016209    PCI: 00:13.0: enabled 0
  848 06:52:49.019308    PCI: 00:14.0: enabled 1
  849 06:52:49.021381     USB0 port 0: enabled 1
  850 06:52:49.024882      USB2 port 0: enabled 1
  851 06:52:49.027866      USB2 port 1: enabled 1
  852 06:52:49.029595      USB2 port 2: enabled 1
  853 06:52:49.032167      USB2 port 4: enabled 1
  854 06:52:49.032866  
  855 06:52:49.035387      USB2 port 5: enabled 1
  856 06:52:49.038128      USB2 port 6: enabled 1
  857 06:52:49.041192      USB2 port 7: enabled 1
  858 06:52:49.043282      USB2 port 8: enabled 1
  859 06:52:49.045702      USB2 port 9: enabled 1
  860 06:52:49.046088  
  861 06:52:49.048890      USB3 port 0: enabled 1
  862 06:52:49.051417      USB3 port 1: enabled 1
  863 06:52:49.053947      USB3 port 2: enabled 1
  864 06:52:49.054258  
  865 06:52:49.057185      USB3 port 3: enabled 1
  866 06:52:49.059751      USB3 port 4: enabled 1
  867 06:52:49.062241    PCI: 00:14.1: enabled 0
  868 06:52:49.064714    PCI: 00:14.3: enabled 1
  869 06:52:49.065029  
  870 06:52:49.067819    PCI: 00:14.5: enabled 0
  871 06:52:49.070325    PCI: 00:15.0: enabled 1
  872 06:52:49.072787     I2C: 00:10: enabled 1
  873 06:52:49.075408     I2C: 00:10: enabled 1
  874 06:52:49.077580     I2C: 00:34: enabled 1
  875 06:52:49.078252  
  876 06:52:49.080754    PCI: 00:15.1: enabled 1
  877 06:52:49.082586     I2C: 00:2c: enabled 1
  878 06:52:49.083249  
  879 06:52:49.085886    PCI: 00:15.2: enabled 0
  880 06:52:49.088149    PCI: 00:15.3: enabled 0
  881 06:52:49.088716  
  882 06:52:49.090893    PCI: 00:16.0: enabled 1
  883 06:52:49.093331    PCI: 00:16.1: enabled 0
  884 06:52:49.096564    PCI: 00:16.2: enabled 0
  885 06:52:49.098326    PCI: 00:16.3: enabled 0
  886 06:52:49.098700  
  887 06:52:49.101216    PCI: 00:16.4: enabled 0
  888 06:52:49.104029    PCI: 00:16.5: enabled 0
  889 06:52:49.106712    PCI: 00:17.0: enabled 1
  890 06:52:49.109065    PCI: 00:19.0: enabled 1
  891 06:52:49.111581     I2C: 00:50: enabled 1
  892 06:52:49.114390    PCI: 00:19.1: enabled 0
  893 06:52:49.117548    PCI: 00:19.2: enabled 1
  894 06:52:49.119824    PCI: 00:1a.0: enabled 0
  895 06:52:49.121964    PCI: 00:1c.0: enabled 1
  896 06:52:49.124740    PCI: 00:1c.1: enabled 0
  897 06:52:49.127861    PCI: 00:1c.2: enabled 0
  898 06:52:49.130259    PCI: 00:1c.3: enabled 0
  899 06:52:49.130525  
  900 06:52:49.132715    PCI: 00:1c.4: enabled 0
  901 06:52:49.132997  
  902 06:52:49.135333    PCI: 00:1c.5: enabled 0
  903 06:52:49.138129    PCI: 00:1c.6: enabled 0
  904 06:52:49.138446  
  905 06:52:49.140576    PCI: 00:1c.7: enabled 1
  906 06:52:49.143444    PCI: 00:1d.0: enabled 1
  907 06:52:49.146038    PCI: 00:1d.1: enabled 1
  908 06:52:49.146316  
  909 06:52:49.148697    PCI: 00:1d.2: enabled 0
  910 06:52:49.150897    PCI: 00:1d.3: enabled 0
  911 06:52:49.153707    PCI: 00:1d.4: enabled 1
  912 06:52:49.156210    PCI: 00:1e.0: enabled 0
  913 06:52:49.158787    PCI: 00:1e.1: enabled 0
  914 06:52:49.162039    PCI: 00:1e.2: enabled 0
  915 06:52:49.164054    PCI: 00:1e.3: enabled 0
  916 06:52:49.166608    PCI: 00:1f.0: enabled 1
  917 06:52:49.169607     PNP: 0c09.0: enabled 1
  918 06:52:49.169881  
  919 06:52:49.171841    PCI: 00:1f.1: enabled 1
  920 06:52:49.172118  
  921 06:52:49.175027    PCI: 00:1f.2: enabled 1
  922 06:52:49.177237    PCI: 00:1f.3: enabled 1
  923 06:52:49.180181    PCI: 00:1f.4: enabled 1
  924 06:52:49.180444  
  925 06:52:49.182352    PCI: 00:1f.5: enabled 1
  926 06:52:49.184853    PCI: 00:1f.6: enabled 1
  927 06:52:49.185126  
  928 06:52:49.188258  Root Device scanning...
  929 06:52:49.190997  root_dev_scan_bus for Root Device
  930 06:52:49.193409  CPU_CLUSTER: 0 enabled
  931 06:52:49.194026  
  932 06:52:49.195449  DOMAIN: 0000 enabled
  933 06:52:49.195715  
  934 06:52:49.198308  DOMAIN: 0000 scanning...
  935 06:52:49.198583  
  936 06:52:49.201278  PCI: pci_scan_bus for bus 00
  937 06:52:49.201552  
  938 06:52:49.204735  PCI: 00:00.0 [8086/0000] ops
  939 06:52:49.207639  PCI: 00:00.0 [8086/3e34] enabled
  940 06:52:49.207924  
  941 06:52:49.210681  PCI: 00:02.0 [8086/0000] ops
  942 06:52:49.210954  
  943 06:52:49.213853  PCI: 00:02.0 [8086/3ea0] enabled
  944 06:52:49.217642  PCI: 00:04.0 [8086/1903] enabled
  945 06:52:49.220375  PCI: 00:08.0 [8086/1911] enabled
  946 06:52:49.220643  
  947 06:52:49.223893  PCI: 00:12.0 [8086/9df9] enabled
  948 06:52:49.227563  PCI: 00:14.0 [8086/0000] bus ops
  949 06:52:49.230966  PCI: 00:14.0 [8086/9ded] enabled
  950 06:52:49.234154  PCI: 00:14.2 [8086/9def] enabled
  951 06:52:49.237967  PCI: 00:14.3 [8086/9df0] enabled
  952 06:52:49.240364  PCI: 00:15.0 [8086/0000] bus ops
  953 06:52:49.240853  
  954 06:52:49.243781  PCI: 00:15.0 [8086/9de8] enabled
  955 06:52:49.247591  PCI: 00:15.1 [8086/0000] bus ops
  956 06:52:49.250921  PCI: 00:15.1 [8086/9de9] enabled
  957 06:52:49.251226  
  958 06:52:49.254032  PCI: 00:16.0 [8086/0000] ops
  959 06:52:49.256815  PCI: 00:16.0 [8086/9de0] enabled
  960 06:52:49.260353  PCI: 00:17.0 [8086/0000] ops
  961 06:52:49.262994  PCI: 00:17.0 [8086/9dd3] enabled
  962 06:52:49.266583  PCI: 00:19.0 [8086/0000] bus ops
  963 06:52:49.269481  PCI: 00:19.0 [8086/9dc5] enabled
  964 06:52:49.270024  
  965 06:52:49.273135  PCI: 00:19.2 [8086/0000] ops
  966 06:52:49.276445  PCI: 00:19.2 [8086/9dc7] enabled
  967 06:52:49.280078  PCI: 00:1c.0 [8086/0000] bus ops
  968 06:52:49.283034  PCI: 00:1c.0 [8086/9dbf] enabled
  969 06:52:49.288108  PCI: Static device PCI: 00:1c.7 not found, disabling it.
  970 06:52:49.288761  
  971 06:52:49.291466  PCI: 00:1d.0 [8086/0000] bus ops
  972 06:52:49.294646  PCI: 00:1d.0 [8086/9db4] enabled
  973 06:52:49.294910  
  974 06:52:49.300338  PCI: Static device PCI: 00:1d.1 not found, disabling it.
  975 06:52:49.300622  
  976 06:52:49.306039  PCI: Static device PCI: 00:1d.4 not found, disabling it.
  977 06:52:49.306379  
  978 06:52:49.310149  PCI: 00:1f.0 [8086/0000] bus ops
  979 06:52:49.312777  PCI: 00:1f.0 [8086/9d84] enabled
  980 06:52:49.318434  PCI: Static device PCI: 00:1f.1 not found, disabling it.
  981 06:52:49.324796  PCI: Static device PCI: 00:1f.2 not found, disabling it.
  982 06:52:49.327898  PCI: 00:1f.3 [8086/0000] bus ops
  983 06:52:49.331123  PCI: 00:1f.3 [8086/9dc8] enabled
  984 06:52:49.331395  
  985 06:52:49.334437  PCI: 00:1f.4 [8086/0000] bus ops
  986 06:52:49.337512  PCI: 00:1f.4 [8086/9da3] enabled
  987 06:52:49.340435  PCI: 00:1f.5 [8086/0000] bus ops
  988 06:52:49.343732  PCI: 00:1f.5 [8086/9da4] enabled
  989 06:52:49.344009  
  990 06:52:49.347282  PCI: 00:1f.6 [8086/15be] enabled
  991 06:52:49.350396  PCI: Leftover static devices:
  992 06:52:49.352256  PCI: 00:12.5
  993 06:52:49.352913  PCI: 00:12.6
  994 06:52:49.353170  
  995 06:52:49.354388  PCI: 00:13.0
  996 06:52:49.355780  PCI: 00:14.1
  997 06:52:49.356065  
  998 06:52:49.357567  PCI: 00:14.5
  999 06:52:49.358380  PCI: 00:15.2
 1000 06:52:49.359634  PCI: 00:15.3
 1001 06:52:49.359906  
 1002 06:52:49.361382  PCI: 00:16.1
 1003 06:52:49.362042  
 1004 06:52:49.362507  PCI: 00:16.2
 1005 06:52:49.363913  PCI: 00:16.3
 1006 06:52:49.364494  
 1007 06:52:49.365330  PCI: 00:16.4
 1008 06:52:49.366781  PCI: 00:16.5
 1009 06:52:49.367976  PCI: 00:19.1
 1010 06:52:49.369365  PCI: 00:1a.0
 1011 06:52:49.369639  
 1012 06:52:49.370621  PCI: 00:1c.1
 1013 06:52:49.370939  
 1014 06:52:49.372101  PCI: 00:1c.2
 1015 06:52:49.372362  
 1016 06:52:49.374162  PCI: 00:1c.3
 1017 06:52:49.374992  PCI: 00:1c.4
 1018 06:52:49.376484  PCI: 00:1c.5
 1019 06:52:49.377370  PCI: 00:1c.6
 1020 06:52:49.377751  
 1021 06:52:49.378664  PCI: 00:1c.7
 1022 06:52:49.380041  PCI: 00:1d.1
 1023 06:52:49.381784  PCI: 00:1d.2
 1024 06:52:49.382986  PCI: 00:1d.3
 1025 06:52:49.384266  PCI: 00:1d.4
 1026 06:52:49.384571  
 1027 06:52:49.385601  PCI: 00:1e.0
 1028 06:52:49.387347  PCI: 00:1e.1
 1029 06:52:49.388936  PCI: 00:1e.2
 1030 06:52:49.389900  PCI: 00:1e.3
 1031 06:52:49.390985  PCI: 00:1f.1
 1032 06:52:49.391266  
 1033 06:52:49.392486  PCI: 00:1f.2
 1034 06:52:49.393180  
 1035 06:52:49.395919  PCI: Check your devicetree.cb.
 1036 06:52:49.398388  PCI: 00:14.0 scanning...
 1037 06:52:49.401250  scan_usb_bus for PCI: 00:14.0
 1038 06:52:49.401944  
 1039 06:52:49.403361  USB0 port 0 enabled
 1040 06:52:49.403637  
 1041 06:52:49.405916  USB0 port 0 scanning...
 1042 06:52:49.409052  scan_usb_bus for USB0 port 0
 1043 06:52:49.409335  
 1044 06:52:49.411429  USB2 port 0 enabled
 1045 06:52:49.411740  
 1046 06:52:49.413477  USB2 port 1 enabled
 1047 06:52:49.415169  USB2 port 2 enabled
 1048 06:52:49.415782  
 1049 06:52:49.417158  USB2 port 4 enabled
 1050 06:52:49.419183  USB2 port 5 enabled
 1051 06:52:49.421193  USB2 port 6 enabled
 1052 06:52:49.421833  
 1053 06:52:49.423315  USB2 port 7 enabled
 1054 06:52:49.426119  USB2 port 8 enabled
 1055 06:52:49.427595  USB2 port 9 enabled
 1056 06:52:49.430077  USB3 port 0 enabled
 1057 06:52:49.431678  USB3 port 1 enabled
 1058 06:52:49.431947  
 1059 06:52:49.434018  USB3 port 2 enabled
 1060 06:52:49.435836  USB3 port 3 enabled
 1061 06:52:49.437473  USB3 port 4 enabled
 1062 06:52:49.437745  
 1063 06:52:49.440323  USB2 port 0 scanning...
 1064 06:52:49.443927  scan_usb_bus for USB2 port 0
 1065 06:52:49.447239  scan_usb_bus for USB2 port 0 done
 1066 06:52:49.452486  scan_bus: scanning of bus USB2 port 0 took 9057 usecs
 1067 06:52:49.454879  USB2 port 1 scanning...
 1068 06:52:49.457688  scan_usb_bus for USB2 port 1
 1069 06:52:49.458484  
 1070 06:52:49.461268  scan_usb_bus for USB2 port 1 done
 1071 06:52:49.466415  scan_bus: scanning of bus USB2 port 1 took 9057 usecs
 1072 06:52:49.466694  
 1073 06:52:49.469531  USB2 port 2 scanning...
 1074 06:52:49.472662  scan_usb_bus for USB2 port 2
 1075 06:52:49.476158  scan_usb_bus for USB2 port 2 done
 1076 06:52:49.481169  scan_bus: scanning of bus USB2 port 2 took 9057 usecs
 1077 06:52:49.484016  USB2 port 4 scanning...
 1078 06:52:49.486644  scan_usb_bus for USB2 port 4
 1079 06:52:49.489919  scan_usb_bus for USB2 port 4 done
 1080 06:52:49.495556  scan_bus: scanning of bus USB2 port 4 took 9058 usecs
 1081 06:52:49.497607  USB2 port 5 scanning...
 1082 06:52:49.497885  
 1083 06:52:49.500902  scan_usb_bus for USB2 port 5
 1084 06:52:49.501180  
 1085 06:52:49.504828  scan_usb_bus for USB2 port 5 done
 1086 06:52:49.505136  
 1087 06:52:49.509722  scan_bus: scanning of bus USB2 port 5 took 9058 usecs
 1088 06:52:49.510385  
 1089 06:52:49.512052  USB2 port 6 scanning...
 1090 06:52:49.515395  scan_usb_bus for USB2 port 6
 1091 06:52:49.516219  
 1092 06:52:49.518875  scan_usb_bus for USB2 port 6 done
 1093 06:52:49.524315  scan_bus: scanning of bus USB2 port 6 took 9059 usecs
 1094 06:52:49.526830  USB2 port 7 scanning...
 1095 06:52:49.527405  
 1096 06:52:49.529758  scan_usb_bus for USB2 port 7
 1097 06:52:49.530034  
 1098 06:52:49.533153  scan_usb_bus for USB2 port 7 done
 1099 06:52:49.538631  scan_bus: scanning of bus USB2 port 7 took 9058 usecs
 1100 06:52:49.541055  USB2 port 8 scanning...
 1101 06:52:49.544224  scan_usb_bus for USB2 port 8
 1102 06:52:49.547905  scan_usb_bus for USB2 port 8 done
 1103 06:52:49.552877  scan_bus: scanning of bus USB2 port 8 took 9059 usecs
 1104 06:52:49.555896  USB2 port 9 scanning...
 1105 06:52:49.558398  scan_usb_bus for USB2 port 9
 1106 06:52:49.559166  
 1107 06:52:49.562359  scan_usb_bus for USB2 port 9 done
 1108 06:52:49.562659  
 1109 06:52:49.567376  scan_bus: scanning of bus USB2 port 9 took 9058 usecs
 1110 06:52:49.569675  USB3 port 0 scanning...
 1111 06:52:49.573252  scan_usb_bus for USB3 port 0
 1112 06:52:49.576454  scan_usb_bus for USB3 port 0 done
 1113 06:52:49.582157  scan_bus: scanning of bus USB3 port 0 took 9059 usecs
 1114 06:52:49.584970  USB3 port 1 scanning...
 1115 06:52:49.587324  scan_usb_bus for USB3 port 1
 1116 06:52:49.590899  scan_usb_bus for USB3 port 1 done
 1117 06:52:49.596193  scan_bus: scanning of bus USB3 port 1 took 9060 usecs
 1118 06:52:49.598911  USB3 port 2 scanning...
 1119 06:52:49.601671  scan_usb_bus for USB3 port 2
 1120 06:52:49.605220  scan_usb_bus for USB3 port 2 done
 1121 06:52:49.610858  scan_bus: scanning of bus USB3 port 2 took 9060 usecs
 1122 06:52:49.611153  
 1123 06:52:49.612949  USB3 port 3 scanning...
 1124 06:52:49.616260  scan_usb_bus for USB3 port 3
 1125 06:52:49.619546  scan_usb_bus for USB3 port 3 done
 1126 06:52:49.624785  scan_bus: scanning of bus USB3 port 3 took 9057 usecs
 1127 06:52:49.625145  
 1128 06:52:49.627404  USB3 port 4 scanning...
 1129 06:52:49.630634  scan_usb_bus for USB3 port 4
 1130 06:52:49.631334  
 1131 06:52:49.634031  scan_usb_bus for USB3 port 4 done
 1132 06:52:49.634328  
 1133 06:52:49.639609  scan_bus: scanning of bus USB3 port 4 took 9059 usecs
 1134 06:52:49.639901  
 1135 06:52:49.642780  scan_usb_bus for USB0 port 0 done
 1136 06:52:49.643083  
 1137 06:52:49.648834  scan_bus: scanning of bus USB0 port 0 took 239241 usecs
 1138 06:52:49.651946  scan_usb_bus for PCI: 00:14.0 done
 1139 06:52:49.657887  scan_bus: scanning of bus PCI: 00:14.0 took 256171 usecs
 1140 06:52:49.659949  PCI: 00:15.0 scanning...
 1141 06:52:49.663583  scan_generic_bus for PCI: 00:15.0
 1142 06:52:49.663889  
 1143 06:52:49.668123  bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
 1144 06:52:49.672142  bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
 1145 06:52:49.676635  bus: PCI: 00:15.0[0]->I2C: 01:34 enabled
 1146 06:52:49.679582  scan_generic_bus for PCI: 00:15.0 done
 1147 06:52:49.679894  
 1148 06:52:49.685837  scan_bus: scanning of bus PCI: 00:15.0 took 22378 usecs
 1149 06:52:49.687775  PCI: 00:15.1 scanning...
 1150 06:52:49.688085  
 1151 06:52:49.691676  scan_generic_bus for PCI: 00:15.1
 1152 06:52:49.695467  bus: PCI: 00:15.1[0]->I2C: 02:2c enabled
 1153 06:52:49.695830  
 1154 06:52:49.699793  scan_generic_bus for PCI: 00:15.1 done
 1155 06:52:49.706118  scan_bus: scanning of bus PCI: 00:15.1 took 14208 usecs
 1156 06:52:49.707655  PCI: 00:19.0 scanning...
 1157 06:52:49.711766  scan_generic_bus for PCI: 00:19.0
 1158 06:52:49.715604  bus: PCI: 00:19.0[0]->I2C: 03:50 enabled
 1159 06:52:49.719734  scan_generic_bus for PCI: 00:19.0 done
 1160 06:52:49.720036  
 1161 06:52:49.725169  scan_bus: scanning of bus PCI: 00:19.0 took 14209 usecs
 1162 06:52:49.725763  
 1163 06:52:49.728318  PCI: 00:1c.0 scanning...
 1164 06:52:49.731680  do_pci_scan_bridge for PCI: 00:1c.0
 1165 06:52:49.734508  PCI: pci_scan_bus for bus 01
 1166 06:52:49.737537  PCI: 01:00.0 [10ec/525a] enabled
 1167 06:52:49.740842  Capability: type 0x01 @ 0x80
 1168 06:52:49.741153  
 1169 06:52:49.744090  Capability: type 0x05 @ 0x90
 1170 06:52:49.746395  Capability: type 0x10 @ 0xb0
 1171 06:52:49.746923  
 1172 06:52:49.749484  Capability: type 0x10 @ 0x40
 1173 06:52:49.749790  
 1174 06:52:49.752930  Enabling Common Clock Configuration
 1175 06:52:49.757368  L1 Sub-State supported from root port 28
 1176 06:52:49.760359  L1 Sub-State Support = 0xf
 1177 06:52:49.762945  CommonModeRestoreTime = 0x3c
 1178 06:52:49.767277  Power On Value = 0x6, Power On Scale = 0x1
 1179 06:52:49.769938  ASPM: Enabled L0s and L1
 1180 06:52:49.772925  Capability: type 0x01 @ 0x80
 1181 06:52:49.775578  Capability: type 0x05 @ 0x90
 1182 06:52:49.778617  Capability: type 0x10 @ 0xb0
 1183 06:52:49.784536  scan_bus: scanning of bus PCI: 00:1c.0 took 53629 usecs
 1184 06:52:49.786668  PCI: 00:1d.0 scanning...
 1185 06:52:49.790559  do_pci_scan_bridge for PCI: 00:1d.0
 1186 06:52:49.793200  PCI: pci_scan_bus for bus 02
 1187 06:52:49.793505  
 1188 06:52:49.796640  PCI: 02:00.0 [1217/8620] enabled
 1189 06:52:49.796950  
 1190 06:52:49.799697  Capability: type 0x01 @ 0x6c
 1191 06:52:49.800006  
 1192 06:52:49.803010  Capability: type 0x05 @ 0x48
 1193 06:52:49.806603  Capability: type 0x10 @ 0x80
 1194 06:52:49.808673  Capability: type 0x10 @ 0x40
 1195 06:52:49.812692  L1 Sub-State supported from root port 29
 1196 06:52:49.815574  L1 Sub-State Support = 0xf
 1197 06:52:49.819095  CommonModeRestoreTime = 0x78
 1198 06:52:49.823450  Power On Value = 0x16, Power On Scale = 0x0
 1199 06:52:49.824556  ASPM: Enabled L1
 1200 06:52:49.825155  
 1201 06:52:49.829098  Capability: type 0x01 @ 0x6c
 1202 06:52:49.833888  Capability: type 0x05 @ 0x48
 1203 06:52:49.838078  Capability: type 0x10 @ 0x80
 1204 06:52:49.838384  
 1205 06:52:49.845452  scan_bus: scanning of bus PCI: 00:1d.0 took 55988 usecs
 1206 06:52:49.848813  PCI: 00:1f.0 scanning...
 1207 06:52:49.852058  scan_lpc_bus for PCI: 00:1f.0
 1208 06:52:49.852367  
 1209 06:52:49.853387  PNP: 0c09.0 enabled
 1210 06:52:49.853692  
 1211 06:52:49.856916  scan_lpc_bus for PCI: 00:1f.0 done
 1212 06:52:49.862370  scan_bus: scanning of bus PCI: 00:1f.0 took 11394 usecs
 1213 06:52:49.865270  PCI: 00:1f.3 scanning...
 1214 06:52:49.865547  
 1215 06:52:49.870720  scan_bus: scanning of bus PCI: 00:1f.3 took 2841 usecs
 1216 06:52:49.873145  PCI: 00:1f.4 scanning...
 1217 06:52:49.877672  scan_generic_bus for PCI: 00:1f.4
 1218 06:52:49.881394  scan_generic_bus for PCI: 00:1f.4 done
 1219 06:52:49.886436  scan_bus: scanning of bus PCI: 00:1f.4 took 10131 usecs
 1220 06:52:49.888859  PCI: 00:1f.5 scanning...
 1221 06:52:49.893040  scan_generic_bus for PCI: 00:1f.5
 1222 06:52:49.896946  scan_generic_bus for PCI: 00:1f.5 done
 1223 06:52:49.901993  scan_bus: scanning of bus PCI: 00:1f.5 took 10138 usecs
 1224 06:52:49.902308  
 1225 06:52:49.908094  scan_bus: scanning of bus DOMAIN: 0000 took 706529 usecs
 1226 06:52:49.908399  
 1227 06:52:49.911937  root_dev_scan_bus for Root Device done
 1228 06:52:49.917143  scan_bus: scanning of bus Root Device took 726680 usecs
 1229 06:52:49.917443  
 1230 06:52:49.918582  done
 1231 06:52:49.924040  FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
 1232 06:52:49.924338  
 1233 06:52:49.930437  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
 1234 06:52:49.938562  SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x2000000
 1235 06:52:49.945296  FMAP: area UNIFIED_MRC_CACHE found @ 1bd0000 (131072 bytes)
 1236 06:52:49.948382  SPI flash protection: WPSW=1 SRP0=1
 1237 06:52:49.955286  fast_spi_flash_protect: FPR 0 is enabled for range 0x01bd0000-0x01beffff
 1238 06:52:49.960708  MRC: Enabled Protected Range on 'UNIFIED_MRC_CACHE'.
 1239 06:52:49.966930  BS: BS_DEV_ENUMERATE times (us): entry 0 run 1148288 exit 42585
 1240 06:52:49.967242  
 1241 06:52:49.969950  found VGA at PCI: 00:02.0
 1242 06:52:49.974199  Setting up VGA for PCI: 00:02.0
 1243 06:52:49.978304  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
 1244 06:52:49.982948  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
 1245 06:52:49.986025  Allocating resources...
 1246 06:52:49.988393  Reading resources...
 1247 06:52:49.991770  Root Device read_resources bus 0 link: 0
 1248 06:52:49.996620  CPU_CLUSTER: 0 read_resources bus 0 link: 0
 1249 06:52:50.001797  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
 1250 06:52:50.006518  DOMAIN: 0000 read_resources bus 0 link: 0
 1251 06:52:50.006835  
 1252 06:52:50.012323  PCI: 00:14.0 read_resources bus 0 link: 0
 1253 06:52:50.016660  USB0 port 0 read_resources bus 0 link: 0
 1254 06:52:50.026184  USB0 port 0 read_resources bus 0 link: 0 done
 1255 06:52:50.031093  PCI: 00:14.0 read_resources bus 0 link: 0 done
 1256 06:52:50.036052  PCI: 00:15.0 read_resources bus 1 link: 0
 1257 06:52:50.036375  
 1258 06:52:50.042593  PCI: 00:15.0 read_resources bus 1 link: 0 done
 1259 06:52:50.046923  PCI: 00:15.1 read_resources bus 2 link: 0
 1260 06:52:50.052130  PCI: 00:15.1 read_resources bus 2 link: 0 done
 1261 06:52:50.052412  
 1262 06:52:50.057309  PCI: 00:19.0 read_resources bus 3 link: 0
 1263 06:52:50.062596  PCI: 00:19.0 read_resources bus 3 link: 0 done
 1264 06:52:50.067473  PCI: 00:1c.0 read_resources bus 1 link: 0
 1265 06:52:50.072823  PCI: 00:1c.0 read_resources bus 1 link: 0 done
 1266 06:52:50.073105  
 1267 06:52:50.077449  PCI: 00:1d.0 read_resources bus 2 link: 0
 1268 06:52:50.084158  PCI: 00:1d.0 read_resources bus 2 link: 0 done
 1269 06:52:50.088740  PCI: 00:1f.0 read_resources bus 0 link: 0
 1270 06:52:50.089003  
 1271 06:52:50.094548  PCI: 00:1f.0 read_resources bus 0 link: 0 done
 1272 06:52:50.100335  DOMAIN: 0000 read_resources bus 0 link: 0 done
 1273 06:52:50.100620  
 1274 06:52:50.105447  Root Device read_resources bus 0 link: 0 done
 1275 06:52:50.108360  Done reading resources.
 1276 06:52:50.108627  
 1277 06:52:50.113427  Show resources in subtree (Root Device)...After reading.
 1278 06:52:50.113987  
 1279 06:52:50.117742   Root Device child on link 0 CPU_CLUSTER: 0
 1280 06:52:50.121955    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1281 06:52:50.122337  
 1282 06:52:50.123236     APIC: 00
 1283 06:52:50.124474     APIC: 02
 1284 06:52:50.124756  
 1285 06:52:50.125785     APIC: 06
 1286 06:52:50.126076  
 1287 06:52:50.127483     APIC: 01
 1288 06:52:50.127769  
 1289 06:52:50.128393     APIC: 03
 1290 06:52:50.129984     APIC: 07
 1291 06:52:50.130262  
 1292 06:52:50.130753     APIC: 04
 1293 06:52:50.131168  
 1294 06:52:50.131997     APIC: 05
 1295 06:52:50.136387    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1296 06:52:50.136685  
 1297 06:52:50.145768    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
 1298 06:52:50.146416  
 1299 06:52:50.155676    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
 1300 06:52:50.157349     PCI: 00:00.0
 1301 06:52:50.166897     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1302 06:52:50.176226     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
 1303 06:52:50.185920     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1304 06:52:50.194992     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1305 06:52:50.195621  
 1306 06:52:50.204652     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1307 06:52:50.213794     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1308 06:52:50.214076  
 1309 06:52:50.222749     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
 1310 06:52:50.231503     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
 1311 06:52:50.231837  
 1312 06:52:50.240728     PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
 1313 06:52:50.241021  
 1314 06:52:50.251280     PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
 1315 06:52:50.260275     PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
 1316 06:52:50.271085     PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c
 1317 06:52:50.279681     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
 1318 06:52:50.288144     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
 1319 06:52:50.288580  
 1320 06:52:50.290465     PCI: 00:02.0
 1321 06:52:50.300360     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
 1322 06:52:50.300642  
 1323 06:52:50.310805     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
 1324 06:52:50.318917     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
 1325 06:52:50.320933     PCI: 00:04.0
 1326 06:52:50.330972     PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
 1327 06:52:50.332234     PCI: 00:08.0
 1328 06:52:50.332561  
 1329 06:52:50.342313     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1330 06:52:50.344227     PCI: 00:12.0
 1331 06:52:50.354068     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1332 06:52:50.358584     PCI: 00:14.0 child on link 0 USB0 port 0
 1333 06:52:50.368168     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
 1334 06:52:50.372313      USB0 port 0 child on link 0 USB2 port 0
 1335 06:52:50.374601       USB2 port 0
 1336 06:52:50.375855       USB2 port 1
 1337 06:52:50.376184  
 1338 06:52:50.378097       USB2 port 2
 1339 06:52:50.378405  
 1340 06:52:50.379597       USB2 port 4
 1341 06:52:50.381437       USB2 port 5
 1342 06:52:50.383231       USB2 port 6
 1343 06:52:50.385026       USB2 port 7
 1344 06:52:50.386304       USB2 port 8
 1345 06:52:50.386617  
 1346 06:52:50.388201       USB2 port 9
 1347 06:52:50.390060       USB3 port 0
 1348 06:52:50.391497       USB3 port 1
 1349 06:52:50.391794  
 1350 06:52:50.394346       USB3 port 2
 1351 06:52:50.395832       USB3 port 3
 1352 06:52:50.396679       USB3 port 4
 1353 06:52:50.396970  
 1354 06:52:50.398629     PCI: 00:14.2
 1355 06:52:50.408981     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
 1356 06:52:50.418513     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1357 06:52:50.419919     PCI: 00:14.3
 1358 06:52:50.420236  
 1359 06:52:50.429983     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1360 06:52:50.430333  
 1361 06:52:50.434649     PCI: 00:15.0 child on link 0 I2C: 01:10
 1362 06:52:50.444343     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1363 06:52:50.446075      I2C: 01:10
 1364 06:52:50.447521      I2C: 01:10
 1365 06:52:50.448905      I2C: 01:34
 1366 06:52:50.453509     PCI: 00:15.1 child on link 0 I2C: 02:2c
 1367 06:52:50.463244     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1368 06:52:50.464684      I2C: 02:2c
 1369 06:52:50.466096     PCI: 00:16.0
 1370 06:52:50.466386  
 1371 06:52:50.476231     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1372 06:52:50.478049     PCI: 00:17.0
 1373 06:52:50.487592     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
 1374 06:52:50.496930     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
 1375 06:52:50.504657     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
 1376 06:52:50.512863     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
 1377 06:52:50.520769     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
 1378 06:52:50.521065  
 1379 06:52:50.529887     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
 1380 06:52:50.534013     PCI: 00:19.0 child on link 0 I2C: 03:50
 1381 06:52:50.534337  
 1382 06:52:50.543943     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1383 06:52:50.544257  
 1384 06:52:50.553758     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1385 06:52:50.554095  
 1386 06:52:50.555515      I2C: 03:50
 1387 06:52:50.557256     PCI: 00:19.2
 1388 06:52:50.568910     PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1389 06:52:50.578360     PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1390 06:52:50.582587     PCI: 00:1c.0 child on link 0 PCI: 01:00.0
 1391 06:52:50.591406     PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
 1392 06:52:50.591707  
 1393 06:52:50.601671     PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
 1394 06:52:50.610717     PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
 1395 06:52:50.612546      PCI: 01:00.0
 1396 06:52:50.620968      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
 1397 06:52:50.625603     PCI: 00:1d.0 child on link 0 PCI: 02:00.0
 1398 06:52:50.625909  
 1399 06:52:50.634573     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
 1400 06:52:50.644110     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
 1401 06:52:50.653028     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
 1402 06:52:50.653406  
 1403 06:52:50.654753      PCI: 02:00.0
 1404 06:52:50.664212      PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
 1405 06:52:50.664506  
 1406 06:52:50.672976      PCI: 02:00.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 14
 1407 06:52:50.673394  
 1408 06:52:50.677443     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1409 06:52:50.677736  
 1410 06:52:50.687138     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1411 06:52:50.695027     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
 1412 06:52:50.695358  
 1413 06:52:50.696685      PNP: 0c09.0
 1414 06:52:50.696998  
 1415 06:52:50.705427      PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
 1416 06:52:50.713757      PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
 1417 06:52:50.714358  
 1418 06:52:50.723249      PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
 1419 06:52:50.724160     PCI: 00:1f.3
 1420 06:52:50.734157     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1421 06:52:50.744263     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
 1422 06:52:50.745966     PCI: 00:1f.4
 1423 06:52:50.755055     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
 1424 06:52:50.764922     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
 1425 06:52:50.767017     PCI: 00:1f.5
 1426 06:52:50.775482     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
 1427 06:52:50.776100  
 1428 06:52:50.777022     PCI: 00:1f.6
 1429 06:52:50.777323  
 1430 06:52:50.786828     PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
 1431 06:52:50.792630  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
 1432 06:52:50.792953  
 1433 06:52:50.799623  PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
 1434 06:52:50.806166  PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
 1435 06:52:50.812158  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
 1436 06:52:50.812519  
 1437 06:52:50.819016  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
 1438 06:52:50.822556  PCI: 00:02.0 20 *  [0x0 - 0x3f] io
 1439 06:52:50.826459  PCI: 00:17.0 20 *  [0x40 - 0x5f] io
 1440 06:52:50.829551  PCI: 00:17.0 18 *  [0x60 - 0x67] io
 1441 06:52:50.829914  
 1442 06:52:50.833378  PCI: 00:17.0 1c *  [0x68 - 0x6b] io
 1443 06:52:50.840176  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
 1444 06:52:50.847256  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
 1445 06:52:50.854668  PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 1446 06:52:50.863337  PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 1447 06:52:50.870117  PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
 1448 06:52:50.873818  PCI: 01:00.0 14 *  [0x0 - 0xfff] mem
 1449 06:52:50.881782  PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
 1450 06:52:50.889666  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 1451 06:52:50.898564  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 1452 06:52:50.905515  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
 1453 06:52:50.908960  PCI: 02:00.0 10 *  [0x0 - 0xfff] mem
 1454 06:52:50.912989  PCI: 02:00.0 14 *  [0x1000 - 0x17ff] mem
 1455 06:52:50.913318  
 1456 06:52:50.920793  PCI: 00:1d.0 mem: base: 1800 size: 100000 align: 20 gran: 20 limit: ffffffff done
 1457 06:52:50.925858  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem
 1458 06:52:50.930079  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem
 1459 06:52:50.935018  PCI: 00:1c.0 20 *  [0x11000000 - 0x110fffff] mem
 1460 06:52:50.939517  PCI: 00:1d.0 20 *  [0x11100000 - 0x111fffff] mem
 1461 06:52:50.939940  
 1462 06:52:50.944565  PCI: 00:1f.3 20 *  [0x11200000 - 0x112fffff] mem
 1463 06:52:50.950013  PCI: 00:1f.6 10 *  [0x11300000 - 0x1131ffff] mem
 1464 06:52:50.954507  PCI: 00:14.0 10 *  [0x11320000 - 0x1132ffff] mem
 1465 06:52:50.958990  PCI: 00:04.0 10 *  [0x11330000 - 0x11337fff] mem
 1466 06:52:50.959320  
 1467 06:52:50.964727  PCI: 00:14.3 10 *  [0x11338000 - 0x1133bfff] mem
 1468 06:52:50.968905  PCI: 00:1f.3 10 *  [0x1133c000 - 0x1133ffff] mem
 1469 06:52:50.974486  PCI: 00:14.2 10 *  [0x11340000 - 0x11341fff] mem
 1470 06:52:50.978482  PCI: 00:17.0 10 *  [0x11342000 - 0x11343fff] mem
 1471 06:52:50.984148  PCI: 00:08.0 10 *  [0x11344000 - 0x11344fff] mem
 1472 06:52:50.989146  PCI: 00:12.0 10 *  [0x11345000 - 0x11345fff] mem
 1473 06:52:50.994027  PCI: 00:14.2 18 *  [0x11346000 - 0x11346fff] mem
 1474 06:52:50.998408  PCI: 00:15.0 10 *  [0x11347000 - 0x11347fff] mem
 1475 06:52:51.003036  PCI: 00:15.1 10 *  [0x11348000 - 0x11348fff] mem
 1476 06:52:51.008308  PCI: 00:16.0 10 *  [0x11349000 - 0x11349fff] mem
 1477 06:52:51.013120  PCI: 00:19.0 10 *  [0x1134a000 - 0x1134afff] mem
 1478 06:52:51.018160  PCI: 00:19.0 18 *  [0x1134b000 - 0x1134bfff] mem
 1479 06:52:51.022305  PCI: 00:19.2 18 *  [0x1134c000 - 0x1134cfff] mem
 1480 06:52:51.022657  
 1481 06:52:51.027140  PCI: 00:1f.5 10 *  [0x1134d000 - 0x1134dfff] mem
 1482 06:52:51.027438  
 1483 06:52:51.032130  PCI: 00:17.0 24 *  [0x1134e000 - 0x1134e7ff] mem
 1484 06:52:51.037618  PCI: 00:17.0 14 *  [0x1134f000 - 0x1134f0ff] mem
 1485 06:52:51.042013  PCI: 00:1f.4 10 *  [0x11350000 - 0x113500ff] mem
 1486 06:52:51.050294  DOMAIN: 0000 mem: base: 11350100 size: 11350100 align: 28 gran: 0 limit: ffffffff done
 1487 06:52:51.053846  avoid_fixed_resources: DOMAIN: 0000
 1488 06:52:51.060275  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
 1489 06:52:51.066085  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
 1490 06:52:51.073443  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
 1491 06:52:51.081342  constrain_resources: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)
 1492 06:52:51.088567  constrain_resources: PCI: 00:00.0 08 base 000c0000 limit 89ffffff mem (fixed)
 1493 06:52:51.088875  
 1494 06:52:51.096224  constrain_resources: PCI: 00:00.0 0a base 8a000000 limit 8affffff mem (fixed)
 1495 06:52:51.096557  
 1496 06:52:51.104242  constrain_resources: PCI: 00:00.0 0b base 8b000000 limit 8f7fffff mem (fixed)
 1497 06:52:51.112199  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
 1498 06:52:51.119351  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
 1499 06:52:51.119682  
 1500 06:52:51.127308  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
 1501 06:52:51.134684  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
 1502 06:52:51.141648  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
 1503 06:52:51.144595  Setting resources...
 1504 06:52:51.149957  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
 1505 06:52:51.153926  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io
 1506 06:52:51.158111  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io
 1507 06:52:51.158719  
 1508 06:52:51.161866  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io
 1509 06:52:51.162180  
 1510 06:52:51.165930  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io
 1511 06:52:51.166247  
 1512 06:52:51.172504  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
 1513 06:52:51.178500  PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
 1514 06:52:51.178827  
 1515 06:52:51.185111  PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
 1516 06:52:51.185429  
 1517 06:52:51.191679  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
 1518 06:52:51.197557  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
 1519 06:52:51.205306  DOMAIN: 0000 mem: base:c0000000 size:11350100 align:28 gran:0 limit:dfffffff
 1520 06:52:51.210910  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem
 1521 06:52:51.214923  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem
 1522 06:52:51.219826  PCI: 00:1c.0 20 *  [0xd1000000 - 0xd10fffff] mem
 1523 06:52:51.220107  
 1524 06:52:51.225087  PCI: 00:1d.0 20 *  [0xd1100000 - 0xd11fffff] mem
 1525 06:52:51.229913  PCI: 00:1f.3 20 *  [0xd1200000 - 0xd12fffff] mem
 1526 06:52:51.230193  
 1527 06:52:51.234516  PCI: 00:1f.6 10 *  [0xd1300000 - 0xd131ffff] mem
 1528 06:52:51.239377  PCI: 00:14.0 10 *  [0xd1320000 - 0xd132ffff] mem
 1529 06:52:51.244639  PCI: 00:04.0 10 *  [0xd1330000 - 0xd1337fff] mem
 1530 06:52:51.248868  PCI: 00:14.3 10 *  [0xd1338000 - 0xd133bfff] mem
 1531 06:52:51.249188  
 1532 06:52:51.253701  PCI: 00:1f.3 10 *  [0xd133c000 - 0xd133ffff] mem
 1533 06:52:51.254193  
 1534 06:52:51.258659  PCI: 00:14.2 10 *  [0xd1340000 - 0xd1341fff] mem
 1535 06:52:51.263471  PCI: 00:17.0 10 *  [0xd1342000 - 0xd1343fff] mem
 1536 06:52:51.268970  PCI: 00:08.0 10 *  [0xd1344000 - 0xd1344fff] mem
 1537 06:52:51.273059  PCI: 00:12.0 10 *  [0xd1345000 - 0xd1345fff] mem
 1538 06:52:51.273339  
 1539 06:52:51.278007  PCI: 00:14.2 18 *  [0xd1346000 - 0xd1346fff] mem
 1540 06:52:51.282777  PCI: 00:15.0 10 *  [0xd1347000 - 0xd1347fff] mem
 1541 06:52:51.283088  
 1542 06:52:51.288430  PCI: 00:15.1 10 *  [0xd1348000 - 0xd1348fff] mem
 1543 06:52:51.288739  
 1544 06:52:51.293085  PCI: 00:16.0 10 *  [0xd1349000 - 0xd1349fff] mem
 1545 06:52:51.293756  
 1546 06:52:51.298243  PCI: 00:19.0 10 *  [0xd134a000 - 0xd134afff] mem
 1547 06:52:51.298567  
 1548 06:52:51.303230  PCI: 00:19.0 18 *  [0xd134b000 - 0xd134bfff] mem
 1549 06:52:51.307340  PCI: 00:19.2 18 *  [0xd134c000 - 0xd134cfff] mem
 1550 06:52:51.312154  PCI: 00:1f.5 10 *  [0xd134d000 - 0xd134dfff] mem
 1551 06:52:51.317141  PCI: 00:17.0 24 *  [0xd134e000 - 0xd134e7ff] mem
 1552 06:52:51.321966  PCI: 00:17.0 14 *  [0xd134f000 - 0xd134f0ff] mem
 1553 06:52:51.326993  PCI: 00:1f.4 10 *  [0xd1350000 - 0xd13500ff] mem
 1554 06:52:51.334988  DOMAIN: 0000 mem: next_base: d1350100 size: 11350100 align: 28 gran: 0 done
 1555 06:52:51.341448  PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
 1556 06:52:51.341880  
 1557 06:52:51.348580  PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
 1558 06:52:51.349397  
 1559 06:52:51.356678  PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
 1560 06:52:51.361881  PCI: 01:00.0 14 *  [0xd1000000 - 0xd1000fff] mem
 1561 06:52:51.368878  PCI: 00:1c.0 mem: next_base: d1001000 size: 100000 align: 20 gran: 20 done
 1562 06:52:51.369225  
 1563 06:52:51.376188  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
 1564 06:52:51.383166  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
 1565 06:52:51.391125  PCI: 00:1d.0 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff
 1566 06:52:51.391437  
 1567 06:52:51.396206  PCI: 02:00.0 10 *  [0xd1100000 - 0xd1100fff] mem
 1568 06:52:51.400511  PCI: 02:00.0 14 *  [0xd1101000 - 0xd11017ff] mem
 1569 06:52:51.407893  PCI: 00:1d.0 mem: next_base: d1101800 size: 100000 align: 20 gran: 20 done
 1570 06:52:51.408510  
 1571 06:52:51.412451  Root Device assign_resources, bus 0 link: 0
 1572 06:52:51.417400  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1573 06:52:51.417717  
 1574 06:52:51.425813  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
 1575 06:52:51.433920  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
 1576 06:52:51.442306  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
 1577 06:52:51.450138  PCI: 00:04.0 10 <- [0x00d1330000 - 0x00d1337fff] size 0x00008000 gran 0x0f mem64
 1578 06:52:51.458458  PCI: 00:08.0 10 <- [0x00d1344000 - 0x00d1344fff] size 0x00001000 gran 0x0c mem64
 1579 06:52:51.467096  PCI: 00:12.0 10 <- [0x00d1345000 - 0x00d1345fff] size 0x00001000 gran 0x0c mem64
 1580 06:52:51.474592  PCI: 00:14.0 10 <- [0x00d1320000 - 0x00d132ffff] size 0x00010000 gran 0x10 mem64
 1581 06:52:51.474914  
 1582 06:52:51.478937  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1583 06:52:51.479258  
 1584 06:52:51.483936  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1585 06:52:51.492230  PCI: 00:14.2 10 <- [0x00d1340000 - 0x00d1341fff] size 0x00002000 gran 0x0d mem64
 1586 06:52:51.500522  PCI: 00:14.2 18 <- [0x00d1346000 - 0x00d1346fff] size 0x00001000 gran 0x0c mem64
 1587 06:52:51.509107  PCI: 00:14.3 10 <- [0x00d1338000 - 0x00d133bfff] size 0x00004000 gran 0x0e mem64
 1588 06:52:51.516719  PCI: 00:15.0 10 <- [0x00d1347000 - 0x00d1347fff] size 0x00001000 gran 0x0c mem64
 1589 06:52:51.516993  
 1590 06:52:51.521717  PCI: 00:15.0 assign_resources, bus 1 link: 0
 1591 06:52:51.522026  
 1592 06:52:51.526559  PCI: 00:15.0 assign_resources, bus 1 link: 0
 1593 06:52:51.534175  PCI: 00:15.1 10 <- [0x00d1348000 - 0x00d1348fff] size 0x00001000 gran 0x0c mem64
 1594 06:52:51.534498  
 1595 06:52:51.538725  PCI: 00:15.1 assign_resources, bus 2 link: 0
 1596 06:52:51.539135  
 1597 06:52:51.543870  PCI: 00:15.1 assign_resources, bus 2 link: 0
 1598 06:52:51.551817  PCI: 00:16.0 10 <- [0x00d1349000 - 0x00d1349fff] size 0x00001000 gran 0x0c mem64
 1599 06:52:51.560259  PCI: 00:17.0 10 <- [0x00d1342000 - 0x00d1343fff] size 0x00002000 gran 0x0d mem
 1600 06:52:51.560582  
 1601 06:52:51.567809  PCI: 00:17.0 14 <- [0x00d134f000 - 0x00d134f0ff] size 0x00000100 gran 0x08 mem
 1602 06:52:51.575601  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
 1603 06:52:51.583075  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
 1604 06:52:51.590719  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
 1605 06:52:51.599397  PCI: 00:17.0 24 <- [0x00d134e000 - 0x00d134e7ff] size 0x00000800 gran 0x0b mem
 1606 06:52:51.607336  PCI: 00:19.0 10 <- [0x00d134a000 - 0x00d134afff] size 0x00001000 gran 0x0c mem64
 1607 06:52:51.614733  PCI: 00:19.0 18 <- [0x00d134b000 - 0x00d134bfff] size 0x00001000 gran 0x0c mem64
 1608 06:52:51.619414  PCI: 00:19.0 assign_resources, bus 3 link: 0
 1609 06:52:51.619713  
 1610 06:52:51.624061  PCI: 00:19.0 assign_resources, bus 3 link: 0
 1611 06:52:51.632683  PCI: 00:19.2 18 <- [0x00d134c000 - 0x00d134cfff] size 0x00001000 gran 0x0c mem64
 1612 06:52:51.641058  PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
 1613 06:52:51.641727  
 1614 06:52:51.649916  PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
 1615 06:52:51.658165  PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
 1616 06:52:51.658440  
 1617 06:52:51.663203  PCI: 00:1c.0 assign_resources, bus 1 link: 0
 1618 06:52:51.671070  PCI: 01:00.0 14 <- [0x00d1000000 - 0x00d1000fff] size 0x00001000 gran 0x0c mem
 1619 06:52:51.675807  PCI: 00:1c.0 assign_resources, bus 1 link: 0
 1620 06:52:51.684379  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io
 1621 06:52:51.693425  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
 1622 06:52:51.701450  PCI: 00:1d.0 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem
 1623 06:52:51.701913  
 1624 06:52:51.706080  PCI: 00:1d.0 assign_resources, bus 2 link: 0
 1625 06:52:51.715875  PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d1100fff] size 0x00001000 gran 0x0c mem
 1626 06:52:51.716194  
 1627 06:52:51.726371  PCI: 02:00.0 14 <- [0x00d1101000 - 0x00d11017ff] size 0x00000800 gran 0x0b mem
 1628 06:52:51.732137  PCI: 00:1d.0 assign_resources, bus 2 link: 0
 1629 06:52:51.736667  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1630 06:52:51.737339  
 1631 06:52:51.741541  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1632 06:52:51.741824  
 1633 06:52:51.746752  LPC: Trying to open IO window from 930 size 8
 1634 06:52:51.751361  LPC: Trying to open IO window from 940 size 8
 1635 06:52:51.755607  LPC: Trying to open IO window from 950 size 10
 1636 06:52:51.763884  PCI: 00:1f.3 10 <- [0x00d133c000 - 0x00d133ffff] size 0x00004000 gran 0x0e mem64
 1637 06:52:51.764559  
 1638 06:52:51.771925  PCI: 00:1f.3 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 mem64
 1639 06:52:51.780337  PCI: 00:1f.4 10 <- [0x00d1350000 - 0x00d13500ff] size 0x00000100 gran 0x08 mem64
 1640 06:52:51.780627  
 1641 06:52:51.787983  PCI: 00:1f.5 10 <- [0x00d134d000 - 0x00d134dfff] size 0x00001000 gran 0x0c mem
 1642 06:52:51.788366  
 1643 06:52:51.796736  PCI: 00:1f.6 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem
 1644 06:52:51.801742  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1645 06:52:51.805875  Root Device assign_resources, bus 0 link: 0
 1646 06:52:51.807919  Done setting resources.
 1647 06:52:51.808225  
 1648 06:52:51.815437  Show resources in subtree (Root Device)...After assigning values.
 1649 06:52:51.818859   Root Device child on link 0 CPU_CLUSTER: 0
 1650 06:52:51.823592    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1651 06:52:51.823906  
 1652 06:52:51.824399     APIC: 00
 1653 06:52:51.824711  
 1654 06:52:51.825689     APIC: 02
 1655 06:52:51.826013  
 1656 06:52:51.827045     APIC: 06
 1657 06:52:51.827351  
 1658 06:52:51.828187     APIC: 01
 1659 06:52:51.828497  
 1660 06:52:51.829846     APIC: 03
 1661 06:52:51.831680     APIC: 07
 1662 06:52:51.832175     APIC: 04
 1663 06:52:51.833180     APIC: 05
 1664 06:52:51.833503  
 1665 06:52:51.838051    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1666 06:52:51.847644    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
 1667 06:52:51.858419    DOMAIN: 0000 resource base c0000000 size 11350100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
 1668 06:52:51.858760  
 1669 06:52:51.860066     PCI: 00:00.0
 1670 06:52:51.870481     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1671 06:52:51.879209     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
 1672 06:52:51.879536  
 1673 06:52:51.888915     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1674 06:52:51.897681     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1675 06:52:51.907044     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1676 06:52:51.916585     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1677 06:52:51.916905  
 1678 06:52:51.925682     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
 1679 06:52:51.926175  
 1680 06:52:51.934617     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
 1681 06:52:51.943906     PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
 1682 06:52:51.954111     PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
 1683 06:52:51.963000     PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
 1684 06:52:51.963348  
 1685 06:52:51.973159     PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c
 1686 06:52:51.982434     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
 1687 06:52:51.991967     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
 1688 06:52:51.992277  
 1689 06:52:51.992931     PCI: 00:02.0
 1690 06:52:51.993262  
 1691 06:52:52.003696     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
 1692 06:52:52.014513     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
 1693 06:52:52.023539     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
 1694 06:52:52.025821     PCI: 00:04.0
 1695 06:52:52.035943     PCI: 00:04.0 resource base d1330000 size 8000 align 15 gran 15 limit d1337fff flags 60000201 index 10
 1696 06:52:52.036947     PCI: 00:08.0
 1697 06:52:52.037393  
 1698 06:52:52.047205     PCI: 00:08.0 resource base d1344000 size 1000 align 12 gran 12 limit d1344fff flags 60000201 index 10
 1699 06:52:52.047659  
 1700 06:52:52.049596     PCI: 00:12.0
 1701 06:52:52.059550     PCI: 00:12.0 resource base d1345000 size 1000 align 12 gran 12 limit d1345fff flags 60000201 index 10
 1702 06:52:52.063885     PCI: 00:14.0 child on link 0 USB0 port 0
 1703 06:52:52.064165  
 1704 06:52:52.074538     PCI: 00:14.0 resource base d1320000 size 10000 align 16 gran 16 limit d132ffff flags 60000201 index 10
 1705 06:52:52.078713      USB0 port 0 child on link 0 USB2 port 0
 1706 06:52:52.080431       USB2 port 0
 1707 06:52:52.080715  
 1708 06:52:52.082514       USB2 port 1
 1709 06:52:52.083753       USB2 port 2
 1710 06:52:52.086106       USB2 port 4
 1711 06:52:52.086366  
 1712 06:52:52.087266       USB2 port 5
 1713 06:52:52.087910  
 1714 06:52:52.088865       USB2 port 6
 1715 06:52:52.089175  
 1716 06:52:52.091211       USB2 port 7
 1717 06:52:52.091477  
 1718 06:52:52.093127       USB2 port 8
 1719 06:52:52.094474       USB2 port 9
 1720 06:52:52.096286       USB3 port 0
 1721 06:52:52.096561  
 1722 06:52:52.097700       USB3 port 1
 1723 06:52:52.100168       USB3 port 2
 1724 06:52:52.100445  
 1725 06:52:52.101247       USB3 port 3
 1726 06:52:52.103785       USB3 port 4
 1727 06:52:52.104635     PCI: 00:14.2
 1728 06:52:52.105029  
 1729 06:52:52.115438     PCI: 00:14.2 resource base d1340000 size 2000 align 13 gran 13 limit d1341fff flags 60000201 index 10
 1730 06:52:52.125341     PCI: 00:14.2 resource base d1346000 size 1000 align 12 gran 12 limit d1346fff flags 60000201 index 18
 1731 06:52:52.126684     PCI: 00:14.3
 1732 06:52:52.127045  
 1733 06:52:52.137297     PCI: 00:14.3 resource base d1338000 size 4000 align 14 gran 14 limit d133bfff flags 60000201 index 10
 1734 06:52:52.137604  
 1735 06:52:52.141499     PCI: 00:15.0 child on link 0 I2C: 01:10
 1736 06:52:52.152337     PCI: 00:15.0 resource base d1347000 size 1000 align 12 gran 12 limit d1347fff flags 60000201 index 10
 1737 06:52:52.153326      I2C: 01:10
 1738 06:52:52.153619  
 1739 06:52:52.155116      I2C: 01:10
 1740 06:52:52.156802      I2C: 01:34
 1741 06:52:52.157603  
 1742 06:52:52.160706     PCI: 00:15.1 child on link 0 I2C: 02:2c
 1743 06:52:52.161384  
 1744 06:52:52.171332     PCI: 00:15.1 resource base d1348000 size 1000 align 12 gran 12 limit d1348fff flags 60000201 index 10
 1745 06:52:52.172112  
 1746 06:52:52.172901      I2C: 02:2c
 1747 06:52:52.174121     PCI: 00:16.0
 1748 06:52:52.174385  
 1749 06:52:52.184678     PCI: 00:16.0 resource base d1349000 size 1000 align 12 gran 12 limit d1349fff flags 60000201 index 10
 1750 06:52:52.186005     PCI: 00:17.0
 1751 06:52:52.196873     PCI: 00:17.0 resource base d1342000 size 2000 align 13 gran 13 limit d1343fff flags 60000200 index 10
 1752 06:52:52.206853     PCI: 00:17.0 resource base d134f000 size 100 align 12 gran 8 limit d134f0ff flags 60000200 index 14
 1753 06:52:52.216279     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
 1754 06:52:52.224951     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
 1755 06:52:52.225455  
 1756 06:52:52.233569     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
 1757 06:52:52.233961  
 1758 06:52:52.244571     PCI: 00:17.0 resource base d134e000 size 800 align 12 gran 11 limit d134e7ff flags 60000200 index 24
 1759 06:52:52.248334     PCI: 00:19.0 child on link 0 I2C: 03:50
 1760 06:52:52.248636  
 1761 06:52:52.258459     PCI: 00:19.0 resource base d134a000 size 1000 align 12 gran 12 limit d134afff flags 60000201 index 10
 1762 06:52:52.269121     PCI: 00:19.0 resource base d134b000 size 1000 align 12 gran 12 limit d134bfff flags 60000201 index 18
 1763 06:52:52.270482      I2C: 03:50
 1764 06:52:52.271364  
 1765 06:52:52.272156     PCI: 00:19.2
 1766 06:52:52.283061     PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1767 06:52:52.293481     PCI: 00:19.2 resource base d134c000 size 1000 align 12 gran 12 limit d134cfff flags 60000201 index 18
 1768 06:52:52.294134  
 1769 06:52:52.298224     PCI: 00:1c.0 child on link 0 PCI: 01:00.0
 1770 06:52:52.306940     PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
 1771 06:52:52.307267  
 1772 06:52:52.317530     PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
 1773 06:52:52.327751     PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
 1774 06:52:52.330384      PCI: 01:00.0
 1775 06:52:52.340472      PCI: 01:00.0 resource base d1000000 size 1000 align 12 gran 12 limit d1000fff flags 60000200 index 14
 1776 06:52:52.344532     PCI: 00:1d.0 child on link 0 PCI: 02:00.0
 1777 06:52:52.353618     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
 1778 06:52:52.363736     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
 1779 06:52:52.374032     PCI: 00:1d.0 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20
 1780 06:52:52.375813      PCI: 02:00.0
 1781 06:52:52.386605      PCI: 02:00.0 resource base d1100000 size 1000 align 12 gran 12 limit d1100fff flags 60000200 index 10
 1782 06:52:52.396426      PCI: 02:00.0 resource base d1101000 size 800 align 12 gran 11 limit d11017ff flags 60000200 index 14
 1783 06:52:52.396750  
 1784 06:52:52.400691     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1785 06:52:52.401000  
 1786 06:52:52.409436     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1787 06:52:52.418219     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
 1788 06:52:52.418589  
 1789 06:52:52.419880      PNP: 0c09.0
 1790 06:52:52.420495  
 1791 06:52:52.429011      PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
 1792 06:52:52.429290  
 1793 06:52:52.437883      PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
 1794 06:52:52.446103      PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
 1795 06:52:52.446885  
 1796 06:52:52.447384     PCI: 00:1f.3
 1797 06:52:52.457947     PCI: 00:1f.3 resource base d133c000 size 4000 align 14 gran 14 limit d133ffff flags 60000201 index 10
 1798 06:52:52.468889     PCI: 00:1f.3 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60000201 index 20
 1799 06:52:52.469952     PCI: 00:1f.4
 1800 06:52:52.479067     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
 1801 06:52:52.489323     PCI: 00:1f.4 resource base d1350000 size 100 align 12 gran 8 limit d13500ff flags 60000201 index 10
 1802 06:52:52.490703     PCI: 00:1f.5
 1803 06:52:52.500950     PCI: 00:1f.5 resource base d134d000 size 1000 align 12 gran 12 limit d134dfff flags 60000200 index 10
 1804 06:52:52.503201     PCI: 00:1f.6
 1805 06:52:52.503518  
 1806 06:52:52.513900     PCI: 00:1f.6 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10
 1807 06:52:52.516002  Done allocating resources.
 1808 06:52:52.522472  BS: BS_DEV_RESOURCES times (us): entry 0 run 2548807 exit 36
 1809 06:52:52.524436  Enabling resources...
 1810 06:52:52.524731  
 1811 06:52:52.529221  PCI: 00:00.0 subsystem <- 1028/3e34
 1812 06:52:52.531443  PCI: 00:00.0 cmd <- 06
 1813 06:52:52.531764  
 1814 06:52:52.535677  PCI: 00:02.0 subsystem <- 1028/3ea0
 1815 06:52:52.538197  PCI: 00:02.0 cmd <- 03
 1816 06:52:52.538496  
 1817 06:52:52.541519  PCI: 00:04.0 subsystem <- 1028/1903
 1818 06:52:52.541823  
 1819 06:52:52.544175  PCI: 00:04.0 cmd <- 02
 1820 06:52:52.546813  PCI: 00:08.0 cmd <- 06
 1821 06:52:52.550651  PCI: 00:12.0 subsystem <- 1028/9df9
 1822 06:52:52.553094  PCI: 00:12.0 cmd <- 02
 1823 06:52:52.553414  
 1824 06:52:52.556984  PCI: 00:14.0 subsystem <- 1028/9ded
 1825 06:52:52.559591  PCI: 00:14.0 cmd <- 02
 1826 06:52:52.561852  PCI: 00:14.2 cmd <- 02
 1827 06:52:52.565629  PCI: 00:14.3 subsystem <- 1028/9df0
 1828 06:52:52.565932  
 1829 06:52:52.568668  PCI: 00:14.3 cmd <- 02
 1830 06:52:52.572321  PCI: 00:15.0 subsystem <- 1028/9de8
 1831 06:52:52.574537  PCI: 00:15.0 cmd <- 02
 1832 06:52:52.578085  PCI: 00:15.1 subsystem <- 1028/9de9
 1833 06:52:52.580607  PCI: 00:15.1 cmd <- 02
 1834 06:52:52.584551  PCI: 00:16.0 subsystem <- 1028/9de0
 1835 06:52:52.587353  PCI: 00:16.0 cmd <- 02
 1836 06:52:52.590775  PCI: 00:17.0 subsystem <- 1028/9dd3
 1837 06:52:52.593461  PCI: 00:17.0 cmd <- 03
 1838 06:52:52.597023  PCI: 00:19.0 subsystem <- 1028/9dc5
 1839 06:52:52.597697  
 1840 06:52:52.600014  PCI: 00:19.0 cmd <- 06
 1841 06:52:52.603604  PCI: 00:19.2 subsystem <- 1028/9dc7
 1842 06:52:52.605435  PCI: 00:19.2 cmd <- 06
 1843 06:52:52.609070  PCI: 00:1c.0 bridge ctrl <- 0003
 1844 06:52:52.612769  PCI: 00:1c.0 subsystem <- 1028/9dbf
 1845 06:52:52.616088  Capability: type 0x10 @ 0x40
 1846 06:52:52.618920  Capability: type 0x05 @ 0x80
 1847 06:52:52.619505  
 1848 06:52:52.621662  Capability: type 0x0d @ 0x90
 1849 06:52:52.624173  PCI: 00:1c.0 cmd <- 06
 1850 06:52:52.627411  PCI: 00:1d.0 bridge ctrl <- 0003
 1851 06:52:52.627729  
 1852 06:52:52.631626  PCI: 00:1d.0 subsystem <- 1028/9db4
 1853 06:52:52.633823  Capability: type 0x10 @ 0x40
 1854 06:52:52.634088  
 1855 06:52:52.636862  Capability: type 0x05 @ 0x80
 1856 06:52:52.640188  Capability: type 0x0d @ 0x90
 1857 06:52:52.642765  PCI: 00:1d.0 cmd <- 06
 1858 06:52:52.646389  PCI: 00:1f.0 subsystem <- 1028/9d84
 1859 06:52:52.647109  
 1860 06:52:52.648445  PCI: 00:1f.0 cmd <- 407
 1861 06:52:52.652423  PCI: 00:1f.3 subsystem <- 1028/9dc8
 1862 06:52:52.655075  PCI: 00:1f.3 cmd <- 02
 1863 06:52:52.659557  PCI: 00:1f.4 subsystem <- 1028/9da3
 1864 06:52:52.660998  PCI: 00:1f.4 cmd <- 03
 1865 06:52:52.665323  PCI: 00:1f.5 subsystem <- 1028/9da4
 1866 06:52:52.665604  
 1867 06:52:52.667738  PCI: 00:1f.5 cmd <- 406
 1868 06:52:52.671676  PCI: 00:1f.6 subsystem <- 1028/15be
 1869 06:52:52.671963  
 1870 06:52:52.674248  PCI: 00:1f.6 cmd <- 02
 1871 06:52:52.684373  PCI: 01:00.0 cmd <- 02
 1872 06:52:52.688988  PCI: 02:00.0 cmd <- 06
 1873 06:52:52.693425  done.
 1874 06:52:52.698503  BS: BS_DEV_ENABLE times (us): entry 398 run 170531 exit 0
 1875 06:52:52.701977  Initializing devices...
 1876 06:52:52.703816  Root Device init ...
 1877 06:52:52.707650  Root Device init finished in 2139 usecs
 1878 06:52:52.710867  CPU_CLUSTER: 0 init ...
 1879 06:52:52.714162  CPU_CLUSTER: 0 init finished in 2431 usecs
 1880 06:52:52.714443  
 1881 06:52:52.720943  PCI: 00:00.0 init ...
 1882 06:52:52.723448  CPU TDP: 15 Watts
 1883 06:52:52.725431  CPU PL2 = 51 Watts
 1884 06:52:52.725791  
 1885 06:52:52.730327  PCI: 00:00.0 init finished in 7038 usecs
 1886 06:52:52.732367  PCI: 00:02.0 init ...
 1887 06:52:52.736480  PCI: 00:02.0 init finished in 2229 usecs
 1888 06:52:52.737281  
 1889 06:52:52.739248  PCI: 00:04.0 init ...
 1890 06:52:52.743235  PCI: 00:04.0 init finished in 2228 usecs
 1891 06:52:52.746179  PCI: 00:08.0 init ...
 1892 06:52:52.749676  PCI: 00:08.0 init finished in 2236 usecs
 1893 06:52:52.749951  
 1894 06:52:52.752648  PCI: 00:12.0 init ...
 1895 06:52:52.752934  
 1896 06:52:52.756569  PCI: 00:12.0 init finished in 2237 usecs
 1897 06:52:52.759249  PCI: 00:14.0 init ...
 1898 06:52:52.763587  PCI: 00:14.0 init finished in 2236 usecs
 1899 06:52:52.766142  PCI: 00:14.2 init ...
 1900 06:52:52.766411  
 1901 06:52:52.769631  PCI: 00:14.2 init finished in 2236 usecs
 1902 06:52:52.770024  
 1903 06:52:52.772431  PCI: 00:14.3 init ...
 1904 06:52:52.772697  
 1905 06:52:52.777122  PCI: 00:14.3 init finished in 2241 usecs
 1906 06:52:52.779434  PCI: 00:15.0 init ...
 1907 06:52:52.779701  
 1908 06:52:52.782772  DW I2C bus 0 at 0xd1347000 (400 KHz)
 1909 06:52:52.783031  
 1910 06:52:52.787601  PCI: 00:15.0 init finished in 5937 usecs
 1911 06:52:52.789558  PCI: 00:15.1 init ...
 1912 06:52:52.793581  DW I2C bus 1 at 0xd1348000 (400 KHz)
 1913 06:52:52.797469  PCI: 00:15.1 init finished in 5934 usecs
 1914 06:52:52.800738  PCI: 00:16.0 init ...
 1915 06:52:52.804739  PCI: 00:16.0 init finished in 2236 usecs
 1916 06:52:52.807479  PCI: 00:19.0 init ...
 1917 06:52:52.811191  DW I2C bus 4 at 0xd134a000 (400 KHz)
 1918 06:52:52.815513  PCI: 00:19.0 init finished in 5935 usecs
 1919 06:52:52.817944  PCI: 00:1c.0 init ...
 1920 06:52:52.818215  
 1921 06:52:52.821636  Initializing PCH PCIe bridge.
 1922 06:52:52.821899  
 1923 06:52:52.825188  PCI: 00:1c.0 init finished in 5251 usecs
 1924 06:52:52.828095  PCI: 00:1d.0 init ...
 1925 06:52:52.831325  Initializing PCH PCIe bridge.
 1926 06:52:52.831612  
 1927 06:52:52.834835  PCI: 00:1d.0 init finished in 5250 usecs
 1928 06:52:52.838478  PCI: 00:1f.0 init ...
 1929 06:52:52.842174  IOAPIC: Initializing IOAPIC at 0xfec00000
 1930 06:52:52.842452  
 1931 06:52:52.846291  IOAPIC: Bootstrap Processor Local APIC = 0x00
 1932 06:52:52.848818  IOAPIC: ID = 0x02
 1933 06:52:52.851377  IOAPIC: Dumping registers
 1934 06:52:52.853483    reg 0x0000: 0x02000000
 1935 06:52:52.856104    reg 0x0001: 0x00770020
 1936 06:52:52.858348    reg 0x0002: 0x00000000
 1937 06:52:52.858620  
 1938 06:52:52.865038  PCI: 00:1f.0 init finished in 25038 usecs
 1939 06:52:52.867156  PCI: 00:1f.3 init ...
 1940 06:52:52.872207  HDA: codec_mask = 05
 1941 06:52:52.875370  HDA: Initializing codec #2
 1942 06:52:52.877864  HDA: codec viddid: 8086280b
 1943 06:52:52.881157  HDA: No verb table entry found
 1944 06:52:52.884183  HDA: Initializing codec #0
 1945 06:52:52.887294  HDA: codec viddid: 10ec0236
 1946 06:52:52.893826  HDA: verb loaded.
 1947 06:52:52.898225  PCI: 00:1f.3 init finished in 28835 usecs
 1948 06:52:52.901178  PCI: 00:1f.4 init ...
 1949 06:52:52.905108  PCI: 00:1f.4 init finished in 2237 usecs
 1950 06:52:52.908148  PCI: 00:1f.6 init ...
 1951 06:52:52.911922  PCI: 00:1f.6 init finished in 2237 usecs
 1952 06:52:52.922533  PCI: 01:00.0 init ...
 1953 06:52:52.923295  
 1954 06:52:52.926727  PCI: 01:00.0 init finished in 2237 usecs
 1955 06:52:52.929770  PCI: 02:00.0 init ...
 1956 06:52:52.934084  PCI: 02:00.0 init finished in 2237 usecs
 1957 06:52:52.936774  PNP: 0c09.0 init ...
 1958 06:52:52.940458  EC Label      : 00.00.20
 1959 06:52:52.940744  
 1960 06:52:52.943571  EC Revision   : 9ca674bba
 1961 06:52:52.943975  
 1962 06:52:52.947477  EC Model Num  : 08B9
 1963 06:52:52.951662  EC Build Date : 05/10/19
 1964 06:52:52.960033  PNP: 0c09.0 init finished in 21730 usecs
 1965 06:52:52.961885  Devices initialized
 1966 06:52:52.962471  
 1967 06:52:52.965227  Show all devs... After init.
 1968 06:52:52.967639  Root Device: enabled 1
 1969 06:52:52.970415  CPU_CLUSTER: 0: enabled 1
 1970 06:52:52.970684  
 1971 06:52:52.972661  DOMAIN: 0000: enabled 1
 1972 06:52:52.972928  
 1973 06:52:52.975375  APIC: 00: enabled 1
 1974 06:52:52.976866  PCI: 00:00.0: enabled 1
 1975 06:52:52.979423  PCI: 00:02.0: enabled 1
 1976 06:52:52.982085  PCI: 00:04.0: enabled 1
 1977 06:52:52.984202  PCI: 00:12.0: enabled 1
 1978 06:52:52.986588  PCI: 00:12.5: enabled 0
 1979 06:52:52.989170  PCI: 00:12.6: enabled 0
 1980 06:52:52.991610  PCI: 00:13.0: enabled 0
 1981 06:52:52.991878  
 1982 06:52:52.994270  PCI: 00:14.0: enabled 1
 1983 06:52:52.996566  PCI: 00:14.1: enabled 0
 1984 06:52:52.997245  
 1985 06:52:52.998936  PCI: 00:14.3: enabled 1
 1986 06:52:53.001822  PCI: 00:14.5: enabled 0
 1987 06:52:53.003677  PCI: 00:15.0: enabled 1
 1988 06:52:53.006034  PCI: 00:15.1: enabled 1
 1989 06:52:53.008282  PCI: 00:15.2: enabled 0
 1990 06:52:53.011277  PCI: 00:15.3: enabled 0
 1991 06:52:53.013405  PCI: 00:16.0: enabled 1
 1992 06:52:53.015816  PCI: 00:16.1: enabled 0
 1993 06:52:53.016089  
 1994 06:52:53.017982  PCI: 00:16.2: enabled 0
 1995 06:52:53.018244  
 1996 06:52:53.021077  PCI: 00:16.3: enabled 0
 1997 06:52:53.023305  PCI: 00:16.4: enabled 0
 1998 06:52:53.025879  PCI: 00:16.5: enabled 0
 1999 06:52:53.026166  
 2000 06:52:53.027929  PCI: 00:17.0: enabled 1
 2001 06:52:53.031146  PCI: 00:19.0: enabled 1
 2002 06:52:53.033294  PCI: 00:19.1: enabled 0
 2003 06:52:53.035736  PCI: 00:19.2: enabled 1
 2004 06:52:53.036043  
 2005 06:52:53.037880  PCI: 00:1a.0: enabled 0
 2006 06:52:53.040126  PCI: 00:1c.0: enabled 1
 2007 06:52:53.043192  PCI: 00:1c.1: enabled 0
 2008 06:52:53.045392  PCI: 00:1c.2: enabled 0
 2009 06:52:53.047243  PCI: 00:1c.3: enabled 0
 2010 06:52:53.047807  
 2011 06:52:53.049845  PCI: 00:1c.4: enabled 0
 2012 06:52:53.052455  PCI: 00:1c.5: enabled 0
 2013 06:52:53.055571  PCI: 00:1c.6: enabled 0
 2014 06:52:53.056997  PCI: 00:1c.7: enabled 0
 2015 06:52:53.059560  PCI: 00:1d.0: enabled 1
 2016 06:52:53.062137  PCI: 00:1d.1: enabled 0
 2017 06:52:53.064158  PCI: 00:1d.2: enabled 0
 2018 06:52:53.064491  
 2019 06:52:53.067211  PCI: 00:1d.3: enabled 0
 2020 06:52:53.069211  PCI: 00:1d.4: enabled 0
 2021 06:52:53.069546  
 2022 06:52:53.072523  PCI: 00:1e.0: enabled 0
 2023 06:52:53.074395  PCI: 00:1e.1: enabled 0
 2024 06:52:53.076719  PCI: 00:1e.2: enabled 0
 2025 06:52:53.077031  
 2026 06:52:53.078864  PCI: 00:1e.3: enabled 0
 2027 06:52:53.079363  
 2028 06:52:53.081493  PCI: 00:1f.0: enabled 1
 2029 06:52:53.083981  PCI: 00:1f.1: enabled 0
 2030 06:52:53.084340  
 2031 06:52:53.086238  PCI: 00:1f.2: enabled 0
 2032 06:52:53.089081  PCI: 00:1f.3: enabled 1
 2033 06:52:53.089401  
 2034 06:52:53.091069  PCI: 00:1f.4: enabled 1
 2035 06:52:53.093503  PCI: 00:1f.5: enabled 1
 2036 06:52:53.093766  
 2037 06:52:53.096198  PCI: 00:1f.6: enabled 1
 2038 06:52:53.098558  USB0 port 0: enabled 1
 2039 06:52:53.100769  I2C: 01:10: enabled 1
 2040 06:52:53.103394  I2C: 01:10: enabled 1
 2041 06:52:53.105320  I2C: 01:34: enabled 1
 2042 06:52:53.107309  I2C: 02:2c: enabled 1
 2043 06:52:53.110290  I2C: 03:50: enabled 1
 2044 06:52:53.112248  PNP: 0c09.0: enabled 1
 2045 06:52:53.114316  USB2 port 0: enabled 1
 2046 06:52:53.116364  USB2 port 1: enabled 1
 2047 06:52:53.119052  USB2 port 2: enabled 1
 2048 06:52:53.121047  USB2 port 4: enabled 1
 2049 06:52:53.123587  USB2 port 5: enabled 1
 2050 06:52:53.126541  USB2 port 6: enabled 1
 2051 06:52:53.128090  USB2 port 7: enabled 1
 2052 06:52:53.130988  USB2 port 8: enabled 1
 2053 06:52:53.133121  USB2 port 9: enabled 1
 2054 06:52:53.135451  USB3 port 0: enabled 1
 2055 06:52:53.137577  USB3 port 1: enabled 1
 2056 06:52:53.140141  USB3 port 2: enabled 1
 2057 06:52:53.142406  USB3 port 3: enabled 1
 2058 06:52:53.143022  
 2059 06:52:53.144551  USB3 port 4: enabled 1
 2060 06:52:53.146843  APIC: 02: enabled 1
 2061 06:52:53.149497  APIC: 06: enabled 1
 2062 06:52:53.150448  APIC: 01: enabled 1
 2063 06:52:53.150739  
 2064 06:52:53.152900  APIC: 03: enabled 1
 2065 06:52:53.154667  APIC: 07: enabled 1
 2066 06:52:53.154931  
 2067 06:52:53.157257  APIC: 04: enabled 1
 2068 06:52:53.157956  
 2069 06:52:53.159131  APIC: 05: enabled 1
 2070 06:52:53.159800  
 2071 06:52:53.161349  PCI: 00:08.0: enabled 1
 2072 06:52:53.164346  PCI: 00:14.2: enabled 1
 2073 06:52:53.166285  PCI: 01:00.0: enabled 1
 2074 06:52:53.168520  PCI: 02:00.0: enabled 1
 2075 06:52:53.173938  Disabling ACPI via APMC:
 2076 06:52:53.174206  
 2077 06:52:53.175931  done.
 2078 06:52:53.180520  FMAP: area RW_ELOG found @ 1bf0000 (16384 bytes)
 2079 06:52:53.180791  
 2080 06:52:53.184172  ELOG: NV offset 0x1bf0000 size 0x4000
 2081 06:52:53.192589  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
 2082 06:52:53.198521  ELOG: Event(17) added with size 13 at 2023-01-10 06:52:52 UTC
 2083 06:52:53.203658  POST: Unexpected post code in previous boot: 0x55
 2084 06:52:53.210077  ELOG: Event(A3) added with size 11 at 2023-01-10 06:52:52 UTC
 2085 06:52:53.216767  ELOG: Event(A6) added with size 13 at 2023-01-10 06:52:52 UTC
 2086 06:52:53.222916  ELOG: Event(92) added with size 9 at 2023-01-10 06:52:52 UTC
 2087 06:52:53.223460  
 2088 06:52:53.228674  ELOG: Event(93) added with size 9 at 2023-01-10 06:52:52 UTC
 2089 06:52:53.235034  ELOG: Event(9A) added with size 9 at 2023-01-10 06:52:52 UTC
 2090 06:52:53.235310  
 2091 06:52:53.241078  ELOG: Event(9E) added with size 10 at 2023-01-10 06:52:52 UTC
 2092 06:52:53.241410  
 2093 06:52:53.248274  ELOG: Event(9F) added with size 14 at 2023-01-10 06:52:52 UTC
 2094 06:52:53.253269  BS: BS_DEV_INIT times (us): entry 0 run 469914 exit 78853
 2095 06:52:53.253533  
 2096 06:52:53.259982  ELOG: Event(A1) added with size 10 at 2023-01-10 06:52:52 UTC
 2097 06:52:53.268286  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
 2098 06:52:53.274241  ELOG: Event(A0) added with size 9 at 2023-01-10 06:52:52 UTC
 2099 06:52:53.278062  elog_add_boot_reason: Logged dev mode boot
 2100 06:52:53.278463  
 2101 06:52:53.280508  Finalize devices...
 2102 06:52:53.282357  PCI: 00:17.0 final
 2103 06:52:53.284326  Devices finalized
 2104 06:52:53.289894  FMAP: area RW_NVRAM found @ 1bfa000 (24576 bytes)
 2105 06:52:53.295710  BS: BS_POST_DEVICE times (us): entry 24784 run 5937 exit 5384
 2106 06:52:53.301209  BS: BS_OS_RESUME_CHECK times (us): entry 0 run 96 exit 0
 2107 06:52:53.301753  
 2108 06:52:53.309714  disable_unused_touchscreen: VPD key 'touchscreen_hid' not found, default to ELAN900C
 2109 06:52:53.314524  disable_unused_touchscreen: Disable ACPI0C50
 2110 06:52:53.318921  disable_unused_touchscreen: Enable ELAN900C
 2111 06:52:53.321620  CBFS @ 1d00000 size 300000
 2112 06:52:53.328211  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
 2113 06:52:53.328486  
 2114 06:52:53.331944  CBFS: Locating 'fallback/dsdt.aml'
 2115 06:52:53.335327  CBFS: Found @ offset 10b200 size 4448
 2116 06:52:53.335711  
 2117 06:52:53.338251  CBFS @ 1d00000 size 300000
 2118 06:52:53.338904  
 2119 06:52:53.344935  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
 2120 06:52:53.348021  CBFS: Locating 'fallback/slic'
 2121 06:52:53.348297  
 2122 06:52:53.353224  CBFS: 'fallback/slic' not found.
 2123 06:52:53.357585  ACPI: Writing ACPI tables at 89c0f000.
 2124 06:52:53.358492  ACPI:    * FACS
 2125 06:52:53.358958  
 2126 06:52:53.360196  ACPI:    * DSDT
 2127 06:52:53.363724  Ramoops buffer: 0x100000@0x89b0e000.
 2128 06:52:53.369067  FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
 2129 06:52:53.373131  FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
 2130 06:52:53.377061  ACPI:    * FADT
 2131 06:52:53.378065  SCI is IRQ9
 2132 06:52:53.378347  
 2133 06:52:53.382142  ACPI: added table 1/32, length now 40
 2134 06:52:53.384181  ACPI:     * SSDT
 2135 06:52:53.387792  Found 1 CPU(s) with 8 core(s) each.
 2136 06:52:53.391916  Error: Could not locate 'wifi_sar' in VPD.
 2137 06:52:53.392661  
 2138 06:52:53.395393  Error: failed from getting SAR limits!
 2139 06:52:53.400281  \_SB.PCI0.WIFI: Intel WiFi PCI: 00:14.3
 2140 06:52:53.403740  dw_i2c: bad counts. hcnt = -14 lcnt = 30
 2141 06:52:53.408141  dw_i2c: bad counts. hcnt = -20 lcnt = 40
 2142 06:52:53.412078  dw_i2c: bad counts. hcnt = -18 lcnt = 48
 2143 06:52:53.416948  \_SB.PCI0.I2C0.H010: ELAN Touchscreen at I2C: 01:10
 2144 06:52:53.422180  \_SB.PCI0.I2C0.D034: Melfas Touchscreen at I2C: 01:34
 2145 06:52:53.427414  \_SB.PCI0.I2C1.D02C: ELAN Touchpad at I2C: 02:2c
 2146 06:52:53.431285  \_SB.PCI0.I2C4.TPMI: I2C TPM at I2C: 03:50
 2147 06:52:53.431608  
 2148 06:52:53.437013  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
 2149 06:52:53.443241  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-A Port 1 at USB2 port 1
 2150 06:52:53.443986  
 2151 06:52:53.449789  \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
 2152 06:52:53.454919  \_SB.PCI0.XHCI.RHUB.HS05: Right Type-A Port 2 at USB2 port 4
 2153 06:52:53.460014  \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
 2154 06:52:53.460339  
 2155 06:52:53.464605  \_SB.PCI0.XHCI.RHUB.HS07: WWAN at USB2 port 6
 2156 06:52:53.469092  \_SB.PCI0.XHCI.RHUB.HS08: USH at USB2 port 7
 2157 06:52:53.474289  \_SB.PCI0.XHCI.RHUB.HS09: Fingerprint at USB2 port 8
 2158 06:52:53.474595  
 2159 06:52:53.479003  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
 2160 06:52:53.485226  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
 2161 06:52:53.490894  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-A Port 1 at USB3 port 1
 2162 06:52:53.496416  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
 2163 06:52:53.503056  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 2 at USB3 port 3
 2164 06:52:53.507659  \_SB.PCI0.XHCI.RHUB.SS05: WWAN at USB3 port 4
 2165 06:52:53.507980  
 2166 06:52:53.510983  ACPI: added table 2/32, length now 44
 2167 06:52:53.513323  ACPI:    * MCFG
 2168 06:52:53.516565  ACPI: added table 3/32, length now 48
 2169 06:52:53.517979  ACPI:    * TPM2
 2170 06:52:53.518308  
 2171 06:52:53.521151  TPM2 log created at 89afe000
 2172 06:52:53.524852  ACPI: added table 4/32, length now 52
 2173 06:52:53.526272  ACPI:    * MADT
 2174 06:52:53.526585  
 2175 06:52:53.527914  SCI is IRQ9
 2176 06:52:53.531773  ACPI: added table 5/32, length now 56
 2177 06:52:53.534088  current = 89c14bd0
 2178 06:52:53.536207  ACPI:    * IGD OpRegion
 2179 06:52:53.538069  GMA: Found VBT in CBFS
 2180 06:52:53.541031  GMA: Found valid VBT in CBFS
 2181 06:52:53.545219  ACPI: added table 6/32, length now 60
 2182 06:52:53.546300  ACPI:    * HPET
 2183 06:52:53.546559  
 2184 06:52:53.550435  ACPI: added table 7/32, length now 64
 2185 06:52:53.551050  
 2186 06:52:53.551880  ACPI: done.
 2187 06:52:53.553949  ACPI tables: 31872 bytes.
 2188 06:52:53.554266  
 2189 06:52:53.557111  smbios_write_tables: 89afd000
 2190 06:52:53.559478  recv_ec_data: 0x01
 2191 06:52:53.560105  
 2192 06:52:53.562132  Create SMBIOS type 17
 2193 06:52:53.562850  
 2194 06:52:53.564311  PCI: 00:14.3 (Intel WiFi)
 2195 06:52:53.567814  SMBIOS tables: 708 bytes.
 2196 06:52:53.572230  Writing table forward entry at 0x00000500
 2197 06:52:53.577187  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 461b
 2198 06:52:53.577970  
 2199 06:52:53.580824  Writing coreboot table at 0x89c33000
 2200 06:52:53.586894   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 2201 06:52:53.591091   1. 0000000000001000-000000000009ffff: RAM
 2202 06:52:53.596326   2. 00000000000a0000-00000000000fffff: RESERVED
 2203 06:52:53.600036   3. 0000000000100000-0000000089afcfff: RAM
 2204 06:52:53.605975   4. 0000000089afd000-0000000089c80fff: CONFIGURATION TABLES
 2205 06:52:53.606696  
 2206 06:52:53.610779   5. 0000000089c81000-0000000089cdbfff: RAMSTAGE
 2207 06:52:53.611291  
 2208 06:52:53.617029   6. 0000000089cdc000-0000000089ffffff: CONFIGURATION TABLES
 2209 06:52:53.621495   7. 000000008a000000-000000008f7fffff: RESERVED
 2210 06:52:53.621783  
 2211 06:52:53.626821   8. 00000000e0000000-00000000efffffff: RESERVED
 2212 06:52:53.631223   9. 00000000fc000000-00000000fc000fff: RESERVED
 2213 06:52:53.636339  10. 00000000fe000000-00000000fe00ffff: RESERVED
 2214 06:52:53.640562  11. 00000000fed10000-00000000fed17fff: RESERVED
 2215 06:52:53.640855  
 2216 06:52:53.645735  12. 00000000fed80000-00000000fed83fff: RESERVED
 2217 06:52:53.646050  
 2218 06:52:53.650907  13. 00000000feda0000-00000000feda1fff: RESERVED
 2219 06:52:53.655143  14. 0000000100000000-000000026e7fffff: RAM
 2220 06:52:53.658959  Graphics framebuffer located at 0xc0000000
 2221 06:52:53.662203  Passing 6 GPIOs to payload:
 2222 06:52:53.667355              NAME |       PORT | POLARITY |     VALUE
 2223 06:52:53.672509     write protect | 0x000000dc |     high |      high
 2224 06:52:53.677735          recovery | 0x000000d5 |      low |      high
 2225 06:52:53.678034  
 2226 06:52:53.682960               lid |  undefined |     high |      high
 2227 06:52:53.688566             power |  undefined |     high |       low
 2228 06:52:53.692754             oprom |  undefined |     high |       low
 2229 06:52:53.693555  
 2230 06:52:53.698543          EC in RW |  undefined |     high |       low
 2231 06:52:53.698889  
 2232 06:52:53.700550  recv_ec_data: 0x01
 2233 06:52:53.700876  
 2234 06:52:53.702039  SKU ID: 3
 2235 06:52:53.704582  CBFS @ 1d00000 size 300000
 2236 06:52:53.710370  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
 2237 06:52:53.710691  
 2238 06:52:53.717340  Wrote coreboot table at: 89c33000, 0x5b4 bytes, checksum a344
 2239 06:52:53.719828  coreboot table: 1484 bytes.
 2240 06:52:53.723452  IMD ROOT    0. 89fff000 00001000
 2241 06:52:53.726407  IMD SMALL   1. 89ffe000 00001000
 2242 06:52:53.729451  FSP MEMORY  2. 89d0e000 002f0000
 2243 06:52:53.729764  
 2244 06:52:53.732719  CONSOLE     3. 89cee000 00020000
 2245 06:52:53.736446  TIME STAMP  4. 89ced000 00000910
 2246 06:52:53.739949  VBOOT WORK  5. 89cea000 00003000
 2247 06:52:53.743067  VBOOT       6. 89ce9000 00000c0c
 2248 06:52:53.743350  
 2249 06:52:53.745855  MRC DATA    7. 89ce7000 000018f0
 2250 06:52:53.746185  
 2251 06:52:53.749241  ROMSTG STCK 8. 89ce6000 00000400
 2252 06:52:53.752958  AFTER CAR   9. 89cdc000 0000a000
 2253 06:52:53.756519  RAMSTAGE   10. 89c80000 0005c000
 2254 06:52:53.759873  REFCODE    11. 89c4b000 00035000
 2255 06:52:53.762736  SMM BACKUP 12. 89c3b000 00010000
 2256 06:52:53.766429  COREBOOT   13. 89c33000 00008000
 2257 06:52:53.769691  ACPI       14. 89c0f000 00024000
 2258 06:52:53.772449  ACPI GNVS  15. 89c0e000 00001000
 2259 06:52:53.772785  
 2260 06:52:53.776011  RAMOOPS    16. 89b0e000 00100000
 2261 06:52:53.776333  
 2262 06:52:53.779877  TPM2 TCGLOG17. 89afe000 00010000
 2263 06:52:53.782665  SMBIOS     18. 89afd000 00000800
 2264 06:52:53.784121  IMD small region:
 2265 06:52:53.784426  
 2266 06:52:53.787779    IMD ROOT    0. 89ffec00 00000400
 2267 06:52:53.791556    FSP RUNTIME 1. 89ffebe0 00000004
 2268 06:52:53.794892    POWER STATE 2. 89ffeba0 00000040
 2269 06:52:53.798581    ROMSTAGE    3. 89ffeb80 00000004
 2270 06:52:53.801911    MEM INFO    4. 89ffe9c0 000001a9
 2271 06:52:53.805413    VPD         5. 89ffe980 00000031
 2272 06:52:53.806119  
 2273 06:52:53.809244    COREBOOTFWD 6. 89ffe940 00000028
 2274 06:52:53.811899  MTRR: Physical address space:
 2275 06:52:53.818539  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
 2276 06:52:53.824838  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
 2277 06:52:53.830681  0x00000000000c0000 - 0x000000008b000000 size 0x8af40000 type 6
 2278 06:52:53.836836  0x000000008b000000 - 0x00000000c0000000 size 0x35000000 type 0
 2279 06:52:53.843254  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
 2280 06:52:53.849057  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
 2281 06:52:53.849537  
 2282 06:52:53.855529  0x0000000100000000 - 0x000000026e800000 size 0x16e800000 type 6
 2283 06:52:53.860307  MTRR: Fixed MSR 0x250 0x0606060606060606
 2284 06:52:53.863694  MTRR: Fixed MSR 0x258 0x0606060606060606
 2285 06:52:53.863989  
 2286 06:52:53.867849  MTRR: Fixed MSR 0x259 0x0000000000000000
 2287 06:52:53.872166  MTRR: Fixed MSR 0x268 0x0606060606060606
 2288 06:52:53.872440  
 2289 06:52:53.876086  MTRR: Fixed MSR 0x269 0x0606060606060606
 2290 06:52:53.880129  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2291 06:52:53.884353  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2292 06:52:53.888293  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2293 06:52:53.888568  
 2294 06:52:53.892260  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2295 06:52:53.896657  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2296 06:52:53.900574  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2297 06:52:53.904115  call enable_fixed_mtrr()
 2298 06:52:53.904379  
 2299 06:52:53.907876  CPU physical address size: 39 bits
 2300 06:52:53.911504  MTRR: default type WB/UC MTRR counts: 7/7.
 2301 06:52:53.915704  MTRR: UC selected as default type.
 2302 06:52:53.922064  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
 2303 06:52:53.927306  MTRR: 1 base 0x0000000080000000 mask 0x0000007ff8000000 type 6
 2304 06:52:53.927578  
 2305 06:52:53.933555  MTRR: 2 base 0x0000000088000000 mask 0x0000007ffe000000 type 6
 2306 06:52:53.933831  
 2307 06:52:53.939817  MTRR: 3 base 0x000000008a000000 mask 0x0000007fff000000 type 6
 2308 06:52:53.940103  
 2309 06:52:53.946267  MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
 2310 06:52:53.952562  MTRR: 5 base 0x0000000100000000 mask 0x0000007f00000000 type 6
 2311 06:52:53.958861  MTRR: 6 base 0x0000000200000000 mask 0x0000007f80000000 type 6
 2312 06:52:53.959753  
 2313 06:52:53.960359  
 2314 06:52:53.961181  MTRR check
 2315 06:52:53.963279  Fixed MTRRs   : Enabled
 2316 06:52:53.963597  
 2317 06:52:53.965660  Variable MTRRs: Enabled
 2318 06:52:53.966029  
 2319 06:52:53.966722  
 2320 06:52:53.970242  MTRR: Fixed MSR 0x250 0x0606060606060606
 2321 06:52:53.974091  MTRR: Fixed MSR 0x258 0x0606060606060606
 2322 06:52:53.978001  MTRR: Fixed MSR 0x259 0x0000000000000000
 2323 06:52:53.978287  
 2324 06:52:53.982389  MTRR: Fixed MSR 0x268 0x0606060606060606
 2325 06:52:53.986671  MTRR: Fixed MSR 0x269 0x0606060606060606
 2326 06:52:53.991303  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2327 06:52:53.994877  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2328 06:52:53.998732  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2329 06:52:53.998997  
 2330 06:52:54.003346  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2331 06:52:54.007231  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2332 06:52:54.011023  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2333 06:52:54.011288  
 2334 06:52:54.017759  BS: BS_WRITE_TABLES times (us): entry 17201 run 490299 exit 157143
 2335 06:52:54.020330  call enable_fixed_mtrr()
 2336 06:52:54.022868  CBFS @ 1d00000 size 300000
 2337 06:52:54.029470  CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
 2338 06:52:54.030197  
 2339 06:52:54.032831  CPU physical address size: 39 bits
 2340 06:52:54.036747  CBFS: Locating 'fallback/payload'
 2341 06:52:54.040484  MTRR: Fixed MSR 0x250 0x0606060606060606
 2342 06:52:54.040754  
 2343 06:52:54.044576  MTRR: Fixed MSR 0x250 0x0606060606060606
 2344 06:52:54.044857  
 2345 06:52:54.049174  MTRR: Fixed MSR 0x258 0x0606060606060606
 2346 06:52:54.049947  
 2347 06:52:54.052842  MTRR: Fixed MSR 0x259 0x0000000000000000
 2348 06:52:54.053174  
 2349 06:52:54.057272  MTRR: Fixed MSR 0x268 0x0606060606060606
 2350 06:52:54.060929  MTRR: Fixed MSR 0x269 0x0606060606060606
 2351 06:52:54.061554  
 2352 06:52:54.064980  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2353 06:52:54.065266  
 2354 06:52:54.069356  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2355 06:52:54.073448  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2356 06:52:54.078082  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2357 06:52:54.081372  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2358 06:52:54.086441  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2359 06:52:54.089820  MTRR: Fixed MSR 0x258 0x0606060606060606
 2360 06:52:54.092469  call enable_fixed_mtrr()
 2361 06:52:54.096443  MTRR: Fixed MSR 0x259 0x0000000000000000
 2362 06:52:54.100772  MTRR: Fixed MSR 0x268 0x0606060606060606
 2363 06:52:54.104500  MTRR: Fixed MSR 0x269 0x0606060606060606
 2364 06:52:54.104770  
 2365 06:52:54.108974  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2366 06:52:54.113481  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2367 06:52:54.116746  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2368 06:52:54.121080  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2369 06:52:54.121361  
 2370 06:52:54.124998  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2371 06:52:54.125337  
 2372 06:52:54.129161  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2373 06:52:54.129735  
 2374 06:52:54.132931  CPU physical address size: 39 bits
 2375 06:52:54.136185  call enable_fixed_mtrr()
 2376 06:52:54.140361  CBFS: Found @ offset 1cf4c0 size 3a954
 2377 06:52:54.143027  CPU physical address size: 39 bits
 2378 06:52:54.143541  
 2379 06:52:54.147012  MTRR: Fixed MSR 0x250 0x0606060606060606
 2380 06:52:54.147522  
 2381 06:52:54.151976  MTRR: Fixed MSR 0x250 0x0606060606060606
 2382 06:52:54.155299  MTRR: Fixed MSR 0x258 0x0606060606060606
 2383 06:52:54.155590  
 2384 06:52:54.159894  MTRR: Fixed MSR 0x259 0x0000000000000000
 2385 06:52:54.163557  MTRR: Fixed MSR 0x268 0x0606060606060606
 2386 06:52:54.167378  MTRR: Fixed MSR 0x269 0x0606060606060606
 2387 06:52:54.167739  
 2388 06:52:54.171757  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2389 06:52:54.176303  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2390 06:52:54.180290  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2391 06:52:54.184496  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2392 06:52:54.188040  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2393 06:52:54.192645  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2394 06:52:54.196508  MTRR: Fixed MSR 0x258 0x0606060606060606
 2395 06:52:54.196822  
 2396 06:52:54.201599  MTRR: Fixed MSR 0x259 0x0000000000000000
 2397 06:52:54.204503  MTRR: Fixed MSR 0x268 0x0606060606060606
 2398 06:52:54.204775  
 2399 06:52:54.209387  MTRR: Fixed MSR 0x269 0x0606060606060606
 2400 06:52:54.212890  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2401 06:52:54.217312  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2402 06:52:54.221741  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2403 06:52:54.225390  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2404 06:52:54.229422  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2405 06:52:54.233190  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2406 06:52:54.236040  call enable_fixed_mtrr()
 2407 06:52:54.236689  
 2408 06:52:54.238918  call enable_fixed_mtrr()
 2409 06:52:54.242662  CPU physical address size: 39 bits
 2410 06:52:54.245895  CPU physical address size: 39 bits
 2411 06:52:54.246370  
 2412 06:52:54.250409  Checking segment from ROM address 0xffecf4f8
 2413 06:52:54.255172  MTRR: Fixed MSR 0x250 0x0606060606060606
 2414 06:52:54.258556  MTRR: Fixed MSR 0x250 0x0606060606060606
 2415 06:52:54.262775  MTRR: Fixed MSR 0x258 0x0606060606060606
 2416 06:52:54.263515  
 2417 06:52:54.267176  MTRR: Fixed MSR 0x259 0x0000000000000000
 2418 06:52:54.271217  MTRR: Fixed MSR 0x268 0x0606060606060606
 2419 06:52:54.275130  MTRR: Fixed MSR 0x269 0x0606060606060606
 2420 06:52:54.279597  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2421 06:52:54.283698  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2422 06:52:54.286969  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2423 06:52:54.287247  
 2424 06:52:54.291303  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2425 06:52:54.291590  
 2426 06:52:54.295657  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2427 06:52:54.299640  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2428 06:52:54.303883  MTRR: Fixed MSR 0x258 0x0606060606060606
 2429 06:52:54.306373  call enable_fixed_mtrr()
 2430 06:52:54.307145  
 2431 06:52:54.310490  MTRR: Fixed MSR 0x259 0x0000000000000000
 2432 06:52:54.314914  MTRR: Fixed MSR 0x268 0x0606060606060606
 2433 06:52:54.318774  MTRR: Fixed MSR 0x269 0x0606060606060606
 2434 06:52:54.322721  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2435 06:52:54.327043  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2436 06:52:54.330922  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2437 06:52:54.334972  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2438 06:52:54.335250  
 2439 06:52:54.339489  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2440 06:52:54.342928  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2441 06:52:54.343294  
 2442 06:52:54.347054  CPU physical address size: 39 bits
 2443 06:52:54.347641  
 2444 06:52:54.350167  call enable_fixed_mtrr()
 2445 06:52:54.350439  
 2446 06:52:54.354586  Checking segment from ROM address 0xffecf514
 2447 06:52:54.355157  
 2448 06:52:54.357910  CPU physical address size: 39 bits
 2449 06:52:54.362407  Loading segment from ROM address 0xffecf4f8
 2450 06:52:54.364851    code (compression=0)
 2451 06:52:54.365128  
 2452 06:52:54.373699    New segment dstaddr 0x30100018 memsize 0x26518f8 srcaddr 0xffecf530 filesize 0x3a91c
 2453 06:52:54.381571  Loading Segment: addr: 0x30100018 memsz: 0x00000000026518f8 filesz: 0x000000000003a91c
 2454 06:52:54.383963  it's not compressed!
 2455 06:52:54.384751  
 2456 06:52:54.465273  [ 0x30100018, 3013a934, 0x32751910) <- ffecf530
 2457 06:52:54.472179  Clearing Segment: addr: 0x000000003013a934 memsz: 0x0000000002616fdc
 2458 06:52:54.472479  
 2459 06:52:54.480491  Loading segment from ROM address 0xffecf514
 2460 06:52:54.483065    Entry Point 0x30100018
 2461 06:52:54.484780  Loaded segments
 2462 06:52:54.494266  Finalizing chipset.
 2463 06:52:54.495664  Finalizing SMM.
 2464 06:52:54.501840  BS: BS_PAYLOAD_LOAD times (us): entry 1 run 466637 exit 11530
 2465 06:52:54.502190  
 2466 06:52:54.505979  mp_park_aps done after 0 msecs.
 2467 06:52:54.509395  Jumping to boot code at 30100018(89c33000)
 2468 06:52:54.510017  
 2469 06:52:54.518672  CPU0: stack: 89cca000 - 89ccb000, lowest used address 89ccaa9c, stack used: 1380 bytes
 2470 06:52:54.518809  
 2471 06:52:54.518920  
 2472 06:52:54.519222  
 2473 06:52:54.521870  Starting depthcharge on sarien...
 2474 06:52:54.522663  end: 2.2.3 depthcharge-start (duration 00:00:28) [common]
 2475 06:52:54.522790  start: 2.2.4 bootloader-commands (timeout 00:04:32) [common]
 2476 06:52:54.522894  Setting prompt string to ['sarien:']
 2477 06:52:54.522984  bootloader-commands: Wait for prompt ['sarien:'] (timeout 00:04:32)
 2478 06:52:54.523144  
 2479 06:52:54.530501  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
 2480 06:52:54.530628  
 2481 06:52:54.537389  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
 2482 06:52:54.537514  
 2483 06:52:54.545237  WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime!
 2484 06:52:54.545379  
 2485 06:52:54.547163  BIOS MMAP details:
 2486 06:52:54.547288  
 2487 06:52:54.550407  IFD Base Offset  : 0x1000000
 2488 06:52:54.550528  
 2489 06:52:54.552860  IFD End Offset   : 0x2000000
 2490 06:52:54.553327  
 2491 06:52:54.556184  MMAP Size        : 0x1000000
 2492 06:52:54.556323  
 2493 06:52:54.558799  MMAP Start       : 0xff000000
 2494 06:52:54.559117  
 2495 06:52:54.565343  Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff
 2496 06:52:54.565663  
 2497 06:52:54.573967  New NVMe Controller 0x3214e110 @ 00:1d:04
 2498 06:52:54.574104  
 2499 06:52:54.578382  New NVMe Controller 0x3214e1d8 @ 00:1d:00
 2500 06:52:54.578473  
 2501 06:52:54.584362  The GBB signature is at 0x30000014 and is:  24 47 42 42
 2502 06:52:54.584452  
 2503 06:52:54.590030  Wipe memory regions:
 2504 06:52:54.590126  
 2505 06:52:54.594390  	[0x00000000001000, 0x000000000a0000)
 2506 06:52:54.594486  
 2507 06:52:54.598449  	[0x00000000100000, 0x00000030000000)
 2508 06:52:54.598580  
 2509 06:52:54.683805  	[0x00000032751910, 0x00000089afd000)
 2510 06:52:54.684200  
 2511 06:52:54.837159  	[0x00000100000000, 0x0000026e800000)
 2512 06:52:54.837748  
 2513 06:52:55.849905  R8152: Initializing
 2514 06:52:55.850281  
 2515 06:52:55.852538  Version 6 (ocp_data = 5c30)
 2516 06:52:55.853275  
 2517 06:52:55.856129  R8152: Done initializing
 2518 06:52:55.856207  
 2519 06:52:55.858373  Adding net device
 2520 06:52:55.858474  
 2521 06:52:55.863776  [firmware-sarien-12200.B-collabora] Apr  9 2021 09:49:38
 2522 06:52:55.864159  
 2523 06:52:55.864439  
 2524 06:52:55.864530  
 2525 06:52:55.865293  Setting prompt string to ['sarien:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2527 06:52:55.966057  sarien: tftpboot 192.168.201.1 8649871/tftp-deploy-2qrx1g67/kernel/bzImage 8649871/tftp-deploy-2qrx1g67/kernel/cmdline 8649871/tftp-deploy-2qrx1g67/ramdisk/ramdisk.cpio.gz
 2528 06:52:55.966245  Setting prompt string to 'Starting kernel'
 2529 06:52:55.966398  Setting prompt string to ['Starting kernel']
 2530 06:52:55.966474  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2531 06:52:55.966551  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:31)
 2532 06:52:55.967432  tftpboot 192.168.201.1 8649871/tftp-deploy-2qrx1g67/kernel/bzImage 8649871/tftp-deploy-2qrx1g67/kernel/cmdline 8649871/tftp-deploy-2qrx1g67/ramdisk/ramdisk.cpio.gz
 2533 06:52:55.968020  
 2534 06:52:55.968176  
 2535 06:52:55.969231  Waiting for link
 2536 06:52:55.969899  
 2537 06:52:56.170259  done.
 2538 06:52:56.170450  
 2539 06:52:56.172664  MAC: 00:24:32:30:79:bd
 2540 06:52:56.172845  
 2541 06:52:56.175351  Sending DHCP discover... done.
 2542 06:52:56.175978  
 2543 06:52:56.178204  Waiting for reply... done.
 2544 06:52:56.178334  
 2545 06:52:56.180868  Sending DHCP request... done.
 2546 06:52:56.181007  
 2547 06:52:56.183917  Waiting for reply... done.
 2548 06:52:56.184042  
 2549 06:52:56.186968  My ip is 192.168.201.166
 2550 06:52:56.187091  
 2551 06:52:56.189718  The DHCP server ip is 192.168.201.1
 2552 06:52:56.190181  
 2553 06:52:56.195309  TFTP server IP predefined by user: 192.168.201.1
 2554 06:52:56.195460  
 2555 06:52:56.201894  Bootfile predefined by user: 8649871/tftp-deploy-2qrx1g67/kernel/bzImage
 2556 06:52:56.202057  
 2557 06:52:56.205388  Sending tftp read request... done.
 2558 06:52:56.205486  
 2559 06:52:56.209136  Waiting for the transfer... 
 2560 06:52:56.209852  
 2561 06:52:56.747341  00000000 ################################################################
 2562 06:52:56.747510  
 2563 06:52:57.283989  00080000 ################################################################
 2564 06:52:57.284136  
 2565 06:52:57.807894  00100000 ################################################################
 2566 06:52:57.808635  
 2567 06:52:58.327033  00180000 ################################################################
 2568 06:52:58.327683  
 2569 06:52:58.852344  00200000 ################################################################
 2570 06:52:58.852935  
 2571 06:52:59.373356  00280000 ################################################################
 2572 06:52:59.374014  
 2573 06:52:59.921419  00300000 ################################################################
 2574 06:52:59.921569  
 2575 06:53:00.464874  00380000 ################################################################
 2576 06:53:00.465263  
 2577 06:53:01.034261  00400000 ################################################################
 2578 06:53:01.034399  
 2579 06:53:01.614322  00480000 ################################################################
 2580 06:53:01.614504  
 2581 06:53:02.195988  00500000 ################################################################
 2582 06:53:02.196655  
 2583 06:53:02.729185  00580000 ################################################################
 2584 06:53:02.729899  
 2585 06:53:03.317884  00600000 ################################################################
 2586 06:53:03.318569  
 2587 06:53:03.844167  00680000 ################################################################
 2588 06:53:03.844872  
 2589 06:53:04.079117  00700000 ############################# done.
 2590 06:53:04.079250  
 2591 06:53:04.082335  The bootfile was 7573392 bytes long.
 2592 06:53:04.082650  
 2593 06:53:04.085670  Sending tftp read request... done.
 2594 06:53:04.085756  
 2595 06:53:04.088982  Waiting for the transfer... 
 2596 06:53:04.089711  
 2597 06:53:04.638967  00000000 ################################################################
 2598 06:53:04.639698  
 2599 06:53:05.187498  00080000 ################################################################
 2600 06:53:05.188184  
 2601 06:53:05.747590  00100000 ################################################################
 2602 06:53:05.747733  
 2603 06:53:06.297944  00180000 ################################################################
 2604 06:53:06.298123  
 2605 06:53:06.850372  00200000 ################################################################
 2606 06:53:06.850514  
 2607 06:53:07.426989  00280000 ################################################################
 2608 06:53:07.427368  
 2609 06:53:07.957046  00300000 ################################################################
 2610 06:53:07.957424  
 2611 06:53:08.486426  00380000 ################################################################
 2612 06:53:08.486566  
 2613 06:53:09.022188  00400000 ################################################################
 2614 06:53:09.022648  
 2615 06:53:09.548611  00480000 ################################################################
 2616 06:53:09.548768  
 2617 06:53:10.088170  00500000 ################################################################
 2618 06:53:10.088554  
 2619 06:53:10.620091  00580000 ################################################################
 2620 06:53:10.620861  
 2621 06:53:11.145243  00600000 ################################################################
 2622 06:53:11.146025  
 2623 06:53:11.669988  00680000 ################################################################
 2624 06:53:11.670146  
 2625 06:53:12.206481  00700000 ################################################################
 2626 06:53:12.207158  
 2627 06:53:12.742465  00780000 ################################################################
 2628 06:53:12.742860  
 2629 06:53:12.913593  00800000 ##################### done.
 2630 06:53:12.913735  
 2631 06:53:12.916962  Sending tftp read request... done.
 2632 06:53:12.917059  
 2633 06:53:12.919337  Waiting for the transfer... 
 2634 06:53:12.919435  
 2635 06:53:12.921396  00000000 # done.
 2636 06:53:12.921483  
 2637 06:53:12.930154  Command line loaded dynamically from TFTP file: 8649871/tftp-deploy-2qrx1g67/kernel/cmdline
 2638 06:53:12.930244  
 2639 06:53:12.947460  The command line is: earlyprintk=uart8250,mmio32,0xde000000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
 2640 06:53:12.947839  
 2641 06:53:12.954880  Shutting down all USB controllers.
 2642 06:53:12.955552  
 2643 06:53:12.957487  Removing current net device
 2644 06:53:12.958177  
 2645 06:53:12.960986  EC: exit firmware mode
 2646 06:53:12.961513  
 2647 06:53:12.964356  Finalizing coreboot
 2648 06:53:12.964448  
 2649 06:53:12.970393  Exiting depthcharge with code 4 at timestamp: 26127754
 2650 06:53:12.970612  
 2651 06:53:12.970773  
 2652 06:53:12.971986  end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
 2653 06:53:12.972100  start: 2.2.5 auto-login-action (timeout 00:04:14) [common]
 2654 06:53:12.972209  Setting prompt string to ['Linux version [0-9]']
 2655 06:53:12.972320  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2656 06:53:12.972429  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2657 06:53:12.972679  Starting kernel ...
 2658 06:53:12.972758  
 2659 06:53:12.973182  
 2660 06:53:12.973296  
 2662 06:57:26.973037  end: 2.2.5 auto-login-action (duration 00:04:14) [common]
 2664 06:57:26.974097  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 254 seconds'
 2666 06:57:26.974888  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2669 06:57:26.976196  end: 2 depthcharge-action (duration 00:05:00) [common]
 2671 06:57:26.977405  Cleaning after the job
 2672 06:57:26.977850  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8649871/tftp-deploy-2qrx1g67/ramdisk
 2673 06:57:26.980665  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8649871/tftp-deploy-2qrx1g67/kernel
 2674 06:57:26.983195  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8649871/tftp-deploy-2qrx1g67/modules
 2675 06:57:26.984074  start: 5.1 power-off (timeout 00:00:30) [common]
 2676 06:57:26.984856  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-4' '--port=1' '--command=off'
 2677 06:57:27.010548  >> Command sent successfully.

 2678 06:57:27.012518  Returned 0 in 0 seconds
 2679 06:57:27.113676  end: 5.1 power-off (duration 00:00:00) [common]
 2681 06:57:27.115119  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2682 06:57:27.116229  Listened to connection for namespace 'common' for up to 1s
 2683 06:57:28.120091  Finalising connection for namespace 'common'
 2684 06:57:28.120325  Disconnecting from shell: Finalise
 2685 06:57:28.221437  end: 5.2 read-feedback (duration 00:00:01) [common]
 2686 06:57:28.222092  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8649871
 2687 06:57:28.230448  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8649871
 2688 06:57:28.230576  JobError: Your job cannot terminate cleanly.