Boot log: acer-cb317-1h-c3z6-dedede
- Errors: 2
- Boot result: FAIL
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
1 06:52:23.799280 lava-dispatcher, installed at version: 2022.11
2 06:52:23.799498 start: 0 validate
3 06:52:23.799643 Start time: 2023-01-10 06:52:23.799635+00:00 (UTC)
4 06:52:23.799781 Using caching service: 'http://localhost/cache/?uri=%s'
5 06:52:23.799924 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230109.0%2Famd64%2Finitrd.cpio.gz exists
6 06:52:23.815418 Using caching service: 'http://localhost/cache/?uri=%s'
7 06:52:23.815655 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-799-g1229c813bcd9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 06:52:23.832204 Using caching service: 'http://localhost/cache/?uri=%s'
9 06:52:23.832355 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230109.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 06:52:23.846156 Using caching service: 'http://localhost/cache/?uri=%s'
11 06:52:23.846322 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-799-g1229c813bcd9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 06:52:23.865973 validate duration: 0.07
14 06:52:23.866281 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 06:52:23.866400 start: 1.1 download-retry (timeout 00:10:00) [common]
16 06:52:23.866546 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 06:52:23.866697 Not decompressing ramdisk as can be used compressed.
18 06:52:23.866862 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230109.0/amd64/initrd.cpio.gz
19 06:52:23.866949 saving as /var/lib/lava/dispatcher/tmp/8649822/tftp-deploy-c26wlj7k/ramdisk/initrd.cpio.gz
20 06:52:23.867017 total size: 5432130 (5MB)
21 06:52:23.895984 progress 0% (0MB)
22 06:52:23.942478 progress 5% (0MB)
23 06:52:23.958291 progress 10% (0MB)
24 06:52:23.979050 progress 15% (0MB)
25 06:52:24.011367 progress 20% (1MB)
26 06:52:24.039272 progress 25% (1MB)
27 06:52:24.058697 progress 30% (1MB)
28 06:52:24.083507 progress 35% (1MB)
29 06:52:24.105028 progress 40% (2MB)
30 06:52:24.126315 progress 45% (2MB)
31 06:52:24.141536 progress 50% (2MB)
32 06:52:24.164650 progress 55% (2MB)
33 06:52:24.182798 progress 60% (3MB)
34 06:52:24.199353 progress 65% (3MB)
35 06:52:24.221120 progress 70% (3MB)
36 06:52:24.234938 progress 75% (3MB)
37 06:52:24.252332 progress 80% (4MB)
38 06:52:24.263411 progress 85% (4MB)
39 06:52:24.274668 progress 90% (4MB)
40 06:52:24.282369 progress 95% (4MB)
41 06:52:24.290063 progress 100% (5MB)
42 06:52:24.290770 5MB downloaded in 0.42s (12.23MB/s)
43 06:52:24.291177 end: 1.1.1 http-download (duration 00:00:00) [common]
45 06:52:24.291864 end: 1.1 download-retry (duration 00:00:00) [common]
46 06:52:24.292113 start: 1.2 download-retry (timeout 00:10:00) [common]
47 06:52:24.292359 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 06:52:24.292636 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-799-g1229c813bcd9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 06:52:24.292828 saving as /var/lib/lava/dispatcher/tmp/8649822/tftp-deploy-c26wlj7k/kernel/bzImage
50 06:52:24.293004 total size: 7573392 (7MB)
51 06:52:24.293177 No compression specified
52 06:52:24.305059 progress 0% (0MB)
53 06:52:24.328227 progress 5% (0MB)
54 06:52:24.342177 progress 10% (0MB)
55 06:52:24.355828 progress 15% (1MB)
56 06:52:24.372568 progress 20% (1MB)
57 06:52:24.383669 progress 25% (1MB)
58 06:52:24.398548 progress 30% (2MB)
59 06:52:24.415568 progress 35% (2MB)
60 06:52:24.430983 progress 40% (2MB)
61 06:52:24.445834 progress 45% (3MB)
62 06:52:24.456876 progress 50% (3MB)
63 06:52:24.472016 progress 55% (4MB)
64 06:52:24.486404 progress 60% (4MB)
65 06:52:24.509339 progress 65% (4MB)
66 06:52:24.528474 progress 70% (5MB)
67 06:52:24.557155 progress 75% (5MB)
68 06:52:24.572533 progress 80% (5MB)
69 06:52:24.602266 progress 85% (6MB)
70 06:52:24.628765 progress 90% (6MB)
71 06:52:24.654289 progress 95% (6MB)
72 06:52:24.671913 progress 100% (7MB)
73 06:52:24.672127 7MB downloaded in 0.38s (19.05MB/s)
74 06:52:24.672302 end: 1.2.1 http-download (duration 00:00:00) [common]
76 06:52:24.672579 end: 1.2 download-retry (duration 00:00:00) [common]
77 06:52:24.672682 start: 1.3 download-retry (timeout 00:09:59) [common]
78 06:52:24.672781 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 06:52:24.672898 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230109.0/amd64/full.rootfs.tar.xz
80 06:52:24.672975 saving as /var/lib/lava/dispatcher/tmp/8649822/tftp-deploy-c26wlj7k/nfsrootfs/full.rootfs.tar
81 06:52:24.673045 total size: 133363808 (127MB)
82 06:52:24.673116 Using unxz to decompress xz
83 06:52:24.678752 progress 0% (0MB)
84 06:52:25.049136 progress 5% (6MB)
85 06:52:25.450611 progress 10% (12MB)
86 06:52:25.770282 progress 15% (19MB)
87 06:52:25.990766 progress 20% (25MB)
88 06:52:26.266416 progress 25% (31MB)
89 06:52:26.647182 progress 30% (38MB)
90 06:52:27.036751 progress 35% (44MB)
91 06:52:27.472393 progress 40% (50MB)
92 06:52:27.897588 progress 45% (57MB)
93 06:52:28.293909 progress 50% (63MB)
94 06:52:28.707060 progress 55% (69MB)
95 06:52:29.108254 progress 60% (76MB)
96 06:52:29.512080 progress 65% (82MB)
97 06:52:29.913526 progress 70% (89MB)
98 06:52:30.317910 progress 75% (95MB)
99 06:52:30.807324 progress 80% (101MB)
100 06:52:31.291961 progress 85% (108MB)
101 06:52:31.596508 progress 90% (114MB)
102 06:52:31.983396 progress 95% (120MB)
103 06:52:32.424216 progress 100% (127MB)
104 06:52:32.431408 127MB downloaded in 7.76s (16.39MB/s)
105 06:52:32.431701 end: 1.3.1 http-download (duration 00:00:08) [common]
107 06:52:32.432006 end: 1.3 download-retry (duration 00:00:08) [common]
108 06:52:32.432114 start: 1.4 download-retry (timeout 00:09:51) [common]
109 06:52:32.432219 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 06:52:32.432365 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-799-g1229c813bcd9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 06:52:32.432453 saving as /var/lib/lava/dispatcher/tmp/8649822/tftp-deploy-c26wlj7k/modules/modules.tar
112 06:52:32.432526 total size: 51848 (0MB)
113 06:52:32.432609 Using unxz to decompress xz
114 06:52:32.790058 progress 63% (0MB)
115 06:52:32.791784 progress 100% (0MB)
116 06:52:32.799388 0MB downloaded in 0.37s (0.13MB/s)
117 06:52:32.799655 end: 1.4.1 http-download (duration 00:00:00) [common]
119 06:52:32.799949 end: 1.4 download-retry (duration 00:00:00) [common]
120 06:52:32.800062 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
121 06:52:32.800194 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
122 06:52:34.234565 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8649822/extract-nfsrootfs-cbw384u9
123 06:52:34.234789 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 06:52:34.234905 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
125 06:52:34.235055 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8649822/lava-overlay-3jvlrsd3
126 06:52:34.235168 makedir: /var/lib/lava/dispatcher/tmp/8649822/lava-overlay-3jvlrsd3/lava-8649822/bin
127 06:52:34.235264 makedir: /var/lib/lava/dispatcher/tmp/8649822/lava-overlay-3jvlrsd3/lava-8649822/tests
128 06:52:34.235355 makedir: /var/lib/lava/dispatcher/tmp/8649822/lava-overlay-3jvlrsd3/lava-8649822/results
129 06:52:34.235463 Creating /var/lib/lava/dispatcher/tmp/8649822/lava-overlay-3jvlrsd3/lava-8649822/bin/lava-add-keys
130 06:52:34.235613 Creating /var/lib/lava/dispatcher/tmp/8649822/lava-overlay-3jvlrsd3/lava-8649822/bin/lava-add-sources
131 06:52:34.235743 Creating /var/lib/lava/dispatcher/tmp/8649822/lava-overlay-3jvlrsd3/lava-8649822/bin/lava-background-process-start
132 06:52:34.235870 Creating /var/lib/lava/dispatcher/tmp/8649822/lava-overlay-3jvlrsd3/lava-8649822/bin/lava-background-process-stop
133 06:52:34.235995 Creating /var/lib/lava/dispatcher/tmp/8649822/lava-overlay-3jvlrsd3/lava-8649822/bin/lava-common-functions
134 06:52:34.236118 Creating /var/lib/lava/dispatcher/tmp/8649822/lava-overlay-3jvlrsd3/lava-8649822/bin/lava-echo-ipv4
135 06:52:34.236242 Creating /var/lib/lava/dispatcher/tmp/8649822/lava-overlay-3jvlrsd3/lava-8649822/bin/lava-install-packages
136 06:52:34.236365 Creating /var/lib/lava/dispatcher/tmp/8649822/lava-overlay-3jvlrsd3/lava-8649822/bin/lava-installed-packages
137 06:52:34.236487 Creating /var/lib/lava/dispatcher/tmp/8649822/lava-overlay-3jvlrsd3/lava-8649822/bin/lava-os-build
138 06:52:34.236609 Creating /var/lib/lava/dispatcher/tmp/8649822/lava-overlay-3jvlrsd3/lava-8649822/bin/lava-probe-channel
139 06:52:34.236731 Creating /var/lib/lava/dispatcher/tmp/8649822/lava-overlay-3jvlrsd3/lava-8649822/bin/lava-probe-ip
140 06:52:34.236852 Creating /var/lib/lava/dispatcher/tmp/8649822/lava-overlay-3jvlrsd3/lava-8649822/bin/lava-target-ip
141 06:52:34.236973 Creating /var/lib/lava/dispatcher/tmp/8649822/lava-overlay-3jvlrsd3/lava-8649822/bin/lava-target-mac
142 06:52:34.237094 Creating /var/lib/lava/dispatcher/tmp/8649822/lava-overlay-3jvlrsd3/lava-8649822/bin/lava-target-storage
143 06:52:34.237218 Creating /var/lib/lava/dispatcher/tmp/8649822/lava-overlay-3jvlrsd3/lava-8649822/bin/lava-test-case
144 06:52:34.237342 Creating /var/lib/lava/dispatcher/tmp/8649822/lava-overlay-3jvlrsd3/lava-8649822/bin/lava-test-event
145 06:52:34.237463 Creating /var/lib/lava/dispatcher/tmp/8649822/lava-overlay-3jvlrsd3/lava-8649822/bin/lava-test-feedback
146 06:52:34.237585 Creating /var/lib/lava/dispatcher/tmp/8649822/lava-overlay-3jvlrsd3/lava-8649822/bin/lava-test-raise
147 06:52:34.237707 Creating /var/lib/lava/dispatcher/tmp/8649822/lava-overlay-3jvlrsd3/lava-8649822/bin/lava-test-reference
148 06:52:34.237829 Creating /var/lib/lava/dispatcher/tmp/8649822/lava-overlay-3jvlrsd3/lava-8649822/bin/lava-test-runner
149 06:52:34.237964 Creating /var/lib/lava/dispatcher/tmp/8649822/lava-overlay-3jvlrsd3/lava-8649822/bin/lava-test-set
150 06:52:34.238087 Creating /var/lib/lava/dispatcher/tmp/8649822/lava-overlay-3jvlrsd3/lava-8649822/bin/lava-test-shell
151 06:52:34.238210 Updating /var/lib/lava/dispatcher/tmp/8649822/lava-overlay-3jvlrsd3/lava-8649822/bin/lava-install-packages (oe)
152 06:52:34.238336 Updating /var/lib/lava/dispatcher/tmp/8649822/lava-overlay-3jvlrsd3/lava-8649822/bin/lava-installed-packages (oe)
153 06:52:34.238444 Creating /var/lib/lava/dispatcher/tmp/8649822/lava-overlay-3jvlrsd3/lava-8649822/environment
154 06:52:34.238545 LAVA metadata
155 06:52:34.238621 - LAVA_JOB_ID=8649822
156 06:52:34.238693 - LAVA_DISPATCHER_IP=192.168.201.1
157 06:52:34.238803 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
158 06:52:34.238877 skipped lava-vland-overlay
159 06:52:34.238962 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 06:52:34.239054 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
161 06:52:34.239125 skipped lava-multinode-overlay
162 06:52:34.239208 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 06:52:34.239301 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
164 06:52:34.239381 Loading test definitions
165 06:52:34.239481 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
166 06:52:34.239558 Using /lava-8649822 at stage 0
167 06:52:34.239843 uuid=8649822_1.5.2.3.1 testdef=None
168 06:52:34.239945 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 06:52:34.240042 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
170 06:52:34.240571 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 06:52:34.240831 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
173 06:52:34.241470 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 06:52:34.241738 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
176 06:52:34.242359 runner path: /var/lib/lava/dispatcher/tmp/8649822/lava-overlay-3jvlrsd3/lava-8649822/0/tests/0_dmesg test_uuid 8649822_1.5.2.3.1
177 06:52:34.242527 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 06:52:34.242791 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
180 06:52:34.242873 Using /lava-8649822 at stage 1
181 06:52:34.243141 uuid=8649822_1.5.2.3.5 testdef=None
182 06:52:34.243241 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 06:52:34.243339 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
184 06:52:34.243839 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 06:52:34.244093 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
187 06:52:34.244748 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 06:52:34.245017 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
190 06:52:34.245638 runner path: /var/lib/lava/dispatcher/tmp/8649822/lava-overlay-3jvlrsd3/lava-8649822/1/tests/1_bootrr test_uuid 8649822_1.5.2.3.5
191 06:52:34.245798 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 06:52:34.246098 Creating lava-test-runner.conf files
194 06:52:34.246173 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8649822/lava-overlay-3jvlrsd3/lava-8649822/0 for stage 0
195 06:52:34.246265 - 0_dmesg
196 06:52:34.246350 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8649822/lava-overlay-3jvlrsd3/lava-8649822/1 for stage 1
197 06:52:34.246442 - 1_bootrr
198 06:52:34.246545 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 06:52:34.246643 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
200 06:52:34.252808 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 06:52:34.252928 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
202 06:52:34.253029 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 06:52:34.253128 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 06:52:34.253228 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
205 06:52:34.367720 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 06:52:34.368092 start: 1.5.4 extract-modules (timeout 00:09:49) [common]
207 06:52:34.368220 extracting modules file /var/lib/lava/dispatcher/tmp/8649822/tftp-deploy-c26wlj7k/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8649822/extract-nfsrootfs-cbw384u9
208 06:52:34.372766 extracting modules file /var/lib/lava/dispatcher/tmp/8649822/tftp-deploy-c26wlj7k/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8649822/extract-overlay-ramdisk-_bmje3g5/ramdisk
209 06:52:34.376968 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 06:52:34.377097 start: 1.5.5 apply-overlay-tftp (timeout 00:09:49) [common]
211 06:52:34.377195 [common] Applying overlay to NFS
212 06:52:34.377276 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8649822/compress-overlay-rde5513b/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8649822/extract-nfsrootfs-cbw384u9
213 06:52:34.381509 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 06:52:34.381635 start: 1.5.6 configure-preseed-file (timeout 00:09:49) [common]
215 06:52:34.381742 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 06:52:34.381850 start: 1.5.7 compress-ramdisk (timeout 00:09:49) [common]
217 06:52:34.381955 Building ramdisk /var/lib/lava/dispatcher/tmp/8649822/extract-overlay-ramdisk-_bmje3g5/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8649822/extract-overlay-ramdisk-_bmje3g5/ramdisk
218 06:52:34.418978 >> 24546 blocks
219 06:52:34.953261 rename /var/lib/lava/dispatcher/tmp/8649822/extract-overlay-ramdisk-_bmje3g5/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8649822/tftp-deploy-c26wlj7k/ramdisk/ramdisk.cpio.gz
220 06:52:34.953711 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
221 06:52:34.953850 start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
222 06:52:34.953980 start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
223 06:52:34.954093 No mkimage arch provided, not using FIT.
224 06:52:34.954197 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 06:52:34.954297 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 06:52:34.954411 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 06:52:34.954520 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
228 06:52:34.954612 No LXC device requested
229 06:52:34.954708 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 06:52:34.954809 start: 1.7 deploy-device-env (timeout 00:09:49) [common]
231 06:52:34.954906 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 06:52:34.954988 Checking files for TFTP limit of 4294967296 bytes.
233 06:52:34.955406 end: 1 tftp-deploy (duration 00:00:11) [common]
234 06:52:34.955525 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 06:52:34.955633 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 06:52:34.955778 substitutions:
237 06:52:34.955857 - {DTB}: None
238 06:52:34.955931 - {INITRD}: 8649822/tftp-deploy-c26wlj7k/ramdisk/ramdisk.cpio.gz
239 06:52:34.956001 - {KERNEL}: 8649822/tftp-deploy-c26wlj7k/kernel/bzImage
240 06:52:34.956071 - {LAVA_MAC}: None
241 06:52:34.956137 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8649822/extract-nfsrootfs-cbw384u9
242 06:52:34.956206 - {NFS_SERVER_IP}: 192.168.201.1
243 06:52:34.956272 - {PRESEED_CONFIG}: None
244 06:52:34.956341 - {PRESEED_LOCAL}: None
245 06:52:34.956405 - {RAMDISK}: 8649822/tftp-deploy-c26wlj7k/ramdisk/ramdisk.cpio.gz
246 06:52:34.956472 - {ROOT_PART}: None
247 06:52:34.956538 - {ROOT}: None
248 06:52:34.956603 - {SERVER_IP}: 192.168.201.1
249 06:52:34.956667 - {TEE}: None
250 06:52:34.956731 Parsed boot commands:
251 06:52:34.956795 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 06:52:34.956965 Parsed boot commands: tftpboot 192.168.201.1 8649822/tftp-deploy-c26wlj7k/kernel/bzImage 8649822/tftp-deploy-c26wlj7k/kernel/cmdline 8649822/tftp-deploy-c26wlj7k/ramdisk/ramdisk.cpio.gz
253 06:52:34.957073 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 06:52:34.957178 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 06:52:34.957284 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 06:52:34.957385 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 06:52:34.957466 Not connected, no need to disconnect.
258 06:52:34.957557 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 06:52:34.957653 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 06:52:34.957731 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost acer-cb317-1h-c3z6-dedede-cbg-4'
261 06:52:34.960696 Setting prompt string to ['lava-test: # ']
262 06:52:34.961023 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 06:52:34.961143 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 06:52:34.961259 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 06:52:34.961367 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 06:52:34.961581 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-4' '--port=1' '--command=reboot'
267 06:52:34.982810 >> Command sent successfully.
268 06:52:34.985062 Returned 0 in 0 seconds
269 06:52:35.085885 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
271 06:52:35.086248 end: 2.2.2 reset-device (duration 00:00:00) [common]
272 06:52:35.086368 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
273 06:52:35.086465 Setting prompt string to 'Starting depthcharge on Magolor...'
274 06:52:35.086539 Changing prompt to 'Starting depthcharge on Magolor...'
275 06:52:35.086617 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
276 06:52:35.086917 [Enter `^Ec?' for help]
277 06:52:41.648986
278 06:52:41.649586
279 06:52:41.657115 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
280 06:52:41.664337 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
281 06:52:41.668601 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
282 06:52:41.671675 CPU: AES supported, TXT NOT supported, VT supported
283 06:52:41.675824 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
284 06:52:41.683526 PCH: device id 4d87 (rev 01) is Jasperlake Super
285 06:52:41.687691 IGD: device id 4e55 (rev 01) is Jasperlake GT4
286 06:52:41.691652 VBOOT: Loading verstage.
287 06:52:41.695768 FMAP: Found "FLASH" version 1.1 at 0xc04000.
288 06:52:41.698431 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
289 06:52:41.705548 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
290 06:52:41.709335 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
291 06:52:41.713824
292 06:52:41.714094
293 06:52:41.720936 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
294 06:52:41.737330 Probing TPM: . done!
295 06:52:41.741172 TPM ready after 0 ms
296 06:52:41.744491 Connected to device vid:did:rid of 1ae0:0028:00
297 06:52:41.755001 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
298 06:52:41.761987 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
299 06:52:41.810893 Initialized TPM device CR50 revision 0
300 06:52:41.829077 tlcl_send_startup: Startup return code is 0
301 06:52:41.829528 TPM: setup succeeded
302 06:52:41.840283 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
303 06:52:41.853306 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
304 06:52:41.865484 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
305 06:52:41.875256 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
306 06:52:41.878989 Chrome EC: UHEPI supported
307 06:52:41.882506 Phase 1
308 06:52:41.885568 FMAP: area GBB found @ c05000 (12288 bytes)
309 06:52:41.892451 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
310 06:52:41.898847 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
311 06:52:41.902184 Recovery requested (1009000e)
312 06:52:41.911720 TPM: Extending digest for VBOOT: boot mode into PCR 0
313 06:52:41.918518 tlcl_extend: response is 0
314 06:52:41.928183 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
315 06:52:41.935464 tlcl_extend: response is 0
316 06:52:41.939649 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
317 06:52:41.947119 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
318 06:52:41.950653 BS: verstage times (exec / console): total (unknown) / 125 ms
319 06:52:41.954755
320 06:52:41.955190
321 06:52:41.962449 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
322 06:52:41.966407
323 06:52:41.969478 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
324 06:52:41.976408 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
325 06:52:41.980081 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
326 06:52:41.982959 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
327 06:52:41.989885 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
328 06:52:41.992926 gpe0_sts[3]: 00080000 gpe0_en[3]: 00010000
329 06:52:41.993372 TCO_STS: 0000 0001
330 06:52:41.996452
331 06:52:41.996936 GEN_PMCON: d0015038 00002200
332 06:52:41.999596 GBLRST_CAUSE: 00000000 00000000
333 06:52:42.003218 prev_sleep_state 5
334 06:52:42.005949 Boot Count incremented to 5804
335 06:52:42.013065 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
336 06:52:42.016265 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
337 06:52:42.019482 Chrome EC: UHEPI supported
338 06:52:42.025989 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
339 06:52:42.032465 Probing TPM: done!
340 06:52:42.039208 Connected to device vid:did:rid of 1ae0:0028:00
341 06:52:42.048938 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
342 06:52:42.056433 Initialized TPM device CR50 revision 0
343 06:52:42.066578 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
344 06:52:42.073693 MRC: Hash idx 0x100b comparison successful.
345 06:52:42.077029 MRC cache found, size 5458
346 06:52:42.077510 bootmode is set to: 2
347 06:52:42.079830 SPD INDEX = 0
348 06:52:42.083408 CBFS: Found 'spd.bin' @0x40c40 size 0x600
349 06:52:42.086947 SPD: module type is LPDDR4X
350 06:52:42.093203 SPD: module part number is MT53E512M32D2NP-046 WT:E
351 06:52:42.099689 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
352 06:52:42.102969 SPD: device width 16 bits, bus width 32 bits
353 06:52:42.106437 SPD: module size is 4096 MB (per channel)
354 06:52:42.109829 meminit_channels: DRAM half-populated
355 06:52:42.193824 CBMEM:
356 06:52:42.196969 IMD: root @ 0x76fff000 254 entries.
357 06:52:42.200326 IMD: root @ 0x76ffec00 62 entries.
358 06:52:42.203625 FMAP: area RO_VPD found @ c00000 (16384 bytes)
359 06:52:42.209797 WARNING: RO_VPD is uninitialized or empty.
360 06:52:42.213443 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
361 06:52:42.217274 External stage cache:
362 06:52:42.220135 IMD: root @ 0x7b3ff000 254 entries.
363 06:52:42.223919 IMD: root @ 0x7b3fec00 62 entries.
364 06:52:42.233853 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
365 06:52:42.240206 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
366 06:52:42.246868 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
367 06:52:42.255599 MRC: 'RECOVERY_MRC_CACHE' does not need update.
368 06:52:42.259161 cse_lite: Skip switching to RW in the recovery path
369 06:52:42.261878
370 06:52:42.262360 1 DIMMs found
371 06:52:42.262720 SMM Memory Map
372 06:52:42.265575 SMRAM : 0x7b000000 0x800000
373 06:52:42.269056 Subregion 0: 0x7b000000 0x200000
374 06:52:42.272136
375 06:52:42.275536 Subregion 1: 0x7b200000 0x200000
376 06:52:42.278696 Subregion 2: 0x7b400000 0x400000
377 06:52:42.279178 top_of_ram = 0x77000000
378 06:52:42.285723 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
379 06:52:42.292180 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
380 06:52:42.295181 MTRR Range: Start=ff000000 End=0 (Size 1000000)
381 06:52:42.301887 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
382 06:52:42.305516 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
383 06:52:42.318197 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
384 06:52:42.321065 Processing 188 relocs. Offset value of 0x74c0e000
385 06:52:42.324119
386 06:52:42.331038 BS: romstage times (exec / console): total (unknown) / 257 ms
387 06:52:42.335510
388 06:52:42.335952
389 06:52:42.345693 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
390 06:52:42.349004 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
391 06:52:42.353018
392 06:52:42.355715 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
393 06:52:42.362772 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
394 06:52:42.419201 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
395 06:52:42.425322 Processing 4805 relocs. Offset value of 0x75da8000
396 06:52:42.429347 BS: postcar times (exec / console): total (unknown) / 42 ms
397 06:52:42.432867
398 06:52:42.433413
399 06:52:42.442104 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
400 06:52:42.442645 Normal boot
401 06:52:42.446245 EC returned error result code 3
402 06:52:42.449359 FW_CONFIG value is 0x204
403 06:52:42.452865 GENERIC: 0.0 disabled by fw_config
404 06:52:42.459754 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
405 06:52:42.462377 I2C: 00:10 disabled by fw_config
406 06:52:42.465932 I2C: 00:10 disabled by fw_config
407 06:52:42.469195 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
408 06:52:42.475704 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
409 06:52:42.478806 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
410 06:52:42.485604 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
411 06:52:42.489575 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
412 06:52:42.493606 I2C: 00:10 disabled by fw_config
413 06:52:42.500715 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
414 06:52:42.507278 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
415 06:52:42.510481 I2C: 00:1a disabled by fw_config
416 06:52:42.514130 I2C: 00:1a disabled by fw_config
417 06:52:42.517254 fw_config match found: AUDIO_AMP=UNPROVISIONED
418 06:52:42.523485 fw_config match found: AUDIO_AMP=UNPROVISIONED
419 06:52:42.526795 GENERIC: 0.0 disabled by fw_config
420 06:52:42.530193 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
421 06:52:42.537087 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
422 06:52:42.540186 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
423 06:52:42.547278 microcode: Update skipped, already up-to-date
424 06:52:42.550492 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
425 06:52:42.578561 Detected 2 core, 2 thread CPU.
426 06:52:42.582188 Setting up SMI for CPU
427 06:52:42.585718 IED base = 0x7b400000
428 06:52:42.586344 IED size = 0x00400000
429 06:52:42.588240 Will perform SMM setup.
430 06:52:42.591814 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
431 06:52:42.601974 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
432 06:52:42.605286 Processing 16 relocs. Offset value of 0x00030000
433 06:52:42.609290 Attempting to start 1 APs
434 06:52:42.612211 Waiting for 10ms after sending INIT.
435 06:52:42.628633 Waiting for 1st SIPI to complete...done.
436 06:52:42.629164 AP: slot 1 apic_id 2.
437 06:52:42.635311 Waiting for 2nd SIPI to complete...done.
438 06:52:42.642164 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
439 06:52:42.648982 Processing 13 relocs. Offset value of 0x00038000
440 06:52:42.649428 Unable to locate Global NVS
441 06:52:42.658418 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
442 06:52:42.662012 Installing permanent SMM handler to 0x7b000000
443 06:52:42.668522 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
444 06:52:42.672230
445 06:52:42.675021 Processing 704 relocs. Offset value of 0x7b010000
446 06:52:42.682203 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
447 06:52:42.688484 Processing 13 relocs. Offset value of 0x7b008000
448 06:52:42.695195 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
449 06:52:42.698914 Unable to locate Global NVS
450 06:52:42.705112 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
451 06:52:42.708352 Clearing SMI status registers
452 06:52:42.708799 SMI_STS: PM1
453 06:52:42.711988 PM1_STS: PWRBTN
454 06:52:42.712437 TCO_STS: INTRD_DET
455 06:52:42.715421 GPE0 STD STS:
456 06:52:42.721735 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
457 06:52:42.725674 In relocation handler: CPU 0
458 06:52:42.728451 New SMBASE=0x7b000000 IEDBASE=0x7b400000
459 06:52:42.735048 Writing SMRR. base = 0x7b000006, mask=0xff800800
460 06:52:42.735518 Relocation complete.
461 06:52:42.741939 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
462 06:52:42.745432 In relocation handler: CPU 1
463 06:52:42.751808 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
464 06:52:42.755504 Writing SMRR. base = 0x7b000006, mask=0xff800800
465 06:52:42.758416 Relocation complete.
466 06:52:42.758856 Initializing CPU #0
467 06:52:42.762235 CPU: vendor Intel device 906c0
468 06:52:42.765126 CPU: family 06, model 9c, stepping 00
469 06:52:42.768668 Clearing out pending MCEs
470 06:52:42.772071 Setting up local APIC...
471 06:52:42.775728 apic_id: 0x00 done.
472 06:52:42.778399 Turbo is available but hidden
473 06:52:42.781773 Turbo is available and visible
474 06:52:42.785319 microcode: Update skipped, already up-to-date
475 06:52:42.788485 CPU #0 initialized
476 06:52:42.788924 Initializing CPU #1
477 06:52:42.791488 CPU: vendor Intel device 906c0
478 06:52:42.795389 CPU: family 06, model 9c, stepping 00
479 06:52:42.798596 Clearing out pending MCEs
480 06:52:42.801527 Setting up local APIC...
481 06:52:42.804961 apic_id: 0x02 done.
482 06:52:42.808607 microcode: Update skipped, already up-to-date
483 06:52:42.812027 CPU #1 initialized
484 06:52:42.814844 bsp_do_flight_plan done after 176 msecs.
485 06:52:42.818590 CPU: frequency set to 2800 MHz
486 06:52:42.819032 Enabling SMIs.
487 06:52:42.824680 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 86 / 290 ms
488 06:52:42.835688 Probing TPM: done!
489 06:52:42.842689 Connected to device vid:did:rid of 1ae0:0028:00
490 06:52:42.852325 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
491 06:52:42.855534 Initialized TPM device CR50 revision 0
492 06:52:42.859209 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
493 06:52:42.866207 Found a VBT of 7680 bytes after decompression
494 06:52:42.872723 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
495 06:52:42.907665 Detected 2 core, 2 thread CPU.
496 06:52:42.911135 Detected 2 core, 2 thread CPU.
497 06:52:43.273350 Display FSP Version Info HOB
498 06:52:43.275937 Reference Code - CPU = 8.7.22.30
499 06:52:43.279713 uCode Version = 24.0.0.1f
500 06:52:43.282837 TXT ACM version = ff.ff.ff.ffff
501 06:52:43.286289 Reference Code - ME = 8.7.22.30
502 06:52:43.289397 MEBx version = 0.0.0.0
503 06:52:43.292977 ME Firmware Version = Consumer SKU
504 06:52:43.296343 Reference Code - PCH = 8.7.22.30
505 06:52:43.299619 PCH-CRID Status = Disabled
506 06:52:43.302527 PCH-CRID Original Value = ff.ff.ff.ffff
507 06:52:43.306285 PCH-CRID New Value = ff.ff.ff.ffff
508 06:52:43.309132 OPROM - RST - RAID = ff.ff.ff.ffff
509 06:52:43.313122 PCH Hsio Version = 4.0.0.0
510 06:52:43.316021 Reference Code - SA - System Agent = 8.7.22.30
511 06:52:43.319563 Reference Code - MRC = 0.0.4.68
512 06:52:43.322477 SA - PCIe Version = 8.7.22.30
513 06:52:43.325921 SA-CRID Status = Disabled
514 06:52:43.329603 SA-CRID Original Value = 0.0.0.0
515 06:52:43.332920 SA-CRID New Value = 0.0.0.0
516 06:52:43.335759 OPROM - VBIOS = ff.ff.ff.ffff
517 06:52:43.339036 IO Manageability Engine FW Version = ff.ff.ff.ffff
518 06:52:43.342512 PHY Build Version = ff.ff.ff.ffff
519 06:52:43.349648 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
520 06:52:43.353142 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
521 06:52:43.355966 ITSS IRQ Polarities Before:
522 06:52:43.359357 IPC0: 0xffffffff
523 06:52:43.359463 IPC1: 0xffffffff
524 06:52:43.362704 IPC2: 0xffffffff
525 06:52:43.362802 IPC3: 0xffffffff
526 06:52:43.366051 ITSS IRQ Polarities After:
527 06:52:43.369134 IPC0: 0xffffffff
528 06:52:43.369231 IPC1: 0xffffffff
529 06:52:43.372676 IPC2: 0xffffffff
530 06:52:43.372774 IPC3: 0xffffffff
531 06:52:43.386121 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
532 06:52:43.392966 BS: BS_DEV_INIT_CHIPS run times (exec / console): 404 / 157 ms
533 06:52:43.393131 Enumerating buses...
534 06:52:43.396155
535 06:52:43.399633 Show all devs... Before device enumeration.
536 06:52:43.402991 Root Device: enabled 1
537 06:52:43.403171 CPU_CLUSTER: 0: enabled 1
538 06:52:43.406289 DOMAIN: 0000: enabled 1
539 06:52:43.409616 PCI: 00:00.0: enabled 1
540 06:52:43.412551 PCI: 00:02.0: enabled 1
541 06:52:43.412734 PCI: 00:04.0: enabled 1
542 06:52:43.416265 PCI: 00:05.0: enabled 1
543 06:52:43.419730 PCI: 00:09.0: enabled 0
544 06:52:43.419931 PCI: 00:12.6: enabled 0
545 06:52:43.422773 PCI: 00:14.0: enabled 1
546 06:52:43.425856 PCI: 00:14.1: enabled 0
547 06:52:43.429792 PCI: 00:14.2: enabled 0
548 06:52:43.430101 PCI: 00:14.3: enabled 1
549 06:52:43.432786 PCI: 00:14.5: enabled 1
550 06:52:43.436590 PCI: 00:15.0: enabled 1
551 06:52:43.440247 PCI: 00:15.1: enabled 1
552 06:52:43.440633 PCI: 00:15.2: enabled 1
553 06:52:43.442685 PCI: 00:15.3: enabled 1
554 06:52:43.446401 PCI: 00:16.0: enabled 1
555 06:52:43.449473 PCI: 00:16.1: enabled 0
556 06:52:43.449943 PCI: 00:16.4: enabled 0
557 06:52:43.452782 PCI: 00:16.5: enabled 0
558 06:52:43.456391 PCI: 00:17.0: enabled 0
559 06:52:43.456844 PCI: 00:19.0: enabled 1
560 06:52:43.459954
561 06:52:43.460397 PCI: 00:19.1: enabled 0
562 06:52:43.462913 PCI: 00:19.2: enabled 1
563 06:52:43.466907 PCI: 00:1a.0: enabled 1
564 06:52:43.467440 PCI: 00:1c.0: enabled 0
565 06:52:43.469552 PCI: 00:1c.1: enabled 0
566 06:52:43.473009 PCI: 00:1c.2: enabled 0
567 06:52:43.476470 PCI: 00:1c.3: enabled 0
568 06:52:43.477014 PCI: 00:1c.4: enabled 0
569 06:52:43.479770 PCI: 00:1c.5: enabled 0
570 06:52:43.482978 PCI: 00:1c.6: enabled 0
571 06:52:43.486034 PCI: 00:1c.7: enabled 1
572 06:52:43.486478 PCI: 00:1e.0: enabled 0
573 06:52:43.489728 PCI: 00:1e.1: enabled 0
574 06:52:43.492905 PCI: 00:1e.2: enabled 1
575 06:52:43.495944 PCI: 00:1e.3: enabled 0
576 06:52:43.496412 PCI: 00:1f.0: enabled 1
577 06:52:43.499700 PCI: 00:1f.1: enabled 1
578 06:52:43.503074 PCI: 00:1f.2: enabled 1
579 06:52:43.503512 PCI: 00:1f.3: enabled 1
580 06:52:43.506389 PCI: 00:1f.4: enabled 0
581 06:52:43.510025 PCI: 00:1f.5: enabled 1
582 06:52:43.512985 PCI: 00:1f.7: enabled 0
583 06:52:43.513526 GENERIC: 0.0: enabled 1
584 06:52:43.516647 GENERIC: 0.0: enabled 1
585 06:52:43.519652 USB0 port 0: enabled 1
586 06:52:43.522710 GENERIC: 0.0: enabled 1
587 06:52:43.523151 I2C: 00:2c: enabled 1
588 06:52:43.526083 I2C: 00:15: enabled 1
589 06:52:43.529084 GENERIC: 0.0: enabled 0
590 06:52:43.529522 I2C: 00:15: enabled 1
591 06:52:43.532632 I2C: 00:10: enabled 0
592 06:52:43.536248 I2C: 00:10: enabled 0
593 06:52:43.536788 I2C: 00:2c: enabled 1
594 06:52:43.538956 I2C: 00:40: enabled 1
595 06:52:43.543166 I2C: 00:10: enabled 1
596 06:52:43.543706 I2C: 00:39: enabled 1
597 06:52:43.545756 I2C: 00:36: enabled 1
598 06:52:43.549184 I2C: 00:10: enabled 0
599 06:52:43.549624 I2C: 00:0c: enabled 1
600 06:52:43.552733
601 06:52:43.553274 I2C: 00:50: enabled 1
602 06:52:43.556244 I2C: 00:1a: enabled 1
603 06:52:43.559400 I2C: 00:1a: enabled 0
604 06:52:43.559846 I2C: 00:1a: enabled 0
605 06:52:43.562155 I2C: 00:28: enabled 1
606 06:52:43.565798 I2C: 00:29: enabled 1
607 06:52:43.566400 PCI: 00:00.0: enabled 1
608 06:52:43.569029 SPI: 00: enabled 1
609 06:52:43.572690 PNP: 0c09.0: enabled 1
610 06:52:43.573261 GENERIC: 0.0: enabled 0
611 06:52:43.575715 USB2 port 0: enabled 1
612 06:52:43.579335 USB2 port 1: enabled 1
613 06:52:43.579770 USB2 port 2: enabled 1
614 06:52:43.582047 USB2 port 3: enabled 1
615 06:52:43.585981 USB2 port 4: enabled 0
616 06:52:43.589069 USB2 port 5: enabled 1
617 06:52:43.589644 USB2 port 6: enabled 0
618 06:52:43.592262 USB2 port 7: enabled 1
619 06:52:43.595751 USB3 port 0: enabled 1
620 06:52:43.596235 USB3 port 1: enabled 1
621 06:52:43.598954 USB3 port 2: enabled 1
622 06:52:43.602166 USB3 port 3: enabled 1
623 06:52:43.602640 APIC: 00: enabled 1
624 06:52:43.605507 APIC: 02: enabled 1
625 06:52:43.609080 Compare with tree...
626 06:52:43.609586 Root Device: enabled 1
627 06:52:43.612548 CPU_CLUSTER: 0: enabled 1
628 06:52:43.615979 APIC: 00: enabled 1
629 06:52:43.619347 APIC: 02: enabled 1
630 06:52:43.619826 DOMAIN: 0000: enabled 1
631 06:52:43.622356 PCI: 00:00.0: enabled 1
632 06:52:43.625489 PCI: 00:02.0: enabled 1
633 06:52:43.629306 PCI: 00:04.0: enabled 1
634 06:52:43.632739 GENERIC: 0.0: enabled 1
635 06:52:43.633177 PCI: 00:05.0: enabled 1
636 06:52:43.635626 GENERIC: 0.0: enabled 1
637 06:52:43.639111 PCI: 00:09.0: enabled 0
638 06:52:43.642708 PCI: 00:12.6: enabled 0
639 06:52:43.646073 PCI: 00:14.0: enabled 1
640 06:52:43.646513 USB0 port 0: enabled 1
641 06:52:43.649518 USB2 port 0: enabled 1
642 06:52:43.652256 USB2 port 1: enabled 1
643 06:52:43.655475 USB2 port 2: enabled 1
644 06:52:43.659039 USB2 port 3: enabled 1
645 06:52:43.659512 USB2 port 4: enabled 0
646 06:52:43.662327 USB2 port 5: enabled 1
647 06:52:43.665394 USB2 port 6: enabled 0
648 06:52:43.669194 USB2 port 7: enabled 1
649 06:52:43.672206 USB3 port 0: enabled 1
650 06:52:43.675436 USB3 port 1: enabled 1
651 06:52:43.675684 USB3 port 2: enabled 1
652 06:52:43.678572 USB3 port 3: enabled 1
653 06:52:43.682235 PCI: 00:14.1: enabled 0
654 06:52:43.685169 PCI: 00:14.2: enabled 0
655 06:52:43.688977 PCI: 00:14.3: enabled 1
656 06:52:43.689114 GENERIC: 0.0: enabled 1
657 06:52:43.692311 PCI: 00:14.5: enabled 1
658 06:52:43.695394 PCI: 00:15.0: enabled 1
659 06:52:43.698734 I2C: 00:2c: enabled 1
660 06:52:43.702063 I2C: 00:15: enabled 1
661 06:52:43.702170 PCI: 00:15.1: enabled 1
662 06:52:43.705290 PCI: 00:15.2: enabled 1
663 06:52:43.708724 GENERIC: 0.0: enabled 0
664 06:52:43.711926 I2C: 00:15: enabled 1
665 06:52:43.712024 I2C: 00:10: enabled 0
666 06:52:43.715275 I2C: 00:10: enabled 0
667 06:52:43.718635 I2C: 00:2c: enabled 1
668 06:52:43.721778 I2C: 00:40: enabled 1
669 06:52:43.721879 I2C: 00:10: enabled 1
670 06:52:43.725056
671 06:52:43.725160 I2C: 00:39: enabled 1
672 06:52:43.728596 PCI: 00:15.3: enabled 1
673 06:52:43.731996 I2C: 00:36: enabled 1
674 06:52:43.734979 I2C: 00:10: enabled 0
675 06:52:43.735076 I2C: 00:0c: enabled 1
676 06:52:43.738572 I2C: 00:50: enabled 1
677 06:52:43.742043 PCI: 00:16.0: enabled 1
678 06:52:43.745332 PCI: 00:16.1: enabled 0
679 06:52:43.745429 PCI: 00:16.4: enabled 0
680 06:52:43.748726
681 06:52:43.748823 PCI: 00:16.5: enabled 0
682 06:52:43.752714 PCI: 00:17.0: enabled 0
683 06:52:43.756729 PCI: 00:19.0: enabled 1
684 06:52:43.756826 I2C: 00:1a: enabled 1
685 06:52:43.759993 I2C: 00:1a: enabled 0
686 06:52:43.763714 I2C: 00:1a: enabled 0
687 06:52:43.763813 I2C: 00:28: enabled 1
688 06:52:43.766956 I2C: 00:29: enabled 1
689 06:52:43.770359 PCI: 00:19.1: enabled 0
690 06:52:43.773262 PCI: 00:19.2: enabled 1
691 06:52:43.777321 PCI: 00:1a.0: enabled 1
692 06:52:43.777428 PCI: 00:1e.0: enabled 0
693 06:52:43.780064 PCI: 00:1e.1: enabled 0
694 06:52:43.783494 PCI: 00:1e.2: enabled 1
695 06:52:43.786688 SPI: 00: enabled 1
696 06:52:43.786791 PCI: 00:1e.3: enabled 0
697 06:52:43.790534 PCI: 00:1f.0: enabled 1
698 06:52:43.793604 PNP: 0c09.0: enabled 1
699 06:52:43.796653 PCI: 00:1f.1: enabled 1
700 06:52:43.800163 PCI: 00:1f.2: enabled 1
701 06:52:43.800266 PCI: 00:1f.3: enabled 1
702 06:52:43.803602 GENERIC: 0.0: enabled 0
703 06:52:43.806467 PCI: 00:1f.4: enabled 0
704 06:52:43.809874 PCI: 00:1f.5: enabled 1
705 06:52:43.813855 PCI: 00:1f.7: enabled 0
706 06:52:43.813964 Root Device scanning...
707 06:52:43.816575 scan_static_bus for Root Device
708 06:52:43.820086 CPU_CLUSTER: 0 enabled
709 06:52:43.823395 DOMAIN: 0000 enabled
710 06:52:43.823493 DOMAIN: 0000 scanning...
711 06:52:43.826760
712 06:52:43.826858 PCI: pci_scan_bus for bus 00
713 06:52:43.829827 PCI: 00:00.0 [8086/0000] ops
714 06:52:43.833325 PCI: 00:00.0 [8086/4e22] enabled
715 06:52:43.837019 PCI: 00:02.0 [8086/0000] bus ops
716 06:52:43.840360 PCI: 00:02.0 [8086/4e55] enabled
717 06:52:43.843187 PCI: 00:04.0 [8086/0000] bus ops
718 06:52:43.846603 PCI: 00:04.0 [8086/4e03] enabled
719 06:52:43.850249 PCI: 00:05.0 [8086/0000] bus ops
720 06:52:43.853627 PCI: 00:05.0 [8086/4e19] enabled
721 06:52:43.856981 PCI: 00:08.0 [8086/4e11] enabled
722 06:52:43.860416 PCI: 00:14.0 [8086/0000] bus ops
723 06:52:43.863692 PCI: 00:14.0 [8086/4ded] enabled
724 06:52:43.866633 PCI: 00:14.2 [8086/4def] disabled
725 06:52:43.869881 PCI: 00:14.3 [8086/0000] bus ops
726 06:52:43.873423 PCI: 00:14.3 [8086/4df0] enabled
727 06:52:43.876767 PCI: 00:14.5 [8086/0000] ops
728 06:52:43.880410 PCI: 00:14.5 [8086/4df8] enabled
729 06:52:43.883336 PCI: 00:15.0 [8086/0000] bus ops
730 06:52:43.886837 PCI: 00:15.0 [8086/4de8] enabled
731 06:52:43.889751 PCI: 00:15.1 [8086/0000] bus ops
732 06:52:43.893696 PCI: 00:15.1 [8086/4de9] enabled
733 06:52:43.896881 PCI: 00:15.2 [8086/0000] bus ops
734 06:52:43.900278 PCI: 00:15.2 [8086/4dea] enabled
735 06:52:43.903251 PCI: 00:15.3 [8086/0000] bus ops
736 06:52:43.906576 PCI: 00:15.3 [8086/4deb] enabled
737 06:52:43.910356 PCI: 00:16.0 [8086/0000] ops
738 06:52:43.913221 PCI: 00:16.0 [8086/4de0] enabled
739 06:52:43.916519 PCI: 00:19.0 [8086/0000] bus ops
740 06:52:43.919906 PCI: 00:19.0 [8086/4dc5] enabled
741 06:52:43.923443 PCI: 00:19.2 [8086/0000] ops
742 06:52:43.926713 PCI: 00:19.2 [8086/4dc7] enabled
743 06:52:43.930202 PCI: 00:1a.0 [8086/0000] ops
744 06:52:43.933291 PCI: 00:1a.0 [8086/4dc4] enabled
745 06:52:43.936618 PCI: 00:1e.0 [8086/0000] ops
746 06:52:43.940236 PCI: 00:1e.0 [8086/4da8] disabled
747 06:52:43.943816 PCI: 00:1e.2 [8086/0000] bus ops
748 06:52:43.946833 PCI: 00:1e.2 [8086/4daa] enabled
749 06:52:43.950130 PCI: 00:1f.0 [8086/0000] bus ops
750 06:52:43.953817 PCI: 00:1f.0 [8086/4d87] enabled
751 06:52:43.960069 PCI: Static device PCI: 00:1f.1 not found, disabling it.
752 06:52:43.960168 RTC Init
753 06:52:43.963313 Set power on after power failure.
754 06:52:43.966730 Disabling Deep S3
755 06:52:43.966828 Disabling Deep S3
756 06:52:43.970230 Disabling Deep S4
757 06:52:43.970327 Disabling Deep S4
758 06:52:43.973705 Disabling Deep S5
759 06:52:43.973801 Disabling Deep S5
760 06:52:43.976649 PCI: 00:1f.2 [0000/0000] hidden
761 06:52:43.979999 PCI: 00:1f.3 [8086/0000] bus ops
762 06:52:43.983500 PCI: 00:1f.3 [8086/4dc8] enabled
763 06:52:43.986968 PCI: 00:1f.5 [8086/0000] bus ops
764 06:52:43.989837 PCI: 00:1f.5 [8086/4da4] enabled
765 06:52:43.993331 PCI: Leftover static devices:
766 06:52:43.996884 PCI: 00:12.6
767 06:52:43.996991 PCI: 00:09.0
768 06:52:43.997070 PCI: 00:14.1
769 06:52:44.000148 PCI: 00:16.1
770 06:52:44.000244 PCI: 00:16.4
771 06:52:44.003162 PCI: 00:16.5
772 06:52:44.003265 PCI: 00:17.0
773 06:52:44.006695 PCI: 00:19.1
774 06:52:44.006792 PCI: 00:1e.1
775 06:52:44.006867 PCI: 00:1e.3
776 06:52:44.010037 PCI: 00:1f.1
777 06:52:44.010133 PCI: 00:1f.4
778 06:52:44.013402 PCI: 00:1f.7
779 06:52:44.016964 PCI: Check your devicetree.cb.
780 06:52:44.017061 PCI: 00:02.0 scanning...
781 06:52:44.020367 scan_generic_bus for PCI: 00:02.0
782 06:52:44.026903 scan_generic_bus for PCI: 00:02.0 done
783 06:52:44.029873 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
784 06:52:44.033557 PCI: 00:04.0 scanning...
785 06:52:44.036571 scan_generic_bus for PCI: 00:04.0
786 06:52:44.036679 GENERIC: 0.0 enabled
787 06:52:44.043639 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
788 06:52:44.049880 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
789 06:52:44.050001 PCI: 00:05.0 scanning...
790 06:52:44.053309
791 06:52:44.056578 scan_generic_bus for PCI: 00:05.0
792 06:52:44.056682 GENERIC: 0.0 enabled
793 06:52:44.062875 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
794 06:52:44.069595 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
795 06:52:44.069717 PCI: 00:14.0 scanning...
796 06:52:44.072788 scan_static_bus for PCI: 00:14.0
797 06:52:44.076509 USB0 port 0 enabled
798 06:52:44.079573 USB0 port 0 scanning...
799 06:52:44.083254 scan_static_bus for USB0 port 0
800 06:52:44.083361 USB2 port 0 enabled
801 06:52:44.086689 USB2 port 1 enabled
802 06:52:44.089585 USB2 port 2 enabled
803 06:52:44.089684 USB2 port 3 enabled
804 06:52:44.093112 USB2 port 4 disabled
805 06:52:44.093220 USB2 port 5 enabled
806 06:52:44.096206
807 06:52:44.096314 USB2 port 6 disabled
808 06:52:44.099781 USB2 port 7 enabled
809 06:52:44.099877 USB3 port 0 enabled
810 06:52:44.103104 USB3 port 1 enabled
811 06:52:44.106289 USB3 port 2 enabled
812 06:52:44.106379 USB3 port 3 enabled
813 06:52:44.109768 USB2 port 0 scanning...
814 06:52:44.112631 scan_static_bus for USB2 port 0
815 06:52:44.116380 scan_static_bus for USB2 port 0 done
816 06:52:44.119919 scan_bus: bus USB2 port 0 finished in 6 msecs
817 06:52:44.122610
818 06:52:44.122721 USB2 port 1 scanning...
819 06:52:44.126197 scan_static_bus for USB2 port 1
820 06:52:44.129714 scan_static_bus for USB2 port 1 done
821 06:52:44.136142 scan_bus: bus USB2 port 1 finished in 6 msecs
822 06:52:44.136251 USB2 port 2 scanning...
823 06:52:44.139417
824 06:52:44.143093 scan_static_bus for USB2 port 2
825 06:52:44.146142 scan_static_bus for USB2 port 2 done
826 06:52:44.149260 scan_bus: bus USB2 port 2 finished in 6 msecs
827 06:52:44.152560 USB2 port 3 scanning...
828 06:52:44.156001 scan_static_bus for USB2 port 3
829 06:52:44.159521 scan_static_bus for USB2 port 3 done
830 06:52:44.162828 scan_bus: bus USB2 port 3 finished in 6 msecs
831 06:52:44.166308 USB2 port 5 scanning...
832 06:52:44.169750 scan_static_bus for USB2 port 5
833 06:52:44.172551 scan_static_bus for USB2 port 5 done
834 06:52:44.179555 scan_bus: bus USB2 port 5 finished in 6 msecs
835 06:52:44.179670 USB2 port 7 scanning...
836 06:52:44.183129 scan_static_bus for USB2 port 7
837 06:52:44.186447 scan_static_bus for USB2 port 7 done
838 06:52:44.192922 scan_bus: bus USB2 port 7 finished in 6 msecs
839 06:52:44.196179 USB3 port 0 scanning...
840 06:52:44.199618 scan_static_bus for USB3 port 0
841 06:52:44.203073 scan_static_bus for USB3 port 0 done
842 06:52:44.206113 scan_bus: bus USB3 port 0 finished in 6 msecs
843 06:52:44.209246 USB3 port 1 scanning...
844 06:52:44.212556 scan_static_bus for USB3 port 1
845 06:52:44.215995 scan_static_bus for USB3 port 1 done
846 06:52:44.219532 scan_bus: bus USB3 port 1 finished in 6 msecs
847 06:52:44.222423 USB3 port 2 scanning...
848 06:52:44.226380 scan_static_bus for USB3 port 2
849 06:52:44.229767 scan_static_bus for USB3 port 2 done
850 06:52:44.235654 scan_bus: bus USB3 port 2 finished in 6 msecs
851 06:52:44.235762 USB3 port 3 scanning...
852 06:52:44.238995 scan_static_bus for USB3 port 3
853 06:52:44.242771 scan_static_bus for USB3 port 3 done
854 06:52:44.249040 scan_bus: bus USB3 port 3 finished in 6 msecs
855 06:52:44.252288 scan_static_bus for USB0 port 0 done
856 06:52:44.255653 scan_bus: bus USB0 port 0 finished in 173 msecs
857 06:52:44.262514 scan_static_bus for PCI: 00:14.0 done
858 06:52:44.265816 scan_bus: bus PCI: 00:14.0 finished in 190 msecs
859 06:52:44.269400 PCI: 00:14.3 scanning...
860 06:52:44.272725 scan_static_bus for PCI: 00:14.3
861 06:52:44.276009 GENERIC: 0.0 enabled
862 06:52:44.279091 scan_static_bus for PCI: 00:14.3 done
863 06:52:44.282214 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
864 06:52:44.285843 PCI: 00:15.0 scanning...
865 06:52:44.288965 scan_static_bus for PCI: 00:15.0
866 06:52:44.292551 I2C: 00:2c enabled
867 06:52:44.292644 I2C: 00:15 enabled
868 06:52:44.295535 scan_static_bus for PCI: 00:15.0 done
869 06:52:44.302300 scan_bus: bus PCI: 00:15.0 finished in 11 msecs
870 06:52:44.302432 PCI: 00:15.1 scanning...
871 06:52:44.305773 scan_static_bus for PCI: 00:15.1
872 06:52:44.312514 scan_static_bus for PCI: 00:15.1 done
873 06:52:44.315882 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
874 06:52:44.319157 PCI: 00:15.2 scanning...
875 06:52:44.322116 scan_static_bus for PCI: 00:15.2
876 06:52:44.325930 GENERIC: 0.0 disabled
877 06:52:44.326025 I2C: 00:15 enabled
878 06:52:44.328938 I2C: 00:10 disabled
879 06:52:44.329038 I2C: 00:10 disabled
880 06:52:44.333284 I2C: 00:2c enabled
881 06:52:44.333386 I2C: 00:40 enabled
882 06:52:44.336884 I2C: 00:10 enabled
883 06:52:44.336979 I2C: 00:39 enabled
884 06:52:44.340890 scan_static_bus for PCI: 00:15.2 done
885 06:52:44.347408 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
886 06:52:44.350811 PCI: 00:15.3 scanning...
887 06:52:44.355153 scan_static_bus for PCI: 00:15.3
888 06:52:44.355266 I2C: 00:36 enabled
889 06:52:44.357712 I2C: 00:10 disabled
890 06:52:44.357813 I2C: 00:0c enabled
891 06:52:44.361362 I2C: 00:50 enabled
892 06:52:44.364804 scan_static_bus for PCI: 00:15.3 done
893 06:52:44.368078 scan_bus: bus PCI: 00:15.3 finished in 15 msecs
894 06:52:44.370968 PCI: 00:19.0 scanning...
895 06:52:44.374657 scan_static_bus for PCI: 00:19.0
896 06:52:44.377831 I2C: 00:1a enabled
897 06:52:44.377944 I2C: 00:1a disabled
898 06:52:44.381208 I2C: 00:1a disabled
899 06:52:44.384729 I2C: 00:28 enabled
900 06:52:44.384818 I2C: 00:29 enabled
901 06:52:44.387675 scan_static_bus for PCI: 00:19.0 done
902 06:52:44.394569 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
903 06:52:44.397838 PCI: 00:1e.2 scanning...
904 06:52:44.401485 scan_generic_bus for PCI: 00:1e.2
905 06:52:44.401602 SPI: 00 enabled
906 06:52:44.408127 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
907 06:52:44.410932 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
908 06:52:44.414282 PCI: 00:1f.0 scanning...
909 06:52:44.418180 scan_static_bus for PCI: 00:1f.0
910 06:52:44.421010 PNP: 0c09.0 enabled
911 06:52:44.424884 PNP: 0c09.0 scanning...
912 06:52:44.428124 scan_static_bus for PNP: 0c09.0
913 06:52:44.431425 scan_static_bus for PNP: 0c09.0 done
914 06:52:44.434233 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
915 06:52:44.437875 scan_static_bus for PCI: 00:1f.0 done
916 06:52:44.444239 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
917 06:52:44.447768 PCI: 00:1f.3 scanning...
918 06:52:44.451237 scan_static_bus for PCI: 00:1f.3
919 06:52:44.451338 GENERIC: 0.0 disabled
920 06:52:44.454675 scan_static_bus for PCI: 00:1f.3 done
921 06:52:44.461018 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
922 06:52:44.464508 PCI: 00:1f.5 scanning...
923 06:52:44.467447 scan_generic_bus for PCI: 00:1f.5
924 06:52:44.471102 scan_generic_bus for PCI: 00:1f.5 done
925 06:52:44.474358 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
926 06:52:44.481398 scan_bus: bus DOMAIN: 0000 finished in 650 msecs
927 06:52:44.484079 scan_static_bus for Root Device done
928 06:52:44.487741 scan_bus: bus Root Device finished in 669 msecs
929 06:52:44.490780 done
930 06:52:44.494522 BS: BS_DEV_ENUMERATE run times (exec / console): 7 / 1091 ms
931 06:52:44.497354 Chrome EC: UHEPI supported
932 06:52:44.504017 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
933 06:52:44.510829 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
934 06:52:44.513927 SPI flash protection: WPSW=1 SRP0=1
935 06:52:44.520768 fast_spi_flash_protect: FPR 0 is enabled for range 0x00bca000-0x00bf9fff
936 06:52:44.527532 MRC: Enabled Protected Range on 'UNIFIED_MRC_CACHE'.
937 06:52:44.534274 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 31 ms
938 06:52:44.534419 found VGA at PCI: 00:02.0
939 06:52:44.537803 Setting up VGA for PCI: 00:02.0
940 06:52:44.544320 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
941 06:52:44.547181 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
942 06:52:44.550681 Allocating resources...
943 06:52:44.554355 Reading resources...
944 06:52:44.557587 Root Device read_resources bus 0 link: 0
945 06:52:44.560780 CPU_CLUSTER: 0 read_resources bus 0 link: 0
946 06:52:44.567698 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
947 06:52:44.571267 DOMAIN: 0000 read_resources bus 0 link: 0
948 06:52:44.578170 PCI: 00:04.0 read_resources bus 1 link: 0
949 06:52:44.581454 PCI: 00:04.0 read_resources bus 1 link: 0 done
950 06:52:44.587853 PCI: 00:05.0 read_resources bus 2 link: 0
951 06:52:44.591303 PCI: 00:05.0 read_resources bus 2 link: 0 done
952 06:52:44.598182 PCI: 00:14.0 read_resources bus 0 link: 0
953 06:52:44.600969 USB0 port 0 read_resources bus 0 link: 0
954 06:52:44.644723 USB0 port 0 read_resources bus 0 link: 0 done
955 06:52:44.644907 PCI: 00:14.0 read_resources bus 0 link: 0 done
956 06:52:44.645294 PCI: 00:14.3 read_resources bus 0 link: 0
957 06:52:44.646169 PCI: 00:14.3 read_resources bus 0 link: 0 done
958 06:52:44.646462 PCI: 00:15.0 read_resources bus 0 link: 0
959 06:52:44.646569 PCI: 00:15.0 read_resources bus 0 link: 0 done
960 06:52:44.646865 PCI: 00:15.2 read_resources bus 0 link: 0
961 06:52:44.646959 PCI: 00:15.2 read_resources bus 0 link: 0 done
962 06:52:44.647050 PCI: 00:15.3 read_resources bus 0 link: 0
963 06:52:44.653547 PCI: 00:15.3 read_resources bus 0 link: 0 done
964 06:52:44.656419 PCI: 00:19.0 read_resources bus 0 link: 0
965 06:52:44.663097 PCI: 00:19.0 read_resources bus 0 link: 0 done
966 06:52:44.666520 PCI: 00:1e.2 read_resources bus 3 link: 0
967 06:52:44.673157 PCI: 00:1e.2 read_resources bus 3 link: 0 done
968 06:52:44.676621 PCI: 00:1f.0 read_resources bus 0 link: 0
969 06:52:44.679468 PCI: 00:1f.0 read_resources bus 0 link: 0 done
970 06:52:44.687119 PCI: 00:1f.3 read_resources bus 0 link: 0
971 06:52:44.690574 PCI: 00:1f.3 read_resources bus 0 link: 0 done
972 06:52:44.696753 DOMAIN: 0000 read_resources bus 0 link: 0 done
973 06:52:44.700250 Root Device read_resources bus 0 link: 0 done
974 06:52:44.703360 Done reading resources.
975 06:52:44.710251 Show resources in subtree (Root Device)...After reading.
976 06:52:44.713437 Root Device child on link 0 CPU_CLUSTER: 0
977 06:52:44.716833 CPU_CLUSTER: 0 child on link 0 APIC: 00
978 06:52:44.720346 APIC: 00
979 06:52:44.720448 APIC: 02
980 06:52:44.723541 DOMAIN: 0000 child on link 0 PCI: 00:00.0
981 06:52:44.733533 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
982 06:52:44.743444 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
983 06:52:44.746740 PCI: 00:00.0
984 06:52:44.756450 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
985 06:52:44.763386 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
986 06:52:44.773621 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
987 06:52:44.783408 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
988 06:52:44.793588 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
989 06:52:44.803168 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
990 06:52:44.809777 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
991 06:52:44.819771 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
992 06:52:44.830072 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
993 06:52:44.840150 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
994 06:52:44.849859 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
995 06:52:44.859766 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
996 06:52:44.866176 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
997 06:52:44.876394 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
998 06:52:44.886230 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
999 06:52:44.895959 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1000 06:52:44.906292 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1001 06:52:44.916035 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1002 06:52:44.923002 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1003 06:52:44.925999 PCI: 00:02.0
1004 06:52:44.936221 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1005 06:52:44.946203 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1006 06:52:44.956026 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1007 06:52:44.959684 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1008 06:52:44.969327 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1009 06:52:44.972659 GENERIC: 0.0
1010 06:52:44.975922 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1011 06:52:44.985674 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1012 06:52:44.989019 GENERIC: 0.0
1013 06:52:44.989133 PCI: 00:08.0
1014 06:52:44.999176 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1015 06:52:45.002649 PCI: 00:14.0 child on link 0 USB0 port 0
1016 06:52:45.012375 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1017 06:52:45.016590 USB0 port 0 child on link 0 USB2 port 0
1018 06:52:45.020257
1019 06:52:45.020360 USB2 port 0
1020 06:52:45.020461 USB2 port 1
1021 06:52:45.023605 USB2 port 2
1022 06:52:45.023711 USB2 port 3
1023 06:52:45.027196 USB2 port 4
1024 06:52:45.027292 USB2 port 5
1025 06:52:45.030355
1026 06:52:45.030452 USB2 port 6
1027 06:52:45.033873 USB2 port 7
1028 06:52:45.033972 USB3 port 0
1029 06:52:45.037227 USB3 port 1
1030 06:52:45.037313 USB3 port 2
1031 06:52:45.040172 USB3 port 3
1032 06:52:45.040260 PCI: 00:14.2
1033 06:52:45.047566 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1034 06:52:45.057413 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1035 06:52:45.057543 GENERIC: 0.0
1036 06:52:45.060255 PCI: 00:14.5
1037 06:52:45.070464 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1038 06:52:45.073573 PCI: 00:15.0 child on link 0 I2C: 00:2c
1039 06:52:45.083709 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1040 06:52:45.083839 I2C: 00:2c
1041 06:52:45.087157 I2C: 00:15
1042 06:52:45.087266 PCI: 00:15.1
1043 06:52:45.097431 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1044 06:52:45.103432 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1045 06:52:45.113675 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1046 06:52:45.113806 GENERIC: 0.0
1047 06:52:45.117151 I2C: 00:15
1048 06:52:45.117259 I2C: 00:10
1049 06:52:45.120074 I2C: 00:10
1050 06:52:45.120168 I2C: 00:2c
1051 06:52:45.123992 I2C: 00:40
1052 06:52:45.124083 I2C: 00:10
1053 06:52:45.124153 I2C: 00:39
1054 06:52:45.130526 PCI: 00:15.3 child on link 0 I2C: 00:36
1055 06:52:45.140285 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1056 06:52:45.140414 I2C: 00:36
1057 06:52:45.143816 I2C: 00:10
1058 06:52:45.143905 I2C: 00:0c
1059 06:52:45.147419 I2C: 00:50
1060 06:52:45.147517 PCI: 00:16.0
1061 06:52:45.157271 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1062 06:52:45.159977 PCI: 00:19.0 child on link 0 I2C: 00:1a
1063 06:52:45.170431 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1064 06:52:45.173871 I2C: 00:1a
1065 06:52:45.174009 I2C: 00:1a
1066 06:52:45.176636 I2C: 00:1a
1067 06:52:45.176735 I2C: 00:28
1068 06:52:45.180337 I2C: 00:29
1069 06:52:45.180434 PCI: 00:19.2
1070 06:52:45.193445 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1071 06:52:45.203857 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1072 06:52:45.204006 PCI: 00:1a.0
1073 06:52:45.213843 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1074 06:52:45.216618 PCI: 00:1e.0
1075 06:52:45.220660 PCI: 00:1e.2 child on link 0 SPI: 00
1076 06:52:45.230537 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1077 06:52:45.230662 SPI: 00
1078 06:52:45.236773 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1079 06:52:45.243920 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1080 06:52:45.247210 PNP: 0c09.0
1081 06:52:45.253747 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1082 06:52:45.257228 PCI: 00:1f.2
1083 06:52:45.267055 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1084 06:52:45.273293 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1085 06:52:45.280003 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1086 06:52:45.289951 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1087 06:52:45.300328 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1088 06:52:45.300509 GENERIC: 0.0
1089 06:52:45.303274 PCI: 00:1f.5
1090 06:52:45.313420 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1091 06:52:45.319936 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1092 06:52:45.326481 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1093 06:52:45.333303 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1094 06:52:45.339943 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1095 06:52:45.349499 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1096 06:52:45.356490 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1097 06:52:45.359680 DOMAIN: 0000: Resource ranges:
1098 06:52:45.362772 * Base: 1000, Size: 800, Tag: 100
1099 06:52:45.366148 * Base: 1900, Size: e700, Tag: 100
1100 06:52:45.373065 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1101 06:52:45.379952 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1102 06:52:45.386224 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1103 06:52:45.392951 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1104 06:52:45.399801 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1105 06:52:45.409578 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1106 06:52:45.416223 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1107 06:52:45.422932 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1108 06:52:45.432861 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1109 06:52:45.439654 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1110 06:52:45.446057 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1111 06:52:45.455910 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1112 06:52:45.462696 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1113 06:52:45.469655 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1114 06:52:45.479236 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1115 06:52:45.486058 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1116 06:52:45.493120 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1117 06:52:45.502701 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1118 06:52:45.509408 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1119 06:52:45.516195 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1120 06:52:45.526068 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1121 06:52:45.533088 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1122 06:52:45.539687 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1123 06:52:45.546027 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1124 06:52:45.549409 DOMAIN: 0000: Resource ranges:
1125 06:52:45.556200 * Base: 7fc00000, Size: 40400000, Tag: 200
1126 06:52:45.559574 * Base: d0000000, Size: 2b000000, Tag: 200
1127 06:52:45.563072 * Base: fb001000, Size: 2fff000, Tag: 200
1128 06:52:45.569610 * Base: fe010000, Size: 22000, Tag: 200
1129 06:52:45.572958 * Base: fe033000, Size: a4d000, Tag: 200
1130 06:52:45.575842 * Base: fea88000, Size: 2f8000, Tag: 200
1131 06:52:45.579191 * Base: fed88000, Size: 8000, Tag: 200
1132 06:52:45.585946 * Base: fed93000, Size: d000, Tag: 200
1133 06:52:45.589508 * Base: feda2000, Size: 125e000, Tag: 200
1134 06:52:45.592760 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1135 06:52:45.600203 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1136 06:52:45.606995 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1137 06:52:45.613431 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1138 06:52:45.620030 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1139 06:52:45.626575 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1140 06:52:45.633250 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1141 06:52:45.640089 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1142 06:52:45.646664 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1143 06:52:45.653630 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1144 06:52:45.660516 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1145 06:52:45.666471 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1146 06:52:45.673455 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1147 06:52:45.679846 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1148 06:52:45.686362 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1149 06:52:45.692875 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1150 06:52:45.699640 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1151 06:52:45.706335 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1152 06:52:45.713421 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1153 06:52:45.720112 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1154 06:52:45.726762 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1155 06:52:45.733228 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1156 06:52:45.742996 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1157 06:52:45.746275 Root Device assign_resources, bus 0 link: 0
1158 06:52:45.749903 DOMAIN: 0000 assign_resources, bus 0 link: 0
1159 06:52:45.759523 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1160 06:52:45.765996 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1161 06:52:45.776368 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1162 06:52:45.782636 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1163 06:52:45.789480 PCI: 00:04.0 assign_resources, bus 1 link: 0
1164 06:52:45.793032 PCI: 00:04.0 assign_resources, bus 1 link: 0
1165 06:52:45.799860 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1166 06:52:45.806498 PCI: 00:05.0 assign_resources, bus 2 link: 0
1167 06:52:45.809664 PCI: 00:05.0 assign_resources, bus 2 link: 0
1168 06:52:45.819747 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1169 06:52:45.825918 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1170 06:52:45.829407 PCI: 00:14.0 assign_resources, bus 0 link: 0
1171 06:52:45.832718
1172 06:52:45.836528 PCI: 00:14.0 assign_resources, bus 0 link: 0
1173 06:52:45.842717 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1174 06:52:45.849473 PCI: 00:14.3 assign_resources, bus 0 link: 0
1175 06:52:45.852854 PCI: 00:14.3 assign_resources, bus 0 link: 0
1176 06:52:45.862865 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1177 06:52:45.869357 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1178 06:52:45.872909 PCI: 00:15.0 assign_resources, bus 0 link: 0
1179 06:52:45.879261 PCI: 00:15.0 assign_resources, bus 0 link: 0
1180 06:52:45.886320 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1181 06:52:45.896062 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1182 06:52:45.899497 PCI: 00:15.2 assign_resources, bus 0 link: 0
1183 06:52:45.905776 PCI: 00:15.2 assign_resources, bus 0 link: 0
1184 06:52:45.912921 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1185 06:52:45.915805 PCI: 00:15.3 assign_resources, bus 0 link: 0
1186 06:52:45.922497 PCI: 00:15.3 assign_resources, bus 0 link: 0
1187 06:52:45.928963 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1188 06:52:45.938931 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1189 06:52:45.942425 PCI: 00:19.0 assign_resources, bus 0 link: 0
1190 06:52:45.945764 PCI: 00:19.0 assign_resources, bus 0 link: 0
1191 06:52:45.949262
1192 06:52:45.956209 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1193 06:52:45.962542 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1194 06:52:45.972238 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1195 06:52:45.975806 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1196 06:52:45.982184 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1197 06:52:45.985458 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1198 06:52:45.992277 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1199 06:52:45.995702 LPC: Trying to open IO window from 800 size 1ff
1200 06:52:46.002528 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1201 06:52:46.005418
1202 06:52:46.012100 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1203 06:52:46.015549 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1204 06:52:46.022536 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1205 06:52:46.029249 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1206 06:52:46.032102 DOMAIN: 0000 assign_resources, bus 0 link: 0
1207 06:52:46.035660
1208 06:52:46.038879 Root Device assign_resources, bus 0 link: 0
1209 06:52:46.042565 Done setting resources.
1210 06:52:46.048745 Show resources in subtree (Root Device)...After assigning values.
1211 06:52:46.052001 Root Device child on link 0 CPU_CLUSTER: 0
1212 06:52:46.055366 CPU_CLUSTER: 0 child on link 0 APIC: 00
1213 06:52:46.059278 APIC: 00
1214 06:52:46.059383 APIC: 02
1215 06:52:46.061910 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1216 06:52:46.071977 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1217 06:52:46.082169 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1218 06:52:46.082294 PCI: 00:00.0
1219 06:52:46.085606
1220 06:52:46.092511 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1221 06:52:46.102178 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1222 06:52:46.112528 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1223 06:52:46.121938 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1224 06:52:46.132273 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1225 06:52:46.141921 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1226 06:52:46.148977 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1227 06:52:46.158890 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1228 06:52:46.168720 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1229 06:52:46.178552 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1230 06:52:46.189096 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1231 06:52:46.195180 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1232 06:52:46.198727
1233 06:52:46.205383 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1234 06:52:46.215556 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1235 06:52:46.225292 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1236 06:52:46.235066 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1237 06:52:46.245346 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1238 06:52:46.252345 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1239 06:52:46.254972
1240 06:52:46.261924 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1241 06:52:46.265056 PCI: 00:02.0
1242 06:52:46.275538 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1243 06:52:46.285355 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1244 06:52:46.295138 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1245 06:52:46.298485 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1246 06:52:46.308227 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1247 06:52:46.311476
1248 06:52:46.311595 GENERIC: 0.0
1249 06:52:46.314929 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1250 06:52:46.328192 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1251 06:52:46.328340 GENERIC: 0.0
1252 06:52:46.331816 PCI: 00:08.0
1253 06:52:46.341668 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1254 06:52:46.344897 PCI: 00:14.0 child on link 0 USB0 port 0
1255 06:52:46.354863 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1256 06:52:46.361753 USB0 port 0 child on link 0 USB2 port 0
1257 06:52:46.361895 USB2 port 0
1258 06:52:46.365091 USB2 port 1
1259 06:52:46.365187 USB2 port 2
1260 06:52:46.367931 USB2 port 3
1261 06:52:46.368031 USB2 port 4
1262 06:52:46.371359 USB2 port 5
1263 06:52:46.371465 USB2 port 6
1264 06:52:46.374766 USB2 port 7
1265 06:52:46.374855 USB3 port 0
1266 06:52:46.378187 USB3 port 1
1267 06:52:46.378295 USB3 port 2
1268 06:52:46.381649 USB3 port 3
1269 06:52:46.381742 PCI: 00:14.2
1270 06:52:46.388199 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1271 06:52:46.397879 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1272 06:52:46.398018 GENERIC: 0.0
1273 06:52:46.401211 PCI: 00:14.5
1274 06:52:46.411530 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1275 06:52:46.414461 PCI: 00:15.0 child on link 0 I2C: 00:2c
1276 06:52:46.424670 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1277 06:52:46.428174 I2C: 00:2c
1278 06:52:46.428328 I2C: 00:15
1279 06:52:46.431519 PCI: 00:15.1
1280 06:52:46.441154 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1281 06:52:46.444413 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1282 06:52:46.454923 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1283 06:52:46.457826
1284 06:52:46.457950 GENERIC: 0.0
1285 06:52:46.458026 I2C: 00:15
1286 06:52:46.461052
1287 06:52:46.461148 I2C: 00:10
1288 06:52:46.461223 I2C: 00:10
1289 06:52:46.464435 I2C: 00:2c
1290 06:52:46.464534 I2C: 00:40
1291 06:52:46.468019 I2C: 00:10
1292 06:52:46.468116 I2C: 00:39
1293 06:52:46.474905 PCI: 00:15.3 child on link 0 I2C: 00:36
1294 06:52:46.484468 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1295 06:52:46.484590 I2C: 00:36
1296 06:52:46.488182 I2C: 00:10
1297 06:52:46.488280 I2C: 00:0c
1298 06:52:46.491200 I2C: 00:50
1299 06:52:46.491297 PCI: 00:16.0
1300 06:52:46.501590 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1301 06:52:46.508354 PCI: 00:19.0 child on link 0 I2C: 00:1a
1302 06:52:46.517662 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1303 06:52:46.517818 I2C: 00:1a
1304 06:52:46.521108 I2C: 00:1a
1305 06:52:46.521240 I2C: 00:1a
1306 06:52:46.524375 I2C: 00:28
1307 06:52:46.524489 I2C: 00:29
1308 06:52:46.524588 PCI: 00:19.2
1309 06:52:46.527699
1310 06:52:46.537635 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1311 06:52:46.547678 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1312 06:52:46.547807 PCI: 00:1a.0
1313 06:52:46.561423 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1314 06:52:46.561565 PCI: 00:1e.0
1315 06:52:46.564320 PCI: 00:1e.2 child on link 0 SPI: 00
1316 06:52:46.574160 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1317 06:52:46.577723 SPI: 00
1318 06:52:46.581321 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1319 06:52:46.591243 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1320 06:52:46.591361 PNP: 0c09.0
1321 06:52:46.600744 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1322 06:52:46.600888 PCI: 00:1f.2
1323 06:52:46.610678 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1324 06:52:46.621119 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1325 06:52:46.624566 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1326 06:52:46.634140 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1327 06:52:46.637585
1328 06:52:46.647410 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1329 06:52:46.647552 GENERIC: 0.0
1330 06:52:46.651052 PCI: 00:1f.5
1331 06:52:46.660868 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1332 06:52:46.664170 Done allocating resources.
1333 06:52:46.667497 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2110 ms
1334 06:52:46.670762
1335 06:52:46.670899 Enabling resources...
1336 06:52:46.677673 PCI: 00:00.0 subsystem <- 8086/4e22
1337 06:52:46.677776 PCI: 00:00.0 cmd <- 06
1338 06:52:46.681192 PCI: 00:02.0 subsystem <- 8086/4e55
1339 06:52:46.683976 PCI: 00:02.0 cmd <- 03
1340 06:52:46.687520 PCI: 00:04.0 subsystem <- 8086/4e03
1341 06:52:46.690579 PCI: 00:04.0 cmd <- 02
1342 06:52:46.693957 PCI: 00:05.0 bridge ctrl <- 0003
1343 06:52:46.697394 PCI: 00:05.0 subsystem <- 8086/4e19
1344 06:52:46.700445 PCI: 00:05.0 cmd <- 02
1345 06:52:46.704342 PCI: 00:08.0 cmd <- 06
1346 06:52:46.707491 PCI: 00:14.0 subsystem <- 8086/4ded
1347 06:52:46.707596 PCI: 00:14.0 cmd <- 02
1348 06:52:46.713779 PCI: 00:14.3 subsystem <- 8086/4df0
1349 06:52:46.713878 PCI: 00:14.3 cmd <- 02
1350 06:52:46.717363 PCI: 00:14.5 subsystem <- 8086/4df8
1351 06:52:46.720295 PCI: 00:14.5 cmd <- 06
1352 06:52:46.723716 PCI: 00:15.0 subsystem <- 8086/4de8
1353 06:52:46.727463 PCI: 00:15.0 cmd <- 02
1354 06:52:46.730801 PCI: 00:15.1 subsystem <- 8086/4de9
1355 06:52:46.733788 PCI: 00:15.1 cmd <- 02
1356 06:52:46.737148 PCI: 00:15.2 subsystem <- 8086/4dea
1357 06:52:46.740441 PCI: 00:15.2 cmd <- 02
1358 06:52:46.743871 PCI: 00:15.3 subsystem <- 8086/4deb
1359 06:52:46.746946 PCI: 00:15.3 cmd <- 02
1360 06:52:46.750365 PCI: 00:16.0 subsystem <- 8086/4de0
1361 06:52:46.750463 PCI: 00:16.0 cmd <- 02
1362 06:52:46.757349 PCI: 00:19.0 subsystem <- 8086/4dc5
1363 06:52:46.757454 PCI: 00:19.0 cmd <- 02
1364 06:52:46.760452 PCI: 00:19.2 subsystem <- 8086/4dc7
1365 06:52:46.763519 PCI: 00:19.2 cmd <- 06
1366 06:52:46.767355 PCI: 00:1a.0 subsystem <- 8086/4dc4
1367 06:52:46.770672 PCI: 00:1a.0 cmd <- 06
1368 06:52:46.774202 PCI: 00:1e.2 subsystem <- 8086/4daa
1369 06:52:46.776903 PCI: 00:1e.2 cmd <- 06
1370 06:52:46.780657 PCI: 00:1f.0 subsystem <- 8086/4d87
1371 06:52:46.783779 PCI: 00:1f.0 cmd <- 407
1372 06:52:46.787244 PCI: 00:1f.3 subsystem <- 8086/4dc8
1373 06:52:46.790250 PCI: 00:1f.3 cmd <- 02
1374 06:52:46.793924 PCI: 00:1f.5 subsystem <- 8086/4da4
1375 06:52:46.794058 PCI: 00:1f.5 cmd <- 406
1376 06:52:46.799585 done.
1377 06:52:46.802791 BS: BS_DEV_ENABLE run times (exec / console): 7 / 122 ms
1378 06:52:46.806404 Initializing devices...
1379 06:52:46.809380 Root Device init
1380 06:52:46.809484 mainboard: EC init
1381 06:52:46.816301 Chrome EC: Set SMI mask to 0x0000000000000000
1382 06:52:46.819480 Chrome EC: clear events_b mask to 0x0000000000000000
1383 06:52:46.826047 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1384 06:52:46.833185 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1385 06:52:46.839499 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1386 06:52:46.842654 Chrome EC: Set WAKE mask to 0x0000000000000000
1387 06:52:46.849512 Root Device init finished in 35 msecs
1388 06:52:46.849664 PCI: 00:00.0 init
1389 06:52:46.853915 CPU TDP = 6 Watts
1390 06:52:46.856953 CPU PL1 = 7 Watts
1391 06:52:46.857058 CPU PL2 = 12 Watts
1392 06:52:46.860437 PCI: 00:00.0 init finished in 6 msecs
1393 06:52:46.863710 PCI: 00:02.0 init
1394 06:52:46.867152 GMA: Found VBT in CBFS
1395 06:52:46.870558 GMA: Found valid VBT in CBFS
1396 06:52:46.873665 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1397 06:52:46.884021 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1398 06:52:46.887235 PCI: 00:02.0 init finished in 18 msecs
1399 06:52:46.887343 PCI: 00:08.0 init
1400 06:52:46.890797
1401 06:52:46.893726 PCI: 00:08.0 init finished in 0 msecs
1402 06:52:46.893825 PCI: 00:14.0 init
1403 06:52:46.900671 XHCI: Updated LFPS sampling OFF time to 9 ms
1404 06:52:46.903641 PCI: 00:14.0 init finished in 4 msecs
1405 06:52:46.906905 PCI: 00:15.0 init
1406 06:52:46.910474 I2C bus 0 version 0x3230302a
1407 06:52:46.913791 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1408 06:52:46.917175 PCI: 00:15.0 init finished in 6 msecs
1409 06:52:46.917278 PCI: 00:15.1 init
1410 06:52:46.920144 I2C bus 1 version 0x3230302a
1411 06:52:46.923928 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1412 06:52:46.930267 PCI: 00:15.1 init finished in 6 msecs
1413 06:52:46.930372 PCI: 00:15.2 init
1414 06:52:46.933495 I2C bus 2 version 0x3230302a
1415 06:52:46.937149 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1416 06:52:46.940307 PCI: 00:15.2 init finished in 6 msecs
1417 06:52:46.943713 PCI: 00:15.3 init
1418 06:52:46.947120 I2C bus 3 version 0x3230302a
1419 06:52:46.950763 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1420 06:52:46.953607 PCI: 00:15.3 init finished in 6 msecs
1421 06:52:46.956952 PCI: 00:16.0 init
1422 06:52:46.960557 PCI: 00:16.0 init finished in 0 msecs
1423 06:52:46.963403 PCI: 00:19.0 init
1424 06:52:46.963501 I2C bus 4 version 0x3230302a
1425 06:52:46.970103 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1426 06:52:46.973708 PCI: 00:19.0 init finished in 6 msecs
1427 06:52:46.973806 PCI: 00:1a.0 init
1428 06:52:46.980379 PCI: 00:1a.0 init finished in 0 msecs
1429 06:52:46.980481 PCI: 00:1f.0 init
1430 06:52:46.986910 IOAPIC: Initializing IOAPIC at 0xfec00000
1431 06:52:46.990264 IOAPIC: Bootstrap Processor Local APIC = 0x00
1432 06:52:46.993844 IOAPIC: ID = 0x02
1433 06:52:46.993954 IOAPIC: Dumping registers
1434 06:52:46.996670 reg 0x0000: 0x02000000
1435 06:52:47.000366 reg 0x0001: 0x00770020
1436 06:52:47.003330 reg 0x0002: 0x00000000
1437 06:52:47.006716 PCI: 00:1f.0 init finished in 21 msecs
1438 06:52:47.010134 PCI: 00:1f.2 init
1439 06:52:47.010258 Disabling ACPI via APMC.
1440 06:52:47.015367 APMC done.
1441 06:52:47.018840 PCI: 00:1f.2 init finished in 6 msecs
1442 06:52:47.029684 PNP: 0c09.0 init
1443 06:52:47.033015 Google Chrome EC uptime: 6.554 seconds
1444 06:52:47.039831 Google Chrome AP resets since EC boot: 0
1445 06:52:47.043324 Google Chrome most recent AP reset causes:
1446 06:52:47.049750 Google Chrome EC reset flags at last EC boot: reset-pin
1447 06:52:47.053283 PNP: 0c09.0 init finished in 18 msecs
1448 06:52:47.053386 Devices initialized
1449 06:52:47.056625 Show all devs... After init.
1450 06:52:47.060086 Root Device: enabled 1
1451 06:52:47.063059 CPU_CLUSTER: 0: enabled 1
1452 06:52:47.066264 DOMAIN: 0000: enabled 1
1453 06:52:47.066384 PCI: 00:00.0: enabled 1
1454 06:52:47.069627 PCI: 00:02.0: enabled 1
1455 06:52:47.073016 PCI: 00:04.0: enabled 1
1456 06:52:47.073138 PCI: 00:05.0: enabled 1
1457 06:52:47.076570
1458 06:52:47.076727 PCI: 00:09.0: enabled 0
1459 06:52:47.079993 PCI: 00:12.6: enabled 0
1460 06:52:47.083445 PCI: 00:14.0: enabled 1
1461 06:52:47.083584 PCI: 00:14.1: enabled 0
1462 06:52:47.086131 PCI: 00:14.2: enabled 0
1463 06:52:47.089566 PCI: 00:14.3: enabled 1
1464 06:52:47.093189 PCI: 00:14.5: enabled 1
1465 06:52:47.093320 PCI: 00:15.0: enabled 1
1466 06:52:47.096433 PCI: 00:15.1: enabled 1
1467 06:52:47.099500 PCI: 00:15.2: enabled 1
1468 06:52:47.102871 PCI: 00:15.3: enabled 1
1469 06:52:47.103018 PCI: 00:16.0: enabled 1
1470 06:52:47.106311 PCI: 00:16.1: enabled 0
1471 06:52:47.109669 PCI: 00:16.4: enabled 0
1472 06:52:47.113319 PCI: 00:16.5: enabled 0
1473 06:52:47.113446 PCI: 00:17.0: enabled 0
1474 06:52:47.116061 PCI: 00:19.0: enabled 1
1475 06:52:47.120017 PCI: 00:19.1: enabled 0
1476 06:52:47.120157 PCI: 00:19.2: enabled 1
1477 06:52:47.123182
1478 06:52:47.123279 PCI: 00:1a.0: enabled 1
1479 06:52:47.126568 PCI: 00:1c.0: enabled 0
1480 06:52:47.129511 PCI: 00:1c.1: enabled 0
1481 06:52:47.129652 PCI: 00:1c.2: enabled 0
1482 06:52:47.132687 PCI: 00:1c.3: enabled 0
1483 06:52:47.136288 PCI: 00:1c.4: enabled 0
1484 06:52:47.139644 PCI: 00:1c.5: enabled 0
1485 06:52:47.139780 PCI: 00:1c.6: enabled 0
1486 06:52:47.143091 PCI: 00:1c.7: enabled 1
1487 06:52:47.146630 PCI: 00:1e.0: enabled 0
1488 06:52:47.149712 PCI: 00:1e.1: enabled 0
1489 06:52:47.149859 PCI: 00:1e.2: enabled 1
1490 06:52:47.152657 PCI: 00:1e.3: enabled 0
1491 06:52:47.156186 PCI: 00:1f.0: enabled 1
1492 06:52:47.159679 PCI: 00:1f.1: enabled 0
1493 06:52:47.159829 PCI: 00:1f.2: enabled 1
1494 06:52:47.163054 PCI: 00:1f.3: enabled 1
1495 06:52:47.166404 PCI: 00:1f.4: enabled 0
1496 06:52:47.166550 PCI: 00:1f.5: enabled 1
1497 06:52:47.170008 PCI: 00:1f.7: enabled 0
1498 06:52:47.173312 GENERIC: 0.0: enabled 1
1499 06:52:47.176585 GENERIC: 0.0: enabled 1
1500 06:52:47.176724 USB0 port 0: enabled 1
1501 06:52:47.179758 GENERIC: 0.0: enabled 1
1502 06:52:47.183036 I2C: 00:2c: enabled 1
1503 06:52:47.183167 I2C: 00:15: enabled 1
1504 06:52:47.186420 GENERIC: 0.0: enabled 0
1505 06:52:47.189382 I2C: 00:15: enabled 1
1506 06:52:47.192753 I2C: 00:10: enabled 0
1507 06:52:47.192878 I2C: 00:10: enabled 0
1508 06:52:47.196102 I2C: 00:2c: enabled 1
1509 06:52:47.199641 I2C: 00:40: enabled 1
1510 06:52:47.199739 I2C: 00:10: enabled 1
1511 06:52:47.202999 I2C: 00:39: enabled 1
1512 06:52:47.206465 I2C: 00:36: enabled 1
1513 06:52:47.206577 I2C: 00:10: enabled 0
1514 06:52:47.209567 I2C: 00:0c: enabled 1
1515 06:52:47.212955 I2C: 00:50: enabled 1
1516 06:52:47.213052 I2C: 00:1a: enabled 1
1517 06:52:47.216150 I2C: 00:1a: enabled 0
1518 06:52:47.219573 I2C: 00:1a: enabled 0
1519 06:52:47.219672 I2C: 00:28: enabled 1
1520 06:52:47.222934 I2C: 00:29: enabled 1
1521 06:52:47.226293 PCI: 00:00.0: enabled 1
1522 06:52:47.226392 SPI: 00: enabled 1
1523 06:52:47.229536 PNP: 0c09.0: enabled 1
1524 06:52:47.233175 GENERIC: 0.0: enabled 0
1525 06:52:47.233274 USB2 port 0: enabled 1
1526 06:52:47.236485 USB2 port 1: enabled 1
1527 06:52:47.239821 USB2 port 2: enabled 1
1528 06:52:47.242989 USB2 port 3: enabled 1
1529 06:52:47.243115 USB2 port 4: enabled 0
1530 06:52:47.245865 USB2 port 5: enabled 1
1531 06:52:47.249338 USB2 port 6: enabled 0
1532 06:52:47.249447 USB2 port 7: enabled 1
1533 06:52:47.252936 USB3 port 0: enabled 1
1534 06:52:47.256198 USB3 port 1: enabled 1
1535 06:52:47.259751 USB3 port 2: enabled 1
1536 06:52:47.259897 USB3 port 3: enabled 1
1537 06:52:47.263147 APIC: 00: enabled 1
1538 06:52:47.263292 APIC: 02: enabled 1
1539 06:52:47.265841 PCI: 00:08.0: enabled 1
1540 06:52:47.272651 BS: BS_DEV_INIT run times (exec / console): 23 / 440 ms
1541 06:52:47.275991 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1542 06:52:47.279324 ELOG: NV offset 0xbfa000 size 0x1000
1543 06:52:47.287865 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1544 06:52:47.294072 ELOG: Event(17) added with size 13 at 2023-01-10 06:52:47 UTC
1545 06:52:47.300957 ELOG: Event(92) added with size 9 at 2023-01-10 06:52:47 UTC
1546 06:52:47.307964 ELOG: Event(93) added with size 9 at 2023-01-10 06:52:47 UTC
1547 06:52:47.314126 ELOG: Event(9E) added with size 10 at 2023-01-10 06:52:47 UTC
1548 06:52:47.320893 ELOG: Event(9F) added with size 14 at 2023-01-10 06:52:47 UTC
1549 06:52:47.327126 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1550 06:52:47.330955 ELOG: Event(A1) added with size 10 at 2023-01-10 06:52:47 UTC
1551 06:52:47.340555 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1552 06:52:47.347358 ELOG: Event(A0) added with size 9 at 2023-01-10 06:52:47 UTC
1553 06:52:47.350521 elog_add_boot_reason: Logged dev mode boot
1554 06:52:47.357136 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1555 06:52:47.357241 Finalize devices...
1556 06:52:47.360780 Devices finalized
1557 06:52:47.367616 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1558 06:52:47.370790 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1559 06:52:47.377246 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1560 06:52:47.380463 ME: HFSTS1 : 0x80030045
1561 06:52:47.383836 ME: HFSTS2 : 0x30280136
1562 06:52:47.390463 ME: HFSTS3 : 0x00000050
1563 06:52:47.393830 ME: HFSTS4 : 0x00004000
1564 06:52:47.397367 ME: HFSTS5 : 0x00000000
1565 06:52:47.400575 ME: HFSTS6 : 0x40400006
1566 06:52:47.404216 ME: Manufacturing Mode : NO
1567 06:52:47.407029 ME: FW Partition Table : OK
1568 06:52:47.410829 ME: Bringup Loader Failure : NO
1569 06:52:47.413581 ME: Firmware Init Complete : NO
1570 06:52:47.417059 ME: Boot Options Present : NO
1571 06:52:47.420321 ME: Update In Progress : NO
1572 06:52:47.423938 ME: D0i3 Support : YES
1573 06:52:47.427382 ME: Low Power State Enabled : NO
1574 06:52:47.430350 ME: CPU Replaced : YES
1575 06:52:47.434259 ME: CPU Replacement Valid : YES
1576 06:52:47.436924 ME: Current Working State : 5
1577 06:52:47.440554 ME: Current Operation State : 1
1578 06:52:47.443730 ME: Current Operation Mode : 3
1579 06:52:47.447143 ME: Error Code : 0
1580 06:52:47.450238 ME: CPU Debug Disabled : YES
1581 06:52:47.453660 ME: TXT Support : NO
1582 06:52:47.460579 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 78 ms
1583 06:52:47.467095 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1584 06:52:47.470565 ACPI: Writing ACPI tables at 76b27000.
1585 06:52:47.473429 ACPI: * FACS
1586 06:52:47.473529 ACPI: * DSDT
1587 06:52:47.476765 Ramoops buffer: 0x100000@0x76a26000.
1588 06:52:47.483469 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1589 06:52:47.486980 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1590 06:52:47.490349 Google Chrome EC: version:
1591 06:52:47.493606 ro: magolor_1.1.9999-103b6f9
1592 06:52:47.496903 rw: magolor_1.1.9999-103b6f9
1593 06:52:47.500505 running image: 1
1594 06:52:47.503927 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1595 06:52:47.508549 ACPI: * FADT
1596 06:52:47.508669 SCI is IRQ9
1597 06:52:47.511799 ACPI: added table 1/32, length now 40
1598 06:52:47.514799
1599 06:52:47.514892 ACPI: * SSDT
1600 06:52:47.518100 Found 1 CPU(s) with 2 core(s) each.
1601 06:52:47.521630 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1602 06:52:47.528365 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1603 06:52:47.531410 Could not locate 'wifi_sar' in VPD.
1604 06:52:47.534714 Checking CBFS for default SAR values
1605 06:52:47.541866 wifi_sar_defaults.hex has bad len in CBFS
1606 06:52:47.545342 failed from getting SAR limits!
1607 06:52:47.548807 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1608 06:52:47.555039 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1609 06:52:47.558571 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1610 06:52:47.565494 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1611 06:52:47.568274 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1612 06:52:47.575355 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1613 06:52:47.578576 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1614 06:52:47.585086 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1615 06:52:47.591748 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1616 06:52:47.598364 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1617 06:52:47.601822 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1618 06:52:47.608746 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1619 06:52:47.615325 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1620 06:52:47.618796 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1621 06:52:47.622034 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1622 06:52:47.629597 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1623 06:52:47.633611 PS2K: Passing 101 keymaps to kernel
1624 06:52:47.640085 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1625 06:52:47.646372 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1626 06:52:47.649721 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1627 06:52:47.656694 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1628 06:52:47.659779 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1629 06:52:47.662985
1630 06:52:47.666593 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1631 06:52:47.673164 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1632 06:52:47.679476 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1633 06:52:47.683246 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1634 06:52:47.689832 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1635 06:52:47.693035 ACPI: added table 2/32, length now 44
1636 06:52:47.696731 ACPI: * MCFG
1637 06:52:47.700004 ACPI: added table 3/32, length now 48
1638 06:52:47.700107 ACPI: * TPM2
1639 06:52:47.703465 TPM2 log created at 0x76a16000
1640 06:52:47.706407 ACPI: added table 4/32, length now 52
1641 06:52:47.709770 ACPI: * MADT
1642 06:52:47.709869 SCI is IRQ9
1643 06:52:47.713128 ACPI: added table 5/32, length now 56
1644 06:52:47.716769 current = 76b2d580
1645 06:52:47.716863 ACPI: * DMAR
1646 06:52:47.719634
1647 06:52:47.723288 ACPI: added table 6/32, length now 60
1648 06:52:47.726707 ACPI: added table 7/32, length now 64
1649 06:52:47.726819 ACPI: * HPET
1650 06:52:47.729583 ACPI: added table 8/32, length now 68
1651 06:52:47.733177 ACPI: done.
1652 06:52:47.736660 ACPI tables: 26304 bytes.
1653 06:52:47.740367 smbios_write_tables: 76a15000
1654 06:52:47.743058 EC returned error result code 3
1655 06:52:47.746515 Couldn't obtain OEM name from CBI
1656 06:52:47.749994 Create SMBIOS type 16
1657 06:52:47.750097 Create SMBIOS type 17
1658 06:52:47.753536 GENERIC: 0.0 (WIFI Device)
1659 06:52:47.756777 SMBIOS tables: 913 bytes.
1660 06:52:47.760463 Writing table forward entry at 0x00000500
1661 06:52:47.766592 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1662 06:52:47.770331 Writing coreboot table at 0x76b4b000
1663 06:52:47.776517 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1664 06:52:47.780018 1. 0000000000001000-000000000009ffff: RAM
1665 06:52:47.786445 2. 00000000000a0000-00000000000fffff: RESERVED
1666 06:52:47.790298 3. 0000000000100000-0000000076a14fff: RAM
1667 06:52:47.796940 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1668 06:52:47.799599 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1669 06:52:47.806750 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1670 06:52:47.813099 7. 0000000077000000-000000007fbfffff: RESERVED
1671 06:52:47.816488 8. 00000000c0000000-00000000cfffffff: RESERVED
1672 06:52:47.823539 9. 00000000fb000000-00000000fb000fff: RESERVED
1673 06:52:47.826407 10. 00000000fe000000-00000000fe00ffff: RESERVED
1674 06:52:47.829580 11. 00000000fea80000-00000000fea87fff: RESERVED
1675 06:52:47.836440 12. 00000000fed80000-00000000fed87fff: RESERVED
1676 06:52:47.839633 13. 00000000fed90000-00000000fed92fff: RESERVED
1677 06:52:47.846362 14. 00000000feda0000-00000000feda1fff: RESERVED
1678 06:52:47.849891 15. 0000000100000000-00000001803fffff: RAM
1679 06:52:47.853220 Passing 4 GPIOs to payload:
1680 06:52:47.856654 NAME | PORT | POLARITY | VALUE
1681 06:52:47.862783 lid | undefined | high | high
1682 06:52:47.869407 power | undefined | high | low
1683 06:52:47.873079 oprom | undefined | high | low
1684 06:52:47.879956 EC in RW | 0x000000b9 | high | low
1685 06:52:47.886284 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum d271
1686 06:52:47.889520 coreboot table: 1504 bytes.
1687 06:52:47.893155 IMD ROOT 0. 0x76fff000 0x00001000
1688 06:52:47.896427 IMD SMALL 1. 0x76ffe000 0x00001000
1689 06:52:47.900011 FSP MEMORY 2. 0x76c4e000 0x003b0000
1690 06:52:47.903176 CONSOLE 3. 0x76c2e000 0x00020000
1691 06:52:47.906225 FMAP 4. 0x76c2d000 0x00000578
1692 06:52:47.909666 TIME STAMP 5. 0x76c2c000 0x00000910
1693 06:52:47.913171 VBOOT WORK 6. 0x76c18000 0x00014000
1694 06:52:47.919621 ROMSTG STCK 7. 0x76c17000 0x00001000
1695 06:52:47.923125 AFTER CAR 8. 0x76c0d000 0x0000a000
1696 06:52:47.926692 RAMSTAGE 9. 0x76ba7000 0x00066000
1697 06:52:47.929737 REFCODE 10. 0x76b67000 0x00040000
1698 06:52:47.933182 SMM BACKUP 11. 0x76b57000 0x00010000
1699 06:52:47.936632 4f444749 12. 0x76b55000 0x00002000
1700 06:52:47.940079 EXT VBT13. 0x76b53000 0x00001c43
1701 06:52:47.942784 COREBOOT 14. 0x76b4b000 0x00008000
1702 06:52:47.946252 ACPI 15. 0x76b27000 0x00024000
1703 06:52:47.949806 ACPI GNVS 16. 0x76b26000 0x00001000
1704 06:52:47.953283
1705 06:52:47.956673 RAMOOPS 17. 0x76a26000 0x00100000
1706 06:52:47.960050 TPM2 TCGLOG18. 0x76a16000 0x00010000
1707 06:52:47.963074 SMBIOS 19. 0x76a15000 0x00000800
1708 06:52:47.963173 IMD small region:
1709 06:52:47.969481 IMD ROOT 0. 0x76ffec00 0x00000400
1710 06:52:47.972806 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1711 06:52:47.976466 VPD 2. 0x76ffeb80 0x0000004c
1712 06:52:47.979568 POWER STATE 3. 0x76ffeb40 0x00000040
1713 06:52:47.982984 ROMSTAGE 4. 0x76ffeb20 0x00000004
1714 06:52:47.989422 MEM INFO 5. 0x76ffe940 0x000001e0
1715 06:52:47.992885 BS: BS_WRITE_TABLES run times (exec / console): 7 / 520 ms
1716 06:52:47.996732 MTRR: Physical address space:
1717 06:52:48.002621 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1718 06:52:48.009492 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1719 06:52:48.016014 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1720 06:52:48.023113 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1721 06:52:48.029455 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1722 06:52:48.032718 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1723 06:52:48.036413
1724 06:52:48.039654 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1725 06:52:48.045845 MTRR: Fixed MSR 0x250 0x0606060606060606
1726 06:52:48.049273 MTRR: Fixed MSR 0x258 0x0606060606060606
1727 06:52:48.052599 MTRR: Fixed MSR 0x259 0x0000000000000000
1728 06:52:48.056374 MTRR: Fixed MSR 0x268 0x0606060606060606
1729 06:52:48.062571 MTRR: Fixed MSR 0x269 0x0606060606060606
1730 06:52:48.066250 MTRR: Fixed MSR 0x26a 0x0606060606060606
1731 06:52:48.069724 MTRR: Fixed MSR 0x26b 0x0606060606060606
1732 06:52:48.072574 MTRR: Fixed MSR 0x26c 0x0606060606060606
1733 06:52:48.076143 MTRR: Fixed MSR 0x26d 0x0606060606060606
1734 06:52:48.082998 MTRR: Fixed MSR 0x26e 0x0606060606060606
1735 06:52:48.086342 MTRR: Fixed MSR 0x26f 0x0606060606060606
1736 06:52:48.089714 call enable_fixed_mtrr()
1737 06:52:48.092633 CPU physical address size: 39 bits
1738 06:52:48.095893 MTRR: default type WB/UC MTRR counts: 6/5.
1739 06:52:48.099439 MTRR: UC selected as default type.
1740 06:52:48.105892 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1741 06:52:48.112765 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1742 06:52:48.119176 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1743 06:52:48.125873 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1744 06:52:48.132498 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1745 06:52:48.132643
1746 06:52:48.132752 MTRR check
1747 06:52:48.135980 Fixed MTRRs : Enabled
1748 06:52:48.139296 Variable MTRRs: Enabled
1749 06:52:48.139402
1750 06:52:48.142752 MTRR: Fixed MSR 0x250 0x0606060606060606
1751 06:52:48.146060 MTRR: Fixed MSR 0x258 0x0606060606060606
1752 06:52:48.149379 MTRR: Fixed MSR 0x259 0x0000000000000000
1753 06:52:48.156161 MTRR: Fixed MSR 0x268 0x0606060606060606
1754 06:52:48.159113 MTRR: Fixed MSR 0x269 0x0606060606060606
1755 06:52:48.162563 MTRR: Fixed MSR 0x26a 0x0606060606060606
1756 06:52:48.165801 MTRR: Fixed MSR 0x26b 0x0606060606060606
1757 06:52:48.172637 MTRR: Fixed MSR 0x26c 0x0606060606060606
1758 06:52:48.176239 MTRR: Fixed MSR 0x26d 0x0606060606060606
1759 06:52:48.179216 MTRR: Fixed MSR 0x26e 0x0606060606060606
1760 06:52:48.182836 MTRR: Fixed MSR 0x26f 0x0606060606060606
1761 06:52:48.189185 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 144 ms
1762 06:52:48.192482 call enable_fixed_mtrr()
1763 06:52:48.196529 Checking cr50 for pending updates
1764 06:52:48.199835 CPU physical address size: 39 bits
1765 06:52:48.203225 Reading cr50 TPM mode
1766 06:52:48.212798 BS: BS_PAYLOAD_LOAD entry times (exec / console): 12 / 6 ms
1767 06:52:48.220443 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1768 06:52:48.223915 Checking segment from ROM address 0xfff9d5b8
1769 06:52:48.230241 Checking segment from ROM address 0xfff9d5d4
1770 06:52:48.233776 Loading segment from ROM address 0xfff9d5b8
1771 06:52:48.237154 code (compression=0)
1772 06:52:48.243938 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1773 06:52:48.254098 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1774 06:52:48.257065 it's not compressed!
1775 06:52:48.383483 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1776 06:52:48.389628 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1777 06:52:48.397565 Loading segment from ROM address 0xfff9d5d4
1778 06:52:48.400462 Entry Point 0x30000000
1779 06:52:48.400571 Loaded segments
1780 06:52:48.407156 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 61 ms
1781 06:52:48.423755 Finalizing chipset.
1782 06:52:48.426999 Finalizing SMM.
1783 06:52:48.427097 APMC done.
1784 06:52:48.433557 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1785 06:52:48.437043 mp_park_aps done after 0 msecs.
1786 06:52:48.440384 Jumping to boot code at 0x30000000(0x76b4b000)
1787 06:52:48.449882 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1788 06:52:48.450010
1789 06:52:48.450092
1790 06:52:48.450164
1791 06:52:48.453301 Starting depthcharge on Magolor...
1792 06:52:48.453439
1793 06:52:48.453869 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
1794 06:52:48.454049 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1795 06:52:48.454156 Setting prompt string to ['dedede:']
1796 06:52:48.454249 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1797 06:52:48.463235 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1798 06:52:48.463393
1799 06:52:48.469667 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1800 06:52:48.469795
1801 06:52:48.473126 fw_config match found: AUDIO_AMP=UNPROVISIONED
1802 06:52:48.476375
1803 06:52:48.476474 Wipe memory regions:
1804 06:52:48.476551
1805 06:52:48.479927 [0x00000000001000, 0x000000000a0000)
1806 06:52:48.480025
1807 06:52:48.483542 [0x00000000100000, 0x00000030000000)
1808 06:52:48.483660
1809 06:52:48.615716 [0x00000031062170, 0x00000076a15000)
1810 06:52:48.615880
1811 06:52:48.788655 [0x00000100000000, 0x00000180400000)
1812 06:52:48.788861
1813 06:52:49.852717 R8152: Initializing
1814 06:52:49.852888
1815 06:52:49.855845 Version 6 (ocp_data = 5c30)
1816 06:52:49.855979
1817 06:52:49.859277 R8152: Done initializing
1818 06:52:49.859411
1819 06:52:49.862831 Adding net device
1820 06:52:49.862929
1821 06:52:49.865785 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1822 06:52:49.869555
1823 06:52:49.869659
1824 06:52:49.869751
1825 06:52:49.870041 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1827 06:52:49.970809 dedede: tftpboot 192.168.201.1 8649822/tftp-deploy-c26wlj7k/kernel/bzImage 8649822/tftp-deploy-c26wlj7k/kernel/cmdline 8649822/tftp-deploy-c26wlj7k/ramdisk/ramdisk.cpio.gz
1828 06:52:49.971025 Setting prompt string to 'Starting kernel'
1829 06:52:49.971144 Setting prompt string to ['Starting kernel']
1830 06:52:49.971225 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1831 06:52:49.971347 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1832 06:52:49.976141 tftpboot 192.168.201.1 8649822/tftp-deploy-c26wlj7k/kernel/bzImaoy-c26wlj7k/kernel/cmdline 8649822/tftp-deploy-c26wlj7k/ramdisk/ramdisk.cpio.gz
1833 06:52:49.976259
1834 06:52:49.976353 Waiting for link
1835 06:52:49.976425
1836 06:52:50.177616 done.
1837 06:52:50.177793
1838 06:52:50.177884 MAC: 00:24:32:30:7b:81
1839 06:52:50.177967
1840 06:52:50.180801 Sending DHCP discover... done.
1841 06:52:50.180959
1842 06:52:50.184285 Waiting for reply... done.
1843 06:52:50.184442
1844 06:52:50.187541 Sending DHCP request... done.
1845 06:52:50.187652
1846 06:52:50.194393 Waiting for reply... done.
1847 06:52:50.194503
1848 06:52:50.194593 My ip is 192.168.201.12
1849 06:52:50.194664
1850 06:52:50.197735 The DHCP server ip is 192.168.201.1
1851 06:52:50.201151
1852 06:52:50.204779 TFTP server IP predefined by user: 192.168.201.1
1853 06:52:50.204868
1854 06:52:50.211188 Bootfile predefined by user: 8649822/tftp-deploy-c26wlj7k/kernel/bzImage
1855 06:52:50.211320
1856 06:52:50.214460 Sending tftp read request... done.
1857 06:52:50.214560
1858 06:52:50.218001 Waiting for the transfer...
1859 06:52:50.218091
1860 06:52:51.256405 00000000 ################################################################
1861 06:52:51.256580
1862 06:52:51.847124 00080000 ################################################################
1863 06:52:51.847283
1864 06:52:52.427896 00100000 ################################################################
1865 06:52:52.428064
1866 06:52:53.006672 00180000 ################################################################
1867 06:52:53.006851
1868 06:52:53.600766 00200000 ################################################################
1869 06:52:53.600934
1870 06:52:54.192581 00280000 ################################################################
1871 06:52:54.192736
1872 06:52:54.811638 00300000 ################################################################
1873 06:52:54.811787
1874 06:52:55.394662 00380000 ################################################################
1875 06:52:55.394815
1876 06:52:55.988452 00400000 ################################################################
1877 06:52:55.988608
1878 06:52:56.583017 00480000 ################################################################
1879 06:52:56.583180
1880 06:52:57.179438 00500000 ################################################################
1881 06:52:57.179592
1882 06:52:57.839232 00580000 ################################################################
1883 06:52:57.839661
1884 06:52:58.463685 00600000 ################################################################
1885 06:52:58.463852
1886 06:52:59.013474 00680000 ################################################################
1887 06:52:59.013632
1888 06:52:59.258130 00700000 ############################# done.
1889 06:52:59.258288
1890 06:52:59.261057 The bootfile was 7573392 bytes long.
1891 06:52:59.261164
1892 06:52:59.264521 Sending tftp read request... done.
1893 06:52:59.264610
1894 06:52:59.267618 Waiting for the transfer...
1895 06:52:59.267704
1896 06:52:59.820067 00000000 ################################################################
1897 06:52:59.820235
1898 06:53:00.373114 00080000 ################################################################
1899 06:53:00.373281
1900 06:53:00.916802 00100000 ################################################################
1901 06:53:00.916952
1902 06:53:01.464223 00180000 ################################################################
1903 06:53:01.464378
1904 06:53:02.004248 00200000 ################################################################
1905 06:53:02.004408
1906 06:53:02.533753 00280000 ################################################################
1907 06:53:02.533929
1908 06:53:03.064888 00300000 ################################################################
1909 06:53:03.065047
1910 06:53:03.598653 00380000 ################################################################
1911 06:53:03.598810
1912 06:53:04.129531 00400000 ################################################################
1913 06:53:04.129686
1914 06:53:04.673351 00480000 ################################################################
1915 06:53:04.673503
1916 06:53:04.930971 00500000 ################################ done.
1917 06:53:04.931124
1918 06:53:04.934419 Sending tftp read request... done.
1919 06:53:04.934515
1920 06:53:04.937708 Waiting for the transfer...
1921 06:53:04.937804
1922 06:53:04.937880 00000000 # done.
1923 06:53:04.937963
1924 06:53:04.947493 Command line loaded dynamically from TFTP file: 8649822/tftp-deploy-c26wlj7k/kernel/cmdline
1925 06:53:04.947591
1926 06:53:04.967587 The command line is: console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8649822/extract-nfsrootfs-cbw384u9,tcp,hard ip=dhcp tftpserverip=192.168.201.1
1927 06:53:04.967689
1928 06:53:04.970961 ec_init: CrosEC protocol v3 supported (256, 256)
1929 06:53:04.971058
1930 06:53:04.980296 Shutting down all USB controllers.
1931 06:53:04.980392
1932 06:53:04.980468 Removing current net device
1933 06:53:04.980540
1934 06:53:04.983755 Finalizing coreboot
1935 06:53:04.983850
1936 06:53:04.990041 Exiting depthcharge with code 4 at timestamp: 23382444
1937 06:53:04.990136
1938 06:53:04.990212
1939 06:53:04.990281 Starting kernel ...
1940 06:53:04.990348
1941 06:53:04.990412
1942 06:53:04.990476
1943 06:53:04.990855 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
1944 06:53:04.990964 start: 2.2.5 auto-login-action (timeout 00:04:30) [common]
1945 06:53:04.991049 Setting prompt string to ['Linux version [0-9]']
1946 06:53:04.991129 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1947 06:53:04.991210 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1949 06:57:34.991897 end: 2.2.5 auto-login-action (duration 00:04:30) [common]
1951 06:57:34.992942 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 270 seconds'
1953 06:57:34.993928 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1956 06:57:34.995399 end: 2 depthcharge-action (duration 00:05:00) [common]
1958 06:57:34.996519 Cleaning after the job
1959 06:57:34.996942 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8649822/tftp-deploy-c26wlj7k/ramdisk
1960 06:57:34.999077 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8649822/tftp-deploy-c26wlj7k/kernel
1961 06:57:35.001591 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8649822/tftp-deploy-c26wlj7k/nfsrootfs
1962 06:57:35.063254 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8649822/tftp-deploy-c26wlj7k/modules
1963 06:57:35.063591 start: 5.1 power-off (timeout 00:00:30) [common]
1964 06:57:35.063776 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-4' '--port=1' '--command=off'
1965 06:57:35.086181 >> Command sent successfully.
1966 06:57:35.088443 Returned 0 in 0 seconds
1967 06:57:35.189564 end: 5.1 power-off (duration 00:00:00) [common]
1969 06:57:35.191098 start: 5.2 read-feedback (timeout 00:10:00) [common]
1970 06:57:35.192293 Listened to connection for namespace 'common' for up to 1s
1971 06:57:36.196791 Finalising connection for namespace 'common'
1972 06:57:36.196986 Disconnecting from shell: Finalise
1973 06:57:36.297852 end: 5.2 read-feedback (duration 00:00:01) [common]
1974 06:57:36.298252 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8649822
1975 06:57:36.401736 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8649822
1976 06:57:36.401965 JobError: Your job cannot terminate cleanly.