Boot log: asus-cx9400-volteer
- Errors: 2
- Boot result: FAIL
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
1 06:52:03.964434 lava-dispatcher, installed at version: 2022.11
2 06:52:03.964624 start: 0 validate
3 06:52:03.964758 Start time: 2023-01-10 06:52:03.964751+00:00 (UTC)
4 06:52:03.964880 Using caching service: 'http://localhost/cache/?uri=%s'
5 06:52:03.965007 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230109.0%2Famd64%2Finitrd.cpio.gz exists
6 06:52:04.260425 Using caching service: 'http://localhost/cache/?uri=%s'
7 06:52:04.261200 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-799-g1229c813bcd9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 06:52:06.272503 Using caching service: 'http://localhost/cache/?uri=%s'
9 06:52:06.273206 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230109.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 06:52:06.564939 Using caching service: 'http://localhost/cache/?uri=%s'
11 06:52:06.565686 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-799-g1229c813bcd9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 06:52:06.582114 validate duration: 2.62
14 06:52:06.583568 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 06:52:06.584146 start: 1.1 download-retry (timeout 00:10:00) [common]
16 06:52:06.584660 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 06:52:06.585199 Not decompressing ramdisk as can be used compressed.
18 06:52:06.585747 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230109.0/amd64/initrd.cpio.gz
19 06:52:06.586127 saving as /var/lib/lava/dispatcher/tmp/8649804/tftp-deploy-7s16y1xq/ramdisk/initrd.cpio.gz
20 06:52:06.586501 total size: 5432130 (5MB)
21 06:52:06.602859 progress 0% (0MB)
22 06:52:06.613865 progress 5% (0MB)
23 06:52:06.622986 progress 10% (0MB)
24 06:52:06.632037 progress 15% (0MB)
25 06:52:06.640536 progress 20% (1MB)
26 06:52:06.649479 progress 25% (1MB)
27 06:52:06.659187 progress 30% (1MB)
28 06:52:06.669881 progress 35% (1MB)
29 06:52:06.677760 progress 40% (2MB)
30 06:52:06.688691 progress 45% (2MB)
31 06:52:06.694837 progress 50% (2MB)
32 06:52:06.707370 progress 55% (2MB)
33 06:52:06.715962 progress 60% (3MB)
34 06:52:06.724736 progress 65% (3MB)
35 06:52:06.733389 progress 70% (3MB)
36 06:52:06.743075 progress 75% (3MB)
37 06:52:06.752827 progress 80% (4MB)
38 06:52:06.760527 progress 85% (4MB)
39 06:52:06.771506 progress 90% (4MB)
40 06:52:06.780359 progress 95% (4MB)
41 06:52:06.789643 progress 100% (5MB)
42 06:52:06.790583 5MB downloaded in 0.20s (25.39MB/s)
43 06:52:06.791121 end: 1.1.1 http-download (duration 00:00:00) [common]
45 06:52:06.791953 end: 1.1 download-retry (duration 00:00:00) [common]
46 06:52:06.792201 start: 1.2 download-retry (timeout 00:10:00) [common]
47 06:52:06.792446 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 06:52:06.792723 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-799-g1229c813bcd9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 06:52:06.792913 saving as /var/lib/lava/dispatcher/tmp/8649804/tftp-deploy-7s16y1xq/kernel/bzImage
50 06:52:06.793085 total size: 7573392 (7MB)
51 06:52:06.793256 No compression specified
52 06:52:06.805168 progress 0% (0MB)
53 06:52:06.830355 progress 5% (0MB)
54 06:52:06.850288 progress 10% (0MB)
55 06:52:06.869622 progress 15% (1MB)
56 06:52:06.887439 progress 20% (1MB)
57 06:52:06.907010 progress 25% (1MB)
58 06:52:06.927233 progress 30% (2MB)
59 06:52:06.944774 progress 35% (2MB)
60 06:52:06.964840 progress 40% (2MB)
61 06:52:06.987382 progress 45% (3MB)
62 06:52:07.003966 progress 50% (3MB)
63 06:52:07.023868 progress 55% (4MB)
64 06:52:07.041566 progress 60% (4MB)
65 06:52:07.062933 progress 65% (4MB)
66 06:52:07.083711 progress 70% (5MB)
67 06:52:07.103763 progress 75% (5MB)
68 06:52:07.118612 progress 80% (5MB)
69 06:52:07.139703 progress 85% (6MB)
70 06:52:07.156905 progress 90% (6MB)
71 06:52:07.176665 progress 95% (6MB)
72 06:52:07.195918 progress 100% (7MB)
73 06:52:07.196239 7MB downloaded in 0.40s (17.92MB/s)
74 06:52:07.196534 end: 1.2.1 http-download (duration 00:00:00) [common]
76 06:52:07.197032 end: 1.2 download-retry (duration 00:00:00) [common]
77 06:52:07.197223 start: 1.3 download-retry (timeout 00:09:59) [common]
78 06:52:07.197427 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 06:52:07.197641 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230109.0/amd64/full.rootfs.tar.xz
80 06:52:07.197783 saving as /var/lib/lava/dispatcher/tmp/8649804/tftp-deploy-7s16y1xq/nfsrootfs/full.rootfs.tar
81 06:52:07.197914 total size: 133363808 (127MB)
82 06:52:07.198043 Using unxz to decompress xz
83 06:52:07.214975 progress 0% (0MB)
84 06:52:07.577865 progress 5% (6MB)
85 06:52:07.941888 progress 10% (12MB)
86 06:52:08.231947 progress 15% (19MB)
87 06:52:08.431849 progress 20% (25MB)
88 06:52:08.682656 progress 25% (31MB)
89 06:52:09.032302 progress 30% (38MB)
90 06:52:09.390574 progress 35% (44MB)
91 06:52:09.787119 progress 40% (50MB)
92 06:52:10.167624 progress 45% (57MB)
93 06:52:10.525521 progress 50% (63MB)
94 06:52:10.896252 progress 55% (69MB)
95 06:52:11.256781 progress 60% (76MB)
96 06:52:11.618680 progress 65% (82MB)
97 06:52:11.977058 progress 70% (89MB)
98 06:52:12.338779 progress 75% (95MB)
99 06:52:12.776839 progress 80% (101MB)
100 06:52:13.211136 progress 85% (108MB)
101 06:52:13.484553 progress 90% (114MB)
102 06:52:13.828213 progress 95% (120MB)
103 06:52:14.218206 progress 100% (127MB)
104 06:52:14.224640 127MB downloaded in 7.03s (18.10MB/s)
105 06:52:14.224910 end: 1.3.1 http-download (duration 00:00:07) [common]
107 06:52:14.225175 end: 1.3 download-retry (duration 00:00:07) [common]
108 06:52:14.225268 start: 1.4 download-retry (timeout 00:09:52) [common]
109 06:52:14.225404 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 06:52:14.225519 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-799-g1229c813bcd9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 06:52:14.225592 saving as /var/lib/lava/dispatcher/tmp/8649804/tftp-deploy-7s16y1xq/modules/modules.tar
112 06:52:14.225655 total size: 51848 (0MB)
113 06:52:14.225720 Using unxz to decompress xz
114 06:52:14.231216 progress 63% (0MB)
115 06:52:14.231593 progress 100% (0MB)
116 06:52:14.234836 0MB downloaded in 0.01s (5.39MB/s)
117 06:52:14.235048 end: 1.4.1 http-download (duration 00:00:00) [common]
119 06:52:14.235303 end: 1.4 download-retry (duration 00:00:00) [common]
120 06:52:14.235400 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
121 06:52:14.235499 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
122 06:52:15.501610 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8649804/extract-nfsrootfs-7bsnr_c5
123 06:52:15.501819 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 06:52:15.501927 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
125 06:52:15.502065 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8649804/lava-overlay-iv407j6v
126 06:52:15.502167 makedir: /var/lib/lava/dispatcher/tmp/8649804/lava-overlay-iv407j6v/lava-8649804/bin
127 06:52:15.502277 makedir: /var/lib/lava/dispatcher/tmp/8649804/lava-overlay-iv407j6v/lava-8649804/tests
128 06:52:15.502358 makedir: /var/lib/lava/dispatcher/tmp/8649804/lava-overlay-iv407j6v/lava-8649804/results
129 06:52:15.502455 Creating /var/lib/lava/dispatcher/tmp/8649804/lava-overlay-iv407j6v/lava-8649804/bin/lava-add-keys
130 06:52:15.502584 Creating /var/lib/lava/dispatcher/tmp/8649804/lava-overlay-iv407j6v/lava-8649804/bin/lava-add-sources
131 06:52:15.502716 Creating /var/lib/lava/dispatcher/tmp/8649804/lava-overlay-iv407j6v/lava-8649804/bin/lava-background-process-start
132 06:52:15.502861 Creating /var/lib/lava/dispatcher/tmp/8649804/lava-overlay-iv407j6v/lava-8649804/bin/lava-background-process-stop
133 06:52:15.503004 Creating /var/lib/lava/dispatcher/tmp/8649804/lava-overlay-iv407j6v/lava-8649804/bin/lava-common-functions
134 06:52:15.503142 Creating /var/lib/lava/dispatcher/tmp/8649804/lava-overlay-iv407j6v/lava-8649804/bin/lava-echo-ipv4
135 06:52:15.503282 Creating /var/lib/lava/dispatcher/tmp/8649804/lava-overlay-iv407j6v/lava-8649804/bin/lava-install-packages
136 06:52:15.503421 Creating /var/lib/lava/dispatcher/tmp/8649804/lava-overlay-iv407j6v/lava-8649804/bin/lava-installed-packages
137 06:52:15.503532 Creating /var/lib/lava/dispatcher/tmp/8649804/lava-overlay-iv407j6v/lava-8649804/bin/lava-os-build
138 06:52:15.503647 Creating /var/lib/lava/dispatcher/tmp/8649804/lava-overlay-iv407j6v/lava-8649804/bin/lava-probe-channel
139 06:52:15.503759 Creating /var/lib/lava/dispatcher/tmp/8649804/lava-overlay-iv407j6v/lava-8649804/bin/lava-probe-ip
140 06:52:15.503870 Creating /var/lib/lava/dispatcher/tmp/8649804/lava-overlay-iv407j6v/lava-8649804/bin/lava-target-ip
141 06:52:15.503980 Creating /var/lib/lava/dispatcher/tmp/8649804/lava-overlay-iv407j6v/lava-8649804/bin/lava-target-mac
142 06:52:15.504088 Creating /var/lib/lava/dispatcher/tmp/8649804/lava-overlay-iv407j6v/lava-8649804/bin/lava-target-storage
143 06:52:15.504203 Creating /var/lib/lava/dispatcher/tmp/8649804/lava-overlay-iv407j6v/lava-8649804/bin/lava-test-case
144 06:52:15.504315 Creating /var/lib/lava/dispatcher/tmp/8649804/lava-overlay-iv407j6v/lava-8649804/bin/lava-test-event
145 06:52:15.504425 Creating /var/lib/lava/dispatcher/tmp/8649804/lava-overlay-iv407j6v/lava-8649804/bin/lava-test-feedback
146 06:52:15.504536 Creating /var/lib/lava/dispatcher/tmp/8649804/lava-overlay-iv407j6v/lava-8649804/bin/lava-test-raise
147 06:52:15.504646 Creating /var/lib/lava/dispatcher/tmp/8649804/lava-overlay-iv407j6v/lava-8649804/bin/lava-test-reference
148 06:52:15.504757 Creating /var/lib/lava/dispatcher/tmp/8649804/lava-overlay-iv407j6v/lava-8649804/bin/lava-test-runner
149 06:52:15.504880 Creating /var/lib/lava/dispatcher/tmp/8649804/lava-overlay-iv407j6v/lava-8649804/bin/lava-test-set
150 06:52:15.504988 Creating /var/lib/lava/dispatcher/tmp/8649804/lava-overlay-iv407j6v/lava-8649804/bin/lava-test-shell
151 06:52:15.505098 Updating /var/lib/lava/dispatcher/tmp/8649804/lava-overlay-iv407j6v/lava-8649804/bin/lava-install-packages (oe)
152 06:52:15.505211 Updating /var/lib/lava/dispatcher/tmp/8649804/lava-overlay-iv407j6v/lava-8649804/bin/lava-installed-packages (oe)
153 06:52:15.505306 Creating /var/lib/lava/dispatcher/tmp/8649804/lava-overlay-iv407j6v/lava-8649804/environment
154 06:52:15.505446 LAVA metadata
155 06:52:15.505513 - LAVA_JOB_ID=8649804
156 06:52:15.505577 - LAVA_DISPATCHER_IP=192.168.201.1
157 06:52:15.505676 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
158 06:52:15.505742 skipped lava-vland-overlay
159 06:52:15.505819 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 06:52:15.505900 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
161 06:52:15.505963 skipped lava-multinode-overlay
162 06:52:15.506036 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 06:52:15.506117 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
164 06:52:15.506188 Loading test definitions
165 06:52:15.506278 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
166 06:52:15.506353 Using /lava-8649804 at stage 0
167 06:52:15.506608 uuid=8649804_1.5.2.3.1 testdef=None
168 06:52:15.506698 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 06:52:15.506786 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
170 06:52:15.507252 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 06:52:15.507501 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
173 06:52:15.508104 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 06:52:15.508389 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
176 06:52:15.508940 runner path: /var/lib/lava/dispatcher/tmp/8649804/lava-overlay-iv407j6v/lava-8649804/0/tests/0_dmesg test_uuid 8649804_1.5.2.3.1
177 06:52:15.509090 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 06:52:15.509656 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
180 06:52:15.509738 Using /lava-8649804 at stage 1
181 06:52:15.509979 uuid=8649804_1.5.2.3.5 testdef=None
182 06:52:15.510070 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 06:52:15.510160 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
184 06:52:15.510606 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 06:52:15.510835 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
187 06:52:15.511409 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 06:52:15.511650 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
190 06:52:15.512199 runner path: /var/lib/lava/dispatcher/tmp/8649804/lava-overlay-iv407j6v/lava-8649804/1/tests/1_bootrr test_uuid 8649804_1.5.2.3.5
191 06:52:15.512344 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 06:52:15.512558 Creating lava-test-runner.conf files
194 06:52:15.512624 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8649804/lava-overlay-iv407j6v/lava-8649804/0 for stage 0
195 06:52:15.512706 - 0_dmesg
196 06:52:15.512781 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8649804/lava-overlay-iv407j6v/lava-8649804/1 for stage 1
197 06:52:15.512864 - 1_bootrr
198 06:52:15.512956 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 06:52:15.513043 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
200 06:52:15.518601 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 06:52:15.518707 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
202 06:52:15.518797 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 06:52:15.518887 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 06:52:15.518975 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
205 06:52:15.621718 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 06:52:15.622071 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
207 06:52:15.622183 extracting modules file /var/lib/lava/dispatcher/tmp/8649804/tftp-deploy-7s16y1xq/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8649804/extract-nfsrootfs-7bsnr_c5
208 06:52:15.626246 extracting modules file /var/lib/lava/dispatcher/tmp/8649804/tftp-deploy-7s16y1xq/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8649804/extract-overlay-ramdisk-t10dljo9/ramdisk
209 06:52:15.630036 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 06:52:15.630151 start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
211 06:52:15.630235 [common] Applying overlay to NFS
212 06:52:15.630307 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8649804/compress-overlay-fdzhqc3s/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8649804/extract-nfsrootfs-7bsnr_c5
213 06:52:15.634106 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 06:52:15.634214 start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
215 06:52:15.634307 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 06:52:15.634398 start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
217 06:52:15.634478 Building ramdisk /var/lib/lava/dispatcher/tmp/8649804/extract-overlay-ramdisk-t10dljo9/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8649804/extract-overlay-ramdisk-t10dljo9/ramdisk
218 06:52:15.668051 >> 24546 blocks
219 06:52:16.144626 rename /var/lib/lava/dispatcher/tmp/8649804/extract-overlay-ramdisk-t10dljo9/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8649804/tftp-deploy-7s16y1xq/ramdisk/ramdisk.cpio.gz
220 06:52:16.145043 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
221 06:52:16.145164 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
222 06:52:16.145271 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
223 06:52:16.145412 No mkimage arch provided, not using FIT.
224 06:52:16.145507 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 06:52:16.145594 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 06:52:16.145694 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 06:52:16.145791 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
228 06:52:16.145872 No LXC device requested
229 06:52:16.145957 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 06:52:16.146048 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
231 06:52:16.146132 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 06:52:16.146202 Checking files for TFTP limit of 4294967296 bytes.
233 06:52:16.146588 end: 1 tftp-deploy (duration 00:00:10) [common]
234 06:52:16.146698 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 06:52:16.146804 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 06:52:16.146931 substitutions:
237 06:52:16.147000 - {DTB}: None
238 06:52:16.147067 - {INITRD}: 8649804/tftp-deploy-7s16y1xq/ramdisk/ramdisk.cpio.gz
239 06:52:16.147130 - {KERNEL}: 8649804/tftp-deploy-7s16y1xq/kernel/bzImage
240 06:52:16.147191 - {LAVA_MAC}: None
241 06:52:16.147251 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8649804/extract-nfsrootfs-7bsnr_c5
242 06:52:16.147313 - {NFS_SERVER_IP}: 192.168.201.1
243 06:52:16.147370 - {PRESEED_CONFIG}: None
244 06:52:16.147428 - {PRESEED_LOCAL}: None
245 06:52:16.147485 - {RAMDISK}: 8649804/tftp-deploy-7s16y1xq/ramdisk/ramdisk.cpio.gz
246 06:52:16.147543 - {ROOT_PART}: None
247 06:52:16.147600 - {ROOT}: None
248 06:52:16.147657 - {SERVER_IP}: 192.168.201.1
249 06:52:16.147713 - {TEE}: None
250 06:52:16.147770 Parsed boot commands:
251 06:52:16.147826 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 06:52:16.147980 Parsed boot commands: tftpboot 192.168.201.1 8649804/tftp-deploy-7s16y1xq/kernel/bzImage 8649804/tftp-deploy-7s16y1xq/kernel/cmdline 8649804/tftp-deploy-7s16y1xq/ramdisk/ramdisk.cpio.gz
253 06:52:16.148074 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 06:52:16.148165 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 06:52:16.148264 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 06:52:16.148351 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 06:52:16.148425 Not connected, no need to disconnect.
258 06:52:16.148502 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 06:52:16.148588 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 06:52:16.148657 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-8'
261 06:52:16.151436 Setting prompt string to ['lava-test: # ']
262 06:52:16.151713 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 06:52:16.151823 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 06:52:16.151923 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 06:52:16.152019 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 06:52:16.152200 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-8' '--port=1' '--command=reboot'
267 06:52:16.170973 >> Command sent successfully.
268 06:52:16.172906 Returned 0 in 0 seconds
269 06:52:16.273964 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
271 06:52:16.275294 end: 2.2.2 reset-device (duration 00:00:00) [common]
272 06:52:16.275812 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
273 06:52:16.276230 Setting prompt string to 'Starting depthcharge on Voema...'
274 06:52:16.276543 Changing prompt to 'Starting depthcharge on Voema...'
275 06:52:16.276870 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
276 06:52:16.278113 [Enter `^Ec?' for help]
277 06:52:24.476503
278 06:52:24.477128
279 06:52:24.486775 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
280 06:52:24.489591 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
281 06:52:24.496393 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
282 06:52:24.499639 CPU: AES supported, TXT NOT supported, VT supported
283 06:52:24.506473 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
284 06:52:24.512982 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
285 06:52:24.516473 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
286 06:52:24.519811 VBOOT: Loading verstage.
287 06:52:24.522834 FMAP: Found "FLASH" version 1.1 at 0x1804000.
288 06:52:24.526315
289 06:52:24.529632 FMAP: base = 0x0 size = 0x2000000 #areas = 32
290 06:52:24.533144 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
291 06:52:24.543379 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
292 06:52:24.550020 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
293 06:52:24.550488
294 06:52:24.550864
295 06:52:24.563184 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
296 06:52:24.577428 Probing TPM: . done!
297 06:52:24.580719 TPM ready after 0 ms
298 06:52:24.584142 Connected to device vid:did:rid of 1ae0:0028:00
299 06:52:24.595164 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
300 06:52:24.601599 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
301 06:52:24.605292 Initialized TPM device CR50 revision 0
302 06:52:24.656881 tlcl_send_startup: Startup return code is 0
303 06:52:24.657493 TPM: setup succeeded
304 06:52:24.673111 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
305 06:52:24.686218 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
306 06:52:24.700057 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
307 06:52:24.709207 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
308 06:52:24.713451 Chrome EC: UHEPI supported
309 06:52:24.715871 Phase 1
310 06:52:24.719099 FMAP: area GBB found @ 1805000 (458752 bytes)
311 06:52:24.729171 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
312 06:52:24.735864 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
313 06:52:24.742037 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
314 06:52:24.748750 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
315 06:52:24.752315 Recovery requested (1009000e)
316 06:52:24.755545 TPM: Extending digest for VBOOT: boot mode into PCR 0
317 06:52:24.767151 tlcl_extend: response is 0
318 06:52:24.774101 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
319 06:52:24.784237 tlcl_extend: response is 0
320 06:52:24.790308 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
321 06:52:24.796782 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
322 06:52:24.803798 BS: verstage times (exec / console): total (unknown) / 142 ms
323 06:52:24.804297
324 06:52:24.804679
325 06:52:24.817771 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
326 06:52:24.823454 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
327 06:52:24.826759 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
328 06:52:24.829941 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
329 06:52:24.836452 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
330 06:52:24.840452 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
331 06:52:24.843565 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
332 06:52:24.846937 TCO_STS: 0000 0000
333 06:52:24.849836 GEN_PMCON: d0015038 00002200
334 06:52:24.853420 GBLRST_CAUSE: 00000000 00000000
335 06:52:24.853902 HPR_CAUSE0: 00000000
336 06:52:24.856848
337 06:52:24.857465 prev_sleep_state 5
338 06:52:24.860549 Boot Count incremented to 13990
339 06:52:24.866475 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
340 06:52:24.873262 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
341 06:52:24.883500 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
342 06:52:24.889498 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
343 06:52:24.893076 Chrome EC: UHEPI supported
344 06:52:24.899346 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
345 06:52:24.910520 Probing TPM: done!
346 06:52:24.918106 Connected to device vid:did:rid of 1ae0:0028:00
347 06:52:24.928346 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
348 06:52:24.935482 Initialized TPM device CR50 revision 0
349 06:52:24.945650 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
350 06:52:24.952103 MRC: Hash idx 0x100b comparison successful.
351 06:52:24.955544 MRC cache found, size faa8
352 06:52:24.955982 bootmode is set to: 2
353 06:52:24.959021 SPD index = 0
354 06:52:24.965310 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
355 06:52:24.968563 SPD: module type is LPDDR4X
356 06:52:24.972016 SPD: module part number is MT53E512M64D4NW-046
357 06:52:24.975511
358 06:52:24.978552 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
359 06:52:24.985292 SPD: device width 16 bits, bus width 16 bits
360 06:52:24.988338 SPD: module size is 1024 MB (per channel)
361 06:52:25.423559 CBMEM:
362 06:52:25.426879 IMD: root @ 0x76fff000 254 entries.
363 06:52:25.430043 IMD: root @ 0x76ffec00 62 entries.
364 06:52:25.433858 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
365 06:52:25.440126 FMAP: area RW_VPD found @ f35000 (8192 bytes)
366 06:52:25.442986 External stage cache:
367 06:52:25.446353 IMD: root @ 0x7b3ff000 254 entries.
368 06:52:25.449858 IMD: root @ 0x7b3fec00 62 entries.
369 06:52:25.465008 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
370 06:52:25.472075 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
371 06:52:25.478333 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
372 06:52:25.492383 MRC: 'RECOVERY_MRC_CACHE' does not need update.
373 06:52:25.496080 cse_lite: Skip switching to RW in the recovery path
374 06:52:25.499782 8 DIMMs found
375 06:52:25.500315 SMM Memory Map
376 06:52:25.502647 SMRAM : 0x7b000000 0x800000
377 06:52:25.506351 Subregion 0: 0x7b000000 0x200000
378 06:52:25.509575 Subregion 1: 0x7b200000 0x200000
379 06:52:25.512804 Subregion 2: 0x7b400000 0x400000
380 06:52:25.516174 top_of_ram = 0x77000000
381 06:52:25.523001 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
382 06:52:25.526753 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
383 06:52:25.533058 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
384 06:52:25.539316 MTRR Range: Start=ff000000 End=0 (Size 1000000)
385 06:52:25.545965 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
386 06:52:25.552316 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
387 06:52:25.562550 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
388 06:52:25.566254 Processing 211 relocs. Offset value of 0x74c0b000
389 06:52:25.575799 BS: romstage times (exec / console): total (unknown) / 277 ms
390 06:52:25.581409
391 06:52:25.582014
392 06:52:25.591452 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
393 06:52:25.594391 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
394 06:52:25.604567 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
395 06:52:25.611427 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
396 06:52:25.617997 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
397 06:52:25.624401 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
398 06:52:25.671623 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
399 06:52:25.678254 Processing 5008 relocs. Offset value of 0x75d98000
400 06:52:25.681571 BS: postcar times (exec / console): total (unknown) / 59 ms
401 06:52:25.685216
402 06:52:25.685853
403 06:52:25.695284 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
404 06:52:25.695903 Normal boot
405 06:52:25.698443 FW_CONFIG value is 0x804c02
406 06:52:25.702192 PCI: 00:07.0 disabled by fw_config
407 06:52:25.705399 PCI: 00:07.1 disabled by fw_config
408 06:52:25.708601 PCI: 00:0d.2 disabled by fw_config
409 06:52:25.711820 PCI: 00:1c.7 disabled by fw_config
410 06:52:25.718297 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
411 06:52:25.725211 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
412 06:52:25.728388 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
413 06:52:25.731921 GENERIC: 0.0 disabled by fw_config
414 06:52:25.734878 GENERIC: 1.0 disabled by fw_config
415 06:52:25.741394 fw_config match found: DB_USB=USB3_ACTIVE
416 06:52:25.744556 fw_config match found: DB_USB=USB3_ACTIVE
417 06:52:25.748072 fw_config match found: DB_USB=USB3_ACTIVE
418 06:52:25.754411 fw_config match found: DB_USB=USB3_ACTIVE
419 06:52:25.757990 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
420 06:52:25.764679 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
421 06:52:25.774198 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
422 06:52:25.781384 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
423 06:52:25.784524 microcode: sig=0x806c1 pf=0x80 revision=0x86
424 06:52:25.791351 microcode: Update skipped, already up-to-date
425 06:52:25.797631 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
426 06:52:25.825103 Detected 4 core, 8 thread CPU.
427 06:52:25.828066 Setting up SMI for CPU
428 06:52:25.831567 IED base = 0x7b400000
429 06:52:25.832014 IED size = 0x00400000
430 06:52:25.834673
431 06:52:25.835231 Will perform SMM setup.
432 06:52:25.841611 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
433 06:52:25.848230 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
434 06:52:25.854840 Processing 16 relocs. Offset value of 0x00030000
435 06:52:25.858420 Attempting to start 7 APs
436 06:52:25.861435 Waiting for 10ms after sending INIT.
437 06:52:25.877009 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
438 06:52:25.877637 done.
439 06:52:25.880142 AP: slot 7 apic_id 7.
440 06:52:25.883367 AP: slot 3 apic_id 6.
441 06:52:25.883813 AP: slot 6 apic_id 2.
442 06:52:25.886838 AP: slot 2 apic_id 3.
443 06:52:25.890395 AP: slot 5 apic_id 4.
444 06:52:25.890834 AP: slot 4 apic_id 5.
445 06:52:25.893238
446 06:52:25.896920 Waiting for 2nd SIPI to complete...done.
447 06:52:25.903427 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
448 06:52:25.910787 Processing 13 relocs. Offset value of 0x00038000
449 06:52:25.913318 Unable to locate Global NVS
450 06:52:25.920768 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
451 06:52:25.924185 Installing permanent SMM handler to 0x7b000000
452 06:52:25.933383 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
453 06:52:25.936433 Processing 794 relocs. Offset value of 0x7b010000
454 06:52:25.946074 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
455 06:52:25.949572 Processing 13 relocs. Offset value of 0x7b008000
456 06:52:25.955916 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
457 06:52:25.962646 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
458 06:52:25.965871 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
459 06:52:25.969156
460 06:52:25.972677 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
461 06:52:25.978952 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
462 06:52:25.985608 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
463 06:52:25.992379 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
464 06:52:25.995636 Unable to locate Global NVS
465 06:52:26.002007 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
466 06:52:26.005960 Clearing SMI status registers
467 06:52:26.009178 SMI_STS: PM1
468 06:52:26.009264 PM1_STS: PWRBTN
469 06:52:26.015545 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
470 06:52:26.018497 In relocation handler: CPU 0
471 06:52:26.021853 New SMBASE=0x7b000000 IEDBASE=0x7b400000
472 06:52:26.028274 Writing SMRR. base = 0x7b000006, mask=0xff800c00
473 06:52:26.032080 Relocation complete.
474 06:52:26.038799 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
475 06:52:26.041785 In relocation handler: CPU 1
476 06:52:26.045515 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
477 06:52:26.048457 Relocation complete.
478 06:52:26.054961 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
479 06:52:26.057995 In relocation handler: CPU 5
480 06:52:26.061899 New SMBASE=0x7affec00 IEDBASE=0x7b400000
481 06:52:26.064971 Writing SMRR. base = 0x7b000006, mask=0xff800c00
482 06:52:26.068257 Relocation complete.
483 06:52:26.074690 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
484 06:52:26.077863 In relocation handler: CPU 4
485 06:52:26.081197 New SMBASE=0x7afff000 IEDBASE=0x7b400000
486 06:52:26.084568 Relocation complete.
487 06:52:26.091084 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
488 06:52:26.094589 In relocation handler: CPU 6
489 06:52:26.097940 New SMBASE=0x7affe800 IEDBASE=0x7b400000
490 06:52:26.104919 Writing SMRR. base = 0x7b000006, mask=0xff800c00
491 06:52:26.104999 Relocation complete.
492 06:52:26.107716
493 06:52:26.114300 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
494 06:52:26.118042 In relocation handler: CPU 2
495 06:52:26.120803 New SMBASE=0x7afff800 IEDBASE=0x7b400000
496 06:52:26.120885 Relocation complete.
497 06:52:26.124163
498 06:52:26.130820 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
499 06:52:26.134007 In relocation handler: CPU 3
500 06:52:26.137104 New SMBASE=0x7afff400 IEDBASE=0x7b400000
501 06:52:26.140776 Writing SMRR. base = 0x7b000006, mask=0xff800c00
502 06:52:26.143882 Relocation complete.
503 06:52:26.150309 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
504 06:52:26.153607 In relocation handler: CPU 7
505 06:52:26.157004 New SMBASE=0x7affe400 IEDBASE=0x7b400000
506 06:52:26.160996 Relocation complete.
507 06:52:26.161079 Initializing CPU #0
508 06:52:26.164836 CPU: vendor Intel device 806c1
509 06:52:26.168449 CPU: family 06, model 8c, stepping 01
510 06:52:26.171980 Clearing out pending MCEs
511 06:52:26.174713 Setting up local APIC...
512 06:52:26.178337 apic_id: 0x00 done.
513 06:52:26.181575 Turbo is available but hidden
514 06:52:26.184759 Turbo is available and visible
515 06:52:26.188279 microcode: Update skipped, already up-to-date
516 06:52:26.191252 CPU #0 initialized
517 06:52:26.191327 Initializing CPU #2
518 06:52:26.194400 Initializing CPU #6
519 06:52:26.197931 CPU: vendor Intel device 806c1
520 06:52:26.201240 CPU: family 06, model 8c, stepping 01
521 06:52:26.205105 CPU: vendor Intel device 806c1
522 06:52:26.208271 CPU: family 06, model 8c, stepping 01
523 06:52:26.211894 Clearing out pending MCEs
524 06:52:26.214864 Clearing out pending MCEs
525 06:52:26.215308 Setting up local APIC...
526 06:52:26.218510 Initializing CPU #4
527 06:52:26.221723 Initializing CPU #5
528 06:52:26.225008 CPU: vendor Intel device 806c1
529 06:52:26.227792 CPU: family 06, model 8c, stepping 01
530 06:52:26.231021 CPU: vendor Intel device 806c1
531 06:52:26.234356 CPU: family 06, model 8c, stepping 01
532 06:52:26.237742 Clearing out pending MCEs
533 06:52:26.237831 Clearing out pending MCEs
534 06:52:26.240713 Setting up local APIC...
535 06:52:26.244234 Initializing CPU #7
536 06:52:26.244370 Initializing CPU #3
537 06:52:26.247327 Initializing CPU #1
538 06:52:26.251336 CPU: vendor Intel device 806c1
539 06:52:26.254305 CPU: family 06, model 8c, stepping 01
540 06:52:26.257855 CPU: vendor Intel device 806c1
541 06:52:26.260514 CPU: family 06, model 8c, stepping 01
542 06:52:26.263839 Clearing out pending MCEs
543 06:52:26.267073 Clearing out pending MCEs
544 06:52:26.270425 Setting up local APIC...
545 06:52:26.270509 Setting up local APIC...
546 06:52:26.273750 Setting up local APIC...
547 06:52:26.277535 apic_id: 0x03 done.
548 06:52:26.280422 Setting up local APIC...
549 06:52:26.283724 CPU: vendor Intel device 806c1
550 06:52:26.287767 CPU: family 06, model 8c, stepping 01
551 06:52:26.287846 apic_id: 0x05 done.
552 06:52:26.290342 apic_id: 0x04 done.
553 06:52:26.293723 microcode: Update skipped, already up-to-date
554 06:52:26.300388 microcode: Update skipped, already up-to-date
555 06:52:26.300468 CPU #4 initialized
556 06:52:26.303676 apic_id: 0x07 done.
557 06:52:26.307353 apic_id: 0x06 done.
558 06:52:26.310504 microcode: Update skipped, already up-to-date
559 06:52:26.313327 Clearing out pending MCEs
560 06:52:26.316767 microcode: Update skipped, already up-to-date
561 06:52:26.320332 CPU #7 initialized
562 06:52:26.320408 CPU #3 initialized
563 06:52:26.326535 microcode: Update skipped, already up-to-date
564 06:52:26.326622 apic_id: 0x02 done.
565 06:52:26.330533 CPU #2 initialized
566 06:52:26.333311 microcode: Update skipped, already up-to-date
567 06:52:26.336514 CPU #5 initialized
568 06:52:26.340505 CPU #6 initialized
569 06:52:26.340597 Setting up local APIC...
570 06:52:26.343339 apic_id: 0x01 done.
571 06:52:26.346730 microcode: Update skipped, already up-to-date
572 06:52:26.349946 CPU #1 initialized
573 06:52:26.353346 bsp_do_flight_plan done after 455 msecs.
574 06:52:26.356597 CPU: frequency set to 4000 MHz
575 06:52:26.359984 Enabling SMIs.
576 06:52:26.367778 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
577 06:52:26.382303 SATAXPCIE1 indicates PCIe NVMe is present
578 06:52:26.385780 Probing TPM: done!
579 06:52:26.388394 Connected to device vid:did:rid of 1ae0:0028:00
580 06:52:26.398915 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
581 06:52:26.402460 Initialized TPM device CR50 revision 0
582 06:52:26.405719 Enabling S0i3.4
583 06:52:26.412246 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
584 06:52:26.416267 Found a VBT of 8704 bytes after decompression
585 06:52:26.422051 cse_lite: CSE RO boot. HybridStorageMode disabled
586 06:52:26.428649 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
587 06:52:26.503879 FSPS returned 0
588 06:52:26.507102 Executing Phase 1 of FspMultiPhaseSiInit
589 06:52:26.517070 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
590 06:52:26.520404 port C0 DISC req: usage 1 usb3 1 usb2 5
591 06:52:26.523521 Raw Buffer output 0 00000511
592 06:52:26.526891 Raw Buffer output 1 00000000
593 06:52:26.530950 pmc_send_ipc_cmd succeeded
594 06:52:26.534504 port C1 DISC req: usage 1 usb3 2 usb2 3
595 06:52:26.538019
596 06:52:26.538100 Raw Buffer output 0 00000321
597 06:52:26.540670 Raw Buffer output 1 00000000
598 06:52:26.545216 pmc_send_ipc_cmd succeeded
599 06:52:26.550764 Detected 4 core, 8 thread CPU.
600 06:52:26.553470 Detected 4 core, 8 thread CPU.
601 06:52:26.788126 Display FSP Version Info HOB
602 06:52:26.791417 Reference Code - CPU = a.0.4c.31
603 06:52:26.794557 uCode Version = 0.0.0.86
604 06:52:26.798037 TXT ACM version = ff.ff.ff.ffff
605 06:52:26.801177 Reference Code - ME = a.0.4c.31
606 06:52:26.804931 MEBx version = 0.0.0.0
607 06:52:26.807703 ME Firmware Version = Consumer SKU
608 06:52:26.810879 Reference Code - PCH = a.0.4c.31
609 06:52:26.814214 PCH-CRID Status = Disabled
610 06:52:26.818163 PCH-CRID Original Value = ff.ff.ff.ffff
611 06:52:26.821066 PCH-CRID New Value = ff.ff.ff.ffff
612 06:52:26.824248 OPROM - RST - RAID = ff.ff.ff.ffff
613 06:52:26.827669 PCH Hsio Version = 4.0.0.0
614 06:52:26.830923 Reference Code - SA - System Agent = a.0.4c.31
615 06:52:26.835172 Reference Code - MRC = 2.0.0.1
616 06:52:26.837976 SA - PCIe Version = a.0.4c.31
617 06:52:26.840792 SA-CRID Status = Disabled
618 06:52:26.844553 SA-CRID Original Value = 0.0.0.1
619 06:52:26.847554 SA-CRID New Value = 0.0.0.1
620 06:52:26.851018 OPROM - VBIOS = ff.ff.ff.ffff
621 06:52:26.854119 IO Manageability Engine FW Version = 11.1.4.0
622 06:52:26.857249 PHY Build Version = 0.0.0.e0
623 06:52:26.860571 Thunderbolt(TM) FW Version = 0.0.0.0
624 06:52:26.867573 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
625 06:52:26.870605 ITSS IRQ Polarities Before:
626 06:52:26.870687 IPC0: 0xffffffff
627 06:52:26.873723 IPC1: 0xffffffff
628 06:52:26.873817 IPC2: 0xffffffff
629 06:52:26.877445 IPC3: 0xffffffff
630 06:52:26.880762 ITSS IRQ Polarities After:
631 06:52:26.880875 IPC0: 0xffffffff
632 06:52:26.883560 IPC1: 0xffffffff
633 06:52:26.883637 IPC2: 0xffffffff
634 06:52:26.887258 IPC3: 0xffffffff
635 06:52:26.890603 Found PCIe Root Port #9 at PCI: 00:1d.0.
636 06:52:26.903832 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
637 06:52:26.913565 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
638 06:52:26.926537 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
639 06:52:26.933234 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
640 06:52:26.936616 Enumerating buses...
641 06:52:26.939922 Show all devs... Before device enumeration.
642 06:52:26.943796 Root Device: enabled 1
643 06:52:26.943884 DOMAIN: 0000: enabled 1
644 06:52:26.946955 CPU_CLUSTER: 0: enabled 1
645 06:52:26.950076 PCI: 00:00.0: enabled 1
646 06:52:26.953119 PCI: 00:02.0: enabled 1
647 06:52:26.953205 PCI: 00:04.0: enabled 1
648 06:52:26.956623 PCI: 00:05.0: enabled 1
649 06:52:26.960077 PCI: 00:06.0: enabled 0
650 06:52:26.962964 PCI: 00:07.0: enabled 0
651 06:52:26.963050 PCI: 00:07.1: enabled 0
652 06:52:26.966576 PCI: 00:07.2: enabled 0
653 06:52:26.969688 PCI: 00:07.3: enabled 0
654 06:52:26.973294 PCI: 00:08.0: enabled 1
655 06:52:26.973402 PCI: 00:09.0: enabled 0
656 06:52:26.976318 PCI: 00:0a.0: enabled 0
657 06:52:26.979668 PCI: 00:0d.0: enabled 1
658 06:52:26.983109 PCI: 00:0d.1: enabled 0
659 06:52:26.983196 PCI: 00:0d.2: enabled 0
660 06:52:26.986846 PCI: 00:0d.3: enabled 0
661 06:52:26.989962 PCI: 00:0e.0: enabled 0
662 06:52:26.990048 PCI: 00:10.2: enabled 1
663 06:52:26.993284
664 06:52:26.993390 PCI: 00:10.6: enabled 0
665 06:52:26.997009 PCI: 00:10.7: enabled 0
666 06:52:26.999679 PCI: 00:12.0: enabled 0
667 06:52:26.999765 PCI: 00:12.6: enabled 0
668 06:52:27.003416 PCI: 00:13.0: enabled 0
669 06:52:27.006230 PCI: 00:14.0: enabled 1
670 06:52:27.009661 PCI: 00:14.1: enabled 0
671 06:52:27.009747 PCI: 00:14.2: enabled 1
672 06:52:27.012958 PCI: 00:14.3: enabled 1
673 06:52:27.016853 PCI: 00:15.0: enabled 1
674 06:52:27.019984 PCI: 00:15.1: enabled 1
675 06:52:27.020069 PCI: 00:15.2: enabled 1
676 06:52:27.023062 PCI: 00:15.3: enabled 1
677 06:52:27.026260 PCI: 00:16.0: enabled 1
678 06:52:27.029647 PCI: 00:16.1: enabled 0
679 06:52:27.029734 PCI: 00:16.2: enabled 0
680 06:52:27.032951 PCI: 00:16.3: enabled 0
681 06:52:27.036702 PCI: 00:16.4: enabled 0
682 06:52:27.036788 PCI: 00:16.5: enabled 0
683 06:52:27.039509 PCI: 00:17.0: enabled 1
684 06:52:27.042985 PCI: 00:19.0: enabled 0
685 06:52:27.046280 PCI: 00:19.1: enabled 1
686 06:52:27.046367 PCI: 00:19.2: enabled 0
687 06:52:27.049519 PCI: 00:1c.0: enabled 1
688 06:52:27.052897 PCI: 00:1c.1: enabled 0
689 06:52:27.056293 PCI: 00:1c.2: enabled 0
690 06:52:27.056383 PCI: 00:1c.3: enabled 0
691 06:52:27.059946 PCI: 00:1c.4: enabled 0
692 06:52:27.062879 PCI: 00:1c.5: enabled 0
693 06:52:27.066292 PCI: 00:1c.6: enabled 1
694 06:52:27.066378 PCI: 00:1c.7: enabled 0
695 06:52:27.069663 PCI: 00:1d.0: enabled 1
696 06:52:27.072968 PCI: 00:1d.1: enabled 0
697 06:52:27.075973 PCI: 00:1d.2: enabled 1
698 06:52:27.076059 PCI: 00:1d.3: enabled 0
699 06:52:27.080084 PCI: 00:1e.0: enabled 1
700 06:52:27.082505 PCI: 00:1e.1: enabled 0
701 06:52:27.082592 PCI: 00:1e.2: enabled 1
702 06:52:27.086301
703 06:52:27.086388 PCI: 00:1e.3: enabled 1
704 06:52:27.090384 PCI: 00:1f.0: enabled 1
705 06:52:27.092990 PCI: 00:1f.1: enabled 0
706 06:52:27.093076 PCI: 00:1f.2: enabled 1
707 06:52:27.095864 PCI: 00:1f.3: enabled 1
708 06:52:27.099431 PCI: 00:1f.4: enabled 0
709 06:52:27.102728 PCI: 00:1f.5: enabled 1
710 06:52:27.102815 PCI: 00:1f.6: enabled 0
711 06:52:27.105645 PCI: 00:1f.7: enabled 0
712 06:52:27.109158 APIC: 00: enabled 1
713 06:52:27.109247 GENERIC: 0.0: enabled 1
714 06:52:27.113040
715 06:52:27.113134 GENERIC: 0.0: enabled 1
716 06:52:27.115674 GENERIC: 1.0: enabled 1
717 06:52:27.119193 GENERIC: 0.0: enabled 1
718 06:52:27.119273 GENERIC: 1.0: enabled 1
719 06:52:27.122609 USB0 port 0: enabled 1
720 06:52:27.125730 GENERIC: 0.0: enabled 1
721 06:52:27.129184 USB0 port 0: enabled 1
722 06:52:27.129258 GENERIC: 0.0: enabled 1
723 06:52:27.132532 I2C: 00:1a: enabled 1
724 06:52:27.135588 I2C: 00:31: enabled 1
725 06:52:27.135662 I2C: 00:32: enabled 1
726 06:52:27.139143 I2C: 00:10: enabled 1
727 06:52:27.142336 I2C: 00:15: enabled 1
728 06:52:27.142418 GENERIC: 0.0: enabled 0
729 06:52:27.145576 GENERIC: 1.0: enabled 0
730 06:52:27.149247 GENERIC: 0.0: enabled 1
731 06:52:27.149756 SPI: 00: enabled 1
732 06:52:27.152935
733 06:52:27.153480 SPI: 00: enabled 1
734 06:52:27.155818 PNP: 0c09.0: enabled 1
735 06:52:27.159852 GENERIC: 0.0: enabled 1
736 06:52:27.160289 USB3 port 0: enabled 1
737 06:52:27.162719 USB3 port 1: enabled 1
738 06:52:27.166193 USB3 port 2: enabled 0
739 06:52:27.166630 USB3 port 3: enabled 0
740 06:52:27.169307 USB2 port 0: enabled 0
741 06:52:27.172284 USB2 port 1: enabled 1
742 06:52:27.176182 USB2 port 2: enabled 1
743 06:52:27.176421 USB2 port 3: enabled 0
744 06:52:27.179012 USB2 port 4: enabled 1
745 06:52:27.182282 USB2 port 5: enabled 0
746 06:52:27.182473 USB2 port 6: enabled 0
747 06:52:27.185742 USB2 port 7: enabled 0
748 06:52:27.188439 USB2 port 8: enabled 0
749 06:52:27.188531 USB2 port 9: enabled 0
750 06:52:27.192447 USB3 port 0: enabled 0
751 06:52:27.195366 USB3 port 1: enabled 1
752 06:52:27.198984 USB3 port 2: enabled 0
753 06:52:27.199070 USB3 port 3: enabled 0
754 06:52:27.201889 GENERIC: 0.0: enabled 1
755 06:52:27.205509 GENERIC: 1.0: enabled 1
756 06:52:27.205594 APIC: 01: enabled 1
757 06:52:27.208507 APIC: 03: enabled 1
758 06:52:27.212003 APIC: 06: enabled 1
759 06:52:27.212089 APIC: 05: enabled 1
760 06:52:27.214830 APIC: 04: enabled 1
761 06:52:27.218271 APIC: 02: enabled 1
762 06:52:27.218358 APIC: 07: enabled 1
763 06:52:27.222024 Compare with tree...
764 06:52:27.222118 Root Device: enabled 1
765 06:52:27.225095
766 06:52:27.225182 DOMAIN: 0000: enabled 1
767 06:52:27.228348 PCI: 00:00.0: enabled 1
768 06:52:27.231863 PCI: 00:02.0: enabled 1
769 06:52:27.234723 PCI: 00:04.0: enabled 1
770 06:52:27.234804 GENERIC: 0.0: enabled 1
771 06:52:27.238377
772 06:52:27.238450 PCI: 00:05.0: enabled 1
773 06:52:27.241831 PCI: 00:06.0: enabled 0
774 06:52:27.245362 PCI: 00:07.0: enabled 0
775 06:52:27.248141 GENERIC: 0.0: enabled 1
776 06:52:27.251326 PCI: 00:07.1: enabled 0
777 06:52:27.251404 GENERIC: 1.0: enabled 1
778 06:52:27.254562 PCI: 00:07.2: enabled 0
779 06:52:27.258273 GENERIC: 0.0: enabled 1
780 06:52:27.261192 PCI: 00:07.3: enabled 0
781 06:52:27.264556 GENERIC: 1.0: enabled 1
782 06:52:27.264642 PCI: 00:08.0: enabled 1
783 06:52:27.268554 PCI: 00:09.0: enabled 0
784 06:52:27.271331 PCI: 00:0a.0: enabled 0
785 06:52:27.274553 PCI: 00:0d.0: enabled 1
786 06:52:27.278508 USB0 port 0: enabled 1
787 06:52:27.278594 USB3 port 0: enabled 1
788 06:52:27.281046 USB3 port 1: enabled 1
789 06:52:27.284209 USB3 port 2: enabled 0
790 06:52:27.288822 USB3 port 3: enabled 0
791 06:52:27.291139 PCI: 00:0d.1: enabled 0
792 06:52:27.291225 PCI: 00:0d.2: enabled 0
793 06:52:27.294694
794 06:52:27.294770 GENERIC: 0.0: enabled 1
795 06:52:27.297466 PCI: 00:0d.3: enabled 0
796 06:52:27.301190 PCI: 00:0e.0: enabled 0
797 06:52:27.304647 PCI: 00:10.2: enabled 1
798 06:52:27.307471 PCI: 00:10.6: enabled 0
799 06:52:27.307557 PCI: 00:10.7: enabled 0
800 06:52:27.311135 PCI: 00:12.0: enabled 0
801 06:52:27.314071 PCI: 00:12.6: enabled 0
802 06:52:27.317415 PCI: 00:13.0: enabled 0
803 06:52:27.321081 PCI: 00:14.0: enabled 1
804 06:52:27.321167 USB0 port 0: enabled 1
805 06:52:27.324248 USB2 port 0: enabled 0
806 06:52:27.327567 USB2 port 1: enabled 1
807 06:52:27.330601 USB2 port 2: enabled 1
808 06:52:27.334259 USB2 port 3: enabled 0
809 06:52:27.334344 USB2 port 4: enabled 1
810 06:52:27.337189 USB2 port 5: enabled 0
811 06:52:27.340717 USB2 port 6: enabled 0
812 06:52:27.343891 USB2 port 7: enabled 0
813 06:52:27.347667 USB2 port 8: enabled 0
814 06:52:27.350439 USB2 port 9: enabled 0
815 06:52:27.350525 USB3 port 0: enabled 0
816 06:52:27.354091 USB3 port 1: enabled 1
817 06:52:27.357304 USB3 port 2: enabled 0
818 06:52:27.360385 USB3 port 3: enabled 0
819 06:52:27.363979 PCI: 00:14.1: enabled 0
820 06:52:27.364067 PCI: 00:14.2: enabled 1
821 06:52:27.367289 PCI: 00:14.3: enabled 1
822 06:52:27.370795 GENERIC: 0.0: enabled 1
823 06:52:27.373599 PCI: 00:15.0: enabled 1
824 06:52:27.376914 I2C: 00:1a: enabled 1
825 06:52:27.377000 I2C: 00:31: enabled 1
826 06:52:27.380671 I2C: 00:32: enabled 1
827 06:52:27.383380 PCI: 00:15.1: enabled 1
828 06:52:27.387091 I2C: 00:10: enabled 1
829 06:52:27.390908 PCI: 00:15.2: enabled 1
830 06:52:27.390994 PCI: 00:15.3: enabled 1
831 06:52:27.393564 PCI: 00:16.0: enabled 1
832 06:52:27.396808 PCI: 00:16.1: enabled 0
833 06:52:27.400263 PCI: 00:16.2: enabled 0
834 06:52:27.404660 PCI: 00:16.3: enabled 0
835 06:52:27.404737 PCI: 00:16.4: enabled 0
836 06:52:27.407787 PCI: 00:16.5: enabled 0
837 06:52:27.410621 PCI: 00:17.0: enabled 1
838 06:52:27.414113 PCI: 00:19.0: enabled 0
839 06:52:27.414197 PCI: 00:19.1: enabled 1
840 06:52:27.417217 I2C: 00:15: enabled 1
841 06:52:27.420638 PCI: 00:19.2: enabled 0
842 06:52:27.423626 PCI: 00:1d.0: enabled 1
843 06:52:27.474118 GENERIC: 0.0: enabled 1
844 06:52:27.474241 PCI: 00:1e.0: enabled 1
845 06:52:27.474343 PCI: 00:1e.1: enabled 0
846 06:52:27.474408 PCI: 00:1e.2: enabled 1
847 06:52:27.474484 SPI: 00: enabled 1
848 06:52:27.474776 PCI: 00:1e.3: enabled 1
849 06:52:27.474851 SPI: 00: enabled 1
850 06:52:27.474911 PCI: 00:1f.0: enabled 1
851 06:52:27.475370 PNP: 0c09.0: enabled 1
852 06:52:27.475446 PCI: 00:1f.1: enabled 0
853 06:52:27.475840 PCI: 00:1f.2: enabled 1
854 06:52:27.475977 GENERIC: 0.0: enabled 1
855 06:52:27.476255 GENERIC: 0.0: enabled 1
856 06:52:27.476320 GENERIC: 1.0: enabled 1
857 06:52:27.476388 PCI: 00:1f.3: enabled 1
858 06:52:27.476446 PCI: 00:1f.4: enabled 0
859 06:52:27.476503 PCI: 00:1f.5: enabled 1
860 06:52:27.476757 PCI: 00:1f.6: enabled 0
861 06:52:27.476820 PCI: 00:1f.7: enabled 0
862 06:52:27.492489 CPU_CLUSTER: 0: enabled 1
863 06:52:27.492587 APIC: 00: enabled 1
864 06:52:27.492656 APIC: 01: enabled 1
865 06:52:27.493237 APIC: 03: enabled 1
866 06:52:27.493359 APIC: 06: enabled 1
867 06:52:27.493428 APIC: 05: enabled 1
868 06:52:27.495883 APIC: 04: enabled 1
869 06:52:27.495969 APIC: 02: enabled 1
870 06:52:27.496037 APIC: 07: enabled 1
871 06:52:27.499099 Root Device scanning...
872 06:52:27.502414 scan_static_bus for Root Device
873 06:52:27.502500 DOMAIN: 0000 enabled
874 06:52:27.505490 CPU_CLUSTER: 0 enabled
875 06:52:27.508903 DOMAIN: 0000 scanning...
876 06:52:27.512289 PCI: pci_scan_bus for bus 00
877 06:52:27.515972 PCI: 00:00.0 [8086/0000] ops
878 06:52:27.518758 PCI: 00:00.0 [8086/9a12] enabled
879 06:52:27.522230 PCI: 00:02.0 [8086/0000] bus ops
880 06:52:27.525200 PCI: 00:02.0 [8086/9a40] enabled
881 06:52:27.529224 PCI: 00:04.0 [8086/0000] bus ops
882 06:52:27.532183 PCI: 00:04.0 [8086/9a03] enabled
883 06:52:27.535162 PCI: 00:05.0 [8086/9a19] enabled
884 06:52:27.538778 PCI: 00:07.0 [0000/0000] hidden
885 06:52:27.542069 PCI: 00:08.0 [8086/9a11] enabled
886 06:52:27.545467 PCI: 00:0a.0 [8086/9a0d] disabled
887 06:52:27.548606 PCI: 00:0d.0 [8086/0000] bus ops
888 06:52:27.551756 PCI: 00:0d.0 [8086/9a13] enabled
889 06:52:27.555381 PCI: 00:14.0 [8086/0000] bus ops
890 06:52:27.558628 PCI: 00:14.0 [8086/a0ed] enabled
891 06:52:27.562138 PCI: 00:14.2 [8086/a0ef] enabled
892 06:52:27.564695 PCI: 00:14.3 [8086/0000] bus ops
893 06:52:27.568445 PCI: 00:14.3 [8086/a0f0] enabled
894 06:52:27.571634 PCI: 00:15.0 [8086/0000] bus ops
895 06:52:27.574982 PCI: 00:15.0 [8086/a0e8] enabled
896 06:52:27.578400 PCI: 00:15.1 [8086/0000] bus ops
897 06:52:27.581550 PCI: 00:15.1 [8086/a0e9] enabled
898 06:52:27.584847 PCI: 00:15.2 [8086/0000] bus ops
899 06:52:27.588185 PCI: 00:15.2 [8086/a0ea] enabled
900 06:52:27.591520 PCI: 00:15.3 [8086/0000] bus ops
901 06:52:27.594700 PCI: 00:15.3 [8086/a0eb] enabled
902 06:52:27.599058 PCI: 00:16.0 [8086/0000] ops
903 06:52:27.601448 PCI: 00:16.0 [8086/a0e0] enabled
904 06:52:27.604813 PCI: Static device PCI: 00:17.0 not found, disabling it.
905 06:52:27.607868 PCI: 00:19.0 [8086/0000] bus ops
906 06:52:27.611051 PCI: 00:19.0 [8086/a0c5] disabled
907 06:52:27.614463
908 06:52:27.614568 PCI: 00:19.1 [8086/0000] bus ops
909 06:52:27.617833
910 06:52:27.617921 PCI: 00:19.1 [8086/a0c6] enabled
911 06:52:27.621051
912 06:52:27.624238 PCI: 00:1d.0 [8086/0000] bus ops
913 06:52:27.627463 PCI: 00:1d.0 [8086/a0b0] enabled
914 06:52:27.627569 PCI: 00:1e.0 [8086/0000] ops
915 06:52:27.631382 PCI: 00:1e.0 [8086/a0a8] enabled
916 06:52:27.634532 PCI: 00:1e.2 [8086/0000] bus ops
917 06:52:27.637429 PCI: 00:1e.2 [8086/a0aa] enabled
918 06:52:27.640781 PCI: 00:1e.3 [8086/0000] bus ops
919 06:52:27.644147 PCI: 00:1e.3 [8086/a0ab] enabled
920 06:52:27.647317 PCI: 00:1f.0 [8086/0000] bus ops
921 06:52:27.650879 PCI: 00:1f.0 [8086/a087] enabled
922 06:52:27.654256
923 06:52:27.654351 RTC Init
924 06:52:27.657541 Set power on after power failure.
925 06:52:27.660843 Disabling Deep S3
926 06:52:27.660935 Disabling Deep S3
927 06:52:27.664397 Disabling Deep S4
928 06:52:27.664490 Disabling Deep S4
929 06:52:27.667316 Disabling Deep S5
930 06:52:27.667404 Disabling Deep S5
931 06:52:27.670476 PCI: 00:1f.2 [0000/0000] hidden
932 06:52:27.674001 PCI: 00:1f.3 [8086/0000] bus ops
933 06:52:27.677431 PCI: 00:1f.3 [8086/a0c8] enabled
934 06:52:27.680609 PCI: 00:1f.5 [8086/0000] bus ops
935 06:52:27.683723 PCI: 00:1f.5 [8086/a0a4] enabled
936 06:52:27.687174 PCI: Leftover static devices:
937 06:52:27.690388 PCI: 00:10.2
938 06:52:27.690470 PCI: 00:10.6
939 06:52:27.693610 PCI: 00:10.7
940 06:52:27.693688 PCI: 00:06.0
941 06:52:27.693771 PCI: 00:07.1
942 06:52:27.696948 PCI: 00:07.2
943 06:52:27.697026 PCI: 00:07.3
944 06:52:27.700921 PCI: 00:09.0
945 06:52:27.701001 PCI: 00:0d.1
946 06:52:27.701086 PCI: 00:0d.2
947 06:52:27.703853
948 06:52:27.703933 PCI: 00:0d.3
949 06:52:27.704014 PCI: 00:0e.0
950 06:52:27.706560 PCI: 00:12.0
951 06:52:27.706652 PCI: 00:12.6
952 06:52:27.710441 PCI: 00:13.0
953 06:52:27.710518 PCI: 00:14.1
954 06:52:27.710599 PCI: 00:16.1
955 06:52:27.713946 PCI: 00:16.2
956 06:52:27.714026 PCI: 00:16.3
957 06:52:27.716810 PCI: 00:16.4
958 06:52:27.716886 PCI: 00:16.5
959 06:52:27.716966 PCI: 00:17.0
960 06:52:27.720113
961 06:52:27.720209 PCI: 00:19.2
962 06:52:27.720295 PCI: 00:1e.1
963 06:52:27.723533 PCI: 00:1f.1
964 06:52:27.723611 PCI: 00:1f.4
965 06:52:27.726656 PCI: 00:1f.6
966 06:52:27.726731 PCI: 00:1f.7
967 06:52:27.730130 PCI: Check your devicetree.cb.
968 06:52:27.733287 PCI: 00:02.0 scanning...
969 06:52:27.736725 scan_generic_bus for PCI: 00:02.0
970 06:52:27.740134 scan_generic_bus for PCI: 00:02.0 done
971 06:52:27.743300 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
972 06:52:27.746396 PCI: 00:04.0 scanning...
973 06:52:27.749803 scan_generic_bus for PCI: 00:04.0
974 06:52:27.753149 GENERIC: 0.0 enabled
975 06:52:27.759558 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
976 06:52:27.763095 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
977 06:52:27.766695 PCI: 00:0d.0 scanning...
978 06:52:27.769654 scan_static_bus for PCI: 00:0d.0
979 06:52:27.772826 USB0 port 0 enabled
980 06:52:27.772913 USB0 port 0 scanning...
981 06:52:27.776389 scan_static_bus for USB0 port 0
982 06:52:27.779858 USB3 port 0 enabled
983 06:52:27.782947 USB3 port 1 enabled
984 06:52:27.783033 USB3 port 2 disabled
985 06:52:27.786292 USB3 port 3 disabled
986 06:52:27.789402 USB3 port 0 scanning...
987 06:52:27.792959 scan_static_bus for USB3 port 0
988 06:52:27.796451 scan_static_bus for USB3 port 0 done
989 06:52:27.800154 scan_bus: bus USB3 port 0 finished in 6 msecs
990 06:52:27.802354 USB3 port 1 scanning...
991 06:52:27.805777 scan_static_bus for USB3 port 1
992 06:52:27.809099 scan_static_bus for USB3 port 1 done
993 06:52:27.815653 scan_bus: bus USB3 port 1 finished in 6 msecs
994 06:52:27.818901 scan_static_bus for USB0 port 0 done
995 06:52:27.822661 scan_bus: bus USB0 port 0 finished in 43 msecs
996 06:52:27.825577 scan_static_bus for PCI: 00:0d.0 done
997 06:52:27.832936 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
998 06:52:27.835607 PCI: 00:14.0 scanning...
999 06:52:27.838653 scan_static_bus for PCI: 00:14.0
1000 06:52:27.838739 USB0 port 0 enabled
1001 06:52:27.841996 USB0 port 0 scanning...
1002 06:52:27.845410 scan_static_bus for USB0 port 0
1003 06:52:27.849293 USB2 port 0 disabled
1004 06:52:27.849403 USB2 port 1 enabled
1005 06:52:27.852086 USB2 port 2 enabled
1006 06:52:27.855444 USB2 port 3 disabled
1007 06:52:27.855530 USB2 port 4 enabled
1008 06:52:27.859486 USB2 port 5 disabled
1009 06:52:27.859571 USB2 port 6 disabled
1010 06:52:27.861905
1011 06:52:27.861992 USB2 port 7 disabled
1012 06:52:27.865658 USB2 port 8 disabled
1013 06:52:27.865742 USB2 port 9 disabled
1014 06:52:27.868451 USB3 port 0 disabled
1015 06:52:27.872120 USB3 port 1 enabled
1016 06:52:27.872206 USB3 port 2 disabled
1017 06:52:27.875844 USB3 port 3 disabled
1018 06:52:27.878431 USB2 port 1 scanning...
1019 06:52:27.881879 scan_static_bus for USB2 port 1
1020 06:52:27.886053 scan_static_bus for USB2 port 1 done
1021 06:52:27.888558 scan_bus: bus USB2 port 1 finished in 6 msecs
1022 06:52:27.891745 USB2 port 2 scanning...
1023 06:52:27.895080 scan_static_bus for USB2 port 2
1024 06:52:27.898350 scan_static_bus for USB2 port 2 done
1025 06:52:27.905078 scan_bus: bus USB2 port 2 finished in 6 msecs
1026 06:52:27.905192 USB2 port 4 scanning...
1027 06:52:27.908823 scan_static_bus for USB2 port 4
1028 06:52:27.914872 scan_static_bus for USB2 port 4 done
1029 06:52:27.918010 scan_bus: bus USB2 port 4 finished in 6 msecs
1030 06:52:27.921529 USB3 port 1 scanning...
1031 06:52:27.924575 scan_static_bus for USB3 port 1
1032 06:52:27.928140 scan_static_bus for USB3 port 1 done
1033 06:52:27.931554 scan_bus: bus USB3 port 1 finished in 6 msecs
1034 06:52:27.934706 scan_static_bus for USB0 port 0 done
1035 06:52:27.941808 scan_bus: bus USB0 port 0 finished in 93 msecs
1036 06:52:27.944814 scan_static_bus for PCI: 00:14.0 done
1037 06:52:27.948623 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1038 06:52:27.951668 PCI: 00:14.3 scanning...
1039 06:52:27.954467 scan_static_bus for PCI: 00:14.3
1040 06:52:27.957876 GENERIC: 0.0 enabled
1041 06:52:27.961079 scan_static_bus for PCI: 00:14.3 done
1042 06:52:27.964566 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1043 06:52:27.967770 PCI: 00:15.0 scanning...
1044 06:52:27.971620 scan_static_bus for PCI: 00:15.0
1045 06:52:27.974509 I2C: 00:1a enabled
1046 06:52:27.974589 I2C: 00:31 enabled
1047 06:52:27.978226
1048 06:52:27.978315 I2C: 00:32 enabled
1049 06:52:27.981199 scan_static_bus for PCI: 00:15.0 done
1050 06:52:27.984643 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1051 06:52:27.988527
1052 06:52:27.988616 PCI: 00:15.1 scanning...
1053 06:52:27.992531 scan_static_bus for PCI: 00:15.1
1054 06:52:27.994766 I2C: 00:10 enabled
1055 06:52:27.998695 scan_static_bus for PCI: 00:15.1 done
1056 06:52:28.001299 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1057 06:52:28.004685
1058 06:52:28.004775 PCI: 00:15.2 scanning...
1059 06:52:28.008112 scan_static_bus for PCI: 00:15.2
1060 06:52:28.011574 scan_static_bus for PCI: 00:15.2 done
1061 06:52:28.014584
1062 06:52:28.018063 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1063 06:52:28.021299 PCI: 00:15.3 scanning...
1064 06:52:28.025018 scan_static_bus for PCI: 00:15.3
1065 06:52:28.027777 scan_static_bus for PCI: 00:15.3 done
1066 06:52:28.031200 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1067 06:52:28.034681 PCI: 00:19.1 scanning...
1068 06:52:28.037683 scan_static_bus for PCI: 00:19.1
1069 06:52:28.041190 I2C: 00:15 enabled
1070 06:52:28.044472 scan_static_bus for PCI: 00:19.1 done
1071 06:52:28.047822 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1072 06:52:28.050953 PCI: 00:1d.0 scanning...
1073 06:52:28.055010 do_pci_scan_bridge for PCI: 00:1d.0
1074 06:52:28.057982 PCI: pci_scan_bus for bus 01
1075 06:52:28.060925 PCI: 01:00.0 [1c5c/174a] enabled
1076 06:52:28.064572 GENERIC: 0.0 enabled
1077 06:52:28.067552 Enabling Common Clock Configuration
1078 06:52:28.070986 L1 Sub-State supported from root port 29
1079 06:52:28.074882 L1 Sub-State Support = 0xf
1080 06:52:28.077530 CommonModeRestoreTime = 0x28
1081 06:52:28.080628 Power On Value = 0x16, Power On Scale = 0x0
1082 06:52:28.084125 ASPM: Enabled L1
1083 06:52:28.087427 PCIe: Max_Payload_Size adjusted to 128
1084 06:52:28.090830 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1085 06:52:28.094390
1086 06:52:28.094477 PCI: 00:1e.2 scanning...
1087 06:52:28.097079 scan_generic_bus for PCI: 00:1e.2
1088 06:52:28.100540 SPI: 00 enabled
1089 06:52:28.107613 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1090 06:52:28.110392 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1091 06:52:28.113968 PCI: 00:1e.3 scanning...
1092 06:52:28.117331 scan_generic_bus for PCI: 00:1e.3
1093 06:52:28.120211 SPI: 00 enabled
1094 06:52:28.124122 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1095 06:52:28.130726 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1096 06:52:28.133741 PCI: 00:1f.0 scanning...
1097 06:52:28.136893 scan_static_bus for PCI: 00:1f.0
1098 06:52:28.136971 PNP: 0c09.0 enabled
1099 06:52:28.140005 PNP: 0c09.0 scanning...
1100 06:52:28.143602 scan_static_bus for PNP: 0c09.0
1101 06:52:28.146694 scan_static_bus for PNP: 0c09.0 done
1102 06:52:28.153713 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1103 06:52:28.157208 scan_static_bus for PCI: 00:1f.0 done
1104 06:52:28.160263 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1105 06:52:28.164007 PCI: 00:1f.2 scanning...
1106 06:52:28.167197 scan_static_bus for PCI: 00:1f.2
1107 06:52:28.170164 GENERIC: 0.0 enabled
1108 06:52:28.170248 GENERIC: 0.0 scanning...
1109 06:52:28.173883 scan_static_bus for GENERIC: 0.0
1110 06:52:28.176771 GENERIC: 0.0 enabled
1111 06:52:28.180046 GENERIC: 1.0 enabled
1112 06:52:28.183595 scan_static_bus for GENERIC: 0.0 done
1113 06:52:28.187119 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1114 06:52:28.190700 scan_static_bus for PCI: 00:1f.2 done
1115 06:52:28.193533
1116 06:52:28.197260 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1117 06:52:28.200091 PCI: 00:1f.3 scanning...
1118 06:52:28.203203 scan_static_bus for PCI: 00:1f.3
1119 06:52:28.206500 scan_static_bus for PCI: 00:1f.3 done
1120 06:52:28.209778 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1121 06:52:28.213238 PCI: 00:1f.5 scanning...
1122 06:52:28.216485 scan_generic_bus for PCI: 00:1f.5
1123 06:52:28.219726 scan_generic_bus for PCI: 00:1f.5 done
1124 06:52:28.226449 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1125 06:52:28.229898 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1126 06:52:28.233358 scan_static_bus for Root Device done
1127 06:52:28.240356 scan_bus: bus Root Device finished in 736 msecs
1128 06:52:28.240448 done
1129 06:52:28.247130 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1130 06:52:28.249780 Chrome EC: UHEPI supported
1131 06:52:28.256436 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1132 06:52:28.263041 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1133 06:52:28.266979 SPI flash protection: WPSW=0 SRP0=0
1134 06:52:28.269356 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1135 06:52:28.276229 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1136 06:52:28.279328 found VGA at PCI: 00:02.0
1137 06:52:28.283288 Setting up VGA for PCI: 00:02.0
1138 06:52:28.286053 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1139 06:52:28.292778 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1140 06:52:28.295956 Allocating resources...
1141 06:52:28.296068 Reading resources...
1142 06:52:28.299034 Root Device read_resources bus 0 link: 0
1143 06:52:28.306087 DOMAIN: 0000 read_resources bus 0 link: 0
1144 06:52:28.309524 PCI: 00:04.0 read_resources bus 1 link: 0
1145 06:52:28.315864 PCI: 00:04.0 read_resources bus 1 link: 0 done
1146 06:52:28.319194 PCI: 00:0d.0 read_resources bus 0 link: 0
1147 06:52:28.325999 USB0 port 0 read_resources bus 0 link: 0
1148 06:52:28.328933 USB0 port 0 read_resources bus 0 link: 0 done
1149 06:52:28.335843 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1150 06:52:28.339189 PCI: 00:14.0 read_resources bus 0 link: 0
1151 06:52:28.342552 USB0 port 0 read_resources bus 0 link: 0
1152 06:52:28.349747 USB0 port 0 read_resources bus 0 link: 0 done
1153 06:52:28.353202 PCI: 00:14.0 read_resources bus 0 link: 0 done
1154 06:52:28.360504 PCI: 00:14.3 read_resources bus 0 link: 0
1155 06:52:28.363421 PCI: 00:14.3 read_resources bus 0 link: 0 done
1156 06:52:28.369910 PCI: 00:15.0 read_resources bus 0 link: 0
1157 06:52:28.373080 PCI: 00:15.0 read_resources bus 0 link: 0 done
1158 06:52:28.380046 PCI: 00:15.1 read_resources bus 0 link: 0
1159 06:52:28.383559 PCI: 00:15.1 read_resources bus 0 link: 0 done
1160 06:52:28.391508 PCI: 00:19.1 read_resources bus 0 link: 0
1161 06:52:28.393941 PCI: 00:19.1 read_resources bus 0 link: 0 done
1162 06:52:28.401013 PCI: 00:1d.0 read_resources bus 1 link: 0
1163 06:52:28.403392 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1164 06:52:28.410345 PCI: 00:1e.2 read_resources bus 2 link: 0
1165 06:52:28.413618 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1166 06:52:28.420669 PCI: 00:1e.3 read_resources bus 3 link: 0
1167 06:52:28.423905 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1168 06:52:28.430108 PCI: 00:1f.0 read_resources bus 0 link: 0
1169 06:52:28.433543 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1170 06:52:28.440471 PCI: 00:1f.2 read_resources bus 0 link: 0
1171 06:52:28.443938 GENERIC: 0.0 read_resources bus 0 link: 0
1172 06:52:28.449881 GENERIC: 0.0 read_resources bus 0 link: 0 done
1173 06:52:28.453233 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1174 06:52:28.460038 DOMAIN: 0000 read_resources bus 0 link: 0 done
1175 06:52:28.463309 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1176 06:52:28.469682 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1177 06:52:28.472932 Root Device read_resources bus 0 link: 0 done
1178 06:52:28.476744 Done reading resources.
1179 06:52:28.482990 Show resources in subtree (Root Device)...After reading.
1180 06:52:28.486531 Root Device child on link 0 DOMAIN: 0000
1181 06:52:28.489675 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1182 06:52:28.499663 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1183 06:52:28.509516 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1184 06:52:28.512631 PCI: 00:00.0
1185 06:52:28.519525 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1186 06:52:28.529166 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1187 06:52:28.539343 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1188 06:52:28.549190 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1189 06:52:28.558843 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1190 06:52:28.569440 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1191 06:52:28.575524 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1192 06:52:28.585787 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1193 06:52:28.595486 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1194 06:52:28.605705 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1195 06:52:28.615174 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1196 06:52:28.625806 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1197 06:52:28.631782 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1198 06:52:28.642068 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1199 06:52:28.652307 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1200 06:52:28.662053 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1201 06:52:28.671800 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1202 06:52:28.682076 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1203 06:52:28.687963 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1204 06:52:28.697994 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1205 06:52:28.701617 PCI: 00:02.0
1206 06:52:28.711261 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1207 06:52:28.721924 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1208 06:52:28.732236 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1209 06:52:28.734865 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1210 06:52:28.744774 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1211 06:52:28.748105 GENERIC: 0.0
1212 06:52:28.748195 PCI: 00:05.0
1213 06:52:28.757992 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1214 06:52:28.764404 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1215 06:52:28.764497 GENERIC: 0.0
1216 06:52:28.768192 PCI: 00:08.0
1217 06:52:28.777873 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1218 06:52:28.778258 PCI: 00:0a.0
1219 06:52:28.781087 PCI: 00:0d.0 child on link 0 USB0 port 0
1220 06:52:28.791315 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1221 06:52:28.797435 USB0 port 0 child on link 0 USB3 port 0
1222 06:52:28.797524 USB3 port 0
1223 06:52:28.800685 USB3 port 1
1224 06:52:28.800764 USB3 port 2
1225 06:52:28.804462 USB3 port 3
1226 06:52:28.807301 PCI: 00:14.0 child on link 0 USB0 port 0
1227 06:52:28.817251 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1228 06:52:28.823863 USB0 port 0 child on link 0 USB2 port 0
1229 06:52:28.823948 USB2 port 0
1230 06:52:28.827340 USB2 port 1
1231 06:52:28.827427 USB2 port 2
1232 06:52:28.830943 USB2 port 3
1233 06:52:28.831020 USB2 port 4
1234 06:52:28.833894 USB2 port 5
1235 06:52:28.833970 USB2 port 6
1236 06:52:28.837198 USB2 port 7
1237 06:52:28.837274 USB2 port 8
1238 06:52:28.840416 USB2 port 9
1239 06:52:28.840492 USB3 port 0
1240 06:52:28.843622
1241 06:52:28.843702 USB3 port 1
1242 06:52:28.846877 USB3 port 2
1243 06:52:28.846959 USB3 port 3
1244 06:52:28.851386 PCI: 00:14.2
1245 06:52:28.860188 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1246 06:52:28.870023 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1247 06:52:28.873657 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1248 06:52:28.883753 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1249 06:52:28.886664 GENERIC: 0.0
1250 06:52:28.889987 PCI: 00:15.0 child on link 0 I2C: 00:1a
1251 06:52:28.899722 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1252 06:52:28.899806 I2C: 00:1a
1253 06:52:28.903261 I2C: 00:31
1254 06:52:28.903357 I2C: 00:32
1255 06:52:28.909870 PCI: 00:15.1 child on link 0 I2C: 00:10
1256 06:52:28.919712 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1257 06:52:28.919798 I2C: 00:10
1258 06:52:28.923350 PCI: 00:15.2
1259 06:52:28.932986 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1260 06:52:28.933070 PCI: 00:15.3
1261 06:52:28.942689 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1262 06:52:28.946159 PCI: 00:16.0
1263 06:52:28.956167 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1264 06:52:28.956255 PCI: 00:19.0
1265 06:52:28.959528 PCI: 00:19.1 child on link 0 I2C: 00:15
1266 06:52:28.969699 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1267 06:52:28.972659 I2C: 00:15
1268 06:52:28.975636 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1269 06:52:28.985938 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1270 06:52:28.995836 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1271 06:52:29.005573 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1272 06:52:29.006158 GENERIC: 0.0
1273 06:52:29.008989 PCI: 01:00.0
1274 06:52:29.018828 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1275 06:52:29.028871 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1276 06:52:29.035385 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1277 06:52:29.039054 PCI: 00:1e.0
1278 06:52:29.048159 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1279 06:52:29.051594 PCI: 00:1e.2 child on link 0 SPI: 00
1280 06:52:29.055164
1281 06:52:29.061909 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1282 06:52:29.065181
1283 06:52:29.065268 SPI: 00
1284 06:52:29.068063 PCI: 00:1e.3 child on link 0 SPI: 00
1285 06:52:29.078255 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1286 06:52:29.078362 SPI: 00
1287 06:52:29.084869 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1288 06:52:29.091542 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1289 06:52:29.095181 PNP: 0c09.0
1290 06:52:29.104882 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1291 06:52:29.108450 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1292 06:52:29.117977 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1293 06:52:29.127867 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1294 06:52:29.131149 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1295 06:52:29.131235 GENERIC: 0.0
1296 06:52:29.134511 GENERIC: 1.0
1297 06:52:29.137845 PCI: 00:1f.3
1298 06:52:29.147513 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1299 06:52:29.157358 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1300 06:52:29.157488 PCI: 00:1f.5
1301 06:52:29.167642 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1302 06:52:29.170796 CPU_CLUSTER: 0 child on link 0 APIC: 00
1303 06:52:29.174779 APIC: 00
1304 06:52:29.174864 APIC: 01
1305 06:52:29.174933 APIC: 03
1306 06:52:29.177183 APIC: 06
1307 06:52:29.177269 APIC: 05
1308 06:52:29.180439 APIC: 04
1309 06:52:29.180550 APIC: 02
1310 06:52:29.180646 APIC: 07
1311 06:52:29.190482 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1312 06:52:29.193894 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1313 06:52:29.200378 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1314 06:52:29.206836 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1315 06:52:29.210223 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1316 06:52:29.216699 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1317 06:52:29.220246 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1318 06:52:29.227659 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1319 06:52:29.233640 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1320 06:52:29.243392 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1321 06:52:29.249931 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1322 06:52:29.256234 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1323 06:52:29.264336 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1324 06:52:29.270209 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1325 06:52:29.279742 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1326 06:52:29.283190 DOMAIN: 0000: Resource ranges:
1327 06:52:29.286268 * Base: 1000, Size: 800, Tag: 100
1328 06:52:29.289934 * Base: 1900, Size: e700, Tag: 100
1329 06:52:29.293347 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1330 06:52:29.299791 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1331 06:52:29.306063 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1332 06:52:29.316159 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1333 06:52:29.322512 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1334 06:52:29.328961 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1335 06:52:29.338897 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1336 06:52:29.345401 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1337 06:52:29.352381 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1338 06:52:29.362018 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1339 06:52:29.369764 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1340 06:52:29.375174 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1341 06:52:29.378583
1342 06:52:29.385596 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1343 06:52:29.391513 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1344 06:52:29.398311 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1345 06:52:29.408064 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1346 06:52:29.414642 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1347 06:52:29.424929 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1348 06:52:29.431382 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1349 06:52:29.437890 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1350 06:52:29.447624 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1351 06:52:29.454070 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1352 06:52:29.460985 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1353 06:52:29.471496 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1354 06:52:29.477263 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1355 06:52:29.481065 DOMAIN: 0000: Resource ranges:
1356 06:52:29.484251 * Base: 7fc00000, Size: 40400000, Tag: 200
1357 06:52:29.490615 * Base: d0000000, Size: 28000000, Tag: 200
1358 06:52:29.494151 * Base: fa000000, Size: 1000000, Tag: 200
1359 06:52:29.497514 * Base: fb001000, Size: 2fff000, Tag: 200
1360 06:52:29.500415 * Base: fe010000, Size: 2e000, Tag: 200
1361 06:52:29.507543 * Base: fe03f000, Size: d41000, Tag: 200
1362 06:52:29.510571 * Base: fed88000, Size: 8000, Tag: 200
1363 06:52:29.513574 * Base: fed93000, Size: d000, Tag: 200
1364 06:52:29.516874 * Base: feda2000, Size: 1e000, Tag: 200
1365 06:52:29.523272 * Base: fede0000, Size: 1220000, Tag: 200
1366 06:52:29.527179 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1367 06:52:29.533563 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1368 06:52:29.539955 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1369 06:52:29.547235 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1370 06:52:29.553264 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1371 06:52:29.559849 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1372 06:52:29.566622 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1373 06:52:29.573514 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1374 06:52:29.580135 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1375 06:52:29.586838 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1376 06:52:29.593061 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1377 06:52:29.599608 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1378 06:52:29.606706 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1379 06:52:29.612829 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1380 06:52:29.619593 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1381 06:52:29.626697 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1382 06:52:29.632907 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1383 06:52:29.639614 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1384 06:52:29.645953 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1385 06:52:29.652645 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1386 06:52:29.659608 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1387 06:52:29.666307 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1388 06:52:29.673458 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1389 06:52:29.682740 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1390 06:52:29.689564 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1391 06:52:29.692621 PCI: 00:1d.0: Resource ranges:
1392 06:52:29.696549 * Base: 7fc00000, Size: 100000, Tag: 200
1393 06:52:29.702474 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1394 06:52:29.709304 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1395 06:52:29.716304 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1396 06:52:29.726377 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1397 06:52:29.732529 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1398 06:52:29.736150 Root Device assign_resources, bus 0 link: 0
1399 06:52:29.742648 DOMAIN: 0000 assign_resources, bus 0 link: 0
1400 06:52:29.749577 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1401 06:52:29.759039 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1402 06:52:29.765684 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1403 06:52:29.775336 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1404 06:52:29.778539 PCI: 00:04.0 assign_resources, bus 1 link: 0
1405 06:52:29.781850 PCI: 00:04.0 assign_resources, bus 1 link: 0
1406 06:52:29.791999 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1407 06:52:29.798232 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1408 06:52:29.808231 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1409 06:52:29.812018 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1410 06:52:29.817964 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1411 06:52:29.825134 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1412 06:52:29.831235 PCI: 00:14.0 assign_resources, bus 0 link: 0
1413 06:52:29.834744 PCI: 00:14.0 assign_resources, bus 0 link: 0
1414 06:52:29.841309 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1415 06:52:29.851939 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1416 06:52:29.857877 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1417 06:52:29.864667 PCI: 00:14.3 assign_resources, bus 0 link: 0
1418 06:52:29.867768 PCI: 00:14.3 assign_resources, bus 0 link: 0
1419 06:52:29.877762 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1420 06:52:29.880736 PCI: 00:15.0 assign_resources, bus 0 link: 0
1421 06:52:29.884260 PCI: 00:15.0 assign_resources, bus 0 link: 0
1422 06:52:29.894194 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1423 06:52:29.897999 PCI: 00:15.1 assign_resources, bus 0 link: 0
1424 06:52:29.904333 PCI: 00:15.1 assign_resources, bus 0 link: 0
1425 06:52:29.911056 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1426 06:52:29.921009 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1427 06:52:29.927662 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1428 06:52:29.937220 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1429 06:52:29.940389 PCI: 00:19.1 assign_resources, bus 0 link: 0
1430 06:52:29.943679 PCI: 00:19.1 assign_resources, bus 0 link: 0
1431 06:52:29.947137
1432 06:52:29.953479 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1433 06:52:29.963654 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1434 06:52:29.973723 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1435 06:52:29.976588 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1436 06:52:29.987217 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1437 06:52:29.993116 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1438 06:52:30.000150 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1439 06:52:30.006448 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1440 06:52:30.013082 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1441 06:52:30.019673 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1442 06:52:30.023223 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1443 06:52:30.032979 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1444 06:52:30.036492 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1445 06:52:30.039462 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1446 06:52:30.046759 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1447 06:52:30.049269 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1448 06:52:30.056413 LPC: Trying to open IO window from 800 size 1ff
1449 06:52:30.062742 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1450 06:52:30.072562 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1451 06:52:30.078957 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1452 06:52:30.085553 DOMAIN: 0000 assign_resources, bus 0 link: 0
1453 06:52:30.089084 Root Device assign_resources, bus 0 link: 0
1454 06:52:30.092745 Done setting resources.
1455 06:52:30.099181 Show resources in subtree (Root Device)...After assigning values.
1456 06:52:30.102354 Root Device child on link 0 DOMAIN: 0000
1457 06:52:30.106006 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1458 06:52:30.115464 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1459 06:52:30.125723 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1460 06:52:30.128855 PCI: 00:00.0
1461 06:52:30.138758 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1462 06:52:30.145686 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1463 06:52:30.149064
1464 06:52:30.155270 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1465 06:52:30.164923 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1466 06:52:30.175044 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1467 06:52:30.185460 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1468 06:52:30.194957 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1469 06:52:30.202264 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1470 06:52:30.204928
1471 06:52:30.211594 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1472 06:52:30.221090 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1473 06:52:30.231038 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1474 06:52:30.241051 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1475 06:52:30.251173 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1476 06:52:30.258011 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1477 06:52:30.267337 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1478 06:52:30.277689 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1479 06:52:30.287304 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1480 06:52:30.297485 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1481 06:52:30.307365 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1482 06:52:30.317464 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1483 06:52:30.317562 PCI: 00:02.0
1484 06:52:30.327389 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1485 06:52:30.340891 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1486 06:52:30.346506 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1487 06:52:30.353283 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1488 06:52:30.362918 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1489 06:52:30.366912 GENERIC: 0.0
1490 06:52:30.367021 PCI: 00:05.0
1491 06:52:30.376296 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1492 06:52:30.382844 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1493 06:52:30.382926 GENERIC: 0.0
1494 06:52:30.386200 PCI: 00:08.0
1495 06:52:30.396037 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1496 06:52:30.396120 PCI: 00:0a.0
1497 06:52:30.403144 PCI: 00:0d.0 child on link 0 USB0 port 0
1498 06:52:30.412598 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1499 06:52:30.416402 USB0 port 0 child on link 0 USB3 port 0
1500 06:52:30.419244 USB3 port 0
1501 06:52:30.419334 USB3 port 1
1502 06:52:30.422595 USB3 port 2
1503 06:52:30.422672 USB3 port 3
1504 06:52:30.428999 PCI: 00:14.0 child on link 0 USB0 port 0
1505 06:52:30.439041 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1506 06:52:30.442960 USB0 port 0 child on link 0 USB2 port 0
1507 06:52:30.445480 USB2 port 0
1508 06:52:30.445576 USB2 port 1
1509 06:52:30.449037 USB2 port 2
1510 06:52:30.449126 USB2 port 3
1511 06:52:30.452290 USB2 port 4
1512 06:52:30.452367 USB2 port 5
1513 06:52:30.456037 USB2 port 6
1514 06:52:30.456120 USB2 port 7
1515 06:52:30.459087 USB2 port 8
1516 06:52:30.459159 USB2 port 9
1517 06:52:30.461952 USB3 port 0
1518 06:52:30.462034 USB3 port 1
1519 06:52:30.465281
1520 06:52:30.465399 USB3 port 2
1521 06:52:30.468797 USB3 port 3
1522 06:52:30.469147 PCI: 00:14.2
1523 06:52:30.478800 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1524 06:52:30.488771 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1525 06:52:30.495211 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1526 06:52:30.505142 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1527 06:52:30.505248 GENERIC: 0.0
1528 06:52:30.511934 PCI: 00:15.0 child on link 0 I2C: 00:1a
1529 06:52:30.521724 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1530 06:52:30.521816 I2C: 00:1a
1531 06:52:30.524793 I2C: 00:31
1532 06:52:30.524880 I2C: 00:32
1533 06:52:30.531711 PCI: 00:15.1 child on link 0 I2C: 00:10
1534 06:52:30.541165 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1535 06:52:30.541271 I2C: 00:10
1536 06:52:30.544767 PCI: 00:15.2
1537 06:52:30.554711 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1538 06:52:30.554820 PCI: 00:15.3
1539 06:52:30.564419 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1540 06:52:30.567834 PCI: 00:16.0
1541 06:52:30.577681 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1542 06:52:30.581245 PCI: 00:19.0
1543 06:52:30.584451 PCI: 00:19.1 child on link 0 I2C: 00:15
1544 06:52:30.594150 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1545 06:52:30.594239 I2C: 00:15
1546 06:52:30.600693 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1547 06:52:30.611028 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1548 06:52:30.620757 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1549 06:52:30.630210 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1550 06:52:30.634240 GENERIC: 0.0
1551 06:52:30.634327 PCI: 01:00.0
1552 06:52:30.647280 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1553 06:52:30.657090 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1554 06:52:30.666902 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1555 06:52:30.666993 PCI: 00:1e.0
1556 06:52:30.679926 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1557 06:52:30.683607 PCI: 00:1e.2 child on link 0 SPI: 00
1558 06:52:30.693377 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1559 06:52:30.693468 SPI: 00
1560 06:52:30.699768 PCI: 00:1e.3 child on link 0 SPI: 00
1561 06:52:30.709828 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1562 06:52:30.709914 SPI: 00
1563 06:52:30.716961 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1564 06:52:30.723132 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1565 06:52:30.726593 PNP: 0c09.0
1566 06:52:30.733184 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1567 06:52:30.739456 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1568 06:52:30.749543 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1569 06:52:30.755939 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1570 06:52:30.762601 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1571 06:52:30.762689 GENERIC: 0.0
1572 06:52:30.765794 GENERIC: 1.0
1573 06:52:30.765884 PCI: 00:1f.3
1574 06:52:30.775715 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1575 06:52:30.789231 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1576 06:52:30.789318 PCI: 00:1f.5
1577 06:52:30.799253 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1578 06:52:30.806061 CPU_CLUSTER: 0 child on link 0 APIC: 00
1579 06:52:30.806147 APIC: 00
1580 06:52:30.806214 APIC: 01
1581 06:52:30.809344 APIC: 03
1582 06:52:30.809442 APIC: 06
1583 06:52:30.809510 APIC: 05
1584 06:52:30.812421 APIC: 04
1585 06:52:30.812506 APIC: 02
1586 06:52:30.815576 APIC: 07
1587 06:52:30.815661 Done allocating resources.
1588 06:52:30.821819 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1589 06:52:30.828612 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1590 06:52:30.831983 Configure GPIOs for I2S audio on UP4.
1591 06:52:30.839961 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1592 06:52:30.842766 Enabling resources...
1593 06:52:30.846254 PCI: 00:00.0 subsystem <- 8086/9a12
1594 06:52:30.849474 PCI: 00:00.0 cmd <- 06
1595 06:52:30.852976 PCI: 00:02.0 subsystem <- 8086/9a40
1596 06:52:30.855791 PCI: 00:02.0 cmd <- 03
1597 06:52:30.859017 PCI: 00:04.0 subsystem <- 8086/9a03
1598 06:52:30.862164 PCI: 00:04.0 cmd <- 02
1599 06:52:30.865941 PCI: 00:05.0 subsystem <- 8086/9a19
1600 06:52:30.866026 PCI: 00:05.0 cmd <- 02
1601 06:52:30.872321 PCI: 00:08.0 subsystem <- 8086/9a11
1602 06:52:30.872407 PCI: 00:08.0 cmd <- 06
1603 06:52:30.876011 PCI: 00:0d.0 subsystem <- 8086/9a13
1604 06:52:30.879077 PCI: 00:0d.0 cmd <- 02
1605 06:52:30.882767 PCI: 00:14.0 subsystem <- 8086/a0ed
1606 06:52:30.886069 PCI: 00:14.0 cmd <- 02
1607 06:52:30.889045 PCI: 00:14.2 subsystem <- 8086/a0ef
1608 06:52:30.892484 PCI: 00:14.2 cmd <- 02
1609 06:52:30.895893 PCI: 00:14.3 subsystem <- 8086/a0f0
1610 06:52:30.899399 PCI: 00:14.3 cmd <- 02
1611 06:52:30.902888 PCI: 00:15.0 subsystem <- 8086/a0e8
1612 06:52:30.906221 PCI: 00:15.0 cmd <- 02
1613 06:52:30.908735 PCI: 00:15.1 subsystem <- 8086/a0e9
1614 06:52:30.912004 PCI: 00:15.1 cmd <- 02
1615 06:52:30.915673 PCI: 00:15.2 subsystem <- 8086/a0ea
1616 06:52:30.915758 PCI: 00:15.2 cmd <- 02
1617 06:52:30.922306 PCI: 00:15.3 subsystem <- 8086/a0eb
1618 06:52:30.922391 PCI: 00:15.3 cmd <- 02
1619 06:52:30.925498 PCI: 00:16.0 subsystem <- 8086/a0e0
1620 06:52:30.929015 PCI: 00:16.0 cmd <- 02
1621 06:52:30.932551 PCI: 00:19.1 subsystem <- 8086/a0c6
1622 06:52:30.935866 PCI: 00:19.1 cmd <- 02
1623 06:52:30.938739 PCI: 00:1d.0 bridge ctrl <- 0013
1624 06:52:30.942287 PCI: 00:1d.0 subsystem <- 8086/a0b0
1625 06:52:30.945219 PCI: 00:1d.0 cmd <- 06
1626 06:52:30.948760 PCI: 00:1e.0 subsystem <- 8086/a0a8
1627 06:52:30.952068 PCI: 00:1e.0 cmd <- 06
1628 06:52:30.955255 PCI: 00:1e.2 subsystem <- 8086/a0aa
1629 06:52:30.958988 PCI: 00:1e.2 cmd <- 06
1630 06:52:30.962017 PCI: 00:1e.3 subsystem <- 8086/a0ab
1631 06:52:30.965470 PCI: 00:1e.3 cmd <- 02
1632 06:52:30.968345 PCI: 00:1f.0 subsystem <- 8086/a087
1633 06:52:30.968451 PCI: 00:1f.0 cmd <- 407
1634 06:52:30.975577 PCI: 00:1f.3 subsystem <- 8086/a0c8
1635 06:52:30.975661 PCI: 00:1f.3 cmd <- 02
1636 06:52:30.979382 PCI: 00:1f.5 subsystem <- 8086/a0a4
1637 06:52:30.982347 PCI: 00:1f.5 cmd <- 406
1638 06:52:30.987012 PCI: 01:00.0 cmd <- 02
1639 06:52:30.991171 done.
1640 06:52:30.994773 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1641 06:52:30.998236 Initializing devices...
1642 06:52:31.001333 Root Device init
1643 06:52:31.004497 Chrome EC: Set SMI mask to 0x0000000000000000
1644 06:52:31.011242 Chrome EC: clear events_b mask to 0x0000000000000000
1645 06:52:31.017984 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1646 06:52:31.024140 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1647 06:52:31.031260 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1648 06:52:31.034832 Chrome EC: Set WAKE mask to 0x0000000000000000
1649 06:52:31.041800 fw_config match found: DB_USB=USB3_ACTIVE
1650 06:52:31.044734 Configure Right Type-C port orientation for retimer
1651 06:52:31.048147 Root Device init finished in 45 msecs
1652 06:52:31.052700 PCI: 00:00.0 init
1653 06:52:31.055799 CPU TDP = 9 Watts
1654 06:52:31.055886 CPU PL1 = 9 Watts
1655 06:52:31.058820 CPU PL2 = 40 Watts
1656 06:52:31.062314 CPU PL4 = 83 Watts
1657 06:52:31.065462 PCI: 00:00.0 init finished in 8 msecs
1658 06:52:31.065550 PCI: 00:02.0 init
1659 06:52:31.069099
1660 06:52:31.069179 GMA: Found VBT in CBFS
1661 06:52:31.072005 GMA: Found valid VBT in CBFS
1662 06:52:31.078743 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1663 06:52:31.085421 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1664 06:52:31.088541 PCI: 00:02.0 init finished in 18 msecs
1665 06:52:31.092003 PCI: 00:05.0 init
1666 06:52:31.095646 PCI: 00:05.0 init finished in 0 msecs
1667 06:52:31.098946 PCI: 00:08.0 init
1668 06:52:31.102120 PCI: 00:08.0 init finished in 0 msecs
1669 06:52:31.105175 PCI: 00:14.0 init
1670 06:52:31.108689 PCI: 00:14.0 init finished in 0 msecs
1671 06:52:31.111790 PCI: 00:14.2 init
1672 06:52:31.115039 PCI: 00:14.2 init finished in 0 msecs
1673 06:52:31.118461 PCI: 00:15.0 init
1674 06:52:31.121959 I2C bus 0 version 0x3230302a
1675 06:52:31.125121 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1676 06:52:31.128366 PCI: 00:15.0 init finished in 6 msecs
1677 06:52:31.128452 PCI: 00:15.1 init
1678 06:52:31.131813
1679 06:52:31.131900 I2C bus 1 version 0x3230302a
1680 06:52:31.135016 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1681 06:52:31.138346
1682 06:52:31.141738 PCI: 00:15.1 init finished in 6 msecs
1683 06:52:31.141824 PCI: 00:15.2 init
1684 06:52:31.144878 I2C bus 2 version 0x3230302a
1685 06:52:31.148033 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1686 06:52:31.151455 PCI: 00:15.2 init finished in 6 msecs
1687 06:52:31.156064 PCI: 00:15.3 init
1688 06:52:31.158421 I2C bus 3 version 0x3230302a
1689 06:52:31.162004 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1690 06:52:31.165089 PCI: 00:15.3 init finished in 6 msecs
1691 06:52:31.168509 PCI: 00:16.0 init
1692 06:52:31.171697 PCI: 00:16.0 init finished in 0 msecs
1693 06:52:31.175416 PCI: 00:19.1 init
1694 06:52:31.178881 I2C bus 5 version 0x3230302a
1695 06:52:31.181316 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1696 06:52:31.185078 PCI: 00:19.1 init finished in 6 msecs
1697 06:52:31.188027 PCI: 00:1d.0 init
1698 06:52:31.191468 Initializing PCH PCIe bridge.
1699 06:52:31.194368 PCI: 00:1d.0 init finished in 3 msecs
1700 06:52:31.198502 PCI: 00:1f.0 init
1701 06:52:31.201038 IOAPIC: Initializing IOAPIC at 0xfec00000
1702 06:52:31.204869 IOAPIC: Bootstrap Processor Local APIC = 0x00
1703 06:52:31.207899 IOAPIC: ID = 0x02
1704 06:52:31.211205 IOAPIC: Dumping registers
1705 06:52:31.211300 reg 0x0000: 0x02000000
1706 06:52:31.214407 reg 0x0001: 0x00770020
1707 06:52:31.217394 reg 0x0002: 0x00000000
1708 06:52:31.221977 PCI: 00:1f.0 init finished in 21 msecs
1709 06:52:31.224342 PCI: 00:1f.2 init
1710 06:52:31.227902 Disabling ACPI via APMC.
1711 06:52:31.227987 APMC done.
1712 06:52:31.230932
1713 06:52:31.233986 PCI: 00:1f.2 init finished in 5 msecs
1714 06:52:31.245303 PCI: 01:00.0 init
1715 06:52:31.248717 PCI: 01:00.0 init finished in 0 msecs
1716 06:52:31.251718 PNP: 0c09.0 init
1717 06:52:31.255057 Google Chrome EC uptime: 8.413 seconds
1718 06:52:31.261931 Google Chrome AP resets since EC boot: 1
1719 06:52:31.264746 Google Chrome most recent AP reset causes:
1720 06:52:31.268720 0.350: 32775 shutdown: entering G3
1721 06:52:31.275102 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1722 06:52:31.277794 PNP: 0c09.0 init finished in 22 msecs
1723 06:52:31.284125 Devices initialized
1724 06:52:31.287357 Show all devs... After init.
1725 06:52:31.290288 Root Device: enabled 1
1726 06:52:31.290367 DOMAIN: 0000: enabled 1
1727 06:52:31.293622 CPU_CLUSTER: 0: enabled 1
1728 06:52:31.297305 PCI: 00:00.0: enabled 1
1729 06:52:31.300598 PCI: 00:02.0: enabled 1
1730 06:52:31.300684 PCI: 00:04.0: enabled 1
1731 06:52:31.303765 PCI: 00:05.0: enabled 1
1732 06:52:31.306633 PCI: 00:06.0: enabled 0
1733 06:52:31.310296 PCI: 00:07.0: enabled 0
1734 06:52:31.310385 PCI: 00:07.1: enabled 0
1735 06:52:31.313555 PCI: 00:07.2: enabled 0
1736 06:52:31.316852 PCI: 00:07.3: enabled 0
1737 06:52:31.319948 PCI: 00:08.0: enabled 1
1738 06:52:31.320035 PCI: 00:09.0: enabled 0
1739 06:52:31.324237 PCI: 00:0a.0: enabled 0
1740 06:52:31.327621 PCI: 00:0d.0: enabled 1
1741 06:52:31.330086 PCI: 00:0d.1: enabled 0
1742 06:52:31.330175 PCI: 00:0d.2: enabled 0
1743 06:52:31.333334 PCI: 00:0d.3: enabled 0
1744 06:52:31.336359 PCI: 00:0e.0: enabled 0
1745 06:52:31.339967 PCI: 00:10.2: enabled 1
1746 06:52:31.340053 PCI: 00:10.6: enabled 0
1747 06:52:31.343100 PCI: 00:10.7: enabled 0
1748 06:52:31.346501 PCI: 00:12.0: enabled 0
1749 06:52:31.350037 PCI: 00:12.6: enabled 0
1750 06:52:31.350149 PCI: 00:13.0: enabled 0
1751 06:52:31.352875 PCI: 00:14.0: enabled 1
1752 06:52:31.357433 PCI: 00:14.1: enabled 0
1753 06:52:31.357513 PCI: 00:14.2: enabled 1
1754 06:52:31.359635
1755 06:52:31.359708 PCI: 00:14.3: enabled 1
1756 06:52:31.363638 PCI: 00:15.0: enabled 1
1757 06:52:31.366377 PCI: 00:15.1: enabled 1
1758 06:52:31.366464 PCI: 00:15.2: enabled 1
1759 06:52:31.370506 PCI: 00:15.3: enabled 1
1760 06:52:31.372787 PCI: 00:16.0: enabled 1
1761 06:52:31.376280 PCI: 00:16.1: enabled 0
1762 06:52:31.376365 PCI: 00:16.2: enabled 0
1763 06:52:31.379485 PCI: 00:16.3: enabled 0
1764 06:52:31.382909 PCI: 00:16.4: enabled 0
1765 06:52:31.386130 PCI: 00:16.5: enabled 0
1766 06:52:31.386219 PCI: 00:17.0: enabled 0
1767 06:52:31.389641 PCI: 00:19.0: enabled 0
1768 06:52:31.393241 PCI: 00:19.1: enabled 1
1769 06:52:31.396344 PCI: 00:19.2: enabled 0
1770 06:52:31.396456 PCI: 00:1c.0: enabled 1
1771 06:52:31.399838 PCI: 00:1c.1: enabled 0
1772 06:52:31.402967 PCI: 00:1c.2: enabled 0
1773 06:52:31.403087 PCI: 00:1c.3: enabled 0
1774 06:52:31.406166 PCI: 00:1c.4: enabled 0
1775 06:52:31.409294 PCI: 00:1c.5: enabled 0
1776 06:52:31.412814 PCI: 00:1c.6: enabled 1
1777 06:52:31.412899 PCI: 00:1c.7: enabled 0
1778 06:52:31.416466 PCI: 00:1d.0: enabled 1
1779 06:52:31.420023 PCI: 00:1d.1: enabled 0
1780 06:52:31.423143 PCI: 00:1d.2: enabled 1
1781 06:52:31.423227 PCI: 00:1d.3: enabled 0
1782 06:52:31.426534 PCI: 00:1e.0: enabled 1
1783 06:52:31.430072 PCI: 00:1e.1: enabled 0
1784 06:52:31.432814 PCI: 00:1e.2: enabled 1
1785 06:52:31.432898 PCI: 00:1e.3: enabled 1
1786 06:52:31.435945 PCI: 00:1f.0: enabled 1
1787 06:52:31.439264 PCI: 00:1f.1: enabled 0
1788 06:52:31.442642 PCI: 00:1f.2: enabled 1
1789 06:52:31.442728 PCI: 00:1f.3: enabled 1
1790 06:52:31.446286 PCI: 00:1f.4: enabled 0
1791 06:52:31.449193 PCI: 00:1f.5: enabled 1
1792 06:52:31.449298 PCI: 00:1f.6: enabled 0
1793 06:52:31.452368 PCI: 00:1f.7: enabled 0
1794 06:52:31.455802 APIC: 00: enabled 1
1795 06:52:31.458858 GENERIC: 0.0: enabled 1
1796 06:52:31.458946 GENERIC: 0.0: enabled 1
1797 06:52:31.462770 GENERIC: 1.0: enabled 1
1798 06:52:31.466274 GENERIC: 0.0: enabled 1
1799 06:52:31.466361 GENERIC: 1.0: enabled 1
1800 06:52:31.470084
1801 06:52:31.470170 USB0 port 0: enabled 1
1802 06:52:31.473514 GENERIC: 0.0: enabled 1
1803 06:52:31.475575 USB0 port 0: enabled 1
1804 06:52:31.475660 GENERIC: 0.0: enabled 1
1805 06:52:31.478846 I2C: 00:1a: enabled 1
1806 06:52:31.482682 I2C: 00:31: enabled 1
1807 06:52:31.482768 I2C: 00:32: enabled 1
1808 06:52:31.485607 I2C: 00:10: enabled 1
1809 06:52:31.489110 I2C: 00:15: enabled 1
1810 06:52:31.491961 GENERIC: 0.0: enabled 0
1811 06:52:31.492047 GENERIC: 1.0: enabled 0
1812 06:52:31.495665 GENERIC: 0.0: enabled 1
1813 06:52:31.498618 SPI: 00: enabled 1
1814 06:52:31.498704 SPI: 00: enabled 1
1815 06:52:31.501823 PNP: 0c09.0: enabled 1
1816 06:52:31.505145 GENERIC: 0.0: enabled 1
1817 06:52:31.505231 USB3 port 0: enabled 1
1818 06:52:31.508620 USB3 port 1: enabled 1
1819 06:52:31.512171 USB3 port 2: enabled 0
1820 06:52:31.512257 USB3 port 3: enabled 0
1821 06:52:31.515230
1822 06:52:31.515320 USB2 port 0: enabled 0
1823 06:52:31.518584 USB2 port 1: enabled 1
1824 06:52:31.521693 USB2 port 2: enabled 1
1825 06:52:31.521779 USB2 port 3: enabled 0
1826 06:52:31.525076 USB2 port 4: enabled 1
1827 06:52:31.528281 USB2 port 5: enabled 0
1828 06:52:31.528368 USB2 port 6: enabled 0
1829 06:52:31.531786 USB2 port 7: enabled 0
1830 06:52:31.535626 USB2 port 8: enabled 0
1831 06:52:31.538495 USB2 port 9: enabled 0
1832 06:52:31.538581 USB3 port 0: enabled 0
1833 06:52:31.541734 USB3 port 1: enabled 1
1834 06:52:31.544930 USB3 port 2: enabled 0
1835 06:52:31.545016 USB3 port 3: enabled 0
1836 06:52:31.548300 GENERIC: 0.0: enabled 1
1837 06:52:31.551998 GENERIC: 1.0: enabled 1
1838 06:52:31.555025 APIC: 01: enabled 1
1839 06:52:31.555107 APIC: 03: enabled 1
1840 06:52:31.558548 APIC: 06: enabled 1
1841 06:52:31.558630 APIC: 05: enabled 1
1842 06:52:31.561778 APIC: 04: enabled 1
1843 06:52:31.564904 APIC: 02: enabled 1
1844 06:52:31.564978 APIC: 07: enabled 1
1845 06:52:31.567881 PCI: 01:00.0: enabled 1
1846 06:52:31.574920 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1847 06:52:31.578298 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1848 06:52:31.582144 ELOG: NV offset 0xf30000 size 0x1000
1849 06:52:31.588829 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1850 06:52:31.595740 ELOG: Event(17) added with size 13 at 2023-01-10 06:52:30 UTC
1851 06:52:31.602028 ELOG: Event(92) added with size 9 at 2023-01-10 06:52:30 UTC
1852 06:52:31.608787 ELOG: Event(93) added with size 9 at 2023-01-10 06:52:30 UTC
1853 06:52:31.615579 ELOG: Event(9E) added with size 10 at 2023-01-10 06:52:30 UTC
1854 06:52:31.622096 ELOG: Event(9F) added with size 14 at 2023-01-10 06:52:30 UTC
1855 06:52:31.628806 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1856 06:52:31.631884 ELOG: Event(A1) added with size 10 at 2023-01-10 06:52:30 UTC
1857 06:52:31.635399
1858 06:52:31.638708 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1859 06:52:31.645316 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1860 06:52:31.648392 Finalize devices...
1861 06:52:31.648493 Devices finalized
1862 06:52:31.655005 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1863 06:52:31.661607 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1864 06:52:31.664997 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1865 06:52:31.671524 ME: HFSTS1 : 0x80030055
1866 06:52:31.675404 ME: HFSTS2 : 0x30280116
1867 06:52:31.678061 ME: HFSTS3 : 0x00000050
1868 06:52:31.685566 ME: HFSTS4 : 0x00004000
1869 06:52:31.688366 ME: HFSTS5 : 0x00000000
1870 06:52:31.695075 ME: HFSTS6 : 0x00400006
1871 06:52:31.698402 ME: Manufacturing Mode : YES
1872 06:52:31.701561 ME: SPI Protection Mode Enabled : NO
1873 06:52:31.704749 ME: FW Partition Table : OK
1874 06:52:31.707955 ME: Bringup Loader Failure : NO
1875 06:52:31.711637 ME: Firmware Init Complete : NO
1876 06:52:31.714808 ME: Boot Options Present : NO
1877 06:52:31.718010 ME: Update In Progress : NO
1878 06:52:31.724979 ME: D0i3 Support : YES
1879 06:52:31.727880 ME: Low Power State Enabled : NO
1880 06:52:31.731302 ME: CPU Replaced : YES
1881 06:52:31.734577 ME: CPU Replacement Valid : YES
1882 06:52:31.738190 ME: Current Working State : 5
1883 06:52:31.740928 ME: Current Operation State : 1
1884 06:52:31.744155 ME: Current Operation Mode : 3
1885 06:52:31.747438 ME: Error Code : 0
1886 06:52:31.751070 ME: Enhanced Debug Mode : NO
1887 06:52:31.757413 ME: CPU Debug Disabled : YES
1888 06:52:31.760872 ME: TXT Support : NO
1889 06:52:31.767368 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1890 06:52:31.774098 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1891 06:52:31.777315 CBFS: 'fallback/slic' not found.
1892 06:52:31.781224 ACPI: Writing ACPI tables at 76b01000.
1893 06:52:31.783868 ACPI: * FACS
1894 06:52:31.783949 ACPI: * DSDT
1895 06:52:31.787542 Ramoops buffer: 0x100000@0x76a00000.
1896 06:52:31.793752 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1897 06:52:31.797316 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1898 06:52:31.800711 Google Chrome EC: version:
1899 06:52:31.804838 ro: voema_v2.0.7540-147f8d37d1
1900 06:52:31.807568 rw: voema_v2.0.7540-147f8d37d1
1901 06:52:31.810424 running image: 2
1902 06:52:31.816736 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1903 06:52:31.820360 ACPI: * FADT
1904 06:52:31.820439 SCI is IRQ9
1905 06:52:31.823732 ACPI: added table 1/32, length now 40
1906 06:52:31.826807
1907 06:52:31.826886 ACPI: * SSDT
1908 06:52:31.830389 Found 1 CPU(s) with 8 core(s) each.
1909 06:52:31.837192 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1910 06:52:31.840052 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1911 06:52:31.843433 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1912 06:52:31.846821 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1913 06:52:31.853113 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1914 06:52:31.859929 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1915 06:52:31.863540 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1916 06:52:31.870088 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1917 06:52:31.876733 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1918 06:52:31.880286 \_SB.PCI0.RP09: Added StorageD3Enable property
1919 06:52:31.886485 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1920 06:52:31.889558 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1921 06:52:31.896432 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1922 06:52:31.899728 PS2K: Passing 80 keymaps to kernel
1923 06:52:31.906230 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1924 06:52:31.912968 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1925 06:52:31.919690 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1926 06:52:31.926095 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1927 06:52:31.933179 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1928 06:52:31.939499 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1929 06:52:31.946310 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1930 06:52:31.952550 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1931 06:52:31.955721 ACPI: added table 2/32, length now 44
1932 06:52:31.955804 ACPI: * MCFG
1933 06:52:31.958996 ACPI: added table 3/32, length now 48
1934 06:52:31.963071 ACPI: * TPM2
1935 06:52:31.966174 TPM2 log created at 0x769f0000
1936 06:52:31.969963 ACPI: added table 4/32, length now 52
1937 06:52:31.970234 ACPI: * MADT
1938 06:52:31.972851
1939 06:52:31.973051 SCI is IRQ9
1940 06:52:31.975690 ACPI: added table 5/32, length now 56
1941 06:52:31.979913 current = 76b09850
1942 06:52:31.980082 ACPI: * DMAR
1943 06:52:31.982321 ACPI: added table 6/32, length now 60
1944 06:52:31.985627 ACPI: added table 7/32, length now 64
1945 06:52:31.988930 ACPI: * HPET
1946 06:52:31.992161 ACPI: added table 8/32, length now 68
1947 06:52:31.995456 ACPI: done.
1948 06:52:31.995599 ACPI tables: 35216 bytes.
1949 06:52:31.998996 smbios_write_tables: 769ef000
1950 06:52:32.002022 EC returned error result code 3
1951 06:52:32.005356 Couldn't obtain OEM name from CBI
1952 06:52:32.008844 Create SMBIOS type 16
1953 06:52:32.012367 Create SMBIOS type 17
1954 06:52:32.015292 GENERIC: 0.0 (WIFI Device)
1955 06:52:32.015382 SMBIOS tables: 1750 bytes.
1956 06:52:32.021922 Writing table forward entry at 0x00000500
1957 06:52:32.028970 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1958 06:52:32.031915 Writing coreboot table at 0x76b25000
1959 06:52:32.039159 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1960 06:52:32.041839 1. 0000000000001000-000000000009ffff: RAM
1961 06:52:32.044768 2. 00000000000a0000-00000000000fffff: RESERVED
1962 06:52:32.051702 3. 0000000000100000-00000000769eefff: RAM
1963 06:52:32.054692 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1964 06:52:32.061577 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1965 06:52:32.068072 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1966 06:52:32.071975 7. 0000000077000000-000000007fbfffff: RESERVED
1967 06:52:32.078525 8. 00000000c0000000-00000000cfffffff: RESERVED
1968 06:52:32.081220 9. 00000000f8000000-00000000f9ffffff: RESERVED
1969 06:52:32.084763 10. 00000000fb000000-00000000fb000fff: RESERVED
1970 06:52:32.091299 11. 00000000fe000000-00000000fe00ffff: RESERVED
1971 06:52:32.094680 12. 00000000fed80000-00000000fed87fff: RESERVED
1972 06:52:32.101668 13. 00000000fed90000-00000000fed92fff: RESERVED
1973 06:52:32.104516 14. 00000000feda0000-00000000feda1fff: RESERVED
1974 06:52:32.111413 15. 00000000fedc0000-00000000feddffff: RESERVED
1975 06:52:32.114496 16. 0000000100000000-00000002803fffff: RAM
1976 06:52:32.117651 Passing 4 GPIOs to payload:
1977 06:52:32.121096 NAME | PORT | POLARITY | VALUE
1978 06:52:32.128420 lid | undefined | high | high
1979 06:52:32.134375 power | undefined | high | low
1980 06:52:32.137618 oprom | undefined | high | low
1981 06:52:32.143847 EC in RW | 0x000000e5 | high | high
1982 06:52:32.150768 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum d912
1983 06:52:32.153965 coreboot table: 1576 bytes.
1984 06:52:32.157314 IMD ROOT 0. 0x76fff000 0x00001000
1985 06:52:32.160602 IMD SMALL 1. 0x76ffe000 0x00001000
1986 06:52:32.164412 FSP MEMORY 2. 0x76c4e000 0x003b0000
1987 06:52:32.167177 VPD 3. 0x76c4d000 0x00000367
1988 06:52:32.170268 RO MCACHE 4. 0x76c4c000 0x00000fdc
1989 06:52:32.173883 CONSOLE 5. 0x76c2c000 0x00020000
1990 06:52:32.180511 FMAP 6. 0x76c2b000 0x00000578
1991 06:52:32.183887 TIME STAMP 7. 0x76c2a000 0x00000910
1992 06:52:32.187080 VBOOT WORK 8. 0x76c16000 0x00014000
1993 06:52:32.190406 ROMSTG STCK 9. 0x76c15000 0x00001000
1994 06:52:32.193919 AFTER CAR 10. 0x76c0a000 0x0000b000
1995 06:52:32.197269 RAMSTAGE 11. 0x76b97000 0x00073000
1996 06:52:32.200032 REFCODE 12. 0x76b42000 0x00055000
1997 06:52:32.203310 SMM BACKUP 13. 0x76b32000 0x00010000
1998 06:52:32.210271 4f444749 14. 0x76b30000 0x00002000
1999 06:52:32.213251 EXT VBT15. 0x76b2d000 0x0000219f
2000 06:52:32.216612 COREBOOT 16. 0x76b25000 0x00008000
2001 06:52:32.220227 ACPI 17. 0x76b01000 0x00024000
2002 06:52:32.223689 ACPI GNVS 18. 0x76b00000 0x00001000
2003 06:52:32.226690 RAMOOPS 19. 0x76a00000 0x00100000
2004 06:52:32.229898 TPM2 TCGLOG20. 0x769f0000 0x00010000
2005 06:52:32.233257 SMBIOS 21. 0x769ef000 0x00000800
2006 06:52:32.236358 IMD small region:
2007 06:52:32.239507 IMD ROOT 0. 0x76ffec00 0x00000400
2008 06:52:32.243830 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2009 06:52:32.246997 POWER STATE 2. 0x76ffeb80 0x00000044
2010 06:52:32.253257 ROMSTAGE 3. 0x76ffeb60 0x00000004
2011 06:52:32.256144 MEM INFO 4. 0x76ffe980 0x000001e0
2012 06:52:32.263599 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
2013 06:52:32.266966 MTRR: Physical address space:
2014 06:52:32.269866 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2015 06:52:32.276090 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2016 06:52:32.282574 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2017 06:52:32.290186 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
2018 06:52:32.296542 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
2019 06:52:32.303037 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
2020 06:52:32.309792 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
2021 06:52:32.312897 MTRR: Fixed MSR 0x250 0x0606060606060606
2022 06:52:32.316218 MTRR: Fixed MSR 0x258 0x0606060606060606
2023 06:52:32.319702 MTRR: Fixed MSR 0x259 0x0000000000000000
2024 06:52:32.325688 MTRR: Fixed MSR 0x268 0x0606060606060606
2025 06:52:32.329133 MTRR: Fixed MSR 0x269 0x0606060606060606
2026 06:52:32.333209 MTRR: Fixed MSR 0x26a 0x0606060606060606
2027 06:52:32.336066 MTRR: Fixed MSR 0x26b 0x0606060606060606
2028 06:52:32.342819 MTRR: Fixed MSR 0x26c 0x0606060606060606
2029 06:52:32.345730 MTRR: Fixed MSR 0x26d 0x0606060606060606
2030 06:52:32.349258 MTRR: Fixed MSR 0x26e 0x0606060606060606
2031 06:52:32.352369 MTRR: Fixed MSR 0x26f 0x0606060606060606
2032 06:52:32.356564 call enable_fixed_mtrr()
2033 06:52:32.359992 CPU physical address size: 39 bits
2034 06:52:32.366569 MTRR: default type WB/UC MTRR counts: 6/6.
2035 06:52:32.369915 MTRR: UC selected as default type.
2036 06:52:32.376624 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2037 06:52:32.380517 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2038 06:52:32.386420 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2039 06:52:32.393488 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2040 06:52:32.399724 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2041 06:52:32.406293 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2042 06:52:32.406381
2043 06:52:32.409823 MTRR check
2044 06:52:32.413302 Fixed MTRRs : Enabled
2045 06:52:32.413406 Variable MTRRs: Enabled
2046 06:52:32.413484
2047 06:52:32.419370 MTRR: Fixed MSR 0x250 0x0606060606060606
2048 06:52:32.423065 MTRR: Fixed MSR 0x258 0x0606060606060606
2049 06:52:32.426042 MTRR: Fixed MSR 0x259 0x0000000000000000
2050 06:52:32.430734 MTRR: Fixed MSR 0x268 0x0606060606060606
2051 06:52:32.432765 MTRR: Fixed MSR 0x269 0x0606060606060606
2052 06:52:32.436423
2053 06:52:32.439391 MTRR: Fixed MSR 0x26a 0x0606060606060606
2054 06:52:32.442866 MTRR: Fixed MSR 0x26b 0x0606060606060606
2055 06:52:32.445814 MTRR: Fixed MSR 0x26c 0x0606060606060606
2056 06:52:32.449184 MTRR: Fixed MSR 0x26d 0x0606060606060606
2057 06:52:32.456152 MTRR: Fixed MSR 0x26e 0x0606060606060606
2058 06:52:32.459638 MTRR: Fixed MSR 0x26f 0x0606060606060606
2059 06:52:32.465843 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2060 06:52:32.469129 call enable_fixed_mtrr()
2061 06:52:32.472567 Checking cr50 for pending updates
2062 06:52:32.477252 CPU physical address size: 39 bits
2063 06:52:32.481224 MTRR: Fixed MSR 0x250 0x0606060606060606
2064 06:52:32.483903 MTRR: Fixed MSR 0x250 0x0606060606060606
2065 06:52:32.487405 MTRR: Fixed MSR 0x258 0x0606060606060606
2066 06:52:32.490804 MTRR: Fixed MSR 0x259 0x0000000000000000
2067 06:52:32.493556
2068 06:52:32.497252 MTRR: Fixed MSR 0x268 0x0606060606060606
2069 06:52:32.500473 MTRR: Fixed MSR 0x269 0x0606060606060606
2070 06:52:32.504073 MTRR: Fixed MSR 0x26a 0x0606060606060606
2071 06:52:32.506685 MTRR: Fixed MSR 0x26b 0x0606060606060606
2072 06:52:32.513962 MTRR: Fixed MSR 0x26c 0x0606060606060606
2073 06:52:32.517030 MTRR: Fixed MSR 0x26d 0x0606060606060606
2074 06:52:32.520338 MTRR: Fixed MSR 0x26e 0x0606060606060606
2075 06:52:32.523610 MTRR: Fixed MSR 0x26f 0x0606060606060606
2076 06:52:32.531208 MTRR: Fixed MSR 0x258 0x0606060606060606
2077 06:52:32.534191 MTRR: Fixed MSR 0x259 0x0000000000000000
2078 06:52:32.537619 MTRR: Fixed MSR 0x268 0x0606060606060606
2079 06:52:32.541007 MTRR: Fixed MSR 0x269 0x0606060606060606
2080 06:52:32.547745 MTRR: Fixed MSR 0x26a 0x0606060606060606
2081 06:52:32.551295 MTRR: Fixed MSR 0x26b 0x0606060606060606
2082 06:52:32.554198 MTRR: Fixed MSR 0x26c 0x0606060606060606
2083 06:52:32.557404 MTRR: Fixed MSR 0x26d 0x0606060606060606
2084 06:52:32.563962 MTRR: Fixed MSR 0x26e 0x0606060606060606
2085 06:52:32.567522 MTRR: Fixed MSR 0x26f 0x0606060606060606
2086 06:52:32.570721 call enable_fixed_mtrr()
2087 06:52:32.574070 call enable_fixed_mtrr()
2088 06:52:32.577240 MTRR: Fixed MSR 0x250 0x0606060606060606
2089 06:52:32.580635 MTRR: Fixed MSR 0x250 0x0606060606060606
2090 06:52:32.584285 MTRR: Fixed MSR 0x258 0x0606060606060606
2091 06:52:32.590672 MTRR: Fixed MSR 0x259 0x0000000000000000
2092 06:52:32.594391 MTRR: Fixed MSR 0x268 0x0606060606060606
2093 06:52:32.597271 MTRR: Fixed MSR 0x269 0x0606060606060606
2094 06:52:32.600858 MTRR: Fixed MSR 0x26a 0x0606060606060606
2095 06:52:32.607163 MTRR: Fixed MSR 0x26b 0x0606060606060606
2096 06:52:32.610452 MTRR: Fixed MSR 0x26c 0x0606060606060606
2097 06:52:32.614108 MTRR: Fixed MSR 0x26d 0x0606060606060606
2098 06:52:32.617047 MTRR: Fixed MSR 0x26e 0x0606060606060606
2099 06:52:32.620817 MTRR: Fixed MSR 0x26f 0x0606060606060606
2100 06:52:32.626835 MTRR: Fixed MSR 0x258 0x0606060606060606
2101 06:52:32.630161 MTRR: Fixed MSR 0x259 0x0000000000000000
2102 06:52:32.636680 MTRR: Fixed MSR 0x268 0x0606060606060606
2103 06:52:32.640352 MTRR: Fixed MSR 0x269 0x0606060606060606
2104 06:52:32.643277 MTRR: Fixed MSR 0x26a 0x0606060606060606
2105 06:52:32.647406 MTRR: Fixed MSR 0x26b 0x0606060606060606
2106 06:52:32.650636 MTRR: Fixed MSR 0x26c 0x0606060606060606
2107 06:52:32.656782 MTRR: Fixed MSR 0x26d 0x0606060606060606
2108 06:52:32.660183 MTRR: Fixed MSR 0x26e 0x0606060606060606
2109 06:52:32.663848 MTRR: Fixed MSR 0x26f 0x0606060606060606
2110 06:52:32.667207 call enable_fixed_mtrr()
2111 06:52:32.670649 call enable_fixed_mtrr()
2112 06:52:32.673494 MTRR: Fixed MSR 0x250 0x0606060606060606
2113 06:52:32.676970 MTRR: Fixed MSR 0x250 0x0606060606060606
2114 06:52:32.683569 MTRR: Fixed MSR 0x258 0x0606060606060606
2115 06:52:32.686866 MTRR: Fixed MSR 0x259 0x0000000000000000
2116 06:52:32.689860 MTRR: Fixed MSR 0x268 0x0606060606060606
2117 06:52:32.693190 MTRR: Fixed MSR 0x269 0x0606060606060606
2118 06:52:32.700192 MTRR: Fixed MSR 0x26a 0x0606060606060606
2119 06:52:32.703586 MTRR: Fixed MSR 0x26b 0x0606060606060606
2120 06:52:32.706732 MTRR: Fixed MSR 0x26c 0x0606060606060606
2121 06:52:32.709568 MTRR: Fixed MSR 0x26d 0x0606060606060606
2122 06:52:32.716285 MTRR: Fixed MSR 0x26e 0x0606060606060606
2123 06:52:32.720176 MTRR: Fixed MSR 0x26f 0x0606060606060606
2124 06:52:32.723066 MTRR: Fixed MSR 0x258 0x0606060606060606
2125 06:52:32.729973 MTRR: Fixed MSR 0x259 0x0000000000000000
2126 06:52:32.732804 MTRR: Fixed MSR 0x268 0x0606060606060606
2127 06:52:32.736366 MTRR: Fixed MSR 0x269 0x0606060606060606
2128 06:52:32.739420 MTRR: Fixed MSR 0x26a 0x0606060606060606
2129 06:52:32.746046 MTRR: Fixed MSR 0x26b 0x0606060606060606
2130 06:52:32.749835 MTRR: Fixed MSR 0x26c 0x0606060606060606
2131 06:52:32.752803 MTRR: Fixed MSR 0x26d 0x0606060606060606
2132 06:52:32.756142 MTRR: Fixed MSR 0x26e 0x0606060606060606
2133 06:52:32.763190 MTRR: Fixed MSR 0x26f 0x0606060606060606
2134 06:52:32.765826 call enable_fixed_mtrr()
2135 06:52:32.765904 call enable_fixed_mtrr()
2136 06:52:32.769193 CPU physical address size: 39 bits
2137 06:52:32.772610
2138 06:52:32.776040 CPU physical address size: 39 bits
2139 06:52:32.779127 CPU physical address size: 39 bits
2140 06:52:32.782660 CPU physical address size: 39 bits
2141 06:52:32.785694 CPU physical address size: 39 bits
2142 06:52:32.791256 CPU physical address size: 39 bits
2143 06:52:32.794045 Reading cr50 TPM mode
2144 06:52:32.804479 BS: BS_PAYLOAD_LOAD entry times (exec / console): 327 / 6 ms
2145 06:52:32.813756 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2146 06:52:32.817529 Checking segment from ROM address 0xffc02b38
2147 06:52:32.820366 Checking segment from ROM address 0xffc02b54
2148 06:52:32.827299 Loading segment from ROM address 0xffc02b38
2149 06:52:32.827382 code (compression=0)
2150 06:52:32.836998 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2151 06:52:32.846676 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2152 06:52:32.846767 it's not compressed!
2153 06:52:32.986740 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2154 06:52:32.992993 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2155 06:52:32.999976 Loading segment from ROM address 0xffc02b54
2156 06:52:33.000062 Entry Point 0x30000000
2157 06:52:33.002985 Loaded segments
2158 06:52:33.010157 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2159 06:52:33.052611 Finalizing chipset.
2160 06:52:33.056672 Finalizing SMM.
2161 06:52:33.056764 APMC done.
2162 06:52:33.062593 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2163 06:52:33.065901 mp_park_aps done after 0 msecs.
2164 06:52:33.069520 Jumping to boot code at 0x30000000(0x76b25000)
2165 06:52:33.078813 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2166 06:52:33.078909
2167 06:52:33.078984
2168 06:52:33.082317
2169 06:52:33.082416 Starting depthcharge on Voema...
2170 06:52:33.082774 end: 2.2.3 depthcharge-start (duration 00:00:17) [common]
2171 06:52:33.082883 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
2172 06:52:33.082985 Setting prompt string to ['volteer:']
2173 06:52:33.083072 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:43)
2174 06:52:33.085871
2175 06:52:33.092639 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2176 06:52:33.092735
2177 06:52:33.098835 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2178 06:52:33.098923
2179 06:52:33.105131 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2180 06:52:33.105223
2181 06:52:33.108577 Failed to find eMMC card reader
2182 06:52:33.108676
2183 06:52:33.112493 Wipe memory regions:
2184 06:52:33.112573
2185 06:52:33.115558 [0x00000000001000, 0x000000000a0000)
2186 06:52:33.115639
2187 06:52:33.118378 [0x00000000100000, 0x00000030000000)
2188 06:52:33.118456
2189 06:52:33.147271 [0x00000032662db0, 0x000000769ef000)
2190 06:52:33.147367
2191 06:52:33.186296 [0x00000100000000, 0x00000280400000)
2192 06:52:33.186432
2193 06:52:33.390520 ec_init: CrosEC protocol v3 supported (256, 256)
2194 06:52:33.390669
2195 06:52:33.397531 update_port_state: port C0 state: usb enable 1 mux conn 0
2196 06:52:33.397620
2197 06:52:33.406818 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2198 06:52:33.406913
2199 06:52:33.410251 pmc_check_ipc_sts: STS_BUSY done after 1611 us
2200 06:52:33.410339
2201 06:52:33.417034 send_conn_disc_msg: pmc_send_cmd succeeded
2202 06:52:33.417124
2203 06:52:33.846488 R8152: Initializing
2204 06:52:33.846648
2205 06:52:33.850030 Version 6 (ocp_data = 5c30)
2206 06:52:33.850118
2207 06:52:33.853011 R8152: Done initializing
2208 06:52:33.853099
2209 06:52:33.856621 Adding net device
2210 06:52:33.856722
2211 06:52:34.161857 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2212 06:52:34.162053
2213 06:52:34.162139
2214 06:52:34.162203
2215 06:52:34.165112 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2217 06:52:34.265908 volteer: tftpboot 192.168.201.1 8649804/tftp-deploy-7s16y1xq/kernel/bzImage 8649804/tftp-deploy-7s16y1xq/kernel/cmdline 8649804/tftp-deploy-7s16y1xq/ramdisk/ramdisk.cpio.gz
2218 06:52:34.266134 Setting prompt string to 'Starting kernel'
2219 06:52:34.266274 Setting prompt string to ['Starting kernel']
2220 06:52:34.266375 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2221 06:52:34.266488 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
2222 06:52:34.270424 tftpboot 192.168.201.1 8649804/tftp-deploy-7s16y1xq/kernel/bzImaoy-7s16y1xq/kernel/cmdline 8649804/tftp-deploy-7s16y1xq/ramdisk/ramdisk.cpio.gz
2223 06:52:34.270543
2224 06:52:34.270640 Waiting for link
2225 06:52:34.270737
2226 06:52:34.473835 done.
2227 06:52:34.473986
2228 06:52:34.474059 MAC: 00:24:32:30:79:42
2229 06:52:34.474122
2230 06:52:34.476322 Sending DHCP discover... done.
2231 06:52:34.476410
2232 06:52:34.479815 Waiting for reply... done.
2233 06:52:34.479902
2234 06:52:34.483389 Sending DHCP request... done.
2235 06:52:34.483478
2236 06:52:34.486589 Waiting for reply... done.
2237 06:52:34.486676
2238 06:52:34.489750 My ip is 192.168.201.13
2239 06:52:34.489837
2240 06:52:34.492819 The DHCP server ip is 192.168.201.1
2241 06:52:34.492922
2242 06:52:34.499780 TFTP server IP predefined by user: 192.168.201.1
2243 06:52:34.499869
2244 06:52:34.506204 Bootfile predefined by user: 8649804/tftp-deploy-7s16y1xq/kernel/bzImage
2245 06:52:34.506292
2246 06:52:34.509281 Sending tftp read request... done.
2247 06:52:34.509404
2248 06:52:34.512992 Waiting for the transfer...
2249 06:52:34.513079
2250 06:52:35.038416 00000000 ################################################################
2251 06:52:35.038569
2252 06:52:35.559143 00080000 ################################################################
2253 06:52:35.559303
2254 06:52:36.092502 00100000 ################################################################
2255 06:52:36.092660
2256 06:52:36.666598 00180000 ################################################################
2257 06:52:36.666741
2258 06:52:37.253377 00200000 ################################################################
2259 06:52:37.253529
2260 06:52:37.829952 00280000 ################################################################
2261 06:52:37.830110
2262 06:52:38.447214 00300000 ################################################################
2263 06:52:38.447697
2264 06:52:39.090808 00380000 ################################################################
2265 06:52:39.091317
2266 06:52:39.681907 00400000 ################################################################
2267 06:52:39.682058
2268 06:52:40.248442 00480000 ################################################################
2269 06:52:40.248650
2270 06:52:40.864488 00500000 ################################################################
2271 06:52:40.864888
2272 06:52:41.492103 00580000 ################################################################
2273 06:52:41.492523
2274 06:52:42.107140 00600000 ################################################################
2275 06:52:42.107431
2276 06:52:42.708187 00680000 ################################################################
2277 06:52:42.708744
2278 06:52:42.970291 00700000 ############################# done.
2279 06:52:42.970450
2280 06:52:42.972977 The bootfile was 7573392 bytes long.
2281 06:52:42.973066
2282 06:52:42.976368 Sending tftp read request... done.
2283 06:52:42.976459
2284 06:52:42.980088 Waiting for the transfer...
2285 06:52:42.980175
2286 06:52:43.553010 00000000 ################################################################
2287 06:52:43.553164
2288 06:52:44.122448 00080000 ################################################################
2289 06:52:44.122674
2290 06:52:44.710953 00100000 ################################################################
2291 06:52:44.711107
2292 06:52:45.307596 00180000 ################################################################
2293 06:52:45.307737
2294 06:52:45.907973 00200000 ################################################################
2295 06:52:45.908132
2296 06:52:46.498165 00280000 ################################################################
2297 06:52:46.498309
2298 06:52:47.097834 00300000 ################################################################
2299 06:52:47.097989
2300 06:52:47.684846 00380000 ################################################################
2301 06:52:47.685028
2302 06:52:48.278344 00400000 ################################################################
2303 06:52:48.278493
2304 06:52:48.875201 00480000 ################################################################
2305 06:52:48.875351
2306 06:52:49.166368 00500000 ################################ done.
2307 06:52:49.166513
2308 06:52:49.169223 Sending tftp read request... done.
2309 06:52:49.169310
2310 06:52:49.172543 Waiting for the transfer...
2311 06:52:49.172631
2312 06:52:49.172699 00000000 # done.
2313 06:52:49.172765
2314 06:52:49.183742 Command line loaded dynamically from TFTP file: 8649804/tftp-deploy-7s16y1xq/kernel/cmdline
2315 06:52:49.183830
2316 06:52:49.205707 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8649804/extract-nfsrootfs-7bsnr_c5,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2317 06:52:49.205800
2318 06:52:49.212350 Shutting down all USB controllers.
2319 06:52:49.212437
2320 06:52:49.212504 Removing current net device
2321 06:52:49.212567
2322 06:52:49.215625 Finalizing coreboot
2323 06:52:49.215711
2324 06:52:49.222036 Exiting depthcharge with code 4 at timestamp: 24783589
2325 06:52:49.222123
2326 06:52:49.222191
2327 06:52:49.222255 Starting kernel ...
2328 06:52:49.222317
2329 06:52:49.222376
2330 06:52:49.222733 end: 2.2.4 bootloader-commands (duration 00:00:16) [common]
2331 06:52:49.222831 start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
2332 06:52:49.222909 Setting prompt string to ['Linux version [0-9]']
2333 06:52:49.222980 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2334 06:52:49.223051 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2335 06:52:49.225662
2337 06:57:16.223861 end: 2.2.5 auto-login-action (duration 00:04:27) [common]
2339 06:57:16.225113 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
2341 06:57:16.226083 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2344 06:57:16.227642 end: 2 depthcharge-action (duration 00:05:00) [common]
2346 06:57:16.228932 Cleaning after the job
2347 06:57:16.229424 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8649804/tftp-deploy-7s16y1xq/ramdisk
2348 06:57:16.231797 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8649804/tftp-deploy-7s16y1xq/kernel
2349 06:57:16.234614 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8649804/tftp-deploy-7s16y1xq/nfsrootfs
2350 06:57:16.299376 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8649804/tftp-deploy-7s16y1xq/modules
2351 06:57:16.299700 start: 5.1 power-off (timeout 00:00:30) [common]
2352 06:57:16.299874 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-8' '--port=1' '--command=off'
2353 06:57:16.319294 >> Command sent successfully.
2354 06:57:16.321315 Returned 0 in 0 seconds
2355 06:57:16.422114 end: 5.1 power-off (duration 00:00:00) [common]
2357 06:57:16.422479 start: 5.2 read-feedback (timeout 00:10:00) [common]
2358 06:57:16.422740 Listened to connection for namespace 'common' for up to 1s
2359 06:57:17.425489 Finalising connection for namespace 'common'
2360 06:57:17.425696 Disconnecting from shell: Finalise
2361 06:57:17.526798 end: 5.2 read-feedback (duration 00:00:01) [common]
2362 06:57:17.527462 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8649804
2363 06:57:17.660301 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8649804
2364 06:57:17.660509 JobError: Your job cannot terminate cleanly.