Boot log: asus-cx9400-volteer
- Errors: 2
- Boot result: FAIL
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
1 06:52:23.228211 lava-dispatcher, installed at version: 2022.11
2 06:52:23.228413 start: 0 validate
3 06:52:23.228546 Start time: 2023-01-10 06:52:23.228539+00:00 (UTC)
4 06:52:23.228673 Using caching service: 'http://localhost/cache/?uri=%s'
5 06:52:23.228800 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230109.0%2Famd64%2Frootfs.cpio.gz exists
6 06:52:23.525540 Using caching service: 'http://localhost/cache/?uri=%s'
7 06:52:23.525726 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-799-g1229c813bcd9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 06:52:23.536192 Using caching service: 'http://localhost/cache/?uri=%s'
9 06:52:23.536353 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-799-g1229c813bcd9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 06:52:23.554754 validate duration: 0.33
12 06:52:23.555287 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 06:52:23.555518 start: 1.1 download-retry (timeout 00:10:00) [common]
14 06:52:23.555729 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 06:52:23.555939 Not decompressing ramdisk as can be used compressed.
16 06:52:23.556111 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230109.0/amd64/rootfs.cpio.gz
17 06:52:23.556255 saving as /var/lib/lava/dispatcher/tmp/8649828/tftp-deploy-vu7i399o/ramdisk/rootfs.cpio.gz
18 06:52:23.556385 total size: 35744928 (34MB)
19 06:52:23.571452 progress 0% (0MB)
20 06:52:23.698032 progress 5% (1MB)
21 06:52:23.908354 progress 10% (3MB)
22 06:52:24.091168 progress 15% (5MB)
23 06:52:24.275343 progress 20% (6MB)
24 06:52:24.439545 progress 25% (8MB)
25 06:52:24.626598 progress 30% (10MB)
26 06:52:24.887419 progress 35% (11MB)
27 06:52:25.154772 progress 40% (13MB)
28 06:52:25.402047 progress 45% (15MB)
29 06:52:25.722662 progress 50% (17MB)
30 06:52:25.948820 progress 55% (18MB)
31 06:52:26.300939 progress 60% (20MB)
32 06:52:26.466459 progress 65% (22MB)
33 06:52:26.644131 progress 70% (23MB)
34 06:52:26.810396 progress 75% (25MB)
35 06:52:26.983036 progress 80% (27MB)
36 06:52:27.148628 progress 85% (29MB)
37 06:52:27.320894 progress 90% (30MB)
38 06:52:27.505813 progress 95% (32MB)
39 06:52:27.667864 progress 100% (34MB)
40 06:52:27.669311 34MB downloaded in 4.11s (8.29MB/s)
41 06:52:27.670055 end: 1.1.1 http-download (duration 00:00:04) [common]
43 06:52:27.671380 end: 1.1 download-retry (duration 00:00:04) [common]
44 06:52:27.671841 start: 1.2 download-retry (timeout 00:09:56) [common]
45 06:52:27.672316 start: 1.2.1 http-download (timeout 00:09:56) [common]
46 06:52:27.672877 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-799-g1229c813bcd9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 06:52:27.673235 saving as /var/lib/lava/dispatcher/tmp/8649828/tftp-deploy-vu7i399o/kernel/bzImage
48 06:52:27.673560 total size: 7573392 (7MB)
49 06:52:27.673877 No compression specified
50 06:52:27.691368 progress 0% (0MB)
51 06:52:27.730548 progress 5% (0MB)
52 06:52:27.754557 progress 10% (0MB)
53 06:52:27.780930 progress 15% (1MB)
54 06:52:27.810968 progress 20% (1MB)
55 06:52:27.844471 progress 25% (1MB)
56 06:52:27.875720 progress 30% (2MB)
57 06:52:27.908502 progress 35% (2MB)
58 06:52:27.946641 progress 40% (2MB)
59 06:52:27.977659 progress 45% (3MB)
60 06:52:28.002427 progress 50% (3MB)
61 06:52:28.038537 progress 55% (4MB)
62 06:52:28.063819 progress 60% (4MB)
63 06:52:28.098188 progress 65% (4MB)
64 06:52:28.131300 progress 70% (5MB)
65 06:52:28.155006 progress 75% (5MB)
66 06:52:28.188712 progress 80% (5MB)
67 06:52:28.213572 progress 85% (6MB)
68 06:52:28.239362 progress 90% (6MB)
69 06:52:28.259476 progress 95% (6MB)
70 06:52:28.286951 progress 100% (7MB)
71 06:52:28.287800 7MB downloaded in 0.61s (11.76MB/s)
72 06:52:28.288473 end: 1.2.1 http-download (duration 00:00:01) [common]
74 06:52:28.289898 end: 1.2 download-retry (duration 00:00:01) [common]
75 06:52:28.290352 start: 1.3 download-retry (timeout 00:09:55) [common]
76 06:52:28.290789 start: 1.3.1 http-download (timeout 00:09:55) [common]
77 06:52:28.291342 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-799-g1229c813bcd9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 06:52:28.291694 saving as /var/lib/lava/dispatcher/tmp/8649828/tftp-deploy-vu7i399o/modules/modules.tar
79 06:52:28.292004 total size: 51848 (0MB)
80 06:52:28.292302 Using unxz to decompress xz
81 06:52:28.347877 progress 63% (0MB)
82 06:52:28.367699 progress 100% (0MB)
83 06:52:28.375776 0MB downloaded in 0.08s (0.59MB/s)
84 06:52:28.376866 end: 1.3.1 http-download (duration 00:00:00) [common]
86 06:52:28.378199 end: 1.3 download-retry (duration 00:00:00) [common]
87 06:52:28.378690 start: 1.4 prepare-tftp-overlay (timeout 00:09:55) [common]
88 06:52:28.379204 start: 1.4.1 extract-nfsrootfs (timeout 00:09:55) [common]
89 06:52:28.379639 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 06:52:28.380085 start: 1.4.2 lava-overlay (timeout 00:09:55) [common]
91 06:52:28.380875 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8649828/lava-overlay-0iofnx0a
92 06:52:28.381413 makedir: /var/lib/lava/dispatcher/tmp/8649828/lava-overlay-0iofnx0a/lava-8649828/bin
93 06:52:28.381847 makedir: /var/lib/lava/dispatcher/tmp/8649828/lava-overlay-0iofnx0a/lava-8649828/tests
94 06:52:28.382262 makedir: /var/lib/lava/dispatcher/tmp/8649828/lava-overlay-0iofnx0a/lava-8649828/results
95 06:52:28.382764 Creating /var/lib/lava/dispatcher/tmp/8649828/lava-overlay-0iofnx0a/lava-8649828/bin/lava-add-keys
96 06:52:28.383501 Creating /var/lib/lava/dispatcher/tmp/8649828/lava-overlay-0iofnx0a/lava-8649828/bin/lava-add-sources
97 06:52:28.384111 Creating /var/lib/lava/dispatcher/tmp/8649828/lava-overlay-0iofnx0a/lava-8649828/bin/lava-background-process-start
98 06:52:28.384698 Creating /var/lib/lava/dispatcher/tmp/8649828/lava-overlay-0iofnx0a/lava-8649828/bin/lava-background-process-stop
99 06:52:28.385278 Creating /var/lib/lava/dispatcher/tmp/8649828/lava-overlay-0iofnx0a/lava-8649828/bin/lava-common-functions
100 06:52:28.385847 Creating /var/lib/lava/dispatcher/tmp/8649828/lava-overlay-0iofnx0a/lava-8649828/bin/lava-echo-ipv4
101 06:52:28.386421 Creating /var/lib/lava/dispatcher/tmp/8649828/lava-overlay-0iofnx0a/lava-8649828/bin/lava-install-packages
102 06:52:28.387019 Creating /var/lib/lava/dispatcher/tmp/8649828/lava-overlay-0iofnx0a/lava-8649828/bin/lava-installed-packages
103 06:52:28.387593 Creating /var/lib/lava/dispatcher/tmp/8649828/lava-overlay-0iofnx0a/lava-8649828/bin/lava-os-build
104 06:52:28.388152 Creating /var/lib/lava/dispatcher/tmp/8649828/lava-overlay-0iofnx0a/lava-8649828/bin/lava-probe-channel
105 06:52:28.388730 Creating /var/lib/lava/dispatcher/tmp/8649828/lava-overlay-0iofnx0a/lava-8649828/bin/lava-probe-ip
106 06:52:28.389316 Creating /var/lib/lava/dispatcher/tmp/8649828/lava-overlay-0iofnx0a/lava-8649828/bin/lava-target-ip
107 06:52:28.389922 Creating /var/lib/lava/dispatcher/tmp/8649828/lava-overlay-0iofnx0a/lava-8649828/bin/lava-target-mac
108 06:52:28.390490 Creating /var/lib/lava/dispatcher/tmp/8649828/lava-overlay-0iofnx0a/lava-8649828/bin/lava-target-storage
109 06:52:28.391118 Creating /var/lib/lava/dispatcher/tmp/8649828/lava-overlay-0iofnx0a/lava-8649828/bin/lava-test-case
110 06:52:28.391700 Creating /var/lib/lava/dispatcher/tmp/8649828/lava-overlay-0iofnx0a/lava-8649828/bin/lava-test-event
111 06:52:28.392473 Creating /var/lib/lava/dispatcher/tmp/8649828/lava-overlay-0iofnx0a/lava-8649828/bin/lava-test-feedback
112 06:52:28.393072 Creating /var/lib/lava/dispatcher/tmp/8649828/lava-overlay-0iofnx0a/lava-8649828/bin/lava-test-raise
113 06:52:28.393682 Creating /var/lib/lava/dispatcher/tmp/8649828/lava-overlay-0iofnx0a/lava-8649828/bin/lava-test-reference
114 06:52:28.394291 Creating /var/lib/lava/dispatcher/tmp/8649828/lava-overlay-0iofnx0a/lava-8649828/bin/lava-test-runner
115 06:52:28.394860 Creating /var/lib/lava/dispatcher/tmp/8649828/lava-overlay-0iofnx0a/lava-8649828/bin/lava-test-set
116 06:52:28.395471 Creating /var/lib/lava/dispatcher/tmp/8649828/lava-overlay-0iofnx0a/lava-8649828/bin/lava-test-shell
117 06:52:28.396217 Updating /var/lib/lava/dispatcher/tmp/8649828/lava-overlay-0iofnx0a/lava-8649828/bin/lava-install-packages (oe)
118 06:52:28.396845 Updating /var/lib/lava/dispatcher/tmp/8649828/lava-overlay-0iofnx0a/lava-8649828/bin/lava-installed-packages (oe)
119 06:52:28.397374 Creating /var/lib/lava/dispatcher/tmp/8649828/lava-overlay-0iofnx0a/lava-8649828/environment
120 06:52:28.397846 LAVA metadata
121 06:52:28.398251 - LAVA_JOB_ID=8649828
122 06:52:28.398587 - LAVA_DISPATCHER_IP=192.168.201.1
123 06:52:28.399137 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:55) [common]
124 06:52:28.399481 skipped lava-vland-overlay
125 06:52:28.399881 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 06:52:28.400508 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:55) [common]
127 06:52:28.400870 skipped lava-multinode-overlay
128 06:52:28.401285 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 06:52:28.401722 start: 1.4.2.3 test-definition (timeout 00:09:55) [common]
130 06:52:28.402124 Loading test definitions
131 06:52:28.402628 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:55) [common]
132 06:52:28.403063 Using /lava-8649828 at stage 0
133 06:52:28.404403 uuid=8649828_1.4.2.3.1 testdef=None
134 06:52:28.404738 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 06:52:28.405070 start: 1.4.2.3.2 test-overlay (timeout 00:09:55) [common]
136 06:52:28.406920 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 06:52:28.407756 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:55) [common]
139 06:52:28.409620 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 06:52:28.410312 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:55) [common]
142 06:52:28.411749 runner path: /var/lib/lava/dispatcher/tmp/8649828/lava-overlay-0iofnx0a/lava-8649828/0/tests/0_cros-ec test_uuid 8649828_1.4.2.3.1
143 06:52:28.412152 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 06:52:28.412862 Creating lava-test-runner.conf files
146 06:52:28.413049 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8649828/lava-overlay-0iofnx0a/lava-8649828/0 for stage 0
147 06:52:28.413282 - 0_cros-ec
148 06:52:28.413543 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
149 06:52:28.413787 start: 1.4.2.4 compress-overlay (timeout 00:09:55) [common]
150 06:52:28.424173 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
151 06:52:28.424485 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:55) [common]
152 06:52:28.424627 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
153 06:52:28.424772 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
154 06:52:28.424920 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:55) [common]
155 06:52:29.183903 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
156 06:52:29.184248 start: 1.4.4 extract-modules (timeout 00:09:54) [common]
157 06:52:29.184364 extracting modules file /var/lib/lava/dispatcher/tmp/8649828/tftp-deploy-vu7i399o/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8649828/extract-overlay-ramdisk-on0ohb5d/ramdisk
158 06:52:29.188590 end: 1.4.4 extract-modules (duration 00:00:00) [common]
159 06:52:29.188707 start: 1.4.5 apply-overlay-tftp (timeout 00:09:54) [common]
160 06:52:29.188802 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8649828/compress-overlay-viv7ox8u/overlay-1.4.2.4.tar.gz to ramdisk
161 06:52:29.188876 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8649828/compress-overlay-viv7ox8u/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8649828/extract-overlay-ramdisk-on0ohb5d/ramdisk
162 06:52:29.192042 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
163 06:52:29.192151 start: 1.4.6 configure-preseed-file (timeout 00:09:54) [common]
164 06:52:29.192242 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
165 06:52:29.192332 start: 1.4.7 compress-ramdisk (timeout 00:09:54) [common]
166 06:52:29.192410 Building ramdisk /var/lib/lava/dispatcher/tmp/8649828/extract-overlay-ramdisk-on0ohb5d/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8649828/extract-overlay-ramdisk-on0ohb5d/ramdisk
167 06:52:29.438967 >> 182443 blocks
168 06:52:32.687561 rename /var/lib/lava/dispatcher/tmp/8649828/extract-overlay-ramdisk-on0ohb5d/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8649828/tftp-deploy-vu7i399o/ramdisk/ramdisk.cpio.gz
169 06:52:32.687991 end: 1.4.7 compress-ramdisk (duration 00:00:03) [common]
170 06:52:32.688130 start: 1.4.8 prepare-kernel (timeout 00:09:51) [common]
171 06:52:32.688248 start: 1.4.8.1 prepare-fit (timeout 00:09:51) [common]
172 06:52:32.688346 No mkimage arch provided, not using FIT.
173 06:52:32.688436 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
174 06:52:32.688528 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
175 06:52:32.688625 end: 1.4 prepare-tftp-overlay (duration 00:00:04) [common]
176 06:52:32.688720 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:51) [common]
177 06:52:32.688796 No LXC device requested
178 06:52:32.688877 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
179 06:52:32.688963 start: 1.6 deploy-device-env (timeout 00:09:51) [common]
180 06:52:32.689045 end: 1.6 deploy-device-env (duration 00:00:00) [common]
181 06:52:32.689117 Checking files for TFTP limit of 4294967296 bytes.
182 06:52:32.689501 end: 1 tftp-deploy (duration 00:00:09) [common]
183 06:52:32.689608 start: 2 depthcharge-action (timeout 00:05:00) [common]
184 06:52:32.689704 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
185 06:52:32.689860 substitutions:
186 06:52:32.689938 - {DTB}: None
187 06:52:32.690005 - {INITRD}: 8649828/tftp-deploy-vu7i399o/ramdisk/ramdisk.cpio.gz
188 06:52:32.690067 - {KERNEL}: 8649828/tftp-deploy-vu7i399o/kernel/bzImage
189 06:52:32.690127 - {LAVA_MAC}: None
190 06:52:32.690185 - {PRESEED_CONFIG}: None
191 06:52:32.690243 - {PRESEED_LOCAL}: None
192 06:52:32.690301 - {RAMDISK}: 8649828/tftp-deploy-vu7i399o/ramdisk/ramdisk.cpio.gz
193 06:52:32.690356 - {ROOT_PART}: None
194 06:52:32.690412 - {ROOT}: None
195 06:52:32.690468 - {SERVER_IP}: 192.168.201.1
196 06:52:32.690523 - {TEE}: None
197 06:52:32.690578 Parsed boot commands:
198 06:52:32.690633 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
199 06:52:32.690785 Parsed boot commands: tftpboot 192.168.201.1 8649828/tftp-deploy-vu7i399o/kernel/bzImage 8649828/tftp-deploy-vu7i399o/kernel/cmdline 8649828/tftp-deploy-vu7i399o/ramdisk/ramdisk.cpio.gz
200 06:52:32.690884 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
201 06:52:32.691007 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
202 06:52:32.691101 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
203 06:52:32.691184 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
204 06:52:32.691255 Not connected, no need to disconnect.
205 06:52:32.691331 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
206 06:52:32.691414 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
207 06:52:32.691481 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-12'
208 06:52:32.694141 Setting prompt string to ['lava-test: # ']
209 06:52:32.694420 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
210 06:52:32.694521 end: 2.2.1 reset-connection (duration 00:00:00) [common]
211 06:52:32.694615 start: 2.2.2 reset-device (timeout 00:05:00) [common]
212 06:52:32.694707 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
213 06:52:32.694887 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-12' '--port=1' '--command=reboot'
214 06:52:32.713575 >> Command sent successfully.
215 06:52:32.715534 Returned 0 in 0 seconds
216 06:52:32.816542 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
218 06:52:32.817534 end: 2.2.2 reset-device (duration 00:00:00) [common]
219 06:52:32.817915 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
220 06:52:32.818228 Setting prompt string to 'Starting depthcharge on Voema...'
221 06:52:32.818457 Changing prompt to 'Starting depthcharge on Voema...'
222 06:52:32.818734 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
223 06:52:32.819742 [Enter `^Ec?' for help]
224 06:52:40.146821
225 06:52:40.147025
226 06:52:40.156247 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
227 06:52:40.159811 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
228 06:52:40.163472
229 06:52:40.166122 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
230 06:52:40.169703 CPU: AES supported, TXT NOT supported, VT supported
231 06:52:40.176531 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
232 06:52:40.179989 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
233 06:52:40.187070 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
234 06:52:40.190776 VBOOT: Loading verstage.
235 06:52:40.193906 FMAP: Found "FLASH" version 1.1 at 0x1804000.
236 06:52:40.200706 FMAP: base = 0x0 size = 0x2000000 #areas = 32
237 06:52:40.203585 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
238 06:52:40.213429 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
239 06:52:40.220394 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
240 06:52:40.220484
241 06:52:40.220552
242 06:52:40.230526 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
243 06:52:40.247238 Probing TPM: . done!
244 06:52:40.250224 TPM ready after 0 ms
245 06:52:40.254149 Connected to device vid:did:rid of 1ae0:0028:00
246 06:52:40.265824 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
247 06:52:40.271653 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
248 06:52:40.275074 Initialized TPM device CR50 revision 0
249 06:52:40.332649 tlcl_send_startup: Startup return code is 0
250 06:52:40.332800 TPM: setup succeeded
251 06:52:40.348136 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
252 06:52:40.362448 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
253 06:52:40.375253 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
254 06:52:40.384999 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
255 06:52:40.388786 Chrome EC: UHEPI supported
256 06:52:40.391987 Phase 1
257 06:52:40.395516 FMAP: area GBB found @ 1805000 (458752 bytes)
258 06:52:40.405156 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
259 06:52:40.411707 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
260 06:52:40.418378 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
261 06:52:40.425010 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
262 06:52:40.428285 Recovery requested (1009000e)
263 06:52:40.431413 TPM: Extending digest for VBOOT: boot mode into PCR 0
264 06:52:40.443341 tlcl_extend: response is 0
265 06:52:40.449714 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
266 06:52:40.459841 tlcl_extend: response is 0
267 06:52:40.466717 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
268 06:52:40.472910 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
269 06:52:40.479854 BS: verstage times (exec / console): total (unknown) / 142 ms
270 06:52:40.479944
271 06:52:40.480012
272 06:52:40.492577 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
273 06:52:40.499419 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
274 06:52:40.502867 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
275 06:52:40.506076 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
276 06:52:40.512742 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
277 06:52:40.516591 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
278 06:52:40.519531 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
279 06:52:40.522414 TCO_STS: 0000 0000
280 06:52:40.526057 GEN_PMCON: d0015038 00002200
281 06:52:40.529068 GBLRST_CAUSE: 00000000 00000000
282 06:52:40.529153 HPR_CAUSE0: 00000000
283 06:52:40.532332
284 06:52:40.532423 prev_sleep_state 5
285 06:52:40.535947 Boot Count incremented to 12342
286 06:52:40.542368 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
287 06:52:40.548914 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
288 06:52:40.558923 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
289 06:52:40.565734 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
290 06:52:40.568619 Chrome EC: UHEPI supported
291 06:52:40.575179 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
292 06:52:40.586624 Probing TPM: done!
293 06:52:40.592956 Connected to device vid:did:rid of 1ae0:0028:00
294 06:52:40.603552 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
295 06:52:40.606775 Initialized TPM device CR50 revision 0
296 06:52:40.621683 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
297 06:52:40.628316 MRC: Hash idx 0x100b comparison successful.
298 06:52:40.631363 MRC cache found, size faa8
299 06:52:40.631448 bootmode is set to: 2
300 06:52:40.634345 SPD index = 2
301 06:52:40.641103 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
302 06:52:40.644706 SPD: module type is LPDDR4X
303 06:52:40.647929 SPD: module part number is MT53D1G64D4NW-046
304 06:52:40.654768 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
305 06:52:40.660938 SPD: device width 16 bits, bus width 16 bits
306 06:52:40.664660 SPD: module size is 2048 MB (per channel)
307 06:52:41.094873 CBMEM:
308 06:52:41.098109 IMD: root @ 0x76fff000 254 entries.
309 06:52:41.101618 IMD: root @ 0x76ffec00 62 entries.
310 06:52:41.104504 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
311 06:52:41.111515 FMAP: area RW_VPD found @ f35000 (8192 bytes)
312 06:52:41.114350 External stage cache:
313 06:52:41.117692 IMD: root @ 0x7b3ff000 254 entries.
314 06:52:41.121047 IMD: root @ 0x7b3fec00 62 entries.
315 06:52:41.135986 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
316 06:52:41.142637 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
317 06:52:41.149132 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
318 06:52:41.162640 MRC: 'RECOVERY_MRC_CACHE' does not need update.
319 06:52:41.169648 cse_lite: Skip switching to RW in the recovery path
320 06:52:41.169737 8 DIMMs found
321 06:52:41.169806 SMM Memory Map
322 06:52:41.172702 SMRAM : 0x7b000000 0x800000
323 06:52:41.175934
324 06:52:41.179309 Subregion 0: 0x7b000000 0x200000
325 06:52:41.182778 Subregion 1: 0x7b200000 0x200000
326 06:52:41.185943 Subregion 2: 0x7b400000 0x400000
327 06:52:41.186027 top_of_ram = 0x77000000
328 06:52:41.192996 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
329 06:52:41.199078 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
330 06:52:41.202380 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
331 06:52:41.209042 MTRR Range: Start=ff000000 End=0 (Size 1000000)
332 06:52:41.215908 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
333 06:52:41.222511 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
334 06:52:41.232599 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
335 06:52:41.235839 Processing 211 relocs. Offset value of 0x74c0b000
336 06:52:41.239102
337 06:52:41.245865 BS: romstage times (exec / console): total (unknown) / 277 ms
338 06:52:41.251711
339 06:52:41.251797
340 06:52:41.259134 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
341 06:52:41.265745 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
342 06:52:41.272626 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
343 06:52:41.279255 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
344 06:52:41.289064 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
345 06:52:41.295839 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
346 06:52:41.338330 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
347 06:52:41.344871 Processing 5008 relocs. Offset value of 0x75d98000
348 06:52:41.348435 BS: postcar times (exec / console): total (unknown) / 59 ms
349 06:52:41.348520
350 06:52:41.351873
351 06:52:41.351957
352 06:52:41.361430 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
353 06:52:41.361519 Normal boot
354 06:52:41.364659 FW_CONFIG value is 0x804c02
355 06:52:41.367955 PCI: 00:07.0 disabled by fw_config
356 06:52:41.371360 PCI: 00:07.1 disabled by fw_config
357 06:52:41.374800 PCI: 00:0d.2 disabled by fw_config
358 06:52:41.378125 PCI: 00:1c.7 disabled by fw_config
359 06:52:41.381419
360 06:52:41.384870 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
361 06:52:41.391149 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
362 06:52:41.394592 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
363 06:52:41.397829 GENERIC: 0.0 disabled by fw_config
364 06:52:41.401153
365 06:52:41.404402 GENERIC: 1.0 disabled by fw_config
366 06:52:41.407853 fw_config match found: DB_USB=USB3_ACTIVE
367 06:52:41.411186 fw_config match found: DB_USB=USB3_ACTIVE
368 06:52:41.414710 fw_config match found: DB_USB=USB3_ACTIVE
369 06:52:41.421423 fw_config match found: DB_USB=USB3_ACTIVE
370 06:52:41.424221 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
371 06:52:41.430946 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
372 06:52:41.440937 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
373 06:52:41.447508 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
374 06:52:41.450803 microcode: sig=0x806c1 pf=0x80 revision=0x86
375 06:52:41.453957
376 06:52:41.457451 microcode: Update skipped, already up-to-date
377 06:52:41.464010 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
378 06:52:41.491771 Detected 4 core, 8 thread CPU.
379 06:52:41.495076 Setting up SMI for CPU
380 06:52:41.498615 IED base = 0x7b400000
381 06:52:41.498699 IED size = 0x00400000
382 06:52:41.501711 Will perform SMM setup.
383 06:52:41.508744 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
384 06:52:41.514859 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
385 06:52:41.521857 Processing 16 relocs. Offset value of 0x00030000
386 06:52:41.525290 Attempting to start 7 APs
387 06:52:41.528814 Waiting for 10ms after sending INIT.
388 06:52:41.543712 Waiting for 1st SIPI to complete...AP: slot 5 apic_id 4.
389 06:52:41.547236 AP: slot 4 apic_id 5.
390 06:52:41.550123 AP: slot 2 apic_id 3.
391 06:52:41.550207 AP: slot 6 apic_id 2.
392 06:52:41.553414 AP: slot 7 apic_id 6.
393 06:52:41.556682 AP: slot 3 apic_id 7.
394 06:52:41.556766 done.
395 06:52:41.556833 AP: slot 1 apic_id 1.
396 06:52:41.560261
397 06:52:41.563630 Waiting for 2nd SIPI to complete...done.
398 06:52:41.570172 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
399 06:52:41.576842 Processing 13 relocs. Offset value of 0x00038000
400 06:52:41.580387 Unable to locate Global NVS
401 06:52:41.586758 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
402 06:52:41.589735 Installing permanent SMM handler to 0x7b000000
403 06:52:41.599817 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
404 06:52:41.603395 Processing 794 relocs. Offset value of 0x7b010000
405 06:52:41.612903 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
406 06:52:41.616221 Processing 13 relocs. Offset value of 0x7b008000
407 06:52:41.622724 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
408 06:52:41.629810 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
409 06:52:41.636335 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
410 06:52:41.639319 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
411 06:52:41.646698 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
412 06:52:41.653101 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
413 06:52:41.659591 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
414 06:52:41.663091 Unable to locate Global NVS
415 06:52:41.669506 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
416 06:52:41.672386 Clearing SMI status registers
417 06:52:41.672471 SMI_STS: PM1
418 06:52:41.676136
419 06:52:41.676221 PM1_STS: PWRBTN
420 06:52:41.682413 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
421 06:52:41.685825 In relocation handler: CPU 0
422 06:52:41.689272 New SMBASE=0x7b000000 IEDBASE=0x7b400000
423 06:52:41.695601 Writing SMRR. base = 0x7b000006, mask=0xff800c00
424 06:52:41.698934 Relocation complete.
425 06:52:41.705471 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
426 06:52:41.708736 In relocation handler: CPU 1
427 06:52:41.712522 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
428 06:52:41.715519 Relocation complete.
429 06:52:41.721946 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
430 06:52:41.725300 In relocation handler: CPU 5
431 06:52:41.728828 New SMBASE=0x7affec00 IEDBASE=0x7b400000
432 06:52:41.732165 Writing SMRR. base = 0x7b000006, mask=0xff800c00
433 06:52:41.735286 Relocation complete.
434 06:52:41.741756 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
435 06:52:41.745028 In relocation handler: CPU 4
436 06:52:41.748496 New SMBASE=0x7afff000 IEDBASE=0x7b400000
437 06:52:41.751689 Relocation complete.
438 06:52:41.758414 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
439 06:52:41.761676 In relocation handler: CPU 2
440 06:52:41.765141 New SMBASE=0x7afff800 IEDBASE=0x7b400000
441 06:52:41.768101 Relocation complete.
442 06:52:41.775030 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
443 06:52:41.777975 In relocation handler: CPU 6
444 06:52:41.782088 New SMBASE=0x7affe800 IEDBASE=0x7b400000
445 06:52:41.788151 Writing SMRR. base = 0x7b000006, mask=0xff800c00
446 06:52:41.788238 Relocation complete.
447 06:52:41.798101 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
448 06:52:41.798188 In relocation handler: CPU 7
449 06:52:41.801247
450 06:52:41.804666 New SMBASE=0x7affe400 IEDBASE=0x7b400000
451 06:52:41.807759 Writing SMRR. base = 0x7b000006, mask=0xff800c00
452 06:52:41.811110 Relocation complete.
453 06:52:41.817975 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
454 06:52:41.821337 In relocation handler: CPU 3
455 06:52:41.824396 New SMBASE=0x7afff400 IEDBASE=0x7b400000
456 06:52:41.827743 Relocation complete.
457 06:52:41.831096 Initializing CPU #0
458 06:52:41.834559 CPU: vendor Intel device 806c1
459 06:52:41.837596 CPU: family 06, model 8c, stepping 01
460 06:52:41.837680 Clearing out pending MCEs
461 06:52:41.840665
462 06:52:41.840749 Setting up local APIC...
463 06:52:41.844278 apic_id: 0x00 done.
464 06:52:41.847312 Turbo is available but hidden
465 06:52:41.850652 Turbo is available and visible
466 06:52:41.854165 microcode: Update skipped, already up-to-date
467 06:52:41.857478 CPU #0 initialized
468 06:52:41.860754 Initializing CPU #5
469 06:52:41.860838 Initializing CPU #4
470 06:52:41.863932 CPU: vendor Intel device 806c1
471 06:52:41.867231 CPU: family 06, model 8c, stepping 01
472 06:52:41.870918 CPU: vendor Intel device 806c1
473 06:52:41.874124 CPU: family 06, model 8c, stepping 01
474 06:52:41.877478 Clearing out pending MCEs
475 06:52:41.880606 Clearing out pending MCEs
476 06:52:41.883826 Setting up local APIC...
477 06:52:41.883910 Initializing CPU #3
478 06:52:41.888055 Initializing CPU #7
479 06:52:41.890419 CPU: vendor Intel device 806c1
480 06:52:41.893839 CPU: family 06, model 8c, stepping 01
481 06:52:41.897014 CPU: vendor Intel device 806c1
482 06:52:41.900309 CPU: family 06, model 8c, stepping 01
483 06:52:41.904072 Clearing out pending MCEs
484 06:52:41.907715 Clearing out pending MCEs
485 06:52:41.907792 Setting up local APIC...
486 06:52:41.910347 Setting up local APIC...
487 06:52:41.913907 Setting up local APIC...
488 06:52:41.917285 Initializing CPU #2
489 06:52:41.917370 Initializing CPU #6
490 06:52:41.920192 CPU: vendor Intel device 806c1
491 06:52:41.924131 CPU: family 06, model 8c, stepping 01
492 06:52:41.927576 Initializing CPU #1
493 06:52:41.927660 apic_id: 0x07 done.
494 06:52:41.931056 apic_id: 0x06 done.
495 06:52:41.934778 microcode: Update skipped, already up-to-date
496 06:52:41.941102 microcode: Update skipped, already up-to-date
497 06:52:41.941187 CPU #3 initialized
498 06:52:41.944664 CPU #7 initialized
499 06:52:41.947995 Clearing out pending MCEs
500 06:52:41.950913 CPU: vendor Intel device 806c1
501 06:52:41.954308 CPU: family 06, model 8c, stepping 01
502 06:52:41.958136 Setting up local APIC...
503 06:52:41.958220 apic_id: 0x04 done.
504 06:52:41.961032 Clearing out pending MCEs
505 06:52:41.964322 apic_id: 0x03 done.
506 06:52:41.964406 Setting up local APIC...
507 06:52:41.971028 microcode: Update skipped, already up-to-date
508 06:52:41.971117 apic_id: 0x02 done.
509 06:52:41.974333 CPU #2 initialized
510 06:52:41.977709 microcode: Update skipped, already up-to-date
511 06:52:41.980952 CPU: vendor Intel device 806c1
512 06:52:41.984264 CPU: family 06, model 8c, stepping 01
513 06:52:41.987503 CPU #6 initialized
514 06:52:41.990812 Clearing out pending MCEs
515 06:52:41.994389 microcode: Update skipped, already up-to-date
516 06:52:41.997671 apic_id: 0x05 done.
517 06:52:41.997756 CPU #5 initialized
518 06:52:42.000937 Setting up local APIC...
519 06:52:42.007151 microcode: Update skipped, already up-to-date
520 06:52:42.007236 apic_id: 0x01 done.
521 06:52:42.010781 CPU #4 initialized
522 06:52:42.014083 microcode: Update skipped, already up-to-date
523 06:52:42.017544 CPU #1 initialized
524 06:52:42.020584 bsp_do_flight_plan done after 454 msecs.
525 06:52:42.024066 CPU: frequency set to 4400 MHz
526 06:52:42.027116 Enabling SMIs.
527 06:52:42.034188 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
528 06:52:42.048364 SATAXPCIE1 indicates PCIe NVMe is present
529 06:52:42.051893 Probing TPM: done!
530 06:52:42.055575 Connected to device vid:did:rid of 1ae0:0028:00
531 06:52:42.066002 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
532 06:52:42.069179 Initialized TPM device CR50 revision 0
533 06:52:42.072448 Enabling S0i3.4
534 06:52:42.078738 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
535 06:52:42.082669 Found a VBT of 8704 bytes after decompression
536 06:52:42.089003 cse_lite: CSE RO boot. HybridStorageMode disabled
537 06:52:42.095556 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
538 06:52:42.169890 FSPS returned 0
539 06:52:42.173415 Executing Phase 1 of FspMultiPhaseSiInit
540 06:52:42.182828 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
541 06:52:42.186298 port C0 DISC req: usage 1 usb3 1 usb2 5
542 06:52:42.189607 Raw Buffer output 0 00000511
543 06:52:42.192862 Raw Buffer output 1 00000000
544 06:52:42.196646 pmc_send_ipc_cmd succeeded
545 06:52:42.199992 port C1 DISC req: usage 1 usb3 2 usb2 3
546 06:52:42.203301
547 06:52:42.203387 Raw Buffer output 0 00000321
548 06:52:42.206637 Raw Buffer output 1 00000000
549 06:52:42.210795 pmc_send_ipc_cmd succeeded
550 06:52:42.215938 Detected 4 core, 8 thread CPU.
551 06:52:42.219380 Detected 4 core, 8 thread CPU.
552 06:52:42.419592 Display FSP Version Info HOB
553 06:52:42.422842 Reference Code - CPU = a.0.4c.31
554 06:52:42.426241 uCode Version = 0.0.0.86
555 06:52:42.429829 TXT ACM version = ff.ff.ff.ffff
556 06:52:42.432594 Reference Code - ME = a.0.4c.31
557 06:52:42.436343 MEBx version = 0.0.0.0
558 06:52:42.439299 ME Firmware Version = Consumer SKU
559 06:52:42.443030 Reference Code - PCH = a.0.4c.31
560 06:52:42.446055 PCH-CRID Status = Disabled
561 06:52:42.449342 PCH-CRID Original Value = ff.ff.ff.ffff
562 06:52:42.452893 PCH-CRID New Value = ff.ff.ff.ffff
563 06:52:42.456305 OPROM - RST - RAID = ff.ff.ff.ffff
564 06:52:42.459082 PCH Hsio Version = 4.0.0.0
565 06:52:42.462412 Reference Code - SA - System Agent = a.0.4c.31
566 06:52:42.465988 Reference Code - MRC = 2.0.0.1
567 06:52:42.469240 SA - PCIe Version = a.0.4c.31
568 06:52:42.472787 SA-CRID Status = Disabled
569 06:52:42.475643 SA-CRID Original Value = 0.0.0.1
570 06:52:42.479417 SA-CRID New Value = 0.0.0.1
571 06:52:42.482691 OPROM - VBIOS = ff.ff.ff.ffff
572 06:52:42.485479 IO Manageability Engine FW Version = 11.1.4.0
573 06:52:42.489093 PHY Build Version = 0.0.0.e0
574 06:52:42.492022 Thunderbolt(TM) FW Version = 0.0.0.0
575 06:52:42.498689 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
576 06:52:42.502388 ITSS IRQ Polarities Before:
577 06:52:42.502465 IPC0: 0xffffffff
578 06:52:42.505668 IPC1: 0xffffffff
579 06:52:42.505743 IPC2: 0xffffffff
580 06:52:42.509340 IPC3: 0xffffffff
581 06:52:42.513128 ITSS IRQ Polarities After:
582 06:52:42.513205 IPC0: 0xffffffff
583 06:52:42.516444 IPC1: 0xffffffff
584 06:52:42.516522 IPC2: 0xffffffff
585 06:52:42.519639 IPC3: 0xffffffff
586 06:52:42.523047 Found PCIe Root Port #9 at PCI: 00:1d.0.
587 06:52:42.533002 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
588 06:52:42.536412
589 06:52:42.546527 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
590 06:52:42.560065 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
591 06:52:42.566320 BS: BS_DEV_INIT_CHIPS run times (exec / console): 290 / 236 ms
592 06:52:42.566409 Enumerating buses...
593 06:52:42.572641 Show all devs... Before device enumeration.
594 06:52:42.572734 Root Device: enabled 1
595 06:52:42.575824 DOMAIN: 0000: enabled 1
596 06:52:42.579329 CPU_CLUSTER: 0: enabled 1
597 06:52:42.582452 PCI: 00:00.0: enabled 1
598 06:52:42.582538 PCI: 00:02.0: enabled 1
599 06:52:42.586045 PCI: 00:04.0: enabled 1
600 06:52:42.589653 PCI: 00:05.0: enabled 1
601 06:52:42.592459 PCI: 00:06.0: enabled 0
602 06:52:42.592568 PCI: 00:07.0: enabled 0
603 06:52:42.595704 PCI: 00:07.1: enabled 0
604 06:52:42.598975 PCI: 00:07.2: enabled 0
605 06:52:42.602207 PCI: 00:07.3: enabled 0
606 06:52:42.602293 PCI: 00:08.0: enabled 1
607 06:52:42.605817 PCI: 00:09.0: enabled 0
608 06:52:42.609097 PCI: 00:0a.0: enabled 0
609 06:52:42.612530 PCI: 00:0d.0: enabled 1
610 06:52:42.612613 PCI: 00:0d.1: enabled 0
611 06:52:42.616209 PCI: 00:0d.2: enabled 0
612 06:52:42.618861 PCI: 00:0d.3: enabled 0
613 06:52:42.618991 PCI: 00:0e.0: enabled 0
614 06:52:42.622146
615 06:52:42.622229 PCI: 00:10.2: enabled 1
616 06:52:42.625460 PCI: 00:10.6: enabled 0
617 06:52:42.629227 PCI: 00:10.7: enabled 0
618 06:52:42.629322 PCI: 00:12.0: enabled 0
619 06:52:42.632281 PCI: 00:12.6: enabled 0
620 06:52:42.635849 PCI: 00:13.0: enabled 0
621 06:52:42.638532 PCI: 00:14.0: enabled 1
622 06:52:42.638616 PCI: 00:14.1: enabled 0
623 06:52:42.642280 PCI: 00:14.2: enabled 1
624 06:52:42.645200 PCI: 00:14.3: enabled 1
625 06:52:42.649336 PCI: 00:15.0: enabled 1
626 06:52:42.649420 PCI: 00:15.1: enabled 1
627 06:52:42.652106 PCI: 00:15.2: enabled 1
628 06:52:42.655480 PCI: 00:15.3: enabled 1
629 06:52:42.658690 PCI: 00:16.0: enabled 1
630 06:52:42.658775 PCI: 00:16.1: enabled 0
631 06:52:42.662145 PCI: 00:16.2: enabled 0
632 06:52:42.665075 PCI: 00:16.3: enabled 0
633 06:52:42.668478 PCI: 00:16.4: enabled 0
634 06:52:42.668562 PCI: 00:16.5: enabled 0
635 06:52:42.671705 PCI: 00:17.0: enabled 1
636 06:52:42.675253 PCI: 00:19.0: enabled 0
637 06:52:42.675338 PCI: 00:19.1: enabled 1
638 06:52:42.678560
639 06:52:42.678646 PCI: 00:19.2: enabled 0
640 06:52:42.681603 PCI: 00:1c.0: enabled 1
641 06:52:42.685328 PCI: 00:1c.1: enabled 0
642 06:52:42.685413 PCI: 00:1c.2: enabled 0
643 06:52:42.688211 PCI: 00:1c.3: enabled 0
644 06:52:42.691550 PCI: 00:1c.4: enabled 0
645 06:52:42.694790 PCI: 00:1c.5: enabled 0
646 06:52:42.694886 PCI: 00:1c.6: enabled 1
647 06:52:42.698211 PCI: 00:1c.7: enabled 0
648 06:52:42.701383 PCI: 00:1d.0: enabled 1
649 06:52:42.704998 PCI: 00:1d.1: enabled 0
650 06:52:42.705082 PCI: 00:1d.2: enabled 1
651 06:52:42.708336 PCI: 00:1d.3: enabled 0
652 06:52:42.711250 PCI: 00:1e.0: enabled 1
653 06:52:42.714388 PCI: 00:1e.1: enabled 0
654 06:52:42.714473 PCI: 00:1e.2: enabled 1
655 06:52:42.718485 PCI: 00:1e.3: enabled 1
656 06:52:42.721729 PCI: 00:1f.0: enabled 1
657 06:52:42.724440 PCI: 00:1f.1: enabled 0
658 06:52:42.724525 PCI: 00:1f.2: enabled 1
659 06:52:42.727930 PCI: 00:1f.3: enabled 1
660 06:52:42.731338 PCI: 00:1f.4: enabled 0
661 06:52:42.734733 PCI: 00:1f.5: enabled 1
662 06:52:42.734818 PCI: 00:1f.6: enabled 0
663 06:52:42.738073 PCI: 00:1f.7: enabled 0
664 06:52:42.741227 APIC: 00: enabled 1
665 06:52:42.741311 GENERIC: 0.0: enabled 1
666 06:52:42.744627 GENERIC: 0.0: enabled 1
667 06:52:42.747661 GENERIC: 1.0: enabled 1
668 06:52:42.751340 GENERIC: 0.0: enabled 1
669 06:52:42.751429 GENERIC: 1.0: enabled 1
670 06:52:42.754184 USB0 port 0: enabled 1
671 06:52:42.757605 GENERIC: 0.0: enabled 1
672 06:52:42.757688 USB0 port 0: enabled 1
673 06:52:42.761132 GENERIC: 0.0: enabled 1
674 06:52:42.764222 I2C: 00:1a: enabled 1
675 06:52:42.767447 I2C: 00:31: enabled 1
676 06:52:42.767531 I2C: 00:32: enabled 1
677 06:52:42.771010 I2C: 00:10: enabled 1
678 06:52:42.774018 I2C: 00:15: enabled 1
679 06:52:42.774101 GENERIC: 0.0: enabled 0
680 06:52:42.777389 GENERIC: 1.0: enabled 0
681 06:52:42.780583 GENERIC: 0.0: enabled 1
682 06:52:42.780669 SPI: 00: enabled 1
683 06:52:42.784105 SPI: 00: enabled 1
684 06:52:42.787682 PNP: 0c09.0: enabled 1
685 06:52:42.787767 GENERIC: 0.0: enabled 1
686 06:52:42.790611 USB3 port 0: enabled 1
687 06:52:42.793683 USB3 port 1: enabled 1
688 06:52:42.797196 USB3 port 2: enabled 0
689 06:52:42.797280 USB3 port 3: enabled 0
690 06:52:42.800768 USB2 port 0: enabled 0
691 06:52:42.803826 USB2 port 1: enabled 1
692 06:52:42.803910 USB2 port 2: enabled 1
693 06:52:42.807352 USB2 port 3: enabled 0
694 06:52:42.810535 USB2 port 4: enabled 1
695 06:52:42.813792 USB2 port 5: enabled 0
696 06:52:42.813877 USB2 port 6: enabled 0
697 06:52:42.817406 USB2 port 7: enabled 0
698 06:52:42.820353 USB2 port 8: enabled 0
699 06:52:42.820438 USB2 port 9: enabled 0
700 06:52:42.823621 USB3 port 0: enabled 0
701 06:52:42.827209 USB3 port 1: enabled 1
702 06:52:42.830203 USB3 port 2: enabled 0
703 06:52:42.830288 USB3 port 3: enabled 0
704 06:52:42.833666 GENERIC: 0.0: enabled 1
705 06:52:42.836692 GENERIC: 1.0: enabled 1
706 06:52:42.836775 APIC: 01: enabled 1
707 06:52:42.840169 APIC: 03: enabled 1
708 06:52:42.843631 APIC: 07: enabled 1
709 06:52:42.843715 APIC: 05: enabled 1
710 06:52:42.847227 APIC: 04: enabled 1
711 06:52:42.847309 APIC: 02: enabled 1
712 06:52:42.850308 APIC: 06: enabled 1
713 06:52:42.853696 Compare with tree...
714 06:52:42.853777 Root Device: enabled 1
715 06:52:42.856576 DOMAIN: 0000: enabled 1
716 06:52:42.859814 PCI: 00:00.0: enabled 1
717 06:52:42.863320 PCI: 00:02.0: enabled 1
718 06:52:42.866724 PCI: 00:04.0: enabled 1
719 06:52:42.866805 GENERIC: 0.0: enabled 1
720 06:52:42.869998 PCI: 00:05.0: enabled 1
721 06:52:42.873025 PCI: 00:06.0: enabled 0
722 06:52:42.876743 PCI: 00:07.0: enabled 0
723 06:52:42.879632 GENERIC: 0.0: enabled 1
724 06:52:42.879767 PCI: 00:07.1: enabled 0
725 06:52:42.883660 GENERIC: 1.0: enabled 1
726 06:52:42.886320 PCI: 00:07.2: enabled 0
727 06:52:42.889500 GENERIC: 0.0: enabled 1
728 06:52:42.892980 PCI: 00:07.3: enabled 0
729 06:52:42.896714 GENERIC: 1.0: enabled 1
730 06:52:42.896814 PCI: 00:08.0: enabled 1
731 06:52:42.899660 PCI: 00:09.0: enabled 0
732 06:52:42.903001 PCI: 00:0a.0: enabled 0
733 06:52:42.906739 PCI: 00:0d.0: enabled 1
734 06:52:42.906834 USB0 port 0: enabled 1
735 06:52:42.909631
736 06:52:42.909713 USB3 port 0: enabled 1
737 06:52:42.913119 USB3 port 1: enabled 1
738 06:52:42.916292 USB3 port 2: enabled 0
739 06:52:42.919444 USB3 port 3: enabled 0
740 06:52:42.922412 PCI: 00:0d.1: enabled 0
741 06:52:42.922494 PCI: 00:0d.2: enabled 0
742 06:52:42.925971 GENERIC: 0.0: enabled 1
743 06:52:42.929214 PCI: 00:0d.3: enabled 0
744 06:52:42.932422 PCI: 00:0e.0: enabled 0
745 06:52:42.935898 PCI: 00:10.2: enabled 1
746 06:52:42.935982 PCI: 00:10.6: enabled 0
747 06:52:42.939374 PCI: 00:10.7: enabled 0
748 06:52:42.942260 PCI: 00:12.0: enabled 0
749 06:52:42.945700 PCI: 00:12.6: enabled 0
750 06:52:42.949077 PCI: 00:13.0: enabled 0
751 06:52:42.949160 PCI: 00:14.0: enabled 1
752 06:52:42.952369 USB0 port 0: enabled 1
753 06:52:42.955984 USB2 port 0: enabled 0
754 06:52:42.959021 USB2 port 1: enabled 1
755 06:52:42.962734 USB2 port 2: enabled 1
756 06:52:42.965758 USB2 port 3: enabled 0
757 06:52:42.965841 USB2 port 4: enabled 1
758 06:52:42.969114 USB2 port 5: enabled 0
759 06:52:42.972461 USB2 port 6: enabled 0
760 06:52:42.975801 USB2 port 7: enabled 0
761 06:52:42.978836 USB2 port 8: enabled 0
762 06:52:42.978950 USB2 port 9: enabled 0
763 06:52:42.982479
764 06:52:42.982575 USB3 port 0: enabled 0
765 06:52:42.985315 USB3 port 1: enabled 1
766 06:52:42.988969 USB3 port 2: enabled 0
767 06:52:42.992139 USB3 port 3: enabled 0
768 06:52:42.995657 PCI: 00:14.1: enabled 0
769 06:52:42.995740 PCI: 00:14.2: enabled 1
770 06:52:42.999232 PCI: 00:14.3: enabled 1
771 06:52:43.002062 GENERIC: 0.0: enabled 1
772 06:52:43.005035 PCI: 00:15.0: enabled 1
773 06:52:43.008537 I2C: 00:1a: enabled 1
774 06:52:43.008621 I2C: 00:31: enabled 1
775 06:52:43.011836 I2C: 00:32: enabled 1
776 06:52:43.015499 PCI: 00:15.1: enabled 1
777 06:52:43.018813 I2C: 00:10: enabled 1
778 06:52:43.018919 PCI: 00:15.2: enabled 1
779 06:52:43.022108
780 06:52:43.022192 PCI: 00:15.3: enabled 1
781 06:52:43.025365 PCI: 00:16.0: enabled 1
782 06:52:43.028720 PCI: 00:16.1: enabled 0
783 06:52:43.031481 PCI: 00:16.2: enabled 0
784 06:52:43.031565 PCI: 00:16.3: enabled 0
785 06:52:43.035056
786 06:52:43.035140 PCI: 00:16.4: enabled 0
787 06:52:43.038261 PCI: 00:16.5: enabled 0
788 06:52:43.041608 PCI: 00:17.0: enabled 1
789 06:52:43.044996 PCI: 00:19.0: enabled 0
790 06:52:43.045079 PCI: 00:19.1: enabled 1
791 06:52:43.048455 I2C: 00:15: enabled 1
792 06:52:43.051560 PCI: 00:19.2: enabled 0
793 06:52:43.054854 PCI: 00:1d.0: enabled 1
794 06:52:43.057870 GENERIC: 0.0: enabled 1
795 06:52:43.057958 PCI: 00:1e.0: enabled 1
796 06:52:43.061520
797 06:52:43.061605 PCI: 00:1e.1: enabled 0
798 06:52:43.064685 PCI: 00:1e.2: enabled 1
799 06:52:43.068073 SPI: 00: enabled 1
800 06:52:43.071242 PCI: 00:1e.3: enabled 1
801 06:52:43.071340 SPI: 00: enabled 1
802 06:52:43.074468 PCI: 00:1f.0: enabled 1
803 06:52:43.078216 PNP: 0c09.0: enabled 1
804 06:52:43.081067 PCI: 00:1f.1: enabled 0
805 06:52:43.081152 PCI: 00:1f.2: enabled 1
806 06:52:43.084320 GENERIC: 0.0: enabled 1
807 06:52:43.087805 GENERIC: 0.0: enabled 1
808 06:52:43.090911 GENERIC: 1.0: enabled 1
809 06:52:43.094366 PCI: 00:1f.3: enabled 1
810 06:52:43.146520 PCI: 00:1f.4: enabled 0
811 06:52:43.146662 PCI: 00:1f.5: enabled 1
812 06:52:43.146730 PCI: 00:1f.6: enabled 0
813 06:52:43.146989 PCI: 00:1f.7: enabled 0
814 06:52:43.147058 CPU_CLUSTER: 0: enabled 1
815 06:52:43.147301 APIC: 00: enabled 1
816 06:52:43.147370 APIC: 01: enabled 1
817 06:52:43.147438 APIC: 03: enabled 1
818 06:52:43.147681 APIC: 07: enabled 1
819 06:52:43.147745 APIC: 05: enabled 1
820 06:52:43.147802 APIC: 04: enabled 1
821 06:52:43.148051 APIC: 02: enabled 1
822 06:52:43.148126 APIC: 06: enabled 1
823 06:52:43.148186 Root Device scanning...
824 06:52:43.148426
825 06:52:43.148497 scan_static_bus for Root Device
826 06:52:43.148552 DOMAIN: 0000 enabled
827 06:52:43.148608 CPU_CLUSTER: 0 enabled
828 06:52:43.148662 DOMAIN: 0000 scanning...
829 06:52:43.148898 PCI: pci_scan_bus for bus 00
830 06:52:43.148958 PCI: 00:00.0 [8086/0000] ops
831 06:52:43.196814 PCI: 00:00.0 [8086/9a12] enabled
832 06:52:43.196967 PCI: 00:02.0 [8086/0000] bus ops
833 06:52:43.197232 PCI: 00:02.0 [8086/9a40] enabled
834 06:52:43.197301 PCI: 00:04.0 [8086/0000] bus ops
835 06:52:43.197645 PCI: 00:04.0 [8086/9a03] enabled
836 06:52:43.197729 PCI: 00:05.0 [8086/9a19] enabled
837 06:52:43.198057 PCI: 00:07.0 [0000/0000] hidden
838 06:52:43.198140 PCI: 00:08.0 [8086/9a11] enabled
839 06:52:43.198518 PCI: 00:0a.0 [8086/9a0d] disabled
840 06:52:43.198586 PCI: 00:0d.0 [8086/0000] bus ops
841 06:52:43.199136 PCI: 00:0d.0 [8086/9a13] enabled
842 06:52:43.199219 PCI: 00:14.0 [8086/0000] bus ops
843 06:52:43.199642 PCI: 00:14.0 [8086/a0ed] enabled
844 06:52:43.200485 PCI: 00:14.2 [8086/a0ef] enabled
845 06:52:43.200568 PCI: 00:14.3 [8086/0000] bus ops
846 06:52:43.246834 PCI: 00:14.3 [8086/a0f0] enabled
847 06:52:43.246982 PCI: 00:15.0 [8086/0000] bus ops
848 06:52:43.247298 PCI: 00:15.0 [8086/a0e8] enabled
849 06:52:43.247381 PCI: 00:15.1 [8086/0000] bus ops
850 06:52:43.248080 PCI: 00:15.1 [8086/a0e9] enabled
851 06:52:43.248164 PCI: 00:15.2 [8086/0000] bus ops
852 06:52:43.248230 PCI: 00:15.2 [8086/a0ea] enabled
853 06:52:43.248291 PCI: 00:15.3 [8086/0000] bus ops
854 06:52:43.248644 PCI: 00:15.3 [8086/a0eb] enabled
855 06:52:43.248727 PCI: 00:16.0 [8086/0000] ops
856 06:52:43.249020 PCI: 00:16.0 [8086/a0e0] enabled
857 06:52:43.249535 PCI: Static device PCI: 00:17.0 not found, disabling it.
858 06:52:43.249619 PCI: 00:19.0 [8086/0000] bus ops
859 06:52:43.250092 PCI: 00:19.0 [8086/a0c5] disabled
860 06:52:43.250184 PCI: 00:19.1 [8086/0000] bus ops
861 06:52:43.255948 PCI: 00:19.1 [8086/a0c6] enabled
862 06:52:43.256034 PCI: 00:1d.0 [8086/0000] bus ops
863 06:52:43.259397 PCI: 00:1d.0 [8086/a0b0] enabled
864 06:52:43.259508 PCI: 00:1e.0 [8086/0000] ops
865 06:52:43.262909 PCI: 00:1e.0 [8086/a0a8] enabled
866 06:52:43.265798 PCI: 00:1e.2 [8086/0000] bus ops
867 06:52:43.269210 PCI: 00:1e.2 [8086/a0aa] enabled
868 06:52:43.272186 PCI: 00:1e.3 [8086/0000] bus ops
869 06:52:43.276034 PCI: 00:1e.3 [8086/a0ab] enabled
870 06:52:43.279013 PCI: 00:1f.0 [8086/0000] bus ops
871 06:52:43.282163 PCI: 00:1f.0 [8086/a087] enabled
872 06:52:43.285316 RTC Init
873 06:52:43.288889 Set power on after power failure.
874 06:52:43.288974 Disabling Deep S3
875 06:52:43.292008 Disabling Deep S3
876 06:52:43.295659 Disabling Deep S4
877 06:52:43.295745 Disabling Deep S4
878 06:52:43.298758 Disabling Deep S5
879 06:52:43.298843 Disabling Deep S5
880 06:52:43.301979 PCI: 00:1f.2 [0000/0000] hidden
881 06:52:43.305291 PCI: 00:1f.3 [8086/0000] bus ops
882 06:52:43.308356 PCI: 00:1f.3 [8086/a0c8] enabled
883 06:52:43.311669 PCI: 00:1f.5 [8086/0000] bus ops
884 06:52:43.315243 PCI: 00:1f.5 [8086/a0a4] enabled
885 06:52:43.318726 PCI: Leftover static devices:
886 06:52:43.321616 PCI: 00:10.2
887 06:52:43.321700 PCI: 00:10.6
888 06:52:43.321766 PCI: 00:10.7
889 06:52:43.325113 PCI: 00:06.0
890 06:52:43.325198 PCI: 00:07.1
891 06:52:43.328508 PCI: 00:07.2
892 06:52:43.328592 PCI: 00:07.3
893 06:52:43.331954 PCI: 00:09.0
894 06:52:43.332039 PCI: 00:0d.1
895 06:52:43.332105 PCI: 00:0d.2
896 06:52:43.335332 PCI: 00:0d.3
897 06:52:43.335417 PCI: 00:0e.0
898 06:52:43.338740 PCI: 00:12.0
899 06:52:43.338825 PCI: 00:12.6
900 06:52:43.338921 PCI: 00:13.0
901 06:52:43.341569 PCI: 00:14.1
902 06:52:43.341654 PCI: 00:16.1
903 06:52:43.345373 PCI: 00:16.2
904 06:52:43.345457 PCI: 00:16.3
905 06:52:43.348275 PCI: 00:16.4
906 06:52:43.348360 PCI: 00:16.5
907 06:52:43.348426 PCI: 00:17.0
908 06:52:43.351603 PCI: 00:19.2
909 06:52:43.351687 PCI: 00:1e.1
910 06:52:43.355163 PCI: 00:1f.1
911 06:52:43.355252 PCI: 00:1f.4
912 06:52:43.355321 PCI: 00:1f.6
913 06:52:43.358137 PCI: 00:1f.7
914 06:52:43.361870 PCI: Check your devicetree.cb.
915 06:52:43.364458 PCI: 00:02.0 scanning...
916 06:52:43.367951 scan_generic_bus for PCI: 00:02.0
917 06:52:43.371589 scan_generic_bus for PCI: 00:02.0 done
918 06:52:43.374788 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
919 06:52:43.378252 PCI: 00:04.0 scanning...
920 06:52:43.381001 scan_generic_bus for PCI: 00:04.0
921 06:52:43.384643 GENERIC: 0.0 enabled
922 06:52:43.391663 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
923 06:52:43.394287 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
924 06:52:43.397713 PCI: 00:0d.0 scanning...
925 06:52:43.401005 scan_static_bus for PCI: 00:0d.0
926 06:52:43.404172 USB0 port 0 enabled
927 06:52:43.404257 USB0 port 0 scanning...
928 06:52:43.407628 scan_static_bus for USB0 port 0
929 06:52:43.411178 USB3 port 0 enabled
930 06:52:43.414412 USB3 port 1 enabled
931 06:52:43.414534 USB3 port 2 disabled
932 06:52:43.417565 USB3 port 3 disabled
933 06:52:43.421215 USB3 port 0 scanning...
934 06:52:43.424200 scan_static_bus for USB3 port 0
935 06:52:43.427683 scan_static_bus for USB3 port 0 done
936 06:52:43.430815 scan_bus: bus USB3 port 0 finished in 6 msecs
937 06:52:43.433980 USB3 port 1 scanning...
938 06:52:43.437157 scan_static_bus for USB3 port 1
939 06:52:43.440555 scan_static_bus for USB3 port 1 done
940 06:52:43.443759 scan_bus: bus USB3 port 1 finished in 6 msecs
941 06:52:43.447132
942 06:52:43.450365 scan_static_bus for USB0 port 0 done
943 06:52:43.453722 scan_bus: bus USB0 port 0 finished in 43 msecs
944 06:52:43.457350 scan_static_bus for PCI: 00:0d.0 done
945 06:52:43.463644 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
946 06:52:43.463730 PCI: 00:14.0 scanning...
947 06:52:43.467365 scan_static_bus for PCI: 00:14.0
948 06:52:43.470227 USB0 port 0 enabled
949 06:52:43.473566 USB0 port 0 scanning...
950 06:52:43.476712 scan_static_bus for USB0 port 0
951 06:52:43.480379 USB2 port 0 disabled
952 06:52:43.480465 USB2 port 1 enabled
953 06:52:43.483632 USB2 port 2 enabled
954 06:52:43.483716 USB2 port 3 disabled
955 06:52:43.487192 USB2 port 4 enabled
956 06:52:43.490624 USB2 port 5 disabled
957 06:52:43.490709 USB2 port 6 disabled
958 06:52:43.493795 USB2 port 7 disabled
959 06:52:43.496893 USB2 port 8 disabled
960 06:52:43.496982 USB2 port 9 disabled
961 06:52:43.500280 USB3 port 0 disabled
962 06:52:43.503485 USB3 port 1 enabled
963 06:52:43.503568 USB3 port 2 disabled
964 06:52:43.506383 USB3 port 3 disabled
965 06:52:43.509780 USB2 port 1 scanning...
966 06:52:43.513142 scan_static_bus for USB2 port 1
967 06:52:43.516386 scan_static_bus for USB2 port 1 done
968 06:52:43.519949 scan_bus: bus USB2 port 1 finished in 6 msecs
969 06:52:43.523017 USB2 port 2 scanning...
970 06:52:43.526821 scan_static_bus for USB2 port 2
971 06:52:43.529886 scan_static_bus for USB2 port 2 done
972 06:52:43.532990 scan_bus: bus USB2 port 2 finished in 6 msecs
973 06:52:43.536282 USB2 port 4 scanning...
974 06:52:43.540219 scan_static_bus for USB2 port 4
975 06:52:43.542755 scan_static_bus for USB2 port 4 done
976 06:52:43.549858 scan_bus: bus USB2 port 4 finished in 6 msecs
977 06:52:43.552962 USB3 port 1 scanning...
978 06:52:43.556040 scan_static_bus for USB3 port 1
979 06:52:43.559742 scan_static_bus for USB3 port 1 done
980 06:52:43.563147 scan_bus: bus USB3 port 1 finished in 6 msecs
981 06:52:43.565965 scan_static_bus for USB0 port 0 done
982 06:52:43.572474 scan_bus: bus USB0 port 0 finished in 93 msecs
983 06:52:43.576219 scan_static_bus for PCI: 00:14.0 done
984 06:52:43.579615 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
985 06:52:43.582234 PCI: 00:14.3 scanning...
986 06:52:43.585580 scan_static_bus for PCI: 00:14.3
987 06:52:43.588968 GENERIC: 0.0 enabled
988 06:52:43.592213 scan_static_bus for PCI: 00:14.3 done
989 06:52:43.595971 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
990 06:52:43.599397 PCI: 00:15.0 scanning...
991 06:52:43.602760 scan_static_bus for PCI: 00:15.0
992 06:52:43.605347 I2C: 00:1a enabled
993 06:52:43.605434 I2C: 00:31 enabled
994 06:52:43.609056 I2C: 00:32 enabled
995 06:52:43.612349 scan_static_bus for PCI: 00:15.0 done
996 06:52:43.618864 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
997 06:52:43.618992 PCI: 00:15.1 scanning...
998 06:52:43.622100 scan_static_bus for PCI: 00:15.1
999 06:52:43.625632 I2C: 00:10 enabled
1000 06:52:43.628922 scan_static_bus for PCI: 00:15.1 done
1001 06:52:43.635525 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1002 06:52:43.635618 PCI: 00:15.2 scanning...
1003 06:52:43.638458 scan_static_bus for PCI: 00:15.2
1004 06:52:43.645475 scan_static_bus for PCI: 00:15.2 done
1005 06:52:43.648342 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1006 06:52:43.651835 PCI: 00:15.3 scanning...
1007 06:52:43.655205 scan_static_bus for PCI: 00:15.3
1008 06:52:43.658850 scan_static_bus for PCI: 00:15.3 done
1009 06:52:43.661458 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1010 06:52:43.664800 PCI: 00:19.1 scanning...
1011 06:52:43.668055 scan_static_bus for PCI: 00:19.1
1012 06:52:43.671519 I2C: 00:15 enabled
1013 06:52:43.674775 scan_static_bus for PCI: 00:19.1 done
1014 06:52:43.678206 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1015 06:52:43.681763 PCI: 00:1d.0 scanning...
1016 06:52:43.684947 do_pci_scan_bridge for PCI: 00:1d.0
1017 06:52:43.688027 PCI: pci_scan_bus for bus 01
1018 06:52:43.691124 PCI: 01:00.0 [15b7/5009] enabled
1019 06:52:43.694400 GENERIC: 0.0 enabled
1020 06:52:43.698398 Enabling Common Clock Configuration
1021 06:52:43.701406 L1 Sub-State supported from root port 29
1022 06:52:43.704254 L1 Sub-State Support = 0x5
1023 06:52:43.708064 CommonModeRestoreTime = 0x28
1024 06:52:43.711021 Power On Value = 0x16, Power On Scale = 0x0
1025 06:52:43.714647 ASPM: Enabled L1
1026 06:52:43.717522 PCIe: Max_Payload_Size adjusted to 128
1027 06:52:43.724502 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1028 06:52:43.724652 PCI: 00:1e.2 scanning...
1029 06:52:43.727412 scan_generic_bus for PCI: 00:1e.2
1030 06:52:43.730793
1031 06:52:43.730894 SPI: 00 enabled
1032 06:52:43.737757 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1033 06:52:43.740787 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1034 06:52:43.744138 PCI: 00:1e.3 scanning...
1035 06:52:43.747607 scan_generic_bus for PCI: 00:1e.3
1036 06:52:43.750924 SPI: 00 enabled
1037 06:52:43.753773 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1038 06:52:43.757232
1039 06:52:43.761071 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1040 06:52:43.764921 PCI: 00:1f.0 scanning...
1041 06:52:43.767740 scan_static_bus for PCI: 00:1f.0
1042 06:52:43.767825 PNP: 0c09.0 enabled
1043 06:52:43.770885 PNP: 0c09.0 scanning...
1044 06:52:43.774268 scan_static_bus for PNP: 0c09.0
1045 06:52:43.777967 scan_static_bus for PNP: 0c09.0 done
1046 06:52:43.780805 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1047 06:52:43.784386
1048 06:52:43.787668 scan_static_bus for PCI: 00:1f.0 done
1049 06:52:43.790615 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1050 06:52:43.794423 PCI: 00:1f.2 scanning...
1051 06:52:43.797343 scan_static_bus for PCI: 00:1f.2
1052 06:52:43.800554 GENERIC: 0.0 enabled
1053 06:52:43.800640 GENERIC: 0.0 scanning...
1054 06:52:43.803934 scan_static_bus for GENERIC: 0.0
1055 06:52:43.807494 GENERIC: 0.0 enabled
1056 06:52:43.810706 GENERIC: 1.0 enabled
1057 06:52:43.814220 scan_static_bus for GENERIC: 0.0 done
1058 06:52:43.817077 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1059 06:52:43.823988 scan_static_bus for PCI: 00:1f.2 done
1060 06:52:43.827578 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1061 06:52:43.830362 PCI: 00:1f.3 scanning...
1062 06:52:43.833522 scan_static_bus for PCI: 00:1f.3
1063 06:52:43.836902 scan_static_bus for PCI: 00:1f.3 done
1064 06:52:43.840108 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1065 06:52:43.843439 PCI: 00:1f.5 scanning...
1066 06:52:43.846811 scan_generic_bus for PCI: 00:1f.5
1067 06:52:43.853390 scan_generic_bus for PCI: 00:1f.5 done
1068 06:52:43.856834 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1069 06:52:43.859965 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1070 06:52:43.866494 scan_static_bus for Root Device done
1071 06:52:43.870100 scan_bus: bus Root Device finished in 736 msecs
1072 06:52:43.870187 done
1073 06:52:43.876420 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1074 06:52:43.879702 Chrome EC: UHEPI supported
1075 06:52:43.886369 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1076 06:52:43.892841 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1077 06:52:43.895999 SPI flash protection: WPSW=0 SRP0=1
1078 06:52:43.899567 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1079 06:52:43.905852 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1080 06:52:43.909338 found VGA at PCI: 00:02.0
1081 06:52:43.912933 Setting up VGA for PCI: 00:02.0
1082 06:52:43.915933 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1083 06:52:43.919459
1084 06:52:43.922272 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1085 06:52:43.925586 Allocating resources...
1086 06:52:43.925678 Reading resources...
1087 06:52:43.932682 Root Device read_resources bus 0 link: 0
1088 06:52:43.936059 DOMAIN: 0000 read_resources bus 0 link: 0
1089 06:52:43.939170 PCI: 00:04.0 read_resources bus 1 link: 0
1090 06:52:43.942001
1091 06:52:43.945556 PCI: 00:04.0 read_resources bus 1 link: 0 done
1092 06:52:43.952136 PCI: 00:0d.0 read_resources bus 0 link: 0
1093 06:52:43.955727 USB0 port 0 read_resources bus 0 link: 0
1094 06:52:43.962077 USB0 port 0 read_resources bus 0 link: 0 done
1095 06:52:43.965269 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1096 06:52:43.968655 PCI: 00:14.0 read_resources bus 0 link: 0
1097 06:52:43.975049 USB0 port 0 read_resources bus 0 link: 0
1098 06:52:43.978359 USB0 port 0 read_resources bus 0 link: 0 done
1099 06:52:43.985495 PCI: 00:14.0 read_resources bus 0 link: 0 done
1100 06:52:43.988161 PCI: 00:14.3 read_resources bus 0 link: 0
1101 06:52:43.995275 PCI: 00:14.3 read_resources bus 0 link: 0 done
1102 06:52:43.998721 PCI: 00:15.0 read_resources bus 0 link: 0
1103 06:52:44.005161 PCI: 00:15.0 read_resources bus 0 link: 0 done
1104 06:52:44.008312 PCI: 00:15.1 read_resources bus 0 link: 0
1105 06:52:44.014845 PCI: 00:15.1 read_resources bus 0 link: 0 done
1106 06:52:44.018821 PCI: 00:19.1 read_resources bus 0 link: 0
1107 06:52:44.025354 PCI: 00:19.1 read_resources bus 0 link: 0 done
1108 06:52:44.028875 PCI: 00:1d.0 read_resources bus 1 link: 0
1109 06:52:44.035463 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1110 06:52:44.038774 PCI: 00:1e.2 read_resources bus 2 link: 0
1111 06:52:44.045219 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1112 06:52:44.048502 PCI: 00:1e.3 read_resources bus 3 link: 0
1113 06:52:44.055237 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1114 06:52:44.058387 PCI: 00:1f.0 read_resources bus 0 link: 0
1115 06:52:44.065458 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1116 06:52:44.068305 PCI: 00:1f.2 read_resources bus 0 link: 0
1117 06:52:44.071481 GENERIC: 0.0 read_resources bus 0 link: 0
1118 06:52:44.078607 GENERIC: 0.0 read_resources bus 0 link: 0 done
1119 06:52:44.082396 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1120 06:52:44.089360 DOMAIN: 0000 read_resources bus 0 link: 0 done
1121 06:52:44.092974 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1122 06:52:44.099021 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1123 06:52:44.103005 Root Device read_resources bus 0 link: 0 done
1124 06:52:44.105635 Done reading resources.
1125 06:52:44.112333 Show resources in subtree (Root Device)...After reading.
1126 06:52:44.115760 Root Device child on link 0 DOMAIN: 0000
1127 06:52:44.119216 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1128 06:52:44.129279 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1129 06:52:44.138920 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1130 06:52:44.142337 PCI: 00:00.0
1131 06:52:44.153113 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1132 06:52:44.158867 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1133 06:52:44.168607 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1134 06:52:44.179046 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1135 06:52:44.188864 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1136 06:52:44.198494 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1137 06:52:44.208797 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1138 06:52:44.214917 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1139 06:52:44.225162 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1140 06:52:44.234739 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1141 06:52:44.244654 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1142 06:52:44.254872 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1143 06:52:44.264744 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1144 06:52:44.271003 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1145 06:52:44.281209 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1146 06:52:44.291014 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1147 06:52:44.300996 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1148 06:52:44.310775 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1149 06:52:44.320853 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1150 06:52:44.330619 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1151 06:52:44.330711 PCI: 00:02.0
1152 06:52:44.340385 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1153 06:52:44.350408 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1154 06:52:44.360500 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1155 06:52:44.363618 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1156 06:52:44.373743 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1157 06:52:44.377146 GENERIC: 0.0
1158 06:52:44.377234 PCI: 00:05.0
1159 06:52:44.387016 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1160 06:52:44.393328 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1161 06:52:44.393418 GENERIC: 0.0
1162 06:52:44.396970 PCI: 00:08.0
1163 06:52:44.406612 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 06:52:44.406725 PCI: 00:0a.0
1165 06:52:44.413140 PCI: 00:0d.0 child on link 0 USB0 port 0
1166 06:52:44.423190 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1167 06:52:44.426150 USB0 port 0 child on link 0 USB3 port 0
1168 06:52:44.429417 USB3 port 0
1169 06:52:44.429497 USB3 port 1
1170 06:52:44.433394 USB3 port 2
1171 06:52:44.433484 USB3 port 3
1172 06:52:44.439651 PCI: 00:14.0 child on link 0 USB0 port 0
1173 06:52:44.449346 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1174 06:52:44.452912 USB0 port 0 child on link 0 USB2 port 0
1175 06:52:44.452999 USB2 port 0
1176 06:52:44.456163
1177 06:52:44.456248 USB2 port 1
1178 06:52:44.459474 USB2 port 2
1179 06:52:44.459560 USB2 port 3
1180 06:52:44.462827 USB2 port 4
1181 06:52:44.462933 USB2 port 5
1182 06:52:44.465879 USB2 port 6
1183 06:52:44.465964 USB2 port 7
1184 06:52:44.469173 USB2 port 8
1185 06:52:44.469257 USB2 port 9
1186 06:52:44.472261 USB3 port 0
1187 06:52:44.472346 USB3 port 1
1188 06:52:44.475789 USB3 port 2
1189 06:52:44.475873 USB3 port 3
1190 06:52:44.479210 PCI: 00:14.2
1191 06:52:44.488803 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1192 06:52:44.498676 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1193 06:52:44.502677 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1194 06:52:44.512158 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1195 06:52:44.515679 GENERIC: 0.0
1196 06:52:44.519008 PCI: 00:15.0 child on link 0 I2C: 00:1a
1197 06:52:44.528814 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1198 06:52:44.532132 I2C: 00:1a
1199 06:52:44.532216 I2C: 00:31
1200 06:52:44.535325 I2C: 00:32
1201 06:52:44.538917 PCI: 00:15.1 child on link 0 I2C: 00:10
1202 06:52:44.548530 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 06:52:44.548615 I2C: 00:10
1204 06:52:44.552059 PCI: 00:15.2
1205 06:52:44.561761 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 06:52:44.561846 PCI: 00:15.3
1207 06:52:44.571759 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 06:52:44.574839 PCI: 00:16.0
1209 06:52:44.584428 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1210 06:52:44.584514 PCI: 00:19.0
1211 06:52:44.587806
1212 06:52:44.591527 PCI: 00:19.1 child on link 0 I2C: 00:15
1213 06:52:44.601314 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 06:52:44.601400 I2C: 00:15
1215 06:52:44.607791 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1216 06:52:44.614625 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1217 06:52:44.624530 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1218 06:52:44.634203 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1219 06:52:44.637496 GENERIC: 0.0
1220 06:52:44.637580 PCI: 01:00.0
1221 06:52:44.647792 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1222 06:52:44.657472 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1223 06:52:44.660722 PCI: 00:1e.0
1224 06:52:44.670821 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1225 06:52:44.673784 PCI: 00:1e.2 child on link 0 SPI: 00
1226 06:52:44.683684 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1227 06:52:44.687139 SPI: 00
1228 06:52:44.690799 PCI: 00:1e.3 child on link 0 SPI: 00
1229 06:52:44.700199 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1230 06:52:44.700285 SPI: 00
1231 06:52:44.706958 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1232 06:52:44.713534 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1233 06:52:44.716975 PNP: 0c09.0
1234 06:52:44.723111 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1235 06:52:44.730085 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1236 06:52:44.739623 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1237 06:52:44.746490 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1238 06:52:44.752990 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1239 06:52:44.753078 GENERIC: 0.0
1240 06:52:44.756161 GENERIC: 1.0
1241 06:52:44.756247 PCI: 00:1f.3
1242 06:52:44.765993 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1243 06:52:44.776169 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1244 06:52:44.779215 PCI: 00:1f.5
1245 06:52:44.789550 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1246 06:52:44.792568 CPU_CLUSTER: 0 child on link 0 APIC: 00
1247 06:52:44.792660 APIC: 00
1248 06:52:44.795849 APIC: 01
1249 06:52:44.795935 APIC: 03
1250 06:52:44.799384 APIC: 07
1251 06:52:44.799471 APIC: 05
1252 06:52:44.799556 APIC: 04
1253 06:52:44.802481 APIC: 02
1254 06:52:44.802567 APIC: 06
1255 06:52:44.809004 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1256 06:52:44.816078 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1257 06:52:44.822207 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1258 06:52:44.828916 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1259 06:52:44.832502 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1260 06:52:44.835720 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1261 06:52:44.845408 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1262 06:52:44.852119 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1263 06:52:44.859183 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1264 06:52:44.865748 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1265 06:52:44.871728 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1266 06:52:44.878449 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1267 06:52:44.888597 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1268 06:52:44.894833 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1269 06:52:44.898133 DOMAIN: 0000: Resource ranges:
1270 06:52:44.901625 * Base: 1000, Size: 800, Tag: 100
1271 06:52:44.905185 * Base: 1900, Size: e700, Tag: 100
1272 06:52:44.911678 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1273 06:52:44.917905 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1274 06:52:44.924935 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1275 06:52:44.931782 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1276 06:52:44.941657 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1277 06:52:44.948248 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1278 06:52:44.954700 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1279 06:52:44.964295 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1280 06:52:44.970947 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1281 06:52:44.977587 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1282 06:52:44.987520 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1283 06:52:44.994580 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1284 06:52:45.001108 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1285 06:52:45.011271 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1286 06:52:45.017555 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1287 06:52:45.024236 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1288 06:52:45.031024 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1289 06:52:45.033954
1290 06:52:45.041045 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1291 06:52:45.047740 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1292 06:52:45.057822 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1293 06:52:45.064160 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1294 06:52:45.070439 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1295 06:52:45.080399 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1296 06:52:45.086641 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1297 06:52:45.093372 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1298 06:52:45.097062 DOMAIN: 0000: Resource ranges:
1299 06:52:45.103674 * Base: 7fc00000, Size: 40400000, Tag: 200
1300 06:52:45.107081 * Base: d0000000, Size: 28000000, Tag: 200
1301 06:52:45.110110 * Base: fa000000, Size: 1000000, Tag: 200
1302 06:52:45.113560 * Base: fb001000, Size: 2fff000, Tag: 200
1303 06:52:45.119907 * Base: fe010000, Size: 2e000, Tag: 200
1304 06:52:45.123363 * Base: fe03f000, Size: d41000, Tag: 200
1305 06:52:45.126717 * Base: fed88000, Size: 8000, Tag: 200
1306 06:52:45.130266 * Base: fed93000, Size: d000, Tag: 200
1307 06:52:45.136741 * Base: feda2000, Size: 1e000, Tag: 200
1308 06:52:45.140252 * Base: fede0000, Size: 1220000, Tag: 200
1309 06:52:45.143261 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1310 06:52:45.153543 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1311 06:52:45.159634 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1312 06:52:45.166575 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1313 06:52:45.172652 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1314 06:52:45.179540 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1315 06:52:45.185776 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1316 06:52:45.192916 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1317 06:52:45.199363 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1318 06:52:45.205686 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1319 06:52:45.212660 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1320 06:52:45.219529 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1321 06:52:45.225958 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1322 06:52:45.232461 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1323 06:52:45.239163 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1324 06:52:45.245944 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1325 06:52:45.252079 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1326 06:52:45.258788 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1327 06:52:45.265721 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1328 06:52:45.271538 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1329 06:52:45.278325 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1330 06:52:45.285112 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1331 06:52:45.291979 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1332 06:52:45.298473 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1333 06:52:45.304573 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1334 06:52:45.308551 PCI: 00:1d.0: Resource ranges:
1335 06:52:45.314689 * Base: 7fc00000, Size: 100000, Tag: 200
1336 06:52:45.321673 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1337 06:52:45.327617 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1338 06:52:45.334483 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1339 06:52:45.341333 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1340 06:52:45.347761 Root Device assign_resources, bus 0 link: 0
1341 06:52:45.351170 DOMAIN: 0000 assign_resources, bus 0 link: 0
1342 06:52:45.360774 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1343 06:52:45.367446 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1344 06:52:45.377128 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1345 06:52:45.384399 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1346 06:52:45.387458 PCI: 00:04.0 assign_resources, bus 1 link: 0
1347 06:52:45.393735 PCI: 00:04.0 assign_resources, bus 1 link: 0
1348 06:52:45.400545 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1349 06:52:45.410385 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1350 06:52:45.416665 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1351 06:52:45.423093 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1352 06:52:45.426795 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1353 06:52:45.436307 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1354 06:52:45.439624 PCI: 00:14.0 assign_resources, bus 0 link: 0
1355 06:52:45.443164 PCI: 00:14.0 assign_resources, bus 0 link: 0
1356 06:52:45.452757 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1357 06:52:45.459707 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1358 06:52:45.469490 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1359 06:52:45.472812 PCI: 00:14.3 assign_resources, bus 0 link: 0
1360 06:52:45.478934 PCI: 00:14.3 assign_resources, bus 0 link: 0
1361 06:52:45.486023 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1362 06:52:45.489506 PCI: 00:15.0 assign_resources, bus 0 link: 0
1363 06:52:45.496060 PCI: 00:15.0 assign_resources, bus 0 link: 0
1364 06:52:45.502277 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1365 06:52:45.509263 PCI: 00:15.1 assign_resources, bus 0 link: 0
1366 06:52:45.513107 PCI: 00:15.1 assign_resources, bus 0 link: 0
1367 06:52:45.522806 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1368 06:52:45.529057 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1369 06:52:45.538859 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1370 06:52:45.545750 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1371 06:52:45.548756 PCI: 00:19.1 assign_resources, bus 0 link: 0
1372 06:52:45.555896 PCI: 00:19.1 assign_resources, bus 0 link: 0
1373 06:52:45.562493 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1374 06:52:45.575423 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1375 06:52:45.581705 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1376 06:52:45.585521 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1377 06:52:45.595251 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1378 06:52:45.601806 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1379 06:52:45.608969 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1380 06:52:45.615461 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1381 06:52:45.621821 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1382 06:52:45.624975 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1383 06:52:45.634903 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1384 06:52:45.638082 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1385 06:52:45.641412 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1386 06:52:45.648256 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1387 06:52:45.651610 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1388 06:52:45.658502 LPC: Trying to open IO window from 800 size 1ff
1389 06:52:45.664905 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1390 06:52:45.674583 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1391 06:52:45.681358 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1392 06:52:45.687889 DOMAIN: 0000 assign_resources, bus 0 link: 0
1393 06:52:45.691114 Root Device assign_resources, bus 0 link: 0
1394 06:52:45.694649 Done setting resources.
1395 06:52:45.701314 Show resources in subtree (Root Device)...After assigning values.
1396 06:52:45.704303 Root Device child on link 0 DOMAIN: 0000
1397 06:52:45.708238 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1398 06:52:45.717752 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1399 06:52:45.727819 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1400 06:52:45.731788 PCI: 00:00.0
1401 06:52:45.740960 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1402 06:52:45.747866 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1403 06:52:45.757682 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1404 06:52:45.767671 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1405 06:52:45.777374 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1406 06:52:45.786933 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1407 06:52:45.797269 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1408 06:52:45.803714 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1409 06:52:45.813913 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1410 06:52:45.823604 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1411 06:52:45.833691 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1412 06:52:45.843909 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1413 06:52:45.853808 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1414 06:52:45.860045 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1415 06:52:45.870138 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1416 06:52:45.879746 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1417 06:52:45.889580 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1418 06:52:45.899816 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1419 06:52:45.909352 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1420 06:52:45.919691 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1421 06:52:45.920242 PCI: 00:02.0
1422 06:52:45.929442 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1423 06:52:45.942463 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1424 06:52:45.948702 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1425 06:52:45.955358 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1426 06:52:45.965355 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1427 06:52:45.965790 GENERIC: 0.0
1428 06:52:45.968606 PCI: 00:05.0
1429 06:52:45.978832 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1430 06:52:45.982327 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1431 06:52:45.985160
1432 06:52:45.985590 GENERIC: 0.0
1433 06:52:45.988940 PCI: 00:08.0
1434 06:52:45.998760 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1435 06:52:45.999234 PCI: 00:0a.0
1436 06:52:46.001774 PCI: 00:0d.0 child on link 0 USB0 port 0
1437 06:52:46.005156
1438 06:52:46.014971 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1439 06:52:46.018297 USB0 port 0 child on link 0 USB3 port 0
1440 06:52:46.018704 USB3 port 0
1441 06:52:46.021518
1442 06:52:46.021964 USB3 port 1
1443 06:52:46.024930 USB3 port 2
1444 06:52:46.025354 USB3 port 3
1445 06:52:46.028112 PCI: 00:14.0 child on link 0 USB0 port 0
1446 06:52:46.041771 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1447 06:52:46.045006 USB0 port 0 child on link 0 USB2 port 0
1448 06:52:46.045399 USB2 port 0
1449 06:52:46.048003 USB2 port 1
1450 06:52:46.051290 USB2 port 2
1451 06:52:46.051707 USB2 port 3
1452 06:52:46.054932 USB2 port 4
1453 06:52:46.055327 USB2 port 5
1454 06:52:46.058158 USB2 port 6
1455 06:52:46.058552 USB2 port 7
1456 06:52:46.060992 USB2 port 8
1457 06:52:46.061384 USB2 port 9
1458 06:52:46.064629 USB3 port 0
1459 06:52:46.065023 USB3 port 1
1460 06:52:46.067652 USB3 port 2
1461 06:52:46.068045 USB3 port 3
1462 06:52:46.071131 PCI: 00:14.2
1463 06:52:46.081194 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1464 06:52:46.090814 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1465 06:52:46.097275 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1466 06:52:46.107537 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1467 06:52:46.107976 GENERIC: 0.0
1468 06:52:46.114490 PCI: 00:15.0 child on link 0 I2C: 00:1a
1469 06:52:46.123861 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1470 06:52:46.124315 I2C: 00:1a
1471 06:52:46.127105 I2C: 00:31
1472 06:52:46.127552 I2C: 00:32
1473 06:52:46.130504 PCI: 00:15.1 child on link 0 I2C: 00:10
1474 06:52:46.140657 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1475 06:52:46.143677
1476 06:52:46.144135 I2C: 00:10
1477 06:52:46.144507 PCI: 00:15.2
1478 06:52:46.157558 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1479 06:52:46.158017 PCI: 00:15.3
1480 06:52:46.166580 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1481 06:52:46.170024 PCI: 00:16.0
1482 06:52:46.180065 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1483 06:52:46.180150 PCI: 00:19.0
1484 06:52:46.186689 PCI: 00:19.1 child on link 0 I2C: 00:15
1485 06:52:46.196270 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1486 06:52:46.196358 I2C: 00:15
1487 06:52:46.203110 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1488 06:52:46.209693 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1489 06:52:46.222788 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1490 06:52:46.232944 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1491 06:52:46.236508 GENERIC: 0.0
1492 06:52:46.236585 PCI: 01:00.0
1493 06:52:46.246215 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1494 06:52:46.255690 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1495 06:52:46.259248 PCI: 00:1e.0
1496 06:52:46.269240 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1497 06:52:46.272683 PCI: 00:1e.2 child on link 0 SPI: 00
1498 06:52:46.275917
1499 06:52:46.285507 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1500 06:52:46.285590 SPI: 00
1501 06:52:46.288723 PCI: 00:1e.3 child on link 0 SPI: 00
1502 06:52:46.298681 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1503 06:52:46.302196 SPI: 00
1504 06:52:46.305208 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1505 06:52:46.315305 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1506 06:52:46.315388 PNP: 0c09.0
1507 06:52:46.325139 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1508 06:52:46.328679 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1509 06:52:46.338516 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1510 06:52:46.348672 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1511 06:52:46.351984 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1512 06:52:46.354900 GENERIC: 0.0
1513 06:52:46.355081 GENERIC: 1.0
1514 06:52:46.358851 PCI: 00:1f.3
1515 06:52:46.368538 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1516 06:52:46.378574 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1517 06:52:46.381870 PCI: 00:1f.5
1518 06:52:46.391436 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1519 06:52:46.394923 CPU_CLUSTER: 0 child on link 0 APIC: 00
1520 06:52:46.398302 APIC: 00
1521 06:52:46.398735 APIC: 01
1522 06:52:46.399136 APIC: 03
1523 06:52:46.401954 APIC: 07
1524 06:52:46.402485 APIC: 05
1525 06:52:46.402838 APIC: 04
1526 06:52:46.404810 APIC: 02
1527 06:52:46.405247 APIC: 06
1528 06:52:46.407731 Done allocating resources.
1529 06:52:46.414819 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1530 06:52:46.421134 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1531 06:52:46.424890 Configure GPIOs for I2S audio on UP4.
1532 06:52:46.430991 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1533 06:52:46.434636 Enabling resources...
1534 06:52:46.437638 PCI: 00:00.0 subsystem <- 8086/9a12
1535 06:52:46.440884 PCI: 00:00.0 cmd <- 06
1536 06:52:46.445067 PCI: 00:02.0 subsystem <- 8086/9a40
1537 06:52:46.445598 PCI: 00:02.0 cmd <- 03
1538 06:52:46.447511
1539 06:52:46.450540 PCI: 00:04.0 subsystem <- 8086/9a03
1540 06:52:46.451009 PCI: 00:04.0 cmd <- 02
1541 06:52:46.457648 PCI: 00:05.0 subsystem <- 8086/9a19
1542 06:52:46.458184 PCI: 00:05.0 cmd <- 02
1543 06:52:46.460873 PCI: 00:08.0 subsystem <- 8086/9a11
1544 06:52:46.464922 PCI: 00:08.0 cmd <- 06
1545 06:52:46.467610 PCI: 00:0d.0 subsystem <- 8086/9a13
1546 06:52:46.471187 PCI: 00:0d.0 cmd <- 02
1547 06:52:46.473650 PCI: 00:14.0 subsystem <- 8086/a0ed
1548 06:52:46.477235 PCI: 00:14.0 cmd <- 02
1549 06:52:46.480291 PCI: 00:14.2 subsystem <- 8086/a0ef
1550 06:52:46.484223 PCI: 00:14.2 cmd <- 02
1551 06:52:46.486921 PCI: 00:14.3 subsystem <- 8086/a0f0
1552 06:52:46.490260 PCI: 00:14.3 cmd <- 02
1553 06:52:46.493463 PCI: 00:15.0 subsystem <- 8086/a0e8
1554 06:52:46.496767 PCI: 00:15.0 cmd <- 02
1555 06:52:46.500419 PCI: 00:15.1 subsystem <- 8086/a0e9
1556 06:52:46.500852 PCI: 00:15.1 cmd <- 02
1557 06:52:46.507343 PCI: 00:15.2 subsystem <- 8086/a0ea
1558 06:52:46.507779 PCI: 00:15.2 cmd <- 02
1559 06:52:46.510559 PCI: 00:15.3 subsystem <- 8086/a0eb
1560 06:52:46.513860 PCI: 00:15.3 cmd <- 02
1561 06:52:46.517296 PCI: 00:16.0 subsystem <- 8086/a0e0
1562 06:52:46.519857 PCI: 00:16.0 cmd <- 02
1563 06:52:46.523219 PCI: 00:19.1 subsystem <- 8086/a0c6
1564 06:52:46.526641 PCI: 00:19.1 cmd <- 02
1565 06:52:46.529814 PCI: 00:1d.0 bridge ctrl <- 0013
1566 06:52:46.533012 PCI: 00:1d.0 subsystem <- 8086/a0b0
1567 06:52:46.536608 PCI: 00:1d.0 cmd <- 06
1568 06:52:46.540471 PCI: 00:1e.0 subsystem <- 8086/a0a8
1569 06:52:46.543293 PCI: 00:1e.0 cmd <- 06
1570 06:52:46.546182 PCI: 00:1e.2 subsystem <- 8086/a0aa
1571 06:52:46.549935 PCI: 00:1e.2 cmd <- 06
1572 06:52:46.553209 PCI: 00:1e.3 subsystem <- 8086/a0ab
1573 06:52:46.553649 PCI: 00:1e.3 cmd <- 02
1574 06:52:46.560706 PCI: 00:1f.0 subsystem <- 8086/a087
1575 06:52:46.561238 PCI: 00:1f.0 cmd <- 407
1576 06:52:46.563576 PCI: 00:1f.3 subsystem <- 8086/a0c8
1577 06:52:46.566841 PCI: 00:1f.3 cmd <- 02
1578 06:52:46.569514 PCI: 00:1f.5 subsystem <- 8086/a0a4
1579 06:52:46.573146 PCI: 00:1f.5 cmd <- 406
1580 06:52:46.577525 PCI: 01:00.0 cmd <- 02
1581 06:52:46.582344 done.
1582 06:52:46.585308 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1583 06:52:46.588769 Initializing devices...
1584 06:52:46.592197 Root Device init
1585 06:52:46.595396 Chrome EC: Set SMI mask to 0x0000000000000000
1586 06:52:46.602810 Chrome EC: clear events_b mask to 0x0000000000000000
1587 06:52:46.609195 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1588 06:52:46.616262 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1589 06:52:46.622218 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1590 06:52:46.625639 Chrome EC: Set WAKE mask to 0x0000000000000000
1591 06:52:46.634435 fw_config match found: DB_USB=USB3_ACTIVE
1592 06:52:46.637095 Configure Right Type-C port orientation for retimer
1593 06:52:46.641026 Root Device init finished in 47 msecs
1594 06:52:46.644919 PCI: 00:00.0 init
1595 06:52:46.648078 CPU TDP = 9 Watts
1596 06:52:46.648540 CPU PL1 = 9 Watts
1597 06:52:46.651671 CPU PL2 = 40 Watts
1598 06:52:46.655360 CPU PL4 = 83 Watts
1599 06:52:46.657955 PCI: 00:00.0 init finished in 8 msecs
1600 06:52:46.658492 PCI: 00:02.0 init
1601 06:52:46.661171 GMA: Found VBT in CBFS
1602 06:52:46.664278 GMA: Found valid VBT in CBFS
1603 06:52:46.671213 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1604 06:52:46.678206 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1605 06:52:46.681267 PCI: 00:02.0 init finished in 18 msecs
1606 06:52:46.684692 PCI: 00:05.0 init
1607 06:52:46.687676 PCI: 00:05.0 init finished in 0 msecs
1608 06:52:46.690741 PCI: 00:08.0 init
1609 06:52:46.694054 PCI: 00:08.0 init finished in 0 msecs
1610 06:52:46.697689 PCI: 00:14.0 init
1611 06:52:46.700845 PCI: 00:14.0 init finished in 0 msecs
1612 06:52:46.703981 PCI: 00:14.2 init
1613 06:52:46.707230 PCI: 00:14.2 init finished in 0 msecs
1614 06:52:46.710588 PCI: 00:15.0 init
1615 06:52:46.714377 I2C bus 0 version 0x3230302a
1616 06:52:46.717290 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1617 06:52:46.720541 PCI: 00:15.0 init finished in 6 msecs
1618 06:52:46.721012 PCI: 00:15.1 init
1619 06:52:46.723924
1620 06:52:46.724357 I2C bus 1 version 0x3230302a
1621 06:52:46.727226 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1622 06:52:46.730344
1623 06:52:46.734033 PCI: 00:15.1 init finished in 6 msecs
1624 06:52:46.734561 PCI: 00:15.2 init
1625 06:52:46.736848 I2C bus 2 version 0x3230302a
1626 06:52:46.740596 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1627 06:52:46.744348 PCI: 00:15.2 init finished in 6 msecs
1628 06:52:46.746999 PCI: 00:15.3 init
1629 06:52:46.750618 I2C bus 3 version 0x3230302a
1630 06:52:46.753894 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1631 06:52:46.757547 PCI: 00:15.3 init finished in 6 msecs
1632 06:52:46.760142 PCI: 00:16.0 init
1633 06:52:46.763547 PCI: 00:16.0 init finished in 0 msecs
1634 06:52:46.767136 PCI: 00:19.1 init
1635 06:52:46.770300 I2C bus 5 version 0x3230302a
1636 06:52:46.773698 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1637 06:52:46.776942 PCI: 00:19.1 init finished in 6 msecs
1638 06:52:46.780222 PCI: 00:1d.0 init
1639 06:52:46.783704 Initializing PCH PCIe bridge.
1640 06:52:46.787121 PCI: 00:1d.0 init finished in 3 msecs
1641 06:52:46.789802 PCI: 00:1f.0 init
1642 06:52:46.793140 IOAPIC: Initializing IOAPIC at 0xfec00000
1643 06:52:46.796701 IOAPIC: Bootstrap Processor Local APIC = 0x00
1644 06:52:46.800391 IOAPIC: ID = 0x02
1645 06:52:46.803225 IOAPIC: Dumping registers
1646 06:52:46.803655 reg 0x0000: 0x02000000
1647 06:52:46.806232 reg 0x0001: 0x00770020
1648 06:52:46.809843 reg 0x0002: 0x00000000
1649 06:52:46.813102 PCI: 00:1f.0 init finished in 21 msecs
1650 06:52:46.816650 PCI: 00:1f.2 init
1651 06:52:46.820009 Disabling ACPI via APMC.
1652 06:52:46.823308 APMC done.
1653 06:52:46.826099 PCI: 00:1f.2 init finished in 5 msecs
1654 06:52:46.837129 PCI: 01:00.0 init
1655 06:52:46.840351 PCI: 01:00.0 init finished in 0 msecs
1656 06:52:46.843788 PNP: 0c09.0 init
1657 06:52:46.847153 Google Chrome EC uptime: 8.230 seconds
1658 06:52:46.853968 Google Chrome AP resets since EC boot: 1
1659 06:52:46.856736 Google Chrome most recent AP reset causes:
1660 06:52:46.859940 0.451: 32775 shutdown: entering G3
1661 06:52:46.866763 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1662 06:52:46.869711 PNP: 0c09.0 init finished in 22 msecs
1663 06:52:46.875923 Devices initialized
1664 06:52:46.878820 Show all devs... After init.
1665 06:52:46.882401 Root Device: enabled 1
1666 06:52:46.882969 DOMAIN: 0000: enabled 1
1667 06:52:46.885618 CPU_CLUSTER: 0: enabled 1
1668 06:52:46.888831 PCI: 00:00.0: enabled 1
1669 06:52:46.892023 PCI: 00:02.0: enabled 1
1670 06:52:46.892457 PCI: 00:04.0: enabled 1
1671 06:52:46.895089 PCI: 00:05.0: enabled 1
1672 06:52:46.898736 PCI: 00:06.0: enabled 0
1673 06:52:46.902310 PCI: 00:07.0: enabled 0
1674 06:52:46.902845 PCI: 00:07.1: enabled 0
1675 06:52:46.905388 PCI: 00:07.2: enabled 0
1676 06:52:46.908558 PCI: 00:07.3: enabled 0
1677 06:52:46.912416 PCI: 00:08.0: enabled 1
1678 06:52:46.912847 PCI: 00:09.0: enabled 0
1679 06:52:46.915369 PCI: 00:0a.0: enabled 0
1680 06:52:46.918812 PCI: 00:0d.0: enabled 1
1681 06:52:46.922040 PCI: 00:0d.1: enabled 0
1682 06:52:46.922629 PCI: 00:0d.2: enabled 0
1683 06:52:46.925450 PCI: 00:0d.3: enabled 0
1684 06:52:46.928586 PCI: 00:0e.0: enabled 0
1685 06:52:46.931878 PCI: 00:10.2: enabled 1
1686 06:52:46.932340 PCI: 00:10.6: enabled 0
1687 06:52:46.935717 PCI: 00:10.7: enabled 0
1688 06:52:46.938508 PCI: 00:12.0: enabled 0
1689 06:52:46.941879 PCI: 00:12.6: enabled 0
1690 06:52:46.942423 PCI: 00:13.0: enabled 0
1691 06:52:46.945169 PCI: 00:14.0: enabled 1
1692 06:52:46.948293 PCI: 00:14.1: enabled 0
1693 06:52:46.948720 PCI: 00:14.2: enabled 1
1694 06:52:46.951808 PCI: 00:14.3: enabled 1
1695 06:52:46.954677 PCI: 00:15.0: enabled 1
1696 06:52:46.958480 PCI: 00:15.1: enabled 1
1697 06:52:46.959046 PCI: 00:15.2: enabled 1
1698 06:52:46.961609 PCI: 00:15.3: enabled 1
1699 06:52:46.965214 PCI: 00:16.0: enabled 1
1700 06:52:46.968939 PCI: 00:16.1: enabled 0
1701 06:52:46.969479 PCI: 00:16.2: enabled 0
1702 06:52:46.971345 PCI: 00:16.3: enabled 0
1703 06:52:46.974924 PCI: 00:16.4: enabled 0
1704 06:52:46.978320 PCI: 00:16.5: enabled 0
1705 06:52:46.978789 PCI: 00:17.0: enabled 0
1706 06:52:46.981716 PCI: 00:19.0: enabled 0
1707 06:52:46.984610 PCI: 00:19.1: enabled 1
1708 06:52:46.988072 PCI: 00:19.2: enabled 0
1709 06:52:46.988519 PCI: 00:1c.0: enabled 1
1710 06:52:46.991435 PCI: 00:1c.1: enabled 0
1711 06:52:46.994596 PCI: 00:1c.2: enabled 0
1712 06:52:46.995043 PCI: 00:1c.3: enabled 0
1713 06:52:46.997611
1714 06:52:46.998059 PCI: 00:1c.4: enabled 0
1715 06:52:47.001419 PCI: 00:1c.5: enabled 0
1716 06:52:47.004737 PCI: 00:1c.6: enabled 1
1717 06:52:47.005152 PCI: 00:1c.7: enabled 0
1718 06:52:47.008264 PCI: 00:1d.0: enabled 1
1719 06:52:47.011162 PCI: 00:1d.1: enabled 0
1720 06:52:47.014556 PCI: 00:1d.2: enabled 1
1721 06:52:47.014996 PCI: 00:1d.3: enabled 0
1722 06:52:47.018094 PCI: 00:1e.0: enabled 1
1723 06:52:47.021498 PCI: 00:1e.1: enabled 0
1724 06:52:47.024551 PCI: 00:1e.2: enabled 1
1725 06:52:47.024982 PCI: 00:1e.3: enabled 1
1726 06:52:47.027352 PCI: 00:1f.0: enabled 1
1727 06:52:47.031190 PCI: 00:1f.1: enabled 0
1728 06:52:47.034635 PCI: 00:1f.2: enabled 1
1729 06:52:47.035347 PCI: 00:1f.3: enabled 1
1730 06:52:47.037060 PCI: 00:1f.4: enabled 0
1731 06:52:47.040833 PCI: 00:1f.5: enabled 1
1732 06:52:47.044011 PCI: 00:1f.6: enabled 0
1733 06:52:47.044528 PCI: 00:1f.7: enabled 0
1734 06:52:47.047288 APIC: 00: enabled 1
1735 06:52:47.050626 GENERIC: 0.0: enabled 1
1736 06:52:47.051070 GENERIC: 0.0: enabled 1
1737 06:52:47.053986 GENERIC: 1.0: enabled 1
1738 06:52:47.057176 GENERIC: 0.0: enabled 1
1739 06:52:47.060842 GENERIC: 1.0: enabled 1
1740 06:52:47.061262 USB0 port 0: enabled 1
1741 06:52:47.063813 GENERIC: 0.0: enabled 1
1742 06:52:47.067360 USB0 port 0: enabled 1
1743 06:52:47.071046 GENERIC: 0.0: enabled 1
1744 06:52:47.071568 I2C: 00:1a: enabled 1
1745 06:52:47.073873 I2C: 00:31: enabled 1
1746 06:52:47.076947 I2C: 00:32: enabled 1
1747 06:52:47.077365 I2C: 00:10: enabled 1
1748 06:52:47.080561 I2C: 00:15: enabled 1
1749 06:52:47.083820 GENERIC: 0.0: enabled 0
1750 06:52:47.084244 GENERIC: 1.0: enabled 0
1751 06:52:47.087060 GENERIC: 0.0: enabled 1
1752 06:52:47.090315 SPI: 00: enabled 1
1753 06:52:47.090740 SPI: 00: enabled 1
1754 06:52:47.093674 PNP: 0c09.0: enabled 1
1755 06:52:47.096737 GENERIC: 0.0: enabled 1
1756 06:52:47.097159 USB3 port 0: enabled 1
1757 06:52:47.100189 USB3 port 1: enabled 1
1758 06:52:47.104178 USB3 port 2: enabled 0
1759 06:52:47.107154 USB3 port 3: enabled 0
1760 06:52:47.107583 USB2 port 0: enabled 0
1761 06:52:47.110235 USB2 port 1: enabled 1
1762 06:52:47.113644 USB2 port 2: enabled 1
1763 06:52:47.114169 USB2 port 3: enabled 0
1764 06:52:47.116898 USB2 port 4: enabled 1
1765 06:52:47.120225 USB2 port 5: enabled 0
1766 06:52:47.123177 USB2 port 6: enabled 0
1767 06:52:47.123695 USB2 port 7: enabled 0
1768 06:52:47.126983 USB2 port 8: enabled 0
1769 06:52:47.130608 USB2 port 9: enabled 0
1770 06:52:47.131180 USB3 port 0: enabled 0
1771 06:52:47.133011 USB3 port 1: enabled 1
1772 06:52:47.136556 USB3 port 2: enabled 0
1773 06:52:47.137085 USB3 port 3: enabled 0
1774 06:52:47.140016
1775 06:52:47.140545 GENERIC: 0.0: enabled 1
1776 06:52:47.143492 GENERIC: 1.0: enabled 1
1777 06:52:47.146677 APIC: 01: enabled 1
1778 06:52:47.147140 APIC: 03: enabled 1
1779 06:52:47.149601 APIC: 07: enabled 1
1780 06:52:47.150021 APIC: 05: enabled 1
1781 06:52:47.153365
1782 06:52:47.153787 APIC: 04: enabled 1
1783 06:52:47.156101 APIC: 02: enabled 1
1784 06:52:47.156524 APIC: 06: enabled 1
1785 06:52:47.159503 PCI: 01:00.0: enabled 1
1786 06:52:47.166682 BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
1787 06:52:47.170101 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1788 06:52:47.172699 ELOG: NV offset 0xf30000 size 0x1000
1789 06:52:47.181160 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1790 06:52:47.187572 ELOG: Event(17) added with size 13 at 2023-01-10 06:52:46 UTC
1791 06:52:47.194194 ELOG: Event(92) added with size 9 at 2023-01-10 06:52:46 UTC
1792 06:52:47.201164 ELOG: Event(93) added with size 9 at 2023-01-10 06:52:46 UTC
1793 06:52:47.207278 ELOG: Event(9E) added with size 10 at 2023-01-10 06:52:46 UTC
1794 06:52:47.214086 ELOG: Event(16) added with size 11 at 2023-01-10 06:52:46 UTC
1795 06:52:47.217347 Erasing flash addr f30000 + 4 KiB
1796 06:52:47.274975 ELOG: Event(9F) added with size 14 at 2023-01-10 06:52:46 UTC
1797 06:52:47.281591 BS: BS_DEV_INIT exit times (exec / console): 41 / 55 ms
1798 06:52:47.288427 ELOG: Event(A1) added with size 10 at 2023-01-10 06:52:46 UTC
1799 06:52:47.295025 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1800 06:52:47.301259 ELOG: Event(A0) added with size 9 at 2023-01-10 06:52:46 UTC
1801 06:52:47.304535 elog_add_boot_reason: Logged dev mode boot
1802 06:52:47.310963 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1803 06:52:47.314607 Finalize devices...
1804 06:52:47.315076 Devices finalized
1805 06:52:47.321072 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1806 06:52:47.327673 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1807 06:52:47.331075 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1808 06:52:47.337510 ME: HFSTS1 : 0x80030055
1809 06:52:47.341209 ME: HFSTS2 : 0x30280116
1810 06:52:47.347485 ME: HFSTS3 : 0x00000050
1811 06:52:47.350742 ME: HFSTS4 : 0x00004000
1812 06:52:47.354272 ME: HFSTS5 : 0x00000000
1813 06:52:47.360629 ME: HFSTS6 : 0x40400006
1814 06:52:47.364596 ME: Manufacturing Mode : YES
1815 06:52:47.367174 ME: SPI Protection Mode Enabled : NO
1816 06:52:47.370615 ME: FW Partition Table : OK
1817 06:52:47.373976 ME: Bringup Loader Failure : NO
1818 06:52:47.377059 ME: Firmware Init Complete : NO
1819 06:52:47.380247 ME: Boot Options Present : NO
1820 06:52:47.383794 ME: Update In Progress : NO
1821 06:52:47.387303
1822 06:52:47.390583 ME: D0i3 Support : YES
1823 06:52:47.393848 ME: Low Power State Enabled : NO
1824 06:52:47.397620 ME: CPU Replaced : YES
1825 06:52:47.400299 ME: CPU Replacement Valid : YES
1826 06:52:47.403717 ME: Current Working State : 5
1827 06:52:47.407226 ME: Current Operation State : 1
1828 06:52:47.410962 ME: Current Operation Mode : 3
1829 06:52:47.413720 ME: Error Code : 0
1830 06:52:47.420870 ME: Enhanced Debug Mode : NO
1831 06:52:47.423944 ME: CPU Debug Disabled : YES
1832 06:52:47.426797 ME: TXT Support : NO
1833 06:52:47.433704 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1834 06:52:47.440407 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1835 06:52:47.443965 CBFS: 'fallback/slic' not found.
1836 06:52:47.447033 ACPI: Writing ACPI tables at 76b01000.
1837 06:52:47.449939 ACPI: * FACS
1838 06:52:47.450375 ACPI: * DSDT
1839 06:52:47.453328 Ramoops buffer: 0x100000@0x76a00000.
1840 06:52:47.459758 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1841 06:52:47.463242 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1842 06:52:47.467463 Google Chrome EC: version:
1843 06:52:47.470637 ro: voema_v2.0.10114-a447f03e46
1844 06:52:47.473664 rw: voema_v2.0.10114-a447f03e46
1845 06:52:47.477075 running image: 2
1846 06:52:47.484089 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1847 06:52:47.487361 ACPI: * FADT
1848 06:52:47.487789 SCI is IRQ9
1849 06:52:47.490722 ACPI: added table 1/32, length now 40
1850 06:52:47.493645
1851 06:52:47.494102 ACPI: * SSDT
1852 06:52:47.497120 Found 1 CPU(s) with 8 core(s) each.
1853 06:52:47.503790 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1854 06:52:47.506834 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1855 06:52:47.510038 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1856 06:52:47.513258 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1857 06:52:47.519823 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1858 06:52:47.526588 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1859 06:52:47.529962 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1860 06:52:47.536690 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1861 06:52:47.543095 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1862 06:52:47.546317 \_SB.PCI0.RP09: Added StorageD3Enable property
1863 06:52:47.553345 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1864 06:52:47.556266 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1865 06:52:47.563309 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1866 06:52:47.566314 PS2K: Passing 80 keymaps to kernel
1867 06:52:47.573122 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1868 06:52:47.580179 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1869 06:52:47.586976 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1870 06:52:47.593028 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1871 06:52:47.599872 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1872 06:52:47.606982 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1873 06:52:47.613105 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1874 06:52:47.619905 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1875 06:52:47.622986 ACPI: added table 2/32, length now 44
1876 06:52:47.626807 ACPI: * MCFG
1877 06:52:47.629746 ACPI: added table 3/32, length now 48
1878 06:52:47.630182 ACPI: * TPM2
1879 06:52:47.633031 TPM2 log created at 0x769f0000
1880 06:52:47.636229 ACPI: added table 4/32, length now 52
1881 06:52:47.639728 ACPI: * MADT
1882 06:52:47.640186 SCI is IRQ9
1883 06:52:47.642844 ACPI: added table 5/32, length now 56
1884 06:52:47.646180 current = 76b09850
1885 06:52:47.646619 ACPI: * DMAR
1886 06:52:47.652537 ACPI: added table 6/32, length now 60
1887 06:52:47.656113 ACPI: added table 7/32, length now 64
1888 06:52:47.656551 ACPI: * HPET
1889 06:52:47.659234 ACPI: added table 8/32, length now 68
1890 06:52:47.662428 ACPI: done.
1891 06:52:47.666024 ACPI tables: 35216 bytes.
1892 06:52:47.669423 smbios_write_tables: 769ef000
1893 06:52:47.672727 EC returned error result code 3
1894 06:52:47.675784 Couldn't obtain OEM name from CBI
1895 06:52:47.676315 Create SMBIOS type 16
1896 06:52:47.679155
1897 06:52:47.679689 Create SMBIOS type 17
1898 06:52:47.682362 GENERIC: 0.0 (WIFI Device)
1899 06:52:47.685838 SMBIOS tables: 1734 bytes.
1900 06:52:47.689356 Writing table forward entry at 0x00000500
1901 06:52:47.695308 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1902 06:52:47.698636 Writing coreboot table at 0x76b25000
1903 06:52:47.705304 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1904 06:52:47.708588 1. 0000000000001000-000000000009ffff: RAM
1905 06:52:47.715620 2. 00000000000a0000-00000000000fffff: RESERVED
1906 06:52:47.719218 3. 0000000000100000-00000000769eefff: RAM
1907 06:52:47.725060 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1908 06:52:47.728943 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1909 06:52:47.735359 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1910 06:52:47.738863 7. 0000000077000000-000000007fbfffff: RESERVED
1911 06:52:47.745115 8. 00000000c0000000-00000000cfffffff: RESERVED
1912 06:52:47.748725 9. 00000000f8000000-00000000f9ffffff: RESERVED
1913 06:52:47.755203 10. 00000000fb000000-00000000fb000fff: RESERVED
1914 06:52:47.758337 11. 00000000fe000000-00000000fe00ffff: RESERVED
1915 06:52:47.765006 12. 00000000fed80000-00000000fed87fff: RESERVED
1916 06:52:47.768630 13. 00000000fed90000-00000000fed92fff: RESERVED
1917 06:52:47.775581 14. 00000000feda0000-00000000feda1fff: RESERVED
1918 06:52:47.778565 15. 00000000fedc0000-00000000feddffff: RESERVED
1919 06:52:47.781757 16. 0000000100000000-00000004803fffff: RAM
1920 06:52:47.784511 Passing 4 GPIOs to payload:
1921 06:52:47.791740 NAME | PORT | POLARITY | VALUE
1922 06:52:47.795032 lid | undefined | high | high
1923 06:52:47.801139 power | undefined | high | low
1924 06:52:47.807768 oprom | undefined | high | low
1925 06:52:47.811250 EC in RW | 0x000000e5 | high | high
1926 06:52:47.817468 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e94e
1927 06:52:47.821142 coreboot table: 1576 bytes.
1928 06:52:47.824392 IMD ROOT 0. 0x76fff000 0x00001000
1929 06:52:47.827799 IMD SMALL 1. 0x76ffe000 0x00001000
1930 06:52:47.831087 FSP MEMORY 2. 0x76c4e000 0x003b0000
1931 06:52:47.833964 VPD 3. 0x76c4d000 0x00000367
1932 06:52:47.840896 RO MCACHE 4. 0x76c4c000 0x00000fdc
1933 06:52:47.844418 CONSOLE 5. 0x76c2c000 0x00020000
1934 06:52:47.848164 FMAP 6. 0x76c2b000 0x00000578
1935 06:52:47.851282 TIME STAMP 7. 0x76c2a000 0x00000910
1936 06:52:47.854371 VBOOT WORK 8. 0x76c16000 0x00014000
1937 06:52:47.858058 ROMSTG STCK 9. 0x76c15000 0x00001000
1938 06:52:47.860788 AFTER CAR 10. 0x76c0a000 0x0000b000
1939 06:52:47.863979 RAMSTAGE 11. 0x76b97000 0x00073000
1940 06:52:47.867227
1941 06:52:47.871354 REFCODE 12. 0x76b42000 0x00055000
1942 06:52:47.873706 SMM BACKUP 13. 0x76b32000 0x00010000
1943 06:52:47.877198 4f444749 14. 0x76b30000 0x00002000
1944 06:52:47.880854 EXT VBT15. 0x76b2d000 0x0000219f
1945 06:52:47.883649 COREBOOT 16. 0x76b25000 0x00008000
1946 06:52:47.886993 ACPI 17. 0x76b01000 0x00024000
1947 06:52:47.890203 ACPI GNVS 18. 0x76b00000 0x00001000
1948 06:52:47.893610 RAMOOPS 19. 0x76a00000 0x00100000
1949 06:52:47.900623 TPM2 TCGLOG20. 0x769f0000 0x00010000
1950 06:52:47.903553 SMBIOS 21. 0x769ef000 0x00000800
1951 06:52:47.904002 IMD small region:
1952 06:52:47.906823 IMD ROOT 0. 0x76ffec00 0x00000400
1953 06:52:47.913893 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1954 06:52:47.916715 POWER STATE 2. 0x76ffeb80 0x00000044
1955 06:52:47.920072 ROMSTAGE 3. 0x76ffeb60 0x00000004
1956 06:52:47.923523 MEM INFO 4. 0x76ffe980 0x000001e0
1957 06:52:47.929953 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1958 06:52:47.933337 MTRR: Physical address space:
1959 06:52:47.939993 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1960 06:52:47.946436 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1961 06:52:47.952994 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1962 06:52:47.956394 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1963 06:52:47.963123 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1964 06:52:47.969499 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1965 06:52:47.976043 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1966 06:52:47.979697 MTRR: Fixed MSR 0x250 0x0606060606060606
1967 06:52:47.985929 MTRR: Fixed MSR 0x258 0x0606060606060606
1968 06:52:47.989256 MTRR: Fixed MSR 0x259 0x0000000000000000
1969 06:52:47.992907 MTRR: Fixed MSR 0x268 0x0606060606060606
1970 06:52:47.995741 MTRR: Fixed MSR 0x269 0x0606060606060606
1971 06:52:48.002611 MTRR: Fixed MSR 0x26a 0x0606060606060606
1972 06:52:48.006061 MTRR: Fixed MSR 0x26b 0x0606060606060606
1973 06:52:48.009156 MTRR: Fixed MSR 0x26c 0x0606060606060606
1974 06:52:48.012436 MTRR: Fixed MSR 0x26d 0x0606060606060606
1975 06:52:48.018974 MTRR: Fixed MSR 0x26e 0x0606060606060606
1976 06:52:48.022461 MTRR: Fixed MSR 0x26f 0x0606060606060606
1977 06:52:48.026042 call enable_fixed_mtrr()
1978 06:52:48.028802 CPU physical address size: 39 bits
1979 06:52:48.035798 MTRR: default type WB/UC MTRR counts: 6/7.
1980 06:52:48.039160 MTRR: WB selected as default type.
1981 06:52:48.045310 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1982 06:52:48.049197 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1983 06:52:48.055170 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1984 06:52:48.061988 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1985 06:52:48.069013 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1986 06:52:48.075381 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1987 06:52:48.082214 MTRR: Fixed MSR 0x250 0x0606060606060606
1988 06:52:48.085560 MTRR: Fixed MSR 0x258 0x0606060606060606
1989 06:52:48.088705 MTRR: Fixed MSR 0x259 0x0000000000000000
1990 06:52:48.092127 MTRR: Fixed MSR 0x268 0x0606060606060606
1991 06:52:48.098565 MTRR: Fixed MSR 0x269 0x0606060606060606
1992 06:52:48.101913 MTRR: Fixed MSR 0x26a 0x0606060606060606
1993 06:52:48.105436 MTRR: Fixed MSR 0x26b 0x0606060606060606
1994 06:52:48.108833 MTRR: Fixed MSR 0x26c 0x0606060606060606
1995 06:52:48.114980 MTRR: Fixed MSR 0x26d 0x0606060606060606
1996 06:52:48.118205 MTRR: Fixed MSR 0x26e 0x0606060606060606
1997 06:52:48.121730 MTRR: Fixed MSR 0x26f 0x0606060606060606
1998 06:52:48.129243 MTRR: Fixed MSR 0x250 0x0606060606060606
1999 06:52:48.132204 MTRR: Fixed MSR 0x258 0x0606060606060606
2000 06:52:48.135458 MTRR: Fixed MSR 0x259 0x0000000000000000
2001 06:52:48.139029 MTRR: Fixed MSR 0x268 0x0606060606060606
2002 06:52:48.145526 MTRR: Fixed MSR 0x269 0x0606060606060606
2003 06:52:48.149075 MTRR: Fixed MSR 0x26a 0x0606060606060606
2004 06:52:48.152252 MTRR: Fixed MSR 0x26b 0x0606060606060606
2005 06:52:48.155561 MTRR: Fixed MSR 0x26c 0x0606060606060606
2006 06:52:48.161940 MTRR: Fixed MSR 0x26d 0x0606060606060606
2007 06:52:48.165313 MTRR: Fixed MSR 0x26e 0x0606060606060606
2008 06:52:48.168563 MTRR: Fixed MSR 0x26f 0x0606060606060606
2009 06:52:48.172740 call enable_fixed_mtrr()
2010 06:52:48.175880 call enable_fixed_mtrr()
2011 06:52:48.179498 MTRR: Fixed MSR 0x250 0x0606060606060606
2012 06:52:48.182266 MTRR: Fixed MSR 0x250 0x0606060606060606
2013 06:52:48.189518 MTRR: Fixed MSR 0x258 0x0606060606060606
2014 06:52:48.192325 MTRR: Fixed MSR 0x259 0x0000000000000000
2015 06:52:48.195857 MTRR: Fixed MSR 0x268 0x0606060606060606
2016 06:52:48.198631 MTRR: Fixed MSR 0x269 0x0606060606060606
2017 06:52:48.205687 MTRR: Fixed MSR 0x26a 0x0606060606060606
2018 06:52:48.208951 MTRR: Fixed MSR 0x26b 0x0606060606060606
2019 06:52:48.212314 MTRR: Fixed MSR 0x26c 0x0606060606060606
2020 06:52:48.215614 MTRR: Fixed MSR 0x26d 0x0606060606060606
2021 06:52:48.221995 MTRR: Fixed MSR 0x26e 0x0606060606060606
2022 06:52:48.225446 MTRR: Fixed MSR 0x26f 0x0606060606060606
2023 06:52:48.231704 MTRR: Fixed MSR 0x258 0x0606060606060606
2024 06:52:48.232141 call enable_fixed_mtrr()
2025 06:52:48.238859 MTRR: Fixed MSR 0x259 0x0000000000000000
2026 06:52:48.241985 MTRR: Fixed MSR 0x268 0x0606060606060606
2027 06:52:48.245035 MTRR: Fixed MSR 0x269 0x0606060606060606
2028 06:52:48.248733 MTRR: Fixed MSR 0x26a 0x0606060606060606
2029 06:52:48.255445 MTRR: Fixed MSR 0x26b 0x0606060606060606
2030 06:52:48.258068 MTRR: Fixed MSR 0x26c 0x0606060606060606
2031 06:52:48.261836 MTRR: Fixed MSR 0x26d 0x0606060606060606
2032 06:52:48.265247 MTRR: Fixed MSR 0x26e 0x0606060606060606
2033 06:52:48.268207 MTRR: Fixed MSR 0x26f 0x0606060606060606
2034 06:52:48.274856 CPU physical address size: 39 bits
2035 06:52:48.279305 call enable_fixed_mtrr()
2036 06:52:48.282224 MTRR: Fixed MSR 0x250 0x0606060606060606
2037 06:52:48.288969 MTRR: Fixed MSR 0x250 0x0606060606060606
2038 06:52:48.292187 MTRR: Fixed MSR 0x258 0x0606060606060606
2039 06:52:48.295813 MTRR: Fixed MSR 0x259 0x0000000000000000
2040 06:52:48.298973 MTRR: Fixed MSR 0x268 0x0606060606060606
2041 06:52:48.305149 MTRR: Fixed MSR 0x269 0x0606060606060606
2042 06:52:48.308643 MTRR: Fixed MSR 0x26a 0x0606060606060606
2043 06:52:48.311958 MTRR: Fixed MSR 0x26b 0x0606060606060606
2044 06:52:48.315048 MTRR: Fixed MSR 0x26c 0x0606060606060606
2045 06:52:48.322202 MTRR: Fixed MSR 0x26d 0x0606060606060606
2046 06:52:48.325484 MTRR: Fixed MSR 0x26e 0x0606060606060606
2047 06:52:48.328601 MTRR: Fixed MSR 0x26f 0x0606060606060606
2048 06:52:48.335847 MTRR: Fixed MSR 0x258 0x0606060606060606
2049 06:52:48.339115 MTRR: Fixed MSR 0x259 0x0000000000000000
2050 06:52:48.342582 MTRR: Fixed MSR 0x268 0x0606060606060606
2051 06:52:48.345283 MTRR: Fixed MSR 0x269 0x0606060606060606
2052 06:52:48.351963 MTRR: Fixed MSR 0x26a 0x0606060606060606
2053 06:52:48.355432 MTRR: Fixed MSR 0x26b 0x0606060606060606
2054 06:52:48.359175 MTRR: Fixed MSR 0x26c 0x0606060606060606
2055 06:52:48.361853 MTRR: Fixed MSR 0x26d 0x0606060606060606
2056 06:52:48.368917 MTRR: Fixed MSR 0x26e 0x0606060606060606
2057 06:52:48.371660 MTRR: Fixed MSR 0x26f 0x0606060606060606
2058 06:52:48.375576 call enable_fixed_mtrr()
2059 06:52:48.378779 call enable_fixed_mtrr()
2060 06:52:48.381569 CPU physical address size: 39 bits
2061 06:52:48.385818 CPU physical address size: 39 bits
2062 06:52:48.389112
2063 06:52:48.392642 CPU physical address size: 39 bits
2064 06:52:48.395382 CPU physical address size: 39 bits
2065 06:52:48.398546 CPU physical address size: 39 bits
2066 06:52:48.399011
2067 06:52:48.402404 MTRR check
2068 06:52:48.405504 MTRR: Fixed MSR 0x250 0x0606060606060606
2069 06:52:48.411862 Fixed MTRRs : MTRR: Fixed MSR 0x258 0x0606060606060606
2070 06:52:48.415338 MTRR: Fixed MSR 0x259 0x0000000000000000
2071 06:52:48.418264 MTRR: Fixed MSR 0x268 0x0606060606060606
2072 06:52:48.421742 MTRR: Fixed MSR 0x269 0x0606060606060606
2073 06:52:48.428181 MTRR: Fixed MSR 0x26a 0x0606060606060606
2074 06:52:48.431937 MTRR: Fixed MSR 0x26b 0x0606060606060606
2075 06:52:48.434793 MTRR: Fixed MSR 0x26c 0x0606060606060606
2076 06:52:48.438186 MTRR: Fixed MSR 0x26d 0x0606060606060606
2077 06:52:48.444947 MTRR: Fixed MSR 0x26e 0x0606060606060606
2078 06:52:48.447647 MTRR: Fixed MSR 0x26f 0x0606060606060606
2079 06:52:48.451522 Enabled
2080 06:52:48.451974 call enable_fixed_mtrr()
2081 06:52:48.455059 Variable MTRRs: Enabled
2082 06:52:48.455485
2083 06:52:48.458241 CPU physical address size: 39 bits
2084 06:52:48.466242 BS: BS_WRITE_TABLES exit times (exec / console): 375 / 151 ms
2085 06:52:48.469662 Checking cr50 for pending updates
2086 06:52:48.477480 Reading cr50 TPM mode
2087 06:52:48.487869 BS: BS_PAYLOAD_LOAD entry times (exec / console): 9 / 6 ms
2088 06:52:48.498144 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2089 06:52:48.501061 Checking segment from ROM address 0xffc02b38
2090 06:52:48.504535 Checking segment from ROM address 0xffc02b54
2091 06:52:48.511268 Loading segment from ROM address 0xffc02b38
2092 06:52:48.511826 code (compression=0)
2093 06:52:48.521298 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2094 06:52:48.530811 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2095 06:52:48.531278 it's not compressed!
2096 06:52:48.671355 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2097 06:52:48.678325 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2098 06:52:48.685507 Loading segment from ROM address 0xffc02b54
2099 06:52:48.688309 Entry Point 0x30000000
2100 06:52:48.688873 Loaded segments
2101 06:52:48.694600 BS: BS_PAYLOAD_LOAD run times (exec / console): 137 / 63 ms
2102 06:52:48.740084 Finalizing chipset.
2103 06:52:48.742976 Finalizing SMM.
2104 06:52:48.743409 APMC done.
2105 06:52:48.750006 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2106 06:52:48.752981 mp_park_aps done after 0 msecs.
2107 06:52:48.756427 Jumping to boot code at 0x30000000(0x76b25000)
2108 06:52:48.766260 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2109 06:52:48.766819
2110 06:52:48.769711
2111 06:52:48.770249
2112 06:52:48.772815 Starting depthcharge on Voema...
2113 06:52:48.773267
2114 06:52:48.774317 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2115 06:52:48.774819 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2116 06:52:48.775275 Setting prompt string to ['volteer:']
2117 06:52:48.775678 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2118 06:52:48.779094 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2119 06:52:48.779537
2120 06:52:48.785743 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2121 06:52:48.786182
2122 06:52:48.792893 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2123 06:52:48.793479
2124 06:52:48.795678 Failed to find eMMC card reader
2125 06:52:48.796116
2126 06:52:48.799135 Wipe memory regions:
2127 06:52:48.799610
2128 06:52:48.802518 [0x00000000001000, 0x000000000a0000)
2129 06:52:48.802978
2130 06:52:48.805788 [0x00000000100000, 0x00000030000000)
2131 06:52:48.806331
2132 06:52:48.843442 [0x00000032662db0, 0x000000769ef000)
2133 06:52:48.844030
2134 06:52:48.894004 [0x00000100000000, 0x00000480400000)
2135 06:52:48.894599
2136 06:52:49.526259 ec_init: CrosEC protocol v3 supported (256, 256)
2137 06:52:49.526852
2138 06:52:49.958476 R8152: Initializing
2139 06:52:49.959096
2140 06:52:49.962142 Version 6 (ocp_data = 5c30)
2141 06:52:49.962715
2142 06:52:49.964849 R8152: Done initializing
2143 06:52:49.965325
2144 06:52:49.968516 Adding net device
2145 06:52:49.968993
2146 06:52:50.274551 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2147 06:52:50.275175
2148 06:52:50.275561
2149 06:52:50.275913
2150 06:52:50.278105 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2152 06:52:50.379997 volteer: tftpboot 192.168.201.1 8649828/tftp-deploy-vu7i399o/kernel/bzImage 8649828/tftp-deploy-vu7i399o/kernel/cmdline 8649828/tftp-deploy-vu7i399o/ramdisk/ramdisk.cpio.gz
2153 06:52:50.380721 Setting prompt string to 'Starting kernel'
2154 06:52:50.381248 Setting prompt string to ['Starting kernel']
2155 06:52:50.381899 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2156 06:52:50.382585 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
2157 06:52:50.386055 tftpboot 192.168.201.1 8649828/tftp-deploy-vu7i399o/kernel/bzImaoy-vu7i399o/kernel/cmdline 8649828/tftp-deploy-vu7i399o/ramdisk/ramdisk.cpio.gz
2158 06:52:50.386522
2159 06:52:50.387039 Waiting for link
2160 06:52:50.387411
2161 06:52:50.589566 done.
2162 06:52:50.589787
2163 06:52:50.589926 MAC: 00:24:32:30:78:e4
2164 06:52:50.590062
2165 06:52:50.593086 Sending DHCP discover... done.
2166 06:52:50.593326
2167 06:52:50.596611 Waiting for reply... done.
2168 06:52:50.596873
2169 06:52:50.599972 Sending DHCP request... done.
2170 06:52:50.600201
2171 06:52:50.602794 Waiting for reply... done.
2172 06:52:50.603010
2173 06:52:50.605950 My ip is 192.168.201.15
2174 06:52:50.606184
2175 06:52:50.609441 The DHCP server ip is 192.168.201.1
2176 06:52:50.609686
2177 06:52:50.612800 TFTP server IP predefined by user: 192.168.201.1
2178 06:52:50.613145
2179 06:52:50.619291 Bootfile predefined by user: 8649828/tftp-deploy-vu7i399o/kernel/bzImage
2180 06:52:50.622526
2181 06:52:50.625722 Sending tftp read request... done.
2182 06:52:50.626193
2183 06:52:50.630584 Waiting for the transfer...
2184 06:52:50.631184
2185 06:52:51.293155 00000000 ################################################################
2186 06:52:51.293301
2187 06:52:51.973957 00080000 ################################################################
2188 06:52:51.974514
2189 06:52:52.654554 00100000 ################################################################
2190 06:52:52.655153
2191 06:52:53.357219 00180000 ################################################################
2192 06:52:53.357748
2193 06:52:54.045904 00200000 ################################################################
2194 06:52:54.046431
2195 06:52:54.719733 00280000 ################################################################
2196 06:52:54.720318
2197 06:52:55.402146 00300000 ################################################################
2198 06:52:55.402728
2199 06:52:56.081323 00380000 ################################################################
2200 06:52:56.081866
2201 06:52:56.778504 00400000 ################################################################
2202 06:52:56.779046
2203 06:52:57.467542 00480000 ################################################################
2204 06:52:57.468207
2205 06:52:58.161555 00500000 ################################################################
2206 06:52:58.162060
2207 06:52:58.813822 00580000 ################################################################
2208 06:52:58.814469
2209 06:52:59.491075 00600000 ################################################################
2210 06:52:59.491615
2211 06:53:00.175160 00680000 ################################################################
2212 06:53:00.175738
2213 06:53:00.483051 00700000 ############################# done.
2214 06:53:00.483609
2215 06:53:00.485841 The bootfile was 7573392 bytes long.
2216 06:53:00.486259
2217 06:53:00.489314 Sending tftp read request... done.
2218 06:53:00.489718
2219 06:53:00.492477 Waiting for the transfer...
2220 06:53:00.492935
2221 06:53:01.187973 00000000 ################################################################
2222 06:53:01.188227
2223 06:53:01.728919 00080000 ################################################################
2224 06:53:01.729070
2225 06:53:02.245232 00100000 ################################################################
2226 06:53:02.245374
2227 06:53:02.769625 00180000 ################################################################
2228 06:53:02.769775
2229 06:53:03.285123 00200000 ################################################################
2230 06:53:03.285262
2231 06:53:03.802790 00280000 ################################################################
2232 06:53:03.802967
2233 06:53:04.339329 00300000 ################################################################
2234 06:53:04.339485
2235 06:53:04.864927 00380000 ################################################################
2236 06:53:04.865068
2237 06:53:05.406037 00400000 ################################################################
2238 06:53:05.406197
2239 06:53:05.950649 00480000 ################################################################
2240 06:53:05.950782
2241 06:53:06.494410 00500000 ################################################################
2242 06:53:06.494548
2243 06:53:07.040633 00580000 ################################################################
2244 06:53:07.040775
2245 06:53:07.620453 00600000 ################################################################
2246 06:53:07.620789
2247 06:53:08.313768 00680000 ################################################################
2248 06:53:08.314318
2249 06:53:09.013127 00700000 ################################################################
2250 06:53:09.013643
2251 06:53:09.698482 00780000 ################################################################
2252 06:53:09.699087
2253 06:53:10.372759 00800000 ################################################################
2254 06:53:10.373295
2255 06:53:11.061504 00880000 ################################################################
2256 06:53:11.062029
2257 06:53:11.733626 00900000 ################################################################
2258 06:53:11.734333
2259 06:53:12.380541 00980000 ################################################################
2260 06:53:12.381092
2261 06:53:13.046630 00a00000 ################################################################
2262 06:53:13.047232
2263 06:53:13.703334 00a80000 ################################################################
2264 06:53:13.703731
2265 06:53:14.388477 00b00000 ################################################################
2266 06:53:14.389011
2267 06:53:15.083434 00b80000 ################################################################
2268 06:53:15.083987
2269 06:53:15.739449 00c00000 ################################################################
2270 06:53:15.739588
2271 06:53:16.415306 00c80000 ################################################################
2272 06:53:16.415847
2273 06:53:17.072709 00d00000 ################################################################
2274 06:53:17.073271
2275 06:53:17.745859 00d80000 ################################################################
2276 06:53:17.746386
2277 06:53:18.450903 00e00000 ################################################################
2278 06:53:18.451446
2279 06:53:19.156090 00e80000 ################################################################
2280 06:53:19.156677
2281 06:53:19.870638 00f00000 ################################################################
2282 06:53:19.871289
2283 06:53:20.574507 00f80000 ################################################################
2284 06:53:20.575085
2285 06:53:21.280237 01000000 ################################################################
2286 06:53:21.280429
2287 06:53:21.972043 01080000 ################################################################
2288 06:53:21.972190
2289 06:53:22.574701 01100000 ################################################################
2290 06:53:22.575290
2291 06:53:23.245340 01180000 ################################################################
2292 06:53:23.245500
2293 06:53:23.786910 01200000 ################################################################
2294 06:53:23.787061
2295 06:53:24.308208 01280000 ################################################################
2296 06:53:24.308382
2297 06:53:24.837116 01300000 ################################################################
2298 06:53:24.837270
2299 06:53:25.357486 01380000 ################################################################
2300 06:53:25.357656
2301 06:53:25.875519 01400000 ################################################################
2302 06:53:25.875674
2303 06:53:26.393648 01480000 ################################################################
2304 06:53:26.393862
2305 06:53:26.915835 01500000 ################################################################
2306 06:53:26.915985
2307 06:53:27.437650 01580000 ################################################################
2308 06:53:27.437810
2309 06:53:27.956210 01600000 ################################################################
2310 06:53:27.956368
2311 06:53:28.477990 01680000 ################################################################
2312 06:53:28.478147
2313 06:53:29.008957 01700000 ################################################################
2314 06:53:29.009111
2315 06:53:29.581360 01780000 ################################################################
2316 06:53:29.581524
2317 06:53:30.158785 01800000 ################################################################
2318 06:53:30.158973
2319 06:53:30.710926 01880000 ################################################################
2320 06:53:30.711089
2321 06:53:31.371975 01900000 ################################################################
2322 06:53:31.372131
2323 06:53:31.952515 01980000 ################################################################
2324 06:53:31.952692
2325 06:53:32.504672 01a00000 ################################################################
2326 06:53:32.504831
2327 06:53:33.085239 01a80000 ################################################################
2328 06:53:33.085392
2329 06:53:33.631648 01b00000 ################################################################
2330 06:53:33.631804
2331 06:53:34.197133 01b80000 ################################################################
2332 06:53:34.197281
2333 06:53:34.764395 01c00000 ################################################################
2334 06:53:34.764554
2335 06:53:35.340875 01c80000 ################################################################
2336 06:53:35.341026
2337 06:53:35.914153 01d00000 ################################################################
2338 06:53:35.914302
2339 06:53:36.482446 01d80000 ################################################################
2340 06:53:36.482595
2341 06:53:37.021926 01e00000 ################################################################
2342 06:53:37.022077
2343 06:53:37.588210 01e80000 ################################################################
2344 06:53:37.588362
2345 06:53:38.167538 01f00000 ################################################################
2346 06:53:38.167804
2347 06:53:38.866177 01f80000 ################################################################
2348 06:53:38.866665
2349 06:53:39.558024 02000000 ################################################################
2350 06:53:39.558186
2351 06:53:40.239728 02080000 ################################################################
2352 06:53:40.240256
2353 06:53:40.838021 02100000 ################################################################
2354 06:53:40.838176
2355 06:53:41.417044 02180000 ################################################################
2356 06:53:41.417197
2357 06:53:41.592246 02200000 ##################### done.
2358 06:53:41.592397
2359 06:53:41.595699 Sending tftp read request... done.
2360 06:53:41.595784
2361 06:53:41.598791 Waiting for the transfer...
2362 06:53:41.598876
2363 06:53:41.598982 00000000 # done.
2364 06:53:41.599048
2365 06:53:41.609085 Command line loaded dynamically from TFTP file: 8649828/tftp-deploy-vu7i399o/kernel/cmdline
2366 06:53:41.609172
2367 06:53:41.621583 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2368 06:53:41.621674
2369 06:53:41.631312 Shutting down all USB controllers.
2370 06:53:41.631391
2371 06:53:41.631460 Removing current net device
2372 06:53:41.631522
2373 06:53:41.634431 Finalizing coreboot
2374 06:53:41.634508
2375 06:53:41.640748 Exiting depthcharge with code 4 at timestamp: 61521569
2376 06:53:41.640826
2377 06:53:41.640890
2378 06:53:41.640961 Starting kernel ...
2379 06:53:41.641024
2380 06:53:41.641082
2381 06:53:41.641499 end: 2.2.4 bootloader-commands (duration 00:00:53) [common]
2382 06:53:41.641604 start: 2.2.5 auto-login-action (timeout 00:03:51) [common]
2383 06:53:41.641681 Setting prompt string to ['Linux version [0-9]']
2384 06:53:41.641754 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2385 06:53:41.641833 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2386 06:53:41.644330
2387 06:53:41.644408
2389 06:57:32.642694 end: 2.2.5 auto-login-action (duration 00:03:51) [common]
2391 06:57:32.644976 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 231 seconds'
2393 06:57:32.646110 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2396 06:57:32.647727 end: 2 depthcharge-action (duration 00:05:00) [common]
2398 06:57:32.647952 Cleaning after the job
2399 06:57:32.648037 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8649828/tftp-deploy-vu7i399o/ramdisk
2400 06:57:32.650242 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8649828/tftp-deploy-vu7i399o/kernel
2401 06:57:32.650784 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8649828/tftp-deploy-vu7i399o/modules
2402 06:57:32.651008 start: 4.1 power-off (timeout 00:00:30) [common]
2403 06:57:32.651160 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-12' '--port=1' '--command=off'
2404 06:57:32.670411 >> Command sent successfully.
2405 06:57:32.672332 Returned 0 in 0 seconds
2406 06:57:32.773483 end: 4.1 power-off (duration 00:00:00) [common]
2408 06:57:32.775038 start: 4.2 read-feedback (timeout 00:10:00) [common]
2409 06:57:32.776193 Listened to connection for namespace 'common' for up to 1s
2410 06:57:33.779099 Finalising connection for namespace 'common'
2411 06:57:33.779800 Disconnecting from shell: Finalise
2412 06:57:33.880942 end: 4.2 read-feedback (duration 00:00:01) [common]
2413 06:57:33.881537 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8649828
2414 06:57:33.944037 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8649828
2415 06:57:33.944279 JobError: Your job cannot terminate cleanly.