Boot log: asus-C436FA-Flip-hatch
- Errors: 2
- Boot result: FAIL
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
1 06:52:21.303434 lava-dispatcher, installed at version: 2022.11
2 06:52:21.303673 start: 0 validate
3 06:52:21.303825 Start time: 2023-01-10 06:52:21.303816+00:00 (UTC)
4 06:52:21.303971 Using caching service: 'http://localhost/cache/?uri=%s'
5 06:52:21.304124 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230109.0%2Famd64%2Finitrd.cpio.gz exists
6 06:52:21.593586 Using caching service: 'http://localhost/cache/?uri=%s'
7 06:52:21.593778 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-799-g1229c813bcd9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 06:52:21.889769 Using caching service: 'http://localhost/cache/?uri=%s'
9 06:52:21.890094 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230109.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 06:52:22.182404 Using caching service: 'http://localhost/cache/?uri=%s'
11 06:52:22.183058 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-799-g1229c813bcd9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 06:52:22.476569 validate duration: 1.17
14 06:52:22.476874 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 06:52:22.476989 start: 1.1 download-retry (timeout 00:10:00) [common]
16 06:52:22.477089 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 06:52:22.477199 Not decompressing ramdisk as can be used compressed.
18 06:52:22.477291 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230109.0/amd64/initrd.cpio.gz
19 06:52:22.477370 saving as /var/lib/lava/dispatcher/tmp/8649816/tftp-deploy-9mffkjsr/ramdisk/initrd.cpio.gz
20 06:52:22.477439 total size: 5432120 (5MB)
21 06:52:22.478634 progress 0% (0MB)
22 06:52:22.480278 progress 5% (0MB)
23 06:52:22.481835 progress 10% (0MB)
24 06:52:22.483355 progress 15% (0MB)
25 06:52:22.484987 progress 20% (1MB)
26 06:52:22.486460 progress 25% (1MB)
27 06:52:22.487925 progress 30% (1MB)
28 06:52:22.489593 progress 35% (1MB)
29 06:52:22.491055 progress 40% (2MB)
30 06:52:22.492516 progress 45% (2MB)
31 06:52:22.493968 progress 50% (2MB)
32 06:52:22.495574 progress 55% (2MB)
33 06:52:22.497028 progress 60% (3MB)
34 06:52:22.498479 progress 65% (3MB)
35 06:52:22.500093 progress 70% (3MB)
36 06:52:22.501544 progress 75% (3MB)
37 06:52:22.502983 progress 80% (4MB)
38 06:52:22.504483 progress 85% (4MB)
39 06:52:22.506111 progress 90% (4MB)
40 06:52:22.507579 progress 95% (4MB)
41 06:52:22.509060 progress 100% (5MB)
42 06:52:22.509351 5MB downloaded in 0.03s (162.36MB/s)
43 06:52:22.509523 end: 1.1.1 http-download (duration 00:00:00) [common]
45 06:52:22.509811 end: 1.1 download-retry (duration 00:00:00) [common]
46 06:52:22.509913 start: 1.2 download-retry (timeout 00:10:00) [common]
47 06:52:22.510013 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 06:52:22.510126 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-799-g1229c813bcd9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 06:52:22.510203 saving as /var/lib/lava/dispatcher/tmp/8649816/tftp-deploy-9mffkjsr/kernel/bzImage
50 06:52:22.510273 total size: 7573392 (7MB)
51 06:52:22.510344 No compression specified
52 06:52:22.511527 progress 0% (0MB)
53 06:52:22.513710 progress 5% (0MB)
54 06:52:22.515964 progress 10% (0MB)
55 06:52:22.518032 progress 15% (1MB)
56 06:52:22.520296 progress 20% (1MB)
57 06:52:22.522313 progress 25% (1MB)
58 06:52:22.524572 progress 30% (2MB)
59 06:52:22.526587 progress 35% (2MB)
60 06:52:22.528771 progress 40% (2MB)
61 06:52:22.530916 progress 45% (3MB)
62 06:52:22.532902 progress 50% (3MB)
63 06:52:22.535056 progress 55% (4MB)
64 06:52:22.537036 progress 60% (4MB)
65 06:52:22.539220 progress 65% (4MB)
66 06:52:22.541205 progress 70% (5MB)
67 06:52:22.543353 progress 75% (5MB)
68 06:52:22.545338 progress 80% (5MB)
69 06:52:22.547473 progress 85% (6MB)
70 06:52:22.549603 progress 90% (6MB)
71 06:52:22.551547 progress 95% (6MB)
72 06:52:22.553706 progress 100% (7MB)
73 06:52:22.553898 7MB downloaded in 0.04s (165.58MB/s)
74 06:52:22.554067 end: 1.2.1 http-download (duration 00:00:00) [common]
76 06:52:22.554335 end: 1.2 download-retry (duration 00:00:00) [common]
77 06:52:22.554443 start: 1.3 download-retry (timeout 00:10:00) [common]
78 06:52:22.554581 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 06:52:22.554745 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230109.0/amd64/full.rootfs.tar.xz
80 06:52:22.554829 saving as /var/lib/lava/dispatcher/tmp/8649816/tftp-deploy-9mffkjsr/nfsrootfs/full.rootfs.tar
81 06:52:22.554906 total size: 123918696 (118MB)
82 06:52:22.554978 Using unxz to decompress xz
83 06:52:22.558601 progress 0% (0MB)
84 06:52:23.062023 progress 5% (5MB)
85 06:52:23.569607 progress 10% (11MB)
86 06:52:24.078008 progress 15% (17MB)
87 06:52:24.597546 progress 20% (23MB)
88 06:52:24.971680 progress 25% (29MB)
89 06:52:25.345915 progress 30% (35MB)
90 06:52:25.651327 progress 35% (41MB)
91 06:52:25.837465 progress 40% (47MB)
92 06:52:26.241047 progress 45% (53MB)
93 06:52:26.642096 progress 50% (59MB)
94 06:52:27.014910 progress 55% (65MB)
95 06:52:27.409074 progress 60% (70MB)
96 06:52:27.779062 progress 65% (76MB)
97 06:52:28.197594 progress 70% (82MB)
98 06:52:28.674108 progress 75% (88MB)
99 06:52:29.145320 progress 80% (94MB)
100 06:52:29.287019 progress 85% (100MB)
101 06:52:29.466053 progress 90% (106MB)
102 06:52:29.838893 progress 95% (112MB)
103 06:52:30.251505 progress 100% (118MB)
104 06:52:30.258335 118MB downloaded in 7.70s (15.34MB/s)
105 06:52:30.258632 end: 1.3.1 http-download (duration 00:00:08) [common]
107 06:52:30.258926 end: 1.3 download-retry (duration 00:00:08) [common]
108 06:52:30.259031 start: 1.4 download-retry (timeout 00:09:52) [common]
109 06:52:30.259129 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 06:52:30.259258 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-799-g1229c813bcd9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 06:52:30.259338 saving as /var/lib/lava/dispatcher/tmp/8649816/tftp-deploy-9mffkjsr/modules/modules.tar
112 06:52:30.259407 total size: 51848 (0MB)
113 06:52:30.259478 Using unxz to decompress xz
114 06:52:30.262944 progress 63% (0MB)
115 06:52:30.263365 progress 100% (0MB)
116 06:52:30.266958 0MB downloaded in 0.01s (6.56MB/s)
117 06:52:30.267210 end: 1.4.1 http-download (duration 00:00:00) [common]
119 06:52:30.267496 end: 1.4 download-retry (duration 00:00:00) [common]
120 06:52:30.267604 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
121 06:52:30.267710 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
122 06:52:32.129197 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8649816/extract-nfsrootfs-u9umhu76
123 06:52:32.129448 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 06:52:32.129577 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
125 06:52:32.129744 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8649816/lava-overlay-xi8m3ut3
126 06:52:32.129862 makedir: /var/lib/lava/dispatcher/tmp/8649816/lava-overlay-xi8m3ut3/lava-8649816/bin
127 06:52:32.129957 makedir: /var/lib/lava/dispatcher/tmp/8649816/lava-overlay-xi8m3ut3/lava-8649816/tests
128 06:52:32.130051 makedir: /var/lib/lava/dispatcher/tmp/8649816/lava-overlay-xi8m3ut3/lava-8649816/results
129 06:52:32.130163 Creating /var/lib/lava/dispatcher/tmp/8649816/lava-overlay-xi8m3ut3/lava-8649816/bin/lava-add-keys
130 06:52:32.130312 Creating /var/lib/lava/dispatcher/tmp/8649816/lava-overlay-xi8m3ut3/lava-8649816/bin/lava-add-sources
131 06:52:32.130442 Creating /var/lib/lava/dispatcher/tmp/8649816/lava-overlay-xi8m3ut3/lava-8649816/bin/lava-background-process-start
132 06:52:32.130569 Creating /var/lib/lava/dispatcher/tmp/8649816/lava-overlay-xi8m3ut3/lava-8649816/bin/lava-background-process-stop
133 06:52:32.130693 Creating /var/lib/lava/dispatcher/tmp/8649816/lava-overlay-xi8m3ut3/lava-8649816/bin/lava-common-functions
134 06:52:32.130815 Creating /var/lib/lava/dispatcher/tmp/8649816/lava-overlay-xi8m3ut3/lava-8649816/bin/lava-echo-ipv4
135 06:52:32.130939 Creating /var/lib/lava/dispatcher/tmp/8649816/lava-overlay-xi8m3ut3/lava-8649816/bin/lava-install-packages
136 06:52:32.131070 Creating /var/lib/lava/dispatcher/tmp/8649816/lava-overlay-xi8m3ut3/lava-8649816/bin/lava-installed-packages
137 06:52:32.131193 Creating /var/lib/lava/dispatcher/tmp/8649816/lava-overlay-xi8m3ut3/lava-8649816/bin/lava-os-build
138 06:52:32.131316 Creating /var/lib/lava/dispatcher/tmp/8649816/lava-overlay-xi8m3ut3/lava-8649816/bin/lava-probe-channel
139 06:52:32.131436 Creating /var/lib/lava/dispatcher/tmp/8649816/lava-overlay-xi8m3ut3/lava-8649816/bin/lava-probe-ip
140 06:52:32.131563 Creating /var/lib/lava/dispatcher/tmp/8649816/lava-overlay-xi8m3ut3/lava-8649816/bin/lava-target-ip
141 06:52:32.131686 Creating /var/lib/lava/dispatcher/tmp/8649816/lava-overlay-xi8m3ut3/lava-8649816/bin/lava-target-mac
142 06:52:32.131808 Creating /var/lib/lava/dispatcher/tmp/8649816/lava-overlay-xi8m3ut3/lava-8649816/bin/lava-target-storage
143 06:52:32.131932 Creating /var/lib/lava/dispatcher/tmp/8649816/lava-overlay-xi8m3ut3/lava-8649816/bin/lava-test-case
144 06:52:32.132066 Creating /var/lib/lava/dispatcher/tmp/8649816/lava-overlay-xi8m3ut3/lava-8649816/bin/lava-test-event
145 06:52:32.132190 Creating /var/lib/lava/dispatcher/tmp/8649816/lava-overlay-xi8m3ut3/lava-8649816/bin/lava-test-feedback
146 06:52:32.132311 Creating /var/lib/lava/dispatcher/tmp/8649816/lava-overlay-xi8m3ut3/lava-8649816/bin/lava-test-raise
147 06:52:32.132432 Creating /var/lib/lava/dispatcher/tmp/8649816/lava-overlay-xi8m3ut3/lava-8649816/bin/lava-test-reference
148 06:52:32.132552 Creating /var/lib/lava/dispatcher/tmp/8649816/lava-overlay-xi8m3ut3/lava-8649816/bin/lava-test-runner
149 06:52:32.132674 Creating /var/lib/lava/dispatcher/tmp/8649816/lava-overlay-xi8m3ut3/lava-8649816/bin/lava-test-set
150 06:52:32.132793 Creating /var/lib/lava/dispatcher/tmp/8649816/lava-overlay-xi8m3ut3/lava-8649816/bin/lava-test-shell
151 06:52:32.132922 Updating /var/lib/lava/dispatcher/tmp/8649816/lava-overlay-xi8m3ut3/lava-8649816/bin/lava-install-packages (oe)
152 06:52:32.133056 Updating /var/lib/lava/dispatcher/tmp/8649816/lava-overlay-xi8m3ut3/lava-8649816/bin/lava-installed-packages (oe)
153 06:52:32.133164 Creating /var/lib/lava/dispatcher/tmp/8649816/lava-overlay-xi8m3ut3/lava-8649816/environment
154 06:52:32.133260 LAVA metadata
155 06:52:32.133334 - LAVA_JOB_ID=8649816
156 06:52:32.133404 - LAVA_DISPATCHER_IP=192.168.201.1
157 06:52:32.133527 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
158 06:52:32.133600 skipped lava-vland-overlay
159 06:52:32.133688 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 06:52:32.133779 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
161 06:52:32.133849 skipped lava-multinode-overlay
162 06:52:32.133931 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 06:52:32.134021 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
164 06:52:32.134102 Loading test definitions
165 06:52:32.134204 start: 1.5.2.3.1 git-repo-action (timeout 00:09:50) [common]
166 06:52:32.134283 Using /lava-8649816 at stage 0
167 06:52:32.134387 Fetching tests from https://github.com/kernelci/test-definitions
168 06:52:32.134476 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/8649816/lava-overlay-xi8m3ut3/lava-8649816/0/tests/0_ltp-ipc'
169 06:52:35.998432 Running '/usr/bin/git checkout kernelci.org
170 06:52:36.150932 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/8649816/lava-overlay-xi8m3ut3/lava-8649816/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
171 06:52:36.151764 uuid=8649816_1.5.2.3.1 testdef=None
172 06:52:36.151939 end: 1.5.2.3.1 git-repo-action (duration 00:00:04) [common]
174 06:52:36.152245 start: 1.5.2.3.2 test-overlay (timeout 00:09:46) [common]
175 06:52:36.153121 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 06:52:36.153391 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:46) [common]
178 06:52:36.154505 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 06:52:36.154805 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:46) [common]
181 06:52:36.155904 runner path: /var/lib/lava/dispatcher/tmp/8649816/lava-overlay-xi8m3ut3/lava-8649816/0/tests/0_ltp-ipc test_uuid 8649816_1.5.2.3.1
182 06:52:36.156013 SKIPFILE='skipfile-lkft.yaml'
183 06:52:36.156099 SKIP_INSTALL='true'
184 06:52:36.156181 TST_CMDFILES='ipc'
185 06:52:36.156339 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
187 06:52:36.156589 Creating lava-test-runner.conf files
188 06:52:36.156666 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8649816/lava-overlay-xi8m3ut3/lava-8649816/0 for stage 0
189 06:52:36.156763 - 0_ltp-ipc
190 06:52:36.156874 end: 1.5.2.3 test-definition (duration 00:00:04) [common]
191 06:52:36.156975 start: 1.5.2.4 compress-overlay (timeout 00:09:46) [common]
192 06:52:44.504487 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
193 06:52:44.504660 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:38) [common]
194 06:52:44.504767 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
195 06:52:44.504883 end: 1.5.2 lava-overlay (duration 00:00:12) [common]
196 06:52:44.504990 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:38) [common]
197 06:52:44.621917 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
198 06:52:44.622327 start: 1.5.4 extract-modules (timeout 00:09:38) [common]
199 06:52:44.622539 extracting modules file /var/lib/lava/dispatcher/tmp/8649816/tftp-deploy-9mffkjsr/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8649816/extract-nfsrootfs-u9umhu76
200 06:52:44.627040 extracting modules file /var/lib/lava/dispatcher/tmp/8649816/tftp-deploy-9mffkjsr/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8649816/extract-overlay-ramdisk-h3fu00yz/ramdisk
201 06:52:44.631271 end: 1.5.4 extract-modules (duration 00:00:00) [common]
202 06:52:44.631393 start: 1.5.5 apply-overlay-tftp (timeout 00:09:38) [common]
203 06:52:44.631489 [common] Applying overlay to NFS
204 06:52:44.631577 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8649816/compress-overlay-gvt2xa8d/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8649816/extract-nfsrootfs-u9umhu76
205 06:52:45.143420 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
206 06:52:45.143601 start: 1.5.6 configure-preseed-file (timeout 00:09:37) [common]
207 06:52:45.143711 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
208 06:52:45.143818 start: 1.5.7 compress-ramdisk (timeout 00:09:37) [common]
209 06:52:45.143917 Building ramdisk /var/lib/lava/dispatcher/tmp/8649816/extract-overlay-ramdisk-h3fu00yz/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8649816/extract-overlay-ramdisk-h3fu00yz/ramdisk
210 06:52:45.181080 >> 24546 blocks
211 06:52:45.702222 rename /var/lib/lava/dispatcher/tmp/8649816/extract-overlay-ramdisk-h3fu00yz/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8649816/tftp-deploy-9mffkjsr/ramdisk/ramdisk.cpio.gz
212 06:52:45.702686 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
213 06:52:45.702831 start: 1.5.8 prepare-kernel (timeout 00:09:37) [common]
214 06:52:45.702946 start: 1.5.8.1 prepare-fit (timeout 00:09:37) [common]
215 06:52:45.703066 No mkimage arch provided, not using FIT.
216 06:52:45.703169 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
217 06:52:45.703277 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
218 06:52:45.703402 end: 1.5 prepare-tftp-overlay (duration 00:00:15) [common]
219 06:52:45.703519 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:37) [common]
220 06:52:45.703615 No LXC device requested
221 06:52:45.703708 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
222 06:52:45.703823 start: 1.7 deploy-device-env (timeout 00:09:37) [common]
223 06:52:45.703919 end: 1.7 deploy-device-env (duration 00:00:00) [common]
224 06:52:45.704001 Checking files for TFTP limit of 4294967296 bytes.
225 06:52:45.704468 end: 1 tftp-deploy (duration 00:00:23) [common]
226 06:52:45.704602 start: 2 depthcharge-action (timeout 00:05:00) [common]
227 06:52:45.704714 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
228 06:52:45.704874 substitutions:
229 06:52:45.704952 - {DTB}: None
230 06:52:45.705041 - {INITRD}: 8649816/tftp-deploy-9mffkjsr/ramdisk/ramdisk.cpio.gz
231 06:52:45.705129 - {KERNEL}: 8649816/tftp-deploy-9mffkjsr/kernel/bzImage
232 06:52:45.705199 - {LAVA_MAC}: None
233 06:52:45.705283 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8649816/extract-nfsrootfs-u9umhu76
234 06:52:45.705364 - {NFS_SERVER_IP}: 192.168.201.1
235 06:52:45.705431 - {PRESEED_CONFIG}: None
236 06:52:45.705512 - {PRESEED_LOCAL}: None
237 06:52:45.705579 - {RAMDISK}: 8649816/tftp-deploy-9mffkjsr/ramdisk/ramdisk.cpio.gz
238 06:52:45.705643 - {ROOT_PART}: None
239 06:52:45.705712 - {ROOT}: None
240 06:52:45.705784 - {SERVER_IP}: 192.168.201.1
241 06:52:45.705848 - {TEE}: None
242 06:52:45.705912 Parsed boot commands:
243 06:52:45.705987 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
244 06:52:45.706169 Parsed boot commands: tftpboot 192.168.201.1 8649816/tftp-deploy-9mffkjsr/kernel/bzImage 8649816/tftp-deploy-9mffkjsr/kernel/cmdline 8649816/tftp-deploy-9mffkjsr/ramdisk/ramdisk.cpio.gz
245 06:52:45.706289 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
246 06:52:45.706393 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
247 06:52:45.706512 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
248 06:52:45.706616 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
249 06:52:45.706707 Not connected, no need to disconnect.
250 06:52:45.706811 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
251 06:52:45.706913 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
252 06:52:45.707006 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
253 06:52:45.709961 Setting prompt string to ['lava-test: # ']
254 06:52:45.710295 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
255 06:52:45.710421 end: 2.2.1 reset-connection (duration 00:00:00) [common]
256 06:52:45.710536 start: 2.2.2 reset-device (timeout 00:05:00) [common]
257 06:52:45.710640 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
258 06:52:45.710839 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
259 06:52:45.731667 >> Command sent successfully.
260 06:52:45.733691 Returned 0 in 0 seconds
261 06:52:45.834472 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
263 06:52:45.834826 end: 2.2.2 reset-device (duration 00:00:00) [common]
264 06:52:45.834937 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
265 06:52:45.835037 Setting prompt string to 'Starting depthcharge on Helios...'
266 06:52:45.835111 Changing prompt to 'Starting depthcharge on Helios...'
267 06:52:45.835187 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
268 06:52:45.835497 [Enter `^Ec?' for help]
269 06:52:52.265545
270 06:52:52.265703
271 06:52:52.275844 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
272 06:52:52.279196 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
273 06:52:52.285791 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
274 06:52:52.289087 CPU: AES supported, TXT NOT supported, VT supported
275 06:52:52.295776 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
276 06:52:52.299256 PCH: device id 0284 (rev 00) is Cometlake-U Premium
277 06:52:52.306048 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
278 06:52:52.309422 VBOOT: Loading verstage.
279 06:52:52.312673 FMAP: Found "FLASH" version 1.1 at 0xc04000.
280 06:52:52.318773 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
281 06:52:52.322521 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
282 06:52:52.325839 CBFS @ c08000 size 3f8000
283 06:52:52.332319 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
284 06:52:52.335578 CBFS: Locating 'fallback/verstage'
285 06:52:52.338815 CBFS: Found @ offset 10fb80 size 1072c
286 06:52:52.342217
287 06:52:52.342308
288 06:52:52.352252 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
289 06:52:52.366288 Probing TPM: . done!
290 06:52:52.370348 TPM ready after 0 ms
291 06:52:52.373327 Connected to device vid:did:rid of 1ae0:0028:00
292 06:52:52.383106 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
293 06:52:52.387089 Initialized TPM device CR50 revision 0
294 06:52:52.429072 tlcl_send_startup: Startup return code is 0
295 06:52:52.429205 TPM: setup succeeded
296 06:52:52.441794 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
297 06:52:52.445853 Chrome EC: UHEPI supported
298 06:52:52.449329 Phase 1
299 06:52:52.452714 FMAP: area GBB found @ c05000 (12288 bytes)
300 06:52:52.459297 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
301 06:52:52.459407 Phase 2
302 06:52:52.461882
303 06:52:52.461977 Phase 3
304 06:52:52.465560 FMAP: area GBB found @ c05000 (12288 bytes)
305 06:52:52.471932 VB2:vb2_report_dev_firmware() This is developer signed firmware
306 06:52:52.479155 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
307 06:52:52.481764 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
308 06:52:52.488448 VB2:vb2_verify_keyblock() Checking keyblock signature...
309 06:52:52.504224 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
310 06:52:52.507578 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
311 06:52:52.514247 VB2:vb2_verify_fw_preamble() Verifying preamble.
312 06:52:52.518877 Phase 4
313 06:52:52.521695 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
314 06:52:52.528220 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
315 06:52:52.708065 VB2:vb2_rsa_verify_digest() Digest check failed!
316 06:52:52.711416 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
317 06:52:52.714672
318 06:52:52.714763 Saving nvdata
319 06:52:52.717966 Reboot requested (10020007)
320 06:52:52.721301 board_reset() called!
321 06:52:52.721386 full_reset() called!
322 06:52:57.231963
323 06:52:57.232128
324 06:52:57.241782 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
325 06:52:57.245044 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
326 06:52:57.252055 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
327 06:52:57.255355 CPU: AES supported, TXT NOT supported, VT supported
328 06:52:57.262227 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
329 06:52:57.264915 PCH: device id 0284 (rev 00) is Cometlake-U Premium
330 06:52:57.272298 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
331 06:52:57.274882 VBOOT: Loading verstage.
332 06:52:57.278329 FMAP: Found "FLASH" version 1.1 at 0xc04000.
333 06:52:57.285080 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
334 06:52:57.288475 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
335 06:52:57.291792 CBFS @ c08000 size 3f8000
336 06:52:57.298300 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
337 06:52:57.301634 CBFS: Locating 'fallback/verstage'
338 06:52:57.305034 CBFS: Found @ offset 10fb80 size 1072c
339 06:52:57.308856
340 06:52:57.308960
341 06:52:57.318528 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
342 06:52:57.333354 Probing TPM: . done!
343 06:52:57.336585 TPM ready after 0 ms
344 06:52:57.339841 Connected to device vid:did:rid of 1ae0:0028:00
345 06:52:57.349685 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
346 06:52:57.353075 Initialized TPM device CR50 revision 0
347 06:52:57.395345 tlcl_send_startup: Startup return code is 0
348 06:52:57.395471 TPM: setup succeeded
349 06:52:57.408084 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
350 06:52:57.412265 Chrome EC: UHEPI supported
351 06:52:57.415425 Phase 1
352 06:52:57.418754 FMAP: area GBB found @ c05000 (12288 bytes)
353 06:52:57.425464 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
354 06:52:57.432002 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
355 06:52:57.435405 Recovery requested (1009000e)
356 06:52:57.435502 Saving nvdata
357 06:52:57.447332 tlcl_extend: response is 0
358 06:52:57.456318 tlcl_extend: response is 0
359 06:52:57.463295 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
360 06:52:57.466778 CBFS @ c08000 size 3f8000
361 06:52:57.473330 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
362 06:52:57.475925 CBFS: Locating 'fallback/romstage'
363 06:52:57.479407 CBFS: Found @ offset 80 size 145fc
364 06:52:57.482824 Accumulated console time in verstage 98 ms
365 06:52:57.482921
366 06:52:57.483024
367 06:52:57.496059 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
368 06:52:57.502220 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
369 06:52:57.505726 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
370 06:52:57.509035 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
371 06:52:57.515776 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
372 06:52:57.518907 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
373 06:52:57.522494 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
374 06:52:57.525994 TCO_STS: 0000 0000
375 06:52:57.529179 GEN_PMCON: e0015238 00000200
376 06:52:57.532573 GBLRST_CAUSE: 00000000 00000000
377 06:52:57.532664 prev_sleep_state 5
378 06:52:57.536021 Boot Count incremented to 41358
379 06:52:57.542634 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
380 06:52:57.546010 CBFS @ c08000 size 3f8000
381 06:52:57.552424 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
382 06:52:57.552531 CBFS: Locating 'fspm.bin'
383 06:52:57.555691 CBFS: Found @ offset 5ffc0 size 71000
384 06:52:57.559032
385 06:52:57.562358 Chrome EC: UHEPI supported
386 06:52:57.569192 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
387 06:52:57.573022 Probing TPM: done!
388 06:52:57.579662 Connected to device vid:did:rid of 1ae0:0028:00
389 06:52:57.589082 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
390 06:52:57.595082 Initialized TPM device CR50 revision 0
391 06:52:57.604457 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
392 06:52:57.610638 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
393 06:52:57.614357 MRC cache found, size 1948
394 06:52:57.617767 bootmode is set to: 2
395 06:52:57.621059 PRMRR disabled by config.
396 06:52:57.621159 SPD INDEX = 1
397 06:52:57.627271 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
398 06:52:57.630755 CBFS @ c08000 size 3f8000
399 06:52:57.634106 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
400 06:52:57.637392
401 06:52:57.637492 CBFS: Locating 'spd.bin'
402 06:52:57.640741 CBFS: Found @ offset 5fb80 size 400
403 06:52:57.643998 SPD: module type is LPDDR3
404 06:52:57.647297 SPD: module part is
405 06:52:57.653768 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
406 06:52:57.657259 SPD: device width 4 bits, bus width 8 bits
407 06:52:57.660576 SPD: module size is 4096 MB (per channel)
408 06:52:57.663881 memory slot: 0 configuration done.
409 06:52:57.667280 memory slot: 2 configuration done.
410 06:52:57.719068 CBMEM:
411 06:52:57.722042 IMD: root @ 99fff000 254 entries.
412 06:52:57.725396 IMD: root @ 99ffec00 62 entries.
413 06:52:57.728730 External stage cache:
414 06:52:57.732217 IMD: root @ 9abff000 254 entries.
415 06:52:57.735719 IMD: root @ 9abfec00 62 entries.
416 06:52:57.738414 Chrome EC: clear events_b mask to 0x0000000020004000
417 06:52:57.742378
418 06:52:57.755260 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
419 06:52:57.768026 tlcl_write: response is 0
420 06:52:57.777403 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
421 06:52:57.783672 MRC: TPM MRC hash updated successfully.
422 06:52:57.783764 2 DIMMs found
423 06:52:57.786876 SMM Memory Map
424 06:52:57.790288 SMRAM : 0x9a000000 0x1000000
425 06:52:57.793511 Subregion 0: 0x9a000000 0xa00000
426 06:52:57.796705 Subregion 1: 0x9aa00000 0x200000
427 06:52:57.799957 Subregion 2: 0x9ac00000 0x400000
428 06:52:57.803943 top_of_ram = 0x9a000000
429 06:52:57.807123 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
430 06:52:57.813709 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
431 06:52:57.817044 MTRR Range: Start=ff000000 End=0 (Size 1000000)
432 06:52:57.823716 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
433 06:52:57.826966 CBFS @ c08000 size 3f8000
434 06:52:57.829635 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
435 06:52:57.833105 CBFS: Locating 'fallback/postcar'
436 06:52:57.839993 CBFS: Found @ offset 107000 size 4b44
437 06:52:57.842925 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
438 06:52:57.855713 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
439 06:52:57.858828 Processing 180 relocs. Offset value of 0x97c0c000
440 06:52:57.867483 Accumulated console time in romstage 286 ms
441 06:52:57.867581
442 06:52:57.867667
443 06:52:57.877191 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
444 06:52:57.883741 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
445 06:52:57.887432 CBFS @ c08000 size 3f8000
446 06:52:57.890008 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
447 06:52:57.893471
448 06:52:57.896631 CBFS: Locating 'fallback/ramstage'
449 06:52:57.900158 CBFS: Found @ offset 43380 size 1b9e8
450 06:52:57.906721 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
451 06:52:57.938921 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
452 06:52:57.942056 Processing 3976 relocs. Offset value of 0x98db0000
453 06:52:57.948749 Accumulated console time in postcar 52 ms
454 06:52:57.948859
455 06:52:57.948941
456 06:52:57.958750 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
457 06:52:57.965580 FMAP: area RO_VPD found @ c00000 (16384 bytes)
458 06:52:57.968759 WARNING: RO_VPD is uninitialized or empty.
459 06:52:57.972234 FMAP: area RW_VPD found @ af8000 (8192 bytes)
460 06:52:57.978714 FMAP: area RW_VPD found @ af8000 (8192 bytes)
461 06:52:57.978809 Normal boot.
462 06:52:57.985523 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
463 06:52:57.988750 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
464 06:52:57.991599 CBFS @ c08000 size 3f8000
465 06:52:57.998738 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
466 06:52:58.001857 CBFS: Locating 'cpu_microcode_blob.bin'
467 06:52:58.005298 CBFS: Found @ offset 14700 size 2ec00
468 06:52:58.008549 microcode: sig=0x806ec pf=0x4 revision=0xc9
469 06:52:58.011726 Skip microcode update
470 06:52:58.014935 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
471 06:52:58.018254 CBFS @ c08000 size 3f8000
472 06:52:58.025055 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
473 06:52:58.028326 CBFS: Locating 'fsps.bin'
474 06:52:58.031756 CBFS: Found @ offset d1fc0 size 35000
475 06:52:58.056632 Detected 4 core, 8 thread CPU.
476 06:52:58.060343 Setting up SMI for CPU
477 06:52:58.063670 IED base = 0x9ac00000
478 06:52:58.063769 IED size = 0x00400000
479 06:52:58.067054 Will perform SMM setup.
480 06:52:58.073734 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
481 06:52:58.080217 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
482 06:52:58.083569 Processing 16 relocs. Offset value of 0x00030000
483 06:52:58.087342 Attempting to start 7 APs
484 06:52:58.090201 Waiting for 10ms after sending INIT.
485 06:52:58.106617 Waiting for 1st SIPI to complete...done.
486 06:52:58.106714 AP: slot 2 apic_id 1.
487 06:52:58.113352 Waiting for 2nd SIPI to complete...done.
488 06:52:58.113449 AP: slot 1 apic_id 4.
489 06:52:58.116961 AP: slot 4 apic_id 5.
490 06:52:58.119714 AP: slot 3 apic_id 2.
491 06:52:58.119807 AP: slot 5 apic_id 3.
492 06:52:58.123022 AP: slot 6 apic_id 6.
493 06:52:58.126590 AP: slot 7 apic_id 7.
494 06:52:58.133385 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
495 06:52:58.136729 Processing 13 relocs. Offset value of 0x00038000
496 06:52:58.139478
497 06:52:58.142881 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
498 06:52:58.149695 Installing SMM handler to 0x9a000000
499 06:52:58.156273 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
500 06:52:58.159433 Processing 658 relocs. Offset value of 0x9a010000
501 06:52:58.163366
502 06:52:58.169364 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
503 06:52:58.173266 Processing 13 relocs. Offset value of 0x9a008000
504 06:52:58.179197 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
505 06:52:58.186373 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
506 06:52:58.189712 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
507 06:52:58.192544
508 06:52:58.196166 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
509 06:52:58.202978 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
510 06:52:58.209722 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
511 06:52:58.212892 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
512 06:52:58.219503 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
513 06:52:58.222967 Clearing SMI status registers
514 06:52:58.226451 SMI_STS: PM1
515 06:52:58.226549 PM1_STS: PWRBTN
516 06:52:58.229712 TCO_STS: SECOND_TO
517 06:52:58.232439 New SMBASE 0x9a000000
518 06:52:58.235968 In relocation handler: CPU 0
519 06:52:58.239474 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
520 06:52:58.242742 Writing SMRR. base = 0x9a000006, mask=0xff000800
521 06:52:58.246385 Relocation complete.
522 06:52:58.249020 New SMBASE 0x99fff800
523 06:52:58.249121 In relocation handler: CPU 2
524 06:52:58.256374 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
525 06:52:58.259675 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 06:52:58.262448 Relocation complete.
527 06:52:58.262536 New SMBASE 0x99ffe800
528 06:52:58.265924
529 06:52:58.266018 In relocation handler: CPU 6
530 06:52:58.272533 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
531 06:52:58.275918 Writing SMRR. base = 0x9a000006, mask=0xff000800
532 06:52:58.279187 Relocation complete.
533 06:52:58.279274 New SMBASE 0x99ffe400
534 06:52:58.282607 In relocation handler: CPU 7
535 06:52:58.289256 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
536 06:52:58.292649 Writing SMRR. base = 0x9a000006, mask=0xff000800
537 06:52:58.295672 Relocation complete.
538 06:52:58.295765 New SMBASE 0x99fff000
539 06:52:58.298852 In relocation handler: CPU 4
540 06:52:58.305414 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
541 06:52:58.308703 Writing SMRR. base = 0x9a000006, mask=0xff000800
542 06:52:58.312728 Relocation complete.
543 06:52:58.312820 New SMBASE 0x99fffc00
544 06:52:58.315365 In relocation handler: CPU 1
545 06:52:58.318773 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
546 06:52:58.325705 Writing SMRR. base = 0x9a000006, mask=0xff000800
547 06:52:58.328922 Relocation complete.
548 06:52:58.329032 New SMBASE 0x99ffec00
549 06:52:58.332375 In relocation handler: CPU 5
550 06:52:58.335539 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
551 06:52:58.341789 Writing SMRR. base = 0x9a000006, mask=0xff000800
552 06:52:58.345245 Relocation complete.
553 06:52:58.345334 New SMBASE 0x99fff400
554 06:52:58.348742 In relocation handler: CPU 3
555 06:52:58.352131 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
556 06:52:58.358727 Writing SMRR. base = 0x9a000006, mask=0xff000800
557 06:52:58.358824 Relocation complete.
558 06:52:58.362158 Initializing CPU #0
559 06:52:58.365400 CPU: vendor Intel device 806ec
560 06:52:58.368741 CPU: family 06, model 8e, stepping 0c
561 06:52:58.372167 Clearing out pending MCEs
562 06:52:58.375421 Setting up local APIC...
563 06:52:58.375508 apic_id: 0x00 done.
564 06:52:58.378935 Turbo is available but hidden
565 06:52:58.381519 Turbo is available and visible
566 06:52:58.384890 VMX status: enabled
567 06:52:58.388350 IA32_FEATURE_CONTROL status: locked
568 06:52:58.391729 Skip microcode update
569 06:52:58.391823 CPU #0 initialized
570 06:52:58.395059 Initializing CPU #2
571 06:52:58.398542 Initializing CPU #6
572 06:52:58.398630 Initializing CPU #7
573 06:52:58.401818 CPU: vendor Intel device 806ec
574 06:52:58.405223 CPU: family 06, model 8e, stepping 0c
575 06:52:58.408614 CPU: vendor Intel device 806ec
576 06:52:58.411434 CPU: family 06, model 8e, stepping 0c
577 06:52:58.414870 Clearing out pending MCEs
578 06:52:58.418691 Clearing out pending MCEs
579 06:52:58.421762 Setting up local APIC...
580 06:52:58.421859 Initializing CPU #3
581 06:52:58.425104 Initializing CPU #5
582 06:52:58.428493 CPU: vendor Intel device 806ec
583 06:52:58.431799 CPU: family 06, model 8e, stepping 0c
584 06:52:58.435269 CPU: vendor Intel device 806ec
585 06:52:58.438641 CPU: family 06, model 8e, stepping 0c
586 06:52:58.441506 Clearing out pending MCEs
587 06:52:58.444747 Clearing out pending MCEs
588 06:52:58.444849 Setting up local APIC...
589 06:52:58.448224 Initializing CPU #4
590 06:52:58.451637 Initializing CPU #1
591 06:52:58.455091 CPU: vendor Intel device 806ec
592 06:52:58.458545 CPU: family 06, model 8e, stepping 0c
593 06:52:58.461303 CPU: vendor Intel device 806ec
594 06:52:58.464582 CPU: family 06, model 8e, stepping 0c
595 06:52:58.467900 Clearing out pending MCEs
596 06:52:58.467992 Clearing out pending MCEs
597 06:52:58.471195 Setting up local APIC...
598 06:52:58.474432 CPU: vendor Intel device 806ec
599 06:52:58.477634 CPU: family 06, model 8e, stepping 0c
600 06:52:58.481128 Clearing out pending MCEs
601 06:52:58.484457 apic_id: 0x07 done.
602 06:52:58.484554 Setting up local APIC...
603 06:52:58.487802 Setting up local APIC...
604 06:52:58.491315 apic_id: 0x02 done.
605 06:52:58.494712 Setting up local APIC...
606 06:52:58.494811 Setting up local APIC...
607 06:52:58.497812 apic_id: 0x03 done.
608 06:52:58.501221 VMX status: enabled
609 06:52:58.501327 VMX status: enabled
610 06:52:58.504711 IA32_FEATURE_CONTROL status: locked
611 06:52:58.507951 IA32_FEATURE_CONTROL status: locked
612 06:52:58.510810 Skip microcode update
613 06:52:58.514787 Skip microcode update
614 06:52:58.514884 CPU #3 initialized
615 06:52:58.517384 CPU #5 initialized
616 06:52:58.520777 apic_id: 0x06 done.
617 06:52:58.520874 VMX status: enabled
618 06:52:58.524256 VMX status: enabled
619 06:52:58.527732 IA32_FEATURE_CONTROL status: locked
620 06:52:58.531292 IA32_FEATURE_CONTROL status: locked
621 06:52:58.534368 Skip microcode update
622 06:52:58.534466 Skip microcode update
623 06:52:58.537711 CPU #7 initialized
624 06:52:58.540924 CPU #6 initialized
625 06:52:58.541021 apic_id: 0x05 done.
626 06:52:58.544486 apic_id: 0x04 done.
627 06:52:58.544605 VMX status: enabled
628 06:52:58.547856 VMX status: enabled
629 06:52:58.551345 IA32_FEATURE_CONTROL status: locked
630 06:52:58.554126 IA32_FEATURE_CONTROL status: locked
631 06:52:58.557511 Skip microcode update
632 06:52:58.560974 Skip microcode update
633 06:52:58.561061 CPU #4 initialized
634 06:52:58.564211 CPU #1 initialized
635 06:52:58.564313 apic_id: 0x01 done.
636 06:52:58.567547 VMX status: enabled
637 06:52:58.570822 IA32_FEATURE_CONTROL status: locked
638 06:52:58.574109 Skip microcode update
639 06:52:58.574206 CPU #2 initialized
640 06:52:58.580519 bsp_do_flight_plan done after 466 msecs.
641 06:52:58.583974 CPU: frequency set to 4200 MHz
642 06:52:58.584079 Enabling SMIs.
643 06:52:58.587580 Locking SMM.
644 06:52:58.600924 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
645 06:52:58.604055 CBFS @ c08000 size 3f8000
646 06:52:58.610532 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
647 06:52:58.610637 CBFS: Locating 'vbt.bin'
648 06:52:58.613810 CBFS: Found @ offset 5f5c0 size 499
649 06:52:58.620910 Found a VBT of 4608 bytes after decompression
650 06:52:58.802324 Display FSP Version Info HOB
651 06:52:58.805712 Reference Code - CPU = 9.0.1e.30
652 06:52:58.809261 uCode Version = 0.0.0.ca
653 06:52:58.812515 TXT ACM version = ff.ff.ff.ffff
654 06:52:58.815709 Display FSP Version Info HOB
655 06:52:58.818907 Reference Code - ME = 9.0.1e.30
656 06:52:58.822198 MEBx version = 0.0.0.0
657 06:52:58.825450 ME Firmware Version = Consumer SKU
658 06:52:58.828771 Display FSP Version Info HOB
659 06:52:58.832627 Reference Code - CML PCH = 9.0.1e.30
660 06:52:58.835399 PCH-CRID Status = Disabled
661 06:52:58.838696 PCH-CRID Original Value = ff.ff.ff.ffff
662 06:52:58.842033 PCH-CRID New Value = ff.ff.ff.ffff
663 06:52:58.845305 OPROM - RST - RAID = ff.ff.ff.ffff
664 06:52:58.849191 ChipsetInit Base Version = ff.ff.ff.ffff
665 06:52:58.852603 ChipsetInit Oem Version = ff.ff.ff.ffff
666 06:52:58.855218 Display FSP Version Info HOB
667 06:52:58.862303 Reference Code - SA - System Agent = 9.0.1e.30
668 06:52:58.865587 Reference Code - MRC = 0.7.1.6c
669 06:52:58.865684 SA - PCIe Version = 9.0.1e.30
670 06:52:58.869000 SA-CRID Status = Disabled
671 06:52:58.871986 SA-CRID Original Value = 0.0.0.c
672 06:52:58.875702 SA-CRID New Value = 0.0.0.c
673 06:52:58.878866 OPROM - VBIOS = ff.ff.ff.ffff
674 06:52:58.882330 RTC Init
675 06:52:58.885348 Set power on after power failure.
676 06:52:58.885435 Disabling Deep S3
677 06:52:58.888621 Disabling Deep S3
678 06:52:58.888725 Disabling Deep S4
679 06:52:58.891801 Disabling Deep S4
680 06:52:58.895296 Disabling Deep S5
681 06:52:58.895392 Disabling Deep S5
682 06:52:58.901943 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 192 exit 1
683 06:52:58.902040 Enumerating buses...
684 06:52:58.905159
685 06:52:58.908523 Show all devs... Before device enumeration.
686 06:52:58.911903 Root Device: enabled 1
687 06:52:58.911999 CPU_CLUSTER: 0: enabled 1
688 06:52:58.915188 DOMAIN: 0000: enabled 1
689 06:52:58.918415 APIC: 00: enabled 1
690 06:52:58.918512 PCI: 00:00.0: enabled 1
691 06:52:58.921690 PCI: 00:02.0: enabled 1
692 06:52:58.924962 PCI: 00:04.0: enabled 0
693 06:52:58.928249 PCI: 00:05.0: enabled 0
694 06:52:58.928353 PCI: 00:12.0: enabled 1
695 06:52:58.931531 PCI: 00:12.5: enabled 0
696 06:52:58.934762 PCI: 00:12.6: enabled 0
697 06:52:58.938109 PCI: 00:14.0: enabled 1
698 06:52:58.938204 PCI: 00:14.1: enabled 0
699 06:52:58.941575 PCI: 00:14.3: enabled 1
700 06:52:58.944579 PCI: 00:14.5: enabled 0
701 06:52:58.944665 PCI: 00:15.0: enabled 1
702 06:52:58.947918
703 06:52:58.947999 PCI: 00:15.1: enabled 1
704 06:52:58.951301 PCI: 00:15.2: enabled 0
705 06:52:58.954806 PCI: 00:15.3: enabled 0
706 06:52:58.954901 PCI: 00:16.0: enabled 1
707 06:52:58.958083 PCI: 00:16.1: enabled 0
708 06:52:58.961445 PCI: 00:16.2: enabled 0
709 06:52:58.964700 PCI: 00:16.3: enabled 0
710 06:52:58.964796 PCI: 00:16.4: enabled 0
711 06:52:58.967995 PCI: 00:16.5: enabled 0
712 06:52:58.971333 PCI: 00:17.0: enabled 1
713 06:52:58.974584 PCI: 00:19.0: enabled 1
714 06:52:58.974672 PCI: 00:19.1: enabled 0
715 06:52:58.977834 PCI: 00:19.2: enabled 0
716 06:52:58.981591 PCI: 00:1a.0: enabled 0
717 06:52:58.981676 PCI: 00:1c.0: enabled 0
718 06:52:58.984810
719 06:52:58.984907 PCI: 00:1c.1: enabled 0
720 06:52:58.987901 PCI: 00:1c.2: enabled 0
721 06:52:58.991067 PCI: 00:1c.3: enabled 0
722 06:52:58.991152 PCI: 00:1c.4: enabled 0
723 06:52:58.994397 PCI: 00:1c.5: enabled 0
724 06:52:58.997708 PCI: 00:1c.6: enabled 0
725 06:52:59.001544 PCI: 00:1c.7: enabled 0
726 06:52:59.001637 PCI: 00:1d.0: enabled 1
727 06:52:59.005061 PCI: 00:1d.1: enabled 0
728 06:52:59.008176 PCI: 00:1d.2: enabled 0
729 06:52:59.011568 PCI: 00:1d.3: enabled 0
730 06:52:59.011651 PCI: 00:1d.4: enabled 0
731 06:52:59.014797 PCI: 00:1d.5: enabled 1
732 06:52:59.018182 PCI: 00:1e.0: enabled 1
733 06:52:59.018271 PCI: 00:1e.1: enabled 0
734 06:52:59.021436 PCI: 00:1e.2: enabled 1
735 06:52:59.024725 PCI: 00:1e.3: enabled 1
736 06:52:59.027952 PCI: 00:1f.0: enabled 1
737 06:52:59.028035 PCI: 00:1f.1: enabled 1
738 06:52:59.031000 PCI: 00:1f.2: enabled 1
739 06:52:59.034230 PCI: 00:1f.3: enabled 1
740 06:52:59.038052 PCI: 00:1f.4: enabled 1
741 06:52:59.038136 PCI: 00:1f.5: enabled 1
742 06:52:59.041271 PCI: 00:1f.6: enabled 0
743 06:52:59.044485 USB0 port 0: enabled 1
744 06:52:59.044573 I2C: 00:15: enabled 1
745 06:52:59.047737 I2C: 00:5d: enabled 1
746 06:52:59.050954 GENERIC: 0.0: enabled 1
747 06:52:59.054325 I2C: 00:1a: enabled 1
748 06:52:59.054421 I2C: 00:38: enabled 1
749 06:52:59.057607 I2C: 00:39: enabled 1
750 06:52:59.060745 I2C: 00:3a: enabled 1
751 06:52:59.060841 I2C: 00:3b: enabled 1
752 06:52:59.064162 PCI: 00:00.0: enabled 1
753 06:52:59.067344 SPI: 00: enabled 1
754 06:52:59.067452 SPI: 01: enabled 1
755 06:52:59.071023 PNP: 0c09.0: enabled 1
756 06:52:59.074422 USB2 port 0: enabled 1
757 06:52:59.074542 USB2 port 1: enabled 1
758 06:52:59.077669 USB2 port 2: enabled 0
759 06:52:59.080878 USB2 port 3: enabled 0
760 06:52:59.081000 USB2 port 5: enabled 0
761 06:52:59.084111 USB2 port 6: enabled 1
762 06:52:59.087499 USB2 port 9: enabled 1
763 06:52:59.090545 USB3 port 0: enabled 1
764 06:52:59.090702 USB3 port 1: enabled 1
765 06:52:59.093909 USB3 port 2: enabled 1
766 06:52:59.097687 USB3 port 3: enabled 1
767 06:52:59.097899 USB3 port 4: enabled 0
768 06:52:59.100990 APIC: 04: enabled 1
769 06:52:59.104322 APIC: 01: enabled 1
770 06:52:59.104574 APIC: 02: enabled 1
771 06:52:59.107759 APIC: 05: enabled 1
772 06:52:59.108084 APIC: 03: enabled 1
773 06:52:59.110720 APIC: 06: enabled 1
774 06:52:59.114067 APIC: 07: enabled 1
775 06:52:59.114168 Compare with tree...
776 06:52:59.117357 Root Device: enabled 1
777 06:52:59.120534 CPU_CLUSTER: 0: enabled 1
778 06:52:59.123904 APIC: 00: enabled 1
779 06:52:59.124027 APIC: 04: enabled 1
780 06:52:59.127116 APIC: 01: enabled 1
781 06:52:59.130445 APIC: 02: enabled 1
782 06:52:59.130582 APIC: 05: enabled 1
783 06:52:59.133890 APIC: 03: enabled 1
784 06:52:59.137108 APIC: 06: enabled 1
785 06:52:59.137287 APIC: 07: enabled 1
786 06:52:59.140548 DOMAIN: 0000: enabled 1
787 06:52:59.143835 PCI: 00:00.0: enabled 1
788 06:52:59.147038 PCI: 00:02.0: enabled 1
789 06:52:59.147254 PCI: 00:04.0: enabled 0
790 06:52:59.150524 PCI: 00:05.0: enabled 0
791 06:52:59.153811 PCI: 00:12.0: enabled 1
792 06:52:59.157139 PCI: 00:12.5: enabled 0
793 06:52:59.160544 PCI: 00:12.6: enabled 0
794 06:52:59.160902 PCI: 00:14.0: enabled 1
795 06:52:59.163920 USB0 port 0: enabled 1
796 06:52:59.167179 USB2 port 0: enabled 1
797 06:52:59.170460 USB2 port 1: enabled 1
798 06:52:59.173595 USB2 port 2: enabled 0
799 06:52:59.174026 USB2 port 3: enabled 0
800 06:52:59.176849 USB2 port 5: enabled 0
801 06:52:59.180198 USB2 port 6: enabled 1
802 06:52:59.184142 USB2 port 9: enabled 1
803 06:52:59.187038 USB3 port 0: enabled 1
804 06:52:59.190222 USB3 port 1: enabled 1
805 06:52:59.190616 USB3 port 2: enabled 1
806 06:52:59.193656 USB3 port 3: enabled 1
807 06:52:59.196689 USB3 port 4: enabled 0
808 06:52:59.200012 PCI: 00:14.1: enabled 0
809 06:52:59.203982 PCI: 00:14.3: enabled 1
810 06:52:59.204457 PCI: 00:14.5: enabled 0
811 06:52:59.207235 PCI: 00:15.0: enabled 1
812 06:52:59.210591 I2C: 00:15: enabled 1
813 06:52:59.213805 PCI: 00:15.1: enabled 1
814 06:52:59.216977 I2C: 00:5d: enabled 1
815 06:52:59.217468 GENERIC: 0.0: enabled 1
816 06:52:59.220142 PCI: 00:15.2: enabled 0
817 06:52:59.223469 PCI: 00:15.3: enabled 0
818 06:52:59.226735 PCI: 00:16.0: enabled 1
819 06:52:59.230078 PCI: 00:16.1: enabled 0
820 06:52:59.230678 PCI: 00:16.2: enabled 0
821 06:52:59.233816 PCI: 00:16.3: enabled 0
822 06:52:59.236906 PCI: 00:16.4: enabled 0
823 06:52:59.240027 PCI: 00:16.5: enabled 0
824 06:52:59.240539 PCI: 00:17.0: enabled 1
825 06:52:59.243192
826 06:52:59.243627 PCI: 00:19.0: enabled 1
827 06:52:59.246392 I2C: 00:1a: enabled 1
828 06:52:59.250216 I2C: 00:38: enabled 1
829 06:52:59.253409 I2C: 00:39: enabled 1
830 06:52:59.253717 I2C: 00:3a: enabled 1
831 06:52:59.256314 I2C: 00:3b: enabled 1
832 06:52:59.259742 PCI: 00:19.1: enabled 0
833 06:52:59.262892 PCI: 00:19.2: enabled 0
834 06:52:59.263197 PCI: 00:1a.0: enabled 0
835 06:52:59.266203
836 06:52:59.266511 PCI: 00:1c.0: enabled 0
837 06:52:59.269967 PCI: 00:1c.1: enabled 0
838 06:52:59.273148 PCI: 00:1c.2: enabled 0
839 06:52:59.276436 PCI: 00:1c.3: enabled 0
840 06:52:59.276741 PCI: 00:1c.4: enabled 0
841 06:52:59.279492 PCI: 00:1c.5: enabled 0
842 06:52:59.282866 PCI: 00:1c.6: enabled 0
843 06:52:59.286322 PCI: 00:1c.7: enabled 0
844 06:52:59.289615 PCI: 00:1d.0: enabled 1
845 06:52:59.289709 PCI: 00:1d.1: enabled 0
846 06:52:59.292661 PCI: 00:1d.2: enabled 0
847 06:52:59.295821 PCI: 00:1d.3: enabled 0
848 06:52:59.299717 PCI: 00:1d.4: enabled 0
849 06:52:59.302895 PCI: 00:1d.5: enabled 1
850 06:52:59.303016 PCI: 00:00.0: enabled 1
851 06:52:59.306182 PCI: 00:1e.0: enabled 1
852 06:52:59.309572 PCI: 00:1e.1: enabled 0
853 06:52:59.312774 PCI: 00:1e.2: enabled 1
854 06:52:59.313337 SPI: 00: enabled 1
855 06:52:59.316461
856 06:52:59.317142 PCI: 00:1e.3: enabled 1
857 06:52:59.319768 SPI: 01: enabled 1
858 06:52:59.323003 PCI: 00:1f.0: enabled 1
859 06:52:59.323542 PNP: 0c09.0: enabled 1
860 06:52:59.326153
861 06:52:59.326643 PCI: 00:1f.1: enabled 1
862 06:52:59.329279 PCI: 00:1f.2: enabled 1
863 06:52:59.333181 PCI: 00:1f.3: enabled 1
864 06:52:59.336235 PCI: 00:1f.4: enabled 1
865 06:52:59.336742 PCI: 00:1f.5: enabled 1
866 06:52:59.339258 PCI: 00:1f.6: enabled 0
867 06:52:59.343122 Root Device scanning...
868 06:52:59.346081 scan_static_bus for Root Device
869 06:52:59.349404 CPU_CLUSTER: 0 enabled
870 06:52:59.349846 DOMAIN: 0000 enabled
871 06:52:59.352695 DOMAIN: 0000 scanning...
872 06:52:59.356532 PCI: pci_scan_bus for bus 00
873 06:52:59.359564 PCI: 00:00.0 [8086/0000] ops
874 06:52:59.362620 PCI: 00:00.0 [8086/9b61] enabled
875 06:52:59.365831 PCI: 00:02.0 [8086/0000] bus ops
876 06:52:59.369189 PCI: 00:02.0 [8086/9b41] enabled
877 06:52:59.373045 PCI: 00:04.0 [8086/1903] disabled
878 06:52:59.376230 PCI: 00:08.0 [8086/1911] enabled
879 06:52:59.379350 PCI: 00:12.0 [8086/02f9] enabled
880 06:52:59.382645 PCI: 00:14.0 [8086/0000] bus ops
881 06:52:59.385877 PCI: 00:14.0 [8086/02ed] enabled
882 06:52:59.389086 PCI: 00:14.2 [8086/02ef] enabled
883 06:52:59.392835 PCI: 00:14.3 [8086/02f0] enabled
884 06:52:59.395981 PCI: 00:15.0 [8086/0000] bus ops
885 06:52:59.399556 PCI: 00:15.0 [8086/02e8] enabled
886 06:52:59.402579 PCI: 00:15.1 [8086/0000] bus ops
887 06:52:59.405888 PCI: 00:15.1 [8086/02e9] enabled
888 06:52:59.408906 PCI: 00:16.0 [8086/0000] ops
889 06:52:59.412780 PCI: 00:16.0 [8086/02e0] enabled
890 06:52:59.415962 PCI: 00:17.0 [8086/0000] ops
891 06:52:59.419104 PCI: 00:17.0 [8086/02d3] enabled
892 06:52:59.422765 PCI: 00:19.0 [8086/0000] bus ops
893 06:52:59.426003 PCI: 00:19.0 [8086/02c5] enabled
894 06:52:59.429280 PCI: 00:1d.0 [8086/0000] bus ops
895 06:52:59.432285 PCI: 00:1d.0 [8086/02b0] enabled
896 06:52:59.439345 PCI: Static device PCI: 00:1d.5 not found, disabling it.
897 06:52:59.439886 PCI: 00:1e.0 [8086/0000] ops
898 06:52:59.442669 PCI: 00:1e.0 [8086/02a8] enabled
899 06:52:59.445742 PCI: 00:1e.2 [8086/0000] bus ops
900 06:52:59.449209 PCI: 00:1e.2 [8086/02aa] enabled
901 06:52:59.452298 PCI: 00:1e.3 [8086/0000] bus ops
902 06:52:59.456008 PCI: 00:1e.3 [8086/02ab] enabled
903 06:52:59.459459 PCI: 00:1f.0 [8086/0000] bus ops
904 06:52:59.462760 PCI: 00:1f.0 [8086/0284] enabled
905 06:52:59.469034 PCI: Static device PCI: 00:1f.1 not found, disabling it.
906 06:52:59.475770 PCI: Static device PCI: 00:1f.2 not found, disabling it.
907 06:52:59.479515 PCI: 00:1f.3 [8086/0000] bus ops
908 06:52:59.482287 PCI: 00:1f.3 [8086/02c8] enabled
909 06:52:59.485838 PCI: 00:1f.4 [8086/0000] bus ops
910 06:52:59.488955 PCI: 00:1f.4 [8086/02a3] enabled
911 06:52:59.492716 PCI: 00:1f.5 [8086/0000] bus ops
912 06:52:59.495847 PCI: 00:1f.5 [8086/02a4] enabled
913 06:52:59.498959 PCI: Leftover static devices:
914 06:52:59.499400 PCI: 00:05.0
915 06:52:59.502235 PCI: 00:12.5
916 06:52:59.502702 PCI: 00:12.6
917 06:52:59.503165 PCI: 00:14.1
918 06:52:59.506118 PCI: 00:14.5
919 06:52:59.506561 PCI: 00:15.2
920 06:52:59.509149 PCI: 00:15.3
921 06:52:59.509583 PCI: 00:16.1
922 06:52:59.509924 PCI: 00:16.2
923 06:52:59.512329 PCI: 00:16.3
924 06:52:59.512766 PCI: 00:16.4
925 06:52:59.515355 PCI: 00:16.5
926 06:52:59.515449 PCI: 00:19.1
927 06:52:59.518284 PCI: 00:19.2
928 06:52:59.518379 PCI: 00:1a.0
929 06:52:59.518481 PCI: 00:1c.0
930 06:52:59.522181 PCI: 00:1c.1
931 06:52:59.522281 PCI: 00:1c.2
932 06:52:59.525471 PCI: 00:1c.3
933 06:52:59.525566 PCI: 00:1c.4
934 06:52:59.525639 PCI: 00:1c.5
935 06:52:59.528681 PCI: 00:1c.6
936 06:52:59.528790 PCI: 00:1c.7
937 06:52:59.531668 PCI: 00:1d.1
938 06:52:59.531773 PCI: 00:1d.2
939 06:52:59.531855 PCI: 00:1d.3
940 06:52:59.534972 PCI: 00:1d.4
941 06:52:59.535084 PCI: 00:1d.5
942 06:52:59.538510 PCI: 00:1e.1
943 06:52:59.538631 PCI: 00:1f.1
944 06:52:59.541773 PCI: 00:1f.2
945 06:52:59.541899 PCI: 00:1f.6
946 06:52:59.544954 PCI: Check your devicetree.cb.
947 06:52:59.548389 PCI: 00:02.0 scanning...
948 06:52:59.551671 scan_generic_bus for PCI: 00:02.0
949 06:52:59.555256 scan_generic_bus for PCI: 00:02.0 done
950 06:52:59.561888 scan_bus: scanning of bus PCI: 00:02.0 took 10197 usecs
951 06:52:59.562072 PCI: 00:14.0 scanning...
952 06:52:59.565408 scan_static_bus for PCI: 00:14.0
953 06:52:59.568618 USB0 port 0 enabled
954 06:52:59.571946 USB0 port 0 scanning...
955 06:52:59.575205 scan_static_bus for USB0 port 0
956 06:52:59.575458 USB2 port 0 enabled
957 06:52:59.578347
958 06:52:59.578529 USB2 port 1 enabled
959 06:52:59.581546 USB2 port 2 disabled
960 06:52:59.581742 USB2 port 3 disabled
961 06:52:59.584750 USB2 port 5 disabled
962 06:52:59.588804 USB2 port 6 enabled
963 06:52:59.589040 USB2 port 9 enabled
964 06:52:59.591786 USB3 port 0 enabled
965 06:52:59.594836 USB3 port 1 enabled
966 06:52:59.595128 USB3 port 2 enabled
967 06:52:59.598777 USB3 port 3 enabled
968 06:52:59.599246 USB3 port 4 disabled
969 06:52:59.601779 USB2 port 0 scanning...
970 06:52:59.604830 scan_static_bus for USB2 port 0
971 06:52:59.608692 scan_static_bus for USB2 port 0 done
972 06:52:59.615082 scan_bus: scanning of bus USB2 port 0 took 9695 usecs
973 06:52:59.618913 USB2 port 1 scanning...
974 06:52:59.622062 scan_static_bus for USB2 port 1
975 06:52:59.625186 scan_static_bus for USB2 port 1 done
976 06:52:59.628513 scan_bus: scanning of bus USB2 port 1 took 9701 usecs
977 06:52:59.631780 USB2 port 6 scanning...
978 06:52:59.635427 scan_static_bus for USB2 port 6
979 06:52:59.638628 scan_static_bus for USB2 port 6 done
980 06:52:59.645456 scan_bus: scanning of bus USB2 port 6 took 9710 usecs
981 06:52:59.648574 USB2 port 9 scanning...
982 06:52:59.651736 scan_static_bus for USB2 port 9
983 06:52:59.655000 scan_static_bus for USB2 port 9 done
984 06:52:59.658330 scan_bus: scanning of bus USB2 port 9 took 9700 usecs
985 06:52:59.661862 USB3 port 0 scanning...
986 06:52:59.665102 scan_static_bus for USB3 port 0
987 06:52:59.668253 scan_static_bus for USB3 port 0 done
988 06:52:59.675230 scan_bus: scanning of bus USB3 port 0 took 9699 usecs
989 06:52:59.678484 USB3 port 1 scanning...
990 06:52:59.681678 scan_static_bus for USB3 port 1
991 06:52:59.685334 scan_static_bus for USB3 port 1 done
992 06:52:59.688481 scan_bus: scanning of bus USB3 port 1 took 9699 usecs
993 06:52:59.691678 USB3 port 2 scanning...
994 06:52:59.694844 scan_static_bus for USB3 port 2
995 06:52:59.698655 scan_static_bus for USB3 port 2 done
996 06:52:59.704850 scan_bus: scanning of bus USB3 port 2 took 9690 usecs
997 06:52:59.708607 USB3 port 3 scanning...
998 06:52:59.711750 scan_static_bus for USB3 port 3
999 06:52:59.714916 scan_static_bus for USB3 port 3 done
1000 06:52:59.718115 scan_bus: scanning of bus USB3 port 3 took 9693 usecs
1001 06:52:59.724997 scan_static_bus for USB0 port 0 done
1002 06:52:59.728116 scan_bus: scanning of bus USB0 port 0 took 155388 usecs
1003 06:52:59.731338 scan_static_bus for PCI: 00:14.0 done
1004 06:52:59.738477 scan_bus: scanning of bus PCI: 00:14.0 took 173014 usecs
1005 06:52:59.741495 PCI: 00:15.0 scanning...
1006 06:52:59.744754 scan_generic_bus for PCI: 00:15.0
1007 06:52:59.747922 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1008 06:52:59.751697 scan_generic_bus for PCI: 00:15.0 done
1009 06:52:59.758061 scan_bus: scanning of bus PCI: 00:15.0 took 14303 usecs
1010 06:52:59.761225 PCI: 00:15.1 scanning...
1011 06:52:59.765193 scan_generic_bus for PCI: 00:15.1
1012 06:52:59.768309 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1013 06:52:59.771776 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1014 06:52:59.778140 scan_generic_bus for PCI: 00:15.1 done
1015 06:52:59.781156 scan_bus: scanning of bus PCI: 00:15.1 took 18624 usecs
1016 06:52:59.785148 PCI: 00:19.0 scanning...
1017 06:52:59.788391 scan_generic_bus for PCI: 00:19.0
1018 06:52:59.791763 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1019 06:52:59.797925 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1020 06:52:59.801640 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1021 06:52:59.804756 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1022 06:52:59.807997 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1023 06:52:59.811004 scan_generic_bus for PCI: 00:19.0 done
1024 06:52:59.814956
1025 06:52:59.817954 scan_bus: scanning of bus PCI: 00:19.0 took 30736 usecs
1026 06:52:59.821140 PCI: 00:1d.0 scanning...
1027 06:52:59.824379 do_pci_scan_bridge for PCI: 00:1d.0
1028 06:52:59.827822 PCI: pci_scan_bus for bus 01
1029 06:52:59.831178 PCI: 01:00.0 [1c5c/1327] enabled
1030 06:52:59.834453 Enabling Common Clock Configuration
1031 06:52:59.837567 L1 Sub-State supported from root port 29
1032 06:52:59.840961 L1 Sub-State Support = 0xf
1033 06:52:59.844294 CommonModeRestoreTime = 0x28
1034 06:52:59.848007 Power On Value = 0x16, Power On Scale = 0x0
1035 06:52:59.851148 ASPM: Enabled L1
1036 06:52:59.857644 scan_bus: scanning of bus PCI: 00:1d.0 took 32790 usecs
1037 06:52:59.858176 PCI: 00:1e.2 scanning...
1038 06:52:59.861505 scan_generic_bus for PCI: 00:1e.2
1039 06:52:59.864664
1040 06:52:59.867711 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1041 06:52:59.871548 scan_generic_bus for PCI: 00:1e.2 done
1042 06:52:59.875201 scan_bus: scanning of bus PCI: 00:1e.2 took 14000 usecs
1043 06:52:59.878085
1044 06:52:59.878574 PCI: 00:1e.3 scanning...
1045 06:52:59.881251 scan_generic_bus for PCI: 00:1e.3
1046 06:52:59.887675 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1047 06:52:59.890794 scan_generic_bus for PCI: 00:1e.3 done
1048 06:52:59.894245 scan_bus: scanning of bus PCI: 00:1e.3 took 13989 usecs
1049 06:52:59.897812 PCI: 00:1f.0 scanning...
1050 06:52:59.901229 scan_static_bus for PCI: 00:1f.0
1051 06:52:59.904329 PNP: 0c09.0 enabled
1052 06:52:59.907540 scan_static_bus for PCI: 00:1f.0 done
1053 06:52:59.914010 scan_bus: scanning of bus PCI: 00:1f.0 took 12052 usecs
1054 06:52:59.914531 PCI: 00:1f.3 scanning...
1055 06:52:59.920769 scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs
1056 06:52:59.924615 PCI: 00:1f.4 scanning...
1057 06:52:59.927751 scan_generic_bus for PCI: 00:1f.4
1058 06:52:59.930892 scan_generic_bus for PCI: 00:1f.4 done
1059 06:52:59.937353 scan_bus: scanning of bus PCI: 00:1f.4 took 10172 usecs
1060 06:52:59.940965 PCI: 00:1f.5 scanning...
1061 06:52:59.944307 scan_generic_bus for PCI: 00:1f.5
1062 06:52:59.947479 scan_generic_bus for PCI: 00:1f.5 done
1063 06:52:59.953781 scan_bus: scanning of bus PCI: 00:1f.5 took 10197 usecs
1064 06:52:59.957551 scan_bus: scanning of bus DOMAIN: 0000 took 605108 usecs
1065 06:52:59.960859 scan_static_bus for Root Device done
1066 06:52:59.967003 scan_bus: scanning of bus Root Device took 624984 usecs
1067 06:52:59.967520 done
1068 06:52:59.970226 Chrome EC: UHEPI supported
1069 06:52:59.977324 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1070 06:52:59.983803 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1071 06:52:59.990332 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1072 06:52:59.997385 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1073 06:53:00.000582 SPI flash protection: WPSW=0 SRP0=0
1074 06:53:00.003796 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1075 06:53:00.010214 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1076 06:53:00.014020 found VGA at PCI: 00:02.0
1077 06:53:00.017127 Setting up VGA for PCI: 00:02.0
1078 06:53:00.020301 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1079 06:53:00.026708 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1080 06:53:00.029986 Allocating resources...
1081 06:53:00.030464 Reading resources...
1082 06:53:00.033861 Root Device read_resources bus 0 link: 0
1083 06:53:00.040208 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1084 06:53:00.044032 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1085 06:53:00.050232 DOMAIN: 0000 read_resources bus 0 link: 0
1086 06:53:00.053995 PCI: 00:14.0 read_resources bus 0 link: 0
1087 06:53:00.057222
1088 06:53:00.060346 USB0 port 0 read_resources bus 0 link: 0
1089 06:53:00.067548 USB0 port 0 read_resources bus 0 link: 0 done
1090 06:53:00.070808 PCI: 00:14.0 read_resources bus 0 link: 0 done
1091 06:53:00.078272 PCI: 00:15.0 read_resources bus 1 link: 0
1092 06:53:00.081973 PCI: 00:15.0 read_resources bus 1 link: 0 done
1093 06:53:00.088433 PCI: 00:15.1 read_resources bus 2 link: 0
1094 06:53:00.091621 PCI: 00:15.1 read_resources bus 2 link: 0 done
1095 06:53:00.099421 PCI: 00:19.0 read_resources bus 3 link: 0
1096 06:53:00.105634 PCI: 00:19.0 read_resources bus 3 link: 0 done
1097 06:53:00.108901 PCI: 00:1d.0 read_resources bus 1 link: 0
1098 06:53:00.115570 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1099 06:53:00.119235 PCI: 00:1e.2 read_resources bus 4 link: 0
1100 06:53:00.125617 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1101 06:53:00.128943 PCI: 00:1e.3 read_resources bus 5 link: 0
1102 06:53:00.135907 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1103 06:53:00.139122 PCI: 00:1f.0 read_resources bus 0 link: 0
1104 06:53:00.145513 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1105 06:53:00.148883 DOMAIN: 0000 read_resources bus 0 link: 0 done
1106 06:53:00.152233
1107 06:53:00.155302 Root Device read_resources bus 0 link: 0 done
1108 06:53:00.158687 Done reading resources.
1109 06:53:00.162042 Show resources in subtree (Root Device)...After reading.
1110 06:53:00.168719 Root Device child on link 0 CPU_CLUSTER: 0
1111 06:53:00.171883 CPU_CLUSTER: 0 child on link 0 APIC: 00
1112 06:53:00.172450 APIC: 00
1113 06:53:00.174816 APIC: 04
1114 06:53:00.174905 APIC: 01
1115 06:53:00.178673 APIC: 02
1116 06:53:00.178772 APIC: 05
1117 06:53:00.178862 APIC: 03
1118 06:53:00.181885 APIC: 06
1119 06:53:00.181983 APIC: 07
1120 06:53:00.185221 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1121 06:53:00.194828 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1122 06:53:00.205008 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1123 06:53:00.254330 PCI: 00:00.0
1124 06:53:00.254692 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1125 06:53:00.254999 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1126 06:53:00.255103 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1127 06:53:00.255397 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1128 06:53:00.255495 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1129 06:53:00.304622 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1130 06:53:00.304728 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1131 06:53:00.304995 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1132 06:53:00.305077 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1133 06:53:00.305341 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1134 06:53:00.343390 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1135 06:53:00.343880 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1136 06:53:00.344156 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1137 06:53:00.344426 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1138 06:53:00.347400 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1139 06:53:00.357668 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1140 06:53:00.357755 PCI: 00:02.0
1141 06:53:00.367265 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1142 06:53:00.380610 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1143 06:53:00.387104 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1144 06:53:00.390449 PCI: 00:04.0
1145 06:53:00.390534 PCI: 00:08.0
1146 06:53:00.400552 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1147 06:53:00.403684 PCI: 00:12.0
1148 06:53:00.413866 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1149 06:53:00.416939 PCI: 00:14.0 child on link 0 USB0 port 0
1150 06:53:00.427129 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1151 06:53:00.430386 USB0 port 0 child on link 0 USB2 port 0
1152 06:53:00.433626 USB2 port 0
1153 06:53:00.433735 USB2 port 1
1154 06:53:00.437362 USB2 port 2
1155 06:53:00.437459 USB2 port 3
1156 06:53:00.440487 USB2 port 5
1157 06:53:00.440584 USB2 port 6
1158 06:53:00.443771 USB2 port 9
1159 06:53:00.443867 USB3 port 0
1160 06:53:00.446915
1161 06:53:00.447012 USB3 port 1
1162 06:53:00.450512 USB3 port 2
1163 06:53:00.450607 USB3 port 3
1164 06:53:00.453692 USB3 port 4
1165 06:53:00.453782 PCI: 00:14.2
1166 06:53:00.463314 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1167 06:53:00.473555 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1168 06:53:00.476796 PCI: 00:14.3
1169 06:53:00.486449 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1170 06:53:00.489724 PCI: 00:15.0 child on link 0 I2C: 01:15
1171 06:53:00.500002 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1172 06:53:00.500116 I2C: 01:15
1173 06:53:00.506149 PCI: 00:15.1 child on link 0 I2C: 02:5d
1174 06:53:00.516309 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1175 06:53:00.516405 I2C: 02:5d
1176 06:53:00.519454 GENERIC: 0.0
1177 06:53:00.519549 PCI: 00:16.0
1178 06:53:00.529599 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1179 06:53:00.532796 PCI: 00:17.0
1180 06:53:00.539739 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1181 06:53:00.549499 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1182 06:53:00.559715 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1183 06:53:00.566132 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1184 06:53:00.575758 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1185 06:53:00.582749 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1186 06:53:00.589238 PCI: 00:19.0 child on link 0 I2C: 03:1a
1187 06:53:00.599340 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1188 06:53:00.599434 I2C: 03:1a
1189 06:53:00.602662 I2C: 03:38
1190 06:53:00.602748 I2C: 03:39
1191 06:53:00.605945 I2C: 03:3a
1192 06:53:00.606028 I2C: 03:3b
1193 06:53:00.608983 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1194 06:53:00.619200 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1195 06:53:00.629156 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1196 06:53:00.638745 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1197 06:53:00.638838 PCI: 01:00.0
1198 06:53:00.648918 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1199 06:53:00.652068 PCI: 00:1e.0
1200 06:53:00.662191 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1201 06:53:00.671753 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1202 06:53:00.675550 PCI: 00:1e.2 child on link 0 SPI: 00
1203 06:53:00.685579 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1204 06:53:00.688737 SPI: 00
1205 06:53:00.692024 PCI: 00:1e.3 child on link 0 SPI: 01
1206 06:53:00.701940 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1207 06:53:00.702027 SPI: 01
1208 06:53:00.708321 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1209 06:53:00.715333 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1210 06:53:00.725366 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1211 06:53:00.725470 PNP: 0c09.0
1212 06:53:00.735254 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1213 06:53:00.735352 PCI: 00:1f.3
1214 06:53:00.738429
1215 06:53:00.744883 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1216 06:53:00.747923
1217 06:53:00.758080 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1218 06:53:00.758180 PCI: 00:1f.4
1219 06:53:00.768198 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1220 06:53:00.777729 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1221 06:53:00.777822 PCI: 00:1f.5
1222 06:53:00.787888 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1223 06:53:00.794685 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1224 06:53:00.800974 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1225 06:53:00.807430 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1226 06:53:00.811308 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1227 06:53:00.814485 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1228 06:53:00.817791 PCI: 00:17.0 18 * [0x60 - 0x67] io
1229 06:53:00.821040 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1230 06:53:00.827596 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1231 06:53:00.834061 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1232 06:53:00.843884 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1233 06:53:00.850979 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1234 06:53:00.857341 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1235 06:53:00.860701 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1236 06:53:00.870663 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1237 06:53:00.873858 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1238 06:53:00.880441 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1239 06:53:00.883513 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1240 06:53:00.890404 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1241 06:53:00.893542 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1242 06:53:00.900706 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1243 06:53:00.903839 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1244 06:53:00.910390 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1245 06:53:00.913563 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1246 06:53:00.916635 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1247 06:53:00.920412
1248 06:53:00.923513 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1249 06:53:00.926648 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1250 06:53:00.933426 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1251 06:53:00.936599 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1252 06:53:00.943112 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1253 06:53:00.946832 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1254 06:53:00.953131 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1255 06:53:00.956453 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1256 06:53:00.963254 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1257 06:53:00.966331 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1258 06:53:00.973345 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1259 06:53:00.976500 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1260 06:53:00.982879 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1261 06:53:00.989975 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1262 06:53:00.993081 avoid_fixed_resources: DOMAIN: 0000
1263 06:53:00.999670 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1264 06:53:01.006326 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1265 06:53:01.012678 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1266 06:53:01.019726 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1267 06:53:01.022924
1268 06:53:01.029332 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1269 06:53:01.036239 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1270 06:53:01.042527 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1271 06:53:01.052866 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1272 06:53:01.059162 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1273 06:53:01.065494 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1274 06:53:01.072507 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1275 06:53:01.075526
1276 06:53:01.082605 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1277 06:53:01.082707 Setting resources...
1278 06:53:01.088948 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1279 06:53:01.092039 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1280 06:53:01.099380 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1281 06:53:01.102567 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1282 06:53:01.105773 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1283 06:53:01.112147 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1284 06:53:01.118627 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1285 06:53:01.125562 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1286 06:53:01.131891 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1287 06:53:01.138857 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1288 06:53:01.141952 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1289 06:53:01.148445 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1290 06:53:01.151756 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1291 06:53:01.155597 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1292 06:53:01.158779
1293 06:53:01.161933 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1294 06:53:01.165696 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1295 06:53:01.171991 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1296 06:53:01.175332 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1297 06:53:01.182126 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1298 06:53:01.185240 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1299 06:53:01.191803 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1300 06:53:01.194900 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1301 06:53:01.202019 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1302 06:53:01.205247 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1303 06:53:01.211786 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1304 06:53:01.214753 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1305 06:53:01.221876 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1306 06:53:01.225166 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1307 06:53:01.228397 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1308 06:53:01.235174 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1309 06:53:01.238308 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1310 06:53:01.245108 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1311 06:53:01.251510 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1312 06:53:01.257924 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1313 06:53:01.268129 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1314 06:53:01.274536 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1315 06:53:01.277717 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1316 06:53:01.287940 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1317 06:53:01.291078 Root Device assign_resources, bus 0 link: 0
1318 06:53:01.294189 DOMAIN: 0000 assign_resources, bus 0 link: 0
1319 06:53:01.304543 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1320 06:53:01.310818 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1321 06:53:01.321193 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1322 06:53:01.327434 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1323 06:53:01.337826 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1324 06:53:01.344021 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1325 06:53:01.351041 PCI: 00:14.0 assign_resources, bus 0 link: 0
1326 06:53:01.354221 PCI: 00:14.0 assign_resources, bus 0 link: 0
1327 06:53:01.364350 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1328 06:53:01.370639 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1329 06:53:01.377142 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1330 06:53:01.387956 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1331 06:53:01.391177 PCI: 00:15.0 assign_resources, bus 1 link: 0
1332 06:53:01.397512 PCI: 00:15.0 assign_resources, bus 1 link: 0
1333 06:53:01.404452 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1334 06:53:01.410805 PCI: 00:15.1 assign_resources, bus 2 link: 0
1335 06:53:01.414019 PCI: 00:15.1 assign_resources, bus 2 link: 0
1336 06:53:01.420451 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1337 06:53:01.431162 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1338 06:53:01.437479 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1339 06:53:01.444308 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1340 06:53:01.447500
1341 06:53:01.453978 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1342 06:53:01.460966 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1343 06:53:01.467243 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1344 06:53:01.470492
1345 06:53:01.477539 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1346 06:53:01.480694 PCI: 00:19.0 assign_resources, bus 3 link: 0
1347 06:53:01.487177 PCI: 00:19.0 assign_resources, bus 3 link: 0
1348 06:53:01.493599 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1349 06:53:01.503684 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1350 06:53:01.513429 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1351 06:53:01.516603 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1352 06:53:01.526839 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1353 06:53:01.529972 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1354 06:53:01.540353 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1355 06:53:01.546424 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1356 06:53:01.549684 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1357 06:53:01.556755 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1358 06:53:01.563094 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1359 06:53:01.569602 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1360 06:53:01.573331 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1361 06:53:01.579697 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1362 06:53:01.582851 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1363 06:53:01.589217 LPC: Trying to open IO window from 800 size 1ff
1364 06:53:01.595744 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1365 06:53:01.605897 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1366 06:53:01.612388 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1367 06:53:01.618823 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1368 06:53:01.621994
1369 06:53:01.625739 DOMAIN: 0000 assign_resources, bus 0 link: 0
1370 06:53:01.628823 Root Device assign_resources, bus 0 link: 0
1371 06:53:01.632010 Done setting resources.
1372 06:53:01.639013 Show resources in subtree (Root Device)...After assigning values.
1373 06:53:01.642177 Root Device child on link 0 CPU_CLUSTER: 0
1374 06:53:01.648478 CPU_CLUSTER: 0 child on link 0 APIC: 00
1375 06:53:01.648571 APIC: 00
1376 06:53:01.648648 APIC: 04
1377 06:53:01.652243 APIC: 01
1378 06:53:01.652324 APIC: 02
1379 06:53:01.655571 APIC: 05
1380 06:53:01.655667 APIC: 03
1381 06:53:01.655743 APIC: 06
1382 06:53:01.658786 APIC: 07
1383 06:53:01.661935 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1384 06:53:01.671680 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1385 06:53:01.681766 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1386 06:53:01.684921 PCI: 00:00.0
1387 06:53:01.695274 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1388 06:53:01.704934 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1389 06:53:01.711292 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1390 06:53:01.714569
1391 06:53:01.721033 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1392 06:53:01.731212 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1393 06:53:01.741267 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1394 06:53:01.751202 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1395 06:53:01.760784 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1396 06:53:01.767661 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1397 06:53:01.770844
1398 06:53:01.777616 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1399 06:53:01.787695 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1400 06:53:01.797187 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1401 06:53:01.807588 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1402 06:53:01.817393 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1403 06:53:01.827196 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1404 06:53:01.833557 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1405 06:53:01.836637 PCI: 00:02.0
1406 06:53:01.846732 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1407 06:53:01.856839 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1408 06:53:01.866412 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1409 06:53:01.869742 PCI: 00:04.0
1410 06:53:01.869830 PCI: 00:08.0
1411 06:53:01.879919 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1412 06:53:01.883020 PCI: 00:12.0
1413 06:53:01.893366 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1414 06:53:01.896675 PCI: 00:14.0 child on link 0 USB0 port 0
1415 06:53:01.906174 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1416 06:53:01.913140 USB0 port 0 child on link 0 USB2 port 0
1417 06:53:01.913245 USB2 port 0
1418 06:53:01.916399 USB2 port 1
1419 06:53:01.916496 USB2 port 2
1420 06:53:01.919614 USB2 port 3
1421 06:53:01.919711 USB2 port 5
1422 06:53:01.922860 USB2 port 6
1423 06:53:01.922959 USB2 port 9
1424 06:53:01.926036 USB3 port 0
1425 06:53:01.926133 USB3 port 1
1426 06:53:01.929475 USB3 port 2
1427 06:53:01.929572 USB3 port 3
1428 06:53:01.932775 USB3 port 4
1429 06:53:01.932877 PCI: 00:14.2
1430 06:53:01.946326 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1431 06:53:01.956327 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1432 06:53:01.956444 PCI: 00:14.3
1433 06:53:01.965913 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1434 06:53:01.972430 PCI: 00:15.0 child on link 0 I2C: 01:15
1435 06:53:01.982570 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1436 06:53:01.982672 I2C: 01:15
1437 06:53:01.985701 PCI: 00:15.1 child on link 0 I2C: 02:5d
1438 06:53:01.999075 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1439 06:53:01.999175 I2C: 02:5d
1440 06:53:02.002120 GENERIC: 0.0
1441 06:53:02.002217 PCI: 00:16.0
1442 06:53:02.012399 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1443 06:53:02.015603 PCI: 00:17.0
1444 06:53:02.025493 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1445 06:53:02.034980 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1446 06:53:02.045239 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1447 06:53:02.051691 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1448 06:53:02.061814 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1449 06:53:02.071482 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1450 06:53:02.075273 PCI: 00:19.0 child on link 0 I2C: 03:1a
1451 06:53:02.078647
1452 06:53:02.087930 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1453 06:53:02.088024 I2C: 03:1a
1454 06:53:02.091703 I2C: 03:38
1455 06:53:02.091799 I2C: 03:39
1456 06:53:02.094949 I2C: 03:3a
1457 06:53:02.095046 I2C: 03:3b
1458 06:53:02.098189 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1459 06:53:02.107822 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1460 06:53:02.117980 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1461 06:53:02.127648 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1462 06:53:02.130929 PCI: 01:00.0
1463 06:53:02.140975 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1464 06:53:02.144201 PCI: 00:1e.0
1465 06:53:02.154389 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1466 06:53:02.164450 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1467 06:53:02.167815 PCI: 00:1e.2 child on link 0 SPI: 00
1468 06:53:02.177375 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1469 06:53:02.180568 SPI: 00
1470 06:53:02.183795 PCI: 00:1e.3 child on link 0 SPI: 01
1471 06:53:02.194027 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1472 06:53:02.194128 SPI: 01
1473 06:53:02.200485 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1474 06:53:02.207005 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1475 06:53:02.216830 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1476 06:53:02.220019 PNP: 0c09.0
1477 06:53:02.227307 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1478 06:53:02.230345 PCI: 00:1f.3
1479 06:53:02.240429 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1480 06:53:02.250024 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1481 06:53:02.253204 PCI: 00:1f.4
1482 06:53:02.259978 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1483 06:53:02.269782 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1484 06:53:02.273013 PCI: 00:1f.5
1485 06:53:02.283268 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1486 06:53:02.286337 Done allocating resources.
1487 06:53:02.289427 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1488 06:53:02.293319 Enabling resources...
1489 06:53:02.300321 PCI: 00:00.0 subsystem <- 8086/9b61
1490 06:53:02.300419 PCI: 00:00.0 cmd <- 06
1491 06:53:02.303428 PCI: 00:02.0 subsystem <- 8086/9b41
1492 06:53:02.306691 PCI: 00:02.0 cmd <- 03
1493 06:53:02.309913 PCI: 00:08.0 cmd <- 06
1494 06:53:02.313142 PCI: 00:12.0 subsystem <- 8086/02f9
1495 06:53:02.316437 PCI: 00:12.0 cmd <- 02
1496 06:53:02.319569 PCI: 00:14.0 subsystem <- 8086/02ed
1497 06:53:02.323385 PCI: 00:14.0 cmd <- 02
1498 06:53:02.326599 PCI: 00:14.2 cmd <- 02
1499 06:53:02.329868 PCI: 00:14.3 subsystem <- 8086/02f0
1500 06:53:02.329963 PCI: 00:14.3 cmd <- 02
1501 06:53:02.336784 PCI: 00:15.0 subsystem <- 8086/02e8
1502 06:53:02.336875 PCI: 00:15.0 cmd <- 02
1503 06:53:02.339978 PCI: 00:15.1 subsystem <- 8086/02e9
1504 06:53:02.343140 PCI: 00:15.1 cmd <- 02
1505 06:53:02.346303 PCI: 00:16.0 subsystem <- 8086/02e0
1506 06:53:02.349625 PCI: 00:16.0 cmd <- 02
1507 06:53:02.353425 PCI: 00:17.0 subsystem <- 8086/02d3
1508 06:53:02.356584 PCI: 00:17.0 cmd <- 03
1509 06:53:02.359809 PCI: 00:19.0 subsystem <- 8086/02c5
1510 06:53:02.362919 PCI: 00:19.0 cmd <- 02
1511 06:53:02.366165 PCI: 00:1d.0 bridge ctrl <- 0013
1512 06:53:02.369842 PCI: 00:1d.0 subsystem <- 8086/02b0
1513 06:53:02.373036 PCI: 00:1d.0 cmd <- 06
1514 06:53:02.376270 PCI: 00:1e.0 subsystem <- 8086/02a8
1515 06:53:02.379497 PCI: 00:1e.0 cmd <- 06
1516 06:53:02.382654 PCI: 00:1e.2 subsystem <- 8086/02aa
1517 06:53:02.385944 PCI: 00:1e.2 cmd <- 06
1518 06:53:02.389723 PCI: 00:1e.3 subsystem <- 8086/02ab
1519 06:53:02.389815 PCI: 00:1e.3 cmd <- 02
1520 06:53:02.395927 PCI: 00:1f.0 subsystem <- 8086/0284
1521 06:53:02.396019 PCI: 00:1f.0 cmd <- 407
1522 06:53:02.399730 PCI: 00:1f.3 subsystem <- 8086/02c8
1523 06:53:02.402822
1524 06:53:02.402918 PCI: 00:1f.3 cmd <- 02
1525 06:53:02.406013 PCI: 00:1f.4 subsystem <- 8086/02a3
1526 06:53:02.409213 PCI: 00:1f.4 cmd <- 03
1527 06:53:02.412971 PCI: 00:1f.5 subsystem <- 8086/02a4
1528 06:53:02.416116 PCI: 00:1f.5 cmd <- 406
1529 06:53:02.425177 PCI: 01:00.0 cmd <- 02
1530 06:53:02.430417 done.
1531 06:53:02.443036 ME: Version: 14.0.39.1367
1532 06:53:02.449446 BS: BS_DEV_ENABLE times (ms): entry 0 run 18 exit 12
1533 06:53:02.452598 Initializing devices...
1534 06:53:02.452701 Root Device init ...
1535 06:53:02.459539 Chrome EC: Set SMI mask to 0x0000000000000000
1536 06:53:02.462613 Chrome EC: clear events_b mask to 0x0000000000000000
1537 06:53:02.469363 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1538 06:53:02.476305 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1539 06:53:02.482647 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1540 06:53:02.486450 Chrome EC: Set WAKE mask to 0x0000000000000000
1541 06:53:02.489455 Root Device init finished in 35241 usecs
1542 06:53:02.492682 CPU_CLUSTER: 0 init ...
1543 06:53:02.496498 CPU_CLUSTER: 0 init finished in 2447 usecs
1544 06:53:02.499713
1545 06:53:02.503626 PCI: 00:00.0 init ...
1546 06:53:02.506703 CPU TDP: 15 Watts
1547 06:53:02.510538 CPU PL2 = 64 Watts
1548 06:53:02.513684 PCI: 00:00.0 init finished in 7077 usecs
1549 06:53:02.517003 PCI: 00:02.0 init ...
1550 06:53:02.520196 PCI: 00:02.0 init finished in 2253 usecs
1551 06:53:02.523344 PCI: 00:08.0 init ...
1552 06:53:02.527057 PCI: 00:08.0 init finished in 2252 usecs
1553 06:53:02.530219 PCI: 00:12.0 init ...
1554 06:53:02.533406 PCI: 00:12.0 init finished in 2253 usecs
1555 06:53:02.536649 PCI: 00:14.0 init ...
1556 06:53:02.539936 PCI: 00:14.0 init finished in 2254 usecs
1557 06:53:02.543600 PCI: 00:14.2 init ...
1558 06:53:02.546823 PCI: 00:14.2 init finished in 2254 usecs
1559 06:53:02.549937 PCI: 00:14.3 init ...
1560 06:53:02.553061 PCI: 00:14.3 init finished in 2271 usecs
1561 06:53:02.556200 PCI: 00:15.0 init ...
1562 06:53:02.559892 DW I2C bus 0 at 0xd121f000 (400 KHz)
1563 06:53:02.563196 PCI: 00:15.0 init finished in 5969 usecs
1564 06:53:02.566339 PCI: 00:15.1 init ...
1565 06:53:02.570045 DW I2C bus 1 at 0xd1220000 (400 KHz)
1566 06:53:02.573324 PCI: 00:15.1 init finished in 5977 usecs
1567 06:53:02.576611
1568 06:53:02.576692 PCI: 00:16.0 init ...
1569 06:53:02.583122 PCI: 00:16.0 init finished in 2252 usecs
1570 06:53:02.583210 PCI: 00:19.0 init ...
1571 06:53:02.586154
1572 06:53:02.589426 DW I2C bus 4 at 0xd1222000 (400 KHz)
1573 06:53:02.593060 PCI: 00:19.0 init finished in 5978 usecs
1574 06:53:02.596382 PCI: 00:1d.0 init ...
1575 06:53:02.599546 Initializing PCH PCIe bridge.
1576 06:53:02.602656 PCI: 00:1d.0 init finished in 5286 usecs
1577 06:53:02.605856 PCI: 00:1f.0 init ...
1578 06:53:02.609108 IOAPIC: Initializing IOAPIC at 0xfec00000
1579 06:53:02.616163 IOAPIC: Bootstrap Processor Local APIC = 0x00
1580 06:53:02.616260 IOAPIC: ID = 0x02
1581 06:53:02.619390 IOAPIC: Dumping registers
1582 06:53:02.622506 reg 0x0000: 0x02000000
1583 06:53:02.626384 reg 0x0001: 0x00770020
1584 06:53:02.626481 reg 0x0002: 0x00000000
1585 06:53:02.632739 PCI: 00:1f.0 init finished in 23552 usecs
1586 06:53:02.635973 PCI: 00:1f.4 init ...
1587 06:53:02.639103 PCI: 00:1f.4 init finished in 2262 usecs
1588 06:53:02.650026 PCI: 01:00.0 init ...
1589 06:53:02.653102 PCI: 01:00.0 init finished in 2254 usecs
1590 06:53:02.657602 PNP: 0c09.0 init ...
1591 06:53:02.660720 Google Chrome EC uptime: 11.069 seconds
1592 06:53:02.667489 Google Chrome AP resets since EC boot: 0
1593 06:53:02.670423 Google Chrome most recent AP reset causes:
1594 06:53:02.676867 Google Chrome EC reset flags at last EC boot: reset-pin
1595 06:53:02.680707 PNP: 0c09.0 init finished in 20573 usecs
1596 06:53:02.683944 Devices initialized
1597 06:53:02.684034 Show all devs... After init.
1598 06:53:02.687016
1599 06:53:02.687104 Root Device: enabled 1
1600 06:53:02.690280 CPU_CLUSTER: 0: enabled 1
1601 06:53:02.693504 DOMAIN: 0000: enabled 1
1602 06:53:02.693589 APIC: 00: enabled 1
1603 06:53:02.696680 PCI: 00:00.0: enabled 1
1604 06:53:02.700617 PCI: 00:02.0: enabled 1
1605 06:53:02.703726 PCI: 00:04.0: enabled 0
1606 06:53:02.703812 PCI: 00:05.0: enabled 0
1607 06:53:02.706968 PCI: 00:12.0: enabled 1
1608 06:53:02.710204 PCI: 00:12.5: enabled 0
1609 06:53:02.710291 PCI: 00:12.6: enabled 0
1610 06:53:02.713282
1611 06:53:02.713377 PCI: 00:14.0: enabled 1
1612 06:53:02.716964 PCI: 00:14.1: enabled 0
1613 06:53:02.720498 PCI: 00:14.3: enabled 1
1614 06:53:02.720593 PCI: 00:14.5: enabled 0
1615 06:53:02.723419 PCI: 00:15.0: enabled 1
1616 06:53:02.726677 PCI: 00:15.1: enabled 1
1617 06:53:02.730492 PCI: 00:15.2: enabled 0
1618 06:53:02.730587 PCI: 00:15.3: enabled 0
1619 06:53:02.733484 PCI: 00:16.0: enabled 1
1620 06:53:02.736761 PCI: 00:16.1: enabled 0
1621 06:53:02.739932 PCI: 00:16.2: enabled 0
1622 06:53:02.740027 PCI: 00:16.3: enabled 0
1623 06:53:02.743145 PCI: 00:16.4: enabled 0
1624 06:53:02.746374 PCI: 00:16.5: enabled 0
1625 06:53:02.750249 PCI: 00:17.0: enabled 1
1626 06:53:02.750344 PCI: 00:19.0: enabled 1
1627 06:53:02.753253 PCI: 00:19.1: enabled 0
1628 06:53:02.756462 PCI: 00:19.2: enabled 0
1629 06:53:02.756557 PCI: 00:1a.0: enabled 0
1630 06:53:02.759740 PCI: 00:1c.0: enabled 0
1631 06:53:02.763390 PCI: 00:1c.1: enabled 0
1632 06:53:02.766461 PCI: 00:1c.2: enabled 0
1633 06:53:02.766559 PCI: 00:1c.3: enabled 0
1634 06:53:02.769584 PCI: 00:1c.4: enabled 0
1635 06:53:02.772974 PCI: 00:1c.5: enabled 0
1636 06:53:02.776720 PCI: 00:1c.6: enabled 0
1637 06:53:02.776800 PCI: 00:1c.7: enabled 0
1638 06:53:02.779970 PCI: 00:1d.0: enabled 1
1639 06:53:02.782980 PCI: 00:1d.1: enabled 0
1640 06:53:02.786341 PCI: 00:1d.2: enabled 0
1641 06:53:02.786436 PCI: 00:1d.3: enabled 0
1642 06:53:02.790011 PCI: 00:1d.4: enabled 0
1643 06:53:02.793224 PCI: 00:1d.5: enabled 0
1644 06:53:02.793319 PCI: 00:1e.0: enabled 1
1645 06:53:02.796359
1646 06:53:02.796454 PCI: 00:1e.1: enabled 0
1647 06:53:02.799440 PCI: 00:1e.2: enabled 1
1648 06:53:02.802820 PCI: 00:1e.3: enabled 1
1649 06:53:02.802914 PCI: 00:1f.0: enabled 1
1650 06:53:02.806008 PCI: 00:1f.1: enabled 0
1651 06:53:02.809747 PCI: 00:1f.2: enabled 0
1652 06:53:02.812860 PCI: 00:1f.3: enabled 1
1653 06:53:02.812949 PCI: 00:1f.4: enabled 1
1654 06:53:02.816090 PCI: 00:1f.5: enabled 1
1655 06:53:02.819127 PCI: 00:1f.6: enabled 0
1656 06:53:02.822342 USB0 port 0: enabled 1
1657 06:53:02.822437 I2C: 01:15: enabled 1
1658 06:53:02.826127 I2C: 02:5d: enabled 1
1659 06:53:02.829272 GENERIC: 0.0: enabled 1
1660 06:53:02.829372 I2C: 03:1a: enabled 1
1661 06:53:02.832324 I2C: 03:38: enabled 1
1662 06:53:02.836185 I2C: 03:39: enabled 1
1663 06:53:02.836279 I2C: 03:3a: enabled 1
1664 06:53:02.839523 I2C: 03:3b: enabled 1
1665 06:53:02.842669 PCI: 00:00.0: enabled 1
1666 06:53:02.842759 SPI: 00: enabled 1
1667 06:53:02.845918 SPI: 01: enabled 1
1668 06:53:02.849133 PNP: 0c09.0: enabled 1
1669 06:53:02.849226 USB2 port 0: enabled 1
1670 06:53:02.852400 USB2 port 1: enabled 1
1671 06:53:02.855505 USB2 port 2: enabled 0
1672 06:53:02.855606 USB2 port 3: enabled 0
1673 06:53:02.859370 USB2 port 5: enabled 0
1674 06:53:02.862619 USB2 port 6: enabled 1
1675 06:53:02.865774 USB2 port 9: enabled 1
1676 06:53:02.865862 USB3 port 0: enabled 1
1677 06:53:02.868939 USB3 port 1: enabled 1
1678 06:53:02.872225 USB3 port 2: enabled 1
1679 06:53:02.872313 USB3 port 3: enabled 1
1680 06:53:02.875647 USB3 port 4: enabled 0
1681 06:53:02.879275 APIC: 04: enabled 1
1682 06:53:02.879363 APIC: 01: enabled 1
1683 06:53:02.882448 APIC: 02: enabled 1
1684 06:53:02.885634 APIC: 05: enabled 1
1685 06:53:02.885718 APIC: 03: enabled 1
1686 06:53:02.888897 APIC: 06: enabled 1
1687 06:53:02.888982 APIC: 07: enabled 1
1688 06:53:02.891933 PCI: 00:08.0: enabled 1
1689 06:53:02.895215 PCI: 00:14.2: enabled 1
1690 06:53:02.899003 PCI: 01:00.0: enabled 1
1691 06:53:02.902389 Disabling ACPI via APMC:
1692 06:53:02.902477 done.
1693 06:53:02.908713 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1694 06:53:02.911973 ELOG: NV offset 0xaf0000 size 0x4000
1695 06:53:02.918889 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1696 06:53:02.925482 ELOG: Event(17) added with size 13 at 2023-01-10 06:53:02 UTC
1697 06:53:02.932266 ELOG: Event(92) added with size 9 at 2023-01-10 06:53:02 UTC
1698 06:53:02.938634 ELOG: Event(16) added with size 11 at 2023-01-10 06:53:03 UTC
1699 06:53:02.941870 Erasing flash addr af0000 + 4 KiB
1700 06:53:03.002834 ELOG: Event(93) added with size 9 at 2023-01-10 06:53:03 UTC
1701 06:53:03.009889 ELOG: Event(9A) added with size 9 at 2023-01-10 06:53:03 UTC
1702 06:53:03.016220 ELOG: Event(9E) added with size 10 at 2023-01-10 06:53:03 UTC
1703 06:53:03.022690 ELOG: Event(9F) added with size 14 at 2023-01-10 06:53:03 UTC
1704 06:53:03.029754 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 53
1705 06:53:03.035966 ELOG: Event(A1) added with size 10 at 2023-01-10 06:53:03 UTC
1706 06:53:03.043041 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1707 06:53:03.049505 ELOG: Event(A0) added with size 9 at 2023-01-10 06:53:03 UTC
1708 06:53:03.052668 elog_add_boot_reason: Logged dev mode boot
1709 06:53:03.055831 Finalize devices...
1710 06:53:03.055922 PCI: 00:17.0 final
1711 06:53:03.058963
1712 06:53:03.059043 Devices finalized
1713 06:53:03.065403 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1714 06:53:03.068525 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1715 06:53:03.075656 ME: HFSTS1 : 0x90000245
1716 06:53:03.078794 ME: HFSTS2 : 0x3B850126
1717 06:53:03.081856 ME: HFSTS3 : 0x00000020
1718 06:53:03.085098 ME: HFSTS4 : 0x00004800
1719 06:53:03.092164 ME: HFSTS5 : 0x00000000
1720 06:53:03.095251 ME: HFSTS6 : 0x40400006
1721 06:53:03.098317 ME: Manufacturing Mode : NO
1722 06:53:03.101588 ME: FW Partition Table : OK
1723 06:53:03.105490 ME: Bringup Loader Failure : NO
1724 06:53:03.108617 ME: Firmware Init Complete : YES
1725 06:53:03.111713 ME: Boot Options Present : NO
1726 06:53:03.114867 ME: Update In Progress : NO
1727 06:53:03.118166 ME: D0i3 Support : YES
1728 06:53:03.121763 ME: Low Power State Enabled : NO
1729 06:53:03.124930 ME: CPU Replaced : NO
1730 06:53:03.128173 ME: CPU Replacement Valid : YES
1731 06:53:03.131443 ME: Current Working State : 5
1732 06:53:03.134601 ME: Current Operation State : 1
1733 06:53:03.138356 ME: Current Operation Mode : 0
1734 06:53:03.141494 ME: Error Code : 0
1735 06:53:03.144650 ME: CPU Debug Disabled : YES
1736 06:53:03.147893 ME: TXT Support : NO
1737 06:53:03.151203 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1738 06:53:03.154462
1739 06:53:03.157628 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1740 06:53:03.161345 CBFS @ c08000 size 3f8000
1741 06:53:03.167635 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1742 06:53:03.171411 CBFS: Locating 'fallback/dsdt.aml'
1743 06:53:03.174561 CBFS: Found @ offset 10bb80 size 3fa5
1744 06:53:03.177571 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1745 06:53:03.181350 CBFS @ c08000 size 3f8000
1746 06:53:03.187554 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1747 06:53:03.190804 CBFS: Locating 'fallback/slic'
1748 06:53:03.194635 CBFS: 'fallback/slic' not found.
1749 06:53:03.201574 ACPI: Writing ACPI tables at 99b3e000.
1750 06:53:03.201667 ACPI: * FACS
1751 06:53:03.204810 ACPI: * DSDT
1752 06:53:03.207856 Ramoops buffer: 0x100000@0x99a3d000.
1753 06:53:03.211080 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1754 06:53:03.217383 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1755 06:53:03.220684 Google Chrome EC: version:
1756 06:53:03.224406 ro: helios_v2.0.2659-56403530b
1757 06:53:03.227619 rw: helios_v2.0.2849-c41de27e7d
1758 06:53:03.227702 running image: 1
1759 06:53:03.232102 ACPI: * FADT
1760 06:53:03.232184 SCI is IRQ9
1761 06:53:03.235138 ACPI: added table 1/32, length now 40
1762 06:53:03.238375
1763 06:53:03.238479 ACPI: * SSDT
1764 06:53:03.242200 Found 1 CPU(s) with 8 core(s) each.
1765 06:53:03.245376 Error: Could not locate 'wifi_sar' in VPD.
1766 06:53:03.251793 Checking CBFS for default SAR values
1767 06:53:03.254820 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1768 06:53:03.258232 CBFS @ c08000 size 3f8000
1769 06:53:03.265261 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1770 06:53:03.268409 CBFS: Locating 'wifi_sar_defaults.hex'
1771 06:53:03.271496 CBFS: Found @ offset 5fac0 size 77
1772 06:53:03.274691 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1773 06:53:03.278702 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1774 06:53:03.281831
1775 06:53:03.285115 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1776 06:53:03.291279 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1777 06:53:03.295092 failed to find key in VPD: dsm_calib_r0_0
1778 06:53:03.304906 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1779 06:53:03.307924 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1780 06:53:03.311153 failed to find key in VPD: dsm_calib_r0_1
1781 06:53:03.321395 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1782 06:53:03.327690 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1783 06:53:03.330845 failed to find key in VPD: dsm_calib_r0_2
1784 06:53:03.341001 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1785 06:53:03.344266 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1786 06:53:03.350692 failed to find key in VPD: dsm_calib_r0_3
1787 06:53:03.357197 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1788 06:53:03.363662 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1789 06:53:03.366839 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1790 06:53:03.373722 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1791 06:53:03.377607 EC returned error result code 1
1792 06:53:03.380736 EC returned error result code 1
1793 06:53:03.384370 EC returned error result code 1
1794 06:53:03.387704 PS2K: Bad resp from EC. Vivaldi disabled!
1795 06:53:03.393967 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1796 06:53:03.400940 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1797 06:53:03.403988 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1798 06:53:03.410988 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1799 06:53:03.414313 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1800 06:53:03.420753 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1801 06:53:03.427582 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1802 06:53:03.434018 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1803 06:53:03.437258 ACPI: added table 2/32, length now 44
1804 06:53:03.437346 ACPI: * MCFG
1805 06:53:03.443605 ACPI: added table 3/32, length now 48
1806 06:53:03.443702 ACPI: * TPM2
1807 06:53:03.446955 TPM2 log created at 99a2d000
1808 06:53:03.450167 ACPI: added table 4/32, length now 52
1809 06:53:03.453949 ACPI: * MADT
1810 06:53:03.454039 SCI is IRQ9
1811 06:53:03.457309 ACPI: added table 5/32, length now 56
1812 06:53:03.460471 current = 99b43ac0
1813 06:53:03.460567 ACPI: * DMAR
1814 06:53:03.463758 ACPI: added table 6/32, length now 60
1815 06:53:03.466842 ACPI: * IGD OpRegion
1816 06:53:03.470041 GMA: Found VBT in CBFS
1817 06:53:03.473917 GMA: Found valid VBT in CBFS
1818 06:53:03.476520 ACPI: added table 7/32, length now 64
1819 06:53:03.476609 ACPI: * HPET
1820 06:53:03.480326 ACPI: added table 8/32, length now 68
1821 06:53:03.483724
1822 06:53:03.483838 ACPI: done.
1823 06:53:03.486709 ACPI tables: 31744 bytes.
1824 06:53:03.489913 smbios_write_tables: 99a2c000
1825 06:53:03.493735 EC returned error result code 3
1826 06:53:03.496927 Couldn't obtain OEM name from CBI
1827 06:53:03.500210 Create SMBIOS type 17
1828 06:53:03.503386 PCI: 00:00.0 (Intel Cannonlake)
1829 06:53:03.503474 PCI: 00:14.3 (Intel WiFi)
1830 06:53:03.506651 SMBIOS tables: 939 bytes.
1831 06:53:03.509957 Writing table forward entry at 0x00000500
1832 06:53:03.516431 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1833 06:53:03.519903 Writing coreboot table at 0x99b62000
1834 06:53:03.526390 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1835 06:53:03.529925 1. 0000000000001000-000000000009ffff: RAM
1836 06:53:03.536381 2. 00000000000a0000-00000000000fffff: RESERVED
1837 06:53:03.539490 3. 0000000000100000-0000000099a2bfff: RAM
1838 06:53:03.546640 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1839 06:53:03.549780 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1840 06:53:03.556221 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1841 06:53:03.562668 7. 000000009a000000-000000009f7fffff: RESERVED
1842 06:53:03.566302 8. 00000000e0000000-00000000efffffff: RESERVED
1843 06:53:03.572871 9. 00000000fc000000-00000000fc000fff: RESERVED
1844 06:53:03.575957 10. 00000000fe000000-00000000fe00ffff: RESERVED
1845 06:53:03.579274 11. 00000000fed10000-00000000fed17fff: RESERVED
1846 06:53:03.586235 12. 00000000fed80000-00000000fed83fff: RESERVED
1847 06:53:03.589384 13. 00000000fed90000-00000000fed91fff: RESERVED
1848 06:53:03.595769 14. 00000000feda0000-00000000feda1fff: RESERVED
1849 06:53:03.598929 15. 0000000100000000-000000045e7fffff: RAM
1850 06:53:03.602150 Graphics framebuffer located at 0xc0000000
1851 06:53:03.606033 Passing 5 GPIOs to payload:
1852 06:53:03.612461 NAME | PORT | POLARITY | VALUE
1853 06:53:03.615660 write protect | undefined | high | low
1854 06:53:03.622119 lid | undefined | high | high
1855 06:53:03.629049 power | undefined | high | low
1856 06:53:03.632305 oprom | undefined | high | low
1857 06:53:03.638760 EC in RW | 0x000000cb | high | low
1858 06:53:03.638849 Board ID: 4
1859 06:53:03.645652 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1860 06:53:03.648836 CBFS @ c08000 size 3f8000
1861 06:53:03.652036 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1862 06:53:03.658604 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1863 06:53:03.661723 coreboot table: 1492 bytes.
1864 06:53:03.665046 IMD ROOT 0. 99fff000 00001000
1865 06:53:03.668800 IMD SMALL 1. 99ffe000 00001000
1866 06:53:03.672042 FSP MEMORY 2. 99c4e000 003b0000
1867 06:53:03.675211 CONSOLE 3. 99c2e000 00020000
1868 06:53:03.678397 FMAP 4. 99c2d000 0000054e
1869 06:53:03.681580 TIME STAMP 5. 99c2c000 00000910
1870 06:53:03.685360 VBOOT WORK 6. 99c18000 00014000
1871 06:53:03.688490 MRC DATA 7. 99c16000 00001958
1872 06:53:03.691669 ROMSTG STCK 8. 99c15000 00001000
1873 06:53:03.694817 AFTER CAR 9. 99c0b000 0000a000
1874 06:53:03.697917 RAMSTAGE 10. 99baf000 0005c000
1875 06:53:03.701606 REFCODE 11. 99b7a000 00035000
1876 06:53:03.704801 SMM BACKUP 12. 99b6a000 00010000
1877 06:53:03.707902 COREBOOT 13. 99b62000 00008000
1878 06:53:03.711614 ACPI 14. 99b3e000 00024000
1879 06:53:03.714801 ACPI GNVS 15. 99b3d000 00001000
1880 06:53:03.717933 RAMOOPS 16. 99a3d000 00100000
1881 06:53:03.721187 TPM2 TCGLOG17. 99a2d000 00010000
1882 06:53:03.724544 SMBIOS 18. 99a2c000 00000800
1883 06:53:03.727682 IMD small region:
1884 06:53:03.731657 IMD ROOT 0. 99ffec00 00000400
1885 06:53:03.734633 FSP RUNTIME 1. 99ffebe0 00000004
1886 06:53:03.737791 EC HOSTEVENT 2. 99ffebc0 00000008
1887 06:53:03.741471 POWER STATE 3. 99ffeb80 00000040
1888 06:53:03.744812 ROMSTAGE 4. 99ffeb60 00000004
1889 06:53:03.747908 MEM INFO 5. 99ffe9a0 000001b9
1890 06:53:03.751184 VPD 6. 99ffe920 0000006c
1891 06:53:03.754568 MTRR: Physical address space:
1892 06:53:03.760919 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1893 06:53:03.767248 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1894 06:53:03.774374 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1895 06:53:03.780745 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1896 06:53:03.783943 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1897 06:53:03.787691
1898 06:53:03.790844 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1899 06:53:03.797165 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1900 06:53:03.804236 MTRR: Fixed MSR 0x250 0x0606060606060606
1901 06:53:03.807456 MTRR: Fixed MSR 0x258 0x0606060606060606
1902 06:53:03.810603 MTRR: Fixed MSR 0x259 0x0000000000000000
1903 06:53:03.813839 MTRR: Fixed MSR 0x268 0x0606060606060606
1904 06:53:03.816979 MTRR: Fixed MSR 0x269 0x0606060606060606
1905 06:53:03.823945 MTRR: Fixed MSR 0x26a 0x0606060606060606
1906 06:53:03.827155 MTRR: Fixed MSR 0x26b 0x0606060606060606
1907 06:53:03.830424 MTRR: Fixed MSR 0x26c 0x0606060606060606
1908 06:53:03.833608 MTRR: Fixed MSR 0x26d 0x0606060606060606
1909 06:53:03.840020 MTRR: Fixed MSR 0x26e 0x0606060606060606
1910 06:53:03.843767 MTRR: Fixed MSR 0x26f 0x0606060606060606
1911 06:53:03.846838 call enable_fixed_mtrr()
1912 06:53:03.849955 CPU physical address size: 39 bits
1913 06:53:03.853176 MTRR: default type WB/UC MTRR counts: 6/8.
1914 06:53:03.857022 MTRR: WB selected as default type.
1915 06:53:03.863326 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1916 06:53:03.869687 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1917 06:53:03.876610 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1918 06:53:03.883288 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1919 06:53:03.890031 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1920 06:53:03.896434 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1921 06:53:03.899683 MTRR: Fixed MSR 0x250 0x0606060606060606
1922 06:53:03.902844 MTRR: Fixed MSR 0x258 0x0606060606060606
1923 06:53:03.909642 MTRR: Fixed MSR 0x259 0x0000000000000000
1924 06:53:03.912770 MTRR: Fixed MSR 0x268 0x0606060606060606
1925 06:53:03.915915 MTRR: Fixed MSR 0x269 0x0606060606060606
1926 06:53:03.919164 MTRR: Fixed MSR 0x26a 0x0606060606060606
1927 06:53:03.926190 MTRR: Fixed MSR 0x26b 0x0606060606060606
1928 06:53:03.929321 MTRR: Fixed MSR 0x26c 0x0606060606060606
1929 06:53:03.932412 MTRR: Fixed MSR 0x26d 0x0606060606060606
1930 06:53:03.935824 MTRR: Fixed MSR 0x26e 0x0606060606060606
1931 06:53:03.942711 MTRR: Fixed MSR 0x26f 0x0606060606060606
1932 06:53:03.942808
1933 06:53:03.942911 MTRR check
1934 06:53:03.945848 Fixed MTRRs : Enabled
1935 06:53:03.949072 Variable MTRRs: Enabled
1936 06:53:03.949179
1937 06:53:03.952183 MTRR: Fixed MSR 0x250 0x0606060606060606
1938 06:53:03.955784 MTRR: Fixed MSR 0x250 0x0606060606060606
1939 06:53:03.958896 MTRR: Fixed MSR 0x258 0x0606060606060606
1940 06:53:03.965934 MTRR: Fixed MSR 0x259 0x0000000000000000
1941 06:53:03.969173 MTRR: Fixed MSR 0x268 0x0606060606060606
1942 06:53:03.972390 MTRR: Fixed MSR 0x269 0x0606060606060606
1943 06:53:03.975612 MTRR: Fixed MSR 0x26a 0x0606060606060606
1944 06:53:03.982137 MTRR: Fixed MSR 0x26b 0x0606060606060606
1945 06:53:03.985329 MTRR: Fixed MSR 0x26c 0x0606060606060606
1946 06:53:03.988412 MTRR: Fixed MSR 0x26d 0x0606060606060606
1947 06:53:03.991676 MTRR: Fixed MSR 0x26e 0x0606060606060606
1948 06:53:03.994884 MTRR: Fixed MSR 0x26f 0x0606060606060606
1949 06:53:03.998525
1950 06:53:04.001913 MTRR: Fixed MSR 0x258 0x0606060606060606
1951 06:53:04.004942 call enable_fixed_mtrr()
1952 06:53:04.008084 MTRR: Fixed MSR 0x259 0x0000000000000000
1953 06:53:04.011976 MTRR: Fixed MSR 0x268 0x0606060606060606
1954 06:53:04.015149 MTRR: Fixed MSR 0x269 0x0606060606060606
1955 06:53:04.021638 MTRR: Fixed MSR 0x26a 0x0606060606060606
1956 06:53:04.024703 MTRR: Fixed MSR 0x26b 0x0606060606060606
1957 06:53:04.027806 MTRR: Fixed MSR 0x26c 0x0606060606060606
1958 06:53:04.031689 MTRR: Fixed MSR 0x26d 0x0606060606060606
1959 06:53:04.038017 MTRR: Fixed MSR 0x26e 0x0606060606060606
1960 06:53:04.041069 MTRR: Fixed MSR 0x26f 0x0606060606060606
1961 06:53:04.044807 CPU physical address size: 39 bits
1962 06:53:04.048190 call enable_fixed_mtrr()
1963 06:53:04.051482 call enable_fixed_mtrr()
1964 06:53:04.054479 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1965 06:53:04.057651 CPU physical address size: 39 bits
1966 06:53:04.064575 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1967 06:53:04.067823 MTRR: Fixed MSR 0x250 0x0606060606060606
1968 06:53:04.071128 MTRR: Fixed MSR 0x250 0x0606060606060606
1969 06:53:04.078025 MTRR: Fixed MSR 0x258 0x0606060606060606
1970 06:53:04.081318 MTRR: Fixed MSR 0x259 0x0000000000000000
1971 06:53:04.084455 MTRR: Fixed MSR 0x268 0x0606060606060606
1972 06:53:04.087657 MTRR: Fixed MSR 0x269 0x0606060606060606
1973 06:53:04.091431 MTRR: Fixed MSR 0x26a 0x0606060606060606
1974 06:53:04.097739 MTRR: Fixed MSR 0x26b 0x0606060606060606
1975 06:53:04.100940 MTRR: Fixed MSR 0x26c 0x0606060606060606
1976 06:53:04.104142 MTRR: Fixed MSR 0x26d 0x0606060606060606
1977 06:53:04.107379 MTRR: Fixed MSR 0x26e 0x0606060606060606
1978 06:53:04.114392 MTRR: Fixed MSR 0x26f 0x0606060606060606
1979 06:53:04.117613 MTRR: Fixed MSR 0x258 0x0606060606060606
1980 06:53:04.120655 MTRR: Fixed MSR 0x259 0x0000000000000000
1981 06:53:04.123857 MTRR: Fixed MSR 0x268 0x0606060606060606
1982 06:53:04.127189
1983 06:53:04.130862 MTRR: Fixed MSR 0x269 0x0606060606060606
1984 06:53:04.134174 MTRR: Fixed MSR 0x26a 0x0606060606060606
1985 06:53:04.137202 MTRR: Fixed MSR 0x26b 0x0606060606060606
1986 06:53:04.140464 MTRR: Fixed MSR 0x26c 0x0606060606060606
1987 06:53:04.147347 MTRR: Fixed MSR 0x26d 0x0606060606060606
1988 06:53:04.150524 MTRR: Fixed MSR 0x26e 0x0606060606060606
1989 06:53:04.153644 MTRR: Fixed MSR 0x26f 0x0606060606060606
1990 06:53:04.157391 call enable_fixed_mtrr()
1991 06:53:04.160575 call enable_fixed_mtrr()
1992 06:53:04.163858 CPU physical address size: 39 bits
1993 06:53:04.166962 CPU physical address size: 39 bits
1994 06:53:04.170279 MTRR: Fixed MSR 0x250 0x0606060606060606
1995 06:53:04.173436 MTRR: Fixed MSR 0x250 0x0606060606060606
1996 06:53:04.180465 MTRR: Fixed MSR 0x258 0x0606060606060606
1997 06:53:04.183579 MTRR: Fixed MSR 0x259 0x0000000000000000
1998 06:53:04.187325 MTRR: Fixed MSR 0x268 0x0606060606060606
1999 06:53:04.190522 MTRR: Fixed MSR 0x269 0x0606060606060606
2000 06:53:04.196884 MTRR: Fixed MSR 0x26a 0x0606060606060606
2001 06:53:04.200138 MTRR: Fixed MSR 0x26b 0x0606060606060606
2002 06:53:04.203240 MTRR: Fixed MSR 0x26c 0x0606060606060606
2003 06:53:04.206516 MTRR: Fixed MSR 0x26d 0x0606060606060606
2004 06:53:04.213352 MTRR: Fixed MSR 0x26e 0x0606060606060606
2005 06:53:04.216557 MTRR: Fixed MSR 0x26f 0x0606060606060606
2006 06:53:04.220157 MTRR: Fixed MSR 0x258 0x0606060606060606
2007 06:53:04.223563 call enable_fixed_mtrr()
2008 06:53:04.226483 MTRR: Fixed MSR 0x259 0x0000000000000000
2009 06:53:04.230351 MTRR: Fixed MSR 0x268 0x0606060606060606
2010 06:53:04.236769 MTRR: Fixed MSR 0x269 0x0606060606060606
2011 06:53:04.239740 MTRR: Fixed MSR 0x26a 0x0606060606060606
2012 06:53:04.243535 MTRR: Fixed MSR 0x26b 0x0606060606060606
2013 06:53:04.246769 MTRR: Fixed MSR 0x26c 0x0606060606060606
2014 06:53:04.253126 MTRR: Fixed MSR 0x26d 0x0606060606060606
2015 06:53:04.256228 MTRR: Fixed MSR 0x26e 0x0606060606060606
2016 06:53:04.259989 MTRR: Fixed MSR 0x26f 0x0606060606060606
2017 06:53:04.263299 CPU physical address size: 39 bits
2018 06:53:04.266475 call enable_fixed_mtrr()
2019 06:53:04.269531 CPU physical address size: 39 bits
2020 06:53:04.273324 CPU physical address size: 39 bits
2021 06:53:04.276482 CBFS @ c08000 size 3f8000
2022 06:53:04.282948 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
2023 06:53:04.286123 CBFS: Locating 'fallback/payload'
2024 06:53:04.289433 CBFS: Found @ offset 1c96c0 size 3f798
2025 06:53:04.296407 Checking segment from ROM address 0xffdd16f8
2026 06:53:04.299369 Checking segment from ROM address 0xffdd1714
2027 06:53:04.302700 Loading segment from ROM address 0xffdd16f8
2028 06:53:04.306461 code (compression=0)
2029 06:53:04.315576 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2030 06:53:04.322716 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2031 06:53:04.325935 it's not compressed!
2032 06:53:04.417067 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2033 06:53:04.423405 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2034 06:53:04.427414 Loading segment from ROM address 0xffdd1714
2035 06:53:04.430459 Entry Point 0x30000000
2036 06:53:04.433687 Loaded segments
2037 06:53:04.439300 Finalizing chipset.
2038 06:53:04.442549 Finalizing SMM.
2039 06:53:04.445661 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
2040 06:53:04.449418 mp_park_aps done after 0 msecs.
2041 06:53:04.455669 Jumping to boot code at 30000000(99b62000)
2042 06:53:04.462632 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2043 06:53:04.462730
2044 06:53:04.462806
2045 06:53:04.462877
2046 06:53:04.465850 Starting depthcharge on Helios...
2047 06:53:04.465945
2048 06:53:04.466307 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
2049 06:53:04.466420 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2050 06:53:04.466512 Setting prompt string to ['hatch:']
2051 06:53:04.466602 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
2052 06:53:04.475357 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2053 06:53:04.475452
2054 06:53:04.482459 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2055 06:53:04.482555
2056 06:53:04.488833 board_setup: Info: eMMC controller not present; skipping
2057 06:53:04.488929
2058 06:53:04.491973 New NVMe Controller 0x30053ac0 @ 00:1d:00
2059 06:53:04.492077
2060 06:53:04.498908 board_setup: Info: SDHCI controller not present; skipping
2061 06:53:04.499004
2062 06:53:04.505208 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2063 06:53:04.505305
2064 06:53:04.505380 Wipe memory regions:
2065 06:53:04.505450
2066 06:53:04.508234 [0x00000000001000, 0x000000000a0000)
2067 06:53:04.508336
2068 06:53:04.511961 [0x00000000100000, 0x00000030000000)
2069 06:53:04.515243
2070 06:53:04.582005 [0x00000030657430, 0x00000099a2c000)
2071 06:53:04.582124
2072 06:53:04.731286 [0x00000100000000, 0x0000045e800000)
2073 06:53:04.731437
2074 06:53:06.187285 R8152: Initializing
2075 06:53:06.187446
2076 06:53:06.190527 Version 9 (ocp_data = 6010)
2077 06:53:06.190623
2078 06:53:06.194894 R8152: Done initializing
2079 06:53:06.194989
2080 06:53:06.198611 Adding net device
2081 06:53:06.198706
2082 06:53:06.681268 R8152: Initializing
2083 06:53:06.681433
2084 06:53:06.684376 Version 6 (ocp_data = 5c30)
2085 06:53:06.684471
2086 06:53:06.687436 R8152: Done initializing
2087 06:53:06.687529
2088 06:53:06.691197 net_add_device: Attemp to include the same device
2089 06:53:06.694268
2090 06:53:06.701277 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2091 06:53:06.701371
2092 06:53:06.701445
2093 06:53:06.701513
2094 06:53:06.701799 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2096 06:53:06.802421 hatch: tftpboot 192.168.201.1 8649816/tftp-deploy-9mffkjsr/kernel/bzImage 8649816/tftp-deploy-9mffkjsr/kernel/cmdline 8649816/tftp-deploy-9mffkjsr/ramdisk/ramdisk.cpio.gz
2097 06:53:06.802598 Setting prompt string to 'Starting kernel'
2098 06:53:06.802686 Setting prompt string to ['Starting kernel']
2099 06:53:06.802765 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2100 06:53:06.802853 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2101 06:53:06.807149 tftpboot 192.168.201.1 8649816/tftp-deploy-9mffkjsr/kernel/bzImoy-9mffkjsr/kernel/cmdline 8649816/tftp-deploy-9mffkjsr/ramdisk/ramdisk.cpio.gz
2102 06:53:06.807246
2103 06:53:06.807325 Waiting for link
2104 06:53:06.807398
2105 06:53:07.008229 done.
2106 06:53:07.008395
2107 06:53:07.008480 MAC: 00:24:32:50:1a:59
2108 06:53:07.008557
2109 06:53:07.011246 Sending DHCP discover... done.
2110 06:53:07.011332
2111 06:53:07.014405 Waiting for reply... done.
2112 06:53:07.014497
2113 06:53:07.018138 Sending DHCP request... done.
2114 06:53:07.018229
2115 06:53:07.021359 Waiting for reply... done.
2116 06:53:07.021446
2117 06:53:07.024556 My ip is 192.168.201.14
2118 06:53:07.024637
2119 06:53:07.027727 The DHCP server ip is 192.168.201.1
2120 06:53:07.027836
2121 06:53:07.031130 TFTP server IP predefined by user: 192.168.201.1
2122 06:53:07.031222
2123 06:53:07.037438 Bootfile predefined by user: 8649816/tftp-deploy-9mffkjsr/kernel/bzImage
2124 06:53:07.037535
2125 06:53:07.041177 Sending tftp read request... done.
2126 06:53:07.041267
2127 06:53:07.047523 Waiting for the transfer...
2128 06:53:07.047615
2129 06:53:07.559744 00000000 ################################################################
2130 06:53:07.559904
2131 06:53:08.073463 00080000 ################################################################
2132 06:53:08.073621
2133 06:53:08.585911 00100000 ################################################################
2134 06:53:08.586077
2135 06:53:09.109121 00180000 ################################################################
2136 06:53:09.109293
2137 06:53:09.623568 00200000 ################################################################
2138 06:53:09.623733
2139 06:53:10.139188 00280000 ################################################################
2140 06:53:10.139360
2141 06:53:10.654775 00300000 ################################################################
2142 06:53:10.654942
2143 06:53:11.168425 00380000 ################################################################
2144 06:53:11.168591
2145 06:53:11.682319 00400000 ################################################################
2146 06:53:11.682479
2147 06:53:12.197870 00480000 ################################################################
2148 06:53:12.198033
2149 06:53:12.715003 00500000 ################################################################
2150 06:53:12.715165
2151 06:53:13.255331 00580000 ################################################################
2152 06:53:13.255481
2153 06:53:13.811079 00600000 ################################################################
2154 06:53:13.811230
2155 06:53:14.337401 00680000 ################################################################
2156 06:53:14.337553
2157 06:53:14.594283 00700000 ############################# done.
2158 06:53:14.594444
2159 06:53:14.597960 The bootfile was 7573392 bytes long.
2160 06:53:14.598068
2161 06:53:14.601148 Sending tftp read request... done.
2162 06:53:14.601258
2163 06:53:14.604433 Waiting for the transfer...
2164 06:53:14.604537
2165 06:53:15.194118 00000000 ################################################################
2166 06:53:15.194652
2167 06:53:15.741252 00080000 ################################################################
2168 06:53:15.741437
2169 06:53:16.320054 00100000 ################################################################
2170 06:53:16.320213
2171 06:53:16.895302 00180000 ################################################################
2172 06:53:16.895460
2173 06:53:17.458626 00200000 ################################################################
2174 06:53:17.458783
2175 06:53:18.002486 00280000 ################################################################
2176 06:53:18.002643
2177 06:53:18.572528 00300000 ################################################################
2178 06:53:18.572682
2179 06:53:19.105323 00380000 ################################################################
2180 06:53:19.105475
2181 06:53:19.672991 00400000 ################################################################
2182 06:53:19.673155
2183 06:53:20.240602 00480000 ################################################################
2184 06:53:20.241129
2185 06:53:20.560923 00500000 ################################ done.
2186 06:53:20.561440
2187 06:53:20.564530 Sending tftp read request... done.
2188 06:53:20.564974
2189 06:53:20.567866 Waiting for the transfer...
2190 06:53:20.568347
2191 06:53:20.568804 00000000 # done.
2192 06:53:20.569229
2193 06:53:20.577484 Command line loaded dynamically from TFTP file: 8649816/tftp-deploy-9mffkjsr/kernel/cmdline
2194 06:53:20.578051
2195 06:53:20.603905 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8649816/extract-nfsrootfs-u9umhu76,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2196 06:53:20.604514
2197 06:53:20.610507 ec_init(0): CrosEC protocol v3 supported (256, 256)
2198 06:53:20.610956
2199 06:53:20.617426 Shutting down all USB controllers.
2200 06:53:20.617867
2201 06:53:20.618347 Removing current net device
2202 06:53:20.618762
2203 06:53:20.620606 Finalizing coreboot
2204 06:53:20.621059
2205 06:53:20.627216 Exiting depthcharge with code 4 at timestamp: 23542200
2206 06:53:20.627665
2207 06:53:20.628145
2208 06:53:20.628585 Starting kernel ...
2209 06:53:20.628994
2210 06:53:20.630292 end: 2.2.4 bootloader-commands (duration 00:00:16) [common]
2211 06:53:20.630858 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2212 06:53:20.631274 Setting prompt string to ['Linux version [0-9]']
2213 06:53:20.631719 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2214 06:53:20.632195 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2215 06:53:20.633215
2216 06:53:20.633605
2218 06:57:45.631688 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2220 06:57:45.632857 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2222 06:57:45.633798 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2225 06:57:45.635397 end: 2 depthcharge-action (duration 00:05:00) [common]
2227 06:57:45.636735 Cleaning after the job
2228 06:57:45.637152 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8649816/tftp-deploy-9mffkjsr/ramdisk
2229 06:57:45.639220 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8649816/tftp-deploy-9mffkjsr/kernel
2230 06:57:45.641813 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8649816/tftp-deploy-9mffkjsr/nfsrootfs
2231 06:57:45.720147 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8649816/tftp-deploy-9mffkjsr/modules
2232 06:57:45.720471 start: 4.1 power-off (timeout 00:00:30) [common]
2233 06:57:45.720655 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2234 06:57:45.742171 >> Command sent successfully.
2235 06:57:45.744340 Returned 0 in 0 seconds
2236 06:57:45.845499 end: 4.1 power-off (duration 00:00:00) [common]
2238 06:57:45.846986 start: 4.2 read-feedback (timeout 00:10:00) [common]
2239 06:57:45.848183 Listened to connection for namespace 'common' for up to 1s
2240 06:57:46.852349 Finalising connection for namespace 'common'
2241 06:57:46.853029 Disconnecting from shell: Finalise
2242 06:57:46.954599 end: 4.2 read-feedback (duration 00:00:01) [common]
2243 06:57:46.955170 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8649816
2244 06:57:47.157932 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8649816
2245 06:57:47.158145 JobError: Your job cannot terminate cleanly.