Boot log: asus-C436FA-Flip-hatch
- Errors: 2
- Boot result: FAIL
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
1 06:52:20.292227 lava-dispatcher, installed at version: 2022.11
2 06:52:20.292427 start: 0 validate
3 06:52:20.292565 Start time: 2023-01-10 06:52:20.292557+00:00 (UTC)
4 06:52:20.292696 Using caching service: 'http://localhost/cache/?uri=%s'
5 06:52:20.292832 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230109.0%2Famd64%2Finitrd.cpio.gz exists
6 06:52:20.588116 Using caching service: 'http://localhost/cache/?uri=%s'
7 06:52:20.588856 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-799-g1229c813bcd9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 06:52:20.885003 Using caching service: 'http://localhost/cache/?uri=%s'
9 06:52:20.885755 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230109.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 06:52:21.180603 Using caching service: 'http://localhost/cache/?uri=%s'
11 06:52:21.181315 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-799-g1229c813bcd9%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 06:52:21.475656 validate duration: 1.18
14 06:52:21.475964 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 06:52:21.476092 start: 1.1 download-retry (timeout 00:10:00) [common]
16 06:52:21.476203 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 06:52:21.476322 Not decompressing ramdisk as can be used compressed.
18 06:52:21.476427 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230109.0/amd64/initrd.cpio.gz
19 06:52:21.476511 saving as /var/lib/lava/dispatcher/tmp/8649814/tftp-deploy-6vp9iawg/ramdisk/initrd.cpio.gz
20 06:52:21.476591 total size: 5432120 (5MB)
21 06:52:21.479495 progress 0% (0MB)
22 06:52:21.481948 progress 5% (0MB)
23 06:52:21.483850 progress 10% (0MB)
24 06:52:21.486154 progress 15% (0MB)
25 06:52:21.488675 progress 20% (1MB)
26 06:52:21.490767 progress 25% (1MB)
27 06:52:21.493187 progress 30% (1MB)
28 06:52:21.495562 progress 35% (1MB)
29 06:52:21.498020 progress 40% (2MB)
30 06:52:21.500586 progress 45% (2MB)
31 06:52:21.502311 progress 50% (2MB)
32 06:52:21.504803 progress 55% (2MB)
33 06:52:21.507147 progress 60% (3MB)
34 06:52:21.509196 progress 65% (3MB)
35 06:52:21.511924 progress 70% (3MB)
36 06:52:21.513994 progress 75% (3MB)
37 06:52:21.516297 progress 80% (4MB)
38 06:52:21.518842 progress 85% (4MB)
39 06:52:21.521140 progress 90% (4MB)
40 06:52:21.523211 progress 95% (4MB)
41 06:52:21.525388 progress 100% (5MB)
42 06:52:21.525688 5MB downloaded in 0.05s (105.53MB/s)
43 06:52:21.525843 end: 1.1.1 http-download (duration 00:00:00) [common]
45 06:52:21.526101 end: 1.1 download-retry (duration 00:00:00) [common]
46 06:52:21.526193 start: 1.2 download-retry (timeout 00:10:00) [common]
47 06:52:21.526281 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 06:52:21.526388 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-799-g1229c813bcd9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 06:52:21.526458 saving as /var/lib/lava/dispatcher/tmp/8649814/tftp-deploy-6vp9iawg/kernel/bzImage
50 06:52:21.526523 total size: 7573392 (7MB)
51 06:52:21.526585 No compression specified
52 06:52:21.528420 progress 0% (0MB)
53 06:52:21.531790 progress 5% (0MB)
54 06:52:21.535328 progress 10% (0MB)
55 06:52:21.538058 progress 15% (1MB)
56 06:52:21.541667 progress 20% (1MB)
57 06:52:21.544680 progress 25% (1MB)
58 06:52:21.547808 progress 30% (2MB)
59 06:52:21.550922 progress 35% (2MB)
60 06:52:21.554196 progress 40% (2MB)
61 06:52:21.557668 progress 45% (3MB)
62 06:52:21.560736 progress 50% (3MB)
63 06:52:21.564062 progress 55% (4MB)
64 06:52:21.567008 progress 60% (4MB)
65 06:52:21.570270 progress 65% (4MB)
66 06:52:21.573367 progress 70% (5MB)
67 06:52:21.576841 progress 75% (5MB)
68 06:52:21.579939 progress 80% (5MB)
69 06:52:21.583183 progress 85% (6MB)
70 06:52:21.586654 progress 90% (6MB)
71 06:52:21.589729 progress 95% (6MB)
72 06:52:21.593000 progress 100% (7MB)
73 06:52:21.593179 7MB downloaded in 0.07s (108.36MB/s)
74 06:52:21.593335 end: 1.2.1 http-download (duration 00:00:00) [common]
76 06:52:21.593630 end: 1.2 download-retry (duration 00:00:00) [common]
77 06:52:21.593723 start: 1.3 download-retry (timeout 00:10:00) [common]
78 06:52:21.593813 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 06:52:21.593923 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230109.0/amd64/full.rootfs.tar.xz
80 06:52:21.593993 saving as /var/lib/lava/dispatcher/tmp/8649814/tftp-deploy-6vp9iawg/nfsrootfs/full.rootfs.tar
81 06:52:21.594057 total size: 123918696 (118MB)
82 06:52:21.594121 Using unxz to decompress xz
83 06:52:21.598521 progress 0% (0MB)
84 06:52:22.044082 progress 5% (5MB)
85 06:52:22.497536 progress 10% (11MB)
86 06:52:22.949674 progress 15% (17MB)
87 06:52:23.408279 progress 20% (23MB)
88 06:52:23.737887 progress 25% (29MB)
89 06:52:24.072203 progress 30% (35MB)
90 06:52:24.341907 progress 35% (41MB)
91 06:52:24.507654 progress 40% (47MB)
92 06:52:24.866840 progress 45% (53MB)
93 06:52:25.225420 progress 50% (59MB)
94 06:52:25.557284 progress 55% (65MB)
95 06:52:25.908518 progress 60% (70MB)
96 06:52:26.240500 progress 65% (76MB)
97 06:52:26.615989 progress 70% (82MB)
98 06:52:27.021916 progress 75% (88MB)
99 06:52:27.433616 progress 80% (94MB)
100 06:52:27.558853 progress 85% (100MB)
101 06:52:27.713398 progress 90% (106MB)
102 06:52:28.038253 progress 95% (112MB)
103 06:52:28.400250 progress 100% (118MB)
104 06:52:28.406162 118MB downloaded in 6.81s (17.35MB/s)
105 06:52:28.406427 end: 1.3.1 http-download (duration 00:00:07) [common]
107 06:52:28.406700 end: 1.3 download-retry (duration 00:00:07) [common]
108 06:52:28.406793 start: 1.4 download-retry (timeout 00:09:53) [common]
109 06:52:28.406885 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 06:52:28.407003 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-799-g1229c813bcd9/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 06:52:28.407076 saving as /var/lib/lava/dispatcher/tmp/8649814/tftp-deploy-6vp9iawg/modules/modules.tar
112 06:52:28.407140 total size: 51848 (0MB)
113 06:52:28.407203 Using unxz to decompress xz
114 06:52:28.432236 progress 63% (0MB)
115 06:52:28.437642 progress 100% (0MB)
116 06:52:28.439143 0MB downloaded in 0.03s (1.55MB/s)
117 06:52:28.439371 end: 1.4.1 http-download (duration 00:00:00) [common]
119 06:52:28.439642 end: 1.4 download-retry (duration 00:00:00) [common]
120 06:52:28.439740 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 06:52:28.439836 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 06:52:30.133882 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8649814/extract-nfsrootfs-nola8dvu
123 06:52:30.134089 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 06:52:30.134203 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
125 06:52:30.134345 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8649814/lava-overlay-0r_rarny
126 06:52:30.134450 makedir: /var/lib/lava/dispatcher/tmp/8649814/lava-overlay-0r_rarny/lava-8649814/bin
127 06:52:30.134538 makedir: /var/lib/lava/dispatcher/tmp/8649814/lava-overlay-0r_rarny/lava-8649814/tests
128 06:52:30.134620 makedir: /var/lib/lava/dispatcher/tmp/8649814/lava-overlay-0r_rarny/lava-8649814/results
129 06:52:30.134727 Creating /var/lib/lava/dispatcher/tmp/8649814/lava-overlay-0r_rarny/lava-8649814/bin/lava-add-keys
130 06:52:30.134888 Creating /var/lib/lava/dispatcher/tmp/8649814/lava-overlay-0r_rarny/lava-8649814/bin/lava-add-sources
131 06:52:30.135007 Creating /var/lib/lava/dispatcher/tmp/8649814/lava-overlay-0r_rarny/lava-8649814/bin/lava-background-process-start
132 06:52:30.135123 Creating /var/lib/lava/dispatcher/tmp/8649814/lava-overlay-0r_rarny/lava-8649814/bin/lava-background-process-stop
133 06:52:30.135237 Creating /var/lib/lava/dispatcher/tmp/8649814/lava-overlay-0r_rarny/lava-8649814/bin/lava-common-functions
134 06:52:30.135359 Creating /var/lib/lava/dispatcher/tmp/8649814/lava-overlay-0r_rarny/lava-8649814/bin/lava-echo-ipv4
135 06:52:30.135472 Creating /var/lib/lava/dispatcher/tmp/8649814/lava-overlay-0r_rarny/lava-8649814/bin/lava-install-packages
136 06:52:30.135582 Creating /var/lib/lava/dispatcher/tmp/8649814/lava-overlay-0r_rarny/lava-8649814/bin/lava-installed-packages
137 06:52:30.135693 Creating /var/lib/lava/dispatcher/tmp/8649814/lava-overlay-0r_rarny/lava-8649814/bin/lava-os-build
138 06:52:30.135803 Creating /var/lib/lava/dispatcher/tmp/8649814/lava-overlay-0r_rarny/lava-8649814/bin/lava-probe-channel
139 06:52:30.135947 Creating /var/lib/lava/dispatcher/tmp/8649814/lava-overlay-0r_rarny/lava-8649814/bin/lava-probe-ip
140 06:52:30.136071 Creating /var/lib/lava/dispatcher/tmp/8649814/lava-overlay-0r_rarny/lava-8649814/bin/lava-target-ip
141 06:52:30.136182 Creating /var/lib/lava/dispatcher/tmp/8649814/lava-overlay-0r_rarny/lava-8649814/bin/lava-target-mac
142 06:52:30.136292 Creating /var/lib/lava/dispatcher/tmp/8649814/lava-overlay-0r_rarny/lava-8649814/bin/lava-target-storage
143 06:52:30.136406 Creating /var/lib/lava/dispatcher/tmp/8649814/lava-overlay-0r_rarny/lava-8649814/bin/lava-test-case
144 06:52:30.136519 Creating /var/lib/lava/dispatcher/tmp/8649814/lava-overlay-0r_rarny/lava-8649814/bin/lava-test-event
145 06:52:30.136629 Creating /var/lib/lava/dispatcher/tmp/8649814/lava-overlay-0r_rarny/lava-8649814/bin/lava-test-feedback
146 06:52:30.136743 Creating /var/lib/lava/dispatcher/tmp/8649814/lava-overlay-0r_rarny/lava-8649814/bin/lava-test-raise
147 06:52:30.136853 Creating /var/lib/lava/dispatcher/tmp/8649814/lava-overlay-0r_rarny/lava-8649814/bin/lava-test-reference
148 06:52:30.136964 Creating /var/lib/lava/dispatcher/tmp/8649814/lava-overlay-0r_rarny/lava-8649814/bin/lava-test-runner
149 06:52:30.137074 Creating /var/lib/lava/dispatcher/tmp/8649814/lava-overlay-0r_rarny/lava-8649814/bin/lava-test-set
150 06:52:30.137184 Creating /var/lib/lava/dispatcher/tmp/8649814/lava-overlay-0r_rarny/lava-8649814/bin/lava-test-shell
151 06:52:30.137296 Updating /var/lib/lava/dispatcher/tmp/8649814/lava-overlay-0r_rarny/lava-8649814/bin/lava-install-packages (oe)
152 06:52:30.137410 Updating /var/lib/lava/dispatcher/tmp/8649814/lava-overlay-0r_rarny/lava-8649814/bin/lava-installed-packages (oe)
153 06:52:30.137532 Creating /var/lib/lava/dispatcher/tmp/8649814/lava-overlay-0r_rarny/lava-8649814/environment
154 06:52:30.137635 LAVA metadata
155 06:52:30.137705 - LAVA_JOB_ID=8649814
156 06:52:30.137771 - LAVA_DISPATCHER_IP=192.168.201.1
157 06:52:30.137871 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
158 06:52:30.137939 skipped lava-vland-overlay
159 06:52:30.138017 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 06:52:30.138100 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
161 06:52:30.138163 skipped lava-multinode-overlay
162 06:52:30.138239 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 06:52:30.138322 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
164 06:52:30.138395 Loading test definitions
165 06:52:30.138488 start: 1.5.2.3.1 git-repo-action (timeout 00:09:51) [common]
166 06:52:30.138563 Using /lava-8649814 at stage 0
167 06:52:30.138660 Fetching tests from https://github.com/kernelci/test-definitions
168 06:52:30.138739 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/8649814/lava-overlay-0r_rarny/lava-8649814/0/tests/0_ltp-timers'
169 06:52:33.229971 Running '/usr/bin/git checkout kernelci.org
170 06:52:33.371742 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/8649814/lava-overlay-0r_rarny/lava-8649814/0/tests/0_ltp-timers/automated/linux/ltp-open-posix/ltp-open-posix.yaml
171 06:52:33.372476 uuid=8649814_1.5.2.3.1 testdef=None
172 06:52:33.372650 end: 1.5.2.3.1 git-repo-action (duration 00:00:03) [common]
174 06:52:33.372924 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
175 06:52:33.373671 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 06:52:33.373930 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
178 06:52:33.374763 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 06:52:33.375023 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
181 06:52:33.375816 runner path: /var/lib/lava/dispatcher/tmp/8649814/lava-overlay-0r_rarny/lava-8649814/0/tests/0_ltp-timers test_uuid 8649814_1.5.2.3.1
182 06:52:33.375913 GRP_TEST='TMR'
183 06:52:33.375982 SKIPFILE='skipfile-lkft.yaml'
184 06:52:33.376051 SKIP_INSTALL='true'
185 06:52:33.376113 TST_CMDFILES=''
186 06:52:33.376248 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
188 06:52:33.376475 Creating lava-test-runner.conf files
189 06:52:33.376543 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8649814/lava-overlay-0r_rarny/lava-8649814/0 for stage 0
190 06:52:33.376630 - 0_ltp-timers
191 06:52:33.376732 end: 1.5.2.3 test-definition (duration 00:00:03) [common]
192 06:52:33.376830 start: 1.5.2.4 compress-overlay (timeout 00:09:48) [common]
193 06:52:40.813400 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
194 06:52:40.813575 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:41) [common]
195 06:52:40.813674 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
196 06:52:40.813783 end: 1.5.2 lava-overlay (duration 00:00:11) [common]
197 06:52:40.813879 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:41) [common]
198 06:52:40.916022 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
199 06:52:40.916388 start: 1.5.4 extract-modules (timeout 00:09:41) [common]
200 06:52:40.916502 extracting modules file /var/lib/lava/dispatcher/tmp/8649814/tftp-deploy-6vp9iawg/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8649814/extract-nfsrootfs-nola8dvu
201 06:52:40.920537 extracting modules file /var/lib/lava/dispatcher/tmp/8649814/tftp-deploy-6vp9iawg/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8649814/extract-overlay-ramdisk-jalg2ubc/ramdisk
202 06:52:40.924330 end: 1.5.4 extract-modules (duration 00:00:00) [common]
203 06:52:40.924450 start: 1.5.5 apply-overlay-tftp (timeout 00:09:41) [common]
204 06:52:40.924538 [common] Applying overlay to NFS
205 06:52:40.924612 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8649814/compress-overlay-hg_ys3i2/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8649814/extract-nfsrootfs-nola8dvu
206 06:52:41.385809 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
207 06:52:41.385968 start: 1.5.6 configure-preseed-file (timeout 00:09:40) [common]
208 06:52:41.386070 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
209 06:52:41.386161 start: 1.5.7 compress-ramdisk (timeout 00:09:40) [common]
210 06:52:41.386246 Building ramdisk /var/lib/lava/dispatcher/tmp/8649814/extract-overlay-ramdisk-jalg2ubc/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8649814/extract-overlay-ramdisk-jalg2ubc/ramdisk
211 06:52:41.420043 >> 24546 blocks
212 06:52:41.893653 rename /var/lib/lava/dispatcher/tmp/8649814/extract-overlay-ramdisk-jalg2ubc/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8649814/tftp-deploy-6vp9iawg/ramdisk/ramdisk.cpio.gz
213 06:52:41.894065 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
214 06:52:41.894186 start: 1.5.8 prepare-kernel (timeout 00:09:40) [common]
215 06:52:41.894293 start: 1.5.8.1 prepare-fit (timeout 00:09:40) [common]
216 06:52:41.894393 No mkimage arch provided, not using FIT.
217 06:52:41.894488 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
218 06:52:41.894576 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
219 06:52:41.894683 end: 1.5 prepare-tftp-overlay (duration 00:00:13) [common]
220 06:52:41.894778 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:40) [common]
221 06:52:41.894862 No LXC device requested
222 06:52:41.894954 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
223 06:52:41.895046 start: 1.7 deploy-device-env (timeout 00:09:40) [common]
224 06:52:41.895130 end: 1.7 deploy-device-env (duration 00:00:00) [common]
225 06:52:41.895206 Checking files for TFTP limit of 4294967296 bytes.
226 06:52:41.895599 end: 1 tftp-deploy (duration 00:00:20) [common]
227 06:52:41.895709 start: 2 depthcharge-action (timeout 00:05:00) [common]
228 06:52:41.895805 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
229 06:52:41.895943 substitutions:
230 06:52:41.896018 - {DTB}: None
231 06:52:41.896089 - {INITRD}: 8649814/tftp-deploy-6vp9iawg/ramdisk/ramdisk.cpio.gz
232 06:52:41.896151 - {KERNEL}: 8649814/tftp-deploy-6vp9iawg/kernel/bzImage
233 06:52:41.896212 - {LAVA_MAC}: None
234 06:52:41.896272 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8649814/extract-nfsrootfs-nola8dvu
235 06:52:41.896331 - {NFS_SERVER_IP}: 192.168.201.1
236 06:52:41.896388 - {PRESEED_CONFIG}: None
237 06:52:41.896445 - {PRESEED_LOCAL}: None
238 06:52:41.896501 - {RAMDISK}: 8649814/tftp-deploy-6vp9iawg/ramdisk/ramdisk.cpio.gz
239 06:52:41.896564 - {ROOT_PART}: None
240 06:52:41.896626 - {ROOT}: None
241 06:52:41.896682 - {SERVER_IP}: 192.168.201.1
242 06:52:41.896738 - {TEE}: None
243 06:52:41.896795 Parsed boot commands:
244 06:52:41.896850 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
245 06:52:41.897002 Parsed boot commands: tftpboot 192.168.201.1 8649814/tftp-deploy-6vp9iawg/kernel/bzImage 8649814/tftp-deploy-6vp9iawg/kernel/cmdline 8649814/tftp-deploy-6vp9iawg/ramdisk/ramdisk.cpio.gz
246 06:52:41.897101 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
247 06:52:41.897198 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
248 06:52:41.897292 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
249 06:52:41.897383 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
250 06:52:41.897458 Not connected, no need to disconnect.
251 06:52:41.897581 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
252 06:52:41.897677 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
253 06:52:41.897748 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
254 06:52:41.900510 Setting prompt string to ['lava-test: # ']
255 06:52:41.900793 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
256 06:52:41.900898 end: 2.2.1 reset-connection (duration 00:00:00) [common]
257 06:52:41.901003 start: 2.2.2 reset-device (timeout 00:05:00) [common]
258 06:52:41.901098 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
259 06:52:41.901272 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
260 06:52:41.920334 >> Command sent successfully.
261 06:52:41.922249 Returned 0 in 0 seconds
262 06:52:42.023216 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
264 06:52:42.024374 end: 2.2.2 reset-device (duration 00:00:00) [common]
265 06:52:42.024832 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
266 06:52:42.025215 Setting prompt string to 'Starting depthcharge on Helios...'
267 06:52:42.025586 Changing prompt to 'Starting depthcharge on Helios...'
268 06:52:42.025909 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
269 06:52:42.027051 [Enter `^Ec?' for help]
270 06:52:48.759167
271 06:52:48.759747
272 06:52:48.769205 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
273 06:52:48.772838 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
274 06:52:48.779014 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
275 06:52:48.782490 CPU: AES supported, TXT NOT supported, VT supported
276 06:52:48.789149 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
277 06:52:48.792435 PCH: device id 0284 (rev 00) is Cometlake-U Premium
278 06:52:48.798941 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
279 06:52:48.802375 VBOOT: Loading verstage.
280 06:52:48.805946 FMAP: Found "FLASH" version 1.1 at 0xc04000.
281 06:52:48.812612 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
282 06:52:48.816100 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
283 06:52:48.819335 CBFS @ c08000 size 3f8000
284 06:52:48.826059 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
285 06:52:48.829214 CBFS: Locating 'fallback/verstage'
286 06:52:48.832766 CBFS: Found @ offset 10fb80 size 1072c
287 06:52:48.833252
288 06:52:48.833676
289 06:52:48.845805 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
290 06:52:48.860080 Probing TPM: . done!
291 06:52:48.863833 TPM ready after 0 ms
292 06:52:48.866621 Connected to device vid:did:rid of 1ae0:0028:00
293 06:52:48.876720 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
294 06:52:48.879993 Initialized TPM device CR50 revision 0
295 06:52:48.923811 tlcl_send_startup: Startup return code is 0
296 06:52:48.924331 TPM: setup succeeded
297 06:52:48.936666 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
298 06:52:48.940168 Chrome EC: UHEPI supported
299 06:52:48.943505 Phase 1
300 06:52:48.947536 FMAP: area GBB found @ c05000 (12288 bytes)
301 06:52:48.953552 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
302 06:52:48.954020 Phase 2
303 06:52:48.956846 Phase 3
304 06:52:48.960574 FMAP: area GBB found @ c05000 (12288 bytes)
305 06:52:48.967119 VB2:vb2_report_dev_firmware() This is developer signed firmware
306 06:52:48.973710 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
307 06:52:48.977284 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
308 06:52:48.983262 VB2:vb2_verify_keyblock() Checking keyblock signature...
309 06:52:48.998842 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
310 06:52:49.002509 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
311 06:52:49.008993 VB2:vb2_verify_fw_preamble() Verifying preamble.
312 06:52:49.013055 Phase 4
313 06:52:49.016411 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
314 06:52:49.023308 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
315 06:52:49.202255 VB2:vb2_rsa_verify_digest() Digest check failed!
316 06:52:49.205917 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
317 06:52:49.209225
318 06:52:49.209328 Saving nvdata
319 06:52:49.212348 Reboot requested (10020007)
320 06:52:49.215542 board_reset() called!
321 06:52:49.215657 full_reset() called!
322 06:52:53.725804
323 06:52:53.726368
324 06:52:53.735718 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
325 06:52:53.739109 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
326 06:52:53.745556 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
327 06:52:53.749172 CPU: AES supported, TXT NOT supported, VT supported
328 06:52:53.755580 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
329 06:52:53.758988 PCH: device id 0284 (rev 00) is Cometlake-U Premium
330 06:52:53.765880 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
331 06:52:53.769226 VBOOT: Loading verstage.
332 06:52:53.772752 FMAP: Found "FLASH" version 1.1 at 0xc04000.
333 06:52:53.779388 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
334 06:52:53.782047 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
335 06:52:53.785793 CBFS @ c08000 size 3f8000
336 06:52:53.792107 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
337 06:52:53.795320 CBFS: Locating 'fallback/verstage'
338 06:52:53.799065 CBFS: Found @ offset 10fb80 size 1072c
339 06:52:53.802311
340 06:52:53.802792
341 06:52:53.812504 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
342 06:52:53.827141 Probing TPM: . done!
343 06:52:53.830340 TPM ready after 0 ms
344 06:52:53.833782 Connected to device vid:did:rid of 1ae0:0028:00
345 06:52:53.843729 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
346 06:52:53.847472 Initialized TPM device CR50 revision 0
347 06:52:53.890862 tlcl_send_startup: Startup return code is 0
348 06:52:53.891442 TPM: setup succeeded
349 06:52:53.903403 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
350 06:52:53.906921 Chrome EC: UHEPI supported
351 06:52:53.910366 Phase 1
352 06:52:53.914056 FMAP: area GBB found @ c05000 (12288 bytes)
353 06:52:53.920574 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
354 06:52:53.927063 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
355 06:52:53.930512 Recovery requested (1009000e)
356 06:52:53.931004 Saving nvdata
357 06:52:53.936130
358 06:52:53.942159 tlcl_extend: response is 0
359 06:52:53.951184 tlcl_extend: response is 0
360 06:52:53.957924 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
361 06:52:53.961377 CBFS @ c08000 size 3f8000
362 06:52:53.968070 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
363 06:52:53.971527 CBFS: Locating 'fallback/romstage'
364 06:52:53.974854 CBFS: Found @ offset 80 size 145fc
365 06:52:53.977686 Accumulated console time in verstage 98 ms
366 06:52:53.978196
367 06:52:53.978648
368 06:52:53.991546 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
369 06:52:53.997984 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
370 06:52:54.000968 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
371 06:52:54.004018 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
372 06:52:54.010767 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
373 06:52:54.014500 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
374 06:52:54.017597 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
375 06:52:54.020899 TCO_STS: 0000 0000
376 06:52:54.024029 GEN_PMCON: e0015238 00000200
377 06:52:54.027430 GBLRST_CAUSE: 00000000 00000000
378 06:52:54.027934 prev_sleep_state 5
379 06:52:54.030753 Boot Count incremented to 51089
380 06:52:54.037544 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
381 06:52:54.041161 CBFS @ c08000 size 3f8000
382 06:52:54.047629 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
383 06:52:54.048193 CBFS: Locating 'fspm.bin'
384 06:52:54.050833 CBFS: Found @ offset 5ffc0 size 71000
385 06:52:54.054299
386 06:52:54.057247 Chrome EC: UHEPI supported
387 06:52:54.064011 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
388 06:52:54.067372 Probing TPM: done!
389 06:52:54.074445 Connected to device vid:did:rid of 1ae0:0028:00
390 06:52:54.084739 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
391 06:52:54.090674 Initialized TPM device CR50 revision 0
392 06:52:54.099286 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
393 06:52:54.105891 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
394 06:52:54.109141 MRC cache found, size 1948
395 06:52:54.112608 bootmode is set to: 2
396 06:52:54.115638 PRMRR disabled by config.
397 06:52:54.116226 SPD INDEX = 1
398 06:52:54.122307 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
399 06:52:54.125566 CBFS @ c08000 size 3f8000
400 06:52:54.129088 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
401 06:52:54.132298
402 06:52:54.132742 CBFS: Locating 'spd.bin'
403 06:52:54.135847 CBFS: Found @ offset 5fb80 size 400
404 06:52:54.139061 SPD: module type is LPDDR3
405 06:52:54.142683 SPD: module part is
406 06:52:54.149140 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
407 06:52:54.152443 SPD: device width 4 bits, bus width 8 bits
408 06:52:54.155442 SPD: module size is 4096 MB (per channel)
409 06:52:54.159039 memory slot: 0 configuration done.
410 06:52:54.161895 memory slot: 2 configuration done.
411 06:52:54.213462 CBMEM:
412 06:52:54.216340 IMD: root @ 99fff000 254 entries.
413 06:52:54.219798 IMD: root @ 99ffec00 62 entries.
414 06:52:54.223468 External stage cache:
415 06:52:54.226664 IMD: root @ 9abff000 254 entries.
416 06:52:54.229697 IMD: root @ 9abfec00 62 entries.
417 06:52:54.233075 Chrome EC: clear events_b mask to 0x0000000020004000
418 06:52:54.249046 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
419 06:52:54.259261 tlcl_write: response is 0
420 06:52:54.271428 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
421 06:52:54.278270 MRC: TPM MRC hash updated successfully.
422 06:52:54.278802 2 DIMMs found
423 06:52:54.281830 SMM Memory Map
424 06:52:54.284524 SMRAM : 0x9a000000 0x1000000
425 06:52:54.287916 Subregion 0: 0x9a000000 0xa00000
426 06:52:54.291586 Subregion 1: 0x9aa00000 0x200000
427 06:52:54.294847 Subregion 2: 0x9ac00000 0x400000
428 06:52:54.297945 top_of_ram = 0x9a000000
429 06:52:54.301745 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
430 06:52:54.308531 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
431 06:52:54.311621 MTRR Range: Start=ff000000 End=0 (Size 1000000)
432 06:52:54.317912 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
433 06:52:54.321086 CBFS @ c08000 size 3f8000
434 06:52:54.324613 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
435 06:52:54.327949 CBFS: Locating 'fallback/postcar'
436 06:52:54.331538 CBFS: Found @ offset 107000 size 4b44
437 06:52:54.337901 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
438 06:52:54.350444 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
439 06:52:54.353906 Processing 180 relocs. Offset value of 0x97c0c000
440 06:52:54.361973 Accumulated console time in romstage 286 ms
441 06:52:54.362412
442 06:52:54.362817
443 06:52:54.372004 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
444 06:52:54.378565 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
445 06:52:54.381962 CBFS @ c08000 size 3f8000
446 06:52:54.385279 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
447 06:52:54.391742 CBFS: Locating 'fallback/ramstage'
448 06:52:54.395238 CBFS: Found @ offset 43380 size 1b9e8
449 06:52:54.401536 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
450 06:52:54.433551 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
451 06:52:54.437160 Processing 3976 relocs. Offset value of 0x98db0000
452 06:52:54.444063 Accumulated console time in postcar 52 ms
453 06:52:54.444545
454 06:52:54.444927
455 06:52:54.453443 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
456 06:52:54.460210 FMAP: area RO_VPD found @ c00000 (16384 bytes)
457 06:52:54.463720 WARNING: RO_VPD is uninitialized or empty.
458 06:52:54.466920 FMAP: area RW_VPD found @ af8000 (8192 bytes)
459 06:52:54.473741 FMAP: area RW_VPD found @ af8000 (8192 bytes)
460 06:52:54.474181 Normal boot.
461 06:52:54.480002 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
462 06:52:54.483777 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
463 06:52:54.487111 CBFS @ c08000 size 3f8000
464 06:52:54.493619 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
465 06:52:54.496733 CBFS: Locating 'cpu_microcode_blob.bin'
466 06:52:54.500336 CBFS: Found @ offset 14700 size 2ec00
467 06:52:54.503404 microcode: sig=0x806ec pf=0x4 revision=0xc9
468 06:52:54.506731 Skip microcode update
469 06:52:54.510101 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
470 06:52:54.513615 CBFS @ c08000 size 3f8000
471 06:52:54.520124 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
472 06:52:54.523458 CBFS: Locating 'fsps.bin'
473 06:52:54.526856 CBFS: Found @ offset d1fc0 size 35000
474 06:52:54.551947 Detected 4 core, 8 thread CPU.
475 06:52:54.555671 Setting up SMI for CPU
476 06:52:54.558446 IED base = 0x9ac00000
477 06:52:54.558922 IED size = 0x00400000
478 06:52:54.562211 Will perform SMM setup.
479 06:52:54.568193 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
480 06:52:54.575134 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
481 06:52:54.578374 Processing 16 relocs. Offset value of 0x00030000
482 06:52:54.582180 Attempting to start 7 APs
483 06:52:54.585595 Waiting for 10ms after sending INIT.
484 06:52:54.601875 Waiting for 1st SIPI to complete...done.
485 06:52:54.602334 AP: slot 2 apic_id 1.
486 06:52:54.608397 Waiting for 2nd SIPI to complete...done.
487 06:52:54.609001 AP: slot 7 apic_id 6.
488 06:52:54.611426 AP: slot 6 apic_id 7.
489 06:52:54.614845 AP: slot 4 apic_id 4.
490 06:52:54.615335 AP: slot 5 apic_id 5.
491 06:52:54.617962 AP: slot 1 apic_id 2.
492 06:52:54.621464 AP: slot 3 apic_id 3.
493 06:52:54.628247 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
494 06:52:54.631647 Processing 13 relocs. Offset value of 0x00038000
495 06:52:54.638394 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
496 06:52:54.644741 Installing SMM handler to 0x9a000000
497 06:52:54.651546 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
498 06:52:54.654750 Processing 658 relocs. Offset value of 0x9a010000
499 06:52:54.664706 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
500 06:52:54.667859 Processing 13 relocs. Offset value of 0x9a008000
501 06:52:54.674566 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
502 06:52:54.681025 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
503 06:52:54.684730 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
504 06:52:54.691005 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
505 06:52:54.698542 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
506 06:52:54.704564 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
507 06:52:54.707741 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
508 06:52:54.714357 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
509 06:52:54.717686 Clearing SMI status registers
510 06:52:54.720870 SMI_STS: PM1
511 06:52:54.721336 PM1_STS: PWRBTN
512 06:52:54.724059 TCO_STS: SECOND_TO
513 06:52:54.727651 New SMBASE 0x9a000000
514 06:52:54.731246 In relocation handler: CPU 0
515 06:52:54.734668 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
516 06:52:54.737861 Writing SMRR. base = 0x9a000006, mask=0xff000800
517 06:52:54.741140 Relocation complete.
518 06:52:54.744543 New SMBASE 0x99fff800
519 06:52:54.745044 In relocation handler: CPU 2
520 06:52:54.750819 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
521 06:52:54.754127 Writing SMRR. base = 0x9a000006, mask=0xff000800
522 06:52:54.757843 Relocation complete.
523 06:52:54.758305 New SMBASE 0x99fff400
524 06:52:54.760833
525 06:52:54.761322 In relocation handler: CPU 3
526 06:52:54.767805 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
527 06:52:54.771008 Writing SMRR. base = 0x9a000006, mask=0xff000800
528 06:52:54.774753 Relocation complete.
529 06:52:54.775208 New SMBASE 0x99fffc00
530 06:52:54.777879 In relocation handler: CPU 1
531 06:52:54.780988 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
532 06:52:54.787787 Writing SMRR. base = 0x9a000006, mask=0xff000800
533 06:52:54.790874 Relocation complete.
534 06:52:54.791336 New SMBASE 0x99ffe400
535 06:52:54.794619 In relocation handler: CPU 7
536 06:52:54.797643 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
537 06:52:54.804280 Writing SMRR. base = 0x9a000006, mask=0xff000800
538 06:52:54.807633 Relocation complete.
539 06:52:54.808139 New SMBASE 0x99ffe800
540 06:52:54.810652 In relocation handler: CPU 6
541 06:52:54.814622 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
542 06:52:54.820604 Writing SMRR. base = 0x9a000006, mask=0xff000800
543 06:52:54.821088 Relocation complete.
544 06:52:54.824346 New SMBASE 0x99ffec00
545 06:52:54.827963 In relocation handler: CPU 5
546 06:52:54.831093 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
547 06:52:54.837426 Writing SMRR. base = 0x9a000006, mask=0xff000800
548 06:52:54.837954 Relocation complete.
549 06:52:54.841092 New SMBASE 0x99fff000
550 06:52:54.843860 In relocation handler: CPU 4
551 06:52:54.847325 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
552 06:52:54.854023 Writing SMRR. base = 0x9a000006, mask=0xff000800
553 06:52:54.854468 Relocation complete.
554 06:52:54.857419 Initializing CPU #0
555 06:52:54.860677 CPU: vendor Intel device 806ec
556 06:52:54.863828 CPU: family 06, model 8e, stepping 0c
557 06:52:54.867125 Clearing out pending MCEs
558 06:52:54.870724 Setting up local APIC...
559 06:52:54.871195 apic_id: 0x00 done.
560 06:52:54.873588 Turbo is available but hidden
561 06:52:54.877203 Turbo is available and visible
562 06:52:54.880542 VMX status: enabled
563 06:52:54.883727 IA32_FEATURE_CONTROL status: locked
564 06:52:54.887567 Skip microcode update
565 06:52:54.888011 CPU #0 initialized
566 06:52:54.890541 Initializing CPU #2
567 06:52:54.890988 Initializing CPU #3
568 06:52:54.893800 Initializing CPU #1
569 06:52:54.897359 CPU: vendor Intel device 806ec
570 06:52:54.900189 CPU: family 06, model 8e, stepping 0c
571 06:52:54.903761 CPU: vendor Intel device 806ec
572 06:52:54.907155 CPU: family 06, model 8e, stepping 0c
573 06:52:54.910313 Clearing out pending MCEs
574 06:52:54.913467 Clearing out pending MCEs
575 06:52:54.916728 CPU: vendor Intel device 806ec
576 06:52:54.920209 CPU: family 06, model 8e, stepping 0c
577 06:52:54.923444 Clearing out pending MCEs
578 06:52:54.923890 Setting up local APIC...
579 06:52:54.927098 Setting up local APIC...
580 06:52:54.929933 Initializing CPU #6
581 06:52:54.930383 Initializing CPU #7
582 06:52:54.933741 CPU: vendor Intel device 806ec
583 06:52:54.939950 CPU: family 06, model 8e, stepping 0c
584 06:52:54.940428 CPU: vendor Intel device 806ec
585 06:52:54.946616 CPU: family 06, model 8e, stepping 0c
586 06:52:54.947089 Clearing out pending MCEs
587 06:52:54.950648 Clearing out pending MCEs
588 06:52:54.953447 Setting up local APIC...
589 06:52:54.956921 Initializing CPU #5
590 06:52:54.957399 Initializing CPU #4
591 06:52:54.960308 CPU: vendor Intel device 806ec
592 06:52:54.963474 CPU: family 06, model 8e, stepping 0c
593 06:52:54.966765 CPU: vendor Intel device 806ec
594 06:52:54.970027 CPU: family 06, model 8e, stepping 0c
595 06:52:54.973314 Clearing out pending MCEs
596 06:52:54.976602 Clearing out pending MCEs
597 06:52:54.979884 Setting up local APIC...
598 06:52:54.980370 apic_id: 0x07 done.
599 06:52:54.983146 Setting up local APIC...
600 06:52:54.986491 apic_id: 0x03 done.
601 06:52:54.989769 Setting up local APIC...
602 06:52:54.990277 apic_id: 0x05 done.
603 06:52:54.993501 VMX status: enabled
604 06:52:54.993986 apic_id: 0x06 done.
605 06:52:54.996420 VMX status: enabled
606 06:52:54.999922 apic_id: 0x02 done.
607 06:52:55.003106 IA32_FEATURE_CONTROL status: locked
608 06:52:55.003543 VMX status: enabled
609 06:52:55.006612 Skip microcode update
610 06:52:55.010228 IA32_FEATURE_CONTROL status: locked
611 06:52:55.012913 CPU #3 initialized
612 06:52:55.013423 Skip microcode update
613 06:52:55.016838 VMX status: enabled
614 06:52:55.019926 IA32_FEATURE_CONTROL status: locked
615 06:52:55.022801 IA32_FEATURE_CONTROL status: locked
616 06:52:55.026479 Skip microcode update
617 06:52:55.029628 Skip microcode update
618 06:52:55.030066 CPU #6 initialized
619 06:52:55.033271 CPU #7 initialized
620 06:52:55.033801 VMX status: enabled
621 06:52:55.036217 Setting up local APIC...
622 06:52:55.039379 apic_id: 0x01 done.
623 06:52:55.039863 CPU #1 initialized
624 06:52:55.043006 IA32_FEATURE_CONTROL status: locked
625 06:52:55.046613 apic_id: 0x04 done.
626 06:52:55.049793 Skip microcode update
627 06:52:55.050267 VMX status: enabled
628 06:52:55.052946 CPU #5 initialized
629 06:52:55.056342 IA32_FEATURE_CONTROL status: locked
630 06:52:55.059524 VMX status: enabled
631 06:52:55.060120 Skip microcode update
632 06:52:55.063052 IA32_FEATURE_CONTROL status: locked
633 06:52:55.065997 CPU #4 initialized
634 06:52:55.069384 Skip microcode update
635 06:52:55.069855 CPU #2 initialized
636 06:52:55.076271 bsp_do_flight_plan done after 466 msecs.
637 06:52:55.079417 CPU: frequency set to 4200 MHz
638 06:52:55.079860 Enabling SMIs.
639 06:52:55.080206 Locking SMM.
640 06:52:55.096133 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
641 06:52:55.098854 CBFS @ c08000 size 3f8000
642 06:52:55.102477 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
643 06:52:55.106137
644 06:52:55.106627 CBFS: Locating 'vbt.bin'
645 06:52:55.108789 CBFS: Found @ offset 5f5c0 size 499
646 06:52:55.115497 Found a VBT of 4608 bytes after decompression
647 06:52:55.294668 Display FSP Version Info HOB
648 06:52:55.298096 Reference Code - CPU = 9.0.1e.30
649 06:52:55.301578 uCode Version = 0.0.0.ca
650 06:52:55.304915 TXT ACM version = ff.ff.ff.ffff
651 06:52:55.308040 Display FSP Version Info HOB
652 06:52:55.311472 Reference Code - ME = 9.0.1e.30
653 06:52:55.314786 MEBx version = 0.0.0.0
654 06:52:55.317909 ME Firmware Version = Consumer SKU
655 06:52:55.321429 Display FSP Version Info HOB
656 06:52:55.324564 Reference Code - CML PCH = 9.0.1e.30
657 06:52:55.327984 PCH-CRID Status = Disabled
658 06:52:55.331434 PCH-CRID Original Value = ff.ff.ff.ffff
659 06:52:55.334723 PCH-CRID New Value = ff.ff.ff.ffff
660 06:52:55.338184 OPROM - RST - RAID = ff.ff.ff.ffff
661 06:52:55.341365 ChipsetInit Base Version = ff.ff.ff.ffff
662 06:52:55.344878 ChipsetInit Oem Version = ff.ff.ff.ffff
663 06:52:55.347995 Display FSP Version Info HOB
664 06:52:55.354851 Reference Code - SA - System Agent = 9.0.1e.30
665 06:52:55.355344 Reference Code - MRC = 0.7.1.6c
666 06:52:55.357967
667 06:52:55.358455 SA - PCIe Version = 9.0.1e.30
668 06:52:55.361261 SA-CRID Status = Disabled
669 06:52:55.364403 SA-CRID Original Value = 0.0.0.c
670 06:52:55.367852 SA-CRID New Value = 0.0.0.c
671 06:52:55.371523 OPROM - VBIOS = ff.ff.ff.ffff
672 06:52:55.372073 RTC Init
673 06:52:55.374780
674 06:52:55.377833 Set power on after power failure.
675 06:52:55.378350 Disabling Deep S3
676 06:52:55.381244 Disabling Deep S3
677 06:52:55.381770 Disabling Deep S4
678 06:52:55.384730 Disabling Deep S4
679 06:52:55.385237 Disabling Deep S5
680 06:52:55.388063 Disabling Deep S5
681 06:52:55.394321 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 190 exit 1
682 06:52:55.394922 Enumerating buses...
683 06:52:55.401057 Show all devs... Before device enumeration.
684 06:52:55.401581 Root Device: enabled 1
685 06:52:55.404416 CPU_CLUSTER: 0: enabled 1
686 06:52:55.407703 DOMAIN: 0000: enabled 1
687 06:52:55.410906 APIC: 00: enabled 1
688 06:52:55.411541 PCI: 00:00.0: enabled 1
689 06:52:55.414246 PCI: 00:02.0: enabled 1
690 06:52:55.417626 PCI: 00:04.0: enabled 0
691 06:52:55.418220 PCI: 00:05.0: enabled 0
692 06:52:55.420688
693 06:52:55.421263 PCI: 00:12.0: enabled 1
694 06:52:55.424646 PCI: 00:12.5: enabled 0
695 06:52:55.428042 PCI: 00:12.6: enabled 0
696 06:52:55.428556 PCI: 00:14.0: enabled 1
697 06:52:55.430953 PCI: 00:14.1: enabled 0
698 06:52:55.434032 PCI: 00:14.3: enabled 1
699 06:52:55.437600 PCI: 00:14.5: enabled 0
700 06:52:55.438094 PCI: 00:15.0: enabled 1
701 06:52:55.440806 PCI: 00:15.1: enabled 1
702 06:52:55.444868 PCI: 00:15.2: enabled 0
703 06:52:55.447489 PCI: 00:15.3: enabled 0
704 06:52:55.447981 PCI: 00:16.0: enabled 1
705 06:52:55.450486 PCI: 00:16.1: enabled 0
706 06:52:55.454175 PCI: 00:16.2: enabled 0
707 06:52:55.457444 PCI: 00:16.3: enabled 0
708 06:52:55.457990 PCI: 00:16.4: enabled 0
709 06:52:55.460700 PCI: 00:16.5: enabled 0
710 06:52:55.463848 PCI: 00:17.0: enabled 1
711 06:52:55.464338 PCI: 00:19.0: enabled 1
712 06:52:55.467150 PCI: 00:19.1: enabled 0
713 06:52:55.470625 PCI: 00:19.2: enabled 0
714 06:52:55.473709 PCI: 00:1a.0: enabled 0
715 06:52:55.474215 PCI: 00:1c.0: enabled 0
716 06:52:55.477447 PCI: 00:1c.1: enabled 0
717 06:52:55.480637 PCI: 00:1c.2: enabled 0
718 06:52:55.484134 PCI: 00:1c.3: enabled 0
719 06:52:55.484651 PCI: 00:1c.4: enabled 0
720 06:52:55.487055 PCI: 00:1c.5: enabled 0
721 06:52:55.490633 PCI: 00:1c.6: enabled 0
722 06:52:55.493760 PCI: 00:1c.7: enabled 0
723 06:52:55.494243 PCI: 00:1d.0: enabled 1
724 06:52:55.496758 PCI: 00:1d.1: enabled 0
725 06:52:55.500446 PCI: 00:1d.2: enabled 0
726 06:52:55.500890 PCI: 00:1d.3: enabled 0
727 06:52:55.503871
728 06:52:55.504425 PCI: 00:1d.4: enabled 0
729 06:52:55.507048 PCI: 00:1d.5: enabled 1
730 06:52:55.510637 PCI: 00:1e.0: enabled 1
731 06:52:55.511123 PCI: 00:1e.1: enabled 0
732 06:52:55.513380 PCI: 00:1e.2: enabled 1
733 06:52:55.517242 PCI: 00:1e.3: enabled 1
734 06:52:55.520489 PCI: 00:1f.0: enabled 1
735 06:52:55.521131 PCI: 00:1f.1: enabled 1
736 06:52:55.523723 PCI: 00:1f.2: enabled 1
737 06:52:55.526698 PCI: 00:1f.3: enabled 1
738 06:52:55.529993 PCI: 00:1f.4: enabled 1
739 06:52:55.530485 PCI: 00:1f.5: enabled 1
740 06:52:55.533266 PCI: 00:1f.6: enabled 0
741 06:52:55.537028 USB0 port 0: enabled 1
742 06:52:55.537559 I2C: 00:15: enabled 1
743 06:52:55.539824 I2C: 00:5d: enabled 1
744 06:52:55.543446 GENERIC: 0.0: enabled 1
745 06:52:55.546606 I2C: 00:1a: enabled 1
746 06:52:55.547102 I2C: 00:38: enabled 1
747 06:52:55.549740 I2C: 00:39: enabled 1
748 06:52:55.553346 I2C: 00:3a: enabled 1
749 06:52:55.553882 I2C: 00:3b: enabled 1
750 06:52:55.556558 PCI: 00:00.0: enabled 1
751 06:52:55.559987 SPI: 00: enabled 1
752 06:52:55.560511 SPI: 01: enabled 1
753 06:52:55.563433 PNP: 0c09.0: enabled 1
754 06:52:55.566426 USB2 port 0: enabled 1
755 06:52:55.566917 USB2 port 1: enabled 1
756 06:52:55.569640 USB2 port 2: enabled 0
757 06:52:55.573061 USB2 port 3: enabled 0
758 06:52:55.573611 USB2 port 5: enabled 0
759 06:52:55.576533 USB2 port 6: enabled 1
760 06:52:55.579773 USB2 port 9: enabled 1
761 06:52:55.580269 USB3 port 0: enabled 1
762 06:52:55.583204
763 06:52:55.583697 USB3 port 1: enabled 1
764 06:52:55.586721 USB3 port 2: enabled 1
765 06:52:55.589663 USB3 port 3: enabled 1
766 06:52:55.590158 USB3 port 4: enabled 0
767 06:52:55.593714 APIC: 02: enabled 1
768 06:52:55.596413 APIC: 01: enabled 1
769 06:52:55.596999 APIC: 03: enabled 1
770 06:52:55.600262 APIC: 04: enabled 1
771 06:52:55.600854 APIC: 05: enabled 1
772 06:52:55.603450 APIC: 07: enabled 1
773 06:52:55.606840 APIC: 06: enabled 1
774 06:52:55.607437 Compare with tree...
775 06:52:55.609896 Root Device: enabled 1
776 06:52:55.613024 CPU_CLUSTER: 0: enabled 1
777 06:52:55.613558 APIC: 00: enabled 1
778 06:52:55.616180 APIC: 02: enabled 1
779 06:52:55.619523 APIC: 01: enabled 1
780 06:52:55.620025 APIC: 03: enabled 1
781 06:52:55.622770 APIC: 04: enabled 1
782 06:52:55.626306 APIC: 05: enabled 1
783 06:52:55.626806 APIC: 07: enabled 1
784 06:52:55.629388
785 06:52:55.629944 APIC: 06: enabled 1
786 06:52:55.632583 DOMAIN: 0000: enabled 1
787 06:52:55.636059 PCI: 00:00.0: enabled 1
788 06:52:55.639363 PCI: 00:02.0: enabled 1
789 06:52:55.639869 PCI: 00:04.0: enabled 0
790 06:52:55.642644 PCI: 00:05.0: enabled 0
791 06:52:55.646215 PCI: 00:12.0: enabled 1
792 06:52:55.649539 PCI: 00:12.5: enabled 0
793 06:52:55.650008 PCI: 00:12.6: enabled 0
794 06:52:55.653281 PCI: 00:14.0: enabled 1
795 06:52:55.656087 USB0 port 0: enabled 1
796 06:52:55.660096 USB2 port 0: enabled 1
797 06:52:55.662704 USB2 port 1: enabled 1
798 06:52:55.666196 USB2 port 2: enabled 0
799 06:52:55.666734 USB2 port 3: enabled 0
800 06:52:55.669376 USB2 port 5: enabled 0
801 06:52:55.672584 USB2 port 6: enabled 1
802 06:52:55.676178 USB2 port 9: enabled 1
803 06:52:55.679099 USB3 port 0: enabled 1
804 06:52:55.679598 USB3 port 1: enabled 1
805 06:52:55.682607 USB3 port 2: enabled 1
806 06:52:55.686073 USB3 port 3: enabled 1
807 06:52:55.689668 USB3 port 4: enabled 0
808 06:52:55.692749 PCI: 00:14.1: enabled 0
809 06:52:55.693257 PCI: 00:14.3: enabled 1
810 06:52:55.695974 PCI: 00:14.5: enabled 0
811 06:52:55.699347 PCI: 00:15.0: enabled 1
812 06:52:55.703052 I2C: 00:15: enabled 1
813 06:52:55.705931 PCI: 00:15.1: enabled 1
814 06:52:55.706384 I2C: 00:5d: enabled 1
815 06:52:55.709651 GENERIC: 0.0: enabled 1
816 06:52:55.712532 PCI: 00:15.2: enabled 0
817 06:52:55.715804 PCI: 00:15.3: enabled 0
818 06:52:55.719153 PCI: 00:16.0: enabled 1
819 06:52:55.719601 PCI: 00:16.1: enabled 0
820 06:52:55.722589 PCI: 00:16.2: enabled 0
821 06:52:55.725827 PCI: 00:16.3: enabled 0
822 06:52:55.729146 PCI: 00:16.4: enabled 0
823 06:52:55.732690 PCI: 00:16.5: enabled 0
824 06:52:55.733124 PCI: 00:17.0: enabled 1
825 06:52:55.735658 PCI: 00:19.0: enabled 1
826 06:52:55.738914 I2C: 00:1a: enabled 1
827 06:52:55.742245 I2C: 00:38: enabled 1
828 06:52:55.742689 I2C: 00:39: enabled 1
829 06:52:55.745944 I2C: 00:3a: enabled 1
830 06:52:55.749249 I2C: 00:3b: enabled 1
831 06:52:55.752353 PCI: 00:19.1: enabled 0
832 06:52:55.755434 PCI: 00:19.2: enabled 0
833 06:52:55.755887 PCI: 00:1a.0: enabled 0
834 06:52:55.758876 PCI: 00:1c.0: enabled 0
835 06:52:55.762356 PCI: 00:1c.1: enabled 0
836 06:52:55.765390 PCI: 00:1c.2: enabled 0
837 06:52:55.765875 PCI: 00:1c.3: enabled 0
838 06:52:55.769066
839 06:52:55.769528 PCI: 00:1c.4: enabled 0
840 06:52:55.772344 PCI: 00:1c.5: enabled 0
841 06:52:55.775393 PCI: 00:1c.6: enabled 0
842 06:52:55.778715 PCI: 00:1c.7: enabled 0
843 06:52:55.779153 PCI: 00:1d.0: enabled 1
844 06:52:55.782306 PCI: 00:1d.1: enabled 0
845 06:52:55.785558 PCI: 00:1d.2: enabled 0
846 06:52:55.788908 PCI: 00:1d.3: enabled 0
847 06:52:55.792245 PCI: 00:1d.4: enabled 0
848 06:52:55.792684 PCI: 00:1d.5: enabled 1
849 06:52:55.795548 PCI: 00:00.0: enabled 1
850 06:52:55.798938 PCI: 00:1e.0: enabled 1
851 06:52:55.801904 PCI: 00:1e.1: enabled 0
852 06:52:55.805569 PCI: 00:1e.2: enabled 1
853 06:52:55.806078 SPI: 00: enabled 1
854 06:52:55.808871 PCI: 00:1e.3: enabled 1
855 06:52:55.811773 SPI: 01: enabled 1
856 06:52:55.814986 PCI: 00:1f.0: enabled 1
857 06:52:55.815421 PNP: 0c09.0: enabled 1
858 06:52:55.818402 PCI: 00:1f.1: enabled 1
859 06:52:55.821892 PCI: 00:1f.2: enabled 1
860 06:52:55.825691 PCI: 00:1f.3: enabled 1
861 06:52:55.828429 PCI: 00:1f.4: enabled 1
862 06:52:55.828913 PCI: 00:1f.5: enabled 1
863 06:52:55.831938 PCI: 00:1f.6: enabled 0
864 06:52:55.835225 Root Device scanning...
865 06:52:55.838257 scan_static_bus for Root Device
866 06:52:55.841616 CPU_CLUSTER: 0 enabled
867 06:52:55.842073 DOMAIN: 0000 enabled
868 06:52:55.844960 DOMAIN: 0000 scanning...
869 06:52:55.848640 PCI: pci_scan_bus for bus 00
870 06:52:55.851683 PCI: 00:00.0 [8086/0000] ops
871 06:52:55.855135 PCI: 00:00.0 [8086/9b61] enabled
872 06:52:55.858706 PCI: 00:02.0 [8086/0000] bus ops
873 06:52:55.862046 PCI: 00:02.0 [8086/9b41] enabled
874 06:52:55.864799 PCI: 00:04.0 [8086/1903] disabled
875 06:52:55.868154 PCI: 00:08.0 [8086/1911] enabled
876 06:52:55.871685 PCI: 00:12.0 [8086/02f9] enabled
877 06:52:55.874902 PCI: 00:14.0 [8086/0000] bus ops
878 06:52:55.878480 PCI: 00:14.0 [8086/02ed] enabled
879 06:52:55.881441 PCI: 00:14.2 [8086/02ef] enabled
880 06:52:55.884932 PCI: 00:14.3 [8086/02f0] enabled
881 06:52:55.888255 PCI: 00:15.0 [8086/0000] bus ops
882 06:52:55.891376 PCI: 00:15.0 [8086/02e8] enabled
883 06:52:55.894649 PCI: 00:15.1 [8086/0000] bus ops
884 06:52:55.898627 PCI: 00:15.1 [8086/02e9] enabled
885 06:52:55.901469 PCI: 00:16.0 [8086/0000] ops
886 06:52:55.905271 PCI: 00:16.0 [8086/02e0] enabled
887 06:52:55.908446 PCI: 00:17.0 [8086/0000] ops
888 06:52:55.911776 PCI: 00:17.0 [8086/02d3] enabled
889 06:52:55.914667 PCI: 00:19.0 [8086/0000] bus ops
890 06:52:55.918439 PCI: 00:19.0 [8086/02c5] enabled
891 06:52:55.921515 PCI: 00:1d.0 [8086/0000] bus ops
892 06:52:55.924799 PCI: 00:1d.0 [8086/02b0] enabled
893 06:52:55.931361 PCI: Static device PCI: 00:1d.5 not found, disabling it.
894 06:52:55.931810 PCI: 00:1e.0 [8086/0000] ops
895 06:52:55.934595 PCI: 00:1e.0 [8086/02a8] enabled
896 06:52:55.937887 PCI: 00:1e.2 [8086/0000] bus ops
897 06:52:55.941156 PCI: 00:1e.2 [8086/02aa] enabled
898 06:52:55.944541 PCI: 00:1e.3 [8086/0000] bus ops
899 06:52:55.948073 PCI: 00:1e.3 [8086/02ab] enabled
900 06:52:55.951241 PCI: 00:1f.0 [8086/0000] bus ops
901 06:52:55.955304 PCI: 00:1f.0 [8086/0284] enabled
902 06:52:55.961281 PCI: Static device PCI: 00:1f.1 not found, disabling it.
903 06:52:55.968208 PCI: Static device PCI: 00:1f.2 not found, disabling it.
904 06:52:55.971342 PCI: 00:1f.3 [8086/0000] bus ops
905 06:52:55.974522 PCI: 00:1f.3 [8086/02c8] enabled
906 06:52:55.977699 PCI: 00:1f.4 [8086/0000] bus ops
907 06:52:55.980861 PCI: 00:1f.4 [8086/02a3] enabled
908 06:52:55.984511 PCI: 00:1f.5 [8086/0000] bus ops
909 06:52:55.987752 PCI: 00:1f.5 [8086/02a4] enabled
910 06:52:55.991099 PCI: Leftover static devices:
911 06:52:55.991583 PCI: 00:05.0
912 06:52:55.994913 PCI: 00:12.5
913 06:52:55.995396 PCI: 00:12.6
914 06:52:55.995775 PCI: 00:14.1
915 06:52:55.997754 PCI: 00:14.5
916 06:52:55.998232 PCI: 00:15.2
917 06:52:56.001304 PCI: 00:15.3
918 06:52:56.001811 PCI: 00:16.1
919 06:52:56.002188 PCI: 00:16.2
920 06:52:56.004374 PCI: 00:16.3
921 06:52:56.004867 PCI: 00:16.4
922 06:52:56.007681 PCI: 00:16.5
923 06:52:56.008180 PCI: 00:19.1
924 06:52:56.008561 PCI: 00:19.2
925 06:52:56.011095 PCI: 00:1a.0
926 06:52:56.011529 PCI: 00:1c.0
927 06:52:56.014353 PCI: 00:1c.1
928 06:52:56.014793 PCI: 00:1c.2
929 06:52:56.017453 PCI: 00:1c.3
930 06:52:56.017923 PCI: 00:1c.4
931 06:52:56.018292 PCI: 00:1c.5
932 06:52:56.021018 PCI: 00:1c.6
933 06:52:56.021518 PCI: 00:1c.7
934 06:52:56.024268 PCI: 00:1d.1
935 06:52:56.024724 PCI: 00:1d.2
936 06:52:56.025069 PCI: 00:1d.3
937 06:52:56.027553 PCI: 00:1d.4
938 06:52:56.027989 PCI: 00:1d.5
939 06:52:56.031031 PCI: 00:1e.1
940 06:52:56.031464 PCI: 00:1f.1
941 06:52:56.031808 PCI: 00:1f.2
942 06:52:56.035578 PCI: 00:1f.6
943 06:52:56.037714 PCI: Check your devicetree.cb.
944 06:52:56.040818 PCI: 00:02.0 scanning...
945 06:52:56.044594 scan_generic_bus for PCI: 00:02.0
946 06:52:56.047715 scan_generic_bus for PCI: 00:02.0 done
947 06:52:56.054248 scan_bus: scanning of bus PCI: 00:02.0 took 10191 usecs
948 06:52:56.054687 PCI: 00:14.0 scanning...
949 06:52:56.057576 scan_static_bus for PCI: 00:14.0
950 06:52:56.061098 USB0 port 0 enabled
951 06:52:56.064171 USB0 port 0 scanning...
952 06:52:56.067642 scan_static_bus for USB0 port 0
953 06:52:56.068142 USB2 port 0 enabled
954 06:52:56.070716 USB2 port 1 enabled
955 06:52:56.074203 USB2 port 2 disabled
956 06:52:56.074786 USB2 port 3 disabled
957 06:52:56.077403 USB2 port 5 disabled
958 06:52:56.080729 USB2 port 6 enabled
959 06:52:56.081169 USB2 port 9 enabled
960 06:52:56.083990 USB3 port 0 enabled
961 06:52:56.084427 USB3 port 1 enabled
962 06:52:56.087236 USB3 port 2 enabled
963 06:52:56.090529 USB3 port 3 enabled
964 06:52:56.090971 USB3 port 4 disabled
965 06:52:56.094143 USB2 port 0 scanning...
966 06:52:56.097360 scan_static_bus for USB2 port 0
967 06:52:56.100885 scan_static_bus for USB2 port 0 done
968 06:52:56.107128 scan_bus: scanning of bus USB2 port 0 took 9699 usecs
969 06:52:56.110692 USB2 port 1 scanning...
970 06:52:56.113933 scan_static_bus for USB2 port 1
971 06:52:56.117295 scan_static_bus for USB2 port 1 done
972 06:52:56.120222 scan_bus: scanning of bus USB2 port 1 took 9709 usecs
973 06:52:56.123822 USB2 port 6 scanning...
974 06:52:56.127311 scan_static_bus for USB2 port 6
975 06:52:56.130475 scan_static_bus for USB2 port 6 done
976 06:52:56.138043 scan_bus: scanning of bus USB2 port 6 took 9709 usecs
977 06:52:56.140730 USB2 port 9 scanning...
978 06:52:56.143754 scan_static_bus for USB2 port 9
979 06:52:56.147493 scan_static_bus for USB2 port 9 done
980 06:52:56.150654 scan_bus: scanning of bus USB2 port 9 took 9711 usecs
981 06:52:56.153960 USB3 port 0 scanning...
982 06:52:56.157145 scan_static_bus for USB3 port 0
983 06:52:56.160263 scan_static_bus for USB3 port 0 done
984 06:52:56.167209 scan_bus: scanning of bus USB3 port 0 took 9691 usecs
985 06:52:56.170589 USB3 port 1 scanning...
986 06:52:56.173583 scan_static_bus for USB3 port 1
987 06:52:56.177043 scan_static_bus for USB3 port 1 done
988 06:52:56.180662 scan_bus: scanning of bus USB3 port 1 took 9702 usecs
989 06:52:56.183767 USB3 port 2 scanning...
990 06:52:56.187310 scan_static_bus for USB3 port 2
991 06:52:56.190373 scan_static_bus for USB3 port 2 done
992 06:52:56.197139 scan_bus: scanning of bus USB3 port 2 took 9712 usecs
993 06:52:56.200511 USB3 port 3 scanning...
994 06:52:56.203713 scan_static_bus for USB3 port 3
995 06:52:56.207270 scan_static_bus for USB3 port 3 done
996 06:52:56.210485 scan_bus: scanning of bus USB3 port 3 took 9693 usecs
997 06:52:56.216749 scan_static_bus for USB0 port 0 done
998 06:52:56.220636 scan_bus: scanning of bus USB0 port 0 took 155429 usecs
999 06:52:56.223264 scan_static_bus for PCI: 00:14.0 done
1000 06:52:56.230487 scan_bus: scanning of bus PCI: 00:14.0 took 173061 usecs
1001 06:52:56.233463 PCI: 00:15.0 scanning...
1002 06:52:56.236738 scan_generic_bus for PCI: 00:15.0
1003 06:52:56.240606 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1004 06:52:56.243594 scan_generic_bus for PCI: 00:15.0 done
1005 06:52:56.249902 scan_bus: scanning of bus PCI: 00:15.0 took 14314 usecs
1006 06:52:56.253336 PCI: 00:15.1 scanning...
1007 06:52:56.256736 scan_generic_bus for PCI: 00:15.1
1008 06:52:56.260009 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1009 06:52:56.263708 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1010 06:52:56.269765 scan_generic_bus for PCI: 00:15.1 done
1011 06:52:56.273204 scan_bus: scanning of bus PCI: 00:15.1 took 18619 usecs
1012 06:52:56.276810 PCI: 00:19.0 scanning...
1013 06:52:56.279957 scan_generic_bus for PCI: 00:19.0
1014 06:52:56.283244 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1015 06:52:56.290087 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1016 06:52:56.293517 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1017 06:52:56.296421 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1018 06:52:56.299587 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1019 06:52:56.306789 scan_generic_bus for PCI: 00:19.0 done
1020 06:52:56.309791 scan_bus: scanning of bus PCI: 00:19.0 took 30755 usecs
1021 06:52:56.313250 PCI: 00:1d.0 scanning...
1022 06:52:56.316395 do_pci_scan_bridge for PCI: 00:1d.0
1023 06:52:56.319715 PCI: pci_scan_bus for bus 01
1024 06:52:56.323636 PCI: 01:00.0 [1c5c/1327] enabled
1025 06:52:56.326326 Enabling Common Clock Configuration
1026 06:52:56.329775 L1 Sub-State supported from root port 29
1027 06:52:56.332790 L1 Sub-State Support = 0xf
1028 06:52:56.336288 CommonModeRestoreTime = 0x28
1029 06:52:56.339359 Power On Value = 0x16, Power On Scale = 0x0
1030 06:52:56.342741
1031 06:52:56.343183 ASPM: Enabled L1
1032 06:52:56.349385 scan_bus: scanning of bus PCI: 00:1d.0 took 32782 usecs
1033 06:52:56.349884 PCI: 00:1e.2 scanning...
1034 06:52:56.352990 scan_generic_bus for PCI: 00:1e.2
1035 06:52:56.356309
1036 06:52:56.359665 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1037 06:52:56.363430 scan_generic_bus for PCI: 00:1e.2 done
1038 06:52:56.369602 scan_bus: scanning of bus PCI: 00:1e.2 took 13999 usecs
1039 06:52:56.370046 PCI: 00:1e.3 scanning...
1040 06:52:56.372922 scan_generic_bus for PCI: 00:1e.3
1041 06:52:56.379391 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1042 06:52:56.383017 scan_generic_bus for PCI: 00:1e.3 done
1043 06:52:56.386016 scan_bus: scanning of bus PCI: 00:1e.3 took 14031 usecs
1044 06:52:56.389512 PCI: 00:1f.0 scanning...
1045 06:52:56.392585 scan_static_bus for PCI: 00:1f.0
1046 06:52:56.396053 PNP: 0c09.0 enabled
1047 06:52:56.399493 scan_static_bus for PCI: 00:1f.0 done
1048 06:52:56.405784 scan_bus: scanning of bus PCI: 00:1f.0 took 12054 usecs
1049 06:52:56.406240 PCI: 00:1f.3 scanning...
1050 06:52:56.412826 scan_bus: scanning of bus PCI: 00:1f.3 took 2862 usecs
1051 06:52:56.416584 PCI: 00:1f.4 scanning...
1052 06:52:56.419856 scan_generic_bus for PCI: 00:1f.4
1053 06:52:56.422954 scan_generic_bus for PCI: 00:1f.4 done
1054 06:52:56.429562 scan_bus: scanning of bus PCI: 00:1f.4 took 10197 usecs
1055 06:52:56.432758 PCI: 00:1f.5 scanning...
1056 06:52:56.436378 scan_generic_bus for PCI: 00:1f.5
1057 06:52:56.439966 scan_generic_bus for PCI: 00:1f.5 done
1058 06:52:56.446368 scan_bus: scanning of bus PCI: 00:1f.5 took 10191 usecs
1059 06:52:56.449452 scan_bus: scanning of bus DOMAIN: 0000 took 605330 usecs
1060 06:52:56.453069 scan_static_bus for Root Device done
1061 06:52:56.459241 scan_bus: scanning of bus Root Device took 625208 usecs
1062 06:52:56.459681 done
1063 06:52:56.462985 Chrome EC: UHEPI supported
1064 06:52:56.469415 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1065 06:52:56.476505 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1066 06:52:56.482718 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1067 06:52:56.489010 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1068 06:52:56.492336 SPI flash protection: WPSW=0 SRP0=0
1069 06:52:56.496105 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1070 06:52:56.502043 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1071 06:52:56.505798 found VGA at PCI: 00:02.0
1072 06:52:56.508726 Setting up VGA for PCI: 00:02.0
1073 06:52:56.512790 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1074 06:52:56.515529
1075 06:52:56.518709 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1076 06:52:56.521960 Allocating resources...
1077 06:52:56.522447 Reading resources...
1078 06:52:56.528756 Root Device read_resources bus 0 link: 0
1079 06:52:56.532271 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1080 06:52:56.538637 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1081 06:52:56.541907 DOMAIN: 0000 read_resources bus 0 link: 0
1082 06:52:56.548663 PCI: 00:14.0 read_resources bus 0 link: 0
1083 06:52:56.551697 USB0 port 0 read_resources bus 0 link: 0
1084 06:52:56.559983 USB0 port 0 read_resources bus 0 link: 0 done
1085 06:52:56.563455 PCI: 00:14.0 read_resources bus 0 link: 0 done
1086 06:52:56.571027 PCI: 00:15.0 read_resources bus 1 link: 0
1087 06:52:56.573955 PCI: 00:15.0 read_resources bus 1 link: 0 done
1088 06:52:56.580617 PCI: 00:15.1 read_resources bus 2 link: 0
1089 06:52:56.583878 PCI: 00:15.1 read_resources bus 2 link: 0 done
1090 06:52:56.591461 PCI: 00:19.0 read_resources bus 3 link: 0
1091 06:52:56.598144 PCI: 00:19.0 read_resources bus 3 link: 0 done
1092 06:52:56.601551 PCI: 00:1d.0 read_resources bus 1 link: 0
1093 06:52:56.608466 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1094 06:52:56.611285 PCI: 00:1e.2 read_resources bus 4 link: 0
1095 06:52:56.618013 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1096 06:52:56.621653 PCI: 00:1e.3 read_resources bus 5 link: 0
1097 06:52:56.628048 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1098 06:52:56.631106 PCI: 00:1f.0 read_resources bus 0 link: 0
1099 06:52:56.637808 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1100 06:52:56.644649 DOMAIN: 0000 read_resources bus 0 link: 0 done
1101 06:52:56.647876 Root Device read_resources bus 0 link: 0 done
1102 06:52:56.651010 Done reading resources.
1103 06:52:56.654825 Show resources in subtree (Root Device)...After reading.
1104 06:52:56.661132 Root Device child on link 0 CPU_CLUSTER: 0
1105 06:52:56.664565 CPU_CLUSTER: 0 child on link 0 APIC: 00
1106 06:52:56.665004 APIC: 00
1107 06:52:56.667431 APIC: 02
1108 06:52:56.667872 APIC: 01
1109 06:52:56.671002 APIC: 03
1110 06:52:56.671540 APIC: 04
1111 06:52:56.672078 APIC: 05
1112 06:52:56.674199 APIC: 07
1113 06:52:56.674651 APIC: 06
1114 06:52:56.677635 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1115 06:52:56.687643 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1116 06:52:56.697649 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1117 06:52:56.747357 PCI: 00:00.0
1118 06:52:56.748208 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1119 06:52:56.748624 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1120 06:52:56.749422 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1121 06:52:56.750186 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1122 06:52:56.750577 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1123 06:52:56.761429 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1124 06:52:56.763983 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1125 06:52:56.774205 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1126 06:52:56.784136 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1127 06:52:56.794030 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1128 06:52:56.800928 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1129 06:52:56.810797 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1130 06:52:56.820545 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1131 06:52:56.830319 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1132 06:52:56.840293 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1133 06:52:56.850351 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1134 06:52:56.850842 PCI: 00:02.0
1135 06:52:56.860794 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1136 06:52:56.870068 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1137 06:52:56.880469 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1138 06:52:56.880978 PCI: 00:04.0
1139 06:52:56.883374
1140 06:52:56.883852 PCI: 00:08.0
1141 06:52:56.893544 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1142 06:52:56.894001 PCI: 00:12.0
1143 06:52:56.903383 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1144 06:52:56.909860 PCI: 00:14.0 child on link 0 USB0 port 0
1145 06:52:56.920246 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1146 06:52:56.923520 USB0 port 0 child on link 0 USB2 port 0
1147 06:52:56.926452 USB2 port 0
1148 06:52:56.926957 USB2 port 1
1149 06:52:56.929983 USB2 port 2
1150 06:52:56.930432 USB2 port 3
1151 06:52:56.933236 USB2 port 5
1152 06:52:56.933743 USB2 port 6
1153 06:52:56.936704 USB2 port 9
1154 06:52:56.937149 USB3 port 0
1155 06:52:56.939973 USB3 port 1
1156 06:52:56.940418 USB3 port 2
1157 06:52:56.943091 USB3 port 3
1158 06:52:56.943538 USB3 port 4
1159 06:52:56.946599 PCI: 00:14.2
1160 06:52:56.956450 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1161 06:52:56.967000 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1162 06:52:56.967509 PCI: 00:14.3
1163 06:52:56.976645 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1164 06:52:56.983472 PCI: 00:15.0 child on link 0 I2C: 01:15
1165 06:52:56.993187 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1166 06:52:56.993658 I2C: 01:15
1167 06:52:56.996591 PCI: 00:15.1 child on link 0 I2C: 02:5d
1168 06:52:57.006603 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 06:52:57.009852 I2C: 02:5d
1170 06:52:57.010303 GENERIC: 0.0
1171 06:52:57.013558 PCI: 00:16.0
1172 06:52:57.023034 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1173 06:52:57.023513 PCI: 00:17.0
1174 06:52:57.032682 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1175 06:52:57.042664 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1176 06:52:57.049073 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1177 06:52:57.059260 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1178 06:52:57.065906 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1179 06:52:57.075881 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1180 06:52:57.079225 PCI: 00:19.0 child on link 0 I2C: 03:1a
1181 06:52:57.089324 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1182 06:52:57.092572 I2C: 03:1a
1183 06:52:57.093150 I2C: 03:38
1184 06:52:57.096107 I2C: 03:39
1185 06:52:57.096674 I2C: 03:3a
1186 06:52:57.099374 I2C: 03:3b
1187 06:52:57.102260 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1188 06:52:57.112308 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1189 06:52:57.122120 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1190 06:52:57.128958 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1191 06:52:57.132027 PCI: 01:00.0
1192 06:52:57.142374 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1193 06:52:57.142858 PCI: 00:1e.0
1194 06:52:57.145307
1195 06:52:57.155524 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1196 06:52:57.165802 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1197 06:52:57.168779 PCI: 00:1e.2 child on link 0 SPI: 00
1198 06:52:57.179156 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 06:52:57.179621 SPI: 00
1200 06:52:57.185802 PCI: 00:1e.3 child on link 0 SPI: 01
1201 06:52:57.195663 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1202 06:52:57.196128 SPI: 01
1203 06:52:57.199316 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1204 06:52:57.208767 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1205 06:52:57.218687 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1206 06:52:57.219147 PNP: 0c09.0
1207 06:52:57.228398 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1208 06:52:57.228938 PCI: 00:1f.3
1209 06:52:57.238737 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1210 06:52:57.248556 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1211 06:52:57.251930 PCI: 00:1f.4
1212 06:52:57.261598 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1213 06:52:57.267979 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1214 06:52:57.271364 PCI: 00:1f.5
1215 06:52:57.281962 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1216 06:52:57.287921 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1217 06:52:57.294971 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1218 06:52:57.301362 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1219 06:52:57.304631 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1220 06:52:57.308201 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1221 06:52:57.311321 PCI: 00:17.0 18 * [0x60 - 0x67] io
1222 06:52:57.314623 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1223 06:52:57.321251 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1224 06:52:57.327641 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1225 06:52:57.334482 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1226 06:52:57.344326 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1227 06:52:57.351141 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1228 06:52:57.354477 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1229 06:52:57.364310 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1230 06:52:57.367680 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1231 06:52:57.371010 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1232 06:52:57.377474 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1233 06:52:57.380684 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1234 06:52:57.387334 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1235 06:52:57.391156 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1236 06:52:57.397537 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1237 06:52:57.400628 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1238 06:52:57.407594 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1239 06:52:57.410722 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1240 06:52:57.417214 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1241 06:52:57.420924 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1242 06:52:57.424248 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1243 06:52:57.427234
1244 06:52:57.430543 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1245 06:52:57.433934 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1246 06:52:57.440657 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1247 06:52:57.443950 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1248 06:52:57.450647 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1249 06:52:57.454184 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1250 06:52:57.460233 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1251 06:52:57.463586 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1252 06:52:57.470224 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1253 06:52:57.473734 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1254 06:52:57.483800 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1255 06:52:57.487163 avoid_fixed_resources: DOMAIN: 0000
1256 06:52:57.493540 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1257 06:52:57.496873 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1258 06:52:57.506832 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1259 06:52:57.513464 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1260 06:52:57.520216 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1261 06:52:57.530301 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1262 06:52:57.536493 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1263 06:52:57.543315 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1264 06:52:57.553060 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1265 06:52:57.559873 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1266 06:52:57.566371 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1267 06:52:57.572877 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1268 06:52:57.576202 Setting resources...
1269 06:52:57.583013 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1270 06:52:57.586373 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1271 06:52:57.589658 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1272 06:52:57.592946 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1273 06:52:57.599837 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1274 06:52:57.606455 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1275 06:52:57.609475 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1276 06:52:57.616293 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1277 06:52:57.626042 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1278 06:52:57.629776 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1279 06:52:57.636330 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1280 06:52:57.639893 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1281 06:52:57.646510 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1282 06:52:57.649752 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1283 06:52:57.652935 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1284 06:52:57.659434 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1285 06:52:57.663315 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1286 06:52:57.669675 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1287 06:52:57.672810 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1288 06:52:57.679568 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1289 06:52:57.682873 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1290 06:52:57.689352 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1291 06:52:57.692658 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1292 06:52:57.699230 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1293 06:52:57.702572 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1294 06:52:57.709198 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1295 06:52:57.712480 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1296 06:52:57.715876 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1297 06:52:57.719043
1298 06:52:57.722425 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1299 06:52:57.725841 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1300 06:52:57.732523 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1301 06:52:57.736119 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1302 06:52:57.745866 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1303 06:52:57.752083 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1304 06:52:57.759336 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1305 06:52:57.765359 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1306 06:52:57.772215 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1307 06:52:57.778875 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1308 06:52:57.782155 Root Device assign_resources, bus 0 link: 0
1309 06:52:57.789310 DOMAIN: 0000 assign_resources, bus 0 link: 0
1310 06:52:57.795833 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1311 06:52:57.805534 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1312 06:52:57.812163 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1313 06:52:57.821948 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1314 06:52:57.828745 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1315 06:52:57.838580 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1316 06:52:57.842020 PCI: 00:14.0 assign_resources, bus 0 link: 0
1317 06:52:57.845274 PCI: 00:14.0 assign_resources, bus 0 link: 0
1318 06:52:57.855280 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1319 06:52:57.861760 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1320 06:52:57.872019 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1321 06:52:57.878606 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1322 06:52:57.885065 PCI: 00:15.0 assign_resources, bus 1 link: 0
1323 06:52:57.888572 PCI: 00:15.0 assign_resources, bus 1 link: 0
1324 06:52:57.898441 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1325 06:52:57.901865 PCI: 00:15.1 assign_resources, bus 2 link: 0
1326 06:52:57.904914 PCI: 00:15.1 assign_resources, bus 2 link: 0
1327 06:52:57.915402 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1328 06:52:57.922026 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1329 06:52:57.931671 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1330 06:52:57.938464 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1331 06:52:57.945551 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1332 06:52:57.955354 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1333 06:52:57.961801 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1334 06:52:57.968239 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1335 06:52:57.974693 PCI: 00:19.0 assign_resources, bus 3 link: 0
1336 06:52:57.978189 PCI: 00:19.0 assign_resources, bus 3 link: 0
1337 06:52:57.987677 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1338 06:52:57.998036 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1339 06:52:58.004596 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1340 06:52:58.007997 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1341 06:52:58.010990
1342 06:52:58.017583 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1343 06:52:58.021267 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1344 06:52:58.031565 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1345 06:52:58.037744 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1346 06:52:58.044749 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1347 06:52:58.047723 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1348 06:52:58.057969 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1349 06:52:58.060936 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1350 06:52:58.064528 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1351 06:52:58.067779
1352 06:52:58.070895 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1353 06:52:58.073996 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1354 06:52:58.077930
1355 06:52:58.081306 LPC: Trying to open IO window from 800 size 1ff
1356 06:52:58.087386 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1357 06:52:58.097227 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1358 06:52:58.103664 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1359 06:52:58.113984 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1360 06:52:58.116917 DOMAIN: 0000 assign_resources, bus 0 link: 0
1361 06:52:58.123760 Root Device assign_resources, bus 0 link: 0
1362 06:52:58.124226 Done setting resources.
1363 06:52:58.130252 Show resources in subtree (Root Device)...After assigning values.
1364 06:52:58.137121 Root Device child on link 0 CPU_CLUSTER: 0
1365 06:52:58.140116 CPU_CLUSTER: 0 child on link 0 APIC: 00
1366 06:52:58.140582 APIC: 00
1367 06:52:58.143601 APIC: 02
1368 06:52:58.144063 APIC: 01
1369 06:52:58.144521 APIC: 03
1370 06:52:58.147000
1371 06:52:58.147461 APIC: 04
1372 06:52:58.147906 APIC: 05
1373 06:52:58.150370 APIC: 07
1374 06:52:58.150839 APIC: 06
1375 06:52:58.153467 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1376 06:52:58.163796 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1377 06:52:58.176572 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1378 06:52:58.177019 PCI: 00:00.0
1379 06:52:58.187154 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1380 06:52:58.196600 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1381 06:52:58.206623 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1382 06:52:58.216193 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1383 06:52:58.223062 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1384 06:52:58.232704 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1385 06:52:58.242807 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1386 06:52:58.252528 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1387 06:52:58.262771 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1388 06:52:58.269614 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1389 06:52:58.279003 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1390 06:52:58.288814 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1391 06:52:58.299033 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1392 06:52:58.309051 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1393 06:52:58.318480 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1394 06:52:58.328397 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1395 06:52:58.328848 PCI: 00:02.0
1396 06:52:58.338793 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1397 06:52:58.348458 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1398 06:52:58.358243 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1399 06:52:58.361748 PCI: 00:04.0
1400 06:52:58.362206 PCI: 00:08.0
1401 06:52:58.371918 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1402 06:52:58.374835 PCI: 00:12.0
1403 06:52:58.384609 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1404 06:52:58.388086 PCI: 00:14.0 child on link 0 USB0 port 0
1405 06:52:58.398312 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1406 06:52:58.404660 USB0 port 0 child on link 0 USB2 port 0
1407 06:52:58.405163 USB2 port 0
1408 06:52:58.407836 USB2 port 1
1409 06:52:58.408251 USB2 port 2
1410 06:52:58.411260 USB2 port 3
1411 06:52:58.411700 USB2 port 5
1412 06:52:58.414843 USB2 port 6
1413 06:52:58.415283 USB2 port 9
1414 06:52:58.417820 USB3 port 0
1415 06:52:58.421410 USB3 port 1
1416 06:52:58.421875 USB3 port 2
1417 06:52:58.424777 USB3 port 3
1418 06:52:58.425217 USB3 port 4
1419 06:52:58.428194 PCI: 00:14.2
1420 06:52:58.438207 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1421 06:52:58.447954 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1422 06:52:58.448436 PCI: 00:14.3
1423 06:52:58.457544 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1424 06:52:58.464350 PCI: 00:15.0 child on link 0 I2C: 01:15
1425 06:52:58.474154 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1426 06:52:58.474601 I2C: 01:15
1427 06:52:58.481068 PCI: 00:15.1 child on link 0 I2C: 02:5d
1428 06:52:58.490547 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1429 06:52:58.491130 I2C: 02:5d
1430 06:52:58.493796 GENERIC: 0.0
1431 06:52:58.494277 PCI: 00:16.0
1432 06:52:58.503760 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1433 06:52:58.507434 PCI: 00:17.0
1434 06:52:58.516941 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1435 06:52:58.527335 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1436 06:52:58.537054 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1437 06:52:58.547119 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1438 06:52:58.554164 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1439 06:52:58.563717 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1440 06:52:58.569956 PCI: 00:19.0 child on link 0 I2C: 03:1a
1441 06:52:58.580113 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1442 06:52:58.580566 I2C: 03:1a
1443 06:52:58.583474 I2C: 03:38
1444 06:52:58.583935 I2C: 03:39
1445 06:52:58.586854 I2C: 03:3a
1446 06:52:58.587297 I2C: 03:3b
1447 06:52:58.589976 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1448 06:52:58.593040
1449 06:52:58.600371 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1450 06:52:58.609963 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1451 06:52:58.622853 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1452 06:52:58.623305 PCI: 01:00.0
1453 06:52:58.632688 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1454 06:52:58.636208 PCI: 00:1e.0
1455 06:52:58.646109 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1456 06:52:58.656126 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1457 06:52:58.659306 PCI: 00:1e.2 child on link 0 SPI: 00
1458 06:52:58.669418 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1459 06:52:58.672676
1460 06:52:58.673173 SPI: 00
1461 06:52:58.675556 PCI: 00:1e.3 child on link 0 SPI: 01
1462 06:52:58.685353 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1463 06:52:58.689270 SPI: 01
1464 06:52:58.692540 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1465 06:52:58.702120 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1466 06:52:58.708803 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1467 06:52:58.711866 PNP: 0c09.0
1468 06:52:58.718601 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1469 06:52:58.721890 PCI: 00:1f.3
1470 06:52:58.731629 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1471 06:52:58.741607 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1472 06:52:58.745388 PCI: 00:1f.4
1473 06:52:58.751817 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1474 06:52:58.764797 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1475 06:52:58.765266 PCI: 00:1f.5
1476 06:52:58.775357 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1477 06:52:58.778113 Done allocating resources.
1478 06:52:58.785017 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1479 06:52:58.785460 Enabling resources...
1480 06:52:58.792491 PCI: 00:00.0 subsystem <- 8086/9b61
1481 06:52:58.792927 PCI: 00:00.0 cmd <- 06
1482 06:52:58.796092 PCI: 00:02.0 subsystem <- 8086/9b41
1483 06:52:58.799083 PCI: 00:02.0 cmd <- 03
1484 06:52:58.802336 PCI: 00:08.0 cmd <- 06
1485 06:52:58.805364 PCI: 00:12.0 subsystem <- 8086/02f9
1486 06:52:58.808857 PCI: 00:12.0 cmd <- 02
1487 06:52:58.812169 PCI: 00:14.0 subsystem <- 8086/02ed
1488 06:52:58.815657 PCI: 00:14.0 cmd <- 02
1489 06:52:58.816094 PCI: 00:14.2 cmd <- 02
1490 06:52:58.818788
1491 06:52:58.822056 PCI: 00:14.3 subsystem <- 8086/02f0
1492 06:52:58.822489 PCI: 00:14.3 cmd <- 02
1493 06:52:58.828711 PCI: 00:15.0 subsystem <- 8086/02e8
1494 06:52:58.829150 PCI: 00:15.0 cmd <- 02
1495 06:52:58.831831 PCI: 00:15.1 subsystem <- 8086/02e9
1496 06:52:58.835457 PCI: 00:15.1 cmd <- 02
1497 06:52:58.838808 PCI: 00:16.0 subsystem <- 8086/02e0
1498 06:52:58.842265 PCI: 00:16.0 cmd <- 02
1499 06:52:58.845098 PCI: 00:17.0 subsystem <- 8086/02d3
1500 06:52:58.848626 PCI: 00:17.0 cmd <- 03
1501 06:52:58.852273 PCI: 00:19.0 subsystem <- 8086/02c5
1502 06:52:58.855406 PCI: 00:19.0 cmd <- 02
1503 06:52:58.858407 PCI: 00:1d.0 bridge ctrl <- 0013
1504 06:52:58.862108 PCI: 00:1d.0 subsystem <- 8086/02b0
1505 06:52:58.865291 PCI: 00:1d.0 cmd <- 06
1506 06:52:58.868699 PCI: 00:1e.0 subsystem <- 8086/02a8
1507 06:52:58.871817 PCI: 00:1e.0 cmd <- 06
1508 06:52:58.875394 PCI: 00:1e.2 subsystem <- 8086/02aa
1509 06:52:58.875897 PCI: 00:1e.2 cmd <- 06
1510 06:52:58.878662
1511 06:52:58.882243 PCI: 00:1e.3 subsystem <- 8086/02ab
1512 06:52:58.882787 PCI: 00:1e.3 cmd <- 02
1513 06:52:58.888311 PCI: 00:1f.0 subsystem <- 8086/0284
1514 06:52:58.888760 PCI: 00:1f.0 cmd <- 407
1515 06:52:58.891737 PCI: 00:1f.3 subsystem <- 8086/02c8
1516 06:52:58.895145
1517 06:52:58.895739 PCI: 00:1f.3 cmd <- 02
1518 06:52:58.898513 PCI: 00:1f.4 subsystem <- 8086/02a3
1519 06:52:58.901706 PCI: 00:1f.4 cmd <- 03
1520 06:52:58.904997 PCI: 00:1f.5 subsystem <- 8086/02a4
1521 06:52:58.908436 PCI: 00:1f.5 cmd <- 406
1522 06:52:58.917402 PCI: 01:00.0 cmd <- 02
1523 06:52:58.922322 done.
1524 06:52:58.935144 ME: Version: 14.0.39.1367
1525 06:52:58.941653 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1526 06:52:58.945126 Initializing devices...
1527 06:52:58.945589 Root Device init ...
1528 06:52:58.951597 Chrome EC: Set SMI mask to 0x0000000000000000
1529 06:52:58.955118 Chrome EC: clear events_b mask to 0x0000000000000000
1530 06:52:58.961947 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1531 06:52:58.968376 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1532 06:52:58.975156 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1533 06:52:58.978349 Chrome EC: Set WAKE mask to 0x0000000000000000
1534 06:52:58.981563 Root Device init finished in 35149 usecs
1535 06:52:58.985183 CPU_CLUSTER: 0 init ...
1536 06:52:58.988776 CPU_CLUSTER: 0 init finished in 2446 usecs
1537 06:52:58.992095
1538 06:52:58.995914 PCI: 00:00.0 init ...
1539 06:52:58.999549 CPU TDP: 15 Watts
1540 06:52:59.002398 CPU PL2 = 64 Watts
1541 06:52:59.005948 PCI: 00:00.0 init finished in 7061 usecs
1542 06:52:59.009136 PCI: 00:02.0 init ...
1543 06:52:59.012923 PCI: 00:02.0 init finished in 2253 usecs
1544 06:52:59.015691 PCI: 00:08.0 init ...
1545 06:52:59.019067 PCI: 00:08.0 init finished in 2251 usecs
1546 06:52:59.022460 PCI: 00:12.0 init ...
1547 06:52:59.025738 PCI: 00:12.0 init finished in 2252 usecs
1548 06:52:59.029014 PCI: 00:14.0 init ...
1549 06:52:59.032345 PCI: 00:14.0 init finished in 2252 usecs
1550 06:52:59.035457 PCI: 00:14.2 init ...
1551 06:52:59.038814 PCI: 00:14.2 init finished in 2253 usecs
1552 06:52:59.042422 PCI: 00:14.3 init ...
1553 06:52:59.045738 PCI: 00:14.3 init finished in 2269 usecs
1554 06:52:59.049027 PCI: 00:15.0 init ...
1555 06:52:59.052037 DW I2C bus 0 at 0xd121f000 (400 KHz)
1556 06:52:59.055604 PCI: 00:15.0 init finished in 5979 usecs
1557 06:52:59.059430 PCI: 00:15.1 init ...
1558 06:52:59.062148 DW I2C bus 1 at 0xd1220000 (400 KHz)
1559 06:52:59.065438 PCI: 00:15.1 init finished in 5967 usecs
1560 06:52:59.068789
1561 06:52:59.069237 PCI: 00:16.0 init ...
1562 06:52:59.075208 PCI: 00:16.0 init finished in 2251 usecs
1563 06:52:59.075662 PCI: 00:19.0 init ...
1564 06:52:59.082040 DW I2C bus 4 at 0xd1222000 (400 KHz)
1565 06:52:59.085376 PCI: 00:19.0 init finished in 5975 usecs
1566 06:52:59.088566 PCI: 00:1d.0 init ...
1567 06:52:59.091768 Initializing PCH PCIe bridge.
1568 06:52:59.095071 PCI: 00:1d.0 init finished in 5283 usecs
1569 06:52:59.098291 PCI: 00:1f.0 init ...
1570 06:52:59.101528 IOAPIC: Initializing IOAPIC at 0xfec00000
1571 06:52:59.108747 IOAPIC: Bootstrap Processor Local APIC = 0x00
1572 06:52:59.109196 IOAPIC: ID = 0x02
1573 06:52:59.111765 IOAPIC: Dumping registers
1574 06:52:59.115446 reg 0x0000: 0x02000000
1575 06:52:59.115899 reg 0x0001: 0x00770020
1576 06:52:59.118179
1577 06:52:59.118628 reg 0x0002: 0x00000000
1578 06:52:59.125045 PCI: 00:1f.0 init finished in 23536 usecs
1579 06:52:59.128583 PCI: 00:1f.4 init ...
1580 06:52:59.131560 PCI: 00:1f.4 init finished in 2263 usecs
1581 06:52:59.142428 PCI: 01:00.0 init ...
1582 06:52:59.145067 PCI: 01:00.0 init finished in 2252 usecs
1583 06:52:59.149522 PNP: 0c09.0 init ...
1584 06:52:59.153071 Google Chrome EC uptime: 11.092 seconds
1585 06:52:59.159729 Google Chrome AP resets since EC boot: 0
1586 06:52:59.163072 Google Chrome most recent AP reset causes:
1587 06:52:59.169764 Google Chrome EC reset flags at last EC boot: reset-pin
1588 06:52:59.172705 PNP: 0c09.0 init finished in 20566 usecs
1589 06:52:59.175976 Devices initialized
1590 06:52:59.176423 Show all devs... After init.
1591 06:52:59.179250 Root Device: enabled 1
1592 06:52:59.182978 CPU_CLUSTER: 0: enabled 1
1593 06:52:59.185981 DOMAIN: 0000: enabled 1
1594 06:52:59.186430 APIC: 00: enabled 1
1595 06:52:59.189240 PCI: 00:00.0: enabled 1
1596 06:52:59.192388 PCI: 00:02.0: enabled 1
1597 06:52:59.196124 PCI: 00:04.0: enabled 0
1598 06:52:59.196576 PCI: 00:05.0: enabled 0
1599 06:52:59.199136 PCI: 00:12.0: enabled 1
1600 06:52:59.202507 PCI: 00:12.5: enabled 0
1601 06:52:59.202986 PCI: 00:12.6: enabled 0
1602 06:52:59.205849 PCI: 00:14.0: enabled 1
1603 06:52:59.209130 PCI: 00:14.1: enabled 0
1604 06:52:59.212572 PCI: 00:14.3: enabled 1
1605 06:52:59.213036 PCI: 00:14.5: enabled 0
1606 06:52:59.216187 PCI: 00:15.0: enabled 1
1607 06:52:59.218966 PCI: 00:15.1: enabled 1
1608 06:52:59.222603 PCI: 00:15.2: enabled 0
1609 06:52:59.223052 PCI: 00:15.3: enabled 0
1610 06:52:59.225986 PCI: 00:16.0: enabled 1
1611 06:52:59.229224 PCI: 00:16.1: enabled 0
1612 06:52:59.232299 PCI: 00:16.2: enabled 0
1613 06:52:59.232750 PCI: 00:16.3: enabled 0
1614 06:52:59.235742 PCI: 00:16.4: enabled 0
1615 06:52:59.238879 PCI: 00:16.5: enabled 0
1616 06:52:59.239328 PCI: 00:17.0: enabled 1
1617 06:52:59.242305
1618 06:52:59.242755 PCI: 00:19.0: enabled 1
1619 06:52:59.245301 PCI: 00:19.1: enabled 0
1620 06:52:59.248707 PCI: 00:19.2: enabled 0
1621 06:52:59.249265 PCI: 00:1a.0: enabled 0
1622 06:52:59.252081 PCI: 00:1c.0: enabled 0
1623 06:52:59.255651 PCI: 00:1c.1: enabled 0
1624 06:52:59.258668 PCI: 00:1c.2: enabled 0
1625 06:52:59.259118 PCI: 00:1c.3: enabled 0
1626 06:52:59.261922 PCI: 00:1c.4: enabled 0
1627 06:52:59.265576 PCI: 00:1c.5: enabled 0
1628 06:52:59.268489 PCI: 00:1c.6: enabled 0
1629 06:52:59.268936 PCI: 00:1c.7: enabled 0
1630 06:52:59.271946 PCI: 00:1d.0: enabled 1
1631 06:52:59.275106 PCI: 00:1d.1: enabled 0
1632 06:52:59.278539 PCI: 00:1d.2: enabled 0
1633 06:52:59.279048 PCI: 00:1d.3: enabled 0
1634 06:52:59.281929 PCI: 00:1d.4: enabled 0
1635 06:52:59.285056 PCI: 00:1d.5: enabled 0
1636 06:52:59.285533 PCI: 00:1e.0: enabled 1
1637 06:52:59.288580 PCI: 00:1e.1: enabled 0
1638 06:52:59.292213 PCI: 00:1e.2: enabled 1
1639 06:52:59.294971 PCI: 00:1e.3: enabled 1
1640 06:52:59.295418 PCI: 00:1f.0: enabled 1
1641 06:52:59.298476 PCI: 00:1f.1: enabled 0
1642 06:52:59.301833 PCI: 00:1f.2: enabled 0
1643 06:52:59.305139 PCI: 00:1f.3: enabled 1
1644 06:52:59.305623 PCI: 00:1f.4: enabled 1
1645 06:52:59.308334 PCI: 00:1f.5: enabled 1
1646 06:52:59.311613 PCI: 00:1f.6: enabled 0
1647 06:52:59.314999 USB0 port 0: enabled 1
1648 06:52:59.315446 I2C: 01:15: enabled 1
1649 06:52:59.318261 I2C: 02:5d: enabled 1
1650 06:52:59.321907 GENERIC: 0.0: enabled 1
1651 06:52:59.322381 I2C: 03:1a: enabled 1
1652 06:52:59.325022 I2C: 03:38: enabled 1
1653 06:52:59.328007 I2C: 03:39: enabled 1
1654 06:52:59.328454 I2C: 03:3a: enabled 1
1655 06:52:59.331480 I2C: 03:3b: enabled 1
1656 06:52:59.334809 PCI: 00:00.0: enabled 1
1657 06:52:59.335408 SPI: 00: enabled 1
1658 06:52:59.337931 SPI: 01: enabled 1
1659 06:52:59.341588 PNP: 0c09.0: enabled 1
1660 06:52:59.342030 USB2 port 0: enabled 1
1661 06:52:59.344619 USB2 port 1: enabled 1
1662 06:52:59.348016 USB2 port 2: enabled 0
1663 06:52:59.348566 USB2 port 3: enabled 0
1664 06:52:59.351238 USB2 port 5: enabled 0
1665 06:52:59.354675 USB2 port 6: enabled 1
1666 06:52:59.357785 USB2 port 9: enabled 1
1667 06:52:59.358226 USB3 port 0: enabled 1
1668 06:52:59.361299 USB3 port 1: enabled 1
1669 06:52:59.364695 USB3 port 2: enabled 1
1670 06:52:59.365135 USB3 port 3: enabled 1
1671 06:52:59.367752 USB3 port 4: enabled 0
1672 06:52:59.371440 APIC: 02: enabled 1
1673 06:52:59.371906 APIC: 01: enabled 1
1674 06:52:59.374613 APIC: 03: enabled 1
1675 06:52:59.377779 APIC: 04: enabled 1
1676 06:52:59.378285 APIC: 05: enabled 1
1677 06:52:59.381293 APIC: 07: enabled 1
1678 06:52:59.381762 APIC: 06: enabled 1
1679 06:52:59.384460 PCI: 00:08.0: enabled 1
1680 06:52:59.387855 PCI: 00:14.2: enabled 1
1681 06:52:59.390776 PCI: 01:00.0: enabled 1
1682 06:52:59.394693 Disabling ACPI via APMC:
1683 06:52:59.395163 done.
1684 06:52:59.401212 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1685 06:52:59.404522 ELOG: NV offset 0xaf0000 size 0x4000
1686 06:52:59.411221 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1687 06:52:59.417429 ELOG: Event(17) added with size 13 at 2023-01-10 06:52:58 UTC
1688 06:52:59.424108 ELOG: Event(92) added with size 9 at 2023-01-10 06:52:58 UTC
1689 06:52:59.431060 ELOG: Event(93) added with size 9 at 2023-01-10 06:52:58 UTC
1690 06:52:59.437445 ELOG: Event(9A) added with size 9 at 2023-01-10 06:52:58 UTC
1691 06:52:59.444426 ELOG: Event(9E) added with size 10 at 2023-01-10 06:52:58 UTC
1692 06:52:59.451155 ELOG: Event(9F) added with size 14 at 2023-01-10 06:52:58 UTC
1693 06:52:59.454038 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1694 06:52:59.461345 ELOG: Event(A1) added with size 10 at 2023-01-10 06:52:58 UTC
1695 06:52:59.471368 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1696 06:52:59.477601 ELOG: Event(A0) added with size 9 at 2023-01-10 06:52:58 UTC
1697 06:52:59.481213 elog_add_boot_reason: Logged dev mode boot
1698 06:52:59.481688 Finalize devices...
1699 06:52:59.484192
1700 06:52:59.484638 PCI: 00:17.0 final
1701 06:52:59.487743 Devices finalized
1702 06:52:59.491109 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1703 06:52:59.497970 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1704 06:52:59.501010 ME: HFSTS1 : 0x90000245
1705 06:52:59.504246 ME: HFSTS2 : 0x3B850126
1706 06:52:59.511029 ME: HFSTS3 : 0x00000020
1707 06:52:59.514237 ME: HFSTS4 : 0x00004800
1708 06:52:59.517439 ME: HFSTS5 : 0x00000000
1709 06:52:59.520751 ME: HFSTS6 : 0x40400006
1710 06:52:59.524418 ME: Manufacturing Mode : NO
1711 06:52:59.527412 ME: FW Partition Table : OK
1712 06:52:59.530865 ME: Bringup Loader Failure : NO
1713 06:52:59.533956 ME: Firmware Init Complete : YES
1714 06:52:59.537056 ME: Boot Options Present : NO
1715 06:52:59.541106 ME: Update In Progress : NO
1716 06:52:59.543988 ME: D0i3 Support : YES
1717 06:52:59.546932 ME: Low Power State Enabled : NO
1718 06:52:59.550446 ME: CPU Replaced : NO
1719 06:52:59.553864 ME: CPU Replacement Valid : YES
1720 06:52:59.556946 ME: Current Working State : 5
1721 06:52:59.560356 ME: Current Operation State : 1
1722 06:52:59.563919 ME: Current Operation Mode : 0
1723 06:52:59.567000 ME: Error Code : 0
1724 06:52:59.570392 ME: CPU Debug Disabled : YES
1725 06:52:59.573577 ME: TXT Support : NO
1726 06:52:59.581216 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1727 06:52:59.583999 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1728 06:52:59.587163
1729 06:52:59.587624 CBFS @ c08000 size 3f8000
1730 06:52:59.593596 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1731 06:52:59.596915 CBFS: Locating 'fallback/dsdt.aml'
1732 06:52:59.600279 CBFS: Found @ offset 10bb80 size 3fa5
1733 06:52:59.606659 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1734 06:52:59.610335 CBFS @ c08000 size 3f8000
1735 06:52:59.613597 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1736 06:52:59.616611 CBFS: Locating 'fallback/slic'
1737 06:52:59.621957 CBFS: 'fallback/slic' not found.
1738 06:52:59.628680 ACPI: Writing ACPI tables at 99b3e000.
1739 06:52:59.629122 ACPI: * FACS
1740 06:52:59.631602 ACPI: * DSDT
1741 06:52:59.635035 Ramoops buffer: 0x100000@0x99a3d000.
1742 06:52:59.638468 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1743 06:52:59.644799 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1744 06:52:59.648538 Google Chrome EC: version:
1745 06:52:59.651737 ro: helios_v2.0.2659-56403530b
1746 06:52:59.654864 rw: helios_v2.0.2849-c41de27e7d
1747 06:52:59.655250 running image: 1
1748 06:52:59.659154 ACPI: * FADT
1749 06:52:59.659587 SCI is IRQ9
1750 06:52:59.662320 ACPI: added table 1/32, length now 40
1751 06:52:59.665980
1752 06:52:59.666362 ACPI: * SSDT
1753 06:52:59.668840 Found 1 CPU(s) with 8 core(s) each.
1754 06:52:59.672529 Error: Could not locate 'wifi_sar' in VPD.
1755 06:52:59.678856 Checking CBFS for default SAR values
1756 06:52:59.681915 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1757 06:52:59.685632 CBFS @ c08000 size 3f8000
1758 06:52:59.691929 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1759 06:52:59.695371 CBFS: Locating 'wifi_sar_defaults.hex'
1760 06:52:59.698503 CBFS: Found @ offset 5fac0 size 77
1761 06:52:59.702016 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1762 06:52:59.708589 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1763 06:52:59.712252 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1764 06:52:59.718911 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1765 06:52:59.722226 failed to find key in VPD: dsm_calib_r0_0
1766 06:52:59.731917 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1767 06:52:59.734921 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1768 06:52:59.738507 failed to find key in VPD: dsm_calib_r0_1
1769 06:52:59.748567 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1770 06:52:59.755108 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1771 06:52:59.758576 failed to find key in VPD: dsm_calib_r0_2
1772 06:52:59.768296 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1773 06:52:59.771893 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1774 06:52:59.778516 failed to find key in VPD: dsm_calib_r0_3
1775 06:52:59.784572 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1776 06:52:59.791325 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1777 06:52:59.794448 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1778 06:52:59.797916 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1779 06:52:59.802037 EC returned error result code 1
1780 06:52:59.805873 EC returned error result code 1
1781 06:52:59.809683 EC returned error result code 1
1782 06:52:59.816506 PS2K: Bad resp from EC. Vivaldi disabled!
1783 06:52:59.820150 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1784 06:52:59.826427 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1785 06:52:59.832634 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1786 06:52:59.836579 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1787 06:52:59.842530 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1788 06:52:59.849082 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1789 06:52:59.852609 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1790 06:52:59.855632
1791 06:52:59.859233 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1792 06:52:59.862535 ACPI: added table 2/32, length now 44
1793 06:52:59.865715 ACPI: * MCFG
1794 06:52:59.869296 ACPI: added table 3/32, length now 48
1795 06:52:59.872887 ACPI: * TPM2
1796 06:52:59.873328 TPM2 log created at 99a2d000
1797 06:52:59.875869
1798 06:52:59.879003 ACPI: added table 4/32, length now 52
1799 06:52:59.879445 ACPI: * MADT
1800 06:52:59.882255 SCI is IRQ9
1801 06:52:59.885564 ACPI: added table 5/32, length now 56
1802 06:52:59.886007 current = 99b43ac0
1803 06:52:59.888905 ACPI: * DMAR
1804 06:52:59.892365 ACPI: added table 6/32, length now 60
1805 06:52:59.895531 ACPI: * IGD OpRegion
1806 06:52:59.895971 GMA: Found VBT in CBFS
1807 06:52:59.899179 GMA: Found valid VBT in CBFS
1808 06:52:59.902051 ACPI: added table 7/32, length now 64
1809 06:52:59.905533 ACPI: * HPET
1810 06:52:59.908981 ACPI: added table 8/32, length now 68
1811 06:52:59.909422 ACPI: done.
1812 06:52:59.912425 ACPI tables: 31744 bytes.
1813 06:52:59.915784 smbios_write_tables: 99a2c000
1814 06:52:59.919624 EC returned error result code 3
1815 06:52:59.922550 Couldn't obtain OEM name from CBI
1816 06:52:59.925741 Create SMBIOS type 17
1817 06:52:59.929523 PCI: 00:00.0 (Intel Cannonlake)
1818 06:52:59.932420 PCI: 00:14.3 (Intel WiFi)
1819 06:52:59.935947 SMBIOS tables: 939 bytes.
1820 06:52:59.939431 Writing table forward entry at 0x00000500
1821 06:52:59.945931 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1822 06:52:59.949338 Writing coreboot table at 0x99b62000
1823 06:52:59.955640 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1824 06:52:59.959085 1. 0000000000001000-000000000009ffff: RAM
1825 06:52:59.962530 2. 00000000000a0000-00000000000fffff: RESERVED
1826 06:52:59.969175 3. 0000000000100000-0000000099a2bfff: RAM
1827 06:52:59.972037 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1828 06:52:59.978762 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1829 06:52:59.985537 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1830 06:52:59.988762 7. 000000009a000000-000000009f7fffff: RESERVED
1831 06:52:59.995228 8. 00000000e0000000-00000000efffffff: RESERVED
1832 06:52:59.998386 9. 00000000fc000000-00000000fc000fff: RESERVED
1833 06:53:00.001731 10. 00000000fe000000-00000000fe00ffff: RESERVED
1834 06:53:00.008478 11. 00000000fed10000-00000000fed17fff: RESERVED
1835 06:53:00.011691 12. 00000000fed80000-00000000fed83fff: RESERVED
1836 06:53:00.018404 13. 00000000fed90000-00000000fed91fff: RESERVED
1837 06:53:00.021705 14. 00000000feda0000-00000000feda1fff: RESERVED
1838 06:53:00.025421 15. 0000000100000000-000000045e7fffff: RAM
1839 06:53:00.031435 Graphics framebuffer located at 0xc0000000
1840 06:53:00.034820 Passing 5 GPIOs to payload:
1841 06:53:00.038159 NAME | PORT | POLARITY | VALUE
1842 06:53:00.044726 write protect | undefined | high | low
1843 06:53:00.048304 lid | undefined | high | high
1844 06:53:00.054917 power | undefined | high | low
1845 06:53:00.061284 oprom | undefined | high | low
1846 06:53:00.064688 EC in RW | 0x000000cb | high | low
1847 06:53:00.067759 Board ID: 4
1848 06:53:00.071437 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1849 06:53:00.074493 CBFS @ c08000 size 3f8000
1850 06:53:00.081051 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1851 06:53:00.084902 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1852 06:53:00.088117 coreboot table: 1492 bytes.
1853 06:53:00.091333 IMD ROOT 0. 99fff000 00001000
1854 06:53:00.094496 IMD SMALL 1. 99ffe000 00001000
1855 06:53:00.097861 FSP MEMORY 2. 99c4e000 003b0000
1856 06:53:00.101023 CONSOLE 3. 99c2e000 00020000
1857 06:53:00.105014 FMAP 4. 99c2d000 0000054e
1858 06:53:00.108071 TIME STAMP 5. 99c2c000 00000910
1859 06:53:00.111129 VBOOT WORK 6. 99c18000 00014000
1860 06:53:00.114784 MRC DATA 7. 99c16000 00001958
1861 06:53:00.117762 ROMSTG STCK 8. 99c15000 00001000
1862 06:53:00.121128 AFTER CAR 9. 99c0b000 0000a000
1863 06:53:00.124390 RAMSTAGE 10. 99baf000 0005c000
1864 06:53:00.127993 REFCODE 11. 99b7a000 00035000
1865 06:53:00.131300 SMM BACKUP 12. 99b6a000 00010000
1866 06:53:00.134793 COREBOOT 13. 99b62000 00008000
1867 06:53:00.137961 ACPI 14. 99b3e000 00024000
1868 06:53:00.141261 ACPI GNVS 15. 99b3d000 00001000
1869 06:53:00.144442 RAMOOPS 16. 99a3d000 00100000
1870 06:53:00.147926 TPM2 TCGLOG17. 99a2d000 00010000
1871 06:53:00.151289 SMBIOS 18. 99a2c000 00000800
1872 06:53:00.154859 IMD small region:
1873 06:53:00.158121 IMD ROOT 0. 99ffec00 00000400
1874 06:53:00.161308 FSP RUNTIME 1. 99ffebe0 00000004
1875 06:53:00.164455 EC HOSTEVENT 2. 99ffebc0 00000008
1876 06:53:00.168165 POWER STATE 3. 99ffeb80 00000040
1877 06:53:00.171078 ROMSTAGE 4. 99ffeb60 00000004
1878 06:53:00.174258 MEM INFO 5. 99ffe9a0 000001b9
1879 06:53:00.177736 VPD 6. 99ffe920 0000006c
1880 06:53:00.181092 MTRR: Physical address space:
1881 06:53:00.187891 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1882 06:53:00.194440 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1883 06:53:00.200772 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1884 06:53:00.207609 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1885 06:53:00.214145 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1886 06:53:00.220363 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1887 06:53:00.224162 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1888 06:53:00.230505 MTRR: Fixed MSR 0x250 0x0606060606060606
1889 06:53:00.233553 MTRR: Fixed MSR 0x258 0x0606060606060606
1890 06:53:00.236841 MTRR: Fixed MSR 0x259 0x0000000000000000
1891 06:53:00.240302 MTRR: Fixed MSR 0x268 0x0606060606060606
1892 06:53:00.247003 MTRR: Fixed MSR 0x269 0x0606060606060606
1893 06:53:00.250062 MTRR: Fixed MSR 0x26a 0x0606060606060606
1894 06:53:00.253364 MTRR: Fixed MSR 0x26b 0x0606060606060606
1895 06:53:00.256614 MTRR: Fixed MSR 0x26c 0x0606060606060606
1896 06:53:00.263538 MTRR: Fixed MSR 0x26d 0x0606060606060606
1897 06:53:00.266959 MTRR: Fixed MSR 0x26e 0x0606060606060606
1898 06:53:00.270165 MTRR: Fixed MSR 0x26f 0x0606060606060606
1899 06:53:00.273753 call enable_fixed_mtrr()
1900 06:53:00.276974 CPU physical address size: 39 bits
1901 06:53:00.280217 MTRR: default type WB/UC MTRR counts: 6/8.
1902 06:53:00.283667 MTRR: WB selected as default type.
1903 06:53:00.286751
1904 06:53:00.289663 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1905 06:53:00.296239 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1906 06:53:00.303004 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1907 06:53:00.309775 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1908 06:53:00.316529 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1909 06:53:00.323077 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1910 06:53:00.326623 MTRR: Fixed MSR 0x250 0x0606060606060606
1911 06:53:00.332910 MTRR: Fixed MSR 0x258 0x0606060606060606
1912 06:53:00.336210 MTRR: Fixed MSR 0x259 0x0000000000000000
1913 06:53:00.339636 MTRR: Fixed MSR 0x268 0x0606060606060606
1914 06:53:00.342625 MTRR: Fixed MSR 0x269 0x0606060606060606
1915 06:53:00.346279 MTRR: Fixed MSR 0x26a 0x0606060606060606
1916 06:53:00.349506
1917 06:53:00.352578 MTRR: Fixed MSR 0x26b 0x0606060606060606
1918 06:53:00.356229 MTRR: Fixed MSR 0x26c 0x0606060606060606
1919 06:53:00.359502 MTRR: Fixed MSR 0x26d 0x0606060606060606
1920 06:53:00.362800 MTRR: Fixed MSR 0x26e 0x0606060606060606
1921 06:53:00.369259 MTRR: Fixed MSR 0x26f 0x0606060606060606
1922 06:53:00.369750
1923 06:53:00.370109 MTRR check
1924 06:53:00.372528 Fixed MTRRs : Enabled
1925 06:53:00.376074 Variable MTRRs: Enabled
1926 06:53:00.376522
1927 06:53:00.376880 call enable_fixed_mtrr()
1928 06:53:00.379553
1929 06:53:00.382656 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1930 06:53:00.385602 CPU physical address size: 39 bits
1931 06:53:00.392416 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1932 06:53:00.395655 MTRR: Fixed MSR 0x250 0x0606060606060606
1933 06:53:00.398957 MTRR: Fixed MSR 0x250 0x0606060606060606
1934 06:53:00.402688 MTRR: Fixed MSR 0x258 0x0606060606060606
1935 06:53:00.405806
1936 06:53:00.409186 MTRR: Fixed MSR 0x259 0x0000000000000000
1937 06:53:00.412225 MTRR: Fixed MSR 0x268 0x0606060606060606
1938 06:53:00.415633 MTRR: Fixed MSR 0x269 0x0606060606060606
1939 06:53:00.419122 MTRR: Fixed MSR 0x26a 0x0606060606060606
1940 06:53:00.425462 MTRR: Fixed MSR 0x26b 0x0606060606060606
1941 06:53:00.428709 MTRR: Fixed MSR 0x26c 0x0606060606060606
1942 06:53:00.432259 MTRR: Fixed MSR 0x26d 0x0606060606060606
1943 06:53:00.435604 MTRR: Fixed MSR 0x26e 0x0606060606060606
1944 06:53:00.442001 MTRR: Fixed MSR 0x26f 0x0606060606060606
1945 06:53:00.445350 MTRR: Fixed MSR 0x258 0x0606060606060606
1946 06:53:00.449184 call enable_fixed_mtrr()
1947 06:53:00.451645 MTRR: Fixed MSR 0x259 0x0000000000000000
1948 06:53:00.455507 MTRR: Fixed MSR 0x268 0x0606060606060606
1949 06:53:00.458749 MTRR: Fixed MSR 0x269 0x0606060606060606
1950 06:53:00.465866 MTRR: Fixed MSR 0x26a 0x0606060606060606
1951 06:53:00.468351 MTRR: Fixed MSR 0x26b 0x0606060606060606
1952 06:53:00.471731 MTRR: Fixed MSR 0x26c 0x0606060606060606
1953 06:53:00.475295 MTRR: Fixed MSR 0x26d 0x0606060606060606
1954 06:53:00.481465 MTRR: Fixed MSR 0x26e 0x0606060606060606
1955 06:53:00.485185 MTRR: Fixed MSR 0x26f 0x0606060606060606
1956 06:53:00.488106 CPU physical address size: 39 bits
1957 06:53:00.491821 call enable_fixed_mtrr()
1958 06:53:00.495056 MTRR: Fixed MSR 0x250 0x0606060606060606
1959 06:53:00.498644 MTRR: Fixed MSR 0x250 0x0606060606060606
1960 06:53:00.504941 MTRR: Fixed MSR 0x258 0x0606060606060606
1961 06:53:00.508265 MTRR: Fixed MSR 0x259 0x0000000000000000
1962 06:53:00.511957 MTRR: Fixed MSR 0x268 0x0606060606060606
1963 06:53:00.514883 MTRR: Fixed MSR 0x269 0x0606060606060606
1964 06:53:00.521556 MTRR: Fixed MSR 0x26a 0x0606060606060606
1965 06:53:00.524873 MTRR: Fixed MSR 0x26b 0x0606060606060606
1966 06:53:00.528102 MTRR: Fixed MSR 0x26c 0x0606060606060606
1967 06:53:00.531806 MTRR: Fixed MSR 0x26d 0x0606060606060606
1968 06:53:00.534632 MTRR: Fixed MSR 0x26e 0x0606060606060606
1969 06:53:00.541299 MTRR: Fixed MSR 0x26f 0x0606060606060606
1970 06:53:00.544696 MTRR: Fixed MSR 0x258 0x0606060606060606
1971 06:53:00.548120 call enable_fixed_mtrr()
1972 06:53:00.550895 MTRR: Fixed MSR 0x259 0x0000000000000000
1973 06:53:00.554338 MTRR: Fixed MSR 0x268 0x0606060606060606
1974 06:53:00.557449 MTRR: Fixed MSR 0x269 0x0606060606060606
1975 06:53:00.560871
1976 06:53:00.564276 MTRR: Fixed MSR 0x26a 0x0606060606060606
1977 06:53:00.567632 MTRR: Fixed MSR 0x26b 0x0606060606060606
1978 06:53:00.571124 MTRR: Fixed MSR 0x26c 0x0606060606060606
1979 06:53:00.574221 MTRR: Fixed MSR 0x26d 0x0606060606060606
1980 06:53:00.581184 MTRR: Fixed MSR 0x26e 0x0606060606060606
1981 06:53:00.584211 MTRR: Fixed MSR 0x26f 0x0606060606060606
1982 06:53:00.587825 CPU physical address size: 39 bits
1983 06:53:00.590919 call enable_fixed_mtrr()
1984 06:53:00.594201 MTRR: Fixed MSR 0x250 0x0606060606060606
1985 06:53:00.597873 MTRR: Fixed MSR 0x250 0x0606060606060606
1986 06:53:00.603878 MTRR: Fixed MSR 0x258 0x0606060606060606
1987 06:53:00.607536 MTRR: Fixed MSR 0x259 0x0000000000000000
1988 06:53:00.611002 MTRR: Fixed MSR 0x268 0x0606060606060606
1989 06:53:00.613937 MTRR: Fixed MSR 0x269 0x0606060606060606
1990 06:53:00.620738 MTRR: Fixed MSR 0x26a 0x0606060606060606
1991 06:53:00.623813 MTRR: Fixed MSR 0x26b 0x0606060606060606
1992 06:53:00.627126 MTRR: Fixed MSR 0x26c 0x0606060606060606
1993 06:53:00.630655 MTRR: Fixed MSR 0x26d 0x0606060606060606
1994 06:53:00.637329 MTRR: Fixed MSR 0x26e 0x0606060606060606
1995 06:53:00.640535 MTRR: Fixed MSR 0x26f 0x0606060606060606
1996 06:53:00.643902 MTRR: Fixed MSR 0x258 0x0606060606060606
1997 06:53:00.646888 call enable_fixed_mtrr()
1998 06:53:00.650668 MTRR: Fixed MSR 0x259 0x0000000000000000
1999 06:53:00.654007 MTRR: Fixed MSR 0x268 0x0606060606060606
2000 06:53:00.660131 MTRR: Fixed MSR 0x269 0x0606060606060606
2001 06:53:00.663707 MTRR: Fixed MSR 0x26a 0x0606060606060606
2002 06:53:00.666603 MTRR: Fixed MSR 0x26b 0x0606060606060606
2003 06:53:00.670043 MTRR: Fixed MSR 0x26c 0x0606060606060606
2004 06:53:00.677113 MTRR: Fixed MSR 0x26d 0x0606060606060606
2005 06:53:00.680197 MTRR: Fixed MSR 0x26e 0x0606060606060606
2006 06:53:00.683580 MTRR: Fixed MSR 0x26f 0x0606060606060606
2007 06:53:00.686840 CPU physical address size: 39 bits
2008 06:53:00.690084 CPU physical address size: 39 bits
2009 06:53:00.693274 call enable_fixed_mtrr()
2010 06:53:00.696503 CPU physical address size: 39 bits
2011 06:53:00.699889 CBFS @ c08000 size 3f8000
2012 06:53:00.706513 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
2013 06:53:00.710232 CBFS: Locating 'fallback/payload'
2014 06:53:00.713379 CPU physical address size: 39 bits
2015 06:53:00.716492 CBFS: Found @ offset 1c96c0 size 3f798
2016 06:53:00.719902 Checking segment from ROM address 0xffdd16f8
2017 06:53:00.723246 Checking segment from ROM address 0xffdd1714
2018 06:53:00.726593
2019 06:53:00.729714 Loading segment from ROM address 0xffdd16f8
2020 06:53:00.733329 code (compression=0)
2021 06:53:00.739580 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2022 06:53:00.749571 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2023 06:53:00.750030 it's not compressed!
2024 06:53:00.843026 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2025 06:53:00.849785 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2026 06:53:00.852942 Loading segment from ROM address 0xffdd1714
2027 06:53:00.856206 Entry Point 0x30000000
2028 06:53:00.859714 Loaded segments
2029 06:53:00.865123 Finalizing chipset.
2030 06:53:00.868385 Finalizing SMM.
2031 06:53:00.871713 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2032 06:53:00.875035 mp_park_aps done after 0 msecs.
2033 06:53:00.881525 Jumping to boot code at 30000000(99b62000)
2034 06:53:00.888605 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2035 06:53:00.889184
2036 06:53:00.889754
2037 06:53:00.890254
2038 06:53:00.891622 Starting depthcharge on Helios...
2039 06:53:00.892170
2040 06:53:00.893445 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
2041 06:53:00.894165 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2042 06:53:00.894730 Setting prompt string to ['hatch:']
2043 06:53:00.895301 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
2044 06:53:00.901419 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2045 06:53:00.902005
2046 06:53:00.908394 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2047 06:53:00.908881
2048 06:53:00.914850 board_setup: Info: eMMC controller not present; skipping
2049 06:53:00.915378
2050 06:53:00.918064 New NVMe Controller 0x30053ac0 @ 00:1d:00
2051 06:53:00.918571
2052 06:53:00.924926 board_setup: Info: SDHCI controller not present; skipping
2053 06:53:00.925411
2054 06:53:00.931457 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2055 06:53:00.931946
2056 06:53:00.932329 Wipe memory regions:
2057 06:53:00.932697
2058 06:53:00.934643 [0x00000000001000, 0x000000000a0000)
2059 06:53:00.935079
2060 06:53:00.938080 [0x00000000100000, 0x00000030000000)
2061 06:53:00.938515
2062 06:53:01.006993 [0x00000030657430, 0x00000099a2c000)
2063 06:53:01.007095
2064 06:53:01.148075 [0x00000100000000, 0x0000045e800000)
2065 06:53:01.148655
2066 06:53:02.530975 R8152: Initializing
2067 06:53:02.531568
2068 06:53:02.534128 Version 9 (ocp_data = 6010)
2069 06:53:02.534610
2070 06:53:02.538226 R8152: Done initializing
2071 06:53:02.538712
2072 06:53:02.541640 Adding net device
2073 06:53:02.542121
2074 06:53:03.150906 R8152: Initializing
2075 06:53:03.151086
2076 06:53:03.154302 Version 6 (ocp_data = 5c30)
2077 06:53:03.154402
2078 06:53:03.157066 R8152: Done initializing
2079 06:53:03.157167
2080 06:53:03.160583 net_add_device: Attemp to include the same device
2081 06:53:03.164070
2082 06:53:03.171558 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2083 06:53:03.171693
2084 06:53:03.171798
2085 06:53:03.171895
2086 06:53:03.172233 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2088 06:53:03.273327 hatch: tftpboot 192.168.201.1 8649814/tftp-deploy-6vp9iawg/kernel/bzImage 8649814/tftp-deploy-6vp9iawg/kernel/cmdline 8649814/tftp-deploy-6vp9iawg/ramdisk/ramdisk.cpio.gz
2089 06:53:03.274023 Setting prompt string to 'Starting kernel'
2090 06:53:03.274430 Setting prompt string to ['Starting kernel']
2091 06:53:03.274805 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2092 06:53:03.275206 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2093 06:53:03.278499 tftpboot 192.168.201.1 8649814/tftp-deploy-6vp9iawg/kernel/bzImy-6vp9iawg/kernel/cmdline 8649814/tftp-deploy-6vp9iawg/ramdisk/ramdisk.cpio.gz
2094 06:53:03.278760
2095 06:53:03.278825 Waiting for link
2096 06:53:03.278886
2097 06:53:03.479873 done.
2098 06:53:03.480454
2099 06:53:03.480845 MAC: 00:24:32:50:1a:5f
2100 06:53:03.481206
2101 06:53:03.482666 Sending DHCP discover... done.
2102 06:53:03.483148
2103 06:53:03.486154 Waiting for reply... done.
2104 06:53:03.486641
2105 06:53:03.489545 Sending DHCP request... done.
2106 06:53:03.490032
2107 06:53:03.496261 Waiting for reply... done.
2108 06:53:03.496855
2109 06:53:03.497248 My ip is 192.168.201.21
2110 06:53:03.497664
2111 06:53:03.499545 The DHCP server ip is 192.168.201.1
2112 06:53:03.502643
2113 06:53:03.506214 TFTP server IP predefined by user: 192.168.201.1
2114 06:53:03.506811
2115 06:53:03.512810 Bootfile predefined by user: 8649814/tftp-deploy-6vp9iawg/kernel/bzImage
2116 06:53:03.513447
2117 06:53:03.516192 Sending tftp read request... done.
2118 06:53:03.516785
2119 06:53:03.523126 Waiting for the transfer...
2120 06:53:03.523774
2121 06:53:04.189217 00000000 ################################################################
2122 06:53:04.189844
2123 06:53:04.862401 00080000 ################################################################
2124 06:53:04.863014
2125 06:53:05.550132 00100000 ################################################################
2126 06:53:05.550670
2127 06:53:06.227469 00180000 ################################################################
2128 06:53:06.228075
2129 06:53:06.900693 00200000 ################################################################
2130 06:53:06.901226
2131 06:53:07.583647 00280000 ################################################################
2132 06:53:07.584231
2133 06:53:08.257285 00300000 ################################################################
2134 06:53:08.257459
2135 06:53:08.941108 00380000 ################################################################
2136 06:53:08.941731
2137 06:53:09.627218 00400000 ################################################################
2138 06:53:09.627764
2139 06:53:10.307327 00480000 ################################################################
2140 06:53:10.307939
2141 06:53:11.008211 00500000 ################################################################
2142 06:53:11.008743
2143 06:53:11.694770 00580000 ################################################################
2144 06:53:11.695396
2145 06:53:12.397534 00600000 ################################################################
2146 06:53:12.398120
2147 06:53:13.094796 00680000 ################################################################
2148 06:53:13.095493
2149 06:53:13.410657 00700000 ############################# done.
2150 06:53:13.411250
2151 06:53:13.413562 The bootfile was 7573392 bytes long.
2152 06:53:13.414053
2153 06:53:13.417176 Sending tftp read request... done.
2154 06:53:13.417693
2155 06:53:13.420519 Waiting for the transfer...
2156 06:53:13.421000
2157 06:53:14.101733 00000000 ################################################################
2158 06:53:14.102267
2159 06:53:14.750639 00080000 ################################################################
2160 06:53:14.750793
2161 06:53:15.374058 00100000 ################################################################
2162 06:53:15.374223
2163 06:53:16.050906 00180000 ################################################################
2164 06:53:16.051549
2165 06:53:16.736777 00200000 ################################################################
2166 06:53:16.737315
2167 06:53:17.425432 00280000 ################################################################
2168 06:53:17.426084
2169 06:53:18.103772 00300000 ################################################################
2170 06:53:18.104334
2171 06:53:18.782929 00380000 ################################################################
2172 06:53:18.783542
2173 06:53:19.456515 00400000 ################################################################
2174 06:53:19.457056
2175 06:53:20.143171 00480000 ################################################################
2176 06:53:20.143702
2177 06:53:20.431358 00500000 ################################ done.
2178 06:53:20.431509
2179 06:53:20.434441 Sending tftp read request... done.
2180 06:53:20.434523
2181 06:53:20.437643 Waiting for the transfer...
2182 06:53:20.437725
2183 06:53:20.437802 00000000 # done.
2184 06:53:20.437873
2185 06:53:20.447783 Command line loaded dynamically from TFTP file: 8649814/tftp-deploy-6vp9iawg/kernel/cmdline
2186 06:53:20.447887
2187 06:53:20.474009 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8649814/extract-nfsrootfs-nola8dvu,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2188 06:53:20.474120
2189 06:53:20.480916 ec_init(0): CrosEC protocol v3 supported (256, 256)
2190 06:53:20.481005
2191 06:53:20.487479 Shutting down all USB controllers.
2192 06:53:20.487567
2193 06:53:20.487636 Removing current net device
2194 06:53:20.487699
2195 06:53:20.494734 Finalizing coreboot
2196 06:53:20.494821
2197 06:53:20.501273 Exiting depthcharge with code 4 at timestamp: 26942830
2198 06:53:20.501363
2199 06:53:20.501432
2200 06:53:20.501537 Starting kernel ...
2201 06:53:20.501599
2202 06:53:20.501962 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2203 06:53:20.502062 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2204 06:53:20.502140 Setting prompt string to ['Linux version [0-9]']
2205 06:53:20.502213 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2206 06:53:20.502285 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2207 06:53:20.504633
2208 06:53:20.504720
2210 06:57:41.502309 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2212 06:57:41.502572 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2214 06:57:41.502770 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2217 06:57:41.503066 end: 2 depthcharge-action (duration 00:05:00) [common]
2219 06:57:41.503307 Cleaning after the job
2220 06:57:41.503405 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8649814/tftp-deploy-6vp9iawg/ramdisk
2221 06:57:41.503916 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8649814/tftp-deploy-6vp9iawg/kernel
2222 06:57:41.504504 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8649814/tftp-deploy-6vp9iawg/nfsrootfs
2223 06:57:41.556097 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8649814/tftp-deploy-6vp9iawg/modules
2224 06:57:41.556426 start: 4.1 power-off (timeout 00:00:30) [common]
2225 06:57:41.556600 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2226 06:57:41.577139 >> Command sent successfully.
2227 06:57:41.579057 Returned 0 in 0 seconds
2228 06:57:41.680216 end: 4.1 power-off (duration 00:00:00) [common]
2230 06:57:41.681768 start: 4.2 read-feedback (timeout 00:10:00) [common]
2231 06:57:41.682951 Listened to connection for namespace 'common' for up to 1s
2232 06:57:42.629193 Listened to connection for namespace 'common' for up to 1s
2233 06:57:42.632635 Listened to connection for namespace 'common' for up to 1s
2234 06:57:42.635674 Listened to connection for namespace 'common' for up to 1s
2235 06:57:42.639379 Listened to connection for namespace 'common' for up to 1s
2236 06:57:42.642787 Listened to connection for namespace 'common' for up to 1s
2237 06:57:42.645992 Listened to connection for namespace 'common' for up to 1s
2238 06:57:42.649343 Listened to connection for namespace 'common' for up to 1s
2239 06:57:42.652833 Listened to connection for namespace 'common' for up to 1s
2240 06:57:42.655808 Listened to connection for namespace 'common' for up to 1s
2241 06:57:42.659578 Listened to connection for namespace 'common' for up to 1s
2242 06:57:42.662811 Listened to connection for namespace 'common' for up to 1s
2243 06:57:42.666386 Listened to connection for namespace 'common' for up to 1s
2244 06:57:42.669520 Listened to connection for namespace 'common' for up to 1s
2245 06:57:42.673524 Listened to connection for namespace 'common' for up to 1s
2246 06:57:42.682530 Finalising connection for namespace 'common'
2247 06:57:42.682949 Disconnecting from shell: Finalise
2248 06:57:42.683237