Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 05:03:18.446097 lava-dispatcher, installed at version: 2022.11
2 05:03:18.446283 start: 0 validate
3 05:03:18.446414 Start time: 2023-01-18 05:03:18.446406+00:00 (UTC)
4 05:03:18.446539 Using caching service: 'http://localhost/cache/?uri=%s'
5 05:03:18.446669 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230114.0%2Famd64%2Finitrd.cpio.gz exists
6 05:03:18.735412 Using caching service: 'http://localhost/cache/?uri=%s'
7 05:03:18.736199 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-821-g39bdf0444b23%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 05:03:20.241303 Using caching service: 'http://localhost/cache/?uri=%s'
9 05:03:20.241461 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230114.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 05:03:20.527326 Using caching service: 'http://localhost/cache/?uri=%s'
11 05:03:20.527543 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-821-g39bdf0444b23%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 05:03:20.545200 validate duration: 2.10
14 05:03:20.546738 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 05:03:20.547431 start: 1.1 download-retry (timeout 00:10:00) [common]
16 05:03:20.547967 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 05:03:20.548461 Not decompressing ramdisk as can be used compressed.
18 05:03:20.548899 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230114.0/amd64/initrd.cpio.gz
19 05:03:20.549236 saving as /var/lib/lava/dispatcher/tmp/8767945/tftp-deploy-xy3qfto4/ramdisk/initrd.cpio.gz
20 05:03:20.549597 total size: 5432135 (5MB)
21 05:03:20.555935 progress 0% (0MB)
22 05:03:20.565072 progress 5% (0MB)
23 05:03:20.574004 progress 10% (0MB)
24 05:03:20.589820 progress 15% (0MB)
25 05:03:20.605313 progress 20% (1MB)
26 05:03:20.620662 progress 25% (1MB)
27 05:03:20.643724 progress 30% (1MB)
28 05:03:20.666534 progress 35% (1MB)
29 05:03:20.682952 progress 40% (2MB)
30 05:03:20.697422 progress 45% (2MB)
31 05:03:20.708678 progress 50% (2MB)
32 05:03:20.729989 progress 55% (2MB)
33 05:03:20.747253 progress 60% (3MB)
34 05:03:20.764658 progress 65% (3MB)
35 05:03:20.788715 progress 70% (3MB)
36 05:03:20.819473 progress 75% (3MB)
37 05:03:20.846808 progress 80% (4MB)
38 05:03:20.877284 progress 85% (4MB)
39 05:03:20.912693 progress 90% (4MB)
40 05:03:20.961364 progress 95% (4MB)
41 05:03:20.992883 progress 100% (5MB)
42 05:03:20.993224 5MB downloaded in 0.44s (11.68MB/s)
43 05:03:20.993389 end: 1.1.1 http-download (duration 00:00:00) [common]
45 05:03:20.993655 end: 1.1 download-retry (duration 00:00:00) [common]
46 05:03:20.993746 start: 1.2 download-retry (timeout 00:10:00) [common]
47 05:03:20.993834 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 05:03:20.993943 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-821-g39bdf0444b23/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 05:03:20.994011 saving as /var/lib/lava/dispatcher/tmp/8767945/tftp-deploy-xy3qfto4/kernel/bzImage
50 05:03:20.994073 total size: 7573392 (7MB)
51 05:03:20.994134 No compression specified
52 05:03:21.034566 progress 0% (0MB)
53 05:03:21.096663 progress 5% (0MB)
54 05:03:21.131806 progress 10% (0MB)
55 05:03:21.180158 progress 15% (1MB)
56 05:03:21.222557 progress 20% (1MB)
57 05:03:21.268506 progress 25% (1MB)
58 05:03:21.308050 progress 30% (2MB)
59 05:03:21.354709 progress 35% (2MB)
60 05:03:21.390809 progress 40% (2MB)
61 05:03:21.437123 progress 45% (3MB)
62 05:03:21.472453 progress 50% (3MB)
63 05:03:21.511881 progress 55% (4MB)
64 05:03:21.549265 progress 60% (4MB)
65 05:03:21.576611 progress 65% (4MB)
66 05:03:21.611989 progress 70% (5MB)
67 05:03:21.647512 progress 75% (5MB)
68 05:03:21.676072 progress 80% (5MB)
69 05:03:21.690086 progress 85% (6MB)
70 05:03:21.706699 progress 90% (6MB)
71 05:03:21.729173 progress 95% (6MB)
72 05:03:21.754062 progress 100% (7MB)
73 05:03:21.754304 7MB downloaded in 0.76s (9.50MB/s)
74 05:03:21.754468 end: 1.2.1 http-download (duration 00:00:01) [common]
76 05:03:21.754711 end: 1.2 download-retry (duration 00:00:01) [common]
77 05:03:21.754801 start: 1.3 download-retry (timeout 00:09:59) [common]
78 05:03:21.754889 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 05:03:21.754995 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230114.0/amd64/full.rootfs.tar.xz
80 05:03:21.755062 saving as /var/lib/lava/dispatcher/tmp/8767945/tftp-deploy-xy3qfto4/nfsrootfs/full.rootfs.tar
81 05:03:21.755124 total size: 133346544 (127MB)
82 05:03:21.755187 Using unxz to decompress xz
83 05:03:21.819861 progress 0% (0MB)
84 05:03:22.618195 progress 5% (6MB)
85 05:03:23.425001 progress 10% (12MB)
86 05:03:24.102333 progress 15% (19MB)
87 05:03:24.781652 progress 20% (25MB)
88 05:03:25.430074 progress 25% (31MB)
89 05:03:25.854262 progress 30% (38MB)
90 05:03:26.310344 progress 35% (44MB)
91 05:03:26.728791 progress 40% (50MB)
92 05:03:27.119940 progress 45% (57MB)
93 05:03:27.482245 progress 50% (63MB)
94 05:03:27.862512 progress 55% (69MB)
95 05:03:28.232511 progress 60% (76MB)
96 05:03:28.603083 progress 65% (82MB)
97 05:03:28.978423 progress 70% (89MB)
98 05:03:29.351869 progress 75% (95MB)
99 05:03:29.802197 progress 80% (101MB)
100 05:03:30.257982 progress 85% (108MB)
101 05:03:30.537297 progress 90% (114MB)
102 05:03:30.885356 progress 95% (120MB)
103 05:03:31.283927 progress 100% (127MB)
104 05:03:31.289491 127MB downloaded in 9.53s (13.34MB/s)
105 05:03:31.289799 end: 1.3.1 http-download (duration 00:00:10) [common]
107 05:03:31.290073 end: 1.3 download-retry (duration 00:00:10) [common]
108 05:03:31.290167 start: 1.4 download-retry (timeout 00:09:49) [common]
109 05:03:31.290258 start: 1.4.1 http-download (timeout 00:09:49) [common]
110 05:03:31.290371 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-821-g39bdf0444b23/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 05:03:31.290444 saving as /var/lib/lava/dispatcher/tmp/8767945/tftp-deploy-xy3qfto4/modules/modules.tar
112 05:03:31.290506 total size: 51796 (0MB)
113 05:03:31.290570 Using unxz to decompress xz
114 05:03:31.302615 progress 63% (0MB)
115 05:03:31.306293 progress 100% (0MB)
116 05:03:31.307831 0MB downloaded in 0.02s (2.85MB/s)
117 05:03:31.308078 end: 1.4.1 http-download (duration 00:00:00) [common]
119 05:03:31.308343 end: 1.4 download-retry (duration 00:00:00) [common]
120 05:03:31.308439 start: 1.5 prepare-tftp-overlay (timeout 00:09:49) [common]
121 05:03:31.308539 start: 1.5.1 extract-nfsrootfs (timeout 00:09:49) [common]
122 05:03:32.539123 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8767945/extract-nfsrootfs-v_v18cyn
123 05:03:32.539335 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 05:03:32.539444 start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
125 05:03:32.539581 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8767945/lava-overlay-f5gjycdc
126 05:03:32.539685 makedir: /var/lib/lava/dispatcher/tmp/8767945/lava-overlay-f5gjycdc/lava-8767945/bin
127 05:03:32.539772 makedir: /var/lib/lava/dispatcher/tmp/8767945/lava-overlay-f5gjycdc/lava-8767945/tests
128 05:03:32.539856 makedir: /var/lib/lava/dispatcher/tmp/8767945/lava-overlay-f5gjycdc/lava-8767945/results
129 05:03:32.539956 Creating /var/lib/lava/dispatcher/tmp/8767945/lava-overlay-f5gjycdc/lava-8767945/bin/lava-add-keys
130 05:03:32.540087 Creating /var/lib/lava/dispatcher/tmp/8767945/lava-overlay-f5gjycdc/lava-8767945/bin/lava-add-sources
131 05:03:32.540203 Creating /var/lib/lava/dispatcher/tmp/8767945/lava-overlay-f5gjycdc/lava-8767945/bin/lava-background-process-start
132 05:03:32.540318 Creating /var/lib/lava/dispatcher/tmp/8767945/lava-overlay-f5gjycdc/lava-8767945/bin/lava-background-process-stop
133 05:03:32.540431 Creating /var/lib/lava/dispatcher/tmp/8767945/lava-overlay-f5gjycdc/lava-8767945/bin/lava-common-functions
134 05:03:32.540541 Creating /var/lib/lava/dispatcher/tmp/8767945/lava-overlay-f5gjycdc/lava-8767945/bin/lava-echo-ipv4
135 05:03:32.540652 Creating /var/lib/lava/dispatcher/tmp/8767945/lava-overlay-f5gjycdc/lava-8767945/bin/lava-install-packages
136 05:03:32.540762 Creating /var/lib/lava/dispatcher/tmp/8767945/lava-overlay-f5gjycdc/lava-8767945/bin/lava-installed-packages
137 05:03:32.540872 Creating /var/lib/lava/dispatcher/tmp/8767945/lava-overlay-f5gjycdc/lava-8767945/bin/lava-os-build
138 05:03:32.540981 Creating /var/lib/lava/dispatcher/tmp/8767945/lava-overlay-f5gjycdc/lava-8767945/bin/lava-probe-channel
139 05:03:32.541091 Creating /var/lib/lava/dispatcher/tmp/8767945/lava-overlay-f5gjycdc/lava-8767945/bin/lava-probe-ip
140 05:03:32.541201 Creating /var/lib/lava/dispatcher/tmp/8767945/lava-overlay-f5gjycdc/lava-8767945/bin/lava-target-ip
141 05:03:32.541311 Creating /var/lib/lava/dispatcher/tmp/8767945/lava-overlay-f5gjycdc/lava-8767945/bin/lava-target-mac
142 05:03:32.541419 Creating /var/lib/lava/dispatcher/tmp/8767945/lava-overlay-f5gjycdc/lava-8767945/bin/lava-target-storage
143 05:03:32.541783 Creating /var/lib/lava/dispatcher/tmp/8767945/lava-overlay-f5gjycdc/lava-8767945/bin/lava-test-case
144 05:03:32.541901 Creating /var/lib/lava/dispatcher/tmp/8767945/lava-overlay-f5gjycdc/lava-8767945/bin/lava-test-event
145 05:03:32.542013 Creating /var/lib/lava/dispatcher/tmp/8767945/lava-overlay-f5gjycdc/lava-8767945/bin/lava-test-feedback
146 05:03:32.542128 Creating /var/lib/lava/dispatcher/tmp/8767945/lava-overlay-f5gjycdc/lava-8767945/bin/lava-test-raise
147 05:03:32.542238 Creating /var/lib/lava/dispatcher/tmp/8767945/lava-overlay-f5gjycdc/lava-8767945/bin/lava-test-reference
148 05:03:32.542348 Creating /var/lib/lava/dispatcher/tmp/8767945/lava-overlay-f5gjycdc/lava-8767945/bin/lava-test-runner
149 05:03:32.542458 Creating /var/lib/lava/dispatcher/tmp/8767945/lava-overlay-f5gjycdc/lava-8767945/bin/lava-test-set
150 05:03:32.542568 Creating /var/lib/lava/dispatcher/tmp/8767945/lava-overlay-f5gjycdc/lava-8767945/bin/lava-test-shell
151 05:03:32.542685 Updating /var/lib/lava/dispatcher/tmp/8767945/lava-overlay-f5gjycdc/lava-8767945/bin/lava-install-packages (oe)
152 05:03:32.542800 Updating /var/lib/lava/dispatcher/tmp/8767945/lava-overlay-f5gjycdc/lava-8767945/bin/lava-installed-packages (oe)
153 05:03:32.542899 Creating /var/lib/lava/dispatcher/tmp/8767945/lava-overlay-f5gjycdc/lava-8767945/environment
154 05:03:32.542987 LAVA metadata
155 05:03:32.543055 - LAVA_JOB_ID=8767945
156 05:03:32.543121 - LAVA_DISPATCHER_IP=192.168.201.1
157 05:03:32.543220 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
158 05:03:32.543287 skipped lava-vland-overlay
159 05:03:32.543365 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 05:03:32.543447 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
161 05:03:32.543511 skipped lava-multinode-overlay
162 05:03:32.543586 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 05:03:32.543669 start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
164 05:03:32.543742 Loading test definitions
165 05:03:32.543834 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:48) [common]
166 05:03:32.543907 Using /lava-8767945 at stage 0
167 05:03:32.544163 uuid=8767945_1.5.2.3.1 testdef=None
168 05:03:32.544254 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 05:03:32.544342 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
170 05:03:32.544813 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 05:03:32.545048 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
173 05:03:32.545656 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 05:03:32.545898 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
176 05:03:32.546440 runner path: /var/lib/lava/dispatcher/tmp/8767945/lava-overlay-f5gjycdc/lava-8767945/0/tests/0_dmesg test_uuid 8767945_1.5.2.3.1
177 05:03:32.546584 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 05:03:32.546822 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:48) [common]
180 05:03:32.546897 Using /lava-8767945 at stage 1
181 05:03:32.547137 uuid=8767945_1.5.2.3.5 testdef=None
182 05:03:32.547228 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 05:03:32.547316 start: 1.5.2.3.6 test-overlay (timeout 00:09:48) [common]
184 05:03:32.547761 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 05:03:32.547989 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:48) [common]
187 05:03:32.548632 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 05:03:32.548876 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:48) [common]
190 05:03:32.549429 runner path: /var/lib/lava/dispatcher/tmp/8767945/lava-overlay-f5gjycdc/lava-8767945/1/tests/1_bootrr test_uuid 8767945_1.5.2.3.5
191 05:03:32.549639 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 05:03:32.549856 Creating lava-test-runner.conf files
194 05:03:32.549921 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8767945/lava-overlay-f5gjycdc/lava-8767945/0 for stage 0
195 05:03:32.550005 - 0_dmesg
196 05:03:32.550079 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8767945/lava-overlay-f5gjycdc/lava-8767945/1 for stage 1
197 05:03:32.550162 - 1_bootrr
198 05:03:32.550253 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 05:03:32.550340 start: 1.5.2.4 compress-overlay (timeout 00:09:48) [common]
200 05:03:32.555740 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 05:03:32.555855 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:48) [common]
202 05:03:32.555946 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 05:03:32.556036 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 05:03:32.556124 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:48) [common]
205 05:03:32.657683 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 05:03:32.658036 start: 1.5.4 extract-modules (timeout 00:09:48) [common]
207 05:03:32.658150 extracting modules file /var/lib/lava/dispatcher/tmp/8767945/tftp-deploy-xy3qfto4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8767945/extract-nfsrootfs-v_v18cyn
208 05:03:32.662106 extracting modules file /var/lib/lava/dispatcher/tmp/8767945/tftp-deploy-xy3qfto4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8767945/extract-overlay-ramdisk-leac7pzp/ramdisk
209 05:03:32.665805 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 05:03:32.665914 start: 1.5.5 apply-overlay-tftp (timeout 00:09:48) [common]
211 05:03:32.665995 [common] Applying overlay to NFS
212 05:03:32.666068 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8767945/compress-overlay-yefd32ny/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8767945/extract-nfsrootfs-v_v18cyn
213 05:03:32.669839 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 05:03:32.669958 start: 1.5.6 configure-preseed-file (timeout 00:09:48) [common]
215 05:03:32.670052 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 05:03:32.670148 start: 1.5.7 compress-ramdisk (timeout 00:09:48) [common]
217 05:03:32.670230 Building ramdisk /var/lib/lava/dispatcher/tmp/8767945/extract-overlay-ramdisk-leac7pzp/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8767945/extract-overlay-ramdisk-leac7pzp/ramdisk
218 05:03:32.702918 >> 24546 blocks
219 05:03:33.179917 rename /var/lib/lava/dispatcher/tmp/8767945/extract-overlay-ramdisk-leac7pzp/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8767945/tftp-deploy-xy3qfto4/ramdisk/ramdisk.cpio.gz
220 05:03:33.180348 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
221 05:03:33.180491 start: 1.5.8 prepare-kernel (timeout 00:09:47) [common]
222 05:03:33.180608 start: 1.5.8.1 prepare-fit (timeout 00:09:47) [common]
223 05:03:33.180710 No mkimage arch provided, not using FIT.
224 05:03:33.180819 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 05:03:33.180907 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 05:03:33.181022 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 05:03:33.181121 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:47) [common]
228 05:03:33.181229 No LXC device requested
229 05:03:33.181314 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 05:03:33.181443 start: 1.7 deploy-device-env (timeout 00:09:47) [common]
231 05:03:33.181569 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 05:03:33.181642 Checking files for TFTP limit of 4294967296 bytes.
233 05:03:33.182056 end: 1 tftp-deploy (duration 00:00:13) [common]
234 05:03:33.182180 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 05:03:33.182285 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 05:03:33.182419 substitutions:
237 05:03:33.182490 - {DTB}: None
238 05:03:33.182556 - {INITRD}: 8767945/tftp-deploy-xy3qfto4/ramdisk/ramdisk.cpio.gz
239 05:03:33.182619 - {KERNEL}: 8767945/tftp-deploy-xy3qfto4/kernel/bzImage
240 05:03:33.182681 - {LAVA_MAC}: None
241 05:03:33.182741 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8767945/extract-nfsrootfs-v_v18cyn
242 05:03:33.182803 - {NFS_SERVER_IP}: 192.168.201.1
243 05:03:33.182861 - {PRESEED_CONFIG}: None
244 05:03:33.182918 - {PRESEED_LOCAL}: None
245 05:03:33.182976 - {RAMDISK}: 8767945/tftp-deploy-xy3qfto4/ramdisk/ramdisk.cpio.gz
246 05:03:33.183033 - {ROOT_PART}: None
247 05:03:33.183090 - {ROOT}: None
248 05:03:33.183147 - {SERVER_IP}: 192.168.201.1
249 05:03:33.183203 - {TEE}: None
250 05:03:33.183259 Parsed boot commands:
251 05:03:33.183315 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 05:03:33.183471 Parsed boot commands: tftpboot 192.168.201.1 8767945/tftp-deploy-xy3qfto4/kernel/bzImage 8767945/tftp-deploy-xy3qfto4/kernel/cmdline 8767945/tftp-deploy-xy3qfto4/ramdisk/ramdisk.cpio.gz
253 05:03:33.183567 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 05:03:33.183661 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 05:03:33.183754 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 05:03:33.183841 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 05:03:33.183914 Not connected, no need to disconnect.
258 05:03:33.183992 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 05:03:33.184078 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 05:03:33.184150 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-9'
261 05:03:33.186874 Setting prompt string to ['lava-test: # ']
262 05:03:33.187162 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 05:03:33.187270 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 05:03:33.187369 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 05:03:33.187461 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 05:03:33.187639 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=reboot'
267 05:03:33.207295 >> Command sent successfully.
268 05:03:33.209464 Returned 0 in 0 seconds
269 05:03:33.310308 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
271 05:03:33.310645 end: 2.2.2 reset-device (duration 00:00:00) [common]
272 05:03:33.310747 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
273 05:03:33.310837 Setting prompt string to 'Starting depthcharge on Voema...'
274 05:03:33.310905 Changing prompt to 'Starting depthcharge on Voema...'
275 05:03:33.310975 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
276 05:03:33.311250 [Enter `^Ec?' for help]
277 05:03:41.781027
278 05:03:41.781241
279 05:03:41.790929 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
280 05:03:41.794319 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
281 05:03:41.800772 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
282 05:03:41.804086 CPU: AES supported, TXT NOT supported, VT supported
283 05:03:41.810828 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
284 05:03:41.817341 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
285 05:03:41.820833 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
286 05:03:41.824042 VBOOT: Loading verstage.
287 05:03:41.830421 FMAP: Found "FLASH" version 1.1 at 0x1804000.
288 05:03:41.834059 FMAP: base = 0x0 size = 0x2000000 #areas = 32
289 05:03:41.837251 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
290 05:03:41.848071 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
291 05:03:41.854473 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
292 05:03:41.854559
293 05:03:41.854625
294 05:03:41.867945 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
295 05:03:41.881769 Probing TPM: . done!
296 05:03:41.885050 TPM ready after 0 ms
297 05:03:41.888426 Connected to device vid:did:rid of 1ae0:0028:00
298 05:03:41.899434 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
299 05:03:41.906142 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
300 05:03:41.909414 Initialized TPM device CR50 revision 0
301 05:03:41.961204 tlcl_send_startup: Startup return code is 0
302 05:03:41.961299 TPM: setup succeeded
303 05:03:41.976555 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
304 05:03:41.991898 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
305 05:03:42.005614 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
306 05:03:42.015927 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
307 05:03:42.019603 Chrome EC: UHEPI supported
308 05:03:42.022842 Phase 1
309 05:03:42.026061 FMAP: area GBB found @ 1805000 (458752 bytes)
310 05:03:42.035950 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
311 05:03:42.042438 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
312 05:03:42.049241 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
313 05:03:42.055964 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
314 05:03:42.059215 Recovery requested (1009000e)
315 05:03:42.062528 TPM: Extending digest for VBOOT: boot mode into PCR 0
316 05:03:42.074057 tlcl_extend: response is 0
317 05:03:42.080748 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
318 05:03:42.090723 tlcl_extend: response is 0
319 05:03:42.097139 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
320 05:03:42.103854 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
321 05:03:42.110559 BS: verstage times (exec / console): total (unknown) / 142 ms
322 05:03:42.110644
323 05:03:42.110710
324 05:03:42.123892 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
325 05:03:42.130592 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
326 05:03:42.133839 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
327 05:03:42.137089 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
328 05:03:42.143715 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
329 05:03:42.146940 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
330 05:03:42.150401 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
331 05:03:42.153468 TCO_STS: 0000 0000
332 05:03:42.157162 GEN_PMCON: d0015038 00002200
333 05:03:42.160713 GBLRST_CAUSE: 00000000 00000000
334 05:03:42.160799 HPR_CAUSE0: 00000000
335 05:03:42.163438 prev_sleep_state 5
336 05:03:42.166822 Boot Count incremented to 15187
337 05:03:42.173724 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
338 05:03:42.180028 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
339 05:03:42.186792 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
340 05:03:42.190010
341 05:03:42.196749 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
342 05:03:42.199765 Chrome EC: UHEPI supported
343 05:03:42.206656 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
344 05:03:42.218463 Probing TPM: done!
345 05:03:42.222868 Connected to device vid:did:rid of 1ae0:0028:00
346 05:03:42.234195 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
347 05:03:42.237253 Initialized TPM device CR50 revision 0
348 05:03:42.252806 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
349 05:03:42.259419 MRC: Hash idx 0x100b comparison successful.
350 05:03:42.262777 MRC cache found, size faa8
351 05:03:42.262865 bootmode is set to: 2
352 05:03:42.266133 SPD index = 0
353 05:03:42.272662 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
354 05:03:42.276234 SPD: module type is LPDDR4X
355 05:03:42.282796 SPD: module part number is MT53E512M64D4NW-046
356 05:03:42.286052 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
357 05:03:42.292688 SPD: device width 16 bits, bus width 16 bits
358 05:03:42.296177 SPD: module size is 1024 MB (per channel)
359 05:03:42.731840 CBMEM:
360 05:03:42.735312 IMD: root @ 0x76fff000 254 entries.
361 05:03:42.738944 IMD: root @ 0x76ffec00 62 entries.
362 05:03:42.741866 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
363 05:03:42.748453 FMAP: area RW_VPD found @ f35000 (8192 bytes)
364 05:03:42.751715 External stage cache:
365 05:03:42.755084 IMD: root @ 0x7b3ff000 254 entries.
366 05:03:42.758387 IMD: root @ 0x7b3fec00 62 entries.
367 05:03:42.774229 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
368 05:03:42.780557 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
369 05:03:42.787560 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
370 05:03:42.802704 MRC: 'RECOVERY_MRC_CACHE' does not need update.
371 05:03:42.806128 cse_lite: Skip switching to RW in the recovery path
372 05:03:42.809363 8 DIMMs found
373 05:03:42.809450 SMM Memory Map
374 05:03:42.812520 SMRAM : 0x7b000000 0x800000
375 05:03:42.815940 Subregion 0: 0x7b000000 0x200000
376 05:03:42.819108 Subregion 1: 0x7b200000 0x200000
377 05:03:42.822260 Subregion 2: 0x7b400000 0x400000
378 05:03:42.825733 top_of_ram = 0x77000000
379 05:03:42.832636 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
380 05:03:42.835754 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
381 05:03:42.842252 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
382 05:03:42.845489 MTRR Range: Start=ff000000 End=0 (Size 1000000)
383 05:03:42.855589 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
384 05:03:42.862078 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
385 05:03:42.872023 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
386 05:03:42.875208 Processing 211 relocs. Offset value of 0x74c0b000
387 05:03:42.884610 BS: romstage times (exec / console): total (unknown) / 277 ms
388 05:03:42.890339
389 05:03:42.890428
390 05:03:42.900149 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
391 05:03:42.903916 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
392 05:03:42.913636 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
393 05:03:42.920112 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
394 05:03:42.926738 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
395 05:03:42.933275 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
396 05:03:42.980740 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
397 05:03:42.986971 Processing 5008 relocs. Offset value of 0x75d98000
398 05:03:42.990310 BS: postcar times (exec / console): total (unknown) / 59 ms
399 05:03:42.993976
400 05:03:42.994064
401 05:03:43.003916 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
402 05:03:43.004004 Normal boot
403 05:03:43.007521 FW_CONFIG value is 0x804c02
404 05:03:43.010592 PCI: 00:07.0 disabled by fw_config
405 05:03:43.014129 PCI: 00:07.1 disabled by fw_config
406 05:03:43.017243 PCI: 00:0d.2 disabled by fw_config
407 05:03:43.020590 PCI: 00:1c.7 disabled by fw_config
408 05:03:43.027310 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
409 05:03:43.033822 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
410 05:03:43.037297 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
411 05:03:43.040426 GENERIC: 0.0 disabled by fw_config
412 05:03:43.043592 GENERIC: 1.0 disabled by fw_config
413 05:03:43.050209 fw_config match found: DB_USB=USB3_ACTIVE
414 05:03:43.053649 fw_config match found: DB_USB=USB3_ACTIVE
415 05:03:43.057040 fw_config match found: DB_USB=USB3_ACTIVE
416 05:03:43.060450 fw_config match found: DB_USB=USB3_ACTIVE
417 05:03:43.063445
418 05:03:43.067110 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
419 05:03:43.073830 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
420 05:03:43.083469 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
421 05:03:43.090255 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
422 05:03:43.093913 microcode: sig=0x806c1 pf=0x80 revision=0x86
423 05:03:43.100075 microcode: Update skipped, already up-to-date
424 05:03:43.106826 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
425 05:03:43.133987 Detected 4 core, 8 thread CPU.
426 05:03:43.137126 Setting up SMI for CPU
427 05:03:43.140418 IED base = 0x7b400000
428 05:03:43.140504 IED size = 0x00400000
429 05:03:43.144319
430 05:03:43.144405 Will perform SMM setup.
431 05:03:43.150680 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
432 05:03:43.156935 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
433 05:03:43.163440 Processing 16 relocs. Offset value of 0x00030000
434 05:03:43.166816 Attempting to start 7 APs
435 05:03:43.170360 Waiting for 10ms after sending INIT.
436 05:03:43.186195 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
437 05:03:43.186283 done.
438 05:03:43.189471 AP: slot 2 apic_id 3.
439 05:03:43.192575 AP: slot 6 apic_id 2.
440 05:03:43.192661 AP: slot 4 apic_id 5.
441 05:03:43.195936 AP: slot 5 apic_id 4.
442 05:03:43.199573 AP: slot 3 apic_id 7.
443 05:03:43.202628 Waiting for 2nd SIPI to complete...done.
444 05:03:43.205832 AP: slot 7 apic_id 6.
445 05:03:43.212763 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
446 05:03:43.219092 Processing 13 relocs. Offset value of 0x00038000
447 05:03:43.219179 Unable to locate Global NVS
448 05:03:43.222754
449 05:03:43.229051 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
450 05:03:43.232839 Installing permanent SMM handler to 0x7b000000
451 05:03:43.242670 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
452 05:03:43.245496 Processing 794 relocs. Offset value of 0x7b010000
453 05:03:43.255552 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
454 05:03:43.258995 Processing 13 relocs. Offset value of 0x7b008000
455 05:03:43.265623 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
456 05:03:43.272162 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
457 05:03:43.275685 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
458 05:03:43.282110 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
459 05:03:43.288779 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
460 05:03:43.295487 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
461 05:03:43.302271 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
462 05:03:43.302356 Unable to locate Global NVS
463 05:03:43.305380
464 05:03:43.312014 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
465 05:03:43.315320 Clearing SMI status registers
466 05:03:43.315405 SMI_STS: PM1
467 05:03:43.318641 PM1_STS: PWRBTN
468 05:03:43.325143 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
469 05:03:43.328351 In relocation handler: CPU 0
470 05:03:43.331733 New SMBASE=0x7b000000 IEDBASE=0x7b400000
471 05:03:43.338171 Writing SMRR. base = 0x7b000006, mask=0xff800c00
472 05:03:43.338257 Relocation complete.
473 05:03:43.341517
474 05:03:43.348366 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
475 05:03:43.351640 In relocation handler: CPU 1
476 05:03:43.354746 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
477 05:03:43.354831 Relocation complete.
478 05:03:43.364757 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
479 05:03:43.364851 In relocation handler: CPU 2
480 05:03:43.368023
481 05:03:43.371547 New SMBASE=0x7afff800 IEDBASE=0x7b400000
482 05:03:43.371637 Relocation complete.
483 05:03:43.381313 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
484 05:03:43.381398 In relocation handler: CPU 6
485 05:03:43.384573
486 05:03:43.388045 New SMBASE=0x7affe800 IEDBASE=0x7b400000
487 05:03:43.391174 Writing SMRR. base = 0x7b000006, mask=0xff800c00
488 05:03:43.394958 Relocation complete.
489 05:03:43.400930 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
490 05:03:43.404301 In relocation handler: CPU 7
491 05:03:43.408083 New SMBASE=0x7affe400 IEDBASE=0x7b400000
492 05:03:43.414327 Writing SMRR. base = 0x7b000006, mask=0xff800c00
493 05:03:43.414412 Relocation complete.
494 05:03:43.424435 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
495 05:03:43.424521 In relocation handler: CPU 3
496 05:03:43.430954 New SMBASE=0x7afff400 IEDBASE=0x7b400000
497 05:03:43.431041 Relocation complete.
498 05:03:43.440766 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
499 05:03:43.440852 In relocation handler: CPU 5
500 05:03:43.447328 New SMBASE=0x7affec00 IEDBASE=0x7b400000
501 05:03:43.450665 Writing SMRR. base = 0x7b000006, mask=0xff800c00
502 05:03:43.453799 Relocation complete.
503 05:03:43.460925 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
504 05:03:43.464495 In relocation handler: CPU 4
505 05:03:43.468456 New SMBASE=0x7afff000 IEDBASE=0x7b400000
506 05:03:43.468543 Relocation complete.
507 05:03:43.471696 Initializing CPU #0
508 05:03:43.474953 CPU: vendor Intel device 806c1
509 05:03:43.478294 CPU: family 06, model 8c, stepping 01
510 05:03:43.481722 Clearing out pending MCEs
511 05:03:43.484732 Setting up local APIC...
512 05:03:43.488045 apic_id: 0x00 done.
513 05:03:43.488136 Turbo is available but hidden
514 05:03:43.491343 Turbo is available and visible
515 05:03:43.498192 microcode: Update skipped, already up-to-date
516 05:03:43.498278 CPU #0 initialized
517 05:03:43.501260 Initializing CPU #5
518 05:03:43.504828 Initializing CPU #4
519 05:03:43.504913 Initializing CPU #7
520 05:03:43.507819 Initializing CPU #3
521 05:03:43.511536 CPU: vendor Intel device 806c1
522 05:03:43.514542 CPU: family 06, model 8c, stepping 01
523 05:03:43.518048 CPU: vendor Intel device 806c1
524 05:03:43.521223 CPU: family 06, model 8c, stepping 01
525 05:03:43.524752 Clearing out pending MCEs
526 05:03:43.528113 Clearing out pending MCEs
527 05:03:43.528199 Setting up local APIC...
528 05:03:43.531374 CPU: vendor Intel device 806c1
529 05:03:43.537729 CPU: family 06, model 8c, stepping 01
530 05:03:43.541117 CPU: vendor Intel device 806c1
531 05:03:43.544266 CPU: family 06, model 8c, stepping 01
532 05:03:43.544351 Clearing out pending MCEs
533 05:03:43.547485
534 05:03:43.547570 Clearing out pending MCEs
535 05:03:43.550881 Setting up local APIC...
536 05:03:43.554108 Setting up local APIC...
537 05:03:43.554209 Initializing CPU #6
538 05:03:43.557631 Initializing CPU #2
539 05:03:43.560869 apic_id: 0x07 done.
540 05:03:43.560954 apic_id: 0x06 done.
541 05:03:43.567496 microcode: Update skipped, already up-to-date
542 05:03:43.570718 microcode: Update skipped, already up-to-date
543 05:03:43.574414 CPU #3 initialized
544 05:03:43.574499 CPU #7 initialized
545 05:03:43.577401 apic_id: 0x04 done.
546 05:03:43.580993 Setting up local APIC...
547 05:03:43.581079 Initializing CPU #1
548 05:03:43.584125 apic_id: 0x05 done.
549 05:03:43.587962 microcode: Update skipped, already up-to-date
550 05:03:43.593913 microcode: Update skipped, already up-to-date
551 05:03:43.593999 CPU #5 initialized
552 05:03:43.597444 CPU #4 initialized
553 05:03:43.600696 CPU: vendor Intel device 806c1
554 05:03:43.604060 CPU: family 06, model 8c, stepping 01
555 05:03:43.607167 CPU: vendor Intel device 806c1
556 05:03:43.610805 CPU: family 06, model 8c, stepping 01
557 05:03:43.613809 Clearing out pending MCEs
558 05:03:43.617205 Clearing out pending MCEs
559 05:03:43.617290 Setting up local APIC...
560 05:03:43.620458 CPU: vendor Intel device 806c1
561 05:03:43.627553 CPU: family 06, model 8c, stepping 01
562 05:03:43.627637 Clearing out pending MCEs
563 05:03:43.630496 apic_id: 0x03 done.
564 05:03:43.633769 Setting up local APIC...
565 05:03:43.633854 Setting up local APIC...
566 05:03:43.637200
567 05:03:43.637284 apic_id: 0x02 done.
568 05:03:43.644065 microcode: Update skipped, already up-to-date
569 05:03:43.647321 microcode: Update skipped, already up-to-date
570 05:03:43.647406 CPU #2 initialized
571 05:03:43.650347
572 05:03:43.650430 CPU #6 initialized
573 05:03:43.653581 apic_id: 0x01 done.
574 05:03:43.657098 microcode: Update skipped, already up-to-date
575 05:03:43.660315 CPU #1 initialized
576 05:03:43.663532 bsp_do_flight_plan done after 457 msecs.
577 05:03:43.666812 CPU: frequency set to 4000 MHz
578 05:03:43.666896 Enabling SMIs.
579 05:03:43.670065
580 05:03:43.673770 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
581 05:03:43.691408 SATAXPCIE1 indicates PCIe NVMe is present
582 05:03:43.694061 Probing TPM: done!
583 05:03:43.697722 Connected to device vid:did:rid of 1ae0:0028:00
584 05:03:43.708314 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
585 05:03:43.711586 Initialized TPM device CR50 revision 0
586 05:03:43.714720 Enabling S0i3.4
587 05:03:43.721621 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
588 05:03:43.724663 Found a VBT of 8704 bytes after decompression
589 05:03:43.731434 cse_lite: CSE RO boot. HybridStorageMode disabled
590 05:03:43.737929 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
591 05:03:43.814060 FSPS returned 0
592 05:03:43.817328 Executing Phase 1 of FspMultiPhaseSiInit
593 05:03:43.827720 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
594 05:03:43.830411 port C0 DISC req: usage 1 usb3 1 usb2 5
595 05:03:43.833837 Raw Buffer output 0 00000511
596 05:03:43.837120 Raw Buffer output 1 00000000
597 05:03:43.841492 pmc_send_ipc_cmd succeeded
598 05:03:43.844520 port C1 DISC req: usage 1 usb3 2 usb2 3
599 05:03:43.847605
600 05:03:43.847690 Raw Buffer output 0 00000321
601 05:03:43.851339 Raw Buffer output 1 00000000
602 05:03:43.855121 pmc_send_ipc_cmd succeeded
603 05:03:43.860625 Detected 4 core, 8 thread CPU.
604 05:03:43.863683 Detected 4 core, 8 thread CPU.
605 05:03:44.097749 Display FSP Version Info HOB
606 05:03:44.100883 Reference Code - CPU = a.0.4c.31
607 05:03:44.104405 uCode Version = 0.0.0.86
608 05:03:44.107345 TXT ACM version = ff.ff.ff.ffff
609 05:03:44.110613 Reference Code - ME = a.0.4c.31
610 05:03:44.114084 MEBx version = 0.0.0.0
611 05:03:44.117685 ME Firmware Version = Consumer SKU
612 05:03:44.120888 Reference Code - PCH = a.0.4c.31
613 05:03:44.123966 PCH-CRID Status = Disabled
614 05:03:44.127487 PCH-CRID Original Value = ff.ff.ff.ffff
615 05:03:44.130550 PCH-CRID New Value = ff.ff.ff.ffff
616 05:03:44.134112 OPROM - RST - RAID = ff.ff.ff.ffff
617 05:03:44.137117 PCH Hsio Version = 4.0.0.0
618 05:03:44.140312 Reference Code - SA - System Agent = a.0.4c.31
619 05:03:44.143652 Reference Code - MRC = 2.0.0.1
620 05:03:44.147081 SA - PCIe Version = a.0.4c.31
621 05:03:44.150275 SA-CRID Status = Disabled
622 05:03:44.153486 SA-CRID Original Value = 0.0.0.1
623 05:03:44.157031 SA-CRID New Value = 0.0.0.1
624 05:03:44.160060 OPROM - VBIOS = ff.ff.ff.ffff
625 05:03:44.163589 IO Manageability Engine FW Version = 11.1.4.0
626 05:03:44.167064 PHY Build Version = 0.0.0.e0
627 05:03:44.170272 Thunderbolt(TM) FW Version = 0.0.0.0
628 05:03:44.176961 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
629 05:03:44.180072 ITSS IRQ Polarities Before:
630 05:03:44.180159 IPC0: 0xffffffff
631 05:03:44.183726 IPC1: 0xffffffff
632 05:03:44.183810 IPC2: 0xffffffff
633 05:03:44.186771 IPC3: 0xffffffff
634 05:03:44.189959 ITSS IRQ Polarities After:
635 05:03:44.190044 IPC0: 0xffffffff
636 05:03:44.193163 IPC1: 0xffffffff
637 05:03:44.193247 IPC2: 0xffffffff
638 05:03:44.196705 IPC3: 0xffffffff
639 05:03:44.199949 Found PCIe Root Port #9 at PCI: 00:1d.0.
640 05:03:44.213403 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
641 05:03:44.223165 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
642 05:03:44.236302 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
643 05:03:44.243021 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
644 05:03:44.246321 Enumerating buses...
645 05:03:44.249437 Show all devs... Before device enumeration.
646 05:03:44.252895 Root Device: enabled 1
647 05:03:44.252979 DOMAIN: 0000: enabled 1
648 05:03:44.256429 CPU_CLUSTER: 0: enabled 1
649 05:03:44.259433 PCI: 00:00.0: enabled 1
650 05:03:44.262838 PCI: 00:02.0: enabled 1
651 05:03:44.262955 PCI: 00:04.0: enabled 1
652 05:03:44.266241 PCI: 00:05.0: enabled 1
653 05:03:44.269488 PCI: 00:06.0: enabled 0
654 05:03:44.272787 PCI: 00:07.0: enabled 0
655 05:03:44.272871 PCI: 00:07.1: enabled 0
656 05:03:44.276317 PCI: 00:07.2: enabled 0
657 05:03:44.279403 PCI: 00:07.3: enabled 0
658 05:03:44.282641 PCI: 00:08.0: enabled 1
659 05:03:44.282725 PCI: 00:09.0: enabled 0
660 05:03:44.286515 PCI: 00:0a.0: enabled 0
661 05:03:44.289819 PCI: 00:0d.0: enabled 1
662 05:03:44.289903 PCI: 00:0d.1: enabled 0
663 05:03:44.292794
664 05:03:44.292879 PCI: 00:0d.2: enabled 0
665 05:03:44.296055 PCI: 00:0d.3: enabled 0
666 05:03:44.299586 PCI: 00:0e.0: enabled 0
667 05:03:44.299669 PCI: 00:10.2: enabled 1
668 05:03:44.302697 PCI: 00:10.6: enabled 0
669 05:03:44.306255 PCI: 00:10.7: enabled 0
670 05:03:44.309202 PCI: 00:12.0: enabled 0
671 05:03:44.309286 PCI: 00:12.6: enabled 0
672 05:03:44.312734 PCI: 00:13.0: enabled 0
673 05:03:44.316193 PCI: 00:14.0: enabled 1
674 05:03:44.319396 PCI: 00:14.1: enabled 0
675 05:03:44.319481 PCI: 00:14.2: enabled 1
676 05:03:44.322663 PCI: 00:14.3: enabled 1
677 05:03:44.326161 PCI: 00:15.0: enabled 1
678 05:03:44.329363 PCI: 00:15.1: enabled 1
679 05:03:44.329462 PCI: 00:15.2: enabled 1
680 05:03:44.332465 PCI: 00:15.3: enabled 1
681 05:03:44.335776 PCI: 00:16.0: enabled 1
682 05:03:44.335860 PCI: 00:16.1: enabled 0
683 05:03:44.339114
684 05:03:44.339199 PCI: 00:16.2: enabled 0
685 05:03:44.342442 PCI: 00:16.3: enabled 0
686 05:03:44.345636 PCI: 00:16.4: enabled 0
687 05:03:44.345720 PCI: 00:16.5: enabled 0
688 05:03:44.349379 PCI: 00:17.0: enabled 1
689 05:03:44.352418 PCI: 00:19.0: enabled 0
690 05:03:44.355754 PCI: 00:19.1: enabled 1
691 05:03:44.355862 PCI: 00:19.2: enabled 0
692 05:03:44.359314 PCI: 00:1c.0: enabled 1
693 05:03:44.362532 PCI: 00:1c.1: enabled 0
694 05:03:44.365889 PCI: 00:1c.2: enabled 0
695 05:03:44.365974 PCI: 00:1c.3: enabled 0
696 05:03:44.369007 PCI: 00:1c.4: enabled 0
697 05:03:44.372448 PCI: 00:1c.5: enabled 0
698 05:03:44.375676 PCI: 00:1c.6: enabled 1
699 05:03:44.375775 PCI: 00:1c.7: enabled 0
700 05:03:44.378960 PCI: 00:1d.0: enabled 1
701 05:03:44.382481 PCI: 00:1d.1: enabled 0
702 05:03:44.382565 PCI: 00:1d.2: enabled 1
703 05:03:44.385815
704 05:03:44.385899 PCI: 00:1d.3: enabled 0
705 05:03:44.388993 PCI: 00:1e.0: enabled 1
706 05:03:44.392298 PCI: 00:1e.1: enabled 0
707 05:03:44.392414 PCI: 00:1e.2: enabled 1
708 05:03:44.395585 PCI: 00:1e.3: enabled 1
709 05:03:44.398728 PCI: 00:1f.0: enabled 1
710 05:03:44.401905 PCI: 00:1f.1: enabled 0
711 05:03:44.401989 PCI: 00:1f.2: enabled 1
712 05:03:44.406494 PCI: 00:1f.3: enabled 1
713 05:03:44.408804 PCI: 00:1f.4: enabled 0
714 05:03:44.411926 PCI: 00:1f.5: enabled 1
715 05:03:44.412011 PCI: 00:1f.6: enabled 0
716 05:03:44.415393 PCI: 00:1f.7: enabled 0
717 05:03:44.418590 APIC: 00: enabled 1
718 05:03:44.418674 GENERIC: 0.0: enabled 1
719 05:03:44.421883 GENERIC: 0.0: enabled 1
720 05:03:44.425414 GENERIC: 1.0: enabled 1
721 05:03:44.428663 GENERIC: 0.0: enabled 1
722 05:03:44.428753 GENERIC: 1.0: enabled 1
723 05:03:44.432116 USB0 port 0: enabled 1
724 05:03:44.435241 GENERIC: 0.0: enabled 1
725 05:03:44.438521 USB0 port 0: enabled 1
726 05:03:44.438608 GENERIC: 0.0: enabled 1
727 05:03:44.441712 I2C: 00:1a: enabled 1
728 05:03:44.445086 I2C: 00:31: enabled 1
729 05:03:44.445171 I2C: 00:32: enabled 1
730 05:03:44.448313 I2C: 00:10: enabled 1
731 05:03:44.451485 I2C: 00:15: enabled 1
732 05:03:44.451572 GENERIC: 0.0: enabled 0
733 05:03:44.454924 GENERIC: 1.0: enabled 0
734 05:03:44.458448 GENERIC: 0.0: enabled 1
735 05:03:44.461583 SPI: 00: enabled 1
736 05:03:44.461670 SPI: 00: enabled 1
737 05:03:44.464875 PNP: 0c09.0: enabled 1
738 05:03:44.468434 GENERIC: 0.0: enabled 1
739 05:03:44.468519 USB3 port 0: enabled 1
740 05:03:44.471442 USB3 port 1: enabled 1
741 05:03:44.475060 USB3 port 2: enabled 0
742 05:03:44.475146 USB3 port 3: enabled 0
743 05:03:44.478194 USB2 port 0: enabled 0
744 05:03:44.481396 USB2 port 1: enabled 1
745 05:03:44.485198 USB2 port 2: enabled 1
746 05:03:44.485286 USB2 port 3: enabled 0
747 05:03:44.488178 USB2 port 4: enabled 1
748 05:03:44.491677 USB2 port 5: enabled 0
749 05:03:44.491763 USB2 port 6: enabled 0
750 05:03:44.494863 USB2 port 7: enabled 0
751 05:03:44.498388 USB2 port 8: enabled 0
752 05:03:44.498473 USB2 port 9: enabled 0
753 05:03:44.501660 USB3 port 0: enabled 0
754 05:03:44.504667 USB3 port 1: enabled 1
755 05:03:44.508077 USB3 port 2: enabled 0
756 05:03:44.508162 USB3 port 3: enabled 0
757 05:03:44.511439 GENERIC: 0.0: enabled 1
758 05:03:44.515119 GENERIC: 1.0: enabled 1
759 05:03:44.515204 APIC: 01: enabled 1
760 05:03:44.517938 APIC: 03: enabled 1
761 05:03:44.521469 APIC: 07: enabled 1
762 05:03:44.521560 APIC: 05: enabled 1
763 05:03:44.524643 APIC: 04: enabled 1
764 05:03:44.524727 APIC: 02: enabled 1
765 05:03:44.528080
766 05:03:44.528165 APIC: 06: enabled 1
767 05:03:44.531331 Compare with tree...
768 05:03:44.531414 Root Device: enabled 1
769 05:03:44.534434 DOMAIN: 0000: enabled 1
770 05:03:44.538049 PCI: 00:00.0: enabled 1
771 05:03:44.541004 PCI: 00:02.0: enabled 1
772 05:03:44.544395 PCI: 00:04.0: enabled 1
773 05:03:44.544478 GENERIC: 0.0: enabled 1
774 05:03:44.547892 PCI: 00:05.0: enabled 1
775 05:03:44.551185 PCI: 00:06.0: enabled 0
776 05:03:44.554384 PCI: 00:07.0: enabled 0
777 05:03:44.557582 GENERIC: 0.0: enabled 1
778 05:03:44.557666 PCI: 00:07.1: enabled 0
779 05:03:44.561130 GENERIC: 1.0: enabled 1
780 05:03:44.564342 PCI: 00:07.2: enabled 0
781 05:03:44.567726 GENERIC: 0.0: enabled 1
782 05:03:44.570880 PCI: 00:07.3: enabled 0
783 05:03:44.574179 GENERIC: 1.0: enabled 1
784 05:03:44.574263 PCI: 00:08.0: enabled 1
785 05:03:44.577446 PCI: 00:09.0: enabled 0
786 05:03:44.580857 PCI: 00:0a.0: enabled 0
787 05:03:44.584328 PCI: 00:0d.0: enabled 1
788 05:03:44.584413 USB0 port 0: enabled 1
789 05:03:44.587611
790 05:03:44.587695 USB3 port 0: enabled 1
791 05:03:44.591009 USB3 port 1: enabled 1
792 05:03:44.594538 USB3 port 2: enabled 0
793 05:03:44.597668 USB3 port 3: enabled 0
794 05:03:44.601237 PCI: 00:0d.1: enabled 0
795 05:03:44.601330 PCI: 00:0d.2: enabled 0
796 05:03:44.604373 GENERIC: 0.0: enabled 1
797 05:03:44.607586 PCI: 00:0d.3: enabled 0
798 05:03:44.611246 PCI: 00:0e.0: enabled 0
799 05:03:44.614486 PCI: 00:10.2: enabled 1
800 05:03:44.614569 PCI: 00:10.6: enabled 0
801 05:03:44.617927 PCI: 00:10.7: enabled 0
802 05:03:44.620862 PCI: 00:12.0: enabled 0
803 05:03:44.624034 PCI: 00:12.6: enabled 0
804 05:03:44.627762 PCI: 00:13.0: enabled 0
805 05:03:44.627847 PCI: 00:14.0: enabled 1
806 05:03:44.631118 USB0 port 0: enabled 1
807 05:03:44.634268 USB2 port 0: enabled 0
808 05:03:44.637472 USB2 port 1: enabled 1
809 05:03:44.640926 USB2 port 2: enabled 1
810 05:03:44.641012 USB2 port 3: enabled 0
811 05:03:44.643997 USB2 port 4: enabled 1
812 05:03:44.647771 USB2 port 5: enabled 0
813 05:03:44.650854 USB2 port 6: enabled 0
814 05:03:44.653971 USB2 port 7: enabled 0
815 05:03:44.657287 USB2 port 8: enabled 0
816 05:03:44.657372 USB2 port 9: enabled 0
817 05:03:44.660888 USB3 port 0: enabled 0
818 05:03:44.664098 USB3 port 1: enabled 1
819 05:03:44.667409 USB3 port 2: enabled 0
820 05:03:44.670634 USB3 port 3: enabled 0
821 05:03:44.670720 PCI: 00:14.1: enabled 0
822 05:03:44.674446 PCI: 00:14.2: enabled 1
823 05:03:44.677236 PCI: 00:14.3: enabled 1
824 05:03:44.680682 GENERIC: 0.0: enabled 1
825 05:03:44.683864 PCI: 00:15.0: enabled 1
826 05:03:44.683948 I2C: 00:1a: enabled 1
827 05:03:44.687290 I2C: 00:31: enabled 1
828 05:03:44.690597 I2C: 00:32: enabled 1
829 05:03:44.693923 PCI: 00:15.1: enabled 1
830 05:03:44.697460 I2C: 00:10: enabled 1
831 05:03:44.697581 PCI: 00:15.2: enabled 1
832 05:03:44.700454 PCI: 00:15.3: enabled 1
833 05:03:44.703720 PCI: 00:16.0: enabled 1
834 05:03:44.707487 PCI: 00:16.1: enabled 0
835 05:03:44.707577 PCI: 00:16.2: enabled 0
836 05:03:44.711201 PCI: 00:16.3: enabled 0
837 05:03:44.714881 PCI: 00:16.4: enabled 0
838 05:03:44.718387 PCI: 00:16.5: enabled 0
839 05:03:44.718472 PCI: 00:17.0: enabled 1
840 05:03:44.721373 PCI: 00:19.0: enabled 0
841 05:03:44.724928 PCI: 00:19.1: enabled 1
842 05:03:44.728327 I2C: 00:15: enabled 1
843 05:03:44.778469 PCI: 00:19.2: enabled 0
844 05:03:44.778577 PCI: 00:1d.0: enabled 1
845 05:03:44.778660 GENERIC: 0.0: enabled 1
846 05:03:44.778919 PCI: 00:1e.0: enabled 1
847 05:03:44.778993 PCI: 00:1e.1: enabled 0
848 05:03:44.779054 PCI: 00:1e.2: enabled 1
849 05:03:44.779113 SPI: 00: enabled 1
850 05:03:44.779175 PCI: 00:1e.3: enabled 1
851 05:03:44.779421 SPI: 00: enabled 1
852 05:03:44.779487 PCI: 00:1f.0: enabled 1
853 05:03:44.779550 PNP: 0c09.0: enabled 1
854 05:03:44.779607 PCI: 00:1f.1: enabled 0
855 05:03:44.779666 PCI: 00:1f.2: enabled 1
856 05:03:44.779912 GENERIC: 0.0: enabled 1
857 05:03:44.779980 GENERIC: 0.0: enabled 1
858 05:03:44.780219 GENERIC: 1.0: enabled 1
859 05:03:44.780281 PCI: 00:1f.3: enabled 1
860 05:03:44.780529 PCI: 00:1f.4: enabled 0
861 05:03:44.780593 PCI: 00:1f.5: enabled 1
862 05:03:44.780651 PCI: 00:1f.6: enabled 0
863 05:03:44.829958
864 05:03:44.830047 PCI: 00:1f.7: enabled 0
865 05:03:44.830114 CPU_CLUSTER: 0: enabled 1
866 05:03:44.830525 APIC: 00: enabled 1
867 05:03:44.830610 APIC: 01: enabled 1
868 05:03:44.830677 APIC: 03: enabled 1
869 05:03:44.831043 APIC: 07: enabled 1
870 05:03:44.831132 APIC: 05: enabled 1
871 05:03:44.831386 APIC: 04: enabled 1
872 05:03:44.831456 APIC: 02: enabled 1
873 05:03:44.831518 APIC: 06: enabled 1
874 05:03:44.831762 Root Device scanning...
875 05:03:44.831828 scan_static_bus for Root Device
876 05:03:44.831887 DOMAIN: 0000 enabled
877 05:03:44.831945 CPU_CLUSTER: 0 enabled
878 05:03:44.832008 DOMAIN: 0000 scanning...
879 05:03:44.832249 PCI: pci_scan_bus for bus 00
880 05:03:44.832312 PCI: 00:00.0 [8086/0000] ops
881 05:03:44.832370 PCI: 00:00.0 [8086/9a12] enabled
882 05:03:44.832427 PCI: 00:02.0 [8086/0000] bus ops
883 05:03:44.863701 PCI: 00:02.0 [8086/9a40] enabled
884 05:03:44.863788 PCI: 00:04.0 [8086/0000] bus ops
885 05:03:44.864041 PCI: 00:04.0 [8086/9a03] enabled
886 05:03:44.864111 PCI: 00:05.0 [8086/9a19] enabled
887 05:03:44.864354 PCI: 00:07.0 [0000/0000] hidden
888 05:03:44.864445 PCI: 00:08.0 [8086/9a11] enabled
889 05:03:44.864816 PCI: 00:0a.0 [8086/9a0d] disabled
890 05:03:44.865087 PCI: 00:0d.0 [8086/0000] bus ops
891 05:03:44.865159 PCI: 00:0d.0 [8086/9a13] enabled
892 05:03:44.867537 PCI: 00:14.0 [8086/0000] bus ops
893 05:03:44.867623 PCI: 00:14.0 [8086/a0ed] enabled
894 05:03:44.870778 PCI: 00:14.2 [8086/a0ef] enabled
895 05:03:44.874217 PCI: 00:14.3 [8086/0000] bus ops
896 05:03:44.877255 PCI: 00:14.3 [8086/a0f0] enabled
897 05:03:44.880705 PCI: 00:15.0 [8086/0000] bus ops
898 05:03:44.884008 PCI: 00:15.0 [8086/a0e8] enabled
899 05:03:44.887552 PCI: 00:15.1 [8086/0000] bus ops
900 05:03:44.890595 PCI: 00:15.1 [8086/a0e9] enabled
901 05:03:44.894045 PCI: 00:15.2 [8086/0000] bus ops
902 05:03:44.897139 PCI: 00:15.2 [8086/a0ea] enabled
903 05:03:44.900550 PCI: 00:15.3 [8086/0000] bus ops
904 05:03:44.903722 PCI: 00:15.3 [8086/a0eb] enabled
905 05:03:44.907164 PCI: 00:16.0 [8086/0000] ops
906 05:03:44.910428 PCI: 00:16.0 [8086/a0e0] enabled
907 05:03:44.917155 PCI: Static device PCI: 00:17.0 not found, disabling it.
908 05:03:44.920517 PCI: 00:19.0 [8086/0000] bus ops
909 05:03:44.923568 PCI: 00:19.0 [8086/a0c5] disabled
910 05:03:44.926821 PCI: 00:19.1 [8086/0000] bus ops
911 05:03:44.930168 PCI: 00:19.1 [8086/a0c6] enabled
912 05:03:44.933394 PCI: 00:1d.0 [8086/0000] bus ops
913 05:03:44.936467 PCI: 00:1d.0 [8086/a0b0] enabled
914 05:03:44.940379 PCI: 00:1e.0 [8086/0000] ops
915 05:03:44.943331 PCI: 00:1e.0 [8086/a0a8] enabled
916 05:03:44.946911 PCI: 00:1e.2 [8086/0000] bus ops
917 05:03:44.950214 PCI: 00:1e.2 [8086/a0aa] enabled
918 05:03:44.953741 PCI: 00:1e.3 [8086/0000] bus ops
919 05:03:44.956827 PCI: 00:1e.3 [8086/a0ab] enabled
920 05:03:44.960398 PCI: 00:1f.0 [8086/0000] bus ops
921 05:03:44.963076 PCI: 00:1f.0 [8086/a087] enabled
922 05:03:44.963216 RTC Init
923 05:03:44.966759 Set power on after power failure.
924 05:03:44.969981 Disabling Deep S3
925 05:03:44.970146 Disabling Deep S3
926 05:03:44.973343 Disabling Deep S4
927 05:03:44.973563 Disabling Deep S4
928 05:03:44.976762 Disabling Deep S5
929 05:03:44.976937 Disabling Deep S5
930 05:03:44.979514
931 05:03:44.979614 PCI: 00:1f.2 [0000/0000] hidden
932 05:03:44.983297 PCI: 00:1f.3 [8086/0000] bus ops
933 05:03:44.986592 PCI: 00:1f.3 [8086/a0c8] enabled
934 05:03:44.989747 PCI: 00:1f.5 [8086/0000] bus ops
935 05:03:44.993193 PCI: 00:1f.5 [8086/a0a4] enabled
936 05:03:44.996485 PCI: Leftover static devices:
937 05:03:45.000220 PCI: 00:10.2
938 05:03:45.000434 PCI: 00:10.6
939 05:03:45.003306 PCI: 00:10.7
940 05:03:45.003535 PCI: 00:06.0
941 05:03:45.003655 PCI: 00:07.1
942 05:03:45.006621 PCI: 00:07.2
943 05:03:45.006790 PCI: 00:07.3
944 05:03:45.009706 PCI: 00:09.0
945 05:03:45.009887 PCI: 00:0d.1
946 05:03:45.013381 PCI: 00:0d.2
947 05:03:45.013674 PCI: 00:0d.3
948 05:03:45.013844 PCI: 00:0e.0
949 05:03:45.017119 PCI: 00:12.0
950 05:03:45.017423 PCI: 00:12.6
951 05:03:45.019803 PCI: 00:13.0
952 05:03:45.020107 PCI: 00:14.1
953 05:03:45.020287 PCI: 00:16.1
954 05:03:45.023247 PCI: 00:16.2
955 05:03:45.023596 PCI: 00:16.3
956 05:03:45.026604 PCI: 00:16.4
957 05:03:45.027011 PCI: 00:16.5
958 05:03:45.030082 PCI: 00:17.0
959 05:03:45.030501 PCI: 00:19.2
960 05:03:45.030759 PCI: 00:1e.1
961 05:03:45.032859 PCI: 00:1f.1
962 05:03:45.033237 PCI: 00:1f.4
963 05:03:45.036438 PCI: 00:1f.6
964 05:03:45.036813 PCI: 00:1f.7
965 05:03:45.039720 PCI: Check your devicetree.cb.
966 05:03:45.042912 PCI: 00:02.0 scanning...
967 05:03:45.046266 scan_generic_bus for PCI: 00:02.0
968 05:03:45.049416 scan_generic_bus for PCI: 00:02.0 done
969 05:03:45.053171 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
970 05:03:45.056569
971 05:03:45.057094 PCI: 00:04.0 scanning...
972 05:03:45.059757 scan_generic_bus for PCI: 00:04.0
973 05:03:45.062740 GENERIC: 0.0 enabled
974 05:03:45.069268 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
975 05:03:45.072689 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
976 05:03:45.076134 PCI: 00:0d.0 scanning...
977 05:03:45.079339 scan_static_bus for PCI: 00:0d.0
978 05:03:45.082532 USB0 port 0 enabled
979 05:03:45.082950 USB0 port 0 scanning...
980 05:03:45.085739
981 05:03:45.089165 scan_static_bus for USB0 port 0
982 05:03:45.089758 USB3 port 0 enabled
983 05:03:45.092305 USB3 port 1 enabled
984 05:03:45.092729 USB3 port 2 disabled
985 05:03:45.095432 USB3 port 3 disabled
986 05:03:45.099080 USB3 port 0 scanning...
987 05:03:45.102401 scan_static_bus for USB3 port 0
988 05:03:45.105749 scan_static_bus for USB3 port 0 done
989 05:03:45.108945 scan_bus: bus USB3 port 0 finished in 6 msecs
990 05:03:45.112663 USB3 port 1 scanning...
991 05:03:45.115676 scan_static_bus for USB3 port 1
992 05:03:45.119108 scan_static_bus for USB3 port 1 done
993 05:03:45.125732 scan_bus: bus USB3 port 1 finished in 6 msecs
994 05:03:45.128838 scan_static_bus for USB0 port 0 done
995 05:03:45.132309 scan_bus: bus USB0 port 0 finished in 43 msecs
996 05:03:45.134903 scan_static_bus for PCI: 00:0d.0 done
997 05:03:45.138965
998 05:03:45.142163 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
999 05:03:45.145343 PCI: 00:14.0 scanning...
1000 05:03:45.148720 scan_static_bus for PCI: 00:14.0
1001 05:03:45.149264 USB0 port 0 enabled
1002 05:03:45.152185 USB0 port 0 scanning...
1003 05:03:45.155252 scan_static_bus for USB0 port 0
1004 05:03:45.158497 USB2 port 0 disabled
1005 05:03:45.159143 USB2 port 1 enabled
1006 05:03:45.161471
1007 05:03:45.161960 USB2 port 2 enabled
1008 05:03:45.164826 USB2 port 3 disabled
1009 05:03:45.165284 USB2 port 4 enabled
1010 05:03:45.168149 USB2 port 5 disabled
1011 05:03:45.171675 USB2 port 6 disabled
1012 05:03:45.172122 USB2 port 7 disabled
1013 05:03:45.174673 USB2 port 8 disabled
1014 05:03:45.178301 USB2 port 9 disabled
1015 05:03:45.178888 USB3 port 0 disabled
1016 05:03:45.181149 USB3 port 1 enabled
1017 05:03:45.184349 USB3 port 2 disabled
1018 05:03:45.184848 USB3 port 3 disabled
1019 05:03:45.187870 USB2 port 1 scanning...
1020 05:03:45.191787 scan_static_bus for USB2 port 1
1021 05:03:45.194241 scan_static_bus for USB2 port 1 done
1022 05:03:45.201222 scan_bus: bus USB2 port 1 finished in 6 msecs
1023 05:03:45.201825 USB2 port 2 scanning...
1024 05:03:45.204460 scan_static_bus for USB2 port 2
1025 05:03:45.207735 scan_static_bus for USB2 port 2 done
1026 05:03:45.214477 scan_bus: bus USB2 port 2 finished in 6 msecs
1027 05:03:45.218211 USB2 port 4 scanning...
1028 05:03:45.221208 scan_static_bus for USB2 port 4
1029 05:03:45.224396 scan_static_bus for USB2 port 4 done
1030 05:03:45.227789 scan_bus: bus USB2 port 4 finished in 6 msecs
1031 05:03:45.231300 USB3 port 1 scanning...
1032 05:03:45.234362 scan_static_bus for USB3 port 1
1033 05:03:45.237646 scan_static_bus for USB3 port 1 done
1034 05:03:45.241163 scan_bus: bus USB3 port 1 finished in 6 msecs
1035 05:03:45.247651 scan_static_bus for USB0 port 0 done
1036 05:03:45.251035 scan_bus: bus USB0 port 0 finished in 93 msecs
1037 05:03:45.254142 scan_static_bus for PCI: 00:14.0 done
1038 05:03:45.260947 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1039 05:03:45.261537 PCI: 00:14.3 scanning...
1040 05:03:45.263845 scan_static_bus for PCI: 00:14.3
1041 05:03:45.267306 GENERIC: 0.0 enabled
1042 05:03:45.270427 scan_static_bus for PCI: 00:14.3 done
1043 05:03:45.277219 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1044 05:03:45.277807 PCI: 00:15.0 scanning...
1045 05:03:45.280603 scan_static_bus for PCI: 00:15.0
1046 05:03:45.284345 I2C: 00:1a enabled
1047 05:03:45.287982 I2C: 00:31 enabled
1048 05:03:45.288429 I2C: 00:32 enabled
1049 05:03:45.291152 scan_static_bus for PCI: 00:15.0 done
1050 05:03:45.297710 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1051 05:03:45.298160 PCI: 00:15.1 scanning...
1052 05:03:45.301144 scan_static_bus for PCI: 00:15.1
1053 05:03:45.304506 I2C: 00:10 enabled
1054 05:03:45.307765 scan_static_bus for PCI: 00:15.1 done
1055 05:03:45.314625 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1056 05:03:45.315187 PCI: 00:15.2 scanning...
1057 05:03:45.317873 scan_static_bus for PCI: 00:15.2
1058 05:03:45.324462 scan_static_bus for PCI: 00:15.2 done
1059 05:03:45.327938 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1060 05:03:45.331141 PCI: 00:15.3 scanning...
1061 05:03:45.334683 scan_static_bus for PCI: 00:15.3
1062 05:03:45.337811 scan_static_bus for PCI: 00:15.3 done
1063 05:03:45.341100 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1064 05:03:45.344419 PCI: 00:19.1 scanning...
1065 05:03:45.347434 scan_static_bus for PCI: 00:19.1
1066 05:03:45.351205 I2C: 00:15 enabled
1067 05:03:45.354389 scan_static_bus for PCI: 00:19.1 done
1068 05:03:45.357632 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1069 05:03:45.360868 PCI: 00:1d.0 scanning...
1070 05:03:45.364204 do_pci_scan_bridge for PCI: 00:1d.0
1071 05:03:45.367385 PCI: pci_scan_bus for bus 01
1072 05:03:45.370933 PCI: 01:00.0 [1c5c/174a] enabled
1073 05:03:45.374219 GENERIC: 0.0 enabled
1074 05:03:45.377265 Enabling Common Clock Configuration
1075 05:03:45.380300 L1 Sub-State supported from root port 29
1076 05:03:45.383940 L1 Sub-State Support = 0xf
1077 05:03:45.387512 CommonModeRestoreTime = 0x28
1078 05:03:45.390481 Power On Value = 0x16, Power On Scale = 0x0
1079 05:03:45.393755 ASPM: Enabled L1
1080 05:03:45.396970 PCIe: Max_Payload_Size adjusted to 128
1081 05:03:45.403669 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1082 05:03:45.404120 PCI: 00:1e.2 scanning...
1083 05:03:45.406775 scan_generic_bus for PCI: 00:1e.2
1084 05:03:45.410487
1085 05:03:45.411040 SPI: 00 enabled
1086 05:03:45.416925 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1087 05:03:45.420381 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1088 05:03:45.423259 PCI: 00:1e.3 scanning...
1089 05:03:45.426793 scan_generic_bus for PCI: 00:1e.3
1090 05:03:45.429802 SPI: 00 enabled
1091 05:03:45.433713 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1092 05:03:45.436868
1093 05:03:45.440210 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1094 05:03:45.443278 PCI: 00:1f.0 scanning...
1095 05:03:45.446536 scan_static_bus for PCI: 00:1f.0
1096 05:03:45.447084 PNP: 0c09.0 enabled
1097 05:03:45.449966 PNP: 0c09.0 scanning...
1098 05:03:45.453465 scan_static_bus for PNP: 0c09.0
1099 05:03:45.456987 scan_static_bus for PNP: 0c09.0 done
1100 05:03:45.463409 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1101 05:03:45.466734 scan_static_bus for PCI: 00:1f.0 done
1102 05:03:45.469668 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1103 05:03:45.473108 PCI: 00:1f.2 scanning...
1104 05:03:45.476674 scan_static_bus for PCI: 00:1f.2
1105 05:03:45.479630 GENERIC: 0.0 enabled
1106 05:03:45.482686 GENERIC: 0.0 scanning...
1107 05:03:45.485997 scan_static_bus for GENERIC: 0.0
1108 05:03:45.486445 GENERIC: 0.0 enabled
1109 05:03:45.489715 GENERIC: 1.0 enabled
1110 05:03:45.492813 scan_static_bus for GENERIC: 0.0 done
1111 05:03:45.499326 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1112 05:03:45.503306 scan_static_bus for PCI: 00:1f.2 done
1113 05:03:45.505979 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1114 05:03:45.509313 PCI: 00:1f.3 scanning...
1115 05:03:45.512686 scan_static_bus for PCI: 00:1f.3
1116 05:03:45.515915 scan_static_bus for PCI: 00:1f.3 done
1117 05:03:45.522885 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1118 05:03:45.523447 PCI: 00:1f.5 scanning...
1119 05:03:45.526142 scan_generic_bus for PCI: 00:1f.5
1120 05:03:45.532540 scan_generic_bus for PCI: 00:1f.5 done
1121 05:03:45.536082 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1122 05:03:45.542671 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1123 05:03:45.546042 scan_static_bus for Root Device done
1124 05:03:45.549183 scan_bus: bus Root Device finished in 737 msecs
1125 05:03:45.549779 done
1126 05:03:45.556086 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1127 05:03:45.559614 Chrome EC: UHEPI supported
1128 05:03:45.565536 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1129 05:03:45.572201 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1130 05:03:45.575440 SPI flash protection: WPSW=0 SRP0=0
1131 05:03:45.579070 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1132 05:03:45.585157 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1133 05:03:45.588715 found VGA at PCI: 00:02.0
1134 05:03:45.592028 Setting up VGA for PCI: 00:02.0
1135 05:03:45.595254 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1136 05:03:45.599021
1137 05:03:45.601961 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1138 05:03:45.605216 Allocating resources...
1139 05:03:45.605646 Reading resources...
1140 05:03:45.612213 Root Device read_resources bus 0 link: 0
1141 05:03:45.615404 DOMAIN: 0000 read_resources bus 0 link: 0
1142 05:03:45.618442 PCI: 00:04.0 read_resources bus 1 link: 0
1143 05:03:45.621867
1144 05:03:45.625407 PCI: 00:04.0 read_resources bus 1 link: 0 done
1145 05:03:45.632199 PCI: 00:0d.0 read_resources bus 0 link: 0
1146 05:03:45.635325 USB0 port 0 read_resources bus 0 link: 0
1147 05:03:45.641948 USB0 port 0 read_resources bus 0 link: 0 done
1148 05:03:45.645021 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1149 05:03:45.648651 PCI: 00:14.0 read_resources bus 0 link: 0
1150 05:03:45.655283 USB0 port 0 read_resources bus 0 link: 0
1151 05:03:45.658377 USB0 port 0 read_resources bus 0 link: 0 done
1152 05:03:45.665363 PCI: 00:14.0 read_resources bus 0 link: 0 done
1153 05:03:45.667940 PCI: 00:14.3 read_resources bus 0 link: 0
1154 05:03:45.674853 PCI: 00:14.3 read_resources bus 0 link: 0 done
1155 05:03:45.678442 PCI: 00:15.0 read_resources bus 0 link: 0
1156 05:03:45.685231 PCI: 00:15.0 read_resources bus 0 link: 0 done
1157 05:03:45.688284 PCI: 00:15.1 read_resources bus 0 link: 0
1158 05:03:45.694548 PCI: 00:15.1 read_resources bus 0 link: 0 done
1159 05:03:45.701374 PCI: 00:19.1 read_resources bus 0 link: 0
1160 05:03:45.704501 PCI: 00:19.1 read_resources bus 0 link: 0 done
1161 05:03:45.707641 PCI: 00:1d.0 read_resources bus 1 link: 0
1162 05:03:45.715618 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1163 05:03:45.718817 PCI: 00:1e.2 read_resources bus 2 link: 0
1164 05:03:45.725393 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1165 05:03:45.728920 PCI: 00:1e.3 read_resources bus 3 link: 0
1166 05:03:45.735544 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1167 05:03:45.738643 PCI: 00:1f.0 read_resources bus 0 link: 0
1168 05:03:45.745203 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1169 05:03:45.749094 PCI: 00:1f.2 read_resources bus 0 link: 0
1170 05:03:45.752015 GENERIC: 0.0 read_resources bus 0 link: 0
1171 05:03:45.759464 GENERIC: 0.0 read_resources bus 0 link: 0 done
1172 05:03:45.762488 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1173 05:03:45.769533 DOMAIN: 0000 read_resources bus 0 link: 0 done
1174 05:03:45.772605 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1175 05:03:45.779415 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1176 05:03:45.782583 Root Device read_resources bus 0 link: 0 done
1177 05:03:45.785980 Done reading resources.
1178 05:03:45.792446 Show resources in subtree (Root Device)...After reading.
1179 05:03:45.795898 Root Device child on link 0 DOMAIN: 0000
1180 05:03:45.799353 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1181 05:03:45.808896 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1182 05:03:45.818721 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1183 05:03:45.822483 PCI: 00:00.0
1184 05:03:45.832346 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1185 05:03:45.839040 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1186 05:03:45.849318 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1187 05:03:45.858748 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1188 05:03:45.869124 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1189 05:03:45.879688 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1190 05:03:45.888847 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1191 05:03:45.894974 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1192 05:03:45.905118 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1193 05:03:45.915015 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1194 05:03:45.924924 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1195 05:03:45.935165 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1196 05:03:45.945248 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1197 05:03:45.951761 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1198 05:03:45.961274 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1199 05:03:45.971334 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1200 05:03:45.981170 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1201 05:03:45.991543 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1202 05:03:46.000624 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1203 05:03:46.010768 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1204 05:03:46.011232 PCI: 00:02.0
1205 05:03:46.020530 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1206 05:03:46.030448 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1207 05:03:46.040288 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1208 05:03:46.043777 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1209 05:03:46.053763 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1210 05:03:46.056449 GENERIC: 0.0
1211 05:03:46.056560 PCI: 00:05.0
1212 05:03:46.066324 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1213 05:03:46.073488 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1214 05:03:46.073581 GENERIC: 0.0
1215 05:03:46.076843 PCI: 00:08.0
1216 05:03:46.086276 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1217 05:03:46.086378 PCI: 00:0a.0
1218 05:03:46.093260 PCI: 00:0d.0 child on link 0 USB0 port 0
1219 05:03:46.102707 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1220 05:03:46.106306 USB0 port 0 child on link 0 USB3 port 0
1221 05:03:46.109512 USB3 port 0
1222 05:03:46.109612 USB3 port 1
1223 05:03:46.112861 USB3 port 2
1224 05:03:46.112949 USB3 port 3
1225 05:03:46.119697 PCI: 00:14.0 child on link 0 USB0 port 0
1226 05:03:46.129574 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1227 05:03:46.133160 USB0 port 0 child on link 0 USB2 port 0
1228 05:03:46.133322 USB2 port 0
1229 05:03:46.136076 USB2 port 1
1230 05:03:46.136243 USB2 port 2
1231 05:03:46.139822 USB2 port 3
1232 05:03:46.143084 USB2 port 4
1233 05:03:46.143250 USB2 port 5
1234 05:03:46.145961 USB2 port 6
1235 05:03:46.146135 USB2 port 7
1236 05:03:46.149166 USB2 port 8
1237 05:03:46.149265 USB2 port 9
1238 05:03:46.152372 USB3 port 0
1239 05:03:46.152538 USB3 port 1
1240 05:03:46.155823 USB3 port 2
1241 05:03:46.155992 USB3 port 3
1242 05:03:46.159257 PCI: 00:14.2
1243 05:03:46.168838 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1244 05:03:46.178890 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1245 05:03:46.181973 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1246 05:03:46.192159 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1247 05:03:46.195504 GENERIC: 0.0
1248 05:03:46.198988 PCI: 00:15.0 child on link 0 I2C: 00:1a
1249 05:03:46.208710 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1250 05:03:46.211924 I2C: 00:1a
1251 05:03:46.212217 I2C: 00:31
1252 05:03:46.215105 I2C: 00:32
1253 05:03:46.218477 PCI: 00:15.1 child on link 0 I2C: 00:10
1254 05:03:46.228769 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1255 05:03:46.229261 I2C: 00:10
1256 05:03:46.232308 PCI: 00:15.2
1257 05:03:46.242452 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1258 05:03:46.242998 PCI: 00:15.3
1259 05:03:46.252108 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1260 05:03:46.255516 PCI: 00:16.0
1261 05:03:46.265663 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1262 05:03:46.266222 PCI: 00:19.0
1263 05:03:46.271650 PCI: 00:19.1 child on link 0 I2C: 00:15
1264 05:03:46.281893 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1265 05:03:46.282445 I2C: 00:15
1266 05:03:46.288178 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1267 05:03:46.294574 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1268 05:03:46.304767 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1269 05:03:46.314344 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1270 05:03:46.314901 GENERIC: 0.0
1271 05:03:46.317931
1272 05:03:46.318397 PCI: 01:00.0
1273 05:03:46.327805 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1274 05:03:46.337817 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1275 05:03:46.347525 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1276 05:03:46.348079 PCI: 00:1e.0
1277 05:03:46.360955 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1278 05:03:46.364695 PCI: 00:1e.2 child on link 0 SPI: 00
1279 05:03:46.374078 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1280 05:03:46.374632 SPI: 00
1281 05:03:46.377911 PCI: 00:1e.3 child on link 0 SPI: 00
1282 05:03:46.387145 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1283 05:03:46.390433 SPI: 00
1284 05:03:46.393583 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1285 05:03:46.403808 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1286 05:03:46.404367 PNP: 0c09.0
1287 05:03:46.413629 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1288 05:03:46.416928 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1289 05:03:46.426534 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1290 05:03:46.436873 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1291 05:03:46.440462 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1292 05:03:46.443453 GENERIC: 0.0
1293 05:03:46.444004 GENERIC: 1.0
1294 05:03:46.446179 PCI: 00:1f.3
1295 05:03:46.456509 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1296 05:03:46.466292 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1297 05:03:46.469577 PCI: 00:1f.5
1298 05:03:46.476363 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1299 05:03:46.483019 CPU_CLUSTER: 0 child on link 0 APIC: 00
1300 05:03:46.483573 APIC: 00
1301 05:03:46.484034 APIC: 01
1302 05:03:46.485895 APIC: 03
1303 05:03:46.486348 APIC: 07
1304 05:03:46.489383 APIC: 05
1305 05:03:46.489870 APIC: 04
1306 05:03:46.490311 APIC: 02
1307 05:03:46.492973 APIC: 06
1308 05:03:46.499631 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1309 05:03:46.506013 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1310 05:03:46.512658 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1311 05:03:46.516151 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1312 05:03:46.522330 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1313 05:03:46.525694 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1314 05:03:46.529563 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1315 05:03:46.535955 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1316 05:03:46.545584 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1317 05:03:46.552710 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1318 05:03:46.559463 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1319 05:03:46.565898 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1320 05:03:46.572712 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1321 05:03:46.582149 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1322 05:03:46.588451 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1323 05:03:46.591730 DOMAIN: 0000: Resource ranges:
1324 05:03:46.594934 * Base: 1000, Size: 800, Tag: 100
1325 05:03:46.598262 * Base: 1900, Size: e700, Tag: 100
1326 05:03:46.605051 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1327 05:03:46.611803 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1328 05:03:46.618507 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1329 05:03:46.625314 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1330 05:03:46.631857 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1331 05:03:46.641472 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1332 05:03:46.647913 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1333 05:03:46.654981 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1334 05:03:46.665198 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1335 05:03:46.671163 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1336 05:03:46.677924 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1337 05:03:46.687933 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1338 05:03:46.694361 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1339 05:03:46.700910 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1340 05:03:46.711080 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1341 05:03:46.717546 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1342 05:03:46.724424 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1343 05:03:46.734109 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1344 05:03:46.740574 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1345 05:03:46.747580 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1346 05:03:46.757340 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1347 05:03:46.764078 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1348 05:03:46.770523 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1349 05:03:46.780228 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1350 05:03:46.786777 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1351 05:03:46.790077 DOMAIN: 0000: Resource ranges:
1352 05:03:46.793455 * Base: 7fc00000, Size: 40400000, Tag: 200
1353 05:03:46.800274 * Base: d0000000, Size: 28000000, Tag: 200
1354 05:03:46.803719 * Base: fa000000, Size: 1000000, Tag: 200
1355 05:03:46.807017 * Base: fb001000, Size: 2fff000, Tag: 200
1356 05:03:46.813671 * Base: fe010000, Size: 2e000, Tag: 200
1357 05:03:46.816728 * Base: fe03f000, Size: d41000, Tag: 200
1358 05:03:46.819998 * Base: fed88000, Size: 8000, Tag: 200
1359 05:03:46.823576 * Base: fed93000, Size: d000, Tag: 200
1360 05:03:46.826728 * Base: feda2000, Size: 1e000, Tag: 200
1361 05:03:46.830359
1362 05:03:46.833113 * Base: fede0000, Size: 1220000, Tag: 200
1363 05:03:46.836598 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1364 05:03:46.842925 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1365 05:03:46.849742 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1366 05:03:46.856074 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1367 05:03:46.863065 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1368 05:03:46.869326 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1369 05:03:46.876505 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1370 05:03:46.883140 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1371 05:03:46.889265 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1372 05:03:46.896344 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1373 05:03:46.902516 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1374 05:03:46.912017 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1375 05:03:46.918658 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1376 05:03:46.925215 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1377 05:03:46.931922 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1378 05:03:46.938796 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1379 05:03:46.945284 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1380 05:03:46.951908 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1381 05:03:46.958635 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1382 05:03:46.965180 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1383 05:03:46.971728 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1384 05:03:46.978308 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1385 05:03:46.985656 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1386 05:03:46.991642 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1387 05:03:46.998223 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1388 05:03:47.001595 PCI: 00:1d.0: Resource ranges:
1389 05:03:47.004775 * Base: 7fc00000, Size: 100000, Tag: 200
1390 05:03:47.011685 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1391 05:03:47.018353 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1392 05:03:47.025108 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1393 05:03:47.034657 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1394 05:03:47.041537 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1395 05:03:47.044685 Root Device assign_resources, bus 0 link: 0
1396 05:03:47.048183
1397 05:03:47.051009 DOMAIN: 0000 assign_resources, bus 0 link: 0
1398 05:03:47.058069 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1399 05:03:47.061918
1400 05:03:47.068176 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1401 05:03:47.074360 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1402 05:03:47.084701 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1403 05:03:47.087736 PCI: 00:04.0 assign_resources, bus 1 link: 0
1404 05:03:47.094410 PCI: 00:04.0 assign_resources, bus 1 link: 0
1405 05:03:47.101159 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1406 05:03:47.110828 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1407 05:03:47.117398 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1408 05:03:47.121310 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1409 05:03:47.127462 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1410 05:03:47.134304 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1411 05:03:47.141104 PCI: 00:14.0 assign_resources, bus 0 link: 0
1412 05:03:47.144256 PCI: 00:14.0 assign_resources, bus 0 link: 0
1413 05:03:47.154579 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1414 05:03:47.160991 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1415 05:03:47.170960 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1416 05:03:47.174194 PCI: 00:14.3 assign_resources, bus 0 link: 0
1417 05:03:47.177394 PCI: 00:14.3 assign_resources, bus 0 link: 0
1418 05:03:47.187069 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1419 05:03:47.190231 PCI: 00:15.0 assign_resources, bus 0 link: 0
1420 05:03:47.196823 PCI: 00:15.0 assign_resources, bus 0 link: 0
1421 05:03:47.203812 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1422 05:03:47.206812 PCI: 00:15.1 assign_resources, bus 0 link: 0
1423 05:03:47.213662 PCI: 00:15.1 assign_resources, bus 0 link: 0
1424 05:03:47.220427 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1425 05:03:47.230820 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1426 05:03:47.236723 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1427 05:03:47.246899 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1428 05:03:47.250195 PCI: 00:19.1 assign_resources, bus 0 link: 0
1429 05:03:47.256846 PCI: 00:19.1 assign_resources, bus 0 link: 0
1430 05:03:47.263480 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1431 05:03:47.273464 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1432 05:03:47.283297 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1433 05:03:47.286636 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1434 05:03:47.296419 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1435 05:03:47.303378 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1436 05:03:47.309611 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1437 05:03:47.316864 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1438 05:03:47.323484 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1439 05:03:47.329736 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1440 05:03:47.333089 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1441 05:03:47.342813 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1442 05:03:47.345812 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1443 05:03:47.349451 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1444 05:03:47.356477 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1445 05:03:47.359789 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1446 05:03:47.366411 LPC: Trying to open IO window from 800 size 1ff
1447 05:03:47.372904 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1448 05:03:47.382810 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1449 05:03:47.389327 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1450 05:03:47.396309 DOMAIN: 0000 assign_resources, bus 0 link: 0
1451 05:03:47.398953 Root Device assign_resources, bus 0 link: 0
1452 05:03:47.402442 Done setting resources.
1453 05:03:47.409248 Show resources in subtree (Root Device)...After assigning values.
1454 05:03:47.412576 Root Device child on link 0 DOMAIN: 0000
1455 05:03:47.415919 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1456 05:03:47.425391 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1457 05:03:47.435954 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1458 05:03:47.438718 PCI: 00:00.0
1459 05:03:47.448569 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1460 05:03:47.455205 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1461 05:03:47.465562 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1462 05:03:47.475419 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1463 05:03:47.485400 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1464 05:03:47.494688 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1465 05:03:47.505145 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1466 05:03:47.511538 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1467 05:03:47.521336 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1468 05:03:47.531649 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1469 05:03:47.541142 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1470 05:03:47.550989 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1471 05:03:47.561176 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1472 05:03:47.567535 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1473 05:03:47.577530 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1474 05:03:47.587685 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1475 05:03:47.597693 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1476 05:03:47.607595 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1477 05:03:47.617408 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1478 05:03:47.627237 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1479 05:03:47.627828 PCI: 00:02.0
1480 05:03:47.637008 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1481 05:03:47.650467 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1482 05:03:47.657086 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1483 05:03:47.663580 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1484 05:03:47.673313 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1485 05:03:47.674002 GENERIC: 0.0
1486 05:03:47.676686 PCI: 00:05.0
1487 05:03:47.686435 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1488 05:03:47.693424 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1489 05:03:47.693969 GENERIC: 0.0
1490 05:03:47.696514 PCI: 00:08.0
1491 05:03:47.706664 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1492 05:03:47.707255 PCI: 00:0a.0
1493 05:03:47.712937 PCI: 00:0d.0 child on link 0 USB0 port 0
1494 05:03:47.722873 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1495 05:03:47.726419 USB0 port 0 child on link 0 USB3 port 0
1496 05:03:47.729686 USB3 port 0
1497 05:03:47.730399 USB3 port 1
1498 05:03:47.733293 USB3 port 2
1499 05:03:47.733919 USB3 port 3
1500 05:03:47.736377 PCI: 00:14.0 child on link 0 USB0 port 0
1501 05:03:47.739656
1502 05:03:47.749600 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1503 05:03:47.752477 USB0 port 0 child on link 0 USB2 port 0
1504 05:03:47.752961 USB2 port 0
1505 05:03:47.756134
1506 05:03:47.756614 USB2 port 1
1507 05:03:47.759599 USB2 port 2
1508 05:03:47.760086 USB2 port 3
1509 05:03:47.762732 USB2 port 4
1510 05:03:47.763315 USB2 port 5
1511 05:03:47.766341 USB2 port 6
1512 05:03:47.766930 USB2 port 7
1513 05:03:47.769167 USB2 port 8
1514 05:03:47.769787 USB2 port 9
1515 05:03:47.772501 USB3 port 0
1516 05:03:47.772978 USB3 port 1
1517 05:03:47.775922 USB3 port 2
1518 05:03:47.776434 USB3 port 3
1519 05:03:47.778801 PCI: 00:14.2
1520 05:03:47.788842 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1521 05:03:47.798828 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1522 05:03:47.805708 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1523 05:03:47.815291 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1524 05:03:47.815878 GENERIC: 0.0
1525 05:03:47.822118 PCI: 00:15.0 child on link 0 I2C: 00:1a
1526 05:03:47.832177 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1527 05:03:47.832932 I2C: 00:1a
1528 05:03:47.835461 I2C: 00:31
1529 05:03:47.836047 I2C: 00:32
1530 05:03:47.838521 PCI: 00:15.1 child on link 0 I2C: 00:10
1531 05:03:47.851785 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1532 05:03:47.852388 I2C: 00:10
1533 05:03:47.855066 PCI: 00:15.2
1534 05:03:47.865076 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1535 05:03:47.865704 PCI: 00:15.3
1536 05:03:47.874656 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1537 05:03:47.878345 PCI: 00:16.0
1538 05:03:47.887921 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1539 05:03:47.888514 PCI: 00:19.0
1540 05:03:47.894490 PCI: 00:19.1 child on link 0 I2C: 00:15
1541 05:03:47.904751 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1542 05:03:47.905350 I2C: 00:15
1543 05:03:47.911391 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1544 05:03:47.921846 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1545 05:03:47.930677 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1546 05:03:47.940805 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1547 05:03:47.944594 GENERIC: 0.0
1548 05:03:47.945180 PCI: 01:00.0
1549 05:03:47.954144 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1550 05:03:47.967006 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1551 05:03:47.977038 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1552 05:03:47.977656 PCI: 00:1e.0
1553 05:03:47.990879 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1554 05:03:47.993926 PCI: 00:1e.2 child on link 0 SPI: 00
1555 05:03:48.003793 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1556 05:03:48.004388 SPI: 00
1557 05:03:48.010226 PCI: 00:1e.3 child on link 0 SPI: 00
1558 05:03:48.020390 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1559 05:03:48.020983 SPI: 00
1560 05:03:48.023154 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1561 05:03:48.033312 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1562 05:03:48.037011 PNP: 0c09.0
1563 05:03:48.043605 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1564 05:03:48.050136 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1565 05:03:48.056497 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1566 05:03:48.066276 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1567 05:03:48.072705 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1568 05:03:48.073285 GENERIC: 0.0
1569 05:03:48.076246 GENERIC: 1.0
1570 05:03:48.076837 PCI: 00:1f.3
1571 05:03:48.086352 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1572 05:03:48.099476 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1573 05:03:48.100109 PCI: 00:1f.5
1574 05:03:48.109653 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1575 05:03:48.112686 CPU_CLUSTER: 0 child on link 0 APIC: 00
1576 05:03:48.115875
1577 05:03:48.116361 APIC: 00
1578 05:03:48.116741 APIC: 01
1579 05:03:48.119428 APIC: 03
1580 05:03:48.120020 APIC: 07
1581 05:03:48.120405 APIC: 05
1582 05:03:48.122697 APIC: 04
1583 05:03:48.123178 APIC: 02
1584 05:03:48.126173 APIC: 06
1585 05:03:48.126761 Done allocating resources.
1586 05:03:48.132281 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1587 05:03:48.139300 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1588 05:03:48.142137 Configure GPIOs for I2S audio on UP4.
1589 05:03:48.149969 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1590 05:03:48.152963 Enabling resources...
1591 05:03:48.155958 PCI: 00:00.0 subsystem <- 8086/9a12
1592 05:03:48.159989 PCI: 00:00.0 cmd <- 06
1593 05:03:48.162564 PCI: 00:02.0 subsystem <- 8086/9a40
1594 05:03:48.166234 PCI: 00:02.0 cmd <- 03
1595 05:03:48.169336 PCI: 00:04.0 subsystem <- 8086/9a03
1596 05:03:48.172798 PCI: 00:04.0 cmd <- 02
1597 05:03:48.175889 PCI: 00:05.0 subsystem <- 8086/9a19
1598 05:03:48.176374 PCI: 00:05.0 cmd <- 02
1599 05:03:48.182608 PCI: 00:08.0 subsystem <- 8086/9a11
1600 05:03:48.183197 PCI: 00:08.0 cmd <- 06
1601 05:03:48.185761 PCI: 00:0d.0 subsystem <- 8086/9a13
1602 05:03:48.189285 PCI: 00:0d.0 cmd <- 02
1603 05:03:48.192559 PCI: 00:14.0 subsystem <- 8086/a0ed
1604 05:03:48.196136 PCI: 00:14.0 cmd <- 02
1605 05:03:48.199203 PCI: 00:14.2 subsystem <- 8086/a0ef
1606 05:03:48.202295 PCI: 00:14.2 cmd <- 02
1607 05:03:48.206220 PCI: 00:14.3 subsystem <- 8086/a0f0
1608 05:03:48.209276 PCI: 00:14.3 cmd <- 02
1609 05:03:48.212859 PCI: 00:15.0 subsystem <- 8086/a0e8
1610 05:03:48.215696 PCI: 00:15.0 cmd <- 02
1611 05:03:48.219130 PCI: 00:15.1 subsystem <- 8086/a0e9
1612 05:03:48.222497 PCI: 00:15.1 cmd <- 02
1613 05:03:48.225463 PCI: 00:15.2 subsystem <- 8086/a0ea
1614 05:03:48.226078 PCI: 00:15.2 cmd <- 02
1615 05:03:48.232479 PCI: 00:15.3 subsystem <- 8086/a0eb
1616 05:03:48.232971 PCI: 00:15.3 cmd <- 02
1617 05:03:48.235583 PCI: 00:16.0 subsystem <- 8086/a0e0
1618 05:03:48.238944 PCI: 00:16.0 cmd <- 02
1619 05:03:48.242229 PCI: 00:19.1 subsystem <- 8086/a0c6
1620 05:03:48.245373 PCI: 00:19.1 cmd <- 02
1621 05:03:48.248971 PCI: 00:1d.0 bridge ctrl <- 0013
1622 05:03:48.252156 PCI: 00:1d.0 subsystem <- 8086/a0b0
1623 05:03:48.255558 PCI: 00:1d.0 cmd <- 06
1624 05:03:48.258910 PCI: 00:1e.0 subsystem <- 8086/a0a8
1625 05:03:48.262095 PCI: 00:1e.0 cmd <- 06
1626 05:03:48.265066 PCI: 00:1e.2 subsystem <- 8086/a0aa
1627 05:03:48.268514 PCI: 00:1e.2 cmd <- 06
1628 05:03:48.271783 PCI: 00:1e.3 subsystem <- 8086/a0ab
1629 05:03:48.275014 PCI: 00:1e.3 cmd <- 02
1630 05:03:48.278379 PCI: 00:1f.0 subsystem <- 8086/a087
1631 05:03:48.278966 PCI: 00:1f.0 cmd <- 407
1632 05:03:48.285505 PCI: 00:1f.3 subsystem <- 8086/a0c8
1633 05:03:48.286097 PCI: 00:1f.3 cmd <- 02
1634 05:03:48.288581 PCI: 00:1f.5 subsystem <- 8086/a0a4
1635 05:03:48.291958 PCI: 00:1f.5 cmd <- 406
1636 05:03:48.297110 PCI: 01:00.0 cmd <- 02
1637 05:03:48.301288 done.
1638 05:03:48.304931 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1639 05:03:48.308225 Initializing devices...
1640 05:03:48.311888 Root Device init
1641 05:03:48.314795 Chrome EC: Set SMI mask to 0x0000000000000000
1642 05:03:48.321466 Chrome EC: clear events_b mask to 0x0000000000000000
1643 05:03:48.328316 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1644 05:03:48.331365 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1645 05:03:48.337976 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1646 05:03:48.344952 Chrome EC: Set WAKE mask to 0x0000000000000000
1647 05:03:48.348003 fw_config match found: DB_USB=USB3_ACTIVE
1648 05:03:48.354831 Configure Right Type-C port orientation for retimer
1649 05:03:48.358008 Root Device init finished in 42 msecs
1650 05:03:48.361323 PCI: 00:00.0 init
1651 05:03:48.361948 CPU TDP = 9 Watts
1652 05:03:48.364675 CPU PL1 = 9 Watts
1653 05:03:48.367975 CPU PL2 = 40 Watts
1654 05:03:48.368557 CPU PL4 = 83 Watts
1655 05:03:48.371029 PCI: 00:00.0 init finished in 8 msecs
1656 05:03:48.374538 PCI: 00:02.0 init
1657 05:03:48.377656 GMA: Found VBT in CBFS
1658 05:03:48.381082 GMA: Found valid VBT in CBFS
1659 05:03:48.384572 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1660 05:03:48.394249 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1661 05:03:48.397768 PCI: 00:02.0 init finished in 18 msecs
1662 05:03:48.401165 PCI: 00:05.0 init
1663 05:03:48.404521 PCI: 00:05.0 init finished in 0 msecs
1664 05:03:48.405110 PCI: 00:08.0 init
1665 05:03:48.411003 PCI: 00:08.0 init finished in 0 msecs
1666 05:03:48.411591 PCI: 00:14.0 init
1667 05:03:48.418175 PCI: 00:14.0 init finished in 0 msecs
1668 05:03:48.418766 PCI: 00:14.2 init
1669 05:03:48.420815 PCI: 00:14.2 init finished in 0 msecs
1670 05:03:48.424986 PCI: 00:15.0 init
1671 05:03:48.427508 I2C bus 0 version 0x3230302a
1672 05:03:48.431073 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1673 05:03:48.435019 PCI: 00:15.0 init finished in 6 msecs
1674 05:03:48.437835 PCI: 00:15.1 init
1675 05:03:48.441220 I2C bus 1 version 0x3230302a
1676 05:03:48.444289 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1677 05:03:48.448196 PCI: 00:15.1 init finished in 6 msecs
1678 05:03:48.450936 PCI: 00:15.2 init
1679 05:03:48.454751 I2C bus 2 version 0x3230302a
1680 05:03:48.457722 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1681 05:03:48.461016 PCI: 00:15.2 init finished in 6 msecs
1682 05:03:48.461525 PCI: 00:15.3 init
1683 05:03:48.464177 I2C bus 3 version 0x3230302a
1684 05:03:48.468114 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1685 05:03:48.470901
1686 05:03:48.474235 PCI: 00:15.3 init finished in 6 msecs
1687 05:03:48.474720 PCI: 00:16.0 init
1688 05:03:48.477545 PCI: 00:16.0 init finished in 0 msecs
1689 05:03:48.481555 PCI: 00:19.1 init
1690 05:03:48.484845 I2C bus 5 version 0x3230302a
1691 05:03:48.488135 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1692 05:03:48.491089 PCI: 00:19.1 init finished in 6 msecs
1693 05:03:48.494310 PCI: 00:1d.0 init
1694 05:03:48.497571 Initializing PCH PCIe bridge.
1695 05:03:48.500947 PCI: 00:1d.0 init finished in 3 msecs
1696 05:03:48.504467 PCI: 00:1f.0 init
1697 05:03:48.508333 IOAPIC: Initializing IOAPIC at 0xfec00000
1698 05:03:48.514488 IOAPIC: Bootstrap Processor Local APIC = 0x00
1699 05:03:48.514981 IOAPIC: ID = 0x02
1700 05:03:48.517723 IOAPIC: Dumping registers
1701 05:03:48.521181 reg 0x0000: 0x02000000
1702 05:03:48.521810 reg 0x0001: 0x00770020
1703 05:03:48.524602 reg 0x0002: 0x00000000
1704 05:03:48.530848 PCI: 00:1f.0 init finished in 21 msecs
1705 05:03:48.531423 PCI: 00:1f.2 init
1706 05:03:48.534394 Disabling ACPI via APMC.
1707 05:03:48.537647 APMC done.
1708 05:03:48.541074 PCI: 00:1f.2 init finished in 5 msecs
1709 05:03:48.552756 PCI: 01:00.0 init
1710 05:03:48.556285 PCI: 01:00.0 init finished in 0 msecs
1711 05:03:48.559142 PNP: 0c09.0 init
1712 05:03:48.563122 Google Chrome EC uptime: 8.417 seconds
1713 05:03:48.569277 Google Chrome AP resets since EC boot: 0
1714 05:03:48.572915 Google Chrome most recent AP reset causes:
1715 05:03:48.579154 Google Chrome EC reset flags at last EC boot: reset-pin
1716 05:03:48.582684 PNP: 0c09.0 init finished in 18 msecs
1717 05:03:48.587368 Devices initialized
1718 05:03:48.590822 Show all devs... After init.
1719 05:03:48.593826 Root Device: enabled 1
1720 05:03:48.594316 DOMAIN: 0000: enabled 1
1721 05:03:48.597206 CPU_CLUSTER: 0: enabled 1
1722 05:03:48.600740 PCI: 00:00.0: enabled 1
1723 05:03:48.603777 PCI: 00:02.0: enabled 1
1724 05:03:48.604251 PCI: 00:04.0: enabled 1
1725 05:03:48.607504 PCI: 00:05.0: enabled 1
1726 05:03:48.610610 PCI: 00:06.0: enabled 0
1727 05:03:48.614111 PCI: 00:07.0: enabled 0
1728 05:03:48.614687 PCI: 00:07.1: enabled 0
1729 05:03:48.617349 PCI: 00:07.2: enabled 0
1730 05:03:48.621071 PCI: 00:07.3: enabled 0
1731 05:03:48.624394 PCI: 00:08.0: enabled 1
1732 05:03:48.624971 PCI: 00:09.0: enabled 0
1733 05:03:48.626955 PCI: 00:0a.0: enabled 0
1734 05:03:48.630445 PCI: 00:0d.0: enabled 1
1735 05:03:48.633984 PCI: 00:0d.1: enabled 0
1736 05:03:48.634559 PCI: 00:0d.2: enabled 0
1737 05:03:48.637619 PCI: 00:0d.3: enabled 0
1738 05:03:48.640564 PCI: 00:0e.0: enabled 0
1739 05:03:48.641135 PCI: 00:10.2: enabled 1
1740 05:03:48.643893 PCI: 00:10.6: enabled 0
1741 05:03:48.646909 PCI: 00:10.7: enabled 0
1742 05:03:48.650030 PCI: 00:12.0: enabled 0
1743 05:03:48.650503 PCI: 00:12.6: enabled 0
1744 05:03:48.653688 PCI: 00:13.0: enabled 0
1745 05:03:48.657768 PCI: 00:14.0: enabled 1
1746 05:03:48.660474 PCI: 00:14.1: enabled 0
1747 05:03:48.660948 PCI: 00:14.2: enabled 1
1748 05:03:48.663988 PCI: 00:14.3: enabled 1
1749 05:03:48.666990 PCI: 00:15.0: enabled 1
1750 05:03:48.670170 PCI: 00:15.1: enabled 1
1751 05:03:48.670744 PCI: 00:15.2: enabled 1
1752 05:03:48.673346 PCI: 00:15.3: enabled 1
1753 05:03:48.676653 PCI: 00:16.0: enabled 1
1754 05:03:48.677128 PCI: 00:16.1: enabled 0
1755 05:03:48.680568
1756 05:03:48.681151 PCI: 00:16.2: enabled 0
1757 05:03:48.683315 PCI: 00:16.3: enabled 0
1758 05:03:48.686700 PCI: 00:16.4: enabled 0
1759 05:03:48.687201 PCI: 00:16.5: enabled 0
1760 05:03:48.689900 PCI: 00:17.0: enabled 0
1761 05:03:48.693337 PCI: 00:19.0: enabled 0
1762 05:03:48.696707 PCI: 00:19.1: enabled 1
1763 05:03:48.697183 PCI: 00:19.2: enabled 0
1764 05:03:48.700092 PCI: 00:1c.0: enabled 1
1765 05:03:48.703228 PCI: 00:1c.1: enabled 0
1766 05:03:48.707154 PCI: 00:1c.2: enabled 0
1767 05:03:48.707734 PCI: 00:1c.3: enabled 0
1768 05:03:48.710455 PCI: 00:1c.4: enabled 0
1769 05:03:48.713520 PCI: 00:1c.5: enabled 0
1770 05:03:48.716977 PCI: 00:1c.6: enabled 1
1771 05:03:48.717596 PCI: 00:1c.7: enabled 0
1772 05:03:48.720766 PCI: 00:1d.0: enabled 1
1773 05:03:48.723241 PCI: 00:1d.1: enabled 0
1774 05:03:48.723715 PCI: 00:1d.2: enabled 1
1775 05:03:48.726614 PCI: 00:1d.3: enabled 0
1776 05:03:48.730094 PCI: 00:1e.0: enabled 1
1777 05:03:48.733836 PCI: 00:1e.1: enabled 0
1778 05:03:48.734415 PCI: 00:1e.2: enabled 1
1779 05:03:48.736724 PCI: 00:1e.3: enabled 1
1780 05:03:48.740221 PCI: 00:1f.0: enabled 1
1781 05:03:48.743295 PCI: 00:1f.1: enabled 0
1782 05:03:48.743871 PCI: 00:1f.2: enabled 1
1783 05:03:48.746789 PCI: 00:1f.3: enabled 1
1784 05:03:48.750112 PCI: 00:1f.4: enabled 0
1785 05:03:48.753131 PCI: 00:1f.5: enabled 1
1786 05:03:48.753667 PCI: 00:1f.6: enabled 0
1787 05:03:48.756677 PCI: 00:1f.7: enabled 0
1788 05:03:48.759955 APIC: 00: enabled 1
1789 05:03:48.760433 GENERIC: 0.0: enabled 1
1790 05:03:48.763123 GENERIC: 0.0: enabled 1
1791 05:03:48.766657 GENERIC: 1.0: enabled 1
1792 05:03:48.769926 GENERIC: 0.0: enabled 1
1793 05:03:48.770513 GENERIC: 1.0: enabled 1
1794 05:03:48.773343 USB0 port 0: enabled 1
1795 05:03:48.776437 GENERIC: 0.0: enabled 1
1796 05:03:48.776934 USB0 port 0: enabled 1
1797 05:03:48.779995 GENERIC: 0.0: enabled 1
1798 05:03:48.783096 I2C: 00:1a: enabled 1
1799 05:03:48.786228 I2C: 00:31: enabled 1
1800 05:03:48.786704 I2C: 00:32: enabled 1
1801 05:03:48.789949 I2C: 00:10: enabled 1
1802 05:03:48.792824 I2C: 00:15: enabled 1
1803 05:03:48.793302 GENERIC: 0.0: enabled 0
1804 05:03:48.796272 GENERIC: 1.0: enabled 0
1805 05:03:48.799569 GENERIC: 0.0: enabled 1
1806 05:03:48.800084 SPI: 00: enabled 1
1807 05:03:48.803117 SPI: 00: enabled 1
1808 05:03:48.806918 PNP: 0c09.0: enabled 1
1809 05:03:48.807497 GENERIC: 0.0: enabled 1
1810 05:03:48.809737 USB3 port 0: enabled 1
1811 05:03:48.813093 USB3 port 1: enabled 1
1812 05:03:48.816376 USB3 port 2: enabled 0
1813 05:03:48.816952 USB3 port 3: enabled 0
1814 05:03:48.819814 USB2 port 0: enabled 0
1815 05:03:48.823296 USB2 port 1: enabled 1
1816 05:03:48.823872 USB2 port 2: enabled 1
1817 05:03:48.826095 USB2 port 3: enabled 0
1818 05:03:48.830114 USB2 port 4: enabled 1
1819 05:03:48.830691 USB2 port 5: enabled 0
1820 05:03:48.833258 USB2 port 6: enabled 0
1821 05:03:48.836323 USB2 port 7: enabled 0
1822 05:03:48.839923 USB2 port 8: enabled 0
1823 05:03:48.840500 USB2 port 9: enabled 0
1824 05:03:48.842843 USB3 port 0: enabled 0
1825 05:03:48.846515 USB3 port 1: enabled 1
1826 05:03:48.847093 USB3 port 2: enabled 0
1827 05:03:48.849663 USB3 port 3: enabled 0
1828 05:03:48.852757 GENERIC: 0.0: enabled 1
1829 05:03:48.856437 GENERIC: 1.0: enabled 1
1830 05:03:48.857015 APIC: 01: enabled 1
1831 05:03:48.859393 APIC: 03: enabled 1
1832 05:03:48.859886 APIC: 07: enabled 1
1833 05:03:48.863120 APIC: 05: enabled 1
1834 05:03:48.866539 APIC: 04: enabled 1
1835 05:03:48.867116 APIC: 02: enabled 1
1836 05:03:48.869732 APIC: 06: enabled 1
1837 05:03:48.872921 PCI: 01:00.0: enabled 1
1838 05:03:48.876117 BS: BS_DEV_INIT run times (exec / console): 30 / 536 ms
1839 05:03:48.882491 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1840 05:03:48.885882 ELOG: NV offset 0xf30000 size 0x1000
1841 05:03:48.892665 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1842 05:03:48.899077 ELOG: Event(17) added with size 13 at 2023-01-18 05:03:48 UTC
1843 05:03:48.906030 ELOG: Event(92) added with size 9 at 2023-01-18 05:03:48 UTC
1844 05:03:48.912482 ELOG: Event(93) added with size 9 at 2023-01-18 05:03:48 UTC
1845 05:03:48.918896 ELOG: Event(9E) added with size 10 at 2023-01-18 05:03:48 UTC
1846 05:03:48.925860 ELOG: Event(9F) added with size 14 at 2023-01-18 05:03:48 UTC
1847 05:03:48.932032 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1848 05:03:48.938939 ELOG: Event(A1) added with size 10 at 2023-01-18 05:03:48 UTC
1849 05:03:48.945568 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1850 05:03:48.951935 ELOG: Event(A0) added with size 9 at 2023-01-18 05:03:48 UTC
1851 05:03:48.955165 elog_add_boot_reason: Logged dev mode boot
1852 05:03:48.961816 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1853 05:03:48.962315 Finalize devices...
1854 05:03:48.965208
1855 05:03:48.965822 Devices finalized
1856 05:03:48.971923 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1857 05:03:48.975067 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1858 05:03:48.981720 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1859 05:03:48.985015 ME: HFSTS1 : 0x80030055
1860 05:03:48.991322 ME: HFSTS2 : 0x30280116
1861 05:03:48.994521 ME: HFSTS3 : 0x00000050
1862 05:03:49.001192 ME: HFSTS4 : 0x00004000
1863 05:03:49.004617 ME: HFSTS5 : 0x00000000
1864 05:03:49.007955 ME: HFSTS6 : 0x00400006
1865 05:03:49.011095 ME: Manufacturing Mode : YES
1866 05:03:49.014516 ME: SPI Protection Mode Enabled : NO
1867 05:03:49.017842
1868 05:03:49.021139 ME: FW Partition Table : OK
1869 05:03:49.024447 ME: Bringup Loader Failure : NO
1870 05:03:49.027781 ME: Firmware Init Complete : NO
1871 05:03:49.031152 ME: Boot Options Present : NO
1872 05:03:49.034460 ME: Update In Progress : NO
1873 05:03:49.037777 ME: D0i3 Support : YES
1874 05:03:49.041181 ME: Low Power State Enabled : NO
1875 05:03:49.047969 ME: CPU Replaced : YES
1876 05:03:49.050784 ME: CPU Replacement Valid : YES
1877 05:03:49.054169 ME: Current Working State : 5
1878 05:03:49.057458 ME: Current Operation State : 1
1879 05:03:49.060455 ME: Current Operation Mode : 3
1880 05:03:49.064053 ME: Error Code : 0
1881 05:03:49.067557 ME: Enhanced Debug Mode : NO
1882 05:03:49.070602 ME: CPU Debug Disabled : YES
1883 05:03:49.074085 ME: TXT Support : NO
1884 05:03:49.080590 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1885 05:03:49.090903 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1886 05:03:49.093532 CBFS: 'fallback/slic' not found.
1887 05:03:49.096878 ACPI: Writing ACPI tables at 76b01000.
1888 05:03:49.097363 ACPI: * FACS
1889 05:03:49.100840 ACPI: * DSDT
1890 05:03:49.103599 Ramoops buffer: 0x100000@0x76a00000.
1891 05:03:49.107122 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1892 05:03:49.113960 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1893 05:03:49.117043 Google Chrome EC: version:
1894 05:03:49.120454 ro: voema_v2.0.10114-a447f03e46
1895 05:03:49.123764 rw: voema_v2.0.10114-a447f03e46
1896 05:03:49.124346 running image: 1
1897 05:03:49.127262
1898 05:03:49.130192 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1899 05:03:49.135775 ACPI: * FADT
1900 05:03:49.136348 SCI is IRQ9
1901 05:03:49.138976 ACPI: added table 1/32, length now 40
1902 05:03:49.142241
1903 05:03:49.142817 ACPI: * SSDT
1904 05:03:49.145395 Found 1 CPU(s) with 8 core(s) each.
1905 05:03:49.152242 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1906 05:03:49.155761 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1907 05:03:49.158817 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1908 05:03:49.161869 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1909 05:03:49.168558 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1910 05:03:49.175526 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1911 05:03:49.178151 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1912 05:03:49.185387 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1913 05:03:49.191903 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1914 05:03:49.194833 \_SB.PCI0.RP09: Added StorageD3Enable property
1915 05:03:49.198357 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1916 05:03:49.201453
1917 05:03:49.205164 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1918 05:03:49.211663 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1919 05:03:49.214782 PS2K: Passing 80 keymaps to kernel
1920 05:03:49.221815 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1921 05:03:49.227891 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1922 05:03:49.234996 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1923 05:03:49.241257 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1924 05:03:49.248126 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1925 05:03:49.254554 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1926 05:03:49.261177 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1927 05:03:49.268189 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1928 05:03:49.271128 ACPI: added table 2/32, length now 44
1929 05:03:49.271610 ACPI: * MCFG
1930 05:03:49.274351 ACPI: added table 3/32, length now 48
1931 05:03:49.277875 ACPI: * TPM2
1932 05:03:49.280793 TPM2 log created at 0x769f0000
1933 05:03:49.284507 ACPI: added table 4/32, length now 52
1934 05:03:49.287438 ACPI: * MADT
1935 05:03:49.287919 SCI is IRQ9
1936 05:03:49.290623 ACPI: added table 5/32, length now 56
1937 05:03:49.293848 current = 76b09850
1938 05:03:49.294330 ACPI: * DMAR
1939 05:03:49.297260 ACPI: added table 6/32, length now 60
1940 05:03:49.300482 ACPI: added table 7/32, length now 64
1941 05:03:49.304175 ACPI: * HPET
1942 05:03:49.307114 ACPI: added table 8/32, length now 68
1943 05:03:49.307593 ACPI: done.
1944 05:03:49.310817
1945 05:03:49.311398 ACPI tables: 35216 bytes.
1946 05:03:49.313787 smbios_write_tables: 769ef000
1947 05:03:49.317393 EC returned error result code 3
1948 05:03:49.320652 Couldn't obtain OEM name from CBI
1949 05:03:49.324175
1950 05:03:49.324752 Create SMBIOS type 16
1951 05:03:49.327413 Create SMBIOS type 17
1952 05:03:49.330666 GENERIC: 0.0 (WIFI Device)
1953 05:03:49.334681 SMBIOS tables: 1750 bytes.
1954 05:03:49.337603 Writing table forward entry at 0x00000500
1955 05:03:49.344205 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1956 05:03:49.347179 Writing coreboot table at 0x76b25000
1957 05:03:49.353605 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1958 05:03:49.356956 1. 0000000000001000-000000000009ffff: RAM
1959 05:03:49.363490 2. 00000000000a0000-00000000000fffff: RESERVED
1960 05:03:49.367042 3. 0000000000100000-00000000769eefff: RAM
1961 05:03:49.373332 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1962 05:03:49.376943 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1963 05:03:49.383758 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1964 05:03:49.386592 7. 0000000077000000-000000007fbfffff: RESERVED
1965 05:03:49.393248 8. 00000000c0000000-00000000cfffffff: RESERVED
1966 05:03:49.396668 9. 00000000f8000000-00000000f9ffffff: RESERVED
1967 05:03:49.403038 10. 00000000fb000000-00000000fb000fff: RESERVED
1968 05:03:49.406242 11. 00000000fe000000-00000000fe00ffff: RESERVED
1969 05:03:49.413313 12. 00000000fed80000-00000000fed87fff: RESERVED
1970 05:03:49.416547 13. 00000000fed90000-00000000fed92fff: RESERVED
1971 05:03:49.419942 14. 00000000feda0000-00000000feda1fff: RESERVED
1972 05:03:49.426839 15. 00000000fedc0000-00000000feddffff: RESERVED
1973 05:03:49.429517 16. 0000000100000000-00000002803fffff: RAM
1974 05:03:49.433300 Passing 4 GPIOs to payload:
1975 05:03:49.440277 NAME | PORT | POLARITY | VALUE
1976 05:03:49.443164 lid | undefined | high | high
1977 05:03:49.449557 power | undefined | high | low
1978 05:03:49.452569 oprom | undefined | high | low
1979 05:03:49.456095
1980 05:03:49.459476 EC in RW | 0x000000e5 | high | low
1981 05:03:49.466301 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 6543
1982 05:03:49.468991 coreboot table: 1576 bytes.
1983 05:03:49.472722 IMD ROOT 0. 0x76fff000 0x00001000
1984 05:03:49.475782 IMD SMALL 1. 0x76ffe000 0x00001000
1985 05:03:49.478937 FSP MEMORY 2. 0x76c4e000 0x003b0000
1986 05:03:49.482342 VPD 3. 0x76c4d000 0x00000367
1987 05:03:49.488820 RO MCACHE 4. 0x76c4c000 0x00000fdc
1988 05:03:49.491836 CONSOLE 5. 0x76c2c000 0x00020000
1989 05:03:49.495462 FMAP 6. 0x76c2b000 0x00000578
1990 05:03:49.498627 TIME STAMP 7. 0x76c2a000 0x00000910
1991 05:03:49.501896 VBOOT WORK 8. 0x76c16000 0x00014000
1992 05:03:49.505078 ROMSTG STCK 9. 0x76c15000 0x00001000
1993 05:03:49.508411 AFTER CAR 10. 0x76c0a000 0x0000b000
1994 05:03:49.514925 RAMSTAGE 11. 0x76b97000 0x00073000
1995 05:03:49.518555 REFCODE 12. 0x76b42000 0x00055000
1996 05:03:49.522034 SMM BACKUP 13. 0x76b32000 0x00010000
1997 05:03:49.525461 4f444749 14. 0x76b30000 0x00002000
1998 05:03:49.528519 EXT VBT15. 0x76b2d000 0x0000219f
1999 05:03:49.531673 COREBOOT 16. 0x76b25000 0x00008000
2000 05:03:49.535448 ACPI 17. 0x76b01000 0x00024000
2001 05:03:49.538446 ACPI GNVS 18. 0x76b00000 0x00001000
2002 05:03:49.541827 RAMOOPS 19. 0x76a00000 0x00100000
2003 05:03:49.548260 TPM2 TCGLOG20. 0x769f0000 0x00010000
2004 05:03:49.551377 SMBIOS 21. 0x769ef000 0x00000800
2005 05:03:49.551967 IMD small region:
2006 05:03:49.554672 IMD ROOT 0. 0x76ffec00 0x00000400
2007 05:03:49.561315 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2008 05:03:49.564673 POWER STATE 2. 0x76ffeb80 0x00000044
2009 05:03:49.567981 ROMSTAGE 3. 0x76ffeb60 0x00000004
2010 05:03:49.571365 MEM INFO 4. 0x76ffe980 0x000001e0
2011 05:03:49.577771 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
2012 05:03:49.580971 MTRR: Physical address space:
2013 05:03:49.587442 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2014 05:03:49.594027 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2015 05:03:49.601022 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2016 05:03:49.604498 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
2017 05:03:49.610549 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
2018 05:03:49.617459 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
2019 05:03:49.624235 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
2020 05:03:49.627605 MTRR: Fixed MSR 0x250 0x0606060606060606
2021 05:03:49.633794 MTRR: Fixed MSR 0x258 0x0606060606060606
2022 05:03:49.637284 MTRR: Fixed MSR 0x259 0x0000000000000000
2023 05:03:49.640423 MTRR: Fixed MSR 0x268 0x0606060606060606
2024 05:03:49.643623 MTRR: Fixed MSR 0x269 0x0606060606060606
2025 05:03:49.650375 MTRR: Fixed MSR 0x26a 0x0606060606060606
2026 05:03:49.653609 MTRR: Fixed MSR 0x26b 0x0606060606060606
2027 05:03:49.656982 MTRR: Fixed MSR 0x26c 0x0606060606060606
2028 05:03:49.660658 MTRR: Fixed MSR 0x26d 0x0606060606060606
2029 05:03:49.666617 MTRR: Fixed MSR 0x26e 0x0606060606060606
2030 05:03:49.670479 MTRR: Fixed MSR 0x26f 0x0606060606060606
2031 05:03:49.673210 call enable_fixed_mtrr()
2032 05:03:49.676588 CPU physical address size: 39 bits
2033 05:03:49.679863 MTRR: default type WB/UC MTRR counts: 6/6.
2034 05:03:49.683239 MTRR: UC selected as default type.
2035 05:03:49.690268 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2036 05:03:49.696631 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2037 05:03:49.702896 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2038 05:03:49.709553 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2039 05:03:49.716159 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2040 05:03:49.722997 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2041 05:03:49.723491
2042 05:03:49.726006 MTRR check
2043 05:03:49.726496 Fixed MTRRs : Enabled
2044 05:03:49.729862 Variable MTRRs: Enabled
2045 05:03:49.730477
2046 05:03:49.732956 MTRR: Fixed MSR 0x250 0x0606060606060606
2047 05:03:49.739875 MTRR: Fixed MSR 0x258 0x0606060606060606
2048 05:03:49.742407 MTRR: Fixed MSR 0x259 0x0000000000000000
2049 05:03:49.746156 MTRR: Fixed MSR 0x268 0x0606060606060606
2050 05:03:49.749756 MTRR: Fixed MSR 0x269 0x0606060606060606
2051 05:03:49.755833 MTRR: Fixed MSR 0x26a 0x0606060606060606
2052 05:03:49.759275 MTRR: Fixed MSR 0x26b 0x0606060606060606
2053 05:03:49.762659 MTRR: Fixed MSR 0x26c 0x0606060606060606
2054 05:03:49.765928 MTRR: Fixed MSR 0x26d 0x0606060606060606
2055 05:03:49.772527 MTRR: Fixed MSR 0x26e 0x0606060606060606
2056 05:03:49.775738 MTRR: Fixed MSR 0x26f 0x0606060606060606
2057 05:03:49.782795 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2058 05:03:49.786222 call enable_fixed_mtrr()
2059 05:03:49.789692 Checking cr50 for pending updates
2060 05:03:49.793057 CPU physical address size: 39 bits
2061 05:03:49.796473 MTRR: Fixed MSR 0x250 0x0606060606060606
2062 05:03:49.799883 MTRR: Fixed MSR 0x250 0x0606060606060606
2063 05:03:49.802959 MTRR: Fixed MSR 0x258 0x0606060606060606
2064 05:03:49.806124 MTRR: Fixed MSR 0x259 0x0000000000000000
2065 05:03:49.813133 MTRR: Fixed MSR 0x268 0x0606060606060606
2066 05:03:49.816390 MTRR: Fixed MSR 0x269 0x0606060606060606
2067 05:03:49.819313 MTRR: Fixed MSR 0x26a 0x0606060606060606
2068 05:03:49.822995 MTRR: Fixed MSR 0x26b 0x0606060606060606
2069 05:03:49.829935 MTRR: Fixed MSR 0x26c 0x0606060606060606
2070 05:03:49.832604 MTRR: Fixed MSR 0x26d 0x0606060606060606
2071 05:03:49.836352 MTRR: Fixed MSR 0x26e 0x0606060606060606
2072 05:03:49.839349 MTRR: Fixed MSR 0x26f 0x0606060606060606
2073 05:03:49.847333 MTRR: Fixed MSR 0x258 0x0606060606060606
2074 05:03:49.847934 call enable_fixed_mtrr()
2075 05:03:49.853769 MTRR: Fixed MSR 0x259 0x0000000000000000
2076 05:03:49.857153 MTRR: Fixed MSR 0x268 0x0606060606060606
2077 05:03:49.860204 MTRR: Fixed MSR 0x269 0x0606060606060606
2078 05:03:49.863917 MTRR: Fixed MSR 0x26a 0x0606060606060606
2079 05:03:49.870884 MTRR: Fixed MSR 0x26b 0x0606060606060606
2080 05:03:49.873851 MTRR: Fixed MSR 0x26c 0x0606060606060606
2081 05:03:49.876744 MTRR: Fixed MSR 0x26d 0x0606060606060606
2082 05:03:49.880212 MTRR: Fixed MSR 0x26e 0x0606060606060606
2083 05:03:49.886827 MTRR: Fixed MSR 0x26f 0x0606060606060606
2084 05:03:49.890062 CPU physical address size: 39 bits
2085 05:03:49.893700 call enable_fixed_mtrr()
2086 05:03:49.896658 MTRR: Fixed MSR 0x250 0x0606060606060606
2087 05:03:49.899911 MTRR: Fixed MSR 0x250 0x0606060606060606
2088 05:03:49.903473
2089 05:03:49.906606 MTRR: Fixed MSR 0x258 0x0606060606060606
2090 05:03:49.909706 MTRR: Fixed MSR 0x259 0x0000000000000000
2091 05:03:49.913604 MTRR: Fixed MSR 0x268 0x0606060606060606
2092 05:03:49.916557 MTRR: Fixed MSR 0x269 0x0606060606060606
2093 05:03:49.923404 MTRR: Fixed MSR 0x26a 0x0606060606060606
2094 05:03:49.926809 MTRR: Fixed MSR 0x26b 0x0606060606060606
2095 05:03:49.929909 MTRR: Fixed MSR 0x26c 0x0606060606060606
2096 05:03:49.933368 MTRR: Fixed MSR 0x26d 0x0606060606060606
2097 05:03:49.939684 MTRR: Fixed MSR 0x26e 0x0606060606060606
2098 05:03:49.942784 MTRR: Fixed MSR 0x26f 0x0606060606060606
2099 05:03:49.946419 MTRR: Fixed MSR 0x258 0x0606060606060606
2100 05:03:49.950035 call enable_fixed_mtrr()
2101 05:03:49.953263 MTRR: Fixed MSR 0x259 0x0000000000000000
2102 05:03:49.959603 MTRR: Fixed MSR 0x268 0x0606060606060606
2103 05:03:49.963155 MTRR: Fixed MSR 0x269 0x0606060606060606
2104 05:03:49.966572 MTRR: Fixed MSR 0x26a 0x0606060606060606
2105 05:03:49.969896 MTRR: Fixed MSR 0x26b 0x0606060606060606
2106 05:03:49.975926 MTRR: Fixed MSR 0x26c 0x0606060606060606
2107 05:03:49.979513 MTRR: Fixed MSR 0x26d 0x0606060606060606
2108 05:03:49.982540 MTRR: Fixed MSR 0x26e 0x0606060606060606
2109 05:03:49.986165 MTRR: Fixed MSR 0x26f 0x0606060606060606
2110 05:03:49.990391 CPU physical address size: 39 bits
2111 05:03:49.997758 call enable_fixed_mtrr()
2112 05:03:49.998329 Reading cr50 TPM mode
2113 05:03:50.001535 MTRR: Fixed MSR 0x250 0x0606060606060606
2114 05:03:50.004653 MTRR: Fixed MSR 0x250 0x0606060606060606
2115 05:03:50.011378 MTRR: Fixed MSR 0x258 0x0606060606060606
2116 05:03:50.014628 MTRR: Fixed MSR 0x259 0x0000000000000000
2117 05:03:50.017751 MTRR: Fixed MSR 0x268 0x0606060606060606
2118 05:03:50.021503 MTRR: Fixed MSR 0x269 0x0606060606060606
2119 05:03:50.024835 MTRR: Fixed MSR 0x26a 0x0606060606060606
2120 05:03:50.031201 MTRR: Fixed MSR 0x26b 0x0606060606060606
2121 05:03:50.034927 MTRR: Fixed MSR 0x26c 0x0606060606060606
2122 05:03:50.038031 MTRR: Fixed MSR 0x26d 0x0606060606060606
2123 05:03:50.041216 MTRR: Fixed MSR 0x26e 0x0606060606060606
2124 05:03:50.047485 MTRR: Fixed MSR 0x26f 0x0606060606060606
2125 05:03:50.050876 MTRR: Fixed MSR 0x258 0x0606060606060606
2126 05:03:50.054059 call enable_fixed_mtrr()
2127 05:03:50.057739 MTRR: Fixed MSR 0x259 0x0000000000000000
2128 05:03:50.060949 MTRR: Fixed MSR 0x268 0x0606060606060606
2129 05:03:50.067471 MTRR: Fixed MSR 0x269 0x0606060606060606
2130 05:03:50.070597 MTRR: Fixed MSR 0x26a 0x0606060606060606
2131 05:03:50.074141 MTRR: Fixed MSR 0x26b 0x0606060606060606
2132 05:03:50.077208 MTRR: Fixed MSR 0x26c 0x0606060606060606
2133 05:03:50.084306 MTRR: Fixed MSR 0x26d 0x0606060606060606
2134 05:03:50.087149 MTRR: Fixed MSR 0x26e 0x0606060606060606
2135 05:03:50.090485 MTRR: Fixed MSR 0x26f 0x0606060606060606
2136 05:03:50.094159 CPU physical address size: 39 bits
2137 05:03:50.100193 call enable_fixed_mtrr()
2138 05:03:50.103559 CPU physical address size: 39 bits
2139 05:03:50.107012 CPU physical address size: 39 bits
2140 05:03:50.113505 BS: BS_PAYLOAD_LOAD entry times (exec / console): 214 / 6 ms
2141 05:03:50.117004 CPU physical address size: 39 bits
2142 05:03:50.123625 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2143 05:03:50.126923 Checking segment from ROM address 0xffc02b38
2144 05:03:50.133515 Checking segment from ROM address 0xffc02b54
2145 05:03:50.136694 Loading segment from ROM address 0xffc02b38
2146 05:03:50.139990 code (compression=0)
2147 05:03:50.147209 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2148 05:03:50.156582 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2149 05:03:50.156752 it's not compressed!
2150 05:03:50.297942 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2151 05:03:50.304405 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2152 05:03:50.311041 Loading segment from ROM address 0xffc02b54
2153 05:03:50.311644 Entry Point 0x30000000
2154 05:03:50.314320
2155 05:03:50.314814 Loaded segments
2156 05:03:50.320593 BS: BS_PAYLOAD_LOAD run times (exec / console): 139 / 63 ms
2157 05:03:50.363821 Finalizing chipset.
2158 05:03:50.367258 Finalizing SMM.
2159 05:03:50.367851 APMC done.
2160 05:03:50.374248 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2161 05:03:50.377208 mp_park_aps done after 0 msecs.
2162 05:03:50.380168 Jumping to boot code at 0x30000000(0x76b25000)
2163 05:03:50.390224 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2164 05:03:50.390852
2165 05:03:50.391241
2166 05:03:50.391632
2167 05:03:50.393911 Starting depthcharge on Voema...
2168 05:03:50.394450
2169 05:03:50.395568 end: 2.2.3 depthcharge-start (duration 00:00:17) [common]
2170 05:03:50.396158 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
2171 05:03:50.396627 Setting prompt string to ['volteer:']
2172 05:03:50.397070 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:43)
2173 05:03:50.403405 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2174 05:03:50.403917
2175 05:03:50.410359 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2176 05:03:50.410858
2177 05:03:50.417054 Looking for NVMe Controller 0x3005f238 @ 00:1d:00
2178 05:03:50.417608
2179 05:03:50.420295 Failed to find eMMC card reader
2180 05:03:50.420793
2181 05:03:50.421186 Wipe memory regions:
2182 05:03:50.421589
2183 05:03:50.426404 [0x00000000001000, 0x000000000a0000)
2184 05:03:50.426898
2185 05:03:50.430047 [0x00000000100000, 0x00000030000000)
2186 05:03:50.430756
2187 05:03:50.458778 [0x00000032662db0, 0x000000769ef000)
2188 05:03:50.459390
2189 05:03:50.497285 [0x00000100000000, 0x00000280400000)
2190 05:03:50.498056
2191 05:03:50.701646 ec_init: CrosEC protocol v3 supported (256, 256)
2192 05:03:50.702315
2193 05:03:51.132291 R8152: Initializing
2194 05:03:51.132882
2195 05:03:51.135383 Version 6 (ocp_data = 5c30)
2196 05:03:51.135898
2197 05:03:51.138945 R8152: Done initializing
2198 05:03:51.139439
2199 05:03:51.141898 Adding net device
2200 05:03:51.142388
2201 05:03:51.446542 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2202 05:03:51.447169
2203 05:03:51.447569
2204 05:03:51.447934
2205 05:03:51.450359 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2207 05:03:51.552318 volteer: tftpboot 192.168.201.1 8767945/tftp-deploy-xy3qfto4/kernel/bzImage 8767945/tftp-deploy-xy3qfto4/kernel/cmdline 8767945/tftp-deploy-xy3qfto4/ramdisk/ramdisk.cpio.gz
2208 05:03:51.553041 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2209 05:03:51.553560 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
2210 05:03:51.557782 tftpboot 192.168.201.1 8767945/tftp-deploy-xy3qfto4/kernel/bzImoy-xy3qfto4/kernel/cmdline 8767945/tftp-deploy-xy3qfto4/ramdisk/ramdisk.cpio.gz
2211 05:03:51.558296
2212 05:03:51.558688 Waiting for link
2213 05:03:51.559055
2214 05:03:51.761257 done.
2215 05:03:51.761890
2216 05:03:51.762319 MAC: 00:24:32:30:77:76
2217 05:03:51.762687
2218 05:03:51.764107 Sending DHCP discover... done.
2219 05:03:51.764600
2220 05:03:51.767585 Waiting for reply... done.
2221 05:03:51.768211
2222 05:03:51.770591 Sending DHCP request... done.
2223 05:03:51.771086
2224 05:03:51.777344 Waiting for reply... done.
2225 05:03:51.777989
2226 05:03:51.778389 My ip is 192.168.201.16
2227 05:03:51.778759
2228 05:03:51.780356 The DHCP server ip is 192.168.201.1
2229 05:03:51.780851
2230 05:03:51.787689 TFTP server IP predefined by user: 192.168.201.1
2231 05:03:51.788283
2232 05:03:51.794161 Bootfile predefined by user: 8767945/tftp-deploy-xy3qfto4/kernel/bzImage
2233 05:03:51.794755
2234 05:03:51.797453 Sending tftp read request... done.
2235 05:03:51.798150
2236 05:03:51.804087 Waiting for the transfer...
2237 05:03:51.804679
2238 05:03:52.513849 00000000 ################################################################
2239 05:03:52.514472
2240 05:03:53.236697 00080000 ################################################################
2241 05:03:53.237235
2242 05:03:53.937586 00100000 ################################################################
2243 05:03:53.938121
2244 05:03:54.630220 00180000 ################################################################
2245 05:03:54.630833
2246 05:03:55.344361 00200000 ################################################################
2247 05:03:55.344901
2248 05:03:56.045241 00280000 ################################################################
2249 05:03:56.045905
2250 05:03:56.765361 00300000 ################################################################
2251 05:03:56.765997
2252 05:03:57.463824 00380000 ################################################################
2253 05:03:57.464355
2254 05:03:58.162251 00400000 ################################################################
2255 05:03:58.162782
2256 05:03:58.871358 00480000 ################################################################
2257 05:03:58.872010
2258 05:03:59.585372 00500000 ################################################################
2259 05:03:59.585970
2260 05:04:00.280477 00580000 ################################################################
2261 05:04:00.280998
2262 05:04:00.975547 00600000 ################################################################
2263 05:04:00.976069
2264 05:04:01.662920 00680000 ################################################################
2265 05:04:01.663539
2266 05:04:01.971528 00700000 ############################# done.
2267 05:04:01.972054
2268 05:04:01.974814 The bootfile was 7573392 bytes long.
2269 05:04:01.975256
2270 05:04:01.978009 Sending tftp read request... done.
2271 05:04:01.978475
2272 05:04:01.981088 Waiting for the transfer...
2273 05:04:01.981561
2274 05:04:02.628641 00000000 ################################################################
2275 05:04:02.629164
2276 05:04:03.300009 00080000 ################################################################
2277 05:04:03.300575
2278 05:04:03.962789 00100000 ################################################################
2279 05:04:03.963387
2280 05:04:04.638548 00180000 ################################################################
2281 05:04:04.639081
2282 05:04:05.313548 00200000 ################################################################
2283 05:04:05.314078
2284 05:04:05.970311 00280000 ################################################################
2285 05:04:05.970887
2286 05:04:06.618639 00300000 ################################################################
2287 05:04:06.619210
2288 05:04:07.230255 00380000 ################################################################
2289 05:04:07.230404
2290 05:04:07.835338 00400000 ################################################################
2291 05:04:07.835487
2292 05:04:08.453797 00480000 ################################################################
2293 05:04:08.453945
2294 05:04:08.753384 00500000 ################################ done.
2295 05:04:08.753545
2296 05:04:08.756956 Sending tftp read request... done.
2297 05:04:08.757056
2298 05:04:08.760246 Waiting for the transfer...
2299 05:04:08.760350
2300 05:04:08.760429 00000000 # done.
2301 05:04:08.760504
2302 05:04:08.769972 Command line loaded dynamically from TFTP file: 8767945/tftp-deploy-xy3qfto4/kernel/cmdline
2303 05:04:08.770090
2304 05:04:08.792987 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8767945/extract-nfsrootfs-v_v18cyn,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2305 05:04:08.793206
2306 05:04:08.800913 Shutting down all USB controllers.
2307 05:04:08.801164
2308 05:04:08.801362 Removing current net device
2309 05:04:08.801568
2310 05:04:08.804388 Finalizing coreboot
2311 05:04:08.804699
2312 05:04:08.810683 Exiting depthcharge with code 4 at timestamp: 27067998
2313 05:04:08.811184
2314 05:04:08.811506
2315 05:04:08.811840 Starting kernel ...
2316 05:04:08.812183
2317 05:04:08.812519
2318 05:04:08.812864
2319 05:04:08.814118 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2320 05:04:08.814649 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
2321 05:04:08.815060 Setting prompt string to ['Linux version [0-9]']
2322 05:04:08.815453 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2323 05:04:08.815839 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2325 05:08:32.815501 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
2327 05:08:32.816615 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
2329 05:08:32.817440 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2332 05:08:32.818895 end: 2 depthcharge-action (duration 00:05:00) [common]
2334 05:08:32.820049 Cleaning after the job
2335 05:08:32.820483 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8767945/tftp-deploy-xy3qfto4/ramdisk
2336 05:08:32.822558 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8767945/tftp-deploy-xy3qfto4/kernel
2337 05:08:32.825053 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8767945/tftp-deploy-xy3qfto4/nfsrootfs
2338 05:08:32.888349 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8767945/tftp-deploy-xy3qfto4/modules
2339 05:08:32.888670 start: 5.1 power-off (timeout 00:00:30) [common]
2340 05:08:32.888842 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=off'
2341 05:08:32.909299 >> Command sent successfully.
2342 05:08:32.911481 Returned 0 in 0 seconds
2343 05:08:33.012673 end: 5.1 power-off (duration 00:00:00) [common]
2345 05:08:33.014098 start: 5.2 read-feedback (timeout 00:10:00) [common]
2346 05:08:33.015259 Listened to connection for namespace 'common' for up to 1s
2347 05:08:34.017725 Finalising connection for namespace 'common'
2348 05:08:34.018367 Disconnecting from shell: Finalise
2349 05:08:34.119730 end: 5.2 read-feedback (duration 00:00:01) [common]
2350 05:08:34.120319 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8767945
2351 05:08:34.244561 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8767945
2352 05:08:34.244760 JobError: Your job cannot terminate cleanly.