Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 05:03:37.235087 lava-dispatcher, installed at version: 2022.11
2 05:03:37.235275 start: 0 validate
3 05:03:37.235404 Start time: 2023-01-18 05:03:37.235395+00:00 (UTC)
4 05:03:37.235522 Using caching service: 'http://localhost/cache/?uri=%s'
5 05:03:37.235649 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230114.0%2Famd64%2Frootfs.cpio.gz exists
6 05:03:37.526019 Using caching service: 'http://localhost/cache/?uri=%s'
7 05:03:37.526200 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-821-g39bdf0444b23%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 05:03:37.813870 Using caching service: 'http://localhost/cache/?uri=%s'
9 05:03:37.814028 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-821-g39bdf0444b23%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 05:03:38.105427 validate duration: 0.87
12 05:03:38.105700 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 05:03:38.105825 start: 1.1 download-retry (timeout 00:10:00) [common]
14 05:03:38.105972 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 05:03:38.106077 Not decompressing ramdisk as can be used compressed.
16 05:03:38.106179 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230114.0/amd64/rootfs.cpio.gz
17 05:03:38.106262 saving as /var/lib/lava/dispatcher/tmp/8767991/tftp-deploy-2bdmy7y8/ramdisk/rootfs.cpio.gz
18 05:03:38.106340 total size: 35753308 (34MB)
19 05:03:38.107516 progress 0% (0MB)
20 05:03:38.116277 progress 5% (1MB)
21 05:03:38.124853 progress 10% (3MB)
22 05:03:38.133304 progress 15% (5MB)
23 05:03:38.142086 progress 20% (6MB)
24 05:03:38.150632 progress 25% (8MB)
25 05:03:38.159256 progress 30% (10MB)
26 05:03:38.167595 progress 35% (11MB)
27 05:03:38.176179 progress 40% (13MB)
28 05:03:38.184563 progress 45% (15MB)
29 05:03:38.193058 progress 50% (17MB)
30 05:03:38.201549 progress 55% (18MB)
31 05:03:38.209985 progress 60% (20MB)
32 05:03:38.218530 progress 65% (22MB)
33 05:03:38.226866 progress 70% (23MB)
34 05:03:38.235367 progress 75% (25MB)
35 05:03:38.243835 progress 80% (27MB)
36 05:03:38.252467 progress 85% (29MB)
37 05:03:38.260818 progress 90% (30MB)
38 05:03:38.269242 progress 95% (32MB)
39 05:03:38.277697 progress 100% (34MB)
40 05:03:38.277878 34MB downloaded in 0.17s (198.78MB/s)
41 05:03:38.278039 end: 1.1.1 http-download (duration 00:00:00) [common]
43 05:03:38.278289 end: 1.1 download-retry (duration 00:00:00) [common]
44 05:03:38.278392 start: 1.2 download-retry (timeout 00:10:00) [common]
45 05:03:38.278482 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 05:03:38.278597 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-821-g39bdf0444b23/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 05:03:38.278675 saving as /var/lib/lava/dispatcher/tmp/8767991/tftp-deploy-2bdmy7y8/kernel/bzImage
48 05:03:38.278739 total size: 7573392 (7MB)
49 05:03:38.278800 No compression specified
50 05:03:38.279895 progress 0% (0MB)
51 05:03:38.281796 progress 5% (0MB)
52 05:03:38.283779 progress 10% (0MB)
53 05:03:38.285570 progress 15% (1MB)
54 05:03:38.287506 progress 20% (1MB)
55 05:03:38.289278 progress 25% (1MB)
56 05:03:38.291197 progress 30% (2MB)
57 05:03:38.292962 progress 35% (2MB)
58 05:03:38.294914 progress 40% (2MB)
59 05:03:38.296827 progress 45% (3MB)
60 05:03:38.298564 progress 50% (3MB)
61 05:03:38.300506 progress 55% (4MB)
62 05:03:38.302244 progress 60% (4MB)
63 05:03:38.304219 progress 65% (4MB)
64 05:03:38.305994 progress 70% (5MB)
65 05:03:38.307921 progress 75% (5MB)
66 05:03:38.309651 progress 80% (5MB)
67 05:03:38.311588 progress 85% (6MB)
68 05:03:38.313484 progress 90% (6MB)
69 05:03:38.315276 progress 95% (6MB)
70 05:03:38.317226 progress 100% (7MB)
71 05:03:38.317395 7MB downloaded in 0.04s (186.86MB/s)
72 05:03:38.317547 end: 1.2.1 http-download (duration 00:00:00) [common]
74 05:03:38.317786 end: 1.2 download-retry (duration 00:00:00) [common]
75 05:03:38.317875 start: 1.3 download-retry (timeout 00:10:00) [common]
76 05:03:38.317964 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 05:03:38.318074 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-821-g39bdf0444b23/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 05:03:38.318144 saving as /var/lib/lava/dispatcher/tmp/8767991/tftp-deploy-2bdmy7y8/modules/modules.tar
79 05:03:38.318206 total size: 51796 (0MB)
80 05:03:38.318267 Using unxz to decompress xz
81 05:03:38.321648 progress 63% (0MB)
82 05:03:38.322019 progress 100% (0MB)
83 05:03:38.325293 0MB downloaded in 0.01s (6.98MB/s)
84 05:03:38.325516 end: 1.3.1 http-download (duration 00:00:00) [common]
86 05:03:38.325782 end: 1.3 download-retry (duration 00:00:00) [common]
87 05:03:38.325878 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
88 05:03:38.325975 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
89 05:03:38.326062 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 05:03:38.326149 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
91 05:03:38.326316 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8767991/lava-overlay-giv054gp
92 05:03:38.326426 makedir: /var/lib/lava/dispatcher/tmp/8767991/lava-overlay-giv054gp/lava-8767991/bin
93 05:03:38.326512 makedir: /var/lib/lava/dispatcher/tmp/8767991/lava-overlay-giv054gp/lava-8767991/tests
94 05:03:38.326596 makedir: /var/lib/lava/dispatcher/tmp/8767991/lava-overlay-giv054gp/lava-8767991/results
95 05:03:38.326703 Creating /var/lib/lava/dispatcher/tmp/8767991/lava-overlay-giv054gp/lava-8767991/bin/lava-add-keys
96 05:03:38.326836 Creating /var/lib/lava/dispatcher/tmp/8767991/lava-overlay-giv054gp/lava-8767991/bin/lava-add-sources
97 05:03:38.326997 Creating /var/lib/lava/dispatcher/tmp/8767991/lava-overlay-giv054gp/lava-8767991/bin/lava-background-process-start
98 05:03:38.327112 Creating /var/lib/lava/dispatcher/tmp/8767991/lava-overlay-giv054gp/lava-8767991/bin/lava-background-process-stop
99 05:03:38.327227 Creating /var/lib/lava/dispatcher/tmp/8767991/lava-overlay-giv054gp/lava-8767991/bin/lava-common-functions
100 05:03:38.327339 Creating /var/lib/lava/dispatcher/tmp/8767991/lava-overlay-giv054gp/lava-8767991/bin/lava-echo-ipv4
101 05:03:38.327453 Creating /var/lib/lava/dispatcher/tmp/8767991/lava-overlay-giv054gp/lava-8767991/bin/lava-install-packages
102 05:03:38.327567 Creating /var/lib/lava/dispatcher/tmp/8767991/lava-overlay-giv054gp/lava-8767991/bin/lava-installed-packages
103 05:03:38.327676 Creating /var/lib/lava/dispatcher/tmp/8767991/lava-overlay-giv054gp/lava-8767991/bin/lava-os-build
104 05:03:38.327787 Creating /var/lib/lava/dispatcher/tmp/8767991/lava-overlay-giv054gp/lava-8767991/bin/lava-probe-channel
105 05:03:38.327901 Creating /var/lib/lava/dispatcher/tmp/8767991/lava-overlay-giv054gp/lava-8767991/bin/lava-probe-ip
106 05:03:38.328011 Creating /var/lib/lava/dispatcher/tmp/8767991/lava-overlay-giv054gp/lava-8767991/bin/lava-target-ip
107 05:03:38.328122 Creating /var/lib/lava/dispatcher/tmp/8767991/lava-overlay-giv054gp/lava-8767991/bin/lava-target-mac
108 05:03:38.328233 Creating /var/lib/lava/dispatcher/tmp/8767991/lava-overlay-giv054gp/lava-8767991/bin/lava-target-storage
109 05:03:38.328389 Creating /var/lib/lava/dispatcher/tmp/8767991/lava-overlay-giv054gp/lava-8767991/bin/lava-test-case
110 05:03:38.328500 Creating /var/lib/lava/dispatcher/tmp/8767991/lava-overlay-giv054gp/lava-8767991/bin/lava-test-event
111 05:03:38.328612 Creating /var/lib/lava/dispatcher/tmp/8767991/lava-overlay-giv054gp/lava-8767991/bin/lava-test-feedback
112 05:03:38.328722 Creating /var/lib/lava/dispatcher/tmp/8767991/lava-overlay-giv054gp/lava-8767991/bin/lava-test-raise
113 05:03:38.328837 Creating /var/lib/lava/dispatcher/tmp/8767991/lava-overlay-giv054gp/lava-8767991/bin/lava-test-reference
114 05:03:38.328952 Creating /var/lib/lava/dispatcher/tmp/8767991/lava-overlay-giv054gp/lava-8767991/bin/lava-test-runner
115 05:03:38.329063 Creating /var/lib/lava/dispatcher/tmp/8767991/lava-overlay-giv054gp/lava-8767991/bin/lava-test-set
116 05:03:38.329174 Creating /var/lib/lava/dispatcher/tmp/8767991/lava-overlay-giv054gp/lava-8767991/bin/lava-test-shell
117 05:03:38.329286 Updating /var/lib/lava/dispatcher/tmp/8767991/lava-overlay-giv054gp/lava-8767991/bin/lava-install-packages (oe)
118 05:03:38.329401 Updating /var/lib/lava/dispatcher/tmp/8767991/lava-overlay-giv054gp/lava-8767991/bin/lava-installed-packages (oe)
119 05:03:38.329502 Creating /var/lib/lava/dispatcher/tmp/8767991/lava-overlay-giv054gp/lava-8767991/environment
120 05:03:38.329592 LAVA metadata
121 05:03:38.329664 - LAVA_JOB_ID=8767991
122 05:03:38.329732 - LAVA_DISPATCHER_IP=192.168.201.1
123 05:03:38.329832 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
124 05:03:38.329899 skipped lava-vland-overlay
125 05:03:38.329977 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 05:03:38.330064 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
127 05:03:38.330127 skipped lava-multinode-overlay
128 05:03:38.330204 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 05:03:38.330290 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
130 05:03:38.330367 Loading test definitions
131 05:03:38.330467 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
132 05:03:38.330541 Using /lava-8767991 at stage 0
133 05:03:38.330795 uuid=8767991_1.4.2.3.1 testdef=None
134 05:03:38.330910 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 05:03:38.331017 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
136 05:03:38.331500 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 05:03:38.331729 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
139 05:03:38.332274 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 05:03:38.332520 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
142 05:03:38.333042 runner path: /var/lib/lava/dispatcher/tmp/8767991/lava-overlay-giv054gp/lava-8767991/0/tests/0_cros-ec test_uuid 8767991_1.4.2.3.1
143 05:03:38.333192 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 05:03:38.333406 Creating lava-test-runner.conf files
146 05:03:38.333474 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8767991/lava-overlay-giv054gp/lava-8767991/0 for stage 0
147 05:03:38.333557 - 0_cros-ec
148 05:03:38.333650 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
149 05:03:38.333739 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
150 05:03:38.339004 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
151 05:03:38.339237 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
152 05:03:38.339362 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
153 05:03:38.339483 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
154 05:03:38.339604 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
155 05:03:39.090212 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
156 05:03:39.090593 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
157 05:03:39.090705 extracting modules file /var/lib/lava/dispatcher/tmp/8767991/tftp-deploy-2bdmy7y8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8767991/extract-overlay-ramdisk-_nc3c3_6/ramdisk
158 05:03:39.094889 end: 1.4.4 extract-modules (duration 00:00:00) [common]
159 05:03:39.095005 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
160 05:03:39.095088 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8767991/compress-overlay-wle_3cni/overlay-1.4.2.4.tar.gz to ramdisk
161 05:03:39.095161 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8767991/compress-overlay-wle_3cni/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8767991/extract-overlay-ramdisk-_nc3c3_6/ramdisk
162 05:03:39.098272 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
163 05:03:39.098377 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
164 05:03:39.098471 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
165 05:03:39.098563 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
166 05:03:39.098639 Building ramdisk /var/lib/lava/dispatcher/tmp/8767991/extract-overlay-ramdisk-_nc3c3_6/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8767991/extract-overlay-ramdisk-_nc3c3_6/ramdisk
167 05:03:39.343568 >> 182443 blocks
168 05:03:42.466780 rename /var/lib/lava/dispatcher/tmp/8767991/extract-overlay-ramdisk-_nc3c3_6/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8767991/tftp-deploy-2bdmy7y8/ramdisk/ramdisk.cpio.gz
169 05:03:42.467224 end: 1.4.7 compress-ramdisk (duration 00:00:03) [common]
170 05:03:42.467348 start: 1.4.8 prepare-kernel (timeout 00:09:56) [common]
171 05:03:42.467448 start: 1.4.8.1 prepare-fit (timeout 00:09:56) [common]
172 05:03:42.467540 No mkimage arch provided, not using FIT.
173 05:03:42.467625 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
174 05:03:42.467712 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
175 05:03:42.467806 end: 1.4 prepare-tftp-overlay (duration 00:00:04) [common]
176 05:03:42.467896 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:56) [common]
177 05:03:42.467974 No LXC device requested
178 05:03:42.468054 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
179 05:03:42.468138 start: 1.6 deploy-device-env (timeout 00:09:56) [common]
180 05:03:42.468217 end: 1.6 deploy-device-env (duration 00:00:00) [common]
181 05:03:42.468285 Checking files for TFTP limit of 4294967296 bytes.
182 05:03:42.468665 end: 1 tftp-deploy (duration 00:00:04) [common]
183 05:03:42.468768 start: 2 depthcharge-action (timeout 00:05:00) [common]
184 05:03:42.468862 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
185 05:03:42.468987 substitutions:
186 05:03:42.469055 - {DTB}: None
187 05:03:42.469119 - {INITRD}: 8767991/tftp-deploy-2bdmy7y8/ramdisk/ramdisk.cpio.gz
188 05:03:42.469177 - {KERNEL}: 8767991/tftp-deploy-2bdmy7y8/kernel/bzImage
189 05:03:42.469235 - {LAVA_MAC}: None
190 05:03:42.469291 - {PRESEED_CONFIG}: None
191 05:03:42.469346 - {PRESEED_LOCAL}: None
192 05:03:42.469400 - {RAMDISK}: 8767991/tftp-deploy-2bdmy7y8/ramdisk/ramdisk.cpio.gz
193 05:03:42.469453 - {ROOT_PART}: None
194 05:03:42.469507 - {ROOT}: None
195 05:03:42.469560 - {SERVER_IP}: 192.168.201.1
196 05:03:42.469612 - {TEE}: None
197 05:03:42.469666 Parsed boot commands:
198 05:03:42.469718 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
199 05:03:42.469870 Parsed boot commands: tftpboot 192.168.201.1 8767991/tftp-deploy-2bdmy7y8/kernel/bzImage 8767991/tftp-deploy-2bdmy7y8/kernel/cmdline 8767991/tftp-deploy-2bdmy7y8/ramdisk/ramdisk.cpio.gz
200 05:03:42.469960 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
201 05:03:42.470047 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
202 05:03:42.470135 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
203 05:03:42.470218 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
204 05:03:42.470285 Not connected, no need to disconnect.
205 05:03:42.470362 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
206 05:03:42.470443 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
207 05:03:42.470508 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-1'
208 05:03:42.473148 Setting prompt string to ['lava-test: # ']
209 05:03:42.473428 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
210 05:03:42.473526 end: 2.2.1 reset-connection (duration 00:00:00) [common]
211 05:03:42.473619 start: 2.2.2 reset-device (timeout 00:05:00) [common]
212 05:03:42.473708 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
213 05:03:42.473881 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-1' '--port=1' '--command=reboot'
214 05:03:42.492905 >> Command sent successfully.
215 05:03:42.494732 Returned 0 in 0 seconds
216 05:03:42.595031 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
218 05:03:42.595323 end: 2.2.2 reset-device (duration 00:00:00) [common]
219 05:03:42.595425 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
220 05:03:42.595514 Setting prompt string to 'Starting depthcharge on Voema...'
221 05:03:42.595578 Changing prompt to 'Starting depthcharge on Voema...'
222 05:03:42.595643 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
223 05:03:42.595905 [Enter `^Ec?' for help]
224 05:03:49.978217
225 05:03:49.978919
226 05:03:49.987868 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
227 05:03:49.991422 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
228 05:03:49.997938 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
229 05:03:50.001307 CPU: AES supported, TXT NOT supported, VT supported
230 05:03:50.008048 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
231 05:03:50.011317 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
232 05:03:50.014836
233 05:03:50.017969 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
234 05:03:50.021299 VBOOT: Loading verstage.
235 05:03:50.024833 FMAP: Found "FLASH" version 1.1 at 0x1804000.
236 05:03:50.031289 FMAP: base = 0x0 size = 0x2000000 #areas = 32
237 05:03:50.034506 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
238 05:03:50.045064 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
239 05:03:50.051970 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
240 05:03:50.052455
241 05:03:50.052835
242 05:03:50.065154 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
243 05:03:50.078715 Probing TPM: . done!
244 05:03:50.082153 TPM ready after 0 ms
245 05:03:50.085495 Connected to device vid:did:rid of 1ae0:0028:00
246 05:03:50.096863 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
247 05:03:50.103254 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
248 05:03:50.106666 Initialized TPM device CR50 revision 0
249 05:03:50.159266 tlcl_send_startup: Startup return code is 0
250 05:03:50.159827 TPM: setup succeeded
251 05:03:50.174813 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
252 05:03:50.189211 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
253 05:03:50.201797 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
254 05:03:50.211747 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
255 05:03:50.215510 Chrome EC: UHEPI supported
256 05:03:50.218755 Phase 1
257 05:03:50.222229 FMAP: area GBB found @ 1805000 (458752 bytes)
258 05:03:50.232045 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
259 05:03:50.238827 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
260 05:03:50.245268 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
261 05:03:50.252144 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
262 05:03:50.255117 Recovery requested (1009000e)
263 05:03:50.258695 TPM: Extending digest for VBOOT: boot mode into PCR 0
264 05:03:50.270033 tlcl_extend: response is 0
265 05:03:50.276507 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
266 05:03:50.286598 tlcl_extend: response is 0
267 05:03:50.293388 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
268 05:03:50.299863 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
269 05:03:50.306682 BS: verstage times (exec / console): total (unknown) / 142 ms
270 05:03:50.307314
271 05:03:50.307703
272 05:03:50.319952 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
273 05:03:50.326438 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
274 05:03:50.329904 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
275 05:03:50.332846 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
276 05:03:50.339654 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
277 05:03:50.343140 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
278 05:03:50.346413 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
279 05:03:50.349760 TCO_STS: 0000 0000
280 05:03:50.353215 GEN_PMCON: d0015038 00002200
281 05:03:50.356246 GBLRST_CAUSE: 00000000 00000000
282 05:03:50.356731 HPR_CAUSE0: 00000000
283 05:03:50.359495 prev_sleep_state 5
284 05:03:50.363192 Boot Count incremented to 16893
285 05:03:50.369538 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
286 05:03:50.376168 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
287 05:03:50.382732 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
288 05:03:50.389427 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
289 05:03:50.393953 Chrome EC: UHEPI supported
290 05:03:50.400657 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
291 05:03:50.414019 Probing TPM: done!
292 05:03:50.420580 Connected to device vid:did:rid of 1ae0:0028:00
293 05:03:50.430824 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
294 05:03:50.434208 Initialized TPM device CR50 revision 0
295 05:03:50.449030 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
296 05:03:50.451989
297 05:03:50.455352 MRC: Hash idx 0x100b comparison successful.
298 05:03:50.458783 MRC cache found, size faa8
299 05:03:50.459292 bootmode is set to: 2
300 05:03:50.462148 SPD index = 0
301 05:03:50.469010 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
302 05:03:50.471884 SPD: module type is LPDDR4X
303 05:03:50.475603 SPD: module part number is MT53E512M64D4NW-046
304 05:03:50.482074 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
305 05:03:50.488462 SPD: device width 16 bits, bus width 16 bits
306 05:03:50.491794 SPD: module size is 1024 MB (per channel)
307 05:03:50.925132 CBMEM:
308 05:03:50.928090 IMD: root @ 0x76fff000 254 entries.
309 05:03:50.931589 IMD: root @ 0x76ffec00 62 entries.
310 05:03:50.935185 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
311 05:03:50.941896 FMAP: area RW_VPD found @ f35000 (8192 bytes)
312 05:03:50.944945 External stage cache:
313 05:03:50.948210 IMD: root @ 0x7b3ff000 254 entries.
314 05:03:50.951343 IMD: root @ 0x7b3fec00 62 entries.
315 05:03:50.966995 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
316 05:03:50.973339 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
317 05:03:50.979925 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
318 05:03:50.994947 MRC: 'RECOVERY_MRC_CACHE' does not need update.
319 05:03:50.998806 cse_lite: Skip switching to RW in the recovery path
320 05:03:51.002081 8 DIMMs found
321 05:03:51.002570 SMM Memory Map
322 05:03:51.005413 SMRAM : 0x7b000000 0x800000
323 05:03:51.008879 Subregion 0: 0x7b000000 0x200000
324 05:03:51.011801 Subregion 1: 0x7b200000 0x200000
325 05:03:51.015213 Subregion 2: 0x7b400000 0x400000
326 05:03:51.018451 top_of_ram = 0x77000000
327 05:03:51.022188 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
328 05:03:51.025061
329 05:03:51.029057 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
330 05:03:51.035239 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
331 05:03:51.038564 MTRR Range: Start=ff000000 End=0 (Size 1000000)
332 05:03:51.045110 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
333 05:03:51.051958 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
334 05:03:51.063804 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
335 05:03:51.066781 Processing 211 relocs. Offset value of 0x74c0b000
336 05:03:51.070607
337 05:03:51.076976 BS: romstage times (exec / console): total (unknown) / 277 ms
338 05:03:51.082850
339 05:03:51.083443
340 05:03:51.092547 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
341 05:03:51.096063 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
342 05:03:51.106356 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
343 05:03:51.112593 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
344 05:03:51.119390 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
345 05:03:51.126370 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
346 05:03:51.172988 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
347 05:03:51.179802 Processing 5008 relocs. Offset value of 0x75d98000
348 05:03:51.182718 BS: postcar times (exec / console): total (unknown) / 59 ms
349 05:03:51.186833
350 05:03:51.187359
351 05:03:51.196364 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
352 05:03:51.196987 Normal boot
353 05:03:51.199803 FW_CONFIG value is 0x804c02
354 05:03:51.203158 PCI: 00:07.0 disabled by fw_config
355 05:03:51.206307 PCI: 00:07.1 disabled by fw_config
356 05:03:51.209850 PCI: 00:0d.2 disabled by fw_config
357 05:03:51.212966 PCI: 00:1c.7 disabled by fw_config
358 05:03:51.219793 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
359 05:03:51.226245 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
360 05:03:51.229863 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
361 05:03:51.232825 GENERIC: 0.0 disabled by fw_config
362 05:03:51.236196 GENERIC: 1.0 disabled by fw_config
363 05:03:51.242960 fw_config match found: DB_USB=USB3_ACTIVE
364 05:03:51.246366 fw_config match found: DB_USB=USB3_ACTIVE
365 05:03:51.249336 fw_config match found: DB_USB=USB3_ACTIVE
366 05:03:51.252862 fw_config match found: DB_USB=USB3_ACTIVE
367 05:03:51.259533 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
368 05:03:51.266103 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
369 05:03:51.272703 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
370 05:03:51.282612 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
371 05:03:51.286158 microcode: sig=0x806c1 pf=0x80 revision=0x86
372 05:03:51.292861 microcode: Update skipped, already up-to-date
373 05:03:51.299225 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
374 05:03:51.326531 Detected 4 core, 8 thread CPU.
375 05:03:51.329857 Setting up SMI for CPU
376 05:03:51.333280 IED base = 0x7b400000
377 05:03:51.333837 IED size = 0x00400000
378 05:03:51.336273 Will perform SMM setup.
379 05:03:51.343187 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
380 05:03:51.349779 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
381 05:03:51.356211 Processing 16 relocs. Offset value of 0x00030000
382 05:03:51.359653 Attempting to start 7 APs
383 05:03:51.362680 Waiting for 10ms after sending INIT.
384 05:03:51.378441 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
385 05:03:51.381974 AP: slot 7 apic_id 5.
386 05:03:51.384857 AP: slot 3 apic_id 4.
387 05:03:51.385345 AP: slot 5 apic_id 6.
388 05:03:51.388267 AP: slot 4 apic_id 7.
389 05:03:51.391796 AP: slot 2 apic_id 3.
390 05:03:51.392281 AP: slot 6 apic_id 2.
391 05:03:51.392764 done.
392 05:03:51.398483 Waiting for 2nd SIPI to complete...done.
393 05:03:51.404871 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
394 05:03:51.411752 Processing 13 relocs. Offset value of 0x00038000
395 05:03:51.412351 Unable to locate Global NVS
396 05:03:51.414956
397 05:03:51.421632 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
398 05:03:51.425054 Installing permanent SMM handler to 0x7b000000
399 05:03:51.434926 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
400 05:03:51.437983 Processing 794 relocs. Offset value of 0x7b010000
401 05:03:51.448261 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
402 05:03:51.451337 Processing 13 relocs. Offset value of 0x7b008000
403 05:03:51.458099 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
404 05:03:51.464697 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
405 05:03:51.468078 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
406 05:03:51.474849 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
407 05:03:51.481731 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
408 05:03:51.488165 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
409 05:03:51.494843 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
410 05:03:51.495380 Unable to locate Global NVS
411 05:03:51.504441 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
412 05:03:51.507542 Clearing SMI status registers
413 05:03:51.508046 SMI_STS: PM1
414 05:03:51.510926 PM1_STS: PWRBTN
415 05:03:51.517829 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
416 05:03:51.520882 In relocation handler: CPU 0
417 05:03:51.524391 New SMBASE=0x7b000000 IEDBASE=0x7b400000
418 05:03:51.530785 Writing SMRR. base = 0x7b000006, mask=0xff800c00
419 05:03:51.531384 Relocation complete.
420 05:03:51.540696 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
421 05:03:51.541286 In relocation handler: CPU 1
422 05:03:51.544147
423 05:03:51.547614 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
424 05:03:51.548191 Relocation complete.
425 05:03:51.557363 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
426 05:03:51.557913 In relocation handler: CPU 4
427 05:03:51.563891 New SMBASE=0x7afff000 IEDBASE=0x7b400000
428 05:03:51.564383 Relocation complete.
429 05:03:51.573785 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
430 05:03:51.574331 In relocation handler: CPU 5
431 05:03:51.580860 New SMBASE=0x7affec00 IEDBASE=0x7b400000
432 05:03:51.583923 Writing SMRR. base = 0x7b000006, mask=0xff800c00
433 05:03:51.587500 Relocation complete.
434 05:03:51.594122 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
435 05:03:51.597217 In relocation handler: CPU 3
436 05:03:51.600955 New SMBASE=0x7afff400 IEDBASE=0x7b400000
437 05:03:51.607471 Writing SMRR. base = 0x7b000006, mask=0xff800c00
438 05:03:51.607956 Relocation complete.
439 05:03:51.614039 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
440 05:03:51.617344 In relocation handler: CPU 6
441 05:03:51.623881 New SMBASE=0x7affe800 IEDBASE=0x7b400000
442 05:03:51.627361 Writing SMRR. base = 0x7b000006, mask=0xff800c00
443 05:03:51.630655 Relocation complete.
444 05:03:51.637443 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
445 05:03:51.640637 In relocation handler: CPU 2
446 05:03:51.644013 New SMBASE=0x7afff800 IEDBASE=0x7b400000
447 05:03:51.647059 Relocation complete.
448 05:03:51.653974 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
449 05:03:51.657735 In relocation handler: CPU 7
450 05:03:51.661342 New SMBASE=0x7affe400 IEDBASE=0x7b400000
451 05:03:51.661862 Relocation complete.
452 05:03:51.665003 Initializing CPU #0
453 05:03:51.668477 CPU: vendor Intel device 806c1
454 05:03:51.671761 CPU: family 06, model 8c, stepping 01
455 05:03:51.675036 Clearing out pending MCEs
456 05:03:51.678259 Setting up local APIC...
457 05:03:51.678839 apic_id: 0x00 done.
458 05:03:51.681403 Turbo is available but hidden
459 05:03:51.684501 Turbo is available and visible
460 05:03:51.691255 microcode: Update skipped, already up-to-date
461 05:03:51.691874 CPU #0 initialized
462 05:03:51.694855 Initializing CPU #1
463 05:03:51.695474 Initializing CPU #6
464 05:03:51.697762
465 05:03:51.698344 Initializing CPU #2
466 05:03:51.701130 CPU: vendor Intel device 806c1
467 05:03:51.704557 CPU: family 06, model 8c, stepping 01
468 05:03:51.707602 CPU: vendor Intel device 806c1
469 05:03:51.711263 CPU: family 06, model 8c, stepping 01
470 05:03:51.714867 Clearing out pending MCEs
471 05:03:51.717606 Clearing out pending MCEs
472 05:03:51.720864 Setting up local APIC...
473 05:03:51.721525 Initializing CPU #3
474 05:03:51.724662 Initializing CPU #7
475 05:03:51.728050 CPU: vendor Intel device 806c1
476 05:03:51.731316 CPU: family 06, model 8c, stepping 01
477 05:03:51.734477 CPU: vendor Intel device 806c1
478 05:03:51.737500 CPU: family 06, model 8c, stepping 01
479 05:03:51.741221 Clearing out pending MCEs
480 05:03:51.744575 Clearing out pending MCEs
481 05:03:51.745170 Setting up local APIC...
482 05:03:51.747464 Initializing CPU #5
483 05:03:51.751001 Setting up local APIC...
484 05:03:51.751588 Initializing CPU #4
485 05:03:51.754475 CPU: vendor Intel device 806c1
486 05:03:51.757789 CPU: family 06, model 8c, stepping 01
487 05:03:51.760630
488 05:03:51.761119 apic_id: 0x04 done.
489 05:03:51.764480 apic_id: 0x05 done.
490 05:03:51.767466 microcode: Update skipped, already up-to-date
491 05:03:51.774616 microcode: Update skipped, already up-to-date
492 05:03:51.775235 CPU #3 initialized
493 05:03:51.777487 CPU #7 initialized
494 05:03:51.781312 CPU: vendor Intel device 806c1
495 05:03:51.784294 CPU: family 06, model 8c, stepping 01
496 05:03:51.787253 Clearing out pending MCEs
497 05:03:51.787765 Clearing out pending MCEs
498 05:03:51.790494 Setting up local APIC...
499 05:03:51.794292 apic_id: 0x02 done.
500 05:03:51.797447 Setting up local APIC...
501 05:03:51.800460 CPU: vendor Intel device 806c1
502 05:03:51.804166 CPU: family 06, model 8c, stepping 01
503 05:03:51.804752 apic_id: 0x03 done.
504 05:03:51.810847 microcode: Update skipped, already up-to-date
505 05:03:51.813983 microcode: Update skipped, already up-to-date
506 05:03:51.817178 CPU #6 initialized
507 05:03:51.817669 CPU #2 initialized
508 05:03:51.820256 Setting up local APIC...
509 05:03:51.823754 Clearing out pending MCEs
510 05:03:51.826964 apic_id: 0x07 done.
511 05:03:51.827451 apic_id: 0x06 done.
512 05:03:51.833916 microcode: Update skipped, already up-to-date
513 05:03:51.836802 microcode: Update skipped, already up-to-date
514 05:03:51.840156 CPU #4 initialized
515 05:03:51.840640 CPU #5 initialized
516 05:03:51.843418 Setting up local APIC...
517 05:03:51.846779 apic_id: 0x01 done.
518 05:03:51.850226 microcode: Update skipped, already up-to-date
519 05:03:51.853878 CPU #1 initialized
520 05:03:51.856981 bsp_do_flight_plan done after 455 msecs.
521 05:03:51.860280 CPU: frequency set to 4000 MHz
522 05:03:51.860765 Enabling SMIs.
523 05:03:51.866844 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
524 05:03:51.883770 SATAXPCIE1 indicates PCIe NVMe is present
525 05:03:51.887197 Probing TPM: done!
526 05:03:51.890397 Connected to device vid:did:rid of 1ae0:0028:00
527 05:03:51.900925 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
528 05:03:51.904428 Initialized TPM device CR50 revision 0
529 05:03:51.907424 Enabling S0i3.4
530 05:03:51.914585 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
531 05:03:51.917474 Found a VBT of 8704 bytes after decompression
532 05:03:51.924280 cse_lite: CSE RO boot. HybridStorageMode disabled
533 05:03:51.931076 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
534 05:03:52.006690 FSPS returned 0
535 05:03:52.009926 Executing Phase 1 of FspMultiPhaseSiInit
536 05:03:52.019796 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
537 05:03:52.023103 port C0 DISC req: usage 1 usb3 1 usb2 5
538 05:03:52.026265 Raw Buffer output 0 00000511
539 05:03:52.029487 Raw Buffer output 1 00000000
540 05:03:52.033412 pmc_send_ipc_cmd succeeded
541 05:03:52.036836 port C1 DISC req: usage 1 usb3 2 usb2 3
542 05:03:52.040128
543 05:03:52.040685 Raw Buffer output 0 00000321
544 05:03:52.043400 Raw Buffer output 1 00000000
545 05:03:52.047209 pmc_send_ipc_cmd succeeded
546 05:03:52.052588 Detected 4 core, 8 thread CPU.
547 05:03:52.055945 Detected 4 core, 8 thread CPU.
548 05:03:52.290013 Display FSP Version Info HOB
549 05:03:52.292993 Reference Code - CPU = a.0.4c.31
550 05:03:52.296449 uCode Version = 0.0.0.86
551 05:03:52.299880 TXT ACM version = ff.ff.ff.ffff
552 05:03:52.303000 Reference Code - ME = a.0.4c.31
553 05:03:52.306271 MEBx version = 0.0.0.0
554 05:03:52.309784 ME Firmware Version = Consumer SKU
555 05:03:52.313208 Reference Code - PCH = a.0.4c.31
556 05:03:52.316378 PCH-CRID Status = Disabled
557 05:03:52.319697 PCH-CRID Original Value = ff.ff.ff.ffff
558 05:03:52.323290 PCH-CRID New Value = ff.ff.ff.ffff
559 05:03:52.326201 OPROM - RST - RAID = ff.ff.ff.ffff
560 05:03:52.329875 PCH Hsio Version = 4.0.0.0
561 05:03:52.333264 Reference Code - SA - System Agent = a.0.4c.31
562 05:03:52.336275 Reference Code - MRC = 2.0.0.1
563 05:03:52.339662 SA - PCIe Version = a.0.4c.31
564 05:03:52.343270 SA-CRID Status = Disabled
565 05:03:52.346663 SA-CRID Original Value = 0.0.0.1
566 05:03:52.350026 SA-CRID New Value = 0.0.0.1
567 05:03:52.353101 OPROM - VBIOS = ff.ff.ff.ffff
568 05:03:52.356386 IO Manageability Engine FW Version = 11.1.4.0
569 05:03:52.359760 PHY Build Version = 0.0.0.e0
570 05:03:52.363085 Thunderbolt(TM) FW Version = 0.0.0.0
571 05:03:52.369799 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
572 05:03:52.372818 ITSS IRQ Polarities Before:
573 05:03:52.373312 IPC0: 0xffffffff
574 05:03:52.376175 IPC1: 0xffffffff
575 05:03:52.376682 IPC2: 0xffffffff
576 05:03:52.379568 IPC3: 0xffffffff
577 05:03:52.383117 ITSS IRQ Polarities After:
578 05:03:52.383697 IPC0: 0xffffffff
579 05:03:52.386044 IPC1: 0xffffffff
580 05:03:52.386547 IPC2: 0xffffffff
581 05:03:52.389704 IPC3: 0xffffffff
582 05:03:52.392771 Found PCIe Root Port #9 at PCI: 00:1d.0.
583 05:03:52.406171 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
584 05:03:52.415953 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
585 05:03:52.429452 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
586 05:03:52.436153 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
587 05:03:52.436726 Enumerating buses...
588 05:03:52.442654 Show all devs... Before device enumeration.
589 05:03:52.443186 Root Device: enabled 1
590 05:03:52.445985 DOMAIN: 0000: enabled 1
591 05:03:52.449430 CPU_CLUSTER: 0: enabled 1
592 05:03:52.452724 PCI: 00:00.0: enabled 1
593 05:03:52.453236 PCI: 00:02.0: enabled 1
594 05:03:52.455899 PCI: 00:04.0: enabled 1
595 05:03:52.459148 PCI: 00:05.0: enabled 1
596 05:03:52.462641 PCI: 00:06.0: enabled 0
597 05:03:52.463174 PCI: 00:07.0: enabled 0
598 05:03:52.465964 PCI: 00:07.1: enabled 0
599 05:03:52.468998 PCI: 00:07.2: enabled 0
600 05:03:52.472524 PCI: 00:07.3: enabled 0
601 05:03:52.473136 PCI: 00:08.0: enabled 1
602 05:03:52.475878 PCI: 00:09.0: enabled 0
603 05:03:52.479273 PCI: 00:0a.0: enabled 0
604 05:03:52.482851 PCI: 00:0d.0: enabled 1
605 05:03:52.483461 PCI: 00:0d.1: enabled 0
606 05:03:52.485725 PCI: 00:0d.2: enabled 0
607 05:03:52.489124 PCI: 00:0d.3: enabled 0
608 05:03:52.489770 PCI: 00:0e.0: enabled 0
609 05:03:52.492500
610 05:03:52.492994 PCI: 00:10.2: enabled 1
611 05:03:52.495732 PCI: 00:10.6: enabled 0
612 05:03:52.499364 PCI: 00:10.7: enabled 0
613 05:03:52.499876 PCI: 00:12.0: enabled 0
614 05:03:52.502336 PCI: 00:12.6: enabled 0
615 05:03:52.505842 PCI: 00:13.0: enabled 0
616 05:03:52.508927 PCI: 00:14.0: enabled 1
617 05:03:52.509359 PCI: 00:14.1: enabled 0
618 05:03:52.512526 PCI: 00:14.2: enabled 1
619 05:03:52.515849 PCI: 00:14.3: enabled 1
620 05:03:52.518971 PCI: 00:15.0: enabled 1
621 05:03:52.519471 PCI: 00:15.1: enabled 1
622 05:03:52.522628 PCI: 00:15.2: enabled 1
623 05:03:52.525584 PCI: 00:15.3: enabled 1
624 05:03:52.529061 PCI: 00:16.0: enabled 1
625 05:03:52.529492 PCI: 00:16.1: enabled 0
626 05:03:52.532202 PCI: 00:16.2: enabled 0
627 05:03:52.535716 PCI: 00:16.3: enabled 0
628 05:03:52.536221 PCI: 00:16.4: enabled 0
629 05:03:52.539183 PCI: 00:16.5: enabled 0
630 05:03:52.542477 PCI: 00:17.0: enabled 1
631 05:03:52.545996 PCI: 00:19.0: enabled 0
632 05:03:52.546433 PCI: 00:19.1: enabled 1
633 05:03:52.548983 PCI: 00:19.2: enabled 0
634 05:03:52.552466 PCI: 00:1c.0: enabled 1
635 05:03:52.555790 PCI: 00:1c.1: enabled 0
636 05:03:52.556226 PCI: 00:1c.2: enabled 0
637 05:03:52.559047 PCI: 00:1c.3: enabled 0
638 05:03:52.562296 PCI: 00:1c.4: enabled 0
639 05:03:52.565457 PCI: 00:1c.5: enabled 0
640 05:03:52.565893 PCI: 00:1c.6: enabled 1
641 05:03:52.569207 PCI: 00:1c.7: enabled 0
642 05:03:52.572158 PCI: 00:1d.0: enabled 1
643 05:03:52.572629 PCI: 00:1d.1: enabled 0
644 05:03:52.575635
645 05:03:52.576082 PCI: 00:1d.2: enabled 1
646 05:03:52.578855 PCI: 00:1d.3: enabled 0
647 05:03:52.581979 PCI: 00:1e.0: enabled 1
648 05:03:52.582416 PCI: 00:1e.1: enabled 0
649 05:03:52.585338 PCI: 00:1e.2: enabled 1
650 05:03:52.588698 PCI: 00:1e.3: enabled 1
651 05:03:52.592173 PCI: 00:1f.0: enabled 1
652 05:03:52.592667 PCI: 00:1f.1: enabled 0
653 05:03:52.595755 PCI: 00:1f.2: enabled 1
654 05:03:52.598654 PCI: 00:1f.3: enabled 1
655 05:03:52.602175 PCI: 00:1f.4: enabled 0
656 05:03:52.602607 PCI: 00:1f.5: enabled 1
657 05:03:52.605204 PCI: 00:1f.6: enabled 0
658 05:03:52.608914 PCI: 00:1f.7: enabled 0
659 05:03:52.609347 APIC: 00: enabled 1
660 05:03:52.611870 GENERIC: 0.0: enabled 1
661 05:03:52.615449 GENERIC: 0.0: enabled 1
662 05:03:52.618864 GENERIC: 1.0: enabled 1
663 05:03:52.619333 GENERIC: 0.0: enabled 1
664 05:03:52.622203 GENERIC: 1.0: enabled 1
665 05:03:52.625695 USB0 port 0: enabled 1
666 05:03:52.629166 GENERIC: 0.0: enabled 1
667 05:03:52.629725 USB0 port 0: enabled 1
668 05:03:52.632009 GENERIC: 0.0: enabled 1
669 05:03:52.635734 I2C: 00:1a: enabled 1
670 05:03:52.636303 I2C: 00:31: enabled 1
671 05:03:52.639078 I2C: 00:32: enabled 1
672 05:03:52.642315 I2C: 00:10: enabled 1
673 05:03:52.642803 I2C: 00:15: enabled 1
674 05:03:52.645234 GENERIC: 0.0: enabled 0
675 05:03:52.648727 GENERIC: 1.0: enabled 0
676 05:03:52.651875 GENERIC: 0.0: enabled 1
677 05:03:52.652345 SPI: 00: enabled 1
678 05:03:52.655133 SPI: 00: enabled 1
679 05:03:52.655562 PNP: 0c09.0: enabled 1
680 05:03:52.658446 GENERIC: 0.0: enabled 1
681 05:03:52.661952 USB3 port 0: enabled 1
682 05:03:52.665022 USB3 port 1: enabled 1
683 05:03:52.665457 USB3 port 2: enabled 0
684 05:03:52.668393 USB3 port 3: enabled 0
685 05:03:52.671751 USB2 port 0: enabled 0
686 05:03:52.672173 USB2 port 1: enabled 1
687 05:03:52.675257 USB2 port 2: enabled 1
688 05:03:52.678211 USB2 port 3: enabled 0
689 05:03:52.681779 USB2 port 4: enabled 1
690 05:03:52.682284 USB2 port 5: enabled 0
691 05:03:52.685001 USB2 port 6: enabled 0
692 05:03:52.688405 USB2 port 7: enabled 0
693 05:03:52.688988 USB2 port 8: enabled 0
694 05:03:52.691644 USB2 port 9: enabled 0
695 05:03:52.695216 USB3 port 0: enabled 0
696 05:03:52.695669 USB3 port 1: enabled 1
697 05:03:52.698390 USB3 port 2: enabled 0
698 05:03:52.701917 USB3 port 3: enabled 0
699 05:03:52.705121 GENERIC: 0.0: enabled 1
700 05:03:52.705601 GENERIC: 1.0: enabled 1
701 05:03:52.708236 APIC: 01: enabled 1
702 05:03:52.712054 APIC: 03: enabled 1
703 05:03:52.712603 APIC: 04: enabled 1
704 05:03:52.715274 APIC: 07: enabled 1
705 05:03:52.715700 APIC: 06: enabled 1
706 05:03:52.718220 APIC: 02: enabled 1
707 05:03:52.721727 APIC: 05: enabled 1
708 05:03:52.722208 Compare with tree...
709 05:03:52.725136 Root Device: enabled 1
710 05:03:52.728659 DOMAIN: 0000: enabled 1
711 05:03:52.731398 PCI: 00:00.0: enabled 1
712 05:03:52.731868 PCI: 00:02.0: enabled 1
713 05:03:52.735089 PCI: 00:04.0: enabled 1
714 05:03:52.738357 GENERIC: 0.0: enabled 1
715 05:03:52.741724 PCI: 00:05.0: enabled 1
716 05:03:52.744733 PCI: 00:06.0: enabled 0
717 05:03:52.745202 PCI: 00:07.0: enabled 0
718 05:03:52.748010 GENERIC: 0.0: enabled 1
719 05:03:52.751739 PCI: 00:07.1: enabled 0
720 05:03:52.754605 GENERIC: 1.0: enabled 1
721 05:03:52.758125 PCI: 00:07.2: enabled 0
722 05:03:52.758634 GENERIC: 0.0: enabled 1
723 05:03:52.761391 PCI: 00:07.3: enabled 0
724 05:03:52.764979 GENERIC: 1.0: enabled 1
725 05:03:52.768084 PCI: 00:08.0: enabled 1
726 05:03:52.771602 PCI: 00:09.0: enabled 0
727 05:03:52.772074 PCI: 00:0a.0: enabled 0
728 05:03:52.775145 PCI: 00:0d.0: enabled 1
729 05:03:52.777934 USB0 port 0: enabled 1
730 05:03:52.781516 USB3 port 0: enabled 1
731 05:03:52.784822 USB3 port 1: enabled 1
732 05:03:52.788245 USB3 port 2: enabled 0
733 05:03:52.788717 USB3 port 3: enabled 0
734 05:03:52.791327 PCI: 00:0d.1: enabled 0
735 05:03:52.794742 PCI: 00:0d.2: enabled 0
736 05:03:52.798020 GENERIC: 0.0: enabled 1
737 05:03:52.801460 PCI: 00:0d.3: enabled 0
738 05:03:52.801969 PCI: 00:0e.0: enabled 0
739 05:03:52.804529 PCI: 00:10.2: enabled 1
740 05:03:52.808254 PCI: 00:10.6: enabled 0
741 05:03:52.811283 PCI: 00:10.7: enabled 0
742 05:03:52.815030 PCI: 00:12.0: enabled 0
743 05:03:52.815629 PCI: 00:12.6: enabled 0
744 05:03:52.818345 PCI: 00:13.0: enabled 0
745 05:03:52.821171 PCI: 00:14.0: enabled 1
746 05:03:52.824598 USB0 port 0: enabled 1
747 05:03:52.828228 USB2 port 0: enabled 0
748 05:03:52.828710 USB2 port 1: enabled 1
749 05:03:52.831288 USB2 port 2: enabled 1
750 05:03:52.835213 USB2 port 3: enabled 0
751 05:03:52.838078 USB2 port 4: enabled 1
752 05:03:52.841724 USB2 port 5: enabled 0
753 05:03:52.842317 USB2 port 6: enabled 0
754 05:03:52.844510 USB2 port 7: enabled 0
755 05:03:52.848191 USB2 port 8: enabled 0
756 05:03:52.851779 USB2 port 9: enabled 0
757 05:03:52.855016 USB3 port 0: enabled 0
758 05:03:52.858369 USB3 port 1: enabled 1
759 05:03:52.858981 USB3 port 2: enabled 0
760 05:03:52.861047 USB3 port 3: enabled 0
761 05:03:52.864515 PCI: 00:14.1: enabled 0
762 05:03:52.868056 PCI: 00:14.2: enabled 1
763 05:03:52.871266 PCI: 00:14.3: enabled 1
764 05:03:52.871852 GENERIC: 0.0: enabled 1
765 05:03:52.874611 PCI: 00:15.0: enabled 1
766 05:03:52.877987 I2C: 00:1a: enabled 1
767 05:03:52.881077 I2C: 00:31: enabled 1
768 05:03:52.884435 I2C: 00:32: enabled 1
769 05:03:52.884921 PCI: 00:15.1: enabled 1
770 05:03:52.888080 I2C: 00:10: enabled 1
771 05:03:52.891395 PCI: 00:15.2: enabled 1
772 05:03:52.894998 PCI: 00:15.3: enabled 1
773 05:03:52.895480 PCI: 00:16.0: enabled 1
774 05:03:52.898715 PCI: 00:16.1: enabled 0
775 05:03:52.902351 PCI: 00:16.2: enabled 0
776 05:03:52.902948 PCI: 00:16.3: enabled 0
777 05:03:52.905722 PCI: 00:16.4: enabled 0
778 05:03:52.908780 PCI: 00:16.5: enabled 0
779 05:03:52.912397 PCI: 00:17.0: enabled 1
780 05:03:52.915758 PCI: 00:19.0: enabled 0
781 05:03:52.916245 PCI: 00:19.1: enabled 1
782 05:03:52.918666 I2C: 00:15: enabled 1
783 05:03:52.922274 PCI: 00:19.2: enabled 0
784 05:03:52.925645 PCI: 00:1d.0: enabled 1
785 05:03:52.929254 GENERIC: 0.0: enabled 1
786 05:03:52.929841 PCI: 00:1e.0: enabled 1
787 05:03:52.932225 PCI: 00:1e.1: enabled 0
788 05:03:52.935543 PCI: 00:1e.2: enabled 1
789 05:03:52.938986 SPI: 00: enabled 1
790 05:03:52.988544 PCI: 00:1e.3: enabled 1
791 05:03:52.989197 SPI: 00: enabled 1
792 05:03:52.989662 PCI: 00:1f.0: enabled 1
793 05:03:52.990023 PNP: 0c09.0: enabled 1
794 05:03:52.990365 PCI: 00:1f.1: enabled 0
795 05:03:52.991179 PCI: 00:1f.2: enabled 1
796 05:03:52.991795 GENERIC: 0.0: enabled 1
797 05:03:52.992248 GENERIC: 0.0: enabled 1
798 05:03:52.992597 GENERIC: 1.0: enabled 1
799 05:03:52.992925 PCI: 00:1f.3: enabled 1
800 05:03:52.993247 PCI: 00:1f.4: enabled 0
801 05:03:52.993617 PCI: 00:1f.5: enabled 1
802 05:03:52.993934 PCI: 00:1f.6: enabled 0
803 05:03:52.994278 PCI: 00:1f.7: enabled 0
804 05:03:52.994593 CPU_CLUSTER: 0: enabled 1
805 05:03:52.994939 APIC: 00: enabled 1
806 05:03:52.995301 APIC: 01: enabled 1
807 05:03:52.995614 APIC: 03: enabled 1
808 05:03:52.995916 APIC: 04: enabled 1
809 05:03:52.996221 APIC: 07: enabled 1
810 05:03:53.040688 APIC: 06: enabled 1
811 05:03:53.041243 APIC: 02: enabled 1
812 05:03:53.041622 APIC: 05: enabled 1
813 05:03:53.042362 Root Device scanning...
814 05:03:53.042755 scan_static_bus for Root Device
815 05:03:53.043190 DOMAIN: 0000 enabled
816 05:03:53.043533 CPU_CLUSTER: 0 enabled
817 05:03:53.043856 DOMAIN: 0000 scanning...
818 05:03:53.044176 PCI: pci_scan_bus for bus 00
819 05:03:53.044493 PCI: 00:00.0 [8086/0000] ops
820 05:03:53.044805 PCI: 00:00.0 [8086/9a12] enabled
821 05:03:53.045120 PCI: 00:02.0 [8086/0000] bus ops
822 05:03:53.045430 PCI: 00:02.0 [8086/9a40] enabled
823 05:03:53.045736 PCI: 00:04.0 [8086/0000] bus ops
824 05:03:53.046040 PCI: 00:04.0 [8086/9a03] enabled
825 05:03:53.046344 PCI: 00:05.0 [8086/9a19] enabled
826 05:03:53.046649 PCI: 00:07.0 [0000/0000] hidden
827 05:03:53.049550 PCI: 00:08.0 [8086/9a11] enabled
828 05:03:53.050027 PCI: 00:0a.0 [8086/9a0d] disabled
829 05:03:53.053267 PCI: 00:0d.0 [8086/0000] bus ops
830 05:03:53.053744 PCI: 00:0d.0 [8086/9a13] enabled
831 05:03:53.056172 PCI: 00:14.0 [8086/0000] bus ops
832 05:03:53.059979 PCI: 00:14.0 [8086/a0ed] enabled
833 05:03:53.062919 PCI: 00:14.2 [8086/a0ef] enabled
834 05:03:53.066432 PCI: 00:14.3 [8086/0000] bus ops
835 05:03:53.069761 PCI: 00:14.3 [8086/a0f0] enabled
836 05:03:53.073047 PCI: 00:15.0 [8086/0000] bus ops
837 05:03:53.076144 PCI: 00:15.0 [8086/a0e8] enabled
838 05:03:53.079829 PCI: 00:15.1 [8086/0000] bus ops
839 05:03:53.083127 PCI: 00:15.1 [8086/a0e9] enabled
840 05:03:53.086131 PCI: 00:15.2 [8086/0000] bus ops
841 05:03:53.089647 PCI: 00:15.2 [8086/a0ea] enabled
842 05:03:53.093045 PCI: 00:15.3 [8086/0000] bus ops
843 05:03:53.096447 PCI: 00:15.3 [8086/a0eb] enabled
844 05:03:53.099693 PCI: 00:16.0 [8086/0000] ops
845 05:03:53.102927 PCI: 00:16.0 [8086/a0e0] enabled
846 05:03:53.106306 PCI: Static device PCI: 00:17.0 not found, disabling it.
847 05:03:53.109428
848 05:03:53.109868 PCI: 00:19.0 [8086/0000] bus ops
849 05:03:53.113355
850 05:03:53.116066 PCI: 00:19.0 [8086/a0c5] disabled
851 05:03:53.119845 PCI: 00:19.1 [8086/0000] bus ops
852 05:03:53.123133 PCI: 00:19.1 [8086/a0c6] enabled
853 05:03:53.126248 PCI: 00:1d.0 [8086/0000] bus ops
854 05:03:53.129686 PCI: 00:1d.0 [8086/a0b0] enabled
855 05:03:53.130193 PCI: 00:1e.0 [8086/0000] ops
856 05:03:53.133100 PCI: 00:1e.0 [8086/a0a8] enabled
857 05:03:53.136094 PCI: 00:1e.2 [8086/0000] bus ops
858 05:03:53.139693 PCI: 00:1e.2 [8086/a0aa] enabled
859 05:03:53.142862 PCI: 00:1e.3 [8086/0000] bus ops
860 05:03:53.146394 PCI: 00:1e.3 [8086/a0ab] enabled
861 05:03:53.149703 PCI: 00:1f.0 [8086/0000] bus ops
862 05:03:53.153066 PCI: 00:1f.0 [8086/a087] enabled
863 05:03:53.156253 RTC Init
864 05:03:53.159785 Set power on after power failure.
865 05:03:53.160289 Disabling Deep S3
866 05:03:53.163176 Disabling Deep S3
867 05:03:53.166558 Disabling Deep S4
868 05:03:53.167248 Disabling Deep S4
869 05:03:53.169784 Disabling Deep S5
870 05:03:53.170222 Disabling Deep S5
871 05:03:53.173145 PCI: 00:1f.2 [0000/0000] hidden
872 05:03:53.176360 PCI: 00:1f.3 [8086/0000] bus ops
873 05:03:53.179606 PCI: 00:1f.3 [8086/a0c8] enabled
874 05:03:53.182846 PCI: 00:1f.5 [8086/0000] bus ops
875 05:03:53.186406 PCI: 00:1f.5 [8086/a0a4] enabled
876 05:03:53.189713 PCI: Leftover static devices:
877 05:03:53.192941 PCI: 00:10.2
878 05:03:53.193424 PCI: 00:10.6
879 05:03:53.193899 PCI: 00:10.7
880 05:03:53.196314 PCI: 00:06.0
881 05:03:53.196798 PCI: 00:07.1
882 05:03:53.199611 PCI: 00:07.2
883 05:03:53.200120 PCI: 00:07.3
884 05:03:53.200620 PCI: 00:09.0
885 05:03:53.202933 PCI: 00:0d.1
886 05:03:53.203418 PCI: 00:0d.2
887 05:03:53.206160 PCI: 00:0d.3
888 05:03:53.206688 PCI: 00:0e.0
889 05:03:53.207165 PCI: 00:12.0
890 05:03:53.209506
891 05:03:53.209986 PCI: 00:12.6
892 05:03:53.210363 PCI: 00:13.0
893 05:03:53.213185 PCI: 00:14.1
894 05:03:53.213703 PCI: 00:16.1
895 05:03:53.216181 PCI: 00:16.2
896 05:03:53.216661 PCI: 00:16.3
897 05:03:53.217031 PCI: 00:16.4
898 05:03:53.219582 PCI: 00:16.5
899 05:03:53.220064 PCI: 00:17.0
900 05:03:53.223229 PCI: 00:19.2
901 05:03:53.223721 PCI: 00:1e.1
902 05:03:53.224102 PCI: 00:1f.1
903 05:03:53.226565 PCI: 00:1f.4
904 05:03:53.227197 PCI: 00:1f.6
905 05:03:53.229367 PCI: 00:1f.7
906 05:03:53.233098 PCI: Check your devicetree.cb.
907 05:03:53.233686 PCI: 00:02.0 scanning...
908 05:03:53.236316 scan_generic_bus for PCI: 00:02.0
909 05:03:53.239407
910 05:03:53.243035 scan_generic_bus for PCI: 00:02.0 done
911 05:03:53.246338 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
912 05:03:53.249305 PCI: 00:04.0 scanning...
913 05:03:53.252552 scan_generic_bus for PCI: 00:04.0
914 05:03:53.256067 GENERIC: 0.0 enabled
915 05:03:53.259456 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
916 05:03:53.266036 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
917 05:03:53.269619 PCI: 00:0d.0 scanning...
918 05:03:53.272783 scan_static_bus for PCI: 00:0d.0
919 05:03:53.273530 USB0 port 0 enabled
920 05:03:53.276002 USB0 port 0 scanning...
921 05:03:53.279338 scan_static_bus for USB0 port 0
922 05:03:53.282457 USB3 port 0 enabled
923 05:03:53.282981 USB3 port 1 enabled
924 05:03:53.285834 USB3 port 2 disabled
925 05:03:53.289327 USB3 port 3 disabled
926 05:03:53.289883 USB3 port 0 scanning...
927 05:03:53.292618 scan_static_bus for USB3 port 0
928 05:03:53.298991 scan_static_bus for USB3 port 0 done
929 05:03:53.302736 scan_bus: bus USB3 port 0 finished in 6 msecs
930 05:03:53.305907 USB3 port 1 scanning...
931 05:03:53.309158 scan_static_bus for USB3 port 1
932 05:03:53.312551 scan_static_bus for USB3 port 1 done
933 05:03:53.315585 scan_bus: bus USB3 port 1 finished in 6 msecs
934 05:03:53.319097 scan_static_bus for USB0 port 0 done
935 05:03:53.325884 scan_bus: bus USB0 port 0 finished in 43 msecs
936 05:03:53.328771 scan_static_bus for PCI: 00:0d.0 done
937 05:03:53.332306 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
938 05:03:53.335785 PCI: 00:14.0 scanning...
939 05:03:53.338768 scan_static_bus for PCI: 00:14.0
940 05:03:53.342298 USB0 port 0 enabled
941 05:03:53.345370 USB0 port 0 scanning...
942 05:03:53.348847 scan_static_bus for USB0 port 0
943 05:03:53.349325 USB2 port 0 disabled
944 05:03:53.351885 USB2 port 1 enabled
945 05:03:53.355394 USB2 port 2 enabled
946 05:03:53.356035 USB2 port 3 disabled
947 05:03:53.358871 USB2 port 4 enabled
948 05:03:53.359374 USB2 port 5 disabled
949 05:03:53.362143 USB2 port 6 disabled
950 05:03:53.365351 USB2 port 7 disabled
951 05:03:53.365907 USB2 port 8 disabled
952 05:03:53.368660 USB2 port 9 disabled
953 05:03:53.372236 USB3 port 0 disabled
954 05:03:53.372717 USB3 port 1 enabled
955 05:03:53.375257 USB3 port 2 disabled
956 05:03:53.378619 USB3 port 3 disabled
957 05:03:53.379202 USB2 port 1 scanning...
958 05:03:53.381970 scan_static_bus for USB2 port 1
959 05:03:53.385450 scan_static_bus for USB2 port 1 done
960 05:03:53.388387
961 05:03:53.391666 scan_bus: bus USB2 port 1 finished in 6 msecs
962 05:03:53.395197 USB2 port 2 scanning...
963 05:03:53.398531 scan_static_bus for USB2 port 2
964 05:03:53.401793 scan_static_bus for USB2 port 2 done
965 05:03:53.405038 scan_bus: bus USB2 port 2 finished in 6 msecs
966 05:03:53.408319 USB2 port 4 scanning...
967 05:03:53.411622 scan_static_bus for USB2 port 4
968 05:03:53.415183 scan_static_bus for USB2 port 4 done
969 05:03:53.418359 scan_bus: bus USB2 port 4 finished in 6 msecs
970 05:03:53.421848 USB3 port 1 scanning...
971 05:03:53.424832 scan_static_bus for USB3 port 1
972 05:03:53.428447 scan_static_bus for USB3 port 1 done
973 05:03:53.435025 scan_bus: bus USB3 port 1 finished in 6 msecs
974 05:03:53.438285 scan_static_bus for USB0 port 0 done
975 05:03:53.441301 scan_bus: bus USB0 port 0 finished in 93 msecs
976 05:03:53.445034 scan_static_bus for PCI: 00:14.0 done
977 05:03:53.451575 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
978 05:03:53.455139 PCI: 00:14.3 scanning...
979 05:03:53.457951 scan_static_bus for PCI: 00:14.3
980 05:03:53.458476 GENERIC: 0.0 enabled
981 05:03:53.464743 scan_static_bus for PCI: 00:14.3 done
982 05:03:53.467890 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
983 05:03:53.472033 PCI: 00:15.0 scanning...
984 05:03:53.475410 scan_static_bus for PCI: 00:15.0
985 05:03:53.475948 I2C: 00:1a enabled
986 05:03:53.478952 I2C: 00:31 enabled
987 05:03:53.479439 I2C: 00:32 enabled
988 05:03:53.485341 scan_static_bus for PCI: 00:15.0 done
989 05:03:53.488849 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
990 05:03:53.492041 PCI: 00:15.1 scanning...
991 05:03:53.494952 scan_static_bus for PCI: 00:15.1
992 05:03:53.495447 I2C: 00:10 enabled
993 05:03:53.501703 scan_static_bus for PCI: 00:15.1 done
994 05:03:53.505071 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
995 05:03:53.508406 PCI: 00:15.2 scanning...
996 05:03:53.511836 scan_static_bus for PCI: 00:15.2
997 05:03:53.515329 scan_static_bus for PCI: 00:15.2 done
998 05:03:53.518236 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
999 05:03:53.521633 PCI: 00:15.3 scanning...
1000 05:03:53.524677 scan_static_bus for PCI: 00:15.3
1001 05:03:53.528420 scan_static_bus for PCI: 00:15.3 done
1002 05:03:53.534997 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1003 05:03:53.538108 PCI: 00:19.1 scanning...
1004 05:03:53.541290 scan_static_bus for PCI: 00:19.1
1005 05:03:53.541772 I2C: 00:15 enabled
1006 05:03:53.544825 scan_static_bus for PCI: 00:19.1 done
1007 05:03:53.551300 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1008 05:03:53.554980 PCI: 00:1d.0 scanning...
1009 05:03:53.558363 do_pci_scan_bridge for PCI: 00:1d.0
1010 05:03:53.561171 PCI: pci_scan_bus for bus 01
1011 05:03:53.564781 PCI: 01:00.0 [1c5c/174a] enabled
1012 05:03:53.565370 GENERIC: 0.0 enabled
1013 05:03:53.567816 Enabling Common Clock Configuration
1014 05:03:53.574837 L1 Sub-State supported from root port 29
1015 05:03:53.578266 L1 Sub-State Support = 0xf
1016 05:03:53.578747 CommonModeRestoreTime = 0x28
1017 05:03:53.584521 Power On Value = 0x16, Power On Scale = 0x0
1018 05:03:53.585119 ASPM: Enabled L1
1019 05:03:53.587520 PCIe: Max_Payload_Size adjusted to 128
1020 05:03:53.590947
1021 05:03:53.594272 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1022 05:03:53.597725 PCI: 00:1e.2 scanning...
1023 05:03:53.600941 scan_generic_bus for PCI: 00:1e.2
1024 05:03:53.601463 SPI: 00 enabled
1025 05:03:53.607365 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1026 05:03:53.614023 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1027 05:03:53.614508 PCI: 00:1e.3 scanning...
1028 05:03:53.617434 scan_generic_bus for PCI: 00:1e.3
1029 05:03:53.620907 SPI: 00 enabled
1030 05:03:53.627464 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1031 05:03:53.630414 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1032 05:03:53.634000 PCI: 00:1f.0 scanning...
1033 05:03:53.637284 scan_static_bus for PCI: 00:1f.0
1034 05:03:53.640794 PNP: 0c09.0 enabled
1035 05:03:53.641141 PNP: 0c09.0 scanning...
1036 05:03:53.643905 scan_static_bus for PNP: 0c09.0
1037 05:03:53.650683 scan_static_bus for PNP: 0c09.0 done
1038 05:03:53.654179 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1039 05:03:53.657118 scan_static_bus for PCI: 00:1f.0 done
1040 05:03:53.663927 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1041 05:03:53.664358 PCI: 00:1f.2 scanning...
1042 05:03:53.667199 scan_static_bus for PCI: 00:1f.2
1043 05:03:53.670472 GENERIC: 0.0 enabled
1044 05:03:53.674166 GENERIC: 0.0 scanning...
1045 05:03:53.676962 scan_static_bus for GENERIC: 0.0
1046 05:03:53.680720 GENERIC: 0.0 enabled
1047 05:03:53.681199 GENERIC: 1.0 enabled
1048 05:03:53.683827 scan_static_bus for GENERIC: 0.0 done
1049 05:03:53.690584 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1050 05:03:53.693729 scan_static_bus for PCI: 00:1f.2 done
1051 05:03:53.697332 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1052 05:03:53.700148 PCI: 00:1f.3 scanning...
1053 05:03:53.703517 scan_static_bus for PCI: 00:1f.3
1054 05:03:53.707005 scan_static_bus for PCI: 00:1f.3 done
1055 05:03:53.713926 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1056 05:03:53.716833 PCI: 00:1f.5 scanning...
1057 05:03:53.720057 scan_generic_bus for PCI: 00:1f.5
1058 05:03:53.723597 scan_generic_bus for PCI: 00:1f.5 done
1059 05:03:53.726989 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1060 05:03:53.733529 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1061 05:03:53.736982 scan_static_bus for Root Device done
1062 05:03:53.739958 scan_bus: bus Root Device finished in 736 msecs
1063 05:03:53.743616 done
1064 05:03:53.746782 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1065 05:03:53.750258
1066 05:03:53.751053 Chrome EC: UHEPI supported
1067 05:03:53.756692 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1068 05:03:53.763239 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1069 05:03:53.766931 SPI flash protection: WPSW=0 SRP0=0
1070 05:03:53.773351 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1071 05:03:53.776622 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1072 05:03:53.779556 found VGA at PCI: 00:02.0
1073 05:03:53.783275 Setting up VGA for PCI: 00:02.0
1074 05:03:53.789813 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1075 05:03:53.793102 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1076 05:03:53.796330 Allocating resources...
1077 05:03:53.799356 Reading resources...
1078 05:03:53.802772 Root Device read_resources bus 0 link: 0
1079 05:03:53.806310 DOMAIN: 0000 read_resources bus 0 link: 0
1080 05:03:53.812896 PCI: 00:04.0 read_resources bus 1 link: 0
1081 05:03:53.816151 PCI: 00:04.0 read_resources bus 1 link: 0 done
1082 05:03:53.822848 PCI: 00:0d.0 read_resources bus 0 link: 0
1083 05:03:53.826501 USB0 port 0 read_resources bus 0 link: 0
1084 05:03:53.832970 USB0 port 0 read_resources bus 0 link: 0 done
1085 05:03:53.836464 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1086 05:03:53.839613 PCI: 00:14.0 read_resources bus 0 link: 0
1087 05:03:53.842970
1088 05:03:53.846182 USB0 port 0 read_resources bus 0 link: 0
1089 05:03:53.852774 USB0 port 0 read_resources bus 0 link: 0 done
1090 05:03:53.855862 PCI: 00:14.0 read_resources bus 0 link: 0 done
1091 05:03:53.862328 PCI: 00:14.3 read_resources bus 0 link: 0
1092 05:03:53.866165 PCI: 00:14.3 read_resources bus 0 link: 0 done
1093 05:03:53.869381 PCI: 00:15.0 read_resources bus 0 link: 0
1094 05:03:53.876959 PCI: 00:15.0 read_resources bus 0 link: 0 done
1095 05:03:53.879926 PCI: 00:15.1 read_resources bus 0 link: 0
1096 05:03:53.886617 PCI: 00:15.1 read_resources bus 0 link: 0 done
1097 05:03:53.890117 PCI: 00:19.1 read_resources bus 0 link: 0
1098 05:03:53.897118 PCI: 00:19.1 read_resources bus 0 link: 0 done
1099 05:03:53.900519 PCI: 00:1d.0 read_resources bus 1 link: 0
1100 05:03:53.906994 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1101 05:03:53.910409 PCI: 00:1e.2 read_resources bus 2 link: 0
1102 05:03:53.917152 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1103 05:03:53.920452 PCI: 00:1e.3 read_resources bus 3 link: 0
1104 05:03:53.927139 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1105 05:03:53.930701 PCI: 00:1f.0 read_resources bus 0 link: 0
1106 05:03:53.937216 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1107 05:03:53.940562 PCI: 00:1f.2 read_resources bus 0 link: 0
1108 05:03:53.943793 GENERIC: 0.0 read_resources bus 0 link: 0
1109 05:03:53.950816 GENERIC: 0.0 read_resources bus 0 link: 0 done
1110 05:03:53.953925 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1111 05:03:53.961684 DOMAIN: 0000 read_resources bus 0 link: 0 done
1112 05:03:53.964742 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1113 05:03:53.971409 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1114 05:03:53.975058 Root Device read_resources bus 0 link: 0 done
1115 05:03:53.977696 Done reading resources.
1116 05:03:53.984202 Show resources in subtree (Root Device)...After reading.
1117 05:03:53.987714 Root Device child on link 0 DOMAIN: 0000
1118 05:03:53.990735 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1119 05:03:54.000758 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1120 05:03:54.010741 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1121 05:03:54.014135 PCI: 00:00.0
1122 05:03:54.024415 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1123 05:03:54.030867 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1124 05:03:54.040884 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1125 05:03:54.050674 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1126 05:03:54.060791 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1127 05:03:54.070729 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1128 05:03:54.080450 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1129 05:03:54.087113 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1130 05:03:54.097116 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1131 05:03:54.107054 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1132 05:03:54.117147 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1133 05:03:54.126804 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1134 05:03:54.133671 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1135 05:03:54.136830
1136 05:03:54.143394 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1137 05:03:54.153864 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1138 05:03:54.163215 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1139 05:03:54.173334 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1140 05:03:54.183229 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1141 05:03:54.193469 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1142 05:03:54.199834 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1143 05:03:54.202992 PCI: 00:02.0
1144 05:03:54.213121 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1145 05:03:54.223073 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1146 05:03:54.232958 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1147 05:03:54.236170 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1148 05:03:54.246299 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1149 05:03:54.249519 GENERIC: 0.0
1150 05:03:54.250095 PCI: 00:05.0
1151 05:03:54.259753 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1152 05:03:54.266236 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1153 05:03:54.266787 GENERIC: 0.0
1154 05:03:54.269547 PCI: 00:08.0
1155 05:03:54.279756 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1156 05:03:54.280322 PCI: 00:0a.0
1157 05:03:54.282707 PCI: 00:0d.0 child on link 0 USB0 port 0
1158 05:03:54.292666 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1159 05:03:54.299363 USB0 port 0 child on link 0 USB3 port 0
1160 05:03:54.299852 USB3 port 0
1161 05:03:54.302439 USB3 port 1
1162 05:03:54.303138 USB3 port 2
1163 05:03:54.306100 USB3 port 3
1164 05:03:54.309465 PCI: 00:14.0 child on link 0 USB0 port 0
1165 05:03:54.319023 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1166 05:03:54.326098 USB0 port 0 child on link 0 USB2 port 0
1167 05:03:54.326706 USB2 port 0
1168 05:03:54.329198 USB2 port 1
1169 05:03:54.329694 USB2 port 2
1170 05:03:54.332596 USB2 port 3
1171 05:03:54.333082 USB2 port 4
1172 05:03:54.335944 USB2 port 5
1173 05:03:54.336446 USB2 port 6
1174 05:03:54.339391 USB2 port 7
1175 05:03:54.339883 USB2 port 8
1176 05:03:54.342837 USB2 port 9
1177 05:03:54.343459 USB3 port 0
1178 05:03:54.345825 USB3 port 1
1179 05:03:54.349257 USB3 port 2
1180 05:03:54.349872 USB3 port 3
1181 05:03:54.352790 PCI: 00:14.2
1182 05:03:54.362645 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1183 05:03:54.372357 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1184 05:03:54.375767 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1185 05:03:54.385840 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1186 05:03:54.386397 GENERIC: 0.0
1187 05:03:54.391964 PCI: 00:15.0 child on link 0 I2C: 00:1a
1188 05:03:54.402010 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1189 05:03:54.402514 I2C: 00:1a
1190 05:03:54.405307 I2C: 00:31
1191 05:03:54.405800 I2C: 00:32
1192 05:03:54.408935 PCI: 00:15.1 child on link 0 I2C: 00:10
1193 05:03:54.419155 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 05:03:54.422338 I2C: 00:10
1195 05:03:54.422962 PCI: 00:15.2
1196 05:03:54.432206 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 05:03:54.435308 PCI: 00:15.3
1198 05:03:54.445169 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 05:03:54.445735 PCI: 00:16.0
1200 05:03:54.455443 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 05:03:54.458926 PCI: 00:19.0
1202 05:03:54.461893 PCI: 00:19.1 child on link 0 I2C: 00:15
1203 05:03:54.472122 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1204 05:03:54.475231 I2C: 00:15
1205 05:03:54.478516 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1206 05:03:54.488249 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1207 05:03:54.498301 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1208 05:03:54.504916 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1209 05:03:54.508148 GENERIC: 0.0
1210 05:03:54.508647 PCI: 01:00.0
1211 05:03:54.518377 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1212 05:03:54.521723
1213 05:03:54.527881 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1214 05:03:54.538099 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1215 05:03:54.541650 PCI: 00:1e.0
1216 05:03:54.551527 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1217 05:03:54.554642 PCI: 00:1e.2 child on link 0 SPI: 00
1218 05:03:54.564759 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1219 05:03:54.568124 SPI: 00
1220 05:03:54.571612 PCI: 00:1e.3 child on link 0 SPI: 00
1221 05:03:54.581699 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1222 05:03:54.582287 SPI: 00
1223 05:03:54.584552 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1224 05:03:54.594959 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1225 05:03:54.597753 PNP: 0c09.0
1226 05:03:54.604599 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1227 05:03:54.611203 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1228 05:03:54.617632 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1229 05:03:54.627661 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1230 05:03:54.634322 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1231 05:03:54.634838 GENERIC: 0.0
1232 05:03:54.637716 GENERIC: 1.0
1233 05:03:54.638210 PCI: 00:1f.3
1234 05:03:54.647555 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1235 05:03:54.657847 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1236 05:03:54.661052 PCI: 00:1f.5
1237 05:03:54.671018 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1238 05:03:54.674107 CPU_CLUSTER: 0 child on link 0 APIC: 00
1239 05:03:54.674601 APIC: 00
1240 05:03:54.677416 APIC: 01
1241 05:03:54.677991 APIC: 03
1242 05:03:54.678488 APIC: 04
1243 05:03:54.680864 APIC: 07
1244 05:03:54.681360 APIC: 06
1245 05:03:54.681845 APIC: 02
1246 05:03:54.683909 APIC: 05
1247 05:03:54.690918 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1248 05:03:54.697223 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1249 05:03:54.704050 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1250 05:03:54.710297 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1251 05:03:54.713839 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1252 05:03:54.717132 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1253 05:03:54.720654 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1254 05:03:54.730568 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1255 05:03:54.737431 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1256 05:03:54.743825 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1257 05:03:54.750343 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1258 05:03:54.757095 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1259 05:03:54.763374 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1260 05:03:54.773834 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1261 05:03:54.780176 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1262 05:03:54.783305 DOMAIN: 0000: Resource ranges:
1263 05:03:54.787085 * Base: 1000, Size: 800, Tag: 100
1264 05:03:54.790074 * Base: 1900, Size: e700, Tag: 100
1265 05:03:54.796565 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1266 05:03:54.803397 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1267 05:03:54.810199 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1268 05:03:54.816838 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1269 05:03:54.823474 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1270 05:03:54.833694 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1271 05:03:54.840274 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1272 05:03:54.846656 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1273 05:03:54.857011 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1274 05:03:54.863464 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1275 05:03:54.869906 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1276 05:03:54.880059 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1277 05:03:54.886634 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1278 05:03:54.893354 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1279 05:03:54.903150 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1280 05:03:54.909732 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1281 05:03:54.916510 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1282 05:03:54.926318 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1283 05:03:54.932840 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1284 05:03:54.939724 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1285 05:03:54.949905 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1286 05:03:54.956355 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1287 05:03:54.962944 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1288 05:03:54.972862 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1289 05:03:54.979528 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1290 05:03:54.982514 DOMAIN: 0000: Resource ranges:
1291 05:03:54.986250 * Base: 7fc00000, Size: 40400000, Tag: 200
1292 05:03:54.992776 * Base: d0000000, Size: 28000000, Tag: 200
1293 05:03:54.996215 * Base: fa000000, Size: 1000000, Tag: 200
1294 05:03:54.999002 * Base: fb001000, Size: 2fff000, Tag: 200
1295 05:03:55.002669 * Base: fe010000, Size: 2e000, Tag: 200
1296 05:03:55.009138 * Base: fe03f000, Size: d41000, Tag: 200
1297 05:03:55.012850 * Base: fed88000, Size: 8000, Tag: 200
1298 05:03:55.015761 * Base: fed93000, Size: d000, Tag: 200
1299 05:03:55.019077 * Base: feda2000, Size: 1e000, Tag: 200
1300 05:03:55.025882 * Base: fede0000, Size: 1220000, Tag: 200
1301 05:03:55.029221 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1302 05:03:55.035871 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1303 05:03:55.042381 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1304 05:03:55.049128 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1305 05:03:55.055437 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1306 05:03:55.062271 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1307 05:03:55.069279 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1308 05:03:55.075414 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1309 05:03:55.082512 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1310 05:03:55.089147 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1311 05:03:55.095797 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1312 05:03:55.102088 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1313 05:03:55.108824 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1314 05:03:55.115002 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1315 05:03:55.122061 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1316 05:03:55.128754 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1317 05:03:55.135399 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1318 05:03:55.142230 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1319 05:03:55.148651 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1320 05:03:55.154841 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1321 05:03:55.161900 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1322 05:03:55.168763 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1323 05:03:55.175300 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1324 05:03:55.181532 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1325 05:03:55.191692 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1326 05:03:55.195490 PCI: 00:1d.0: Resource ranges:
1327 05:03:55.198410 * Base: 7fc00000, Size: 100000, Tag: 200
1328 05:03:55.204700 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1329 05:03:55.211213 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1330 05:03:55.217838 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1331 05:03:55.227869 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1332 05:03:55.234794 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1333 05:03:55.237927 Root Device assign_resources, bus 0 link: 0
1334 05:03:55.244534 DOMAIN: 0000 assign_resources, bus 0 link: 0
1335 05:03:55.251072 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1336 05:03:55.261101 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1337 05:03:55.267472 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1338 05:03:55.274379 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1339 05:03:55.280647 PCI: 00:04.0 assign_resources, bus 1 link: 0
1340 05:03:55.284285 PCI: 00:04.0 assign_resources, bus 1 link: 0
1341 05:03:55.294403 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1342 05:03:55.300979 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1343 05:03:55.310569 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1344 05:03:55.314061 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1345 05:03:55.317417 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1346 05:03:55.320739
1347 05:03:55.327168 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1348 05:03:55.330412 PCI: 00:14.0 assign_resources, bus 0 link: 0
1349 05:03:55.337387 PCI: 00:14.0 assign_resources, bus 0 link: 0
1350 05:03:55.343667 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1351 05:03:55.353528 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1352 05:03:55.360263 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1353 05:03:55.367318 PCI: 00:14.3 assign_resources, bus 0 link: 0
1354 05:03:55.370065 PCI: 00:14.3 assign_resources, bus 0 link: 0
1355 05:03:55.376958 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1356 05:03:55.380351
1357 05:03:55.383718 PCI: 00:15.0 assign_resources, bus 0 link: 0
1358 05:03:55.387049 PCI: 00:15.0 assign_resources, bus 0 link: 0
1359 05:03:55.396487 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1360 05:03:55.399960 PCI: 00:15.1 assign_resources, bus 0 link: 0
1361 05:03:55.406375 PCI: 00:15.1 assign_resources, bus 0 link: 0
1362 05:03:55.413299 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1363 05:03:55.423662 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1364 05:03:55.430203 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1365 05:03:55.439424 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1366 05:03:55.442778 PCI: 00:19.1 assign_resources, bus 0 link: 0
1367 05:03:55.446136 PCI: 00:19.1 assign_resources, bus 0 link: 0
1368 05:03:55.456253 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1369 05:03:55.466256 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1370 05:03:55.476072 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1371 05:03:55.479740 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1372 05:03:55.486139 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1373 05:03:55.495803 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1374 05:03:55.502983 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1375 05:03:55.505898 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1376 05:03:55.509179
1377 05:03:55.516078 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1378 05:03:55.519158 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1379 05:03:55.525695 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1380 05:03:55.532980 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1381 05:03:55.538918 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1382 05:03:55.542122 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1383 05:03:55.549237 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1384 05:03:55.552565 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1385 05:03:55.555471 LPC: Trying to open IO window from 800 size 1ff
1386 05:03:55.558857
1387 05:03:55.565745 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1388 05:03:55.572340 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1389 05:03:55.582439 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1390 05:03:55.585480 DOMAIN: 0000 assign_resources, bus 0 link: 0
1391 05:03:55.592217 Root Device assign_resources, bus 0 link: 0
1392 05:03:55.592807 Done setting resources.
1393 05:03:55.599055 Show resources in subtree (Root Device)...After assigning values.
1394 05:03:55.605486 Root Device child on link 0 DOMAIN: 0000
1395 05:03:55.608954 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1396 05:03:55.618816 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1397 05:03:55.628906 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1398 05:03:55.629484 PCI: 00:00.0
1399 05:03:55.638815 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1400 05:03:55.648710 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1401 05:03:55.659120 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1402 05:03:55.668442 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1403 05:03:55.675373 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1404 05:03:55.679043
1405 05:03:55.685708 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1406 05:03:55.695206 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1407 05:03:55.704840 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1408 05:03:55.714970 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1409 05:03:55.724886 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1410 05:03:55.731382 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1411 05:03:55.741278 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1412 05:03:55.751328 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1413 05:03:55.761409 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1414 05:03:55.771235 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1415 05:03:55.778297 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1416 05:03:55.781119
1417 05:03:55.791069 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1418 05:03:55.798198 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1419 05:03:55.807766 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1420 05:03:55.818130 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1421 05:03:55.821293 PCI: 00:02.0
1422 05:03:55.831193 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1423 05:03:55.840877 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1424 05:03:55.851141 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1425 05:03:55.854564 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1426 05:03:55.864517 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1427 05:03:55.867888 GENERIC: 0.0
1428 05:03:55.868489 PCI: 00:05.0
1429 05:03:55.877861 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1430 05:03:55.880946
1431 05:03:55.884149 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1432 05:03:55.884744 GENERIC: 0.0
1433 05:03:55.887577 PCI: 00:08.0
1434 05:03:55.897528 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1435 05:03:55.898092 PCI: 00:0a.0
1436 05:03:55.900841
1437 05:03:55.903931 PCI: 00:0d.0 child on link 0 USB0 port 0
1438 05:03:55.913691 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1439 05:03:55.917366 USB0 port 0 child on link 0 USB3 port 0
1440 05:03:55.920353 USB3 port 0
1441 05:03:55.920860 USB3 port 1
1442 05:03:55.923905 USB3 port 2
1443 05:03:55.924390 USB3 port 3
1444 05:03:55.930519 PCI: 00:14.0 child on link 0 USB0 port 0
1445 05:03:55.940587 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1446 05:03:55.943583 USB0 port 0 child on link 0 USB2 port 0
1447 05:03:55.946839 USB2 port 0
1448 05:03:55.947358 USB2 port 1
1449 05:03:55.950482 USB2 port 2
1450 05:03:55.951001 USB2 port 3
1451 05:03:55.953894 USB2 port 4
1452 05:03:55.954482 USB2 port 5
1453 05:03:55.957135 USB2 port 6
1454 05:03:55.957620 USB2 port 7
1455 05:03:55.960379 USB2 port 8
1456 05:03:55.963825 USB2 port 9
1457 05:03:55.964411 USB3 port 0
1458 05:03:55.967077 USB3 port 1
1459 05:03:55.967679 USB3 port 2
1460 05:03:55.970294 USB3 port 3
1461 05:03:55.970778 PCI: 00:14.2
1462 05:03:55.980168 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1463 05:03:55.990509 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1464 05:03:55.997010 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1465 05:03:56.006941 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1466 05:03:56.007504 GENERIC: 0.0
1467 05:03:56.013461 PCI: 00:15.0 child on link 0 I2C: 00:1a
1468 05:03:56.023097 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1469 05:03:56.023606 I2C: 00:1a
1470 05:03:56.026951 I2C: 00:31
1471 05:03:56.027435 I2C: 00:32
1472 05:03:56.033236 PCI: 00:15.1 child on link 0 I2C: 00:10
1473 05:03:56.043409 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1474 05:03:56.043926 I2C: 00:10
1475 05:03:56.046715 PCI: 00:15.2
1476 05:03:56.056728 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1477 05:03:56.057285 PCI: 00:15.3
1478 05:03:56.066785 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1479 05:03:56.069697 PCI: 00:16.0
1480 05:03:56.080025 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1481 05:03:56.080609 PCI: 00:19.0
1482 05:03:56.086762 PCI: 00:19.1 child on link 0 I2C: 00:15
1483 05:03:56.096705 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1484 05:03:56.097259 I2C: 00:15
1485 05:03:56.102980 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1486 05:03:56.113138 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1487 05:03:56.122744 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1488 05:03:56.133351 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1489 05:03:56.136010 GENERIC: 0.0
1490 05:03:56.136497 PCI: 01:00.0
1491 05:03:56.146252 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1492 05:03:56.159335 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1493 05:03:56.169629 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1494 05:03:56.170243 PCI: 00:1e.0
1495 05:03:56.182611 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1496 05:03:56.186219 PCI: 00:1e.2 child on link 0 SPI: 00
1497 05:03:56.196249 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1498 05:03:56.196839 SPI: 00
1499 05:03:56.199512 PCI: 00:1e.3 child on link 0 SPI: 00
1500 05:03:56.212718 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1501 05:03:56.213314 SPI: 00
1502 05:03:56.216085 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1503 05:03:56.225992 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1504 05:03:56.226661 PNP: 0c09.0
1505 05:03:56.235987 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1506 05:03:56.238864 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1507 05:03:56.248940 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1508 05:03:56.258946 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1509 05:03:56.262365 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1510 05:03:56.265893 GENERIC: 0.0
1511 05:03:56.268896 GENERIC: 1.0
1512 05:03:56.269381 PCI: 00:1f.3
1513 05:03:56.278918 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1514 05:03:56.288910 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1515 05:03:56.292383 PCI: 00:1f.5
1516 05:03:56.302048 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1517 05:03:56.305513 CPU_CLUSTER: 0 child on link 0 APIC: 00
1518 05:03:56.308355 APIC: 00
1519 05:03:56.308892 APIC: 01
1520 05:03:56.309275 APIC: 03
1521 05:03:56.312153 APIC: 04
1522 05:03:56.312740 APIC: 07
1523 05:03:56.315328 APIC: 06
1524 05:03:56.315815 APIC: 02
1525 05:03:56.316197 APIC: 05
1526 05:03:56.318582 Done allocating resources.
1527 05:03:56.325531 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1528 05:03:56.331897 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1529 05:03:56.335016 Configure GPIOs for I2S audio on UP4.
1530 05:03:56.341817 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1531 05:03:56.345385 Enabling resources...
1532 05:03:56.348612 PCI: 00:00.0 subsystem <- 8086/9a12
1533 05:03:56.351698 PCI: 00:00.0 cmd <- 06
1534 05:03:56.354900 PCI: 00:02.0 subsystem <- 8086/9a40
1535 05:03:56.358390 PCI: 00:02.0 cmd <- 03
1536 05:03:56.361688 PCI: 00:04.0 subsystem <- 8086/9a03
1537 05:03:56.362189 PCI: 00:04.0 cmd <- 02
1538 05:03:56.368592 PCI: 00:05.0 subsystem <- 8086/9a19
1539 05:03:56.369175 PCI: 00:05.0 cmd <- 02
1540 05:03:56.371683 PCI: 00:08.0 subsystem <- 8086/9a11
1541 05:03:56.375156 PCI: 00:08.0 cmd <- 06
1542 05:03:56.378289 PCI: 00:0d.0 subsystem <- 8086/9a13
1543 05:03:56.381657 PCI: 00:0d.0 cmd <- 02
1544 05:03:56.385056 PCI: 00:14.0 subsystem <- 8086/a0ed
1545 05:03:56.388069 PCI: 00:14.0 cmd <- 02
1546 05:03:56.391548 PCI: 00:14.2 subsystem <- 8086/a0ef
1547 05:03:56.394802 PCI: 00:14.2 cmd <- 02
1548 05:03:56.398031 PCI: 00:14.3 subsystem <- 8086/a0f0
1549 05:03:56.401411 PCI: 00:14.3 cmd <- 02
1550 05:03:56.404811 PCI: 00:15.0 subsystem <- 8086/a0e8
1551 05:03:56.407932 PCI: 00:15.0 cmd <- 02
1552 05:03:56.411377 PCI: 00:15.1 subsystem <- 8086/a0e9
1553 05:03:56.411860 PCI: 00:15.1 cmd <- 02
1554 05:03:56.418135 PCI: 00:15.2 subsystem <- 8086/a0ea
1555 05:03:56.418616 PCI: 00:15.2 cmd <- 02
1556 05:03:56.421669 PCI: 00:15.3 subsystem <- 8086/a0eb
1557 05:03:56.424814 PCI: 00:15.3 cmd <- 02
1558 05:03:56.427793 PCI: 00:16.0 subsystem <- 8086/a0e0
1559 05:03:56.431379 PCI: 00:16.0 cmd <- 02
1560 05:03:56.434822 PCI: 00:19.1 subsystem <- 8086/a0c6
1561 05:03:56.437835 PCI: 00:19.1 cmd <- 02
1562 05:03:56.441550 PCI: 00:1d.0 bridge ctrl <- 0013
1563 05:03:56.444800 PCI: 00:1d.0 subsystem <- 8086/a0b0
1564 05:03:56.447775 PCI: 00:1d.0 cmd <- 06
1565 05:03:56.451203 PCI: 00:1e.0 subsystem <- 8086/a0a8
1566 05:03:56.454575 PCI: 00:1e.0 cmd <- 06
1567 05:03:56.457755 PCI: 00:1e.2 subsystem <- 8086/a0aa
1568 05:03:56.458246 PCI: 00:1e.2 cmd <- 06
1569 05:03:56.460762
1570 05:03:56.464450 PCI: 00:1e.3 subsystem <- 8086/a0ab
1571 05:03:56.464940 PCI: 00:1e.3 cmd <- 02
1572 05:03:56.471204 PCI: 00:1f.0 subsystem <- 8086/a087
1573 05:03:56.471842 PCI: 00:1f.0 cmd <- 407
1574 05:03:56.474513 PCI: 00:1f.3 subsystem <- 8086/a0c8
1575 05:03:56.477695 PCI: 00:1f.3 cmd <- 02
1576 05:03:56.481147 PCI: 00:1f.5 subsystem <- 8086/a0a4
1577 05:03:56.484439 PCI: 00:1f.5 cmd <- 406
1578 05:03:56.488721 PCI: 01:00.0 cmd <- 02
1579 05:03:56.493655 done.
1580 05:03:56.497116 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1581 05:03:56.500249 Initializing devices...
1582 05:03:56.503531 Root Device init
1583 05:03:56.506604 Chrome EC: Set SMI mask to 0x0000000000000000
1584 05:03:56.513849 Chrome EC: clear events_b mask to 0x0000000000000000
1585 05:03:56.520560 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1586 05:03:56.527103 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1587 05:03:56.533875 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1588 05:03:56.536987 Chrome EC: Set WAKE mask to 0x0000000000000000
1589 05:03:56.544978 fw_config match found: DB_USB=USB3_ACTIVE
1590 05:03:56.548220 Configure Right Type-C port orientation for retimer
1591 05:03:56.551904 Root Device init finished in 46 msecs
1592 05:03:56.555781 PCI: 00:00.0 init
1593 05:03:56.559029 CPU TDP = 9 Watts
1594 05:03:56.559516 CPU PL1 = 9 Watts
1595 05:03:56.562465 CPU PL2 = 40 Watts
1596 05:03:56.565785 CPU PL4 = 83 Watts
1597 05:03:56.569319 PCI: 00:00.0 init finished in 8 msecs
1598 05:03:56.569933 PCI: 00:02.0 init
1599 05:03:56.572430 GMA: Found VBT in CBFS
1600 05:03:56.575855 GMA: Found valid VBT in CBFS
1601 05:03:56.582375 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1602 05:03:56.588886 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1603 05:03:56.592436 PCI: 00:02.0 init finished in 18 msecs
1604 05:03:56.595533 PCI: 00:05.0 init
1605 05:03:56.599090 PCI: 00:05.0 init finished in 0 msecs
1606 05:03:56.602636 PCI: 00:08.0 init
1607 05:03:56.605750 PCI: 00:08.0 init finished in 0 msecs
1608 05:03:56.609122 PCI: 00:14.0 init
1609 05:03:56.612158 PCI: 00:14.0 init finished in 0 msecs
1610 05:03:56.615572 PCI: 00:14.2 init
1611 05:03:56.618810 PCI: 00:14.2 init finished in 0 msecs
1612 05:03:56.622451 PCI: 00:15.0 init
1613 05:03:56.623084 I2C bus 0 version 0x3230302a
1614 05:03:56.628822 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1615 05:03:56.632429 PCI: 00:15.0 init finished in 6 msecs
1616 05:03:56.633055 PCI: 00:15.1 init
1617 05:03:56.635688 I2C bus 1 version 0x3230302a
1618 05:03:56.638797 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1619 05:03:56.641985 PCI: 00:15.1 init finished in 6 msecs
1620 05:03:56.645988 PCI: 00:15.2 init
1621 05:03:56.649293 I2C bus 2 version 0x3230302a
1622 05:03:56.652820 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1623 05:03:56.655683 PCI: 00:15.2 init finished in 6 msecs
1624 05:03:56.659035 PCI: 00:15.3 init
1625 05:03:56.662368 I2C bus 3 version 0x3230302a
1626 05:03:56.665927 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1627 05:03:56.669172 PCI: 00:15.3 init finished in 6 msecs
1628 05:03:56.672401 PCI: 00:16.0 init
1629 05:03:56.675500 PCI: 00:16.0 init finished in 0 msecs
1630 05:03:56.679294 PCI: 00:19.1 init
1631 05:03:56.679875 I2C bus 5 version 0x3230302a
1632 05:03:56.685477 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1633 05:03:56.688991 PCI: 00:19.1 init finished in 6 msecs
1634 05:03:56.689554 PCI: 00:1d.0 init
1635 05:03:56.692446 Initializing PCH PCIe bridge.
1636 05:03:56.695677 PCI: 00:1d.0 init finished in 3 msecs
1637 05:03:56.700005 PCI: 00:1f.0 init
1638 05:03:56.703100 IOAPIC: Initializing IOAPIC at 0xfec00000
1639 05:03:56.710045 IOAPIC: Bootstrap Processor Local APIC = 0x00
1640 05:03:56.710663 IOAPIC: ID = 0x02
1641 05:03:56.712914 IOAPIC: Dumping registers
1642 05:03:56.716344 reg 0x0000: 0x02000000
1643 05:03:56.719690 reg 0x0001: 0x00770020
1644 05:03:56.720174 reg 0x0002: 0x00000000
1645 05:03:56.726420 PCI: 00:1f.0 init finished in 21 msecs
1646 05:03:56.727024 PCI: 00:1f.2 init
1647 05:03:56.729814 Disabling ACPI via APMC.
1648 05:03:56.732863 APMC done.
1649 05:03:56.736335 PCI: 00:1f.2 init finished in 5 msecs
1650 05:03:56.748410 PCI: 01:00.0 init
1651 05:03:56.751771 PCI: 01:00.0 init finished in 0 msecs
1652 05:03:56.754788 PNP: 0c09.0 init
1653 05:03:56.758040 Google Chrome EC uptime: 8.437 seconds
1654 05:03:56.764757 Google Chrome AP resets since EC boot: 1
1655 05:03:56.768164 Google Chrome most recent AP reset causes:
1656 05:03:56.771404 0.349: 32775 shutdown: entering G3
1657 05:03:56.778241 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1658 05:03:56.781655 PNP: 0c09.0 init finished in 22 msecs
1659 05:03:56.787626 Devices initialized
1660 05:03:56.790754 Show all devs... After init.
1661 05:03:56.794062 Root Device: enabled 1
1662 05:03:56.794643 DOMAIN: 0000: enabled 1
1663 05:03:56.797069 CPU_CLUSTER: 0: enabled 1
1664 05:03:56.800721 PCI: 00:00.0: enabled 1
1665 05:03:56.804083 PCI: 00:02.0: enabled 1
1666 05:03:56.804680 PCI: 00:04.0: enabled 1
1667 05:03:56.807020 PCI: 00:05.0: enabled 1
1668 05:03:56.810406 PCI: 00:06.0: enabled 0
1669 05:03:56.813450 PCI: 00:07.0: enabled 0
1670 05:03:56.813936 PCI: 00:07.1: enabled 0
1671 05:03:56.817049 PCI: 00:07.2: enabled 0
1672 05:03:56.820442 PCI: 00:07.3: enabled 0
1673 05:03:56.823867 PCI: 00:08.0: enabled 1
1674 05:03:56.824362 PCI: 00:09.0: enabled 0
1675 05:03:56.826752 PCI: 00:0a.0: enabled 0
1676 05:03:56.830333 PCI: 00:0d.0: enabled 1
1677 05:03:56.830820 PCI: 00:0d.1: enabled 0
1678 05:03:56.833685
1679 05:03:56.834270 PCI: 00:0d.2: enabled 0
1680 05:03:56.837119 PCI: 00:0d.3: enabled 0
1681 05:03:56.840450 PCI: 00:0e.0: enabled 0
1682 05:03:56.840939 PCI: 00:10.2: enabled 1
1683 05:03:56.843509 PCI: 00:10.6: enabled 0
1684 05:03:56.846971 PCI: 00:10.7: enabled 0
1685 05:03:56.850204 PCI: 00:12.0: enabled 0
1686 05:03:56.850679 PCI: 00:12.6: enabled 0
1687 05:03:56.853751 PCI: 00:13.0: enabled 0
1688 05:03:56.856765 PCI: 00:14.0: enabled 1
1689 05:03:56.860057 PCI: 00:14.1: enabled 0
1690 05:03:56.860531 PCI: 00:14.2: enabled 1
1691 05:03:56.863564 PCI: 00:14.3: enabled 1
1692 05:03:56.866988 PCI: 00:15.0: enabled 1
1693 05:03:56.869839 PCI: 00:15.1: enabled 1
1694 05:03:56.870268 PCI: 00:15.2: enabled 1
1695 05:03:56.873550 PCI: 00:15.3: enabled 1
1696 05:03:56.876617 PCI: 00:16.0: enabled 1
1697 05:03:56.877048 PCI: 00:16.1: enabled 0
1698 05:03:56.880218 PCI: 00:16.2: enabled 0
1699 05:03:56.883356 PCI: 00:16.3: enabled 0
1700 05:03:56.886403 PCI: 00:16.4: enabled 0
1701 05:03:56.886864 PCI: 00:16.5: enabled 0
1702 05:03:56.889788 PCI: 00:17.0: enabled 0
1703 05:03:56.893284 PCI: 00:19.0: enabled 0
1704 05:03:56.896748 PCI: 00:19.1: enabled 1
1705 05:03:56.897234 PCI: 00:19.2: enabled 0
1706 05:03:56.899954 PCI: 00:1c.0: enabled 1
1707 05:03:56.903328 PCI: 00:1c.1: enabled 0
1708 05:03:56.906767 PCI: 00:1c.2: enabled 0
1709 05:03:56.907402 PCI: 00:1c.3: enabled 0
1710 05:03:56.909800 PCI: 00:1c.4: enabled 0
1711 05:03:56.913345 PCI: 00:1c.5: enabled 0
1712 05:03:56.913945 PCI: 00:1c.6: enabled 1
1713 05:03:56.916480
1714 05:03:56.916947 PCI: 00:1c.7: enabled 0
1715 05:03:56.919962 PCI: 00:1d.0: enabled 1
1716 05:03:56.923764 PCI: 00:1d.1: enabled 0
1717 05:03:56.924369 PCI: 00:1d.2: enabled 1
1718 05:03:56.926481 PCI: 00:1d.3: enabled 0
1719 05:03:56.929830 PCI: 00:1e.0: enabled 1
1720 05:03:56.933440 PCI: 00:1e.1: enabled 0
1721 05:03:56.934189 PCI: 00:1e.2: enabled 1
1722 05:03:56.936950 PCI: 00:1e.3: enabled 1
1723 05:03:56.940275 PCI: 00:1f.0: enabled 1
1724 05:03:56.943343 PCI: 00:1f.1: enabled 0
1725 05:03:56.944010 PCI: 00:1f.2: enabled 1
1726 05:03:56.946898 PCI: 00:1f.3: enabled 1
1727 05:03:56.949553 PCI: 00:1f.4: enabled 0
1728 05:03:56.953209 PCI: 00:1f.5: enabled 1
1729 05:03:56.953878 PCI: 00:1f.6: enabled 0
1730 05:03:56.956585 PCI: 00:1f.7: enabled 0
1731 05:03:56.959491 APIC: 00: enabled 1
1732 05:03:56.960082 GENERIC: 0.0: enabled 1
1733 05:03:56.963263 GENERIC: 0.0: enabled 1
1734 05:03:56.966367 GENERIC: 1.0: enabled 1
1735 05:03:56.969630 GENERIC: 0.0: enabled 1
1736 05:03:56.970288 GENERIC: 1.0: enabled 1
1737 05:03:56.973015 USB0 port 0: enabled 1
1738 05:03:56.976320 GENERIC: 0.0: enabled 1
1739 05:03:56.976976 USB0 port 0: enabled 1
1740 05:03:56.979838 GENERIC: 0.0: enabled 1
1741 05:03:56.983336 I2C: 00:1a: enabled 1
1742 05:03:56.986546 I2C: 00:31: enabled 1
1743 05:03:56.987229 I2C: 00:32: enabled 1
1744 05:03:56.989383 I2C: 00:10: enabled 1
1745 05:03:56.993057 I2C: 00:15: enabled 1
1746 05:03:56.993783 GENERIC: 0.0: enabled 0
1747 05:03:56.996231 GENERIC: 1.0: enabled 0
1748 05:03:56.999695 GENERIC: 0.0: enabled 1
1749 05:03:57.000348 SPI: 00: enabled 1
1750 05:03:57.003265 SPI: 00: enabled 1
1751 05:03:57.006103 PNP: 0c09.0: enabled 1
1752 05:03:57.006733 GENERIC: 0.0: enabled 1
1753 05:03:57.009528 USB3 port 0: enabled 1
1754 05:03:57.012950 USB3 port 1: enabled 1
1755 05:03:57.013423 USB3 port 2: enabled 0
1756 05:03:57.016106
1757 05:03:57.016581 USB3 port 3: enabled 0
1758 05:03:57.019402 USB2 port 0: enabled 0
1759 05:03:57.022988 USB2 port 1: enabled 1
1760 05:03:57.023460 USB2 port 2: enabled 1
1761 05:03:57.026043 USB2 port 3: enabled 0
1762 05:03:57.029540 USB2 port 4: enabled 1
1763 05:03:57.030016 USB2 port 5: enabled 0
1764 05:03:57.033008 USB2 port 6: enabled 0
1765 05:03:57.036275 USB2 port 7: enabled 0
1766 05:03:57.039421 USB2 port 8: enabled 0
1767 05:03:57.039898 USB2 port 9: enabled 0
1768 05:03:57.042804 USB3 port 0: enabled 0
1769 05:03:57.046236 USB3 port 1: enabled 1
1770 05:03:57.046784 USB3 port 2: enabled 0
1771 05:03:57.049403 USB3 port 3: enabled 0
1772 05:03:57.052966 GENERIC: 0.0: enabled 1
1773 05:03:57.056183 GENERIC: 1.0: enabled 1
1774 05:03:57.056756 APIC: 01: enabled 1
1775 05:03:57.059279 APIC: 03: enabled 1
1776 05:03:57.059785 APIC: 04: enabled 1
1777 05:03:57.062660 APIC: 07: enabled 1
1778 05:03:57.065975 APIC: 06: enabled 1
1779 05:03:57.066545 APIC: 02: enabled 1
1780 05:03:57.069263 APIC: 05: enabled 1
1781 05:03:57.072614 PCI: 01:00.0: enabled 1
1782 05:03:57.075877 BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
1783 05:03:57.082600 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1784 05:03:57.085881 ELOG: NV offset 0xf30000 size 0x1000
1785 05:03:57.092920 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1786 05:03:57.098995 ELOG: Event(17) added with size 13 at 2023-01-18 05:03:56 UTC
1787 05:03:57.105818 ELOG: Event(92) added with size 9 at 2023-01-18 05:03:56 UTC
1788 05:03:57.112344 ELOG: Event(93) added with size 9 at 2023-01-18 05:03:56 UTC
1789 05:03:57.119335 ELOG: Event(9E) added with size 10 at 2023-01-18 05:03:56 UTC
1790 05:03:57.125452 ELOG: Event(9F) added with size 14 at 2023-01-18 05:03:56 UTC
1791 05:03:57.132193 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1792 05:03:57.135756 ELOG: Event(A1) added with size 10 at 2023-01-18 05:03:56 UTC
1793 05:03:57.145859 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1794 05:03:57.152358 ELOG: Event(A0) added with size 9 at 2023-01-18 05:03:56 UTC
1795 05:03:57.155537 elog_add_boot_reason: Logged dev mode boot
1796 05:03:57.162470 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1797 05:03:57.163057 Finalize devices...
1798 05:03:57.165827 Devices finalized
1799 05:03:57.171956 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1800 05:03:57.175115 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1801 05:03:57.182129 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1802 05:03:57.185058 ME: HFSTS1 : 0x80030055
1803 05:03:57.191984 ME: HFSTS2 : 0x30280116
1804 05:03:57.195393 ME: HFSTS3 : 0x00000050
1805 05:03:57.198698 ME: HFSTS4 : 0x00004000
1806 05:03:57.205068 ME: HFSTS5 : 0x00000000
1807 05:03:57.208581 ME: HFSTS6 : 0x00400006
1808 05:03:57.211986 ME: Manufacturing Mode : YES
1809 05:03:57.214985 ME: SPI Protection Mode Enabled : NO
1810 05:03:57.218651 ME: FW Partition Table : OK
1811 05:03:57.221906 ME: Bringup Loader Failure : NO
1812 05:03:57.225312
1813 05:03:57.228321 ME: Firmware Init Complete : NO
1814 05:03:57.231931 ME: Boot Options Present : NO
1815 05:03:57.234948 ME: Update In Progress : NO
1816 05:03:57.238437 ME: D0i3 Support : YES
1817 05:03:57.242073 ME: Low Power State Enabled : NO
1818 05:03:57.245188 ME: CPU Replaced : YES
1819 05:03:57.248230 ME: CPU Replacement Valid : YES
1820 05:03:57.251516 ME: Current Working State : 5
1821 05:03:57.254909
1822 05:03:57.258403 ME: Current Operation State : 1
1823 05:03:57.261404 ME: Current Operation Mode : 3
1824 05:03:57.264753 ME: Error Code : 0
1825 05:03:57.268192 ME: Enhanced Debug Mode : NO
1826 05:03:57.271608 ME: CPU Debug Disabled : YES
1827 05:03:57.275038 ME: TXT Support : NO
1828 05:03:57.281243 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1829 05:03:57.288085 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1830 05:03:57.291441 CBFS: 'fallback/slic' not found.
1831 05:03:57.294441 ACPI: Writing ACPI tables at 76b01000.
1832 05:03:57.297960
1833 05:03:57.298538 ACPI: * FACS
1834 05:03:57.298962 ACPI: * DSDT
1835 05:03:57.301374
1836 05:03:57.304710 Ramoops buffer: 0x100000@0x76a00000.
1837 05:03:57.307726 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1838 05:03:57.311177 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1839 05:03:57.315433 Google Chrome EC: version:
1840 05:03:57.318956 ro: voema_v2.0.7540-147f8d37d1
1841 05:03:57.322167 rw: voema_v2.0.7540-147f8d37d1
1842 05:03:57.325833 running image: 2
1843 05:03:57.332081 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1844 05:03:57.335377 ACPI: * FADT
1845 05:03:57.335862 SCI is IRQ9
1846 05:03:57.338524 ACPI: added table 1/32, length now 40
1847 05:03:57.341967 ACPI: * SSDT
1848 05:03:57.345608 Found 1 CPU(s) with 8 core(s) each.
1849 05:03:57.348520 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1850 05:03:57.355103 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1851 05:03:57.358635 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1852 05:03:57.361515 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1853 05:03:57.368299 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1854 05:03:57.375050 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1855 05:03:57.378370 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1856 05:03:57.384875 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1857 05:03:57.391618 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1858 05:03:57.395007 \_SB.PCI0.RP09: Added StorageD3Enable property
1859 05:03:57.398272 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1860 05:03:57.404836 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1861 05:03:57.411480 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1862 05:03:57.414659 PS2K: Passing 80 keymaps to kernel
1863 05:03:57.421548 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1864 05:03:57.427966 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1865 05:03:57.434487 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1866 05:03:57.438151 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1867 05:03:57.444754 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1868 05:03:57.451387 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1869 05:03:57.457872 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1870 05:03:57.464383 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1871 05:03:57.470760 ACPI: added table 2/32, length now 44
1872 05:03:57.470847 ACPI: * MCFG
1873 05:03:57.474577 ACPI: added table 3/32, length now 48
1874 05:03:57.477447 ACPI: * TPM2
1875 05:03:57.480953 TPM2 log created at 0x769f0000
1876 05:03:57.484296 ACPI: added table 4/32, length now 52
1877 05:03:57.484386 ACPI: * MADT
1878 05:03:57.487585 SCI is IRQ9
1879 05:03:57.490814 ACPI: added table 5/32, length now 56
1880 05:03:57.490935 current = 76b09850
1881 05:03:57.494364 ACPI: * DMAR
1882 05:03:57.497416 ACPI: added table 6/32, length now 60
1883 05:03:57.500888 ACPI: added table 7/32, length now 64
1884 05:03:57.504249 ACPI: * HPET
1885 05:03:57.507406 ACPI: added table 8/32, length now 68
1886 05:03:57.507491 ACPI: done.
1887 05:03:57.510658 ACPI tables: 35216 bytes.
1888 05:03:57.514447 smbios_write_tables: 769ef000
1889 05:03:57.517237 EC returned error result code 3
1890 05:03:57.520647 Couldn't obtain OEM name from CBI
1891 05:03:57.524226 Create SMBIOS type 16
1892 05:03:57.524313 Create SMBIOS type 17
1893 05:03:57.527436
1894 05:03:57.527522 GENERIC: 0.0 (WIFI Device)
1895 05:03:57.530879 SMBIOS tables: 1750 bytes.
1896 05:03:57.533938 Writing table forward entry at 0x00000500
1897 05:03:57.540489 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1898 05:03:57.544012 Writing coreboot table at 0x76b25000
1899 05:03:57.550589 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1900 05:03:57.557266 1. 0000000000001000-000000000009ffff: RAM
1901 05:03:57.560728 2. 00000000000a0000-00000000000fffff: RESERVED
1902 05:03:57.564016 3. 0000000000100000-00000000769eefff: RAM
1903 05:03:57.570307 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1904 05:03:57.573571 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1905 05:03:57.577340
1906 05:03:57.580284 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1907 05:03:57.586916 7. 0000000077000000-000000007fbfffff: RESERVED
1908 05:03:57.590171 8. 00000000c0000000-00000000cfffffff: RESERVED
1909 05:03:57.597259 9. 00000000f8000000-00000000f9ffffff: RESERVED
1910 05:03:57.600312 10. 00000000fb000000-00000000fb000fff: RESERVED
1911 05:03:57.603809 11. 00000000fe000000-00000000fe00ffff: RESERVED
1912 05:03:57.607211
1913 05:03:57.610114 12. 00000000fed80000-00000000fed87fff: RESERVED
1914 05:03:57.613652 13. 00000000fed90000-00000000fed92fff: RESERVED
1915 05:03:57.620335 14. 00000000feda0000-00000000feda1fff: RESERVED
1916 05:03:57.623340 15. 00000000fedc0000-00000000feddffff: RESERVED
1917 05:03:57.629983 16. 0000000100000000-00000002803fffff: RAM
1918 05:03:57.630072 Passing 4 GPIOs to payload:
1919 05:03:57.636543 NAME | PORT | POLARITY | VALUE
1920 05:03:57.643475 lid | undefined | high | high
1921 05:03:57.646517 power | undefined | high | low
1922 05:03:57.653344 oprom | undefined | high | low
1923 05:03:57.656520 EC in RW | 0x000000e5 | high | high
1924 05:03:57.663369 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 7048
1925 05:03:57.666603 coreboot table: 1576 bytes.
1926 05:03:57.670026 IMD ROOT 0. 0x76fff000 0x00001000
1927 05:03:57.673502 IMD SMALL 1. 0x76ffe000 0x00001000
1928 05:03:57.676809 FSP MEMORY 2. 0x76c4e000 0x003b0000
1929 05:03:57.683232 VPD 3. 0x76c4d000 0x00000367
1930 05:03:57.686547 RO MCACHE 4. 0x76c4c000 0x00000fdc
1931 05:03:57.689944 CONSOLE 5. 0x76c2c000 0x00020000
1932 05:03:57.693074 FMAP 6. 0x76c2b000 0x00000578
1933 05:03:57.696568 TIME STAMP 7. 0x76c2a000 0x00000910
1934 05:03:57.699919 VBOOT WORK 8. 0x76c16000 0x00014000
1935 05:03:57.703528 ROMSTG STCK 9. 0x76c15000 0x00001000
1936 05:03:57.706359 AFTER CAR 10. 0x76c0a000 0x0000b000
1937 05:03:57.713330 RAMSTAGE 11. 0x76b97000 0x00073000
1938 05:03:57.716637 REFCODE 12. 0x76b42000 0x00055000
1939 05:03:57.720061 SMM BACKUP 13. 0x76b32000 0x00010000
1940 05:03:57.723042 4f444749 14. 0x76b30000 0x00002000
1941 05:03:57.726676 EXT VBT15. 0x76b2d000 0x0000219f
1942 05:03:57.729750 COREBOOT 16. 0x76b25000 0x00008000
1943 05:03:57.733170 ACPI 17. 0x76b01000 0x00024000
1944 05:03:57.736606 ACPI GNVS 18. 0x76b00000 0x00001000
1945 05:03:57.739769 RAMOOPS 19. 0x76a00000 0x00100000
1946 05:03:57.743332 TPM2 TCGLOG20. 0x769f0000 0x00010000
1947 05:03:57.746743
1948 05:03:57.749895 SMBIOS 21. 0x769ef000 0x00000800
1949 05:03:57.749968 IMD small region:
1950 05:03:57.753023 IMD ROOT 0. 0x76ffec00 0x00000400
1951 05:03:57.759937 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1952 05:03:57.763228 POWER STATE 2. 0x76ffeb80 0x00000044
1953 05:03:57.766655 ROMSTAGE 3. 0x76ffeb60 0x00000004
1954 05:03:57.769790 MEM INFO 4. 0x76ffe980 0x000001e0
1955 05:03:57.776715 BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
1956 05:03:57.779766 MTRR: Physical address space:
1957 05:03:57.786489 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1958 05:03:57.789728 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1959 05:03:57.792978
1960 05:03:57.796221 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1961 05:03:57.803008 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1962 05:03:57.810055 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1963 05:03:57.816309 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1964 05:03:57.822939 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1965 05:03:57.826270 MTRR: Fixed MSR 0x250 0x0606060606060606
1966 05:03:57.829670 MTRR: Fixed MSR 0x258 0x0606060606060606
1967 05:03:57.836546 MTRR: Fixed MSR 0x259 0x0000000000000000
1968 05:03:57.839615 MTRR: Fixed MSR 0x268 0x0606060606060606
1969 05:03:57.843165 MTRR: Fixed MSR 0x269 0x0606060606060606
1970 05:03:57.846188 MTRR: Fixed MSR 0x26a 0x0606060606060606
1971 05:03:57.853040 MTRR: Fixed MSR 0x26b 0x0606060606060606
1972 05:03:57.856140 MTRR: Fixed MSR 0x26c 0x0606060606060606
1973 05:03:57.859646 MTRR: Fixed MSR 0x26d 0x0606060606060606
1974 05:03:57.863074 MTRR: Fixed MSR 0x26e 0x0606060606060606
1975 05:03:57.866197 MTRR: Fixed MSR 0x26f 0x0606060606060606
1976 05:03:57.869465
1977 05:03:57.872770 call enable_fixed_mtrr()
1978 05:03:57.875837 CPU physical address size: 39 bits
1979 05:03:57.879496 MTRR: default type WB/UC MTRR counts: 6/6.
1980 05:03:57.882777 MTRR: UC selected as default type.
1981 05:03:57.889467 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1982 05:03:57.895962 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1983 05:03:57.902772 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1984 05:03:57.909418 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1985 05:03:57.912379 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1986 05:03:57.915905
1987 05:03:57.919460 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1988 05:03:57.923406
1989 05:03:57.923493 MTRR check
1990 05:03:57.927021 Fixed MTRRs : Enabled
1991 05:03:57.927107 Variable MTRRs: Enabled
1992 05:03:57.927192
1993 05:03:57.933465 MTRR: Fixed MSR 0x250 0x0606060606060606
1994 05:03:57.936960 MTRR: Fixed MSR 0x258 0x0606060606060606
1995 05:03:57.940436 MTRR: Fixed MSR 0x259 0x0000000000000000
1996 05:03:57.943553 MTRR: Fixed MSR 0x268 0x0606060606060606
1997 05:03:57.949981 MTRR: Fixed MSR 0x269 0x0606060606060606
1998 05:03:57.953621 MTRR: Fixed MSR 0x26a 0x0606060606060606
1999 05:03:57.956690 MTRR: Fixed MSR 0x26b 0x0606060606060606
2000 05:03:57.960302 MTRR: Fixed MSR 0x26c 0x0606060606060606
2001 05:03:57.966711 MTRR: Fixed MSR 0x26d 0x0606060606060606
2002 05:03:57.970305 MTRR: Fixed MSR 0x26e 0x0606060606060606
2003 05:03:57.973505 MTRR: Fixed MSR 0x26f 0x0606060606060606
2004 05:03:57.979905 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2005 05:03:57.983220 call enable_fixed_mtrr()
2006 05:03:57.986603 Checking cr50 for pending updates
2007 05:03:57.990376 CPU physical address size: 39 bits
2008 05:03:57.994055 MTRR: Fixed MSR 0x250 0x0606060606060606
2009 05:03:57.997315 MTRR: Fixed MSR 0x250 0x0606060606060606
2010 05:03:58.000499 MTRR: Fixed MSR 0x258 0x0606060606060606
2011 05:03:58.007352 MTRR: Fixed MSR 0x259 0x0000000000000000
2012 05:03:58.010316 MTRR: Fixed MSR 0x268 0x0606060606060606
2013 05:03:58.013692 MTRR: Fixed MSR 0x269 0x0606060606060606
2014 05:03:58.017313 MTRR: Fixed MSR 0x26a 0x0606060606060606
2015 05:03:58.023878 MTRR: Fixed MSR 0x26b 0x0606060606060606
2016 05:03:58.027362 MTRR: Fixed MSR 0x26c 0x0606060606060606
2017 05:03:58.030366 MTRR: Fixed MSR 0x26d 0x0606060606060606
2018 05:03:58.033483 MTRR: Fixed MSR 0x26e 0x0606060606060606
2019 05:03:58.040115 MTRR: Fixed MSR 0x26f 0x0606060606060606
2020 05:03:58.043533 MTRR: Fixed MSR 0x258 0x0606060606060606
2021 05:03:58.047028 MTRR: Fixed MSR 0x259 0x0000000000000000
2022 05:03:58.053616 MTRR: Fixed MSR 0x268 0x0606060606060606
2023 05:03:58.056980 MTRR: Fixed MSR 0x269 0x0606060606060606
2024 05:03:58.060134 MTRR: Fixed MSR 0x26a 0x0606060606060606
2025 05:03:58.063725 MTRR: Fixed MSR 0x26b 0x0606060606060606
2026 05:03:58.070135 MTRR: Fixed MSR 0x26c 0x0606060606060606
2027 05:03:58.073445 MTRR: Fixed MSR 0x26d 0x0606060606060606
2028 05:03:58.076767 MTRR: Fixed MSR 0x26e 0x0606060606060606
2029 05:03:58.080295 MTRR: Fixed MSR 0x26f 0x0606060606060606
2030 05:03:58.084170 call enable_fixed_mtrr()
2031 05:03:58.087280 call enable_fixed_mtrr()
2032 05:03:58.090568 MTRR: Fixed MSR 0x250 0x0606060606060606
2033 05:03:58.093927 MTRR: Fixed MSR 0x250 0x0606060606060606
2034 05:03:58.100566 MTRR: Fixed MSR 0x258 0x0606060606060606
2035 05:03:58.103947 MTRR: Fixed MSR 0x259 0x0000000000000000
2036 05:03:58.107490 MTRR: Fixed MSR 0x268 0x0606060606060606
2037 05:03:58.110395 MTRR: Fixed MSR 0x269 0x0606060606060606
2038 05:03:58.117555 MTRR: Fixed MSR 0x26a 0x0606060606060606
2039 05:03:58.120394 MTRR: Fixed MSR 0x26b 0x0606060606060606
2040 05:03:58.124015 MTRR: Fixed MSR 0x26c 0x0606060606060606
2041 05:03:58.127062 MTRR: Fixed MSR 0x26d 0x0606060606060606
2042 05:03:58.133682 MTRR: Fixed MSR 0x26e 0x0606060606060606
2043 05:03:58.136920 MTRR: Fixed MSR 0x26f 0x0606060606060606
2044 05:03:58.140239 MTRR: Fixed MSR 0x258 0x0606060606060606
2045 05:03:58.143701 call enable_fixed_mtrr()
2046 05:03:58.147272 MTRR: Fixed MSR 0x259 0x0000000000000000
2047 05:03:58.153938 MTRR: Fixed MSR 0x268 0x0606060606060606
2048 05:03:58.156992 MTRR: Fixed MSR 0x269 0x0606060606060606
2049 05:03:58.160399 MTRR: Fixed MSR 0x26a 0x0606060606060606
2050 05:03:58.163849 MTRR: Fixed MSR 0x26b 0x0606060606060606
2051 05:03:58.166940 MTRR: Fixed MSR 0x26c 0x0606060606060606
2052 05:03:58.170360
2053 05:03:58.173835 MTRR: Fixed MSR 0x26d 0x0606060606060606
2054 05:03:58.176862 MTRR: Fixed MSR 0x26e 0x0606060606060606
2055 05:03:58.180263 MTRR: Fixed MSR 0x26f 0x0606060606060606
2056 05:03:58.184240 CPU physical address size: 39 bits
2057 05:03:58.190800 call enable_fixed_mtrr()
2058 05:03:58.190909 Reading cr50 TPM mode
2059 05:03:58.195078 CPU physical address size: 39 bits
2060 05:03:58.198546 CPU physical address size: 39 bits
2061 05:03:58.202011 CPU physical address size: 39 bits
2062 05:03:58.208370 BS: BS_PAYLOAD_LOAD entry times (exec / console): 210 / 6 ms
2063 05:03:58.211834 MTRR: Fixed MSR 0x250 0x0606060606060606
2064 05:03:58.218249 MTRR: Fixed MSR 0x250 0x0606060606060606
2065 05:03:58.221675 MTRR: Fixed MSR 0x258 0x0606060606060606
2066 05:03:58.225011 MTRR: Fixed MSR 0x259 0x0000000000000000
2067 05:03:58.228470 MTRR: Fixed MSR 0x268 0x0606060606060606
2068 05:03:58.234729 MTRR: Fixed MSR 0x269 0x0606060606060606
2069 05:03:58.238288 MTRR: Fixed MSR 0x26a 0x0606060606060606
2070 05:03:58.241743 MTRR: Fixed MSR 0x26b 0x0606060606060606
2071 05:03:58.244690 MTRR: Fixed MSR 0x26c 0x0606060606060606
2072 05:03:58.251685 MTRR: Fixed MSR 0x26d 0x0606060606060606
2073 05:03:58.254679 MTRR: Fixed MSR 0x26e 0x0606060606060606
2074 05:03:58.258309 MTRR: Fixed MSR 0x26f 0x0606060606060606
2075 05:03:58.264761 MTRR: Fixed MSR 0x258 0x0606060606060606
2076 05:03:58.264846 call enable_fixed_mtrr()
2077 05:03:58.271414 MTRR: Fixed MSR 0x259 0x0000000000000000
2078 05:03:58.274765 MTRR: Fixed MSR 0x268 0x0606060606060606
2079 05:03:58.277991 MTRR: Fixed MSR 0x269 0x0606060606060606
2080 05:03:58.281586 MTRR: Fixed MSR 0x26a 0x0606060606060606
2081 05:03:58.284652 MTRR: Fixed MSR 0x26b 0x0606060606060606
2082 05:03:58.288083
2083 05:03:58.291577 MTRR: Fixed MSR 0x26c 0x0606060606060606
2084 05:03:58.294601 MTRR: Fixed MSR 0x26d 0x0606060606060606
2085 05:03:58.297810 MTRR: Fixed MSR 0x26e 0x0606060606060606
2086 05:03:58.301165 MTRR: Fixed MSR 0x26f 0x0606060606060606
2087 05:03:58.307635 CPU physical address size: 39 bits
2088 05:03:58.311279 call enable_fixed_mtrr()
2089 05:03:58.317687 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2090 05:03:58.321069 CPU physical address size: 39 bits
2091 05:03:58.327631 Checking segment from ROM address 0xffc02b38
2092 05:03:58.331058 Checking segment from ROM address 0xffc02b54
2093 05:03:58.334513 Loading segment from ROM address 0xffc02b38
2094 05:03:58.337956 code (compression=0)
2095 05:03:58.347722 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2096 05:03:58.354430 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2097 05:03:58.357470 it's not compressed!
2098 05:03:58.496021 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2099 05:03:58.502541 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2100 05:03:58.509167 Loading segment from ROM address 0xffc02b54
2101 05:03:58.509253 Entry Point 0x30000000
2102 05:03:58.512559 Loaded segments
2103 05:03:58.519135 BS: BS_PAYLOAD_LOAD run times (exec / console): 241 / 63 ms
2104 05:03:58.561992 Finalizing chipset.
2105 05:03:58.565535 Finalizing SMM.
2106 05:03:58.565620 APMC done.
2107 05:03:58.572076 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2108 05:03:58.575381 mp_park_aps done after 0 msecs.
2109 05:03:58.578427 Jumping to boot code at 0x30000000(0x76b25000)
2110 05:03:58.588588 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2111 05:03:58.588675
2112 05:03:58.588743
2113 05:03:58.588804
2114 05:03:58.592053 Starting depthcharge on Voema...
2115 05:03:58.592139
2116 05:03:58.592494 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2117 05:03:58.592596 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2118 05:03:58.592681 Setting prompt string to ['volteer:']
2119 05:03:58.592762 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2120 05:03:58.601715 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2121 05:03:58.601803
2122 05:03:58.608326 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2123 05:03:58.608412
2124 05:03:58.615004 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2125 05:03:58.615092
2126 05:03:58.618531 Failed to find eMMC card reader
2127 05:03:58.618617
2128 05:03:58.618684 Wipe memory regions:
2129 05:03:58.618747
2130 05:03:58.624833 [0x00000000001000, 0x000000000a0000)
2131 05:03:58.624919
2132 05:03:58.628252 [0x00000000100000, 0x00000030000000)
2133 05:03:58.628342
2134 05:03:58.657035 [0x00000032662db0, 0x000000769ef000)
2135 05:03:58.657121
2136 05:03:58.695708 [0x00000100000000, 0x00000280400000)
2137 05:03:58.695796
2138 05:03:58.902149 ec_init: CrosEC protocol v3 supported (256, 256)
2139 05:03:58.902286
2140 05:03:58.908626 update_port_state: port C0 state: usb enable 1 mux conn 0
2141 05:03:58.908714
2142 05:03:58.918560 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2143 05:03:58.918650
2144 05:03:58.925076 pmc_check_ipc_sts: STS_BUSY done after 1612 us
2145 05:03:58.925163
2146 05:03:58.928644 send_conn_disc_msg: pmc_send_cmd succeeded
2147 05:03:58.928731
2148 05:03:59.361750 R8152: Initializing
2149 05:03:59.361888
2150 05:03:59.365135 Version 6 (ocp_data = 5c30)
2151 05:03:59.365222
2152 05:03:59.368664 R8152: Done initializing
2153 05:03:59.368750
2154 05:03:59.371709 Adding net device
2155 05:03:59.371795
2156 05:03:59.676885 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2157 05:03:59.677027
2158 05:03:59.677096
2159 05:03:59.677159
2160 05:03:59.680189 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2162 05:03:59.780970 volteer: tftpboot 192.168.201.1 8767991/tftp-deploy-2bdmy7y8/kernel/bzImage 8767991/tftp-deploy-2bdmy7y8/kernel/cmdline 8767991/tftp-deploy-2bdmy7y8/ramdisk/ramdisk.cpio.gz
2163 05:03:59.781106 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2164 05:03:59.781191 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2165 05:03:59.784998 tftpboot 192.168.201.1 8767991/tftp-deploy-2bdmy7y8/kernel/bzImaoy-2bdmy7y8/kernel/cmdline 8767991/tftp-deploy-2bdmy7y8/ramdisk/ramdisk.cpio.gz
2166 05:03:59.785090
2167 05:03:59.785158 Waiting for link
2168 05:03:59.785219
2169 05:03:59.988306 done.
2170 05:03:59.988429
2171 05:03:59.988514 MAC: 00:24:32:30:78:74
2172 05:03:59.988580
2173 05:03:59.991823 Sending DHCP discover... done.
2174 05:03:59.991906
2175 05:03:59.995499 Waiting for reply... done.
2176 05:03:59.995590
2177 05:03:59.998339 Sending DHCP request... done.
2178 05:03:59.998419
2179 05:04:00.001836 Waiting for reply... done.
2180 05:04:00.001913
2181 05:04:00.004900 My ip is 192.168.201.14
2182 05:04:00.004976
2183 05:04:00.008588 The DHCP server ip is 192.168.201.1
2184 05:04:00.008666
2185 05:04:00.011728 TFTP server IP predefined by user: 192.168.201.1
2186 05:04:00.011809
2187 05:04:00.018051 Bootfile predefined by user: 8767991/tftp-deploy-2bdmy7y8/kernel/bzImage
2188 05:04:00.018138
2189 05:04:00.021514 Sending tftp read request... done.
2190 05:04:00.021594
2191 05:04:00.028025 Waiting for the transfer...
2192 05:04:00.028107
2193 05:04:00.534681 00000000 ################################################################
2194 05:04:00.534816
2195 05:04:01.047477 00080000 ################################################################
2196 05:04:01.047618
2197 05:04:01.567525 00100000 ################################################################
2198 05:04:01.567667
2199 05:04:02.080295 00180000 ################################################################
2200 05:04:02.080440
2201 05:04:02.597606 00200000 ################################################################
2202 05:04:02.597785
2203 05:04:03.107569 00280000 ################################################################
2204 05:04:03.107708
2205 05:04:03.630004 00300000 ################################################################
2206 05:04:03.630167
2207 05:04:04.169143 00380000 ################################################################
2208 05:04:04.169299
2209 05:04:04.724943 00400000 ################################################################
2210 05:04:04.725093
2211 05:04:05.289816 00480000 ################################################################
2212 05:04:05.289960
2213 05:04:05.852350 00500000 ################################################################
2214 05:04:05.852495
2215 05:04:06.372868 00580000 ################################################################
2216 05:04:06.372999
2217 05:04:06.900251 00600000 ################################################################
2218 05:04:06.900391
2219 05:04:07.422382 00680000 ################################################################
2220 05:04:07.422514
2221 05:04:07.666413 00700000 ############################# done.
2222 05:04:07.666544
2223 05:04:07.669741 The bootfile was 7573392 bytes long.
2224 05:04:07.669820
2225 05:04:07.673086 Sending tftp read request... done.
2226 05:04:07.673160
2227 05:04:07.676237 Waiting for the transfer...
2228 05:04:07.676312
2229 05:04:08.205341 00000000 ################################################################
2230 05:04:08.205477
2231 05:04:08.763502 00080000 ################################################################
2232 05:04:08.764178
2233 05:04:09.466524 00100000 ################################################################
2234 05:04:09.467165
2235 05:04:10.166758 00180000 ################################################################
2236 05:04:10.167309
2237 05:04:10.859196 00200000 ################################################################
2238 05:04:10.859808
2239 05:04:11.549643 00280000 ################################################################
2240 05:04:11.550152
2241 05:04:12.254986 00300000 ################################################################
2242 05:04:12.255490
2243 05:04:12.953868 00380000 ################################################################
2244 05:04:12.954577
2245 05:04:13.677997 00400000 ################################################################
2246 05:04:13.678634
2247 05:04:14.383353 00480000 ################################################################
2248 05:04:14.383931
2249 05:04:15.046562 00500000 ################################################################
2250 05:04:15.047180
2251 05:04:15.747997 00580000 ################################################################
2252 05:04:15.748555
2253 05:04:16.460273 00600000 ################################################################
2254 05:04:16.460867
2255 05:04:17.170951 00680000 ################################################################
2256 05:04:17.171468
2257 05:04:17.883577 00700000 ################################################################
2258 05:04:17.884180
2259 05:04:18.604160 00780000 ################################################################
2260 05:04:18.604787
2261 05:04:19.323092 00800000 ################################################################
2262 05:04:19.323716
2263 05:04:20.043638 00880000 ################################################################
2264 05:04:20.044262
2265 05:04:20.739238 00900000 ################################################################
2266 05:04:20.739895
2267 05:04:21.450705 00980000 ################################################################
2268 05:04:21.451324
2269 05:04:22.151557 00a00000 ################################################################
2270 05:04:22.152134
2271 05:04:22.828495 00a80000 ################################################################
2272 05:04:22.829089
2273 05:04:23.525639 00b00000 ################################################################
2274 05:04:23.526250
2275 05:04:24.234858 00b80000 ################################################################
2276 05:04:24.235493
2277 05:04:24.950289 00c00000 ################################################################
2278 05:04:24.950859
2279 05:04:25.673743 00c80000 ################################################################
2280 05:04:25.674327
2281 05:04:26.385737 00d00000 ################################################################
2282 05:04:26.386349
2283 05:04:27.109362 00d80000 ################################################################
2284 05:04:27.109957
2285 05:04:27.822453 00e00000 ################################################################
2286 05:04:27.823091
2287 05:04:28.530368 00e80000 ################################################################
2288 05:04:28.530936
2289 05:04:29.195593 00f00000 ################################################################
2290 05:04:29.196157
2291 05:04:29.919351 00f80000 ################################################################
2292 05:04:29.919970
2293 05:04:30.613767 01000000 ################################################################
2294 05:04:30.614300
2295 05:04:31.288830 01080000 ################################################################
2296 05:04:31.289400
2297 05:04:31.976097 01100000 ################################################################
2298 05:04:31.976658
2299 05:04:32.688490 01180000 ################################################################
2300 05:04:32.689074
2301 05:04:33.399963 01200000 ################################################################
2302 05:04:33.400547
2303 05:04:34.120245 01280000 ################################################################
2304 05:04:34.120849
2305 05:04:34.832662 01300000 ################################################################
2306 05:04:34.833300
2307 05:04:35.535065 01380000 ################################################################
2308 05:04:35.535610
2309 05:04:36.206606 01400000 ################################################################
2310 05:04:36.207236
2311 05:04:36.889398 01480000 ################################################################
2312 05:04:36.889964
2313 05:04:37.594602 01500000 ################################################################
2314 05:04:37.595209
2315 05:04:38.280375 01580000 ################################################################
2316 05:04:38.280901
2317 05:04:38.964080 01600000 ################################################################
2318 05:04:38.964631
2319 05:04:39.665276 01680000 ################################################################
2320 05:04:39.665827
2321 05:04:40.367556 01700000 ################################################################
2322 05:04:40.368140
2323 05:04:41.054487 01780000 ################################################################
2324 05:04:41.055040
2325 05:04:41.767143 01800000 ################################################################
2326 05:04:41.767673
2327 05:04:42.465309 01880000 ################################################################
2328 05:04:42.465836
2329 05:04:43.179672 01900000 ################################################################
2330 05:04:43.180207
2331 05:04:43.906789 01980000 ################################################################
2332 05:04:43.907341
2333 05:04:44.608037 01a00000 ################################################################
2334 05:04:44.608576
2335 05:04:45.330238 01a80000 ################################################################
2336 05:04:45.330851
2337 05:04:46.064142 01b00000 ################################################################
2338 05:04:46.064722
2339 05:04:46.782277 01b80000 ################################################################
2340 05:04:46.782936
2341 05:04:47.491962 01c00000 ################################################################
2342 05:04:47.492549
2343 05:04:48.201721 01c80000 ################################################################
2344 05:04:48.202303
2345 05:04:48.923911 01d00000 ################################################################
2346 05:04:48.924497
2347 05:04:49.647065 01d80000 ################################################################
2348 05:04:49.647692
2349 05:04:50.362513 01e00000 ################################################################
2350 05:04:50.363080
2351 05:04:51.077422 01e80000 ################################################################
2352 05:04:51.078022
2353 05:04:51.800344 01f00000 ################################################################
2354 05:04:51.800931
2355 05:04:52.514796 01f80000 ################################################################
2356 05:04:52.515384
2357 05:04:53.232308 02000000 ################################################################
2358 05:04:53.232849
2359 05:04:53.951124 02080000 ################################################################
2360 05:04:53.951671
2361 05:04:54.665266 02100000 ################################################################
2362 05:04:54.665873
2363 05:04:55.378232 02180000 ################################################################
2364 05:04:55.378766
2365 05:04:55.586993 02200000 #################### done.
2366 05:04:55.587489
2367 05:04:55.590419 Sending tftp read request... done.
2368 05:04:55.590853
2369 05:04:55.594151 Waiting for the transfer...
2370 05:04:55.594693
2371 05:04:55.595078 00000000 # done.
2372 05:04:55.595413
2373 05:04:55.603520 Command line loaded dynamically from TFTP file: 8767991/tftp-deploy-2bdmy7y8/kernel/cmdline
2374 05:04:55.604095
2375 05:04:55.617262 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2376 05:04:55.617844
2377 05:04:55.626003 Shutting down all USB controllers.
2378 05:04:55.626490
2379 05:04:55.626905 Removing current net device
2380 05:04:55.627289
2381 05:04:55.629063 Finalizing coreboot
2382 05:04:55.629549
2383 05:04:55.635647 Exiting depthcharge with code 4 at timestamp: 65713107
2384 05:04:55.636134
2385 05:04:55.636514
2386 05:04:55.636865 Starting kernel ...
2387 05:04:55.637224
2388 05:04:55.637565
2389 05:04:55.637897
2390 05:04:55.639439 end: 2.2.4 bootloader-commands (duration 00:00:57) [common]
2391 05:04:55.640003 start: 2.2.5 auto-login-action (timeout 00:03:47) [common]
2392 05:04:55.640429 Setting prompt string to ['Linux version [0-9]']
2393 05:04:55.640821 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2394 05:04:55.641220 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2396 05:08:42.641213 end: 2.2.5 auto-login-action (duration 00:03:47) [common]
2398 05:08:42.643258 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 227 seconds'
2400 05:08:42.644259 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2403 05:08:42.645372 end: 2 depthcharge-action (duration 00:05:00) [common]
2405 05:08:42.645590 Cleaning after the job
2406 05:08:42.645674 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8767991/tftp-deploy-2bdmy7y8/ramdisk
2407 05:08:42.647898 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8767991/tftp-deploy-2bdmy7y8/kernel
2408 05:08:42.648441 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8767991/tftp-deploy-2bdmy7y8/modules
2409 05:08:42.648619 start: 4.1 power-off (timeout 00:00:30) [common]
2410 05:08:42.648767 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-1' '--port=1' '--command=off'
2411 05:08:42.667552 >> Command sent successfully.
2412 05:08:42.669275 Returned 0 in 0 seconds
2413 05:08:42.770599 end: 4.1 power-off (duration 00:00:00) [common]
2415 05:08:42.772206 start: 4.2 read-feedback (timeout 00:10:00) [common]
2416 05:08:42.773486 Listened to connection for namespace 'common' for up to 1s
2417 05:08:43.777515 Finalising connection for namespace 'common'
2418 05:08:43.778263 Disconnecting from shell: Finalise
2419 05:08:43.879575 end: 4.2 read-feedback (duration 00:00:01) [common]
2420 05:08:43.879743 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8767991
2421 05:08:43.904574 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8767991
2422 05:08:43.904787 JobError: Your job cannot terminate cleanly.