Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 03:53:39.777729 lava-dispatcher, installed at version: 2022.11
2 03:53:39.777909 start: 0 validate
3 03:53:39.778039 Start time: 2023-02-26 03:53:39.778033+00:00 (UTC)
4 03:53:39.778226 Using caching service: 'http://localhost/cache/?uri=%s'
5 03:53:39.778354 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230217.0%2Fx86%2Frootfs.cpio.gz exists
6 03:53:40.072121 Using caching service: 'http://localhost/cache/?uri=%s'
7 03:53:40.072297 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-938-gc773c630d0e4f%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 03:53:40.359844 Using caching service: 'http://localhost/cache/?uri=%s'
9 03:53:40.360013 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-938-gc773c630d0e4f%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 03:53:40.651399 validate duration: 0.87
12 03:53:40.651742 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 03:53:40.651863 start: 1.1 download-retry (timeout 00:10:00) [common]
14 03:53:40.651960 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 03:53:40.652061 Not decompressing ramdisk as can be used compressed.
16 03:53:40.652187 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230217.0/x86/rootfs.cpio.gz
17 03:53:40.652259 saving as /var/lib/lava/dispatcher/tmp/9338300/tftp-deploy-j2w3jvb1/ramdisk/rootfs.cpio.gz
18 03:53:40.652323 total size: 8423658 (8MB)
19 03:53:40.653407 progress 0% (0MB)
20 03:53:40.655690 progress 5% (0MB)
21 03:53:40.657933 progress 10% (0MB)
22 03:53:40.660078 progress 15% (1MB)
23 03:53:40.662249 progress 20% (1MB)
24 03:53:40.664293 progress 25% (2MB)
25 03:53:40.666393 progress 30% (2MB)
26 03:53:40.668279 progress 35% (2MB)
27 03:53:40.670439 progress 40% (3MB)
28 03:53:40.672482 progress 45% (3MB)
29 03:53:40.674666 progress 50% (4MB)
30 03:53:40.676810 progress 55% (4MB)
31 03:53:40.678972 progress 60% (4MB)
32 03:53:40.681040 progress 65% (5MB)
33 03:53:40.682977 progress 70% (5MB)
34 03:53:40.685090 progress 75% (6MB)
35 03:53:40.687193 progress 80% (6MB)
36 03:53:40.689197 progress 85% (6MB)
37 03:53:40.691261 progress 90% (7MB)
38 03:53:40.693261 progress 95% (7MB)
39 03:53:40.695314 progress 100% (8MB)
40 03:53:40.695512 8MB downloaded in 0.04s (186.08MB/s)
41 03:53:40.695698 end: 1.1.1 http-download (duration 00:00:00) [common]
43 03:53:40.695975 end: 1.1 download-retry (duration 00:00:00) [common]
44 03:53:40.696065 start: 1.2 download-retry (timeout 00:10:00) [common]
45 03:53:40.696152 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 03:53:40.696253 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-938-gc773c630d0e4f/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 03:53:40.696325 saving as /var/lib/lava/dispatcher/tmp/9338300/tftp-deploy-j2w3jvb1/kernel/bzImage
48 03:53:40.696387 total size: 7573392 (7MB)
49 03:53:40.696449 No compression specified
50 03:53:40.697521 progress 0% (0MB)
51 03:53:40.699527 progress 5% (0MB)
52 03:53:40.701508 progress 10% (0MB)
53 03:53:40.703314 progress 15% (1MB)
54 03:53:40.705242 progress 20% (1MB)
55 03:53:40.707044 progress 25% (1MB)
56 03:53:40.708937 progress 30% (2MB)
57 03:53:40.710783 progress 35% (2MB)
58 03:53:40.712701 progress 40% (2MB)
59 03:53:40.714660 progress 45% (3MB)
60 03:53:40.716475 progress 50% (3MB)
61 03:53:40.718423 progress 55% (4MB)
62 03:53:40.720164 progress 60% (4MB)
63 03:53:40.722050 progress 65% (4MB)
64 03:53:40.723803 progress 70% (5MB)
65 03:53:40.725689 progress 75% (5MB)
66 03:53:40.727473 progress 80% (5MB)
67 03:53:40.729361 progress 85% (6MB)
68 03:53:40.731294 progress 90% (6MB)
69 03:53:40.733030 progress 95% (6MB)
70 03:53:40.734981 progress 100% (7MB)
71 03:53:40.735155 7MB downloaded in 0.04s (186.33MB/s)
72 03:53:40.735308 end: 1.2.1 http-download (duration 00:00:00) [common]
74 03:53:40.735549 end: 1.2 download-retry (duration 00:00:00) [common]
75 03:53:40.735686 start: 1.3 download-retry (timeout 00:10:00) [common]
76 03:53:40.735776 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 03:53:40.735887 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-938-gc773c630d0e4f/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 03:53:40.735957 saving as /var/lib/lava/dispatcher/tmp/9338300/tftp-deploy-j2w3jvb1/modules/modules.tar
79 03:53:40.736020 total size: 51688 (0MB)
80 03:53:40.736082 Using unxz to decompress xz
81 03:53:40.739469 progress 63% (0MB)
82 03:53:40.739843 progress 100% (0MB)
83 03:53:40.743998 0MB downloaded in 0.01s (6.19MB/s)
84 03:53:40.744239 end: 1.3.1 http-download (duration 00:00:00) [common]
86 03:53:40.744512 end: 1.3 download-retry (duration 00:00:00) [common]
87 03:53:40.744613 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
88 03:53:40.744716 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
89 03:53:40.744805 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 03:53:40.744896 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
91 03:53:40.745090 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9338300/lava-overlay-tltjgz0b
92 03:53:40.745253 makedir: /var/lib/lava/dispatcher/tmp/9338300/lava-overlay-tltjgz0b/lava-9338300/bin
93 03:53:40.745387 makedir: /var/lib/lava/dispatcher/tmp/9338300/lava-overlay-tltjgz0b/lava-9338300/tests
94 03:53:40.745520 makedir: /var/lib/lava/dispatcher/tmp/9338300/lava-overlay-tltjgz0b/lava-9338300/results
95 03:53:40.745686 Creating /var/lib/lava/dispatcher/tmp/9338300/lava-overlay-tltjgz0b/lava-9338300/bin/lava-add-keys
96 03:53:40.745892 Creating /var/lib/lava/dispatcher/tmp/9338300/lava-overlay-tltjgz0b/lava-9338300/bin/lava-add-sources
97 03:53:40.746099 Creating /var/lib/lava/dispatcher/tmp/9338300/lava-overlay-tltjgz0b/lava-9338300/bin/lava-background-process-start
98 03:53:40.746298 Creating /var/lib/lava/dispatcher/tmp/9338300/lava-overlay-tltjgz0b/lava-9338300/bin/lava-background-process-stop
99 03:53:40.746477 Creating /var/lib/lava/dispatcher/tmp/9338300/lava-overlay-tltjgz0b/lava-9338300/bin/lava-common-functions
100 03:53:40.746658 Creating /var/lib/lava/dispatcher/tmp/9338300/lava-overlay-tltjgz0b/lava-9338300/bin/lava-echo-ipv4
101 03:53:40.746842 Creating /var/lib/lava/dispatcher/tmp/9338300/lava-overlay-tltjgz0b/lava-9338300/bin/lava-install-packages
102 03:53:40.747024 Creating /var/lib/lava/dispatcher/tmp/9338300/lava-overlay-tltjgz0b/lava-9338300/bin/lava-installed-packages
103 03:53:40.747203 Creating /var/lib/lava/dispatcher/tmp/9338300/lava-overlay-tltjgz0b/lava-9338300/bin/lava-os-build
104 03:53:40.747385 Creating /var/lib/lava/dispatcher/tmp/9338300/lava-overlay-tltjgz0b/lava-9338300/bin/lava-probe-channel
105 03:53:40.747564 Creating /var/lib/lava/dispatcher/tmp/9338300/lava-overlay-tltjgz0b/lava-9338300/bin/lava-probe-ip
106 03:53:40.747740 Creating /var/lib/lava/dispatcher/tmp/9338300/lava-overlay-tltjgz0b/lava-9338300/bin/lava-target-ip
107 03:53:40.747920 Creating /var/lib/lava/dispatcher/tmp/9338300/lava-overlay-tltjgz0b/lava-9338300/bin/lava-target-mac
108 03:53:40.748099 Creating /var/lib/lava/dispatcher/tmp/9338300/lava-overlay-tltjgz0b/lava-9338300/bin/lava-target-storage
109 03:53:40.748283 Creating /var/lib/lava/dispatcher/tmp/9338300/lava-overlay-tltjgz0b/lava-9338300/bin/lava-test-case
110 03:53:40.748463 Creating /var/lib/lava/dispatcher/tmp/9338300/lava-overlay-tltjgz0b/lava-9338300/bin/lava-test-event
111 03:53:40.748645 Creating /var/lib/lava/dispatcher/tmp/9338300/lava-overlay-tltjgz0b/lava-9338300/bin/lava-test-feedback
112 03:53:40.748817 Creating /var/lib/lava/dispatcher/tmp/9338300/lava-overlay-tltjgz0b/lava-9338300/bin/lava-test-raise
113 03:53:40.748997 Creating /var/lib/lava/dispatcher/tmp/9338300/lava-overlay-tltjgz0b/lava-9338300/bin/lava-test-reference
114 03:53:40.749178 Creating /var/lib/lava/dispatcher/tmp/9338300/lava-overlay-tltjgz0b/lava-9338300/bin/lava-test-runner
115 03:53:40.749357 Creating /var/lib/lava/dispatcher/tmp/9338300/lava-overlay-tltjgz0b/lava-9338300/bin/lava-test-set
116 03:53:40.749533 Creating /var/lib/lava/dispatcher/tmp/9338300/lava-overlay-tltjgz0b/lava-9338300/bin/lava-test-shell
117 03:53:40.749718 Updating /var/lib/lava/dispatcher/tmp/9338300/lava-overlay-tltjgz0b/lava-9338300/bin/lava-install-packages (oe)
118 03:53:40.749892 Updating /var/lib/lava/dispatcher/tmp/9338300/lava-overlay-tltjgz0b/lava-9338300/bin/lava-installed-packages (oe)
119 03:53:40.750050 Creating /var/lib/lava/dispatcher/tmp/9338300/lava-overlay-tltjgz0b/lava-9338300/environment
120 03:53:40.750237 LAVA metadata
121 03:53:40.750361 - LAVA_JOB_ID=9338300
122 03:53:40.750472 - LAVA_DISPATCHER_IP=192.168.201.1
123 03:53:40.750636 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
124 03:53:40.750748 skipped lava-vland-overlay
125 03:53:40.750864 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 03:53:40.750999 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
127 03:53:40.751100 skipped lava-multinode-overlay
128 03:53:40.751215 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 03:53:40.751351 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
130 03:53:40.751467 Loading test definitions
131 03:53:40.751622 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
132 03:53:40.751736 Using /lava-9338300 at stage 0
133 03:53:40.752143 uuid=9338300_1.4.2.3.1 testdef=None
134 03:53:40.752276 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 03:53:40.752415 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
136 03:53:40.753145 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 03:53:40.753523 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
139 03:53:40.754525 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 03:53:40.754906 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
142 03:53:40.755769 runner path: /var/lib/lava/dispatcher/tmp/9338300/lava-overlay-tltjgz0b/lava-9338300/0/tests/0_dmesg test_uuid 9338300_1.4.2.3.1
143 03:53:40.755980 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 03:53:40.756343 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
146 03:53:40.756457 Using /lava-9338300 at stage 1
147 03:53:40.756837 uuid=9338300_1.4.2.3.5 testdef=None
148 03:53:40.756969 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 03:53:40.757094 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
150 03:53:40.757781 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 03:53:40.758176 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
153 03:53:40.759052 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 03:53:40.759424 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
156 03:53:40.760276 runner path: /var/lib/lava/dispatcher/tmp/9338300/lava-overlay-tltjgz0b/lava-9338300/1/tests/1_bootrr test_uuid 9338300_1.4.2.3.5
157 03:53:40.760476 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 03:53:40.760818 Creating lava-test-runner.conf files
160 03:53:40.760921 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9338300/lava-overlay-tltjgz0b/lava-9338300/0 for stage 0
161 03:53:40.761041 - 0_dmesg
162 03:53:40.761157 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9338300/lava-overlay-tltjgz0b/lava-9338300/1 for stage 1
163 03:53:40.761275 - 1_bootrr
164 03:53:40.761414 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 03:53:40.761542 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
166 03:53:40.770284 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 03:53:40.770450 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
168 03:53:40.770584 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 03:53:40.770712 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 03:53:40.770841 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
171 03:53:40.986597 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 03:53:40.986946 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
173 03:53:40.987062 extracting modules file /var/lib/lava/dispatcher/tmp/9338300/tftp-deploy-j2w3jvb1/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9338300/extract-overlay-ramdisk-5jb1sdv2/ramdisk
174 03:53:40.991237 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 03:53:40.991357 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
176 03:53:40.991448 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9338300/compress-overlay-3xr6nk5q/overlay-1.4.2.4.tar.gz to ramdisk
177 03:53:40.991526 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9338300/compress-overlay-3xr6nk5q/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9338300/extract-overlay-ramdisk-5jb1sdv2/ramdisk
178 03:53:40.995356 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 03:53:40.995472 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
180 03:53:40.995571 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 03:53:40.995664 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
182 03:53:40.995748 Building ramdisk /var/lib/lava/dispatcher/tmp/9338300/extract-overlay-ramdisk-5jb1sdv2/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9338300/extract-overlay-ramdisk-5jb1sdv2/ramdisk
183 03:53:41.061693 >> 48119 blocks
184 03:53:41.826816 rename /var/lib/lava/dispatcher/tmp/9338300/extract-overlay-ramdisk-5jb1sdv2/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9338300/tftp-deploy-j2w3jvb1/ramdisk/ramdisk.cpio.gz
185 03:53:41.827236 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 03:53:41.827364 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
187 03:53:41.827473 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
188 03:53:41.827571 No mkimage arch provided, not using FIT.
189 03:53:41.827668 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 03:53:41.827757 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 03:53:41.827861 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 03:53:41.827957 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
193 03:53:41.828035 No LXC device requested
194 03:53:41.828119 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 03:53:41.828210 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
196 03:53:41.828299 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 03:53:41.828374 Checking files for TFTP limit of 4294967296 bytes.
198 03:53:41.828784 end: 1 tftp-deploy (duration 00:00:01) [common]
199 03:53:41.828893 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 03:53:41.828990 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 03:53:41.829121 substitutions:
202 03:53:41.829193 - {DTB}: None
203 03:53:41.829261 - {INITRD}: 9338300/tftp-deploy-j2w3jvb1/ramdisk/ramdisk.cpio.gz
204 03:53:41.829325 - {KERNEL}: 9338300/tftp-deploy-j2w3jvb1/kernel/bzImage
205 03:53:41.829386 - {LAVA_MAC}: None
206 03:53:41.829449 - {PRESEED_CONFIG}: None
207 03:53:41.829508 - {PRESEED_LOCAL}: None
208 03:53:41.829567 - {RAMDISK}: 9338300/tftp-deploy-j2w3jvb1/ramdisk/ramdisk.cpio.gz
209 03:53:41.829626 - {ROOT_PART}: None
210 03:53:41.829684 - {ROOT}: None
211 03:53:41.829742 - {SERVER_IP}: 192.168.201.1
212 03:53:41.829799 - {TEE}: None
213 03:53:41.829859 Parsed boot commands:
214 03:53:41.829916 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 03:53:41.830078 Parsed boot commands: tftpboot 192.168.201.1 9338300/tftp-deploy-j2w3jvb1/kernel/bzImage 9338300/tftp-deploy-j2w3jvb1/kernel/cmdline 9338300/tftp-deploy-j2w3jvb1/ramdisk/ramdisk.cpio.gz
216 03:53:41.830177 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 03:53:41.830269 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 03:53:41.830366 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 03:53:41.830456 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 03:53:41.830529 Not connected, no need to disconnect.
221 03:53:41.830611 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 03:53:41.830694 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 03:53:41.830767 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-3'
224 03:53:41.833928 Setting prompt string to ['lava-test: # ']
225 03:53:41.834291 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 03:53:41.834428 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 03:53:41.834533 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 03:53:41.834633 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 03:53:41.835056 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
230 03:53:51.153311 >> Command sent successfully.
231 03:53:51.155607 Returned 0 in 9 seconds
232 03:53:51.256641 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
234 03:53:51.257010 end: 2.2.2 reset-device (duration 00:00:09) [common]
235 03:53:51.257119 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
236 03:53:51.257213 Setting prompt string to 'Starting depthcharge on Helios...'
237 03:53:51.257287 Changing prompt to 'Starting depthcharge on Helios...'
238 03:53:51.257358 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
239 03:53:51.257658 [Enter `^Ec?' for help]
240 03:53:51.257743
241 03:53:51.257809
242 03:53:51.257873 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
243 03:53:51.257938 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
244 03:53:51.257998 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
245 03:53:51.258059 CPU: AES supported, TXT NOT supported, VT supported
246 03:53:51.258169 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
247 03:53:51.258226 PCH: device id 0284 (rev 00) is Cometlake-U Premium
248 03:53:51.258298 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
249 03:53:51.258358 VBOOT: Loading verstage.
250 03:53:51.258418 FMAP: Found "FLASH" version 1.1 at 0xc04000.
251 03:53:51.258478 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
252 03:53:51.258538 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
253 03:53:51.258598 CBFS @ c08000 size 3f8000
254 03:53:51.258657 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
255 03:53:51.258716 CBFS: Locating 'fallback/verstage'
256 03:53:51.258775 CBFS: Found @ offset 10fb80 size 1072c
257 03:53:51.258833
258 03:53:51.258891
259 03:53:51.258950 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
260 03:53:51.259009 Probing TPM: . done!
261 03:53:51.259068 TPM ready after 0 ms
262 03:53:51.259126 Connected to device vid:did:rid of 1ae0:0028:00
263 03:53:51.259185 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
264 03:53:51.259247 Initialized TPM device CR50 revision 0
265 03:53:51.259306 tlcl_send_startup: Startup return code is 0
266 03:53:51.259365 TPM: setup succeeded
267 03:53:51.259423 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
268 03:53:51.259481 Chrome EC: UHEPI supported
269 03:53:51.259539 Phase 1
270 03:53:51.259598 FMAP: area GBB found @ c05000 (12288 bytes)
271 03:53:51.259657 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
272 03:53:51.259716 Phase 2
273 03:53:51.259774 Phase 3
274 03:53:51.259831 FMAP: area GBB found @ c05000 (12288 bytes)
275 03:53:51.259890 VB2:vb2_report_dev_firmware() This is developer signed firmware
276 03:53:51.259949 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
277 03:53:51.260008 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
278 03:53:51.260067 VB2:vb2_verify_keyblock() Checking keyblock signature...
279 03:53:51.260126 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
280 03:53:51.260185 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
281 03:53:51.260243 VB2:vb2_verify_fw_preamble() Verifying preamble.
282 03:53:51.260301 Phase 4
283 03:53:51.260377 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
284 03:53:51.260437 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
285 03:53:51.260497 VB2:vb2_rsa_verify_digest() Digest check failed!
286 03:53:51.260555 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
287 03:53:51.260614 Saving nvdata
288 03:53:51.260672 Reboot requested (10020007)
289 03:53:51.260731 board_reset() called!
290 03:53:51.260789 full_reset() called!
291 03:53:54.832879
292 03:53:54.833030
293 03:53:54.842987 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
294 03:53:54.845741 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
295 03:53:54.852865 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
296 03:53:54.856131 CPU: AES supported, TXT NOT supported, VT supported
297 03:53:54.862307 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
298 03:53:54.865725 PCH: device id 0284 (rev 00) is Cometlake-U Premium
299 03:53:54.872788 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
300 03:53:54.876015 VBOOT: Loading verstage.
301 03:53:54.879331 FMAP: Found "FLASH" version 1.1 at 0xc04000.
302 03:53:54.885818 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
303 03:53:54.892523 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
304 03:53:54.892607 CBFS @ c08000 size 3f8000
305 03:53:54.899093 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
306 03:53:54.902242 CBFS: Locating 'fallback/verstage'
307 03:53:54.905451 CBFS: Found @ offset 10fb80 size 1072c
308 03:53:54.909925
309 03:53:54.910008
310 03:53:54.919944 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
311 03:53:54.934202 Probing TPM: . done!
312 03:53:54.937470 TPM ready after 0 ms
313 03:53:54.940307 Connected to device vid:did:rid of 1ae0:0028:00
314 03:53:54.950355 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
315 03:53:54.954273 Initialized TPM device CR50 revision 0
316 03:53:54.996476 tlcl_send_startup: Startup return code is 0
317 03:53:54.996578 TPM: setup succeeded
318 03:53:55.009207 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
319 03:53:55.012892 Chrome EC: UHEPI supported
320 03:53:55.016087 Phase 1
321 03:53:55.019437 FMAP: area GBB found @ c05000 (12288 bytes)
322 03:53:55.025972 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
323 03:53:55.032782 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
324 03:53:55.036425 Recovery requested (1009000e)
325 03:53:55.042242 Saving nvdata
326 03:53:55.047904 tlcl_extend: response is 0
327 03:53:55.057048 tlcl_extend: response is 0
328 03:53:55.063543 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
329 03:53:55.066932 CBFS @ c08000 size 3f8000
330 03:53:55.073343 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
331 03:53:55.076812 CBFS: Locating 'fallback/romstage'
332 03:53:55.079964 CBFS: Found @ offset 80 size 145fc
333 03:53:55.083364 Accumulated console time in verstage 98 ms
334 03:53:55.083449
335 03:53:55.083518
336 03:53:55.096875 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
337 03:53:55.102868 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
338 03:53:55.106831 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
339 03:53:55.109694 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
340 03:53:55.116584 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
341 03:53:55.120002 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
342 03:53:55.123229 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
343 03:53:55.126523 TCO_STS: 0000 0000
344 03:53:55.129945 GEN_PMCON: e0015238 00000200
345 03:53:55.132751 GBLRST_CAUSE: 00000000 00000000
346 03:53:55.132842 prev_sleep_state 5
347 03:53:55.136959 Boot Count incremented to 49325
348 03:53:55.143233 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
349 03:53:55.146529 CBFS @ c08000 size 3f8000
350 03:53:55.152808 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
351 03:53:55.152895 CBFS: Locating 'fspm.bin'
352 03:53:55.159551 CBFS: Found @ offset 5ffc0 size 71000
353 03:53:55.163157 Chrome EC: UHEPI supported
354 03:53:55.169589 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
355 03:53:55.173502 Probing TPM: done!
356 03:53:55.179934 Connected to device vid:did:rid of 1ae0:0028:00
357 03:53:55.189702 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
358 03:53:55.195694 Initialized TPM device CR50 revision 0
359 03:53:55.204783 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
360 03:53:55.214907 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
361 03:53:55.214995 MRC cache found, size 1948
362 03:53:55.217792 bootmode is set to: 2
363 03:53:55.221052 PRMRR disabled by config.
364 03:53:55.224420 SPD INDEX = 1
365 03:53:55.227641 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
366 03:53:55.230829 CBFS @ c08000 size 3f8000
367 03:53:55.237347 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
368 03:53:55.237435 CBFS: Locating 'spd.bin'
369 03:53:55.240521 CBFS: Found @ offset 5fb80 size 400
370 03:53:55.244457 SPD: module type is LPDDR3
371 03:53:55.247789 SPD: module part is
372 03:53:55.254302 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
373 03:53:55.257382 SPD: device width 4 bits, bus width 8 bits
374 03:53:55.260817 SPD: module size is 4096 MB (per channel)
375 03:53:55.263975 memory slot: 0 configuration done.
376 03:53:55.267285 memory slot: 2 configuration done.
377 03:53:55.318664 CBMEM:
378 03:53:55.322001 IMD: root @ 99fff000 254 entries.
379 03:53:55.325297 IMD: root @ 99ffec00 62 entries.
380 03:53:55.328788 External stage cache:
381 03:53:55.332137 IMD: root @ 9abff000 254 entries.
382 03:53:55.335407 IMD: root @ 9abfec00 62 entries.
383 03:53:55.341938 Chrome EC: clear events_b mask to 0x0000000020004000
384 03:53:55.354465 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
385 03:53:55.368018 tlcl_write: response is 0
386 03:53:55.376828 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
387 03:53:55.383146 MRC: TPM MRC hash updated successfully.
388 03:53:55.383242 2 DIMMs found
389 03:53:55.386594 SMM Memory Map
390 03:53:55.389976 SMRAM : 0x9a000000 0x1000000
391 03:53:55.393600 Subregion 0: 0x9a000000 0xa00000
392 03:53:55.397014 Subregion 1: 0x9aa00000 0x200000
393 03:53:55.400171 Subregion 2: 0x9ac00000 0x400000
394 03:53:55.402893 top_of_ram = 0x9a000000
395 03:53:55.406351 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
396 03:53:55.413071 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
397 03:53:55.416403 MTRR Range: Start=ff000000 End=0 (Size 1000000)
398 03:53:55.423077 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
399 03:53:55.426546 CBFS @ c08000 size 3f8000
400 03:53:55.429664 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
401 03:53:55.432886 CBFS: Locating 'fallback/postcar'
402 03:53:55.439363 CBFS: Found @ offset 107000 size 4b44
403 03:53:55.446493 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
404 03:53:55.456167 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
405 03:53:55.459367 Processing 180 relocs. Offset value of 0x97c0c000
406 03:53:55.467809 Accumulated console time in romstage 286 ms
407 03:53:55.467899
408 03:53:55.467968
409 03:53:55.477300 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
410 03:53:55.484344 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
411 03:53:55.487649 CBFS @ c08000 size 3f8000
412 03:53:55.494412 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
413 03:53:55.497403 CBFS: Locating 'fallback/ramstage'
414 03:53:55.500769 CBFS: Found @ offset 43380 size 1b9e8
415 03:53:55.506794 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
416 03:53:55.539257 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
417 03:53:55.545714 Processing 3976 relocs. Offset value of 0x98db0000
418 03:53:55.548979 Accumulated console time in postcar 52 ms
419 03:53:55.549068
420 03:53:55.549148
421 03:53:55.558924 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
422 03:53:55.565340 FMAP: area RO_VPD found @ c00000 (16384 bytes)
423 03:53:55.568910 WARNING: RO_VPD is uninitialized or empty.
424 03:53:55.572328 FMAP: area RW_VPD found @ af8000 (8192 bytes)
425 03:53:55.578935 FMAP: area RW_VPD found @ af8000 (8192 bytes)
426 03:53:55.579023 Normal boot.
427 03:53:55.585448 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
428 03:53:55.588713 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
429 03:53:55.592131 CBFS @ c08000 size 3f8000
430 03:53:55.598977 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
431 03:53:55.602035 CBFS: Locating 'cpu_microcode_blob.bin'
432 03:53:55.605451 CBFS: Found @ offset 14700 size 2ec00
433 03:53:55.608778 microcode: sig=0x806ec pf=0x4 revision=0xc9
434 03:53:55.612213 Skip microcode update
435 03:53:55.618841 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
436 03:53:55.618943 CBFS @ c08000 size 3f8000
437 03:53:55.625240 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
438 03:53:55.628053 CBFS: Locating 'fsps.bin'
439 03:53:55.631227 CBFS: Found @ offset d1fc0 size 35000
440 03:53:55.657513 Detected 4 core, 8 thread CPU.
441 03:53:55.660746 Setting up SMI for CPU
442 03:53:55.664002 IED base = 0x9ac00000
443 03:53:55.664089 IED size = 0x00400000
444 03:53:55.667202 Will perform SMM setup.
445 03:53:55.674275 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
446 03:53:55.680870 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
447 03:53:55.686837 Processing 16 relocs. Offset value of 0x00030000
448 03:53:55.686926 Attempting to start 7 APs
449 03:53:55.693826 Waiting for 10ms after sending INIT.
450 03:53:55.707398 Waiting for 1st SIPI to complete...done.
451 03:53:55.707486 AP: slot 1 apic_id 3.
452 03:53:55.710767 AP: slot 4 apic_id 2.
453 03:53:55.714147 AP: slot 6 apic_id 6.
454 03:53:55.714234 AP: slot 3 apic_id 7.
455 03:53:55.717279 AP: slot 2 apic_id 1.
456 03:53:55.720499 Waiting for 2nd SIPI to complete...done.
457 03:53:55.723812 AP: slot 5 apic_id 5.
458 03:53:55.727273 AP: slot 7 apic_id 4.
459 03:53:55.733828 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
460 03:53:55.740180 Processing 13 relocs. Offset value of 0x00038000
461 03:53:55.746861 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
462 03:53:55.750312 Installing SMM handler to 0x9a000000
463 03:53:55.756685 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
464 03:53:55.763476 Processing 658 relocs. Offset value of 0x9a010000
465 03:53:55.769893 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
466 03:53:55.773085 Processing 13 relocs. Offset value of 0x9a008000
467 03:53:55.779990 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
468 03:53:55.786384 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
469 03:53:55.792912 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
470 03:53:55.796340 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
471 03:53:55.802336 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
472 03:53:55.808960 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
473 03:53:55.815554 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
474 03:53:55.822348 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
475 03:53:55.825724 Clearing SMI status registers
476 03:53:55.825813 SMI_STS: PM1
477 03:53:55.829088 PM1_STS: PWRBTN
478 03:53:55.829176 TCO_STS: SECOND_TO
479 03:53:55.832698 New SMBASE 0x9a000000
480 03:53:55.835902 In relocation handler: CPU 0
481 03:53:55.838961 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
482 03:53:55.845493 Writing SMRR. base = 0x9a000006, mask=0xff000800
483 03:53:55.845578 Relocation complete.
484 03:53:55.848986 New SMBASE 0x99fff800
485 03:53:55.852077 In relocation handler: CPU 2
486 03:53:55.855560 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
487 03:53:55.862040 Writing SMRR. base = 0x9a000006, mask=0xff000800
488 03:53:55.862168 Relocation complete.
489 03:53:55.864949 New SMBASE 0x99ffe800
490 03:53:55.868744 In relocation handler: CPU 6
491 03:53:55.871825 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
492 03:53:55.877978 Writing SMRR. base = 0x9a000006, mask=0xff000800
493 03:53:55.878071 Relocation complete.
494 03:53:55.881333 New SMBASE 0x99fff400
495 03:53:55.884345 In relocation handler: CPU 3
496 03:53:55.888312 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
497 03:53:55.894799 Writing SMRR. base = 0x9a000006, mask=0xff000800
498 03:53:55.894890 Relocation complete.
499 03:53:55.898083 New SMBASE 0x99ffe400
500 03:53:55.901719 In relocation handler: CPU 7
501 03:53:55.904278 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
502 03:53:55.911169 Writing SMRR. base = 0x9a000006, mask=0xff000800
503 03:53:55.911252 Relocation complete.
504 03:53:55.914420 New SMBASE 0x99ffec00
505 03:53:55.917657 In relocation handler: CPU 5
506 03:53:55.920948 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
507 03:53:55.924319 Writing SMRR. base = 0x9a000006, mask=0xff000800
508 03:53:55.927473 Relocation complete.
509 03:53:55.930944 New SMBASE 0x99fff000
510 03:53:55.934127 In relocation handler: CPU 4
511 03:53:55.937629 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
512 03:53:55.940738 Writing SMRR. base = 0x9a000006, mask=0xff000800
513 03:53:55.944243 Relocation complete.
514 03:53:55.947348 New SMBASE 0x99fffc00
515 03:53:55.950711 In relocation handler: CPU 1
516 03:53:55.954239 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
517 03:53:55.957349 Writing SMRR. base = 0x9a000006, mask=0xff000800
518 03:53:55.960498 Relocation complete.
519 03:53:55.964131 Initializing CPU #0
520 03:53:55.967272 CPU: vendor Intel device 806ec
521 03:53:55.970464 CPU: family 06, model 8e, stepping 0c
522 03:53:55.973732 Clearing out pending MCEs
523 03:53:55.973821 Setting up local APIC...
524 03:53:55.977035 apic_id: 0x00 done.
525 03:53:55.980388 Turbo is available but hidden
526 03:53:55.983609 Turbo is available and visible
527 03:53:55.987101 VMX status: enabled
528 03:53:55.990308 IA32_FEATURE_CONTROL status: locked
529 03:53:55.990408 Skip microcode update
530 03:53:55.993828 CPU #0 initialized
531 03:53:55.997373 Initializing CPU #2
532 03:53:55.997464 Initializing CPU #4
533 03:53:55.999991 Initializing CPU #1
534 03:53:56.003236 CPU: vendor Intel device 806ec
535 03:53:56.006717 CPU: family 06, model 8e, stepping 0c
536 03:53:56.009933 CPU: vendor Intel device 806ec
537 03:53:56.013252 CPU: family 06, model 8e, stepping 0c
538 03:53:56.016937 Clearing out pending MCEs
539 03:53:56.020196 Clearing out pending MCEs
540 03:53:56.020293 Setting up local APIC...
541 03:53:56.023308 Initializing CPU #5
542 03:53:56.026612 Initializing CPU #7
543 03:53:56.029949 CPU: vendor Intel device 806ec
544 03:53:56.033271 CPU: family 06, model 8e, stepping 0c
545 03:53:56.033362 Initializing CPU #3
546 03:53:56.036030 Initializing CPU #6
547 03:53:56.039445 CPU: vendor Intel device 806ec
548 03:53:56.042832 CPU: family 06, model 8e, stepping 0c
549 03:53:56.046125 CPU: vendor Intel device 806ec
550 03:53:56.049497 CPU: family 06, model 8e, stepping 0c
551 03:53:56.052931 Clearing out pending MCEs
552 03:53:56.055706 Clearing out pending MCEs
553 03:53:56.059166 Setting up local APIC...
554 03:53:56.059258 Clearing out pending MCEs
555 03:53:56.062422 CPU: vendor Intel device 806ec
556 03:53:56.065978 CPU: family 06, model 8e, stepping 0c
557 03:53:56.069001 Setting up local APIC...
558 03:53:56.072496 Setting up local APIC...
559 03:53:56.075524 CPU: vendor Intel device 806ec
560 03:53:56.079145 CPU: family 06, model 8e, stepping 0c
561 03:53:56.082264 Clearing out pending MCEs
562 03:53:56.085418 apic_id: 0x03 done.
563 03:53:56.085510 apic_id: 0x02 done.
564 03:53:56.089312 VMX status: enabled
565 03:53:56.089404 VMX status: enabled
566 03:53:56.092727 IA32_FEATURE_CONTROL status: locked
567 03:53:56.098767 IA32_FEATURE_CONTROL status: locked
568 03:53:56.098858 Skip microcode update
569 03:53:56.102223 Skip microcode update
570 03:53:56.105485 CPU #1 initialized
571 03:53:56.105575 CPU #4 initialized
572 03:53:56.108850 apic_id: 0x06 done.
573 03:53:56.112499 Setting up local APIC...
574 03:53:56.112593 Setting up local APIC...
575 03:53:56.114936 VMX status: enabled
576 03:53:56.118455 apic_id: 0x07 done.
577 03:53:56.121669 IA32_FEATURE_CONTROL status: locked
578 03:53:56.121745 VMX status: enabled
579 03:53:56.125107 Skip microcode update
580 03:53:56.128318 IA32_FEATURE_CONTROL status: locked
581 03:53:56.131670 CPU #6 initialized
582 03:53:56.131757 Skip microcode update
583 03:53:56.134977 apic_id: 0x05 done.
584 03:53:56.138408 Clearing out pending MCEs
585 03:53:56.138496 CPU #3 initialized
586 03:53:56.141537 VMX status: enabled
587 03:53:56.144539 Setting up local APIC...
588 03:53:56.144616 apic_id: 0x01 done.
589 03:53:56.151125 IA32_FEATURE_CONTROL status: locked
590 03:53:56.151213 apic_id: 0x04 done.
591 03:53:56.154388 Skip microcode update
592 03:53:56.157992 VMX status: enabled
593 03:53:56.158086 VMX status: enabled
594 03:53:56.161637 CPU #5 initialized
595 03:53:56.164702 IA32_FEATURE_CONTROL status: locked
596 03:53:56.168029 IA32_FEATURE_CONTROL status: locked
597 03:53:56.171166 Skip microcode update
598 03:53:56.171253 Skip microcode update
599 03:53:56.174383 CPU #7 initialized
600 03:53:56.174470 CPU #2 initialized
601 03:53:56.180862 bsp_do_flight_plan done after 456 msecs.
602 03:53:56.184632 CPU: frequency set to 4200 MHz
603 03:53:56.184720 Enabling SMIs.
604 03:53:56.187815 Locking SMM.
605 03:53:56.201084 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
606 03:53:56.204369 CBFS @ c08000 size 3f8000
607 03:53:56.211120 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
608 03:53:56.211208 CBFS: Locating 'vbt.bin'
609 03:53:56.214118 CBFS: Found @ offset 5f5c0 size 499
610 03:53:56.220827 Found a VBT of 4608 bytes after decompression
611 03:53:56.401111 Display FSP Version Info HOB
612 03:53:56.404413 Reference Code - CPU = 9.0.1e.30
613 03:53:56.407451 uCode Version = 0.0.0.ca
614 03:53:56.410968 TXT ACM version = ff.ff.ff.ffff
615 03:53:56.414035 Display FSP Version Info HOB
616 03:53:56.417475 Reference Code - ME = 9.0.1e.30
617 03:53:56.420661 MEBx version = 0.0.0.0
618 03:53:56.424039 ME Firmware Version = Consumer SKU
619 03:53:56.427225 Display FSP Version Info HOB
620 03:53:56.430521 Reference Code - CML PCH = 9.0.1e.30
621 03:53:56.433765 PCH-CRID Status = Disabled
622 03:53:56.436985 PCH-CRID Original Value = ff.ff.ff.ffff
623 03:53:56.440421 PCH-CRID New Value = ff.ff.ff.ffff
624 03:53:56.443606 OPROM - RST - RAID = ff.ff.ff.ffff
625 03:53:56.446974 ChipsetInit Base Version = ff.ff.ff.ffff
626 03:53:56.453325 ChipsetInit Oem Version = ff.ff.ff.ffff
627 03:53:56.453413 Display FSP Version Info HOB
628 03:53:56.459974 Reference Code - SA - System Agent = 9.0.1e.30
629 03:53:56.463091 Reference Code - MRC = 0.7.1.6c
630 03:53:56.466602 SA - PCIe Version = 9.0.1e.30
631 03:53:56.469812 SA-CRID Status = Disabled
632 03:53:56.472920 SA-CRID Original Value = 0.0.0.c
633 03:53:56.473008 SA-CRID New Value = 0.0.0.c
634 03:53:56.476005 OPROM - VBIOS = ff.ff.ff.ffff
635 03:53:56.479521 RTC Init
636 03:53:56.482704 Set power on after power failure.
637 03:53:56.482793 Disabling Deep S3
638 03:53:56.486001 Disabling Deep S3
639 03:53:56.489458 Disabling Deep S4
640 03:53:56.489546 Disabling Deep S4
641 03:53:56.492512 Disabling Deep S5
642 03:53:56.492600 Disabling Deep S5
643 03:53:56.499111 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 190 exit 1
644 03:53:56.502449 Enumerating buses...
645 03:53:56.505631 Show all devs... Before device enumeration.
646 03:53:56.508924 Root Device: enabled 1
647 03:53:56.512229 CPU_CLUSTER: 0: enabled 1
648 03:53:56.512316 DOMAIN: 0000: enabled 1
649 03:53:56.515806 APIC: 00: enabled 1
650 03:53:56.519056 PCI: 00:00.0: enabled 1
651 03:53:56.519143 PCI: 00:02.0: enabled 1
652 03:53:56.522420 PCI: 00:04.0: enabled 0
653 03:53:56.525726 PCI: 00:05.0: enabled 0
654 03:53:56.529019 PCI: 00:12.0: enabled 1
655 03:53:56.529106 PCI: 00:12.5: enabled 0
656 03:53:56.532619 PCI: 00:12.6: enabled 0
657 03:53:56.534961 PCI: 00:14.0: enabled 1
658 03:53:56.538408 PCI: 00:14.1: enabled 0
659 03:53:56.538495 PCI: 00:14.3: enabled 1
660 03:53:56.541688 PCI: 00:14.5: enabled 0
661 03:53:56.544989 PCI: 00:15.0: enabled 1
662 03:53:56.548344 PCI: 00:15.1: enabled 1
663 03:53:56.548424 PCI: 00:15.2: enabled 0
664 03:53:56.551856 PCI: 00:15.3: enabled 0
665 03:53:56.554714 PCI: 00:16.0: enabled 1
666 03:53:56.558467 PCI: 00:16.1: enabled 0
667 03:53:56.558554 PCI: 00:16.2: enabled 0
668 03:53:56.561954 PCI: 00:16.3: enabled 0
669 03:53:56.565023 PCI: 00:16.4: enabled 0
670 03:53:56.568310 PCI: 00:16.5: enabled 0
671 03:53:56.568397 PCI: 00:17.0: enabled 1
672 03:53:56.571594 PCI: 00:19.0: enabled 1
673 03:53:56.574792 PCI: 00:19.1: enabled 0
674 03:53:56.578251 PCI: 00:19.2: enabled 0
675 03:53:56.578339 PCI: 00:1a.0: enabled 0
676 03:53:56.581503 PCI: 00:1c.0: enabled 0
677 03:53:56.584473 PCI: 00:1c.1: enabled 0
678 03:53:56.584594 PCI: 00:1c.2: enabled 0
679 03:53:56.587831 PCI: 00:1c.3: enabled 0
680 03:53:56.590839 PCI: 00:1c.4: enabled 0
681 03:53:56.594110 PCI: 00:1c.5: enabled 0
682 03:53:56.594201 PCI: 00:1c.6: enabled 0
683 03:53:56.597739 PCI: 00:1c.7: enabled 0
684 03:53:56.600813 PCI: 00:1d.0: enabled 1
685 03:53:56.604602 PCI: 00:1d.1: enabled 0
686 03:53:56.604692 PCI: 00:1d.2: enabled 0
687 03:53:56.607359 PCI: 00:1d.3: enabled 0
688 03:53:56.610712 PCI: 00:1d.4: enabled 0
689 03:53:56.614408 PCI: 00:1d.5: enabled 1
690 03:53:56.614497 PCI: 00:1e.0: enabled 1
691 03:53:56.617511 PCI: 00:1e.1: enabled 0
692 03:53:56.620980 PCI: 00:1e.2: enabled 1
693 03:53:56.623824 PCI: 00:1e.3: enabled 1
694 03:53:56.623938 PCI: 00:1f.0: enabled 1
695 03:53:56.627505 PCI: 00:1f.1: enabled 1
696 03:53:56.630280 PCI: 00:1f.2: enabled 1
697 03:53:56.633465 PCI: 00:1f.3: enabled 1
698 03:53:56.633553 PCI: 00:1f.4: enabled 1
699 03:53:56.637097 PCI: 00:1f.5: enabled 1
700 03:53:56.640337 PCI: 00:1f.6: enabled 0
701 03:53:56.643635 USB0 port 0: enabled 1
702 03:53:56.643723 I2C: 00:15: enabled 1
703 03:53:56.647228 I2C: 00:5d: enabled 1
704 03:53:56.650343 GENERIC: 0.0: enabled 1
705 03:53:56.650430 I2C: 00:1a: enabled 1
706 03:53:56.653474 I2C: 00:38: enabled 1
707 03:53:56.656848 I2C: 00:39: enabled 1
708 03:53:56.656944 I2C: 00:3a: enabled 1
709 03:53:56.659940 I2C: 00:3b: enabled 1
710 03:53:56.663395 PCI: 00:00.0: enabled 1
711 03:53:56.663483 SPI: 00: enabled 1
712 03:53:56.666429 SPI: 01: enabled 1
713 03:53:56.669758 PNP: 0c09.0: enabled 1
714 03:53:56.669845 USB2 port 0: enabled 1
715 03:53:56.673053 USB2 port 1: enabled 1
716 03:53:56.676242 USB2 port 2: enabled 0
717 03:53:56.679568 USB2 port 3: enabled 0
718 03:53:56.679655 USB2 port 5: enabled 0
719 03:53:56.682802 USB2 port 6: enabled 1
720 03:53:56.686243 USB2 port 9: enabled 1
721 03:53:56.686333 USB3 port 0: enabled 1
722 03:53:56.689425 USB3 port 1: enabled 1
723 03:53:56.692892 USB3 port 2: enabled 1
724 03:53:56.692982 USB3 port 3: enabled 1
725 03:53:56.695862 USB3 port 4: enabled 0
726 03:53:56.699152 APIC: 03: enabled 1
727 03:53:56.699244 APIC: 01: enabled 1
728 03:53:56.703075 APIC: 07: enabled 1
729 03:53:56.705904 APIC: 02: enabled 1
730 03:53:56.705996 APIC: 05: enabled 1
731 03:53:56.709487 APIC: 06: enabled 1
732 03:53:56.712651 APIC: 04: enabled 1
733 03:53:56.712739 Compare with tree...
734 03:53:56.716349 Root Device: enabled 1
735 03:53:56.719142 CPU_CLUSTER: 0: enabled 1
736 03:53:56.719222 APIC: 00: enabled 1
737 03:53:56.722259 APIC: 03: enabled 1
738 03:53:56.725596 APIC: 01: enabled 1
739 03:53:56.725682 APIC: 07: enabled 1
740 03:53:56.728989 APIC: 02: enabled 1
741 03:53:56.732335 APIC: 05: enabled 1
742 03:53:56.736034 APIC: 06: enabled 1
743 03:53:56.736120 APIC: 04: enabled 1
744 03:53:56.739140 DOMAIN: 0000: enabled 1
745 03:53:56.742385 PCI: 00:00.0: enabled 1
746 03:53:56.745685 PCI: 00:02.0: enabled 1
747 03:53:56.745773 PCI: 00:04.0: enabled 0
748 03:53:56.749069 PCI: 00:05.0: enabled 0
749 03:53:56.751764 PCI: 00:12.0: enabled 1
750 03:53:56.755349 PCI: 00:12.5: enabled 0
751 03:53:56.758410 PCI: 00:12.6: enabled 0
752 03:53:56.758511 PCI: 00:14.0: enabled 1
753 03:53:56.761685 USB0 port 0: enabled 1
754 03:53:56.764790 USB2 port 0: enabled 1
755 03:53:56.768019 USB2 port 1: enabled 1
756 03:53:56.771403 USB2 port 2: enabled 0
757 03:53:56.774628 USB2 port 3: enabled 0
758 03:53:56.774709 USB2 port 5: enabled 0
759 03:53:56.778420 USB2 port 6: enabled 1
760 03:53:56.781779 USB2 port 9: enabled 1
761 03:53:56.784903 USB3 port 0: enabled 1
762 03:53:56.788146 USB3 port 1: enabled 1
763 03:53:56.788229 USB3 port 2: enabled 1
764 03:53:56.791559 USB3 port 3: enabled 1
765 03:53:56.794408 USB3 port 4: enabled 0
766 03:53:56.797940 PCI: 00:14.1: enabled 0
767 03:53:56.801299 PCI: 00:14.3: enabled 1
768 03:53:56.804634 PCI: 00:14.5: enabled 0
769 03:53:56.804714 PCI: 00:15.0: enabled 1
770 03:53:56.807877 I2C: 00:15: enabled 1
771 03:53:56.810948 PCI: 00:15.1: enabled 1
772 03:53:56.814184 I2C: 00:5d: enabled 1
773 03:53:56.814264 GENERIC: 0.0: enabled 1
774 03:53:56.817527 PCI: 00:15.2: enabled 0
775 03:53:56.820881 PCI: 00:15.3: enabled 0
776 03:53:56.824192 PCI: 00:16.0: enabled 1
777 03:53:56.827627 PCI: 00:16.1: enabled 0
778 03:53:56.827708 PCI: 00:16.2: enabled 0
779 03:53:56.830928 PCI: 00:16.3: enabled 0
780 03:53:56.834328 PCI: 00:16.4: enabled 0
781 03:53:56.837113 PCI: 00:16.5: enabled 0
782 03:53:56.840425 PCI: 00:17.0: enabled 1
783 03:53:56.843799 PCI: 00:19.0: enabled 1
784 03:53:56.843886 I2C: 00:1a: enabled 1
785 03:53:56.847232 I2C: 00:38: enabled 1
786 03:53:56.850728 I2C: 00:39: enabled 1
787 03:53:56.853849 I2C: 00:3a: enabled 1
788 03:53:56.853948 I2C: 00:3b: enabled 1
789 03:53:56.857401 PCI: 00:19.1: enabled 0
790 03:53:56.860561 PCI: 00:19.2: enabled 0
791 03:53:56.863249 PCI: 00:1a.0: enabled 0
792 03:53:56.867090 PCI: 00:1c.0: enabled 0
793 03:53:56.867169 PCI: 00:1c.1: enabled 0
794 03:53:56.870490 PCI: 00:1c.2: enabled 0
795 03:53:56.873266 PCI: 00:1c.3: enabled 0
796 03:53:56.876376 PCI: 00:1c.4: enabled 0
797 03:53:56.880421 PCI: 00:1c.5: enabled 0
798 03:53:56.880502 PCI: 00:1c.6: enabled 0
799 03:53:56.883430 PCI: 00:1c.7: enabled 0
800 03:53:56.886560 PCI: 00:1d.0: enabled 1
801 03:53:56.889697 PCI: 00:1d.1: enabled 0
802 03:53:56.893190 PCI: 00:1d.2: enabled 0
803 03:53:56.893273 PCI: 00:1d.3: enabled 0
804 03:53:56.896228 PCI: 00:1d.4: enabled 0
805 03:53:56.899457 PCI: 00:1d.5: enabled 1
806 03:53:56.902781 PCI: 00:00.0: enabled 1
807 03:53:56.906137 PCI: 00:1e.0: enabled 1
808 03:53:56.906237 PCI: 00:1e.1: enabled 0
809 03:53:56.909362 PCI: 00:1e.2: enabled 1
810 03:53:56.912498 SPI: 00: enabled 1
811 03:53:56.918394 PCI: 00:1e.3: enabled 1
812 03:53:56.918517 SPI: 01: enabled 1
813 03:53:56.919403 PCI: 00:1f.0: enabled 1
814 03:53:56.922900 PNP: 0c09.0: enabled 1
815 03:53:56.926028 PCI: 00:1f.1: enabled 1
816 03:53:56.929417 PCI: 00:1f.2: enabled 1
817 03:53:56.929507 PCI: 00:1f.3: enabled 1
818 03:53:56.932517 PCI: 00:1f.4: enabled 1
819 03:53:56.936148 PCI: 00:1f.5: enabled 1
820 03:53:56.939296 PCI: 00:1f.6: enabled 0
821 03:53:56.942696 Root Device scanning...
822 03:53:56.945249 scan_static_bus for Root Device
823 03:53:56.945335 CPU_CLUSTER: 0 enabled
824 03:53:56.948731 DOMAIN: 0000 enabled
825 03:53:56.952253 DOMAIN: 0000 scanning...
826 03:53:56.955516 PCI: pci_scan_bus for bus 00
827 03:53:56.958989 PCI: 00:00.0 [8086/0000] ops
828 03:53:56.961837 PCI: 00:00.0 [8086/9b61] enabled
829 03:53:56.965774 PCI: 00:02.0 [8086/0000] bus ops
830 03:53:56.968278 PCI: 00:02.0 [8086/9b41] enabled
831 03:53:56.971618 PCI: 00:04.0 [8086/1903] disabled
832 03:53:56.975053 PCI: 00:08.0 [8086/1911] enabled
833 03:53:56.978460 PCI: 00:12.0 [8086/02f9] enabled
834 03:53:56.981595 PCI: 00:14.0 [8086/0000] bus ops
835 03:53:56.985044 PCI: 00:14.0 [8086/02ed] enabled
836 03:53:56.988159 PCI: 00:14.2 [8086/02ef] enabled
837 03:53:56.991286 PCI: 00:14.3 [8086/02f0] enabled
838 03:53:56.994546 PCI: 00:15.0 [8086/0000] bus ops
839 03:53:56.997861 PCI: 00:15.0 [8086/02e8] enabled
840 03:53:57.001054 PCI: 00:15.1 [8086/0000] bus ops
841 03:53:57.004366 PCI: 00:15.1 [8086/02e9] enabled
842 03:53:57.007375 PCI: 00:16.0 [8086/0000] ops
843 03:53:57.010755 PCI: 00:16.0 [8086/02e0] enabled
844 03:53:57.014358 PCI: 00:17.0 [8086/0000] ops
845 03:53:57.017896 PCI: 00:17.0 [8086/02d3] enabled
846 03:53:57.021053 PCI: 00:19.0 [8086/0000] bus ops
847 03:53:57.023804 PCI: 00:19.0 [8086/02c5] enabled
848 03:53:57.027268 PCI: 00:1d.0 [8086/0000] bus ops
849 03:53:57.030628 PCI: 00:1d.0 [8086/02b0] enabled
850 03:53:57.037242 PCI: Static device PCI: 00:1d.5 not found, disabling it.
851 03:53:57.037361 PCI: 00:1e.0 [8086/0000] ops
852 03:53:57.040642 PCI: 00:1e.0 [8086/02a8] enabled
853 03:53:57.043423 PCI: 00:1e.2 [8086/0000] bus ops
854 03:53:57.050193 PCI: 00:1e.2 [8086/02aa] enabled
855 03:53:57.053520 PCI: 00:1e.3 [8086/0000] bus ops
856 03:53:57.056889 PCI: 00:1e.3 [8086/02ab] enabled
857 03:53:57.060281 PCI: 00:1f.0 [8086/0000] bus ops
858 03:53:57.063616 PCI: 00:1f.0 [8086/0284] enabled
859 03:53:57.066998 PCI: Static device PCI: 00:1f.1 not found, disabling it.
860 03:53:57.073519 PCI: Static device PCI: 00:1f.2 not found, disabling it.
861 03:53:57.076262 PCI: 00:1f.3 [8086/0000] bus ops
862 03:53:57.079637 PCI: 00:1f.3 [8086/02c8] enabled
863 03:53:57.083173 PCI: 00:1f.4 [8086/0000] bus ops
864 03:53:57.086223 PCI: 00:1f.4 [8086/02a3] enabled
865 03:53:57.089257 PCI: 00:1f.5 [8086/0000] bus ops
866 03:53:57.092996 PCI: 00:1f.5 [8086/02a4] enabled
867 03:53:57.096186 PCI: Leftover static devices:
868 03:53:57.096273 PCI: 00:05.0
869 03:53:57.099347 PCI: 00:12.5
870 03:53:57.099431 PCI: 00:12.6
871 03:53:57.102892 PCI: 00:14.1
872 03:53:57.102985 PCI: 00:14.5
873 03:53:57.103075 PCI: 00:15.2
874 03:53:57.105906 PCI: 00:15.3
875 03:53:57.105997 PCI: 00:16.1
876 03:53:57.109307 PCI: 00:16.2
877 03:53:57.109400 PCI: 00:16.3
878 03:53:57.112785 PCI: 00:16.4
879 03:53:57.112877 PCI: 00:16.5
880 03:53:57.112968 PCI: 00:19.1
881 03:53:57.115912 PCI: 00:19.2
882 03:53:57.116006 PCI: 00:1a.0
883 03:53:57.119399 PCI: 00:1c.0
884 03:53:57.119490 PCI: 00:1c.1
885 03:53:57.122313 PCI: 00:1c.2
886 03:53:57.122405 PCI: 00:1c.3
887 03:53:57.122496 PCI: 00:1c.4
888 03:53:57.125460 PCI: 00:1c.5
889 03:53:57.125552 PCI: 00:1c.6
890 03:53:57.129088 PCI: 00:1c.7
891 03:53:57.129181 PCI: 00:1d.1
892 03:53:57.129271 PCI: 00:1d.2
893 03:53:57.132435 PCI: 00:1d.3
894 03:53:57.132527 PCI: 00:1d.4
895 03:53:57.135730 PCI: 00:1d.5
896 03:53:57.135822 PCI: 00:1e.1
897 03:53:57.139391 PCI: 00:1f.1
898 03:53:57.139483 PCI: 00:1f.2
899 03:53:57.139573 PCI: 00:1f.6
900 03:53:57.141827 PCI: Check your devicetree.cb.
901 03:53:57.145348 PCI: 00:02.0 scanning...
902 03:53:57.148642 scan_generic_bus for PCI: 00:02.0
903 03:53:57.151750 scan_generic_bus for PCI: 00:02.0 done
904 03:53:57.158364 scan_bus: scanning of bus PCI: 00:02.0 took 10198 usecs
905 03:53:57.161648 PCI: 00:14.0 scanning...
906 03:53:57.165128 scan_static_bus for PCI: 00:14.0
907 03:53:57.168500 USB0 port 0 enabled
908 03:53:57.168589 USB0 port 0 scanning...
909 03:53:57.171375 scan_static_bus for USB0 port 0
910 03:53:57.174601 USB2 port 0 enabled
911 03:53:57.178286 USB2 port 1 enabled
912 03:53:57.178368 USB2 port 2 disabled
913 03:53:57.181383 USB2 port 3 disabled
914 03:53:57.184987 USB2 port 5 disabled
915 03:53:57.185076 USB2 port 6 enabled
916 03:53:57.187795 USB2 port 9 enabled
917 03:53:57.187877 USB3 port 0 enabled
918 03:53:57.191262 USB3 port 1 enabled
919 03:53:57.194421 USB3 port 2 enabled
920 03:53:57.194513 USB3 port 3 enabled
921 03:53:57.197608 USB3 port 4 disabled
922 03:53:57.200969 USB2 port 0 scanning...
923 03:53:57.204292 scan_static_bus for USB2 port 0
924 03:53:57.207951 scan_static_bus for USB2 port 0 done
925 03:53:57.214281 scan_bus: scanning of bus USB2 port 0 took 9698 usecs
926 03:53:57.214373 USB2 port 1 scanning...
927 03:53:57.217449 scan_static_bus for USB2 port 1
928 03:53:57.224079 scan_static_bus for USB2 port 1 done
929 03:53:57.226930 scan_bus: scanning of bus USB2 port 1 took 9700 usecs
930 03:53:57.230297 USB2 port 6 scanning...
931 03:53:57.233752 scan_static_bus for USB2 port 6
932 03:53:57.237122 scan_static_bus for USB2 port 6 done
933 03:53:57.243762 scan_bus: scanning of bus USB2 port 6 took 9701 usecs
934 03:53:57.243855 USB2 port 9 scanning...
935 03:53:57.247059 scan_static_bus for USB2 port 9
936 03:53:57.253804 scan_static_bus for USB2 port 9 done
937 03:53:57.257156 scan_bus: scanning of bus USB2 port 9 took 9701 usecs
938 03:53:57.260424 USB3 port 0 scanning...
939 03:53:57.263671 scan_static_bus for USB3 port 0
940 03:53:57.266700 scan_static_bus for USB3 port 0 done
941 03:53:57.273261 scan_bus: scanning of bus USB3 port 0 took 9711 usecs
942 03:53:57.276834 USB3 port 1 scanning...
943 03:53:57.279788 scan_static_bus for USB3 port 1
944 03:53:57.283172 scan_static_bus for USB3 port 1 done
945 03:53:57.286497 scan_bus: scanning of bus USB3 port 1 took 9703 usecs
946 03:53:57.289987 USB3 port 2 scanning...
947 03:53:57.293236 scan_static_bus for USB3 port 2
948 03:53:57.296552 scan_static_bus for USB3 port 2 done
949 03:53:57.302979 scan_bus: scanning of bus USB3 port 2 took 9711 usecs
950 03:53:57.306399 USB3 port 3 scanning...
951 03:53:57.309487 scan_static_bus for USB3 port 3
952 03:53:57.312815 scan_static_bus for USB3 port 3 done
953 03:53:57.319215 scan_bus: scanning of bus USB3 port 3 took 9707 usecs
954 03:53:57.322734 scan_static_bus for USB0 port 0 done
955 03:53:57.326211 scan_bus: scanning of bus USB0 port 0 took 155396 usecs
956 03:53:57.332067 scan_static_bus for PCI: 00:14.0 done
957 03:53:57.335586 scan_bus: scanning of bus PCI: 00:14.0 took 173017 usecs
958 03:53:57.338846 PCI: 00:15.0 scanning...
959 03:53:57.342162 scan_generic_bus for PCI: 00:15.0
960 03:53:57.345631 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
961 03:53:57.351756 scan_generic_bus for PCI: 00:15.0 done
962 03:53:57.355129 scan_bus: scanning of bus PCI: 00:15.0 took 14304 usecs
963 03:53:57.358390 PCI: 00:15.1 scanning...
964 03:53:57.361766 scan_generic_bus for PCI: 00:15.1
965 03:53:57.365216 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
966 03:53:57.371123 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
967 03:53:57.374503 scan_generic_bus for PCI: 00:15.1 done
968 03:53:57.381089 scan_bus: scanning of bus PCI: 00:15.1 took 18597 usecs
969 03:53:57.381176 PCI: 00:19.0 scanning...
970 03:53:57.387975 scan_generic_bus for PCI: 00:19.0
971 03:53:57.391451 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
972 03:53:57.394608 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
973 03:53:57.397904 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
974 03:53:57.404376 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
975 03:53:57.407789 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
976 03:53:57.410954 scan_generic_bus for PCI: 00:19.0 done
977 03:53:57.417396 scan_bus: scanning of bus PCI: 00:19.0 took 30754 usecs
978 03:53:57.417489 PCI: 00:1d.0 scanning...
979 03:53:57.424000 do_pci_scan_bridge for PCI: 00:1d.0
980 03:53:57.424091 PCI: pci_scan_bus for bus 01
981 03:53:57.430499 PCI: 01:00.0 [1c5c/1327] enabled
982 03:53:57.433801 Enabling Common Clock Configuration
983 03:53:57.437276 L1 Sub-State supported from root port 29
984 03:53:57.440741 L1 Sub-State Support = 0xf
985 03:53:57.444173 CommonModeRestoreTime = 0x28
986 03:53:57.446883 Power On Value = 0x16, Power On Scale = 0x0
987 03:53:57.450148 ASPM: Enabled L1
988 03:53:57.453391 scan_bus: scanning of bus PCI: 00:1d.0 took 32787 usecs
989 03:53:57.456971 PCI: 00:1e.2 scanning...
990 03:53:57.460385 scan_generic_bus for PCI: 00:1e.2
991 03:53:57.463485 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
992 03:53:57.470316 scan_generic_bus for PCI: 00:1e.2 done
993 03:53:57.473717 scan_bus: scanning of bus PCI: 00:1e.2 took 14011 usecs
994 03:53:57.476748 PCI: 00:1e.3 scanning...
995 03:53:57.479946 scan_generic_bus for PCI: 00:1e.3
996 03:53:57.483257 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
997 03:53:57.486854 scan_generic_bus for PCI: 00:1e.3 done
998 03:53:57.493456 scan_bus: scanning of bus PCI: 00:1e.3 took 13994 usecs
999 03:53:57.496308 PCI: 00:1f.0 scanning...
1000 03:53:57.499422 scan_static_bus for PCI: 00:1f.0
1001 03:53:57.503282 PNP: 0c09.0 enabled
1002 03:53:57.506344 scan_static_bus for PCI: 00:1f.0 done
1003 03:53:57.512395 scan_bus: scanning of bus PCI: 00:1f.0 took 12062 usecs
1004 03:53:57.512486 PCI: 00:1f.3 scanning...
1005 03:53:57.519769 scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs
1006 03:53:57.522531 PCI: 00:1f.4 scanning...
1007 03:53:57.525787 scan_generic_bus for PCI: 00:1f.4
1008 03:53:57.529127 scan_generic_bus for PCI: 00:1f.4 done
1009 03:53:57.535547 scan_bus: scanning of bus PCI: 00:1f.4 took 10184 usecs
1010 03:53:57.539080 PCI: 00:1f.5 scanning...
1011 03:53:57.542339 scan_generic_bus for PCI: 00:1f.5
1012 03:53:57.545533 scan_generic_bus for PCI: 00:1f.5 done
1013 03:53:57.551814 scan_bus: scanning of bus PCI: 00:1f.5 took 10199 usecs
1014 03:53:57.555177 scan_bus: scanning of bus DOMAIN: 0000 took 605206 usecs
1015 03:53:57.558690 scan_static_bus for Root Device done
1016 03:53:57.565323 scan_bus: scanning of bus Root Device took 625136 usecs
1017 03:53:57.565416 done
1018 03:53:57.568914 Chrome EC: UHEPI supported
1019 03:53:57.575657 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1020 03:53:57.582361 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1021 03:53:57.588280 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1022 03:53:57.595006 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1023 03:53:57.598734 SPI flash protection: WPSW=0 SRP0=1
1024 03:53:57.604795 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1025 03:53:57.608450 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1026 03:53:57.611575 found VGA at PCI: 00:02.0
1027 03:53:57.615019 Setting up VGA for PCI: 00:02.0
1028 03:53:57.621569 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1029 03:53:57.624829 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1030 03:53:57.628210 Allocating resources...
1031 03:53:57.628300 Reading resources...
1032 03:53:57.634578 Root Device read_resources bus 0 link: 0
1033 03:53:57.637879 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1034 03:53:57.643981 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1035 03:53:57.647276 DOMAIN: 0000 read_resources bus 0 link: 0
1036 03:53:57.654681 PCI: 00:14.0 read_resources bus 0 link: 0
1037 03:53:57.657391 USB0 port 0 read_resources bus 0 link: 0
1038 03:53:57.665682 USB0 port 0 read_resources bus 0 link: 0 done
1039 03:53:57.669030 PCI: 00:14.0 read_resources bus 0 link: 0 done
1040 03:53:57.677066 PCI: 00:15.0 read_resources bus 1 link: 0
1041 03:53:57.679722 PCI: 00:15.0 read_resources bus 1 link: 0 done
1042 03:53:57.686413 PCI: 00:15.1 read_resources bus 2 link: 0
1043 03:53:57.689777 PCI: 00:15.1 read_resources bus 2 link: 0 done
1044 03:53:57.697240 PCI: 00:19.0 read_resources bus 3 link: 0
1045 03:53:57.703687 PCI: 00:19.0 read_resources bus 3 link: 0 done
1046 03:53:57.707279 PCI: 00:1d.0 read_resources bus 1 link: 0
1047 03:53:57.713676 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1048 03:53:57.716949 PCI: 00:1e.2 read_resources bus 4 link: 0
1049 03:53:57.723286 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1050 03:53:57.726488 PCI: 00:1e.3 read_resources bus 5 link: 0
1051 03:53:57.733596 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1052 03:53:57.736872 PCI: 00:1f.0 read_resources bus 0 link: 0
1053 03:53:57.743509 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1054 03:53:57.750046 DOMAIN: 0000 read_resources bus 0 link: 0 done
1055 03:53:57.752901 Root Device read_resources bus 0 link: 0 done
1056 03:53:57.756271 Done reading resources.
1057 03:53:57.763091 Show resources in subtree (Root Device)...After reading.
1058 03:53:57.766539 Root Device child on link 0 CPU_CLUSTER: 0
1059 03:53:57.769361 CPU_CLUSTER: 0 child on link 0 APIC: 00
1060 03:53:57.772404 APIC: 00
1061 03:53:57.772493 APIC: 03
1062 03:53:57.775918 APIC: 01
1063 03:53:57.776008 APIC: 07
1064 03:53:57.776079 APIC: 02
1065 03:53:57.779090 APIC: 05
1066 03:53:57.779201 APIC: 06
1067 03:53:57.779287 APIC: 04
1068 03:53:57.785568 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1069 03:53:57.795343 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1070 03:53:57.849076 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1071 03:53:57.849236 PCI: 00:00.0
1072 03:53:57.850262 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1073 03:53:57.850554 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1074 03:53:57.851464 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1075 03:53:57.852204 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1076 03:53:57.854992 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1077 03:53:57.861788 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1078 03:53:57.871158 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1079 03:53:57.881233 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1080 03:53:57.891092 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1081 03:53:57.897778 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1082 03:53:57.907201 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1083 03:53:57.917394 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1084 03:53:57.927453 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1085 03:53:57.937030 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1086 03:53:57.946881 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1087 03:53:57.956439 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1088 03:53:57.956542 PCI: 00:02.0
1089 03:53:57.966186 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1090 03:53:57.979504 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1091 03:53:57.985663 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1092 03:53:57.989312 PCI: 00:04.0
1093 03:53:57.989402 PCI: 00:08.0
1094 03:53:57.999091 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1095 03:53:58.002326 PCI: 00:12.0
1096 03:53:58.012173 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1097 03:53:58.015862 PCI: 00:14.0 child on link 0 USB0 port 0
1098 03:53:58.025449 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1099 03:53:58.031444 USB0 port 0 child on link 0 USB2 port 0
1100 03:53:58.031538 USB2 port 0
1101 03:53:58.034625 USB2 port 1
1102 03:53:58.034718 USB2 port 2
1103 03:53:58.038431 USB2 port 3
1104 03:53:58.038524 USB2 port 5
1105 03:53:58.041117 USB2 port 6
1106 03:53:58.041207 USB2 port 9
1107 03:53:58.044362 USB3 port 0
1108 03:53:58.044453 USB3 port 1
1109 03:53:58.047659 USB3 port 2
1110 03:53:58.047740 USB3 port 3
1111 03:53:58.051190 USB3 port 4
1112 03:53:58.054568 PCI: 00:14.2
1113 03:53:58.064599 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1114 03:53:58.073900 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1115 03:53:58.073988 PCI: 00:14.3
1116 03:53:58.083742 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1117 03:53:58.086987 PCI: 00:15.0 child on link 0 I2C: 01:15
1118 03:53:58.097082 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1119 03:53:58.100484 I2C: 01:15
1120 03:53:58.103864 PCI: 00:15.1 child on link 0 I2C: 02:5d
1121 03:53:58.113531 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1122 03:53:58.116143 I2C: 02:5d
1123 03:53:58.116235 GENERIC: 0.0
1124 03:53:58.120124 PCI: 00:16.0
1125 03:53:58.129511 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1126 03:53:58.129602 PCI: 00:17.0
1127 03:53:58.139343 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1128 03:53:58.149284 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1129 03:53:58.155387 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1130 03:53:58.165531 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1131 03:53:58.172081 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1132 03:53:58.182179 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1133 03:53:58.188825 PCI: 00:19.0 child on link 0 I2C: 03:1a
1134 03:53:58.198081 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1135 03:53:58.198171 I2C: 03:1a
1136 03:53:58.201887 I2C: 03:38
1137 03:53:58.201982 I2C: 03:39
1138 03:53:58.202080 I2C: 03:3a
1139 03:53:58.204894 I2C: 03:3b
1140 03:53:58.207877 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1141 03:53:58.218463 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1142 03:53:58.228179 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1143 03:53:58.237378 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1144 03:53:58.237466 PCI: 01:00.0
1145 03:53:58.247445 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1146 03:53:58.251057 PCI: 00:1e.0
1147 03:53:58.260438 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1148 03:53:58.270604 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1149 03:53:58.273918 PCI: 00:1e.2 child on link 0 SPI: 00
1150 03:53:58.286763 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1151 03:53:58.286859 SPI: 00
1152 03:53:58.290165 PCI: 00:1e.3 child on link 0 SPI: 01
1153 03:53:58.299714 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 03:53:58.303145 SPI: 01
1155 03:53:58.306404 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1156 03:53:58.316240 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1157 03:53:58.322701 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1158 03:53:58.325992 PNP: 0c09.0
1159 03:53:58.332520 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1160 03:53:58.335863 PCI: 00:1f.3
1161 03:53:58.345702 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1162 03:53:58.355605 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1163 03:53:58.359102 PCI: 00:1f.4
1164 03:53:58.365035 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1165 03:53:58.375319 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1166 03:53:58.378454 PCI: 00:1f.5
1167 03:53:58.388464 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1168 03:53:58.394682 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1169 03:53:58.401699 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1170 03:53:58.407905 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1171 03:53:58.411303 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1172 03:53:58.414473 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1173 03:53:58.417773 PCI: 00:17.0 18 * [0x60 - 0x67] io
1174 03:53:58.421325 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1175 03:53:58.427317 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1176 03:53:58.433737 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1177 03:53:58.443608 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1178 03:53:58.450179 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1179 03:53:58.457185 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1180 03:53:58.459866 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1181 03:53:58.469611 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1182 03:53:58.473286 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1183 03:53:58.479932 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1184 03:53:58.483200 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1185 03:53:58.489933 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1186 03:53:58.492315 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1187 03:53:58.498989 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1188 03:53:58.502576 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1189 03:53:58.508851 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1190 03:53:58.512340 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1191 03:53:58.518893 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1192 03:53:58.521989 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1193 03:53:58.528581 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1194 03:53:58.532014 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1195 03:53:58.538778 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1196 03:53:58.541404 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1197 03:53:58.548186 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1198 03:53:58.551268 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1199 03:53:58.554630 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1200 03:53:58.561564 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1201 03:53:58.564913 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1202 03:53:58.570952 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1203 03:53:58.574249 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1204 03:53:58.580653 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1205 03:53:58.591028 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1206 03:53:58.594369 avoid_fixed_resources: DOMAIN: 0000
1207 03:53:58.597183 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1208 03:53:58.603703 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1209 03:53:58.613581 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1210 03:53:58.620391 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1211 03:53:58.626762 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1212 03:53:58.636736 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1213 03:53:58.643338 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1214 03:53:58.649906 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1215 03:53:58.659483 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1216 03:53:58.666376 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1217 03:53:58.672983 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1218 03:53:58.679219 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1219 03:53:58.682405 Setting resources...
1220 03:53:58.689251 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1221 03:53:58.692642 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1222 03:53:58.695887 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1223 03:53:58.702034 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1224 03:53:58.705109 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1225 03:53:58.711725 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1226 03:53:58.718400 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1227 03:53:58.724782 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1228 03:53:58.731741 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1229 03:53:58.737892 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1230 03:53:58.741215 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1231 03:53:58.747652 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1232 03:53:58.751245 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1233 03:53:58.757832 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1234 03:53:58.760906 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1235 03:53:58.767721 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1236 03:53:58.771450 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1237 03:53:58.774012 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1238 03:53:58.780718 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1239 03:53:58.784066 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1240 03:53:58.790204 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1241 03:53:58.793479 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1242 03:53:58.800099 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1243 03:53:58.803430 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1244 03:53:58.810113 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1245 03:53:58.813583 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1246 03:53:58.819928 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1247 03:53:58.823412 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1248 03:53:58.830242 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1249 03:53:58.832785 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1250 03:53:58.839197 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1251 03:53:58.842717 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1252 03:53:58.852892 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1253 03:53:58.859304 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1254 03:53:58.866147 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1255 03:53:58.872018 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1256 03:53:58.878919 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1257 03:53:58.885683 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1258 03:53:58.888749 Root Device assign_resources, bus 0 link: 0
1259 03:53:58.895299 DOMAIN: 0000 assign_resources, bus 0 link: 0
1260 03:53:58.901994 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1261 03:53:58.911415 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1262 03:53:58.918030 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1263 03:53:58.928267 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1264 03:53:58.934671 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1265 03:53:58.944986 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1266 03:53:58.947631 PCI: 00:14.0 assign_resources, bus 0 link: 0
1267 03:53:58.954523 PCI: 00:14.0 assign_resources, bus 0 link: 0
1268 03:53:58.961103 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1269 03:53:58.970839 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1270 03:53:58.977649 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1271 03:53:58.987080 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1272 03:53:58.990672 PCI: 00:15.0 assign_resources, bus 1 link: 0
1273 03:53:58.997151 PCI: 00:15.0 assign_resources, bus 1 link: 0
1274 03:53:59.003612 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1275 03:53:59.006930 PCI: 00:15.1 assign_resources, bus 2 link: 0
1276 03:53:59.013569 PCI: 00:15.1 assign_resources, bus 2 link: 0
1277 03:53:59.020363 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1278 03:53:59.030059 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1279 03:53:59.036702 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1280 03:53:59.046046 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1281 03:53:59.053020 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1282 03:53:59.059275 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1283 03:53:59.068973 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1284 03:53:59.076097 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1285 03:53:59.082207 PCI: 00:19.0 assign_resources, bus 3 link: 0
1286 03:53:59.085269 PCI: 00:19.0 assign_resources, bus 3 link: 0
1287 03:53:59.095877 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1288 03:53:59.101896 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1289 03:53:59.112139 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1290 03:53:59.114771 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1291 03:53:59.124411 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1292 03:53:59.127995 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1293 03:53:59.137676 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1294 03:53:59.144542 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1295 03:53:59.150890 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1296 03:53:59.153891 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1297 03:53:59.164017 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1298 03:53:59.167050 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1299 03:53:59.173603 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1300 03:53:59.176904 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1301 03:53:59.184017 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1302 03:53:59.187001 LPC: Trying to open IO window from 800 size 1ff
1303 03:53:59.196984 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1304 03:53:59.202943 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1305 03:53:59.213052 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1306 03:53:59.219666 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1307 03:53:59.226391 DOMAIN: 0000 assign_resources, bus 0 link: 0
1308 03:53:59.229344 Root Device assign_resources, bus 0 link: 0
1309 03:53:59.232560 Done setting resources.
1310 03:53:59.238882 Show resources in subtree (Root Device)...After assigning values.
1311 03:53:59.242447 Root Device child on link 0 CPU_CLUSTER: 0
1312 03:53:59.246232 CPU_CLUSTER: 0 child on link 0 APIC: 00
1313 03:53:59.249215 APIC: 00
1314 03:53:59.249294 APIC: 03
1315 03:53:59.252495 APIC: 01
1316 03:53:59.252574 APIC: 07
1317 03:53:59.252641 APIC: 02
1318 03:53:59.255209 APIC: 05
1319 03:53:59.255287 APIC: 06
1320 03:53:59.258661 APIC: 04
1321 03:53:59.262487 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1322 03:53:59.271753 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1323 03:53:59.281406 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1324 03:53:59.284683 PCI: 00:00.0
1325 03:53:59.294758 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1326 03:53:59.301630 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1327 03:53:59.311653 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1328 03:53:59.321352 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1329 03:53:59.331693 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1330 03:53:59.340659 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1331 03:53:59.350506 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1332 03:53:59.360319 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1333 03:53:59.367044 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1334 03:53:59.377142 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1335 03:53:59.387095 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1336 03:53:59.396513 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1337 03:53:59.406460 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1338 03:53:59.415983 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1339 03:53:59.425985 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1340 03:53:59.432470 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1341 03:53:59.435705 PCI: 00:02.0
1342 03:53:59.446110 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1343 03:53:59.455582 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1344 03:53:59.465426 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1345 03:53:59.468691 PCI: 00:04.0
1346 03:53:59.468866 PCI: 00:08.0
1347 03:53:59.477976 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1348 03:53:59.481530 PCI: 00:12.0
1349 03:53:59.491688 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1350 03:53:59.494912 PCI: 00:14.0 child on link 0 USB0 port 0
1351 03:53:59.507647 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1352 03:53:59.510962 USB0 port 0 child on link 0 USB2 port 0
1353 03:53:59.511070 USB2 port 0
1354 03:53:59.514459 USB2 port 1
1355 03:53:59.517737 USB2 port 2
1356 03:53:59.517830 USB2 port 3
1357 03:53:59.520991 USB2 port 5
1358 03:53:59.521082 USB2 port 6
1359 03:53:59.524370 USB2 port 9
1360 03:53:59.524461 USB3 port 0
1361 03:53:59.527672 USB3 port 1
1362 03:53:59.527758 USB3 port 2
1363 03:53:59.531098 USB3 port 3
1364 03:53:59.531197 USB3 port 4
1365 03:53:59.534335 PCI: 00:14.2
1366 03:53:59.543748 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1367 03:53:59.553643 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1368 03:53:59.557046 PCI: 00:14.3
1369 03:53:59.566936 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1370 03:53:59.570245 PCI: 00:15.0 child on link 0 I2C: 01:15
1371 03:53:59.580306 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1372 03:53:59.583301 I2C: 01:15
1373 03:53:59.586291 PCI: 00:15.1 child on link 0 I2C: 02:5d
1374 03:53:59.596483 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1375 03:53:59.599751 I2C: 02:5d
1376 03:53:59.599846 GENERIC: 0.0
1377 03:53:59.603246 PCI: 00:16.0
1378 03:53:59.612485 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1379 03:53:59.612605 PCI: 00:17.0
1380 03:53:59.625647 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1381 03:53:59.635614 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1382 03:53:59.642470 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1383 03:53:59.652181 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1384 03:53:59.661446 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1385 03:53:59.671310 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1386 03:53:59.674846 PCI: 00:19.0 child on link 0 I2C: 03:1a
1387 03:53:59.688407 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1388 03:53:59.688541 I2C: 03:1a
1389 03:53:59.688617 I2C: 03:38
1390 03:53:59.691657 I2C: 03:39
1391 03:53:59.691749 I2C: 03:3a
1392 03:53:59.694471 I2C: 03:3b
1393 03:53:59.697639 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1394 03:53:59.707425 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1395 03:53:59.717409 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1396 03:53:59.727344 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1397 03:53:59.730180 PCI: 01:00.0
1398 03:53:59.740221 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1399 03:53:59.743569 PCI: 00:1e.0
1400 03:53:59.753518 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1401 03:53:59.763656 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1402 03:53:59.766263 PCI: 00:1e.2 child on link 0 SPI: 00
1403 03:53:59.776188 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1404 03:53:59.779452 SPI: 00
1405 03:53:59.782738 PCI: 00:1e.3 child on link 0 SPI: 01
1406 03:53:59.792829 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1407 03:53:59.795435 SPI: 01
1408 03:53:59.798900 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1409 03:53:59.808870 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1410 03:53:59.815445 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1411 03:53:59.818811 PNP: 0c09.0
1412 03:53:59.828558 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1413 03:53:59.828650 PCI: 00:1f.3
1414 03:53:59.838339 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1415 03:53:59.848288 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1416 03:53:59.852288 PCI: 00:1f.4
1417 03:53:59.861611 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1418 03:53:59.870959 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1419 03:53:59.871059 PCI: 00:1f.5
1420 03:53:59.880947 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1421 03:53:59.884197 Done allocating resources.
1422 03:53:59.890919 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1423 03:53:59.894360 Enabling resources...
1424 03:53:59.897022 PCI: 00:00.0 subsystem <- 8086/9b61
1425 03:53:59.900323 PCI: 00:00.0 cmd <- 06
1426 03:53:59.903611 PCI: 00:02.0 subsystem <- 8086/9b41
1427 03:53:59.906944 PCI: 00:02.0 cmd <- 03
1428 03:53:59.910439 PCI: 00:08.0 cmd <- 06
1429 03:53:59.913698 PCI: 00:12.0 subsystem <- 8086/02f9
1430 03:53:59.917011 PCI: 00:12.0 cmd <- 02
1431 03:53:59.919730 PCI: 00:14.0 subsystem <- 8086/02ed
1432 03:53:59.919835 PCI: 00:14.0 cmd <- 02
1433 03:53:59.923684 PCI: 00:14.2 cmd <- 02
1434 03:53:59.927288 PCI: 00:14.3 subsystem <- 8086/02f0
1435 03:53:59.930367 PCI: 00:14.3 cmd <- 02
1436 03:53:59.933543 PCI: 00:15.0 subsystem <- 8086/02e8
1437 03:53:59.936369 PCI: 00:15.0 cmd <- 02
1438 03:53:59.939565 PCI: 00:15.1 subsystem <- 8086/02e9
1439 03:53:59.942995 PCI: 00:15.1 cmd <- 02
1440 03:53:59.946752 PCI: 00:16.0 subsystem <- 8086/02e0
1441 03:53:59.949271 PCI: 00:16.0 cmd <- 02
1442 03:53:59.952721 PCI: 00:17.0 subsystem <- 8086/02d3
1443 03:53:59.956064 PCI: 00:17.0 cmd <- 03
1444 03:53:59.959326 PCI: 00:19.0 subsystem <- 8086/02c5
1445 03:53:59.962768 PCI: 00:19.0 cmd <- 02
1446 03:53:59.966175 PCI: 00:1d.0 bridge ctrl <- 0013
1447 03:53:59.969739 PCI: 00:1d.0 subsystem <- 8086/02b0
1448 03:53:59.972948 PCI: 00:1d.0 cmd <- 06
1449 03:53:59.976026 PCI: 00:1e.0 subsystem <- 8086/02a8
1450 03:53:59.979314 PCI: 00:1e.0 cmd <- 06
1451 03:53:59.982021 PCI: 00:1e.2 subsystem <- 8086/02aa
1452 03:53:59.982132 PCI: 00:1e.2 cmd <- 06
1453 03:53:59.989186 PCI: 00:1e.3 subsystem <- 8086/02ab
1454 03:53:59.989296 PCI: 00:1e.3 cmd <- 02
1455 03:53:59.995439 PCI: 00:1f.0 subsystem <- 8086/0284
1456 03:53:59.995531 PCI: 00:1f.0 cmd <- 407
1457 03:53:59.998710 PCI: 00:1f.3 subsystem <- 8086/02c8
1458 03:54:00.002133 PCI: 00:1f.3 cmd <- 02
1459 03:54:00.005413 PCI: 00:1f.4 subsystem <- 8086/02a3
1460 03:54:00.008666 PCI: 00:1f.4 cmd <- 03
1461 03:54:00.012124 PCI: 00:1f.5 subsystem <- 8086/02a4
1462 03:54:00.014968 PCI: 00:1f.5 cmd <- 406
1463 03:54:00.024095 PCI: 01:00.0 cmd <- 02
1464 03:54:00.029494 done.
1465 03:54:00.042122 ME: Version: 14.0.39.1367
1466 03:54:00.048495 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1467 03:54:00.051650 Initializing devices...
1468 03:54:00.051777 Root Device init ...
1469 03:54:00.058428 Chrome EC: Set SMI mask to 0x0000000000000000
1470 03:54:00.064919 Chrome EC: clear events_b mask to 0x0000000000000000
1471 03:54:00.067798 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1472 03:54:00.074303 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1473 03:54:00.080813 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1474 03:54:00.084369 Chrome EC: Set WAKE mask to 0x0000000000000000
1475 03:54:00.090567 Root Device init finished in 35179 usecs
1476 03:54:00.093948 CPU_CLUSTER: 0 init ...
1477 03:54:00.097565 CPU_CLUSTER: 0 init finished in 2448 usecs
1478 03:54:00.102645 PCI: 00:00.0 init ...
1479 03:54:00.105972 CPU TDP: 15 Watts
1480 03:54:00.109076 CPU PL2 = 64 Watts
1481 03:54:00.112282 PCI: 00:00.0 init finished in 7079 usecs
1482 03:54:00.115585 PCI: 00:02.0 init ...
1483 03:54:00.119109 PCI: 00:02.0 init finished in 2244 usecs
1484 03:54:00.122514 PCI: 00:08.0 init ...
1485 03:54:00.125973 PCI: 00:08.0 init finished in 2251 usecs
1486 03:54:00.128394 PCI: 00:12.0 init ...
1487 03:54:00.131734 PCI: 00:12.0 init finished in 2251 usecs
1488 03:54:00.135396 PCI: 00:14.0 init ...
1489 03:54:00.138297 PCI: 00:14.0 init finished in 2251 usecs
1490 03:54:00.141573 PCI: 00:14.2 init ...
1491 03:54:00.144973 PCI: 00:14.2 init finished in 2250 usecs
1492 03:54:00.148231 PCI: 00:14.3 init ...
1493 03:54:00.151449 PCI: 00:14.3 init finished in 2269 usecs
1494 03:54:00.154828 PCI: 00:15.0 init ...
1495 03:54:00.158311 DW I2C bus 0 at 0xd121f000 (400 KHz)
1496 03:54:00.164545 PCI: 00:15.0 init finished in 5972 usecs
1497 03:54:00.164663 PCI: 00:15.1 init ...
1498 03:54:00.171122 DW I2C bus 1 at 0xd1220000 (400 KHz)
1499 03:54:00.174396 PCI: 00:15.1 init finished in 5975 usecs
1500 03:54:00.177739 PCI: 00:16.0 init ...
1501 03:54:00.181272 PCI: 00:16.0 init finished in 2252 usecs
1502 03:54:00.184528 PCI: 00:19.0 init ...
1503 03:54:00.187789 DW I2C bus 4 at 0xd1222000 (400 KHz)
1504 03:54:00.190974 PCI: 00:19.0 init finished in 5974 usecs
1505 03:54:00.194300 PCI: 00:1d.0 init ...
1506 03:54:00.197717 Initializing PCH PCIe bridge.
1507 03:54:00.200423 PCI: 00:1d.0 init finished in 5283 usecs
1508 03:54:00.204338 PCI: 00:1f.0 init ...
1509 03:54:00.207702 IOAPIC: Initializing IOAPIC at 0xfec00000
1510 03:54:00.214378 IOAPIC: Bootstrap Processor Local APIC = 0x00
1511 03:54:00.214495 IOAPIC: ID = 0x02
1512 03:54:00.217780 IOAPIC: Dumping registers
1513 03:54:00.220960 reg 0x0000: 0x02000000
1514 03:54:00.223847 reg 0x0001: 0x00770020
1515 03:54:00.227239 reg 0x0002: 0x00000000
1516 03:54:00.230978 PCI: 00:1f.0 init finished in 23529 usecs
1517 03:54:00.233667 PCI: 00:1f.4 init ...
1518 03:54:00.237029 PCI: 00:1f.4 init finished in 2263 usecs
1519 03:54:00.248948 PCI: 01:00.0 init ...
1520 03:54:00.251559 PCI: 01:00.0 init finished in 2251 usecs
1521 03:54:00.256266 PNP: 0c09.0 init ...
1522 03:54:00.259519 Google Chrome EC uptime: 11.093 seconds
1523 03:54:00.265973 Google Chrome AP resets since EC boot: 0
1524 03:54:00.269393 Google Chrome most recent AP reset causes:
1525 03:54:00.275982 Google Chrome EC reset flags at last EC boot: reset-pin
1526 03:54:00.278815 PNP: 0c09.0 init finished in 20543 usecs
1527 03:54:00.282182 Devices initialized
1528 03:54:00.285212 Show all devs... After init.
1529 03:54:00.285297 Root Device: enabled 1
1530 03:54:00.288632 CPU_CLUSTER: 0: enabled 1
1531 03:54:00.292012 DOMAIN: 0000: enabled 1
1532 03:54:00.295282 APIC: 00: enabled 1
1533 03:54:00.295373 PCI: 00:00.0: enabled 1
1534 03:54:00.298881 PCI: 00:02.0: enabled 1
1535 03:54:00.302388 PCI: 00:04.0: enabled 0
1536 03:54:00.302477 PCI: 00:05.0: enabled 0
1537 03:54:00.304921 PCI: 00:12.0: enabled 1
1538 03:54:00.308326 PCI: 00:12.5: enabled 0
1539 03:54:00.311675 PCI: 00:12.6: enabled 0
1540 03:54:00.311765 PCI: 00:14.0: enabled 1
1541 03:54:00.315098 PCI: 00:14.1: enabled 0
1542 03:54:00.318332 PCI: 00:14.3: enabled 1
1543 03:54:00.321715 PCI: 00:14.5: enabled 0
1544 03:54:00.321802 PCI: 00:15.0: enabled 1
1545 03:54:00.325036 PCI: 00:15.1: enabled 1
1546 03:54:00.327807 PCI: 00:15.2: enabled 0
1547 03:54:00.331165 PCI: 00:15.3: enabled 0
1548 03:54:00.331254 PCI: 00:16.0: enabled 1
1549 03:54:00.334488 PCI: 00:16.1: enabled 0
1550 03:54:00.337780 PCI: 00:16.2: enabled 0
1551 03:54:00.341172 PCI: 00:16.3: enabled 0
1552 03:54:00.341262 PCI: 00:16.4: enabled 0
1553 03:54:00.344607 PCI: 00:16.5: enabled 0
1554 03:54:00.347696 PCI: 00:17.0: enabled 1
1555 03:54:00.350919 PCI: 00:19.0: enabled 1
1556 03:54:00.351011 PCI: 00:19.1: enabled 0
1557 03:54:00.354036 PCI: 00:19.2: enabled 0
1558 03:54:00.357530 PCI: 00:1a.0: enabled 0
1559 03:54:00.360668 PCI: 00:1c.0: enabled 0
1560 03:54:00.360769 PCI: 00:1c.1: enabled 0
1561 03:54:00.364254 PCI: 00:1c.2: enabled 0
1562 03:54:00.367539 PCI: 00:1c.3: enabled 0
1563 03:54:00.370520 PCI: 00:1c.4: enabled 0
1564 03:54:00.370623 PCI: 00:1c.5: enabled 0
1565 03:54:00.373830 PCI: 00:1c.6: enabled 0
1566 03:54:00.376724 PCI: 00:1c.7: enabled 0
1567 03:54:00.380786 PCI: 00:1d.0: enabled 1
1568 03:54:00.380876 PCI: 00:1d.1: enabled 0
1569 03:54:00.384037 PCI: 00:1d.2: enabled 0
1570 03:54:00.387529 PCI: 00:1d.3: enabled 0
1571 03:54:00.390088 PCI: 00:1d.4: enabled 0
1572 03:54:00.390217 PCI: 00:1d.5: enabled 0
1573 03:54:00.393313 PCI: 00:1e.0: enabled 1
1574 03:54:00.396929 PCI: 00:1e.1: enabled 0
1575 03:54:00.397020 PCI: 00:1e.2: enabled 1
1576 03:54:00.400195 PCI: 00:1e.3: enabled 1
1577 03:54:00.403681 PCI: 00:1f.0: enabled 1
1578 03:54:00.406741 PCI: 00:1f.1: enabled 0
1579 03:54:00.406858 PCI: 00:1f.2: enabled 0
1580 03:54:00.409381 PCI: 00:1f.3: enabled 1
1581 03:54:00.412752 PCI: 00:1f.4: enabled 1
1582 03:54:00.416066 PCI: 00:1f.5: enabled 1
1583 03:54:00.416154 PCI: 00:1f.6: enabled 0
1584 03:54:00.419459 USB0 port 0: enabled 1
1585 03:54:00.422661 I2C: 01:15: enabled 1
1586 03:54:00.422750 I2C: 02:5d: enabled 1
1587 03:54:00.425970 GENERIC: 0.0: enabled 1
1588 03:54:00.429434 I2C: 03:1a: enabled 1
1589 03:54:00.432860 I2C: 03:38: enabled 1
1590 03:54:00.432947 I2C: 03:39: enabled 1
1591 03:54:00.436286 I2C: 03:3a: enabled 1
1592 03:54:00.439743 I2C: 03:3b: enabled 1
1593 03:54:00.439831 PCI: 00:00.0: enabled 1
1594 03:54:00.442852 SPI: 00: enabled 1
1595 03:54:00.446102 SPI: 01: enabled 1
1596 03:54:00.446191 PNP: 0c09.0: enabled 1
1597 03:54:00.448851 USB2 port 0: enabled 1
1598 03:54:00.452092 USB2 port 1: enabled 1
1599 03:54:00.452184 USB2 port 2: enabled 0
1600 03:54:00.455325 USB2 port 3: enabled 0
1601 03:54:00.459319 USB2 port 5: enabled 0
1602 03:54:00.461923 USB2 port 6: enabled 1
1603 03:54:00.462025 USB2 port 9: enabled 1
1604 03:54:00.465310 USB3 port 0: enabled 1
1605 03:54:00.468725 USB3 port 1: enabled 1
1606 03:54:00.468817 USB3 port 2: enabled 1
1607 03:54:00.471961 USB3 port 3: enabled 1
1608 03:54:00.475340 USB3 port 4: enabled 0
1609 03:54:00.475430 APIC: 03: enabled 1
1610 03:54:00.478635 APIC: 01: enabled 1
1611 03:54:00.481966 APIC: 07: enabled 1
1612 03:54:00.482058 APIC: 02: enabled 1
1613 03:54:00.485224 APIC: 05: enabled 1
1614 03:54:00.488463 APIC: 06: enabled 1
1615 03:54:00.488553 APIC: 04: enabled 1
1616 03:54:00.491889 PCI: 00:08.0: enabled 1
1617 03:54:00.495230 PCI: 00:14.2: enabled 1
1618 03:54:00.495335 PCI: 01:00.0: enabled 1
1619 03:54:00.499531 Disabling ACPI via APMC:
1620 03:54:00.503637 done.
1621 03:54:00.506864 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1622 03:54:00.510316 ELOG: NV offset 0xaf0000 size 0x4000
1623 03:54:00.517743 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1624 03:54:00.523949 ELOG: Event(17) added with size 13 at 2023-02-26 03:54:00 UTC
1625 03:54:00.530519 POST: Unexpected post code in previous boot: 0x73
1626 03:54:00.537549 ELOG: Event(A3) added with size 11 at 2023-02-26 03:54:00 UTC
1627 03:54:00.544191 ELOG: Event(A6) added with size 13 at 2023-02-26 03:54:00 UTC
1628 03:54:00.549964 ELOG: Event(92) added with size 9 at 2023-02-26 03:54:00 UTC
1629 03:54:00.556904 ELOG: Event(93) added with size 9 at 2023-02-26 03:54:00 UTC
1630 03:54:00.563685 ELOG: Event(9A) added with size 9 at 2023-02-26 03:54:00 UTC
1631 03:54:00.566835 ELOG: Event(9E) added with size 10 at 2023-02-26 03:54:00 UTC
1632 03:54:00.573390 ELOG: Event(9F) added with size 14 at 2023-02-26 03:54:00 UTC
1633 03:54:00.580060 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1634 03:54:00.586139 ELOG: Event(A1) added with size 10 at 2023-02-26 03:54:00 UTC
1635 03:54:00.592797 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1636 03:54:00.599414 ELOG: Event(A0) added with size 9 at 2023-02-26 03:54:00 UTC
1637 03:54:00.605966 elog_add_boot_reason: Logged dev mode boot
1638 03:54:00.606123 Finalize devices...
1639 03:54:00.609707 PCI: 00:17.0 final
1640 03:54:00.609844 Devices finalized
1641 03:54:00.616227 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1642 03:54:00.622780 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1643 03:54:00.626016 ME: HFSTS1 : 0x90000245
1644 03:54:00.629367 ME: HFSTS2 : 0x3B850126
1645 03:54:00.632683 ME: HFSTS3 : 0x00000020
1646 03:54:00.639506 ME: HFSTS4 : 0x00004800
1647 03:54:00.641946 ME: HFSTS5 : 0x00000000
1648 03:54:00.646252 ME: HFSTS6 : 0x40400006
1649 03:54:00.649197 ME: Manufacturing Mode : NO
1650 03:54:00.652390 ME: FW Partition Table : OK
1651 03:54:00.655609 ME: Bringup Loader Failure : NO
1652 03:54:00.658512 ME: Firmware Init Complete : YES
1653 03:54:00.661720 ME: Boot Options Present : NO
1654 03:54:00.665433 ME: Update In Progress : NO
1655 03:54:00.668546 ME: D0i3 Support : YES
1656 03:54:00.671842 ME: Low Power State Enabled : NO
1657 03:54:00.675000 ME: CPU Replaced : NO
1658 03:54:00.678347 ME: CPU Replacement Valid : YES
1659 03:54:00.681949 ME: Current Working State : 5
1660 03:54:00.685209 ME: Current Operation State : 1
1661 03:54:00.688465 ME: Current Operation Mode : 0
1662 03:54:00.691661 ME: Error Code : 0
1663 03:54:00.695062 ME: CPU Debug Disabled : YES
1664 03:54:00.697913 ME: TXT Support : NO
1665 03:54:00.704313 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1666 03:54:00.711170 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1667 03:54:00.711269 CBFS @ c08000 size 3f8000
1668 03:54:00.717876 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1669 03:54:00.721285 CBFS: Locating 'fallback/dsdt.aml'
1670 03:54:00.723920 CBFS: Found @ offset 10bb80 size 3fa5
1671 03:54:00.730758 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1672 03:54:00.734027 CBFS @ c08000 size 3f8000
1673 03:54:00.740711 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1674 03:54:00.740830 CBFS: Locating 'fallback/slic'
1675 03:54:00.749542 CBFS: 'fallback/slic' not found.
1676 03:54:00.752503 ACPI: Writing ACPI tables at 99b3e000.
1677 03:54:00.752620 ACPI: * FACS
1678 03:54:00.755815 ACPI: * DSDT
1679 03:54:00.759035 Ramoops buffer: 0x100000@0x99a3d000.
1680 03:54:00.762384 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1681 03:54:00.769063 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1682 03:54:00.772381 Google Chrome EC: version:
1683 03:54:00.775864 ro: helios_v2.0.2659-56403530b
1684 03:54:00.778912 rw: helios_v2.0.2849-c41de27e7d
1685 03:54:00.779032 running image: 1
1686 03:54:00.782946 ACPI: * FADT
1687 03:54:00.783066 SCI is IRQ9
1688 03:54:00.789749 ACPI: added table 1/32, length now 40
1689 03:54:00.789879 ACPI: * SSDT
1690 03:54:00.792825 Found 1 CPU(s) with 8 core(s) each.
1691 03:54:00.795953 Error: Could not locate 'wifi_sar' in VPD.
1692 03:54:00.802768 Checking CBFS for default SAR values
1693 03:54:00.806321 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1694 03:54:00.809554 CBFS @ c08000 size 3f8000
1695 03:54:00.815647 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1696 03:54:00.819054 CBFS: Locating 'wifi_sar_defaults.hex'
1697 03:54:00.822520 CBFS: Found @ offset 5fac0 size 77
1698 03:54:00.825449 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1699 03:54:00.832621 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1700 03:54:00.835266 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1701 03:54:00.842030 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1702 03:54:00.845552 failed to find key in VPD: dsm_calib_r0_0
1703 03:54:00.855347 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1704 03:54:00.858677 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1705 03:54:00.865066 failed to find key in VPD: dsm_calib_r0_1
1706 03:54:00.871722 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1707 03:54:00.877820 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1708 03:54:00.881329 failed to find key in VPD: dsm_calib_r0_2
1709 03:54:00.891278 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1710 03:54:00.898022 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1711 03:54:00.900768 failed to find key in VPD: dsm_calib_r0_3
1712 03:54:00.911086 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1713 03:54:00.914116 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1714 03:54:00.920628 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1715 03:54:00.924036 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1716 03:54:00.928179 EC returned error result code 1
1717 03:54:00.931467 EC returned error result code 1
1718 03:54:00.934279 EC returned error result code 1
1719 03:54:00.937460 PS2K: Bad resp from EC. Vivaldi disabled!
1720 03:54:00.944179 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1721 03:54:00.951015 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1722 03:54:00.954176 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1723 03:54:00.960954 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1724 03:54:00.967171 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1725 03:54:00.973769 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1726 03:54:00.976860 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1727 03:54:00.983814 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1728 03:54:00.987001 ACPI: added table 2/32, length now 44
1729 03:54:00.990164 ACPI: * MCFG
1730 03:54:00.993487 ACPI: added table 3/32, length now 48
1731 03:54:00.996662 ACPI: * TPM2
1732 03:54:00.996758 TPM2 log created at 99a2d000
1733 03:54:01.003496 ACPI: added table 4/32, length now 52
1734 03:54:01.003588 ACPI: * MADT
1735 03:54:01.006279 SCI is IRQ9
1736 03:54:01.010027 ACPI: added table 5/32, length now 56
1737 03:54:01.010128 current = 99b43ac0
1738 03:54:01.012857 ACPI: * DMAR
1739 03:54:01.016180 ACPI: added table 6/32, length now 60
1740 03:54:01.019477 ACPI: * IGD OpRegion
1741 03:54:01.019568 GMA: Found VBT in CBFS
1742 03:54:01.022788 GMA: Found valid VBT in CBFS
1743 03:54:01.026015 ACPI: added table 7/32, length now 64
1744 03:54:01.029579 ACPI: * HPET
1745 03:54:01.032833 ACPI: added table 8/32, length now 68
1746 03:54:01.035677 ACPI: done.
1747 03:54:01.035757 ACPI tables: 31744 bytes.
1748 03:54:01.039566 smbios_write_tables: 99a2c000
1749 03:54:01.042900 EC returned error result code 3
1750 03:54:01.045629 Couldn't obtain OEM name from CBI
1751 03:54:01.049163 Create SMBIOS type 17
1752 03:54:01.052531 PCI: 00:00.0 (Intel Cannonlake)
1753 03:54:01.055641 PCI: 00:14.3 (Intel WiFi)
1754 03:54:01.059192 SMBIOS tables: 939 bytes.
1755 03:54:01.062207 Writing table forward entry at 0x00000500
1756 03:54:01.069375 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1757 03:54:01.072296 Writing coreboot table at 0x99b62000
1758 03:54:01.078901 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1759 03:54:01.082242 1. 0000000000001000-000000000009ffff: RAM
1760 03:54:01.088316 2. 00000000000a0000-00000000000fffff: RESERVED
1761 03:54:01.091689 3. 0000000000100000-0000000099a2bfff: RAM
1762 03:54:01.098620 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1763 03:54:01.101651 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1764 03:54:01.108532 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1765 03:54:01.111713 7. 000000009a000000-000000009f7fffff: RESERVED
1766 03:54:01.118159 8. 00000000e0000000-00000000efffffff: RESERVED
1767 03:54:01.121155 9. 00000000fc000000-00000000fc000fff: RESERVED
1768 03:54:01.128335 10. 00000000fe000000-00000000fe00ffff: RESERVED
1769 03:54:01.131472 11. 00000000fed10000-00000000fed17fff: RESERVED
1770 03:54:01.138046 12. 00000000fed80000-00000000fed83fff: RESERVED
1771 03:54:01.141350 13. 00000000fed90000-00000000fed91fff: RESERVED
1772 03:54:01.147838 14. 00000000feda0000-00000000feda1fff: RESERVED
1773 03:54:01.151036 15. 0000000100000000-000000045e7fffff: RAM
1774 03:54:01.154456 Graphics framebuffer located at 0xc0000000
1775 03:54:01.158088 Passing 5 GPIOs to payload:
1776 03:54:01.163960 NAME | PORT | POLARITY | VALUE
1777 03:54:01.167255 write protect | undefined | high | low
1778 03:54:01.174017 lid | undefined | high | high
1779 03:54:01.180477 power | undefined | high | low
1780 03:54:01.183596 oprom | undefined | high | low
1781 03:54:01.190289 EC in RW | 0x000000cb | high | low
1782 03:54:01.190384 Board ID: 4
1783 03:54:01.196916 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1784 03:54:01.197014 CBFS @ c08000 size 3f8000
1785 03:54:01.202916 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1786 03:54:01.209375 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1787 03:54:01.212713 coreboot table: 1492 bytes.
1788 03:54:01.215998 IMD ROOT 0. 99fff000 00001000
1789 03:54:01.219385 IMD SMALL 1. 99ffe000 00001000
1790 03:54:01.222985 FSP MEMORY 2. 99c4e000 003b0000
1791 03:54:01.226146 CONSOLE 3. 99c2e000 00020000
1792 03:54:01.229504 FMAP 4. 99c2d000 0000054e
1793 03:54:01.232859 TIME STAMP 5. 99c2c000 00000910
1794 03:54:01.236078 VBOOT WORK 6. 99c18000 00014000
1795 03:54:01.239362 MRC DATA 7. 99c16000 00001958
1796 03:54:01.242262 ROMSTG STCK 8. 99c15000 00001000
1797 03:54:01.245440 AFTER CAR 9. 99c0b000 0000a000
1798 03:54:01.248961 RAMSTAGE 10. 99baf000 0005c000
1799 03:54:01.252076 REFCODE 11. 99b7a000 00035000
1800 03:54:01.255470 SMM BACKUP 12. 99b6a000 00010000
1801 03:54:01.258667 COREBOOT 13. 99b62000 00008000
1802 03:54:01.262183 ACPI 14. 99b3e000 00024000
1803 03:54:01.265385 ACPI GNVS 15. 99b3d000 00001000
1804 03:54:01.269087 RAMOOPS 16. 99a3d000 00100000
1805 03:54:01.272343 TPM2 TCGLOG17. 99a2d000 00010000
1806 03:54:01.275503 SMBIOS 18. 99a2c000 00000800
1807 03:54:01.278791 IMD small region:
1808 03:54:01.282018 IMD ROOT 0. 99ffec00 00000400
1809 03:54:01.284803 FSP RUNTIME 1. 99ffebe0 00000004
1810 03:54:01.288028 EC HOSTEVENT 2. 99ffebc0 00000008
1811 03:54:01.291254 POWER STATE 3. 99ffeb80 00000040
1812 03:54:01.294537 ROMSTAGE 4. 99ffeb60 00000004
1813 03:54:01.297893 MEM INFO 5. 99ffe9a0 000001b9
1814 03:54:01.301271 VPD 6. 99ffe920 0000006c
1815 03:54:01.304610 MTRR: Physical address space:
1816 03:54:01.311169 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1817 03:54:01.317829 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1818 03:54:01.324214 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1819 03:54:01.330776 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1820 03:54:01.337619 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1821 03:54:01.343764 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1822 03:54:01.350356 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1823 03:54:01.353658 MTRR: Fixed MSR 0x250 0x0606060606060606
1824 03:54:01.357185 MTRR: Fixed MSR 0x258 0x0606060606060606
1825 03:54:01.360369 MTRR: Fixed MSR 0x259 0x0000000000000000
1826 03:54:01.366423 MTRR: Fixed MSR 0x268 0x0606060606060606
1827 03:54:01.370623 MTRR: Fixed MSR 0x269 0x0606060606060606
1828 03:54:01.373572 MTRR: Fixed MSR 0x26a 0x0606060606060606
1829 03:54:01.376716 MTRR: Fixed MSR 0x26b 0x0606060606060606
1830 03:54:01.383396 MTRR: Fixed MSR 0x26c 0x0606060606060606
1831 03:54:01.386587 MTRR: Fixed MSR 0x26d 0x0606060606060606
1832 03:54:01.389893 MTRR: Fixed MSR 0x26e 0x0606060606060606
1833 03:54:01.393302 MTRR: Fixed MSR 0x26f 0x0606060606060606
1834 03:54:01.396610 call enable_fixed_mtrr()
1835 03:54:01.399796 CPU physical address size: 39 bits
1836 03:54:01.406468 MTRR: default type WB/UC MTRR counts: 6/8.
1837 03:54:01.409871 MTRR: WB selected as default type.
1838 03:54:01.416334 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1839 03:54:01.419632 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1840 03:54:01.426327 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1841 03:54:01.432519 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1842 03:54:01.439439 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1843 03:54:01.446195 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1844 03:54:01.452651 MTRR: Fixed MSR 0x250 0x0606060606060606
1845 03:54:01.456030 MTRR: Fixed MSR 0x258 0x0606060606060606
1846 03:54:01.459300 MTRR: Fixed MSR 0x259 0x0000000000000000
1847 03:54:01.462521 MTRR: Fixed MSR 0x268 0x0606060606060606
1848 03:54:01.468511 MTRR: Fixed MSR 0x269 0x0606060606060606
1849 03:54:01.471966 MTRR: Fixed MSR 0x26a 0x0606060606060606
1850 03:54:01.475199 MTRR: Fixed MSR 0x26b 0x0606060606060606
1851 03:54:01.478613 MTRR: Fixed MSR 0x26c 0x0606060606060606
1852 03:54:01.484713 MTRR: Fixed MSR 0x26d 0x0606060606060606
1853 03:54:01.488012 MTRR: Fixed MSR 0x26e 0x0606060606060606
1854 03:54:01.491393 MTRR: Fixed MSR 0x26f 0x0606060606060606
1855 03:54:01.491503
1856 03:54:01.494704 MTRR check
1857 03:54:01.494796 Fixed MTRRs : Enabled
1858 03:54:01.498343 Variable MTRRs: Enabled
1859 03:54:01.498445
1860 03:54:01.501628 call enable_fixed_mtrr()
1861 03:54:01.508043 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1862 03:54:01.511318 CPU physical address size: 39 bits
1863 03:54:01.514575 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1864 03:54:01.521306 MTRR: Fixed MSR 0x250 0x0606060606060606
1865 03:54:01.524136 MTRR: Fixed MSR 0x258 0x0606060606060606
1866 03:54:01.527568 MTRR: Fixed MSR 0x259 0x0000000000000000
1867 03:54:01.530743 MTRR: Fixed MSR 0x268 0x0606060606060606
1868 03:54:01.537945 MTRR: Fixed MSR 0x269 0x0606060606060606
1869 03:54:01.541055 MTRR: Fixed MSR 0x26a 0x0606060606060606
1870 03:54:01.544336 MTRR: Fixed MSR 0x26b 0x0606060606060606
1871 03:54:01.547737 MTRR: Fixed MSR 0x26c 0x0606060606060606
1872 03:54:01.554223 MTRR: Fixed MSR 0x26d 0x0606060606060606
1873 03:54:01.557104 MTRR: Fixed MSR 0x26e 0x0606060606060606
1874 03:54:01.560442 MTRR: Fixed MSR 0x26f 0x0606060606060606
1875 03:54:01.563735 MTRR: Fixed MSR 0x250 0x0606060606060606
1876 03:54:01.566989 call enable_fixed_mtrr()
1877 03:54:01.570514 MTRR: Fixed MSR 0x258 0x0606060606060606
1878 03:54:01.577226 MTRR: Fixed MSR 0x259 0x0000000000000000
1879 03:54:01.580265 MTRR: Fixed MSR 0x268 0x0606060606060606
1880 03:54:01.583758 MTRR: Fixed MSR 0x269 0x0606060606060606
1881 03:54:01.587180 MTRR: Fixed MSR 0x26a 0x0606060606060606
1882 03:54:01.593426 MTRR: Fixed MSR 0x26b 0x0606060606060606
1883 03:54:01.596372 MTRR: Fixed MSR 0x26c 0x0606060606060606
1884 03:54:01.600038 MTRR: Fixed MSR 0x26d 0x0606060606060606
1885 03:54:01.603290 MTRR: Fixed MSR 0x26e 0x0606060606060606
1886 03:54:01.610001 MTRR: Fixed MSR 0x26f 0x0606060606060606
1887 03:54:01.613304 CPU physical address size: 39 bits
1888 03:54:01.616312 call enable_fixed_mtrr()
1889 03:54:01.619624 MTRR: Fixed MSR 0x250 0x0606060606060606
1890 03:54:01.622457 MTRR: Fixed MSR 0x250 0x0606060606060606
1891 03:54:01.625872 MTRR: Fixed MSR 0x258 0x0606060606060606
1892 03:54:01.632614 MTRR: Fixed MSR 0x259 0x0000000000000000
1893 03:54:01.636125 MTRR: Fixed MSR 0x268 0x0606060606060606
1894 03:54:01.639252 MTRR: Fixed MSR 0x269 0x0606060606060606
1895 03:54:01.642836 MTRR: Fixed MSR 0x26a 0x0606060606060606
1896 03:54:01.648848 MTRR: Fixed MSR 0x26b 0x0606060606060606
1897 03:54:01.652329 MTRR: Fixed MSR 0x26c 0x0606060606060606
1898 03:54:01.655477 MTRR: Fixed MSR 0x26d 0x0606060606060606
1899 03:54:01.658857 MTRR: Fixed MSR 0x26e 0x0606060606060606
1900 03:54:01.665489 MTRR: Fixed MSR 0x26f 0x0606060606060606
1901 03:54:01.668272 MTRR: Fixed MSR 0x258 0x0606060606060606
1902 03:54:01.671593 call enable_fixed_mtrr()
1903 03:54:01.675064 MTRR: Fixed MSR 0x259 0x0000000000000000
1904 03:54:01.678439 MTRR: Fixed MSR 0x268 0x0606060606060606
1905 03:54:01.685190 MTRR: Fixed MSR 0x269 0x0606060606060606
1906 03:54:01.688258 MTRR: Fixed MSR 0x26a 0x0606060606060606
1907 03:54:01.691476 MTRR: Fixed MSR 0x26b 0x0606060606060606
1908 03:54:01.694884 MTRR: Fixed MSR 0x26c 0x0606060606060606
1909 03:54:01.698011 MTRR: Fixed MSR 0x26d 0x0606060606060606
1910 03:54:01.704914 MTRR: Fixed MSR 0x26e 0x0606060606060606
1911 03:54:01.708226 MTRR: Fixed MSR 0x26f 0x0606060606060606
1912 03:54:01.711341 CPU physical address size: 39 bits
1913 03:54:01.714668 call enable_fixed_mtrr()
1914 03:54:01.717884 CBFS @ c08000 size 3f8000
1915 03:54:01.723976 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1916 03:54:01.727228 CBFS: Locating 'fallback/payload'
1917 03:54:01.730692 CPU physical address size: 39 bits
1918 03:54:01.734082 CPU physical address size: 39 bits
1919 03:54:01.737446 MTRR: Fixed MSR 0x250 0x0606060606060606
1920 03:54:01.740906 MTRR: Fixed MSR 0x258 0x0606060606060606
1921 03:54:01.743662 MTRR: Fixed MSR 0x259 0x0000000000000000
1922 03:54:01.750464 MTRR: Fixed MSR 0x268 0x0606060606060606
1923 03:54:01.753696 MTRR: Fixed MSR 0x269 0x0606060606060606
1924 03:54:01.757219 MTRR: Fixed MSR 0x26a 0x0606060606060606
1925 03:54:01.759945 MTRR: Fixed MSR 0x26b 0x0606060606060606
1926 03:54:01.766784 MTRR: Fixed MSR 0x26c 0x0606060606060606
1927 03:54:01.770016 MTRR: Fixed MSR 0x26d 0x0606060606060606
1928 03:54:01.773493 MTRR: Fixed MSR 0x26e 0x0606060606060606
1929 03:54:01.776865 MTRR: Fixed MSR 0x26f 0x0606060606060606
1930 03:54:01.783350 MTRR: Fixed MSR 0x250 0x0606060606060606
1931 03:54:01.786059 call enable_fixed_mtrr()
1932 03:54:01.789515 MTRR: Fixed MSR 0x258 0x0606060606060606
1933 03:54:01.792869 MTRR: Fixed MSR 0x259 0x0000000000000000
1934 03:54:01.796268 MTRR: Fixed MSR 0x268 0x0606060606060606
1935 03:54:01.803086 MTRR: Fixed MSR 0x269 0x0606060606060606
1936 03:54:01.806586 MTRR: Fixed MSR 0x26a 0x0606060606060606
1937 03:54:01.809817 MTRR: Fixed MSR 0x26b 0x0606060606060606
1938 03:54:01.812457 MTRR: Fixed MSR 0x26c 0x0606060606060606
1939 03:54:01.819192 MTRR: Fixed MSR 0x26d 0x0606060606060606
1940 03:54:01.822433 MTRR: Fixed MSR 0x26e 0x0606060606060606
1941 03:54:01.825703 MTRR: Fixed MSR 0x26f 0x0606060606060606
1942 03:54:01.829327 CPU physical address size: 39 bits
1943 03:54:01.832683 call enable_fixed_mtrr()
1944 03:54:01.835483 CBFS: Found @ offset 1c96c0 size 3f798
1945 03:54:01.838622 CPU physical address size: 39 bits
1946 03:54:01.845315 Checking segment from ROM address 0xffdd16f8
1947 03:54:01.848774 Checking segment from ROM address 0xffdd1714
1948 03:54:01.852024 Loading segment from ROM address 0xffdd16f8
1949 03:54:01.855280 code (compression=0)
1950 03:54:01.865240 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1951 03:54:01.871943 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1952 03:54:01.875166 it's not compressed!
1953 03:54:01.967128 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1954 03:54:01.973462 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1955 03:54:01.979955 Loading segment from ROM address 0xffdd1714
1956 03:54:01.980086 Entry Point 0x30000000
1957 03:54:01.983322 Loaded segments
1958 03:54:01.989531 Finalizing chipset.
1959 03:54:01.992251 Finalizing SMM.
1960 03:54:01.995683 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1961 03:54:01.999011 mp_park_aps done after 0 msecs.
1962 03:54:02.005832 Jumping to boot code at 30000000(99b62000)
1963 03:54:02.011919 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1964 03:54:02.012005
1965 03:54:02.012093
1966 03:54:02.012208
1967 03:54:02.015196 Starting depthcharge on Helios...
1968 03:54:02.015290
1969 03:54:02.015652 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
1970 03:54:02.015794 start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
1971 03:54:02.015883 Setting prompt string to ['hatch:']
1972 03:54:02.015962 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:40)
1973 03:54:02.025464 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1974 03:54:02.025551
1975 03:54:02.031469 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1976 03:54:02.031558
1977 03:54:02.038321 board_setup: Info: eMMC controller not present; skipping
1978 03:54:02.038410
1979 03:54:02.041156 New NVMe Controller 0x30053ac0 @ 00:1d:00
1980 03:54:02.041244
1981 03:54:02.048081 board_setup: Info: SDHCI controller not present; skipping
1982 03:54:02.048170
1983 03:54:02.054713 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1984 03:54:02.054802
1985 03:54:02.054870 Wipe memory regions:
1986 03:54:02.054934
1987 03:54:02.061552 [0x00000000001000, 0x000000000a0000)
1988 03:54:02.061641
1989 03:54:02.064314 [0x00000000100000, 0x00000030000000)
1990 03:54:02.128626
1991 03:54:02.131266 [0x00000030657430, 0x00000099a2c000)
1992 03:54:02.268789
1993 03:54:02.272042 [0x00000100000000, 0x0000045e800000)
1994 03:54:03.655043
1995 03:54:03.655187 R8152: Initializing
1996 03:54:03.655256
1997 03:54:03.657775 Version 9 (ocp_data = 6010)
1998 03:54:03.662683
1999 03:54:03.662771 R8152: Done initializing
2000 03:54:03.662840
2001 03:54:03.665314 Adding net device
2002 03:54:04.148451
2003 03:54:04.148597 R8152: Initializing
2004 03:54:04.148667
2005 03:54:04.151767 Version 6 (ocp_data = 5c30)
2006 03:54:04.151854
2007 03:54:04.154542 R8152: Done initializing
2008 03:54:04.154628
2009 03:54:04.161613 net_add_device: Attemp to include the same device
2010 03:54:04.161701
2011 03:54:04.168352 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2012 03:54:04.168439
2013 03:54:04.168506
2014 03:54:04.168570
2015 03:54:04.168839 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2017 03:54:04.269604 hatch: tftpboot 192.168.201.1 9338300/tftp-deploy-j2w3jvb1/kernel/bzImage 9338300/tftp-deploy-j2w3jvb1/kernel/cmdline 9338300/tftp-deploy-j2w3jvb1/ramdisk/ramdisk.cpio.gz
2018 03:54:04.269757 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2019 03:54:04.269851 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:38)
2020 03:54:04.273875 tftpboot 192.168.201.1 9338300/tftp-deploy-j2w3jvb1/kernel/bzIoy-j2w3jvb1/kernel/cmdline 9338300/tftp-deploy-j2w3jvb1/ramdisk/ramdisk.cpio.gz
2021 03:54:04.273967
2022 03:54:04.274035 Waiting for link
2023 03:54:04.474394
2024 03:54:04.474536 done.
2025 03:54:04.474608
2026 03:54:04.474675 MAC: 00:24:32:50:19:be
2027 03:54:04.474751
2028 03:54:04.477821 Sending DHCP discover... done.
2029 03:54:04.477909
2030 03:54:04.481146 Waiting for reply... done.
2031 03:54:04.481235
2032 03:54:04.484407 Sending DHCP request... done.
2033 03:54:04.484495
2034 03:54:04.487786 Waiting for reply... done.
2035 03:54:04.487873
2036 03:54:04.491196 My ip is 192.168.201.15
2037 03:54:04.491284
2038 03:54:04.494652 The DHCP server ip is 192.168.201.1
2039 03:54:04.494739
2040 03:54:04.497425 TFTP server IP predefined by user: 192.168.201.1
2041 03:54:04.497516
2042 03:54:04.504351 Bootfile predefined by user: 9338300/tftp-deploy-j2w3jvb1/kernel/bzImage
2043 03:54:04.507721
2044 03:54:04.510505 Sending tftp read request... done.
2045 03:54:04.510595
2046 03:54:04.514400 Waiting for the transfer...
2047 03:54:04.514488
2048 03:54:05.032292 00000000 ################################################################
2049 03:54:05.032434
2050 03:54:05.541362 00080000 ################################################################
2051 03:54:05.541494
2052 03:54:06.050956 00100000 ################################################################
2053 03:54:06.051122
2054 03:54:06.554067 00180000 ################################################################
2055 03:54:06.554218
2056 03:54:07.060600 00200000 ################################################################
2057 03:54:07.060747
2058 03:54:07.564373 00280000 ################################################################
2059 03:54:07.564541
2060 03:54:08.078772 00300000 ################################################################
2061 03:54:08.078916
2062 03:54:08.586256 00380000 ################################################################
2063 03:54:08.586422
2064 03:54:09.098255 00400000 ################################################################
2065 03:54:09.098405
2066 03:54:09.622259 00480000 ################################################################
2067 03:54:09.622404
2068 03:54:10.131058 00500000 ################################################################
2069 03:54:10.131210
2070 03:54:10.641233 00580000 ################################################################
2071 03:54:10.641392
2072 03:54:11.148480 00600000 ################################################################
2073 03:54:11.148677
2074 03:54:11.668306 00680000 ################################################################
2075 03:54:11.668467
2076 03:54:11.900374 00700000 ############################# done.
2077 03:54:11.900516
2078 03:54:11.903729 The bootfile was 7573392 bytes long.
2079 03:54:11.903814
2080 03:54:11.907171 Sending tftp read request... done.
2081 03:54:11.907256
2082 03:54:11.909859 Waiting for the transfer...
2083 03:54:11.909970
2084 03:54:12.416599 00000000 ################################################################
2085 03:54:12.416753
2086 03:54:12.925291 00080000 ################################################################
2087 03:54:12.925432
2088 03:54:13.439358 00100000 ################################################################
2089 03:54:13.439504
2090 03:54:13.948643 00180000 ################################################################
2091 03:54:13.948789
2092 03:54:14.458276 00200000 ################################################################
2093 03:54:14.458480
2094 03:54:14.989900 00280000 ################################################################
2095 03:54:14.990079
2096 03:54:15.561304 00300000 ################################################################
2097 03:54:15.561439
2098 03:54:16.207680 00380000 ################################################################
2099 03:54:16.208292
2100 03:54:16.814118 00400000 ################################################################
2101 03:54:16.814272
2102 03:54:17.351498 00480000 ################################################################
2103 03:54:17.351638
2104 03:54:17.884756 00500000 ################################################################
2105 03:54:17.884891
2106 03:54:18.395233 00580000 ################################################################
2107 03:54:18.395372
2108 03:54:18.937956 00600000 ################################################################
2109 03:54:18.938117
2110 03:54:19.477597 00680000 ################################################################
2111 03:54:19.477764
2112 03:54:20.015191 00700000 ################################################################
2113 03:54:20.015335
2114 03:54:20.563246 00780000 ################################################################
2115 03:54:20.563395
2116 03:54:20.740637 00800000 ##################### done.
2117 03:54:20.740774
2118 03:54:20.744123 Sending tftp read request... done.
2119 03:54:20.744211
2120 03:54:20.747683 Waiting for the transfer...
2121 03:54:20.747771
2122 03:54:20.747841 00000000 # done.
2123 03:54:20.747909
2124 03:54:20.757177 Command line loaded dynamically from TFTP file: 9338300/tftp-deploy-j2w3jvb1/kernel/cmdline
2125 03:54:20.757271
2126 03:54:20.773545 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2127 03:54:20.773634
2128 03:54:20.779832 ec_init(0): CrosEC protocol v3 supported (256, 256)
2129 03:54:20.784614
2130 03:54:20.787910 Shutting down all USB controllers.
2131 03:54:20.787991
2132 03:54:20.788058 Removing current net device
2133 03:54:20.791999
2134 03:54:20.792085 Finalizing coreboot
2135 03:54:20.792154
2136 03:54:20.798726 Exiting depthcharge with code 4 at timestamp: 26127550
2137 03:54:20.798808
2138 03:54:20.798875
2139 03:54:20.798939 Starting kernel ...
2140 03:54:20.799004
2141 03:54:20.799065
2142 03:54:20.799436 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
2143 03:54:20.799538 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2144 03:54:20.799622 Setting prompt string to ['Linux version [0-9]']
2145 03:54:20.799696 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2146 03:54:20.799767 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2148 03:58:41.799798 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2150 03:58:41.800034 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2152 03:58:41.800194 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2155 03:58:41.800461 end: 2 depthcharge-action (duration 00:05:00) [common]
2157 03:58:41.800686 Cleaning after the job
2158 03:58:41.800770 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9338300/tftp-deploy-j2w3jvb1/ramdisk
2159 03:58:41.801444 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9338300/tftp-deploy-j2w3jvb1/kernel
2160 03:58:41.802107 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9338300/tftp-deploy-j2w3jvb1/modules
2161 03:58:41.802348 start: 5.1 power-off (timeout 00:00:30) [common]
2162 03:58:41.802497 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2163 03:58:43.968560 >> Command sent successfully.
2164 03:58:43.977941 Returned 0 in 2 seconds
2165 03:58:44.079559 end: 5.1 power-off (duration 00:00:02) [common]
2167 03:58:44.081037 start: 5.2 read-feedback (timeout 00:09:58) [common]
2168 03:58:44.082182 Listened to connection for namespace 'common' for up to 1s
2170 03:58:44.083631 Listened to connection for namespace 'common' for up to 1s
2171 03:58:44.084607 Listened to connection for namespace 'common' for up to 1s
2172 03:58:44.085678 Listened to connection for namespace 'common' for up to 1s
2173 03:58:44.086879 Listened to connection for namespace 'common' for up to 1s
2174 03:58:44.088073 Listened to connection for namespace 'common' for up to 1s
2175 03:58:45.086846 Finalising connection for namespace 'common'
2176 03:58:45.087491 Disconnecting from shell: Finalise
2177 03:58:45.087894
2178 03:58:45.189670 end: 5.2 read-feedback (duration 00:00:01) [common]
2179 03:58:45.189812 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9338300
2180 03:58:45.194681 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9338300
2181 03:58:45.194808 JobError: Your job cannot terminate cleanly.