Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 03:53:13.698379 lava-dispatcher, installed at version: 2022.11
2 03:53:13.698552 start: 0 validate
3 03:53:13.698721 Start time: 2023-02-26 03:53:13.698712+00:00 (UTC)
4 03:53:13.698848 Using caching service: 'http://localhost/cache/?uri=%s'
5 03:53:13.698974 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230217.0%2Fx86%2Frootfs.cpio.gz exists
6 03:53:13.988935 Using caching service: 'http://localhost/cache/?uri=%s'
7 03:53:13.989667 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-938-gc773c630d0e4f%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 03:53:16.000107 Using caching service: 'http://localhost/cache/?uri=%s'
9 03:53:16.000838 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.4.y-st-rc%2Fv4.4-st20-938-gc773c630d0e4f%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 03:53:16.007445 validate duration: 2.31
12 03:53:16.007744 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 03:53:16.007863 start: 1.1 download-retry (timeout 00:10:00) [common]
14 03:53:16.007969 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 03:53:16.008073 Not decompressing ramdisk as can be used compressed.
16 03:53:16.008261 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230217.0/x86/rootfs.cpio.gz
17 03:53:16.008339 saving as /var/lib/lava/dispatcher/tmp/9338244/tftp-deploy-71cykujs/ramdisk/rootfs.cpio.gz
18 03:53:16.008407 total size: 8423658 (8MB)
19 03:53:16.011551 progress 0% (0MB)
20 03:53:16.015299 progress 5% (0MB)
21 03:53:16.018675 progress 10% (0MB)
22 03:53:16.022526 progress 15% (1MB)
23 03:53:16.026099 progress 20% (1MB)
24 03:53:16.030018 progress 25% (2MB)
25 03:53:16.033358 progress 30% (2MB)
26 03:53:16.036838 progress 35% (2MB)
27 03:53:16.040487 progress 40% (3MB)
28 03:53:16.043867 progress 45% (3MB)
29 03:53:16.047465 progress 50% (4MB)
30 03:53:16.051248 progress 55% (4MB)
31 03:53:16.055145 progress 60% (4MB)
32 03:53:16.058371 progress 65% (5MB)
33 03:53:16.061711 progress 70% (5MB)
34 03:53:16.065298 progress 75% (6MB)
35 03:53:16.068926 progress 80% (6MB)
36 03:53:16.072582 progress 85% (6MB)
37 03:53:16.076229 progress 90% (7MB)
38 03:53:16.079986 progress 95% (7MB)
39 03:53:16.083424 progress 100% (8MB)
40 03:53:16.083603 8MB downloaded in 0.08s (106.84MB/s)
41 03:53:16.083766 end: 1.1.1 http-download (duration 00:00:00) [common]
43 03:53:16.084015 end: 1.1 download-retry (duration 00:00:00) [common]
44 03:53:16.084109 start: 1.2 download-retry (timeout 00:10:00) [common]
45 03:53:16.084195 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 03:53:16.084302 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-938-gc773c630d0e4f/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 03:53:16.084371 saving as /var/lib/lava/dispatcher/tmp/9338244/tftp-deploy-71cykujs/kernel/bzImage
48 03:53:16.084434 total size: 7573392 (7MB)
49 03:53:16.084495 No compression specified
50 03:53:16.086391 progress 0% (0MB)
51 03:53:16.089661 progress 5% (0MB)
52 03:53:16.092927 progress 10% (0MB)
53 03:53:16.096026 progress 15% (1MB)
54 03:53:16.099641 progress 20% (1MB)
55 03:53:16.102517 progress 25% (1MB)
56 03:53:16.105843 progress 30% (2MB)
57 03:53:16.108865 progress 35% (2MB)
58 03:53:16.112511 progress 40% (2MB)
59 03:53:16.115815 progress 45% (3MB)
60 03:53:16.118662 progress 50% (3MB)
61 03:53:16.122104 progress 55% (4MB)
62 03:53:16.125495 progress 60% (4MB)
63 03:53:16.128458 progress 65% (4MB)
64 03:53:16.131520 progress 70% (5MB)
65 03:53:16.135008 progress 75% (5MB)
66 03:53:16.138387 progress 80% (5MB)
67 03:53:16.141431 progress 85% (6MB)
68 03:53:16.144562 progress 90% (6MB)
69 03:53:16.147646 progress 95% (6MB)
70 03:53:16.150931 progress 100% (7MB)
71 03:53:16.151114 7MB downloaded in 0.07s (108.33MB/s)
72 03:53:16.151270 end: 1.2.1 http-download (duration 00:00:00) [common]
74 03:53:16.151525 end: 1.2 download-retry (duration 00:00:00) [common]
75 03:53:16.151616 start: 1.3 download-retry (timeout 00:10:00) [common]
76 03:53:16.151705 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 03:53:16.151811 downloading http://storage.kernelci.org/cip/linux-4.4.y-st-rc/v4.4-st20-938-gc773c630d0e4f/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 03:53:16.151879 saving as /var/lib/lava/dispatcher/tmp/9338244/tftp-deploy-71cykujs/modules/modules.tar
79 03:53:16.151942 total size: 51688 (0MB)
80 03:53:16.152003 Using unxz to decompress xz
81 03:53:16.156162 progress 63% (0MB)
82 03:53:16.156537 progress 100% (0MB)
83 03:53:16.159777 0MB downloaded in 0.01s (6.30MB/s)
84 03:53:16.159993 end: 1.3.1 http-download (duration 00:00:00) [common]
86 03:53:16.160252 end: 1.3 download-retry (duration 00:00:00) [common]
87 03:53:16.160349 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
88 03:53:16.160444 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
89 03:53:16.160528 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 03:53:16.160611 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
91 03:53:16.160772 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9338244/lava-overlay-07t9bq96
92 03:53:16.160879 makedir: /var/lib/lava/dispatcher/tmp/9338244/lava-overlay-07t9bq96/lava-9338244/bin
93 03:53:16.160962 makedir: /var/lib/lava/dispatcher/tmp/9338244/lava-overlay-07t9bq96/lava-9338244/tests
94 03:53:16.161042 makedir: /var/lib/lava/dispatcher/tmp/9338244/lava-overlay-07t9bq96/lava-9338244/results
95 03:53:16.161144 Creating /var/lib/lava/dispatcher/tmp/9338244/lava-overlay-07t9bq96/lava-9338244/bin/lava-add-keys
96 03:53:16.161272 Creating /var/lib/lava/dispatcher/tmp/9338244/lava-overlay-07t9bq96/lava-9338244/bin/lava-add-sources
97 03:53:16.161386 Creating /var/lib/lava/dispatcher/tmp/9338244/lava-overlay-07t9bq96/lava-9338244/bin/lava-background-process-start
98 03:53:16.161499 Creating /var/lib/lava/dispatcher/tmp/9338244/lava-overlay-07t9bq96/lava-9338244/bin/lava-background-process-stop
99 03:53:16.161645 Creating /var/lib/lava/dispatcher/tmp/9338244/lava-overlay-07t9bq96/lava-9338244/bin/lava-common-functions
100 03:53:16.161754 Creating /var/lib/lava/dispatcher/tmp/9338244/lava-overlay-07t9bq96/lava-9338244/bin/lava-echo-ipv4
101 03:53:16.161865 Creating /var/lib/lava/dispatcher/tmp/9338244/lava-overlay-07t9bq96/lava-9338244/bin/lava-install-packages
102 03:53:16.161998 Creating /var/lib/lava/dispatcher/tmp/9338244/lava-overlay-07t9bq96/lava-9338244/bin/lava-installed-packages
103 03:53:16.162118 Creating /var/lib/lava/dispatcher/tmp/9338244/lava-overlay-07t9bq96/lava-9338244/bin/lava-os-build
104 03:53:16.162226 Creating /var/lib/lava/dispatcher/tmp/9338244/lava-overlay-07t9bq96/lava-9338244/bin/lava-probe-channel
105 03:53:16.162335 Creating /var/lib/lava/dispatcher/tmp/9338244/lava-overlay-07t9bq96/lava-9338244/bin/lava-probe-ip
106 03:53:16.162442 Creating /var/lib/lava/dispatcher/tmp/9338244/lava-overlay-07t9bq96/lava-9338244/bin/lava-target-ip
107 03:53:16.162551 Creating /var/lib/lava/dispatcher/tmp/9338244/lava-overlay-07t9bq96/lava-9338244/bin/lava-target-mac
108 03:53:16.162719 Creating /var/lib/lava/dispatcher/tmp/9338244/lava-overlay-07t9bq96/lava-9338244/bin/lava-target-storage
109 03:53:16.162830 Creating /var/lib/lava/dispatcher/tmp/9338244/lava-overlay-07t9bq96/lava-9338244/bin/lava-test-case
110 03:53:16.162937 Creating /var/lib/lava/dispatcher/tmp/9338244/lava-overlay-07t9bq96/lava-9338244/bin/lava-test-event
111 03:53:16.163046 Creating /var/lib/lava/dispatcher/tmp/9338244/lava-overlay-07t9bq96/lava-9338244/bin/lava-test-feedback
112 03:53:16.163153 Creating /var/lib/lava/dispatcher/tmp/9338244/lava-overlay-07t9bq96/lava-9338244/bin/lava-test-raise
113 03:53:16.163294 Creating /var/lib/lava/dispatcher/tmp/9338244/lava-overlay-07t9bq96/lava-9338244/bin/lava-test-reference
114 03:53:16.163401 Creating /var/lib/lava/dispatcher/tmp/9338244/lava-overlay-07t9bq96/lava-9338244/bin/lava-test-runner
115 03:53:16.163508 Creating /var/lib/lava/dispatcher/tmp/9338244/lava-overlay-07t9bq96/lava-9338244/bin/lava-test-set
116 03:53:16.163645 Creating /var/lib/lava/dispatcher/tmp/9338244/lava-overlay-07t9bq96/lava-9338244/bin/lava-test-shell
117 03:53:16.163755 Updating /var/lib/lava/dispatcher/tmp/9338244/lava-overlay-07t9bq96/lava-9338244/bin/lava-install-packages (oe)
118 03:53:16.163867 Updating /var/lib/lava/dispatcher/tmp/9338244/lava-overlay-07t9bq96/lava-9338244/bin/lava-installed-packages (oe)
119 03:53:16.163966 Creating /var/lib/lava/dispatcher/tmp/9338244/lava-overlay-07t9bq96/lava-9338244/environment
120 03:53:16.164054 LAVA metadata
121 03:53:16.164124 - LAVA_JOB_ID=9338244
122 03:53:16.164190 - LAVA_DISPATCHER_IP=192.168.201.1
123 03:53:16.164290 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
124 03:53:16.164355 skipped lava-vland-overlay
125 03:53:16.164431 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 03:53:16.164514 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
127 03:53:16.164577 skipped lava-multinode-overlay
128 03:53:16.164652 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 03:53:16.164733 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
130 03:53:16.164808 Loading test definitions
131 03:53:16.164902 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
132 03:53:16.164978 Using /lava-9338244 at stage 0
133 03:53:16.165234 uuid=9338244_1.4.2.3.1 testdef=None
134 03:53:16.165327 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 03:53:16.165416 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
136 03:53:16.165934 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 03:53:16.166165 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
139 03:53:16.166787 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 03:53:16.167028 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
142 03:53:16.167587 runner path: /var/lib/lava/dispatcher/tmp/9338244/lava-overlay-07t9bq96/lava-9338244/0/tests/0_dmesg test_uuid 9338244_1.4.2.3.1
143 03:53:16.167732 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 03:53:16.167965 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
146 03:53:16.168039 Using /lava-9338244 at stage 1
147 03:53:16.168278 uuid=9338244_1.4.2.3.5 testdef=None
148 03:53:16.168368 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 03:53:16.168455 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
150 03:53:16.168891 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 03:53:16.169115 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
153 03:53:16.169740 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 03:53:16.169980 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
156 03:53:16.170621 runner path: /var/lib/lava/dispatcher/tmp/9338244/lava-overlay-07t9bq96/lava-9338244/1/tests/1_bootrr test_uuid 9338244_1.4.2.3.5
157 03:53:16.170791 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 03:53:16.171003 Creating lava-test-runner.conf files
160 03:53:16.171067 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9338244/lava-overlay-07t9bq96/lava-9338244/0 for stage 0
161 03:53:16.171148 - 0_dmesg
162 03:53:16.171223 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9338244/lava-overlay-07t9bq96/lava-9338244/1 for stage 1
163 03:53:16.171305 - 1_bootrr
164 03:53:16.171397 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 03:53:16.171499 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
166 03:53:16.177050 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 03:53:16.177153 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
168 03:53:16.177243 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 03:53:16.177328 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 03:53:16.177416 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
171 03:53:16.355435 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 03:53:16.355780 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
173 03:53:16.355886 extracting modules file /var/lib/lava/dispatcher/tmp/9338244/tftp-deploy-71cykujs/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9338244/extract-overlay-ramdisk-d5gme6nc/ramdisk
174 03:53:16.359605 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 03:53:16.359718 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
176 03:53:16.359831 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9338244/compress-overlay-hza8jq5w/overlay-1.4.2.4.tar.gz to ramdisk
177 03:53:16.359904 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9338244/compress-overlay-hza8jq5w/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9338244/extract-overlay-ramdisk-d5gme6nc/ramdisk
178 03:53:16.363298 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 03:53:16.363406 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
180 03:53:16.363499 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 03:53:16.363593 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
182 03:53:16.363675 Building ramdisk /var/lib/lava/dispatcher/tmp/9338244/extract-overlay-ramdisk-d5gme6nc/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9338244/extract-overlay-ramdisk-d5gme6nc/ramdisk
183 03:53:16.422458 >> 48119 blocks
184 03:53:17.185139 rename /var/lib/lava/dispatcher/tmp/9338244/extract-overlay-ramdisk-d5gme6nc/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9338244/tftp-deploy-71cykujs/ramdisk/ramdisk.cpio.gz
185 03:53:17.185554 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 03:53:17.185696 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
187 03:53:17.185808 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
188 03:53:17.185916 No mkimage arch provided, not using FIT.
189 03:53:17.186020 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 03:53:17.186110 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 03:53:17.186219 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 03:53:17.186318 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
193 03:53:17.186406 No LXC device requested
194 03:53:17.186494 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 03:53:17.186633 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
196 03:53:17.186725 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 03:53:17.186813 Checking files for TFTP limit of 4294967296 bytes.
198 03:53:17.187254 end: 1 tftp-deploy (duration 00:00:01) [common]
199 03:53:17.187376 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 03:53:17.187477 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 03:53:17.187619 substitutions:
202 03:53:17.187692 - {DTB}: None
203 03:53:17.187772 - {INITRD}: 9338244/tftp-deploy-71cykujs/ramdisk/ramdisk.cpio.gz
204 03:53:17.187837 - {KERNEL}: 9338244/tftp-deploy-71cykujs/kernel/bzImage
205 03:53:17.187898 - {LAVA_MAC}: None
206 03:53:17.187973 - {PRESEED_CONFIG}: None
207 03:53:17.188034 - {PRESEED_LOCAL}: None
208 03:53:17.188092 - {RAMDISK}: 9338244/tftp-deploy-71cykujs/ramdisk/ramdisk.cpio.gz
209 03:53:17.188167 - {ROOT_PART}: None
210 03:53:17.188227 - {ROOT}: None
211 03:53:17.188285 - {SERVER_IP}: 192.168.201.1
212 03:53:17.188358 - {TEE}: None
213 03:53:17.188416 Parsed boot commands:
214 03:53:17.188472 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 03:53:17.188639 Parsed boot commands: tftpboot 192.168.201.1 9338244/tftp-deploy-71cykujs/kernel/bzImage 9338244/tftp-deploy-71cykujs/kernel/cmdline 9338244/tftp-deploy-71cykujs/ramdisk/ramdisk.cpio.gz
216 03:53:17.188750 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 03:53:17.188846 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 03:53:17.188993 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 03:53:17.189094 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 03:53:17.189169 Not connected, no need to disconnect.
221 03:53:17.189251 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 03:53:17.189350 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 03:53:17.189423 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-12'
224 03:53:17.192417 Setting prompt string to ['lava-test: # ']
225 03:53:17.192747 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 03:53:17.192856 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 03:53:17.192971 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 03:53:17.193087 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 03:53:17.193574 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-12' '--port=1' '--command=reboot'
230 03:53:26.533246 >> Command sent successfully.
231 03:53:26.536033 Returned 0 in 9 seconds
232 03:53:26.636854 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
234 03:53:26.637197 end: 2.2.2 reset-device (duration 00:00:09) [common]
235 03:53:26.637298 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
236 03:53:26.637390 Setting prompt string to 'Starting depthcharge on Voema...'
237 03:53:26.637458 Changing prompt to 'Starting depthcharge on Voema...'
238 03:53:26.637527 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
239 03:53:26.637805 [Enter `^Ec?' for help]
240 03:53:26.637891
241 03:53:26.637973
242 03:53:26.638037 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
243 03:53:26.638101 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
244 03:53:26.638162 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
245 03:53:26.638224 CPU: AES supported, TXT NOT supported, VT supported
246 03:53:26.638283 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
247 03:53:26.638341 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
248 03:53:26.638398 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
249 03:53:26.638455 VBOOT: Loading verstage.
250 03:53:26.638512 FMAP: Found "FLASH" version 1.1 at 0x1804000.
251 03:53:26.638576 FMAP: base = 0x0 size = 0x2000000 #areas = 32
252 03:53:26.638668 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
253 03:53:26.638726 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
254 03:53:26.638785 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
255 03:53:26.638841
256 03:53:26.638898
257 03:53:26.638954 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
258 03:53:26.639011 Probing TPM: . done!
259 03:53:26.639067 TPM ready after 0 ms
260 03:53:26.639125 Connected to device vid:did:rid of 1ae0:0028:00
261 03:53:26.639182 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
262 03:53:26.639241 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
263 03:53:26.639297 Initialized TPM device CR50 revision 0
264 03:53:26.639354 tlcl_send_startup: Startup return code is 0
265 03:53:26.639410 TPM: setup succeeded
266 03:53:26.639465 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
267 03:53:26.639522 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
268 03:53:26.639579 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
269 03:53:26.639635 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
270 03:53:26.639691 Chrome EC: UHEPI supported
271 03:53:26.639747 Phase 1
272 03:53:26.639803 FMAP: area GBB found @ 1805000 (458752 bytes)
273 03:53:26.639859 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
274 03:53:26.639916 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
275 03:53:26.639973 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
276 03:53:26.640030 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
277 03:53:26.640086 Recovery requested (1009000e)
278 03:53:26.640143 TPM: Extending digest for VBOOT: boot mode into PCR 0
279 03:53:26.640198 tlcl_extend: response is 0
280 03:53:26.640254 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
281 03:53:26.640310 tlcl_extend: response is 0
282 03:53:26.640367 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
283 03:53:26.640424 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
284 03:53:26.640481 BS: verstage times (exec / console): total (unknown) / 142 ms
285 03:53:26.640537
286 03:53:26.640592
287 03:53:26.640647 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
288 03:53:26.640704 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
289 03:53:26.640760 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
290 03:53:26.640815 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
291 03:53:26.640871 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
292 03:53:26.640927 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
293 03:53:26.640983 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
294 03:53:26.641038 TCO_STS: 0000 0000
295 03:53:26.641094 GEN_PMCON: d0015038 00002200
296 03:53:26.641150 GBLRST_CAUSE: 00000000 00000000
297 03:53:26.641206 HPR_CAUSE0: 00000000
298 03:53:26.641261 prev_sleep_state 5
299 03:53:26.641316 Boot Count incremented to 14759
300 03:53:26.641372 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
301 03:53:26.641429 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
302 03:53:26.641485 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
303 03:53:26.641542 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
304 03:53:26.641598 Chrome EC: UHEPI supported
305 03:53:26.641653 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
306 03:53:26.641709 Probing TPM: done!
307 03:53:26.641765 Connected to device vid:did:rid of 1ae0:0028:00
308 03:53:26.645952 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
309 03:53:26.649830 Initialized TPM device CR50 revision 0
310 03:53:26.664105 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
311 03:53:26.670555 MRC: Hash idx 0x100b comparison successful.
312 03:53:26.673798 MRC cache found, size faa8
313 03:53:26.673885 bootmode is set to: 2
314 03:53:26.677426 SPD index = 2
315 03:53:26.683837 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
316 03:53:26.687517 SPD: module type is LPDDR4X
317 03:53:26.690580 SPD: module part number is MT53D1G64D4NW-046
318 03:53:26.697026 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
319 03:53:26.703793 SPD: device width 16 bits, bus width 16 bits
320 03:53:26.706764 SPD: module size is 2048 MB (per channel)
321 03:53:27.135960 CBMEM:
322 03:53:27.138877 IMD: root @ 0x76fff000 254 entries.
323 03:53:27.142249 IMD: root @ 0x76ffec00 62 entries.
324 03:53:27.145442 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
325 03:53:27.152141 FMAP: area RW_VPD found @ f35000 (8192 bytes)
326 03:53:27.155648 External stage cache:
327 03:53:27.158643 IMD: root @ 0x7b3ff000 254 entries.
328 03:53:27.161848 IMD: root @ 0x7b3fec00 62 entries.
329 03:53:27.176891 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
330 03:53:27.183549 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
331 03:53:27.189770 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
332 03:53:27.203705 MRC: 'RECOVERY_MRC_CACHE' does not need update.
333 03:53:27.210673 cse_lite: Skip switching to RW in the recovery path
334 03:53:27.210969 8 DIMMs found
335 03:53:27.211206 SMM Memory Map
336 03:53:27.216952 SMRAM : 0x7b000000 0x800000
337 03:53:27.220520 Subregion 0: 0x7b000000 0x200000
338 03:53:27.223650 Subregion 1: 0x7b200000 0x200000
339 03:53:27.226942 Subregion 2: 0x7b400000 0x400000
340 03:53:27.227229 top_of_ram = 0x77000000
341 03:53:27.233463 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
342 03:53:27.240116 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
343 03:53:27.243726 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
344 03:53:27.250390 MTRR Range: Start=ff000000 End=0 (Size 1000000)
345 03:53:27.256860 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
346 03:53:27.263261 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
347 03:53:27.273578 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
348 03:53:27.280011 Processing 211 relocs. Offset value of 0x74c0b000
349 03:53:27.286704 BS: romstage times (exec / console): total (unknown) / 277 ms
350 03:53:27.292547
351 03:53:27.292923
352 03:53:27.303072 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
353 03:53:27.306129 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
354 03:53:27.312998 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
355 03:53:27.323076 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
356 03:53:27.329864 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
357 03:53:27.336073 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
358 03:53:27.379130 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
359 03:53:27.385803 Processing 5008 relocs. Offset value of 0x75d98000
360 03:53:27.389231 BS: postcar times (exec / console): total (unknown) / 59 ms
361 03:53:27.392520
362 03:53:27.392810
363 03:53:27.402158 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
364 03:53:27.402458 Normal boot
365 03:53:27.405678 FW_CONFIG value is 0x804c02
366 03:53:27.409002 PCI: 00:07.0 disabled by fw_config
367 03:53:27.412411 PCI: 00:07.1 disabled by fw_config
368 03:53:27.418957 PCI: 00:0d.2 disabled by fw_config
369 03:53:27.422541 PCI: 00:1c.7 disabled by fw_config
370 03:53:27.425570 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
371 03:53:27.432371 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
372 03:53:27.438842 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
373 03:53:27.442237 GENERIC: 0.0 disabled by fw_config
374 03:53:27.445599 GENERIC: 1.0 disabled by fw_config
375 03:53:27.448810 fw_config match found: DB_USB=USB3_ACTIVE
376 03:53:27.451988 fw_config match found: DB_USB=USB3_ACTIVE
377 03:53:27.455421 fw_config match found: DB_USB=USB3_ACTIVE
378 03:53:27.462290 fw_config match found: DB_USB=USB3_ACTIVE
379 03:53:27.465302 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
380 03:53:27.472352 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
381 03:53:27.481699 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
382 03:53:27.488396 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
383 03:53:27.491793 microcode: sig=0x806c1 pf=0x80 revision=0x86
384 03:53:27.498355 microcode: Update skipped, already up-to-date
385 03:53:27.504875 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
386 03:53:27.532677 Detected 4 core, 8 thread CPU.
387 03:53:27.536332 Setting up SMI for CPU
388 03:53:27.539579 IED base = 0x7b400000
389 03:53:27.539761 IED size = 0x00400000
390 03:53:27.543070 Will perform SMM setup.
391 03:53:27.549484 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
392 03:53:27.556125 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
393 03:53:27.562800 Processing 16 relocs. Offset value of 0x00030000
394 03:53:27.566111 Attempting to start 7 APs
395 03:53:27.569292 Waiting for 10ms after sending INIT.
396 03:53:27.584888 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
397 03:53:27.585471 done.
398 03:53:27.588083 AP: slot 6 apic_id 2.
399 03:53:27.591637 AP: slot 2 apic_id 3.
400 03:53:27.592048 AP: slot 4 apic_id 7.
401 03:53:27.594635 AP: slot 5 apic_id 6.
402 03:53:27.598072 AP: slot 3 apic_id 4.
403 03:53:27.598296 AP: slot 7 apic_id 5.
404 03:53:27.604556 Waiting for 2nd SIPI to complete...done.
405 03:53:27.611457 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
406 03:53:27.617846 Processing 13 relocs. Offset value of 0x00038000
407 03:53:27.618045 Unable to locate Global NVS
408 03:53:27.627778 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
409 03:53:27.631093 Installing permanent SMM handler to 0x7b000000
410 03:53:27.640995 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
411 03:53:27.644538 Processing 794 relocs. Offset value of 0x7b010000
412 03:53:27.654782 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
413 03:53:27.657756 Processing 13 relocs. Offset value of 0x7b008000
414 03:53:27.664450 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
415 03:53:27.671310 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
416 03:53:27.674424 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
417 03:53:27.681168 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
418 03:53:27.687683 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
419 03:53:27.694215 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
420 03:53:27.700946 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
421 03:53:27.701411 Unable to locate Global NVS
422 03:53:27.710816 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
423 03:53:27.714042 Clearing SMI status registers
424 03:53:27.714284 SMI_STS: PM1
425 03:53:27.717163 PM1_STS: PWRBTN
426 03:53:27.724071 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
427 03:53:27.726961 In relocation handler: CPU 0
428 03:53:27.730497 New SMBASE=0x7b000000 IEDBASE=0x7b400000
429 03:53:27.737181 Writing SMRR. base = 0x7b000006, mask=0xff800c00
430 03:53:27.737271 Relocation complete.
431 03:53:27.747036 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
432 03:53:27.747125 In relocation handler: CPU 1
433 03:53:27.753647 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
434 03:53:27.753737 Relocation complete.
435 03:53:27.763741 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
436 03:53:27.763831 In relocation handler: CPU 7
437 03:53:27.770232 New SMBASE=0x7affe400 IEDBASE=0x7b400000
438 03:53:27.770321 Relocation complete.
439 03:53:27.780345 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
440 03:53:27.780435 In relocation handler: CPU 3
441 03:53:27.786522 New SMBASE=0x7afff400 IEDBASE=0x7b400000
442 03:53:27.790046 Writing SMRR. base = 0x7b000006, mask=0xff800c00
443 03:53:27.793540 Relocation complete.
444 03:53:27.800193 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
445 03:53:27.803448 In relocation handler: CPU 5
446 03:53:27.806837 New SMBASE=0x7affec00 IEDBASE=0x7b400000
447 03:53:27.813554 Writing SMRR. base = 0x7b000006, mask=0xff800c00
448 03:53:27.814010 Relocation complete.
449 03:53:27.820462 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
450 03:53:27.823608 In relocation handler: CPU 4
451 03:53:27.830157 New SMBASE=0x7afff000 IEDBASE=0x7b400000
452 03:53:27.830484 Relocation complete.
453 03:53:27.836305 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
454 03:53:27.839527 In relocation handler: CPU 6
455 03:53:27.846501 New SMBASE=0x7affe800 IEDBASE=0x7b400000
456 03:53:27.849502 Writing SMRR. base = 0x7b000006, mask=0xff800c00
457 03:53:27.853168 Relocation complete.
458 03:53:27.859460 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
459 03:53:27.862935 In relocation handler: CPU 2
460 03:53:27.866244 New SMBASE=0x7afff800 IEDBASE=0x7b400000
461 03:53:27.869386 Relocation complete.
462 03:53:27.869710 Initializing CPU #0
463 03:53:27.872747 CPU: vendor Intel device 806c1
464 03:53:27.876023 CPU: family 06, model 8c, stepping 01
465 03:53:27.879609 Clearing out pending MCEs
466 03:53:27.882777 Setting up local APIC...
467 03:53:27.885777 apic_id: 0x00 done.
468 03:53:27.889168 Turbo is available but hidden
469 03:53:27.892533 Turbo is available and visible
470 03:53:27.895963 microcode: Update skipped, already up-to-date
471 03:53:27.899365 CPU #0 initialized
472 03:53:27.899702 Initializing CPU #4
473 03:53:27.902585 Initializing CPU #5
474 03:53:27.905970 CPU: vendor Intel device 806c1
475 03:53:27.909058 CPU: family 06, model 8c, stepping 01
476 03:53:27.912281 CPU: vendor Intel device 806c1
477 03:53:27.915568 CPU: family 06, model 8c, stepping 01
478 03:53:27.918974 Clearing out pending MCEs
479 03:53:27.922344 Clearing out pending MCEs
480 03:53:27.922431 Setting up local APIC...
481 03:53:27.925709 Initializing CPU #1
482 03:53:27.928967 Initializing CPU #2
483 03:53:27.929083 Initializing CPU #6
484 03:53:27.932036 CPU: vendor Intel device 806c1
485 03:53:27.935556 CPU: family 06, model 8c, stepping 01
486 03:53:27.938972 CPU: vendor Intel device 806c1
487 03:53:27.942516 CPU: family 06, model 8c, stepping 01
488 03:53:27.945549 Clearing out pending MCEs
489 03:53:27.948836 CPU: vendor Intel device 806c1
490 03:53:27.952128 CPU: family 06, model 8c, stepping 01
491 03:53:27.955630 Setting up local APIC...
492 03:53:27.958854 Clearing out pending MCEs
493 03:53:27.962137 apic_id: 0x03 done.
494 03:53:27.962605 Clearing out pending MCEs
495 03:53:27.966426 Setting up local APIC...
496 03:53:27.969819 Initializing CPU #3
497 03:53:27.970267 Initializing CPU #7
498 03:53:27.973747 CPU: vendor Intel device 806c1
499 03:53:27.976665 CPU: family 06, model 8c, stepping 01
500 03:53:27.980102 CPU: vendor Intel device 806c1
501 03:53:27.983903 CPU: family 06, model 8c, stepping 01
502 03:53:27.986759 Setting up local APIC...
503 03:53:27.989731 Clearing out pending MCEs
504 03:53:27.993109 Clearing out pending MCEs
505 03:53:27.993427 Setting up local APIC...
506 03:53:27.996381 apic_id: 0x01 done.
507 03:53:27.999652 Setting up local APIC...
508 03:53:27.999894 apic_id: 0x04 done.
509 03:53:28.003259 Setting up local APIC...
510 03:53:28.006601 apic_id: 0x02 done.
511 03:53:28.009771 microcode: Update skipped, already up-to-date
512 03:53:28.016347 microcode: Update skipped, already up-to-date
513 03:53:28.016591 CPU #2 initialized
514 03:53:28.019732 CPU #6 initialized
515 03:53:28.023035 microcode: Update skipped, already up-to-date
516 03:53:28.026284 microcode: Update skipped, already up-to-date
517 03:53:28.029628 apic_id: 0x05 done.
518 03:53:28.033077 CPU #3 initialized
519 03:53:28.036487 microcode: Update skipped, already up-to-date
520 03:53:28.039582 apic_id: 0x07 done.
521 03:53:28.039844 apic_id: 0x06 done.
522 03:53:28.043125 CPU #7 initialized
523 03:53:28.046397 microcode: Update skipped, already up-to-date
524 03:53:28.052950 microcode: Update skipped, already up-to-date
525 03:53:28.053395 CPU #4 initialized
526 03:53:28.056384 CPU #5 initialized
527 03:53:28.059964 CPU #1 initialized
528 03:53:28.063132 bsp_do_flight_plan done after 454 msecs.
529 03:53:28.066271 CPU: frequency set to 4400 MHz
530 03:53:28.066821 Enabling SMIs.
531 03:53:28.072743 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 346 / 317 ms
532 03:53:28.089288 SATAXPCIE1 indicates PCIe NVMe is present
533 03:53:28.092602 Probing TPM: done!
534 03:53:28.096007 Connected to device vid:did:rid of 1ae0:0028:00
535 03:53:28.106698 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
536 03:53:28.109895 Initialized TPM device CR50 revision 0
537 03:53:28.113109 Enabling S0i3.4
538 03:53:28.119602 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
539 03:53:28.123097 Found a VBT of 8704 bytes after decompression
540 03:53:28.129677 cse_lite: CSE RO boot. HybridStorageMode disabled
541 03:53:28.136065 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
542 03:53:28.211243 FSPS returned 0
543 03:53:28.214528 Executing Phase 1 of FspMultiPhaseSiInit
544 03:53:28.224411 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
545 03:53:28.227886 port C0 DISC req: usage 1 usb3 1 usb2 5
546 03:53:28.231136 Raw Buffer output 0 00000511
547 03:53:28.234443 Raw Buffer output 1 00000000
548 03:53:28.238487 pmc_send_ipc_cmd succeeded
549 03:53:28.244936 port C1 DISC req: usage 1 usb3 2 usb2 3
550 03:53:28.245017 Raw Buffer output 0 00000321
551 03:53:28.248417 Raw Buffer output 1 00000000
552 03:53:28.252334 pmc_send_ipc_cmd succeeded
553 03:53:28.257503 Detected 4 core, 8 thread CPU.
554 03:53:28.260520 Detected 4 core, 8 thread CPU.
555 03:53:28.461604 Display FSP Version Info HOB
556 03:53:28.464949 Reference Code - CPU = a.0.4c.31
557 03:53:28.468334 uCode Version = 0.0.0.86
558 03:53:28.471438 TXT ACM version = ff.ff.ff.ffff
559 03:53:28.474580 Reference Code - ME = a.0.4c.31
560 03:53:28.477980 MEBx version = 0.0.0.0
561 03:53:28.481449 ME Firmware Version = Consumer SKU
562 03:53:28.484537 Reference Code - PCH = a.0.4c.31
563 03:53:28.487796 PCH-CRID Status = Disabled
564 03:53:28.491143 PCH-CRID Original Value = ff.ff.ff.ffff
565 03:53:28.494536 PCH-CRID New Value = ff.ff.ff.ffff
566 03:53:28.497824 OPROM - RST - RAID = ff.ff.ff.ffff
567 03:53:28.501148 PCH Hsio Version = 4.0.0.0
568 03:53:28.504522 Reference Code - SA - System Agent = a.0.4c.31
569 03:53:28.507824 Reference Code - MRC = 2.0.0.1
570 03:53:28.511196 SA - PCIe Version = a.0.4c.31
571 03:53:28.514519 SA-CRID Status = Disabled
572 03:53:28.517725 SA-CRID Original Value = 0.0.0.1
573 03:53:28.520993 SA-CRID New Value = 0.0.0.1
574 03:53:28.524516 OPROM - VBIOS = ff.ff.ff.ffff
575 03:53:28.527819 IO Manageability Engine FW Version = 11.1.4.0
576 03:53:28.531273 PHY Build Version = 0.0.0.e0
577 03:53:28.534252 Thunderbolt(TM) FW Version = 0.0.0.0
578 03:53:28.540946 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
579 03:53:28.544269 ITSS IRQ Polarities Before:
580 03:53:28.544506 IPC0: 0xffffffff
581 03:53:28.548312 IPC1: 0xffffffff
582 03:53:28.548610 IPC2: 0xffffffff
583 03:53:28.551925 IPC3: 0xffffffff
584 03:53:28.552309 ITSS IRQ Polarities After:
585 03:53:28.555241 IPC0: 0xffffffff
586 03:53:28.558476 IPC1: 0xffffffff
587 03:53:28.558956 IPC2: 0xffffffff
588 03:53:28.561919 IPC3: 0xffffffff
589 03:53:28.564999 Found PCIe Root Port #9 at PCI: 00:1d.0.
590 03:53:28.575168 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
591 03:53:28.588403 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
592 03:53:28.601746 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
593 03:53:28.608206 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
594 03:53:28.608716 Enumerating buses...
595 03:53:28.614672 Show all devs... Before device enumeration.
596 03:53:28.615118 Root Device: enabled 1
597 03:53:28.618029 DOMAIN: 0000: enabled 1
598 03:53:28.621381 CPU_CLUSTER: 0: enabled 1
599 03:53:28.624635 PCI: 00:00.0: enabled 1
600 03:53:28.625129 PCI: 00:02.0: enabled 1
601 03:53:28.627807 PCI: 00:04.0: enabled 1
602 03:53:28.631256 PCI: 00:05.0: enabled 1
603 03:53:28.634500 PCI: 00:06.0: enabled 0
604 03:53:28.634976 PCI: 00:07.0: enabled 0
605 03:53:28.638104 PCI: 00:07.1: enabled 0
606 03:53:28.641199 PCI: 00:07.2: enabled 0
607 03:53:28.644460 PCI: 00:07.3: enabled 0
608 03:53:28.644909 PCI: 00:08.0: enabled 1
609 03:53:28.647962 PCI: 00:09.0: enabled 0
610 03:53:28.651137 PCI: 00:0a.0: enabled 0
611 03:53:28.654430 PCI: 00:0d.0: enabled 1
612 03:53:28.654922 PCI: 00:0d.1: enabled 0
613 03:53:28.657838 PCI: 00:0d.2: enabled 0
614 03:53:28.661278 PCI: 00:0d.3: enabled 0
615 03:53:28.661725 PCI: 00:0e.0: enabled 0
616 03:53:28.664793 PCI: 00:10.2: enabled 1
617 03:53:28.668024 PCI: 00:10.6: enabled 0
618 03:53:28.670953 PCI: 00:10.7: enabled 0
619 03:53:28.671404 PCI: 00:12.0: enabled 0
620 03:53:28.674471 PCI: 00:12.6: enabled 0
621 03:53:28.677655 PCI: 00:13.0: enabled 0
622 03:53:28.681230 PCI: 00:14.0: enabled 1
623 03:53:28.681678 PCI: 00:14.1: enabled 0
624 03:53:28.684354 PCI: 00:14.2: enabled 1
625 03:53:28.687909 PCI: 00:14.3: enabled 1
626 03:53:28.691314 PCI: 00:15.0: enabled 1
627 03:53:28.691763 PCI: 00:15.1: enabled 1
628 03:53:28.694395 PCI: 00:15.2: enabled 1
629 03:53:28.697465 PCI: 00:15.3: enabled 1
630 03:53:28.697911 PCI: 00:16.0: enabled 1
631 03:53:28.700780 PCI: 00:16.1: enabled 0
632 03:53:28.704278 PCI: 00:16.2: enabled 0
633 03:53:28.707645 PCI: 00:16.3: enabled 0
634 03:53:28.708090 PCI: 00:16.4: enabled 0
635 03:53:28.710754 PCI: 00:16.5: enabled 0
636 03:53:28.714335 PCI: 00:17.0: enabled 1
637 03:53:28.717436 PCI: 00:19.0: enabled 0
638 03:53:28.717928 PCI: 00:19.1: enabled 1
639 03:53:28.720721 PCI: 00:19.2: enabled 0
640 03:53:28.724079 PCI: 00:1c.0: enabled 1
641 03:53:28.727381 PCI: 00:1c.1: enabled 0
642 03:53:28.727829 PCI: 00:1c.2: enabled 0
643 03:53:28.731152 PCI: 00:1c.3: enabled 0
644 03:53:28.734271 PCI: 00:1c.4: enabled 0
645 03:53:28.738038 PCI: 00:1c.5: enabled 0
646 03:53:28.738487 PCI: 00:1c.6: enabled 1
647 03:53:28.740764 PCI: 00:1c.7: enabled 0
648 03:53:28.744088 PCI: 00:1d.0: enabled 1
649 03:53:28.744534 PCI: 00:1d.1: enabled 0
650 03:53:28.747513 PCI: 00:1d.2: enabled 1
651 03:53:28.750675 PCI: 00:1d.3: enabled 0
652 03:53:28.754047 PCI: 00:1e.0: enabled 1
653 03:53:28.754488 PCI: 00:1e.1: enabled 0
654 03:53:28.757465 PCI: 00:1e.2: enabled 1
655 03:53:28.760828 PCI: 00:1e.3: enabled 1
656 03:53:28.763966 PCI: 00:1f.0: enabled 1
657 03:53:28.764420 PCI: 00:1f.1: enabled 0
658 03:53:28.767325 PCI: 00:1f.2: enabled 1
659 03:53:28.770832 PCI: 00:1f.3: enabled 1
660 03:53:28.774052 PCI: 00:1f.4: enabled 0
661 03:53:28.774505 PCI: 00:1f.5: enabled 1
662 03:53:28.777255 PCI: 00:1f.6: enabled 0
663 03:53:28.780512 PCI: 00:1f.7: enabled 0
664 03:53:28.780967 APIC: 00: enabled 1
665 03:53:28.784104 GENERIC: 0.0: enabled 1
666 03:53:28.786968 GENERIC: 0.0: enabled 1
667 03:53:28.790446 GENERIC: 1.0: enabled 1
668 03:53:28.790925 GENERIC: 0.0: enabled 1
669 03:53:28.793931 GENERIC: 1.0: enabled 1
670 03:53:28.797298 USB0 port 0: enabled 1
671 03:53:28.797748 GENERIC: 0.0: enabled 1
672 03:53:28.800622 USB0 port 0: enabled 1
673 03:53:28.803718 GENERIC: 0.0: enabled 1
674 03:53:28.807048 I2C: 00:1a: enabled 1
675 03:53:28.807519 I2C: 00:31: enabled 1
676 03:53:28.810475 I2C: 00:32: enabled 1
677 03:53:28.813943 I2C: 00:10: enabled 1
678 03:53:28.814389 I2C: 00:15: enabled 1
679 03:53:28.817153 GENERIC: 0.0: enabled 0
680 03:53:28.820353 GENERIC: 1.0: enabled 0
681 03:53:28.823664 GENERIC: 0.0: enabled 1
682 03:53:28.824111 SPI: 00: enabled 1
683 03:53:28.827138 SPI: 00: enabled 1
684 03:53:28.827588 PNP: 0c09.0: enabled 1
685 03:53:28.831097 GENERIC: 0.0: enabled 1
686 03:53:28.833828 USB3 port 0: enabled 1
687 03:53:28.837245 USB3 port 1: enabled 1
688 03:53:28.837693 USB3 port 2: enabled 0
689 03:53:28.840219 USB3 port 3: enabled 0
690 03:53:28.843594 USB2 port 0: enabled 0
691 03:53:28.844044 USB2 port 1: enabled 1
692 03:53:28.846963 USB2 port 2: enabled 1
693 03:53:28.850498 USB2 port 3: enabled 0
694 03:53:28.850968 USB2 port 4: enabled 1
695 03:53:28.853638 USB2 port 5: enabled 0
696 03:53:28.856939 USB2 port 6: enabled 0
697 03:53:28.860316 USB2 port 7: enabled 0
698 03:53:28.860803 USB2 port 8: enabled 0
699 03:53:28.863534 USB2 port 9: enabled 0
700 03:53:28.867105 USB3 port 0: enabled 0
701 03:53:28.867561 USB3 port 1: enabled 1
702 03:53:28.870453 USB3 port 2: enabled 0
703 03:53:28.873549 USB3 port 3: enabled 0
704 03:53:28.876930 GENERIC: 0.0: enabled 1
705 03:53:28.877384 GENERIC: 1.0: enabled 1
706 03:53:28.880220 APIC: 01: enabled 1
707 03:53:28.883571 APIC: 03: enabled 1
708 03:53:28.884027 APIC: 04: enabled 1
709 03:53:28.886889 APIC: 07: enabled 1
710 03:53:28.887393 APIC: 06: enabled 1
711 03:53:28.890002 APIC: 02: enabled 1
712 03:53:28.893392 APIC: 05: enabled 1
713 03:53:28.893714 Compare with tree...
714 03:53:28.896698 Root Device: enabled 1
715 03:53:28.899954 DOMAIN: 0000: enabled 1
716 03:53:28.903270 PCI: 00:00.0: enabled 1
717 03:53:28.903509 PCI: 00:02.0: enabled 1
718 03:53:28.906557 PCI: 00:04.0: enabled 1
719 03:53:28.910098 GENERIC: 0.0: enabled 1
720 03:53:28.913162 PCI: 00:05.0: enabled 1
721 03:53:28.916453 PCI: 00:06.0: enabled 0
722 03:53:28.916691 PCI: 00:07.0: enabled 0
723 03:53:28.919828 GENERIC: 0.0: enabled 1
724 03:53:28.923363 PCI: 00:07.1: enabled 0
725 03:53:28.926652 GENERIC: 1.0: enabled 1
726 03:53:28.930220 PCI: 00:07.2: enabled 0
727 03:53:28.930697 GENERIC: 0.0: enabled 1
728 03:53:28.933273 PCI: 00:07.3: enabled 0
729 03:53:28.936592 GENERIC: 1.0: enabled 1
730 03:53:28.940068 PCI: 00:08.0: enabled 1
731 03:53:28.943356 PCI: 00:09.0: enabled 0
732 03:53:28.943804 PCI: 00:0a.0: enabled 0
733 03:53:28.946906 PCI: 00:0d.0: enabled 1
734 03:53:28.950002 USB0 port 0: enabled 1
735 03:53:28.953201 USB3 port 0: enabled 1
736 03:53:28.956408 USB3 port 1: enabled 1
737 03:53:28.956889 USB3 port 2: enabled 0
738 03:53:28.959909 USB3 port 3: enabled 0
739 03:53:28.963268 PCI: 00:0d.1: enabled 0
740 03:53:28.966413 PCI: 00:0d.2: enabled 0
741 03:53:28.969861 GENERIC: 0.0: enabled 1
742 03:53:28.970309 PCI: 00:0d.3: enabled 0
743 03:53:28.973081 PCI: 00:0e.0: enabled 0
744 03:53:28.976545 PCI: 00:10.2: enabled 1
745 03:53:28.979820 PCI: 00:10.6: enabled 0
746 03:53:28.982992 PCI: 00:10.7: enabled 0
747 03:53:28.983314 PCI: 00:12.0: enabled 0
748 03:53:28.986466 PCI: 00:12.6: enabled 0
749 03:53:28.989410 PCI: 00:13.0: enabled 0
750 03:53:28.992790 PCI: 00:14.0: enabled 1
751 03:53:28.996232 USB0 port 0: enabled 1
752 03:53:28.996475 USB2 port 0: enabled 0
753 03:53:28.999311 USB2 port 1: enabled 1
754 03:53:29.002764 USB2 port 2: enabled 1
755 03:53:29.006165 USB2 port 3: enabled 0
756 03:53:29.009542 USB2 port 4: enabled 1
757 03:53:29.012898 USB2 port 5: enabled 0
758 03:53:29.013139 USB2 port 6: enabled 0
759 03:53:29.016210 USB2 port 7: enabled 0
760 03:53:29.019412 USB2 port 8: enabled 0
761 03:53:29.022840 USB2 port 9: enabled 0
762 03:53:29.026194 USB3 port 0: enabled 0
763 03:53:29.029423 USB3 port 1: enabled 1
764 03:53:29.029872 USB3 port 2: enabled 0
765 03:53:29.032987 USB3 port 3: enabled 0
766 03:53:29.036296 PCI: 00:14.1: enabled 0
767 03:53:29.039650 PCI: 00:14.2: enabled 1
768 03:53:29.042612 PCI: 00:14.3: enabled 1
769 03:53:29.043067 GENERIC: 0.0: enabled 1
770 03:53:29.046027 PCI: 00:15.0: enabled 1
771 03:53:29.049548 I2C: 00:1a: enabled 1
772 03:53:29.052716 I2C: 00:31: enabled 1
773 03:53:29.053169 I2C: 00:32: enabled 1
774 03:53:29.055845 PCI: 00:15.1: enabled 1
775 03:53:29.059441 I2C: 00:10: enabled 1
776 03:53:29.062555 PCI: 00:15.2: enabled 1
777 03:53:29.065781 PCI: 00:15.3: enabled 1
778 03:53:29.066231 PCI: 00:16.0: enabled 1
779 03:53:29.069400 PCI: 00:16.1: enabled 0
780 03:53:29.072479 PCI: 00:16.2: enabled 0
781 03:53:29.075944 PCI: 00:16.3: enabled 0
782 03:53:29.079008 PCI: 00:16.4: enabled 0
783 03:53:29.079463 PCI: 00:16.5: enabled 0
784 03:53:29.082651 PCI: 00:17.0: enabled 1
785 03:53:29.085898 PCI: 00:19.0: enabled 0
786 03:53:29.089014 PCI: 00:19.1: enabled 1
787 03:53:29.092676 I2C: 00:15: enabled 1
788 03:53:29.093132 PCI: 00:19.2: enabled 0
789 03:53:29.095782 PCI: 00:1d.0: enabled 1
790 03:53:29.099183 GENERIC: 0.0: enabled 1
791 03:53:29.102400 PCI: 00:1e.0: enabled 1
792 03:53:29.105707 PCI: 00:1e.1: enabled 0
793 03:53:29.106158 PCI: 00:1e.2: enabled 1
794 03:53:29.108953 SPI: 00: enabled 1
795 03:53:29.112569 PCI: 00:1e.3: enabled 1
796 03:53:29.115800 SPI: 00: enabled 1
797 03:53:29.116251 PCI: 00:1f.0: enabled 1
798 03:53:29.119177 PNP: 0c09.0: enabled 1
799 03:53:29.122301 PCI: 00:1f.1: enabled 0
800 03:53:29.125715 PCI: 00:1f.2: enabled 1
801 03:53:29.129235 GENERIC: 0.0: enabled 1
802 03:53:29.129890 GENERIC: 0.0: enabled 1
803 03:53:29.132155 GENERIC: 1.0: enabled 1
804 03:53:29.135582 PCI: 00:1f.3: enabled 1
805 03:53:29.138496 PCI: 00:1f.4: enabled 0
806 03:53:29.141927 PCI: 00:1f.5: enabled 1
807 03:53:29.142377 PCI: 00:1f.6: enabled 0
808 03:53:29.194112 PCI: 00:1f.7: enabled 0
809 03:53:29.194776 CPU_CLUSTER: 0: enabled 1
810 03:53:29.195183 APIC: 00: enabled 1
811 03:53:29.195599 APIC: 01: enabled 1
812 03:53:29.195993 APIC: 03: enabled 1
813 03:53:29.196665 APIC: 04: enabled 1
814 03:53:29.197014 APIC: 07: enabled 1
815 03:53:29.197335 APIC: 06: enabled 1
816 03:53:29.197650 APIC: 02: enabled 1
817 03:53:29.197959 APIC: 05: enabled 1
818 03:53:29.198260 Root Device scanning...
819 03:53:29.198559 scan_static_bus for Root Device
820 03:53:29.198905 DOMAIN: 0000 enabled
821 03:53:29.199207 CPU_CLUSTER: 0 enabled
822 03:53:29.199503 DOMAIN: 0000 scanning...
823 03:53:29.199801 PCI: pci_scan_bus for bus 00
824 03:53:29.200094 PCI: 00:00.0 [8086/0000] ops
825 03:53:29.200389 PCI: 00:00.0 [8086/9a12] enabled
826 03:53:29.200682 PCI: 00:02.0 [8086/0000] bus ops
827 03:53:29.244185 PCI: 00:02.0 [8086/9a40] enabled
828 03:53:29.244821 PCI: 00:04.0 [8086/0000] bus ops
829 03:53:29.245270 PCI: 00:04.0 [8086/9a03] enabled
830 03:53:29.245661 PCI: 00:05.0 [8086/9a19] enabled
831 03:53:29.246414 PCI: 00:07.0 [0000/0000] hidden
832 03:53:29.246835 PCI: 00:08.0 [8086/9a11] enabled
833 03:53:29.247164 PCI: 00:0a.0 [8086/9a0d] disabled
834 03:53:29.247478 PCI: 00:0d.0 [8086/0000] bus ops
835 03:53:29.247789 PCI: 00:0d.0 [8086/9a13] enabled
836 03:53:29.248091 PCI: 00:14.0 [8086/0000] bus ops
837 03:53:29.248390 PCI: 00:14.0 [8086/a0ed] enabled
838 03:53:29.248687 PCI: 00:14.2 [8086/a0ef] enabled
839 03:53:29.248984 PCI: 00:14.3 [8086/0000] bus ops
840 03:53:29.249278 PCI: 00:14.3 [8086/a0f0] enabled
841 03:53:29.249572 PCI: 00:15.0 [8086/0000] bus ops
842 03:53:29.278676 PCI: 00:15.0 [8086/a0e8] enabled
843 03:53:29.279056 PCI: 00:15.1 [8086/0000] bus ops
844 03:53:29.279377 PCI: 00:15.1 [8086/a0e9] enabled
845 03:53:29.279683 PCI: 00:15.2 [8086/0000] bus ops
846 03:53:29.280269 PCI: 00:15.2 [8086/a0ea] enabled
847 03:53:29.280537 PCI: 00:15.3 [8086/0000] bus ops
848 03:53:29.280830 PCI: 00:15.3 [8086/a0eb] enabled
849 03:53:29.281110 PCI: 00:16.0 [8086/0000] ops
850 03:53:29.281387 PCI: 00:16.0 [8086/a0e0] enabled
851 03:53:29.282474 PCI: Static device PCI: 00:17.0 not found, disabling it.
852 03:53:29.282827 PCI: 00:19.0 [8086/0000] bus ops
853 03:53:29.285569 PCI: 00:19.0 [8086/a0c5] disabled
854 03:53:29.288993 PCI: 00:19.1 [8086/0000] bus ops
855 03:53:29.292163 PCI: 00:19.1 [8086/a0c6] enabled
856 03:53:29.295576 PCI: 00:1d.0 [8086/0000] bus ops
857 03:53:29.298949 PCI: 00:1d.0 [8086/a0b0] enabled
858 03:53:29.302402 PCI: 00:1e.0 [8086/0000] ops
859 03:53:29.305507 PCI: 00:1e.0 [8086/a0a8] enabled
860 03:53:29.308827 PCI: 00:1e.2 [8086/0000] bus ops
861 03:53:29.312114 PCI: 00:1e.2 [8086/a0aa] enabled
862 03:53:29.315761 PCI: 00:1e.3 [8086/0000] bus ops
863 03:53:29.318792 PCI: 00:1e.3 [8086/a0ab] enabled
864 03:53:29.322158 PCI: 00:1f.0 [8086/0000] bus ops
865 03:53:29.325442 PCI: 00:1f.0 [8086/a087] enabled
866 03:53:29.325966 RTC Init
867 03:53:29.328734 Set power on after power failure.
868 03:53:29.332166 Disabling Deep S3
869 03:53:29.335386 Disabling Deep S3
870 03:53:29.335839 Disabling Deep S4
871 03:53:29.338556 Disabling Deep S4
872 03:53:29.339035 Disabling Deep S5
873 03:53:29.342006 Disabling Deep S5
874 03:53:29.345441 PCI: 00:1f.2 [0000/0000] hidden
875 03:53:29.348721 PCI: 00:1f.3 [8086/0000] bus ops
876 03:53:29.351857 PCI: 00:1f.3 [8086/a0c8] enabled
877 03:53:29.355207 PCI: 00:1f.5 [8086/0000] bus ops
878 03:53:29.358673 PCI: 00:1f.5 [8086/a0a4] enabled
879 03:53:29.362055 PCI: Leftover static devices:
880 03:53:29.362514 PCI: 00:10.2
881 03:53:29.365368 PCI: 00:10.6
882 03:53:29.365821 PCI: 00:10.7
883 03:53:29.366261 PCI: 00:06.0
884 03:53:29.368365 PCI: 00:07.1
885 03:53:29.368817 PCI: 00:07.2
886 03:53:29.371829 PCI: 00:07.3
887 03:53:29.372284 PCI: 00:09.0
888 03:53:29.372723 PCI: 00:0d.1
889 03:53:29.375090 PCI: 00:0d.2
890 03:53:29.375543 PCI: 00:0d.3
891 03:53:29.378486 PCI: 00:0e.0
892 03:53:29.378972 PCI: 00:12.0
893 03:53:29.381640 PCI: 00:12.6
894 03:53:29.382094 PCI: 00:13.0
895 03:53:29.382534 PCI: 00:14.1
896 03:53:29.385214 PCI: 00:16.1
897 03:53:29.385671 PCI: 00:16.2
898 03:53:29.388416 PCI: 00:16.3
899 03:53:29.388870 PCI: 00:16.4
900 03:53:29.389312 PCI: 00:16.5
901 03:53:29.391726 PCI: 00:17.0
902 03:53:29.392179 PCI: 00:19.2
903 03:53:29.394795 PCI: 00:1e.1
904 03:53:29.395251 PCI: 00:1f.1
905 03:53:29.398372 PCI: 00:1f.4
906 03:53:29.398863 PCI: 00:1f.6
907 03:53:29.399307 PCI: 00:1f.7
908 03:53:29.401747 PCI: Check your devicetree.cb.
909 03:53:29.405087 PCI: 00:02.0 scanning...
910 03:53:29.408255 scan_generic_bus for PCI: 00:02.0
911 03:53:29.411425 scan_generic_bus for PCI: 00:02.0 done
912 03:53:29.418198 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
913 03:53:29.421309 PCI: 00:04.0 scanning...
914 03:53:29.424689 scan_generic_bus for PCI: 00:04.0
915 03:53:29.425145 GENERIC: 0.0 enabled
916 03:53:29.431532 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
917 03:53:29.437771 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
918 03:53:29.438097 PCI: 00:0d.0 scanning...
919 03:53:29.441154 scan_static_bus for PCI: 00:0d.0
920 03:53:29.444601 USB0 port 0 enabled
921 03:53:29.447799 USB0 port 0 scanning...
922 03:53:29.451504 scan_static_bus for USB0 port 0
923 03:53:29.451977 USB3 port 0 enabled
924 03:53:29.454667 USB3 port 1 enabled
925 03:53:29.457980 USB3 port 2 disabled
926 03:53:29.458434 USB3 port 3 disabled
927 03:53:29.461230 USB3 port 0 scanning...
928 03:53:29.464329 scan_static_bus for USB3 port 0
929 03:53:29.467775 scan_static_bus for USB3 port 0 done
930 03:53:29.474284 scan_bus: bus USB3 port 0 finished in 6 msecs
931 03:53:29.474767 USB3 port 1 scanning...
932 03:53:29.477633 scan_static_bus for USB3 port 1
933 03:53:29.484236 scan_static_bus for USB3 port 1 done
934 03:53:29.487699 scan_bus: bus USB3 port 1 finished in 6 msecs
935 03:53:29.490766 scan_static_bus for USB0 port 0 done
936 03:53:29.494476 scan_bus: bus USB0 port 0 finished in 43 msecs
937 03:53:29.500934 scan_static_bus for PCI: 00:0d.0 done
938 03:53:29.504279 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
939 03:53:29.507381 PCI: 00:14.0 scanning...
940 03:53:29.510744 scan_static_bus for PCI: 00:14.0
941 03:53:29.514020 USB0 port 0 enabled
942 03:53:29.514640 USB0 port 0 scanning...
943 03:53:29.517485 scan_static_bus for USB0 port 0
944 03:53:29.520938 USB2 port 0 disabled
945 03:53:29.523820 USB2 port 1 enabled
946 03:53:29.524274 USB2 port 2 enabled
947 03:53:29.527398 USB2 port 3 disabled
948 03:53:29.527854 USB2 port 4 enabled
949 03:53:29.530835 USB2 port 5 disabled
950 03:53:29.533853 USB2 port 6 disabled
951 03:53:29.534314 USB2 port 7 disabled
952 03:53:29.537365 USB2 port 8 disabled
953 03:53:29.540712 USB2 port 9 disabled
954 03:53:29.541160 USB3 port 0 disabled
955 03:53:29.543902 USB3 port 1 enabled
956 03:53:29.547122 USB3 port 2 disabled
957 03:53:29.547568 USB3 port 3 disabled
958 03:53:29.550784 USB2 port 1 scanning...
959 03:53:29.553768 scan_static_bus for USB2 port 1
960 03:53:29.557093 scan_static_bus for USB2 port 1 done
961 03:53:29.563652 scan_bus: bus USB2 port 1 finished in 6 msecs
962 03:53:29.564100 USB2 port 2 scanning...
963 03:53:29.566979 scan_static_bus for USB2 port 2
964 03:53:29.570278 scan_static_bus for USB2 port 2 done
965 03:53:29.577194 scan_bus: bus USB2 port 2 finished in 6 msecs
966 03:53:29.580295 USB2 port 4 scanning...
967 03:53:29.583556 scan_static_bus for USB2 port 4
968 03:53:29.586680 scan_static_bus for USB2 port 4 done
969 03:53:29.590280 scan_bus: bus USB2 port 4 finished in 6 msecs
970 03:53:29.593585 USB3 port 1 scanning...
971 03:53:29.596665 scan_static_bus for USB3 port 1
972 03:53:29.600201 scan_static_bus for USB3 port 1 done
973 03:53:29.603365 scan_bus: bus USB3 port 1 finished in 6 msecs
974 03:53:29.610057 scan_static_bus for USB0 port 0 done
975 03:53:29.613286 scan_bus: bus USB0 port 0 finished in 93 msecs
976 03:53:29.616579 scan_static_bus for PCI: 00:14.0 done
977 03:53:29.623284 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
978 03:53:29.623910 PCI: 00:14.3 scanning...
979 03:53:29.626591 scan_static_bus for PCI: 00:14.3
980 03:53:29.629796 GENERIC: 0.0 enabled
981 03:53:29.633021 scan_static_bus for PCI: 00:14.3 done
982 03:53:29.639957 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
983 03:53:29.640560 PCI: 00:15.0 scanning...
984 03:53:29.646174 scan_static_bus for PCI: 00:15.0
985 03:53:29.646612 I2C: 00:1a enabled
986 03:53:29.649608 I2C: 00:31 enabled
987 03:53:29.649969 I2C: 00:32 enabled
988 03:53:29.652900 scan_static_bus for PCI: 00:15.0 done
989 03:53:29.659621 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
990 03:53:29.662880 PCI: 00:15.1 scanning...
991 03:53:29.665894 scan_static_bus for PCI: 00:15.1
992 03:53:29.666084 I2C: 00:10 enabled
993 03:53:29.669235 scan_static_bus for PCI: 00:15.1 done
994 03:53:29.675788 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
995 03:53:29.679170 PCI: 00:15.2 scanning...
996 03:53:29.682543 scan_static_bus for PCI: 00:15.2
997 03:53:29.686076 scan_static_bus for PCI: 00:15.2 done
998 03:53:29.689221 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
999 03:53:29.692266 PCI: 00:15.3 scanning...
1000 03:53:29.695577 scan_static_bus for PCI: 00:15.3
1001 03:53:29.699027 scan_static_bus for PCI: 00:15.3 done
1002 03:53:29.705465 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1003 03:53:29.705594 PCI: 00:19.1 scanning...
1004 03:53:29.712251 scan_static_bus for PCI: 00:19.1
1005 03:53:29.712378 I2C: 00:15 enabled
1006 03:53:29.715569 scan_static_bus for PCI: 00:19.1 done
1007 03:53:29.722003 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1008 03:53:29.722122 PCI: 00:1d.0 scanning...
1009 03:53:29.728718 do_pci_scan_bridge for PCI: 00:1d.0
1010 03:53:29.728814 PCI: pci_scan_bus for bus 01
1011 03:53:29.732201 PCI: 01:00.0 [15b7/5009] enabled
1012 03:53:29.735670 GENERIC: 0.0 enabled
1013 03:53:29.739070 Enabling Common Clock Configuration
1014 03:53:29.745345 L1 Sub-State supported from root port 29
1015 03:53:29.745438 L1 Sub-State Support = 0x5
1016 03:53:29.748759 CommonModeRestoreTime = 0x28
1017 03:53:29.755380 Power On Value = 0x16, Power On Scale = 0x0
1018 03:53:29.755484 ASPM: Enabled L1
1019 03:53:29.758852 PCIe: Max_Payload_Size adjusted to 128
1020 03:53:29.765177 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1021 03:53:29.768364 PCI: 00:1e.2 scanning...
1022 03:53:29.771579 scan_generic_bus for PCI: 00:1e.2
1023 03:53:29.771670 SPI: 00 enabled
1024 03:53:29.778326 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1025 03:53:29.781711 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1026 03:53:29.784929 PCI: 00:1e.3 scanning...
1027 03:53:29.788313 scan_generic_bus for PCI: 00:1e.3
1028 03:53:29.791455 SPI: 00 enabled
1029 03:53:29.798600 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1030 03:53:29.802512 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1031 03:53:29.806060 PCI: 00:1f.0 scanning...
1032 03:53:29.809376 scan_static_bus for PCI: 00:1f.0
1033 03:53:29.809469 PNP: 0c09.0 enabled
1034 03:53:29.812524 PNP: 0c09.0 scanning...
1035 03:53:29.816198 scan_static_bus for PNP: 0c09.0
1036 03:53:29.819304 scan_static_bus for PNP: 0c09.0 done
1037 03:53:29.826036 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1038 03:53:29.829162 scan_static_bus for PCI: 00:1f.0 done
1039 03:53:29.832496 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1040 03:53:29.835694 PCI: 00:1f.2 scanning...
1041 03:53:29.838991 scan_static_bus for PCI: 00:1f.2
1042 03:53:29.842482 GENERIC: 0.0 enabled
1043 03:53:29.842598 GENERIC: 0.0 scanning...
1044 03:53:29.845743 scan_static_bus for GENERIC: 0.0
1045 03:53:29.849050 GENERIC: 0.0 enabled
1046 03:53:29.852368 GENERIC: 1.0 enabled
1047 03:53:29.855506 scan_static_bus for GENERIC: 0.0 done
1048 03:53:29.859108 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1049 03:53:29.862113 scan_static_bus for PCI: 00:1f.2 done
1050 03:53:29.868609 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1051 03:53:29.872177 PCI: 00:1f.3 scanning...
1052 03:53:29.875489 scan_static_bus for PCI: 00:1f.3
1053 03:53:29.878914 scan_static_bus for PCI: 00:1f.3 done
1054 03:53:29.881954 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1055 03:53:29.885392 PCI: 00:1f.5 scanning...
1056 03:53:29.888628 scan_generic_bus for PCI: 00:1f.5
1057 03:53:29.891971 scan_generic_bus for PCI: 00:1f.5 done
1058 03:53:29.898542 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1059 03:53:29.901861 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1060 03:53:29.905245 scan_static_bus for Root Device done
1061 03:53:29.911816 scan_bus: bus Root Device finished in 735 msecs
1062 03:53:29.911907 done
1063 03:53:29.918169 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1064 03:53:29.921681 Chrome EC: UHEPI supported
1065 03:53:29.928387 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1066 03:53:29.934776 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1067 03:53:29.938132 SPI flash protection: WPSW=0 SRP0=1
1068 03:53:29.941466 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1069 03:53:29.948117 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1070 03:53:29.951367 found VGA at PCI: 00:02.0
1071 03:53:29.954759 Setting up VGA for PCI: 00:02.0
1072 03:53:29.958190 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1073 03:53:29.964698 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1074 03:53:29.967901 Allocating resources...
1075 03:53:29.967995 Reading resources...
1076 03:53:29.971225 Root Device read_resources bus 0 link: 0
1077 03:53:29.977955 DOMAIN: 0000 read_resources bus 0 link: 0
1078 03:53:29.981113 PCI: 00:04.0 read_resources bus 1 link: 0
1079 03:53:29.987874 PCI: 00:04.0 read_resources bus 1 link: 0 done
1080 03:53:29.991149 PCI: 00:0d.0 read_resources bus 0 link: 0
1081 03:53:29.997650 USB0 port 0 read_resources bus 0 link: 0
1082 03:53:30.000924 USB0 port 0 read_resources bus 0 link: 0 done
1083 03:53:30.007464 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1084 03:53:30.010924 PCI: 00:14.0 read_resources bus 0 link: 0
1085 03:53:30.014263 USB0 port 0 read_resources bus 0 link: 0
1086 03:53:30.021905 USB0 port 0 read_resources bus 0 link: 0 done
1087 03:53:30.025248 PCI: 00:14.0 read_resources bus 0 link: 0 done
1088 03:53:30.031791 PCI: 00:14.3 read_resources bus 0 link: 0
1089 03:53:30.035152 PCI: 00:14.3 read_resources bus 0 link: 0 done
1090 03:53:30.041661 PCI: 00:15.0 read_resources bus 0 link: 0
1091 03:53:30.044932 PCI: 00:15.0 read_resources bus 0 link: 0 done
1092 03:53:30.051827 PCI: 00:15.1 read_resources bus 0 link: 0
1093 03:53:30.054927 PCI: 00:15.1 read_resources bus 0 link: 0 done
1094 03:53:30.062370 PCI: 00:19.1 read_resources bus 0 link: 0
1095 03:53:30.065596 PCI: 00:19.1 read_resources bus 0 link: 0 done
1096 03:53:30.071959 PCI: 00:1d.0 read_resources bus 1 link: 0
1097 03:53:30.075121 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1098 03:53:30.081960 PCI: 00:1e.2 read_resources bus 2 link: 0
1099 03:53:30.085230 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1100 03:53:30.091905 PCI: 00:1e.3 read_resources bus 3 link: 0
1101 03:53:30.095296 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1102 03:53:30.101798 PCI: 00:1f.0 read_resources bus 0 link: 0
1103 03:53:30.104909 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1104 03:53:30.111702 PCI: 00:1f.2 read_resources bus 0 link: 0
1105 03:53:30.115022 GENERIC: 0.0 read_resources bus 0 link: 0
1106 03:53:30.121311 GENERIC: 0.0 read_resources bus 0 link: 0 done
1107 03:53:30.124644 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1108 03:53:30.131276 DOMAIN: 0000 read_resources bus 0 link: 0 done
1109 03:53:30.134620 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1110 03:53:30.141003 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1111 03:53:30.144384 Root Device read_resources bus 0 link: 0 done
1112 03:53:30.147740 Done reading resources.
1113 03:53:30.154298 Show resources in subtree (Root Device)...After reading.
1114 03:53:30.157609 Root Device child on link 0 DOMAIN: 0000
1115 03:53:30.161081 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1116 03:53:30.170937 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1117 03:53:30.180740 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1118 03:53:30.184129 PCI: 00:00.0
1119 03:53:30.190538 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1120 03:53:30.200590 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1121 03:53:30.210605 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1122 03:53:30.220579 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1123 03:53:30.230483 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1124 03:53:30.240449 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1125 03:53:30.246975 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1126 03:53:30.256842 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1127 03:53:30.266920 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1128 03:53:30.276794 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1129 03:53:30.286991 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1130 03:53:30.296498 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1131 03:53:30.303062 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1132 03:53:30.313231 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1133 03:53:30.322908 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1134 03:53:30.332926 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1135 03:53:30.342742 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1136 03:53:30.352614 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1137 03:53:30.362849 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1138 03:53:30.369176 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1139 03:53:30.372423 PCI: 00:02.0
1140 03:53:30.382475 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1141 03:53:30.392710 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1142 03:53:30.402333 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1143 03:53:30.405752 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1144 03:53:30.415559 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1145 03:53:30.418956 GENERIC: 0.0
1146 03:53:30.419043 PCI: 00:05.0
1147 03:53:30.429048 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1148 03:53:30.435343 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1149 03:53:30.435431 GENERIC: 0.0
1150 03:53:30.438836 PCI: 00:08.0
1151 03:53:30.448933 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 03:53:30.449037 PCI: 00:0a.0
1153 03:53:30.451905 PCI: 00:0d.0 child on link 0 USB0 port 0
1154 03:53:30.465446 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1155 03:53:30.468662 USB0 port 0 child on link 0 USB3 port 0
1156 03:53:30.468820 USB3 port 0
1157 03:53:30.471794 USB3 port 1
1158 03:53:30.471882 USB3 port 2
1159 03:53:30.475013 USB3 port 3
1160 03:53:30.478281 PCI: 00:14.0 child on link 0 USB0 port 0
1161 03:53:30.488382 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1162 03:53:30.494931 USB0 port 0 child on link 0 USB2 port 0
1163 03:53:30.495019 USB2 port 0
1164 03:53:30.498158 USB2 port 1
1165 03:53:30.498245 USB2 port 2
1166 03:53:30.501517 USB2 port 3
1167 03:53:30.501605 USB2 port 4
1168 03:53:30.504736 USB2 port 5
1169 03:53:30.504823 USB2 port 6
1170 03:53:30.508131 USB2 port 7
1171 03:53:30.511397 USB2 port 8
1172 03:53:30.511485 USB2 port 9
1173 03:53:30.514927 USB3 port 0
1174 03:53:30.515015 USB3 port 1
1175 03:53:30.518227 USB3 port 2
1176 03:53:30.518314 USB3 port 3
1177 03:53:30.521448 PCI: 00:14.2
1178 03:53:30.531237 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1179 03:53:30.541355 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1180 03:53:30.544557 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1181 03:53:30.554833 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1182 03:53:30.558063 GENERIC: 0.0
1183 03:53:30.561156 PCI: 00:15.0 child on link 0 I2C: 00:1a
1184 03:53:30.571133 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 03:53:30.571222 I2C: 00:1a
1186 03:53:30.574272 I2C: 00:31
1187 03:53:30.574358 I2C: 00:32
1188 03:53:30.580895 PCI: 00:15.1 child on link 0 I2C: 00:10
1189 03:53:30.590857 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 03:53:30.590946 I2C: 00:10
1191 03:53:30.594073 PCI: 00:15.2
1192 03:53:30.604142 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 03:53:30.604230 PCI: 00:15.3
1194 03:53:30.614023 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 03:53:30.617280 PCI: 00:16.0
1196 03:53:30.627312 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 03:53:30.627400 PCI: 00:19.0
1198 03:53:30.630589 PCI: 00:19.1 child on link 0 I2C: 00:15
1199 03:53:30.640477 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1200 03:53:30.643775 I2C: 00:15
1201 03:53:30.647055 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1202 03:53:30.656982 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1203 03:53:30.666772 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1204 03:53:30.676802 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1205 03:53:30.676910 GENERIC: 0.0
1206 03:53:30.679991 PCI: 01:00.0
1207 03:53:30.690023 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1208 03:53:30.699958 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1209 03:53:30.700048 PCI: 00:1e.0
1210 03:53:30.713259 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1211 03:53:30.716729 PCI: 00:1e.2 child on link 0 SPI: 00
1212 03:53:30.726509 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1213 03:53:30.726632 SPI: 00
1214 03:53:30.729900 PCI: 00:1e.3 child on link 0 SPI: 00
1215 03:53:30.739455 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1216 03:53:30.743122 SPI: 00
1217 03:53:30.746323 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1218 03:53:30.756111 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1219 03:53:30.756199 PNP: 0c09.0
1220 03:53:30.766151 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1221 03:53:30.769478 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1222 03:53:30.779281 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1223 03:53:30.789170 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1224 03:53:30.792868 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1225 03:53:30.796075 GENERIC: 0.0
1226 03:53:30.796163 GENERIC: 1.0
1227 03:53:30.799101 PCI: 00:1f.3
1228 03:53:30.809425 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1229 03:53:30.819152 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1230 03:53:30.819241 PCI: 00:1f.5
1231 03:53:30.828912 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1232 03:53:30.835496 CPU_CLUSTER: 0 child on link 0 APIC: 00
1233 03:53:30.835584 APIC: 00
1234 03:53:30.835654 APIC: 01
1235 03:53:30.838871 APIC: 03
1236 03:53:30.838958 APIC: 04
1237 03:53:30.839027 APIC: 07
1238 03:53:30.842171 APIC: 06
1239 03:53:30.842259 APIC: 02
1240 03:53:30.845510 APIC: 05
1241 03:53:30.851982 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1242 03:53:30.858505 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1243 03:53:30.865492 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1244 03:53:30.868432 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1245 03:53:30.875101 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1246 03:53:30.878506 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1247 03:53:30.884997 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1248 03:53:30.891601 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1249 03:53:30.901526 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1250 03:53:30.908269 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1251 03:53:30.914859 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1252 03:53:30.921338 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1253 03:53:30.928290 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1254 03:53:30.937948 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1255 03:53:30.941199 DOMAIN: 0000: Resource ranges:
1256 03:53:30.944719 * Base: 1000, Size: 800, Tag: 100
1257 03:53:30.947815 * Base: 1900, Size: e700, Tag: 100
1258 03:53:30.951157 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1259 03:53:30.957810 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1260 03:53:30.964329 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1261 03:53:30.974346 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1262 03:53:30.980774 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1263 03:53:30.987567 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1264 03:53:30.997380 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1265 03:53:31.004227 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1266 03:53:31.010817 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1267 03:53:31.020861 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1268 03:53:31.027436 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1269 03:53:31.034030 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1270 03:53:31.043722 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1271 03:53:31.050391 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1272 03:53:31.056936 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1273 03:53:31.067031 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1274 03:53:31.073551 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1275 03:53:31.080570 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1276 03:53:31.090191 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1277 03:53:31.096954 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1278 03:53:31.103474 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1279 03:53:31.113258 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1280 03:53:31.119849 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1281 03:53:31.126590 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1282 03:53:31.136535 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1283 03:53:31.139726 DOMAIN: 0000: Resource ranges:
1284 03:53:31.143171 * Base: 7fc00000, Size: 40400000, Tag: 200
1285 03:53:31.146226 * Base: d0000000, Size: 28000000, Tag: 200
1286 03:53:31.153122 * Base: fa000000, Size: 1000000, Tag: 200
1287 03:53:31.156149 * Base: fb001000, Size: 2fff000, Tag: 200
1288 03:53:31.159604 * Base: fe010000, Size: 2e000, Tag: 200
1289 03:53:31.162896 * Base: fe03f000, Size: d41000, Tag: 200
1290 03:53:31.169539 * Base: fed88000, Size: 8000, Tag: 200
1291 03:53:31.172665 * Base: fed93000, Size: d000, Tag: 200
1292 03:53:31.175961 * Base: feda2000, Size: 1e000, Tag: 200
1293 03:53:31.179360 * Base: fede0000, Size: 1220000, Tag: 200
1294 03:53:31.186019 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1295 03:53:31.192796 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1296 03:53:31.199415 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1297 03:53:31.206250 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1298 03:53:31.212432 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1299 03:53:31.219354 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1300 03:53:31.225936 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1301 03:53:31.232331 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1302 03:53:31.238963 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1303 03:53:31.245583 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1304 03:53:31.252240 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1305 03:53:31.258853 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1306 03:53:31.265282 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1307 03:53:31.272257 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1308 03:53:31.278768 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1309 03:53:31.285372 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1310 03:53:31.292161 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1311 03:53:31.298413 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1312 03:53:31.305143 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1313 03:53:31.311855 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1314 03:53:31.318299 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1315 03:53:31.325112 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1316 03:53:31.331757 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1317 03:53:31.338249 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1318 03:53:31.347961 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1319 03:53:31.351306 PCI: 00:1d.0: Resource ranges:
1320 03:53:31.354770 * Base: 7fc00000, Size: 100000, Tag: 200
1321 03:53:31.361748 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1322 03:53:31.368062 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1323 03:53:31.374462 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1324 03:53:31.384518 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1325 03:53:31.387966 Root Device assign_resources, bus 0 link: 0
1326 03:53:31.391224 DOMAIN: 0000 assign_resources, bus 0 link: 0
1327 03:53:31.401055 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1328 03:53:31.407512 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1329 03:53:31.417618 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1330 03:53:31.424229 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1331 03:53:31.430647 PCI: 00:04.0 assign_resources, bus 1 link: 0
1332 03:53:31.434099 PCI: 00:04.0 assign_resources, bus 1 link: 0
1333 03:53:31.443983 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1334 03:53:31.450425 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1335 03:53:31.460293 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1336 03:53:31.463468 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1337 03:53:31.466853 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1338 03:53:31.476829 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1339 03:53:31.480208 PCI: 00:14.0 assign_resources, bus 0 link: 0
1340 03:53:31.486960 PCI: 00:14.0 assign_resources, bus 0 link: 0
1341 03:53:31.493635 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1342 03:53:31.503448 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1343 03:53:31.510006 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1344 03:53:31.513145 PCI: 00:14.3 assign_resources, bus 0 link: 0
1345 03:53:31.519932 PCI: 00:14.3 assign_resources, bus 0 link: 0
1346 03:53:31.526287 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1347 03:53:31.532901 PCI: 00:15.0 assign_resources, bus 0 link: 0
1348 03:53:31.536236 PCI: 00:15.0 assign_resources, bus 0 link: 0
1349 03:53:31.546251 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1350 03:53:31.549558 PCI: 00:15.1 assign_resources, bus 0 link: 0
1351 03:53:31.552814 PCI: 00:15.1 assign_resources, bus 0 link: 0
1352 03:53:31.562890 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1353 03:53:31.569532 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1354 03:53:31.579473 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1355 03:53:31.585874 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1356 03:53:31.592276 PCI: 00:19.1 assign_resources, bus 0 link: 0
1357 03:53:31.595708 PCI: 00:19.1 assign_resources, bus 0 link: 0
1358 03:53:31.605601 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1359 03:53:31.615670 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1360 03:53:31.622360 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1361 03:53:31.628643 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1362 03:53:31.635405 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1363 03:53:31.645093 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1364 03:53:31.648571 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1365 03:53:31.658753 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1366 03:53:31.661798 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1367 03:53:31.665027 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1368 03:53:31.675296 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1369 03:53:31.678468 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1370 03:53:31.684919 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1371 03:53:31.688422 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1372 03:53:31.694955 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1373 03:53:31.698135 LPC: Trying to open IO window from 800 size 1ff
1374 03:53:31.707987 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1375 03:53:31.714882 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1376 03:53:31.721106 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1377 03:53:31.727930 DOMAIN: 0000 assign_resources, bus 0 link: 0
1378 03:53:31.731687 Root Device assign_resources, bus 0 link: 0
1379 03:53:31.734542 Done setting resources.
1380 03:53:31.741242 Show resources in subtree (Root Device)...After assigning values.
1381 03:53:31.744625 Root Device child on link 0 DOMAIN: 0000
1382 03:53:31.751194 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1383 03:53:31.757715 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1384 03:53:31.767686 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1385 03:53:31.770970 PCI: 00:00.0
1386 03:53:31.780837 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1387 03:53:31.790948 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1388 03:53:31.800630 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1389 03:53:31.807359 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1390 03:53:31.817459 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1391 03:53:31.827245 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1392 03:53:31.837122 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1393 03:53:31.847371 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1394 03:53:31.853555 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1395 03:53:31.863510 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1396 03:53:31.873375 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1397 03:53:31.883612 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1398 03:53:31.893380 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1399 03:53:31.899879 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1400 03:53:31.909684 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1401 03:53:31.919846 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1402 03:53:31.929608 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1403 03:53:31.939555 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1404 03:53:31.949534 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1405 03:53:31.959347 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1406 03:53:31.959460 PCI: 00:02.0
1407 03:53:31.972830 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1408 03:53:31.982748 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1409 03:53:31.992602 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1410 03:53:31.995742 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1411 03:53:32.005604 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1412 03:53:32.009191 GENERIC: 0.0
1413 03:53:32.009294 PCI: 00:05.0
1414 03:53:32.019202 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1415 03:53:32.025541 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1416 03:53:32.025649 GENERIC: 0.0
1417 03:53:32.028966 PCI: 00:08.0
1418 03:53:32.039166 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1419 03:53:32.039283 PCI: 00:0a.0
1420 03:53:32.045380 PCI: 00:0d.0 child on link 0 USB0 port 0
1421 03:53:32.055290 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1422 03:53:32.058739 USB0 port 0 child on link 0 USB3 port 0
1423 03:53:32.061902 USB3 port 0
1424 03:53:32.062003 USB3 port 1
1425 03:53:32.065317 USB3 port 2
1426 03:53:32.065415 USB3 port 3
1427 03:53:32.071881 PCI: 00:14.0 child on link 0 USB0 port 0
1428 03:53:32.081839 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1429 03:53:32.085335 USB0 port 0 child on link 0 USB2 port 0
1430 03:53:32.088475 USB2 port 0
1431 03:53:32.088583 USB2 port 1
1432 03:53:32.091860 USB2 port 2
1433 03:53:32.091952 USB2 port 3
1434 03:53:32.094889 USB2 port 4
1435 03:53:32.094974 USB2 port 5
1436 03:53:32.098277 USB2 port 6
1437 03:53:32.098363 USB2 port 7
1438 03:53:32.101508 USB2 port 8
1439 03:53:32.101594 USB2 port 9
1440 03:53:32.105324 USB3 port 0
1441 03:53:32.105409 USB3 port 1
1442 03:53:32.108223 USB3 port 2
1443 03:53:32.111577 USB3 port 3
1444 03:53:32.111662 PCI: 00:14.2
1445 03:53:32.121378 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1446 03:53:32.131369 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1447 03:53:32.137981 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1448 03:53:32.148131 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1449 03:53:32.148224 GENERIC: 0.0
1450 03:53:32.154488 PCI: 00:15.0 child on link 0 I2C: 00:1a
1451 03:53:32.164724 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1452 03:53:32.164810 I2C: 00:1a
1453 03:53:32.167883 I2C: 00:31
1454 03:53:32.167981 I2C: 00:32
1455 03:53:32.171386 PCI: 00:15.1 child on link 0 I2C: 00:10
1456 03:53:32.184438 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1457 03:53:32.184525 I2C: 00:10
1458 03:53:32.187668 PCI: 00:15.2
1459 03:53:32.197624 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1460 03:53:32.197711 PCI: 00:15.3
1461 03:53:32.207456 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1462 03:53:32.210878 PCI: 00:16.0
1463 03:53:32.220742 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1464 03:53:32.220828 PCI: 00:19.0
1465 03:53:32.227245 PCI: 00:19.1 child on link 0 I2C: 00:15
1466 03:53:32.237174 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1467 03:53:32.237260 I2C: 00:15
1468 03:53:32.243796 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1469 03:53:32.250591 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1470 03:53:32.263819 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1471 03:53:32.273669 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1472 03:53:32.277076 GENERIC: 0.0
1473 03:53:32.277161 PCI: 01:00.0
1474 03:53:32.287011 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1475 03:53:32.296753 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1476 03:53:32.300170 PCI: 00:1e.0
1477 03:53:32.310237 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1478 03:53:32.316799 PCI: 00:1e.2 child on link 0 SPI: 00
1479 03:53:32.326545 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1480 03:53:32.326655 SPI: 00
1481 03:53:32.329875 PCI: 00:1e.3 child on link 0 SPI: 00
1482 03:53:32.339775 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1483 03:53:32.343370 SPI: 00
1484 03:53:32.346526 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1485 03:53:32.356351 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1486 03:53:32.356437 PNP: 0c09.0
1487 03:53:32.366165 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1488 03:53:32.369713 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1489 03:53:32.379683 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1490 03:53:32.389290 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1491 03:53:32.392599 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1492 03:53:32.395905 GENERIC: 0.0
1493 03:53:32.395991 GENERIC: 1.0
1494 03:53:32.399250 PCI: 00:1f.3
1495 03:53:32.409433 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1496 03:53:32.419225 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1497 03:53:32.422545 PCI: 00:1f.5
1498 03:53:32.432638 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1499 03:53:32.435724 CPU_CLUSTER: 0 child on link 0 APIC: 00
1500 03:53:32.435809 APIC: 00
1501 03:53:32.439075 APIC: 01
1502 03:53:32.439160 APIC: 03
1503 03:53:32.442435 APIC: 04
1504 03:53:32.442520 APIC: 07
1505 03:53:32.442625 APIC: 06
1506 03:53:32.445618 APIC: 02
1507 03:53:32.445704 APIC: 05
1508 03:53:32.449067 Done allocating resources.
1509 03:53:32.455448 BS: BS_DEV_RESOURCES run times (exec / console): 27 / 2474 ms
1510 03:53:32.462168 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1511 03:53:32.465447 Configure GPIOs for I2S audio on UP4.
1512 03:53:32.472112 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1513 03:53:32.475243 Enabling resources...
1514 03:53:32.478460 PCI: 00:00.0 subsystem <- 8086/9a12
1515 03:53:32.482149 PCI: 00:00.0 cmd <- 06
1516 03:53:32.485215 PCI: 00:02.0 subsystem <- 8086/9a40
1517 03:53:32.485301 PCI: 00:02.0 cmd <- 03
1518 03:53:32.491913 PCI: 00:04.0 subsystem <- 8086/9a03
1519 03:53:32.492001 PCI: 00:04.0 cmd <- 02
1520 03:53:32.495326 PCI: 00:05.0 subsystem <- 8086/9a19
1521 03:53:32.498470 PCI: 00:05.0 cmd <- 02
1522 03:53:32.501735 PCI: 00:08.0 subsystem <- 8086/9a11
1523 03:53:32.505045 PCI: 00:08.0 cmd <- 06
1524 03:53:32.508328 PCI: 00:0d.0 subsystem <- 8086/9a13
1525 03:53:32.511774 PCI: 00:0d.0 cmd <- 02
1526 03:53:32.515136 PCI: 00:14.0 subsystem <- 8086/a0ed
1527 03:53:32.518039 PCI: 00:14.0 cmd <- 02
1528 03:53:32.521322 PCI: 00:14.2 subsystem <- 8086/a0ef
1529 03:53:32.524842 PCI: 00:14.2 cmd <- 02
1530 03:53:32.527827 PCI: 00:14.3 subsystem <- 8086/a0f0
1531 03:53:32.531244 PCI: 00:14.3 cmd <- 02
1532 03:53:32.534559 PCI: 00:15.0 subsystem <- 8086/a0e8
1533 03:53:32.537658 PCI: 00:15.0 cmd <- 02
1534 03:53:32.541066 PCI: 00:15.1 subsystem <- 8086/a0e9
1535 03:53:32.541154 PCI: 00:15.1 cmd <- 02
1536 03:53:32.547856 PCI: 00:15.2 subsystem <- 8086/a0ea
1537 03:53:32.547944 PCI: 00:15.2 cmd <- 02
1538 03:53:32.550997 PCI: 00:15.3 subsystem <- 8086/a0eb
1539 03:53:32.554389 PCI: 00:15.3 cmd <- 02
1540 03:53:32.557731 PCI: 00:16.0 subsystem <- 8086/a0e0
1541 03:53:32.561032 PCI: 00:16.0 cmd <- 02
1542 03:53:32.564308 PCI: 00:19.1 subsystem <- 8086/a0c6
1543 03:53:32.567717 PCI: 00:19.1 cmd <- 02
1544 03:53:32.570886 PCI: 00:1d.0 bridge ctrl <- 0013
1545 03:53:32.574134 PCI: 00:1d.0 subsystem <- 8086/a0b0
1546 03:53:32.577590 PCI: 00:1d.0 cmd <- 06
1547 03:53:32.580620 PCI: 00:1e.0 subsystem <- 8086/a0a8
1548 03:53:32.584169 PCI: 00:1e.0 cmd <- 06
1549 03:53:32.587341 PCI: 00:1e.2 subsystem <- 8086/a0aa
1550 03:53:32.590457 PCI: 00:1e.2 cmd <- 06
1551 03:53:32.593994 PCI: 00:1e.3 subsystem <- 8086/a0ab
1552 03:53:32.594095 PCI: 00:1e.3 cmd <- 02
1553 03:53:32.600737 PCI: 00:1f.0 subsystem <- 8086/a087
1554 03:53:32.600823 PCI: 00:1f.0 cmd <- 407
1555 03:53:32.603910 PCI: 00:1f.3 subsystem <- 8086/a0c8
1556 03:53:32.607200 PCI: 00:1f.3 cmd <- 02
1557 03:53:32.610671 PCI: 00:1f.5 subsystem <- 8086/a0a4
1558 03:53:32.613808 PCI: 00:1f.5 cmd <- 406
1559 03:53:32.618252 PCI: 01:00.0 cmd <- 02
1560 03:53:32.622905 done.
1561 03:53:32.626129 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1562 03:53:32.629444 Initializing devices...
1563 03:53:32.632770 Root Device init
1564 03:53:32.636142 Chrome EC: Set SMI mask to 0x0000000000000000
1565 03:53:32.642724 Chrome EC: clear events_b mask to 0x0000000000000000
1566 03:53:32.649322 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1567 03:53:32.652560 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1568 03:53:32.659410 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1569 03:53:32.665939 Chrome EC: Set WAKE mask to 0x0000000000000000
1570 03:53:32.669304 fw_config match found: DB_USB=USB3_ACTIVE
1571 03:53:32.675698 Configure Right Type-C port orientation for retimer
1572 03:53:32.679175 Root Device init finished in 43 msecs
1573 03:53:32.682392 PCI: 00:00.0 init
1574 03:53:32.685817 CPU TDP = 9 Watts
1575 03:53:32.685904 CPU PL1 = 9 Watts
1576 03:53:32.689129 CPU PL2 = 40 Watts
1577 03:53:32.692429 CPU PL4 = 83 Watts
1578 03:53:32.695439 PCI: 00:00.0 init finished in 8 msecs
1579 03:53:32.695528 PCI: 00:02.0 init
1580 03:53:32.698973 GMA: Found VBT in CBFS
1581 03:53:32.702374 GMA: Found valid VBT in CBFS
1582 03:53:32.709054 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1583 03:53:32.715425 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1584 03:53:32.718973 PCI: 00:02.0 init finished in 18 msecs
1585 03:53:32.722140 PCI: 00:05.0 init
1586 03:53:32.725291 PCI: 00:05.0 init finished in 0 msecs
1587 03:53:32.728916 PCI: 00:08.0 init
1588 03:53:32.731968 PCI: 00:08.0 init finished in 0 msecs
1589 03:53:32.735247 PCI: 00:14.0 init
1590 03:53:32.738599 PCI: 00:14.0 init finished in 0 msecs
1591 03:53:32.741827 PCI: 00:14.2 init
1592 03:53:32.745069 PCI: 00:14.2 init finished in 0 msecs
1593 03:53:32.748499 PCI: 00:15.0 init
1594 03:53:32.748587 I2C bus 0 version 0x3230302a
1595 03:53:32.755143 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1596 03:53:32.758524 PCI: 00:15.0 init finished in 6 msecs
1597 03:53:32.758663 PCI: 00:15.1 init
1598 03:53:32.761638 I2C bus 1 version 0x3230302a
1599 03:53:32.764912 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1600 03:53:32.771657 PCI: 00:15.1 init finished in 6 msecs
1601 03:53:32.771745 PCI: 00:15.2 init
1602 03:53:32.774894 I2C bus 2 version 0x3230302a
1603 03:53:32.778199 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1604 03:53:32.781785 PCI: 00:15.2 init finished in 6 msecs
1605 03:53:32.784818 PCI: 00:15.3 init
1606 03:53:32.788294 I2C bus 3 version 0x3230302a
1607 03:53:32.791341 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1608 03:53:32.794738 PCI: 00:15.3 init finished in 6 msecs
1609 03:53:32.797915 PCI: 00:16.0 init
1610 03:53:32.801223 PCI: 00:16.0 init finished in 0 msecs
1611 03:53:32.804658 PCI: 00:19.1 init
1612 03:53:32.807956 I2C bus 5 version 0x3230302a
1613 03:53:32.811334 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1614 03:53:32.814534 PCI: 00:19.1 init finished in 6 msecs
1615 03:53:32.818049 PCI: 00:1d.0 init
1616 03:53:32.821052 Initializing PCH PCIe bridge.
1617 03:53:32.824410 PCI: 00:1d.0 init finished in 3 msecs
1618 03:53:32.827539 PCI: 00:1f.0 init
1619 03:53:32.830980 IOAPIC: Initializing IOAPIC at 0xfec00000
1620 03:53:32.834307 IOAPIC: Bootstrap Processor Local APIC = 0x00
1621 03:53:32.837612 IOAPIC: ID = 0x02
1622 03:53:32.841116 IOAPIC: Dumping registers
1623 03:53:32.841207 reg 0x0000: 0x02000000
1624 03:53:32.844272 reg 0x0001: 0x00770020
1625 03:53:32.847735 reg 0x0002: 0x00000000
1626 03:53:32.850904 PCI: 00:1f.0 init finished in 21 msecs
1627 03:53:32.854346 PCI: 00:1f.2 init
1628 03:53:32.857743 Disabling ACPI via APMC.
1629 03:53:32.857837 APMC done.
1630 03:53:32.864491 PCI: 00:1f.2 init finished in 5 msecs
1631 03:53:32.874307 PCI: 01:00.0 init
1632 03:53:32.877775 PCI: 01:00.0 init finished in 0 msecs
1633 03:53:32.880843 PNP: 0c09.0 init
1634 03:53:32.884192 Google Chrome EC uptime: 8.227 seconds
1635 03:53:32.890899 Google Chrome AP resets since EC boot: 1
1636 03:53:32.894088 Google Chrome most recent AP reset causes:
1637 03:53:32.897563 0.451: 32775 shutdown: entering G3
1638 03:53:32.904151 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1639 03:53:32.907404 PNP: 0c09.0 init finished in 22 msecs
1640 03:53:32.913271 Devices initialized
1641 03:53:32.916361 Show all devs... After init.
1642 03:53:32.919674 Root Device: enabled 1
1643 03:53:32.919764 DOMAIN: 0000: enabled 1
1644 03:53:32.923029 CPU_CLUSTER: 0: enabled 1
1645 03:53:32.926536 PCI: 00:00.0: enabled 1
1646 03:53:32.929904 PCI: 00:02.0: enabled 1
1647 03:53:32.930032 PCI: 00:04.0: enabled 1
1648 03:53:32.933031 PCI: 00:05.0: enabled 1
1649 03:53:32.936562 PCI: 00:06.0: enabled 0
1650 03:53:32.939811 PCI: 00:07.0: enabled 0
1651 03:53:32.939935 PCI: 00:07.1: enabled 0
1652 03:53:32.942908 PCI: 00:07.2: enabled 0
1653 03:53:32.946529 PCI: 00:07.3: enabled 0
1654 03:53:32.949652 PCI: 00:08.0: enabled 1
1655 03:53:32.949790 PCI: 00:09.0: enabled 0
1656 03:53:32.952882 PCI: 00:0a.0: enabled 0
1657 03:53:32.956227 PCI: 00:0d.0: enabled 1
1658 03:53:32.959976 PCI: 00:0d.1: enabled 0
1659 03:53:32.960092 PCI: 00:0d.2: enabled 0
1660 03:53:32.962751 PCI: 00:0d.3: enabled 0
1661 03:53:32.966217 PCI: 00:0e.0: enabled 0
1662 03:53:32.966333 PCI: 00:10.2: enabled 1
1663 03:53:32.969353 PCI: 00:10.6: enabled 0
1664 03:53:32.972634 PCI: 00:10.7: enabled 0
1665 03:53:32.976029 PCI: 00:12.0: enabled 0
1666 03:53:32.976145 PCI: 00:12.6: enabled 0
1667 03:53:32.979516 PCI: 00:13.0: enabled 0
1668 03:53:32.982767 PCI: 00:14.0: enabled 1
1669 03:53:32.985925 PCI: 00:14.1: enabled 0
1670 03:53:32.986040 PCI: 00:14.2: enabled 1
1671 03:53:32.989211 PCI: 00:14.3: enabled 1
1672 03:53:32.992601 PCI: 00:15.0: enabled 1
1673 03:53:32.995992 PCI: 00:15.1: enabled 1
1674 03:53:32.996110 PCI: 00:15.2: enabled 1
1675 03:53:32.999502 PCI: 00:15.3: enabled 1
1676 03:53:33.002507 PCI: 00:16.0: enabled 1
1677 03:53:33.006179 PCI: 00:16.1: enabled 0
1678 03:53:33.006266 PCI: 00:16.2: enabled 0
1679 03:53:33.009391 PCI: 00:16.3: enabled 0
1680 03:53:33.012520 PCI: 00:16.4: enabled 0
1681 03:53:33.012607 PCI: 00:16.5: enabled 0
1682 03:53:33.015950 PCI: 00:17.0: enabled 0
1683 03:53:33.019328 PCI: 00:19.0: enabled 0
1684 03:53:33.022456 PCI: 00:19.1: enabled 1
1685 03:53:33.022544 PCI: 00:19.2: enabled 0
1686 03:53:33.025813 PCI: 00:1c.0: enabled 1
1687 03:53:33.029022 PCI: 00:1c.1: enabled 0
1688 03:53:33.032322 PCI: 00:1c.2: enabled 0
1689 03:53:33.032439 PCI: 00:1c.3: enabled 0
1690 03:53:33.035903 PCI: 00:1c.4: enabled 0
1691 03:53:33.039001 PCI: 00:1c.5: enabled 0
1692 03:53:33.042336 PCI: 00:1c.6: enabled 1
1693 03:53:33.042423 PCI: 00:1c.7: enabled 0
1694 03:53:33.045571 PCI: 00:1d.0: enabled 1
1695 03:53:33.049127 PCI: 00:1d.1: enabled 0
1696 03:53:33.052538 PCI: 00:1d.2: enabled 1
1697 03:53:33.052626 PCI: 00:1d.3: enabled 0
1698 03:53:33.055979 PCI: 00:1e.0: enabled 1
1699 03:53:33.058944 PCI: 00:1e.1: enabled 0
1700 03:53:33.059031 PCI: 00:1e.2: enabled 1
1701 03:53:33.062347 PCI: 00:1e.3: enabled 1
1702 03:53:33.065632 PCI: 00:1f.0: enabled 1
1703 03:53:33.068892 PCI: 00:1f.1: enabled 0
1704 03:53:33.069001 PCI: 00:1f.2: enabled 1
1705 03:53:33.072146 PCI: 00:1f.3: enabled 1
1706 03:53:33.075597 PCI: 00:1f.4: enabled 0
1707 03:53:33.078694 PCI: 00:1f.5: enabled 1
1708 03:53:33.078781 PCI: 00:1f.6: enabled 0
1709 03:53:33.082245 PCI: 00:1f.7: enabled 0
1710 03:53:33.085250 APIC: 00: enabled 1
1711 03:53:33.085359 GENERIC: 0.0: enabled 1
1712 03:53:33.088514 GENERIC: 0.0: enabled 1
1713 03:53:33.092007 GENERIC: 1.0: enabled 1
1714 03:53:33.095306 GENERIC: 0.0: enabled 1
1715 03:53:33.095424 GENERIC: 1.0: enabled 1
1716 03:53:33.098790 USB0 port 0: enabled 1
1717 03:53:33.102088 GENERIC: 0.0: enabled 1
1718 03:53:33.105331 USB0 port 0: enabled 1
1719 03:53:33.105418 GENERIC: 0.0: enabled 1
1720 03:53:33.108524 I2C: 00:1a: enabled 1
1721 03:53:33.111879 I2C: 00:31: enabled 1
1722 03:53:33.111965 I2C: 00:32: enabled 1
1723 03:53:33.115570 I2C: 00:10: enabled 1
1724 03:53:33.118300 I2C: 00:15: enabled 1
1725 03:53:33.118388 GENERIC: 0.0: enabled 0
1726 03:53:33.121834 GENERIC: 1.0: enabled 0
1727 03:53:33.125761 GENERIC: 0.0: enabled 1
1728 03:53:33.128366 SPI: 00: enabled 1
1729 03:53:33.128454 SPI: 00: enabled 1
1730 03:53:33.131876 PNP: 0c09.0: enabled 1
1731 03:53:33.135067 GENERIC: 0.0: enabled 1
1732 03:53:33.135155 USB3 port 0: enabled 1
1733 03:53:33.138687 USB3 port 1: enabled 1
1734 03:53:33.141818 USB3 port 2: enabled 0
1735 03:53:33.141928 USB3 port 3: enabled 0
1736 03:53:33.144886 USB2 port 0: enabled 0
1737 03:53:33.148199 USB2 port 1: enabled 1
1738 03:53:33.151654 USB2 port 2: enabled 1
1739 03:53:33.151742 USB2 port 3: enabled 0
1740 03:53:33.154951 USB2 port 4: enabled 1
1741 03:53:33.158293 USB2 port 5: enabled 0
1742 03:53:33.158381 USB2 port 6: enabled 0
1743 03:53:33.161498 USB2 port 7: enabled 0
1744 03:53:33.165156 USB2 port 8: enabled 0
1745 03:53:33.165273 USB2 port 9: enabled 0
1746 03:53:33.168109 USB3 port 0: enabled 0
1747 03:53:33.171282 USB3 port 1: enabled 1
1748 03:53:33.174598 USB3 port 2: enabled 0
1749 03:53:33.174693 USB3 port 3: enabled 0
1750 03:53:33.177912 GENERIC: 0.0: enabled 1
1751 03:53:33.181208 GENERIC: 1.0: enabled 1
1752 03:53:33.181297 APIC: 01: enabled 1
1753 03:53:33.184553 APIC: 03: enabled 1
1754 03:53:33.187818 APIC: 04: enabled 1
1755 03:53:33.187903 APIC: 07: enabled 1
1756 03:53:33.190995 APIC: 06: enabled 1
1757 03:53:33.194372 APIC: 02: enabled 1
1758 03:53:33.194450 APIC: 05: enabled 1
1759 03:53:33.197724 PCI: 01:00.0: enabled 1
1760 03:53:33.204204 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1761 03:53:33.207834 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1762 03:53:33.210809 ELOG: NV offset 0xf30000 size 0x1000
1763 03:53:33.218269 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1764 03:53:33.225034 ELOG: Event(17) added with size 13 at 2023-02-26 03:53:33 UTC
1765 03:53:33.231598 ELOG: Event(92) added with size 9 at 2023-02-26 03:53:33 UTC
1766 03:53:33.238147 ELOG: Event(93) added with size 9 at 2023-02-26 03:53:33 UTC
1767 03:53:33.244533 ELOG: Event(9E) added with size 10 at 2023-02-26 03:53:33 UTC
1768 03:53:33.251070 ELOG: Event(9F) added with size 14 at 2023-02-26 03:53:33 UTC
1769 03:53:33.257754 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1770 03:53:33.264073 ELOG: Event(A1) added with size 10 at 2023-02-26 03:53:33 UTC
1771 03:53:33.270811 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1772 03:53:33.277382 ELOG: Event(A0) added with size 9 at 2023-02-26 03:53:33 UTC
1773 03:53:33.280557 elog_add_boot_reason: Logged dev mode boot
1774 03:53:33.287311 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1775 03:53:33.290467 Finalize devices...
1776 03:53:33.290556 Devices finalized
1777 03:53:33.297316 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1778 03:53:33.300675 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1779 03:53:33.307189 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1780 03:53:33.310612 ME: HFSTS1 : 0x80030055
1781 03:53:33.317058 ME: HFSTS2 : 0x30280116
1782 03:53:33.320414 ME: HFSTS3 : 0x00000050
1783 03:53:33.327113 ME: HFSTS4 : 0x00004000
1784 03:53:33.330702 ME: HFSTS5 : 0x00000000
1785 03:53:33.333631 ME: HFSTS6 : 0x40400006
1786 03:53:33.337169 ME: Manufacturing Mode : YES
1787 03:53:33.340274 ME: SPI Protection Mode Enabled : NO
1788 03:53:33.346916 ME: FW Partition Table : OK
1789 03:53:33.350453 ME: Bringup Loader Failure : NO
1790 03:53:33.353758 ME: Firmware Init Complete : NO
1791 03:53:33.356927 ME: Boot Options Present : NO
1792 03:53:33.360372 ME: Update In Progress : NO
1793 03:53:33.363587 ME: D0i3 Support : YES
1794 03:53:33.367090 ME: Low Power State Enabled : NO
1795 03:53:33.370288 ME: CPU Replaced : YES
1796 03:53:33.376982 ME: CPU Replacement Valid : YES
1797 03:53:33.380082 ME: Current Working State : 5
1798 03:53:33.383514 ME: Current Operation State : 1
1799 03:53:33.386618 ME: Current Operation Mode : 3
1800 03:53:33.390126 ME: Error Code : 0
1801 03:53:33.393317 ME: Enhanced Debug Mode : NO
1802 03:53:33.396736 ME: CPU Debug Disabled : YES
1803 03:53:33.399915 ME: TXT Support : NO
1804 03:53:33.406751 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1805 03:53:33.416518 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1806 03:53:33.419722 CBFS: 'fallback/slic' not found.
1807 03:53:33.423248 ACPI: Writing ACPI tables at 76b01000.
1808 03:53:33.423330 ACPI: * FACS
1809 03:53:33.426474 ACPI: * DSDT
1810 03:53:33.430016 Ramoops buffer: 0x100000@0x76a00000.
1811 03:53:33.433408 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1812 03:53:33.439566 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1813 03:53:33.442971 Google Chrome EC: version:
1814 03:53:33.446183 ro: voema_v2.0.10114-a447f03e46
1815 03:53:33.449556 rw: voema_v2.0.10114-a447f03e46
1816 03:53:33.452971 running image: 2
1817 03:53:33.456302 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1818 03:53:33.461604 ACPI: * FADT
1819 03:53:33.461681 SCI is IRQ9
1820 03:53:33.468089 ACPI: added table 1/32, length now 40
1821 03:53:33.468175 ACPI: * SSDT
1822 03:53:33.471581 Found 1 CPU(s) with 8 core(s) each.
1823 03:53:33.478043 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1824 03:53:33.481194 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1825 03:53:33.484475 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1826 03:53:33.487756 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1827 03:53:33.494472 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1828 03:53:33.501140 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1829 03:53:33.504567 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1830 03:53:33.511000 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1831 03:53:33.517585 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1832 03:53:33.521005 \_SB.PCI0.RP09: Added StorageD3Enable property
1833 03:53:33.527801 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1834 03:53:33.530909 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1835 03:53:33.537803 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1836 03:53:33.541043 PS2K: Passing 80 keymaps to kernel
1837 03:53:33.547647 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1838 03:53:33.554352 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1839 03:53:33.561067 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1840 03:53:33.567557 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1841 03:53:33.574062 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1842 03:53:33.580586 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1843 03:53:33.587223 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1844 03:53:33.593968 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1845 03:53:33.597079 ACPI: added table 2/32, length now 44
1846 03:53:33.600333 ACPI: * MCFG
1847 03:53:33.603810 ACPI: added table 3/32, length now 48
1848 03:53:33.603902 ACPI: * TPM2
1849 03:53:33.606887 TPM2 log created at 0x769f0000
1850 03:53:33.610411 ACPI: added table 4/32, length now 52
1851 03:53:33.613746 ACPI: * MADT
1852 03:53:33.613837 SCI is IRQ9
1853 03:53:33.617002 ACPI: added table 5/32, length now 56
1854 03:53:33.620321 current = 76b09850
1855 03:53:33.623649 ACPI: * DMAR
1856 03:53:33.626888 ACPI: added table 6/32, length now 60
1857 03:53:33.629955 ACPI: added table 7/32, length now 64
1858 03:53:33.630043 ACPI: * HPET
1859 03:53:33.636910 ACPI: added table 8/32, length now 68
1860 03:53:33.637000 ACPI: done.
1861 03:53:33.640219 ACPI tables: 35216 bytes.
1862 03:53:33.643287 smbios_write_tables: 769ef000
1863 03:53:33.646335 EC returned error result code 3
1864 03:53:33.649850 Couldn't obtain OEM name from CBI
1865 03:53:33.653409 Create SMBIOS type 16
1866 03:53:33.653497 Create SMBIOS type 17
1867 03:53:33.656179 GENERIC: 0.0 (WIFI Device)
1868 03:53:33.659646 SMBIOS tables: 1734 bytes.
1869 03:53:33.662875 Writing table forward entry at 0x00000500
1870 03:53:33.669470 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1871 03:53:33.672867 Writing coreboot table at 0x76b25000
1872 03:53:33.679218 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1873 03:53:33.682723 1. 0000000000001000-000000000009ffff: RAM
1874 03:53:33.689211 2. 00000000000a0000-00000000000fffff: RESERVED
1875 03:53:33.692567 3. 0000000000100000-00000000769eefff: RAM
1876 03:53:33.699193 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1877 03:53:33.702502 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1878 03:53:33.708807 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1879 03:53:33.715578 7. 0000000077000000-000000007fbfffff: RESERVED
1880 03:53:33.719203 8. 00000000c0000000-00000000cfffffff: RESERVED
1881 03:53:33.725415 9. 00000000f8000000-00000000f9ffffff: RESERVED
1882 03:53:33.729117 10. 00000000fb000000-00000000fb000fff: RESERVED
1883 03:53:33.732145 11. 00000000fe000000-00000000fe00ffff: RESERVED
1884 03:53:33.738696 12. 00000000fed80000-00000000fed87fff: RESERVED
1885 03:53:33.742060 13. 00000000fed90000-00000000fed92fff: RESERVED
1886 03:53:33.748537 14. 00000000feda0000-00000000feda1fff: RESERVED
1887 03:53:33.752013 15. 00000000fedc0000-00000000feddffff: RESERVED
1888 03:53:33.755267 16. 0000000100000000-00000004803fffff: RAM
1889 03:53:33.758509 Passing 4 GPIOs to payload:
1890 03:53:33.765192 NAME | PORT | POLARITY | VALUE
1891 03:53:33.771796 lid | undefined | high | high
1892 03:53:33.775064 power | undefined | high | low
1893 03:53:33.781744 oprom | undefined | high | low
1894 03:53:33.785257 EC in RW | 0x000000e5 | high | high
1895 03:53:33.791674 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e94e
1896 03:53:33.795063 coreboot table: 1576 bytes.
1897 03:53:33.798335 IMD ROOT 0. 0x76fff000 0x00001000
1898 03:53:33.801666 IMD SMALL 1. 0x76ffe000 0x00001000
1899 03:53:33.804934 FSP MEMORY 2. 0x76c4e000 0x003b0000
1900 03:53:33.811798 VPD 3. 0x76c4d000 0x00000367
1901 03:53:33.815104 RO MCACHE 4. 0x76c4c000 0x00000fdc
1902 03:53:33.818200 CONSOLE 5. 0x76c2c000 0x00020000
1903 03:53:33.821494 FMAP 6. 0x76c2b000 0x00000578
1904 03:53:33.824561 TIME STAMP 7. 0x76c2a000 0x00000910
1905 03:53:33.828095 VBOOT WORK 8. 0x76c16000 0x00014000
1906 03:53:33.831273 ROMSTG STCK 9. 0x76c15000 0x00001000
1907 03:53:33.837994 AFTER CAR 10. 0x76c0a000 0x0000b000
1908 03:53:33.841170 RAMSTAGE 11. 0x76b97000 0x00073000
1909 03:53:33.844638 REFCODE 12. 0x76b42000 0x00055000
1910 03:53:33.847874 SMM BACKUP 13. 0x76b32000 0x00010000
1911 03:53:33.850860 4f444749 14. 0x76b30000 0x00002000
1912 03:53:33.854391 EXT VBT15. 0x76b2d000 0x0000219f
1913 03:53:33.857669 COREBOOT 16. 0x76b25000 0x00008000
1914 03:53:33.861051 ACPI 17. 0x76b01000 0x00024000
1915 03:53:33.864264 ACPI GNVS 18. 0x76b00000 0x00001000
1916 03:53:33.871115 RAMOOPS 19. 0x76a00000 0x00100000
1917 03:53:33.874369 TPM2 TCGLOG20. 0x769f0000 0x00010000
1918 03:53:33.877583 SMBIOS 21. 0x769ef000 0x00000800
1919 03:53:33.877672 IMD small region:
1920 03:53:33.884066 IMD ROOT 0. 0x76ffec00 0x00000400
1921 03:53:33.887631 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1922 03:53:33.890842 POWER STATE 2. 0x76ffeb80 0x00000044
1923 03:53:33.894276 ROMSTAGE 3. 0x76ffeb60 0x00000004
1924 03:53:33.897458 MEM INFO 4. 0x76ffe980 0x000001e0
1925 03:53:33.904029 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1926 03:53:33.907310 MTRR: Physical address space:
1927 03:53:33.914135 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1928 03:53:33.920704 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1929 03:53:33.927157 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1930 03:53:33.930554 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1931 03:53:33.937191 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1932 03:53:33.943774 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1933 03:53:33.950406 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1934 03:53:33.953726 MTRR: Fixed MSR 0x250 0x0606060606060606
1935 03:53:33.960382 MTRR: Fixed MSR 0x258 0x0606060606060606
1936 03:53:33.963469 MTRR: Fixed MSR 0x259 0x0000000000000000
1937 03:53:33.966919 MTRR: Fixed MSR 0x268 0x0606060606060606
1938 03:53:33.970173 MTRR: Fixed MSR 0x269 0x0606060606060606
1939 03:53:33.976830 MTRR: Fixed MSR 0x26a 0x0606060606060606
1940 03:53:33.980361 MTRR: Fixed MSR 0x26b 0x0606060606060606
1941 03:53:33.983469 MTRR: Fixed MSR 0x26c 0x0606060606060606
1942 03:53:33.986658 MTRR: Fixed MSR 0x26d 0x0606060606060606
1943 03:53:33.993470 MTRR: Fixed MSR 0x26e 0x0606060606060606
1944 03:53:33.996635 MTRR: Fixed MSR 0x26f 0x0606060606060606
1945 03:53:33.999949 call enable_fixed_mtrr()
1946 03:53:34.003257 CPU physical address size: 39 bits
1947 03:53:34.009580 MTRR: default type WB/UC MTRR counts: 6/7.
1948 03:53:34.013380 MTRR: WB selected as default type.
1949 03:53:34.019700 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1950 03:53:34.022950 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1951 03:53:34.029657 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1952 03:53:34.036381 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1953 03:53:34.042900 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1954 03:53:34.049409 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1955 03:53:34.053011
1956 03:53:34.053100 MTRR check
1957 03:53:34.056261 Fixed MTRRs : Enabled
1958 03:53:34.056351 Variable MTRRs: Enabled
1959 03:53:34.056426
1960 03:53:34.063318 MTRR: Fixed MSR 0x250 0x0606060606060606
1961 03:53:34.066448 MTRR: Fixed MSR 0x258 0x0606060606060606
1962 03:53:34.069601 MTRR: Fixed MSR 0x259 0x0000000000000000
1963 03:53:34.072983 MTRR: Fixed MSR 0x268 0x0606060606060606
1964 03:53:34.079729 MTRR: Fixed MSR 0x269 0x0606060606060606
1965 03:53:34.083007 MTRR: Fixed MSR 0x26a 0x0606060606060606
1966 03:53:34.086433 MTRR: Fixed MSR 0x26b 0x0606060606060606
1967 03:53:34.089765 MTRR: Fixed MSR 0x26c 0x0606060606060606
1968 03:53:34.096157 MTRR: Fixed MSR 0x26d 0x0606060606060606
1969 03:53:34.099587 MTRR: Fixed MSR 0x26e 0x0606060606060606
1970 03:53:34.102685 MTRR: Fixed MSR 0x26f 0x0606060606060606
1971 03:53:34.110062 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
1972 03:53:34.113343 call enable_fixed_mtrr()
1973 03:53:34.116926 Checking cr50 for pending updates
1974 03:53:34.120240 CPU physical address size: 39 bits
1975 03:53:34.124068 MTRR: Fixed MSR 0x250 0x0606060606060606
1976 03:53:34.127582 MTRR: Fixed MSR 0x250 0x0606060606060606
1977 03:53:34.134059 MTRR: Fixed MSR 0x258 0x0606060606060606
1978 03:53:34.137140 MTRR: Fixed MSR 0x259 0x0000000000000000
1979 03:53:34.140567 MTRR: Fixed MSR 0x268 0x0606060606060606
1980 03:53:34.143923 MTRR: Fixed MSR 0x269 0x0606060606060606
1981 03:53:34.147339 MTRR: Fixed MSR 0x26a 0x0606060606060606
1982 03:53:34.153906 MTRR: Fixed MSR 0x26b 0x0606060606060606
1983 03:53:34.157335 MTRR: Fixed MSR 0x26c 0x0606060606060606
1984 03:53:34.160582 MTRR: Fixed MSR 0x26d 0x0606060606060606
1985 03:53:34.163811 MTRR: Fixed MSR 0x26e 0x0606060606060606
1986 03:53:34.170478 MTRR: Fixed MSR 0x26f 0x0606060606060606
1987 03:53:34.173817 MTRR: Fixed MSR 0x258 0x0606060606060606
1988 03:53:34.177305 call enable_fixed_mtrr()
1989 03:53:34.180349 MTRR: Fixed MSR 0x259 0x0000000000000000
1990 03:53:34.187000 MTRR: Fixed MSR 0x268 0x0606060606060606
1991 03:53:34.190400 MTRR: Fixed MSR 0x269 0x0606060606060606
1992 03:53:34.193598 MTRR: Fixed MSR 0x26a 0x0606060606060606
1993 03:53:34.196834 MTRR: Fixed MSR 0x26b 0x0606060606060606
1994 03:53:34.203654 MTRR: Fixed MSR 0x26c 0x0606060606060606
1995 03:53:34.207114 MTRR: Fixed MSR 0x26d 0x0606060606060606
1996 03:53:34.210255 MTRR: Fixed MSR 0x26e 0x0606060606060606
1997 03:53:34.213343 MTRR: Fixed MSR 0x26f 0x0606060606060606
1998 03:53:34.218131 CPU physical address size: 39 bits
1999 03:53:34.224938 call enable_fixed_mtrr()
2000 03:53:34.227980 MTRR: Fixed MSR 0x250 0x0606060606060606
2001 03:53:34.231493 MTRR: Fixed MSR 0x250 0x0606060606060606
2002 03:53:34.237828 MTRR: Fixed MSR 0x258 0x0606060606060606
2003 03:53:34.241429 MTRR: Fixed MSR 0x259 0x0000000000000000
2004 03:53:34.244704 MTRR: Fixed MSR 0x268 0x0606060606060606
2005 03:53:34.247925 MTRR: Fixed MSR 0x269 0x0606060606060606
2006 03:53:34.251111 MTRR: Fixed MSR 0x26a 0x0606060606060606
2007 03:53:34.257995 MTRR: Fixed MSR 0x26b 0x0606060606060606
2008 03:53:34.261147 MTRR: Fixed MSR 0x26c 0x0606060606060606
2009 03:53:34.264435 MTRR: Fixed MSR 0x26d 0x0606060606060606
2010 03:53:34.267722 MTRR: Fixed MSR 0x26e 0x0606060606060606
2011 03:53:34.274478 MTRR: Fixed MSR 0x26f 0x0606060606060606
2012 03:53:34.277777 MTRR: Fixed MSR 0x258 0x0606060606060606
2013 03:53:34.284417 MTRR: Fixed MSR 0x259 0x0000000000000000
2014 03:53:34.287845 MTRR: Fixed MSR 0x268 0x0606060606060606
2015 03:53:34.290811 MTRR: Fixed MSR 0x269 0x0606060606060606
2016 03:53:34.294200 MTRR: Fixed MSR 0x26a 0x0606060606060606
2017 03:53:34.300828 MTRR: Fixed MSR 0x26b 0x0606060606060606
2018 03:53:34.304253 MTRR: Fixed MSR 0x26c 0x0606060606060606
2019 03:53:34.307473 MTRR: Fixed MSR 0x26d 0x0606060606060606
2020 03:53:34.310823 MTRR: Fixed MSR 0x26e 0x0606060606060606
2021 03:53:34.317683 MTRR: Fixed MSR 0x26f 0x0606060606060606
2022 03:53:34.320869 call enable_fixed_mtrr()
2023 03:53:34.325112 call enable_fixed_mtrr()
2024 03:53:34.325197 Reading cr50 TPM mode
2025 03:53:34.329050 CPU physical address size: 39 bits
2026 03:53:34.331895 CPU physical address size: 39 bits
2027 03:53:34.335460 CPU physical address size: 39 bits
2028 03:53:34.342227 MTRR: Fixed MSR 0x250 0x0606060606060606
2029 03:53:34.345722 MTRR: Fixed MSR 0x250 0x0606060606060606
2030 03:53:34.348824 MTRR: Fixed MSR 0x258 0x0606060606060606
2031 03:53:34.352576 MTRR: Fixed MSR 0x259 0x0000000000000000
2032 03:53:34.359018 MTRR: Fixed MSR 0x268 0x0606060606060606
2033 03:53:34.362089 MTRR: Fixed MSR 0x269 0x0606060606060606
2034 03:53:34.365351 MTRR: Fixed MSR 0x26a 0x0606060606060606
2035 03:53:34.368651 MTRR: Fixed MSR 0x26b 0x0606060606060606
2036 03:53:34.375531 MTRR: Fixed MSR 0x26c 0x0606060606060606
2037 03:53:34.378852 MTRR: Fixed MSR 0x26d 0x0606060606060606
2038 03:53:34.381951 MTRR: Fixed MSR 0x26e 0x0606060606060606
2039 03:53:34.385451 MTRR: Fixed MSR 0x26f 0x0606060606060606
2040 03:53:34.393184 MTRR: Fixed MSR 0x258 0x0606060606060606
2041 03:53:34.393297 call enable_fixed_mtrr()
2042 03:53:34.399742 MTRR: Fixed MSR 0x259 0x0000000000000000
2043 03:53:34.402987 MTRR: Fixed MSR 0x268 0x0606060606060606
2044 03:53:34.406405 MTRR: Fixed MSR 0x269 0x0606060606060606
2045 03:53:34.409801 MTRR: Fixed MSR 0x26a 0x0606060606060606
2046 03:53:34.416507 MTRR: Fixed MSR 0x26b 0x0606060606060606
2047 03:53:34.419929 MTRR: Fixed MSR 0x26c 0x0606060606060606
2048 03:53:34.422985 MTRR: Fixed MSR 0x26d 0x0606060606060606
2049 03:53:34.426442 MTRR: Fixed MSR 0x26e 0x0606060606060606
2050 03:53:34.432857 MTRR: Fixed MSR 0x26f 0x0606060606060606
2051 03:53:34.436113 CPU physical address size: 39 bits
2052 03:53:34.440226 call enable_fixed_mtrr()
2053 03:53:34.446877 BS: BS_PAYLOAD_LOAD entry times (exec / console): 213 / 6 ms
2054 03:53:34.450196 CPU physical address size: 39 bits
2055 03:53:34.456967 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2056 03:53:34.463522 Checking segment from ROM address 0xffc02b38
2057 03:53:34.466806 Checking segment from ROM address 0xffc02b54
2058 03:53:34.470338 Loading segment from ROM address 0xffc02b38
2059 03:53:34.473791 code (compression=0)
2060 03:53:34.483380 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2061 03:53:34.490056 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2062 03:53:34.493207 it's not compressed!
2063 03:53:34.632513 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2064 03:53:34.639068 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2065 03:53:34.645799 Loading segment from ROM address 0xffc02b54
2066 03:53:34.649076 Entry Point 0x30000000
2067 03:53:34.649165 Loaded segments
2068 03:53:34.656214 BS: BS_PAYLOAD_LOAD run times (exec / console): 139 / 63 ms
2069 03:53:34.701045 Finalizing chipset.
2070 03:53:34.704324 Finalizing SMM.
2071 03:53:34.704415 APMC done.
2072 03:53:34.710943 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2073 03:53:34.714101 mp_park_aps done after 0 msecs.
2074 03:53:34.717179 Jumping to boot code at 0x30000000(0x76b25000)
2075 03:53:34.727238 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2076 03:53:34.727328
2077 03:53:34.727403
2078 03:53:34.730751
2079 03:53:34.730842 Starting depthcharge on Voema...
2080 03:53:34.731200 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
2081 03:53:34.731303 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2082 03:53:34.731390 Setting prompt string to ['volteer:']
2083 03:53:34.731471 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:42)
2084 03:53:34.733895
2085 03:53:34.740522 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2086 03:53:34.740610
2087 03:53:34.747228 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2088 03:53:34.747315
2089 03:53:34.754314 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2090 03:53:34.754403
2091 03:53:34.757395 Failed to find eMMC card reader
2092 03:53:34.757509
2093 03:53:34.757588 Wipe memory regions:
2094 03:53:34.760418
2095 03:53:34.763685 [0x00000000001000, 0x000000000a0000)
2096 03:53:34.763772
2097 03:53:34.766894 [0x00000000100000, 0x00000030000000)
2098 03:53:34.801308
2099 03:53:34.804542 [0x00000032662db0, 0x000000769ef000)
2100 03:53:34.852599
2101 03:53:34.855730 [0x00000100000000, 0x00000480400000)
2102 03:53:35.465552
2103 03:53:35.468899 ec_init: CrosEC protocol v3 supported (256, 256)
2104 03:53:35.900754
2105 03:53:35.900909 R8152: Initializing
2106 03:53:35.900980
2107 03:53:35.904144 Version 6 (ocp_data = 5c30)
2108 03:53:35.904234
2109 03:53:35.907488 R8152: Done initializing
2110 03:53:35.907576
2111 03:53:35.910531 Adding net device
2112 03:53:36.213231
2113 03:53:36.216482 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2114 03:53:36.216577
2115 03:53:36.216646
2116 03:53:36.216709
2117 03:53:36.220020 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2119 03:53:36.320788 volteer: tftpboot 192.168.201.1 9338244/tftp-deploy-71cykujs/kernel/bzImage 9338244/tftp-deploy-71cykujs/kernel/cmdline 9338244/tftp-deploy-71cykujs/ramdisk/ramdisk.cpio.gz
2120 03:53:36.320963 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2121 03:53:36.321084 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:41)
2122 03:53:36.325238 tftpboot 192.168.201.1 9338244/tftp-deploy-71cykujs/kernel/bzImaoy-71cykujs/kernel/cmdline 9338244/tftp-deploy-71cykujs/ramdisk/ramdisk.cpio.gz
2123 03:53:36.325329
2124 03:53:36.325399 Waiting for link
2125 03:53:36.528131
2126 03:53:36.528286 done.
2127 03:53:36.528361
2128 03:53:36.528425 MAC: 00:24:32:30:78:e4
2129 03:53:36.528486
2130 03:53:36.531519 Sending DHCP discover... done.
2131 03:53:36.531608
2132 03:53:36.534522 Waiting for reply... done.
2133 03:53:36.534615
2134 03:53:36.537945 Sending DHCP request... done.
2135 03:53:36.538032
2136 03:53:36.541394 Waiting for reply... done.
2137 03:53:36.544429
2138 03:53:36.544514 My ip is 192.168.201.13
2139 03:53:36.544582
2140 03:53:36.547908 The DHCP server ip is 192.168.201.1
2141 03:53:36.547994
2142 03:53:36.554512 TFTP server IP predefined by user: 192.168.201.1
2143 03:53:36.554638
2144 03:53:36.560968 Bootfile predefined by user: 9338244/tftp-deploy-71cykujs/kernel/bzImage
2145 03:53:36.561054
2146 03:53:36.564519 Sending tftp read request... done.
2147 03:53:36.564605
2148 03:53:36.567504 Waiting for the transfer...
2149 03:53:36.567591
2150 03:53:37.133773 00000000 ################################################################
2151 03:53:37.133932
2152 03:53:37.710063 00080000 ################################################################
2153 03:53:37.710223
2154 03:53:38.265392 00100000 ################################################################
2155 03:53:38.265545
2156 03:53:38.795799 00180000 ################################################################
2157 03:53:38.795954
2158 03:53:39.376321 00200000 ################################################################
2159 03:53:39.376479
2160 03:53:39.967081 00280000 ################################################################
2161 03:53:39.967241
2162 03:53:40.553478 00300000 ################################################################
2163 03:53:40.553625
2164 03:53:41.093207 00380000 ################################################################
2165 03:53:41.093352
2166 03:53:41.645248 00400000 ################################################################
2167 03:53:41.645391
2168 03:53:42.190050 00480000 ################################################################
2169 03:53:42.190195
2170 03:53:42.729269 00500000 ################################################################
2171 03:53:42.729419
2172 03:53:43.289445 00580000 ################################################################
2173 03:53:43.289592
2174 03:53:43.860993 00600000 ################################################################
2175 03:53:43.861137
2176 03:53:44.418784 00680000 ################################################################
2177 03:53:44.418932
2178 03:53:44.667101 00700000 ############################# done.
2179 03:53:44.667248
2180 03:53:44.670379 The bootfile was 7573392 bytes long.
2181 03:53:44.670468
2182 03:53:44.673933 Sending tftp read request... done.
2183 03:53:44.674023
2184 03:53:44.677144 Waiting for the transfer...
2185 03:53:44.677234
2186 03:53:45.230757 00000000 ################################################################
2187 03:53:45.230916
2188 03:53:45.868824 00080000 ################################################################
2189 03:53:45.869355
2190 03:53:46.484201 00100000 ################################################################
2191 03:53:46.484733
2192 03:53:47.140373 00180000 ################################################################
2193 03:53:47.140954
2194 03:53:47.817426 00200000 ################################################################
2195 03:53:47.818036
2196 03:53:48.532781 00280000 ################################################################
2197 03:53:48.533336
2198 03:53:49.149396 00300000 ################################################################
2199 03:53:49.149553
2200 03:53:49.710252 00380000 ################################################################
2201 03:53:49.710393
2202 03:53:50.236725 00400000 ################################################################
2203 03:53:50.236874
2204 03:53:50.758288 00480000 ################################################################
2205 03:53:50.758436
2206 03:53:51.271721 00500000 ################################################################
2207 03:53:51.271867
2208 03:53:51.806651 00580000 ################################################################
2209 03:53:51.806802
2210 03:53:52.358401 00600000 ################################################################
2211 03:53:52.358543
2212 03:53:52.890822 00680000 ################################################################
2213 03:53:52.890961
2214 03:53:53.411231 00700000 ################################################################
2215 03:53:53.411370
2216 03:53:53.935780 00780000 ################################################################
2217 03:53:53.935922
2218 03:53:54.107154 00800000 ##################### done.
2219 03:53:54.107302
2220 03:53:54.110443 Sending tftp read request... done.
2221 03:53:54.110531
2222 03:53:54.113651 Waiting for the transfer...
2223 03:53:54.113739
2224 03:53:54.113807 00000000 # done.
2225 03:53:54.113873
2226 03:53:54.123409 Command line loaded dynamically from TFTP file: 9338244/tftp-deploy-71cykujs/kernel/cmdline
2227 03:53:54.123498
2228 03:53:54.136600 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2229 03:53:54.141433
2230 03:53:54.144553 Shutting down all USB controllers.
2231 03:53:54.144640
2232 03:53:54.144708 Removing current net device
2233 03:53:54.144773
2234 03:53:54.147910 Finalizing coreboot
2235 03:53:54.147997
2236 03:53:54.154597 Exiting depthcharge with code 4 at timestamp: 27992179
2237 03:53:54.154698
2238 03:53:54.154766
2239 03:53:54.154829 Starting kernel ...
2240 03:53:54.154891
2241 03:53:54.154950
2242 03:53:54.155320 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
2243 03:53:54.155417 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
2244 03:53:54.155493 Setting prompt string to ['Linux version [0-9]']
2245 03:53:54.155566 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2246 03:53:54.155637 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2248 03:58:17.156398 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
2250 03:58:17.157755 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
2252 03:58:17.158693 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2255 03:58:17.160161 end: 2 depthcharge-action (duration 00:05:00) [common]
2257 03:58:17.161130 Cleaning after the job
2258 03:58:17.161218 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9338244/tftp-deploy-71cykujs/ramdisk
2259 03:58:17.161875 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9338244/tftp-deploy-71cykujs/kernel
2260 03:58:17.162418 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9338244/tftp-deploy-71cykujs/modules
2261 03:58:17.162672 start: 5.1 power-off (timeout 00:00:30) [common]
2262 03:58:17.162818 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-12' '--port=1' '--command=off'
2263 03:58:19.342372 >> Command sent successfully.
2264 03:58:19.347979 Returned 0 in 2 seconds
2265 03:58:19.449184 end: 5.1 power-off (duration 00:00:02) [common]
2267 03:58:19.450748 start: 5.2 read-feedback (timeout 00:09:58) [common]
2268 03:58:19.451963 Listened to connection for namespace 'common' for up to 1s
2269 03:58:20.454880 Finalising connection for namespace 'common'
2270 03:58:20.455595 Disconnecting from shell: Finalise
2271 03:58:20.456048
2272 03:58:20.557575 end: 5.2 read-feedback (duration 00:00:01) [common]
2273 03:58:20.558192 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9338244
2274 03:58:20.566847 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9338244
2275 03:58:20.566976 JobError: Your job cannot terminate cleanly.